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Fri, 01 May 2026 00:23:10 -0700 (PDT) MIME-Version: 1.0 References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> In-Reply-To: <59548223-99d7-4a11-ac81-39eee6474562@amd.com> From: Mykola Kvach Date: Fri, 1 May 2026 10:22:59 +0300 X-Gm-Features: AVHnY4Jg7wsotp_WVEbJIS2b0dMXEBHMbNKBBcE6O3vHIq4294XeOfKYTvjEgUQ Message-ID: Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777620192-F5403CF5-77CD04DB/0/0 X-purgate-type: clean X-purgate-size: 7812 Hi Michal, On Wed, Apr 29, 2026 at 11:20=E2=80=AFAM Orzel, Michal wrote: > > > > On 28-Apr-26 13:57, Mykola Kvach wrote: > > From: Mykola Kvach > > > > The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. > > > > Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable > > bits selects bypass rather than deasserted interrupt outputs when the > > CPU interface stops driving them. Tables 2-2 and 2-3 show that a zeroed > > GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully > > disabling the interface. > > > > Fix this by reading GICC_CTLR, then setting the bypass-disable bits and > > clearing the group-enable bits that are architecturally defined for the > > current GICC_CTLR view before writing the value back. When Security > > Extensions are implemented Xen accesses the Non-secure copy of > > GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] and > > bits [8:7] are reserved. > > > > Without Security Extensions there is no separate Secure/Non-secure CPU > > interface view, so disabling both group-enable bits affects the shared > > interface state. This is still appropriate for the CPU shutdown path, > > which is expected to stop normal interrupt delivery through the interfa= ce > > and rely only on the architecturally separate wakeup event signaling. > > > > Section 2.3.2 also states that wakeup event signals remain available > > even when both GIC interrupt signaling and interrupt bypass are > > disabled, so disabling bypass does not break the power-management use > > case, i.e. suspend modes. > > > > Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") > > Signed-off-by: Mykola Kvach > > > > --- > > Changes in v2: > > - derive the shutdown masks from the active GICC_CTLR layout > > - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is s= et > > - stop writing reserved bits [8:7] on Security Extensions systems > > --- > > xen/arch/arm/gic-v2.c | 16 +++++++++++++++- > > xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- > > 2 files changed, 38 insertions(+), 3 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > > index 014f955967..241c1ff5c5 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) > > > > static void gicv2_cpu_disable(void) > > { > > - writel_gicc(0x0, GICC_CTLR); > > + uint32_t ctlr =3D readl_gicc(GICC_CTLR); > > + > > + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) > > + { > > + ctlr |=3D GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; > > + ctlr &=3D ~GICC_CTL_ENABLE; > > + } > > + else > > + { > > + ctlr |=3D GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | > > + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; > > + ctlr &=3D ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); > > + } > I don't understand why you want to set both G0 and G1, > Bits 5-6 in the NS view control Group 1, while the same bits in the > Secure/single-security-state view control Group 0. So in the latter case = you > don't need to set G1. Without security extensions all interrupts are G0 a= nd with > security extensions (NS access) all interrupts are G1. The spec guarantee= s the > functional mapping. I agree that this is not about Xen using both interrupt groups during normal operation. There are two separate points here. For the group-enable bits, Xen currently only enables bit 0 in gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be clear already. However, the old shutdown path wrote 0 to GICC_CTLR, which also cleared every group-enable bit visible in the current view. Since this patch changes the shutdown path from a plain zero write to a read/modify/write, I wanted to preserve that part of the old shutdown semantics and avoid leaving any normal interrupt delivery enabled in the common GICC_CTLR view. For the bypass-disable bits, the reason for setting both groups in the single-security-state/common view is the GICv2 bypass logic, not normal interrupt delivery. Once the group-enable bits are clear, the CPU interface is no longer driving the physical IRQ/FIQ outputs through normal GIC delivery. At that point, the bypass-disable bits decide whether those outputs are deasserted or driven by the legacy inputs. For example, with EnableGrp1 =3D=3D 0, EnableGrp0 =3D=3D 0 and FIQEn =3D=3D= 0, Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is why the common-view case disables the bypass paths for both groups. This is also not meant to make FIQ a supported delivery mode for Xen. It is the opposite: when the CPU interface is disabled, the final state should not allow the physical FIQ output to be driven by the legacy bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but Xen does not configure FIQ as its normal GICv2 interrupt delivery mode. So the intent is: * with Security Extensions, touch only the Non-secure view bits visible to Xen; * without Security Extensions, preserve the old "no normal delivery" shutdown behaviour, while changing the bypass-disable bits so that the physical outputs are deasserted rather than falling back to legacy bypass. If you prefer, I can also make v3 more conservative and only clear the group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The bypass-disable bits would still be set for all bypass paths visible in the current GICC_CTLR view, because that part is about the physical IRQ/FIQ outputs after normal delivery has been disabled, not about which interrupt group Xen normally uses. Thanks, Mykola > > ~Michal > > > > + > > + writel_gicc(ctlr, GICC_CTLR); > > } > > > > static void gicv2_hyp_init(void) > > diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/= gic.h > > index 8e713aa477..ff22dea40d 100644 > > --- a/xen/arch/arm/include/asm/gic.h > > +++ b/xen/arch/arm/include/asm/gic.h > > @@ -102,8 +102,29 @@ > > #define GICD_TYPE_SEC 0x400 > > #define GICD_TYPER_DVIS (1U << 18) > > > > -#define GICC_CTL_ENABLE 0x1 > > -#define GICC_CTL_EOI (0x1 << 9) > > +/* > > + * Xen runs in the Non-secure world. When Security Extensions are pres= ent, > > + * Xen accesses the Non-secure GICC_CTLR view, where bit[0] is EnableG= rp1 > > + * and bits[6:5] are the Group 1 bypass-disable bits. Otherwise Xen se= es the > > + * common GICC_CTLR layout, where bit[0] is EnableGrp0, bit[1] is Enab= leGrp1, > > + * bits[6:5] are the Group 0 bypass-disable bits, and bits[8:7] are th= e > > + * Group 1 bypass-disable bits. > > + */ > > +#define GICC_CTL_ENABLE (0x1 << 0) > > +#define GICC_CTL_ENABLE_GRP1 (0x1 << 1) > > +#define GICC_CTL_FIQBypDisGrp0 (0x1 << 5) > > +#define GICC_CTL_IRQBypDisGrp0 (0x1 << 6) > > +#define GICC_CTL_FIQBypDisGrp1 (0x1 << 7) > > +#define GICC_CTL_IRQBypDisGrp1 (0x1 << 8) > > + > > +#define GICC_CTLR_BYPASS_DISABLE_GRP0_MASK \ > > + (GICC_CTL_FIQBypDisGrp0 | GICC_CTL_IRQBypDisGrp0) > > +#define GICC_CTLR_BYPASS_DISABLE_GRP1_MASK \ > > + (GICC_CTL_FIQBypDisGrp1 | GICC_CTL_IRQBypDisGrp1) > > +#define GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK \ > > + GICC_CTLR_BYPASS_DISABLE_GRP0_MASK > > + > > +#define GICC_CTL_EOI (0x1 << 9) > > > > #define GICC_IA_IRQ 0x03ff > > #define GICC_IA_CPU_MASK 0x1c00 > From xen-devel-bounces@lists.xenproject.org Fri May 01 08:40:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 08:40:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298579.1573759 (Exim 4.92) (envelope-from ) id 1wIjQC-0004pS-Q8; Fri, 01 May 2026 08:40:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298579.1573759; Fri, 01 May 2026 08:40:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIjQC-0004pL-Mw; Fri, 01 May 2026 08:40:28 +0000 Received: by outflank-mailman (input) for mailman id 1298579; Fri, 01 May 2026 08:40:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIjQB-0004pD-6a for xen-devel@lists.xenproject.org; Fri, 01 May 2026 08:40:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIjQA-00BT7p-Hd for xen-devel@lists.xenproject.org; Fri, 01 May 2026 10:40:26 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f466f2-2eae-0a2a0a5409dd-0a2a4501e39c-6 for ; Fri, 01 May 2026 10:40:26 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f466fa-c1f2-0a2a45010019-d155dd2bd4ee-3 for ; Fri, 01 May 2026 10:40:26 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso687483f8f.0 for ; Fri, 01 May 2026 01:40:26 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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No functional change. Reported-by: Luca Fancellu Fixes: bd0b3a876d80 ("pdx: allow per-arch optimization of PDX conversion helpers") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie CC: Luca Fancellu --- xen/arch/x86/include/asm/pdx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/include/asm/pdx.h b/xen/arch/x86/include/asm/pdx.h index 6be7e1185eb1..6c10234ecfa9 100644 --- a/xen/arch/x86/include/asm/pdx.h +++ b/xen/arch/x86/include/asm/pdx.h @@ -57,7 +57,7 @@ static inline paddr_t directmapoff_to_maddr(unsigned long offset) return offset; } -#undef PDX_ASM_GOTO_SKIP +#undef PDX_ASM_GOTO #endif /* X86_PDX_H */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 08:44:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 08:44:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298588.1573768 (Exim 4.92) (envelope-from ) id 1wIjTb-0005Mu-AD; Fri, 01 May 2026 08:43:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298588.1573768; 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>> } >> >> -#undef PDX_ASM_GOTO_SKIP >> +#undef PDX_ASM_GOTO >> >> #endif /* X86_PDX_H */ >> >> -- >> 2.39.5 >> > Reviewed-by: Luca Fancellu Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 01 09:43:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 09:43:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298623.1573785 (Exim 4.92) (envelope-from ) id 1wIkOg-0005ul-Lj; Fri, 01 May 2026 09:42:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298623.1573785; Fri, 01 May 2026 09:42:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIkOg-0005ue-J8; Fri, 01 May 2026 09:42:58 +0000 Received: by outflank-mailman (input) for mailman id 1298623; Fri, 01 May 2026 09:42:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIkOf-0005uY-J9 for xen-devel@lists.xenproject.org; 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Smith" Subject: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() Thread-Topic: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() Thread-Index: AQHc2XU4ZcEAsUoy1EuhfVMBY8DBFw== Date: Fri, 1 May 2026 14:17:19 +0000 Message-ID: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Accept-Language: en-US, uk-UA, ru-RU Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PAXPR03MB7531:EE_|DU0PR03MB9126:EE_ x-ms-office365-filtering-correlation-id: c57c9c8c-345b-4109-c13d-08dea78c5b4d x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|376014|366016|1800799024|42112799006|38070700021|18002099003|56012099003; x-microsoft-antispam-message-info: pkdQAbRYZyvQBloAaA5o0gRNQTEPg4eozlmOVb4aSuNzD/+/uLDfYoqoIv0vKQCJ1hAGJOAnoGpQTKX6AkrSbRPSWYoktbJEXbhFoY7VnYGMJKZ93sP8CjWr0xDTbeQ1CmpcDprEzSpyvb94XhN1XLBUrnuWKovxCc+b8eSv/64A1PhYz094LoUX8luAcGPitGKGmZJULrhoEyDcDUzNDhfJSNmtm/gCE3J9SA67fjvUzyIVWQ102MCs51tw4jss9z1uSZqSiXbshq9rN03ApxC2/+oln7YuFXG6dubwxoqWx+d1DcsY4xRZavyZ5kp4nLm27iNcSuPVPk9XgnB9i7SjmP5eQGDv77DlS5wemUaEsqdHfUxgJaDqOesO1BAZWv68RZuPzA/pFouXqQ2yvOvFEIcmj3W32AJYOBokSS+Gkt1/JWEmwlBUyd/8YkLt6NlsbC0wOLGj0JvXaYon56eqDz33n85etHSs9f71BTZxFeTMdS7/auQNoL7aStWewmmSBbBEe0+UKbSd3JE0+x/HhJa7VxljgaJ9oam1OXDxc0nJ+r3R6xxajGKP2F4kDcaPoYQjhrcltMk0yCN9N9sJMvzkDV8cFQlHG4JaWlyXDX6uy2WIl6TBGvS2f1EIA/bOZktdTEkDUXvCkxGdZPmwgmDwyo9/3BPfYaGkH+qzRBdT+xdi/HcI/1+IlCtzI3cb4HCRAJc5QKFj+PTtzp+G4uueKIGw81Fg7GSeV42CdwPuMgmPaiHUtyh0EG/r x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR03MB7531.eurprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(42112799006)(38070700021)(18002099003)(56012099003);DIR:OUT;SFP:1102; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAXPR03MB7531.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c57c9c8c-345b-4109-c13d-08dea78c5b4d X-MS-Exchange-CrossTenant-originalarrivaltime: 01 May 2026 14:17:20.2157 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 76zOn3VIGr115XF5xSu33mBdTalXwEsgU4QVZfUS2ROiMXzhB64Nxs8v+txsQLCVRYjeLRKu+tc/M82jw+hPy0zqKBlx5K3FiRmhr6cng9Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR03MB9126 X-purgate-ID: tlsNG-c201ff/1777645042-2BD67443-91B88523/0/0 X-purgate-type: clean X-purgate-size: 2127 When booting Xen with CONFIG_USBAN=3Dy and CONFIG_XSM_FLASK=3Dy, UBSAN reports undefined behaviour in avc_dump_av() due to a left shift on a signed int: (XEN) [ 1.104348] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represe= nted in type 'int' (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=3Dy ubsan=3Dy Not tain= ted ]---- (XEN) [ 1.108848] CPU: 0 (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0= xd4 [...] (XEN) [ 1.146320] Xen call trace: (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0x= d4 (PC) (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bo= unds+0x1a0/0x290 (LR) (XEN) [ 1.147868] (XEN) [ 1.148177] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D This can be solved by making 'perm' an unsigned 32-bit type (u32). Signed-off-by: Dmytro Prokopchuk --- Test CI pipeline: https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 --- xen/xsm/flask/avc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c index 3d39e55cae..9c3ffdc070 100644 --- a/xen/xsm/flask/avc.c +++ b/xen/xsm/flask/avc.c @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) */ static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) { - int i, i2, perm; + int i, i2; + u32 perm; =20 if ( av =3D=3D 0 ) { --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 01 14:27:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 14:27:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298734.1573815 (Exim 4.92) (envelope-from ) id 1wIoq8-0008KR-37; Fri, 01 May 2026 14:27:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298734.1573815; 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Smith" Subject: Re: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" References: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR03MB6346 X-purgate-ID: tlsNG-ebf023/1777645653-316483FF-15C3A693/0/0 X-purgate-type: clean X-purgate-size: 2058 On 01/05/2026 3:17 pm, Dmytro Prokopchuk1 wrote: > When booting Xen with CONFIG_USBAN=y and CONFIG_XSM_FLASK=y, > UBSAN reports undefined behaviour in avc_dump_av() due to a left > shift on a signed int: > > (XEN) [ 1.104348] ================================================================================ > (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 > (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represented in type 'int' > (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 > (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 1.108848] CPU: 0 > (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0xd4 > [...] > (XEN) [ 1.146320] Xen call trace: > (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0xd4 (PC) > (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bounds+0x1a0/0x290 (LR) > (XEN) [ 1.147868] > (XEN) [ 1.148177] ================================================================================ > > This can be solved by making 'perm' an unsigned 32-bit type (u32). > > Signed-off-by: Dmytro Prokopchuk > --- > Test CI pipeline: > https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 > --- > xen/xsm/flask/avc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c > index 3d39e55cae..9c3ffdc070 100644 > --- a/xen/xsm/flask/avc.c > +++ b/xen/xsm/flask/avc.c > @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) > */ > static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) > { > - int i, i2, perm; > + int i, i2; > + u32 perm; > > if ( av == 0 ) > { The fix is fine, but wants to be uint32_t.  (The existing code is already inconsistent, and wants fixing up towards Xen's preferred style.) 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A1E0C419CE; Fri, 1 May 2026 17:08:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 20073C2BCB4; Fri, 1 May 2026 17:08:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777655295; bh=XcC+ppb7QWoUQwvJACnJzBK0iM4QcyPixryI8dPC6M0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=iZQqXWfkJ7G/uX0MQD43Cy2mng+g7WQ6MeFXlQkzUb5bXXAxv4lYU5yunWFJMq7YB 8dIcGhNMyig1jlYOtsC0cID+ztrgyj+efmnVQMIlqA8xGCc7fKvByNSQIKnohxPhqp mpQNijy4yT0DGYH4aljQE/W5PuLtsEvLkD4Jy2M+JzOQXKEJsv4kPwkdoEIhrzCRKE lJL04CGQcmLHjM3og8wgP4RTlxs3jeKfoIPe93LijZg3KH3c541wrX8Ud4Q7rJs3BT qPEebeq541mcid6qhU5DLITB8VnVJn1afS9H3M6Av0f3mgXUzOHA542m+AYk8PPz2X L4/7D6CYej7/A== Date: Fri, 1 May 2026 10:08:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx In-Reply-To: <9CEA7814-0ED6-401A-A5E9-2361278D9859@arm.com> Message-ID: References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <9CEA7814-0ED6-401A-A5E9-2361278D9859@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1693967578-1777655295=:512397" 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The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1693967578-1777655295=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Luca Fancellu wrote: > The changes looks good to me, for the Arm and common part: > > Reviewed-by: Luca Fancellu # arm, common > > I’ve also tested on Arm64, Arm32, x86_64 with virtual platforms. Acked-by: Stefano Stabellini --8323329-1693967578-1777655295=:512397-- From xen-devel-bounces@lists.xenproject.org Fri May 01 17:08:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 17:08:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298812.1573843 (Exim 4.92) (envelope-from ) id 1wIrM1-00068a-Hj; Fri, 01 May 2026 17:08:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298812.1573843; Fri, 01 May 2026 17:08:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIrM1-00068T-Eg; Fri, 01 May 2026 17:08:41 +0000 Received: by outflank-mailman (input) for mailman id 1298812; Fri, 01 May 2026 17:08:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIrLz-00065N-Ni for xen-devel@lists.xenproject.org; Fri, 01 May 2026 17:08:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIrLx-009ywS-IG for xen-devel@lists.xenproject.org; Fri, 01 May 2026 19:08:39 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f4ddd7-2eae-0a2a0a5409dd-0a2a450c8d3e-34 for ; Fri, 01 May 2026 19:08:39 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f4de16-62f1-0a2a450c0019-ac6904feb828-3 for ; Fri, 01 May 2026 19:08:38 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 451E36011F; Fri, 1 May 2026 17:08:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA466C2BCB4; Fri, 1 May 2026 17:08:36 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777655317; bh=ZKvnwmGodYs6HnVjN+oPgadh7nyz/qEnXV9PluO6LT8=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=GgjuUTd8WAeB5/wQ/e4MQnFtEMFztzkxlg6PyS9qCh7wZXAB541Lo05jdMLhczG67 99Yp6I7awijWAdA5KD6XR/7ew6uBmMSHm1Q1SeDYGX5+10zrE2bG8o2e9Xschlk7jv blVpN5KS4WG6CQTZGuVxXUfehnlEouvMzqryTl08Lfym8FrPodc7gJAR3zGnpDSj9L Jb9cPatUY2YVfkhbL/xHNCjACXjjwLvGaFrDZsiPzNoHBUnRr0eBdzEfzJID8aSYA+ aOA3s8xhGFpd9LAcqN2n+Gc+k3GLH24laCntiGRM4sU0r7q5drO997qvmvaYTerI0c 7YB5YFkZyfyzA== Date: Fri, 1 May 2026 10:08:36 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: Re: [PATCH v2 2/2] xen/arm: skip holes in physical address space when setting up frametable In-Reply-To: <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> Message-ID: References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-3-michal.orzel@amd.com> <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1916185994-1777655317=:512397" X-purgate-ID: tlsNG-d25034/1777655319-F7811CF5-F83D828C/0/0 X-purgate-type: clean X-purgate-size: 985 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1916185994-1777655317=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Luca Fancellu wrote: > This fixed 32Mb alignment feels a bit more than we need, If for example the > chunk is less than 32Mb? If we had some variable alignment for chunks less > than 32MB we would maybe help alloc_boot_pages job, in the end if the chunk > is less than 32Mb it won’t get the contiguous bit anyway. > > But I’m fine also if you leave it as it is. > > With the above fixed: > > Reviewed-by: Luca Fancellu > Tested-by: Luca Fancellu > > I’ve also tested on Arm64 MMU, Arm32 MMU, Arm64 MPU virtual platforms. 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The bug is years old, making it an incredibly rare occurance: (XEN) *** DOUBLE FAULT *** (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 (XEN) No stack overflow detected. Skipping stack trace. (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) DOUBLE FAULT -- system shutdown (XEN) **************************************** This is on the instruction boundary after enabling CET (writing MSR_S_CET) and prior to establishing SSP. Despite identifying this as a critical window where any fault was deadly (the CPU tries to push a shadow stack frame at 0, hence the CR2 value wrapping around to the top of the address space), I clearly forgot that this meant interrupts too, which are enabled. Along with regular interrupts, NMIs are a problem. Unlike other cases needing NMI safety, we can't use a self NMI and callback, as the stack needs to be empty at the point of enabling Shadow Stacks. Disable interrupts, and turn off the watchdog if it's configured. Note that watchdog_{en,dis}able() do not work here. They cause the watchdog NMI to be ignored; they do not inhibit the generation of NMIs. Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie The only way I can think of doing this in NMI context is to have the NMI LRET off the NMI stack back to the interrupted context. But this is horrible to arrange, not to mention different between IDT and FRED. Also, the {disable,setup}_lapic_nmi_watchdog() API is horrible but I don't have time to make it sane right now, and this needs backporting a long way. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2494069238 --- xen/arch/x86/setup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d041cbd5f6f1..95ac36beab37 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { + bool watchdog = (nmi_watchdog == NMI_LOCAL_APIC); + + /* + * Between enabling CET and establishing SSP, any fault or interrupt + * is fatal. We must arrange for none to happen. + * + * TODO: Figure out how to perform CET enablement in NMI context, + * given the constraint that the stack must be empty. + */ + if ( watchdog ) + disable_lapic_nmi_watchdog(); + local_irq_disable(); + wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); /* @@ -932,6 +945,13 @@ static void __init noreturn reinit_bsp_stack(void) } else asm volatile ( "setssbsy" ::: "memory" ); + + local_irq_enable(); + if ( watchdog ) + { + nmi_watchdog = NMI_LOCAL_APIC; + setup_apic_nmi_watchdog(); + } } reset_stack_and_jump(init_done); base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 21:38:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 21:38:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298928.1573861 (Exim 4.92) (envelope-from ) id 1wIvZ8-00083j-QX; Fri, 01 May 2026 21:38:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298928.1573861; Fri, 01 May 2026 21:38:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvZ8-00083c-Mk; Fri, 01 May 2026 21:38:30 +0000 Received: by outflank-mailman (input) for mailman id 1298928; Fri, 01 May 2026 21:38:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvZ7-00083W-Gr for xen-devel@lists.xenproject.org; Fri, 01 May 2026 21:38:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIvZ5-00AT3D-AC for xen-devel@lists.xenproject.org; Fri, 01 May 2026 23:38:28 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f51d33-2eae-0a2a0a5409dd-0a2a4502dc1a-16 for ; Fri, 01 May 2026 23:38:28 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f51d54-af86-0a2a45020019-d1558035d46c-3 for ; Fri, 01 May 2026 23:38:28 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4852a9c6309so18648615e9.0 for ; Fri, 01 May 2026 14:38:28 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a822c3422sm137436495e9.8.2026.05.01.14.38.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 May 2026 14:38:27 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1777671508; x=1778276308; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=CcrVhPKL924+HX0LUqaF9tbfBrxLJHzpVSLiSNTCUME=; b=WeUPjyZg3muJqydiM/zUlYgvCYOGDx8H9Zr0v0SNUp9MnDX6ZpHwdbHS97ZRVmajTp 9gnugnBr4bJvdW4Um5zCXt0GPtUBsgJfICF0LcxEOQZFMeU1zJL389zGpQ9jwriuyMpR /u4rAJXLE+weFViyY8aJDBadgctruA98QuAJc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777671508; x=1778276308; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=CcrVhPKL924+HX0LUqaF9tbfBrxLJHzpVSLiSNTCUME=; b=aHftFpdk02x0dFGrAWJfNIfdWe8w7JpFX0FX/j8JfXc2fK5zuYZ3WcBgvNrFd0W/Nu FS1UVCGKc4xzBQTWlml+t7KPLtkjSxvqas7Mp1NyeNh6cJWQzkGWnmy6+yJpxMQUhrza vvk8+8f2vmQ73kzpEhUG6lz2dq6u2nrDXTql8xDrUI+MqgNCA/0CjB/KSDBQhaPA5Gl6 BCXUuOB4bPaYFPIEEoFuHu3WdVHIKl73XdBTbvJFCy7+nQjV7lMCnXu/O89q/DPN8JGw xNTKw4pVC9m9cEHBlAmFl26gVlU54fwxlelFHUsqPk0hHjEWlixp5UtLV+My+2UZzsyK YagQ== X-Gm-Message-State: AOJu0YzkHPB1JcG+4bSryRC40/ztzZmj7iglHMBMrMoSB6aEVedX9BaV rHB9j972MHAevAH8JckpCEZXGoycSdfTWqG+wq3UonlfrHPze5urHUyII6DXDHkxck2gPi9N9Bj 2g4RD/yA= X-Gm-Gg: AeBDietmFabkXjZbNLT+8o+fpewcR/H3dM+2mEQLPuvhJQZ/F0bpNp+pCgb8iLBnFPu yieluak7f0LeDo0hNqeszqi8ICEkQl6wdN5R/vTi3bZPIxYKvgHnVnYSPKvaC/aQbOIXdCjqKE8 rq5c9HVymol8/AEvW3RNQATi4Ir+xTPjjoWRmj2s79XAWb85G68eV5hwt44mlyKqXDK0+tk6Y0e Qd4G/9lre+SOAkvw0hvXCPC5WqociGENBn00/IukohFifNoR77iPwSakYBBxTOnaFZPHm1bgGmk U3fVNq22y9Xs3o3Hf7vBZQGwIx2zNu46NyWO8tSUDn8Xe/C/uoxzc9JYi1UegF4Ne3/21CAP/42 /++5SGW8QIscr/G5hMBFPbSmsqXHen5h292r3NfcgJc6egaQSJPijjX/nL3OlXRiKlqJFmR94l+ 86djlRvdws6MwZpYuiH1UF5AaH3Jlla9plr+UCXP5Ur6pBSl4iz6qYXKnhM6I2nL5pbknO1QnRE xcU2HfZY2cV2UQ= X-Received: by 2002:a05:600c:a118:b0:489:ecee:c4ef with SMTP id 5b1f17b1804b1-48a9865daacmr7747625e9.13.1777671507797; Fri, 01 May 2026 14:38:27 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Stefano Stabellini , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH] x86/svm: Always sync guest CR2 on VMExit Date: Fri, 1 May 2026 22:38:26 +0100 Message-Id: <20260501213826.1291860-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777671508-894CD161-47778207/0/0 X-purgate-type: clean X-purgate-size: 1761 Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] and one is in the VMCB. Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware loads and saves the guest CR2 across VMRUN/VMExit. For HAP guests (where #PF is not intercepted, and therefore we don't typically inject #PF either), this causes the guest CR2 value to be lost on migrate. As migration is cooperative and not done from the #PF handler, this also goes unoticed by guests. It also means that an emulated MOV-from-CR2 reads a stale value. Reported-by: Stefano Stabellini Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie CC: Stefano Stabellini It also also works around the QEMU bug that triggered the investigion, where the CR2 intercepts trigger despite Xen requesting CR2 not to be intercepted. --- xen/arch/x86/hvm/svm/svm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index ced616684732..f49d2ebbfdd5 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) hvm_sanitize_regs_fields( regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs.l)); + v->arch.hvm.guest_cr[2] = vmcb_get_cr2(vmcb); if ( paging_mode_hap(v->domain) ) v->arch.hvm.guest_cr[3] = v->arch.hvm.hw_cr[3] = vmcb_get_cr3(vmcb); base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 21:44:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 21:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298936.1573870 (Exim 4.92) (envelope-from ) id 1wIvem-0001AD-Cz; Fri, 01 May 2026 21:44:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298936.1573870; Fri, 01 May 2026 21:44:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvem-0001A6-A6; Fri, 01 May 2026 21:44:20 +0000 Received: by outflank-mailman (input) for mailman id 1298936; Fri, 01 May 2026 21:44:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvek-00019z-Mt for xen-devel@lists.xenproject.org; Fri, 01 May 2026 21:44:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIvej-00GKNo-GX for xen-devel@lists.xenproject.org; Fri, 01 May 2026 23:44:17 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f51ea0-bab6-0a2a0a5309dd-0a2a45068022-6 for ; Fri, 01 May 2026 23:44:16 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f51eb0-7371-0a2a45060019-ac6904fea5dc-3 for ; Fri, 01 May 2026 23:44:16 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 57B2C6011F; Fri, 1 May 2026 21:44:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D1944C2BCB4; Fri, 1 May 2026 21:44:14 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777671855; bh=A+LTyI3f9+3qLvGzTxEcV/j8RwMj7X0W1mRk/y3DSSc=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=fBAC/kDmJh5cjHCnsCdoCU7jq1jyYKJk94Ya6jhstFoSN7iM9KcovMMXggX3czxM6 CznZbEPh/vCEJprzEVtQBziK/xNEX2ltxGNCW3XRxkAFa5q0eZu0+h44eL4GVF1s92 aBTI11hfdWfe+AT8vw6dV4GFvN5b0hsducdeQ1hp8khD4XJRgWiPLVYFNIBwvzLyTk X5RYf7KPtm4+qoG0zCVD0mPgxAl7Q3D5eoqYl2Q/yj2XUlhH7nKSy4jfGSVdWZDyvD zuafWS0YTLO+8/H9K0e/uD/f+3Pw5R/0GfhKUvCUrtmBgHpJYdCWAXC8+7miugC5AH Wqjb2IV+hVSfA== Date: Fri, 1 May 2026 14:44:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Andrew Cooper cc: Xen-devel , Stefano Stabellini , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit In-Reply-To: <20260501213826.1291860-1-andrew.cooper3@citrix.com> Message-ID: References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-528818502-1777671855=:512397" X-purgate-ID: tlsNG-16d1c6/1777671856-52974D75-F130C741/0/0 X-purgate-type: clean X-purgate-size: 2268 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-528818502-1777671855=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Andrew Cooper wrote: > Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] > and one is in the VMCB. > > Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware > loads and saves the guest CR2 across VMRUN/VMExit. > > For HAP guests (where #PF is not intercepted, and therefore we don't typically > inject #PF either), this causes the guest CR2 value to be lost on migrate. As > migration is cooperative and not done from the #PF handler, this also goes > unoticed by guests. > > It also means that an emulated MOV-from-CR2 reads a stale value. > > Reported-by: Stefano Stabellini > Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") > Signed-off-by: Andrew Cooper Tested-by: Stefano Stabellini > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > CC: Stefano Stabellini > > It also also works around the QEMU bug that triggered the investigion, where > the CR2 intercepts trigger despite Xen requesting CR2 not to be intercepted. > --- > xen/arch/x86/hvm/svm/svm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index ced616684732..f49d2ebbfdd5 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) > hvm_sanitize_regs_fields( > regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs.l)); > > + v->arch.hvm.guest_cr[2] = vmcb_get_cr2(vmcb); > if ( paging_mode_hap(v->domain) ) > v->arch.hvm.guest_cr[3] = v->arch.hvm.hw_cr[3] = vmcb_get_cr3(vmcb); > > > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e > -- > 2.39.5 > --8323329-528818502-1777671855=:512397-- From xen-devel-bounces@lists.xenproject.org Fri May 01 22:22:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 22:22:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298955.1573879 (Exim 4.92) (envelope-from ) id 1wIwF8-0006lC-82; Fri, 01 May 2026 22:21:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298955.1573879; Fri, 01 May 2026 22:21:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIwF8-0006l5-5Q; Fri, 01 May 2026 22:21:54 +0000 Received: by outflank-mailman (input) for mailman id 1298955; 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b=icN8GEwyLXhIcaX0GoHxCbyMoVfuroy3QlzV11INr0xGrwnzvvgP2Ej52xU1trR+cG4QiB2fRh695cNSRcM2z9SrKDj0wfcVZe0lK2awKmuXQQNDCdI8K2dRSvRJR6nXatkI5Dadp4FZDg/YfJ6FOt9VwDuUxG4aFb7Usl/PbNM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Date: Fri, 1 May 2026 23:21:44 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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One is v->arch.hvm.guest_cr[2] >> and one is in the VMCB. >> >> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >> loads and saves the guest CR2 across VMRUN/VMExit. >> >> For HAP guests (where #PF is not intercepted, and therefore we don't typically >> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >> migration is cooperative and not done from the #PF handler, this also goes >> unoticed by guests. >> >> It also means that an emulated MOV-from-CR2 reads a stale value. >> >> Reported-by: Stefano Stabellini >> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >> Signed-off-by: Andrew Cooper > Tested-by: Stefano Stabellini Thanks, sadly I made the mistake of extending my XTF PoC for this. There are also bugs on the emulated MOV-to-CR2 side, and they're far harder to untangle. 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>> >> + if ( (rc = domain_viommu_init(d, config->arch.viommu_type)) != 0 ) >> + goto fail; >> + > > Here if this fails, we call arch_domain_destroy(), however in that function we don’t call > viommu_relinquish_resources() > Yes, this is missing. I will add it in the updated version. > Cheers, > Luca > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 10:44:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 10:44:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299316.1573919 (Exim 4.92) (envelope-from ) id 1wJUJO-00057C-8s; Sun, 03 May 2026 10:44:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299316.1573919; Sun, 03 May 2026 10:44:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJUJO-000575-4a; Sun, 03 May 2026 10:44:34 +0000 Received: by outflank-mailman (input) for mailman id 1299316; Sun, 03 May 2026 10:44:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJUJM-00056j-6N for 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b=o1V3skWkrJkqBX9SMr9W+o4Lm+wC2wLbqDvg4wlxxkLWBHTx2s6DD0wjilJDZN4gK8F7DkCwysdT2ra6XYkHyx8RqXndp9xPJMwF1e2UiwMKUd6p0yIdYx4BlDSWxaBHXltNNIH9Ude+mvF36mnP6b4+igky3UcWkIEdy97zQbOMRVs02F7V2Mv7RIft9i7KQLoGs0gLGWxZg6gWo8vN7Oag2+1PGO8Pwh0XEEbXqPtH6pLBNtekePI8vfUOlhakqgXm+Avo5pVi+ixjUDb0muC55ol/I3EUnWJ/hsKHYloSkzrN0rPZDNnM6Ifc2eG3lQ+vT/ZzVXmynMKBkl49Pw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; Message-ID: <723292e9-5e2c-4899-ab91-80fc992e4597@epam.com> Date: Sun, 3 May 2026 12:44:28 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 04/23] xen/arm: vIOMMU: add generic vIOMMU framework To: Julien Grall , "xen-devel@lists.xenproject.org" Cc: Rahul Singh , Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <8cb4ca97-e605-4416-b532-a8df4816a0ee@xen.org> Content-Language: en-US From: Milan Djokic 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=?utf-8?B?ZGw3UGJ0YW90SGFBNHQrS2pORCtuSzhtUHoxeW5OQ3AzY0FzeG1aQT09?= X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6d4c0a53-257f-4837-4e3c-08dea900f40f X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB9587.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 May 2026 10:44:29.3760 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vO6ovfMCc3B/9OHulBpC+lck9suCoeJcllU8MAq2o2FTmdvmNUfIo7rmqyHevIbr2U6Eym+kXtn3jUT+BZddhQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR03MB9797 X-purgate-ID: tlsNG-c1860d/1777805071-C3370DB1-D35D668D/0/0 X-purgate-type: clean X-purgate-size: 12167 Hi Julien, On 4/14/26 08:15, Julien Grall wrote: > Hi Milan, > > On 31/03/2026 10:52, Milan Djokic wrote: >> From: Rahul Singh >> >> This patch adds basic framework for vIOMMU. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> xen/arch/arm/dom0less-build.c | 2 + >> xen/arch/arm/domain.c | 33 +++++++++++++ >> xen/arch/arm/domain_build.c | 2 + >> xen/arch/arm/include/asm/viommu.h | 70 ++++++++++++++++++++++++++++ >> xen/drivers/passthrough/Kconfig | 5 ++ >> xen/drivers/passthrough/arm/Makefile | 1 + >> xen/drivers/passthrough/arm/viommu.c | 48 +++++++++++++++++++ >> xen/include/public/arch-arm.h | 5 ++ >> xen/include/public/domctl.h | 4 +- >> 9 files changed, 168 insertions(+), 2 deletions(-) >> create mode 100644 xen/arch/arm/include/asm/viommu.h >> create mode 100644 xen/drivers/passthrough/arm/viommu.c >> >> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c >> index 4181c10538..067835e5d0 100644 >> --- a/xen/arch/arm/dom0less-build.c >> +++ b/xen/arch/arm/dom0less-build.c >> @@ -23,6 +23,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> >> @@ -317,6 +318,7 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, >> uint32_t val; >> >> d_cfg->arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE; >> + d_cfg->arch.viommu_type = viommu_get_type(); >> d_cfg->flags |= XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap; >> >> if ( domu_dt_sci_parse(node, d_cfg) ) >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 94b9858ad2..241f87386b 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include "vpci.h" >> @@ -550,6 +551,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> + /* Check config structure padding */ >> + if ( config->arch.pad ) >> + { >> + dprintk(XENLOG_INFO, >> + "Invalid input config, padding must be zero\n"); >> + return -EINVAL; >> + } >> + >> /* Check feature flags */ >> if ( sve_vl_bits > 0 ) >> { >> @@ -626,6 +635,21 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> + if ( !(config->flags & XEN_DOMCTL_CDF_iommu) && >> + config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + { >> + dprintk(XENLOG_INFO, >> + "vIOMMU requested while iommu not enabled for domain\n"); >> + return -EINVAL; >> + } >> + >> + if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + { >> + dprintk(XENLOG_INFO, >> + "vIOMMU type requested not supported by the platform or Xen\n"); >> + return -EINVAL; >> + } >> + >> return sci_domain_sanitise_config(config); >> } >> >> @@ -721,6 +745,9 @@ int arch_domain_create(struct domain *d, >> if ( (rc = sci_domain_init(d, config)) != 0 ) >> goto fail; >> >> + if ( (rc = domain_viommu_init(d, config->arch.viommu_type)) != 0 ) >> + goto fail; >> + >> return 0; >> >> fail: >> @@ -965,6 +992,7 @@ enum { >> PROG_pci = 1, >> PROG_sci, >> PROG_tee, >> + PROG_viommu, > > I am not entirely sure about the position. Is the intention to > relinquish the viommu state *after* the devices are detached? If so, it > would be better to move this call just after 'PROG_pci' and add a > comment indicating the dependency. > Yes, viommu cleanup should be performed after the devices are released. After the rebase, it ended up in the wrong place because new components were added in the meantime. I will update this and add a note for dependecy. >> PROG_xen, >> PROG_page, >> PROG_mapping, >> @@ -1021,6 +1049,11 @@ int domain_relinquish_resources(struct domain *d) >> if (ret ) >> return ret; >> >> + PROGRESS(viommu): >> + ret = viommu_relinquish_resources(d); >> + if (ret ) >> + return ret; >> + >> PROGRESS(xen): >> ret = relinquish_memory(d, &d->xenpage_list); >> if ( ret ) >> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >> index e8795745dd..a51563ee3d 100644 >> --- a/xen/arch/arm/domain_build.c >> +++ b/xen/arch/arm/domain_build.c >> @@ -35,6 +35,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include >> @@ -1946,6 +1947,7 @@ void __init create_dom0(void) >> dom0_cfg.arch.nr_spis = vgic_def_nr_spis(); >> dom0_cfg.arch.tee_type = tee_get_type(); >> dom0_cfg.max_vcpus = dom0_max_vcpus(); >> + dom0_cfg.arch.viommu_type = viommu_get_type(); >> >> if ( iommu_enabled ) >> dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu; >> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/include/asm/viommu.h >> new file mode 100644 >> index 0000000000..4598f543b8 >> --- /dev/null >> +++ b/xen/arch/arm/include/asm/viommu.h >> @@ -0,0 +1,70 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> +#ifndef __ARCH_ARM_VIOMMU_H__ >> +#define __ARCH_ARM_VIOMMU_H__ >> + >> +#ifdef CONFIG_ARM_VIRTUAL_IOMMU >> + >> +#include >> +#include >> +#include >> + >> +struct viommu_ops { >> + /* >> + * Called during domain construction if toolstack requests to enable >> + * vIOMMU support. >> + */ >> + int (*domain_init)(struct domain *d); >> + >> + /* >> + * Called during domain destruction to free resources used by vIOMMU. >> + */ >> + int (*relinquish_resources)(struct domain *d); >> +}; >> + >> +struct viommu_desc { >> + /* vIOMMU domains init/free operations described above. */ >> + const struct viommu_ops *ops; >> + >> + /* >> + * ID of vIOMMU. Corresponds to xen_arch_domainconfig.viommu_type. >> + * Should be one of XEN_DOMCTL_CONFIG_VIOMMU_xxx >> + */ >> + uint16_t viommu_type; > > Below, you define viommu_type as 'uint8_t'. So shouldn't this also be > 'uint8_t'? > Should be uint8_t, will fix it. >> +}; >> + >> +int domain_viommu_init(struct domain *d, uint16_t viommu_type); >> +int viommu_relinquish_resources(struct domain *d); >> +uint16_t viommu_get_type(void); >> + >> +#else >> + >> +static inline uint8_t viommu_get_type(void) >> +{ >> + return XEN_DOMCTL_CONFIG_VIOMMU_NONE; >> +} >> + >> +static inline int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> +{ >> + if ( likely(viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE) ) >> + return 0; >> + >> + return -ENODEV; >> +} >> + >> +static inline int viommu_relinquish_resources(struct domain *d) >> +{ >> + return 0; >> +} >> + >> +#endif /* CONFIG_ARM_VIRTUAL_IOMMU */ >> + >> +#endif /* __ARCH_ARM_VIOMMU_H__ */ >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kconfig >> index b413c33a4c..3c174bc87b 100644 >> --- a/xen/drivers/passthrough/Kconfig >> +++ b/xen/drivers/passthrough/Kconfig >> @@ -35,6 +35,11 @@ config IPMMU_VMSA >> (H3 ES3.0, M3-W+, etc) or Gen4 SoCs which IPMMU hardware supports stage 2 >> translation table format and is able to use CPU's P2M table as is. >> >> +config ARM_VIRTUAL_IOMMU >> + bool "Virtual IOMMU Support (UNSUPPORTED)" if UNSUPPORTED >> + help >> + Support virtual IOMMU infrastructure to implement vIOMMU. >> + >> endif >> >> config AMD_IOMMU >> diff --git a/xen/drivers/passthrough/arm/Makefile b/xen/drivers/passthrough/arm/Makefile >> index c5fb3b58a5..c3783188e3 100644 >> --- a/xen/drivers/passthrough/arm/Makefile >> +++ b/xen/drivers/passthrough/arm/Makefile >> @@ -2,3 +2,4 @@ obj-y += iommu.o iommu_helpers.o iommu_fwspec.o >> obj-$(CONFIG_ARM_SMMU) += smmu.o >> obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o >> obj-$(CONFIG_ARM_SMMU_V3) += smmu-v3.o >> +obj-$(CONFIG_ARM_VIRTUAL_IOMMU) += viommu.o >> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/passthrough/arm/viommu.c >> new file mode 100644 >> index 0000000000..7ab6061e34 >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/viommu.c >> @@ -0,0 +1,48 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> + >> +#include >> + >> +const struct viommu_desc __read_mostly *cur_viommu; > > You don't seem to define 'cur_viommmu' in the header. So shouldn't this > be 'static'? Also, AFAICT, 'cur_viommu' would be set only once at boot. > So rather than using __read_mostly, you probably want to use > '__ro_after_init'. > I will update the 'cur_viommu' properties and add a set function for it. >> + >> +int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> +{ >> + if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + return 0; >> + >> + if ( !cur_viommu ) >> + return -ENODEV; >> + >> + if ( cur_viommu->viommu_type != viommu_type ) >> + return -EINVAL; >> + >> + return cur_viommu->ops->domain_init(d); >> +} >> + >> +int viommu_relinquish_resources(struct domain *d) >> +{ >> + if ( !cur_viommu ) >> + return 0; >> + >> + return cur_viommu->ops->relinquish_resources(d); >> +} >> + >> +uint16_t viommu_get_type(void) >> +{ >> + if ( !cur_viommu ) >> + return XEN_DOMCTL_CONFIG_VIOMMU_NONE; >> + >> + return cur_viommu->viommu_type; >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >> index cd563cf706..d4953d40fd 100644 >> --- a/xen/include/public/arch-arm.h >> +++ b/xen/include/public/arch-arm.h >> @@ -330,6 +330,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >> >> +#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 >> + >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> uint8_t gic_version; >> @@ -355,6 +357,9 @@ struct xen_arch_domainconfig { >> uint32_t clock_frequency; >> /* IN */ >> uint8_t arm_sci_type; >> + /* IN */ >> + uint8_t viommu_type; >> + uint16_t pad; >> }; >> #endif /* __XEN__ || __XEN_TOOLS__ */ >> >> diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h >> index 8f6708c0a7..23124547f3 100644 >> --- a/xen/include/public/domctl.h >> +++ b/xen/include/public/domctl.h >> @@ -30,9 +30,9 @@ >> * fields) don't require a change of the version. >> * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! >> * >> - * Last version bump: Xen 4.19 >> + * Last version bump: Xen 4.22 >> */ >> -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 >> +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 >> >> /* >> * NB. xen_domctl.domain is an IN/OUT parameter for this operation. > > Cheers, > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 11:05:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 11:05:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299330.1573928 (Exim 4.92) (envelope-from ) id 1wJUdD-00086R-2x; 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>> + >> const struct viommu_desc __read_mostly *cur_viommu; >> >> +/* Common function for adding to host_iommu_list */ >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) >> +{ >> + struct host_iommu *iommu_data; >> + >> + iommu_data = xzalloc(struct host_iommu); >> + if ( !iommu_data ) >> + panic("vIOMMU: Cannot allocate memory for host IOMMU data\n"); >> + >> + iommu_data->addr = addr; >> + iommu_data->size = size; >> + iommu_data->dt_node = node; >> + iommu_data->irq = platform_get_irq(node, 0); >> + if ( iommu_data->irq < 0 ) >> + { >> + gdprintk(XENLOG_ERR, >> + "vIOMMU: Cannot find a valid IOMMU irq\n"); > > We need to free iommu_data here > Yes, will fix this. >> + return; >> + } >> + >> + printk("vIOMMU: Found IOMMU @0x%"PRIx64"\n", addr); >> + >> + list_add_tail(&iommu_data->entry, &host_iommu_list); >> +} >> + >> int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> { >> if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> new file mode 100644 >> index 0000000000..6b4009e5ef >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -0,0 +1,124 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +/* Struct to hold the vIOMMU ops and vIOMMU type */ >> +extern const struct viommu_desc __read_mostly *cur_viommu; >> + >> +struct virt_smmu { >> + struct domain *d; >> + struct list_head viommu_list; >> +}; >> + >> +static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >> + register_t r, void *priv) >> +{ >> + return IO_HANDLED; >> +} >> + >> +static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> + register_t *r, void *priv) >> +{ >> + return IO_HANDLED; > > If this has to be treated for now as RAZ, being a dummy implementation, > I would add *r = 0; > As suggested in later comments, I will insert BUG_ON("unimplemented") for functions which are not complete at this point. >> +} >> + >> +static const struct mmio_handler_ops vsmmuv3_mmio_handler = { >> + .read = vsmmuv3_mmio_read, >> + .write = vsmmuv3_mmio_write, >> +}; >> + >> +static int vsmmuv3_init_single(struct domain *d, paddr_t addr, paddr_t size) >> +{ >> + struct virt_smmu *smmu; >> + >> + smmu = xzalloc(struct virt_smmu); >> + if ( !smmu ) >> + return -ENOMEM; >> + >> + smmu->d = d; >> + >> + register_mmio_handler(d, &vsmmuv3_mmio_handler, addr, size, smmu); >> + >> + /* Register the vIOMMU to be able to clean it up later. */ >> + list_add_tail(&smmu->viommu_list, &d->arch.viommu_list); >> + >> + return 0; >> +} >> + >> +int domain_vsmmuv3_init(struct domain *d) >> +{ >> + int ret; >> + INIT_LIST_HEAD(&d->arch.viommu_list); >> + >> + if ( is_hardware_domain(d) ) >> + { >> + struct host_iommu *hw_iommu; >> + >> + list_for_each_entry(hw_iommu, &host_iommu_list, entry) >> + { >> + ret = vsmmuv3_init_single(d, hw_iommu->addr, hw_iommu->size); >> + if ( ret ) >> + return ret; >> + } >> + } >> + else >> + { >> + ret = vsmmuv3_init_single(d, GUEST_VSMMUV3_BASE, GUEST_VSMMUV3_SIZE); >> + if ( ret ) >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> +int vsmmuv3_relinquish_resources(struct domain *d) >> +{ >> + struct virt_smmu *pos, *temp; >> + >> + /* Cope with unitialized vIOMMU */ > > Typo s/unitialized/uninitialized/ > > > Cheers, > Luca > > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 18:38:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 18:38:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299396.1573936 (Exim 4.92) (envelope-from ) id 1wJbhh-0002sd-76; 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For dom0, 1-1 mapping will be established between vIOMMU in dom0 >> and physical IOMMU. >> >> For domUs, the 1-N mapping will be established between domU and physical >> IOMMUs. A new area has been reserved in the arm guest physical map at >> which the emulated vIOMMU node is created in the device tree. >> >> Also set the vIOMMU type to vSMMUv3 to enable vIOMMU framework to call >> vSMMUv3 domain creation/destroy functions. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> xen/arch/arm/domain.c | 3 +- >> xen/arch/arm/include/asm/domain.h | 4 + >> xen/arch/arm/include/asm/viommu.h | 20 ++++ >> xen/drivers/passthrough/Kconfig | 8 ++ >> xen/drivers/passthrough/arm/Makefile | 1 + >> xen/drivers/passthrough/arm/smmu-v3.c | 7 ++ >> xen/drivers/passthrough/arm/viommu.c | 30 ++++++ >> xen/drivers/passthrough/arm/vsmmu-v3.c | 124 +++++++++++++++++++++++++ >> xen/drivers/passthrough/arm/vsmmu-v3.h | 20 ++++ >> xen/include/public/arch-arm.h | 7 +- >> 10 files changed, 222 insertions(+), 2 deletions(-) >> create mode 100644 xen/drivers/passthrough/arm/vsmmu-v3.c >> create mode 100644 xen/drivers/passthrough/arm/vsmmu-v3.h >> >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 241f87386b..b982d79b3b 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -643,7 +643,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> - if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE && >> + config->arch.viommu_type != viommu_get_type() ) >> { >> dprintk(XENLOG_INFO, >> "vIOMMU type requested not supported by the platform or Xen\n"); >> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h >> index 758ad807e4..61108d0068 100644 >> --- a/xen/arch/arm/include/asm/domain.h >> +++ b/xen/arch/arm/include/asm/domain.h >> @@ -126,6 +126,10 @@ struct arch_domain >> void *sci_data; >> #endif >> >> +#ifdef CONFIG_ARM_VIRTUAL_IOMMU >> + struct list_head viommu_list; /* List of virtual IOMMUs */ >> +#endif >> + >> } __cacheline_aligned; >> >> struct arch_vcpu >> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/include/asm/viommu.h >> index 4598f543b8..2a6742de73 100644 >> --- a/xen/arch/arm/include/asm/viommu.h >> +++ b/xen/arch/arm/include/asm/viommu.h >> @@ -5,9 +5,21 @@ >> #ifdef CONFIG_ARM_VIRTUAL_IOMMU >> >> #include >> +#include >> #include >> #include >> >> +extern struct list_head host_iommu_list; >> + >> +/* data structure for each hardware IOMMU */ >> +struct host_iommu { >> + struct list_head entry; >> + const struct dt_device_node *dt_node; >> + paddr_t addr; >> + paddr_t size; >> + uint32_t irq; > > You don't seem to use ``irq`` in this patch. What is this meant to be > used for? > This field will be used for vIOMMU event queue creation for the hardware domain in a later patch (xen/arm: vsmmuv3: Add support for event queue and global error). The emulated IRQ and MMIO region for the hardware domain vIOMMU will match those of the host IOMMU. >> +}; >> + >> struct viommu_ops { >> /* >> * Called during domain construction if toolstack requests to enable >> @@ -35,6 +47,8 @@ struct viommu_desc { >> int domain_viommu_init(struct domain *d, uint16_t viommu_type); >> int viommu_relinquish_resources(struct domain *d); >> uint16_t viommu_get_type(void); >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node); >> >> #else >> >> @@ -56,6 +70,12 @@ static inline int viommu_relinquish_resources(struct domain *d) >> return 0; >> } >> >> +static inline void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) >> +{ >> + return; >> +} >> + >> #endif /* CONFIG_ARM_VIRTUAL_IOMMU */ >> >> #endif /* __ARCH_ARM_VIOMMU_H__ */ >> diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kconfig >> index 3c174bc87b..9c48e7415e 100644 >> --- a/xen/drivers/passthrough/Kconfig >> +++ b/xen/drivers/passthrough/Kconfig >> @@ -40,6 +40,14 @@ config ARM_VIRTUAL_IOMMU >> help >> Support virtual IOMMU infrastructure to implement vIOMMU. >> >> +config VIRTUAL_ARM_SMMU_V3 >> + bool "ARM Ltd. Virtual SMMUv3 Support (UNSUPPORTED)" >> + depends on ARM_SMMU_V3 && ARM_VIRTUAL_IOMMU >> + help >> + Support for implementations of the virtual ARM System MMU architecture >> + version 3. Virtual SMMUv3 is unsupported feature and should not be used >> + in production. >> + >> endif >> >> config AMD_IOMMU >> diff --git a/xen/drivers/passthrough/arm/Makefile b/xen/drivers/passthrough/arm/Makefile >> index c3783188e3..c8f0a5f802 100644 >> --- a/xen/drivers/passthrough/arm/Makefile >> +++ b/xen/drivers/passthrough/arm/Makefile >> @@ -3,3 +3,4 @@ obj-$(CONFIG_ARM_SMMU) += smmu.o >> obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o >> obj-$(CONFIG_ARM_SMMU_V3) += smmu-v3.o >> obj-$(CONFIG_ARM_VIRTUAL_IOMMU) += viommu.o >> +obj-$(CONFIG_VIRTUAL_ARM_SMMU_V3) += vsmmu-v3.o >> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c >> index 19e55b6c9b..87612df21d 100644 >> --- a/xen/drivers/passthrough/arm/smmu-v3.c >> +++ b/xen/drivers/passthrough/arm/smmu-v3.c >> @@ -93,6 +93,7 @@ >> #include >> >> #include "smmu-v3.h" >> +#include "vsmmu-v3.h" >> >> #define ARM_SMMU_VTCR_SH_IS 3 >> #define ARM_SMMU_VTCR_RGN_WBWA 1 >> @@ -2727,6 +2728,9 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) >> list_add(&smmu->devices, &arm_smmu_devices); >> spin_unlock(&arm_smmu_devices_lock); >> >> + /* Add to host IOMMU list to initialize vIOMMU for dom0 */ > > The indentation looks odd. Is this correctly aligned? > Yes, it's wrong, will fix it. >> + add_to_host_iommu_list(ioaddr, iosize, dev_to_dt(pdev)); >> + >> return 0; >> >> >> @@ -3058,6 +3062,9 @@ static __init int arm_smmu_dt_init(struct dt_device_node *dev, >> >> platform_features &= smmu->features; >> >> + /* Set vIOMMU type to SMMUv3 */ >> + vsmmuv3_set_type(); >> + >> return 0; >> } >> >> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/passthrough/arm/viommu.c >> index 7ab6061e34..53ae46349a 100644 >> --- a/xen/drivers/passthrough/arm/viommu.c >> +++ b/xen/drivers/passthrough/arm/viommu.c >> @@ -2,12 +2,42 @@ >> >> #include >> #include >> +#include >> #include >> >> #include >> >> +/* List of all host IOMMUs */ >> +LIST_HEAD(host_iommu_list); > > I don't quite follow why this is part of the common code. That said, why > do we need to register the host IOMMU? Wouldn't it be simpler to go > through the list of pIOMMU in the vSMMU v3 implementation? > ``host_iommu_list`` is part of the generic code to allow reuse for other IOMMU types in the future. For example, it can be reused for Renesas IPMMU, rather than duplicating it. As for why we need to register IOMMUs, it seems more suitable to create this list at initialization and add IOMMUs with the necessary properties when the pIOMMU is probed. We can't reuse the same list from the SMMU driver because vIOMMU needs raw DT properties (address, size), which I don't think we can extract from the host driver list. >> + >> const struct viommu_desc __read_mostly *cur_viommu; >> >> +/* Common function for adding to host_iommu_list */ >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) > > Is this supposed to only be called during __init? If so, this will help > to justify the ... > >> +{ >> + struct host_iommu *iommu_data; >> + >> + iommu_data = xzalloc(struct host_iommu); >> + if ( !iommu_data ) >> + panic("vIOMMU: Cannot allocate memory for host IOMMU data\n"); > > ... panic(). If not, then this function needs to return an error. > Yes, this is called during init, on pIOMMU driver probe (arm_smmu_device_probe()) >> + >> + iommu_data->addr = addr; >> + iommu_data->size = size; >> + iommu_data->dt_node = node; >> + iommu_data->irq = platform_get_irq(node, 0); >> + if ( iommu_data->irq < 0 ) >> + { >> + gdprintk(XENLOG_ERR, >> + "vIOMMU: Cannot find a valid IOMMU irq\n"); > > Shouldn't you free the allocated memory? That said, why is it ok to > ignore the vIOMMU in this case? > Yes, this is missing. We ignore the host IOMMU with an invalid IRQ because event queue emulation won't work in this case. >> + return; >> + } >> + >> + printk("vIOMMU: Found IOMMU @0x%"PRIx64"\n", addr); >> + >> + list_add_tail(&iommu_data->entry, &host_iommu_list); >> +} >> + >> int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> { >> if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> new file mode 100644 >> index 0000000000..6b4009e5ef >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -0,0 +1,124 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +/* Struct to hold the vIOMMU ops and vIOMMU type */ >> +extern const struct viommu_desc __read_mostly *cur_viommu; > > Why is this defined in the C file? Shouldn't this be defined in > ``viomum.h``? That said, looking at the use, I think we want to > introduce a helper to set the cur_viommu and not export ``cur_viommu``. > I will introduce a helper, set function for ``cur_viommu``. After this is done, there's no need to move its definition to ``viommu.h``, since it should remain private to the vIOMMU code. >> + >> +struct virt_smmu { >> + struct domain *d; >> + struct list_head viommu_list; >> +}; >> + >> +static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >> + register_t r, void *priv) >> +{ >> + return IO_HANDLED; >> +} >> + >> +static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> + register_t *r, void *priv) >> +{ >> + return IO_HANDLED; >> +} > > I undertand that both helpers are meant to be updated in a later patch. > However, I think it makes quite difficult to know whether the code is > complete by the end of the series. I would strongly recommend adding > 'BUG_ON("unimplemented");' so we can easily grep whether there is > anything missing by the end. > Sure, I'll add BUG_ON() for the unimplemented functions. >> + >> +static const struct mmio_handler_ops vsmmuv3_mmio_handler = { >> + .read = vsmmuv3_mmio_read, >> + .write = vsmmuv3_mmio_write, >> +}; >> + >> +static int vsmmuv3_init_single(struct domain *d, paddr_t addr, paddr_t size) >> +{ >> + struct virt_smmu *smmu; >> + >> + smmu = xzalloc(struct virt_smmu); >> + if ( !smmu ) >> + return -ENOMEM; >> + >> + smmu->d = d; >> + >> + register_mmio_handler(d, &vsmmuv3_mmio_handler, addr, size, smmu); > > I can't seem to find a place where the number of handler supported is > incremented (see domain_io_init()) for the vIOMMU. Are you sure we > always have enough space today? > I'll fix this. The handler count should be incremented during domain creation if vIOMMU is enabled. >> + >> + /* Register the vIOMMU to be able to clean it up later. */ >> + list_add_tail(&smmu->viommu_list, &d->arch.viommu_list); >> + >> + return 0; >> +} >> + >> +int domain_vsmmuv3_init(struct domain *d) >> +{ >> + int ret; > > Coding style: newline missing. > >> + INIT_LIST_HEAD(&d->arch.viommu_list); >> + >> + if ( is_hardware_domain(d) ) >> + { >> + struct host_iommu *hw_iommu; >> + >> + list_for_each_entry(hw_iommu, &host_iommu_list, entry) >> + { >> + ret = vsmmuv3_init_single(d, hw_iommu->addr, hw_iommu->size); >> + if ( ret ) >> + return ret; >> + } >> + } >> + else >> + { >> + ret = vsmmuv3_init_single(d, GUEST_VSMMUV3_BASE, GUEST_VSMMUV3_SIZE); >> + if ( ret ) >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> +int vsmmuv3_relinquish_resources(struct domain *d) >> +{ >> + struct virt_smmu *pos, *temp; >> + >> + /* Cope with unitialized vIOMMU */ >> + if ( list_head_is_null(&d->arch.viommu_list) ) >> + return 0; >> + >> + list_for_each_entry_safe(pos, temp, &d->arch.viommu_list, viommu_list ) >> + { >> + list_del(&pos->viommu_list); >> + xfree(pos); >> + } >> + >> + return 0; >> +} >> + >> +static const struct viommu_ops vsmmuv3_ops = { >> + .domain_init = domain_vsmmuv3_init, >> + .relinquish_resources = vsmmuv3_relinquish_resources, >> +}; >> + >> +static const struct viommu_desc vsmmuv3_desc = { >> + .ops = &vsmmuv3_ops, >> + .viommu_type = XEN_DOMCTL_CONFIG_VIOMMU_SMMUV3, >> +}; >> + >> +void __init vsmmuv3_set_type(void) >> +{ >> + const struct viommu_desc *desc = &vsmmuv3_desc; >> + >> + if ( cur_viommu && (cur_viommu != desc) ) >> + { >> + printk("WARNING: Cannot set vIOMMU, already set to a different value\n"); >> + return; >> + } >> + >> + cur_viommu = desc; >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.h b/xen/drivers/passthrough/arm/vsmmu-v3.h >> new file mode 100644 >> index 0000000000..e11f85b431 >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.h >> @@ -0,0 +1,20 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> +#ifndef __ARCH_ARM_VSMMU_V3_H__ >> +#define __ARCH_ARM_VSMMU_V3_H__ >> + >> +#include >> + >> +#ifdef CONFIG_VIRTUAL_ARM_SMMU_V3 >> + >> +void vsmmuv3_set_type(void); >> + >> +#else >> + >> +static inline void vsmmuv3_set_type(void) >> +{ >> + return; >> +} >> + >> +#endif /* CONFIG_VIRTUAL_ARM_SMMU_V3 */ >> + >> +#endif /* __ARCH_ARM_VSMMU_V3_H__ */ >> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >> index d4953d40fd..ebac02ed63 100644 >> --- a/xen/include/public/arch-arm.h >> +++ b/xen/include/public/arch-arm.h >> @@ -330,7 +330,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >> >> -#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 >> +#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 > > I am generally against trying to align values because this is just > introducing unnecessary churn in the code. > >> +#define XEN_DOMCTL_CONFIG_VIOMMU_SMMUV3 1 >> >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> @@ -456,6 +457,10 @@ typedef uint64_t xen_callback_t; >> #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ >> #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000) >> >> +/* vsmmuv3 ITS mappings */ > > What is ITS stand for in this context? > This is wrong, should be MMIO mappings instead of ITS. I'll fix this. >> +#define GUEST_VSMMUV3_BASE xen_mk_ullong(0x04040000) >> +#define GUEST_VSMMUV3_SIZE xen_mk_ullong(0x00040000) > > If I am not mistaken, you are reserving 256KiB. However, looking at the > SMMU spec (section 6.1, ARM IHI 0070 H.a), the minimum is 128 KiB. Are > you intending to expose additional features? > You're correct, there are no additional features exposed. The size was chosen during the early implementation, but I don't think we need to reserve more than the architectural minimum at this point. >> + >> /* >> * 256 MB is reserved for VPCI configuration space based on calculation >> * 256 buses x 32 devices x 8 functions x 4 KB = 256 MB > > Cheers, > Best regards, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 21:21:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 21:21:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299408.1573945 (Exim 4.92) (envelope-from ) id 1wJeFb-0005r8-DQ; Sun, 03 May 2026 21:21:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299408.1573945; Sun, 03 May 2026 21:21:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJeFb-0005r1-Ab; Sun, 03 May 2026 21:21:19 +0000 Received: by outflank-mailman (input) for mailman id 1299408; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="aTnhuwifSrVovotV" Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-d62444/1777843275-BEE63FF4-44483B73/0/0 X-purgate-type: clean X-purgate-size: 2020 --aTnhuwifSrVovotV Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Sun, 3 May 2026 23:21:10 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH test-artifacts v3 02/13] Switch Linux builds to use Alpine 3.22 container On Wed, Apr 01, 2026 at 08:58:04AM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > On Wed, Apr 01, 2026 at 08:46:02AM +0200, Orzel, Michal wrote: > > Why not 3.23 if it's already there? >=20 > Because it wasn't yet when I prepared this patch series :) >=20 > I can update again and see if any other changes are needed with 3.23. > Other patches are independent of this change. So, Linux 6.6.56 fails to build there: https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/jobs/141912= 60643 This is fixed in Linux 6.6.95, but I can't just drop 6.6.56 as stable branches still use it. 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Sun, 03 May 2026 22:14:09 -0700 (PDT) Message-ID: <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Date: Mon, 4 May 2026 07:14:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Andrew Cooper Cc: Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777871650-16E67C48-E2DFA8EB/0/0 X-purgate-type: clean X-purgate-size: 1428 On 02.05.2026 00:21, Andrew Cooper wrote: > On 01/05/2026 10:44 pm, Stefano Stabellini wrote: >> On Fri, 1 May 2026, Andrew Cooper wrote: >>> Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] >>> and one is in the VMCB. >>> >>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>> loads and saves the guest CR2 across VMRUN/VMExit. >>> >>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>> migration is cooperative and not done from the #PF handler, this also goes >>> unoticed by guests. >>> >>> It also means that an emulated MOV-from-CR2 reads a stale value. >>> >>> Reported-by: Stefano Stabellini >>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>> Signed-off-by: Andrew Cooper >> Tested-by: Stefano Stabellini > > Thanks, sadly I made the mistake of extending my XTF PoC for this. > > There are also bugs on the emulated MOV-to-CR2 side, and they're far > harder to untangle. Any slightly closer details as to what? > This patch probably wants to go in in this form, accepting that there > are issues still to be addressed on the other side. I agree: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 05:17:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:17:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299434.1573963 (Exim 4.92) (envelope-from ) id 1wJlgs-0003uc-M3; Mon, 04 May 2026 05:17:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299434.1573963; Mon, 04 May 2026 05:17:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJlgs-0003uV-JN; Mon, 04 May 2026 05:17:58 +0000 Received: by outflank-mailman (input) for mailman id 1299434; Mon, 04 May 2026 05:17:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJlgr-0003uN-2m for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:17:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJlgq-00ETi1-Ez for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:17:56 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f82be6-5cb7-0a2a0a5109dd-0a2a4503b72c-48 for ; Mon, 04 May 2026 07:17:56 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f82c04-672d-0a2a45030019-d1558029b1b2-3 for ; Mon, 04 May 2026 07:17:56 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4893940bb5eso18379465e9.3 for ; Sun, 03 May 2026 22:17:56 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <83b1e26a-cd17-4f64-ae82-dbf56f95b4ad@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777871876-2BD6B938-9EF1472B/0/0 X-purgate-type: clean X-purgate-size: 2095 On 29.04.2026 11:44, Andrew Cooper wrote: > On 28/04/2026 7:19 pm, Dmytro Prokopchuk1 wrote: >> The statement 'return ERR_PTR(-ENOENT);' on the final line of the >> function 'hypfs_get_entry_rel()' is unreachable because the logic within >> the infinite loop 'for (;;)' provides all possible exit paths for the >> function. So there is no execution path to exit the loop and reach the >> final that statement. >> >> This unreachable code violates MISRA C Rule 2.1 which states: "A project >> shall not contain unreachable code". >> >> To fix that and potential compilers "control reaches end of non-void >> function" warning, mark the code path as unreachable using macro >> 'ASSERT_UNREACHABLE()'. >> >> Signed-off-by: Dmytro Prokopchuk >> --- >> Changes in v2: >> - add ASSERT_UNREACHABLE() before the final return statement instead of removing it >> Test CI pipeline: >> https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2485661910 >> Link to v1: >> https://patchew.org/Xen/341811ced2943fb79d0235c27781c564c7bdaf02.1775749146.git.dmytro._5Fprokopchuk1@epam.com/ >> --- >> xen/common/hypfs.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/xen/common/hypfs.c b/xen/common/hypfs.c >> index cdf4ee0171..02fb234568 100644 >> --- a/xen/common/hypfs.c >> +++ b/xen/common/hypfs.c >> @@ -348,6 +348,7 @@ static struct hypfs_entry *hypfs_get_entry_rel(struct hypfs_entry_dir *dir, >> dir = container_of(entry, struct hypfs_entry_dir, e); >> } >> >> + ASSERT_UNREACHABLE(); >> return ERR_PTR(-ENOENT); >> } >> > > No.  This is absurd. Why? > Not to mention that you are *definitely* not fixing the stated MISRA rule. Correct. It is instead deviating that rule for this code instance. I'm pretty sure we have a few other similar pieces of code elsewhere. In any event - your reply isn't really actionable. If you want things done differently, then please make a concrete suggestion. Otherwise, in a couple of days, I'll commit this with Jürgen's R-b. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777872452-2BB6B3FF-AC9BD6F0/0/0 X-purgate-type: clean X-purgate-size: 4594 On 29.04.2026 09:22, Bernhard Kaindl wrote: > Code blocks in the RFC rules can be converted as C syntax-highlighted > pretty pieces of code using `.. code:: C` inline elements: > https://docutils.sourceforge.io/docs/ref/rst/directives.html#code > > For reference, the current formatting used are 'Indented Literal Blocks': > https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#toc-entry-23 > > In this example, docs/misra/rules.rst, line 128 starts an Indented > Literal Block by ending the paragraph with "violations::" > (note the :: at then end of the paragraph which is enables it): > > - Functions that are no-return due to calls to the `ASSERT_UNREACHABLE()` > macro in debug build configurations are not considered violations:: > > static inline bool > arch_vcpu_ioreq_completion(enum vio_completion completion) > { > ASSERT_UNREACHABLE(); > return false; > } > > Format such code blocks as C code blocks and apply ``function()`` around > functions to make them inline linterals for monospace formatting. Nit: literal > --- a/docs/misra/rules.rst > +++ b/docs/misra/rules.rst > @@ -115,20 +115,29 @@ maintainers if you want to suggest a change. > - Required > - A project shall not contain unreachable code > - The following are allowed: > - - Invariantly constant conditions, e.g. if(IS_ENABLED(CONFIG_HVM)) { S; } > + - Invariantly constant conditions, e.g. > + > + .. code:: C > + > + if ( IS_ENABLED(CONFIG_HVM) ) { > + S; > + } If already you reformat like this, then please fully to proper Xen style. > - Switch with a controlling value statically determined not to > match one or more case statements > - Functions that are intended to be referenced only from > - assembly code (e.g. 'do_trap_fiq') > - - asm-offsets.c, as they are not linked deliberately, because > + assembly code (e.g. ``do_trap_fiq``) > + - ``asm-offsets.c``, as they are not linked deliberately, because This is a file name, not code? > they are used to generate definitions for asm modules > - Declarations without initializer are safe, as they are not > executed > - - Functions that are no-return due to calls to the `ASSERT_UNREACHABLE()` > - macro in debug build configurations are not considered violations:: > + - Functions that are no-return due to calls to the ``ASSERT_UNREACHABLE()`` > + macro in debug build configurations are not considered violations: > + > + .. code:: C > > static inline bool > - arch_vcpu_ioreq_completion(enum vio_completion completion) > + arch_vcpu_ioreq_completion(int c) I don't agree with making a change making an example not match actual code. If you truly want to abstract this (to shorten the line) then please also change the function name. > @@ -207,16 +216,20 @@ maintainers if you want to suggest a change. > > Clashes between bitops functions and macro names are allowed > because they are used for input validation and error handling. > - Example:: > + Example: > > - static inline void set_bit(int nr, volatile void *addr) > + .. code:: C > + > + static inline void set_bit(int nr, volatile void *a) > { > - asm volatile ( "lock btsl %1,%0" > - : "+m" (ADDR) : "Ir" (nr) : "memory"); > + asm volatile ( "lock btsl %1,%0 " Why the new trailing blank in the string literal? > + : "+m" (a) > + : "Ir" (nr) : "memory"); Where you want to add a blank while re-flowing is before the parenthesis here. > } > - #define set_bit(nr, addr) ({ \ > - if ( bitop_bad_size(addr) ) __bitop_bad_size(); \ > - set_bit(nr, addr); \ > + > + #define set_bit(nr, addr) ({ \ > + if ( bitop_bad_size(addr) ) __bitop_bad_size();\ There wants to be a blank before the semicolon. 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Sun, 03 May 2026 22:30:14 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 07:30:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777872615-82F6E161-4F5ADBE9/0/0 X-purgate-type: clean X-purgate-size: 1217 On 29.04.2026 12:08, Luca Fancellu wrote: >> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >> paddr_t gpa, >> void *buf, >> - unsigned int len) >> + unsigned long len) >> { > > Now that we do this, potentially we could have truncation in the places where we store its return value > inside an int: Those would suffer from truncation before and after this change, wouldn't they? Just that where the truncation occurs does move. I.e. if necessary they would want dealing with separately. Jan > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/kernel.c;h=7544fd50a20f08b5ba31cad7b94925112fdee956;hb=refs/heads/staging#l131 > > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/common/device-tree/domain-build.c;h=c51520ebadf9950311f6c071e7e07042c7076a27;hb=refs/heads/staging#l442 > > Could you check and let me know if I’m correct or not? > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Mon May 04 05:38:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:38:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299459.1573991 (Exim 4.92) (envelope-from ) id 1wJm0E-0007vN-RI; Mon, 04 May 2026 05:37:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299459.1573991; Mon, 04 May 2026 05:37:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm0E-0007vG-Ne; Mon, 04 May 2026 05:37:58 +0000 Received: by outflank-mailman (input) for mailman id 1299459; Mon, 04 May 2026 05:37:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm0C-0007vA-WF for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:37:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm0B-000epT-UT for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:37:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f830a9-2eae-0a2a0a5409dd-0a2a4506a0b2-28 for ; Mon, 04 May 2026 07:37:55 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f830b3-7371-0a2a45060019-d155802fbded-3 for ; Mon, 04 May 2026 07:37:55 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488b0046078so28196235e9.1 for ; Sun, 03 May 2026 22:37:55 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1777873075-CFD7AD75-BD6035A0/0/0 X-purgate-type: clean X-purgate-size: 4201 On 23.04.2026 12:12, Mykyta Poturai wrote: > On 4/21/26 17:43, Jan Beulich wrote: >> On 09.04.2026 16:01, Mykyta Poturai wrote: >>> From: Stewart Hildebrand >>> >>> This code is expected to only be used by privileged domains, >>> unprivileged domains should not get access to the SR-IOV capability. >>> >>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>> for possible changes in the system page size register. Also force VFs to >>> always use emulated reads for command register, this is needed to >>> prevent some drivers accidentally unmapping BARs. >> >> This apparently refers to the change to vpci_init_header(). Writes are >> already intercepted. How would a read lead to accidental BAR unmap? Even >> for writes I don't see how a VF driver could accidentally unmap BARs, as >> the memory decode bit there is hardwired to 0. >> >>> Discovery of VFs is >>> done by Dom0, which must register them with Xen. >> >> If we intercept control register writes, why would we still require >> Dom0 to report the VFs that appear? >> > > Sorry, I don't understand this question. You specifically requested this > to be done this way in V2. Quoting your reply from V2 below. > > > Aren't you effectively busy-waiting for these 100ms, by simply > returning "true" > > from vpci_process_pending() until the time has passed? This imo is a > no-go. You > > want to set a timer and put the vCPU to sleep, to wake it up again > when the > > timer has expired. That'll then eliminate the need for the > not-so-nice patch 4. > > > Question is whether we need to actually go this far (right away). I > expect you > > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > > domain, can't we trust it to set things up correctly, just like we > trust it in > > a number of other aspects? How's any of this related to the question I raised here, or your reply thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. Why still demand Dom0 to report them then? >>> +static int map_vfs(const struct pci_dev *pf_pdev, uint16_t cmd) >>> +{ >>> + struct pci_dev *vf_pdev; >>> + int rc; >>> + >>> + ASSERT(rw_is_write_locked(&pf_pdev->domain->pci_lock)); >>> + >>> + list_for_each_entry(vf_pdev, &pf_pdev->vf_list, vf_list) >>> + { >>> + rc = vpci_modify_bars(vf_pdev, cmd, false); >>> + if ( rc ) >>> + { >>> + gprintk(XENLOG_ERR, "failed to %s VF %pp: %d\n", >>> + (cmd & PCI_COMMAND_MEMORY) ? "map" : "unmap", >>> + &vf_pdev->sbdf, rc); >>> + return rc; >>> + } >>> + >>> + vf_pdev->vpci->header.guest_cmd &= ~PCI_COMMAND_MEMORY; >>> + vf_pdev->vpci->header.guest_cmd |= (cmd & PCI_COMMAND_MEMORY); >> >> As mentioned elsewhere as well, this bit is supposed to be 0 for VFs. > > There are some devices that expose VFs with the same VID/DID as in the > PF, causing Linux to use normal driver for them and threat them like > normal devices. At some point, those normal drivers try to do a > read-modify-update of the command register and end up writing 0 to > PCI_COMMAND_MEMORY, causing cmd_write to unmap the BARS of that device. > I am not sure, maybe it would be better to just ignore cmd writes for VFs? No. We should treat r/o bits as r/o (which for this bit implies it not controlling BAR mapping). >>> + sriov_pos = pci_find_ext_capability(pf_pdev, PCI_EXT_CAP_ID_SRIOV); >>> + ctrl = pci_conf_read16(pf_pdev->sbdf, sriov_pos + PCI_SRIOV_CTRL); >>> + >>> + if ( (pf_pdev->domain == vf_pdev->domain) && (ctrl & PCI_SRIOV_CTRL_MSE) ) >>> + { >>> + rc = vpci_modify_bars(vf_pdev, PCI_COMMAND_MEMORY, false); >> >> Doesn't VF enable also need to be set for the BARs to be mapped? > > I don't think so. Enabling memory space logically maps very well to > mapping memory to the guest. I don’t see any benefit of also requiring > VFE bit here. Iirc the spec is quite explicit in this regard. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777873169-4576D8B7-FED8BDD7/10/73395122804 X-purgate-type: spam X-purgate-size: 1127 On 23.04.2026 15:47, Oleksii Kurochko wrote: > On 4/21/26 11:46 AM, Jan Beulich wrote: >> On 10.04.2026 17:54, Oleksii Kurochko wrote: >>> common/device-tree/domain-build.c uses p2m_gpa_bits to determine the >>> upper bound of the GPA space when searching for unused regions, so it >>> must be defined when CONFIG_DOMAIN_BUILD_HELPERS=y. >>> >>> The variable is initialised to PADDR_BITS and narrowed in p2m_init() to >>> the GPA width of the selected G-stage mode, allowing an external entity >>> (e.g. an IOMMU) to restrict it further if needed. >>> >>> p2m_gpa_bits is a global rather than a per-domain value, which is >>> acceptable for now because all domains are required to use the same >>> G-stage MMU mode, as dom0less common code allocates it per all >>> domains. >>> >>> Signed-off-by: Oleksii Kurochko >> >> Pretty hesitantly: > > Could you please clarify what specifically you don't like here? As per earlier comments, this not being per-guest, and implications thereof. Jan >> Acked-by: Jan Beulich > > Thanks. > > ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 04 05:41:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:41:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299475.1574007 (Exim 4.92) (envelope-from ) id 1wJm3N-0001Rc-EM; Mon, 04 May 2026 05:41:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299475.1574007; Mon, 04 May 2026 05:41:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm3N-0001RV-BW; Mon, 04 May 2026 05:41:13 +0000 Received: by outflank-mailman (input) for mailman id 1299475; Mon, 04 May 2026 05:41:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm3L-0001RN-S9 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:41:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm3L-000fVS-87 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:41:11 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f83177-2eae-0a2a0a5409dd-0a2a450cebae-0 for ; Mon, 04 May 2026 07:41:11 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f83177-62f1-0a2a450c0019-d155dd29ed0b-3 for ; Mon, 04 May 2026 07:41:11 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44b330c5cc6so1267469f8f.1 for ; Sun, 03 May 2026 22:41:11 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777873271-6D96DCF5-CAB26606/0/0 X-purgate-type: clean X-purgate-size: 2692 On 22.04.2026 16:35, Bernhard Kaindl wrote: > > Jan Beulich wrote: > >> As to the rename to deduct_global_claims(): With that, wouldn't its 2nd >> parameter then better also change to "deduction"? Furthermore, "global" in >> the name is ambiguous: It may mean "not per-node", but it may also mean >> "not per-domain". The v4 name didn't have such an issue. > > I see the point about 'global'. While the struct domain argument provides > context, the term is indeed too generic. > > In this logic, 'global' was intended to refer to the opposite of > node-specific claims. While the legacy codebase uses 'no-node' or > NUMA_NO_NODE as a sentinel, I find those terms ambiguous for this new > logic; they often imply a "missing" assignment rather than an explicit > "any-node" policy. > > 'Node-agnostic' better describes the architectural intent: that these > claims are valid regardless of node locality. To resolve the ambiguity, > I will replace 'global' with 'node-agnostic' across the board (design > documentation, code, and tests). > > Specifically, I will: > > Rename the function to deduct_node_agnostic_claims(). Or deduct_host_claims() (short for deduct_host_wide_claims())? Jan > Update the second parameter to 'deduction' for consistency. > > Update the function comment to explicitly define the scope. > > /* Deduct from the domain's node-agnostic (non-per-node) claims pool */ > static unsigned long deduct_node_agnostic_claims(struct domain *d, > unsigned long deduction) > > While 'global' was shorter, 'node-agnostic' is much more descriptive of > the actual logic and the node-locality (or lack thereof) being addressed, > avoiding the potential confusion associated with 'no-node'. > > For consistency, the corresponding renames across the series will be: > > +--------------------------------+---------------------------------------+ > | Original Term | New Term | > +--------------------------------+---------------------------------------+ > | "global claims" | "node-agnostic claims" | > | d->global_claims | d->node_agnostic_claims | > | XEN_DOMCTL_CLAIM_MEMORY_GLOBAL | XEN_DOMCTL_CLAIM_MEMORY_NODE_AGNOSTIC | > | deduct_global_claims() | deduct_node_agnostic_claims() | > +--------------------------------+---------------------------------------+ > > I believe these changes result in less ambiguous language universally. > Jan, could you Ack these renames for the next version of the series? > > Bernhard > From xen-devel-bounces@lists.xenproject.org Mon May 04 05:42:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:42:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299484.1574017 (Exim 4.92) (envelope-from ) id 1wJm4R-00020N-QO; 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AFNElJ9N0E4VcAyaVoSdH0UJLfqA033l3/er1LFumulToMGKz/aNFYAbJnDECLIprP9jxk1Zxo4jgA1wtnM=@lists.xenproject.org X-Gm-Message-State: AOJu0YwXC6UuLXj0wMWuEmNRbO2zG5orQRizm3ZaRGsPW/YjUv7l6wgo rZxHvt+uyY2f7eLpUcMoAesirZwqJftuNPmvHltDCD+/wBNZxmJHbTEDAPZ/cKA/DWnsUyBD1n6 yew1kyWoF0ltDa1l2f0ZS4R+gjoTKBkw= X-Gm-Gg: AeBDiet7GAiaAHtZpxhV/IwrYfwb7E2Xnt0LhX4va4RQXCqnzDK/hXMZMcPjIieFLbq zF3pXH1ZuH2HUehWapmgwTpeITGeo74G1S98KaDkw1q1TPOTPSL79ZHcADUUlCgEw57HXW7vxkF bnbrm1HdXVZA+MM74QWvctJBMDH9o7N+q9ywrYjFAn0K0X8CHwQLMi0F/9nW+/Rf5Gb8RZkoCq8 zWGHw/QHWcGZ/wE7YwWdSRaWxxk2TQKvEZlG4dOttskEiULjfts6yfFLXqd9+AT7zQgLD2HIO5N NlXAqPNzqjYIAKPu X-Received: by 2002:a2e:bcc7:0:b0:38c:c36b:8221 with SMTP id 38308e7fff4ca-3937823d9c4mr25437281fa.0.1777873336511; Sun, 03 May 2026 22:42:16 -0700 (PDT) MIME-Version: 1.0 References: <5b68fa0a8403ea60db3047f6505876bc03a41f3f.1774431310.git.mykola_kvach@epam.com> <87bjgcvul6.fsf@epam.com> <20eaa31d-a105-440e-9add-968fc9786180@gmail.com> In-Reply-To: <20eaa31d-a105-440e-9add-968fc9786180@gmail.com> From: Mykola Kvach Date: Mon, 4 May 2026 08:42:05 +0300 X-Gm-Features: AVHnY4LxpGmCNxUVBBFWVnmhQTmaKrIGVIqNzprrjOoi1MwdIOk9eBgmUwzsiAc Message-ID: Subject: Re: [PATCH 1/4] xen/arm: its: collect quirk flags and honor dma-noncoherent To: Oleksandr Tyshchenko Cc: Volodymyr Babchuk , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777873337-AB961161-11339ADA/0/0 X-purgate-type: clean X-purgate-size: 8439 Hi Oleksandr, Thank you for the review. On Tue, Apr 28, 2026 at 9:42=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 3/25/26 17:47, Mykola Kvach wrote: > > Hi Volodymyr, > > Hello Mykola and Volodymyr > > > > > > Thank you for the review. > > > > On Wed, Mar 25, 2026 at 4:42=E2=80=AFPM Volodymyr Babchuk > > wrote: > >> > >> Hi Mykola, > >> > >> Mykola Kvach writes: > >> > >>> From: Mykola Kvach > >>> > >>> Replace the per-quirk init callback with declarative flags in > >>> struct its_quirk, and introduce gicv3_its_collect_quirks() to gather > >>> the effective workaround flags from both the IIDR-matched quirk entry > >>> and the "dma-noncoherent" device-tree property. > >>> > >>> This lets non-coherent platforms force non-cacheable ITS table > >>> attributes even when no IIDR quirk entry matches. > >>> > >>> Signed-off-by: Mykola Kvach > >>> --- > >>> xen/arch/arm/gic-v3-its.c | 70 ++++++++++++++++++++++++------------= --- > >>> 1 file changed, 43 insertions(+), 27 deletions(-) > >>> > >>> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > >>> index 9ba068c46f..00524b43a3 100644 > >>> --- a/xen/arch/arm/gic-v3-its.c > >>> +++ b/xen/arch/arm/gic-v3-its.c > >>> @@ -57,71 +57,87 @@ struct its_device { > >>> */ > >>> struct its_quirk { > >>> const char *desc; > >>> - bool (*init)(struct host_its *hw_its); > >>> uint32_t iidr; > >>> uint32_t mask; > >>> + uint32_t flags; > >>> }; > >>> > >>> static uint32_t __ro_after_init its_quirk_flags; > >>> > >>> -static bool gicv3_its_enable_quirk_gen4(struct host_its *hw_its) > >>> -{ > >>> - its_quirk_flags |=3D HOST_ITS_WORKAROUND_NC_NS | > >>> - HOST_ITS_WORKAROUND_32BIT_ADDR; > >>> - > >>> - return true; > >>> -} > >>> - > >>> static const struct its_quirk its_quirks[] =3D { > >>> { > >>> - .desc =3D "R-Car Gen4", > >>> - .iidr =3D 0x0201743b, > >>> - .mask =3D 0xffffffffU, > >>> - .init =3D gicv3_its_enable_quirk_gen4, > >>> + .desc =3D "R-Car Gen4", > >>> + .iidr =3D 0x0201743b, > >>> + .mask =3D 0xffffffffU, > >>> + .flags =3D HOST_ITS_WORKAROUND_NC_NS | > >>> + HOST_ITS_WORKAROUND_32BIT_ADDR, > >>> }, > >>> { > >>> /* Sentinel. */ > >>> } > >>> }; > >>> > >>> -static struct its_quirk* gicv3_its_find_quirk(uint32_t iidr) > >>> +static const struct its_quirk *gicv3_its_find_quirk(uint32_t iidr) > >>> { > >>> - const struct its_quirk *quirks =3D its_quirks; > >>> + const struct its_quirk *quirk =3D its_quirks; > >>> > >>> - for ( ; quirks->desc; quirks++ ) > >>> + for ( ; quirk->desc; quirk++ ) > >>> { > >>> - if ( quirks->iidr =3D=3D (quirks->mask & iidr) ) > >>> - return (struct its_quirk *)quirks; > >>> + if ( quirk->iidr !=3D (quirk->mask & iidr) ) > >>> + continue; > >>> + > >>> + return quirk; > >>> } > >>> > >>> return NULL; > >>> } > >>> > >>> -static void gicv3_its_enable_quirks(struct host_its *hw_its) > >>> +static uint32_t gicv3_its_collect_quirks(const struct host_its *hw_i= ts, > >>> + const struct its_quirk **ma= tched_quirk) > >>> { > >>> + const struct its_quirk *quirk; > >>> + uint32_t flags =3D 0; > >>> uint32_t iidr =3D readl_relaxed(hw_its->its_base + GITS_IIDR); > >>> - const struct its_quirk *quirk =3D gicv3_its_find_quirk(iidr); > >>> > >>> - if ( quirk && quirk->init(hw_its) ) > >>> + quirk =3D gicv3_its_find_quirk(iidr); > >>> + if ( quirk ) > >>> + flags |=3D quirk->flags; > >>> + > >>> + if ( hw_its->dt_node && > >>> + dt_property_read_bool(hw_its->dt_node, "dma-noncoherent") ) > >>> + flags |=3D HOST_ITS_WORKAROUND_NC_NS; > >>> + > >>> + if ( matched_quirk ) > >>> + *matched_quirk =3D quirk; > >>> + > >>> + return flags; > >>> +} > >>> + > >>> +static void gicv3_its_enable_quirks(struct host_its *hw_its) > >>> +{ > >>> + const struct its_quirk *quirk; > >>> + > >>> + its_quirk_flags =3D gicv3_its_collect_quirks(hw_its, &quirk); > >>> + > >>> + if ( quirk ) > >>> printk("GICv3: enabling workaround for ITS: %s\n", quirk->d= esc); > >>> } > >>> > >>> static void gicv3_its_validate_quirks(void) > >>> { > >>> - const struct its_quirk *quirk =3D NULL, *prev =3D NULL; > >>> + uint32_t quirks, prev_quirks; > >>> const struct host_its *hw_its; > >>> > >>> if ( list_empty(&host_its_list) ) > >>> return; > >>> > >>> hw_its =3D list_first_entry(&host_its_list, struct host_its, en= try); > >>> - prev =3D gicv3_its_find_quirk(readl_relaxed(hw_its->its_base + G= ITS_IIDR)); > >>> + prev_quirks =3D gicv3_its_collect_quirks(hw_its, NULL); > >>> > >>> - list_for_each_entry(hw_its, &host_its_list, entry) > >>> + list_for_each_entry_continue(hw_its, &host_its_list, entry) > >>> { > >>> - quirk =3D gicv3_its_find_quirk(readl_relaxed(hw_its->its_bas= e + GITS_IIDR)); > >>> - BUG_ON(quirk !=3D prev); > >>> - prev =3D quirk; > >>> + quirks =3D gicv3_its_collect_quirks(hw_its, NULL); > >>> + BUG_ON(quirks !=3D prev_quirks); > >> > >> I know it was in the previous version, but as you are already touching > >> this... This is not Xen BUG(). This is a platform problem. So you need > >> to panic here. Something like > >> > >> if (quirks !=3D prev_quirks) > >> panic("Different ITS instances has different quirks") > > > > Ack. > > > > > > I agree that a quirk mismatch is a platform problem. Yes, the current > design uses global flags, making it unable to handle mixed quirks, > leading to the failure on mismatch. > > Please note, I am not saying a panic() is wrong here and I am not > requesting any changes here; I was just wondering why this is handled > differently than the SMMUv3 driver. I am just thinking out loud. > > SMMUv3 driver handles feature mismatches by gracefully degrading. When > it finds an SMMU device that does not support ARM_SMMU_FEAT_COHERENCY, > it disables that feature for the entire platform (so the P2M code has to > clean the cache when updating ptes). It does not panic. How the ITS and > SMMUv3 drivers are different in that regard? Why could not we apply the > same "worst-case" logic here? > For example: > - if any ITS device requires non-cacheable memory, then all ITS memory > allocations should use non-cacheable memory. > - if any ITS device requires 32-bit addresses, then all ITS memory > allocations should be constrained to 32-bits. > > This would be consistent with the SMMU precedent and would allow the > system to boot and function correctly, but with the performance > characteristics of the worst ITS device in the system. > > Or I really missed something? Yes, I think this makes sense. The current series still treats the ITS workaround state as global. Patch 4 only moves the quirk setup earlier, before the LPI tables are allocated. However, the effective flags are still taken from a single ITS instance, and the validation logic still requires all ITS instances to report the same flag set. For the currently supported quirks this is probably too strict. Both HOST_ITS_WORKAROUND_NC_NS and HOST_ITS_WORKAROUND_32BIT_ADDR are conservative restrictions on memory attributes/allocation. Using non-cacheable attributes for all ITS-related allocations, or constraining them to 32-bit addresses, should also be safe for ITS instances that do not require these restrictions. So I agree that the SMMUv3-style worst-case policy is a better fit here. I will rework this in v2 so that Xen aggregates the effective flags from all host ITS instances instead of requiring exact equality. I will also document that this aggregation is only valid for conservative workaround flags. A future non-composable quirk should either remain per-ITS or get explicit validation logic. Thanks for pointing out the SMMUv3 precedent. Best regards, Mykola > > > > > > > > > > > > [snip] From xen-devel-bounces@lists.xenproject.org Mon May 04 05:45:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:45:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299491.1574026 (Exim 4.92) (envelope-from ) id 1wJm7k-0002XU-7y; Mon, 04 May 2026 05:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299491.1574026; Mon, 04 May 2026 05:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm7k-0002XN-4e; Mon, 04 May 2026 05:45:44 +0000 Received: by outflank-mailman (input) for mailman id 1299491; Mon, 04 May 2026 05:45:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm7j-0002XH-1f for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:45:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm7g-00G3qu-No for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:45:42 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8326b-e002-0a2a0a5209dd-0a2a450787fe-36 for ; Mon, 04 May 2026 07:45:42 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f83285-229c-0a2a45070019-d155802cc04b-3 for ; Mon, 04 May 2026 07:45:42 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso31630585e9.2 for ; Sun, 03 May 2026 22:45:41 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260501191028.1250225-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777873542-1625DC48-8DE29D46/0/0 X-purgate-type: clean X-purgate-size: 3177 On 01.05.2026 21:10, Andrew Cooper wrote: > Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Along with regular interrupts, NMIs are a problem. Unlike other cases needing > NMI safety, we can't use a self NMI and callback, as the stack needs to be > empty at the point of enabling Shadow Stacks. > > Disable interrupts, and turn off the watchdog if it's configured. > > Note that watchdog_{en,dis}able() do not work here. They cause the watchdog > NMI to be ignored; they do not inhibit the generation of NMIs. > > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich preferably ... > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) > > if ( cpu_has_xen_shstk ) > { > + bool watchdog = (nmi_watchdog == NMI_LOCAL_APIC); > + > + /* > + * Between enabling CET and establishing SSP, any fault or interrupt > + * is fatal. We must arrange for none to happen. ... with a note regarding #MC added here. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 05:49:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:49:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299421.1574035 (Exim 4.92) (envelope-from ) id 1wJmBK-0003Ln-Lq; Mon, 04 May 2026 05:49:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299421.1574035; Mon, 04 May 2026 05:49:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmBK-0003Lg-JA; Mon, 04 May 2026 05:49:26 +0000 Received: by outflank-mailman (input) for mailman id 1299421; Mon, 04 May 2026 03:24:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJjvJ-0007UD-0F for xen-devel@lists.xenproject.org; Mon, 04 May 2026 03:24:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJjvH-008I3R-5a for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:24:43 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f81128-5cb7-0a2a0a5109dd-0a2a4503b54e-44 for ; Mon, 04 May 2026 05:24:42 +0200 Received: from [185.70.43.167] (helo=mail-43167.protonmail.ch) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8117a-672d-0a2a45030019-b9462ba74be5-3 for ; Mon, 04 May 2026 05:24:42 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Subject:Message-ID:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777865082; x=1778124282; bh=n6IY1A1TFjd+nC/H+/Qn+1wFazhEj+IW+F2zlnlaC6A=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=OT0JjJsBw63hd1V8ouI9ocYkxuQIk9ZKyjRFTOxqcMKXwAZpHRxrNILWPQ3l/vxRY iqORFufSNOM+gGuxFXefzt6xNSqBGd2R7TVFmoum1FmKohUOGWgv67upMboM6WUFO+ G0JE+LfpPh1RXO4eEpmJ5t7yQFu99LU/fzWoz32M05GXR+Y/ZZc06sZfNDacaqGswe x6t4L7ZiJK8sqo4EIQuh65qjYzco0ecUMoB14bfy0/0D0LzeIONUsy8MixX0TfF+Rj JyobtkjXUrgsFoD60s3Rka2LVRS7eVMCe96o8XGnEc3fUlQVbMx1QaeM1DLEvzkdke URnYxmyKFqvGg== Date: Mon, 04 May 2026 03:24:40 +0000 To: "xen-devel@lists.xenproject.org" From: "Samuel.Montgomery61" Subject: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 4204f4dcf239f86d163e20ff008378053a34d9f0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777865082-A2766938-F8C2C498/0/0 X-purgate-type: clean X-purgate-size: 2305 Hello, Xen's boot-time memory scrub is one of the more time-consuming steps during boot, particularly on systems with large amounts of RAM. I'd like to propose skipping it on systems with hardware full-memory encryption (e.g., Intel TME, AMD TSME). These features encrypt all DRAM transparently using an ephemeral key generated by the CPU at each boot. The key is not accessible to software and does not persist across reboots. This means residual data from any previous session where encryption was active is unreadable -- the same property that boot scrubbing exists to provide. The important nuance is that Xen needs to confirm encryption has been continuously active since the last scrub, not just that it is active now. If encryption was only recently enabled in firmware, residual plaintext from prior unencrypted sessions could still be present in pages that were never overwritten. Possible approaches: - Record "encryption active" to an EFI variable each boot; skip the scrub only if the flag is present from the previous boot. - Expose a command-line option for administrators to assert that encryption has been consistently enabled. - Some combination of the two. The optimization would apply only to the cross-reboot case. Runtime scrubbing when domains shut down would be unaffected, since all domains share the same key during a running session. Edge cases worth considering: - Memory written by firmware before encryption activation. - Crash/kexec without a full hardware reset (key may not change). - Suspend/resume (some implementations restore the prior key). - Interaction with existing bootscrub=3D command-line options. As a broader note, multi-key extensions to full-memory encryption (such as those used by AMD SEV and Intel TME-MK) could eventually eliminate the need for runtime scrubbing as well, by giving each domain its own key. This is relevant to the confidential computing work currently underway (Teddy Astie's recent AMD SEV RFC), though the boot-scrub optimization proposed here is independent and much simpler. Feedback welcome on whether the reasoning is sound and whether there are edge cases I've missed. Thanks, Sam ps. I'm not subscribed to the list, so please CC me in replies. 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Sun, 03 May 2026 22:52:32 -0700 (PDT) Message-ID: <48b9dae9-7161-4693-b86b-1448fe79005d@suse.com> Date: Mon, 4 May 2026 07:52:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 4/4] vpci: allow 32-bit BAR writes with memory decoding enabled To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Stewart Hildebrand References: <20260406191203.97662-1-stewart.hildebrand@amd.com> <20260406191203.97662-5-stewart.hildebrand@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777873953-B3762161-8CBFA387/0/0 X-purgate-type: clean X-purgate-size: 2427 On 24.04.2026 10:50, Roger Pau Monné wrote: > On Mon, Apr 06, 2026 at 03:11:58PM -0400, Stewart Hildebrand wrote: >> --- a/xen/drivers/vpci/header.c >> +++ b/xen/drivers/vpci/header.c >> @@ -670,6 +670,7 @@ static void cf_check bar_write( >> { >> struct vpci_bar *bar = data; >> bool hi = false; >> + uint16_t cmd = 0; >> >> ASSERT(is_hardware_domain(pdev->domain)); >> >> @@ -683,19 +684,29 @@ static void cf_check bar_write( >> val &= PCI_BASE_ADDRESS_MEM_MASK; >> >> /* >> - * Xen only cares whether the BAR is mapped into the p2m, so allow BAR >> - * writes as long as the BAR is not mapped into the p2m. >> + * Allow 64-bit BAR writes only when the BAR is not mapped in p2m. Always >> + * allow 32-bit BAR writes. >> */ >> if ( bar->enabled ) >> { >> - /* If the value written is the current one avoid printing a warning. */ >> - if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) >> - gprintk(XENLOG_WARNING, >> - "%pp: ignored BAR %zu write while mapped\n", >> - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); >> - return; >> - } >> + if ( bar->type == VPCI_BAR_MEM32 ) >> + { >> + if ( val == bar->addr ) >> + return; >> >> + cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); >> + modify_bars(pdev, cmd, false, false); >> + } >> + else >> + { >> + /* If the value written is the same avoid printing a warning. */ >> + if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) >> + gprintk(XENLOG_WARNING, >> + "%pp: ignored BAR %zu write while mapped\n", >> + &pdev->sbdf, bar - pdev->vpci->header.bars + hi); >> + return; >> + } >> + } >> >> /* >> * Update the cached address, so that when memory decoding is enabled >> @@ -715,6 +726,9 @@ static void cf_check bar_write( >> } >> >> pci_conf_write32(pdev->sbdf, reg, val); > > I don't think it matters a lot, but here we are changing the position > of the BAR in the host memory map while the mappings are still active. It would matter if the original address space could be re-used for another purpose while those mappings are still there? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 06:34:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 06:34:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299517.1574053 (Exim 4.92) (envelope-from ) id 1wJmsF-0001tH-Bo; Mon, 04 May 2026 06:33:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299517.1574053; Mon, 04 May 2026 06:33:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmsF-0001tA-8H; Mon, 04 May 2026 06:33:47 +0000 Received: by outflank-mailman (input) for mailman id 1299517; Mon, 04 May 2026 06:33:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmsD-0001sl-Sm for xen-devel@lists.xenproject.org; Mon, 04 May 2026 06:33:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJmsC-000pKi-Et for xen-devel@lists.xenproject.org; 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Sun, 03 May 2026 23:33:43 -0700 (PDT) MIME-Version: 1.0 References: <6b78dcf3-7e4c-4568-a0fd-58d5c860e4fa@gmail.com> In-Reply-To: <6b78dcf3-7e4c-4568-a0fd-58d5c860e4fa@gmail.com> From: Mykola Kvach Date: Mon, 4 May 2026 09:33:32 +0300 X-Gm-Features: AVHnY4K0n5-M1EGmt3OlTmRiQa2Or5e4EMXWv7ABjjvb9VOrLd6oBZjuvaFxXlQ Message-ID: Subject: Re: [PATCH 4/4] xen/arm: its: pre-initialize ITS quirks before LPI setup To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1777876424-310493FF-9C9D6481/0/0 X-purgate-type: clean X-purgate-size: 8981 Hi Oleksandr, Thank you for the review. On Tue, Apr 28, 2026 at 7:31=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 3/25/26 12:38, Mykola Kvach wrote: > > Hello Mykola > > > From: Mykola Kvach > > > > In the current initialization flow, gicv3_init() calls gicv3_dist_init(= ) > > before gicv3_its_init(). > > > > When LPIs are supported, gicv3_dist_init() calls > > gicv3_lpi_init_host_lpis(), which initializes host LPI state and alloca= tes > > the boot CPU pending table before ITS quirk flags are computed. Non-boo= t > > CPUs allocate their pending tables later from the CPU_UP_PREPARE notifi= er, > > while redistributor LPI programming happens separately in > > gicv3_lpi_init_rdist(). > > > > This means the boot CPU LPI setup can observe default ITS memory attrib= utes > > before dma-noncoherent and other ITS quirks are applied. > > > > Introduce gicv3_its_preinit() and call it before gicv3_dist_init(). Thi= s > > keeps the actual ITS hardware initialization in gicv3_its_init(), but m= oves > > ITS discovery, quirk validation and quirk flag setup early enough for t= he > > subsequent LPI initialization to use the correct attributes. > > > Have you considered an alternative approach that might be less invasive? > I am thinking of something the other way around: perhaps we could > allocate the LPI pending table for the boot CPU later. > > Would a diff below work? > > > --- > xen/arch/arm/gic-v3-lpi.c | 9 +++++++++ > xen/arch/arm/gic-v3.c | 2 ++ > xen/arch/arm/include/asm/gic_v3_its.h | 6 ++++++ > 3 files changed, 17 insertions(+) > > diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c > index 9ee338edc2..61cc45d347 100644 > --- a/xen/arch/arm/gic-v3-lpi.c > +++ b/xen/arch/arm/gic-v3-lpi.c > @@ -450,6 +450,15 @@ int gicv3_lpi_init_host_lpis(unsigned int > host_lpi_bits) > > printk("GICv3: using at most %lu LPIs on the host.\n", > MAX_NR_HOST_LPIS); > > + return rc; > +} > + > +int gicv3_lpi_post_init_host_lpis(void) > +{ > + int rc; > + > + ASSERT(smp_processor_id() =3D=3D 0); > + > /* Register the CPU notifier and allocate memory for the boot CPU *= / > register_cpu_notifier(&cpu_nfb); > rc =3D gicv3_lpi_allocate_pendtable(smp_processor_id()); > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 7f365cdbe9..8b9059c5c9 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -1981,6 +1981,8 @@ static int __init gicv3_init(void) > res =3D gicv3_its_init(); > if ( res ) > panic("GICv3: ITS: initialization failed: %d\n", res); > + > + gicv3_lpi_post_init_host_lpis(); > } > > res =3D gicv3_cpu_init(); > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h > b/xen/arch/arm/include/asm/gic_v3_its.h > index fc5a84892c..288cc1d42f 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -156,6 +156,7 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base); > > /* Initialize the host structures for LPIs and the host ITSes. */ > int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits); > +int gicv3_lpi_post_init_host_lpis(void); > int gicv3_its_init(void); > > /* Store the physical address and ID for each redistributor as read > from DT. */ > @@ -245,6 +246,11 @@ static inline int gicv3_lpi_init_host_lpis(unsigned > int host_lpi_bits) > return 0; > } > > +static inline int gicv3_lpi_post_init_host_lpis(void) > +{ > + return 0; > +} > + > static inline int gicv3_its_init(void) > { > return 0; Yes, I think this direction is better and less invasive. Thank you for the suggestion. Best regards, Mykola > -- > 2.34.1 > > > > > > Signed-off-by: Mykola Kvach > > --- > > TODO: Think about separating Redistributor/LPI attributes from ITS. > > --- > > xen/arch/arm/gic-v3-its.c | 36 +++++++++++++++++---------= - > > xen/arch/arm/gic-v3.c | 7 ++++++ > > xen/arch/arm/include/asm/gic_v3_its.h | 5 ++++ > > 3 files changed, 35 insertions(+), 13 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index ee432088cd..0251d91630 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -63,6 +63,7 @@ struct its_quirk { > > uint32_t flags; > > }; > > > > +/* TODO: Separate Redistributor/LPI attributes from ITS quirks. */ > > static uint32_t __ro_after_init its_quirk_flags; > > > > static bool gicv3_its_match_quirk_gen4(const struct host_its *hw_its) > > @@ -148,9 +149,15 @@ static uint32_t gicv3_its_collect_quirks(const str= uct host_its *hw_its, > > return flags; > > } > > > > -static void gicv3_its_enable_quirks(struct host_its *hw_its) > > +static void gicv3_its_enable_quirks(void) > > { > > const struct its_quirk *quirk; > > + const struct host_its *hw_its; > > + > > + if ( list_empty(&host_its_list) ) > > + return; > > + > > + hw_its =3D list_first_entry(&host_its_list, struct host_its, entry= ); > > > > its_quirk_flags =3D gicv3_its_collect_quirks(hw_its, &quirk); > > > > @@ -603,16 +610,10 @@ static int gicv3_its_init_single_its(struct host_= its *hw_its) > > uint64_t reg; > > int i, ret; > > > > - hw_its->its_base =3D ioremap_nocache(hw_its->addr, hw_its->size); > > - if ( !hw_its->its_base ) > > - return -ENOMEM; > > - > > ret =3D gicv3_disable_its(hw_its); > > if ( ret ) > > return ret; > > > > - gicv3_its_enable_quirks(hw_its); > > - > > reg =3D readq_relaxed(hw_its->its_base + GITS_TYPER); > > hw_its->devid_bits =3D GITS_TYPER_DEVICE_ID_BITS(reg); > > hw_its->evid_bits =3D GITS_TYPER_EVENT_ID_BITS(reg); > > @@ -1161,6 +1162,11 @@ static void add_to_host_its_list(paddr_t addr, p= addr_t size, > > its_data->size =3D size; > > its_data->dt_node =3D node; > > > > + its_data->its_base =3D ioremap_nocache(its_data->addr, its_data->s= ize); > > + if ( !its_data->its_base ) > > + panic("GICv3: Cannot map ITS frame: 0x%lx, 0x%lx\n", > > + its_data->addr, its_data->size); > > + > > printk("GICv3: Found ITS @0x%lx\n", addr); > > > > list_add_tail(&its_data->entry, &host_its_list); > > @@ -1238,16 +1244,22 @@ static void gicv3_its_acpi_init(void) > > > > #endif > > > > -int gicv3_its_init(void) > > +void __init gicv3_its_preinit(void) > > { > > - struct host_its *hw_its; > > - int ret; > > - > > if ( acpi_disabled ) > > gicv3_its_dt_init(dt_interrupt_controller); > > else > > gicv3_its_acpi_init(); > > > > + gicv3_its_validate_quirks(); > > + gicv3_its_enable_quirks(); > > +} > > + > > +int gicv3_its_init(void) > > +{ > > + struct host_its *hw_its; > > + int ret; > > + > > list_for_each_entry(hw_its, &host_its_list, entry) > > { > > ret =3D gicv3_its_init_single_its(hw_its); > > @@ -1255,8 +1267,6 @@ int gicv3_its_init(void) > > return ret; > > } > > > > - gicv3_its_validate_quirks(); > > - > > return 0; > > } > > > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index bc07f97c16..6e44d23d64 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -1974,6 +1974,13 @@ static int __init gicv3_init(void) > > > > spin_lock(&gicv3.lock); > > > > + if ( gic_dist_supports_lpis() ) > > + /* > > + * Apply ITS quirks before gicv3_dist_init() sets up host LPIs= , > > + * so pending tables use the correct ITS memory attributes. > > + */ > > + gicv3_its_preinit(); > > + > > gicv3_dist_init(); > > > > if ( gic_dist_supports_lpis() ) > > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/inclu= de/asm/gic_v3_its.h > > index fc5a84892c..e1d7522ea5 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_its.h > > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > > @@ -156,6 +156,7 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base)= ; > > > > /* Initialize the host structures for LPIs and the host ITSes. */ > > int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits); > > +void gicv3_its_preinit(void); > > int gicv3_its_init(void); > > > > /* Store the physical address and ID for each redistributor as read f= rom DT. */ > > @@ -219,6 +220,10 @@ static inline int gicv3_its_deny_access(struct dom= ain *d) > > return 0; > > } > > > > +static inline void gicv3_its_preinit(void) > > +{ > > +} > > + > > static inline bool gicv3_its_host_has_its(void) > > { > > return false; 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Sun, 03 May 2026 23:46:26 -0700 (PDT) MIME-Version: 1.0 References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> In-Reply-To: From: Mykola Kvach Date: Mon, 4 May 2026 09:46:15 +0300 X-Gm-Features: AVHnY4Jw3kqRt7TJitevrk3OlcM1c5n1EjC3wDuFDI48sg8R8MMzH8eUCqfFhW4 Message-ID: Subject: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: Bertrand Marquis Cc: Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777877187-83563161-A7876D74/0/0 X-purgate-type: clean X-purgate-size: 8388 Hi all, Gentle ping on this patch. Bertrand has re-confirmed his Reviewed-by, and the previous discussion looks resolved from my side. Could this be picked up if there are no remaining concerns? Best regards, Mykola On Thu, Apr 23, 2026 at 8:13=E2=80=AFAM Mykola Kvach wrote: > > Hi Bertrand, > > On Wed, Apr 15, 2026 at 3:31=E2=80=AFPM Bertrand Marquis > wrote: > > > > Hi Jan and Mykola, > > > > > On 1 Apr 2026, at 14:24, Jan Beulich wrote: > > > > > > On 01.04.2026 11:51, Mykola Kvach wrote: > > >> On Wed, Apr 1, 2026 at 12:22=E2=80=AFPM Jan Beulich wrote: > > >>> On 01.04.2026 10:49, Mykola Kvach wrote: > > >>>> On Wed, Apr 1, 2026 at 11:14=E2=80=AFAM Jan Beulich wrote: > > >>>>> On 01.04.2026 09:13, Mykola Kvach wrote: > > >>>>>> On Wed, Apr 1, 2026 at 9:29=E2=80=AFAM Jan Beulich wrote: > > >>>>>>> On 31.03.2026 20:31, Mykola Kvach wrote: > > >>>>>>>> From: Mykola Kvach > > >>>>>>>> > > >>>>>>>> SMCCC DEN0028G, section 3.1, states that for AArch64 SMC/HVC c= alls > > >>>>>>>> using Wn, only the least significant 32 bits are significant a= nd the > > >>>>>>>> upper 32 bits must be ignored by the implementation. > > >>>>>>>> > > >>>>>>>> So for SMC32 PSCI calls, Xen must not treat non-zero upper bit= s in the > > >>>>>>>> argument registers as an error. Instead, they should be discar= ded when > > >>>>>>>> decoding the arguments. > > >>>>>>>> > > >>>>>>>> Arm ARM DDI 0487J.a (D1-5406) also notes that the upper 32 bit= s may be > > >>>>>>>> implementation defined when entering from AArch32. Xen zeros t= hem on > > >>>>>>>> entry, but that guarantee is only relevant for 32-bit domains. > > >>>>>>>> > > >>>>>>>> Update PSCI v0.2+ CPU_ON, CPU_SUSPEND, AFFINITY_INFO and SYSTE= M_SUSPEND > > >>>>>>>> to read SMC32 arguments via PSCI_ARG32(), while keeping the SM= C64 > > >>>>>>>> handling unchanged. > > >>>>>>>> > > >>>>>>>> No functional change is intended for PSCI 0.1. > > >>>>>>>> > > >>>>>>>> Suggested-by: Julien Grall > > >>>>>>>> Signed-off-by: Mykola Kvach > > >>>>>>>> Reviewed-by: Bertrand Marquis > > >>>>>>> > > >>>>>>> I thought I might as well include this in my next commit sweep,= but isn't > > >>>>>>> this R-b being invalidated by ... > > >>>>>>> > > >>>>>>>> --- > > >>>>>>>> v3: > > >>>>>>>> - use PSCI_ARG_CONV for SYSTEM_SUSPEND > > >>>>>>> > > >>>>>>> ... this change. That's ... > > >>>>>>> > > >>>>>>>> @@ -422,14 +427,8 @@ bool do_vpsci_0_2_call(struct cpu_user_re= gs *regs, uint32_t fid) > > >>>>>>>> case PSCI_1_0_FN32_SYSTEM_SUSPEND: > > >>>>>>>> case PSCI_1_0_FN64_SYSTEM_SUSPEND: > > >>>>>>>> { > > >>>>>>>> - register_t epoint =3D PSCI_ARG(regs, 1); > > >>>>>>>> - register_t cid =3D PSCI_ARG(regs, 2); > > >>>>>>>> - > > >>>>>>>> - if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND ) > > >>>>>>>> - { > > >>>>>>>> - epoint &=3D GENMASK(31, 0); > > >>>>>>>> - cid &=3D GENMASK(31, 0); > > >>>>>>>> - } > > >>>>>>>> + register_t epoint =3D PSCI_ARG_CONV(regs, 1, is_conv_= 64); > > >>>>>>>> + register_t cid =3D PSCI_ARG_CONV(regs, 2, is_conv_64)= ; > > >>>>>>>> > > >>>>>>>> perfc_incr(vpsci_system_suspend); > > >>>>>>>> PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoin= t, cid)); > > >>>>>>> > > >>>>>>> ... this hunk aiui, which is far from merely cosmetic imo. Whil= e > > >>>>>> > > >>>>>> Nobody said that the change had to be purely cosmetic in order t= o keep > > >>>>>> the tag. I understood it differently from the official Xen > > >>>>>> documentation pages. > > >>>>>> > > >>>>>>> behavior looks to remain the same for PSCI_1_0_FN32_SYSTEM_SUSP= END, it > > >>>>>> > > >>>>>> Exactly. If the changes are not substantial, I do not see a reas= on to > > >>>>>> drop the tag ... > > >>>>>> > > >>>>>>> clearly changes for PSCI_1_0_FN64_SYSTEM_SUSPEND. That may be i= ntended > > >>>>>>> and for the better, but the change clearly wasn't reviewed by B= ertrand, > > >>>>>>> nor - when offering the R-b - did he ask for this extra change. > > >>>>>> > > >>>>>> ... and this is also how I understood the Xen patch submission > > >>>>>> guidelines [1], which say: > > >>>>>> > > >>>>>> "Note that if there are several revisions of a patch, you ought = to > > >>>>>> copy tags that have accumulated during the review. For example, = if > > >>>>>> person A and person B added a Reviewed-by: tag to v1 of your pat= ch, > > >>>>>> include it into v2 of your patch. If you make substantial change= s > > >>>>>> after certain tags were already applied, you will want to consid= er > > >>>>>> which ones are no longer applicable (and may require re-providin= g)." > > >>>>>> > > >>>>>> So my understanding was that tags should normally be kept across > > >>>>>> revisions, unless the changes are substantial enough to make the= m no > > >>>>>> longer applicable. > > >>>>> > > >>>>> Maybe our understanding of "substantial" differs. To me that's an= ything > > >>>>> changing functionality. Style adjustments, typo corrections, and = alike > > >>>>> generally aren't substantial (albeit even then there may be excep= tions). > > >>>> > > >>>> Thanks for clarifying what you consider substantial. > > >>>> > > >>>> Even under that interpretation, I do not see a functionality chang= e > > >>>> here. "Refactoring" seems like the more accurate term in this case= : > > >>>> the internal form changes, but the intended external behavior does > > >>>> not. > > >>>> > > >>>> It may be that we are using "functional change" in slightly differ= ent > > >>>> senses here. > > >>>> > > >>>> For v3, the switch to PSCI_ARG_CONV() in SYSTEM_SUSPEND was meant = to > > >>>> make this case consistent with the helper-based argument decoding = used > > >>>> elsewhere, not to change behavior. > > >>>> > > >>>> In particular, I do not see a functional change for > > >>>> PSCI_1_0_FN64_SYSTEM_SUSPEND: v2 used PSCI_ARG(regs, 1/2), and in = v3 > > >>>> PSCI_ARG_CONV(regs, 1/2, is_conv_64) should resolve to the same th= ing > > >>>> when is_conv_64 is true. > > >>> > > >>> Isn't the whole point of the patch to alter behavior when is_conv_6= 4 is > > >>> false? For that case PSCI_1_0_FN64_SYSTEM_SUSPEND behavior looks to > > >>> change in v3, when it didn't in v2. Whereas for > > >>> PSCI_1_0_FN32_SYSTEM_SUSPEND the v3 change indeed only eliminates o= pen- > > >>> coding, which one may or may not regard as "substantial". > > >> > > >> I think the point I was trying to make is slightly narrower: in this > > >> code path, is_conv_64 is derived directly from fid via > > >> smccc_is_conv_64(fid) before the switch (fid). > > >> > > >> So for PSCI_1_0_FN64_SYSTEM_SUSPEND, I do not see how > > >> is_conv_64 =3D=3D false could arise here: if we are in the FN64 case= , > > >> the function ID already encodes the 64-bit convention. > > >> > > >> Conversely, if is_conv_64 is false here, then this cannot be the > > >> FN64 case. > > > > > > Ah, I see. To figure that out, I would have had to do a proper review= . I > > > was after committing only, which ought to be an entirely mechanical s= tep. > > > > > >> On that basis, I do not see a behavioral change for the FN64 > > >> SYSTEM_SUSPEND case in v3. > > > > > > I agree (now). I'm still not going to pick up that patch, but rather > > > leave it to the Arm maintainers. While not as clear cut as it first > > > seemed to me, I still consider it within the grey area. > > > > Sorry for the delay, this felt through in my filters as it was reviewed= -by already. > > > > I am ok with the changes done which make sense (mask is now done > > directly). > > > > Reviewed-by: Bertrand Marquis > > Thank you for taking another look. > > With your Reviewed-by in place, and since I do not expect any further > changes from my side, I believe this patch should now be ready for the > Arm maintainers to pick up. > > Best regards, > Mykola > > > > > Cheers > > Bertrand > > > > > > > > Jan > > > > From xen-devel-bounces@lists.xenproject.org Mon May 04 06:50:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 06:50:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299532.1574071 (Exim 4.92) (envelope-from ) id 1wJn8R-0005Fo-U8; Mon, 04 May 2026 06:50:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299532.1574071; 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bh=QpqUjFKiK1Aqh68TRvb9+tr1IbfG89bWxVthJX3f/vw=; b=Zt2CVqZDej5B2kEaS7JSH9WTvKYmijBFR0TBxucgBZV+zbShC3ZLDIVwYYF1sLUgqVd9gWQbq2uQk8i5YemqvbBOVdOmoMnDhbRM3IWS7H9DlgCBWx24UUvNyRns2yik1umcjbnKd8FFEDKiz7dc72guySrcoL1xa3n4NLzOaVs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 4 May 2026 08:50:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: Mykola Kvach , Bertrand Marquis CC: Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9YbTnO57pNUKr9fEwJZkFjQ6xtvlPMjdrE+nHHvIT9uedPa358n6B5suqnaVbBV9ea3WrONUGMD4BCbzVJZQ4+PL5UX8hqSZ2nkr9kN/63CSy5fR3xoxwby/h80AKN/q8LT0TX9B/MhRS056NEZtWlV07YVR3VDKVK2OIw0JbvhHSnEMIWhek8hjgmh7eK4ByMvI8DDn7yZTjRdfUr0SoQXuSXYjKl3MQXa6z6fFIQaAV3eFqYa+owkkFqlckUzvzc7XVAZ7vo3rdjXQWKbjuPF0mEiA0SEoLngetjDifB/CTTuayjeA+gwlQ19OzMdqCtNm4t2sO/ExH4eE10cFVDz6RAzf3KPLJtT1rEg/Sx7uLq5OWU8G3o3k9umowP4CVckCX4kXgWO4K4GpkMle7xfGe73FfHbFIco3WSLswJ6GJ85mp+xCHdvmLBzpWQiO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 06:50:18.5858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 958da7ae-83f7-4302-13a3-08dea9a967ae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MW1PEPF00016160.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB9018 X-purgate-ID: tlsNG-ef75cf/1777877428-14E57C48-02439D3C/0/0 X-purgate-type: clean X-purgate-size: 306 On 04-May-26 08:46, Mykola Kvach wrote: > Hi all, > > Gentle ping on this patch. > > Bertrand has re-confirmed his Reviewed-by, and the previous discussion > looks resolved from my side. > > Could this be picked up if there are no remaining concerns? Yes, I'll merge it soon. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 07:19:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 07:19:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299539.1574080 (Exim 4.92) (envelope-from ) id 1wJnag-0008OT-4r; Mon, 04 May 2026 07:19:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299539.1574080; Mon, 04 May 2026 07:19:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJnag-0008OM-1W; Mon, 04 May 2026 07:19:42 +0000 Received: by outflank-mailman (input) for mailman id 1299539; Mon, 04 May 2026 07:19:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJnae-0008OG-Vi for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:19:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJnad-007kx3-Ri for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <50371416-8acf-4204-ae83-469602037e60@amd.com> Date: Mon, 4 May 2026 09:19:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: Mykola Kvach CC: , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CD:EE_|DS4PR12MB9771:EE_ X-MS-Office365-Filtering-Correlation-Id: 59aa99fa-7128-43a9-4aea-08dea9ad7e0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: kRyGOyf2rERRCssi91P9KbU0RTlPanteEf9TN3gn/ko6zabSWtuneieBkR24uLPGkNwokqlnQkGasC4DVA8hqQqcgRCLop02DoA3i79A4V4ucd2ICslhEbVOlywGDlY4AErJdJuFKv9wFhJ5MHKiZ9p+W72uk2XrA3gPgajran8aFjKeDoFQgHbc/3jtnM9UAF9myxUDZQljve3yOQ0EPw+6SkZS5xZIunlGzvdB3GhYa4rY57lZrRmjhlekzunYwGwqTdgF7haBdEvLynLl7zbz4mrXMO0vCdgw8iPtA3C7DE5M+sWNAKnNNyTlXWvEDg8TuSSy0YxnC4LALhnBHIn5yHNbt39gTK6/nQCWIn/f+GttkEJKMj1SO++2YYvPjwShsmRP29z4jSKBfrM/H18Wi+y4tXxFZFqQjIaqc/FYeaRbtf9gRMeEXYAfpdTf X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 07:19:34.1671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 59aa99fa-7128-43a9-4aea-08dea9ad7e0d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9771 X-purgate-ID: tlsNG-ef75cf/1777879179-14856C48-F4DB32A1/0/0 X-purgate-type: clean X-purgate-size: 6351 On 01-May-26 09:22, Mykola Kvach wrote: > Hi Michal, > > On Wed, Apr 29, 2026 at 11:20 AM Orzel, Michal wrote: >> >> >> >> On 28-Apr-26 13:57, Mykola Kvach wrote: >>> From: Mykola Kvach >>> >>> The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. >>> >>> Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable >>> bits selects bypass rather than deasserted interrupt outputs when the >>> CPU interface stops driving them. Tables 2-2 and 2-3 show that a zeroed >>> GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully >>> disabling the interface. >>> >>> Fix this by reading GICC_CTLR, then setting the bypass-disable bits and >>> clearing the group-enable bits that are architecturally defined for the >>> current GICC_CTLR view before writing the value back. When Security >>> Extensions are implemented Xen accesses the Non-secure copy of >>> GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] and >>> bits [8:7] are reserved. >>> >>> Without Security Extensions there is no separate Secure/Non-secure CPU >>> interface view, so disabling both group-enable bits affects the shared >>> interface state. This is still appropriate for the CPU shutdown path, >>> which is expected to stop normal interrupt delivery through the interface >>> and rely only on the architecturally separate wakeup event signaling. >>> >>> Section 2.3.2 also states that wakeup event signals remain available >>> even when both GIC interrupt signaling and interrupt bypass are >>> disabled, so disabling bypass does not break the power-management use >>> case, i.e. suspend modes. >>> >>> Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") >>> Signed-off-by: Mykola Kvach >>> >>> --- >>> Changes in v2: >>> - derive the shutdown masks from the active GICC_CTLR layout >>> - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is set >>> - stop writing reserved bits [8:7] on Security Extensions systems >>> --- >>> xen/arch/arm/gic-v2.c | 16 +++++++++++++++- >>> xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- >>> 2 files changed, 38 insertions(+), 3 deletions(-) >>> >>> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c >>> index 014f955967..241c1ff5c5 100644 >>> --- a/xen/arch/arm/gic-v2.c >>> +++ b/xen/arch/arm/gic-v2.c >>> @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) >>> >>> static void gicv2_cpu_disable(void) >>> { >>> - writel_gicc(0x0, GICC_CTLR); >>> + uint32_t ctlr = readl_gicc(GICC_CTLR); >>> + >>> + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) >>> + { >>> + ctlr |= GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; >>> + ctlr &= ~GICC_CTL_ENABLE; >>> + } >>> + else >>> + { >>> + ctlr |= GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | >>> + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; >>> + ctlr &= ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); >>> + } >> I don't understand why you want to set both G0 and G1, >> Bits 5-6 in the NS view control Group 1, while the same bits in the >> Secure/single-security-state view control Group 0. So in the latter case you >> don't need to set G1. Without security extensions all interrupts are G0 and with >> security extensions (NS access) all interrupts are G1. The spec guarantees the >> functional mapping. > > I agree that this is not about Xen using both interrupt groups during > normal operation. > > There are two separate points here. > > For the group-enable bits, Xen currently only enables bit 0 in > gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be clear > already. However, the old shutdown path wrote 0 to GICC_CTLR, which also > cleared every group-enable bit visible in the current view. Since this > patch changes the shutdown path from a plain zero write to a > read/modify/write, I wanted to preserve that part of the old shutdown > semantics and avoid leaving any normal interrupt delivery enabled in the > common GICC_CTLR view. > > For the bypass-disable bits, the reason for setting both groups in the > single-security-state/common view is the GICv2 bypass logic, not normal > interrupt delivery. Once the group-enable bits are clear, the CPU > interface is no longer driving the physical IRQ/FIQ outputs through > normal GIC delivery. At that point, the bypass-disable bits decide > whether those outputs are deasserted or driven by the legacy inputs. > > For example, with EnableGrp1 == 0, EnableGrp0 == 0 and FIQEn == 0, > Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be > deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and > FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is why > the common-view case disables the bypass paths for both groups. > > This is also not meant to make FIQ a supported delivery mode for Xen. It > is the opposite: when the CPU interface is disabled, the final state > should not allow the physical FIQ output to be driven by the legacy > bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but Xen > does not configure FIQ as its normal GICv2 interrupt delivery mode. > > So the intent is: > > * with Security Extensions, touch only the Non-secure view bits visible > to Xen; > * without Security Extensions, preserve the old "no normal delivery" > shutdown behaviour, while changing the bypass-disable bits so that > the physical outputs are deasserted rather than falling back to > legacy bypass. > > If you prefer, I can also make v3 more conservative and only clear the > group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. > EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The > bypass-disable bits would still be set for all bypass paths visible in > the current GICC_CTLR view, because that part is about the physical > IRQ/FIQ outputs after normal delivery has been disabled, not about which > interrupt group Xen normally uses. The bypass argument is valid according to the tables. However, clearing G1 is unnecessary, so it should be dropped. I can do that on commit if you agree. With that: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 08:08:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:08:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299554.1574089 (Exim 4.92) (envelope-from ) id 1wJoLw-0006lQ-Qc; Mon, 04 May 2026 08:08:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299554.1574089; Mon, 04 May 2026 08:08:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoLw-0006lJ-NI; Mon, 04 May 2026 08:08:32 +0000 Received: by outflank-mailman (input) for mailman id 1299554; Mon, 04 May 2026 08:08:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoLu-0006lD-Vo for xen-devel@lists.xenproject.org; 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Mon, 04 May 2026 01:08:28 -0700 (PDT) MIME-Version: 1.0 References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> In-Reply-To: From: Mykola Kvach Date: Mon, 4 May 2026 11:08:16 +0300 X-Gm-Features: AVHnY4LhPAhpglB-N2_E_vD6t5WrzzH982qcwDTAGw6WmvSp3NvoeRqEQ-55FkM Message-ID: Subject: Re: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: "Orzel, Michal" Cc: Bertrand Marquis , Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777882109-890CF161-736875D4/0/0 X-purgate-type: clean X-purgate-size: 507 Hi Michal, On Mon, May 4, 2026 at 9:50=E2=80=AFAM Orzel, Michal = wrote: > > > > On 04-May-26 08:46, Mykola Kvach wrote: > > Hi all, > > > > Gentle ping on this patch. > > > > Bertrand has re-confirmed his Reviewed-by, and the previous discussion > > looks resolved from my side. > > > > Could this be picked up if there are no remaining concerns? > Yes, I'll merge it soon. Thank you for the update. Much appreciated. Best regards, Mykola > > ~Michal > From xen-devel-bounces@lists.xenproject.org Mon May 04 08:10:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:10:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299563.1574098 (Exim 4.92) (envelope-from ) id 1wJoNi-0008GI-BA; Mon, 04 May 2026 08:10:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299563.1574098; Mon, 04 May 2026 08:10:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoNi-0008GB-7Y; Mon, 04 May 2026 08:10:22 +0000 Received: by outflank-mailman (input) for mailman id 1299563; Mon, 04 May 2026 08:10:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoNh-0008G2-5q for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:10:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoNg-007wsD-HL for xen-devel@lists.xenproject.org; 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Mon, 04 May 2026 01:10:19 -0700 (PDT) MIME-Version: 1.0 References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> <50371416-8acf-4204-ae83-469602037e60@amd.com> In-Reply-To: <50371416-8acf-4204-ae83-469602037e60@amd.com> From: Mykola Kvach Date: Mon, 4 May 2026 11:10:08 +0300 X-Gm-Features: AVHnY4Lvp0A6YNCsGb-A6_HyiVqwRT8cWgHeDvY8l6NPOxpz4IfcSc588mOX25k Message-ID: Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1777882220-39161DB1-4FD0F04A/0/0 X-purgate-type: clean X-purgate-size: 6971 On Mon, May 4, 2026 at 10:19=E2=80=AFAM Orzel, Michal wrote: > > > > On 01-May-26 09:22, Mykola Kvach wrote: > > Hi Michal, > > > > On Wed, Apr 29, 2026 at 11:20=E2=80=AFAM Orzel, Michal wrote: > >> > >> > >> > >> On 28-Apr-26 13:57, Mykola Kvach wrote: > >>> From: Mykola Kvach > >>> > >>> The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. > >>> > >>> Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable > >>> bits selects bypass rather than deasserted interrupt outputs when the > >>> CPU interface stops driving them. Tables 2-2 and 2-3 show that a zero= ed > >>> GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully > >>> disabling the interface. > >>> > >>> Fix this by reading GICC_CTLR, then setting the bypass-disable bits a= nd > >>> clearing the group-enable bits that are architecturally defined for t= he > >>> current GICC_CTLR view before writing the value back. When Security > >>> Extensions are implemented Xen accesses the Non-secure copy of > >>> GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] an= d > >>> bits [8:7] are reserved. > >>> > >>> Without Security Extensions there is no separate Secure/Non-secure CP= U > >>> interface view, so disabling both group-enable bits affects the share= d > >>> interface state. This is still appropriate for the CPU shutdown path, > >>> which is expected to stop normal interrupt delivery through the inter= face > >>> and rely only on the architecturally separate wakeup event signaling. > >>> > >>> Section 2.3.2 also states that wakeup event signals remain available > >>> even when both GIC interrupt signaling and interrupt bypass are > >>> disabled, so disabling bypass does not break the power-management use > >>> case, i.e. suspend modes. > >>> > >>> Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") > >>> Signed-off-by: Mykola Kvach > >>> > >>> --- > >>> Changes in v2: > >>> - derive the shutdown masks from the active GICC_CTLR layout > >>> - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is= set > >>> - stop writing reserved bits [8:7] on Security Extensions systems > >>> --- > >>> xen/arch/arm/gic-v2.c | 16 +++++++++++++++- > >>> xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- > >>> 2 files changed, 38 insertions(+), 3 deletions(-) > >>> > >>> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > >>> index 014f955967..241c1ff5c5 100644 > >>> --- a/xen/arch/arm/gic-v2.c > >>> +++ b/xen/arch/arm/gic-v2.c > >>> @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) > >>> > >>> static void gicv2_cpu_disable(void) > >>> { > >>> - writel_gicc(0x0, GICC_CTLR); > >>> + uint32_t ctlr =3D readl_gicc(GICC_CTLR); > >>> + > >>> + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) > >>> + { > >>> + ctlr |=3D GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; > >>> + ctlr &=3D ~GICC_CTL_ENABLE; > >>> + } > >>> + else > >>> + { > >>> + ctlr |=3D GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | > >>> + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; > >>> + ctlr &=3D ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); > >>> + } > >> I don't understand why you want to set both G0 and G1, > >> Bits 5-6 in the NS view control Group 1, while the same bits in the > >> Secure/single-security-state view control Group 0. So in the latter ca= se you > >> don't need to set G1. Without security extensions all interrupts are G= 0 and with > >> security extensions (NS access) all interrupts are G1. The spec guaran= tees the > >> functional mapping. > > > > I agree that this is not about Xen using both interrupt groups during > > normal operation. > > > > There are two separate points here. > > > > For the group-enable bits, Xen currently only enables bit 0 in > > gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be cle= ar > > already. However, the old shutdown path wrote 0 to GICC_CTLR, which als= o > > cleared every group-enable bit visible in the current view. Since this > > patch changes the shutdown path from a plain zero write to a > > read/modify/write, I wanted to preserve that part of the old shutdown > > semantics and avoid leaving any normal interrupt delivery enabled in th= e > > common GICC_CTLR view. > > > > For the bypass-disable bits, the reason for setting both groups in the > > single-security-state/common view is the GICv2 bypass logic, not normal > > interrupt delivery. Once the group-enable bits are clear, the CPU > > interface is no longer driving the physical IRQ/FIQ outputs through > > normal GIC delivery. At that point, the bypass-disable bits decide > > whether those outputs are deasserted or driven by the legacy inputs. > > > > For example, with EnableGrp1 =3D=3D 0, EnableGrp0 =3D=3D 0 and FIQEn = =3D=3D 0, > > Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be > > deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and > > FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is wh= y > > the common-view case disables the bypass paths for both groups. > > > > This is also not meant to make FIQ a supported delivery mode for Xen. I= t > > is the opposite: when the CPU interface is disabled, the final state > > should not allow the physical FIQ output to be driven by the legacy > > bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but = Xen > > does not configure FIQ as its normal GICv2 interrupt delivery mode. > > > > So the intent is: > > > > * with Security Extensions, touch only the Non-secure view bits visible > > to Xen; > > * without Security Extensions, preserve the old "no normal delivery" > > shutdown behaviour, while changing the bypass-disable bits so that > > the physical outputs are deasserted rather than falling back to > > legacy bypass. > > > > If you prefer, I can also make v3 more conservative and only clear the > > group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. > > EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The > > bypass-disable bits would still be set for all bypass paths visible in > > the current GICC_CTLR view, because that part is about the physical > > IRQ/FIQ outputs after normal delivery has been disabled, not about whic= h > > interrupt group Xen normally uses. > The bypass argument is valid according to the tables. However, clearing G= 1 is > unnecessary, so it should be dropped. I can do that on commit if you agre= e. With > that: > Reviewed-by: Michal Orzel Yes, I agree. Dropping the unnecessary clearing of G1 on commit is fine wit= h me. Thank you for the review and for taking care of the commit. Best regards, Mykola > > ~Michal > From xen-devel-bounces@lists.xenproject.org Mon May 04 08:21:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:21:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299573.1574106 (Exim 4.92) (envelope-from ) id 1wJoY9-0001XI-4I; Mon, 04 May 2026 08:21:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299573.1574106; Mon, 04 May 2026 08:21:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoY9-0001XB-1W; Mon, 04 May 2026 08:21:09 +0000 Received: by outflank-mailman (input) for mailman id 1299573; Mon, 04 May 2026 08:21:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoY8-0001X5-B9 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:21:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoY7-001Oxm-2T for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:21:07 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f856e7-bab6-0a2a0a5309dd-0a2a4503e41c-44 for ; Mon, 04 May 2026 10:21:06 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f856f2-672d-0a2a45030019-d155802ba43c-3 for ; Mon, 04 May 2026 10:21:06 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4891f625344so39270975e9.0 for ; Mon, 04 May 2026 01:21:06 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:21:06 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 10:21:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] x86/shadow: unlock P2M slightly earlier in shadow_track_dirty_vram() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777882866-2A965938-2BE86944/0/0 X-purgate-type: clean X-purgate-size: 1501 On 27.04.2026 10:47, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 05:49:35PM +0100, Jan Beulich wrote: >> There's no need to call vfree() with the lock still held. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- >> In fact for the purposes of the function the P2M lock could really be >> obtained merely in read mode, and it could be dropped immediately in both >> the main "if()" and its "else if()". If only there wasn't the error >> handling after copy_to_guest(): Dropping the paging lock ahead of that >> call, we rely solely on the P2M lock to also guard the changing of >> d->arch.hvm.dirty_vram.sh and what it points to. Question is why dropping >> the paging lock (but continuing to hold the P2M lock) is necessary there >> in the first place. > > I wouldn't spend a lot of time trying to optimize this, we already > know HVM shadow is ATM not very optimized, and generally recommend > HAP. > > If we could turn the p2m lock into read-mode, maybe at the expense of > expanding the paging locked region that would likely be slightly better? I fear holding the paging lock across copy_to_guest() is a no-go, as a pagefault there could invoke shadow code. Thinking about it, that lock is a recursive one, so it may be possible to leverage that. Would require making sure that all code paths potentially involved in #PF handling would also use the recursive locking form. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 08:39:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:39:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299584.1574124 (Exim 4.92) (envelope-from ) id 1wJoqA-0003Xq-Kp; Mon, 04 May 2026 08:39:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299584.1574124; Mon, 04 May 2026 08:39:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoqA-0003Xj-IE; Mon, 04 May 2026 08:39:46 +0000 Received: by outflank-mailman (input) for mailman id 1299584; Mon, 04 May 2026 08:39:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoq9-0003Xd-BX for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:39:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoq7-00Gi8z-5z for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:39:44 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f85b4c-bab6-0a2a0a5309dd-0a2a4501b3c4-20 for ; Mon, 04 May 2026 10:39:44 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f85b50-c1f2-0a2a45010019-d1558034a5c7-3 for ; Mon, 04 May 2026 10:39:44 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so24459525e9.1 for ; Mon, 04 May 2026 01:39:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:39:44 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 10:39:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/shadow: VRAM last_dirty tagging To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> <8559db88-5f1d-4ced-980c-e71c4e229c7c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777883984-BEA61FF4-11056CE2/0/0 X-purgate-type: clean X-purgate-size: 2888 On 27.04.2026 11:28, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 05:49:55PM +0100, Jan Beulich wrote: >> --- a/xen/arch/x86/mm/shadow/hvm.c >> +++ b/xen/arch/x86/mm/shadow/hvm.c >> @@ -1087,18 +1087,18 @@ int shadow_track_dirty_vram(struct domai >> if ( (dirty_vram->dirty_bitmap = xzalloc_array(uint8_t, dirty_size)) == NULL ) >> goto out_sl1ma; >> >> - dirty_vram->last_dirty = NOW(); >> + dirty_vram->last_dirty = -1; >> >> /* Tell the caller that this time we could not track dirty bits. */ >> rc = -ENODATA; >> } >> - else if ( dirty_vram->last_dirty == -1 ) >> - /* still completely clean, just copy our empty bitmap */ >> - memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >> - else >> + /* Nothing to do when the bitmap is still completely clean. */ >> + else if ( dirty_vram->last_dirty != -1 ) >> { >> mfn_t map_mfn = INVALID_MFN; >> void *map_sl1p = NULL; >> + bool any_dirty = false; >> + s_time_t now; >> >> /* Iterate over VRAM to track dirty bits. */ >> for ( i = 0; i < nr_frames; i++ ) >> @@ -1174,16 +1174,20 @@ int shadow_track_dirty_vram(struct domai >> if ( dirty ) >> { >> dirty_vram->dirty_bitmap[i / 8] |= 1 << (i % 8); >> - dirty_vram->last_dirty = NOW(); >> + any_dirty = true; >> } >> } >> >> + now = NOW(); >> + if ( any_dirty ) >> + dirty_vram->last_dirty = now; > > I'm a bit confused with the setting of ->last_dirty here ... > >> + >> if ( map_sl1p ) >> unmap_domain_page(map_sl1p); >> >> memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >> memset(dirty_vram->dirty_bitmap, 0, dirty_size); > > ... as here the bitmap is zeroed, and hence ->last_dirty should be set > to -1? That's not how I understand the field is used. Aiui it identifies "was clean for more than 2 seconds". That's not the case here. Hence the setting to -1 only conditionally a few lines down from here. >> @@ -1216,6 +1220,7 @@ int shadow_track_dirty_vram(struct domai >> paging_lock(d); >> for ( i = 0; i < dirty_size; i++ ) >> dirty_vram->dirty_bitmap[i] |= dirty_bitmap[i]; >> + dirty_vram->last_dirty = NOW(); > > I think this is doesn't deserve a 'Fixes:' tag because the setting of > ->last_dirty unconditionally to NOW() regardless of whether the bitmap > is zeroed? There was (and is) no unconditional setting of ->last_dirty. Technically maybe a Fixes: tag might be appropriate, but this is an error path which should never be taken (assuming a well behaved DM). Do you think I should dig out the offending commit? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 08:48:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:48:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299593.1574133 (Exim 4.92) (envelope-from ) id 1wJoys-0005HP-HC; Mon, 04 May 2026 08:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299593.1574133; Mon, 04 May 2026 08:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoys-0005HI-Dt; Mon, 04 May 2026 08:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1299593; Mon, 04 May 2026 08:48:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoyq-0005HC-Po for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:48:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoyp-0051Ij-MK for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:48:43 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f85d54-e002-0a2a0a5209dd-0a2a4505aafc-42 for ; Mon, 04 May 2026 10:48:43 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f85d6b-aaa8-0a2a45050019-d1558030a411-3 for ; Mon, 04 May 2026 10:48:43 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891f625344so39629025e9.0 for ; Mon, 04 May 2026 01:48:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:48:42 -0700 (PDT) Message-ID: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Date: Mon, 4 May 2026 10:48:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption To: "Samuel.Montgomery61" References: Content-Language: en-US Cc: "xen-devel@lists.xenproject.org" From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1777884523-E3B60443-6D2E7520/0/0 X-purgate-type: clean X-purgate-size: 2787 On 04.05.2026 05:24, Samuel.Montgomery61 wrote: > Hello, > > Xen's boot-time memory scrub is one of the more time-consuming steps > during boot, particularly on systems with large amounts of RAM. I'd > like to propose skipping it on systems with hardware full-memory > encryption (e.g., Intel TME, AMD TSME). > > These features encrypt all DRAM transparently using an ephemeral key > generated by the CPU at each boot. The key is not accessible to > software and does not persist across reboots. This means residual data > from any previous session where encryption was active is unreadable -- > the same property that boot scrubbing exists to provide. > > The important nuance is that Xen needs to confirm encryption has been > continuously active since the last scrub, not just that it is active > now. If encryption was only recently enabled in firmware, residual > plaintext from prior unencrypted sessions could still be present in > pages that were never overwritten. Possible approaches: > > - Record "encryption active" to an EFI variable each boot; skip the > scrub only if the flag is present from the previous boot. > - Expose a command-line option for administrators to assert that > encryption has been consistently enabled. As you point out, there are issues with default-disabling. We already have the "bootscrub=" command line option. Is there a reason this can't be used here as well? I.e. is there a strong reason to put in (perhaps significant) effort to identify and cover all the corner cases associated with default-disabling? Jan > - Some combination of the two. > > The optimization would apply only to the cross-reboot case. Runtime > scrubbing when domains shut down would be unaffected, since all domains > share the same key during a running session. > > Edge cases worth considering: > > - Memory written by firmware before encryption activation. > - Crash/kexec without a full hardware reset (key may not change). > - Suspend/resume (some implementations restore the prior key). > - Interaction with existing bootscrub= command-line options. > > As a broader note, multi-key extensions to full-memory encryption (such > as those used by AMD SEV and Intel TME-MK) could eventually eliminate > the need for runtime scrubbing as well, by giving each domain its own > key. This is relevant to the confidential computing work currently > underway (Teddy Astie's recent AMD SEV RFC), though the boot-scrub > optimization proposed here is independent and much simpler. > > Feedback welcome on whether the reasoning is sound and whether there > are edge cases I've missed. > > Thanks, > > Sam > > ps. I'm not subscribed to the list, so please CC me in replies. > From xen-devel-bounces@lists.xenproject.org Mon May 04 09:02:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:02:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299602.1574141 (Exim 4.92) (envelope-from ) id 1wJpBg-000818-Hu; Mon, 04 May 2026 09:02:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299602.1574141; Mon, 04 May 2026 09:02:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpBg-000811-FL; Mon, 04 May 2026 09:02:00 +0000 Received: by outflank-mailman (input) for mailman id 1299602; Mon, 04 May 2026 09:01:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpBf-00080t-4f for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:01:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpBd-001aH3-9a for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:01:57 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f86079-5cb7-0a2a0a5109dd-0a2a450ad4a6-38 for ; Mon, 04 May 2026 11:01:57 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f86085-56b3-0a2a450a0019-d155802ff067-3 for ; Mon, 04 May 2026 11:01:57 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488d2079582so41666985e9.2 for ; Mon, 04 May 2026 02:01:57 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:01:56 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 11:02:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/9] x86/mwait-idle: arrange for BSP MSR adjustments during S3 resume To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777885317-CDD688B7-9C43BF84/0/0 X-purgate-type: clean X-purgate-size: 3198 On 24.04.2026 16:34, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:54:30PM +0100, Jan Beulich wrote: >> mwait_idle_cpu_init() is only called for APs, yet MSR writes will >> typically need re-doing post-S3 even for the BSP. When multiple cores / >> threads are present (and to come back online) in a package, for package >> scope MSRs this may be covered by APs doing the writes, but we can't rely >> on that. >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/arch/x86/acpi/power.c >> +++ b/xen/arch/x86/acpi/power.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -299,6 +300,7 @@ static int enter_state(u32 state) >> acpi_sleep_post(state); >> if ( hvm_cpu_up() ) >> BUG(); >> + mwait_idle_resume(); >> cpufreq_add_cpu(0); >> >> enable_cpu: >> --- a/xen/arch/x86/cpu/mwait-idle.c >> +++ b/xen/arch/x86/cpu/mwait-idle.c >> @@ -1680,6 +1680,28 @@ static int __init mwait_idle_probe(void) >> return 0; >> } >> >> +static void mwait_idle_cpu_tweak(unsigned int cpu) >> +{ >> + if (icpu->auto_demotion_disable_flags) >> + on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); >> + >> + if (icpu->byt_auto_demotion_disable_flag) >> + on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); >> + >> + switch (icpu->c1e_promotion) { >> + case C1E_PROMOTION_DISABLE: >> + on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); >> + break; >> + >> + case C1E_PROMOTION_ENABLE: >> + on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); >> + break; >> + >> + case C1E_PROMOTION_PRESERVE: >> + break; >> + } >> +} >> + >> static int cf_check mwait_idle_cpu_init( >> struct notifier_block *nfb, unsigned long action, void *hcpu) >> { >> @@ -1762,24 +1784,7 @@ static int cf_check mwait_idle_cpu_init( >> dev->count++; >> } >> >> - if (icpu->auto_demotion_disable_flags) >> - on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); >> - >> - if (icpu->byt_auto_demotion_disable_flag) >> - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); >> - >> - switch (icpu->c1e_promotion) { >> - case C1E_PROMOTION_DISABLE: >> - on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); >> - break; >> - >> - case C1E_PROMOTION_ENABLE: >> - on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); >> - break; > > I'm possibly missing some context here, but why do we use > on_selected_cpus and the CPU_ONLINE hook? Won't it be easier to use > CPU_STARTING and avoid the use of on_selected_cpus(), as CPU_STARTING > runs in the context of the CPU being onlined. CPU_STARTING happens pretty early, e.g. before IRQs are first enabled. I consider use of that notifier to generally be restricted to pretty special purposes. But yes, technically switching over may be possible. However, in any event what you're suggesting is imo an entirely separate change. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 09:07:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:07:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299609.1574150 (Exim 4.92) (envelope-from ) id 1wJpGc-00007a-33; Mon, 04 May 2026 09:07:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299609.1574150; Mon, 04 May 2026 09:07:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpGb-00007T-WE; Mon, 04 May 2026 09:07:06 +0000 Received: by outflank-mailman (input) for mailman id 1299609; Mon, 04 May 2026 09:07:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpGa-00007N-3d for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:07:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpGZ-0056Pn-BI for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:07:03 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f861b5-e002-0a2a0a5209dd-0a2a4508a590-8 for ; Mon, 04 May 2026 11:07:03 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f861b7-63b5-0a2a45080019-d155802dc17f-3 for ; Mon, 04 May 2026 11:07:03 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4838c15e3cbso29743715e9.3 for ; Mon, 04 May 2026 02:07:03 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:07:02 -0700 (PDT) Message-ID: <64d45064-de32-47f3-b4b8-809b3cc4cc16@suse.com> Date: Mon, 4 May 2026 11:07:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/9] x86/mwait-idle: clean up BYT/CHT auto demotion disable To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777885623-C3171DB1-EA58A83C/0/0 X-purgate-type: clean X-purgate-size: 914 On 24.04.2026 16:47, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:54:56PM +0100, Jan Beulich wrote: >> @@ -1700,12 +1694,24 @@ static void mwait_idle_cpu_tweak(unsigne >> case C1E_PROMOTION_PRESERVE: >> break; >> } >> + >> + /* Pkg-scope MSRs on 1-socket-only systems need writing only once. */ >> + if (!bsp) >> + return; >> + >> + switch (boot_cpu_data.vfm) { >> + case INTEL_ATOM_SILVERMONT: >> + case INTEL_ATOM_AIRMONT: >> + byt_cht_auto_demotion_disable(); >> + break; >> + } >> } >> >> static int cf_check mwait_idle_cpu_init( >> struct notifier_block *nfb, unsigned long action, void *hcpu) >> { >> unsigned int cpu = (unsigned long)hcpu, cstate; >> + static bool first; > > I think you want to init first = true here, so that after the first > call to mwait_idle_cpu_tweak() it gets set to false for future calls? Ouch, yes, definitely. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 09:14:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:14:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299618.1574159 (Exim 4.92) (envelope-from ) id 1wJpNa-0001nF-O6; Mon, 04 May 2026 09:14:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299618.1574159; Mon, 04 May 2026 09:14:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpNa-0001n8-LU; Mon, 04 May 2026 09:14:18 +0000 Received: by outflank-mailman (input) for mailman id 1299618; Mon, 04 May 2026 09:14:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpNZ-0001n2-Jr for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:14:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpNY-0058hn-Ha for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:14:16 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f86367-e002-0a2a0a5209dd-0a2a4508e3dc-6 for ; Mon, 04 May 2026 11:14:16 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f86368-63b5-0a2a45080019-d155dd2bc8b3-3 for ; Mon, 04 May 2026 11:14:16 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d77f6092eso2244818f8f.2 for ; Mon, 04 May 2026 02:14:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:14:15 -0700 (PDT) Message-ID: <98c6c506-59eb-4b5d-bfae-6d92d9bb777d@suse.com> Date: Mon, 4 May 2026 11:14:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/9] x86/mwait-idle: drop const from struct cpuidle_state arrays To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> <5516d0a1-8fac-48ff-bbe1-85726b730e94@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777886056-3B370DB1-5F4B2BCE/0/0 X-purgate-type: clean X-purgate-size: 787 On 24.04.2026 19:57, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:57:18PM +0100, Jan Beulich wrote: >> A subsequent change will want to be able to alter them based on a new >> command line option. (Note that some were __ro_after_init already.) >> >> Signed-off-by: Jan Beulich > > I wonder if we could also move all the cstate tables to .init section, > as after boot we would only use one of those. I think we could, at the price of introducing a compile-time upper bound to the size of those arrays. We'd need to copy the one we want to use at runtime, and hence we'd need to reserve enough space (or use a runtime allocation). > Anyway, for the change > here: > > Acked-by: Roger Pau Monné Thanks. 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However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a Ctype value of 0b000 while reading from Ctype1 upwards, no caches manageable by the architected set/way maintenance instructions exist at further-out levels, and the higher Ctype fields must be ignored. The current reverse scan can therefore select a unified cache level from a Ctype field above the first no-cache level. Such a field is not part of the architecturally described CLIDR/CCSIDR cache hierarchy and should not be used for selecting the CCSIDR level. Scan Ctype fields from L1 upwards, stop at the first no-cache level, and keep the outermost unified cache observed before that point. This preserves the result for regular cache hierarchies, while avoiding selection of an architecturally ignored Ctype field. Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on arm64") Signed-off-by: Mykola Kvach --- This patch follows the xen-devel discussion: https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.html In that thread, Michal noted that the reverse scan was a simplification rather than an intentional requirement, and that changing the implementation would be fine. Testing performed: - standalone synthetic CLIDR tests covered both regular and pathological Ctype sequences and showed that the forward scan ignores unified cache levels above the first Ctype == 0b000 while the reverse scan can pick them - Renesas H3ULCB booted with llc-coloring=on --- xen/arch/arm/llc-coloring.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c index 6f78817c57..3783f4c824 100644 --- a/xen/arch/arm/llc-coloring.c +++ b/xen/arch/arm/llc-coloring.c @@ -22,21 +22,33 @@ unsigned int __init get_llc_way_size(void) register_t id_aa64mmfr2_el1 = READ_SYSREG(ID_AA64MMFR2_EL1); uint32_t ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT; uint32_t ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK; - unsigned int n, line_size, num_sets; - - for ( n = CLIDR_CTYPEn_LEVELS; n != 0; n-- ) + unsigned int n, line_size, num_sets, llc_level = 0; + + /* + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Once a + * no-cache level is seen, higher Ctype fields are architecturally ignored + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. + * + * Keep the outermost unified cache before that point. + */ + for ( n = 1; n <= CLIDR_CTYPEn_LEVELS; n++ ) { uint8_t ctype_n = (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & CLIDR_CTYPEn_MASK; + if ( ctype_n == 0b000 ) + break; + /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ if ( ctype_n == 0b100 ) - break; + llc_level = n; } - if ( n == 0 ) + if ( !llc_level ) return 0; + n = llc_level; + WRITE_SYSREG((n - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); isb(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 04 09:29:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:29:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299634.1574178 (Exim 4.92) (envelope-from ) id 1wJpcK-0004Gv-A4; Mon, 04 May 2026 09:29:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299634.1574178; Mon, 04 May 2026 09:29:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpcK-0004Go-6R; Mon, 04 May 2026 09:29:32 +0000 Received: by outflank-mailman (input) for mailman id 1299634; Mon, 04 May 2026 09:29:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpcJ-0004Gi-3I for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:29:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpcI-008Egl-0V for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:29:30 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f866f3-e002-0a2a0a5209dd-0a2a4504e994-32 for ; Mon, 04 May 2026 11:29:29 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f866f9-1dec-0a2a45040019-d1558029d133-3 for ; Mon, 04 May 2026 11:29:29 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891cd41959so30884935e9.3 for ; Mon, 04 May 2026 02:29:29 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:29:29 -0700 (PDT) Message-ID: <45103b7e-301f-4769-bfdb-1b8b5a4a4fb3@suse.com> Date: Mon, 4 May 2026 11:29:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/9] x86/mwait-idle: Add cmdline option to adjust C-states table To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777886969-2AF653FF-B74C191C/0/0 X-purgate-type: clean X-purgate-size: 4464 On 24.04.2026 21:10, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:57:53PM +0100, Jan Beulich wrote: >> --- a/docs/misc/xen-command-line.pandoc >> +++ b/docs/misc/xen-command-line.pandoc >> @@ -1928,6 +1928,23 @@ Print boot time MTRR state. >> Use the MWAIT idle driver (with model specific C-state knowledge) instead >> of the ACPI based one. >> >> +### mwait-idle.table (x86) > > The .table suffix is kind of weird, as we don't use it elsewhere. It > might feel more natural given the naming of the existing command line > options to use mwait-idle-table? I thought it might be better to follow the Linux way of naming per-module sub-options, when we "inherit" them. See also "mtrr.show". >> +static void __init cmdline_table_adjust(void) >> +{ >> + char *args = cmdline_table_str; >> + struct cpuidle_state *state; >> + unsigned int i, state_count; >> + >> + if (args[0] == '\0') >> + /* The 'mwait-idle.table' module parameter was not specified */ >> + return; >> + >> + /* Create a copy of the C-states table */ >> + for (i = 0; >> + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; >> + i++) >> + cmdline_states[i] = icpu.state_table[i]; >> + >> + state_count = i; >> + >> + /* >> + * Adjust the C-states table copy with data from the 'mwait-idle.table' >> + * module parameter. >> + */ >> + while (args) { >> + char *fields, *name, *val; >> + >> + /* >> + * Get the next C-state definition, which is expected to be >> + * '::'. Treat "empty" >> + * fields as unchanged. For example, >> + * '::' leaves the latency unchanged. >> + */ >> + args = get_cmdline_field(args, &fields, ','); >> + >> + /* name */ >> + fields = get_cmdline_field(fields, &name, ':'); >> + if (!fields) >> + goto error; >> + >> + /* Find the C-state by its name */ >> + state = NULL; >> + for (i = 0; i < state_count; i++) { >> + if (!strcmp(name, cmdline_states[i].name)) { >> + state = &cmdline_states[i]; >> + break; >> + } >> + } >> + >> + if (!state) { >> + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", >> + name); >> + continue; >> + } >> + >> + /* Latency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + goto error; >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->exit_latency = n; >> + if (*end || state->exit_latency != n) >> + goto error; >> + } >> + >> + /* Target residency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->target_residency = n; >> + if (*end || state->target_residency != n) >> + goto error; >> + } >> + >> + /* >> + * Allow for 3 more fields, but ignore them. Helps to make >> + * possible future extensions of the cmdline format backward >> + * compatible. >> + */ >> + for (i = 0; fields && i < 3; i++) { >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + break; >> + } > > This seems a bit arbitrary for my taste. I would rather ignore the > extra fields (and print a message about it), and proceed with the next > state. I think we want to stick to the original Linux behavior here. If you think that wants adjustment, imo doing so would call for going through Linux first. >> + >> + if (fields) { >> + printk(XENLOG_ERR PREFIX >> + "Too many fields for C-state '%s'\n", >> + state->name); >> + goto error; >> + } >> + >> + printk(XENLOG_INFO PREFIX >> + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", >> + state->name, state->exit_latency, state->target_residency); >> + } >> + >> + /* Copy the adjusted C-states table back */ >> + for (i = 0; i < state_count; i++) >> + icpu.state_table[i] = cmdline_states[i]; >> + >> + printk(XENLOG_INFO PREFIX >> + "Adjusted C-states with data from 'mwait-idle.table'\n"); >> + return; >> + >> + error: >> + printk(PREFIX > > XENLOG_ERR maybe? It's pr_info() in the Linux original, so ERR would feel like going too far. And WARNING is the default anyway. I can switch to XENLOG_WARNING if you think we want to make this explicit. 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Mon, 04 May 2026 02:34:30 -0700 (PDT) Message-ID: <57233a5d-3944-433c-a7c5-a1a491a2c1dd@suse.com> Date: Mon, 4 May 2026 11:34:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 9/9] x86/mwait-idle: Add C-states validation To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777887271-45F698B7-55AD6BBB/0/0 X-purgate-type: clean X-purgate-size: 1886 On 24.04.2026 21:15, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:58:21PM +0100, Jan Beulich wrote: >> @@ -1589,6 +1594,41 @@ static char *__init get_cmdline_field(ch >> } >> >> /** >> + * validate_cmdline_cstate - Validate a C-state from cmdline. >> + * @state: The C-state to validate. >> + * @prev_state: The previous C-state in the table or NULL. >> + * >> + * Return: 0 if the C-state is valid or -EINVAL otherwise. > > Hm, I know we picked this up from upstream, but this function would > better return a boolean, rather than 0 or -EINVAL. I agree, but I didn't want to deviate from their code purely for cosmetic reasons. >> +static int __init validate_cmdline_cstate(struct cpuidle_state *state, >> + struct cpuidle_state *prev_state) >> +{ >> + if (state->exit_latency == 0) >> + /* Exit latency 0 can only be used for the POLL state */ >> + return -EINVAL; >> + >> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) >> + return -EINVAL; >> + >> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) >> + return -EINVAL; >> + >> + if (state->target_residency < state->exit_latency) >> + return -EINVAL; >> + >> + if (!prev_state) >> + return 0; >> + >> + if (state->exit_latency <= prev_state->exit_latency) >> + return -EINVAL; >> + >> + if (state->target_residency <= prev_state->target_residency) >> + return -EINVAL; > > I'm not an expert on C-states, but isn't this checking against the > previous value kind of defeating part of the purpose of the command > line? I don't know. The question would need raising to the author. > Also, it might help to also write down those limits in the command > line documentation. What do you mean there? Some of the values are universal, but some checks are against model-specific values. I don't think you mean to enumerate them all? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 10:35:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 10:35:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299655.1574204 (Exim 4.92) (envelope-from ) id 1wJqe5-0005KT-0r; Mon, 04 May 2026 10:35:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299655.1574204; Mon, 04 May 2026 10:35:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqe4-0005KM-US; Mon, 04 May 2026 10:35:24 +0000 Received: by outflank-mailman (input) for mailman id 1299655; Mon, 04 May 2026 10:35:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqe3-0005KG-O7 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:35:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJqe3-00FhK1-3w for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:35:23 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87661-2eae-0a2a0a5409dd-0a2a4504b17c-16 for ; Mon, 04 May 2026 12:35:22 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8766a-1dec-0a2a45040019-d155802ee9e5-3 for ; Mon, 04 May 2026 12:35:22 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4891d7164ddso19443815e9.3 for ; Mon, 04 May 2026 03:35:22 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <60c94a2c-a414-4ba5-b22e-54beae3c25f3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777890922-28B733FF-6534CF25/0/0 X-purgate-type: clean X-purgate-size: 1987 On 24.04.2026 11:18, Andrew Cooper wrote: > On 22/04/2026 5:58 pm, Teddy Astie wrote: >> XSA-9 mitigations prevents Xen from properly running if a affected CPU >> is detected. While the vulnerability has no mitigations (aside not running >> 64-bits PV guests), it's only outcome is a DoS. >> >> There is no real point in preventing Xen from working here and it would >> be preferable to just log the vulnerability to the user so it can act >> appropriately. >> >> Also reword the errata message regarding that it only affects PV64 guests. >> >> Signed-off-by: Teddy Astie >> --- >> It's hard to tell whether or not we would want to drop allow_unsafe, but >> currently, Xen is allowed to boot with XSA-304 mitigations disabled >> (intentionnaly) which has a similar outcome than this one. >> >> From a user standpoint, preventing the system to boot or starting guests is >> too extreme and would be in practice seen as a bug, even if it's justified >> policy which can be overriden. > > There is a lot of history here, including for why the panic() is > actually completely unreachable. Deliberately so, as described in 0c7a69665110: The change done allows for a trivial 1-line change restoring prior default behavior (in distros which may want this). > I actually have a very similar patch, from almost certainly more than a > decade ago.  The difference is that now I'm a maintainer and in a better > position to say that this logic really shouldn't have been taken; > certainly not in this form. > > Perhaps an easier justification is that there have been issues like AMD > erratum #121 prior (e.g. Pentium LOCK CMPXCHG) and post (Zen1 has a > related errata, can't remember it off the top of my head) that went > unaddressed. I agree it would be better if we were consistent in treatment of errata (somewhat) similar in effect. I'm less sure which direction we should go in order to achieve consistency. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1776877188.8631fc262581453bbf619ec5b2062170.19db6223737000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777891053-7ED77F3B-DB7FA3D0/0/0 X-purgate-type: clean X-purgate-size: 1244 On 22.04.2026 18:58, Teddy Astie wrote: > @@ -1205,19 +1201,12 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) > if (c->family == 0x10) > __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); > > - if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) > - opt_allow_unsafe = 1; > - else if (opt_allow_unsafe < 0) > - panic("Xen will not boot on this CPU for security reasons" > - "Pass \"allow_unsafe\" if you're trusting all your" > - " (PV) guest kernels.\n"); > - else if (!opt_allow_unsafe && c == &boot_cpu_data) > + if (cpu_has_amd_erratum(c, AMD_ERRATUM_121)) > + { Nit: Misplaced brace (it's Linux style here). But really I don't see why braces are added in the first place. > printk(KERN_WARNING > - "*** Xen will not allow creation of DomU-s on" > - " this CPU for security reasons. ***\n" > - KERN_WARNING > - "*** Pass \"allow_unsafe\" if you're trusting" > - " all your (PV) guest kernels. ***\n"); > + "*** This CPU is affected with erratum 121" > + " 64-bits PV guests are able to cause a DoS (XSA-9) ***\n"); Why the change in indentation? There's also punctuation missing between both parts of the log message. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 10:45:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 10:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299672.1574222 (Exim 4.92) (envelope-from ) id 1wJqnd-0007Uz-4m; Mon, 04 May 2026 10:45:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299672.1574222; Mon, 04 May 2026 10:45:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqnd-0007Us-1B; Mon, 04 May 2026 10:45:17 +0000 Received: by outflank-mailman (input) for mailman id 1299672; Mon, 04 May 2026 10:45:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqnc-0007Ul-2Z for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:45:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJqnb-005Qt3-0T for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:45:15 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f878b4-5cb7-0a2a0a5109dd-0a2a450487b0-12 for ; Mon, 04 May 2026 12:45:14 +0200 Received: from [209.85.221.48] (helo=mail-wr1-f48.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f878ba-1dec-0a2a45040019-d155dd30dc50-3 for ; Mon, 04 May 2026 12:45:14 +0200 Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-44a044cb827so2550517f8f.0 for ; Mon, 04 May 2026 03:45:14 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 03:45:14 -0700 (PDT) Message-ID: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Date: Mon, 4 May 2026 12:45:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777891514-2B96A3FF-1F20E47F/0/0 X-purgate-type: clean X-purgate-size: 1038 On 28.04.2026 09:48, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> This series introduces initial Q35 chipset support for HVM guests, based on the >> patchset at [1] by Alexey Gerasimenko. >> >> Basic support means that this patchset allows to start an HVM guest that >> emulates a Q35 chipset via Qemu and implements access to PCIe extended >> configuration space for such devices emulated by Qemu. >> >> Support for PCIe device passthrough is not implemented yet. This is planned but >> implies modifications in the hypervisor and the firmwares, mainly for the >> support of multiple PCI buses. > > Why do you need multi bus support to expose PCIe capabilities? I'm > not seeing the relation between those two. You could still expose a > single bus on the MCFG table. Can a valid PCIe topology be expressed with just bus 0? If an endpoint to be handed to a guest isn't root complex integrated, would it be valid to make it appear so by putting it on bus 0? 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Mon, 04 May 2026 03:58:06 -0700 (PDT) Message-ID: <40c2ea90-e3ab-4d4d-b8a9-8d8efb2869ff@suse.com> Date: Mon, 4 May 2026 12:58:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/17] hvmloader: add function to set the emulated machine type (i440/Q35) To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-4-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777892287-16C64C48-961970F4/0/0 X-purgate-type: clean X-purgate-size: 2888 On 28.04.2026 12:39, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/pci_regs.h >> +++ b/tools/firmware/hvmloader/pci_regs.h >> @@ -107,6 +107,10 @@ >> >> #define PCI_INTEL_OPREGION 0xfc /* 4 bits */ >> >> +#define PCI_VENDOR_ID_INTEL 0x8086 >> +#define PCI_DEVICE_ID_INTEL_82441 0x1237 >> +#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0 > > In Xen we have a separate file for vendor and device IDs, called > pci_ids.h. Maybe it would be better to use a similar approach in > hvmloader, and keep pci_regs.h only containing PCI register offsets. Can't hvmloader simply re-use Xen's header(s)? >> --- a/tools/firmware/hvmloader/util.c >> +++ b/tools/firmware/hvmloader/util.c >> @@ -22,6 +22,7 @@ >> #include "hypercall.h" >> #include "ctype.h" >> #include "vnuma.h" >> +#include "pci_regs.h" >> #include >> #include >> #include >> @@ -648,6 +649,47 @@ void __bug(const char *file, int line) >> crash(); >> } >> >> +machine_type_t machine_type; >> + >> +void init_pc_machine_type(void) > > Since detection is done based on PCI device IDs, it might be better > placed in pci.c, and so you don't need to include pci_regs.h in > util.c. > >> +{ >> + uint16_t vendor_id; >> + uint16_t device_id; >> + >> + if ( machine_type != MACHINE_TYPE_UNDEFINED ) >> + return; >> + >> + vendor_id = pci_readw(0, PCI_VENDOR_ID); >> + device_id = pci_readw(0, PCI_DEVICE_ID); >> + >> + /* only Intel platforms are emulated currently */ >> + if ( vendor_id != PCI_VENDOR_ID_INTEL ) >> + goto error; >> + >> + switch ( device_id ) >> + { >> + case PCI_DEVICE_ID_INTEL_82441: >> + machine_type = MACHINE_TYPE_I440; >> + printf("Detected i440 chipset\n"); >> + break; >> + >> + case PCI_DEVICE_ID_INTEL_Q35_MCH: >> + machine_type = MACHINE_TYPE_Q35; >> + printf("Detected Q35 chipset\n"); >> + break; >> + >> + default: >> + goto error; >> + } >> + >> + return; >> + >> +error: >> + printf("Unknown emulated chipset encountered, VID=%04Xh, DID=%04Xh\n", > > We don't usually use the h suffix in hex numbers in hvmloader, it's > more common to prefix them with 0x, so I would recommend to use the %#06x > formatter instead. I'd generally advise against use of # with a width specifier, as that ends up awkward for 0. That is, %#x is fine and generally to be preferred, but for a specific with it might better be 0x%0x (with n=4 here). Arguably here we don't really expect either of the values to be 0, so the suggested use may indeed be okay in this case (while still introducing an example which later may be copied elsewhere without much thought). Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 11:09:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 11:09:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299692.1574242 (Exim 4.92) (envelope-from ) id 1wJrBC-0002im-71; Mon, 04 May 2026 11:09:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299692.1574242; Mon, 04 May 2026 11:09:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrBC-0002if-40; Mon, 04 May 2026 11:09:38 +0000 Received: by outflank-mailman (input) for mailman id 1299692; Mon, 04 May 2026 11:09:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrBA-0002iZ-Ml for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:09:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJrB9-005XRw-JW for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:09:35 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87e6e-e002-0a2a0a5209dd-0a2a450adfcc-4 for ; Mon, 04 May 2026 13:09:35 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f87e6f-56b3-0a2a450a0019-d155802ee4e2-3 for ; Mon, 04 May 2026 13:09:35 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488ad135063so35221425e9.0 for ; Mon, 04 May 2026 04:09:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 04:09:34 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 13:09:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/17] xev/hvm: Add HVMOP_get|set_ecam_space hypercalls To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-10-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777892975-453638B7-FCB79E61/0/0 X-purgate-type: clean X-purgate-size: 2590 On 28.04.2026 15:59, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:03PM +0000, Thierry Escande wrote: >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -5195,6 +5195,58 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg) >> rc = current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_op(arg); >> break; >> >> + case HVMOP_set_ecam_space: { >> + xen_hvm_ecam_space_t ecam; >> + struct domain *d; >> + >> + if ( copy_from_guest( &ecam, guest_handle_cast(arg, xen_hvm_ecam_space_t), 1 ) ) > ^ extra space, here and at the > closing parenthesis. > > Line length is also past the 80 character limit, same below in > HVMOP_get_ecam_space. > >> + return -EFAULT; > > This operation (and the matching get variant) needs an XSM check. > >> + >> + d = rcu_lock_domain_by_any_id(ecam.domid); >> + if ( d == NULL ) >> + return -ESRCH; >> + >> + if ( d->arch.ecam_addr ) { > > Coding style, opening braces should be on a new line. > >> + rcu_unlock_domain(d); >> + return -EFAULT; > > This would better return -EBUSY I agree, yet I'd like to suggest that this may want changing further: If one can "set" the address, shouldn't one also be able to "clear" it? That could (pretty) naturally be expressed by ecam.addr being 0 in the request. Which would then require permitting non-0 .ecam_addr in that specific case. >> + if ( (ecam.size >> 28) || (!ecam.addr) ) { > ^ the parenthesis here are > unneeded. > >> + rcu_unlock_domain(d); >> + return -EINVAL; >> + } >> + >> + d->arch.ecam_addr = ecam.addr; >> + d->arch.ecam_size = ecam.size; > > I'm a bit worried about a domain being able to set it's own ECAM hole, > assessing all the side-effects of this might be complex. > > Won't the code here better check the region passed in the hypercall is > indeed not mapped in the p2m, so that trapping of ECAM accesses works > as expected? > > Also, how does the ECAM hole get setup on native? I assume there are > some magic registers in the PCI config space of a platform device that > the firmware uses to position the ECAM space? That may even be outside of any device's config space, e.g. custom MMIO. I didn't check, but I guess that may also be the case for Q35. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 11:11:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 11:11:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299702.1574252 (Exim 4.92) (envelope-from ) id 1wJrD7-0004Ej-O5; Mon, 04 May 2026 11:11:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299702.1574252; Mon, 04 May 2026 11:11:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrD7-0004Ec-Jh; Mon, 04 May 2026 11:11:37 +0000 Received: by outflank-mailman (input) for mailman id 1299702; Mon, 04 May 2026 11:11:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrD6-0004EU-Py for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:11:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJrD6-008du0-5K for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:11:36 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87edb-e002-0a2a0a5209dd-0a2a45019314-18 for ; Mon, 04 May 2026 13:11:36 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f87ee7-c1f2-0a2a45010019-d1558030c577-3 for ; Mon, 04 May 2026 13:11:36 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so19585905e9.1 for ; Mon, 04 May 2026 04:11:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 04:11:35 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 13:11:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-12-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777893096-AFF50FF4-589AEF2C/0/0 X-purgate-type: clean X-purgate-size: 2387 On 29.04.2026 11:29, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:04PM +0000, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/pci.c >> +++ b/tools/firmware/hvmloader/pci.c >> @@ -413,6 +413,58 @@ void pci_setup(void) >> pci_devfn_decode_type[devfn] |= PCI_COMMAND_MASTER; >> } >> >> + /* >> + * Calculate MMCONFIG area size and squeeze it into the bars array >> + * for assigning a slot in the MMIO hole >> + */ >> + if ( is_running_on_q35 ) >> + { >> + /* disable PCIEXBAR decoding for now */ >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); >> + >> + switch ( PCI_MAX_MCFG_BUSES ) >> + { >> + case 64: >> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(64); >> + break; >> + >> + case 128: >> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(128); >> + break; >> + >> + case 256: >> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(256); >> + break; >> + >> + default: >> + /* unsupported number of buses specified */ >> + BUG(); >> + } >> + >> + addr_mask = ~(bar_sz - 1); >> + >> + for ( i = 0; i < nr_bars; i++ ) >> + if ( bars[i].bar_sz < bar_sz ) >> + break; >> + >> + if ( i != nr_bars ) >> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); >> + >> + bars[i].is_mem = 1; >> + bars[i].devfn = PCI_MCH_DEVFN; >> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; >> + bars[i].bar_sz = bar_sz; >> + bars[i].addr_mask = addr_mask; >> + bars[i].bar_data = bar_data; >> + >> + mmio_total += bar_sz; >> + nr_bars++; >> + } > > I think it might be best if the ECAM fake BAR is the first element in > the bars array, so we ensure it's the first item to consume memory > from the low MMIO hole. Not sure how that will work with the current > sorting of the resources based on their size, but it's imperative for > hvmloader to attempt to position ECAM ahead of the other device > resources IMO. Why would this be? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260430114647.94526-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777894286-E2969443-43CF1002/0/0 X-purgate-type: clean X-purgate-size: 1562 On 30.04.2026 13:46, Roger Pau Monne wrote: > Uninitialized cpu_data[] entries have the apicid field set to BAD_APICID, > not boot_cpu_data.apicid. Fix the check in cpu_smpboot_free() to use the > correct condition. > > Fixes: 7126b7f806d5 ("x86/CPU: re-work populating of cpu_data[]") I think this isn't correct, and the issue here is me having overlooked a dependency between that commit and the one introducing the line which you change: 8c15d3d18725 ("x86/SMP: guard socket_cpumask[] access in cpu_smpboot_free()"). Both changes were committed close together, but they were entirely separate submissions (well over a year apart). Hence as an individual patch that latter commit was correct, but on top of 7126b7f806d5 it would have needed adjustment. Since 7126b7f806d5 wasn't backported (while 8c15d3d18725 was), the fix here also shouldn't be backported to anything earlier than 4.21 (which indeed the Fixes: tag better expresses). Jan > --- a/xen/arch/x86/smpboot.c > +++ b/xen/arch/x86/smpboot.c > @@ -961,8 +961,7 @@ static void cpu_smpboot_free(unsigned int cpu, bool remove) > * In that case the socket number cannot be relied upon, but the respective > * socket_cpumask[] slot also wouldn't have been set. > */ > - if ( c[cpu].apicid != boot_cpu_data.apicid && > - cpumask_empty(socket_cpumask[socket]) ) > + if ( c[cpu].apicid != BAD_APICID && cpumask_empty(socket_cpumask[socket]) ) > { > xfree(socket_cpumask[socket]); > socket_cpumask[socket] = NULL; From xen-devel-bounces@lists.xenproject.org Mon May 04 12:22:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:22:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299725.1574268 (Exim 4.92) (envelope-from ) id 1wJsJ5-00054f-Q5; Mon, 04 May 2026 12:21:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299725.1574268; Mon, 04 May 2026 12:21:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsJ5-00054Y-NN; Mon, 04 May 2026 12:21:51 +0000 Received: by outflank-mailman (input) for mailman id 1299725; Mon, 04 May 2026 12:21:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wJsJ4-00054S-7H for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:21:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJsJ3-00AA5l-JJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:21:49 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f88f5b-bab6-0a2a0a5309dd-0a2a4504d154-14 for ; Mon, 04 May 2026 14:21:49 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f88f5d-1dec-0a2a45040019-d1558034c0ad-3 for ; Mon, 04 May 2026 14:21:49 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso35344395e9.2 for ; Mon, 04 May 2026 05:21:49 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7c91e1a705e1046be4af1c5671a8d91cf3557013.1777296786.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777897309-291763FF-8F5BC056/10/73395122804 X-purgate-type: spam X-purgate-size: 2577 On 27.04.2026 17:34, Oleksii Kurochko wrote: > As domain type is part of common code now there is no any reason > to have architecture-specific set_domain_type() functions so > it is dropped. > > Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE > for consistency. Also, drop and add some parentheses to be aligned > with the similar if() below. > > x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as > x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no > longer builds, the fallback is currently only relevant for arm32. > > Signed-off-by: Oleksii Kurochko > Reviewed-by: Michal Orzel In principle: Acked-by: Jan Beulich However, still a few remarks: > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -13,6 +13,19 @@ struct guest_area { > void *map; > }; > > +#ifdef CONFIG_HAS_DOMAIN_TYPE > +enum __packed domain_type { > + DOMAIN_32BIT, > + DOMAIN_64BIT, > +}; > +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) > +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) > +#elif !defined(CONFIG_64BIT) > +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ > +#define is_32bit_domain(d) (true) > +#define is_64bit_domain(d) (false) I think it would be nice if the excess parentheses were dropped from here. > --- a/xen/include/xen/fdt-domain-build.h > +++ b/xen/include/xen/fdt-domain-build.h > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > > struct domain; > @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) > return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; > } > > +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) Pointer-to-const for the 2nd parameter? > +{ > +#ifdef CONFIG_HAS_DOMAIN_TYPE > + /* Type must be set before allocate memory */ This comment would be more prominent if it lived outside of the #ifdef, perhaps (read on) ahead of the function. I wonder though why it's only a comment, and not e.g. an assertion. If an assertion was possible to add, the comment would want to live next to it. Without an assertion putting it ahead of the function may be better. Depending on how far to go, changes could be made while committing, or a proper v5 may want submitting. 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> >> } > >> > >> + /* > >> + * Calculate MMCONFIG area size and squeeze it into the bars array > >> + * for assigning a slot in the MMIO hole > >> + */ > >> + if ( is_running_on_q35 ) > >> + { > >> + /* disable PCIEXBAR decoding for now */ > >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); > >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); > >> + > >> + switch ( PCI_MAX_MCFG_BUSES ) > >> + { > >> + case 64: > >> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(64); > >> + break; > >> + > >> + case 128: > >> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(128); > >> + break; > >> + > >> + case 256: > >> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(256); > >> + break; > >> + > >> + default: > >> + /* unsupported number of buses specified */ > >> + BUG(); > >> + } > >> + > >> + addr_mask = ~(bar_sz - 1); > >> + > >> + for ( i = 0; i < nr_bars; i++ ) > >> + if ( bars[i].bar_sz < bar_sz ) > >> + break; > >> + > >> + if ( i != nr_bars ) > >> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); > >> + > >> + bars[i].is_mem = 1; > >> + bars[i].devfn = PCI_MCH_DEVFN; > >> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; > >> + bars[i].bar_sz = bar_sz; > >> + bars[i].addr_mask = addr_mask; > >> + bars[i].bar_data = bar_data; > >> + > >> + mmio_total += bar_sz; > >> + nr_bars++; > >> + } > > > > I think it might be best if the ECAM fake BAR is the first element in > > the bars array, so we ensure it's the first item to consume memory > > from the low MMIO hole. Not sure how that will work with the current > > sorting of the resources based on their size, but it's imperative for > > hvmloader to attempt to position ECAM ahead of the other device > > resources IMO. > > Why would this be? I would assume it's best to have ECAM access in the low 4G (for 32bit OSes) at the expense of some 32bit BARs possibly not fitting in the 32bit space. But the ECAM space could be placed above 4G, and 32bit OSes might not care much about extended address space capabilities. Should is_64bar be set for the MCFG "fake" BAR? Thanks, Roger. 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boundary="-=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777897867307 X-purgate-ID: tlsNG-ef75cf/1777897873-AEB70C48-375E36DA/0/0 X-purgate-type: clean X-purgate-size: 2387 ---=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 01/05/2026 =C3=A0 23:43, Andrew Cooper a =C3=A9crit=C2=A0: > Under SVM, there are two copies of guest CR2=2E One is v->arch=2Ehvm=2E= guest_cr[2] > and one is in the VMCB=2E >=20 > Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardw= are > loads and saves the guest CR2 across VMRUN/VMExit=2E >=20 > For HAP guests (where #PF is not intercepted, and therefore we don't typ= ically > inject #PF either), this causes the guest CR2 value to be lost on migrat= e=2E As > migration is cooperative and not done from the #PF handler, this also go= es > unoticed by guests=2E >=20 > It also means that an emulated MOV-from-CR2 reads a stale value=2E >=20 > Reported-by: Stefano Stabellini > Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions= =2E") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monn=C3=A9 > CC: Teddy Astie > CC: Stefano Stabellini >=20 > It also also works around the QEMU bug that triggered the investigion, w= here > the CR2 intercepts trigger despite Xen requesting CR2 not to be intercep= ted=2E > --- > xen/arch/x86/hvm/svm/svm=2Ec | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/xen/arch/x86/hvm/svm/svm=2Ec b/xen/arch/x86/hvm/svm/svm=2Ec > index ced616684732=2E=2Ef49d2ebbfdd5 100644 > --- a/xen/arch/x86/hvm/svm/svm=2Ec > +++ b/xen/arch/x86/hvm/svm/svm=2Ec > @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) > hvm_sanitize_regs_fields( > regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs=2El)); > =20 > + v->arch=2Ehvm=2Eguest_cr[2] =3D vmcb_get_cr2(vmcb); > if ( paging_mode_hap(v->domain) ) > v->arch=2Ehvm=2Eguest_cr[3] =3D v->arch=2Ehvm=2Ehw_cr[3] =3D v= mcb_get_cr3(vmcb); > =20 >=20 > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e Reviewed-by: Teddy Astie -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vate= s=2Etech ---=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:33:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:33:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299749.1574295 (Exim 4.92) (envelope-from ) id 1wJsUJ-0007jn-3x; Mon, 04 May 2026 12:33:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299749.1574295; Mon, 04 May 2026 12:33:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsUJ-0007jg-12; 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Mon, 04 May 2026 12:33:21 +0000 Received: from [192.168.1.18] (88-175-170-134.subs.proxad.net [88.175.170.134]) (Authenticated sender: teddy.astie) by mail2.vates.fr (Postfix) with ESMTPSA id 3F1E682C7B; Mon, 4 May 2026 14:33:21 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=z1SahcxJS9PEhd9nLCjwMi74YvkGkujJc5tcAM5h/cg=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=DgyM5Ng4Ps72VGAYzzpWoq3QdzlPPY6t02VsQgfXkBE2vb4bTTeI41awOP/dQIB06OKoZmzsy x260i7Cj0Ccgawp75DmlJzENlv/+Xa0/pol2f2pgiUXb+5B8hYAj7vXM6aBuoflzWo2QKXj4LQU HWwE8EvgJv8Pw/v4Ujloui4h8RWhas4JowGP9jUhG7VjRbgZOYiisn9eJVDJ1ITMsdgVfjWhPI5 yByY9w5dYZ9JnwsaHmOq4bPoPIGf1X4UNwxeIJ5d2DxcvFqXmuWRE3HFROXCYEEpQRhMJz4x846 y7FKObK2hUvg8+a6XQYcuiaG+WZCSpzHQLgkyxFKFyPQ== X-Zone-Loop: 639d19f8d8251d1d763f59e389c23f386502cb7888a1 x-campaign-type: default x-transaction-id: 72b9757b-341d-472b-a8cd-f38d541b56d4 x-swg-uid: 01-6f80c560-cf2f-424d-aeca-d5d275a3f892 X-Mailer: Sweego Message-ID: <1777898001.8631fc262581453bbf619ec5b2062170.19df2fa95a7000f373@vates.tech> x-swg-bid: 1777898001.8631fc262581453bbf619ec5b2062170.19df2fa95a7000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Mon, 4 May 2026 14:33:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/boot: Disable interrupts when establishing SSP To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260501191028.1250225-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie In-Reply-To: <20260501191028.1250225-1-andrew.cooper3@citrix.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777898001343 X-purgate-ID: tlsNG-bad1c0/1777898004-496B0A53-1C87D334/0/0 X-purgate-type: clean X-purgate-size: 5340 ---=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 01/05/2026 =C3=A0 21:14, Andrew Cooper a =C3=A9crit=C2=A0: > Gitlab CI reported a crash on boot on Alder Lake hardware=2E The bug is= years > old, making it an incredibly rare occurance: >=20 > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4=2E22-unstable x86_64 debug=3Dy ubsan=3Dy Not tai= nted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup=2Ec#reinit_bsp= _stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 0000000000= 0006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000= 000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497= e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a= 392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000= 000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000= f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000= 000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup=2Ec#reinit_b= sp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 = f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=3Dffff= 83049a4b7ef8, tss=2Ersp0=3Dffff83049a4b7fb0 > (XEN) No stack overflow detected=2E Skipping stack trace=2E > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** >=20 > This is on the instruction boundary after enabling CET (writing MSR_S_CE= T) and > prior to establishing SSP=2E Despite identifying this as a critical win= dow > where any fault was deadly (the CPU tries to push a shadow stack frame a= t 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled=2E >=20 > Along with regular interrupts, NMIs are a problem=2E Unlike other cases= needing > NMI safety, we can't use a self NMI and callback, as the stack needs to = be > empty at the point of enabling Shadow Stacks=2E >=20 > Disable interrupts, and turn off the watchdog if it's configured=2E >=20 > Note that watchdog_{en,dis}able() do not work here=2E They cause the wa= tchdog > NMI to be ignored; they do not inhibit the generation of NMIs=2E >=20 > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monn=C3=A9 > CC: Teddy Astie >=20 > The only way I can think of doing this in NMI context is to have the NMI= LRET > off the NMI stack back to the interrupted context=2E But this is horrib= le to > arrange, not to mention different between IDT and FRED=2E >=20 > Also, the {disable,setup}_lapic_nmi_watchdog() API is horrible but I don= 't > have time to make it sane right now, and this needs backporting a long w= ay=2E >=20 > https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/pipelines/249406= 9238 > --- > xen/arch/x86/setup=2Ec | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) >=20 > diff --git a/xen/arch/x86/setup=2Ec b/xen/arch/x86/setup=2Ec > index d041cbd5f6f1=2E=2E95ac36beab37 100644 > --- a/xen/arch/x86/setup=2Ec > +++ b/xen/arch/x86/setup=2Ec > @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) > =20 > if ( cpu_has_xen_shstk ) > { > + bool watchdog =3D (nmi_watchdog =3D=3D NMI_LOCAL_APIC); > + > + /* > + * Between enabling CET and establishing SSP, any fault or inte= rrupt > + * is fatal=2E We must arrange for none to happen=2E > + * > + * TODO: Figure out how to perform CET enablement in NMI contex= t, > + * given the constraint that the stack must be empty=2E > + */ > + if ( watchdog ) > + disable_lapic_nmi_watchdog(); > + local_irq_disable(); > + > wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); > =20 > /* > @@ -932,6 +945,13 @@ static void __init noreturn reinit_bsp_stack(void) > } > else > asm volatile ( "setssbsy" ::: "memory" ); > + > + local_irq_enable(); > + if ( watchdog ) > + { > + nmi_watchdog =3D NMI_LOCAL_APIC; > + setup_apic_nmi_watchdog(); > + } > } > =20 > reset_stack_and_jump(init_done); >=20 > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e Reviewed-by: Teddy Astie -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:36:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:36:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299759.1574305 (Exim 4.92) (envelope-from ) id 1wJsXO-0008JL-LG; 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Mon, 04 May 2026 05:36:36 -0700 (PDT) Message-ID: <2945a61e-dcf8-40eb-a3e4-3c8e977f9ebf@suse.com> Date: Mon, 4 May 2026 14:36:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-12-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898196-1565BC48-A22DFFBF/0/0 X-purgate-type: clean X-purgate-size: 3591 On 04.05.2026 14:23, Roger Pau Monné wrote: > On Mon, May 04, 2026 at 01:11:44PM +0200, Jan Beulich wrote: >> On 29.04.2026 11:29, Roger Pau Monné wrote: >>> On Fri, Mar 13, 2026 at 04:35:04PM +0000, Thierry Escande wrote: >>>> --- a/tools/firmware/hvmloader/pci.c >>>> +++ b/tools/firmware/hvmloader/pci.c >>>> @@ -413,6 +413,58 @@ void pci_setup(void) >>>> pci_devfn_decode_type[devfn] |= PCI_COMMAND_MASTER; >>>> } >>>> >>>> + /* >>>> + * Calculate MMCONFIG area size and squeeze it into the bars array >>>> + * for assigning a slot in the MMIO hole >>>> + */ >>>> + if ( is_running_on_q35 ) >>>> + { >>>> + /* disable PCIEXBAR decoding for now */ >>>> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); >>>> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); >>>> + >>>> + switch ( PCI_MAX_MCFG_BUSES ) >>>> + { >>>> + case 64: >>>> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(64); >>>> + break; >>>> + >>>> + case 128: >>>> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(128); >>>> + break; >>>> + >>>> + case 256: >>>> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(256); >>>> + break; >>>> + >>>> + default: >>>> + /* unsupported number of buses specified */ >>>> + BUG(); >>>> + } >>>> + >>>> + addr_mask = ~(bar_sz - 1); >>>> + >>>> + for ( i = 0; i < nr_bars; i++ ) >>>> + if ( bars[i].bar_sz < bar_sz ) >>>> + break; >>>> + >>>> + if ( i != nr_bars ) >>>> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); >>>> + >>>> + bars[i].is_mem = 1; >>>> + bars[i].devfn = PCI_MCH_DEVFN; >>>> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; >>>> + bars[i].bar_sz = bar_sz; >>>> + bars[i].addr_mask = addr_mask; >>>> + bars[i].bar_data = bar_data; >>>> + >>>> + mmio_total += bar_sz; >>>> + nr_bars++; >>>> + } >>> >>> I think it might be best if the ECAM fake BAR is the first element in >>> the bars array, so we ensure it's the first item to consume memory >>> from the low MMIO hole. Not sure how that will work with the current >>> sorting of the resources based on their size, but it's imperative for >>> hvmloader to attempt to position ECAM ahead of the other device >>> resources IMO. >> >> Why would this be? > > I would assume it's best to have ECAM access in the low 4G (for 32bit > OSes) at the expense of some 32bit BARs possibly not fitting in the > 32bit space. But the ECAM space could be placed above 4G, and 32bit > OSes might not care much about extended address space capabilities. This doesn't require it to be 1st, though? Ideally we would try to put it below 4G if possible (i.e. if all other BARs which aren't 64-bit capable still fit), but fall back to putting it above 4G otherwise. In all of this it would still be put in the slot that its size demands. If we put it first, a significant gap could result between it and the first "real" BAR. (Then again a significant gap could also result if the number of buses to cover wasn't a power of 2.) Properly making use of such a gap would further complicate the code, I expect. > Should is_64bar be set for the MCFG "fake" BAR? As per above, maybe when making a 2nd (retry) pass. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299767.1574313 (Exim 4.92) (envelope-from ) id 1wJsgE-0001Ye-FF; Mon, 04 May 2026 12:45:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299767.1574313; Mon, 04 May 2026 12:45:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgE-0001YX-C0; Mon, 04 May 2026 12:45:46 +0000 Received: by outflank-mailman (input) for mailman id 1299767; Mon, 04 May 2026 12:45:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgC-0001YK-GY for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:45:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJsgB-002Q5C-Dt for xen-devel@lists.xenproject.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1777898743-52D72D75-2D626FAF/0/0 X-purgate-type: clean X-purgate-size: 4887 - Alpine update - Debian trixie - test arbitrary linux branch - Linux stubdom - enable SSH access Green pipeline: https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/pipelines/2498055947 Example Linux test: Linux-next (20260504): https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/pipelines/2496653697 A few genuine failures there: - kbl-pci-pv-x86_64-gcc-debug: domU gets: (domU) [ 0.449203] pcifront pci-0: xenbus: state reset occurred, reconnecting (domU) [ 0.449426] pcifront pci-0: 22 freeing event channel 8 and no PCI device ever appears - zen3p-pvshim-x86-64-gcc-debug [ 1.133364] ------------[ cut here ]------------ [ 1.133398] WARNING: arch/x86/xen/multicalls.c:190 at xen_mc_flush+0x198/0x240, CPU#0: swapper/0/1 [ 1.133457] Modules linked in: [ 1.133488] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 7.1.0-rc1-next-20260430-gb9303e6bff70 #1 PREEMPT(lazy) [ 1.133552] RIP: e030:xen_mc_flush+0x198/0x240 [ 1.133588] Code: 48 8b 43 10 48 8b 7b 20 4c 8b 53 38 4c 8b 43 40 e8 9d 85 14 01 48 89 43 18 48 85 c0 0f 89 1b ff ff ff 8b 3b be 01 00 00 00 90 <0f> 0b 90 65 8b 0d 02 9a 94 02 89 fa 48 c7 c7 78 b5 c1 82 e8 10 6e [ 1.133693] RSP: e02b:ffffc9004000bcc0 EFLAGS: 00010086 [ 1.133730] RAX: ffffffffffffffff RBX: ffff88801da16c40 RCX: ffff88801da17450 [ 1.133778] RDX: 0000000000000000 RSI: 0000000000000001 RDI: 0000000000000001 [ 1.133826] RBP: ffff88801da16c40 R08: 0000000000000000 R09: 0000000000000001 [ 1.133874] R10: 0000000000007ff0 R11: ffffc90040015fff R12: ffff888006570280 [ 1.133936] R13: 0000000000000000 R14: ffffc90040016000 R15: 8000000000000073 [ 1.133992] FS: 0000000000000000(0000) GS:ffff888099e14000(0000) knlGS:0000000000000000 [ 1.134040] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 1.134045] CR2: ffffc9000083f000 CR3: 0000000003034000 CR4: 0000000000050660 [ 1.134045] Call Trace: [ 1.134045] [ 1.134045] ? xen_mc_issue+0x24/0x90 [ 1.134045] xen_leave_lazy_mmu+0x10/0x50 [ 1.134045] vmap_range_noflush+0x54d/0x7b0 [ 1.134045] __ioremap_caller.isra.0+0x174/0x290 [ 1.134045] ? print_s5_reset_status_mmio+0x1c/0x90 [ 1.134045] ? __pfx_print_s5_reset_status_mmio+0x10/0x10 [ 1.134045] print_s5_reset_status_mmio+0x1c/0x90 [ 1.134045] do_one_initcall+0x58/0x240 [ 1.134045] kernel_init_freeable+0x1e2/0x240 [ 1.134045] ? __pfx_kernel_init+0x10/0x10 [ 1.134045] kernel_init+0x15/0x130 [ 1.134045] ret_from_fork+0x17e/0x240 [ 1.134045] ? __pfx_kernel_init+0x10/0x10 [ 1.134045] ret_from_fork_asm+0x1a/0x30 [ 1.134045] [ 1.134045] ---[ end trace 0000000000000000 ]--- Kinda similar to https://lore.kernel.org/xen-devel/aaBH3EAchUwKhrUA@mail-itl/ (which is still not solved) - zen3p-smoke-x86-64-dom0pvh-gcc-debug and few other PVH dom0 - dom0 crash without printing panic message Marek Marczykowski-Górecki (13): Add Alpine 3.23 containers Switch Linux builds to use Alpine 3.23 container Add debian rootfs artifact Enable CONFIG_USB_RTL8152 in kernel for hw12 runner Include git in the ARM64 build container too Support building arbitrary Linux branch/tag/commit Add linux-6.12.79-x86_64 Save Linux config to artifacts too Add trigger-test job, to run test on a Linux built from a branch/tag Add linux-stubdom dependencies Prepare grub for booting x86_64 HVM domU from a disk Prepare grub for booting x86_64 HVM domU from a cdrom Setup ssh access to test systems .gitlab-ci.yml | 82 ++++++++++++++++-- containerize | 6 +- images/alpine/3.18-arm64-build.dockerfile | 1 +- images/alpine/3.23-arm64-base.dockerfile | 6 +- images/alpine/3.23-arm64-build.dockerfile | 31 +++++++- images/alpine/3.23-x86_64-base.dockerfile | 6 +- images/alpine/3.23-x86_64-build.dockerfile | 43 +++++++++- images/debian/13-x86_64-base.dockerfile | 4 +- scripts/alpine-rootfs.sh | 24 +++++- scripts/build-linux.sh | 26 ++++-- scripts/debian-rootfs.sh | 100 ++++++++++++++++++++++- 11 files changed, 316 insertions(+), 13 deletions(-) create mode 100644 images/alpine/3.23-arm64-base.dockerfile create mode 100644 images/alpine/3.23-arm64-build.dockerfile create mode 100644 images/alpine/3.23-x86_64-base.dockerfile create mode 100644 images/alpine/3.23-x86_64-build.dockerfile create mode 100644 images/debian/13-x86_64-base.dockerfile create mode 100755 scripts/debian-rootfs.sh base-commit: 76894a5929bc604fb5bdb4aff2f94a6a9df68cdb -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299769.1574332 (Exim 4.92) (envelope-from ) id 1wJsgG-0001yj-1z; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777898746-32E743FF-0F06FFE7/0/0 X-purgate-type: clean X-purgate-size: 1350 Slowly phase out 3.18 one. But keep Linux 6.6 on Alpine 3.18 containers - it fails to build on Alpine 3.23 (due to GCC 15 defaulting to -std=c23). Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Alpine 3.23 - Keep Linux 6.6 on Alpine 3.18 --- .gitlab-ci.yml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index b86d9aa..5281c1f 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -21,14 +21,14 @@ stages: tags: - arm64 variables: - CONTAINER: alpine:3.18-arm64-build + CONTAINER: alpine:3.23-arm64-build .x86_64-artifacts: extends: .artifacts tags: - x86_64 variables: - CONTAINER: alpine:3.18-x86_64-build + CONTAINER: alpine:3.23-x86_64-build # # ARM64 artifacts @@ -52,6 +52,7 @@ linux-6.6.86-arm64: script: ./scripts/build-linux.sh variables: LINUX_VERSION: 6.6.86 + CONTAINER: alpine:3.18-arm64-build # # x86_64 artifacts @@ -77,6 +78,7 @@ linux-6.6.56-x86_64: LINUX_VERSION: 6.6.56 ARGO_SHA: "cf73819cacc945baca1a7421e5836d1bd481739b" ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" + CONTAINER: alpine:3.18-x86_64-build microcode-x86: extends: .x86_64-artifacts -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299768.1574320 (Exim 4.92) (envelope-from ) id 1wJsgE-0001be-PH; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777898744-82374161-B98F688F/10/63158204843 X-purgate-type: spam X-purgate-size: 6307 Add it in all variants: - base container - build container - initramfs archive libdw used to be part of libelf in Alpine 3.18, but it's a separate package in 3.23. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Update to Alpine 3.23 - Fix alpine-3.22-arm64-rootfs - Adjust default in containerize script Changes in v3: - add comment about libdw --- .gitlab-ci.yml | 14 +++++++- containerize | 6 ++- images/alpine/3.23-arm64-base.dockerfile | 6 +++- images/alpine/3.23-arm64-build.dockerfile | 31 +++++++++++++++++- images/alpine/3.23-x86_64-base.dockerfile | 6 +++- images/alpine/3.23-x86_64-build.dockerfile | 43 +++++++++++++++++++++++- scripts/alpine-rootfs.sh | 6 +++- 7 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 images/alpine/3.23-arm64-base.dockerfile create mode 100644 images/alpine/3.23-arm64-build.dockerfile create mode 100644 images/alpine/3.23-x86_64-base.dockerfile create mode 100644 images/alpine/3.23-x86_64-build.dockerfile diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index c698612..b86d9aa 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -40,6 +40,13 @@ alpine-3.18-arm64-rootfs: variables: CONTAINER: alpine:3.18-arm64-base +alpine-3.23-arm64-rootfs: + extends: .arm64-artifacts + script: + - ./scripts/alpine-rootfs.sh + variables: + CONTAINER: alpine:3.23-arm64-base + linux-6.6.86-arm64: extends: .arm64-artifacts script: ./scripts/build-linux.sh @@ -56,6 +63,13 @@ alpine-3.18-x86_64-rootfs: variables: CONTAINER: alpine:3.18-x86_64-base +alpine-3.23-x86_64-rootfs: + extends: .x86_64-artifacts + script: + - ./scripts/alpine-rootfs.sh + variables: + CONTAINER: alpine:3.23-x86_64-base + linux-6.6.56-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh diff --git a/containerize b/containerize index 38a434a..a74ef45 100755 --- a/containerize +++ b/containerize @@ -27,7 +27,11 @@ case "_${CONTAINER}" in _alpine-3.18-arm64-base) CONTAINER="${BASE}/alpine:3.18-arm64-base" ;; _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;; _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;; - _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;; + _alpine-3.18-x86_64-build) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;; + _alpine-3.23-arm64-base) CONTAINER="${BASE}/alpine:3.23-arm64-base" ;; + _alpine-3.23-arm64-build) CONTAINER="${BASE}/alpine:3.23-arm64-build" ;; + _alpine-3.23-x86_64-base) CONTAINER="${BASE}/alpine:3.23-x86_64-base" ;; + _alpine-3.23-x86_64-build|_) CONTAINER="${BASE}/alpine:3.23-x86_64-build" ;; esac # Use this variable to control whether root should be used diff --git a/images/alpine/3.23-arm64-base.dockerfile b/images/alpine/3.23-arm64-base.dockerfile new file mode 100644 index 0000000..5899803 --- /dev/null +++ b/images/alpine/3.23-arm64-base.dockerfile @@ -0,0 +1,6 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 alpine:3.23 +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +RUN apk --no-cache add bash diff --git a/images/alpine/3.23-arm64-build.dockerfile b/images/alpine/3.23-arm64-build.dockerfile new file mode 100644 index 0000000..1e04b3a --- /dev/null +++ b/images/alpine/3.23-arm64-build.dockerfile @@ -0,0 +1,31 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 alpine:3.23 +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +RUN apk --no-cache add bash + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299771.1574341 (Exim 4.92) (envelope-from ) id 1wJsgI-0002Dc-9u; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777898748-BC617FF4-CE8D8A4F/10/63158204843 X-purgate-type: spam X-purgate-size: 4332 Will be used as dom0/domU in some tests. Install systemd, but set it up to start scripts in /etc/local.d/ too, so tests don't need different paths for Alpine and Debian. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Anthony PERARD --- Changes in v4: - disable persistent journal via config Changes in v3: - fix typo and missing dropbear args Changes in v2: - Use systemd - update to trixie - disable systemd-journal-catalog-update.service, systemd-modules-load.service and persistent journal to save boot time --- --- .gitlab-ci.yml | 7 ++- images/debian/13-x86_64-base.dockerfile | 4 +- scripts/debian-rootfs.sh | 100 +++++++++++++++++++++++++- 3 files changed, 111 insertions(+) create mode 100644 images/debian/13-x86_64-base.dockerfile create mode 100755 scripts/debian-rootfs.sh diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5281c1f..4147be5 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -71,6 +71,13 @@ alpine-3.23-x86_64-rootfs: variables: CONTAINER: alpine:3.23-x86_64-base +debian-13-x86_64-rootfs: + extends: .x86_64-artifacts + script: + - ./scripts/debian-rootfs.sh + variables: + CONTAINER: debian:13-x86_64-base + linux-6.6.56-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh diff --git a/images/debian/13-x86_64-base.dockerfile b/images/debian/13-x86_64-base.dockerfile new file mode 100644 index 0000000..f98355f --- /dev/null +++ b/images/debian/13-x86_64-base.dockerfile @@ -0,0 +1,4 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/amd64 debian:trixie-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" diff --git a/scripts/debian-rootfs.sh b/scripts/debian-rootfs.sh new file mode 100755 index 0000000..1da54a5 --- /dev/null +++ b/scripts/debian-rootfs.sh @@ -0,0 +1,100 @@ +#!/bin/bash + +set -eu + +WORKDIR="${PWD}" +COPYDIR="${WORKDIR}/binaries" +UNAME=$(uname -m) + +apt-get update + +PKGS=( + # System + bridge-utils + dropbear + udev + systemd-sysv + iproute2 + inetutils-ping + util-linux + cpio + + # Xen toolstack runtime deps + libbz2-1.0 + libuuid1 + liblzo2-2 + liblzma5 + libyajl2 + + # Xen Test Framework + python3 + + # QEMU + libglib2.0-0 + libaio1t64 + libpixman-1-0 + ) + +case $UNAME in + x86_64) + PKGS+=( + # System + pciutils + + # QEMU + libelf1 + ) + ;; + + aarch64) + PKGS+=( + # Xen + libfdt + ) + ;; +esac + +apt-get -y install "${PKGS[@]}" + +# Xen +cd / +# Minimal ramdisk environment in case of cpio output +echo "ttyS0" >> /etc/securetty +echo "hvc0" >> /etc/securetty +echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab +echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab +echo "rc_verbose=yes" >> /etc/rc.conf +echo "DROPBEAR_EXTRA_ARGS=\"-R\"" >> /etc/default/dropbear +echo > /etc/modules +# disable unneded services +rm -f etc/systemd/system/timers.target.wants/apt-daily*.timer +rm -f etc/systemd/system/sysinit.target.wants/systemd-timesyncd.service +rm -f usr/lib/systemd/system/sysinit.target.wants/systemd-journal-catalog-update.service +rm -f usr/lib/systemd/system/sysinit.target.wants/systemd-modules-load.service +# don't need persistent logging, avoid journal flush service +mkdir -p etc/systemd/journald.conf.d +cat >> etc/systemd/journald.conf.d/storage.conf < /etc/rc.local << EOF +#!/bin/sh + +for f in /etc/local.d/*.start; do + \$f +done +EOF +chmod +x /etc/rc.local +passwd -d root + +# Create rootfs +cd / +{ + PATHS="bin etc home init lib lib64 mnt opt root sbin srv tmp usr var" + find $PATHS -print0 + echo -ne "dev\0proc\0run\0sys\0" +} | cpio -0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz" + +# Print the contents for the build log +zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299772.1574350 (Exim 4.92) (envelope-from ) id 1wJsgJ-0002SS-Ga; Mon, 04 May 2026 12:45:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299772.1574350; Mon, 04 May 2026 12:45:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgJ-0002SE-Cm; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777898749-E3563443-53F9635C/0/0 X-purgate-type: clean X-purgate-size: 808 It uses this USB network interface. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini Acked-by: Andrew Cooper --- This was posted before at https://lore.kernel.org/xen-devel/20250411203336.585215-1-marmarek@invisiblethingslab.com/ --- scripts/build-linux.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index 441b872..cf0e744 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -32,6 +32,7 @@ case $UNAME in | grep 'XEN' \ | grep '=m' \ | sed 's/=m/=y/g' >> .config + ./scripts/config --enable USB_RTL8152 ;; aarch64) -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299773.1574360 (Exim 4.92) (envelope-from ) id 1wJsgL-0002jY-RD; Mon, 04 May 2026 12:45:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299773.1574360; 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Signed-off-by: Marek Marczykowski-Górecki Acked-by: Andrew Cooper Acked-by: Stefano Stabellini --- images/alpine/3.18-arm64-build.dockerfile | 1 + 1 file changed, 1 insertion(+) diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile index 25a8dbd..38464c9 100644 --- a/images/alpine/3.18-arm64-build.dockerfile +++ b/images/alpine/3.18-arm64-build.dockerfile @@ -14,6 +14,7 @@ RUN < Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299774.1574368 (Exim 4.92) (envelope-from ) id 1wJsgN-00030O-D0; Mon, 04 May 2026 12:45:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299774.1574368; Mon, 04 May 2026 12:45:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgN-000309-75; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898753-15C5CC48-FB090AA6/0/0 X-purgate-type: clean X-purgate-size: 4305 Change how kernel version is given to the script - use arguments, to avoid confusion between pipeline level variables and job level ones. The build-linux.sh now can take either just the kernel version (used to be LINUX_VERSION variable), or git branch/tag/commit name + git URL (new feature). Go with "git init" + "git fetch" instead of "git clone" to support any of branch/tag/commit. This also defines optional linux-git-* jobs which will build the thing if LINUX_GIT_VERSION and LINUX_GIT_URL variables are provided for the pipeline. The idea is to define separate CI schedules for the test-artifacts repo with LINUX_GIT_URL/LINUX_GIT_VERSION pointing at Linux trees to be tested (for example linux-next), and then trigger matching pipelines in the xen repo for testing with that version. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Adjust error message on missing version - Extract kernel version from job name Changes in v3: - pass kernel version via script arguments, not variables --- .gitlab-ci.yml | 29 +++++++++++++++++++++++++---- scripts/build-linux.sh | 23 +++++++++++++++++------ 2 files changed, 42 insertions(+), 10 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 4147be5..45006d4 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -1,5 +1,9 @@ variables: REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts + LINUX_GIT_VERSION: + description: "branch/tag/commit for the linux-git jobs" + LINUX_GIT_URL: + description: "git url for the linux-git jobs" stages: - build @@ -30,6 +34,13 @@ stages: variables: CONTAINER: alpine:3.23-x86_64-build +.linux-tpl: + script: &linux-script + - linux_version="${CI_JOB_NAME}" + - linux_version="${linux_version#linux-}" + - linux_version="${linux_version%%-*}" + - ./scripts/build-linux.sh "${linux_version}" + # # ARM64 artifacts # @@ -49,11 +60,16 @@ alpine-3.23-arm64-rootfs: linux-6.6.86-arm64: extends: .arm64-artifacts - script: ./scripts/build-linux.sh + script: *linux-script variables: - LINUX_VERSION: 6.6.86 CONTAINER: alpine:3.18-arm64-build +linux-git-arm64: + extends: .arm64-artifacts + script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" + rules: + - if: $LINUX_GIT_VERSION && $LINUX_GIT_URL + # # x86_64 artifacts # @@ -80,13 +96,18 @@ debian-13-x86_64-rootfs: linux-6.6.56-x86_64: extends: .x86_64-artifacts - script: ./scripts/build-linux.sh + script: *linux-script variables: - LINUX_VERSION: 6.6.56 ARGO_SHA: "cf73819cacc945baca1a7421e5836d1bd481739b" ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" CONTAINER: alpine:3.18-x86_64-build +linux-git-x86_64: + extends: .x86_64-artifacts + script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" + rules: + - if: $LINUX_GIT_VERSION && $LINUX_GIT_URL + microcode-x86: extends: .x86_64-artifacts script: ./scripts/x86-microcode.sh diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index cf0e744..e01b517 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -1,8 +1,11 @@ #!/usr/bin/env bash +LINUX_VERSION="$1" +LINUX_GIT_URL="$2" + if test -z "${LINUX_VERSION}" then - >&2 echo "LINUX_VERSION must be set"; exit 1 + >&2 echo "Version argument missing"; exit 1 fi set -ex -o pipefail @@ -12,11 +15,19 @@ COPYDIR="${WORKDIR}/binaries" UNAME=$(uname -m) # Build Linux -MAJOR=${LINUX_VERSION%%.*} -curl -fsSLO \ - https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz -tar xf linux-"${LINUX_VERSION}".tar.xz -cd linux-"${LINUX_VERSION}" +if [[ -n "${LINUX_GIT_URL}" ]]; then + mkdir linux + cd linux + git init + git fetch --depth=1 "${LINUX_GIT_URL}" "${LINUX_VERSION}" + git checkout FETCH_HEAD +else + MAJOR=${LINUX_VERSION%%.*} + curl -fsSLO \ + https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz + tar xf linux-"${LINUX_VERSION}".tar.xz + cd linux-"${LINUX_VERSION}" +fi make defconfig ./scripts/config --enable BRIDGE -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299775.1574377 (Exim 4.92) (envelope-from ) id 1wJsgO-0003FL-Mw; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777898754-E0DA3443-225C71AA/0/0 X-purgate-type: clean X-purgate-size: 1009 This is necessary for new Zen4 runner. Do not include Argo module in this build, as it isn't compatible with 6.12 yet. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini Acked-by: Andrew Cooper --- Changes in v2: - update 6.12.34 to 6.12.60, retaining acks Changes in v3: - update 6.12.60 to 6.12.79, retaining acks --- .gitlab-ci.yml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 45006d4..3ba8a31 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -102,6 +102,10 @@ linux-6.6.56-x86_64: ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" CONTAINER: alpine:3.18-x86_64-build +linux-6.12.79-x86_64: + extends: .x86_64-artifacts + script: *linux-script + linux-git-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299778.1574386 (Exim 4.92) (envelope-from ) id 1wJsgQ-0003WJ-3n; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777898756-43D6C3FF-29F885DB/0/0 X-purgate-type: clean X-purgate-size: 542 Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini --- scripts/build-linux.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index e01b517..c51e45d 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -53,6 +53,8 @@ esac make olddefconfig +cp .config "${COPYDIR}/linux.config" + case $UNAME in x86_64) make -j$(nproc) bzImage -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299779.1574395 (Exim 4.92) (envelope-from ) id 1wJsgT-0003wf-Cq; Mon, 04 May 2026 12:46:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299779.1574395; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777898757-F7015CF5-4F876756/0/0 X-purgate-type: clean X-purgate-size: 2195 When scheduling pipeline in test-artifacts repo, it can get also TEST_TRIGGER_REPO and TEST_TRIGGER_BRANCH variables, to trigger relevant pipeline to test just built artifacts. Pass ARTIFACTS_REPO+ARTIFACTS_BRANCH to the child pipeline to ensure it fetches artifacts from the right job, but avoid xen test pipeline inheriting other variables, as they might have unintended consequences (for example REGISTRY one). For example, to build linux-next and test Xen staging on it, the pipeline could be triggered with: LINUX_GIT_URL=https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git LINUX_GIT_VERSION=master TEST_TRIGGER_REPO=xen-project/hardware/xen TEST_TRIGGER_BRANCH=staging The triggered xen test pipeline will skip most build jobs. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - add inherit:variables:false --- .gitlab-ci.yml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 3ba8a31..b3c2b65 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -4,9 +4,14 @@ variables: description: "branch/tag/commit for the linux-git jobs" LINUX_GIT_URL: description: "git url for the linux-git jobs" + TEST_TRIGGER_REPO: + description: "gitlab repo on which test just built linux, for example 'xen-project/hardware/xen'" + TEST_TRIGGER_BRANCH: + description: "branch in TEST_TRIGGER_REPO to test on, for example 'staging'" stages: - build + - deploy .artifacts: stage: build @@ -115,3 +120,20 @@ linux-git-x86_64: microcode-x86: extends: .x86_64-artifacts script: ./scripts/x86-microcode.sh + +trigger-test: + stage: deploy + trigger: + project: $TEST_TRIGGER_REPO + branch: $TEST_TRIGGER_BRANCH + strategy: mirror + inherit: + variables: false + variables: + ARTIFACTS_REPO: $CI_PROJECT_PATH + ARTIFACTS_BRANCH: $CI_COMMIT_REF_NAME + LINUX_JOB_X86_64: linux-git-x86_64 + LINUX_JOB_ARM64: linux-git-arm64 + BUILD_FOR_TESTS_ONLY: 1 + rules: + - if: $TEST_TRIGGER_REPO && $TEST_TRIGGER_BRANCH -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299780.1574399 (Exim 4.92) (envelope-from ) id 1wJsgT-00040D-Pj; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777898760-C176EDB1-B29018E4/0/0 X-purgate-type: clean X-purgate-size: 849 The stubdomain test will use it Signed-off-by: Marek Marczykowski-Górecki --- scripts/alpine-rootfs.sh | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index 2671ab5..18f43e6 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -96,5 +96,12 @@ cd / echo -ne "dev\0proc\0run\0sys\0" } | cpio -0 -R 0:0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz" +if [ "$UNAME" = "x86_64" ]; then + # Prepare boot sector for HVM disk + grub-mkimage -o ${COPYDIR}/grub-core.img \ + -O i386-pc -p '(hd0,msdos1)/boot/grub2' \ + boot part_msdos ext2 linux biosdisk configfile normal +fi + # Print the contents for the build log zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299785.1574422 (Exim 4.92) (envelope-from ) id 1wJsgX-0004qA-5L; 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Signed-off-by: Marek Marczykowski-Górecki --- scripts/alpine-rootfs.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index 18f43e6..f649550 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -101,6 +101,9 @@ if [ "$UNAME" = "x86_64" ]; then grub-mkimage -o ${COPYDIR}/grub-core.img \ -O i386-pc -p '(hd0,msdos1)/boot/grub2' \ boot part_msdos ext2 linux biosdisk configfile normal + grub-mkimage -o ${COPYDIR}/grub-core-eltorito.img \ + -O i386-pc-eltorito -p '(cd)/boot/grub2' \ + boot part_msdos ext2 linux biosdisk configfile normal iso9660 fi # Print the contents for the build log -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299789.1574430 (Exim 4.92) (envelope-from ) id 1wJsgY-00059N-MN; Mon, 04 May 2026 12:46:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299789.1574430; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898763-1505AC48-0BB3A418/0/0 X-purgate-type: clean X-purgate-size: 1527 For this add also bridge package, so xenbr0 can be configured with /etc/network/interfaces. This allows extracting more logs out of the test system. Create empty /etc/network/interfaces, so the 'networking' service starts cleanly even if no interfaces are configured this way. This is necessary, as dropbear service depends on networking. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - adjust commit message - drop DROPBEAR_OPTS=\"-R\" Changes in v2: - do not allow passwordless login --- scripts/alpine-rootfs.sh | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index f649550..c7fee4b 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -10,6 +10,8 @@ apk --no-cache upgrade PKGS=( # System + bridge + dropbear libgcc openrc udev @@ -72,6 +74,7 @@ rc-update add loopback sysinit rc-update add bootmisc boot rc-update add devfs sysinit rc-update add dmesg sysinit +rc-update add dropbear boot rc-update add hostname boot rc-update add hwclock boot rc-update add hwdrivers sysinit @@ -85,6 +88,7 @@ echo "hvc0" >> /etc/securetty echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab echo "rc_verbose=yes" >> /etc/rc.conf +touch /etc/network/interfaces echo > /etc/modules passwd -d "root" root -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299850.1574441 (Exim 4.92) (envelope-from ) id 1wJsgp-0007K2-AG; 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boundary="-=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777898775627 X-purgate-ID: tlsNG-4011c0/1777898780-44F618B7-10128DD2/0/0 X-purgate-type: clean X-purgate-size: 1939 ---=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 04/05/2026 =C3=A0 12:39, Jan Beulich a =C3=A9crit=C2=A0: > On 22=2E04=2E2026 18:58, Teddy Astie wrote: >> @@ -1205,19 +1201,12 @@ static void cf_check init_amd(struct cpuinfo_x8= 6 *c) >> if (c->family =3D=3D 0x10) >> __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); >> =20 >> - if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) >> - opt_allow_unsafe =3D 1; >> - else if (opt_allow_unsafe < 0) >> - panic("Xen will not boot on this CPU for security reasons" >> - "Pass \"allow_unsafe\" if you're trusting all your" >> - " (PV) guest kernels=2E\n"); >> - else if (!opt_allow_unsafe && c =3D=3D &boot_cpu_data) >> + if (cpu_has_amd_erratum(c, AMD_ERRATUM_121)) >> + { >=20 > Nit: Misplaced brace (it's Linux style here)=2E But really I don't see w= hy > braces are added in the first place=2E >=20 Yes, they can be removed here=2E >> printk(KERN_WARNING >> - "*** Xen will not allow creation of DomU-s on" >> - " this CPU for security reasons=2E ***\n" >> - KERN_WARNING >> - "*** Pass \"allow_unsafe\" if you're trusting" >> - " all your (PV) guest kernels=2E ***\n"); >> + "*** This CPU is affected with erratum 121" >> + " 64-bits PV guests are able to cause a DoS (XSA-9) ***\n"); >=20 > Why the change in indentation? >=20 Looks like my editor got confused with the mixed indentation of the=20 file=2E I can fix this case for the next version of the patch=2E > There's also punctuation missing between both parts of the log message= =2E >=20 ok > Jan >=20 Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:50:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:50:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299887.1574449 (Exim 4.92) (envelope-from ) id 1wJskV-0002U8-O4; Mon, 04 May 2026 12:50:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299887.1574449; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777899009-2B56F938-CA744A03/0/0 X-purgate-type: clean X-purgate-size: 1788 On 22.04.2026 17:33, Bernhard Kaindl wrote: > The current use of long for total_avail_pages and outstanding_claims > creates an unnecessary mix of signed and unsigned types during page > allocation calculations. This necessitates awkward constructs > like '+ 0UL' to satisfy type matching in macros such as min(). > > Address this by normalizing `total_avail_pages` and `outstanding_claims` > from `long` to `unsigned long`. > > As a direct consequence of making `total_avail_pages` unsigned, the > post-decrement assertions checking for `>= 0` are no longer logically > sound. Adjust those assertions to pre-decrement checks. > > No functional change intended. > > Suggested-by: Jan Beulich Just to mention - my original comment was quite a bit wider. It was specifically made in context of a use of d->outstanding_pages. Yet of course I don't mind this as a 1st step. > Signed-off-by: Bernhard Kaindl Reviewed-by: Jan Beulich > --- a/xen/common/page_alloc.c > +++ b/xen/common/page_alloc.c > @@ -484,10 +484,11 @@ static heap_by_zone_and_order_t *_heap[MAX_NUMNODES]; > static unsigned long node_need_scrub[MAX_NUMNODES]; > > static unsigned long *avail[MAX_NUMNODES]; > -static long total_avail_pages; > +static unsigned long total_avail_pages; > > static DEFINE_SPINLOCK(heap_lock); > -static long outstanding_claims; /* total outstanding claims by all domains */ > +/* total outstanding claims by all domains */ > +static unsigned long outstanding_claims; Moving the comment is certainly fine, yet while doing so would you mind also correcting style? (I'll make the adjustment while committing, but going forward please remember doing so yourself.) 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2577e757d32f85fb8b3308863e6d7a53d70636dc.1777303844.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777899550-42F76A53-C00D81B2/10/73395122804 X-purgate-type: spam X-purgate-size: 1701 On 28.04.2026 16:33, Oleksii Kurochko wrote: > domain_use_host_layout() is not architecture-specific and may be needed > on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common > static inline in a new dedicated header, xen/domain-layout.h. > > xen/domain.h would be the natural home, but placing it there would > require including xen/paging.h (for paging_mode_translate()) and > xen/sched.h (for is_hardware_domain()), which would introduce circular > dependencies. A separate header that callers opt into avoids this. > > Adjust the implementation to take paging_mode_translate() into account > so it works correctly for all architectures, including x86. Some extra > details about implementation [2] and [3]. > > [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ > [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ > [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ > > Suggested-by: Stefano Stabellini > Signed-off-by: Oleksii Kurochko With the SPDX tag added as indicated by Luca: Acked-by: Jan Beulich One further minor remark: > --- /dev/null > +++ b/xen/include/xen/domain-layout.h > @@ -0,0 +1,27 @@ > +#ifndef __XEN_DOMAIN_LAYOUT_H__ > +#define __XEN_DOMAIN_LAYOUT_H__ > + > +#include This isn't really needed. It is ... > +#include > +#include ... included by this one anyway (pretty much unavoidably right now, I guess). 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While we haven't encountered this problem in practice yet, >>>>> it could occur >>>>> in the future, so I believe it should be addressed proactively. >>>> >>>> For being able to occur in future, the handling of removing a cpu >>>> from a >>>> cpupool would need to be changed. Considering the refusal to remove >>>> the >>>> last cpu from a populated cpupool is on purpose (this avoids leaving a >>>> domain without any cpu to run on), adding the code as you suggest >>>> would >>>> just be an addition without any benefit. >>>> >>>> It isn't doing any harm (other than adding code without purpose), so I >>>> won't explicitly NAK the patch, but I won't Ack it either. >>> >>> One further remark: I would ack the addition of an >>> ASSERT(list_empty(replq)) >>> instead of the conditional set_timer() call. >>> >> You're right: with the current cpupool semantics, when the timer is >> re- initialized in this path, replq is expected to be empty. In that >> case there is nothing to re-arm, and the timer can be programmed >> later when a new replenishment event is queued. >> >> Now I see that it would probably be better to update the cpupool >> logic to prohibit removing the last pCPU from a cpupool. In that >> case, this fix — even with the ASSERT — seems to be no longer relevant. >> >> I think I'd rather post an update for the cpupool semantics and drop >> this patch. Or I can send a v3 with the ASSERT if you think that is >> still reasonable. > > The cpupool semantics are already existing. I have written it this way > when I > introduced cpupools. > > > Juergen Hi Juergen, You're right, thanks for the pointer. I went back and re-checked cpupool_unassign_cpu_start() in xen/common/sched/cpupool.c and the guard is indeed already there: when n_dom > 0 and the cpu being removed is the last one in c->cpu_valid, all domains are moved to cpupool0 first, and the call returns -EBUSY if any domain is still alive while the system is active. So by the time the last RTDS pCPU is actually unassigned, no units remain in the pool and replq is guaranteed empty when rt_switch_sched() later re-initializes repl_timer. That makes the conditional set_timer() in v2 unreachable under the current (and intended) cpupool semantics, so there is no need to touch cpupool either. I'll send a v3 that replaces the conditional set_timer() with ASSERT(list_empty(replq)) -- Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 04 13:30:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:30:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299920.1574476 (Exim 4.92) (envelope-from ) id 1wJtNf-0002Hq-4Y; Mon, 04 May 2026 13:30:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299920.1574476; Mon, 04 May 2026 13:30:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtNf-0002Hj-1d; Mon, 04 May 2026 13:30:39 +0000 Received: by outflank-mailman (input) for mailman id 1299920; Mon, 04 May 2026 13:30:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtNe-0002Hd-77 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:30:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJtNd-002Zyk-JK for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:30:37 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f89f79-2eae-0a2a0a5409dd-0a2a450a806e-36 for ; Mon, 04 May 2026 15:30:37 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f89f7d-56b3-0a2a450a0019-d155dd31ad5e-3 for ; Mon, 04 May 2026 15:30:37 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44da2de25f3so714429f8f.1 for ; Mon, 04 May 2026 06:30:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777901437-4556C8B7-25AD20AB/0/0 X-purgate-type: clean X-purgate-size: 2641 On 22.04.2026 13:51, Jan Beulich wrote: > The boot services FreePages() needs passing the size. Since we allocated > one more byte to put a trailing nul there, we also need to bump the size > passed there. Make a small helper function to centralize this. > > Note that there's no permanent memory leak because of the oversight: The > allocation is done using EfiLoaderData, and all memory of that type is > later reclaimed anyway. > > Fixes: df75f77092c1 ("EFI: avoid OOB config file reads") > Reported-by: Bernhard Kaindl > Signed-off-by: Jan Beulich Marek, Daniel? Thanks, Jan > --- > This is an alternative proposal to > https://lists.xen.org/archives/html/xen-devel/2026-04/msg01044.html. > > --- a/xen/common/efi/boot.c > +++ b/xen/common/efi/boot.c > @@ -778,6 +778,16 @@ static void __init efi_relocate_esrt(EFI > */ > #include "efi-boot.h" > > +static void __init free_cfg(void) > +{ > + if ( !cfg.need_to_free ) > + return; > + > + /* One extra byte was allocated to put a nul character there. */ > + efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size + 1)); > + cfg.need_to_free = false; > +} > + > void __init noreturn blexit(const CHAR16 *str) > { > if ( str ) > @@ -787,8 +797,7 @@ void __init noreturn blexit(const CHAR16 > if ( !efi_bs ) > efi_arch_halt(); > > - if ( cfg.need_to_free ) > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > + free_cfg(); > if ( kernel.need_to_free ) > efi_bs->FreePages(kernel.addr, PFN_UP(kernel.size)); > if ( ramdisk.need_to_free ) > @@ -1557,11 +1566,7 @@ void EFIAPI __init noreturn efi_start(EF > name.s = get_value(&cfg, "global", "chain"); > if ( !name.s ) > break; > - if ( cfg.need_to_free ) > - { > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > - cfg.need_to_free = false; > - } > + free_cfg(); > if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) > { > PrintStr(L"Chained configuration file '"); > @@ -1631,11 +1636,7 @@ void EFIAPI __init noreturn efi_start(EF > > efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); > > - if ( cfg.need_to_free ) > - { > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > - cfg.need_to_free = false; > - } > + free_cfg(); > > if ( dir_handle ) > dir_handle->Close(dir_handle); From xen-devel-bounces@lists.xenproject.org Mon May 04 13:35:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:35:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299927.1574485 (Exim 4.92) (envelope-from ) id 1wJtSD-0002qW-Lf; Mon, 04 May 2026 13:35:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299927.1574485; Mon, 04 May 2026 13:35:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtSD-0002qP-Hx; Mon, 04 May 2026 13:35:21 +0000 Received: by outflank-mailman (input) for mailman id 1299927; Mon, 04 May 2026 13:35:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtSC-0002qJ-NM for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:35:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJtSB-00993s-Ro for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:35:19 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8a090-2eae-0a2a0a5409dd-0a2a450b9c14-46 for ; Mon, 04 May 2026 15:35:19 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8a097-212f-0a2a450b0019-d155dd31c069-3 for ; Mon, 04 May 2026 15:35:19 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-43d7badbd7dso1844507f8f.2 for ; Mon, 04 May 2026 06:35:19 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1777394145.8631fc262581453bbf619ec5b2062170.19dd4f256ec000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1777901719-246B7F3B-6C0DFED6/0/0 X-purgate-type: clean X-purgate-size: 3236 On 28.04.2026 18:35, Teddy Astie wrote: > Le 27/04/2026 à 15:57, Julian Vetter a écrit : >> Add a per-server capability flag in XEN_DMOP_create_ioreq_server to >> signal extended destination ID support. Repurpose the first byte of the >> existing pad[3] as a flags field, and define >> XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID (bit 0) for a server to signal it will >> use XEN_DMOP_bind_pt_msi_irq for all passthrough MSI bindings. >> >> Track the flag in struct ioreq_server ext_dest_id. >> hvm_ext_dest_id_enabled() returns true only if all registered ioreq >> servers have opted in and at least one server is present. A single >> server without the flag is sufficient to suppress the feature. >> >> Lock the feature at domain creation time: >> arch_domain_creation_finished() computes the levelled result into struct >> hvm_domain.ext_dest_id using OR to preserve any value previously >> restored from an HVM save record. After creation_finished, >> arch_ioreq_server_create_check() rejects new servers that lack >> XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID if the feature was already advertised >> to the guest. >> >> Persist the locked state in a new HVM_SAVE_TYPE(EXT_DEST_ID) record so >> that migration preserves the guest-visible CPUID bit independently of >> when the device model re-registers its ioreq servers on the destination >> host. >> >> On restore, ioapic_check() uses d->arch.hvm.ext_dest_id (restored from >> the EXT_DEST_ID record) rather than the per-server dynamic check, since >> the DM has not yet re-registered its servers at that point. >> >> Update xendevicemodel_create_ioreq_server() in libxendevicemodel to >> accept the new flags parameter, remove >> xendevicemodel_enable_ext_dest_id(), and fix the >> xc_hvm_create_ioreq_server() compat wrapper to pass zero flags. >> >> Signed-off-by: Julian Vetter > > That has somewhat already being discussed previously, but AFAIU, > extended destination ID is only meaningful when guest APIC IDs cannot be > represented with the "non-extended" model which can only happen in > practice when having more than 128 vCPUs in the guest. As Andrew has been pointing out many times, we need to stop thinking in terms of 128 vCPU-s being the limit because of the vCPU ID times 2 calculation for the APIC IDs. With a non-HT topology, more than 128 vCPU-s would already be possible from an APIC ID perspective. Hence tying "extended dest ID" to the vCPU count is unlikely to be viable. Jan > I don't think we need to check for device model support unless the guest > can have more than 128 vCPUs, where in such case it becomes mandatory > (unless some form of interrupt remapping is implemented). > > So I would rather check if domain->max_vcpus is more than 128 and > require device models to implement support for extended destination ID > in these cases. > > In some way, that would imply that extended destination ID is only > exposed to guests with domain->max_vcpus > 128. > > Overall, what I propose would be to keep the new > XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID flag, and if d->max_vcpus > 128, we > require the device model to support XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID. 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When a pCPU is later re-added, rt_switch_sched() reinitializes the timer object. cpupool_unassign_cpu_start() refuses to remove the last pCPU from a populated cpupool: if any domain is still alive while the system is active it returns -EBUSY, otherwise all domains are first moved to cpupool0. Consequently, by the time the killed-timer branch runs, no units remain in the pool and replq is guaranteed to be empty. Document this invariant by asserting list_empty(replq) right after init_timer(). This catches any future regression in cpupool semantics that would leave pending replenishment events behind across a TIMER_STATUS_killed -> init_timer() transition, where the timer would otherwise stay disarmed until an unrelated event reprogrammed it. Signed-off-by: Oleksii Moisieiev --- Changes in v3: - rework patch according to the comments. Since cpupools functionality rejects last pCPU from removing so re-arm functionality doesn't make sence. So patch was reworked to check that replq is empty after timer init. Changes in v2: - update commit description, remove unneeded paragraph xen/common/sched/rt.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/common/sched/rt.c b/xen/common/sched/rt.c index 7b1f64a779..4b643eda30 100644 --- a/xen/common/sched/rt.c +++ b/xen/common/sched/rt.c @@ -743,6 +743,14 @@ rt_switch_sched(struct scheduler *new_ops, unsigned in= t cpu, { init_timer(&prv->repl_timer, repl_timer_handler, (void *)new_ops, = cpu); dprintk(XENLOG_DEBUG, "RTDS: timer initialized on cpu %u\n", cpu); + + /* + * cpupool_unassign_cpu_start() refuses to remove the last pCPU fr= om + * a populated cpupool, so by the time this path runs (timer was + * killed because all RTDS pCPUs were removed) the pool must have + * been empty of domains, which implies replq is empty too. + */ + ASSERT(list_empty(rt_replq(new_ops))); } =20 sched_idle_unit(cpu)->priv =3D vdata; --=20 2.43.0 base-commit: 680da952ac1ddfc94f9d1cd4dfa1815badae5302 branch: amoi_rtds_rearmv3= From xen-devel-bounces@lists.xenproject.org Mon May 04 13:40:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:40:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299936.1574503 (Exim 4.92) (envelope-from ) id 1wJtXe-0004uM-Ej; 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Fix the check in cpu_smpboot_free() to use the > > correct condition. > > > > Fixes: 7126b7f806d5 ("x86/CPU: re-work populating of cpu_data[]") > > I think this isn't correct, and the issue here is me having overlooked a > dependency between that commit and the one introducing the line which > you change: 8c15d3d18725 ("x86/SMP: guard socket_cpumask[] access in > cpu_smpboot_free()"). Both changes were committed close together, but > they were entirely separate submissions (well over a year apart). Hence > as an individual patch that latter commit was correct, but on top of > 7126b7f806d5 it would have needed adjustment. Since 7126b7f806d5 wasn't > backported (while 8c15d3d18725 was), the fix here also shouldn't be > backported to anything earlier than 4.21 (which indeed the Fixes: tag > better expresses). I see, right, in the git history 8c15d3d18725 is indeed later than 7126b7f806d5, and hence 7126b7f806d5 was correct when introduced. The bug in cpu_smpboot_free() was there, but 7126b7f806d5 made it no worse. It was 8c15d3d18725 that would indeed need to be adjusted to pick up the new initialization value. Thanks, Roger. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777903537-C2975DB1-C3FDBB87/0/0 X-purgate-type: clean X-purgate-size: 7653 On 28.04.2026 16:33, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/kernel.c > @@ -0,0 +1,242 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ > + > +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, > + paddr_t kernend) > +{ > + const struct boot_module *mod = info->bd.initrd; > + const struct membanks *banks = kernel_info_get_mem_const(info); > + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, > + KERNEL_LOAD_ADDR_ALIGNMENT); > + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), > + KERNEL_LOAD_ADDR_ALIGNMENT); Why would modules need to be this strongly aligned? > + const paddr_t modsize = initrd_len + dtb_len; > + unsigned int bi = banks->nr_banks; > + > + BUG_ON(modsize < initrd_len); Where's the earlier check that allows this to be BUG_ON()? > + /* > + * Place modules as high in RAM as possible, scanning banks from > + * last to first so that the end of the last bank is preferred. > + */ > + while ( bi-- > 0 ) > + { > + const struct membank *bank = &banks->bank[bi]; > + const paddr_t bank_end = bank->start + bank->size; > + paddr_t modbase; > + > + if ( modsize > bank->size ) > + continue; > + > + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); Same question here. > + if ( modbase < bank->start ) > + continue; > + > + /* > + * If modules would overlap the kernel, try placing them below it. > + */ With how kernel_image_place() works, and with the heavy alignment applied above, is this even possible to succeed? Oh, wait, yes - for the not- position-independent case. > + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && > + (modbase + modsize > kernbase) ) > + { > + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); What prevents this subtraction from underflowing? > +static paddr_t __init kernel_image_place(struct kernel_info *info) > +{ > + paddr_t load_addr = INVALID_PADDR; > + uint64_t image_size = info->image.image_size ?: info->image.len; > + const struct membanks *banks = kernel_info_get_mem_const(info); > + unsigned int nr_banks = banks->nr_banks; > + unsigned int bi; > + > + dprintk(XENLOG_DEBUG, "nr_banks(%u)\n", nr_banks); Did you mean to drop this before submitting? > + /* > + * At the moment, RISC-V's Linux kernel should be always position > + * independent based on "Per-MMU execution" of boot.rst: > + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution > + * > + * But just for the case when RISC-V's Linux kernel isn't position > + * independent it is needed to take load address from > + * info->image.start. > + * > + * If `start` is zero, the Image is position independent. > + */ > + if ( likely(!info->image.start) ) > + { > + for ( bi = 0; bi != nr_banks; bi++ ) > + { > + const struct membank *bank = &banks->bank[bi]; > + paddr_t bank_start = bank->start; > + /* > + * According to boot.rst kernel load address should be properly > + * aligned: > + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location > + * > + * As Image in this case is PIC we can ignore > + * info->image.text_offset. > + */ > + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); > + paddr_t bank_end = bank_start + bank->size; > + paddr_t bank_size; > + > + if ( aligned_start > bank_end ) > + continue; > + > + bank_size = bank_end - aligned_start; > + > + dprintk(XENLOG_DEBUG, "bank[%u].start=%"PRIpaddr"\n", bi, bank->start); And this one? (I also find it puzzling that ->start would be of (primary) interest here, when ... > + if ( image_size <= bank_size ) ... bank_size is what's relevant. > +/* Check if the image is a 64-bit Image */ > +static int __init kernel_image64_probe(struct kernel_info *info, > + paddr_t addr, paddr_t size) > +{ > + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ > + struct { > + uint32_t code0; /* Executable code */ > + uint32_t code1; /* Executable code */ > + uint64_t text_offset; /* Image load offset, little endian */ > + uint64_t image_size; /* Effective Image size, little endian */ > + uint64_t flags; /* kernel flags, little endian */ > + uint32_t version; /* Version of this header */ > + uint32_t res1; /* Reserved */ > + uint64_t res2; /* Reserved */ > + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ > + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ > + uint32_t res3; /* Reserved for PE COFF offset */ > + } image; > + uint64_t effective_size; > + > + if ( size < sizeof(image) ) > + return -EINVAL; > + > + copy_from_paddr(&image, addr, sizeof(image)); > + > + /* Magic v1 is deprecated and may be removed. Only use v2 */ > + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) > + return -EINVAL; > + > + effective_size = le64_to_cpu(image.image_size); > + > + if ( effective_size && size > effective_size ) > + return -EINVAL; Is the rhs of the && the wrong way round? If effective_size > size, aren't you in trouble? Question of course is what "effective" really means. Yet in any event it seems dubious to me that effective_size < size would really be a problem. IOW this will want commenting upon if the check is to stay. Actually ... > + info->image.kernel_addr = addr; > + /* Actual size in the binary file */ > + info->image.len = size; > + /* Total memory the kernel occupies at runtime */ > + info->image.image_size = effective_size; ... this looks to suggest something .bss-like. > --- a/xen/include/xen/fdt-kernel.h > +++ b/xen/include/xen/fdt-kernel.h > @@ -59,8 +59,15 @@ struct kernel_info { > struct { > paddr_t kernel_addr; > paddr_t len; > -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) > - paddr_t text_offset; /* 64-bit Image only */ > +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) > + /* > + * ARM: 64-bit Image only. > + * RISC-V: both 32-bit and 64-bit Images. > + */ > + paddr_t text_offset; > +#endif > +#if defined(CONFIG_RISCV) > + uint64_t image_size; /* Effective size of Image */ As this (apparently) is for both RV64 and RV32 - can the latter really have wider than 32-bit image sizes? If not - use size_t or unsigned long here? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <865ed71ece75e850cdcb47ce9157a668a46a4c4d.1777303844.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777904604-A1F7A938-A8522B78/0/0 X-purgate-type: clean X-purgate-size: 6013 On 28.04.2026 16:33, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/dom0less-build.c > @@ -0,0 +1,70 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > + > +#include > + > +int __init arch_parse_dom0less_node(struct dt_device_node *node, > + struct boot_domain *bd) > +{ > + const char *mmu_type; > + unsigned long bits; > + const char *end; > + > + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) > + { > + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " > + "node. %s will be used as fallback\n", max_gstage_mode->name); > + > + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); > + > + goto out; > + } > + > + if ( !strcasecmp(mmu_type, "riscv,none") ) > + { > + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); > + > + return -EOPNOTSUPP; > + } > + > + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) > + { > + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); > + > + return -EINVAL; > + } > + > + bits = simple_strtoul(mmu_type + 8, &end, 10); > + if ( (*end != '\0') || (end == mmu_type + 8) ) > + { > + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); > + > + return -EINVAL; > + } > + > + out: > + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) > + { > + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); > + > + return -EINVAL; > + } > + /* > + * The correct value of bits will be checked in p2m_init() by call of > + * find_gstage_mode_by_bits(). > + * > + * As mmu-type property contains one of string: > + * - riscv,sv32 > + * - riscv,sv39 > + * - riscv,sv48 > + * - riscv,sv57 Or about any other riscv,sv with N up to somewhere around 250. I see that ... > + * it is needed to add '+P2M_ROOT_EXTRA_BITS' as for G-stage mode GPAs > + * are extended by P2M_ROOT_EXTRA_BITS. > + */ > + bd->create_cfg.arch.gstage_addr_bits = bits + P2M_ROOT_EXTRA_BITS; ... the value calculated here is later checked for validity, so it's really only the comment which may want clarifying a little. > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -45,12 +45,27 @@ struct p2m_pte_ctx { > unsigned int level; /* Paging level at which the PTE resides. */ > }; > > -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { > - .mode = HGATP_MODE_OFF, > - .paging_levels = 0, > - .name = "Bare", > +/* Values should be sorted by ->mode in this array */ > +static const struct gstage_mode_desc gstage_modes[] = { > + /* > + * Based on the RISC-V spec: > + * Bare mode is always supported, regardless of SXLEN. > + * When SXLEN=32, the only other valid setting for MODE is Sv32. > + * When SXLEN=64, three paged virtual-memory schemes are defined: > + * Sv39, Sv48, and Sv57. > + */ > + { HGATP_MODE_OFF, 0, "none" }, > +#ifdef CONFIG_RISCV_32 > + { HGATP_MODE_SV32X4, 1, "sv32" }, > +#else > + { HGATP_MODE_SV39X4, 2, "sv39" }, > + { HGATP_MODE_SV48X4, 3, "sv48" }, > + { HGATP_MODE_SV57X4, 4, "sv57" }, > +#endif > }; > > +const struct gstage_mode_desc * __ro_after_init max_gstage_mode = &gstage_modes[0]; Nit: Overlong line (and, strictly speaking, a stray blank after *). > @@ -331,8 +324,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) > return 0; > } > > -int p2m_init(struct domain *d) > +static const struct gstage_mode_desc *find_gstage_mode_by_bits( Is "_by_bits" adding much value to the function name? Especially ... > + unsigned char gpa_bits) ... seeing that the parameter name is making things pretty clear? > +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) > { > + /* > + * TODO: This static is a temporary constraint: all guests must use the > + * same MMU mode because p2m_gpa_bits is not yet per-domain. > + * Drop this once per-domain p2m_gpa_bits is introduced. > + */ > + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; > struct p2m_domain *p2m = p2m_get_hostp2m(d); > > /* > @@ -341,6 +361,33 @@ int p2m_init(struct domain *d) > */ > p2m->domain = d; > > + if ( !config ) > + { > + dprintk(XENLOG_ERR, "NULL config is passed\n"); > + return -EINVAL; > + } > + > + p2m->mode = find_gstage_mode_by_bits(config->arch.gstage_addr_bits); > + > + if ( !p2m->mode ) > + { > + dprintk(XENLOG_ERR, > + "Unsupported or unavailable gstage addr bits: %u\n", > + config->arch.gstage_addr_bits); > + > + return -EINVAL; > + } > + > + if ( m->mode == HGATP_MODE_OFF ) > + m = p2m->mode; > + > + if ( m->mode != p2m->mode->mode ) Since m always points into gstage_modes[], do you really need the extra indirection to compare the two ->mode fields? You could simply compare the pointers, couldn't you? > --- a/xen/include/public/arch-riscv.h > +++ b/xen/include/public/arch-riscv.h > @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; > DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); > > struct xen_arch_domainconfig { > + /* > + * G-stage GPA address width in bits. > + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). > + */ > + unsigned char gstage_addr_bits; Fixed-width types only in the public interface please. Also, isn't the field effectively describing the maximum width of a guest (physical) address? In which case - simply gaddr_bits? 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1777905272-53F7BD75-1D312A2C/0/0 X-purgate-type: clean X-purgate-size: 509 On 13.03.2026 17:35, Thierry Escande wrote: > --- a/tools/firmware/hvmloader/Makefile > +++ b/tools/firmware/hvmloader/Makefile > @@ -78,7 +78,7 @@ rombios.o: roms.inc > smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\"" > > ACPI_PATH = ../../libacpi > -DSDT_FILES += dsdt_anycpu_qemu_xen.c > +DSDT_FILES += dsdt_i440_anycpu_qemu_xen.c Instead of merely adding the i440 infix, could we perhaps replace the anycpu one (which doesn't serve any purpose here anymore, afaics)? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:35:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:35:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299984.1574538 (Exim 4.92) (envelope-from ) id 1wJuOg-0005ah-Ud; Mon, 04 May 2026 14:35:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299984.1574538; Mon, 04 May 2026 14:35:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuOg-0005aa-S3; Mon, 04 May 2026 14:35:46 +0000 Received: by outflank-mailman (input) for mailman id 1299984; Mon, 04 May 2026 14:35:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuOf-0005aQ-8J for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:35:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuOe-002kNW-KN for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:35:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8aeb0-2eae-0a2a0a5409dd-0a2a450aa908-26 for ; Mon, 04 May 2026 16:35:44 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8aec0-56b3-0a2a450a0019-d1558036d05b-3 for ; Mon, 04 May 2026 16:35:44 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so40224405e9.2 for ; Mon, 04 May 2026 07:35:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777905344-CF77D8B7-5443444C/0/0 X-purgate-type: clean X-purgate-size: 674 On 04.05.2026 16:34, Jan Beulich wrote: > On 13.03.2026 17:35, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/Makefile >> +++ b/tools/firmware/hvmloader/Makefile >> @@ -78,7 +78,7 @@ rombios.o: roms.inc >> smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\"" >> >> ACPI_PATH = ../../libacpi >> -DSDT_FILES += dsdt_anycpu_qemu_xen.c >> +DSDT_FILES += dsdt_i440_anycpu_qemu_xen.c > > Instead of merely adding the i440 infix, could we perhaps replace the anycpu > one (which doesn't serve any purpose here anymore, afaics)? Thinking about it, qemu and xen perhaps fall into the same category, and could perhaps also be dropped. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:39:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:39:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299991.1574549 (Exim 4.92) (envelope-from ) id 1wJuS1-0006OA-DU; Mon, 04 May 2026 14:39:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299991.1574549; Mon, 04 May 2026 14:39:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuS1-0006O3-9X; Mon, 04 May 2026 14:39:13 +0000 Received: by outflank-mailman (input) for mailman id 1299991; Mon, 04 May 2026 14:39:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuS0-0006Nx-5l for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:39:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuRz-009Nj6-9t for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:39:11 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8af84-bab6-0a2a0a5309dd-0a2a4504ea02-46 for ; Mon, 04 May 2026 16:39:11 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8af8e-1dec-0a2a45040019-d1558029ed20-3 for ; Mon, 04 May 2026 16:39:11 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891e86fabeso52215195e9.1 for ; Mon, 04 May 2026 07:39:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-3-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777905551-297793FF-E87A1700/0/0 X-purgate-type: clean X-purgate-size: 603 On 13.03.2026 17:35, Thierry Escande wrote: > --- a/tools/libacpi/Makefile > +++ b/tools/libacpi/Makefile > @@ -11,7 +11,7 @@ endif > > MK_DSDT = $(ACPI_BUILD_DIR)/mk_dsdt > > -C_SRC-$(CONFIG_X86) = dsdt_anycpu.c dsdt_15cpu.c dsdt_i440_anycpu_qemu_xen.c dsdt_pvh.c > +C_SRC-$(CONFIG_X86) = dsdt_anycpu.c dsdt_15cpu.c dsdt_i440_anycpu_qemu_xen.c dsdt_q35_anycpu_qemu_xen.c dsdt_pvh.c This line's now definitely getting too long. Maybe with the suggested name change (see patch 1, to be extended to here) it would remain tolerable as a single line. Otherwise it wants splitting. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-4-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777905805-29370938-4D88B0C0/0/0 X-purgate-type: clean X-purgate-size: 1348 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -648,6 +649,47 @@ void __bug(const char *file, int line) > crash(); > } > > +machine_type_t machine_type; > + > +void init_pc_machine_type(void) > +{ > + uint16_t vendor_id; > + uint16_t device_id; > + > + if ( machine_type != MACHINE_TYPE_UNDEFINED ) > + return; > + > + vendor_id = pci_readw(0, PCI_VENDOR_ID); > + device_id = pci_readw(0, PCI_DEVICE_ID); > + > + /* only Intel platforms are emulated currently */ Nit: Comment style. > + if ( vendor_id != PCI_VENDOR_ID_INTEL ) > + goto error; > + > + switch ( device_id ) > + { > + case PCI_DEVICE_ID_INTEL_82441: > + machine_type = MACHINE_TYPE_I440; > + printf("Detected i440 chipset\n"); > + break; > + > + case PCI_DEVICE_ID_INTEL_Q35_MCH: > + machine_type = MACHINE_TYPE_Q35; > + printf("Detected Q35 chipset\n"); > + break; > + > + default: > + goto error; > + } > + > + return; > + > +error: Nit: Labels indented by at least one blank please. > + printf("Unknown emulated chipset encountered, VID=%04Xh, DID=%04Xh\n", > + vendor_id, device_id); > + BUG(); Can't this be moved up into the default case, thus avoiding "goto" and label altogether? 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pr=C Message-ID: <934afe1f-a55f-4335-ad2e-98346ea8b19a@amd.com> Date: Mon, 4 May 2026 16:46:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/arm: skip holes in physical address space when setting up frametable To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , "Stefano Stabellini" , Julien Grall , "Bertrand Marquis" , Volodymyr Babchuk References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-3-michal.orzel@amd.com> <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|DS0PR12MB6437:EE_ X-MS-Office365-Filtering-Correlation-Id: 9a4f9662-684e-4f04-d367-08dea9ebe0f6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iG+SeXs4jwddpmtMADlwJgEVHHv6YdgtE2PfDpsUlaEowPlaqMDibq7/ju6RNqN/W1DO86oW3UirSogBl3dik0NyuObOeexg1TrxjuZOjJhDHhobp3S5VZT0udl+bQD7lpfr6e64M4dF/XGJeT1pqdeoxNdF0VuJ4DengxlQCL5bVWwMyHm+C0DKO3CCmtOoBEgplLavXYvM8NUJdWqwXASeG07xbTOPLNKUTkjtnxXJKW0B7SeWoyCAbccKNDmUIO3pr3afXsdqXmF6r4zoNnDkcwpEOsWgnqf9N0f4iRIeY+LFW9HO5dFPAYrk9+bjFTajGQHM13oY6+h3DTRwDUYeYGxA5N1X/fJA4knwf0XRYcAlSMBD3pSZmTHe7Xp/+wzdlG/Lb86EoASu4lH8K7BMNJPzXGMwNSu9jI5+AN3aH3atJBSi8g1P8HEdE2rA X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 14:46:08.9427 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9a4f9662-684e-4f04-d367-08dea9ebe0f6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6437 X-purgate-ID: tlsNG-16d1c6/1777905974-CE777D75-99A1D41D/0/0 X-purgate-type: clean X-purgate-size: 3004 On 01-May-26 17:00, Luca Fancellu wrote: > Hi Michal, > >> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >> index faef0efb327c..7297cca01551 100644 >> --- a/xen/arch/arm/mm.c >> +++ b/xen/arch/arm/mm.c >> @@ -63,7 +63,7 @@ void __init setup_mm(void) >> >> setup_mm_helper(); >> >> - setup_frametable_mappings(ram_start, ram_end); >> + init_frametable(ram_start); > > I think that now ram_end and bank_end can be removed Right, will do. > >> >> init_staticmem_pages(); >> init_sharedmem_pages(); >> diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c >> index 6604f3bf4e6a..dfc888c8ee0e 100644 >> --- a/xen/arch/arm/mmu/mm.c >> +++ b/xen/arch/arm/mmu/mm.c >> @@ -6,18 +6,45 @@ >> #include >> #include >> #include >> +#include >> #include >> >> -/* Map a frame table to cover physical addresses ps through pe */ >> -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) >> +static void __init init_frametable_chunk(unsigned long pdx_s, >> + unsigned long pdx_e) >> { >> - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - >> - mfn_to_pdx(maddr_to_mfn(ps)) + 1; >> - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); >> - mfn_t base_mfn; >> - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) >> - : MB(32); >> + unsigned long nr_pdxs = pdx_e - pdx_s; >> + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); >> + unsigned long virt; >> int rc; >> + mfn_t base_mfn; >> + >> + /* >> + * In-loop chunks span whole PDX groups, which are always page-size >> + * aligned. The last chunk ending at max_pdx may not be, so round up. >> + */ >> + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); >> + >> + /* >> + * Align the allocation to the contiguous mapping size so that >> + * map_pages_to_xen() can use the contiguous bit. >> + */ >> + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, >> + MB(32) >> PAGE_SHIFT); > > This fixed 32Mb alignment feels a bit more than we need, If for example the > chunk is less than 32Mb? If we had some variable alignment for chunks less > than 32MB we would maybe help alloc_boot_pages job, in the end if the chunk > is less than 32Mb it won’t get the contiguous bit anyway. Good point. On Arm64 this affects any chunk spanning fewer than 3 valid PDX groups (~14MB per group). I'll use 32MB if chunk size >= 32MB, 2MB otherwise. > > But I’m fine also if you leave it as it is. > > With the above fixed: > > Reviewed-by: Luca Fancellu I can take this one but ... > Tested-by: Luca Fancellu not this one given the change. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 14:49:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:49:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300015.1574574 (Exim 4.92) (envelope-from ) id 1wJubZ-0000qD-Qq; Mon, 04 May 2026 14:49:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300015.1574574; Mon, 04 May 2026 14:49:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJubZ-0000q6-O0; Mon, 04 May 2026 14:49:05 +0000 Received: by outflank-mailman (input) for mailman id 1300015; Mon, 04 May 2026 14:49:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJubY-0000q0-Ik for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:49:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJubX-006OqB-NR for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:49:03 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b1de-2eae-0a2a0a5409dd-0a2a450bba4e-6 for ; Mon, 04 May 2026 16:49:03 +0200 Received: from [209.85.208.47] (helo=mail-ed1-f47.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b1de-212f-0a2a450b0019-d155d02fb939-3 for ; Mon, 04 May 2026 16:49:02 +0200 Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-67c2d57a5ceso2730628a12.3 for ; Mon, 04 May 2026 07:49:02 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-7-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1777906323-E2B68443-B36544AE/0/0 X-purgate-type: clean X-purgate-size: 451 On 13.03.2026 17:35, Thierry Escande wrote: > void pci_setup(void) > { > uint8_t is_64bar, using_64bar, bar64_relocate = 0; > uint32_t devfn, bar_reg, cmd, bar_data, bar_data_upper; > uint64_t base, bar_sz, bar_sz_upper, mmio_total = 0; > - uint32_t vga_devfn = 256; > + uint8_t vga_devfn = 0xff; This change (and the related ones elsewhere) looks bogus to me: 0xff is a valid devfn value, whereas 256 isn't. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:55:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:55:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300033.1574592 (Exim 4.92) (envelope-from ) id 1wJuhH-0002w2-Nz; Mon, 04 May 2026 14:54:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300033.1574592; Mon, 04 May 2026 14:54:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuhH-0002vv-KQ; Mon, 04 May 2026 14:54:59 +0000 Received: by outflank-mailman (input) for mailman id 1300033; Mon, 04 May 2026 14:54:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuhF-0002vp-SJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:54:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuhF-001nhN-3B for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:54:57 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b33c-2eae-0a2a0a5409dd-0a2a45068c94-12 for ; Mon, 04 May 2026 16:54:56 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b340-7371-0a2a45060019-d1558035e037-3 for ; Mon, 04 May 2026 16:54:56 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so67872985e9.2 for ; Mon, 04 May 2026 07:54:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-8-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1777906496-CFF7BD75-392FDA4A/0/0 X-purgate-type: clean X-purgate-size: 582 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -209,7 +225,16 @@ void pci_setup(void) > { > do { isa_irq = (isa_irq + 1) & 15; > } while ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) ); > - pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq); > + > + if ( is_running_on_q35 ) > + { > + pci_writeb(PCI_ICH9_LPC_DEVFN, 0x60 + link, isa_irq); > + } > + else > + { > + pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq); > + } Nit: Easier to read imo without the figure braces. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-9-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777906899-6D360CF5-14B01F25/0/0 X-purgate-type: clean X-purgate-size: 1269 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -176,10 +177,13 @@ void pci_setup(void) > > /* Create a list of device BARs in descending order of size. */ > struct bars { > - uint32_t is_64bar; > uint32_t devfn; > uint32_t bar_reg; > uint64_t bar_sz; > + uint64_t addr_mask; /* which bits of the base address can be written */ > + uint32_t bar_data; /* initial value - BAR flags here */ Nit: Comment style again (also elsewhere). > @@ -278,13 +282,21 @@ void pci_setup(void) > bar_reg = PCI_ROM_ADDRESS; > > bar_data = pci_readl(devfn, bar_reg); > + > + is_mem = !!(((bar_data & PCI_BASE_ADDRESS_SPACE) == > + PCI_BASE_ADDRESS_SPACE_MEMORY) || > + (bar_reg == PCI_ROM_ADDRESS)); Nit: Indentation (pending open parentheses want to be reflected by extra indenting blanks). With, as requested by Roger, is_mem switched to bool, the !! also can go away, and with it perhaps one pair of parentheses. (I realize pre-existing code further down has similar issues, yet when such code is touched - and even more so when new code is added - this wants getting right, to aid readability.) Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:12:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:12:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300050.1574612 (Exim 4.92) (envelope-from ) id 1wJuy5-0006im-8k; Mon, 04 May 2026 15:12:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300050.1574612; Mon, 04 May 2026 15:12:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuy5-0006if-5I; Mon, 04 May 2026 15:12:21 +0000 Received: by outflank-mailman (input) for mailman id 1300050; Mon, 04 May 2026 15:12:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuy4-0006iZ-0o for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:12:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuy2-002tva-Sb for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:12:18 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b742-bab6-0a2a0a5309dd-0a2a4507b148-24 for ; Mon, 04 May 2026 17:12:18 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b752-229c-0a2a45070019-d1558030b51c-3 for ; Mon, 04 May 2026 17:12:18 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b150559bso28646155e9.1 for ; Mon, 04 May 2026 08:12:18 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777907538-AC563C48-ECD8A3C7/0/0 X-purgate-type: clean X-purgate-size: 2640 On 13.03.2026 17:35, Thierry Escande wrote: > This patch adds 2 HVMOP hypercalls, HVMOP_get|set_ecam_space, used to > set and get the base address and size of the PCIe ECAM space as > configured by hvmloader. > > Signed-off-by: Thierry Escande Just in case we want to stick to these (see Roger's earlier comments throughout the series), a few remarks here: > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -5195,6 +5195,58 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg) > rc = current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_op(arg); > break; > > + case HVMOP_set_ecam_space: { > + xen_hvm_ecam_space_t ecam; > + struct domain *d; > + > + if ( copy_from_guest( &ecam, guest_handle_cast(arg, xen_hvm_ecam_space_t), 1 ) ) > + return -EFAULT; > + > + d = rcu_lock_domain_by_any_id(ecam.domid); > + if ( d == NULL ) > + return -ESRCH; > + > + if ( d->arch.ecam_addr ) { > + rcu_unlock_domain(d); > + return -EFAULT; > + } > + > + if ( (ecam.size >> 28) || (!ecam.addr) ) { > + rcu_unlock_domain(d); > + return -EINVAL; > + } > + > + d->arch.ecam_addr = ecam.addr; > + d->arch.ecam_size = ecam.size; Shorter (and easier to follow as well as less error prone as to the rcu_unlock_domain()) if ( d->arch.ecam_addr ) rc = -E...; else if ( (ecam.size >> 28) || !ecam.addr ) rc = -EINVAL; else { d->arch.ecam_addr = ecam.addr; d->arch.ecam_size = ecam.size; } all utilizing ... > + rcu_unlock_domain(d); ... this. The magic 28 also needs (a) explaining and/or (b) abstracting (a suitably named #define might address both). > --- a/xen/include/public/hvm/hvm_op.h > +++ b/xen/include/public/hvm/hvm_op.h > @@ -166,6 +166,17 @@ struct xen_hvm_get_mem_type { > typedef struct xen_hvm_get_mem_type xen_hvm_get_mem_type_t; > DEFINE_XEN_GUEST_HANDLE(xen_hvm_get_mem_type_t); > > +#define HVMOP_set_ecam_space 16 > +#define HVMOP_get_ecam_space 17 > +struct xen_hvm_ecam_space { > + domid_t domid; > + uint16_t pad[3]; /* align next field on 8-byte boundary */ The comment, as is, is wrong for 32-bit HVM guests: There ... > + uint64_t addr; ... this is only 4-byte aligned, and hence the entire structure only has 4-byte alignment, and hence the padding also only guarantees 4- byte alignment. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777908164-C0159DB1-D871B689/0/0 X-purgate-type: clean X-purgate-size: 869 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -298,6 +300,19 @@ bool arch_ioreq_server_get_type_addr(const struct domain *d, > *addr |= CF8_ADDR_HI(cf8); > } > } > + else if ( p->type == IOREQ_TYPE_COPY && > + (mmio_start >= d->arch.ecam_addr && > + mmio_start < (d->arch.ecam_addr + d->arch.ecam_size)) ) > + { > + pci_sbdf_t sbdf; > + unsigned int reg = mmio_start & ~PAGE_MASK; If you use PAGE_MASK here, ... > + sbdf.bdf = (((mmio_start - d->arch.ecam_addr) & 0x0ffff000) >> 12); ... why not PAGE_SHIFT here? And why the masking by 0x0ffff000? Doesn't the earlier range check make this unnecessary (as long as .ecam_size is plausible)? Finally, nit: There's a stray blank after the =, and one pair of parentheses could perhaps also be dropped. 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ARM > uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > defines it). > > Fix the generic macros to subtract/add frametable_base_pdx, defaulting > to 0 when the arch does not define it. This makes the generic macros > correct for all architectures, even though they are only used on x86 > today. Hm, I assume this offset was added because the original mask PDX compression won't (usually) compress the gap between 0 and the start of RAM. However the newish offset PDX compression should be able to compress from 0 to start of RAM, and hence you don't need to apply an extra PDX offset there? If that's indeed the case it might be better to integrate frametable_base_pdx into the mask compression algorithm itself, so that on some arches it's a mask plus a decrease. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <50c96e2306538eb7cd28ddfcb21163c628fae0a4.1776259594.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777909310-4236CA53-5356D623/0/0 X-purgate-type: clean X-purgate-size: 1725 On 15.04.2026 15:32, Teddy Astie wrote: > Introduce vpid_sync_vcpu_context to do a single-context invalidation > on the vpid attached to the vcpu as a alternative to per-gva and all-context > invlidations. > > Signed-off-by: Teddy Astie > --- > xen/arch/x86/include/asm/hvm/vmx/vmx.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > index da04752e17..3524cb3536 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -452,6 +452,27 @@ static inline void ept_sync_all(void) > > void ept_sync_domain(struct p2m_domain *p2m); > > +static inline void vpid_sync_vcpu_context(const struct vcpu *v) > +{ > + int type = INVVPID_SINGLE_CONTEXT; > + > + /* > + * If single context invalidation is not supported, we escalate to > + * use all context invalidation. > + */ > + if ( likely(cpu_has_vmx_vpid_invvpid_single_context) ) > + goto execute_invvpid; > + > + /* > + * If single context invalidation is not supported, we escalate to > + * use all context invalidation. > + */ > + type = INVVPID_ALL_CONTEXT; > + > +execute_invvpid: > + __invvpid(type, v->arch.hvm.n1asid.asid, 0); > +} I think this (such) better would be introduced with a user (else the description wants to say what it's going to be needed for). I further think that this (such) would better be done without goto (else at the very least the label wants to conform to ./CODING_STYLE). And finally I think that the local variable would better be of an unsigned type. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:49:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:49:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300082.1574646 (Exim 4.92) (envelope-from ) id 1wJvYF-0004bO-Jf; Mon, 04 May 2026 15:49:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300082.1574646; Mon, 04 May 2026 15:49:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvYF-0004bH-GL; Mon, 04 May 2026 15:49:43 +0000 Received: by outflank-mailman (input) for mailman id 1300082; Mon, 04 May 2026 15:49:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvYD-0004bB-KJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:49:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJvYA-000Vuo-K5 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:49:40 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c013-5cb7-0a2a0a5109dd-0a2a450ca604-8 for ; Mon, 04 May 2026 17:49:40 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c013-62f1-0a2a450c0019-d155802ab8cf-3 for ; Mon, 04 May 2026 17:49:39 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so48079985e9.2 for ; Mon, 04 May 2026 08:49:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777909779-6C567CF5-B1E9A1A7/0/0 X-purgate-type: clean X-purgate-size: 1521 On 15.04.2026 15:32, Teddy Astie wrote: > Track on which pCPU each vCPU of a domain ran. This will > be used to know whether a TLB flush is required or not > when the vCPU is migrated on another pCPU. Somewhat related tracking already exists - see the dirty_cpumask field. But what title and description say doesn't match ... > @@ -977,6 +978,8 @@ void asmlinkage svm_vmenter_helper(void) > > svm_sync_vmcb(curr, vmcb_needs_vmsave); > > + curr->domain->latest_vcpu[cpu] = curr->vcpu_id; ... the implementation anyway: You track which vCPU last ran on a given pCPU. Since the same pCPU may have run multiple vCPU-s which then weren't scheduled again, you lose data afaict. > @@ -992,6 +993,13 @@ struct domain *domain_create(domid_t domid, > if ( !zalloc_cpumask_var(&d->dirty_cpumask) ) > goto fail; > > + err = -ENOMEM; > + d->latest_vcpu = xmalloc_array(int, nr_cpu_ids); xvmalloc_array() please, as this can be huge. It possibly being huge is also of concern. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -567,6 +567,10 @@ struct domain > /* Bitmask of CPUs which are holding onto this domain's state. */ > cpumask_var_t dirty_cpumask; > > + /* Mapping of the latest vCPU that ran on a specific CPU > + * (-1 if the vCPU hasn't ran yet) */ > + int *latest_vcpu; Why plain int? You don't really leverage -1 as a sentinel, and any unsigned value >= nr_cpu_ids would do in its stead. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:54:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:54:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300091.1574655 (Exim 4.92) (envelope-from ) id 1wJvdB-00067h-3o; Mon, 04 May 2026 15:54:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300091.1574655; Mon, 04 May 2026 15:54:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvdB-00067a-18; Mon, 04 May 2026 15:54:49 +0000 Received: by outflank-mailman (input) for mailman id 1300091; Mon, 04 May 2026 15:54:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvd9-00067U-Lo for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:54:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJvd8-009cXr-TH for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:54:46 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c13e-2eae-0a2a0a5409dd-0a2a450bc4e2-6 for ; Mon, 04 May 2026 17:54:46 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c146-212f-0a2a450b0019-d155802ddcd9-3 for ; Mon, 04 May 2026 17:54:46 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48909558b3aso45771245e9.0 for ; Mon, 04 May 2026 08:54:46 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <76d570a1b444a0bf2308389d9ed8bef8878b0c96.1776259594.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777910086-07979F3B-BC976202/0/0 X-purgate-type: clean X-purgate-size: 1562 On 15.04.2026 15:32, Teddy Astie wrote: > This field is meant to be used to schedule a TLB flush on the vCPU > before waking it up. This field can be set from another vCPU at any > time. > > Schedule a TLB flush when the vCPU is migrated to another CPU. > This is needed as the vCPU-related TLB entries may be out of sync > with what happened on another core. While not an issue with ... > --- a/xen/common/sched/core.c > +++ b/xen/common/sched/core.c > @@ -1188,7 +1188,12 @@ static void sched_unit_migrate_finish(struct sched_unit *unit) > > /* Wake on new CPU. */ > for_each_sched_unit_vcpu ( unit, v ) > + { > + if ( old_cpu != new_cpu ) > + /* Migrating to another CPU needs TLB flush */ > + v->needs_tlb_flush = true; ... this setting of the flag, for almost any other place (which apparently the next patch is going to introduce, judging by its title) the immediate question is: What if the vCPU is presently running? The flag is meant to only take effect on migration to another pCPU. IOW the overall purpose doesn't become quite clear. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -224,6 +224,8 @@ struct vcpu > bool defer_shutdown; > /* VCPU is paused following shutdown request (d->is_shutting_down)? */ > bool paused_for_shutdown; > + /* VCPU needs its TLB flushed before waking. */ > + bool needs_tlb_flush; If only x86 is going to use the field, why is it being put here? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 16:18:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:18:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300101.1574665 (Exim 4.92) (envelope-from ) id 1wJw04-0001VL-VT; Mon, 04 May 2026 16:18:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300101.1574665; Mon, 04 May 2026 16:18:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw04-0001VD-SV; Mon, 04 May 2026 16:18:28 +0000 Received: by outflank-mailman (input) for mailman id 1300101; Mon, 04 May 2026 16:18:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw03-0001V7-MC for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:18:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJw02-0032bR-B4 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 18:18:26 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c6c1-bab6-0a2a0a5309dd-0a2a450383d6-12 for ; Mon, 04 May 2026 18:18:26 +0200 Received: from [79.135.106.104] (helo=mail-106104.protonmail.ch) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c6d1-672d-0a2a45030019-4f876a688269-3 for ; Mon, 04 May 2026 18:18:26 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777911504; x=1778170704; bh=V7sg3EXKpe3ODgXm7r8fn96NbeRoTXzy0BmXoYu5iro=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=Ye0W3KCa++iIUGUF3iIpcsiNqkRul8sSVVRzUwbTh4fbbNz89zM7aGxi1PkC3yjoG d/4zplRy3SZktObsP4VaF30a3spGQFinrF3MG7yZ1mvCyijvnwxcG+OqSvVCHKsEHk 0o10G5l7LPQn9wWm82KVtypmIj98ceVh024aJOpkq67e2jPqJ9Us7uPConfkgWO9BM SQ3NE11wuDN3Lan2IPnGYP6a2c9qcLbvpKqiIBsrO/Vwnhn6R9eQu804K1ybQTxyGS VL0B2RNzbEpIAxE70f7EIKgMSSKfH7/9q1+m3+e2xrPCZStZiBOCdJXLNyZRSFegd1 zKDX+wGu0dY5A== Date: Mon, 04 May 2026 16:18:19 +0000 To: Jan Beulich From: "Samuel.Montgomery61" Cc: "xen-devel@lists.xenproject.org" Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: In-Reply-To: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> References: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 4d95ca6219795bd954c22c823b5a6cdcc807f4d1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777911506-2AD63938-A42898DC/0/0 X-purgate-type: clean X-purgate-size: 1624 On 04.05.2026 XX:XX, Jan Beulich wrote: > As you point out, there are issues with default-disabling. We already > have the "bootscrub=3D" command line option. Is there a reason this can't > be used here as well? I.e. is there a strong reason to put in (perhaps > significant) effort to identify and cover all the corner cases > associated with default-disabling? =20 A skilled admin could certainly use bootscrub=3Doff today. But I come at this from the Qubes OS project, where most users expect the system to work out of the box. Your average Qubes user won't know how or when to pass a Xen command line option. Having Xen detect encryption and do the right thing automatically would substantially benefit the project. =20 I also forgot to mention in my previous email that there's a broader opportunity with multi-key encryption (SEV, TME-MK). In this case, Xen could skip runtime scrubbing as well, since a domain's pages become unreadable the moment its key is destroyed. That's a separate feature, but I think it makes the case for Xen understanding and acting on the encryption capabilities of the platform rather than leaving it to users to set the right combination of options. =20 I believe the edge cases actually support the case for automatic configuration, since any user manually disabling the scrub would need to reason about kexec without a full hardware reset, suspend/resume restoring the previous key, and firmware writing to memory before encryption is activated, at very least. Auto-detection could handle these transparently rather than leaving them to the user. =20 Sam From xen-devel-bounces@lists.xenproject.org Mon May 04 16:25:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:25:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300111.1574673 (Exim 4.92) (envelope-from ) id 1wJw6K-00034d-LP; Mon, 04 May 2026 16:24:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300111.1574673; Mon, 04 May 2026 16:24:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw6K-00034W-Io; Mon, 04 May 2026 16:24:56 +0000 Received: by outflank-mailman (input) for mailman id 1300111; Mon, 04 May 2026 16:24:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw6J-00034Q-7L for xen-devel@lists.xenproject.org; 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Message-ID: Date: Mon, 4 May 2026 17:24:47 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Jan Beulich References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Type: text/plain; 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One is v->arch.hvm.guest_cr[2] >>>> and one is in the VMCB. >>>> >>>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>>> loads and saves the guest CR2 across VMRUN/VMExit. >>>> >>>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>>> migration is cooperative and not done from the #PF handler, this also goes >>>> unoticed by guests. >>>> >>>> It also means that an emulated MOV-from-CR2 reads a stale value. >>>> >>>> Reported-by: Stefano Stabellini >>>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>>> Signed-off-by: Andrew Cooper >>> Tested-by: Stefano Stabellini >> Thanks, sadly I made the mistake of extending my XTF PoC for this. >> >> There are also bugs on the emulated MOV-to-CR2 side, and they're far >> harder to untangle. > Any slightly closer details as to what? hvmemul_write_cr() updates guest_cr[2] but doesn't sync it into the VMCB.  This doesn't show up on Intel because CR2 is switched explicitly in RAX across VMEntry/exit. But, it's not the only problem path. svm_vmexit_do_cr_access() is the fasthpath exit for CR intercepts when decode assists are available.  hvm_mov_to_cr() and hvm_mov_from_cr() are asymmetric in their handling of CR2.  mov_from will read from guest_cr[2] but mov_to will domain crash. However, case 2 ought to be unreachable in hvm_mov_from_cr() because of how we program the intercepts, yet the QEMU bug which caused this to get noticed will trigger an ASSERT() if I were to put one in. So, do I fix up both to account for the fact we know QEMU is buggy with intercepts? > >> This patch probably wants to go in in this form, accepting that there >> are issues still to be addressed on the other side. > I agree: > Reviewed-by: Jan Beulich Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 04 16:42:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:42:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300119.1574682 (Exim 4.92) (envelope-from ) id 1wJwNM-00062a-2D; Mon, 04 May 2026 16:42:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300119.1574682; Mon, 04 May 2026 16:42:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJwNL-00062T-VN; Mon, 04 May 2026 16:42:31 +0000 Received: by outflank-mailman (input) for mailman id 1300119; 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We already >> have the "bootscrub=" command line option. Is there a reason this can't >> be used here as well? I.e. is there a strong reason to put in (perhaps >> significant) effort to identify and cover all the corner cases >> associated with default-disabling? > > A skilled admin could certainly use bootscrub=off today. But I come at > this from the Qubes OS project, where most users expect the system to > work out of the box. Your average Qubes user won't know how or when to > pass a Xen command line option. Having Xen detect encryption and do the > right thing automatically would substantially benefit the project. > > I also forgot to mention in my previous email that there's a broader > opportunity with multi-key encryption (SEV, TME-MK). In this case, Xen > could skip runtime scrubbing as well, since a domain's pages become > unreadable the moment its key is destroyed. That's a separate feature, > but I think it makes the case for Xen understanding and acting on the > encryption capabilities of the platform rather than leaving it to users > to set the right combination of options. > > I believe the edge cases actually support the case for automatic > configuration, since any user manually disabling the scrub would need > to reason about kexec without a full hardware reset, suspend/resume > restoring the previous key, and firmware writing to memory before > encryption is activated, at very least. Auto-detection could handle > these transparently rather than leaving them to the user. What exists in Xen right now is a mess. Scrubbing is ill-defined.  One part of it says "make sure after a crash we don't have old guest data around in memory", and encryption is specifically irrelevant for this case; the ephemeral key doesn't change on warm reset. Something relevant to QubeOS is that for DRTM (Anti Evil Maid), it is required (by the TXT spec at least) that Xen scrub memory between receiving a shutdown request and actioning it.  Failure to do so causes firmware to zero everything on the way back up.  Fixing this is an open TODO. Another aspect is to populate Xen's free memory pool with ready-to-go memory.  Here we have a weird split, because when scrubbing in Xen's idle loop as introduced, the boot time scrub was not disabled.  Except that doing this in the idle loop during boot is bad because it interferes with microcode loading during AP boot, which is why it's delayed until the machine is mostly up. There probably is room to tweak a little, but "RAM being encrypted" has no baring on the other safety justifications. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 04 18:50:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 18:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300138.1574691 (Exim 4.92) (envelope-from ) id 1wJyN3-0005Cn-4g; Mon, 04 May 2026 18:50:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300138.1574691; Mon, 04 May 2026 18:50:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJyN3-0005Cf-15; Mon, 04 May 2026 18:50:21 +0000 Received: by outflank-mailman (input) for mailman id 1300138; Mon, 04 May 2026 18:50:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJyN1-0005CZ-Tc for xen-devel@lists.xenproject.org; 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Date: Mon, 4 May 2026 20:50:10 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: xen-devel@lists.xenproject.org Cc: Bertrand Marquis , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH] automation/gitlab: introduce macOS build jobs Message-ID: References: <20260423190459.93299-1-roger.pau@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260423190459.93299-1-roger.pau@citrix.com> X-ClientProxiedBy: MR2P264CA0168.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:1::31) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SJ0PR03MB5648:EE_ X-MS-Office365-Filtering-Correlation-Id: 7e0bec7d-62e5-4687-7815-08deaa0dfa38 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: D2K1DYlZBPLQAoZeHm7dfesdxM2JRIrzS6TDDu7Ko70BJ+BhP8EjCOOkAfFjLz9/r5JLbyYfdfmZd7T2VPpzuWTn/vvZm5FfDykGajUTXuMKtgbLe3yNZeAKi3J1EV+KZkhT8AVCUlURoBdVSraO/WIfbJ3pQT336UQAGOtBBtb/JZE14hmKoQiRP1B17E+89DsRdtee2B6q9pNEiShuasKgQ3VFTgVUbeI6+46nXmA4VmzXwhAxIX+UnhjaHyKweqe0fNb+Nmbmo9q3/ub6wxPOCAgL8P7r/hQo/N+8Vpro08S2lPIjJCotpkji3VbymFZioEImO5I1/D/y/+sEAI9A/0a2RVaAt5CDSHpqn4vzsuAcmP3ACIM9/gKQ/faYQ4zMml8ZceVqCbhlUuRuV3Q1JwH8C6vHOi4h8qZt2MA1BVDVjsRZWNQBSBdoNJQULU82fCmHSRgJC8ur0YxLzTH/eEjorfKlsDyJBFeSLby/Ge3JItD5UeNKJTBhTzeuKuRrC5zAX0vMXEZny8Gfq9s59/RWfWbMbh0tkLYNw0dsgevCBS5HgMHX34lCRK3/AP/tpyDkI94Yq/krFvikqbuHsWYw2+XCM98T2aF17HwxyZPQ2ERuJ3GKbA24n/m9geZi58XVqAye2NtjhyCC3rGWQ08AUeDy3GEGBc+NTU+rtJJZ4a6iQwTl4RkCDLqPjlciSfUx5EtRhXlaQ0uibA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; 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Introduce two Gitlab macOS build jobs that > reproduce the ones present on CirrusCI. > > According to the "Community programs" Gitlab documentation [0] we get > 50,000 compute minutes per month. The arm64 job takes ~1m 15s, and the > x86_64 one ~2m. I think it's likely enough given the amount of minutes we > have available. We might need to reconsider if we add more tasks that > consume compute minutes. > > [0] https://docs.gitlab.com/subscriptions/community_programs/#gitlab-for-open-source Ping? Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon May 04 19:51:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 19:51:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300152.1574700 (Exim 4.92) (envelope-from ) id 1wJzJy-0004Ok-CY; Mon, 04 May 2026 19:51:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300152.1574700; Mon, 04 May 2026 19:51:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJzJy-0004Od-9x; Mon, 04 May 2026 19:51:14 +0000 Received: by outflank-mailman (input) for mailman id 1300152; Mon, 04 May 2026 19:51:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJzJw-0004OX-SP for xen-devel@lists.xenproject.org; Mon, 04 May 2026 19:51:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJzJu-00HGra-Np for xen-devel@lists.xenproject.org; Mon, 04 May 2026 21:51:10 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8f890-bab6-0a2a0a5309dd-0a2a450a8fc8-42 for ; Mon, 04 May 2026 21:51:10 +0200 Received: from [79.135.106.103] (helo=mail-106103.protonmail.ch) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8f8ae-56b3-0a2a450a0019-4f876a67b98f-3 for ; Mon, 04 May 2026 21:51:10 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777924268; x=1778183468; bh=2cNEIrg6yvrC6l7wVPRLypp8fTO1uZhpKDrUZobMLno=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=je26RxX8WUbwpdqO4benbbu3niagzNZxdal6hZUfoNbf2QqxO+it9fe6mLE2LQpeg XEGS00Knl0otLtrx2TpBhMVxr3S88H+EPNzpSoxaL+Hnl8EMMZNeahhFgpcWBmBNAF DkxQsQ/penOwSNE+q7qjYje4DmR4C+hMMdXuY8yDhQtxw1n1wxMhoKChmlPex7MVDE UNQaA4mNSTtyTyT9cGuMMkZyGpkIJcFLrFU4l+vTO8UpTdNs9MwMAf2FdzFqneJBUc zyfaOj7uUTX9jh27/4PcHCvdxpnC92PWkMT7OjxZBP2O+bYGNu7fqc4ClHNGNz90VW IBCPT8JmnzmJA== Date: Mon, 04 May 2026 19:51:02 +0000 To: Andrew Cooper From: "Samuel.Montgomery61" Cc: Jan Beulich , "xen-devel@lists.xenproject.org" Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: In-Reply-To: References: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 75318f11224ff374b7543e77aabf6c69a2df8c65 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1777924270-4757C8B7-531F4C19/0/0 X-purgate-type: clean X-purgate-size: 1220 On XX.05.2026 XX:XX, Andrew Cooper wrote: > One part of it says "make sure after a crash > we don't have old guest data around in memory", and encryption is > specifically irrelevant for this case; the ephemeral key doesn't change > on warm reset. =20 Could you clarify this? My understanding is that firmware re-runs on a warm reset and re-initializes TME with a new key. The key would only persist across kexec, where the CPU is never reset and firmware doesn't re-run. Am I wrong about that? =20 > Something relevant to QubeOS is that for DRTM (Anti Evil Maid), it is > required (by the TXT spec at least) that Xen scrub memory between > receiving a shutdown request and actioning it. =20 Agreed, but that's shutdown scrubbing, not boot scrubbing. A separate problem. =20 > Another aspect is to populate Xen's free memory pool with ready-to-go > memory. =20 I don't think "ready-to-go" requires zeroed pages. bootscrub=3Doff already hands out unscrubbed pages, and the debug build specifically poisons pages with a non-zero pattern to catch code that relies on them being zeroed. So the functional requirement is that pages are safe to hand out, which encryption satisfies, right? =20 Sam From xen-devel-bounces@lists.xenproject.org Tue May 05 05:48:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 05:48:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300176.1574710 (Exim 4.92) (envelope-from ) id 1wK8dv-0007et-IS; Tue, 05 May 2026 05:48:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300176.1574710; Tue, 05 May 2026 05:48:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8dv-0007eg-DW; Tue, 05 May 2026 05:48:27 +0000 Received: by outflank-mailman (input) for mailman id 1300176; Tue, 05 May 2026 05:48:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8dt-0007ea-LS for xen-devel@lists.xenproject.org; Tue, 05 May 2026 05:48:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wK8ds-003UP4-QM for xen-devel@lists.xenproject.org; Tue, 05 May 2026 07:48:24 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f984a7-e002-0a2a0a5209dd-0a2a4509d070-2 for ; Tue, 05 May 2026 07:48:24 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f984a8-2497-0a2a45090019-d1558035f1fd-3 for ; Tue, 05 May 2026 07:48:24 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso57761085e9.3 for ; Mon, 04 May 2026 22:48:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 22:48:23 -0700 (PDT) Message-ID: <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Date: Tue, 5 May 2026 07:48:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests From: Jan Beulich To: Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1777960104-4216DA53-2EC43815/0/0 X-purgate-type: clean X-purgate-size: 1379 On 04.05.2026 12:45, Jan Beulich wrote: > On 28.04.2026 09:48, Roger Pau Monné wrote: >> On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >>> This series introduces initial Q35 chipset support for HVM guests, based on the >>> patchset at [1] by Alexey Gerasimenko. >>> >>> Basic support means that this patchset allows to start an HVM guest that >>> emulates a Q35 chipset via Qemu and implements access to PCIe extended >>> configuration space for such devices emulated by Qemu. >>> >>> Support for PCIe device passthrough is not implemented yet. This is planned but >>> implies modifications in the hypervisor and the firmwares, mainly for the >>> support of multiple PCI buses. >> >> Why do you need multi bus support to expose PCIe capabilities? I'm >> not seeing the relation between those two. You could still expose a >> single bus on the MCFG table. > > Can a valid PCIe topology be expressed with just bus 0? If an endpoint > to be handed to a guest isn't root complex integrated, would it be valid > to make it appear so by putting it on bus 0? We discussed this with Roger on our x86 call, and we came to the agreement that for the time being putting everything on bus 0 may be good enough. Introducing of bridge(s) and anything else that's required for multi-bus support will want to be a separate piece of work. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 05:50:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 05:50:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300183.1574719 (Exim 4.92) (envelope-from ) id 1wK8fQ-000879-QS; Tue, 05 May 2026 05:50:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300183.1574719; Tue, 05 May 2026 05:50:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8fQ-000872-N9; Tue, 05 May 2026 05:50:00 +0000 Received: by outflank-mailman (input) for mailman id 1300183; Tue, 05 May 2026 05:49:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8fP-00086w-In for xen-devel@lists.xenproject.org; Tue, 05 May 2026 05:49:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wK8fO-004V5v-VA for xen-devel@lists.xenproject.org; Tue, 05 May 2026 07:49:58 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f984fb-bab6-0a2a0a5309dd-0a2a45039e54-28 for ; Tue, 05 May 2026 07:49:58 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f98506-672d-0a2a45030019-d1558029a4cb-3 for ; Tue, 05 May 2026 07:49:58 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891f625344so51185705e9.0 for ; Mon, 04 May 2026 22:49:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 22:49:58 -0700 (PDT) Message-ID: Date: Tue, 5 May 2026 07:49:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests From: Jan Beulich To: Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777960198-A3161938-70672F11/0/0 X-purgate-type: clean X-purgate-size: 1583 On 05.05.2026 07:48, Jan Beulich wrote: > On 04.05.2026 12:45, Jan Beulich wrote: >> On 28.04.2026 09:48, Roger Pau Monné wrote: >>> On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >>>> This series introduces initial Q35 chipset support for HVM guests, based on the >>>> patchset at [1] by Alexey Gerasimenko. >>>> >>>> Basic support means that this patchset allows to start an HVM guest that >>>> emulates a Q35 chipset via Qemu and implements access to PCIe extended >>>> configuration space for such devices emulated by Qemu. >>>> >>>> Support for PCIe device passthrough is not implemented yet. This is planned but >>>> implies modifications in the hypervisor and the firmwares, mainly for the >>>> support of multiple PCI buses. >>> >>> Why do you need multi bus support to expose PCIe capabilities? I'm >>> not seeing the relation between those two. You could still expose a >>> single bus on the MCFG table. >> >> Can a valid PCIe topology be expressed with just bus 0? If an endpoint >> to be handed to a guest isn't root complex integrated, would it be valid >> to make it appear so by putting it on bus 0? > > We discussed this with Roger on our x86 call, and we came to the agreement > that for the time being putting everything on bus 0 may be good enough. > Introducing of bridge(s) and anything else that's required for multi-bus > support will want to be a separate piece of work. Oh, and: Where applicable this (deliberate) restriction (or should I say mistreatment) will want calling out in description(s). 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Mon, 04 May 2026 23:00:55 -0700 (PDT) Message-ID: Date: Tue, 5 May 2026 08:00:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Andrew Cooper Cc: Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777960855-F5204CF5-BA79FEE4/0/0 X-purgate-type: clean X-purgate-size: 2233 On 04.05.2026 18:24, Andrew Cooper wrote: > On 04/05/2026 6:14 am, Jan Beulich wrote: >> On 02.05.2026 00:21, Andrew Cooper wrote: >>> On 01/05/2026 10:44 pm, Stefano Stabellini wrote: >>>> On Fri, 1 May 2026, Andrew Cooper wrote: >>>>> Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] >>>>> and one is in the VMCB. >>>>> >>>>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>>>> loads and saves the guest CR2 across VMRUN/VMExit. >>>>> >>>>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>>>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>>>> migration is cooperative and not done from the #PF handler, this also goes >>>>> unoticed by guests. >>>>> >>>>> It also means that an emulated MOV-from-CR2 reads a stale value. >>>>> >>>>> Reported-by: Stefano Stabellini >>>>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>>>> Signed-off-by: Andrew Cooper >>>> Tested-by: Stefano Stabellini >>> Thanks, sadly I made the mistake of extending my XTF PoC for this. >>> >>> There are also bugs on the emulated MOV-to-CR2 side, and they're far >>> harder to untangle. >> Any slightly closer details as to what? > > hvmemul_write_cr() updates guest_cr[2] but doesn't sync it into the > VMCB.  This doesn't show up on Intel because CR2 is switched explicitly > in RAX across VMEntry/exit. > > But, it's not the only problem path. > > svm_vmexit_do_cr_access() is the fasthpath exit for CR intercepts when > decode assists are available.  hvm_mov_to_cr() and hvm_mov_from_cr() are > asymmetric in their handling of CR2.  mov_from will read from > guest_cr[2] but mov_to will domain crash. > > However, case 2 ought to be unreachable in hvm_mov_from_cr() because of > how we program the intercepts, yet the QEMU bug which caused this to get > noticed will trigger an ASSERT() if I were to put one in. > > So, do I fix up both to account for the fact we know QEMU is buggy with > intercepts? I think that's going to be (about) the best we can do. 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Mon, 04 May 2026 23:06:26 -0700 (PDT) MIME-Version: 1.0 References: <3235FD35-5EF1-4E77-B30E-AABEABCC081C@arm.com> In-Reply-To: <3235FD35-5EF1-4E77-B30E-AABEABCC081C@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 09:06:15 +0300 X-Gm-Features: AVHnY4KGuXuIJPXZ56mqKw7xhaX19h8vIRKNSJ_Ys9-_ZZRDHVjaIz2EsfxTdIA Message-ID: Subject: Re: [PATCH v8 03/13] xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777961187-F620CCF5-ECEF7BE5/0/0 X-purgate-type: clean X-purgate-size: 5250 Hi Luca, Thank you for the review. On Wed, Apr 22, 2026 at 6:57=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > + > > +static int gicv3_lpi_disable_lpis(void __iomem *rdist_base) > > +{ > > + uint32_t reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > + int ret; > > + > > + if ( !(reg & GICR_CTLR_ENABLE_LPIS) ) > > + return 0; > > + > > + writel_relaxed(reg & ~GICR_CTLR_ENABLE_LPIS, rdist_base + GICR_CTL= R); > > + > > + /* > > + * The spec only guarantees programmability when we have observed = the bit > > + * cleared. Where clearing is supported, RWP must reach 0 before t= ouching > > + * PROPBASER/PENDBASER again. > > + */ > > + wmb(); > > + > > + ret =3D gicv3_do_wait_for_rwp(rdist_base); > > I=E2=80=99m looking into the implementation of gicv3_do_wait_for_rwp() an= d I see > it=E2=80=99s polling on bit 31 (UWP) instead of bit 3 (RWP)? > > Not related to this patch but I feel we need to raise this. Good catch, thanks. UWP does have SGI-related semantics, but it is not the same as redistributo= r RWP. The existing helper is used as an RWP wait helper after redistributor register writes, so the redistributor path should poll GICR_CTLR.RWP rather than GICR_CTLR.UWP. I will send a separate prerequisite patch to make the redistributor path use GICR_CTLR_RWP. > > > + if ( ret ) > > + return ret; > > + > > + reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > + if ( reg & GICR_CTLR_ENABLE_LPIS ) > > + return -EBUSY; > > + > > + return 0; > > +} > > + > > /* > > * Tell a redistributor about the (shared) property table, allocating o= ne > > * if not already done. > > @@ -373,7 +434,21 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base= ) > > /* Make sure LPIs are disabled before setting up the tables. */ > > reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > if ( reg & GICR_CTLR_ENABLE_LPIS ) > > - return -EBUSY; > > + { > > + if ( gicv3_lpi_tables_match(rdist_base) ) > > + return -EBUSY; > > + > > + ret =3D gicv3_lpi_disable_lpis(rdist_base); > > + if ( ret =3D=3D -EBUSY ) > > + { > > + printk(XENLOG_ERR > > + "GICv3: CPU%d: LPIs still enabled with unexpected r= edistributor tables\n", > > + smp_processor_id()); > > + return -EINVAL; > > + } > > + if ( ret ) > > + return ret; > > + } > > > > ret =3D gicv3_lpi_set_pendtable(rdist_base); > > if ( ret ) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index bc07f97c16..34fb065afc 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -274,8 +274,8 @@ static void gicv3_enable_sre(void) > > isb(); > > } > > > > -/* Wait for completion of a distributor change */ > > -static void gicv3_do_wait_for_rwp(void __iomem *base) > > +/* Wait for completion of a distributor/redistributor write-pending ch= ange. */ > > +int gicv3_do_wait_for_rwp(void __iomem *base) > > { > > uint32_t val; > > bool timeout =3D false; > > @@ -295,17 +295,22 @@ static void gicv3_do_wait_for_rwp(void __iomem *b= ase) > > } while ( 1 ); > > > > if ( timeout ) > > + { > > dprintk(XENLOG_ERR, "RWP timeout\n"); > > + return -ETIMEDOUT; > > + } > > + > > + return 0; > > } > > > > static void gicv3_dist_wait_for_rwp(void) > > { > > - gicv3_do_wait_for_rwp(GICD); > > + (void)gicv3_do_wait_for_rwp(GICD); > > } > > > > static void gicv3_redist_wait_for_rwp(void) > > { > > - gicv3_do_wait_for_rwp(GICD_RDIST_BASE); > > + (void)gicv3_do_wait_for_rwp(GICD_RDIST_BASE); > > } > > > > static void gicv3_wait_for_rwp(int irq) > > @@ -925,7 +930,7 @@ static int __init gicv3_populate_rdist(void) > > gicv3_set_redist_address(rdist_addr, procnum); > > > > ret =3D gicv3_lpi_init_rdist(ptr); > > - if ( ret && ret !=3D -ENODEV ) > > + if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > { > > printk("GICv3: CPU%d: Cannot initialize LPIs: %= u\n=E2=80=9D, > > This should be the other way around? %u for smp_processor_id() and %d for= ret? You're right, thanks. I will fix the format string. > > > smp_processor_id(), ret); > > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/inclu= de/asm/gic_v3_its.h > > index fc5a84892c..081bd19180 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_its.h > > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > > Why this header and not gic.h? You're right, this prototype is not ITS-specific. I will move it to gic.h. Best regards, Mykola > > > @@ -133,6 +133,7 @@ struct host_its { > > > > /* Map a collection for this host CPU to each host ITS. */ > > int gicv3_its_setup_collection(unsigned int cpu); > > +int gicv3_do_wait_for_rwp(void __iomem *base); > > > > #ifdef CONFIG_HAS_ITS > > > > > > The rest looks ok to me! > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 06:48:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 06:48:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300218.1574746 (Exim 4.92) (envelope-from ) id 1wK9a9-0000E1-EY; Tue, 05 May 2026 06:48:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300218.1574746; Tue, 05 May 2026 06:48:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK9a9-0000Do-B6; Tue, 05 May 2026 06:48:37 +0000 Received: by outflank-mailman (input) for mailman id 1300218; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0/sFvgQfzg7e+mtzbxdwkEpQLW0wyPUyCO3YAW5FMz7cxcfmiDU1iSYkXNw6lAKUI+VrBoHQ2zwMHc7QN6eirZRM4C2F/XV4s3/9MRzpraj81HcGpF0EHbxE85RvqE3w5NkHRc4ah3fcjqBIoeA5Qu1mXKp6CEfMF7Z1paxtXh+9iBzp452MNoUaV5tcsXiHxpO8SKUncEpLl/Sl40x6lXuKGVaigI90ib7Kx9wdQSseTkGSHZcW15lQpIEmAVNoee/NBbo/54RrV0eF43OHLssT5kK8RbWAf/KG9Mu9kv2cOiYlPM3tPQmtnlwr0tDkxSajMubVZYKd1Lkw+PKZgzaXtcpDqdnaQwwSYnzeivpUk69HkOPIOZJnwlbhsz+6RLVBv1ztra+l+9bKPl8U2IHaP9KeppZWcYlGmIXiGclRWDpIzAisNZBo3P9Mjqh6 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 06:48:23.7740 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4337b790-5199-4aaa-8f73-08deaa724da8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6184.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8451 X-purgate-ID: tlsNG-42698a/1777963710-7D165F3B-908CECB4/0/0 X-purgate-type: clean X-purgate-size: 1570 On 04-May-26 17:28, Roger Pau Monné wrote: > On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >> the frame table starts at PDX 0, which is only true on x86. ARM >> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >> defines it). >> >> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >> to 0 when the arch does not define it. This makes the generic macros >> correct for all architectures, even though they are only used on x86 >> today. > > Hm, I assume this offset was added because the original mask PDX > compression won't (usually) compress the gap between 0 and the start > of RAM. However the newish offset PDX compression should be able to > compress from 0 to start of RAM, and hence you don't need to apply > an extra PDX offset there? > > If that's indeed the case it might be better to integrate > frametable_base_pdx into the mask compression algorithm itself, so > that on some arches it's a mask plus a decrease. The offset is needed regardless of whether compression is used. With CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. 0x80000000, the first valid PDX is 0x80000. Without frametable_base_pdx the frame table would have to be indexed from 0, wasting 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. So frametable_base_pdx is really a frame table indexing offset, not something tied to the compression algorithm. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 07:13:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 07:13:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300230.1574755 (Exim 4.92) (envelope-from ) id 1wK9xx-0004K4-EH; Tue, 05 May 2026 07:13:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300230.1574755; Tue, 05 May 2026 07:13:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK9xx-0004Jx-Bd; Tue, 05 May 2026 07:13:13 +0000 Received: by outflank-mailman (input) for mailman id 1300230; Tue, 05 May 2026 07:13:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 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=?utf-8?B?TTNXVGovcVV1czIra2I5cTFFWGhHWEhhTWsxWmptQzdvQnpWSmxPdz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 112036f2-ac58-4d03-395e-08deaa75c191 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 07:13:07.0933 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: h87a38DH2uw52hpMTX7I67I2fvgTric9mRzCLdQ0BUHQSw3mGwYG40vNChTipRjc6KYtGKBQ1Q5eufeK1Bst3A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR03MB5752 X-purgate-ID: tlsNG-720697/1777965191-B3563161-C92E432A/0/0 X-purgate-type: clean X-purgate-size: 2527 On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: > > > On 04-May-26 17:28, Roger Pau Monné wrote: > > On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: > >> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume > >> the frame table starts at PDX 0, which is only true on x86. ARM > >> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >> defines it). > >> > >> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >> to 0 when the arch does not define it. This makes the generic macros > >> correct for all architectures, even though they are only used on x86 > >> today. > > > > Hm, I assume this offset was added because the original mask PDX > > compression won't (usually) compress the gap between 0 and the start > > of RAM. However the newish offset PDX compression should be able to > > compress from 0 to start of RAM, and hence you don't need to apply > > an extra PDX offset there? > > > > If that's indeed the case it might be better to integrate > > frametable_base_pdx into the mask compression algorithm itself, so > > that on some arches it's a mask plus a decrease. > The offset is needed regardless of whether compression is used. With > CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > 0x80000000, the first valid PDX is 0x80000. OK, so you are doing some (kind of) address space compression (removing the leading empty range to the first RAM region) even when PDX is disabled. > Without frametable_base_pdx > the frame table would have to be indexed from 0, wasting > 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. But you don't really "waste" memory, just address space? Oh, maybe not on ARM as it doesn't use pdx_group_valid? And so you unconditionally populate the frametable from PDX 0 to max PDX. > So frametable_base_pdx is really a frame table indexing offset, not > something tied to the compression algorithm. Right, it just seems odd to do that extra subtraction when using offset compression, as in that case the compression logic itself should remove that leading gap when RAM doesn't start at 0. Instead of generalizing and expanding the usage of frametable_base_pdx it might be better to implement support for pdx_group_valid when populating the frame table, and switch by default to the offset compression method that will already remove any leading unpopulated spaces? Thanks, Roger. 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Tue, 05 May 2026 00:26:43 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 10:26:31 +0300 X-Gm-Features: AVHnY4Ky8uJFLCBFZxjqUatpRvUbmjeQYVNb3WJbGYVqkHisl24pBjVF68cIxuo Message-ID: Subject: Re: [PATCH v8 04/13] xen/arm: gic-v3: Implement GICv3 suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-42698a/1777966004-7F57BF3B-15AC97D2/0/0 X-purgate-type: clean X-purgate-size: 16123 Hi Luca, Thank you for the review. On Thu, Apr 23, 2026 at 2:29=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index 34fb065afc..d182a71478 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -1072,12 +1072,12 @@ out: > > return res; > > } > > > > -static void gicv3_hyp_disable(void) > > +static void gicv3_hyp_enable(bool enable) > > { > > register_t hcr; > > > > hcr =3D READ_SYSREG(ICH_HCR_EL2); > > - hcr &=3D ~GICH_HCR_EN; > > + hcr =3D enable ? (hcr | GICH_HCR_EN) : (hcr & ~GICH_HCR_EN); > > WRITE_SYSREG(hcr, ICH_HCR_EL2); > > isb(); > > } > > @@ -1184,7 +1184,7 @@ static void gicv3_disable_interface(void) > > spin_lock(&gicv3.lock); > > > > gicv3_cpu_disable(); > > - gicv3_hyp_disable(); > > + gicv3_hyp_enable(false); > > > > spin_unlock(&gicv3.lock); > > } > > @@ -1920,6 +1920,313 @@ static bool gic_dist_supports_lpis(void) > > return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +/* This struct represent block of 32 IRQs */ > > NIT: s/represent/represents Ack. > > > +struct dist_irq_block { > > + uint32_t icfgr[2]; > > + uint32_t ipriorityr[8]; > > + uint64_t irouter[32]; > > + uint32_t isactiver; > > + uint32_t isenabler; > > +}; > > + > > +struct redist_ctx { > > + uint32_t ctlr; > > + uint32_t icfgr; /* only PPIs stored */ > > + uint32_t igroupr; > > I think Xen writes also GICD_IGROUPRE, we are not saving it so in case= of a reset > we would have GICD_IGROUPRE containing the reset value which is zero. > Or we could decide to re-initialise it in the same way Xen does (all 1s). Yes, good point. For the normal SPI range I re-initialise GICD_IGROUPR to all 1s during resu= me, but I missed doing the same for the eSPI range. I will add the correspondin= g GICD_IGROUPRE re-initialisation, matching the normal Xen initialisation = path. > > > + uint32_t ipriorityr[8]; > > + uint32_t isactiver; > > + uint32_t isenabler; > > + > > + uint64_t pendbase; > > + uint64_t propbase; > > +}; > > + > > +/* GICv3 registers to be saved/restored on system suspend/resume */ > > +struct gicv3_ctx { > > + struct dist_ctx { > > + uint32_t ctlr; > > + struct dist_irq_block *irqs, *espi_irqs; > > NIT: I would declare them one after the other and not in the same line, b= ut this is a matter of taste > maybe so I will leave the decision to the maintainers. Ack. > > > + } dist; > > + > > + /* have only one rdist structure for last running CPU during suspe= nd */ > > + struct redist_ctx rdist; > > + > > + struct cpu_ctx { > > + uint32_t ctlr; > > + uint32_t pmr; > > + uint32_t bpr; > > + uint32_t sre_el2; > > + uint32_t grpen; > > + } cpu; > > +}; > > + > > +static struct gicv3_ctx gicv3_ctx; > > + > > +static void __init gicv3_alloc_context(void) > > +{ > > + uint32_t blocks =3D DIV_ROUND_UP(gicv3_info.nr_lines, 32); > > + > > + /* The spec allows for systems without any SPIs */ > > + if ( blocks > 1 ) > > + { > > + gicv3_ctx.dist.irqs =3D xzalloc_array(struct dist_irq_block, b= locks - 1); > > + if ( !gicv3_ctx.dist.irqs ) > > + panic("Failed to allocate memory for GICv3 suspend context= \n"); > > + } > > + > > +#ifdef CONFIG_GICV3_ESPI > > + if ( !gic_number_espis() ) > > + return; > > + > > + blocks =3D gic_number_espis() / 32; > > + gicv3_ctx.dist.espi_irqs =3D xzalloc_array(struct dist_irq_block, = blocks); > > + if ( !gicv3_ctx.dist.espi_irqs ) > > + panic("Failed to allocate memory for GICv3 eSPI suspend contex= t\n"); > > +#endif > > +} > > + > > +static int gicv3_disable_redist(void) > > +{ > > + void __iomem *waker =3D GICD_RDIST_BASE + GICR_WAKER; > > + s_time_t deadline; > > + > > + /* > > + * Avoid infinite loop if Non-secure does not have access to GICR_= WAKER. > > + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: > > + * When GICD_CTLR.DS =3D=3D 0 and an access is Non-secure acce= sses to this > > + * register are RAZ/WI. > > + */ > > + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) > > + return 0; > > + > > + deadline =3D NOW() + MILLISECS(1000); > > + > > + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, w= aker); > > + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) =3D=3D = 0 ) > > + { > > + if ( NOW() > deadline ) > > + { > > + printk("GICv3: Timeout waiting for redistributor to sleep\= n"); > > + return -ETIMEDOUT; > > + } > > + cpu_relax(); > > + udelay(10); > > + } > > + > > + return 0; > > +} > > + > > +#define GET_SPI_REG_OFFSET(name, is_espi) \ > > + ((is_espi) ? GICD_##name##nE : GICD_##name) > > + > > +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + irqs->icfgr[0] =3D readl_relaxed(base); > > + irqs->icfgr[1] =3D readl_relaxed(base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + irqs->ipriorityr[irq] =3D readl_relaxed(base + 4 * irq); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + irqs->irouter[irq] =3D readq_relaxed_non_atomic(base + 8 * irq= ); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + irqs->isactiver =3D readl_relaxed(base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + irqs->isenabler =3D readl_relaxed(base); > > +} > > + > > +static void gicv3_restore_spi_irq_block(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + writel_relaxed(irqs->icfgr[0], base); > > + writel_relaxed(irqs->icfgr[1], base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); > > > The [1] 12.9.22 GICD_IROUTER says "these registers are used only when = affinity routing is enabled. > When affinity routing is not enabled: These registers are RES0. An implem= entation is permitted to make > the register RAZ/WI in this case=E2=80=9D > > So I think these needs to be written after we set GICD_CTLR or we are goi= ng to loose anything written there > and also the configuration won=E2=80=99t be restored. You are right. Restoring IROUTER before restoring the affinity-routing stat= e is not safe, because these registers are only meaningful when affinity routing= is enabled. I will fix the restore ordering in the next version. > > > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + writel_relaxed(irqs->isenabler, base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + writel_relaxed(irqs->isactiver, base); > > +} > > + > > +static int gicv3_suspend(void) > > +{ > > + unsigned int i; > > + void __iomem *base; > > + int ret; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + /* Save GICC configuration */ > > + gicv3_ctx.cpu.ctlr =3D READ_SYSREG(ICC_CTLR_EL1); > > + gicv3_ctx.cpu.pmr =3D READ_SYSREG(ICC_PMR_EL1); > > + gicv3_ctx.cpu.bpr =3D READ_SYSREG(ICC_BPR1_EL1); > > + gicv3_ctx.cpu.sre_el2 =3D READ_SYSREG(ICC_SRE_EL2); > > + gicv3_ctx.cpu.grpen =3D READ_SYSREG(ICC_IGRPEN1_EL1); > > + > > + gicv3_disable_interface(); > > this one is calling also gicv3_cpu_disable() that will zero ICC_IGRPEN1_E= L1 ... > > > + > > + ret =3D gicv3_disable_redist(); > > + if ( ret ) > > + goto out_enable_iface; > > =E2=80=A6 but when we fail here ... > > > + > > + /* Save GICR configuration */ > > + gicv3_redist_wait_for_rwp(); > > + > > + base =3D GICD_RDIST_BASE; > > + > > + rdist->ctlr =3D readl_relaxed(base + GICR_CTLR); > > + > > + rdist->propbase =3D readq_relaxed(base + GICR_PROPBASER); > > + rdist->pendbase =3D readq_relaxed(base + GICR_PENDBASER); > > + > > + base =3D GICD_RDIST_SGI_BASE; > > + > > + /* Save priority on PPI and SGI interrupts */ > > + for ( i =3D 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) > > + rdist->ipriorityr[i] =3D readl_relaxed(base + GICR_IPRIORITYR0= + 4 * i); > > + > > + rdist->isactiver =3D readl_relaxed(base + GICR_ISACTIVER0); > > + rdist->isenabler =3D readl_relaxed(base + GICR_ISENABLER0); > > + rdist->igroupr =3D readl_relaxed(base + GICR_IGROUPR0); > > + rdist->icfgr =3D readl_relaxed(base + GICR_ICFGR1); > > + > > + /* Save GICD configuration */ > > + gicv3_dist_wait_for_rwp(); > > + gicv3_ctx.dist.ctlr =3D readl_relaxed(GICD + GICD_CTLR); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, fals= e); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, tru= e); > > +#endif > > + > > + return 0; > > + > > + out_enable_iface: > > + gicv3_hyp_enable(true); > > + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); > > we don=E2=80=99t recover ICC_IGRPEN1_EL1 Yes, you are right. This series missed the change introduced by commit 18b718b6af3d ("xen/arm: gic-v3: disable Group 1 before CPU power-down"). Since gicv3_cpu_disable() = now disables ICC_IGRPEN1_EL1, the error path needs to restore it before returni= ng. I will fix this in the next version. Best regards, Mykola > > > + isb(); > > + > > + return ret; > > +} > > + > > +static void gicv3_resume(void) > > +{ > > + int ret; > > + unsigned int i; > > + void __iomem *base; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + writel_relaxed(0, GICD + GICD_CTLR); > > + > > + for ( i =3D NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i +=3D 32 = ) > > + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) = * 4); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_restore_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, fa= lse); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + gicv3_restore_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, t= rue); > > +#endif > > + > > + writel_relaxed(gicv3_ctx.dist.ctlr, GICD + GICD_CTLR); > > + gicv3_dist_wait_for_rwp(); > > + > > + ret =3D gicv3_lpi_init_rdist(GICD_RDIST_BASE); > > + /* > > + * If LPIs are already enabled, assume firmware or the still-power= ed > > + * redistributor has valid PROPBASER/PENDBASER and skip reprogramm= ing. > > + * Return -EBUSY so callers can ignore this case. > > + */ > > + if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > + panic("GICv3: Failed to re-initialize LPIs during resume\n"); > > + else if ( ret =3D=3D -EBUSY ) /* extra checks, just to be sure */ > > + { > > + base =3D GICD_RDIST_BASE; > > + if ( readq_relaxed(base + GICR_PROPBASER) !=3D rdist->propbase= || > > + readq_relaxed(base + GICR_PENDBASER) !=3D rdist->pendbase= ) > > + { > > + panic("GICv3: LPIs already enabled with unexpected PROPBAS= ER/PENDBASER during resume\n"); > > + } > > + } > > + > > + /* Restore GICR (Redistributor) configuration */ > > + if ( gicv3_enable_redist() ) > > + panic("GICv3: Failed to re-enable redistributor during resume\= n"); > > + > > + base =3D GICD_RDIST_SGI_BASE; > > + > > + writel_relaxed(GENMASK(31, 0), base + GICR_ICENABLER0); > > + gicv3_redist_wait_for_rwp(); > > + > > + for ( i =3D 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) > > + writel_relaxed(rdist->ipriorityr[i], base + GICR_IPRIORITYR0 += i * 4); > > + > > + writel_relaxed(rdist->isactiver, base + GICR_ISACTIVER0); > > + writel_relaxed(rdist->igroupr, base + GICR_IGROUPR0); > > + writel_relaxed(rdist->icfgr, base + GICR_ICFGR1); > > + > > + gicv3_redist_wait_for_rwp(); > > + > > + writel_relaxed(rdist->isenabler, base + GICR_ISENABLER0); > > + writel_relaxed(rdist->ctlr, GICD_RDIST_BASE + GICR_CTLR); > > + > > + gicv3_redist_wait_for_rwp(); > > + > > + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); > > + isb(); > > + > > + /* Restore CPU interface (System registers) */ > > + WRITE_SYSREG(gicv3_ctx.cpu.pmr, ICC_PMR_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.bpr, ICC_BPR1_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); > > + isb(); > > + > > + gicv3_hyp_init(); > > +} > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* Set up the GIC */ > > static int __init gicv3_init(void) > > { > > @@ -1994,6 +2301,10 @@ static int __init gicv3_init(void) > > > > gicv3_hyp_init(); > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + gicv3_alloc_context(); > > +#endif > > + > > out: > > spin_unlock(&gicv3.lock); > > > > @@ -2033,6 +2344,10 @@ static const struct gic_hw_operations gicv3_ops = =3D { > > #endif > > .iomem_deny_access =3D gicv3_iomem_deny_access, > > .do_LPI =3D gicv3_do_LPI, > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + .suspend =3D gicv3_suspend, > > + .resume =3D gicv3_resume, > > +#endif > > }; > > > > static int __init gicv3_dt_preinit(struct dt_device_node *node, const v= oid *data) > > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/incl= ude/asm/gic_v3_defs.h > > index c373b94d19..992c8f9c2f 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > > @@ -94,6 +94,7 @@ > > #define GICD_TYPE_LPIS (1U << 17) > > > > #define GICD_CTLR_RWP (1UL << 31) > > +#define GICD_CTLR_DS (1U << 6) > > #define GICD_CTLR_ARE_NS (1U << 4) > > #define GICD_CTLR_ENABLE_G1A (1U << 1) > > #define GICD_CTLR_ENABLE_G1 (1U << 0) > > > > Cheers, > Luca > > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 07:35:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 07:35:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300253.1574773 (Exim 4.92) (envelope-from ) id 1wKAJO-0007q8-E4; Tue, 05 May 2026 07:35:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300253.1574773; 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bh=bIQ6B5QXxPXvMZAEqD+pNtNTZG1nBhilZB1wzodtdWQ=; b=vw8uMB/QxiHbyK+iNor5i5aZT/jTv9neGt01MDedjzPP0hUm5iwFWOLMwpdfObURQQ74wVp8+udP7qCbZLhbJEpKMvorsN7LKBYZUyNhWdCxktWzE3YknBLENke1YUCGqKlNLd9sS7ORHCM8CQTKnNATRHO6LUrv2LcecrXShn0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Date: Tue, 5 May 2026 09:35:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , Timothy Pearson , Teddy Astie References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UCC6pGxMKUHVU6s3G5rEyrJx77K8Phxhkit3D8xfKHkzNkBu81ZZzMfx3qLV2EoL+JpPuWdpdaI4lCgHoyoNqUyUeqlonPFDYQv4IZNwx7Bl9eYDKmEp21lN4n739Rkz0Lj4lzD9tp8oJFRHj18+Ixxa01pSFveTP7Z6oKYPHYCR2ks7vPdqIK93/nsHpR73AiHFyWtaFsrQGrfKZxJMtFfQVc/6Qawraqh484fHWwyYIRGmnjcp0W8NifWVizIEZNYYsf2BhOq88GIoQX1TWs6aJtb8ZbBOfNwrjO7MDzd/dye8sMdtVxVVliGVyLGRfkrJ+qUDYstHuNgjIgxsQ+hp5pJHbFtBwR8eNYiOuFqOW6yv4buuL8hBrBZehNMuVJaabPHqDoegwWNunRzC7+4AZLITN3YOBj3rmp+zxJVmremZlbP4l5l7wS9xtKVr X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 07:35:13.9109 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4444458-816b-42d3-e7f2-08deaa78d8a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9492 X-purgate-ID: tlsNG-bad1c0/1777966518-486A8A53-D82A06C7/0/0 X-purgate-type: clean X-purgate-size: 3533 On 05-May-26 09:13, Roger Pau Monné wrote: > On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >> >> >> On 04-May-26 17:28, Roger Pau Monné wrote: >>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>> defines it). >>>> >>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>> to 0 when the arch does not define it. This makes the generic macros >>>> correct for all architectures, even though they are only used on x86 >>>> today. >>> >>> Hm, I assume this offset was added because the original mask PDX >>> compression won't (usually) compress the gap between 0 and the start >>> of RAM. However the newish offset PDX compression should be able to >>> compress from 0 to start of RAM, and hence you don't need to apply >>> an extra PDX offset there? >>> >>> If that's indeed the case it might be better to integrate >>> frametable_base_pdx into the mask compression algorithm itself, so >>> that on some arches it's a mask plus a decrease. >> The offset is needed regardless of whether compression is used. With >> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >> 0x80000000, the first valid PDX is 0x80000. > > OK, so you are doing some (kind of) address space compression (removing > the leading empty range to the first RAM region) even when PDX is > disabled. > >> Without frametable_base_pdx >> the frame table would have to be indexed from 0, wasting >> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > > But you don't really "waste" memory, just address space? Oh, maybe > not on ARM as it doesn't use pdx_group_valid? And so you > unconditionally populate the frametable from PDX 0 to max PDX. With pdx_group_valid (which this series adds) we wouldn't waste physical memory for the leading gap. But we'd still waste virtual address space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter because the full range from PDX 0 must fit. For example with RAM starting at 5TB the virtual offset before the first usable entry would be ~70GB — more than the entire 32GB FRAMETABLE_SIZE on ARM64. > >> So frametable_base_pdx is really a frame table indexing offset, not >> something tied to the compression algorithm. > > Right, it just seems odd to do that extra subtraction when using > offset compression, as in that case the compression logic itself > should remove that leading gap when RAM doesn't start at 0. > > Instead of generalizing and expanding the usage of frametable_base_pdx > it might be better to implement support for pdx_group_valid when > populating the frame table, and switch by default to the offset > compression method that will already remove any leading unpopulated > spaces? Switching the compression method would be a bigger change, and with feature freeze on Friday I'd prefer not to get into that now. The current approach is minimal and self-contained and works with mask and no-pdx which is what we use nowadays: frametable_base_pdx already existed on ARM and PPC, we're just making the generic macros aware of it as Julien requested (in v1 I just overwrote the macro in local file). We can revisit the compression strategy as a follow-up next release. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 08:07:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:07:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300293.1574814 (Exim 4.92) (envelope-from ) id 1wKAo0-0004bF-EH; Tue, 05 May 2026 08:07:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300293.1574814; Tue, 05 May 2026 08:07:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKAo0-0004b8-BL; Tue, 05 May 2026 08:07:00 +0000 Received: by outflank-mailman (input) for mailman id 1300293; Tue, 05 May 2026 08:06:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKAny-0004b2-TK for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:06:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKAny-0054uZ-4y for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:06:58 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9a513-e002-0a2a0a5209dd-0a2a450792aa-48 for ; Tue, 05 May 2026 10:06:57 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9a521-229c-0a2a45070019-c387df83ce10-3 for ; Tue, 05 May 2026 10:06:57 +0200 Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 97BE35C57E; Tue, 5 May 2026 08:06:57 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 5A644593A3; Tue, 5 May 2026 08:06:57 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 7q3WFCGl+WkYaAAAD6G6ig (envelope-from ); Tue, 05 May 2026 08:06:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777968417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=NTn/SLA/xstL2gHJnsf3LMIqdLycLGiM0cMPirzKlrc=; b=DZjtO7swahR8wcnvYPbdAIc3QHLc9AGM6GYBUE0ygarRoXh7hSXzpmahMLZRT0L7bANpBw 45IADU8KPyAWRFmKEJekPKRXSP20PQimNUgMvPBmtLvGGIf3JjDbUUFzpHe1E4CKL+CQOq 5pjSCEuwOCndNzYzzzzIfsntqY+vyB4= Authentication-Results: smtp-out2.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=DZjtO7sw DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777968417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=NTn/SLA/xstL2gHJnsf3LMIqdLycLGiM0cMPirzKlrc=; b=DZjtO7swahR8wcnvYPbdAIc3QHLc9AGM6GYBUE0ygarRoXh7hSXzpmahMLZRT0L7bANpBw 45IADU8KPyAWRFmKEJekPKRXSP20PQimNUgMvPBmtLvGGIf3JjDbUUFzpHe1E4CKL+CQOq 5pjSCEuwOCndNzYzzzzIfsntqY+vyB4= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() Date: Tue, 5 May 2026 10:06:53 +0200 Message-ID: <20260505080653.197775-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_SEVEN(0.00)[10]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCVD_TLS_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:dkim,suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Queue-Id: 97BE35C57E X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Score: -3.01 X-purgate-ID: tlsNG-ef75cf/1777968417-AFF7EC48-8D82EF96/0/0 X-purgate-type: clean X-purgate-size: 1311 When fixing a conflict in xen_e820_resolve_conflicts(), the loop over the E820 map entries needs to be restarted, as the E820 map will have been modified by the fix. Otherwise entries might be skipped by accident. Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") Signed-off-by: Juergen Gross --- arch/x86/xen/setup.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index ac8021c3a997..bb95a05259b8 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr_t start, return; end = start + size; - entry = xen_e820_table.entries; + mapcnt = 0; - for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + while (mapcnt < xen_e820_table.nr_entries) { + entry = xen_e820_table.entries + mapcnt; if (entry->addr >= end) return; if (entry->addr + entry->size > start && - entry->type == E820_TYPE_NVS) + entry->type == E820_TYPE_NVS) { xen_e820_swap_entry_with_ram(entry); + /* E820 map has been changed, restart loop! */ + mapcnt = 0; + continue; + } - entry++; + mapcnt++; } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:16:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:16:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300301.1574823 (Exim 4.92) (envelope-from ) id 1wKAx1-0006JL-7h; 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The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Along with regular interrupts, NMIs are a problem. No they're not. NMI (and #MC for that matter) are IST and will operate just fine like the #DF handler did. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 08:22:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300312.1574833 (Exim 4.92) (envelope-from ) id 1wKB34-00087F-0Q; Tue, 05 May 2026 08:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300312.1574833; Tue, 05 May 2026 08:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB33-000878-Sg; Tue, 05 May 2026 08:22:33 +0000 Received: by outflank-mailman (input) for mailman id 1300312; Tue, 05 May 2026 08:22:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB32-000872-2P for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:22:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKB31-00Bd9G-9s for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:22:31 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9a8c1-2eae-0a2a0a5409dd-0a2a4508a534-16 for ; Tue, 05 May 2026 10:22:31 +0200 Received: from [193.142.43.55] (helo=galois.linutronix.de) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9a8c6-63b5-0a2a45080019-c18e2b379026-3 for ; Tue, 05 May 2026 10:22:30 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=2020 header.d=linutronix.de header.i="@linutronix.de" header.h="From:Sender:Reply-to:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References"; dkim=permerror header.s=2020e header.d=linutronix.de header.i="@linutronix.de" Date: Tue, 05 May 2026 08:22:28 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1777969350; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfJ1YduhltV+uaN4L6tWu1N+7FQbIUL59Zqc4X2ZkGQ=; b=BLC5MlbLbTtsTdDUzIrgvGle47013JfO2P/gEVbfxVRGNqTkmkoWfpuFBPyo8A2zvRwx3V pemz6g+A+NPc5JyB1R8Bjwqi6yzFBzlJHw84q5SxCgDxKOjZIfJSQbcIQct+T6VyvElDww HHlPE6rIYYWt8VzlQNE8unryG5ndPjS0HOivgYPoJq/fK4UdIsAcNPJ5NdQvx8l74M2Lxv KOWINWXnEYKVQSJtb7ytgRyZdIK+mB2t6SfsOanNI0UErzijCu1/1s/+DH2EOPJ25AnbS4 AfRCnZXsR0Myknv/jI3vs5u5CG1I8o5KF8I63OcWtFnbiX48GuTdaCpmNu9vlA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1777969350; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfJ1YduhltV+uaN4L6tWu1N+7FQbIUL59Zqc4X2ZkGQ=; b=S/w43rLBt5Tlyfy2AJR2F2D4w9Nnj9xNeQTvWXi6LzsE3IlB0iWK0QJRapaesXJcLpCvzi HeHF3ogJfKcy7ZBA== From: "tip-bot2 for Juergen Gross" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() Cc: Juergen Gross , Ingo Molnar , xen-devel@lists.xenproject.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260505080653.197775-1-jgross@suse.com> References: <20260505080653.197775-1-jgross@suse.com> MIME-Version: 1.0 Message-ID: <177796934897.424702.11107616066849971102.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1777969351-C2975DB1-57E2DF78/0/0 X-purgate-type: clean X-purgate-size: 1961 The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 5f8719945244dd65b5fa06195f4600db62581610 Gitweb: https://git.kernel.org/tip/5f8719945244dd65b5fa06195f4600db625= 81610 Author: Juergen Gross AuthorDate: Tue, 05 May 2026 10:06:53 +02:00 Committer: Ingo Molnar CommitterDate: Tue, 05 May 2026 10:17:00 +02:00 x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() When fixing a conflict in xen_e820_resolve_conflicts(), the loop over the E820 map entries needs to be restarted, as the E820 map will have been modified by the fix. Otherwise entries might be skipped by accident. Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allo= cated memory") Signed-off-by: Juergen Gross Signed-off-by: Ingo Molnar Cc: xen-devel@lists.xenproject.org Link: https://patch.msgid.link/20260505080653.197775-1-jgross@suse.com --- arch/x86/xen/setup.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index ac8021c..bb95a05 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr= _t start, return; =20 end =3D start + size; - entry =3D xen_e820_table.entries; + mapcnt =3D 0; =20 - for (mapcnt =3D 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + while (mapcnt < xen_e820_table.nr_entries) { + entry =3D xen_e820_table.entries + mapcnt; if (entry->addr >=3D end) return; =20 if (entry->addr + entry->size > start && - entry->type =3D=3D E820_TYPE_NVS) + entry->type =3D=3D E820_TYPE_NVS) { xen_e820_swap_entry_with_ram(entry); + /* E820 map has been changed, restart loop! */ + mapcnt =3D 0; + continue; + } =20 - entry++; + mapcnt++; } } =20 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:29:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:29:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300320.1574841 (Exim 4.92) (envelope-from ) id 1wKB9O-0000RA-Kj; Tue, 05 May 2026 08:29:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300320.1574841; Tue, 05 May 2026 08:29:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB9O-0000R3-Hj; Tue, 05 May 2026 08:29:06 +0000 Received: by outflank-mailman (input) for mailman id 1300320; Tue, 05 May 2026 08:29:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB9M-0000Qx-MV for xen-devel@lists.xenproject.org; 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ARM > >>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>> defines it). > >>>> > >>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>> to 0 when the arch does not define it. This makes the generic macros > >>>> correct for all architectures, even though they are only used on x86 > >>>> today. > >>> > >>> Hm, I assume this offset was added because the original mask PDX > >>> compression won't (usually) compress the gap between 0 and the start > >>> of RAM. However the newish offset PDX compression should be able to > >>> compress from 0 to start of RAM, and hence you don't need to apply > >>> an extra PDX offset there? > >>> > >>> If that's indeed the case it might be better to integrate > >>> frametable_base_pdx into the mask compression algorithm itself, so > >>> that on some arches it's a mask plus a decrease. > >> The offset is needed regardless of whether compression is used. With > >> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >> 0x80000000, the first valid PDX is 0x80000. > > > > OK, so you are doing some (kind of) address space compression (removing > > the leading empty range to the first RAM region) even when PDX is > > disabled. > > > >> Without frametable_base_pdx > >> the frame table would have to be indexed from 0, wasting > >> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > > > > But you don't really "waste" memory, just address space? Oh, maybe > > not on ARM as it doesn't use pdx_group_valid? And so you > > unconditionally populate the frametable from PDX 0 to max PDX. > With pdx_group_valid (which this series adds) we wouldn't waste > physical memory for the leading gap. But we'd still waste virtual address > space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > because the full range from PDX 0 must fit. For example with RAM starting at 5TB > the virtual offset before the first usable entry would be ~70GB — more than the > entire 32GB FRAMETABLE_SIZE on ARM64. Right, you need to use a PDX compression to fit. My preference IMO would be to add the leading offset into the PDX mask compression algorithm if that's what ARM uses by default now. The generic case really means no compression, and that's a 1:1 map between physical addresses and PDX. Anything that's not an identity mapping between those two address spaces implies some kind of compression. > > > >> So frametable_base_pdx is really a frame table indexing offset, not > >> something tied to the compression algorithm. > > > > Right, it just seems odd to do that extra subtraction when using > > offset compression, as in that case the compression logic itself > > should remove that leading gap when RAM doesn't start at 0. > > > > Instead of generalizing and expanding the usage of frametable_base_pdx > > it might be better to implement support for pdx_group_valid when > > populating the frame table, and switch by default to the offset > > compression method that will already remove any leading unpopulated > > spaces? > Switching the compression method would be a bigger change, and with feature > freeze on Friday I'd prefer not to get into that now. The current approach > is minimal and self-contained and works with mask and no-pdx which is what we > use nowadays: frametable_base_pdx already existed on ARM and PPC, we're just > making the generic macros aware of it as Julien requested (in v1 I just > overwrote the macro in local file). We can revisit the compression strategy as a > follow-up next release. Right, I'm not going to oppose to this, but I also don't think it's the right way to go. This seems like a bodge on the side of PDX compression, when it should have instead been integrated into it. The more that the offset compression logic will already do that removal of the leading empty space up to the first RAM region, and hence such adjustment of PDX values in that case is redundant at best. Also, you only do this PDX adjustment for the frametable, but not the direct map? Thanks, Roger. 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45055f2203csm3129448f8f.37.2026.05.05.01.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 01:43:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1777970603; x=1778575403; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ZCEstcyqOgvtQBuu40Qq5pjD4taxfu2oU876lLvB0OE=; b=O7MuPv5ywFaS6KH9WSESkFehRLWy6B9+gIpsaydnGbbTojURYTp9596W6SETPnHHDz oyLL8vqEW0k2gSZx0gKLEhhnxfiwfMsWARCQPdxm+/8T8JA7DD57jAD9UOeNpM/dndbP e6AicyysjRqMfwEQwkaGTKgUbhfB4jiYMtqcE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777970603; x=1778575403; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=ZCEstcyqOgvtQBuu40Qq5pjD4taxfu2oU876lLvB0OE=; b=WDEvq4/XLd3Fl/7NJV+g6kNq/q7CAK9SH0swDKiCJwjgsjeRLnNOGxL8xyajej+JAs U9XyDmofqzjfw502znTDx+YRS7v9aasLEfL4G64jEdXR41ZIFbzjbrllHV7pNbnnAIyy v3h9roAd87M8yfV5U7AFrUrVPrbWNAj/8e2CfBwM/pg9gup710a5aHr+cR328yMmxL1+ aYzQnsfWCHw4S5lQepWSdEN4TPCL2iATXNNoqQP+wb643Fuk7ZeToVCJK/03i3j0emyi jo42ySDczSLHgI6svY9g4hHGmzl7jkMokl1kCSwjf8VZL6feUL3nfzQSgtfm4GuNW9Jm zICQ== X-Gm-Message-State: AOJu0YxLOY/JV/raBEoYSADQ7iTlxUWUvwFtbgRB7EkSqOnKlnlC4m8q 5oE4WQUcH4RDaFMUEFtKQRbid+9ShvPXdYjCfRmEkhCW/uCJFkbxCd3XoG5gw08YRlnswvHJ53m 7S2Qp X-Gm-Gg: AeBDieuxBWcX4250x5Ed+HG0sIP0EJ+I21wMCo/UwXK03lugmcJcYSGwKc++4SuWP/n 7pwkrG7+AZa08jZqWyD1zX4zwbAgR4s3oDxRxmDmpB+rl8lyGgRB93fqsVKuM68Em221X8J4hJH M0HEJSn/U73mQ/irw3s/PoyIFdNZyryaxxA0VgctEsNrQvRPkpLKq7Nri+ilyXdnTB22We16Z2t jIM+vjXTIAiXZc6gfOwwB0EYl9y9NeezKpjjPonHqiFD0JcSZEoay2Ji6IdBNxMw5MM4oM5WffY mCLCoEpYanuecnyYaAPpjqkmO4uv/YO4ofrZOq6A/cGQLS9zkv9alurB152LvX5820hL/99yBa1 oNvn9HAcuymjHtm36OvcGJQosQXqQo27UDG7t14prkcJaUAmccfP2goyBq0Xv+kRsLB7W7XjNo3 cswCjZmHFjov117uMpN9Mnapc7zhbKLOCUZYJB1qK74EvazVPtlNsuiTTbmSMbIhbjRVEP2yA2q SHQjuLhNbLsL1poDIjXsywJJw== X-Received: by 2002:a05:600d:8496:20b0:48a:592c:e632 with SMTP id 5b1f17b1804b1-48d18be5b3emr19816295e9.16.1777970602835; Tue, 05 May 2026 01:43:22 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v2] x86/boot: Disable interrupts when establishing SSP Date: Tue, 5 May 2026 09:43:15 +0100 Message-Id: <20260505084315.1350002-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777970603-C86D4DB1-ECDD6CBA/0/0 X-purgate-type: clean X-purgate-size: 3366 Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years old, making it an incredibly rare occurance: (XEN) *** DOUBLE FAULT *** (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 (XEN) No stack overflow detected. Skipping stack trace. (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) DOUBLE FAULT -- system shutdown (XEN) **************************************** This is on the instruction boundary after enabling CET (writing MSR_S_CET) and prior to establishing SSP. Despite identifying this as a critical window where any fault was deadly (the CPU tries to push a shadow stack frame at 0, hence the CR2 value wrapping around to the top of the address space), I clearly forgot that this meant interrupts too, which are enabled. Disable interrupts during the critical period. Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie v2: * Only disable regular interrupts. NMIs are fine. --- xen/arch/x86/setup.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d041cbd5f6f1..19ee857abfb8 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -908,6 +908,13 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { + /* + * Immediately after enabling CET, SSP is 0 and most interrupts and + * exceptions are fatal. Like the SYSCALL/SYSENTER gaps, IST vectors + * (including NMI and #MC) are safe owing to IST switching the shstk. + */ + local_irq_disable(); + wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); /* @@ -932,6 +939,8 @@ static void __init noreturn reinit_bsp_stack(void) } else asm volatile ( "setssbsy" ::: "memory" ); + + local_irq_enable(); } reset_stack_and_jump(init_done); base-commit: f4af571dd70bea97d8de82d7aa39c62c530db897 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:43:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:43:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300341.1574868 (Exim 4.92) (envelope-from ) id 1wKBNV-0004Bx-Aw; Tue, 05 May 2026 08:43:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300341.1574868; Tue, 05 May 2026 08:43:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBNV-0004Bq-7w; Tue, 05 May 2026 08:43:41 +0000 Received: by outflank-mailman (input) for mailman id 1300341; Tue, 05 May 2026 08:43:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBNT-0004BE-Tc for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:43:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBNT-008p5B-9P for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:43:39 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9adb2-bab6-0a2a0a5309dd-0a2a450b8962-36 for ; Tue, 05 May 2026 10:43:39 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9adba-212f-0a2a450b0019-d155802dcdd9-3 for ; Tue, 05 May 2026 10:43:39 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48896199cbaso43995265e9.1 for ; Tue, 05 May 2026 01:43:38 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505080653.197775-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777970619-7DB68F3B-5902DA93/0/0 X-purgate-type: clean X-purgate-size: 2539 On 05.05.2026 10:06, Juergen Gross wrote: > When fixing a conflict in xen_e820_resolve_conflicts(), the loop over > the E820 map entries needs to be restarted, as the E820 map will have > been modified by the fix. Otherwise entries might be skipped by > accident. > > Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") > Signed-off-by: Juergen Gross First, while trying to review this, isn't there another issue in xen_e820_swap_entry_with_ram(), in that entry->addr = entry_end - swap_size + swap_addr - swap_entry->addr; really means to be entry->addr = entry_end - swap_size + swap_entry->addr - swap_addr; (affecting non-page-aligned E820 entries)? Further, that function converts swap_entry to the page-aligned superset of the passed in range. How is it guaranteed that this new range won't overlap with the predecessor and/or successor one? Wouldn't that need to be conversion to the page-aligned subset instead? And then, is passing the page-aligned superset to xen_add_remap_nonram() really appropriate? Why would any leading or trailing space there be subject to remapping? > --- a/arch/x86/xen/setup.c > +++ b/arch/x86/xen/setup.c > @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr_t start, > return; > > end = start + size; > - entry = xen_e820_table.entries; > + mapcnt = 0; > > - for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { > + while (mapcnt < xen_e820_table.nr_entries) { > + entry = xen_e820_table.entries + mapcnt; > if (entry->addr >= end) > return; > > if (entry->addr + entry->size > start && > - entry->type == E820_TYPE_NVS) > + entry->type == E820_TYPE_NVS) { > xen_e820_swap_entry_with_ram(entry); > + /* E820 map has been changed, restart loop! */ > + mapcnt = 0; > + continue; > + } > > - entry++; > + mapcnt++; > } > } Given what exactly xen_e820_swap_entry_with_ram() does, restarting from entry 0 looks to be needed only if the non-RAM entry ended up moving down (strictly speaking even there it wouldn't need to be entry 0). If it moved up, simply not incrementing mapcnt would look to suffice. Since the extra overhead is likely tolerable here (with simplicity of the code being more important), this may want mentioning in a code comment (or at least the description). Preferably with that: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 09:00:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:00:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300375.1574909 (Exim 4.92) (envelope-from ) id 1wKBdw-0007w4-1S; Tue, 05 May 2026 09:00:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300375.1574909; Tue, 05 May 2026 09:00:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBdv-0007vx-UF; Tue, 05 May 2026 09:00:39 +0000 Received: by outflank-mailman (input) for mailman id 1300375; Tue, 05 May 2026 09:00:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBdu-0007vr-Ch for xen-devel@lists.xenproject.org; Tue, 05 May 2026 09:00:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBdt-00DBYk-Cp for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:00:37 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9b1b1-5cb7-0a2a0a5109dd-0a2a45058ccc-26 for ; Tue, 05 May 2026 11:00:37 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9b1b4-aaa8-0a2a45050019-d155dd2ba938-3 for ; Tue, 05 May 2026 11:00:36 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d75312379so3383430f8f.1 for ; Tue, 05 May 2026 02:00:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777971636-E93A0443-12747E49/0/0 X-purgate-type: clean X-purgate-size: 2559 On 05.05.2026 10:43, Andrew Cooper wrote: > Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Disable interrupts during the critical period. > > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > > v2: > * Only disable regular interrupts. NMIs are fine. Much neater a fix as a result: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 09:05:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:05:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300384.1574918 (Exim 4.92) (envelope-from ) id 1wKBiZ-0008W6-Is; Tue, 05 May 2026 09:05:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300384.1574918; Tue, 05 May 2026 09:05:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBiZ-0008Vz-FJ; Tue, 05 May 2026 09:05:27 +0000 Received: by outflank-mailman (input) for mailman id 1300384; Tue, 05 May 2026 09:05:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBiY-0008Vt-WC for xen-devel@lists.xenproject.org; Tue, 05 May 2026 09:05:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBiW-005GRI-M1 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:05:24 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9b2d4-bab6-0a2a0a5309dd-0a2a4502dace-0 for ; Tue, 05 May 2026 11:05:24 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9b2d3-af86-0a2a45020019-d1558035e024-3 for ; Tue, 05 May 2026 11:05:24 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so79238275e9.2 for ; Tue, 05 May 2026 02:05:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 02:05:23 -0700 (PDT) Message-ID: <32eddac5-73c7-46c4-8944-99cfe970c803@suse.com> Date: Tue, 5 May 2026 11:05:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777971924-890CF161-5E0D81A8/0/0 X-purgate-type: clean X-purgate-size: 1169 On 05.05.2026 10:27, Luca Fancellu wrote: >> On 4 May 2026, at 06:30, Jan Beulich wrote: >> On 29.04.2026 12:08, Luca Fancellu wrote: >>>> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >>>> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >>>> paddr_t gpa, >>>> void *buf, >>>> - unsigned int len) >>>> + unsigned long len) >>>> { >>> >>> Now that we do this, potentially we could have truncation in the places where we store its return value >>> inside an int: >> >> Those would suffer from truncation before and after this change, wouldn't they? >> Just that where the truncation occurs does move. I.e. if necessary they would >> want dealing with separately. > > yes that’s true, truncation was already there in different places, do you want to deal with it separately so that > we have a Fixes tag for it? I already said I'd like that to be dealt with separately, didn't I? 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------dAewGUNv0qm8HdmceafrUiMz" X-purgate-ID: tlsNG-c1860d/1777972414-C2368DB1-54DE0D6E/0/0 X-purgate-type: clean X-purgate-size: 12396 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------dAewGUNv0qm8HdmceafrUiMz Content-Type: multipart/mixed; boundary="------------JiQauVkPK1gsx2X8jgppe5kb"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org Message-ID: <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Subject: Re: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> In-Reply-To: <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------JiQauVkPK1gsx2X8jgppe5kb Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn5tL0FAwAAAAAACgkQsN6d1ii/Ey+M 2wf/ZdhzFiiteUpSVRo4BGyVpMhKkPv+7/ZtOcLSumpAkSxzB9o0lDMjYKiyjx5AMDcBwlcv3Age f5P+Tia+jdtE59+BQA0AWHqJ1Xy6APU2iFuMeUI3E45ovcdGOAHMWG3eF7McO3iid9Kc9rmO3o4e 17ElN8RZVrS7WjMiIyDlXSQ8KCN5GVJgNAFnu/Mn8l6ktQ4NuOlGtdJJdVB6mSSWNotx+f/xxQX4 hzKf7MPRAhlTvuOvjbf49wd/HSSE+n+6dXmJyv9zvkfMkjqf6UKN/mRB2DlzhqP0RPu9jQNL1Mps 9slfyg/v0cKI8Gs+xp/xX06PA7uY/61YU+5SF/qoIw== =XkA8 -----END PGP SIGNATURE----- --------------dAewGUNv0qm8HdmceafrUiMz-- From xen-devel-bounces@lists.xenproject.org Tue May 05 09:22:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:22:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300404.1574937 (Exim 4.92) (envelope-from ) id 1wKByo-0003wJ-74; Tue, 05 May 2026 09:22:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300404.1574937; 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Tue, 05 May 2026 02:22:10 -0700 (PDT) MIME-Version: 1.0 References: <1ead2af7182a0501f16e7b4e9ad3e58ccd8f538c.1776955622.git.bertrand.marquis@arm.com> In-Reply-To: <1ead2af7182a0501f16e7b4e9ad3e58ccd8f538c.1776955622.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Tue, 5 May 2026 11:21:57 +0200 X-Gm-Features: AVHnY4IxbheL-Y6kED6xjiouZiMz263rlg7LJlyow8jkhaTaKdqkJ3po73KqXvQ Message-ID: Subject: Re: [PATCH v2 6/6] xen/arm: ffa: Deliver VM-to-VM notifications locally To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1777972932-16062C48-9F58A8FB/0/0 X-purgate-type: clean X-purgate-size: 10679 Hi Bertrand, On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis wrote: > > VM notification binding and pending tracking exist for non-secure > endpoints, but FFA_NOTIFICATION_SET still only forwards secure > destinations to the SPMC. Non-secure VMs therefore cannot receive > notifications from other VMs. Local NPI delivery also needs explicit > re-arm tracking so repeated raises are not lost while the interrupt is > already pending. > > Add a local VM notification delivery path for non-secure destinations. > notification_set_vm() resolves the destination endpoint, verifies that > every requested bit is bound to the sender, sets the receiver's > vm_pending bitmap under notif_lock, and raises an NPI only when local > pending state is not already armed. > > Track whether a local NPI is already armed with notif_irq_raised, > clear that state once both VM and hypervisor pending bitmaps are > drained, and keep notif_lock held across the VM notification injection > attempt. If no destination vCPU is online, leave the pending bits set > and keep notif_irq_raised clear so delivery can be retried later. > Also expose firmware notification availability so FFA_FEATURES only > advertises notification support when it is actually provided by the > firmware or by CONFIG_FFA_VM_TO_VM. > > Functional impact: when CONFIG_FFA_VM_TO_VM is enabled, non-secure > FFA_NOTIFICATION_SET delivers VM-to-VM notifications locally and keeps > NPI delivery reliable across repeated raises. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - serialize notification_set_vm() state updates with the NPI attempt > - keep pending VM notifications set when local injection fails > --- > xen/arch/arm/tee/ffa.c | 24 ++++++++-- > xen/arch/arm/tee/ffa_notif.c | 82 ++++++++++++++++++++++++++++++++-- > xen/arch/arm/tee/ffa_private.h | 17 ++++--- > 3 files changed, 107 insertions(+), 16 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index 1fe33f26454a..7fe021049cba 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -39,8 +39,13 @@ > * o FFA_MSG_SEND_DIRECT_REQ: > * - only supported from a VM to an SP > * o FFA_NOTIFICATION_*: > + * - only supported when firmware notifications are enabled or VM-to-V= M > + * support is built in > * - only supports global notifications, that is, per vCPU notificatio= ns > - * are not supported > + * are not supported and secure per-vCPU notification information is > + * not forwarded > + * - the source endpoint ID reported for a notification may no longer > + * exist by the time the receiver consumes it > * - doesn't support signalling the secondary scheduler of pending > * notification for secure partitions > * - doesn't support notifications for Xen itself > @@ -245,6 +250,8 @@ static void handle_features(struct cpu_user_regs *reg= s) > uint32_t a1 =3D get_user_reg(regs, 1); > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > + bool notif_supported =3D IS_ENABLED(CONFIG_FFA_VM_TO_VM) || > + ffa_notif_fw_enabled(); > > /* > * FFA_FEATURES defines w2 as input properties only for specific > @@ -343,10 +350,16 @@ static void handle_features(struct cpu_user_regs *r= egs) > > break; > case FFA_FEATURE_NOTIF_PEND_INTR: > - ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_FEATURE_SCHEDULE_RECV_INTR: > - ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, = 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_PARTITION_INFO_GET_REGS: > if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > @@ -361,7 +374,10 @@ static void handle_features(struct cpu_user_regs *re= gs) > case FFA_NOTIFICATION_SET: > case FFA_NOTIFICATION_INFO_GET_32: > case FFA_NOTIFICATION_INFO_GET_64: > - ffa_set_regs_success(regs, 0, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > default: > ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index a841c8f8d747..b29d948a7110 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -21,6 +21,11 @@ static bool __ro_after_init fw_notif_enabled; > static unsigned int __ro_after_init notif_sri_irq; > static DEFINE_SPINLOCK(notif_info_lock); > > +bool ffa_notif_fw_enabled(void) > +{ > + return fw_notif_enabled; > +} > + > static bool inject_notif_pending(struct domain *d) > { > struct vcpu *v; > @@ -107,6 +112,55 @@ out_unlock: > return ret; > } > > +/* > + * Deliver a VM-to-VM notification. ctx->notif.notif_lock protects > + * vm_bind/vm_pending so callers must not hold it already. > + */ > +static int32_t notification_set_vm(uint16_t dst_id, uint16_t src_id, > + uint32_t flags, uint64_t bitmap) > +{ > + struct domain *dst_d; > + struct ffa_ctx *dst_ctx; > + unsigned int id; > + int32_t ret; > + > + if ( flags ) > + return FFA_RET_INVALID_PARAMETERS; > + > + ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > + if ( ret ) > + return ret; > + > + ret =3D FFA_RET_OK; > + > + spin_lock(&dst_ctx->notif.notif_lock); > + > + for ( id =3D 0; id < FFA_NUM_VM_NOTIF; id++ ) > + { > + if ( !(bitmap & BIT(id, ULL)) ) > + continue; > + > + if ( dst_ctx->notif.vm_bind[id] !=3D src_id ) > + { > + ret =3D FFA_RET_DENIED; > + goto out_unlock; > + } > + } > + > + dst_ctx->notif.vm_pending |=3D bitmap; > + if ( !dst_ctx->notif.notif_irq_raised && > + (dst_ctx->notif.vm_pending || dst_ctx->notif.hyp_pending) && > + inject_notif_pending(dst_d) ) > + dst_ctx->notif.notif_irq_raised =3D true; > + > +out_unlock: > + spin_unlock(&dst_ctx->notif.notif_lock); > + > + rcu_unlock_domain(dst_d); > + > + return ret; > +} > + > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs) > { > struct domain *d =3D current->domain; > @@ -288,6 +342,8 @@ void ffa_handle_notification_get(struct cpu_user_regs= *regs) > > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > + bool pending; > + > spin_lock(&ctx->notif.notif_lock); > > if ( (flags & FFA_NOTIF_FLAG_BITMAP_HYP) && ctx->notif.hyp_pendi= ng ) > @@ -298,6 +354,18 @@ void ffa_handle_notification_get(struct cpu_user_reg= s *regs) > ctx->notif.notif_irq_raised =3D false; > } > > + if ( (flags & FFA_NOTIF_FLAG_BITMAP_VM) && ctx->notif.vm_pending= ) > + { > + w4 =3D (uint32_t)(ctx->notif.vm_pending & GENMASK(31, 0)); > + w5 =3D (uint32_t)((ctx->notif.vm_pending >> 32) & GENMASK(31= , 0)); > + ctx->notif.vm_pending =3D 0; > + } > + > + pending =3D (ctx->notif.hyp_pending !=3D 0) || > + (ctx->notif.vm_pending !=3D 0); > + if ( !pending ) > + ctx->notif.notif_irq_raised =3D false; This seems to take care of clearing notif_irq_raised for all cases. Do we still need the one just above this block (copied here): if ( !ctx->notif.vm_pending ) ctx->notif.notif_irq_raised =3D false; ? Cheers, Jens > + > spin_unlock(&ctx->notif.notif_lock); > } > > @@ -323,9 +391,17 @@ int32_t ffa_handle_notification_set(struct cpu_user_= regs *regs) > if ( flags ) > return FFA_RET_INVALID_PARAMETERS; > > - if ( FFA_ID_IS_SECURE(dest_id) && fw_notif_enabled ) > - return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bit= map_lo, > - bitmap_hi); > + if ( FFA_ID_IS_SECURE(dest_id) ) > + { > + if ( fw_notif_enabled ) > + return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, > + bitmap_lo, bitmap_hi); > + } > + else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + { > + return notification_set_vm(dest_id, caller_id, flags, > + ((uint64_t)bitmap_hi << 32) | bitmap_= lo); > + } > > return FFA_RET_NOT_SUPPORTED; > } > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 78a0a9815d56..923a071a9d7c 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -340,20 +340,18 @@ struct ffa_ctx_notif { > uint64_t vm_pending; > > /* > - * Source endpoint bound to each VM notification ID (0 means unbound= ). > + * Tracks whether an NPI has been raised for local pending notificat= ions. > + * Protected by notif_lock. > */ > - uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > + bool notif_irq_raised; > > /* > - * Lock protecting the hypervisor-managed notification state. > + * Source endpoint bound to each VM notification ID (0 means unbound= ). > */ > - spinlock_t notif_lock; > + uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > > - /* > - * Tracks whether a local notification pending interrupt was raised. > - * Protected by notif_lock. > - */ > - bool notif_irq_raised; > + /* Lock protecting local notification state. */ > + spinlock_t notif_lock; > > /* > * Bitmap of pending hypervisor notifications (for HYP bitmap querie= s). > @@ -495,6 +493,7 @@ void ffa_notif_init(void); > void ffa_notif_init_interrupt(void); > int ffa_notif_domain_init(struct domain *d); > void ffa_notif_domain_destroy(struct domain *d); > +bool ffa_notif_fw_enabled(void); > > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs); > int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs); > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Tue May 05 09:52:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:52:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300420.1574946 (Exim 4.92) (envelope-from ) id 1wKCRc-0000BX-JD; Tue, 05 May 2026 09:52:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300420.1574946; Tue, 05 May 2026 09:52:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCRc-0000BO-EW; Tue, 05 May 2026 09:52:00 +0000 Received: by outflank-mailman (input) for mailman id 1300420; Tue, 05 May 2026 09:51:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCRa-0000BH-Ud for xen-devel@lists.xenproject.org; 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Message-ID: <97213bec-14f0-45e0-ac22-c01b4db5df6e@citrix.com> Date: Tue, 5 May 2026 10:51:51 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Xen-devel Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP To: Jan Beulich References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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The bug is years >> old, making it an incredibly rare occurance: >> >> (XEN) *** DOUBLE FAULT *** >> (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- >> (XEN) CPU: 0 >> (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 >> (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor >> (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 >> (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 >> (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 >> (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 >> (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 >> (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 >> (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc >> (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 >> (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 >> (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): >> (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 >> (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 >> (XEN) No stack overflow detected. Skipping stack trace. >> (XEN) >> (XEN) **************************************** >> (XEN) Panic on CPU 0: >> (XEN) DOUBLE FAULT -- system shutdown >> (XEN) **************************************** >> >> This is on the instruction boundary after enabling CET (writing MSR_S_CET) and >> prior to establishing SSP. Despite identifying this as a critical window >> where any fault was deadly (the CPU tries to push a shadow stack frame at 0, >> hence the CR2 value wrapping around to the top of the address space), I >> clearly forgot that this meant interrupts too, which are enabled. >> >> Disable interrupts during the critical period. >> >> Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") >> Signed-off-by: Andrew Cooper >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> CC: Teddy Astie >> >> v2: >> * Only disable regular interrupts. NMIs are fine. > Much neater a fix as a result: > Reviewed-by: Jan Beulich Thanks, and yes; I'm rather embarrassed at how long it took to realise it was exactly the same as the SYSCALL gap, and therefore the same safety reasoning applied. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 10:02:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:02:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300428.1574954 (Exim 4.92) (envelope-from ) id 1wKCbS-00023H-EK; Tue, 05 May 2026 10:02:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300428.1574954; Tue, 05 May 2026 10:02:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCbS-00023A-BT; Tue, 05 May 2026 10:02:10 +0000 Received: by outflank-mailman (input) for mailman id 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2026 12:02:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz 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boundary="------------d5LENjm7gWSBOfIrz7H8vIUy" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777975324915 X-purgate-ID: tlsNG-c201ff/1777975327-E81A9443-EE0A9D78/0/0 X-purgate-type: clean X-purgate-size: 9913 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------d5LENjm7gWSBOfIrz7H8vIUy Content-Type: multipart/mixed; boundary="------------RPqqEVBnck7zQ25taWQJJjep"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> In-Reply-To: <20260505084315.1350002-1-andrew.cooper3@citrix.com> --------------RPqqEVBnck7zQ25taWQJJjep Content-Type: multipart/mixed; boundary="------------GSm3FYIZ18c0K6XG6dIKNTig" --------------GSm3FYIZ18c0K6XG6dIKNTig Content-Type: text/plain; charset=UTF-8; format=flowed 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AeBDiet/95bIhiQUhvcmBtKsHRoWULJlzswY9eJsSt6WjqjVQZRc60mOne3K6vhnEbt WkWzyyy7CzAl5CxGgddfuFqTzSaaoaSW1Gk/p+cXOnAc/q3Ud8WqlA97l8wqhv6uaKghM3ncDj+ dzMQwjUnjlfEjwDg2V2Y6Ikw9RF2op6QkGPfayERzq+RXWOn3M8uGefmKHWujwFs933/YUMZ6o+ Mh8UjBXyV2J08jUCmQzGsp3U1Ti2TsdEYt5Wk+ZLqCHYoZZqNbnctEJ6j9pCwBhC8anEbRsrSKz VQFWeFH5iXUVghrN X-Received: by 2002:a2e:a802:0:b0:393:7987:5862 with SMTP id 38308e7fff4ca-39379875e33mr45872251fa.19.1777975782305; Tue, 05 May 2026 03:09:42 -0700 (PDT) MIME-Version: 1.0 References: <5a42b7c32fadf21262b8342f27e685916d0e5812.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 13:09:30 +0300 X-Gm-Features: AVHnY4JhWkbLY0_2SqeXFrOSTkFxupjeVNP9Dy0mDpQdrzGqbniy_ZLQ99nMdsI Message-ID: Subject: Re: [PATCH v8 05/13] xen/arm: gic-v3: add ITS suspend/resume support To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777975783-6ED73CF5-1C07ADAC/0/0 X-purgate-type: clean X-purgate-size: 9123 Hi Luca, Thank you for the review. On Fri, Apr 24, 2026 at 1:54=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > Handle system suspend/resume for GICv3 with an ITS present so LPIs keep > > working after firmware powers the GIC down. Snapshot the CPU interface, > > distributor and last-CPU redistributor state, disable the ITS to cache = its > > CTLR/CBASER/BASER registers, then restore everything and re-arm the > > collection on resume. > > > > Add list_for_each_entry_continue_reverse() in list.h for the ITS suspen= d > > error path that needs to roll back partially saved state. > > > > Based on Linux commit dba0bc7b76dc ("irqchip/gic-v3-its: Add ability to= save/restore ITS state") > > Signed-off-by: Mykola Kvach > > --- > > Changes in V8: > > - Reword the CBASER/CWRITER comment to match Xen and drop the stale Lin= ux > > cmd_write reference. > > - Clarify the list_for_each_entry_continue_reverse() comment. > > - Factor out per-ITS helpers for collection setup and resume. > > - Restore each ITS and re-establish its collection mapping in the same > > loop, so a failed ITS resume is not followed by MAPC/SYNC on that > > un-restored instance. > > - panic in case when resume of an ITS failed > > - cleanup baser cache during suspend > > --- > > xen/arch/arm/gic-v3-its.c | 126 ++++++++++++++++++++++++-- > > xen/arch/arm/gic-v3.c | 15 ++- > > xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++ > > xen/include/xen/list.h | 14 +++ > > 4 files changed, 166 insertions(+), 12 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index 9ba068c46f..fe2865eac9 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, > > return its_send_command(its, cmd); > > } > > > > +static int gicv3_its_setup_collection_single(struct host_its *its, > > + unsigned int cpu) > > +{ > > + int ret; > > + > > + ret =3D its_send_cmd_mapc(its, cpu, cpu); > > + if ( ret ) > > + return ret; > > + > > + ret =3D its_send_cmd_sync(its, cpu); > > + if ( ret ) > > + return ret; > > + > > + return gicv3_its_wait_commands(its); > > +} > > + > > /* Set up the (1:1) collection mapping for the given host CPU. */ > > int gicv3_its_setup_collection(unsigned int cpu) > > { > > @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) > > > > list_for_each_entry(its, &host_its_list, entry) > > { > > - ret =3D its_send_cmd_mapc(its, cpu, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D its_send_cmd_sync(its, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D gicv3_its_wait_commands(its); > > + ret =3D gicv3_its_setup_collection_single(its, cpu); > > if ( ret ) > > return ret; > > } > > @@ -1209,6 +1217,106 @@ int gicv3_its_init(void) > > return 0; > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +int gicv3_its_suspend(void) > > +{ > > + struct host_its *its; > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > NIT: codestyle, spaces after and before the parenthesis Ack, I will fix the coding style. > > > + { > > + unsigned int i; > > + void __iomem *base =3D its->its_base; > > + > > + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR); > > + ret =3D gicv3_disable_its(its); > > This is called from system_suspend(), along the path iommu_suspend and > console_suspend() are called, finally reaching gic_suspend() and this one= . > > In the IHI 0069H.b, 5.6.2 Disabling an ITS, it says: > =E2=80=9CEnsure that all interrupts that target the ITS that is being pow= ered down are > either redirected or disabled=E2=80=9D, is it correct to assume all the I= TS targeting source > at this point are disabled because domains should be already suspended? Yes, that is the assumption here. Before Xen reaches this path, each domain must already have entered SHUTDOWN_suspend. In other words, the guest OS has already requested SYSTEM_SUSPEND only after completing its own suspend flow, so the ITS-targeting interrupt sources owned by that OS are expected to be quiesced at this point. So this code relies on the owning OS having disabled or otherwise quiesced those sources before issuing SYSTEM_SUSPEND, rather than Xen explicitly doing that in gicv3_its_suspend(). > > > > + if ( ret ) > > + { > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > here and in the other places we write GITS_CTLR, this reg has Quiescent a= s RO, > maybe we should mask the write to only the other bits that are writable? Yes, this was inherited from the Linux ITS suspend/resume code, which resto= res the saved GITS_CTLR value directly. That said, masking the write to the writable bits is cleaner, and I will do that in the next version. > > > + goto err; > > + } > > + > > + its->suspend_ctx.cbaser =3D readq_relaxed(base + GITS_CBASER); > > + > > + for (i =3D 0; i < GITS_BASER_NR_REGS; i++) > > NIT: codestyle on the spaces and parenthesis > > > + { > > + uint64_t baser =3D readq_relaxed(base + GITS_BASER0 + i * = 8); > > + > > + its->suspend_ctx.baser[i] =3D 0; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + its->suspend_ctx.baser[i] =3D baser; > > + } > > + } > > + > > + return 0; > > + > > + err: > > + list_for_each_entry_continue_reverse(its, &host_its_list, entry) > > + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTL= R); > > + > > + return ret; > > +} > > + > > +static int gicv3_its_resume_single(struct host_its *its, unsigned int = cpu) > > +{ > > + void __iomem *base =3D its->its_base; > > + unsigned int i; > > + int ret; > > + > > + /* > > + * Make sure that the ITS is disabled. If it fails to quiesce, > > + * don't restore it since writing to CBASER or BASER > > + * registers is undefined according to the GIC v3 ITS > > + * Specification. > > + */ > > + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + return ret; > > + > > + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); > > + > > + /* > > + * Writing CBASER resets CREADR to 0, so reset CWRITER to > > + * keep the command queue pointers aligned. > > + */ > > + writeq_relaxed(0, base + GITS_CWRITER); > > + > > + /* Restore GITS_BASER from the value cache. */ > > + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > > + { > > + uint64_t baser =3D its->suspend_ctx.baser[i]; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); > > + } > > + > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + > > + return gicv3_its_setup_collection_single(its, cpu); > > +} > > + > > +void gicv3_its_resume(void) > > +{ > > + struct host_its *its; > > + unsigned int cpu =3D smp_processor_id(); > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > + { > > + ret =3D gicv3_its_resume_single(its, cpu); > > + if ( ret ) > > + panic("GICv3: ITS@%"PRIpaddr": failed to restore during re= sume: %d\n", > > + its->addr, ret); > > + } > > +} > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > > > /* > > * Local variables: > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index d182a71478..ef8318dd50 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -862,7 +862,7 @@ static bool gicv3_enable_lpis(void) > > return true; > > } > > > > -static int __init gicv3_populate_rdist(void) > > +static int gicv3_populate_rdist(void) > > { > > int i; > > uint32_t aff; > > @@ -932,7 +932,7 @@ static int __init gicv3_populate_rdist(void) > > ret =3D gicv3_lpi_init_rdist(ptr); > > if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > { > > - printk("GICv3: CPU%d: Cannot initialize LPIs: = %u\n", > > + printk("GICv3: CPU%d: Cannot initialize LPIs: = %d\n", > > this is to fix the mistake of a patch before, Yes, I will fold this into the previous patch. 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Tue, 05 May 2026 03:13:46 -0700 (PDT) Message-ID: <3953265a-2bfc-4853-bda5-3450c096ebb2@suse.com> Date: Tue, 5 May 2026 12:13:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> <32eddac5-73c7-46c4-8944-99cfe970c803@suse.com> <5B084D26-4FE9-4C1A-8C3A-298FB73F34CB@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5B084D26-4FE9-4C1A-8C3A-298FB73F34CB@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777976027-6EB74CF5-A400962C/0/0 X-purgate-type: clean X-purgate-size: 1708 On 05.05.2026 12:07, Luca Fancellu wrote: > > >> On 5 May 2026, at 10:05, Jan Beulich wrote: >> >> On 05.05.2026 10:27, Luca Fancellu wrote: >>>> On 4 May 2026, at 06:30, Jan Beulich wrote: >>>> On 29.04.2026 12:08, Luca Fancellu wrote: >>>>>> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >>>>>> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >>>>>> paddr_t gpa, >>>>>> void *buf, >>>>>> - unsigned int len) >>>>>> + unsigned long len) >>>>>> { >>>>> >>>>> Now that we do this, potentially we could have truncation in the places where we store its return value >>>>> inside an int: >>>> >>>> Those would suffer from truncation before and after this change, wouldn't they? >>>> Just that where the truncation occurs does move. I.e. if necessary they would >>>> want dealing with separately. >>> >>> yes that’s true, truncation was already there in different places, do you want to deal with it separately so that >>> we have a Fixes tag for it? >> >> I already said I'd like that to be dealt with separately, didn't I? > > I understood the “separately” part. > > What I was asking is whether the reason is that this should be its own fix, with its own Fixes tag, since the truncation predates this patch. The reason isn't so much the Fixes: tag, but independent issues generally wanting independent fixes. This also helps with backporting (in general; maybe not so much here). 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------WxsKrHIy2P2sQMdeKd48j1Af" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777976229876 X-purgate-ID: tlsNG-c201ff/1777976235-E81A9443-39341F1D/0/0 X-purgate-type: clean X-purgate-size: 8052 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------WxsKrHIy2P2sQMdeKd48j1Af Content-Type: multipart/mixed; boundary="------------nm7svcn9d4CJ82sy0tb5BVHD"; protected-headers="v1" From: Teddy Astie To: Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org Message-ID: Subject: Re: [RFC PATCH 2/7] common: Track latest pCPU that ran the vCPU References: In-Reply-To: --------------nm7svcn9d4CJ82sy0tb5BVHD Content-Type: multipart/mixed; boundary="------------aAoJrQUmbXy0LM6Dvf0W0hOB" --------------aAoJrQUmbXy0LM6Dvf0W0hOB Content-Type: text/plain; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsD4BAABCAAjFiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmn5w6UFAwAAAAAACgkQZg+p0QLLz9B1 wwv3UfjQJgAX0OlB7EtcmUGHeKztJQPy8ah5dhGUFJkQlUIBrTO1P6bHo6PdcXyGbsNt7HNAO5tx ZQIns0gVV0g3H5M5ICFr1nw86/DKGm+eSbeEQGG8FL2x69A7hLtm2yFtbtyEFUiYUsvzRk3OdF+m YMVPaf4M74vJCUlRobh7BKToOsas+u4UlEJMgmKT1OvAOekmHqkHL/EBRUa6xmYYLzaIEtmiJUyr 7ydA/dkLc17nH6H6POd5X5geVJxZUgN4jrfzXWuvhEPMrJJ9Q0GnGRyfrvw+aqa1epyu5Uyz9qzK IlGhsO07aiGHS2k35hVsefzqf2G9OMILOXUvTbxobgsUzYyzjC8Mh8q7S90lUnLqKADTez57Z4ph +ipdpS1ZYWM5XYXbMlnWtBV11TIhheNa6+Se91X8l/qP/QdOlsdMjGZNJ7oQ3xIsguNU42DPy0BG 2QncxRU5KY99tGm66D1dsraAzHLrJHkiAjcduKJj6YWvdVXN+UhN364UYWc= =F0pZ -----END PGP SIGNATURE----- --------------WxsKrHIy2P2sQMdeKd48j1Af-- From xen-devel-bounces@lists.xenproject.org Tue May 05 10:17:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:17:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300470.1575000 (Exim 4.92) (envelope-from ) id 1wKCqU-000686-Np; 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Tue, 05 May 2026 03:18:51 -0700 (PDT) MIME-Version: 1.0 References: <8B067451-681E-45CA-843A-1F0FD34ABF3C@arm.com> In-Reply-To: <8B067451-681E-45CA-843A-1F0FD34ABF3C@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 13:18:40 +0300 X-Gm-Features: AVHnY4Lh2TgfsJXmLLfDTHnZO4AfN0LJzrVBjJSiTtfqzJH9HElEdrL1QbaUmU4 Message-ID: Subject: Re: [PATCH v8 07/13] xen/arm: ffa: fix notification SRI across CPU hotplug/suspend To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1777976332-2B96A3FF-C99E03BA/0/0 X-purgate-type: clean X-purgate-size: 4711 Hi Bertrand, Thank you for the review. On Mon, Apr 27, 2026 at 11:22=E2=80=AFAM Bertrand Marquis wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 12:45, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > The FF-A notification SRI interrupt handler was not correctly tied to > > CPU hotplug and suspend/resume. As a result, CPUs going offline and > > back online could end up with stale or missing handlers, breaking > > delivery of FF-A notifications. > > > > Signed-off-by: Mykola Kvach > > This will probably need a rebase if the harden notification and VM to VM = notification > serie in FF-A is merged first. I will rebase this patch if the FF-A notification series lands first. > > Anyway, changes look good so: > > Reviewed-by: Bertrand Marquis Thank you, I will add your Reviewed-by. Best regards, Mykola > > Cheers > Bertrand > > > --- > > xen/arch/arm/tee/ffa_notif.c | 63 ++++++++++++++++++++++++++++-------- > > 1 file changed, 50 insertions(+), 13 deletions(-) > > > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.= c > > index 186e726412..513c399594 100644 > > --- a/xen/arch/arm/tee/ffa_notif.c > > +++ b/xen/arch/arm/tee/ffa_notif.c > > @@ -360,10 +360,28 @@ static int32_t ffa_notification_bitmap_destroy(ui= nt16_t vm_id) > > return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0= , 0); > > } > > > > -void ffa_notif_init_interrupt(void) > > +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, sri_irq); > > + > > +static int request_sri_irq(void) > > { > > int ret; > > + struct irqaction *sri_action =3D &this_cpu(sri_irq); > > + > > + sri_action->name =3D "FF-A notif"; > > + sri_action->handler =3D notif_irq_handler; > > + sri_action->dev_id =3D NULL; > > + sri_action->free_on_release =3D 0; > > + > > + ret =3D setup_irq(notif_sri_irq, 0, sri_action); > > + if ( ret ) > > + printk(XENLOG_ERR "ffa: setup_irq irq %u failed: error %d\n", > > + notif_sri_irq, ret); > > > > + return ret; > > +} > > + > > +void ffa_notif_init_interrupt(void) > > +{ > > if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) > > { > > /* > > @@ -376,14 +394,36 @@ void ffa_notif_init_interrupt(void) > > * pending, while the SPMC in the secure world will not notice = that > > * the interrupt was lost. > > */ > > - ret =3D request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A= notif", > > - NULL); > > - if ( ret ) > > - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %= d\n", > > - notif_sri_irq, ret); > > + request_sri_irq(); > > } > > } > > > > +static void deinit_ffa_notif_interrupt(void) > > +{ > > + if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) > > + release_irq(notif_sri_irq, NULL); > > +} > > + > > +static int cpu_ffa_notif_callback(struct notifier_block *nfb, > > + unsigned long action, > > + void *hcpu) > > +{ > > + switch ( action ) > > + { > > + case CPU_DYING: > > + deinit_ffa_notif_interrupt(); > > + break; > > + default: > > + break; > > + } > > + > > + return NOTIFY_DONE; > > +} > > + > > +static struct notifier_block cpu_ffa_notif_nfb =3D { > > + .notifier_call =3D cpu_ffa_notif_callback, > > +}; > > + > > void ffa_notif_init(void) > > { > > const struct arm_smccc_1_2_regs arg =3D { > > @@ -392,7 +432,6 @@ void ffa_notif_init(void) > > }; > > struct arm_smccc_1_2_regs resp; > > unsigned int irq; > > - int ret; > > > > /* Only enable fw notification if all ABIs we need are supported */ > > if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) && > > @@ -408,13 +447,11 @@ void ffa_notif_init(void) > > notif_sri_irq =3D irq; > > if ( irq >=3D NR_GIC_SGI ) > > irq_set_type(irq, IRQ_TYPE_EDGE_RISING); > > - ret =3D request_irq(irq, 0, notif_irq_handler, "FF-A notif", N= ULL); > > - if ( ret ) > > - { > > - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %= d\n", > > - irq, ret); > > + > > + if ( request_sri_irq() ) > > return; > > - } > > + > > + register_cpu_notifier(&cpu_ffa_notif_nfb); > > fw_notif_enabled =3D true; > > } > > } > > -- > > 2.43.0 > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 10:25:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:25:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300489.1575017 (Exim 4.92) (envelope-from ) id 1wKCxJ-0008J4-NF; Tue, 05 May 2026 10:24:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300489.1575017; Tue, 05 May 2026 10:24:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCxJ-0008Ix-KY; Tue, 05 May 2026 10:24:45 +0000 Received: by outflank-mailman (input) for mailman id 1300489; Tue, 05 May 2026 10:24:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCxI-0008Ir-Eq for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:24:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKCxH-005YTf-E6 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:24:43 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c557-2eae-0a2a0a5409dd-0a2a450cc57e-28 for ; Tue, 05 May 2026 12:24:43 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c56b-62f1-0a2a450c0019-d1558031c951-3 for ; Tue, 05 May 2026 12:24:43 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-488b8bc6bc9so31882635e9.3 for ; Tue, 05 May 2026 03:24:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777976683-6E169CF5-DEEE9B63/0/0 X-purgate-type: clean X-purgate-size: 2990 On 05.05.2026 11:13, Jürgen Groß wrote: > On 05.05.26 10:43, Jan Beulich wrote: >> On 05.05.2026 10:06, Juergen Gross wrote: >>> When fixing a conflict in xen_e820_resolve_conflicts(), the loop over >>> the E820 map entries needs to be restarted, as the E820 map will have >>> been modified by the fix. Otherwise entries might be skipped by >>> accident. >>> >>> Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") >>> Signed-off-by: Juergen Gross >> >> First, while trying to review this, isn't there another issue in >> xen_e820_swap_entry_with_ram(), in that >> >> entry->addr = entry_end - swap_size + >> swap_addr - swap_entry->addr; >> >> >> really means to be >> >> entry->addr = entry_end - swap_size + >> swap_entry->addr - swap_addr; >> >> (affecting non-page-aligned E820 entries)? > > Yes, you are right. > >> >> Further, that function converts swap_entry to the page-aligned superset >> of the passed in range. How is it guaranteed that this new range won't >> overlap with the predecessor and/or successor one? Wouldn't that need >> to be conversion to the page-aligned subset instead? > > This is subtle. :-) > > We are converting to RAM (usable), so the type value is 1. e820__update_table() > will handle overlaps just fine, with higher type values "winning" against lower > ones. So any other region overlapping with the new RAM region will result in > another conflict in the next loop iteration. Oh, wow, and this is a property of the function that one can rely upon? > Using the page-aligned subset would result in possible memory holes, which would > be problematic (the kernel or page tables shouldn't have holes, after all). Aren't such holes normal to occur, e.g. on misaligned RAM/UNUSABLE boundaries? >> And then, is passing the page-aligned superset to xen_add_remap_nonram() >> really appropriate? Why would any leading or trailing space there be >> subject to remapping? > > How would you want to remap a sub-page physical memory area to another location > without affecting the rest of the page? We are reworking the final p2m map here. Well, first and foremost: xen_add_remap_nonram() takes and stores byte- granular addresses / sizes, with the sole requirement being that the offset-into-page be identical between both addresses. That check alone already indicates that non-page-aligned addresses are expected to be passed into here. Further, xen_acpi_os_ioremap() uses the resulting remap table, and is byte granular. With the physical address adjustment there, both mappings could (theoretically) coexist. But the problem I'm trying to point out is that by passing the page-aligned superset into xen_add_remap_nonram() you misguide xen_acpi_os_ioremap() (while at the same time xen_do_remap_nonram() will do suitable rounding to page boundaries even if exact addresses were passed). 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505102417.208138-1-jgross@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505102417.208138-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777976747-496B0A53-D04F70B1/0/0 X-purgate-type: clean X-purgate-size: 502 On 05.05.2026 12:24, Juergen Gross wrote: > When swapping a not page-aligned E820 map entry with RAM, the start > address of the modified entry is calculated wrong (the offset into the > page is subtracted instead of being added to the page address). > > Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") > Reported-by: Jan Beulich > Signed-off-by: Juergen Gross Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue May 05 10:30:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:30:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300506.1575034 (Exim 4.92) (envelope-from ) id 1wKD2W-0002FP-Gj; Tue, 05 May 2026 10:30:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300506.1575034; Tue, 05 May 2026 10:30:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKD2W-0002FI-E3; Tue, 05 May 2026 10:30:08 +0000 Received: by outflank-mailman (input) for mailman id 1300506; Tue, 05 May 2026 10:30:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKD2V-0002FC-19 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:30:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKD2U-00DY4H-DL for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:30:06 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c6ac-2eae-0a2a0a5409dd-0a2a45038164-10 for ; Tue, 05 May 2026 12:30:06 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c6ae-672d-0a2a45030019-d1558030e0fd-3 for ; Tue, 05 May 2026 12:30:06 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so80549635e9.2 for ; Tue, 05 May 2026 03:30:06 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1777976230.8631fc262581453bbf619ec5b2062170.19df7a441f3000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777977006-A1370938-D556029C/0/0 X-purgate-type: clean X-purgate-size: 1511 On 05.05.2026 12:17, Teddy Astie wrote: > Le 04/05/2026 à 17:51, Jan Beulich a écrit : >> On 15.04.2026 15:32, Teddy Astie wrote: >>> Track on which pCPU each vCPU of a domain ran. This will >>> be used to know whether a TLB flush is required or not >>> when the vCPU is migrated on another pCPU. >> >> Somewhat related tracking already exists - see the dirty_cpumask field. > > I've seen it, but I'm not sure how it can be leveraged here. > > I will try to take a closer look if that could be used instead. > >> But what title and description say doesn't match ... >> >>> @@ -977,6 +978,8 @@ void asmlinkage svm_vmenter_helper(void) >>> >>> svm_sync_vmcb(curr, vmcb_needs_vmsave); >>> >>> + curr->domain->latest_vcpu[cpu] = curr->vcpu_id; >> >> ... the implementation anyway: You track which vCPU last ran on a given >> pCPU. Since the same pCPU may have run multiple vCPU-s which then weren't >> scheduled again, you lose data afaict. >> > > I mixed up the wording. But the implementation is the proper intent. > > It's more > > Track which vCPU of the domain each pCPU ran. Okay, yet then (as already pointed out) how do you know vCPU0 ran last on a given pCPU if after its de-scheduling vCPU1 (of the same domain) was put there. Your track record (after de-scheduling vCPU1) will say only vCPU1; information on vCPU0 will be lost. Yet then, as also indicated, it's not quite clear to me how exactly you mean to leverage this tracking. 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pr=C Message-ID: <18280bdb-e33a-4aba-aa1d-8f42675717e8@amd.com> Date: Tue, 5 May 2026 12:34:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , "Harry Ramsey" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , "Jan Beulich" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260420142224.1802911-1-luca.fancellu@arm.com> <20260420142224.1802911-3-luca.fancellu@arm.com> <6ba6db51-3ff0-4ecd-9f86-03735e7dfc05@amd.com> <55B3CCAD-8EF6-4949-BC87-D7EE3A348FEC@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <55B3CCAD-8EF6-4949-BC87-D7EE3A348FEC@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE4:EE_|IA1PR12MB7592:EE_ X-MS-Office365-Filtering-Correlation-Id: 67c982b6-ba31-4605-e546-08deaa91f320 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dL6OQSdMGI5t11t03IS0kfN4f8dzdsQYhhbFzctQH1KZr+F8l0Qh/P7Kkyp5fJ5sycyrXKLCB54fEAZuwVuPwhiCerdiVa2Si7DQEfhzLicm2VOJ1bKqYpQIFO7Zc+knZ3R+oCjVGLPlz64Ree7+IkmQHpHT/H+5pAWW/5t+WfyDN/kYsZr35fQzenjbV28OTuo6Y9FTsSvWzym1cYQTI7A/bYRlhrlbx3enZJqlQUZ65TozcsfbEKSNfafGgPsqE8xBzefHNrzoPH1rP9lDa+Wly3svseXBVtLqqCnzxJdy7immP3cD9Bhg+ZneUR7/7PxED0yiCZvSKjgEY3GWPZFLJYDc1qWee8qoJnMJ2ZrUqRgTL8tdjkxzXtkAJdJXXZRcDLzqxw6tJ4eVHmaBjQwFBlOIAwQj7GNF6dpU+ha+/ZgWq94S2dSXSDRcRxZM X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 10:34:55.7827 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 67c982b6-ba31-4605-e546-08deaa91f320 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7592 X-purgate-ID: tlsNG-c1860d/1777977304-C156FDB1-64F97BA0/0/0 X-purgate-type: clean X-purgate-size: 12848 On 29-Apr-26 14:46, Luca Fancellu wrote: > Hi Michal, > > thanks for your review, > >>> >>> diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt >>> index 977b4286082f..c3f484a3b01a 100644 >>> --- a/docs/misc/arm/device-tree/booting.txt >>> +++ b/docs/misc/arm/device-tree/booting.txt >>> @@ -322,6 +322,20 @@ with the following properties: >>> Should be used together with scmi-smc-passthrough Xen command line >>> option. >>> >>> +- v8r_el1_msa >>> + >>> + A string property specifying whether, on Armv8-R systems, a domain >>> + should use PMSAv8 (MPU) at EL1 or VMSAv8 (MMU) at EL1. >> Instead of repeating at EL1 you could move it next to "on Armv8R systems" > > ok > >> >>> + >>> + - "mmu" >>> + Enables VMSAv8 at EL1. This requires hardware support and is only >>> + optionally available on AArch64. >> Maybe it's due to the combination of words but it does not immediately tell that >> it's not present on AArch32. I would add: "Not supported on AArch32". > > Ok > >> >>> + >>> + - "mpu" >>> + Enables PMSAv8 at EL1. This is the default behaviour when the property is >>> + not passed. This configuration requires static allocation (xen,static-mem) >>> + and direct mapping (direct-map). >>> + >>> Under the "xen,domain" compatible node, one or more sub-nodes are present >>> for the DomU kernel and ramdisk. >>> >>> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c >>> index 4181c105389a..6f0256f9d825 100644 >>> --- a/xen/arch/arm/dom0less-build.c >>> +++ b/xen/arch/arm/dom0less-build.c >>> @@ -24,6 +24,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> #ifdef CONFIG_VGICV2 >>> @@ -322,6 +323,8 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, >>> if ( domu_dt_sci_parse(node, d_cfg) ) >>> panic("Error getting SCI configuration\n"); >>> >>> + arch_dt_v8r_el1_msa_parse(node, d_cfg); >> "arch" prefix should be used by functions called from the common code that have >> arch-specific implementation. This is not the case for functions you're >> introducing here, so please drop this prefix. >> >> Also, I would continue using the SCI approach e.g. call it domu_dt_msa_parse() >> and decide to panic at the call site rather than making this decision in the >> function itself. > > sounds good > >> >>> + >>> if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) >>> { >>> int vpl011_virq = GUEST_VPL011_SPI; >>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >>> index 26380a807cad..dfa7ace1141b 100644 >>> --- a/xen/arch/arm/domain.c >>> +++ b/xen/arch/arm/domain.c >>> @@ -18,6 +18,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> #include >>> #include >>> @@ -725,6 +726,9 @@ int arch_domain_create(struct domain *d, >>> if ( (rc = sci_domain_init(d, config)) != 0 ) >>> goto fail; >>> >>> + if ( (rc = arch_set_v8r_el1_msa(d, config, flags)) != 0 ) >>> + goto fail; >>> + >>> return 0; >>> >>> fail: >>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h >>> index ffe5d0d9f0a6..4a3fb825962b 100644 >>> --- a/xen/arch/arm/include/asm/domain.h >>> +++ b/xen/arch/arm/include/asm/domain.h >>> @@ -128,6 +128,10 @@ struct arch_domain >>> #endif >>> >>> struct resume_info resume_ctx; >>> + >>> +#ifdef CONFIG_MPU >>> + uint8_t v8r_el1_msa; >>> +#endif >>> } __cacheline_aligned; >>> >>> struct arch_vcpu >>> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h >>> index 6674dac5e2f8..921d6f98f4f4 100644 >>> --- a/xen/arch/arm/include/asm/domain_build.h >>> +++ b/xen/arch/arm/include/asm/domain_build.h >>> @@ -4,6 +4,14 @@ >>> #include >>> #include >>> >>> +#if defined(CONFIG_MMU) >>> +#include >>> +#elif defined(CONFIG_MPU) >>> +#include >>> +#else >>> +# error "Unknown memory management layout" >> I don't think that this error msg is correct for domain build. > > are you suggesting dropping the error or modifying the message? modifying the message > >>> >>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h >>> index 72fa5b00b861..8a8c01086206 100644 >>> --- a/xen/arch/arm/include/asm/mpu.h >>> +++ b/xen/arch/arm/include/asm/mpu.h >>> @@ -27,6 +27,11 @@ >>> >>> #ifndef __ASSEMBLER__ >>> >>> +/* >>> + * Utility function to determine if an Armv8-R processor supports VMSA. >>> + */ >> NIT: No need for multi-line comment for a single sentence that can fit in one line. > > ok > >> >>> +bool has_v8r_vmsa_support(void); >>> + >>> /* >>> * Set base address of MPU protection region. >>> * >>> diff --git a/xen/arch/arm/include/asm/mpu/domain-build.h b/xen/arch/arm/include/asm/mpu/domain-build.h >>> new file mode 100644 >>> index 000000000000..463cd85b5b7e >>> --- /dev/null >>> +++ b/xen/arch/arm/include/asm/mpu/domain-build.h >>> @@ -0,0 +1,27 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#ifndef __ARM_MPU_DOMAIN_BUILD_H__ >>> +#define __ARM_MPU_DOMAIN_BUILD_H__ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +void arch_dt_v8r_el1_msa_parse(struct dt_device_node *node, >>> + struct xen_domctl_createdomain *d_cfg); >>> + >>> +int arch_set_v8r_el1_msa(struct domain *d, >>> + const struct xen_domctl_createdomain *config, >>> + unsigned int flags); >>> + >>> +#endif /* __ARM_MPU_DOMAIN_BUILD_H__ */ >>> + >>> +/* >>> + * Local variables: >>> + * mode: C >>> + * c-file-style: "BSD" >>> + * c-basic-offset: 4 >>> + * indent-tabs-mode: nil >>> + * End: >>> + */ >>> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile >>> index 3327fadd5d0e..e3997e41b81b 100644 >>> --- a/xen/arch/arm/mpu/Makefile >>> +++ b/xen/arch/arm/mpu/Makefile >>> @@ -1,5 +1,6 @@ >>> obj-$(CONFIG_ARM_32) += arm32/ >>> obj-$(CONFIG_ARM_64) += arm64/ >>> +obj-y += domain-build.o >>> obj-y += domain-page.o >>> obj-y += mm.o >>> obj-y += p2m.o >>> diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c >>> index a4673c351141..5eaeb3400e6c 100644 >>> --- a/xen/arch/arm/mpu/arm32/mm.c >>> +++ b/xen/arch/arm/mpu/arm32/mm.c >>> @@ -38,6 +38,11 @@ >>> break; \ >>> } >>> >>> +bool has_v8r_vmsa_support(void) >>> +{ >>> + return false; >>> +} >>> + >>> /* >>> * Armv8-R supports direct access and indirect access to the MPU regions through >>> * registers: >>> diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c >>> index ed643cad4073..b07e729a7d05 100644 >>> --- a/xen/arch/arm/mpu/arm64/mm.c >>> +++ b/xen/arch/arm/mpu/arm64/mm.c >>> @@ -32,6 +32,11 @@ >>> break; \ >>> } >>> >>> +bool has_v8r_vmsa_support(void) >>> +{ >>> + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; >>> +} >>> + >>> /* >>> * Armv8-R supports direct access and indirect access to the MPU regions through >>> * registers: >>> diff --git a/xen/arch/arm/mpu/domain-build.c b/xen/arch/arm/mpu/domain-build.c >>> new file mode 100644 >>> index 000000000000..1bdd0ffedebb >>> --- /dev/null >>> +++ b/xen/arch/arm/mpu/domain-build.c >>> @@ -0,0 +1,76 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +void __init arch_dt_v8r_el1_msa_parse(struct dt_device_node *node, >>> + struct xen_domctl_createdomain *d_cfg) >>> +{ >>> + const char *v8r_el1_msa; >>> + >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; >>> + >>> + if ( !dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa) ) >>> + { >>> + if ( !strcmp(v8r_el1_msa, "mmu") ) >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; >>> + else if ( !strcmp(v8r_el1_msa, "mpu") ) >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; >>> + else >>> + panic("Invalid device tree option for v8r_el1_msa\n"); >>> + } >>> +} >>> + >>> +int arch_set_v8r_el1_msa(struct domain *d, >>> + const struct xen_domctl_createdomain *config, >>> + unsigned int flags) >>> +{ >>> + switch ( config->arch.v8r_el1_msa ) >>> + { >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: >>> + fallthrough; >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: >>> + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) >>> + { >>> + dprintk(XENLOG_INFO, >>> + "PMSA is not valid for domain without static allocation and direct map (v8r_el1_msa)\n"); >>> + return -EINVAL; >>> + } >>> + break; >>> + >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: >>> + if ( !has_v8r_vmsa_support() ) >>> + { >>> + dprintk(XENLOG_INFO, >>> + "Platform does not support VMSA at EL1 (v8r_el1_msa)\n"); >>> + return -EINVAL; >>> + } >>> + break; >>> + >>> + default: >>> + dprintk(XENLOG_INFO, "Unsupported arch.v8r_el1_msa value (%u)\n", >>> + config->arch.v8r_el1_msa); >>> + return -EINVAL; >>> + } >> Why do we even need this split. It seems like all the above checks could be done >> in arch_dt_v8r_el1_msa_parse given that it is called after static-mem,direct-map >> are set. This would simplify this file and we would not even need to introduce >> new domain-build split for one function. > > Please correct me if I’m wrong, if I move the checks in arch_dt_v8r_el1_msa_parse() they will > be handled only on dom0less domain creation only. > If I have it in the current way it will be handled by dom0less and XL toolstack creation. > I understand that for now the toolstack path is not implemented, but it felt better to do this now > rather than change it later. > > Let me know what you think. MPU == everything static, so I'm not sure how dynamic domain creation via libxl would come into play here. > >> >>> + >>> + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; >>> + >>> + return 0; >>> +} >>> + >>> +/* >>> + * Local variables: >>> + * mode: C >>> + * c-file-style: "BSD" >>> + * c-basic-offset: 4 >>> + * indent-tabs-mode: nil >>> + * End: >>> + */ >>> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >>> index cd563cf70684..7d6f87e8b2b1 100644 >>> --- a/xen/include/public/arch-arm.h >>> +++ b/xen/include/public/arch-arm.h >>> @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >>> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >>> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >>> >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 >>> + >>> struct xen_arch_domainconfig { >>> /* IN/OUT */ >>> uint8_t gic_version; >>> @@ -355,6 +359,9 @@ struct xen_arch_domainconfig { >>> uint32_t clock_frequency; >>> /* IN */ >>> uint8_t arm_sci_type; >>> + /* IN */ >>> + uint8_t v8r_el1_msa; >>> + uint16_t pad; >> Before this change there were 3B of implicit padding. Now you added 1B of data >> and 2B of explicit padding. The struct size is the same, so why bumping the >> interface version? I don't see it necessary here. Also, why explicit padding? >> With explicit padding I do think you need to now check that it's 0. > > I’ve bumped because if an older toolstack is passing something that is not zero > in the v8r_el1_msa we would return an error and stop the domain creation by the > above: I guess we won't have this issue if we drop arch_set_v8r_el1_msa as suggested above. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 10:39:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:39:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300526.1575052 (Exim 4.92) (envelope-from ) id 1wKDBI-0003lL-MA; Tue, 05 May 2026 10:39:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300526.1575052; Tue, 05 May 2026 10:39:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDBI-0003lE-JQ; Tue, 05 May 2026 10:39:12 +0000 Received: by outflank-mailman (input) for mailman id 1300526; Tue, 05 May 2026 10:39:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDBH-0003l8-VY for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:39:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDBH-00C3Op-BA for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:39:11 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c8c8-bab6-0a2a0a5309dd-0a2a4504c33e-20 for ; Tue, 05 May 2026 12:39:11 +0200 Received: from [195.135.223.130] (helo=smtp-out1.suse.de) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c8cf-1dec-0a2a45040019-c387df82d0a0-3 for ; Tue, 05 May 2026 12:39:11 +0200 Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id CE9C26A832; Tue, 5 May 2026 10:24:22 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 7F039593A3; Tue, 5 May 2026 10:24:22 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 7nuaHVbF+WmlDwAAD6G6ig (envelope-from ); Tue, 05 May 2026 10:24:22 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777976663; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=1kPsih4iTQHzWl89ILt0g95YzXtWS3e4GyMfMv2igR4=; b=tn3PzYfCPZtySioGtvMgAlbygEOaU/FEtpO2jEf1J6SkLQahFS/xM70sMFDvfyToaLH7XH sQPTPpGQhfV91XLB/47t7gJ/GZ1T6HSiPmn5NL5XPAj1c9Psc488L1swhhACnvsHZaHwcC EgGhEE8Tn/yGA+L2wWg9uSqTkGmt9MU= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=PiLjwjp+ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777976662; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=1kPsih4iTQHzWl89ILt0g95YzXtWS3e4GyMfMv2igR4=; b=PiLjwjp+GPhSNZPJ8LnSJD3yciFyfyaOd7w2dDeG76KVifcwgNTKNaIC+kLSGSLUPcolOD phK/Icdkl3jYRR8OhlEMTLwnNVJu5xCbvEhf0ag2w0WjZNVW06jrRj0ypeVu/O75D0Ty60 1tgoDdAEwiJmIOr58lYJ5hpc0TDJNBQ= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, Jan Beulich Subject: [PATCH] x86/xen: Fix xen_e820_swap_entry_with_ram() Date: Tue, 5 May 2026 12:24:17 +0200 Message-ID: <20260505102417.208138-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Flag: NO X-Spam-Score: -3.01 X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:dkim,suse.com:mid]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCPT_COUNT_SEVEN(0.00)[11]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: CE9C26A832 X-Spam-Level: X-purgate-ID: tlsNG-ebf023/1777977551-4B5683FF-70C5D1EB/0/0 X-purgate-type: clean X-purgate-size: 1062 When swapping a not page-aligned E820 map entry with RAM, the start address of the modified entry is calculated wrong (the offset into the page is subtracted instead of being added to the page address). Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") Reported-by: Jan Beulich Signed-off-by: Juergen Gross --- arch/x86/xen/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index bb95a05259b8..41251d4cf953 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -655,7 +655,7 @@ static void __init xen_e820_swap_entry_with_ram(struct e820_entry *swap_entry) /* Fill new entry (keep size and page offset). */ entry->type = swap_entry->type; entry->addr = entry_end - swap_size + - swap_addr - swap_entry->addr; + swap_entry->addr - swap_addr; entry->size = swap_entry->size; /* Convert old entry to RAM, align to pages. */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 05 10:41:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:41:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300534.1575061 (Exim 4.92) (envelope-from ) id 1wKDD3-0005Dw-0G; Tue, 05 May 2026 10:41:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300534.1575061; Tue, 05 May 2026 10:41:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDD2-0005Dp-Ti; Tue, 05 May 2026 10:41:00 +0000 Received: by outflank-mailman (input) for mailman id 1300534; Tue, 05 May 2026 10:40:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDD1-0005Dh-LP for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:40:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDD1-001j5O-1V for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:40:59 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c92d-2eae-0a2a0a5409dd-0a2a4504eaf2-44 for ; Tue, 05 May 2026 12:40:58 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c93a-1dec-0a2a45040019-d1558035b83a-3 for ; Tue, 05 May 2026 12:40:58 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so57383955e9.2 for ; Tue, 05 May 2026 03:40:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 03:40:58 -0700 (PDT) Message-ID: <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Date: Tue, 5 May 2026 12:40:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777977658-300413FF-42E4224F/0/0 X-purgate-type: clean X-purgate-size: 2711 On 05.05.2026 09:35, Orzel, Michal wrote: > On 05-May-26 09:13, Roger Pau Monné wrote: >> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>> defines it). >>>>> >>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>> to 0 when the arch does not define it. This makes the generic macros >>>>> correct for all architectures, even though they are only used on x86 >>>>> today. >>>> >>>> Hm, I assume this offset was added because the original mask PDX >>>> compression won't (usually) compress the gap between 0 and the start >>>> of RAM. However the newish offset PDX compression should be able to >>>> compress from 0 to start of RAM, and hence you don't need to apply >>>> an extra PDX offset there? >>>> >>>> If that's indeed the case it might be better to integrate >>>> frametable_base_pdx into the mask compression algorithm itself, so >>>> that on some arches it's a mask plus a decrease. >>> The offset is needed regardless of whether compression is used. With >>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>> 0x80000000, the first valid PDX is 0x80000. >> >> OK, so you are doing some (kind of) address space compression (removing >> the leading empty range to the first RAM region) even when PDX is >> disabled. >> >>> Without frametable_base_pdx >>> the frame table would have to be indexed from 0, wasting >>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >> >> But you don't really "waste" memory, just address space? Oh, maybe >> not on ARM as it doesn't use pdx_group_valid? And so you >> unconditionally populate the frametable from PDX 0 to max PDX. > With pdx_group_valid (which this series adds) we wouldn't waste > physical memory for the leading gap. But we'd still waste virtual address > space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > because the full range from PDX 0 must fit. For example with RAM starting at 5TB > the virtual offset before the first usable entry would be ~70GB — more than the > entire 32GB FRAMETABLE_SIZE on ARM64. Yet still - this is exactly one of the situations offset compression means to cover. I'm entirely with Roger as to it being undesirable to build a special case variant of "offset compression" into "no compression". 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pr=C Message-ID: Date: Tue, 5 May 2026 12:46:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529E:EE_|DS7PR12MB6238:EE_ X-MS-Office365-Filtering-Correlation-Id: 3042a70b-ba4e-4bb7-e46e-08deaa9381ee X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|1800799024|82310400026|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RhTEiKnVDsApT20JFC+2ZEXbxn84lWwNRZzJcHXq6rsdfqU/hn8aMP/GRyi3xxHZvLkrsMY+x+Ff88hTQM980cVlpBOxYhs+Xz1is3M+qgXrYc3ZvdAK+iT2GCakd7DN8GOou/gp7FLgbuCyTIYW7RtGvDEK+aQhWuECWV2qxWzobxKh7JzOaYVbHr3yft36yKDRsE/mIWu3eUExw1vLoF8lM8geDAHt0Of8OAplA26/WkDiXudHevum3X0qpIwQl0mOrv8PLFgaQEr/My1imDXw4lhn30ieatpsLcxz2hSZF/tX6EXz+Y0JVizDPF7nIceWmnFPQxNFK6rePU5bH7v8dSo8RUzVRWcF7vnBFbpRaa59ijLi9Qd/6a2/oXh0jvp52q5kH1evfRHTWT5l2/Y6dsbgE5rLghUwAKGyukux2GBpXJMhCyuZm/X5C4mC X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 10:46:04.9379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3042a70b-ba4e-4bb7-e46e-08deaa9381ee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6238 X-purgate-ID: tlsNG-ebf023/1777977971-4BD6C3FF-DD965C9B/0/0 X-purgate-type: clean X-purgate-size: 3221 On 05-May-26 12:40, Jan Beulich wrote: > On 05.05.2026 09:35, Orzel, Michal wrote: >> On 05-May-26 09:13, Roger Pau Monné wrote: >>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>> defines it). >>>>>> >>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>> correct for all architectures, even though they are only used on x86 >>>>>> today. >>>>> >>>>> Hm, I assume this offset was added because the original mask PDX >>>>> compression won't (usually) compress the gap between 0 and the start >>>>> of RAM. However the newish offset PDX compression should be able to >>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>> an extra PDX offset there? >>>>> >>>>> If that's indeed the case it might be better to integrate >>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>> that on some arches it's a mask plus a decrease. >>>> The offset is needed regardless of whether compression is used. With >>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>> 0x80000000, the first valid PDX is 0x80000. >>> >>> OK, so you are doing some (kind of) address space compression (removing >>> the leading empty range to the first RAM region) even when PDX is >>> disabled. >>> >>>> Without frametable_base_pdx >>>> the frame table would have to be indexed from 0, wasting >>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>> >>> But you don't really "waste" memory, just address space? Oh, maybe >>> not on ARM as it doesn't use pdx_group_valid? And so you >>> unconditionally populate the frametable from PDX 0 to max PDX. >> With pdx_group_valid (which this series adds) we wouldn't waste >> physical memory for the leading gap. But we'd still waste virtual address >> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >> the virtual offset before the first usable entry would be ~70GB — more than the >> entire 32GB FRAMETABLE_SIZE on ARM64. > > Yet still - this is exactly one of the situations offset compression means > to cover. I'm entirely with Roger as to it being undesirable to build a > special case variant of "offset compression" into "no compression". In this case, if you don't want to generalize the macros, how should we proceed on Arm if we still need the offset to cover the PDX_NONE variant that we also use? In v1 I just created a local override but Julien wanted to generalize the macros instead. The discussion about switching the default on Arm from mask to offset that is not even selectable on Arm needs to wait for the new release cycle. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 10:49:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:49:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300552.1575081 (Exim 4.92) (envelope-from ) id 1wKDKx-0006lq-1Z; Tue, 05 May 2026 10:49:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300552.1575081; Tue, 05 May 2026 10:49:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDKw-0006lj-UK; Tue, 05 May 2026 10:49:10 +0000 Received: by outflank-mailman (input) for mailman id 1300552; Tue, 05 May 2026 10:49:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDKv-0006ld-JX for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:49:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDKu-00DbwM-VS for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:49:08 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9cb23-5cb7-0a2a0a5109dd-0a2a450ad7fc-8 for ; Tue, 05 May 2026 12:49:08 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9cb24-56b3-0a2a450a0019-d155802cb89c-3 for ; Tue, 05 May 2026 12:49:08 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so57496285e9.2 for ; Tue, 05 May 2026 03:49:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 03:49:08 -0700 (PDT) Message-ID: <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Date: Tue, 5 May 2026 12:49:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777978148-4616A8B7-D89741BE/0/0 X-purgate-type: clean X-purgate-size: 3492 On 05.05.2026 12:46, Orzel, Michal wrote: > On 05-May-26 12:40, Jan Beulich wrote: >> On 05.05.2026 09:35, Orzel, Michal wrote: >>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>> defines it). >>>>>>> >>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>> today. >>>>>> >>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>> an extra PDX offset there? >>>>>> >>>>>> If that's indeed the case it might be better to integrate >>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>> that on some arches it's a mask plus a decrease. >>>>> The offset is needed regardless of whether compression is used. With >>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>> 0x80000000, the first valid PDX is 0x80000. >>>> >>>> OK, so you are doing some (kind of) address space compression (removing >>>> the leading empty range to the first RAM region) even when PDX is >>>> disabled. >>>> >>>>> Without frametable_base_pdx >>>>> the frame table would have to be indexed from 0, wasting >>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>> >>>> But you don't really "waste" memory, just address space? Oh, maybe >>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>> unconditionally populate the frametable from PDX 0 to max PDX. >>> With pdx_group_valid (which this series adds) we wouldn't waste >>> physical memory for the leading gap. But we'd still waste virtual address >>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>> the virtual offset before the first usable entry would be ~70GB — more than the >>> entire 32GB FRAMETABLE_SIZE on ARM64. >> >> Yet still - this is exactly one of the situations offset compression means >> to cover. I'm entirely with Roger as to it being undesirable to build a >> special case variant of "offset compression" into "no compression". > In this case, if you don't want to generalize the macros, how should we proceed > on Arm if we still need the offset to cover the PDX_NONE variant that we also > use? In v1 I just created a local override but Julien wanted to generalize the > macros instead. The discussion about switching the default on Arm from mask to > offset that is not even selectable on Arm needs to wait for the new release cycle. I'm not convinced of that. If you need offset by default, why not enable it by default (right now, and potentially even as a backport if there's any bug that is being fixed)? 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This doesn't introduce any changes to the compiled result of the array. Signed-off-by: Uwe Kleine-König (The Capable Hub) --- Hello, this is a preparing change for making struct pci_device_id::driver_data an anonymous union (similar to https://lore.kernel.org/all/cover.1776579304.git.u.kleine-koenig@baylibre.com/). This requires named initializers for .driver_data. Dropping the unused assignment is still better. Best regards Uwe drivers/xen/platform-pci.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/xen/platform-pci.c b/drivers/xen/platform-pci.c index 1db82da56db6..f2438232518c 100644 --- a/drivers/xen/platform-pci.c +++ b/drivers/xen/platform-pci.c @@ -174,11 +174,9 @@ static int platform_pci_probe(struct pci_dev *pdev, } static const struct pci_device_id platform_pci_tbl[] = { - {PCI_VENDOR_ID_XEN, PCI_DEVICE_ID_XEN_PLATFORM, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {PCI_VENDOR_ID_XEN, PCI_DEVICE_ID_XEN_PLATFORM_XS61, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {0,} + { PCI_VDEVICE(XEN, PCI_DEVICE_ID_XEN_PLATFORM) }, + { PCI_VDEVICE(XEN, PCI_DEVICE_ID_XEN_PLATFORM_XS61) }, + { } }; static const struct dev_pm_ops platform_pm_ops = { base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731 -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Tue May 05 11:45:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 11:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300583.1575120 (Exim 4.92) (envelope-from ) id 1wKEDM-0007aZ-Lm; Tue, 05 May 2026 11:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300583.1575120; Tue, 05 May 2026 11:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEDM-0007aS-HX; Tue, 05 May 2026 11:45:24 +0000 Received: by outflank-mailman (input) for mailman id 1300583; Tue, 05 May 2026 11:45:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEDK-0007Zt-M5 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:45:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKEDK-00GG6A-2s for xen-devel@lists.xenproject.org; Tue, 05 May 2026 13:45:22 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9d851-5cb7-0a2a0a5109dd-0a2a4508e4ca-2 for ; Tue, 05 May 2026 13:45:21 +0200 Received: from [209.85.208.44] (helo=mail-ed1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9d851-63b5-0a2a45080019-d155d02cc468-3 for ; Tue, 05 May 2026 13:45:21 +0200 Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-67bc8609a9bso2330088a12.0 for ; Tue, 05 May 2026 04:45:21 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------aQ9DkZhYp2ID3woTprv8iofE" X-purgate-ID: tlsNG-c1860d/1777981521-38D63DB1-33AD83C8/0/0 X-purgate-type: clean X-purgate-size: 13676 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------aQ9DkZhYp2ID3woTprv8iofE Content-Type: multipart/mixed; boundary="------------l00BF6gHWOEUiAPRiNCkiIfR"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org Message-ID: <598d6dfd-da1b-4b10-9c42-2bb1242b700d@suse.com> Subject: Re: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> <29422b34-b33f-4a25-838f-de6078151e46@suse.com> In-Reply-To: <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP 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<63b219c3cae5201c5db804f69c3b88ac41c9bdf6.1775125380.git.mykola_kvach@epam.com> <55B2462D-41E5-42CB-9525-39CF4843E95E@arm.com> In-Reply-To: <55B2462D-41E5-42CB-9525-39CF4843E95E@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 14:45:03 +0300 X-Gm-Features: AVHnY4Iiroi7TYFgBdAn9YTSTkXYar6w48U2NFr6DOYwy4ITjdNgysHBdDQJoHw Message-ID: Subject: Re: [PATCH v8 08/13] iommu/ipmmu-vmsa: Implement suspend/resume callbacks To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777981515-28776938-3E2D35FC/0/0 X-purgate-type: clean X-purgate-size: 2991 Hi Luca, Thank you for the review. On Fri, Apr 24, 2026 at 4:36=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Oleksandr Tyshchenko > > > > Store and restore active context and micro-TLB registers. > > > > Tested on R-Car H3 Starter Kit. > > > > Signed-off-by: Oleksandr Tyshchenko > > Signed-off-by: Mykola Kvach > > --- > > Changes in V7: > > - moved suspend context allocation before pci stuff > > --- > > xen/drivers/passthrough/arm/ipmmu-vmsa.c | 305 ++++++++++++++++++++++- > > 1 file changed, 298 insertions(+), 7 deletions(-) > > > > diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/pas= sthrough/arm/ipmmu-vmsa.c > > index ea9fa9ddf3..6765bd3083 100644 > > --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > @@ -71,6 +71,8 @@ > > }) > > #endif > > > > +#define dev_dbg(dev, fmt, ...) \ > > + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) > > #define dev_info(dev, fmt, ...) \ > > dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) > > #define dev_warn(dev, fmt, ...) \ > > @@ -130,6 +132,24 @@ struct ipmmu_features { > > unsigned int imuctr_ttsel_mask; > > }; > > > > > > [=E2=80=A6] > > > > > > @@ -1340,10 +1608,11 @@ static int ipmmu_add_device(u8 devfn, struct de= vice *dev) > > struct iommu_fwspec *fwspec; > > > > #ifdef CONFIG_HAS_PCI > > + int ret; > > + > > if ( dev_is_pci(dev) ) > > { > > struct pci_dev *pdev =3D dev_to_pci(dev); > > - int ret; > > > > if ( devfn !=3D pdev->devfn ) > > return 0; > > @@ -1371,6 +1640,15 @@ static int ipmmu_add_device(u8 devfn, struct dev= ice *dev) > > /* Let Xen know that the master device is protected by an IOMMU= . */ > > dt_device_set_protected(dev_to_dt(dev)); > > } > > + > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + if ( ipmmu_alloc_ctx_suspend(dev) ) > > + { > > + dev_err(dev, "Failed to allocate context for suspend\n"); > > + return -ENOMEM; > > + } > > +#endif > > If this fails the device will remain protected, I suggest we move this on= e before `if ( !dev_is_pci(dev) ) { =E2=80=A6 }` > block Good point, thanks. Yes, this should be fixed. In the original ordering, a failure in ipmmu_alloc_ctx_suspend() could leave a non-PCI DT device marked as protected even though ipmmu_add_device() returned an error. I'll reorder the code so dt_device_set_protected() is done only after ipmmu_alloc_ctx_suspend() succeeds. This keeps the successful path unchanged and avoids leaving stale protected state on failure. Best regards, Mykola > > The rest looks ok to me, but I=E2=80=99m not an expert of this part. > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Tue May 05 11:47:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 11:47:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300598.1575128 (Exim 4.92) (envelope-from ) id 1wKEEy-0008Jh-VA; Tue, 05 May 2026 11:47:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300598.1575128; Tue, 05 May 2026 11:47:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEEy-0008Ja-SL; Tue, 05 May 2026 11:47:04 +0000 Received: by outflank-mailman (input) for mailman id 1300598; Tue, 05 May 2026 11:47:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEEw-0008JS-QK for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Tue, 5 May 2026 13:46:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB58:EE_|IA0PR12MB8351:EE_ X-MS-Office365-Filtering-Correlation-Id: 0759fbfa-dd39-44f9-da28-08deaa9c011f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|376014|36860700016|1800799024|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NEADBj4SswHw2YTu9cF1Rr6N9dOQttO7UALkr0vvLNuPv5R0MCrtOk8nmoXgY166U6CTSdo4bnyyDD7pFi8oAedrYyTNAn13ejyuN80nqx2t7ZmMxgdbIBkgxHTPzzOMu6qBzN8/+e9v7B1HFishBgEDYUYghIlkKzzHCXZaCx1jVVAgV4EsFic3PJeR9A088IbSGgbXcm0qw6rLj+H4E+pZeX7ghJttGbFpvbicWCW/Mbc4sPZ4lOPUt+afwNc2ac5BimYf5dvj/ZbPegIOITMHdqNZQqtkp0G9HsPASLowXA9zDWS6sU34YQgtgX120FY2cIhqBKqkEBtoaHhKFO10vLFivTckeGUJg6W0ntsFRgnjl9BUXL77HaDqU5DSi2bUeMHbI2LxnHPD9+GR34W6cZD96MqG1GDt7k4wWawJdhoEH/QtyN2zEh/+l8iL X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 11:46:54.3320 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0759fbfa-dd39-44f9-da28-08deaa9c011f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB58.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8351 X-purgate-ID: tlsNG-d25034/1777981621-F5A00CF5-AAFF3C35/0/0 X-purgate-type: clean X-purgate-size: 3693 On 05-May-26 12:49, Jan Beulich wrote: > On 05.05.2026 12:46, Orzel, Michal wrote: >> On 05-May-26 12:40, Jan Beulich wrote: >>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>> defines it). >>>>>>>> >>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>> today. >>>>>>> >>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>> an extra PDX offset there? >>>>>>> >>>>>>> If that's indeed the case it might be better to integrate >>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>> that on some arches it's a mask plus a decrease. >>>>>> The offset is needed regardless of whether compression is used. With >>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>> >>>>> OK, so you are doing some (kind of) address space compression (removing >>>>> the leading empty range to the first RAM region) even when PDX is >>>>> disabled. >>>>> >>>>>> Without frametable_base_pdx >>>>>> the frame table would have to be indexed from 0, wasting >>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>> >>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>> physical memory for the leading gap. But we'd still waste virtual address >>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>> >>> Yet still - this is exactly one of the situations offset compression means >>> to cover. I'm entirely with Roger as to it being undesirable to build a >>> special case variant of "offset compression" into "no compression". >> In this case, if you don't want to generalize the macros, how should we proceed >> on Arm if we still need the offset to cover the PDX_NONE variant that we also >> use? In v1 I just created a local override but Julien wanted to generalize the >> macros instead. The discussion about switching the default on Arm from mask to >> offset that is not even selectable on Arm needs to wait for the new release cycle. > > I'm not convinced of that. If you need offset by default, why not enable it by > default (right now, and potentially even as a backport if there's any bug that > is being fixed)? As said before, we also need offset when using just PDX grouping and no compression. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 12:05:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 12:05:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300616.1575150 (Exim 4.92) (envelope-from ) id 1wKEWz-0003Bq-O7; Tue, 05 May 2026 12:05:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300616.1575150; Tue, 05 May 2026 12:05:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEWz-0003Bj-Jc; Tue, 05 May 2026 12:05:41 +0000 Received: by outflank-mailman (input) for mailman id 1300616; Tue, 05 May 2026 12:05:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEWy-0003Bd-QU for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <177a399e-b5f3-4f5e-9011-c77978bc6acc@amd.com> Date: Tue, 5 May 2026 14:05:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260420142224.1802911-1-luca.fancellu@arm.com> <20260420142224.1802911-4-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260420142224.1802911-4-luca.fancellu@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B0:EE_|MN0PR12MB6031:EE_ X-MS-Office365-Filtering-Correlation-Id: 8db6145c-ae75-4e2e-8c91-08deaa9e9b41 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LUeI3dNZApWS6lTqw1D1VT5Wd00E428VKhvgcQMaC440uu1ClqhfiusAsu4J3Ks39qkHzwXiHIfiI8CXRAcTZA/LABVRa1SU5sB3L3u5Y/5ZdugsdM4gZZSCY//J57T+F9fQ6gWKo/Yy8ze9nDkmRhdKBR2vRvdr40e7USB+QW2e6MZDVZKmarqFnoisRuFIZqHzeMJrubnxzrr0xL+wkEDDsLHzZEDY+Q7TyOeHPjCKLk+rux9poaM757D14xUsNXhbClP5HtCQ43U+6Oe+UA3pBJ+UfMamKCll6Dv9qy/PbdNcsaEZxXF42ICAJurq+yOQ+SjVtttSAI61px3rs6TOg0jOLOapAqyC+90eskCBDB/4lKnJS1ccrOZr3R8A4VTSa54R1pEkgVbKNyyBHk06cZ27x60cc/j9tU/LnP+vS1G22Kj+BFqu05bNzQSv X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 12:05:31.8854 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8db6145c-ae75-4e2e-8c91-08deaa9e9b41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6031 X-purgate-ID: tlsNG-d25034/1777982739-F600DCF5-1DA359C9/0/0 X-purgate-type: clean X-purgate-size: 6652 On 20-Apr-26 16:22, Luca Fancellu wrote: > From: Harry Ramsey > > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v4: > - no changes > v3: > - Check for alloc_xenheap_pages allocation > - Clear additional page allocated for ARM64 > - Add check for INVALID_VCPU_ID > - Remove unnecessary function generate_vsctlr > - Code formatting fixes > --- > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu/p2m.h | 12 +++++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/mpu/p2m.c | 78 ++++++++++++++++++++++++++-- > 5 files changed, 96 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 2cf0f8cbacae..d565230f84ee 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -11,6 +11,8 @@ > */ > #define MPU_REGION_RES0 0x0 > > +#define VSCTLR_VMID_SHIFT 16 > + > /* Hypervisor Protection Region Base Address Register */ > typedef union { > struct { > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index 4f694190a8a3..8b86a03fee44 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -7,6 +7,8 @@ > > #define MPU_REGION_RES0 (0xFFFFULL << 48) > > +#define VSCTLR_VMID_SHIFT 48 > + > /* Protection Region Base Address Register */ > typedef union { > struct __packed { > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a1d..39fc0c944916 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -3,8 +3,20 @@ > #ifndef __ARM_MPU_P2M_H__ > #define __ARM_MPU_P2M_H__ > > +#include > +#include > +#include > + > struct p2m_domain; > > +/* > + * The architecture allows at most 255 EL2 MPU memory regions. The size of the > + * MPU structure entry (pr_t) is 32 Bytes on AArch64 (requiring two 4KB pages) > + * and 16 bytes on AArch32 (requiring one 4KB page). This comment may go stale if we add something to pr_t. I don't think it's super useful. > + */ > +#define P2M_ROOT_PAGES DIV_ROUND_UP(255 * sizeof(pr_t), PAGE_SIZE) Please don't opencode max number of regions. Instead use MAX_MPU_REGION_NR > +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) > + > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9ebbd..ed1b6dd40f40 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c > index f7fb58ab6aa8..ec8f630acd90 100644 > --- a/xen/arch/arm/mpu/p2m.c > +++ b/xen/arch/arm/mpu/p2m.c > @@ -28,10 +28,69 @@ void p2m_dump_info(struct domain *d) > BUG_ON("unimplemented"); > } > > +static int p2m_alloc_table(struct domain *d) > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + void *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); > + > + if ( !table ) > + { > + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", > + d); > + return -ENOMEM; > + } > + > + p2m->root = virt_to_page(table); > + > + for (int i = 0; i < P2M_ROOT_PAGES; i++) unsigned int and we usually declare it at the top Also, missing spaces around brackets > + clear_page(page_to_virt(p2m->root + i)); Instead of the conversion, you should use table here which is already a VA. > + > + return 0; > +} > + > int p2m_init(struct domain *d) > { > - BUG_ON("unimplemented"); > - return -EINVAL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + int rc = 0; > + unsigned int cpu; > + > + rwlock_init(&p2m->lock); > + > + p2m->vmid = INVALID_VMID; > + p2m->max_mapped_gfn = _gfn(0); > + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); > + > + p2m->default_access = p2m_access_rwx; > + /* mem_access is NOT supported in MPU system. */ > + p2m->mem_access_enabled = false; > + > + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ > + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); > + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); > + > + for_each_possible_cpu(cpu) > + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; > + > + /* > + * "Trivial" initialization is now complete. Set the backpointer so that > + * p2m_teardown() and related functions know to do something. > + */ > + p2m->domain = d; > + > + rc = p2m_alloc_vmid(d); > + if ( rc ) > + return rc; > + > + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); > + > + rc = p2m_alloc_table(d); > + if ( rc ) > + { > + p2m_free_vmid(d); You should not free it because you risk double free given that it is also freed in p2m_final_teardown. That's why on MMU we don't do it. > + return rc; > + } > + > + return 0; > } > > void p2m_save_state(struct vcpu *p) > @@ -46,7 +105,20 @@ void p2m_restore_state(struct vcpu *n) > > void p2m_final_teardown(struct domain *d) > { > - BUG_ON("unimplemented"); > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + > + /* p2m not actually initialized */ > + if ( !p2m->domain ) > + return; > + > + if ( p2m->root ) > + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); > + > + p2m->root = NULL; > + > + p2m_free_vmid(d); > + > + p2m->domain = NULL; > } > > bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 12:16:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 12:16:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300625.1575158 (Exim 4.92) (envelope-from ) id 1wKEh1-0004zy-KX; Tue, 05 May 2026 12:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300625.1575158; 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ARM > >>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>>>>>> defines it). > >>>>>>>> > >>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>>>>>> to 0 when the arch does not define it. This makes the generic macros > >>>>>>>> correct for all architectures, even though they are only used on x86 > >>>>>>>> today. > >>>>>>> > >>>>>>> Hm, I assume this offset was added because the original mask PDX > >>>>>>> compression won't (usually) compress the gap between 0 and the start > >>>>>>> of RAM. However the newish offset PDX compression should be able to > >>>>>>> compress from 0 to start of RAM, and hence you don't need to apply > >>>>>>> an extra PDX offset there? > >>>>>>> > >>>>>>> If that's indeed the case it might be better to integrate > >>>>>>> frametable_base_pdx into the mask compression algorithm itself, so > >>>>>>> that on some arches it's a mask plus a decrease. > >>>>>> The offset is needed regardless of whether compression is used. With > >>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >>>>>> 0x80000000, the first valid PDX is 0x80000. > >>>>> > >>>>> OK, so you are doing some (kind of) address space compression (removing > >>>>> the leading empty range to the first RAM region) even when PDX is > >>>>> disabled. > >>>>> > >>>>>> Without frametable_base_pdx > >>>>>> the frame table would have to be indexed from 0, wasting > >>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > >>>>> > >>>>> But you don't really "waste" memory, just address space? Oh, maybe > >>>>> not on ARM as it doesn't use pdx_group_valid? And so you > >>>>> unconditionally populate the frametable from PDX 0 to max PDX. > >>>> With pdx_group_valid (which this series adds) we wouldn't waste > >>>> physical memory for the leading gap. But we'd still waste virtual address > >>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > >>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB > >>>> the virtual offset before the first usable entry would be ~70GB — more than the > >>>> entire 32GB FRAMETABLE_SIZE on ARM64. > >>> > >>> Yet still - this is exactly one of the situations offset compression means > >>> to cover. I'm entirely with Roger as to it being undesirable to build a > >>> special case variant of "offset compression" into "no compression". > >> In this case, if you don't want to generalize the macros, how should we proceed > >> on Arm if we still need the offset to cover the PDX_NONE variant that we also > >> use? In v1 I just created a local override but Julien wanted to generalize the > >> macros instead. The discussion about switching the default on Arm from mask to > >> offset that is not even selectable on Arm needs to wait for the new release cycle. > > > > I'm not convinced of that. If you need offset by default, why not enable it by > > default (right now, and potentially even as a backport if there's any bug that > > is being fixed)? > As said before, we also need offset when using just PDX grouping and no compression. But you don't really mean no compression? The offset itself that you subtract is a transformation, and hence a compression, as the physical and PDX address spaces are no longer identity mapped? Maybe those systems should have never worked with PDX_NONE, and instead required a PDX compression in place (one that would remove the offset from 0 to the first RAM range). It's an incomplete conversion IMO, as ARM applies it to the frametable, but not the direct map. Thanks, Roger. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------cU4QwkJWUVquCuDHH88AiecH" X-purgate-ID: tlsNG-42698a/1777983828-7D969F3B-D2434FEF/0/0 X-purgate-type: clean X-purgate-size: 6732 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------cU4QwkJWUVquCuDHH88AiecH Content-Type: multipart/mixed; boundary="------------e3rh6cYQup5xsVq0HPerxhtd"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig_=28The_Capable_Hub=29?= , Stefano Stabellini Cc: Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Markus Schneider-Pargmann Message-ID: <23f5e833-b5af-40f2-8c1c-8ba56c715825@suse.com> Subject: Re: [PATCH] xen/platform-pci: Simplify initialization of pci_device_id array References: <20260505102909.2380470-2-u.kleine-koenig@baylibre.com> In-Reply-To: <20260505102909.2380470-2-u.kleine-koenig@baylibre.com> --------------e3rh6cYQup5xsVq0HPerxhtd Content-Type: multipart/mixed; boundary="------------s1q5pXTF5M78e6LkpixJ1h0a" --------------s1q5pXTF5M78e6LkpixJ1h0a Content-Type: text/plain; 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Tue, 05 May 2026 06:00:45 -0700 (PDT) Message-ID: <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> Date: Tue, 5 May 2026 15:00:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777986045-BDE6BFF4-21D89D02/0/0 X-purgate-type: clean X-purgate-size: 4263 On 05.05.2026 13:46, Orzel, Michal wrote: > On 05-May-26 12:49, Jan Beulich wrote: >> On 05.05.2026 12:46, Orzel, Michal wrote: >>> On 05-May-26 12:40, Jan Beulich wrote: >>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>> defines it). >>>>>>>>> >>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>> today. >>>>>>>> >>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>> an extra PDX offset there? >>>>>>>> >>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>> >>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>> disabled. >>>>>> >>>>>>> Without frametable_base_pdx >>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>> >>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>> >>>> Yet still - this is exactly one of the situations offset compression means >>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>> special case variant of "offset compression" into "no compression". >>> In this case, if you don't want to generalize the macros, how should we proceed >>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>> use? In v1 I just created a local override but Julien wanted to generalize the >>> macros instead. The discussion about switching the default on Arm from mask to >>> offset that is not even selectable on Arm needs to wait for the new release cycle. >> >> I'm not convinced of that. If you need offset by default, why not enable it by >> default (right now, and potentially even as a backport if there's any bug that >> is being fixed)? > As said before, we also need offset when using just PDX grouping and no compression. And as also said before, this really is poor man's offset compression then. That may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit that offset to just the "no compression" case. It's redundant with offset compression, and it may be (possible to make) redundant with mask compression. If the latter can't be arranged for, an offset may want introducing there as well. But it shouldn't exist independent of the compression scheme used. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 13:05:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 13:05:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300666.1575185 (Exim 4.92) (envelope-from ) id 1wKFT9-0004p7-Og; Tue, 05 May 2026 13:05:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300666.1575185; Tue, 05 May 2026 13:05:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKFT9-0004p0-Lp; Tue, 05 May 2026 13:05:47 +0000 Received: by outflank-mailman (input) for mailman id 1300666; Tue, 05 May 2026 13:05:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKFT8-0004ou-Rb for xen-devel@lists.xenproject.org; Tue, 05 May 2026 13:05:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKFT7-0067Fn-QL for xen-devel@lists.xenproject.org; Tue, 05 May 2026 15:05:45 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9eb27-e002-0a2a0a5209dd-0a2a4503e2ba-6 for ; Tue, 05 May 2026 15:05:45 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9eb29-672d-0a2a45030019-d1558036e476-3 for ; Tue, 05 May 2026 15:05:45 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488ad135063so49646005e9.0 for ; Tue, 05 May 2026 06:05:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260430125103.401811-2-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777986345-A3161938-C8F2CBB9/0/0 X-purgate-type: clean X-purgate-size: 974 On 30.04.2026 14:51, Michal Orzel wrote: > --- a/xen/include/xen/pdx.h > +++ b/xen/include/xen/pdx.h > @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); > */ > bool __mfn_valid(unsigned long mfn); > > -#define page_to_pdx(pg) ((pg) - frame_table) > -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) > +#define page_to_pdx(pg) \ > + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) > +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) If you alter these, ... > #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) > #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) ... how come these can remain unaltered? Maybe you have some special arrangements in Arm code, but surely in generic code transformations done should be uniform. After all ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); (and alike) ought to be universally true for valid inputs. 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Tue, 05 May 2026 06:07:40 -0700 (PDT) Date: Tue, 5 May 2026 15:07:36 +0200 From: Alexey G To: Roger Pau =?UTF-8?B?TW9ubsOp?= Cc: Thierry Escande , xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests Message-ID: <20260505150736.5419a55f@LinuxLaptop> In-Reply-To: References: <20260313163455.790692-1-thierry.escande@vates.tech> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1777986461-4415A8B7-F19A85BB/0/0 X-purgate-type: clean X-purgate-size: 3799 On Tue, 28 Apr 2026 09:48:41 +0200 Roger Pau Monn=C3=A9 wrote: >On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> This series introduces initial Q35 chipset support for HVM guests, >> based on the patchset at [1] by Alexey Gerasimenko. >>=20 >> Basic support means that this patchset allows to start an HVM guest >> that emulates a Q35 chipset via Qemu and implements access to PCIe >> extended configuration space for such devices emulated by Qemu. >>=20 >> Support for PCIe device passthrough is not implemented yet. This is >> planned but implies modifications in the hypervisor and the >> firmwares, mainly for the support of multiple PCI buses. > >Why do you need multi bus support to expose PCIe capabilities? I'm >not seeing the relation between those two. You could still expose a >single bus on the MCFG table. The problem with the PCIe bus is that it's very "topological" by design - and it always wants a valid hierarchy. Each PCIe device manifests itself (via its PCIe Capabilities entry) as either a chipset-integrated device or a regular PCIe endpoint device, which is the most common case. There are more types IIRC but these are what we deal with mostly - both for PT devices and QEMU-emulated ones. But, being a PCIe endpoint means that the device must have some parent device. It can be located below a PCIe switch or, in the simplest and the most common case, below a PCIe Root Port device. In both cases the 'parent' is a PCI-PCI bridge technically, with the PCIe endpoint device being located on its secondary bus. As the Q35 patch series was done with mostly PCIe device passthrough in mind, this brings the main complication - in order to properly place a passed through device on the PCIe bus, we need an emulated/real/hybrid Root Port device. A much lengthier description is in this patch message: https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01197.html To summarize, we need this 'valid PCIe topology' nonsense just to make Windows kernel (pci.sys driver specifically) not to discard our PT device due to checking PCIe bus hierarchy above it. This limitation was found/confirmed via debugging - luckily, pci.sys had symbols and the main bad function which was failing had a very speaking name - something like pcieCheckTopology or similar. Emulating the "chipset-integrated device" in PT device's PCIe Capabilities was a simple hack which allowed to bypass the requirement to have a valid PCIe hierarchy with multiple buses. But the proper future direction is implementing emulation of Root Ports or PCIe switches I guess. >> The PCIe MMCONFIG area is configured by hvmloader and its base >> address and size are set in Xen using a new pair of hypercalls >> HVMOP_get|set_ecam_space. > >I guess I will see how that looks like in the series, but the setting >of the ECAM region would better be done by the toolstack. Setting it >in hvmloader is possibly not the best placement, because it doesn't >run for PVH guests (and we will want ECAM support for PVH at some >point), and there's also a vague plan/intention to get rid of >hvmloader even for HVM guests eventually. This is the situation where the difference between HVM and PVH might be very problematic I'm afraid. HVM guests assume full freedom over the IO/MMIO resources setup inside their sandboxed environment. It's not just Windows reallocating PCI BARs to its liking, but also spans to the emulated chipset's resources. In worst case we could have MMCONFIG reinitialization implemented even in Intel's Q35 drivers installed inside an HVM guest. Fortunately, this is not what I remember was the case, but in theory Q35 driver could have done things like this. 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Tue, 05 May 2026 06:29:17 -0700 (PDT) Date: Tue, 5 May 2026 15:29:12 +0200 From: Alexey G To: Jan Beulich , Juergen Gross Cc: Roger Pau =?UTF-8?B?TW9ubsOp?= , xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Thierry Escande Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests Message-ID: <20260505152912.6b73c551@LinuxLaptop> In-Reply-To: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777987758-C3171DB1-9830AEBB/0/0 X-purgate-type: clean X-purgate-size: 891 On Mon, 4 May 2026 12:45:23 +0200 Jan Beulich wrote: >> Why do you need multi bus support to expose PCIe capabilities? I'm >> not seeing the relation between those two. You could still expose a >> single bus on the MCFG table. > >Can a valid PCIe topology be expressed with just bus 0? If an endpoint >to be handed to a guest isn't root complex integrated, would it be >valid to make it appear so by putting it on bus 0? No, unfortunately, it will fail at least under Windows' pci.sys driver. Unless they changed something in the past years. To place an endpoint device to bus 0, we need to emulate that it's a chipset-integrated device by trapping its PCIe Capabilities reads. I found an old pci.sys + .pdb symbols which I used for debugging back in 2017 and, if I remember correctly, the failing function was `ExpressValidateFabricTopology()`. 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Tue, 05 May 2026 06:58:21 -0700 (PDT) Date: Tue, 5 May 2026 15:58:16 +0200 From: Alexey G To: Roger Pau =?UTF-8?B?TW9ubsOp?= Cc: Thierry Escande , xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD Subject: Re: [PATCH 04/17] hvmloader: add ACPI enabling for Q35 Message-ID: <20260505155816.0f8ad76d@LinuxLaptop> In-Reply-To: References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-5-thierry.escande@vates.tech> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1777989501-B526DFF4-2B8134B1/0/0 X-purgate-type: clean X-purgate-size: 2336 On Tue, 28 Apr 2026 12:48:23 +0200 Roger Pau Monn=C3=A9 wrote: >On Fri, Mar 13, 2026 at 04:35:05PM +0000, Thierry Escande wrote: >> In order to turn on ACPI for OS, we need to write a chipset-specific >> value to SMI_CMD register (sort of imitation of the APM->ACPI switch >> on real systems). Modify acpi_enable_sci() function to support both >> i440 and Q35 emulation. >>=20 >> Signed-off-by: Alexey Gerasimenko >> Signed-off-by: Thierry Escande > >Reviewed-by: Roger Pau Monn=C3=A9 > >It's not great to add more stuff into hvmloader when we want to move >out of it, but it's also not helpful to tie the Q35 addition to the >removal of hvmloader. I'm afraid the only option to get rid of hvmloader is to move its responsibilities back into the firmware (SeaBIOS/OVMF). But if I understand it right, the whole idea of introducing hvmloader originally was to delegate Xen-specific parts of HVM guest initialization from firmware to a component managed by Xen itself. So, to some extent hvmloader can be considered as a part of the firmware itself as it does things like PCI BAR allocation etc which are normally done by the guest firmware, but with more knowledge of Xen specifics. I guess this hvmloader/firmware split model was introduced to have more freedom/maintainability/control - I suppose it's much faster and easier to integrate Xen-specific changes to hvmloader directly then to upstream them to SeaBIOS/OVMF codebases. But other than moving hvmloader's responsibilities to the firmware we can't do much I think - HVM guests expect to have full freedom over the emulated platform. Among problems are non-standard (chipset-specific) devices which also need to have assigned resources like MMIO ranges - and Xen doesn't know anything about these devices and their resource requirements (left alone how to configure them), yet they still need to have correct BARs assigned with no conflicts with other PCI devices and to contribute to MMIO hole sizing. This is something which cannot be solved on the toolstack level unless Xen emulates the whole chipset and knows about all emulated chipset devices - we limit ourselves to MMCONFIG now but there are more configurable ranges like this. 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This is > >> planned but implies modifications in the hypervisor and the > >> firmwares, mainly for the support of multiple PCI buses. > > > >Why do you need multi bus support to expose PCIe capabilities? I'm > >not seeing the relation between those two. You could still expose a > >single bus on the MCFG table. > > The problem with the PCIe bus is that it's very "topological" by design > - and it always wants a valid hierarchy. > > Each PCIe device manifests itself (via its PCIe Capabilities entry) > as either a chipset-integrated device or a regular PCIe endpoint > device, which is the most common case. There are more types IIRC but > these are what we deal with mostly - both for PT devices and > QEMU-emulated ones. > > But, being a PCIe endpoint means that the device must have some parent > device. It can be located below a PCIe switch or, in the simplest and > the most common case, below a PCIe Root Port device. > > In both cases the 'parent' is a PCI-PCI bridge technically, with the > PCIe endpoint device being located on its secondary bus. > > As the Q35 patch series was done with mostly PCIe device passthrough in > mind, this brings the main complication - in order to properly place a > passed through device on the PCIe bus, we need an emulated/real/hybrid > Root Port device. > > A much lengthier description is in this patch message: > https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01197.html > > To summarize, we need this 'valid PCIe topology' nonsense just to make > Windows kernel (pci.sys driver specifically) not to discard our PT > device due to checking PCIe bus hierarchy above it. > > This limitation was found/confirmed via debugging - luckily, pci.sys > had symbols and the main bad function which was failing had a very > speaking name - something like pcieCheckTopology or similar. > > Emulating the "chipset-integrated device" in PT device's PCIe > Capabilities was a simple hack which allowed to bypass the requirement > to have a valid PCIe hierarchy with multiple buses. But the proper > future direction is implementing emulation of Root Ports or PCIe > switches I guess. Oh, I see. We discussed this with Jan, it wasn't clear whether it would be a strict requirement or not. We have our answer now, it is a strict requirement for pass-through to Windows guests. > >> The PCIe MMCONFIG area is configured by hvmloader and its base > >> address and size are set in Xen using a new pair of hypercalls > >> HVMOP_get|set_ecam_space. > > > >I guess I will see how that looks like in the series, but the setting > >of the ECAM region would better be done by the toolstack. Setting it > >in hvmloader is possibly not the best placement, because it doesn't > >run for PVH guests (and we will want ECAM support for PVH at some > >point), and there's also a vague plan/intention to get rid of > >hvmloader even for HVM guests eventually. > > This is the situation where the difference between HVM and PVH might be > very problematic I'm afraid. HVM guests assume full freedom over the > IO/MMIO resources setup inside their sandboxed environment. > > It's not just Windows reallocating PCI BARs to its liking, but also > spans to the emulated chipset's resources. In worst case we could have > MMCONFIG reinitialization implemented even in Intel's Q35 drivers > installed inside an HVM guest. Fortunately, this is not what I remember > was the case, but in theory Q35 driver could have done things like this. Indeed. In later patches my recommendation was to trap accesses to the root complex registers that control the position and size of the ECAM region, and forward those to the hypervisor, instead of hvmloader using a side-band hypercall to set the position and size of the ECAM region. I've also discussed this with Jan, alternatively we could trap the registers directly in Xen itself, but the Xen would need to know the domain has an emulated q35, which we might need to do at some point, but we are likely not there yet. Thanks, Roger. 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Modify acpi_enable_sci() function to support both > >> i440 and Q35 emulation. > >> > >> Signed-off-by: Alexey Gerasimenko > >> Signed-off-by: Thierry Escande > > > >Reviewed-by: Roger Pau Monné > > > >It's not great to add more stuff into hvmloader when we want to move > >out of it, but it's also not helpful to tie the Q35 addition to the > >removal of hvmloader. > > I'm afraid the only option to get rid of hvmloader is to move its > responsibilities back into the firmware (SeaBIOS/OVMF). But if I > understand it right, the whole idea of introducing hvmloader originally > was to delegate Xen-specific parts of HVM guest initialization from > firmware to a component managed by Xen itself. Maybe originally? We then ended up having to add all sorts of Xen specific logic into both SeaBIOS and OVMF, so much to OVMF that there's a Xen-specific target/platform in OVMF. > So, to some extent hvmloader can be considered as a part of the firmware > itself as it does things like PCI BAR allocation etc which are normally > done by the guest firmware, but with more knowledge of Xen specifics. > > I guess this hvmloader/firmware split model was introduced to have more > freedom/maintainability/control - I suppose it's much faster and easier > to integrate Xen-specific changes to hvmloader directly then to > upstream them to SeaBIOS/OVMF codebases. Faster to integrate possibly, but then we end up with IMO a lot of duplication between what hvmloader does vs what we could offload to OVMF. > But other than moving hvmloader's responsibilities to the firmware we > can't do much I think - HVM guests expect to have full freedom over the > emulated platform. Among problems are non-standard (chipset-specific) > devices which also need to have assigned resources like MMIO ranges - > and Xen doesn't know anything about these devices and their resource > requirements (left alone how to configure them), yet they still need to > have correct BARs assigned with no conflicts with other PCI devices and > to contribute to MMIO hole sizing. This is something which cannot be > solved on the toolstack level unless Xen emulates the whole chipset and > knows about all emulated chipset devices - we limit ourselves to > MMCONFIG now but there are more configurable ranges like this. I think we do want to move a lot of hvmloader responsibilities into OVMF (maybe SeaBIOS if possible also, albeit that's a legacy firmware by today standards anyway). Whether we would need to partially offload some of what hvmloader does into the toolstack remains to be seen. Chipset initialization would possibly need to be done by OVMF, at which point we might require PVH guests that want to use PCI passthrough to also rely on OVMF instead of direct kernel boot. Anyway, this is quite distant future. Thanks, Roger. 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pr=C Message-ID: <7f209655-a9a4-4174-ad05-825b175fb90c@amd.com> Date: Tue, 5 May 2026 16:38:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= CC: Jan Beulich , , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DA:EE_|DM3PR12MB9389:EE_ X-MS-Office365-Filtering-Correlation-Id: f9c4814e-ac15-49c3-c6f0-08deaab3fff4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|22082099003|18002099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fokmwBWDBAOSmDGC3mpja+Hz2zz7ovHzR8a8ZAiOa2/ylN7UBkj6Y/peJKpFux/kH8MfTkoXt1zdAOkqQYOAXztisW/Ftpeoh4V1CI6Jdxd4wZ2X7BEp0r4p4rFce/KEZ/oG6gVeSwD1KDqPv6CeEShgMX5pl66hBrFRP1k61Jd9J+xyMOvyEmcoo/xJkfb2sG82cEgtNZIeFNWlbDY9lhs8a79etcYb1a4cK1HwUKBAf1fNg2Q7svqFc+OWdLgmtFsJ7j8JQwwH7FWW4lFnBJNhcE3Bxs+cpGp3N7I+op8EsSHa6IzvS/HF3l29d0tKZ2vvU3lPASMj31wNAwnYkhrQZB8aOQq5FxrUw8G7og+rsAjUfkylA6htBVIGWeP9gMKTrvSJ3j1fMeY0kCevXSRzuN4TUjr9OAWiPP7OVZhQrNadDXEIixc44/lbAiGh X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:38:40.0776 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9c4814e-ac15-49c3-c6f0-08deaab3fff4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9389 X-purgate-ID: tlsNG-bad1c0/1777991930-93D7FA53-B14C4AF8/0/0 X-purgate-type: clean X-purgate-size: 5187 On 05-May-26 14:15, Roger Pau Monné wrote: > On Tue, May 05, 2026 at 01:46:51PM +0200, Orzel, Michal wrote: >> >> >> On 05-May-26 12:49, Jan Beulich wrote: >>> On 05.05.2026 12:46, Orzel, Michal wrote: >>>> On 05-May-26 12:40, Jan Beulich wrote: >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>>> defines it). >>>>>>>>>> >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>>> today. >>>>>>>>> >>>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>>> an extra PDX offset there? >>>>>>>>> >>>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>>> >>>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>>> disabled. >>>>>>> >>>>>>>> Without frametable_base_pdx >>>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>>> >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>>> >>>>> Yet still - this is exactly one of the situations offset compression means >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>>> special case variant of "offset compression" into "no compression". >>>> In this case, if you don't want to generalize the macros, how should we proceed >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>>> use? In v1 I just created a local override but Julien wanted to generalize the >>>> macros instead. The discussion about switching the default on Arm from mask to >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. >>> >>> I'm not convinced of that. If you need offset by default, why not enable it by >>> default (right now, and potentially even as a backport if there's any bug that >>> is being fixed)? >> As said before, we also need offset when using just PDX grouping and no compression. > > But you don't really mean no compression? The offset itself that you > subtract is a transformation, and hence a compression, as the physical > and PDX address spaces are no longer identity mapped? Maybe those > systems should have never worked with PDX_NONE, and instead required > a PDX compression in place (one that would remove the offset from 0 to > the first RAM range). I'd argue the PDX <-> PFN mapping itself is still identity here — with PDX_NONE, pfn_to_pdx(x) == x and pdx_to_pfn(x) == x. frametable_base_pdx is not a PDX-space transformation; it's an offset that's only applied when *indexing into the frame table* Conceptually it's closer to "skip the leading hole in the lookup arrays" than to a compression of the PFN/PDX number space. It also sits on top of (and is orthogonal to) whatever PDX scheme is selected. > > It's an incomplete conversion IMO, as ARM applies it to the > frametable, but not the direct map. It is applied to the directmap on arm64 — see directmap_base_pdx. So both the frametable and (on arm64) the directmap apply the equivalent offset. They use separate variables (frametable_base_pdx vs. directmap_base_pdx) but the principle is the same. > > Thanks, Roger. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 14:44:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 14:44:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300760.1575248 (Exim 4.92) (envelope-from ) id 1wKH0r-0004eV-3W; Tue, 05 May 2026 14:44:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300760.1575248; Tue, 05 May 2026 14:44:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH0q-0004eO-WC; Tue, 05 May 2026 14:44:41 +0000 Received: by outflank-mailman (input) for mailman id 1300760; Tue, 05 May 2026 14:44:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH0p-0004eI-Db for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <323e36d0-63e1-4331-87ad-d84f948feef7@amd.com> Date: Tue, 5 May 2026 16:44:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000206:EE_|DM4PR12MB6182:EE_ X-MS-Office365-Filtering-Correlation-Id: 9978e949-f8d3-4a27-822f-08deaab4d01f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|1800799024|82310400026|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iKCQmHXs7g6+nbwYBf9PQfi7lWDnftpnpUyHuznX0xRTSwEW3HdIKhS71DH+tKyYxJcHBF/v0A90DA+nxetx9ZFI/S4ILiXOlR53S2UvnIkc2EkHN9uAL4L4hM4v+ySrKzrRg9nEJPNke/q2vS5Bg1TdpkTBATOTX+9yrO701/2FvQ4b6pAnk0T97XiVRyzCrFpdBBuA1Y6E3YOZqkPUfPTDVRQu9NJ0swfUJyBUVapl6z4kf9vfv63eokoq/QZPXi6Futa2nWbnUdowO0deYJfezeUnnW/tmrn4xxvJVQt8UzIobuuhDvpR59PK1UaD8KuqY2wU2mGC5PWUUmwV3pFLTx7KbRftbnkaICwJLwOVslJp5VCGx7zCrboTdXcyIdw8kqH9iTdxatm3eRbUcn5JvvoiOEabn66W73ZIrQHYsxGkEkUd0xp2iv3stRm7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:44:29.4762 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9978e949-f8d3-4a27-822f-08deaab4d01f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000206.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6182 X-purgate-ID: tlsNG-c201ff/1777992277-E8DA3443-F5CC4783/0/0 X-purgate-type: clean X-purgate-size: 5955 On 05-May-26 15:00, Jan Beulich wrote: > On 05.05.2026 13:46, Orzel, Michal wrote: >> On 05-May-26 12:49, Jan Beulich wrote: >>> On 05.05.2026 12:46, Orzel, Michal wrote: >>>> On 05-May-26 12:40, Jan Beulich wrote: >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>>> defines it). >>>>>>>>>> >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>>> today. >>>>>>>>> >>>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>>> an extra PDX offset there? >>>>>>>>> >>>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>>> >>>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>>> disabled. >>>>>>> >>>>>>>> Without frametable_base_pdx >>>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>>> >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>>> >>>>> Yet still - this is exactly one of the situations offset compression means >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>>> special case variant of "offset compression" into "no compression". >>>> In this case, if you don't want to generalize the macros, how should we proceed >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>>> use? In v1 I just created a local override but Julien wanted to generalize the >>>> macros instead. The discussion about switching the default on Arm from mask to >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. >>> >>> I'm not convinced of that. If you need offset by default, why not enable it by >>> default (right now, and potentially even as a backport if there's any bug that >>> is being fixed)? >> As said before, we also need offset when using just PDX grouping and no compression. > > And as also said before, this really is poor man's offset compression then. That > may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit > that offset to just the "no compression" case. It's redundant with offset > compression, and it may be (possible to make) redundant with mask compression. > If the latter can't be arranged for, an offset may want introducing there as well. > But it shouldn't exist independent of the compression scheme used. Having a single per-scheme mechanism rather than an extra independent offset is cleaner. But I don't think we can limit frametable_base_pdx to PDX_NONE today: - Mask compression doesn't fold a leading [0, first_ram_pdx) zero prefix into anything. So the PDX of the first RAM frame stays at first_ram_pdx, and without the offset the frame table virtual extent is max_pdx * sizeof(page_info) rather than (max_pdx - first_ram_pdx) * sizeof(page_info). For systems with a high RAM base (the 5TB example I gave earlier needs ~70GB just to skip the leading hole, vs. 32GB FRAMETABLE_SIZE on arm64) the (max_pdx > FRAMETABLE_NR) check then fails and we panic before mapping anything. pdx_group_valid (which patch 2/2 adds) avoids backing those leading groups with physical memory, but it doesn't shrink the virtual extent — only the offset does. - With offset compression you're right that the leading hole could be absorbed into the lookup table, making the extra offset redundant. But Arm doesn't currently select offset compression, it's non-selectable, untested and switching the default is a separate (and bigger) discussion that I don't think should block this fix given the state of the release. So as it stands, the offset is needed on Arm for both PDX_NONE and PDX_MASK_COMPRESSION. Folding it into the mask scheme (and dropping it for offset compression) is a reasonable cleanup, but it's a refactor of the compression layer itself, not something I'd like to mix into this series. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 14:53:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 14:53:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300777.1575257 (Exim 4.92) (envelope-from ) id 1wKH8w-0006WU-VV; Tue, 05 May 2026 14:53:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300777.1575257; Tue, 05 May 2026 14:53:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH8w-0006WN-SX; Tue, 05 May 2026 14:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1300777; Tue, 05 May 2026 14:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH8v-0006WH-V0 for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Tue, 5 May 2026 16:52:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie , References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|CH3PR12MB8546:EE_ X-MS-Office365-Filtering-Correlation-Id: dd6fbcaf-648b-45a3-66e3-08deaab5fa9a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|82310400026|7416014|1800799024|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XJM9fQ1EduezxB2GcU1Ij8C06n7nQUYoAzU+C9/9U9hymyMxnoTInri4eRVck64AA2KonXGSAbi9qbd0/hGtY3NmbYfOf1bh5szKn8YiE90cA0j+iCYTqrMJtGHHekokcus1Y4d7pSFSQPIUU3zMIZYEJ1nPnBojPFaKGicH4Czl+ygIyPAMDfJmuw/kUxdEWBa3D3RmVmzWMe40CPBz6IH1vU6wF0PFFUQ+wjbJdY0MgfsWINkGcgBBO1Sb32+4UicNGTNrrNaRaPWWmHViALCNK7qUNRK6Bs9qlXHRHOTZ06GW1H3bs+idUvIpWy0imN6T+3383biOLBJMIHoJZcMO1F6wEZlW4KvJ7fa9oIg/75nbmVEZuMdu3DIb53y8vnXn6z2/BO2i7TYrp81NQIDcnzmZ/Rk7V7NyHzZm+pVXhOiAaH1ImHjL8n+7mXfZ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:52:50.2973 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd6fbcaf-648b-45a3-66e3-08deaab5fa9a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8546 X-purgate-ID: tlsNG-4011c0/1777992780-465748B7-D5448F01/0/0 X-purgate-type: clean X-purgate-size: 1647 On 05-May-26 15:05, Jan Beulich wrote: > On 30.04.2026 14:51, Michal Orzel wrote: >> --- a/xen/include/xen/pdx.h >> +++ b/xen/include/xen/pdx.h >> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >> */ >> bool __mfn_valid(unsigned long mfn); >> >> -#define page_to_pdx(pg) ((pg) - frame_table) >> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >> +#define page_to_pdx(pg) \ >> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) > > If you alter these, ... > >> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) > > ... how come these can remain unaltered? Maybe you have some special > arrangements in Arm code, but surely in generic code transformations done > should be uniform. After all > > ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); > > (and alike) ought to be universally true for valid inputs. The invariant holds. There are two transformations on different boundaries: - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / pdx_to_mfn. - PDX <-> frame-table index: +/- frametable_base_pdx — lives in page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). On x86 the second is the identity (frametable_base_pdx == 0), so it's invisible. On Arm it isn't, so it has to appear in the macros that cross that boundary. Pushing it into mfn_to_pdx as well would mix the two boundaries and double-apply on Arm (page_to_mfn already adds it). ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 15:20:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:20:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300801.1575266 (Exim 4.92) (envelope-from ) id 1wKHZT-0002i3-1K; Tue, 05 May 2026 15:20:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300801.1575266; Tue, 05 May 2026 15:20:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKHZS-0002hw-Uq; Tue, 05 May 2026 15:20:26 +0000 Received: by outflank-mailman (input) for mailman id 1300801; Tue, 05 May 2026 15:20:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp 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=?utf-8?B?eXFqTlk0YlMxbE9KVXIyazV1cmw2MkxrcjZEK3RMK3pMcDdMUlVXZz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 84ba5677-2f7a-48d9-8ae2-08deaab9d095 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 15:20:18.1465 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: n14dwXWYmrJI5+1x3pBW25kf7ThXh0OdPB4V1jvt3zyrTMDvXWVJgE4M6EvFPIPSMhnTk7bRVcRCmiKMmi8n+g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB7076 X-purgate-ID: tlsNG-ebf023/1777994424-43D6C3FF-122A9B51/0/0 X-purgate-type: clean X-purgate-size: 6418 On Tue, May 05, 2026 at 04:44:16PM +0200, Orzel, Michal wrote: > > > On 05-May-26 15:00, Jan Beulich wrote: > > On 05.05.2026 13:46, Orzel, Michal wrote: > >> On 05-May-26 12:49, Jan Beulich wrote: > >>> On 05.05.2026 12:46, Orzel, Michal wrote: > >>>> On 05-May-26 12:40, Jan Beulich wrote: > >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: > >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: > >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: > >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: > >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: > >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume > >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM > >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>>>>>>>> defines it). > >>>>>>>>>> > >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros > >>>>>>>>>> correct for all architectures, even though they are only used on x86 > >>>>>>>>>> today. > >>>>>>>>> > >>>>>>>>> Hm, I assume this offset was added because the original mask PDX > >>>>>>>>> compression won't (usually) compress the gap between 0 and the start > >>>>>>>>> of RAM. However the newish offset PDX compression should be able to > >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply > >>>>>>>>> an extra PDX offset there? > >>>>>>>>> > >>>>>>>>> If that's indeed the case it might be better to integrate > >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so > >>>>>>>>> that on some arches it's a mask plus a decrease. > >>>>>>>> The offset is needed regardless of whether compression is used. With > >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >>>>>>>> 0x80000000, the first valid PDX is 0x80000. > >>>>>>> > >>>>>>> OK, so you are doing some (kind of) address space compression (removing > >>>>>>> the leading empty range to the first RAM region) even when PDX is > >>>>>>> disabled. > >>>>>>> > >>>>>>>> Without frametable_base_pdx > >>>>>>>> the frame table would have to be indexed from 0, wasting > >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > >>>>>>> > >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe > >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you > >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. > >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste > >>>>>> physical memory for the leading gap. But we'd still waste virtual address > >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB > >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the > >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. > >>>>> > >>>>> Yet still - this is exactly one of the situations offset compression means > >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a > >>>>> special case variant of "offset compression" into "no compression". > >>>> In this case, if you don't want to generalize the macros, how should we proceed > >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also > >>>> use? In v1 I just created a local override but Julien wanted to generalize the > >>>> macros instead. The discussion about switching the default on Arm from mask to > >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. > >>> > >>> I'm not convinced of that. If you need offset by default, why not enable it by > >>> default (right now, and potentially even as a backport if there's any bug that > >>> is being fixed)? > >> As said before, we also need offset when using just PDX grouping and no compression. > > > > And as also said before, this really is poor man's offset compression then. That > > may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit > > that offset to just the "no compression" case. It's redundant with offset > > compression, and it may be (possible to make) redundant with mask compression. > > If the latter can't be arranged for, an offset may want introducing there as well. > > But it shouldn't exist independent of the compression scheme used. > Having a single per-scheme mechanism rather than an extra independent offset is > cleaner. But I don't think we can limit frametable_base_pdx to PDX_NONE today: > > - Mask compression doesn't fold a leading [0, first_ram_pdx) zero > prefix into anything. So the PDX of > the first RAM frame stays at first_ram_pdx, and without the offset > the frame table virtual extent is max_pdx * sizeof(page_info) > rather than (max_pdx - first_ram_pdx) * sizeof(page_info). > > For systems with a high RAM base (the 5TB example I gave earlier > needs ~70GB just to skip the leading hole, vs. 32GB FRAMETABLE_SIZE > on arm64) the (max_pdx > FRAMETABLE_NR) check then fails and we > panic before mapping anything. pdx_group_valid (which patch 2/2 > adds) avoids backing those leading groups with physical memory, but > it doesn't shrink the virtual extent — only the offset does. > > - With offset compression you're right that the leading hole could be > absorbed into the lookup table, making the extra offset redundant. > But Arm doesn't currently select offset compression, it's non-selectable, > untested and switching > the default is a separate (and bigger) discussion that I don't think > should block this fix given the state of the release. > > So as it stands, the offset is needed on Arm for both PDX_NONE and > PDX_MASK_COMPRESSION. Folding it into the mask scheme (and dropping it > for offset compression) is a reasonable cleanup, but it's a refactor > of the compression layer itself, not something I'd like to mix into > this series. Right, then it's likely best to avoid generalizing frametable_base_pdx and instead focus on integrating it with the PDX mask compression algorithm at a possibly later time (after release)? Thanks, Roger. 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Tue, 05 May 2026 08:23:41 -0700 (PDT) MIME-Version: 1.0 References: <038337ec0e3f1474c6cc6a92090e28c6972e4dc6.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 18:23:28 +0300 X-Gm-Features: AVHnY4Lp8PLNiPSH_rXiXH9DXGfRY9OSOlaX6QNN69iV-sQmD-KYv1xHa12HpPs Message-ID: Subject: Re: [PATCH v8 09/13] arm/smmu-v3: add suspend/resume handlers To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1777994622-53B7DD75-BCDF7250/0/0 X-purgate-type: clean X-purgate-size: 9432 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 5:03=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passth= rough/arm/smmu-v3.c > > index bf153227db..7607ffc9ca 100644 > > --- a/xen/drivers/passthrough/arm/smmu-v3.c > > +++ b/xen/drivers/passthrough/arm/smmu-v3.c > > @@ -1814,8 +1814,7 @@ static int arm_smmu_write_reg_sync(struct arm_smm= u_device *smmu, u32 val, > > } > > > > /* GBPA is "special" */ > > -static int __init arm_smmu_update_gbpa(struct arm_smmu_device *smmu, > > - u32 set, u32 clr) > > +static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set,= u32 clr) > > { > > int ret; > > u32 reg, __iomem *gbpa =3D smmu->base + ARM_SMMU_GBPA; > > @@ -1995,10 +1994,29 @@ err_free_evtq_irq: > > return ret; > > } > > > > +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) > > +{ > > + int ret; > > + u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > + > > + if ( smmu->features & ARM_SMMU_FEAT_PRI ) > > + irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > + > > + /* Enable interrupt generation on the SMMU */ > > + ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > + if ( ret ) > > + { > > + dev_warn(smmu->dev, "failed to enable irqs\n"); > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) > > { > > int ret, irq; > > - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > > > /* Disable IRQs first */ > > ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, > > @@ -2028,22 +2046,7 @@ static int __init arm_smmu_setup_irqs(struct arm= _smmu_device *smmu) > > } > > } > > > > - if (smmu->features & ARM_SMMU_FEAT_PRI) > > - irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > - > > - /* Enable interrupt generation on the SMMU */ > > - ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > - if (ret) { > > - dev_warn(smmu->dev, "failed to enable irqs\n"); > > - goto err_free_irqs; > > - } > > - > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_disable(struct arm_smmu_device *smmu) > > @@ -2057,7 +2060,7 @@ static int arm_smmu_device_disable(struct arm_smm= u_device *smmu) > > return ret; > > } > > > > -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) > > +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > > { > > int ret; > > u32 reg, enables; > > @@ -2163,17 +2166,9 @@ static int __init arm_smmu_device_reset(struct a= rm_smmu_device *smmu) > > } > > } > > > > - ret =3D arm_smmu_setup_irqs(smmu); > > - if (ret) { > > - dev_err(smmu->dev, "failed to setup irqs\n"); > > We are moving this one to the probe and .. > > > + ret =3D arm_smmu_enable_irqs(smmu); > > + if ( ret ) > > changing with this one, but arm_smmu_setup_irqs() also calls arm_smmu_set= up_unique_irqs() which > calls arm_smmu_setup_msis(), are we sure that on resume we will get the s= ame state? This follows the split introduced in the Linux arm-smmu-v3 runtime/system s= leep series: https://lore.kernel.org/linux-iommu/20260414194702.1229094-1-praan@google.c= om/ The intent is to keep IRQ handler registration as one-time probe state, whi= le reset/resume only restores the SMMU hardware state and re-enables interrupt generation. You are right that the MSI case needs extra care. In the Linux series this = is handled by arm_smmu_resume_msis(), which restores the SMMU-side MSI configuration. I did not port that part in this patch because Xen SMMUv3 MS= I support is currently documented as unsupported and is not part of the supported/tested path, so this patch only covers the wired IRQ path used by= Xen today. If Xen SMMUv3 MSI support becomes usable in the future, the resume path wil= l need an equivalent MSI restore step before IRQ_CTRL is re-enabled. I will add a code comment and update the commit message to make this scope explicit. I also noticed that I accidentally dropped the reference to Pranj= al's Linux series while reworking the patch; I will restore the Link/attribution= in the next version. > > > return ret; > > - } > > - > > - /* Initialize tasklets for threaded IRQs*/ > > - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > - smmu); > > > > /* Enable the SMMU interface, or ensure bypass */ > > if (disable_bypass) { > > @@ -2181,20 +2176,16 @@ static int __init arm_smmu_device_reset(struct = arm_smmu_device *smmu) > > } else { > > ret =3D arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); > > if (ret) > > - goto err_free_irqs; > > + return ret; > > } > > ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, > > ARM_SMMU_CR0ACK); > > if (ret) { > > dev_err(smmu->dev, "failed to enable SMMU interface\n"); > > - goto err_free_irqs; > > + return ret; > > } > > > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > > @@ -2558,10 +2549,23 @@ static int __init arm_smmu_device_probe(struct = platform_device *pdev) > > if (ret) > > goto out_free; > > > > + ret =3D arm_smmu_setup_irqs(smmu); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "failed to setup irqs\n"); > > + goto out_free; > > + } > > + > > + /* Initialize tasklets for threaded IRQs*/ > > + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > + smmu); > > + > > /* Reset the device */ > > ret =3D arm_smmu_device_reset(smmu); > > if (ret) > > - goto out_free; > > + goto out_free_irqs; > > > > /* > > * Keep a list of all probed devices. This will be used to query > > @@ -2575,6 +2579,8 @@ static int __init arm_smmu_device_probe(struct pl= atform_device *pdev) > > > > return 0; > > > > +out_free_irqs: > > + arm_smmu_free_irqs(smmu); > > > > out_free: > > arm_smmu_free_structures(smmu); > > @@ -2855,6 +2861,96 @@ static void arm_smmu_iommu_xen_domain_teardown(s= truct domain *d) > > xfree(xen_domain); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device= *smmu) > > +{ > > + int ret =3D arm_smmu_device_reset(smmu); > > + > > + if ( ret ) > > + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", > > + ret); > > +} > > + > > +static int arm_smmu_suspend(void) > > +{ > > + struct arm_smmu_device *smmu; > > + int ret =3D 0; > > + > > + list_for_each_entry(smmu, &arm_smmu_devices, devices) > > + { > > + bool wfe =3D !!(smmu->features & ARM_SMMU_FEAT_SEV); > > + > > + /* Abort all transactions before disable to avoid spurious bypass */ > > + ret =3D arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); > > + if ( ret ) > > + goto fail; > > + > > + /* Disable the SMMU via CR0.EN and all queues except CMDQ */ > > + ret =3D arm_smmu_write_reg_sync(smmu, CR0_CMDQEN, ARM_SMMU_CR0, > > + ARM_SMMU_CR0ACK); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "Timed-out while disabling smmu\n"); > > + goto fail; > > + } > > + > > + /* > > + * At this point the SMMU is completely disabled and won't access > > + * any translation/config structures, even speculative accesses > > + * aren't performed as per the IHI0070 spec (section 6.3.9.6). > > + */ > > + > > + /* Wait for the CMDQs to be drained to flush any pending commands */ > > + ret =3D queue_poll_cons(&smmu->cmdq.q, true, wfe); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "Draining queues timed-out\n"); > > + goto fail; > > + } > > polling the queue doesn=E2=80=99t give you the assurance that all prior c= ommands are complete, > I would use arm_smmu_cmdq_issue_sync for that instead of the above. > > ret =3D arm_smmu_cmdq_issue_sync(smmu); > if ( ret ) > goto fail; Yes, I agree. Polling CONS only shows that the SMMU has consumed the CMDQ entries; it doe= s not provide the completion semantics we want here. I will replace the direc= t queue_poll_cons() in the suspend path with arm_smmu_cmdq_issue_sync(), whil= e CMDQ is still enabled, and update the comment/commit message accordingly. Best regards, Mykola > > > + > > + /* Disable everything */ > > + ret =3D arm_smmu_device_disable(smmu); > > + if ( ret ) > > + goto fail; > > + > > + dev_dbg(smmu->dev, "Suspended smmu\n"); > > + } > > + > > + return 0; > > + > > + fail: > > + /* Reset the device that failed as well as any already-suspended ones= . */ > > + arm_smmu_reset_for_suspend_rollback(smmu); > > + > > + list_for_each_entry_continue_reverse(smmu, &arm_smmu_devices, devices= ) > > + arm_smmu_reset_for_suspend_rollback(smmu); > > + > > + return ret; > > +} > > + > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Tue May 05 15:27:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:27:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300821.1575284 (Exim 4.92) (envelope-from ) id 1wKHgO-0003zv-0q; Tue, 05 May 2026 15:27:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300821.1575284; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260423190459.93299-1-roger.pau@citrix.com> Content-Type: text/plain; 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Introduce two Gitlab macOS build jobs that > reproduce the ones present on CirrusCI. > > According to the "Community programs" Gitlab documentation [0] we get > 50,000 compute minutes per month. The arm64 job takes ~1m 15s, and the > x86_64 one ~2m. I think it's likely enough given the amount of minutes we > have available. We might need to reconsider if we add more tasks that > consume compute minutes. > > [0] https://docs.gitlab.com/subscriptions/community_programs/#gitlab-for-open-source > > Signed-off-by: Roger Pau Monné Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue May 05 15:53:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:53:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300840.1575292 (Exim 4.92) (envelope-from ) id 1wKI5Y-0000BG-V7; Tue, 05 May 2026 15:53:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300840.1575292; Tue, 05 May 2026 15:53:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKI5Y-0000B8-SH; Tue, 05 May 2026 15:53:36 +0000 Received: by outflank-mailman (input) for mailman id 1300840; Tue, 05 May 2026 15:53:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKI5W-0000B2-MK for xen-devel@lists.xenproject.org; Tue, 05 May 2026 15:53:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKI5V-005haT-06 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 17:53:33 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa125d-2eae-0a2a0a5409dd-0a2a4501988a-34 for ; Tue, 05 May 2026 17:53:32 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa127c-c1f2-0a2a45010019-d155d036c13f-3 for ; Tue, 05 May 2026 17:53:32 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-66b2d49ffb0so7366310a12.3 for ; Tue, 05 May 2026 08:53:32 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Message-ID: <04c8ed4e-4e99-46ae-b83d-af9031f5b622@suse.com> Date: Tue, 5 May 2026 17:53:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Subject: Problem with PCI-passthrough to PV guest Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH 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"xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777996567-81971161-B33E1FDD/0/0 X-purgate-type: clean X-purgate-size: 4117 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 5:51=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mirela Simonovic > > > > The MMU must be enabled during the resume path before restoring context= , > > as virtual addresses are used to access the saved context data. > > > > This patch adds MMU setup during resume by reusing the existing > > enable_secondary_cpu_mm function, which enables data cache and the MMU. > > I don=E2=80=99t understand where this last part happen in this commit: This is a leftover from before the commits were reorganized. I will update = the commit message in v9 so that it only describes what this patch actually doe= s. > > > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > > to init_ttbr (page tables used at runtime). > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no functional changes, just moved commit > > --- > > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > > 1 file changed, 24 insertions(+) > > > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 72c7b24498..596e960152 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -561,6 +561,30 @@ END(efi_xen_start) > > > > #endif /* CONFIG_ARM_EFI */ > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +FUNC(hyp_resume) > > I think we should mask all exceptions here: > msr DAIFSet, 0xf > > until we resume correctly the status (VBAR_EL2, etc). This was discussed in an earlier version: https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef15cb= 605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com/#CA= GeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In particular, section 5.20.2 says that the caller must observe all the rules described for CPU_SUSPEND, and section 6.4 explicitly says that the initial state rules also apply to SYSTEM_SUSPEND. For the return Exception level on AArch64, section 6.4.3.3 requires SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to ente= r this resume path with DAIF already masked by PSCI-compliant firmware. I agree this assumption is not obvious from the code, so I will add a comme= nt at the resume entry point to document that this path relies on the PSCI ini= tial core configuration requirements. > > > + /* Initialize the UART if earlyprintk has been enabled. */ > > +#ifdef CONFIG_EARLY_PRINTK > > + bl init_uart > > +#endif > > + PRINT_ID("- Xen resuming -\r\n") > > + > > + bl check_cpu_mode > > + bl cpu_init > > + > > + ldr x0, =3Dstart > > + adr x20, start /* x20 :=3D paddr (start) */ > > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > > + ldr lr, =3Dmmu_resumed > > + b enable_secondary_cpu_mm > > + > > +mmu_resumed: > > + b . > > +END(hyp_resume) > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* > > * Local variables: > > * mode: ASM > > > > This is more a trampoline for the core resuming, not sure if it could be = better to squash this > into the following patch, the maintainer could provide their preference. Yes, this patch is only the low-level resume trampoline before the context restore code is added by the following patch. I do not have a strong prefer= ence between keeping it separate and squashing it into the next patch. I can squ= ash them in v9 unless the maintainers prefer to keep the trampoline separate. Best regards, Mykola > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 16:11:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:11:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300863.1575312 (Exim 4.92) (envelope-from ) id 1wKIMw-0004dz-O1; Tue, 05 May 2026 16:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300863.1575312; Tue, 05 May 2026 16:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIMw-0004ds-Jj; Tue, 05 May 2026 16:11:34 +0000 Received: by outflank-mailman (input) for mailman id 1300863; Tue, 05 May 2026 16:11:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIMv-0004dm-7Z for xen-devel@lists.xenproject.org; Tue, 05 May 2026 16:11:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKIMu-00Ei4m-Fw for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:11:32 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa169a-e002-0a2a0a5209dd-0a2a4502e76a-44 for ; Tue, 05 May 2026 18:11:32 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa16b4-af86-0a2a45020019-d1558032cdef-3 for ; Tue, 05 May 2026 18:11:32 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48896199cbaso47867505e9.1 for ; Tue, 05 May 2026 09:11:32 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777997492-80B78161-DA39FB0A/0/0 X-purgate-type: clean X-purgate-size: 2329 On 05.05.2026 16:52, Orzel, Michal wrote: > > > On 05-May-26 15:05, Jan Beulich wrote: >> On 30.04.2026 14:51, Michal Orzel wrote: >>> --- a/xen/include/xen/pdx.h >>> +++ b/xen/include/xen/pdx.h >>> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >>> */ >>> bool __mfn_valid(unsigned long mfn); >>> >>> -#define page_to_pdx(pg) ((pg) - frame_table) >>> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >>> +#define page_to_pdx(pg) \ >>> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >>> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) >> >> If you alter these, ... >> >>> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >>> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) >> >> ... how come these can remain unaltered? Maybe you have some special >> arrangements in Arm code, but surely in generic code transformations done >> should be uniform. After all >> >> ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); >> >> (and alike) ought to be universally true for valid inputs. > The invariant holds. There are two transformations on different > boundaries: > > - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / > pdx_to_mfn. > - PDX <-> frame-table index: +/- frametable_base_pdx — lives in > page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). > > On x86 the second is the identity (frametable_base_pdx == 0), so it's > invisible. On Arm it isn't, so it has to appear in the macros that > cross that boundary. Pushing it into mfn_to_pdx as well would mix the > two boundaries and double-apply on Arm (page_to_mfn already adds it). That's yet more odd. These transformations should equally apply to MFN <-> page (i.e. frame table index) and MFN <-> PDX translations. PDX really is meant to be the frame table index, and at the same time (scaled by PAGE_SHIFT) the direct map index. Both (generally huge) tables equally benefit from whatever compression is in use, and hence also ought to equally benefit from that frametable_base_pdx-only sub-form of offset compression. The anomaly of shrinking only one of the two pretty clearly shouldn't be extended past Arm, and ideally would be addressed there at some point. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 16:15:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:15:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300869.1575320 (Exim 4.92) (envelope-from ) id 1wKIR8-0005CP-7w; Tue, 05 May 2026 16:15:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300869.1575320; Tue, 05 May 2026 16:15:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIR8-0005CI-3o; Tue, 05 May 2026 16:15:54 +0000 Received: by outflank-mailman (input) for mailman id 1300869; Tue, 05 May 2026 16:15:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIR6-0005CC-Bd for xen-devel@lists.xenproject.org; Tue, 05 May 2026 16:15:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKIR5-006d4c-Ah for xen-devel@lists.xenproject.org; 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Tue, 05 May 2026 09:15:50 -0700 (PDT) MIME-Version: 1.0 References: <8767d4129cd5bc56086172e58320539be7da4059.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 19:15:37 +0300 X-Gm-Features: AVHnY4IrysOt3S6uyhp6FbQHVX_-258ZZw4hlASPj3k8tlvTgm7ehqX6AKde12E Message-ID: Subject: Re: [PATCH v8 12/13] xen/arm: Implement PSCI SYSTEM_SUSPEND call (host interface) To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1777997751-E3961443-578406B7/0/0 X-purgate-type: clean X-purgate-size: 3885 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 7:23=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mirela Simonovic > > > > Invoke PSCI SYSTEM_SUSPEND to finalize Xen's suspend sequence on ARM64 = platforms. > > Pass the resume entry point (hyp_resume) as the first argument to EL3. = The resume > > handler is currently a stub and will be implemented later in assembly. = Ignore the > > context ID argument, as is done in Linux. > > > > Only enable this path when CONFIG_SYSTEM_SUSPEND is set and > > PSCI version is >=3D 1.0. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/include/asm/psci.h | 1 + > > xen/arch/arm/psci.c | 23 ++++++++++++++++++++++- > > 2 files changed, 23 insertions(+), 1 deletion(-) > > > > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm= /psci.h > > index 48a93e6b79..bb3c73496e 100644 > > --- a/xen/arch/arm/include/asm/psci.h > > +++ b/xen/arch/arm/include/asm/psci.h > > @@ -23,6 +23,7 @@ int call_psci_cpu_on(int cpu); > > void call_psci_cpu_off(void); > > void call_psci_system_off(void); > > void call_psci_system_reset(void); > > +int call_psci_system_suspend(void); > > > > /* Range of allocated PSCI function numbers */ > > #define PSCI_FNUM_MIN_VALUE _AC(0,U) > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > > index b6860a7760..c9d126b195 100644 > > --- a/xen/arch/arm/psci.c > > +++ b/xen/arch/arm/psci.c > > @@ -17,17 +17,20 @@ > > #include > > #include > > #include > > +#include > > > > /* > > * While a 64-bit OS can make calls with SMC32 calling conventions, for > > * some calls it is necessary to use SMC64 to pass or return 64-bit val= ues. > > - * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate > > + * For such calls PSCI_*_FN_NATIVE(x) will choose the appropriate > > * (native-width) function ID. > > */ > > #ifdef CONFIG_ARM_64 > > #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name > > +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN64_##name > > #else > > #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name > > +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN32_##name > > #endif > > > > uint32_t psci_ver; > > @@ -60,6 +63,24 @@ void call_psci_cpu_off(void) > > } > > } > > > > +int call_psci_system_suspend(void) > > +{ > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + struct arm_smccc_res res; > > + > > + if ( psci_ver < PSCI_VERSION(1, 0) ) > > + return PSCI_NOT_SUPPORTED; > > + > > + /* 2nd argument (context ID) is not used */ > > + arm_smccc_smc(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND), __pa(hyp_resume)= , &res); > > I think Linux is passing 0 as context ID, probably to mark that it=E2=80= =99s not used, I think we should do the > same Yes, agreed. SYSTEM_SUSPEND takes context_id as the second PSCI argument, and Xen does not use it. I will pass it explicitly as 0 instead of relying on the SMCCC wrapper/default register state. Best regards, Mykola > > > + return PSCI_RET(res); > > +#else > > + dprintk(XENLOG_WARNING, > > + "SYSTEM_SUSPEND not supported (CONFIG_SYSTEM_SUSPEND disab= led)\n"); > > + return PSCI_NOT_SUPPORTED; > > +#endif > > +} > > + > > void call_psci_system_off(void) > > { > > if ( psci_ver > PSCI_VERSION(0, 1) ) > > > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 16:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300884.1575329 (Exim 4.92) (envelope-from ) id 1wKIfx-0008Ud-Jc; Tue, 05 May 2026 16:31:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300884.1575329; Tue, 05 May 2026 16:31:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIfx-0008UW-Ge; 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Tue, 05 May 2026 20:04:30 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa312d-af86-0a2a45020019-a065830883d0-3 for ; Tue, 05 May 2026 20:04:30 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id A564342A8FEC; Tue, 5 May 2026 14:03:36 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/3] Sphinx docs: Design Document for NUMA node-affine claim sets Date: Tue, 5 May 2026 19:03:09 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778004270-B3B60161-4CC5D9D5/0/0 X-purgate-type: clean X-purgate-size: 5350 Dear reviewers, This updated design document forms the basis of the NUMA claims v7 series and is intended to serve as a reference during review. It extends Xen's memory claim design to support installing claim sets spanning multiple NUMA nodes atomically. As Roger Pau Monné suggested: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. This design documents that model in detail and is integrated into the Sphinx site below Hypervisor Guide -> Design Documents -> NUMA Claims. The rendered design document is available here for review: https://xen.kaindl.dev/claims-v7-design-master/designs/claims/ The Sphinx site can be built and viewed locally as follows: git pull git@gitlab.com:bernhardkaindl/xen.git claims-v7-design-master make -C docs sphinx-env-build # xdg-open docs/sphinx/html/index.html or start a minimal HTTP server: (cd docs/sphinx/html; python -m http.server) Changes since v6 ---------------- The review comments from v6 have been incorporated. In particular, Jan noted that "global" is ambiguous in this context, and following his suggestion, this series adopts the term host claims (short for host-wide claims) found here: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00026.html The helper names have also been adjusted to make domain scope explicit and to keep the release/set/get operations named consistently: - deduct_global_claims() -> domain_release_host_claims() - deduct_node_claims() -> domain_release_node_claims() - domain_set_outstanding_pages() -> domain_set_claim_entries() - new: domain_get_claim_entries() This version also keeps the new code minimal for review and avoids functional duplication. domain_set_claim_entries() now also handles the legacy XENMEM_claim_pages interface for backwards compatibility, replacing domain_set_outstanding_pages(). Best regards, Bernhard Bernhard Kaindl (3): Sphinx docs: Rearrange the design docs into a new dedicated design index Sphinx docs: Enable autosectionlabels and Mermaid support Sphinx docs: Design Document for NUMA node affine claim sets .readthedocs.yaml | 2 +- docs/conf.py | 21 + docs/{misc => designs}/cache-coloring.rst | 4 +- docs/designs/claims/accounting.rst | 331 +++++++++++++++ docs/designs/claims/design.rst | 243 +++++++++++ docs/designs/claims/development.rst | 197 +++++++++ docs/designs/claims/implementation.rst | 393 ++++++++++++++++++ docs/designs/claims/index.rst | 48 +++ docs/designs/claims/installation.rst | 70 ++++ docs/designs/claims/invariants.mmd | 35 ++ docs/designs/claims/performance.rst | 33 ++ docs/designs/claims/protection.rst | 200 +++++++++ docs/designs/claims/redeeming.rst | 71 ++++ docs/designs/claims/terminology.rst | 138 ++++++ docs/designs/claims/use-cases.rst | 39 ++ docs/designs/index.rst | 17 + docs/designs/launch/hyperlaunch.rst | 4 +- docs/designs/launch/index.rst | 10 + docs/glossary.rst | 12 +- .../dom/DOMCTL_claim_memory-data.mmd | 43 ++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 + .../dom/DOMCTL_claim_memory-workflow.mmd | 23 + docs/guest-guide/dom/DOMCTL_claim_memory.rst | 221 ++++++++++ docs/guest-guide/dom/index.rst | 14 + docs/guest-guide/index.rst | 23 + docs/guest-guide/mem/XENMEM_claim_pages.rst | 102 +++++ docs/guest-guide/mem/index.rst | 12 + docs/hypervisor-guide/index.rst | 12 +- docs/index.rst | 2 - 29 files changed, 2331 insertions(+), 12 deletions(-) rename docs/{misc => designs}/cache-coloring.rst (99%) create mode 100644 docs/designs/claims/accounting.rst create mode 100644 docs/designs/claims/design.rst create mode 100644 docs/designs/claims/development.rst create mode 100644 docs/designs/claims/implementation.rst create mode 100644 docs/designs/claims/index.rst create mode 100644 docs/designs/claims/installation.rst create mode 100644 docs/designs/claims/invariants.mmd create mode 100644 docs/designs/claims/performance.rst create mode 100644 docs/designs/claims/protection.rst create mode 100644 docs/designs/claims/redeeming.rst create mode 100644 docs/designs/claims/terminology.rst create mode 100644 docs/designs/claims/use-cases.rst create mode 100644 docs/designs/index.rst create mode 100644 docs/designs/launch/index.rst create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:06:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:06:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300943.1575356 (Exim 4.92) (envelope-from ) id 1wKK9o-0005fg-LO; Tue, 05 May 2026 18:06:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300943.1575356; Tue, 05 May 2026 18:06:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKK9o-0005fZ-IT; Tue, 05 May 2026 18:06:08 +0000 Received: by outflank-mailman (input) for mailman id 1300943; Tue, 05 May 2026 18:06:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKK9n-0005fT-Dm for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:06:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKK9m-00Aeli-Qh for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:06:06 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa318a-5cb7-0a2a0a5109dd-0a2a45098098-8 for ; Tue, 05 May 2026 20:06:06 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa318d-2497-0a2a45090019-a0658308bdd4-3 for ; Tue, 05 May 2026 20:06:06 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 82D9942A9297; Tue, 5 May 2026 14:05:11 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 1/3] Sphinx docs: Rearrange the design docs into a new dedicated design index Date: Tue, 5 May 2026 19:03:10 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778004366-42573A53-90EB120A/0/0 X-purgate-type: clean X-purgate-size: 4434 The Hyperlaunch Design Documents were stated as needing rearranging. Rearrange them inside the Hypervisor Guide and fix the bug where one got the title "1 Hypervisor Design Document". This also serves as first small step to clean up the main menu of the Sphinx documentation. Signed-off-by: Bernhard Kaindl --- Preview of the improved menu structure for design documents: https://xen.kaindl.dev/arrange-hyperlaunch-design/ --- docs/{misc => designs}/cache-coloring.rst | 4 ++-- docs/designs/index.rst | 16 ++++++++++++++++ docs/designs/launch/hyperlaunch.rst | 4 ++-- docs/designs/launch/index.rst | 10 ++++++++++ docs/hypervisor-guide/index.rst | 12 ++++++++++-- docs/index.rst | 2 -- 6 files changed, 40 insertions(+), 8 deletions(-) rename docs/{misc => designs}/cache-coloring.rst (99%) create mode 100644 docs/designs/index.rst create mode 100644 docs/designs/launch/index.rst diff --git a/docs/misc/cache-coloring.rst b/docs/designs/cache-coloring.rst similarity index 99% rename from docs/misc/cache-coloring.rst rename to docs/designs/cache-coloring.rst index e156062aa207..0c078e29463e 100644 --- a/docs/misc/cache-coloring.rst +++ b/docs/designs/cache-coloring.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: CC-BY-4.0 -Xen cache coloring user guide -============================= +Cache Coloring +============== The cache coloring support in Xen allows to reserve Last Level Cache (LLC) partitions for Dom0, DomUs and Xen itself. Currently only ARM64 is supported. diff --git a/docs/designs/index.rst b/docs/designs/index.rst new file mode 100644 index 000000000000..54d45c2bc321 --- /dev/null +++ b/docs/designs/index.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Design documents +================ + +Design documents and implementation details for the Xen hypervisor. + +These are intended for developers working on the Xen hypervisor, +and for those interested in the internal workings of Xen. + +.. toctree:: + :maxdepth: 2 + :numbered: 4 + + launch/index + cache-coloring diff --git a/docs/designs/launch/hyperlaunch.rst b/docs/designs/launch/hyperlaunch.rst index 3bed36f97637..aa7c2798a380 100644 --- a/docs/designs/launch/hyperlaunch.rst +++ b/docs/designs/launch/hyperlaunch.rst @@ -2,8 +2,6 @@ Hyperlaunch Design Document ########################### -.. sectnum:: :depth: 4 - This post is a Request for Comment on the included v4 of a design document that describes Hyperlaunch: a new method of launching the Xen hypervisor, relating to dom0less and work from the Hyperlaunch project. We invite discussion of this @@ -13,6 +11,8 @@ Xen Development mailing list. .. contents:: :depth: 3 + :backlinks: entry + :local: Introduction diff --git a/docs/designs/launch/index.rst b/docs/designs/launch/index.rst new file mode 100644 index 000000000000..afd845296d30 --- /dev/null +++ b/docs/designs/launch/index.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Hyperlaunch +=========== + +.. toctree:: + :maxdepth: 2 + + hyperlaunch + hyperlaunch-devicetree diff --git a/docs/hypervisor-guide/index.rst b/docs/hypervisor-guide/index.rst index 520fe01554ab..9c8033305549 100644 --- a/docs/hypervisor-guide/index.rst +++ b/docs/hypervisor-guide/index.rst @@ -1,11 +1,19 @@ .. SPDX-License-Identifier: CC-BY-4.0 -Hypervisor documentation -======================== +Hypervisor Guide +================ + +The Hypervisor Guide provides an overview of the Xen hypervisor's +architecture and design, covering its core components, features, +and how it manages resources for :term:`guest` domains. + +It serves as a comprehensive reference for developers and users interested +in understanding the inner workings of the Xen hypervisor. .. toctree:: :maxdepth: 2 + ../designs/index code-coverage x86/index diff --git a/docs/index.rst b/docs/index.rst index bd87d736b9c3..6b04a077cebd 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -62,8 +62,6 @@ Documents in need of some rearranging. .. toctree:: :maxdepth: 2 - designs/launch/hyperlaunch - designs/launch/hyperlaunch-devicetree misc/xen-makefiles/makefiles misra/index fusa/index -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:06:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:06:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300955.1575365 (Exim 4.92) (envelope-from ) id 1wKKAS-00069O-SI; Tue, 05 May 2026 18:06:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300955.1575365; Tue, 05 May 2026 18:06:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKAS-00069H-PL; Tue, 05 May 2026 18:06:48 +0000 Received: by outflank-mailman (input) for mailman id 1300955; Tue, 05 May 2026 18:06:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKAQ-00068o-To for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:06:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKKAQ-00HQem-Ah for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:06:46 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa31ad-5cb7-0a2a0a5109dd-0a2a4503b9ba-20 for ; Tue, 05 May 2026 20:06:46 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa31b5-672d-0a2a45030019-a06583098e58-3 for ; Tue, 05 May 2026 20:06:46 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 27A5081E0C2D; Tue, 5 May 2026 14:05:41 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/3] Sphinx docs: Enable autosectionlabels and Mermaid support Date: Tue, 5 May 2026 19:03:11 +0100 Message-Id: <1d0e98b9002dcb12765a51ae43a55d00e7cc1691.1778004073.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778004406-A2378938-B9FDAE60/0/0 X-purgate-type: clean X-purgate-size: 2055 Enable sphinx.ext.autosectionlabel which allows referencing sections using their title, without needing to add explicit labels to each section and enable support for Mermaid diagrams for design documents. Signed-off-by: Bernhard Kaindl --- .readthedocs.yaml | 2 +- docs/conf.py | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/.readthedocs.yaml b/.readthedocs.yaml index d3aff7662ebf..c61d5eb74107 100644 --- a/.readthedocs.yaml +++ b/.readthedocs.yaml @@ -12,7 +12,7 @@ build: jobs: post_install: # Instead of needing a separate requirements.txt - - python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme + - python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme sphinxcontrib-mermaid sphinx: configuration: docs/conf.py diff --git a/docs/conf.py b/docs/conf.py index 2fb8bafe6589..8aeab17a1a83 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -63,6 +63,27 @@ needs_sphinx = '1.4' # ones. extensions = [] + +# autosectionlabel allows referencing sections using their title, without +# needing to add explicit labels to each section. Used by design documents. +extensions.append("sphinx.ext.autosectionlabel") +# Setting autosectionlabel_prefix_document to True allows disambiguating +# between sections with the same title in different documents by prefixing +# the label with the document path. +autosectionlabel_prefix_document = True + + +# Mermaid diagrams are used in the design documents, so we try to +# load the extension if it's available, but don't fail if it's not: +try: + import sphinxcontrib.mermaid + + extensions.append("sphinxcontrib.mermaid") + # For included Mermaid diagram files, init the extension explicitly. + mermaid_init_js = "mermaid.initialize({ startOnLoad: true });" +except ImportError: + pass + # Add any paths that contain templates here, relative to this directory. templates_path = ['_templates'] -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:07:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:07:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300975.1575373 (Exim 4.92) (envelope-from ) id 1wKKBK-0006ht-4K; Tue, 05 May 2026 18:07:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300975.1575373; Tue, 05 May 2026 18:07:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKBK-0006hm-1W; Tue, 05 May 2026 18:07:42 +0000 Received: by outflank-mailman (input) for mailman id 1300975; Tue, 05 May 2026 18:07:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKKBI-0006hQ-3C for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:07:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKKBH-00AewW-GX for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:07:39 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa31b2-2eae-0a2a0a5409dd-0a2a45099292-38 for ; Tue, 05 May 2026 20:07:39 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa31ea-2497-0a2a45090019-a06583098070-3 for ; Tue, 05 May 2026 20:07:38 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 1741C81E0C37; Tue, 5 May 2026 14:06:34 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 3/3] Sphinx docs: Design Document for NUMA node affine claim sets Date: Tue, 5 May 2026 19:03:12 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778004459-400AB9F3-9B7EB872/3/8697954094 X-purgate-type: clean.bounce X-purgate-size: 107997 This design extends Xen's memory claim handling to support claim sets spanning multiple NUMA nodes. Roger Pau Monné described it as: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. This design documents this model in detail and is integrated into the Sphinx site below Hypervisor Guide -> Design Documents -> NUMA Claims. Signed-off-by: Bernhard Kaindl --- docs/designs/claims/accounting.rst | 331 +++++++++++++++ docs/designs/claims/design.rst | 243 +++++++++++ docs/designs/claims/development.rst | 197 +++++++++ docs/designs/claims/implementation.rst | 393 ++++++++++++++++++ docs/designs/claims/index.rst | 48 +++ docs/designs/claims/installation.rst | 70 ++++ docs/designs/claims/invariants.mmd | 35 ++ docs/designs/claims/performance.rst | 33 ++ docs/designs/claims/protection.rst | 200 +++++++++ docs/designs/claims/redeeming.rst | 71 ++++ docs/designs/claims/terminology.rst | 138 ++++++ docs/designs/claims/use-cases.rst | 39 ++ docs/designs/index.rst | 1 + docs/glossary.rst | 12 +- .../dom/DOMCTL_claim_memory-data.mmd | 43 ++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 + .../dom/DOMCTL_claim_memory-workflow.mmd | 23 + docs/guest-guide/dom/DOMCTL_claim_memory.rst | 221 ++++++++++ docs/guest-guide/dom/index.rst | 14 + docs/guest-guide/index.rst | 23 + docs/guest-guide/mem/XENMEM_claim_pages.rst | 102 +++++ docs/guest-guide/mem/index.rst | 12 + 22 files changed, 2269 insertions(+), 3 deletions(-) create mode 100644 docs/designs/claims/accounting.rst create mode 100644 docs/designs/claims/design.rst create mode 100644 docs/designs/claims/development.rst create mode 100644 docs/designs/claims/implementation.rst create mode 100644 docs/designs/claims/index.rst create mode 100644 docs/designs/claims/installation.rst create mode 100644 docs/designs/claims/invariants.mmd create mode 100644 docs/designs/claims/performance.rst create mode 100644 docs/designs/claims/protection.rst create mode 100644 docs/designs/claims/redeeming.rst create mode 100644 docs/designs/claims/terminology.rst create mode 100644 docs/designs/claims/use-cases.rst create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst diff --git a/docs/designs/claims/accounting.rst b/docs/designs/claims/accounting.rst new file mode 100644 index 000000000000..cf0aad56a0a8 --- /dev/null +++ b/docs/designs/claims/accounting.rst @@ -0,0 +1,331 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Accounting +########## + +.. contents:: Table of Contents + :local: + +.. note:: + Claims accounting state is only updated while holding the :c:var:`heap_lock`. + See :ref:`designs/claims/accounting:Locking of the claims state` for details + on the locks used to protect the claims accounting state. + +This section formalises the internal state and invariants that Xen must +maintain to ensure correctness. + + +For readers following the design in order, the preceding sections are: + +1. :doc:`/designs/claims/design` introduces the overall model and goals. +2. :doc:`/designs/claims/installation` explains how claim sets are installed. +3. :doc:`/designs/claims/protection` describes how claimed memory is protected + during allocation. +4. :doc:`/designs/claims/redeeming` explains how claims are redeemed when + allocations succeed. + +Overview +^^^^^^^^ + +.. table:: Table 1: Claims accounting: All accesses, Aggregate state, + and invariants protected by :c:var:`heap_lock`. + :widths: auto + + ============ =========================================== ======================= + Level Claims must be lower or equal to the available memory + ============ =========================================== ======================= + Total :c:var:`outstanding_claims` = :c:var:`total_avail_pages` = + + = Aggregate state: + SUM() over all domains: Aggregate state: + SUM(:c:member:`domain.outstanding_pages`) SUM(:c:var:`node_avail_pages`) + + Also, it is the sum of claims + over all nodes: + + = Aggregate state: + SUM(:c:expr:`node_outstanding_claims[*]`) + Node :c:expr:`node_outstanding_claims[node]` :c:expr:`node_avail_pages[node]` + + Aggregate state over all domains: Aggregate of the free + SUM(:c:expr:`domain.claims[node]`) lists of all zones on node + Dom per-node :c:member:`domain.node_claims` = + SUM(:c:expr:`domain.claims[node]`) :c:expr:`node_avail_pages[node]` + Total claims :c:member:`domain.outstanding_pages` :c:var:`total_avail_pages` + Memory limit :c:member:`domain.outstanding_pages` Invariant: must be + + :c:func:`domain_tot_pages` lower or equal to + :c:member:`domain.max_pages` + ============ =========================================== ======================= + + +Total claims and available memory +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + These variables tracking the total claims and available memory in the system + are aggregates of the actual per-node and per-domain values. + + + They are only maintained for efficient checks in the allocator hot paths, to + quickly determine if an allocation can be satisfied from unclaimed memory or + if further checks are needed to determine if the claims of the domain can be + used to free up memory for the allocation. This also ensures that the sum of + all claims never exceeds the total free memory in the system. + + + The number of unclaimed pages across all nodes in the system is derived as + :c:var:`total_avail_pages` minus :c:var:`outstanding_claims`. + This number is then used to: + + - Permit allocation requests if they can be satisfied from unclaimed pages. + - Ensure that the sum of all claims never exceeds the total free memory. + + .. c:var:: unsigned long total_avail_pages + + Total available pages in the system across all NUMA nodes. + It is the aggregate of the per-node available pages: + :c:var:`total_avail_pages` = SUM(:c:expr:`node_avail_pages[MAX_NUMNODES]`) + + .. c:var:: unsigned long outstanding_claims + + The total sum of all claims across all domains. + :c:var:`outstanding_claims` = + SUM(:c:var:`domain.outstanding_pages`) + +Per-node claims and available memory +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. c:var:: unsigned long node_avail_pages[MAX_NUMNODES] + + Available pages for each NUMA node, including both free and claimed pages. + This is used for validating that node claims do not exceed the available + memory on the respective NUMA node. + + .. c:var:: unsigned long node_outstanding_claims[MAX_NUMNODES] + + The total claims across all domains for each NUMA node, indexed by node + ID. This is maintained for efficient checks in the allocator hot paths. + +This diagram illustrates the claims accounting state and the invariants: + +Accounting diagram +^^^^^^^^^^^^^^^^^^ + + .. mermaid:: invariants.mmd + :caption: Diagram: Claims accounting state and invariants + +Claims accounting state for each domain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. c:struct:: domain + + The main structure representing a domain in Xen. It includes the + claims accounting state for the domain, including both host-wide + and node-specific claims, as well as the maximum page limits for the + domain and the lock protecting the domain's page allocation counts. + + While the domain's page counts are currently `unsigned int`, work is + underway to change them to `unsigned long` to support larger page counts + beyond 16 TB. The code is already designed to anticipate this change and + work with either `unsigned int` or `unsigned long` page counts equally well. + + .. c:member:: unsigned int outstanding_pages + + The domain's total claim, representing the number of pages claimed + for the domain. + + .. c:member:: unsigned int node_claims + + The total of the domain's node-affine claims, maintained for efficient + checks in the allocator hot paths without needing to sum over the + per-node claims each time. It is equal to the sum of + :c:expr:`claims[MAX_NUMNODES]` for all nodes. + + .. c:member:: unsigned int claims[MAX_NUMNODES] + + The domain's claims for each :term:`NUMA node`, indexed by node ID. + + As the storage for ``struct`` :c:struct:`domain` is allocated using a + dedicated page for each domain, this array allows for efficient and + fast storage with direct indexing, without consuming any additional + memory for an extra allocation. + + + The claims for each node are used for NUMA-affine domains to specify + the amount of memory claimed for each node, to ensure that the domain's + claims for each node do not exceed the available memory on that node, + and to allow the allocator to redeem claims from the appropriate nodes + when allocating memory for the domain. + + .. literalinclude:: ../../../xen/common/domain.c + :language: C + :caption: Allocation of the domain structure in ``xen/common/domain.c`` + :start-at: alloc_domain_struct + :end-at: } + :emphasize-lines: 7, 12, 14 + :linenos: + :lineno-match: + + The page allocated for ``struct`` :c:struct:`domain` is large enough + to accommodate this array several times, even beyond the current + :c:macro:`MAX_NUMNODES` limit of 64. It should be sufficient even for + future expansion of the maximum number of supported NUMA nodes if + needed. The allocation has a build-time assertion for safety to ensure + that ``struct`` :c:struct:`domain` fits within the allocated page. + + + The sum of these claims is stored in :c:member:`domain.node_claims` + for efficient checks in the allocator hot paths which need to know + the total number of node claims for the :term:`domain`. + + .. c:member:: unsigned int max_pages + + The maximum number of pages the domain is allowed to claim, set at + domain creation time. + + .. c:member:: rspinlock_t page_alloc_lock + + Lock for checking :c:func:`domain_tot_pages` on top of new claims + against :c:member:`domain.max_pages` when installing these new claims. + This is a recursive spinlock to allow for nested calls into the allocator + while holding it, such as when redeeming claims during page allocation. + It is taken before :c:var:`heap_lock` when installing claims to ensure a + consistent locking order and must not be taken while holding + :c:var:`heap_lock` to avoid deadlocks. + + .. c:member:: nodemask_t node_affinity + + A :c:type:`nodemask_t` representing the set of NUMA nodes the domain + is affine to. This is used for efficient checks in the allocator hot + paths to quickly get the set of nodes a domain is affine to for + memory allocation decisions. + +Claims accounting invariants +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Xen must maintain the following invariants at all times to ensure correctness + of claims accounting: + + - For all claims, including node-affine and host-wide claims: + :c:var:`outstanding_claims` :math:`\le` :c:var:`total_avail_pages` + + - For node-specific claims: + :c:expr:`node_outstanding_claims[alloc_node]` :math:`\le` + :c:expr:`node_avail_pages[alloc_node]` + + - For a domain's overall claims: + :c:var:`domain.outstanding_pages` + + :c:var:`domain_tot_pages` :math:`\le` :c:var:`domain.max_pages` + + See :doc:`redeeming` for more information on this invariant. + +Constants +^^^^^^^^^ + + .. c:macro:: MAX_NUMNODES + + The maximum number of NUMA nodes supported by Xen. Used for validating + node IDs in the :c:type:`memory_claim_t` entries of claim sets. + When Xen is built without NUMA support, it is 1. + + The default on x86_64 is 64 which is sufficient for current hardware and + allows for efficient storage of e.g. the :c:var:`node_online_map` for + online nodes and :c:member:`domain.node_affinity` in a single 64-bit value, + and in the :c:expr:`domain.claims[MAX_NUMNODES]` array. + + ``xen/arch/Kconfig`` limits the maximum number of NUMA nodes to 64. While + Xen can be compiled for up to 254 nodes, configuring machines to split + the installed memory into more than 64 nodes would be unusual. + For example, dual-socket servers, even when using multiple chips per CPU + package should typically be configured for 2 NUMA nodes by default. + + .. c:var:: nodemask_t node_online_map + + A bitmap representing which NUMA nodes are currently online in the system. + This is used for validating that claims are only made for online nodes and + for efficient checks in the allocator hot paths to quickly determine which + nodes are online. Currently, Xen does not support hotplug of NUMA nodes, + so this is set at boot time based on the platform firmware configuration + and does not change at runtime. + +Types +^^^^^ + + .. c:type:: uint8_t nodeid_t + + Type for :term:`NUMA node` IDs. It is passed to Xenctrl using the + :c:var:`mem_flags` argument of :c:func:`xc_domain_populate_physmap()` + and passed to Xen in this form. + + It allocates 8 bits in the flags for the node ID, which limits the + theoretical maximum value of :c:macro:`CONFIG_NR_NUMA_NODES` at 254 + (255 is :c:macro:`NUMA_NO_NODE`), which is far beyond the current + maximum of 64 supported by Xen and should be sufficient for all + practical purposes. This also allows for efficient storage of NUMA + nodes in arrays indexed by node ID and in :c:type:`nodemask_t` bitmaps + :c:var:`node_online_map` and :c:member:`domain.node_affinity` for + efficient checks in the allocator hot paths. + + .. c:type:: nodemask_t + + A bitmap representing a set of NUMA nodes, used for status information + like :c:var:`node_online_map` and the :c:member:`domain.node_affinity`, + and to track which nodes are online and which nodes are in a domain's + node affinity. + +Memflags +^^^^^^^^ + + .. c:type:: memflags + + Flags for memory allocation requests that can affect the allocation + behaviour, such as node preference and whether the request is for an + exact node. + + .. c:macro:: MEMF_no_owner + + Flag for memory allocation requests to indicate that the allocation + shall not be owned by a domain, and as part of that, + :c:macro:`MEMF_no_refcount` is also set. + + .. c:macro:: MEMF_no_refcount + + Flag for memory allocation requests to indicate that the request is not + reference-counted to a domain's memory allocation state, and as part of + that, claims of a domain cannot be used to protect and redeem the + allocation using claims. This is used for requests which are not for + domains or which explicitly bypass reference-counting for other reasons. + + .. c:macro:: MEMF_no_scrub + + Flag for memory allocation requests to indicate that the allocated memory + should not be scrubbed (zeroed) before being used. This is used for + performance reasons for certain types of allocations where the caller + guarantees that the memory will be properly initialized before use. + +Locking of the claims state +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. :c:member:: domain.page_alloc_lock + + If :c:var:`domain.page_alloc_lock` is needed, e.g. to check + :c:func:`domain_tot_pages` on top of new claims against + :c:var:`domain.max_pages` for the domain, it needs to be taken before + :c:var:`heap_lock` for consistent locking order to avoid deadlocks. + + .. c:var:: spinlock_t heap_lock + + Lock for all heap operations including claims. It protects the claims + state and invariants from concurrent updates and ensures that checks + in the allocator hot paths see a consistent view of the claims state. + +Helper functions +^^^^^^^^^^^^^^^^ + + .. c:function:: inline unsigned int domain_tot_pages(struct domain *d) + + :param d: The domain for which to calculate the total pages. + :type d: struct domain * + :returns: The total pages allocated to the domain. + + This function is used for validating that an allocation and the domain's + claims do not exceed :c:member:`domain.max_pages`. diff --git a/docs/designs/claims/design.rst b/docs/designs/claims/design.rst new file mode 100644 index 000000000000..882dc3c5c1f1 --- /dev/null +++ b/docs/designs/claims/design.rst @@ -0,0 +1,243 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +############# +Claims Design +############# + +.. contents:: Table of Contents + :backlinks: entry + :local: + +************ +Introduction +************ + +Xen's page allocator supports a :term:`claims` API that allows privileged +:term:`domain builders` to reserve a quantity of available memory before +:term:`populating` the :term:`guest physical memory` of new :term:`domains` +they are creating, configuring, and building. + +These reservations are called :term:`claims`. They ensure that the claimed +memory remains available for the :term:`domains` when allocating it, even if +other :term:`domains` are allocating memory at the same time. + +:term:`Installing claims` is a privileged operation performed by +:term:`domain builders` before they populate the :term:`guest physical memory`. +This prevents other :term:`domains` from allocating memory earmarked for +:term:`domains` under construction. Xen maintains the per-domain claim state +for pages that are claimed but not yet allocated. + +When claim installation succeeds, Xen updates the claim state to reflect the +new targets and protects the claimed memory until it is allocated or the claim +is released. As Xen allocates pages for the domain, claims are redeemed by +reducing the claim state by the size of each allocation. + +************ +Design Goals +************ + +The design's primary goals are: + +1. Allow :term:`domain builders` to claim memory + on multiple :term:`NUMA nodes` using a :term:`claim set` atomically. + +2. Preserve the existing :c:macro:`XENMEM_claim_pages` hypercall command + for compatibility with existing :term:`domain builders` and its legacy + semantics, while introducing a new, unrestricted hypercall command for + new use cases such as NUMA-aware claim sets. + +3. Host-wide claims are supported for compatibility with existing + :term:`domain builders` and for use cases where a flexible claim that + can exists in the level of the host is desirable. + + It means the global outstanding claims count of the host is not obsolete + and needs to be maintained as it needs to account for such host-wide claims. + +4. Use fast allocation-time claims protection in the allocator's hot paths + to protect claimed memory from parallel allocations by other domain + builders in case of parallel domain builds, and to protect claimed + memory from all other allocations as well. + +*************** +Design Overview +*************** + +The legacy :c:macro:`XENMEM_claim_pages` hypercall is superseded by +:c:macro:`XEN_DOMCTL_claim_memory`. This hypercall installs a :term:`claim set`. +It is an array of :c:type:`memory_claim_t` entries, where each entry specifies +a page count and a target: either a specific NUMA node ID or a selector. + +Like legacy claims, claim sets are validated and installed under +:c:member:`domain.page_alloc_lock` and :c:var:`heap_lock`: Either the entire +set is accepted, or the request fails with no side effects. Repeated calls +to install claims replace any existing claims for the domain rather than +accumulating. + +As installing claim sets after allocations is not a supported use case, +the legacy behaviour of subtracting existing allocations from installed +claims is somewhat surprising and counterintuitive, and page exchanges +make incremental per-node tracking of already-allocated pages on a per-node +basis difficult. Therefore, claim sets do not retain the legacy behaviour of +subtracting existing allocations, optionally on a per-node basis, from the +installed claims across the individual claim set entries. + +Summary: + +- Legacy domain builders can continue to use the previous (now deprecated) + :c:expr:`XENMEM_claim_pages` hypercall command to install legacy claims. + +- Updated domain builders can take advantage of claim sets to install + NUMA-aware :term:`claims` on multiple :term:`NUMA nodes` and/or claims + that are not bound to specific nodes. It has more intuitive semantics + that do not subtract existing allocations from the installed claims. + Such semantics are also simpler to understand and maintain, and are not + affected by the complexity of tracking existing allocations on a per-node + basis across page exchanges happening concurrently with claim installation + for new domains under construction. + +For readers following the design in order, the next sections cover the +following topics: + +1. :doc:`/designs/claims/installation` explains how claim sets are installed. +2. :doc:`/designs/claims/protection` describes how claimed memory is + protected during allocation. +3. :doc:`/designs/claims/redeeming` explains how claims are redeemed as + allocations succeed. +4. :doc:`/designs/claims/accounting` describes the accounting model that + underpins those steps. + +******************** +Key design decisions +******************** + +.. glossary:: + + :c:expr:`node_outstanding_claims[MAX_NUMNODES]` + Tracks the sum of all claims on a node. :c:func:`get_free_buddy()` checks + it before scanning zones on a node, so claimed memory is protected from + other allocations. + + :c:expr:`redeem_claims_for_allocation()` + When allocating memory for a domain, the page allocator redeems the matching + claims for this allocation, ensuring the domain's total memory allocation as + :c:func:`domain_tot_pages` plus :c:member:`domain.outstanding_pages` remain + within the domain's limits, defined by :c:member:`domain.max_pages`. + See :doc:`redeeming` for details on redeeming claims. + + :c:expr:`domain.outstanding_pages` + It remains the authoritative source for the total outstanding claims of a + domain, and is updated on claim installation and redemption. It includes + both host-wide claims and node-specific claims. + Support for :term:`host-wide claims` is maintained for two reasons: first, + for compatibility with existing domain builders, and second, for use cases + where a flexible claim that can be satisfied from any node is desirable. + + When the preferred NUMA node(s) for a domain do not have sufficient free + memory to satisfy the domain's memory requirements, host-wide claims provide + a flexible fallback for the memory shortfall from the preferred node(s) that + can be satisfied from any available node. + + In this case, :term:`domain builders` can use a combination of passing + the preferred node to :c:func:`xc_domain_populate_physmap()` and + :term:`NUMA node affinity` to steer allocations towards the preferred + NUMA node(s), while letting host-wide claims ensure that the shortfall + is available. + + This allows the domain builder to define a set of desired NUMA nodes to + allocate from and even specify which nodes to prefer for an allocation, + but the claim for the shortfall is flexible, not specific to any node. + +********* +Non-goals +********* + +Using per-node allocator data +============================= + +Some data structures could be moved into the per-node allocator data +allocated by `init_node_heap()` to avoid bouncing those data structures +between nodes. Those can be moved to the per-node allocator data in the +future, but that is not a priority. While that would reduce this bouncing, +it would not eliminate the need to take the global :c:var:`heap_lock`, +which is still needed to protect the allocator's state during allocation +and freeing of pages. + +The synchronisation point for taking the global :c:var:`heap_lock` is +the main point of contention during allocation, freeing and scrubbing +pages. The overhead of accessing the per-node claims accounting data +is expected to be minimal. + +Avoiding the :c:var:`heap_lock` would be difficult to achieve as it +would require updating the page allocator to maintain atomic updates +of a new ``total_unclaimed_pages`` counter, which would be decremented +on allocation and claims installation and incremented on freeing of +pages and claims, and to check that counter in the hot path of the +allocator to protect claimed memory from other allocations. + +However, we aim to move that data into the per-node allocator data in the +future to reduce the need to bounce those data structures between nodes. + +Legacy behaviours +================= + +Installing claims is a privileged operation performed by domain builders +before they populate guest memory. As such, tracking previous allocations +is not in scope for claims. + +For the following reasons, claim sets do not retain the legacy behaviour +of subtracting existing allocations from installed claims: + +- Xen does not currently maintain a ``d->node_tot_pages[node]`` count, + and the hypercall to exchange extents of memory with new memory makes + such accounting relatively complicated. + +- The legacy behaviour is somewhat surprising and counterintuitive. + Because installing claims after allocations is not a supported use case, + subtracting existing allocations at installation time is unnecessary. + +- Claim sets are a new API and can provide more intuitive semantics + without subtracting existing allocations from installed claims. This + also simplifies the implementation and makes it easier to maintain. + +Versioned hypercall +=================== + +The :term:`domain builders` using the :c:macro:`XEN_DOMCTL_claim_memory` +hypercall also need to use other version-controlled hypercalls which +are wrapped through the :term:`libxenctrl` library. + +Wrapping this call in :term:`libxenctrl` is therefore a practical approach; +otherwise, we would have a mix of version-controlled and unversioned +:term:`hypercalls`, which could be confusing for API users and for future +maintenance. + +From the domain builders' viewpoint, it is more consistent to expose +the claims :term:`hypercalls` in the same way as the other calls they use. + +Stable interfaces also have drawbacks: with stable syscalls, Linux needs +to maintain the old interface indefinitely, which can be a maintenance burden +and can limit the ability to make improvements or changes to the interface +in the future. Linux carries many system call successor families, e.g., +``oldstat``, ``stat``, ``newstat``, ``stat64``, ``fstatat``, ``statx``, +with similar examples including ``openat``, ``openat2``, ``clone3``, ``dup3``, +``waitid``, ``mmap2``, ``epoll_create1``, ``pselect6`` and many more. +Glibc hides that complexity from users by providing a consistent API, but it +still needs to maintain the old system calls for compatibility. + +In contrast, versioned :term:`hypercalls` allow for more flexibility and +evolution of the API while still providing a clear path to adopt new features. +The reserved fields and reserved bits in the structures of this hypercall +allow for many future extensions without breaking existing callers. + +***************** +Future extensions +***************** + +The reserved fields and bits in the structures of this +hypercall allow for many future extensions without breaking existing callers. + +Future extensions could include support for claims on superpages, claims for +requests with :c:macro:`MEMF_no_refcount`, which allocate P2M, HAP and so on. + +See :ref:`designs/claims/protection:Callers using MEMF_no_refcount` +for more information. diff --git a/docs/designs/claims/development.rst b/docs/designs/claims/development.rst new file mode 100644 index 000000000000..c4805b2e080d --- /dev/null +++ b/docs/designs/claims/development.rst @@ -0,0 +1,197 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Development +########### + +.. note:: + + This section provides historical context on the development + of NUMA-aware claims, including previous implementations and + feedback received, to give a better understanding of the + design decisions made in the current implementation. + +Version history +--------------- + +The initial `implementation of single-node claims `_ by Alejandro Vallejo +used the legacy claims hypercall :c:macro:`XENMEM_claim_pages` and passed a +NUMA node in the existing NUMA node bits of +:c:expr:`xen_memory_reservation.mem_flags`. This added the flag +``d->claim_node`` to ``struct`` :c:struct:`domain`, which defined the target +node for the domain's claims. + +.. epigraph:: + + Roger Pau Monné reviewed it and proposed an `initial multi-node claim-sets + specification `_ that inspired this design: + + The interface here seems to be focused on domains only being allowed to + allocate from a single node, or otherwise you must first allocate memory + from a node before moving to the next one (which defeats the purpose of + claims?). + + I think we want to instead convert ``d->outstanding_pages`` + into a per-node array, so that a domain can have outstanding + claims for multiple NUMA nodes? + + The hypercall interface becomes a bit awkward then, as the toolstack has + to perform a different hypercall for each memory claim from a different + node (and rollback in case of failure). Ideally we would need to introduce + a new hypercall that allows making claims from multiple nodes in a single + locked region, as to ensure success or failure in an atomic way. + + -- Roger Pau Monné + + This led to the `v2 `_ and `v3 `_ series, adding a new hypercall + API which designated passing an array of claims. This allowed for a more + flexible claim set design targeting multiple NUMA nodes and host-wide claims, + but only supported a single claim per domain at that time. + +.. sidebar:: Feedback and suggestions for multi-node claim sets + + The initial implementations of single-node claims received + feedback from the community, with multiple suggestions to + extend the API to support `multi-node claim sets `_. + This feedback highlighted the need for a more flexible + design that could accommodate claims on multiple NUMA nodes. + +Between v3 and v4, `Roger Pau Monné and Andrew Cooper developed and merged +several critical fixes `_ for Xen's overall claims implementation. +These fixes also allowed Roger to improve the implementation for redeeming +claims during domain memory allocation. With a further suggestion by +Bernhard Kaindl, this enabled a fully working implementation that protected +claimed memory against parallel allocations by other domain builders. + +.. glossary: + +v4 series + With the `v4 series `_, we submitted the combined work that completed the + fixes for protecting claimed memory on NUMA nodes. The review process indicated + that supporting multiple claim sets would require a `redesign `_ of + claim installation and management, which led to this design document. + +v5 series + The `v5 series `_ implemented the `Claim Sets Design Version 1 `_ + with support for multiple claim records per domain, and with a terminology + of "consuming claims" for the process of redeeming claims during domain memory + allocation and "retiring claims" for releasing claims for the low-level + action of reducing the number of claimed pages for redeeming claims for an + allocation, when destroying a domain or when claims must be recalled if all + memory is claimed and then memory is offlined, which is needed to maintain + the invariant that claimed memory can never be larger than free memory. + +v6 series + The `v6 series `_ implemented the `Claim Sets Design Version 2 `_. + The only difference between the two versions is that with design version 2, + the initial term `"consuming claims"` was changed to `"redeeming claims"` + and the term `"retiring claims"` was changed to `"deducting claims"`. + +v7 series +--------- + + The v7 series will implement the `Claim Sets Design Version 3 `_ or newer + with further improvements to the design and implementation: + + 1. As the code often needs the total sum of claims of a domain, this update + keeps :c:member:`domain.outstanding_pages` as the total sum of outstanding + claims of a domain. This obsoletes the former ``d->global_claims`` which + only tracked the unbound claims which were not affine to a NUMA node. + + 2. Avoid code duplication: Replace :c:func:`domain_set_outstanding_pages()`, + which handled the legacy claims hypercall :c:macro:`XENMEM_claim_pages`. + The new claim sets hypercall handler :c:func:`domain_install_claim_set()`, + integrates installing legacy claims for backwards compatibility. + The former :c:func:`domain_set_outstanding_pages()` is removed to + avoid duplicating the logic of installing claims in both places. + + 3. Improve the clarity of function and variable names. For example, the new + hypercall handler :c:func:`domain_install_claim_set()` is more descriptive + of its purpose than the former :c:func:`domain_set_outstanding_pages()`: + + ================================== ======================================= + Former function name New function name + ================================== ======================================= + ``domain_set_outstanding_pages()`` :func:`domain_set_claim_entries()` + :func:`domain_get_claim_entries()` + ``deduct_global_claims()`` :func:`domain_release_host_claims()` + ``deduct_node_claims()`` :func:`domain_release_node_claims()` + ================================== ======================================= + +Testing +------- + +The basis of the `v4 series `_ is included in the XenServer XS9 preview +release, and besides functional product testing, it has been tested to +meet the performance expectation of customers from improved NUMA placement. + +With the `v6 series `_, a comprehensive set of functional system tests +was added to the submission. Also, `a separate host-side integration test +suite `_ for validating the `v6 series `_ was posted. + +Further development +------------------- + +Based on review feedback, there is the wish to normalise the page counts of +the page allocator to ``unsigned long``. A `first patch `_ in this direction +was posted to normalise the types of :c:var:`total_avail_pages` and +:c:var:`outstanding_claims` to ``unsigned long`` in the page allocator. + +Acknowledgements +---------------- + +The claim sets design builds on the single-node claims implementation +described above and the feedback it generated. The following people +should be acknowledged for their contributions: + +- *Edwin Török* for developing the `initial best-effort NUMA placement + feature in the XAPI toolstack `_, which inspired the initial + implementation of NUMA-aware claims, and his work in productizing and + validating the integration of NUMA claims with the XAPI toolstack. + +- *Alejandro Vallejo* for starting the development of the NUMA claims series. + +- *Jan Beulich* for providing review suggestions that led to many improvements. + +- *Roger Pau Monné* for reviewing the initial implementation, `proposing + the initial multi-node claim-sets specification <_v1>`_, developing and + merging `critical fixes `_ upstream that enabled product-quality + support for single-node claims which is the basis of the multi-node + claim sets implementation. + +- *Andrew Cooper* for integrating and validating the work internally, + helping to stabilise and productise the single-node implementation. + +- *Bernhard Kaindl* for collaborating on the single-node implementation, + developing the claim sets hypercall since version 2, designing and + implementing the multi-node claim sets design, the functional system-level + test suite and the host-side integration test suite for validating the + claim sets implementation. + +- *Marcus Granado* for leading the development effort inside XenServer for + productising the single-node claims implementation, for providing feedback + and suggestions for improving the design and implementation. This included + coordinating the work of multiple contributors and stakeholders, integrating + the work into XenServer products and ensuring it meets customer requirements. + +.. _xapi: https://xapi-project.github.io/new-docs/toolstack/features/NUMA +.. _fix1: + https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00164.html +.. _v1: + https://patchew.org/Xen/20250314172502.53498-1-alejandro.vallejo@cloud.com/ +.. _v1m: + https://lists.xenproject.org/archives/html/xen-devel/2025-06/msg00484.html +.. _v2: https://lists.xen.org/archives/html/xen-devel/2025-08/msg01076.html +.. _v3: https://patchew.org/Xen/cover.1757261045.git.bernhard.kaindl@cloud.com/ +.. _v4: + https://lists.xenproject.org/archives/html/xen-devel/2026-02/msg01387.html +.. _v4-03: https://patchwork.kernel.org/project/xen-devel/ + patch/6927e45bf7c2ce56b8849c16a2024edb86034358.1772098423 + .git.bernhard.kaindl@citrix.com/ +.. _d1: + https://bernhard-xen.readthedocs.io/en/claim-sets-v1-design/designs/claims +.. _d2: + https://bernhard-xen.readthedocs.io/en/claim-sets-v2-design/designs/claims +.. _v5: https://patchwork.kernel.org/project/xen-devel/list/?series=1078053 +.. _v6: https://patchwork.kernel.org/project/xen-devel/list/?series=1081139 +.. _tv2: https://patchwork.kernel.org/project/xen-devel/list/?series=1083329 +.. _u1: https://patchwork.kernel.org/project/xen-devel/list/?series=1084344 diff --git a/docs/designs/claims/implementation.rst b/docs/designs/claims/implementation.rst new file mode 100644 index 000000000000..ed8ed82877af --- /dev/null +++ b/docs/designs/claims/implementation.rst @@ -0,0 +1,393 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Implementation +############## + +.. contents:: Table of Contents + :backlinks: entry + :local: + +.. note:: This part describes implementation details of claims and their + interaction with memory allocation in Xen. It covers the functions and + data structures involved in :term:`installing claims` and allocating memory + with :term:`claims`. + +Functions related to the implementation of claims and their interaction +with memory allocation. + +********************** +Installation of claims +********************** + +This section describes the functions and data structures involved in +:term:`installing claims` for domains, and the internal functions for +validating and installing claim sets. + + .. c:function:: int domain_set_outstanding_pages(domain, pages) + + This function is replaced by :c:func:`domain_set_claim_entries()`. + + .. c:function:: int domain_set_claim_entries(domain, nr_entries, claim_set) + + :param domain: The domain for which to set the node claims + :param nr_entries: The number of claims in the claim set + :param claim_set: The claim set to install for the domain + :type domain: struct domain * + :type nr_entries: unsigned int + :type claim_set: memory_claim_t * + :returns: 0 on success, or a negative error code on failure. + + Handles :term:`installing claim sets`. It performs validation of the + :term:`claim set` and updates the domain's claims accordingly. + + The function works in four phases: + + 1. Validate claim entries and check node-specific claims availability + 2. Validate the host-wide request against the remaining availability + 3. Reset any current claims of the domain + 4. Install the claim set as the domain's claiming state + + Phase 1 checks claim entries for validity and memory availability: + + 5. Target must be :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_TOTAL` or a node. + 6. Each target node may only appear once in the claim set. + 7. For node-specific claims, requested pages must not exceed the + available memory on that node after accounting for existing claims. + 8. The explicit padding field must be zero for forward compatibility. + + Phase 2 checks: + + 9. The total sum of the requested pages must not exceed the total + unclaimed memory of the host after accounting for existing claims. + 10. The claims must not exceed the :c:member:`domain.max_pages` limit. + See :doc:`accounting` and :doc:`redeeming` for the accounting + checks that enforce the domain's :c:member:`domain.max_pages` limit. + + .. versionadded:: claims-v5 + + .. c:function:: int domain_get_claim_entries(domain, nr_entries, claim_set) + + :param domain: The domain for which to retrieve a claim set + :param nr_entries: The number of claims in the claim set + :param claim_set: The preallocated buffer for up to nr_entries claim entries + :type domain: struct domain * + :type nr_entries: unsigned int * + :type claim_set: memory_claim_t * + :returns: 0 on success with nr_entries updated to the number of claims + written to the buffer, or a negative error code on failure. + + Retrieves a claim set for the current claims of the domain and writes + it to the provided buffer. The number of claims written to the buffer + is stored in the variable pointed to by ``nr_entries``. + + ``nr_entries`` specifies the size of the provided buffer for claim + entries, and the function writes up to that many claim entries to + the buffer. If the buffer is too small to hold all claim entries, + the function returns -:c:macro:`ERANGE` and updates ``nr_entries`` + to the number of entries needed to hold all claim entries. + + .. versionadded:: claims-v7 + +************************************ +Helper functions for managing claims +************************************ + + .. c:function:: unsigned long domain_release_host_claims(domain, release) + + :param domain: The domain for which to release host-wide claims + :param release: The number of pages to release + :type domain: struct domain * + :type release: unsigned long + :returns: The number of host-wide pages actually deducted from the domain. + + This function releases the specified number of host-wide claims. + It limits the release to the number of host-wide claims actually held by + the domain and updates the overall claim state accordingly. + + .. versionadded:: claims-v4 + + .. c:function:: unsigned long domain_release_node_claims(domain, node, release) + + :param domain: The domain for which to release the node claims + :param node: The node for which to release the claim + :param release: The number of pages to release from the claim + :type domain: struct domain * + :type node: nodeid_t + :type release: unsigned long + :returns: The number of pages actually deducted from the domain's claim. + + This function deducts a specified number of pages from a domain's + claim on a specific node. It limits the release to the number of + pages actually claimed by the domain on that node and updates the + node-local claims currently held by the domain on that node, + and it updates the host-wide and node-specific claim state accordingly. + + .. versionadded:: claims-v5 + + .. c:function:: void domain_recall_node_claims(domain, recall) + + :param domain: The domain for which to recall node claims + :param recall: The number of node-specific pages to recall + :type domain: struct domain * + :type recall: unsigned long + + This function recalls the specified number of node-specific claims + from the domain and updates the overall claim state accordingly. + + It iterates over the domain's node-specific claims, calls + :c:func:`domain_release_node_claims()` to up to the given pages from + the node claims until the specified number of pages has been recalled, + or all node-specific claims have been exhausted. + + This function is used to recall node-specific claims from a domain when + offlining memory or when pages for a domain are allocated on other + nodes than the claimed node. + + .. versionadded:: claims-v5 + +********************** +Allocation with claims +********************** + +The functions below play a key role in allocating memory for domains. + + .. c:function:: int xc_domain_populate_physmap(xch, domid, extents, order, \ + mem_flags, extent_start) + + :param xch: The :term:`libxenctrl` interface + :param domid: The ID of the domain + :param extents: Number of extents + :param order: Order of the extents + :param mem_flags: Allocation flags + :param extent_start: Starting PFN + :type xch: xc_interface * + :type domid: uint32_t + :type extents: unsigned long + :type order: unsigned int + :type mem_flags: unsigned int + :type extent_start: xen_pfn_t * + :returns: 0 on success, or a negative error code on failure. + + This function is a wrapper for the ``XENMEM_populate_physmap`` hypercall, + which is handled by the :c:func:`populate_physmap()` function in the + hypervisor. It is used by :term:`libxenguest` for populating the + :term:`guest physical memory` of a domain. :term:`domain builders` can + set the :term:`NUMA node affinity` and pass the preferred node to this + function to steer allocations towards the preferred NUMA node(s) and let + :term:`claims` ensure that the memory will be available even in cases + of :term:`parallel domain builds` where multiple domains are being built + at the same time. + +The :term:`meminit` API calls :c:func:`xc_domain_populate_physmap()` +for populating the :term:`guest physical memory`. It invokes the restartable +``XENMEM_populate_physmap`` hypercall implemented by +:c:func:`populate_physmap()`. + +.. c:function:: void populate_physmap(struct memop_args *a) + + :param a: Provides status and hypercall restart info + :type a: struct memop_args * + + Allocates memory for building a domain and uses it for populating the + :term:`physmap`. For allocation, it uses + :c:func:`alloc_domheap_pages()`, which forwards the request to + :c:func:`alloc_heap_pages()`. + + During domain creation, it adds the :c:macro:`MEMF_no_scrub` flag to the request + for populating the :term:`physmap` to optimise domain startup by allowing + the use of unscrubbed pages. + + When that happens, it scrubs the pages as needed using hypercall + continuation to avoid long hypercall latency and watchdog timeouts. + + Domain builders can optimise on-demand scrubbing by running + :term:`physmap` population pinned to the domain's NUMA node, + keeping scrubbing local and avoiding cross-node traffic. + +.. c:function:: struct page_info *alloc_heap_pages(unsigned int zone_lo, \ + unsigned int zone_hi, \ + unsigned int order, \ + unsigned int memflags, \ + struct domain *d) + + :param zone_lo: The lowest zone index to consider for allocation + :param zone_hi: The highest zone index to consider for allocation + :param order: The order of the pages to allocate (2^order pages) + :param memflags: Memory allocation flags that may affect the allocation + :param d: The domain for which to allocate memory or NULL + :type zone_lo: unsigned int + :type zone_hi: unsigned int + :type order: unsigned int + :type memflags: unsigned int + :type d: struct domain * + :returns: The allocated page_info structure, or NULL on failure + + This function allocates a contiguous block of pages from the heap. + It checks claims and available memory before attempting the + allocation. On success, it updates relevant counters and redeems + claims as necessary. + + It first checks whether the request can be satisfied given the domain's + claims and available memory using :c:func:`claims_permit_request()`. + If claims and availability permit the request, it calls + :c:func:`get_free_buddy()` to find a suitable block of free pages + while respecting node and zone constraints. + + Simplified pseudocode of its logic: + +.. code:: C + + struct page_info *alloc_heap_pages(unsigned int zone_lo, + unsigned int zone_hi, + unsigned int order, + unsigned int memflags, + struct domain *d) { + /* D's claims and available memory need to permit the request. */ + if (!claims_permit_request(1UL << order, total_avail_pages, memflags, + NUMA_NO_NODE, d, outstanding_claims)) + return NULL; + + /* Find a suitable buddy block. Pass the zone range, order and + * memflags so the helper can apply node and zone selection. */ + pg = get_free_buddy(zone_lo, zone_hi, order, memflags, d); + if (!pg) + return NULL; + + redeem_claims_for_allocation(d, 1UL << order, node_of(pg)); + update_counters_and_stats(d, order); + if (pg_has_dirty_pages(pg)) + scrub_dirty_pages(pg); + return pg; + } + +.. c:function:: struct page_info *get_free_buddy(zone_lo, zone_hi, order, \ + memflags, domain) + + :param zone_lo: The lowest zone index to consider for allocation + :param zone_hi: The highest zone index to consider for allocation + :param order: The order of the pages to allocate (2^order pages) + :param memflags: Flags for conducting the allocation + :param domain: domain to allocate memory for or NULL + :type zone_lo: unsigned int + :type zone_hi: unsigned int + :type order: unsigned int + :type memflags: unsigned int + :type domain: struct domain * + :returns: The allocated page_info structure, or NULL on failure + + This function finds a suitable block of free pages in the buddy + allocator while respecting claims and node-level available memory. + + Called by :c:func:`alloc_heap_pages()` after verifying the request is + permissible, it iterates over nodes and zones to find a buddy block + that satisfies the request. It checks node-local claims before + attempting allocation from a node. + + Using :c:func:`claims_permit_request()`, it checks whether the node + has enough unclaimed memory to satisfy the request or whether the + domain's claims can permit the request on that node after accounting + for outstanding claims. + + If the node can satisfy the request, it searches for a suitable block + in the specified zones. If found, it returns the block; otherwise it + tries the next node until all online nodes are exhausted. + + Simplified pseudocode of its logic: + +.. code:: C + + /* + * preferred_node_or_next_node() represents the policy to first try the + * preferred/requested node then fall back to other online nodes. + */ + struct page_info *get_free_buddy(unsigned int zone_lo, + unsigned int zone_hi, + unsigned int order, + unsigned int memflags, + const struct domain *d) { + nodeid_t request_node = MEMF_get_node(memflags); + + /* + * Iterate over candidate nodes: start with preferred node (if any), + * then try other online nodes according to the normal placement policy. + */ + while (there are more nodes to try) { + nodeid_t node = preferred_node_or_next_node(request_node); + unsigned long avail_pages = node_avail_pages[node] - + node_outstanding_claims[node] + + ((d && !(memflags & MEMF_no_refcount)) + ? d->claims[node] : 0); + + /* Ensure the target node and the claims permit can this allocation */ + if ( avail_pages < (1UL << order) ) + goto next_node; + + /* Find a zone on this node with a suitable buddy */ + for (int zone = highest_zone; zone >= lowest_zone; zone--) + for (int j = order; j <= MAX_ORDER; j++) + if ((pg = remove_head(&heap(node, zone, j))) != NULL) + return pg; + next_node: + if (request_node != NUMA_NO_NODE && (memflags & MEMF_exact_node)) + return NULL; + /* Fall back to the next node and repeat. */ + } + return NULL; + } + +.. note:: The actual implementation includes additional details + but the pseudocode captures the core logic of checking claims + and available memory while searching for a suitable buddy. + +************************************** +Offlining memory in presence of claims +************************************** + +When offlining pages, Xen must ensure that available memory on a node +and the total number of free pages does not fall below their respective +outstanding claims. If it does, Xen recalls claims from domains until +accounting is valid again. + +This is triggered by privileged domains via the +``XEN_SYSCTL_page_offline_op`` sysctl or by machine-check memory errors. + +Offlining currently allocated pages cannot remove those in-use pages from +circulation. They are marked for offlining and are offlined when freed back +to the allocator. However, when already free pages are directly offlined, +free memory the outstanding claims may need to be adjusted directly too. + +:c:func:`reserve_offlined_page()` needs to check whether offlining the page +causes :c:var:`total_avail_pages` to fall below :c:var:`outstanding_claims` or +:c:expr:`node_avail_pages[page->node]` to fall below +:c:expr:`node_outstanding_claims[page->node]`. If so, +:c:func:`reserve_offlined_page()` must look for domains with relevant claims +and recall those claims until the claim accounting is valid again. + +- When + :c:expr:`node_outstanding_claims[page->node]` exceeds + :c:expr:`node_avail_pages[page->node]` for the offlined page, + :c:func:`reserve_offlined_page()` should call + :c:func:`domain_release_node_claims()` + to recall claims on that node from domains with claims on the node of the + offlined buddy until the claim accounting of the node is valid again. + +- When total :c:var:`outstanding_claims` exceeds :c:var:`total_avail_pages`, + :c:func:`reserve_offlined_page()` calls + :c:func:`domain_release_host_claims()` to recall host-wide claims + from domains until the overall claims accounting is valid again. + +This can violate claim guarantees, but it is necessary to maintain system +stability when memory must be offlined. + +.. c:function:: int reserve_offlined_page(struct page_info *head) + + :param head: The page being offlined + :type head: struct page_info * + :returns: 0 on success, or a negative error code on failure. + + This function is called during the offlining process to offline pages. + + If offlining a page causes available memory to fall below outstanding + claims, it checks the node-specific and host-wide claim accounting + and recalls claims from domains as necessary to ensure accounting + invariants hold after a buddy is offlined. diff --git a/docs/designs/claims/index.rst b/docs/designs/claims/index.rst new file mode 100644 index 000000000000..218632c6e22f --- /dev/null +++ b/docs/designs/claims/index.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +NUMA Claims +=========== + +Design and implementation of NUMA-aware claim sets. + +Status: Draft for review + +This design first introduces the external behaviour of claim sets: how claims +are installed, how they protect allocations, and how they are redeemed. +It then covers the underlying accounting model and implementation details. + +For readers following the design in order, the next sections cover these +topics: + +1. :doc:`/designs/claims/use-cases` describes the use cases for claim sets. +2. :doc:`/designs/claims/performance` describes the performance test results. +3. :doc:`/designs/claims/development` provides the development history and future work. +4. :doc:`/designs/claims/design` introduces the overall model and goals. +5. :doc:`/designs/claims/installation` describes how claim sets are installed. +6. :doc:`/designs/claims/protection` describes how claimed memory is + protected during allocation. +7. :doc:`/designs/claims/redeeming` explains how claims are redeemed when + allocations succeed. +8. :doc:`/designs/claims/accounting` describes the accounting model that + underpins those steps. +9. :doc:`/designs/claims/implementation` documents the functions used for the + implementation. +10. :doc:`/designs/claims/terminology` defines the terms used in this design. + +.. toctree:: :caption: Contents + :maxdepth: 2 + + use-cases + performance + development + design + installation + protection + redeeming + accounting + implementation + terminology + +.. contents:: + :backlinks: entry + :local: diff --git a/docs/designs/claims/installation.rst b/docs/designs/claims/installation.rst new file mode 100644 index 000000000000..2073da2c33ee --- /dev/null +++ b/docs/designs/claims/installation.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Installation +############ + +********** +Claim sets +********** + +A claim set is an array of :c:type:`memory_claim_t` entries. + +.. c:type:: memory_claim_t + + The ``typedef`` for :c:type:`xen_memory_claim`, used for + passing an array of claim set entries to the hypervisor. + +.. c:struct:: xen_memory_claim + + Underlying structure for passing claim sets to the hypervisor. + + This structure represents an individual claim entry in a claim set. + It specifies the number of pages claimed and the target of the claim, + which can be a specific NUMA node or a special value for host-wide claims. + + The structure includes padding for future expansion. It is important to + zero-initialise it or use designated initialisers to ensure forward + compatibility. Members are as follows: + + .. c:member:: uint64_aligned_t pages + + Number of pages for this claim entry. + + .. c:member:: uint32_t cmd + + Command field reserved for future use. It must be initialised to 0 + for forward compatibility. + + .. c:member:: uint32_t target + + + The target of the claim entry. It can be a special selector, which could + in the future include flags and additional information, or simply a NUMA + node ID. + + See :ref:`guest-guide/dom/DOMCTL_claim_memory:Hypercall API` + for the defined special selectors and their semantics. + +.. c:type:: uint64_aligned_t + + 64-bit unsigned integer type with alignment requirements suitable for + representing page counts in the claim structure. + +********************** +Claim set installation +********************** + + +Claim set installation is invoked via :c:macro:`XEN_DOMCTL_claim_memory`, and +:c:func:`domain_install_claim_set()` implements the claim set installation logic. + +See :doc:`accounting` for details on the claims accounting state. + +************************* +Legacy claim installation +************************* + +Legacy claims are set via the :c:macro:`XENMEM_claim_pages` hypercall command. + +.. note:: The legacy path is deprecated. + Use :c:macro:`XEN_DOMCTL_claim_memory` for new code. diff --git a/docs/designs/claims/invariants.mmd b/docs/designs/claims/invariants.mmd new file mode 100644 index 000000000000..317c51536ed3 --- /dev/null +++ b/docs/designs/claims/invariants.mmd @@ -0,0 +1,35 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +%% Claim variables and their Invariants +flowchart TD + +subgraph "Access under the heap_lock only:" + direction TB + Memory_of_Nodes --"  Contribute to  "--> Overall_Memory + Overall_Memory --"  Available to  "--> Memory_of_Domains +end + +subgraph Memory_of_Nodes["Per-node claims and available memory"] + direction LR + per_node_claims -->|"  less or equal to  "| node_avail_pages + per_node_claims["Claims on the node: + node_outstanding_claims[n]"] + node_avail_pages["Available pages on the node: + node_avail_pages[n]"] +end + +subgraph Overall_Memory["Overall claims and available memory"] + direction LR + outstanding -->|"  less or equal to  "| avail_pages + outstanding["Total claims on the host: + outstanding_claims"] + avail_pages["Available pages on the host: + total_avail_pages"] +end + +subgraph Memory_of_Domains["Per-domain claims and available memory"] + direction LR + claims -->|"  less or equal to  "| available_memory_for_domains + claims["Claims of the domain:
d->outstanding_pages"] + available_memory_for_domains["Available pages:
node_avail_pages[n] + total_avail_pages"] +end diff --git a/docs/designs/claims/performance.rst b/docs/designs/claims/performance.rst new file mode 100644 index 000000000000..694c97ca3321 --- /dev/null +++ b/docs/designs/claims/performance.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Performance +*********** + +The single-node claims implementation which is the basis of the +NUMA claims v4 series and the multi-node claim sets design forms +the groundwork for the NUMA design and implementation in XenServer 9. + +An early version of it is available as the XenServer XS9 preview +release: https://www.xenserver.com/downloads/xs9-preview. +The performance of this release has been tested in real +customer environments with customer workloads. + +On dual-socket Intel servers, the **average aggregate CPU usage across +all VMs at peak times** (peak user load) was **~16% less** than with +`XenServer 8.4` (overall average at all times **~8.5% less**) compared +to the previous release, which is a significant improvement in CPU +efficiency for memory-intensive workloads, attributed to the +improved NUMA placement enabled by `NUMA-aware claims`. + +The customer's response time metric from their application, which is the +key measure the customer uses for end user observed performance, showed +an ~8% improvement, matching the improvement in average CPU usage. + +These numbers were observed using `Intel dual-socket servers`. +The performance benefits with AMD servers (judging by preliminary tests) are +expected to be considerably higher than the results with dual-socket Intel +servers. + +The multi-node claim sets design is expected to extend these benefits +to configurations that require claiming memory from multiple NUMA nodes +adjacent to each other for optimal performance. diff --git a/docs/designs/claims/protection.rst b/docs/designs/claims/protection.rst new file mode 100644 index 000000000000..c7eec95b99e4 --- /dev/null +++ b/docs/designs/claims/protection.rst @@ -0,0 +1,200 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Protection +########## + +.. contents:: Table of Contents + :backlinks: entry + :local: + +Claimed memory must be protected from allocations without applicable claims +while remaining available to allocations with applicable claims. + +Claims exist as long as they are outstanding, which is from the moment they +are installed until they are redeemed by allocations. + +During this time, they are a commitment of memory to a domain, and the +hypervisor must ensure that this commitment is respected by protecting +claimed memory from being allocated without redeeming applicable claims. + +Redeeming claims is the process of applying a portion of the claims of +a domain to an allocation to allow the allocation to proceed by exchanging +the claim for the allocated memory, so that the allocation can use the +claimed memory and the portion of the claim used for the allocation is +no longer outstanding. + +For example, if a domain has an outstanding claim of 100 pages on a node, +and it redeems 20 pages of that claim for an allocation, the domain would +have 80 pages of that claim still outstanding, and the allocation would be +satisfied using the claimed memory, so the domain can use that allocated +memory and the claim would be reduced by the redeemed amount. + +For the protection of claims, the allocator performs checks to ensure that +claimed memory is not allocated without redeeming applicable claims, while +still allowing the claiming domain to allocate claimed memory by redeeming +claims. + +When the system is not under heavy memory pressure and not fully-claimed, +the allocator can satisfy allocation requests using unclaimed memory. + +However, when the system is under heavy memory pressure or nearly fully-claimed, +the checks for protecting claims become critical to ensure that claimed memory +is not allocated without redeeming applicable claims. + +********************************* +Reference-counting of allocations +********************************* + +Claims protection distinguishes between two kinds of allocation requests. + +Reference-counted requests +========================== + +This means that the request comes for a domain and the :c:expr:`memflags` +of the request do not include :c:expr:`MEMF_no_refcount`. + +In this case, the request is reference-counted to the domain's +total memory allocation, and the domain's claims can be used +to protect and redeem the allocation using claims. + +For example, the allocation requests by :term:`domain builders` for the +:term:`guest physical memory` of domains are always reference-counted, +and as such, can be protected and redeemed by claims to the extent +the claims are applicable and sufficient for the allocation. + +Not reference-counted requests +============================== + +This means that the request is not for a domain, or the :c:type:`memflags` +of the request includes :c:macro:`MEMF_no_refcount`. + +In this case, the request is not reference-counted to a domain's +memory allocation state, and as part of that, claims of a domain +cannot be used to protect and redeem the allocation using claims. + +As such, the allocation request is not protected and redeemed by claims and +the allocator does not consider claims to check whether the request can +be satisfied, so the request can only be satisfied using unclaimed memory. + +Therefore, such requests can only be satisfied using unclaimed memory. + +Callers using MEMF_no_refcount +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Example callers which use :c:macro:`MEMF_no_refcount` when allocating memory +or use :c:macro:`MEMF_no_owner` which also sets :c:macro:`MEMF_no_refcount` +in the context of domains include: + +- ``p2m_alloc_page()`` for allocating pages for the page-to-machine mapping. +- ``hap_set_allocation()`` for allocating memory for hardware-assisted paging. +- ``vmx_alloc_vlapic_mapping()`` for allocating the vLAPIC page for a HVM guest. +- ``vmtrace_alloc_buffer()`` for allocating the buffer for VM tracing. +- ``ioreq_server_alloc_mfn()`` for allocating memory for I/O requests. + +Example actions happening at runtime on the request of running domains +which use :c:macro:`MEMF_no_refcount` or :c:macro:`MEMF_no_owner` to +bypass reference-counting include: + +- ``memory_exchange()`` for exchanging memory pages of a domain. +- ``gnttab_transfer()`` for transferring pages between domains. + +*********************** +Claim protection checks +*********************** + +Unless the request is an exact-node request for a node-specific claim, +the allocator performs two protective checks to protect claimed memory +from being allocated to other domains while still allowing the claiming +domain to allocate it. + +Before starting, the allocator takes the global :c:var:`heap_lock`. +This ensures that any previous changes to the state of the system's +unclaimed memory and the domain's total outstanding claims are complete +and visible, and no concurrent changes to those values can happen. + +Protection of host-wide claims +============================== + +The first check [1]_ the allocator performs is a check protecting host-wide +claims which are part of the total pool of the claims on the entire host. + +1. Get the total amount of unclaimed memory available in the system. + It is the sum of the free pages on all NUMA nodes + (:c:var:`total_avail_pages`) minus the total amount of claimed + memory across all domains (:c:var:`outstanding_claims`). This + includes all host-wide claims and all node-specific claims. + +2. Check whether the request can be satisfied by the unclaimed memory itself. + + If so, the allocation calls :c:func:`get_free_buddy()` to perform the + node-specific checks and find free pages on the appropriate node(s) + to satisfy the request. + + This is the common case, especially for smaller allocations and when the + host is not under heavy memory pressure and not fully-claimed. + +If the request cannot proceed based on the unclaimed memory, it is under +heavy memory pressure as the unclaimed memory is very low, which is where +the protection of claims becomes critical. + +In these situations, the allocator needs to ensure that the domain has +enough claims to redeem the claimed memory to satisfy this request, +otherwise the request has to fail: + +1. If the request is not for a domain or the request is disabling reference + counting, the request fails. + +2. If the total claims of the domain (:c:member:`domain.outstanding_claims`) + cover the amount of claims needed to satisfy the request, + the allocation can proceed further. Else, the request fails. + +Protection of node-specific claims +================================== + +This check protects claimed memory on the specific node from being allocated +without sufficient claims. + +After passing the host-wide claims protection check, the allocator calls +:c:expr:`get_free_buddy()` to pick nodes for allocation and check the +node's suitability [2]_ for this request: + +1. Get the number of unclaimed memory available on that node using the + free pages on that NUMA node (``node_avail_pages[node]``) minus the + total amount of claimed memory across all domains for that node + (``node_outstanding_claims[node]``). + +2. If the request can be satisfied by the sum of the unclaimed memory + on that node and the claims of the domain for that node, the allocation + can proceed on that node, else this node cannot satisfy this request. + +3. If the allocation is an exact-node request, or the allocator + has no further nodes to consider, the allocation fails. + +4. Else, if the allocator has to consider further nodes for this request, + the allocator continues to repeat the same process for the next node. + +.. rubric:: Footnotes + +.. [1] In principle, the host-wide check for the protection of host-wide claims + could be skipped for node-exact requests that are reference-counted and + covered by the claims of the domain for that node. The added code for + This additional check would add complexity to the code, and as long as + Xen must track global memory counters, those counters would still need + to be accessed for all requests, so the added code could only delay the + access to those global counters while adding more checks to all other + requests. Therefore, that's not considered beneficial for now. + + However, if we want to replace the global :c:var:`heap_lock` serving + as a global synchronisation point for all memory allocations with + finer-grained (per-node) locks in the future, then this check could be + added to allow more concurrency for node-exact allocations (and all + free_page() calls) while still protecting claims, but that would be a + future project, requiring significant changes to the code. + +.. [2] If the request is reference-counted and the request is covered by + the claims of the domain for that node, the request could proceed. + But that would add complexity to the code, and as long as Xen must track + per-node memory counters, those counters would still need to be updated + for all allocations from this node, so the added code could only delay + the access to those per-node counters while adding more checks to all + other requests. Therefore, that's not considered beneficial for now. diff --git a/docs/designs/claims/redeeming.rst b/docs/designs/claims/redeeming.rst new file mode 100644 index 000000000000..a5eb045c1bce --- /dev/null +++ b/docs/designs/claims/redeeming.rst @@ -0,0 +1,71 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Redeeming +######### + +.. contents:: Table of Contents + :backlinks: entry + :local: + +After the buddy allocator returned the pages for the allocation, +:c:func:`redeem_claims_for_allocation()` redeems claims up to the size of +the allocation in the same critical region that updates the free-page counters. + +The function performs the following steps to redeem the matching +claims for this allocation. It ensures that the domain's total memory +allocation as :c:func:`domain_tot_pages` plus its outstanding +claims as :c:member:`domain.outstanding_pages` remain within the +domain's limits, defined by :c:member:`domain.max_pages`: + +Steps to redeem claims for an allocation +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Step 1: + Redeem claims from :c:expr:`domain.claims[alloc_node]` on the allocation + node, up to the size of that claim. +Step 2: + If the allocation exceeds :c:expr:`domain.claims[alloc_node]`, redeem the + remaining pages from the host-wide claims + (:c:member:`domain.outstanding_pages` - :c:member:`domain.node_claims`), + up to the size of the host-wide claims. +Step 3: + If the allocation exceeds the combination of those claims, redeem the + remaining pages from other per-node claims so that the domain's total + allocation plus claims remain within the domain's :c:member:`domain.max_pages` + limit. + +Enforcing the domain's max_pages limit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:c:func:`domain_tot_pages` + :c:member:`domain.outstanding_pages` +must not exceed the :c:member:`domain.max_pages` limit, otherwise +the domain could exceed its memory entitlement. + +At claim installation time, :c:func:`domain_install_claim_set()` performs +this check. + +.. :sidebar:: + See :ref:`designs/claims/accounting:Locking of claims accounting` + for the locks used to protect claims accounting state and invariants. + +At memory allocation time + If (unexpectedly) a domain builder ends up allocating memory from + different nodes than it claimed from, the domain's total allocation + plus claims could exceed the domain's :c:member:`domain.max_pages` + limit, unless the page allocator redeems claims from other nodes + to ensure the sum of the domain's claims and populated pages + remains within the :c:member:`domain.max_pages` limit. + + :c:func:`redeem_claims_for_allocation()` + cannot reliably check :c:member:`domain.max_pages` race-free because + :c:member:`domain.max_pages` is not protected by the :c:var:`heap_lock` + taken by the page allocator during allocation. + + To check the domain's limits, it would have to take the + :c:member:`domain.page_alloc_lock` to inspect the domain's + limits and its current allocation. However, taking that lock + while holding the :c:var:`heap_lock` would invert the locking + order and could lead to deadlocks. + + Therefore, :c:func:`redeem_claims_for_allocation()` + redeems the remaining allocation from other-node claims in Step 3. diff --git a/docs/designs/claims/terminology.rst b/docs/designs/claims/terminology.rst new file mode 100644 index 000000000000..62bc32ae93b5 --- /dev/null +++ b/docs/designs/claims/terminology.rst @@ -0,0 +1,138 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Terminology +########### + +.. Terms should appear in alphabetical order by their initial synonym. + +.. glossary:: + + claims + Reservations of memory for :term:`domains` that are installed by + :term:`domain builders` before :term:`populating` the domain's memory. + Claims ensure that the reserved memory remains available for the + :term:`domains` when allocating it, even if other :term:`domains` are + allocating memory at the same time. + + claim set + An array of :c:type:`memory_claim_t` entries, each specifying a page count + and a target (either a NUMA node ID or a special value for host-wide claims), + that can be installed atomically for a domain to reserve memory on multiple + NUMA nodes. The chapter on :ref:`designs/claims/installation:claim sets` + provides further information on the structure and semantics of claim sets. + + claim set installation + installing claim sets + installing claims + The process of validating and installing a claim set for a domain under + :c:member:`domain.page_alloc_lock` and :c:var:`heap_lock`, ensuring that + either the entire set is accepted and installed, or the request fails with + no side effects. + The chapter on :ref:`designs/claims/installation:claim set installation` + provides further information on the structure and semantics of claim sets. + + domain builders + Privileged entities (such as :term:`toolstacks` in management :term:`domains`) + responsible for constructing and configuring :term:`domains`, including + installing :term:`claims`, :term:`populating` memory, and setting up other + resources before the :term:`domains` are started. + + host-wide claims + :term:`claims` that can be satisfied from any NUMA node, required for + compatibility with existing domain builders and for use cases where + strict node-local placement is not required or not possible, such as on + UMA machines or as a fallback for memory that comes available on any node. + + libxenctrl + A low-level C API library to interact with the Xen hypervisor, to make + :term:`hypercalls`. If hypercalls are to Xen what system calls are to the + Linux kernel, then :term:`libxenctrl` is the universal, low-level system C + runtime library that provides the interface for making those hypercalls. + + libxenguest + A higher-level library, layered on top of :term:`libxenctrl`, + specifically designed for :term:`domain builders` to build and + configure :term:`domains`, including installing :term:`claims` + and :term:`populating` :term:`guest physical memory`. It provides + a more convenient and domain-builder-friendly interface for these + operations, abstracting away details of creating the architecture-specific + memory map expected by guest operating systems which were initially + written to run on the bare metal (on full hardware) and not in a + virtualized environment. + + meminit + The phase of a domain build where the guest's physical memory is populated, + which involves allocating and mapping physical memory for the domain's guest + :term:`physmap`. This should be performed after installing :term:`claims` + to protect the process against parallel allocations of other domain builder + processes in case of parallel domain builds. + + It is implemented in :term:`libxenguest` and optionally installs + :term:`claims` to ensure the claimed memory is reserved before populating + the :term:`physmap` using calls to :c:func:`xc_domain_populate_physmap()`. + + nodemask + A bitmap representing a set of NUMA nodes, used for status information + like :c:var:`node_online_map` and the :c:member:`domain.node_affinity`. + + node + NUMA node + NUMA nodes + A grouping of CPUs and memory in a NUMA architecture. NUMA nodes have + varying access latencies to memory, and NUMA-aware claims allow + :term:`domain builders` to reserve memory on specific NUMA nodes + for performance reasons. Platform firmware configures what constitutes + a NUMA node, and Xen relies on that configuration for NUMA-related features. + + When this design refers to NUMA nodes, it is referring to the NUMA nodes + as defined by the platform firmware and exposed to Xen, initialized at boot + time and not changing at runtime (so far). + + The NUMA node ID is a numeric identifier for a NUMA node, used whenever code + specifies a NUMA node, such as the target of a claim or indexing into arrays + related to NUMA nodes. + + NUMA node IDs start at 0 and are less than :c:macro:`MAX_NUMNODES`. + + Some NUMA nodes may be offline, and the :c:var:`node_online_map` is used + to track which nodes are online. Currently, Xen does not support hotplug + of NUMA nodes, so the set of online NUMA nodes is determined at boot time + based on the platform firmware configuration and does not change at runtime. + + NUMA node affinity + The preference of a :term:`domain` for a set of NUMA nodes, which can + be set up by :term:`domain builders` to make :c:func:`get_free_buddy` + (which selects the NUMA node to allocate from) prefer specific NUMA nodes for + performance reasons. + + It is represented by the :c:member:`domain.node_affinity`, which is a + bitmap of NUMA nodes indicating the preferred NUMA nodes for the domain. + By default, domains have NUMA node auto-affinity, which means their NUMA + node affinity is determined automatically by the hypervisor based on the + CPU affinity of their vCPUs, but it can be disabled and configured manually + by domain builders. + + guest physical memory + physmap + The mapping of a domain's guest physical memory to the host's + machine address space. The :term:`physmap` defines how the guest's + physical memory corresponds to the actual memory locations on the host. + + populating + The process of allocating and mapping physical memory for a domain's guest + :term:`physmap`, performed by the :term:`domain builders`, preferably after + installing :term:`claims` to protect the process against parallel allocations + of other domain builder processes in case of parallel domain builds. + + toolstacks + Privileged entities (running in privileged :term:`domains`) responsible for + managing :term:`domains`, including building, configuring, and controlling + their lifecycle using :term:`domain builders`. One toolstack may run + multiple :term:`domain builders` in parallel to build multiple :term:`domains` + at the same time. + + Xenctrl + An OCaml library provided by Xen for :term:`domain builders` running + in privileged :term:`domains` to interact with the hypervisor, including + making hypercalls to install claims and :term:`populating` + :term:`guest physical memory`. \ No newline at end of file diff --git a/docs/designs/claims/use-cases.rst b/docs/designs/claims/use-cases.rst new file mode 100644 index 000000000000..5a618f0d0280 --- /dev/null +++ b/docs/designs/claims/use-cases.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +######### +Use Cases +######### + +.. glossary:: + + Parallel :term:`domain builds` + + When many domains need to be created and built, many :term:`domain builders` + compete for the same pools of memory, which can lead to inefficient NUMA + placement of :term:`guest physical memory` and thus suboptimal performance + for the domains. + + NUMA-aware claims can help solve this problem and ensure that memory + is available on the appropriate NUMA nodes. + + Domain builds + + The process of constructing and configuring :term:`domains` by + :term:`domain builders`, which includes installing :term:`claims`, + :term:`populating` memory, and setting up other resources before the + :term:`domains` are started. When multiple :term:`domain builders` can + run in parallel, this is referred to as parallel domain builds, which can + benefit from NUMA-aware claims because the domain builders are competing for + the same pools of memory on the NUMA nodes. + + Boot storms + + It is common for many domains to be booted at the same time, such as during + system startup or when large numbers of domains need to be started. + + Parallel migrations + + Similar to :term:`boot storms`, except that the domains are being migrated + instead of booted, which can happen when other hosts are being drained + for maintenance (host evacuation) or when workloads are being rebalanced + across hosts. diff --git a/docs/designs/index.rst b/docs/designs/index.rst index 54d45c2bc321..1f4537957827 100644 --- a/docs/designs/index.rst +++ b/docs/designs/index.rst @@ -14,3 +14,4 @@ and for those interested in the internal workings of Xen. launch/index cache-coloring + claims/index diff --git a/docs/glossary.rst b/docs/glossary.rst index 5c3229a8c4fd..f73de9b85cf6 100644 --- a/docs/glossary.rst +++ b/docs/glossary.rst @@ -12,6 +12,7 @@ Glossary to create and manage other domains on the system. domain + domains A domain is Xen's unit of resource ownership, and generally has at the minimum some RAM and virtual CPUs. @@ -58,13 +59,18 @@ Glossary In the code, "guest context" and "guest state" is considered in terms of the CPU architecture, and contrasted against hypervisor context/state. - In this case, it refers to all code running lower privilege privilege - level the hypervisor. As such, it covers all domains, including ones + In this case, it refers to all code running lower privilege level than + the hypervisor. As such, it covers all domains, including ones providing system services. hardware domain A :term:`domain`, commonly dom0, which shares responsibility with Xen about the system as a whole. - By default it gets all devices, including all disks and network cards, so + By default, it gets all devices, including all disks and network cards, and is responsible for multiplexing guest I/O. + + hypercall + hypercalls + A mechanism for a :term:`guest` to request services from the hypervisor. + Hypercalls are analogous to system calls in a traditional operating system. diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd new file mode 100644 index 000000000000..8d45322ba939 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd @@ -0,0 +1,43 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +classDiagram +class do_domctl["Args passed to do_domctl()"] { + +uint32_t cmd: XEN_DOMCTL_claim_memory + +uint32_t domain: Domain ID + +xen_domctl_claim_memory: Claim set +} +class xen_domctl_claim_memory["Claim set passed to do_domctl()"] { + +memory_claim_t* claims: Claim entries + +uint32_t nr_claims: Number of claim entries + +uint32_t pad: always 0 for future use +} +class memory_claim_t["Claim set: Array of claim entries"] { + +pages: Pages to claim + +node: Claim selector or node + +pad: always 0 for future use +} +class xc_domain_claim_memory["xc_domain_claim_memory()"] { + +xc_interface* xch + +uint32_t domid + +uint32_t nr_claims + +memory_claim_t* claims +} +class outstanding_pages["Total claims of domains"] { + global free = total_avail_pages - outstanding_claims + node free = node_avail_pages[node] - node_outstanding_claims[node] +} +class claim["XEN_DOMCTL_claim_memory"] { + +domain_set_outstanding_pages() + +domain_set_node_claims() +} +class domain["Claim fields in struct domain"] { + +outstanding_pages - Total outstanding claims of the domain + +node_claims - Sum of claims on all nodes of the domain + +claims[] - Array of claims on specific nodes +} +xen_domctl_claim_memory o--> memory_claim_t +do_domctl o--> xen_domctl_claim_memory +xc_domain_claim_memory ..> do_domctl: passes
Claim set +xc_domain_claim_memory ..> claim : calls do_domctl() +claim ..> xen_domctl_claim_memory : reads +claim ..> domain : sets +domain ..> outstanding_pages : updates outstanding claims diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd new file mode 100644 index 000000000000..10ed8f4aa094 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +actor DomainBuilder +participant OcamlStub as OCaml stub for
xc_domain
claim_memory +participant Libxc as xc_domain
claim_memory +participant Domctl as XEN_DOMCTL
claim_memory +#participant DomainLogic as claim_memory +participant Alloc as domain
set
outstanding_pages + +DomainBuilder->>OcamlStub: claims +OcamlStub->>OcamlStub: marshall claims -----> OCaml to C +OcamlStub->>Libxc: claims + +Libxc->>Domctl: do_domctl + +Domctl->>Domctl: copy_from_guest(claim) +Domctl->>Domctl: validate claim +Domctl->>Alloc: set
outstanding_pages +Alloc-->>Domctl: result +Domctl-->>Libxc: rc +Libxc-->>OcamlStub: rc +OcamlStub-->>DomainBuilder: claim_result diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd new file mode 100644 index 000000000000..372f2bb7a616 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +participant Toolstack +participant Xen +participant NUMA Node memory + +Toolstack->>Xen: XEN_DOMCTL_createdomain +Toolstack->>Xen: XEN_DOMCTL_max_mem(max_pages) + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(pages, node) +Xen->>NUMA Node memory: Claim pages on node +Xen-->>Toolstack: Claim granted + +Toolstack->>Xen: XEN_DOMCTL_set_nodeaffinity(node) + +loop Populate domain memory + Toolstack->>Xen: XENMEM_populate_physmap(memflags:node) + Xen->>NUMA Node memory: alloc from claimed node +end + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(0, NO_NODE) +Xen-->>Toolstack: Remaining claims released diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory.rst b/docs/guest-guide/dom/DOMCTL_claim_memory.rst new file mode 100644 index 000000000000..c0d0070a0c58 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory.rst @@ -0,0 +1,221 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +claim_memory +************ + + .. c:macro:: XEN_DOMCTL_claim_memory + + Hypercall command for installing claim sets for a domain. + + This command allows :term:`domain builders` to install a :term:`claim set` + for a domain, which the Xen hypervisor tracks and enforces during memory + allocation. + + The claimed memory is protected from other allocations and the domain's + memory requirements can be met even when other parallel domain builders + are also allocating memory for other domains in parallel. + + :ref:`designs/claims/installation:Claim set installation` describes how the + hypervisor processes the claim sets installed via this hypercall command. + +Hypercall API +------------- + +See :ref:`designs/claims/installation:Claim sets` +for more details on the claim sets data structure. + +Definitions +^^^^^^^^^^^ + +Mode +~~~~ + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_SET + + Install the given claim set for the domain. + + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_GET + + Retrieve the claim set for the current claims of the domain. + +Target selectors +~~~~~~~~~~~~~~~~ + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_HOST + + Special target selector for host-wide claims, + which can be satisfied from any NUMA node. + + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_LEGACY + + Special target selector for legacy claims, which is interpreted as the + total memory target for the domain, with existing allocations subtracted + from it to determine the domain's new total host-wide outstanding claim. + It is provided for compatibility with existing :term:`domain builders` + and can only be used in a single-entry claim set. + +domctl.h structure +^^^^^^^^^^^^^^^^^^ + + .. code-block:: C + + struct xen_memory_claim { + uint64_aligned_t pages; /* Number of pages to claim */ + uint32_t target; /* NUMA node or claim type like legacy or host-wide */ + uint32_t cmd; /* Command reserved for future use, initialize to 0 */ + }; + typedef struct xen_memory_claim memory_claim_t; + DEFINE_XEN_GUEST_HANDLE(memory_claim_t); + + /* Special claim targets for the target field of memory_claim_t */ + #define XEN_DOMCTL_CLAIM_MEMORY_HOST 0x80000000U /* Host-wide claims */ + #define XEN_DOMCTL_CLAIM_MEMORY_LEGACY 0x40000000U /* Legacy semantics */ + + /* + * XEN_DOMCTL_claim_memory + * + * Install a claim set to claim memory for a guest domain. Claims work like + * tickets in exchange for allocating memory for a domain later. + */ + struct xen_domctl_claim_memory { + /* IN/OUT: Array of struct xen_memory_claim */ + XEN_GUEST_HANDLE_64(memory_claim_t) claim_set; + /* IN/OUT: Number of records in the claim_set array handle. */ + uint32_t nr_entries; + uint32_t mode; + #define XEN_DOMCTL_CLAIM_MEMORY_GET 0U /* Get a claim set for the domain. */ + #define XEN_DOMCTL_CLAIM_MEMORY_SET 1U /* Set a claim set for the domain. */ + }; + + +C API by libxenctrl +------------------- + + .. c:function:: int xc_domain_claim_memory(xch, domid, mode, nr_entries, \ + claim_set) + + :param xch: The :term:`libxenctrl` interface to use for the hypercall + :param domid: The ID of the domain for which to install the claim set + :param mode: The mode for the claim set installation + :param nr_entries: The number of entries in the claim set + :param claim_set: The claim set to install for the domain + :type xch: xc_interface * + :type domid: uint32_t + :type mode: uint32_t + :type nr_entries: uint32_t * + :type claim_set: memory_claim_t * + :returns: 0 on success, or a negative error code on failure. + + C API function for installing or retrieving claim sets for a domain + using the :expr:`XEN_DOMCTL_claim_memory` hypercall command. + + This function allows :term:`domain builders` to install a + :term:`claim set` for a domain, which the Xen hypervisor + tracks and enforces during memory allocation and can also + be used to retrieve the current claim set for a domain. + + When mode is :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_SET`, the former mode + is used, where the function validates and installs the given claim set. + ``nr_entries`` specifies the number of entries in the ``claim_set`` array, + and ``claim_set`` points to the array of :c:type:`memory_claim_t` entries. + + When mode is :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_GET`, the function + retrieves the current claim set into the memory pointed to by ``claim_set``. + The number of claims retrieved is stored in the variable pointed to by + ``nr_entries``. + + This function is part of the :term:`libxenctrl` library. + + Corresponding OCaml bindings are also available for this function in the + :term:`Xenctrl` OCaml library, providing a convenient interface for OCaml + :term:`domain builders` to install claim sets for a domain. + +C API Usage example +^^^^^^^^^^^^^^^^^^^ + + The example below shows how a domain builder can install a claim set and + later replace or clear it. :c:expr:`memory_claim_t` contains an additional + field for future expansion; zero-initialise the structure or use designated + initializers to ensure forward compatibility. + + .. code-block:: C + + #include + + void install_example_claims(xc_interface *xch, uint32_t domid) + { + /* + * Claim 1024 pages on node 0, 1024 pages on node 1, and by setting + * the total claim target to 3072 pages, an additional host-wide claim of + * 1024 pages which is never bound to any specific node is also installed. + */ + memory_claim_t claims[] = { + {.pages = 1024, .target = 0}, + {.pages = 1024, .target = 1}, + {.pages = 1024, .target = XEN_DOMCTL_CLAIM_MEMORY_HOST}, + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(claims), claims); + + /* Replace the claim set with claims on nodes 1, 2, and 3 */ + memory_claim_t claims2[] = { + {.pages = 1024, .target = 1}, + {.pages = 1024, .target = 2}, + {.pages = 1024, .target = 3}, + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(claims2), claims2); + + /* Release all remaining claims once the domain is built */ + memory_claim_t clear[] = { + {.pages = 0, .target = XEN_DOMCTL_CLAIM_MEMORY_HOST} + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(clear), clear); + } + +Using the Xenctrl OCaml bindings +-------------------------------- + + The OCaml bindings for libxenctrl also provide an interface for installing + claim sets using the :c:expr:`XEN_DOMCTL_claim_memory` hypercall command. + + The example below shows how to install a claim set and later release it + using the OCaml bindings. + + .. code-block:: OCaml + + let install_example_claims xch domid = + let claims = [| + { Xenctrl.pages = 1024L; node = 0l }; + { Xenctrl.pages = 1024L; node = 1l }; + { Xenctrl.pages = 3072L; node = XEN_DOMCTL_CLAIM_MEMORY_TOTAL }; + |] in + Xenctrl.domain_claim_memory xch domid claims; + + let release_all_claims xch domid = + let clear = [| + { Xenctrl.pages = 0L; node = XEN_DOMCTL_CLAIM_MEMORY_TOTAL }; + |] in + Xenctrl.domain_claim_memory xch domid clear + +Call sequence diagram +--------------------- + + The following sequence diagram illustrates the call flow for claiming memory + for a domain using this hypercall command from an OCaml domain builder: + + .. mermaid:: DOMCTL_claim_memory-seqdia.mmd + :caption: Sequence diagram: Call flow for claiming memory for a domain + +Claim workflow +-------------- + + This diagram illustrates a workflow for claiming and populating memory: + + .. mermaid:: DOMCTL_claim_memory-workflow.mmd + :caption: Workflow diagram: Claiming and populating memory for a domain + +Used functions & data structures +-------------------------------- + + This diagram illustrates the key functions and data structures involved in + installing claims via the :c:expr:`XEN_DOMCTL_claim_memory` hypercall command: + + .. mermaid:: DOMCTL_claim_memory-data.mmd + :caption: Diagram: Function and data relationships for installing claims diff --git a/docs/guest-guide/dom/index.rst b/docs/guest-guide/dom/index.rst new file mode 100644 index 000000000000..cb33a230eb5d --- /dev/null +++ b/docs/guest-guide/dom/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +`DOMCTL Hypercalls` +=================== + +Through `DOMCTL` `hypercalls`, `toolstacks` in privileged domains can perform +operations related to domain management. This includes operations such as +creating, destroying, and modifying domains, as well as querying domain +information. + +.. toctree:: + :maxdepth: 2 + + DOMCTL_claim_memory diff --git a/docs/guest-guide/index.rst b/docs/guest-guide/index.rst index 5455c67479cf..d9611cd7504d 100644 --- a/docs/guest-guide/index.rst +++ b/docs/guest-guide/index.rst @@ -3,6 +3,29 @@ Guest documentation =================== +Xen exposes a set of hypercalls that allow domains and toolstacks in +privileged contexts (such as Dom0) to request services from the hypervisor. + +Through these hypercalls, privileged domains can perform privileged operations +such as querying system information, memory and domain management, +and enabling inter-domain communication via shared memory and event channels. + +These hypercalls are documented in the following sections, grouped by their +functionality. Each section provides an overview of the hypercalls, their +parameters, and examples of how to use them. + +Hypercall API documentation +--------------------------- + +.. toctree:: + :maxdepth: 2 + + dom/index + mem/index + +Hypercall ABI documentation +--------------------------- + .. toctree:: :maxdepth: 2 diff --git a/docs/guest-guide/mem/XENMEM_claim_pages.rst b/docs/guest-guide/mem/XENMEM_claim_pages.rst new file mode 100644 index 000000000000..5128317cb821 --- /dev/null +++ b/docs/guest-guide/mem/XENMEM_claim_pages.rst @@ -0,0 +1,102 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _XENMEM_claim_pages: + +claim_pages +*********** + + .. note:: This API is deprecated; + Use :c:expr:`XEN_DOMCTL_claim_memory` for new code. + + .. c:macro:: XENMEM_claim_pages + + Hypercall command for installing legacy claims. + + :ref:`designs/claims/installation:Legacy claim installation` describes + the API for installing legacy claims via this hypercall command. + + It passes a single claim entry to the hypervisor via a + :c:struct:`xen_memory_reservation` structure with the page count in the + :c:member:`xen_memory_reservation.nr_extents` field and the domain ID + :c:member:`xen_memory_reservation.domid` field. The claim entry's target is + implicitly global, and the legacy claim path is invoked in the hypervisor + to process the claim: + +Data structure for the hypercall command for installing legacy claims: + + .. c:struct:: xen_memory_reservation + + Structure for passing claim requests to the hypervisor via + :c:macro:`XENMEM_claim_pages` and other memory :term:`hypercalls`. + + .. code-block:: C + + struct xen_memory_reservation { + xen_pfn_t * extent_start; // not used for XENMEM_claim_pages + xen_ulong_t nr_extents; // pass page counts to claim + unsigned int extent_order; // must be 0 + unsigned int mem_flags; // XENMEMF flags. + domid_t domid; // domain to apply the claim to + }; + typedef struct xen_memory_reservation xen_memory_reservation_t; + + .. c:member:: xen_ulong_t nr_extents + + For :c:macro:`XENMEM_claim_pages`, the page count to claim. + + .. c:member:: domid_t domid + + Domain ID for the claim. + + .. c:member:: unsigned int mem_flags + + Not used for :c:macro:`XENMEM_claim_pages` (must be 0) + + In principle, it supports all the :c:expr:`XENMEMF_*` flags, including + the possibility of passing a single NUMA node ID, but using it to pass + a NUMA node ID is not currently supported by the legacy claim path. + + During review of the NUMA extension of the legacy claim path, it + was used, but the request was made to instead create a new hypercall + which is now :c:macro:`XEN_DOMCTL_claim_memory` with support for claim sets. + + .. c:member:: unsigned int extent_order + .. c:member:: xen_pfn_t *extent_start + + Both are not used for :c:macro:`XENMEM_claim_pages`, but are used for other + memory :term:`hypercalls`. + +See :ref:`designs/claims/installation:Legacy claim installation` for details. + +API example using libxenctrl +---------------------------- + + The example below claims pages, populates the domain, + and then clears the claim. + + .. code-block:: C + + #include + + int build_with_claims(xc_interface *xch, uint32_t domid, + unsigned long nr_pages) + { + int ret; + + /* Claim pages for the domain build. */ + ret = xc_domain_claim_pages(xch, domid, nr_pages); + if ( ret < 0 ) + return ret; + + /* Populate the domain's physmap. */ + ret = xc_domain_populate_physmap(xch, domid, /* ... */); + if ( ret < 0 ) + return ret; + + /* Release any remaining claim after populating the domain memory. */ + ret = xc_domain_claim_pages(xch, domid, 0); + if ( ret < 0 ) + return ret; + + /* Unpause the domain to allow it to run. */ + return xc_unpause_domain(xch, domid); + } diff --git a/docs/guest-guide/mem/index.rst b/docs/guest-guide/mem/index.rst new file mode 100644 index 000000000000..042fb88bfbeb --- /dev/null +++ b/docs/guest-guide/mem/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +`MEMCTL Hypercalls` +------------------- + +The XENMEM hypercall interface allows guests to perform various control +operations related to memory management. + +.. toctree:: + :maxdepth: 2 + + XENMEM_claim_pages -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:47:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:47:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301040.1575383 (Exim 4.92) (envelope-from ) id 1wKKnp-0003xO-5d; Tue, 05 May 2026 18:47:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301040.1575383; Tue, 05 May 2026 18:47:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKnp-0003wu-1T; Tue, 05 May 2026 18:47:29 +0000 Received: by outflank-mailman (input) for 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=?utf-8?B?TktyTnl2NmZSUWVCd01PTXkzQWZpOHd6Z2U0OThObTd3bERmNDQzdz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: b278bc9d-caef-4c0d-3a76-08deaad6be63 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 18:47:23.0095 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: F1KM3l7GfWkqbHoc0P1RFFPVFFNOEWuNnhIl9xYuucwMiAA5czgUM7K4HLJnxmG8orhglTQuq/V9Ss3lD1aQ0Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR03MB8194 X-purgate-ID: tlsNG-ebf023/1778006846-2AD643FF-2B68D117/0/0 X-purgate-type: clean X-purgate-size: 3902 On Tue, May 05, 2026 at 05:53:31PM +0200, Jürgen Groß wrote: > SUSE QA is seeing a problem with PCI-passthrough of a SR-IOV to a PV guest > running a 6.4 based kernel, but I can reproduce the problem with upstream > kernel, too. > > The guest is configured with "e820_host=1", but the PCI region on the host > isn't marked as "reserved" in the memory map, so it won't be reserved in > the either. But that's how it should be, device BARs shouldn't be in reserved regions on the memory map (albeit we have seen this fairly often). > As the guest doesn't have the ACPI table available describing the PCI regions, > /proc/iomem in the guest won't include those regions as used, resulting in > the kernel's resource management to use those areas for potential memory: > > resource: avoiding allocation from e820 entry [mem 0x78edc000-0x79868fff] > resource: avoiding allocation from e820 entry [mem 0x79d2a000-0x8fffffff] > resource: remaining [mem 0x0000000090000000-0x00000000ffdfffff] available > resource: avoiding allocation from e820 entry [mem 0xc7ffc000-0xc7ffcfff] > resource: remaining [mem 0x0000000090000000-0x00000000c7ffbfff] available > > dom0 /proc/iomem: > ... > 80000000-8fffffff : PCI MMCONFIG 0000 [bus 00-ff] > 90000000-c7ffbfff : PCI Bus 0000:00 ← PCI MMIO window begins here > 90000000-900fffff : PCI Bus 0000:01 ← I350 VFs assigned in this range > c6000000-c70fffff : PCI Bus 0000:04 > > dom0 e820 map: > ... > Xen: [mem 0x0000000079869000-0x0000000079d29fff] ACPI NVS > Xen: [mem 0x0000000079d2a000-0x000000008fffffff] reserved > Xen: [mem 0x00000000c7ffc000-0x00000000c7ffcfff] reserved > Xen: [mem 0x00000000fbffc000-0x00000000fbffcfff] reserved > ... > > domU /proc/iomem: > ... > 00100000-78f06fff : System RAM > 01000000-01ffffff : Kernel code > ... > 90000000-97ffffff : System RAM But that's not in the mfn address space, it's just RAM in the pfn space of the guest? > fee00000-fee00fff : Local APIC > > domU e820 map: > ... > Xen: [mem 0x0000000079869000-0x0000000079d29fff] ACPI NVS > Xen: [mem 0x0000000079d2a000-0x000000008fffffff] reserved > Xen: [mem 0x00000000c7ffc000-0x00000000c7ffcfff] reserved > Xen: [mem 0x00000000fbffc000-0x00000000fbffcfff] reserved > ... > > The VF is showing up near 0x90000 > pci 0000:00:00.4: [8086:1520] type 00 class 0x020000 > pci 0000:00:00.4: reg 0x10: [mem 0x90004000-0x90007fff 64bit pref] > pci 0000:00:00.4: reg 0x1c: [mem 0x90024000-0x90027fff 64bit pref] While the above addresses are in the mfn address space? I assume this causes issues because MMIO is identity mapped in the pfn space. > pcifront pci-0: New device on 0000:00:00.4 found. > pcifront pci-0: claiming resource 0000:00:00.4/0 > pci 0000:00:00.4: can't claim BAR 0 [mem 0x90004000-0x90007fff 64bit pref]: > address conflict with System RAM [mem 0x90000000-0x97ffffff] > pcifront pci-0: Could not claim resource 0000:00:00.4/0! Device offline. > Try using e820_host=1 in the guest config. > pcifront pci-0: claiming resource 0000:00:00.4/3 > pci 0000:00:00.4: can't claim BAR 3 [mem 0x90024000-0x90027fff 64bit pref]: > address conflict with System RAM [mem 0x90000000-0x97ffffff] > pcifront pci-0: Could not claim resource 0000:00:00.4/3! Device offline. > Try using e820_host=1 in the guest config. > > My first idea for solving this was to add the PCI regions from dom0's > /proc/iomem to the e820 map of the guest, but this is more a hack than a sane > solution. > > Thoughts? I think the issue is that the guest has created a pfn RAM range when there is none in the provided e820. When using "e820_host=1" the guest should be limited to creating pfns only in the ranges marked as RAM on the host e820 memory map. Creating a pfn range over a hole in the e820 shouldn't happen. Regards, Roger. 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a81ed6b89sm418085185e9.1.2026.05.05.12.17.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 12:17:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778008630; x=1778613430; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=siQWjo0zkKVV3Ea+j1v/5KOUec3pF3WyM2cdpzEDjsg=; b=I8AZ4G4JVDT3tsZaHFjjbfV0wjdG2wgz+ij8r03p4aTAXbD86DIl2CjQIjJpUETzvy uyhKuC0kbqm6COJh2fWIxXtkezrzUiiDALOrxCk8nme4J0Jw1FCtXACDRUDeY75pSKbf jOkCOLFYuozIqTkbdYTR3PsGoDqNI7BSuGXLQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778008630; x=1778613430; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=siQWjo0zkKVV3Ea+j1v/5KOUec3pF3WyM2cdpzEDjsg=; b=Ztg/a7wa6WixLuR8tLjkDY7RGiEnrVxJBw4Zs8z9XmqeZ+j+4FN60W6rReCyJyDnsd yO1yBlromxAByuPdD0x5iAtlbMN6M5y6xcs6iKmYyAc7Hm0grEZFogkDA6BO4QVlowyN WjmAwZzQ5HzujQLonQ7a/mxnom8A3hO5OQx1lLgNiExQYP1cH4eiFLJAHnw0F7f4Rtvb oeLrHTiiF4KzVzcYFEvMnuDDZ+ZBHkOyb91vHKW6CEpCi3V66h/0ryaOMdJGTqppefS4 Dp9Yn2s/GCGw6Nkpn4AhJTntqMyhbqqfUnDl52v5gw+d7HGeed6ESiGRybLKn31Ei5Zd ueug== X-Gm-Message-State: AOJu0YzusoRB77Uc16JSnB+qEn67AFWO+VT4uc7Dyikn1TPp+ZlqLzRx YCgBU7ncz7Gwbv9ZUUf2y+XC8YRIeBmWuG3/NgGeLOT1s0hzr02WcXocf3gAZMbZ8CrULGWl3a6 6JTB+zMM= X-Gm-Gg: AeBDieuzmFDJDlZPUfBuBRgaXgp9X9xaQ+cq3mUbAFdxjLezWOjEMBHb0sGIWeUMHn+ LvfcCWsaXtjiUdroQ/HBDMv0NniaeQIWwz8sJnRYvMb7DzdC9JWXTZ7CzOwxfGUezoDpNPivKQU HsY6DnYzeDXiqtCw8+XaG7XsL7cs9acwpCwoCqAC5a8u3M7WcoDrXrTuIzdU2N1KNrpGOD6BoFl cnNIqz3FM14tyXd1kOi3WXWM8CdufgcylhhGH91Hzqe9xZYjG0ozAdpTdVJ0DAWl+bNQ6X6OlV5 TrtUIzi5xTjN0Wgv1DU4VwvKlfYS1or07h2vDNds6gSNNBlwHZD989x8ZzmaEEZAGucF8KV2wuB B/9xjF+dUgeuRbWX0uCbSBkhHbwJ3nApIGGHyjj1uuzdvxT7mdebUY4tW7rgnT0iUX3PI+eorjA LWJmlhNMipdfGF6f4DYoLJCW016e31t3kkroFelOfAgs6/GsrqyzpLmML9r7wEdcT/uEDWCgdQv SLaXe5ChvYm9go= X-Received: by 2002:a05:600c:c107:b0:48a:52d4:888c with SMTP id 5b1f17b1804b1-48e51e0bb23mr7842215e9.3.1778008629597; Tue, 05 May 2026 12:17:09 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH v2] CI: Refresh the Debian 12 cppcheck container Date: Tue, 5 May 2026 20:17:08 +0100 Message-Id: <20260505191708.1432070-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778008630-6CF62CF5-CDC01EEC/10/63158204843 X-purgate-type: spam X-purgate-size: 7755 From: Javi Merino Rework the container to derive from bookworm-slim, and to build and run cppcheck as a normal user. User heredocs for readability and use apt-get --no-install-recommends to keep the size down. Changed the libpcre3-dev dependency to libpcre3, as the -dev package is only needed for building, not for running. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein v2: * Switch to bookworm-slim * Perform a SHA check on downloaded content I've deployed this container already. The new size is 233.47 MiB, as opposed to 307.40 MiB before (as given by Gitlab). https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2502273068 --- .../debian/12-arm64v8-cppcheck.dockerfile | 86 +++++++++++++++++++ .../build/debian/bookworm-cppcheck.dockerfile | 54 ------------ automation/gitlab-ci/build.yaml | 12 +-- automation/scripts/containerize | 2 +- 4 files changed, 93 insertions(+), 61 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-cppcheck.dockerfile delete mode 100644 automation/build/debian/bookworm-cppcheck.dockerfile diff --git a/automation/build/debian/12-arm64v8-cppcheck.dockerfile b/automation/build/debian/12-arm64v8-cppcheck.dockerfile new file mode 100644 index 000000000000..50d2614453de --- /dev/null +++ b/automation/build/debian/12-arm64v8-cppcheck.dockerfile @@ -0,0 +1,86 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim AS builder + +ENV DEBIAN_FRONTEND=noninteractive +ENV CPPCHECK_VERSION=2.7 + +# dependencies for cppcheck build +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:02:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301069.1575405 (Exim 4.92) (envelope-from ) id 1wKLyQ-0008Pv-Jd; Tue, 05 May 2026 20:02:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301069.1575405; Tue, 05 May 2026 20:02:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKLyQ-0008Po-G6; Tue, 05 May 2026 20:02:30 +0000 Received: by outflank-mailman (input) for mailman id 1301069; Tue, 05 May 2026 20:02:28 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKLyO-0008Pi-Qt for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wKLyO-0015nh-2M for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: from mail-lj1-f180.google.com ([209.85.208.180]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wKLyO-00GDfj-27 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: by mail-lj1-f180.google.com with SMTP id 38308e7fff4ca-38e97e73234so54819981fa.1 for ; Tue, 05 May 2026 13:02:28 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:To:Subject:Message-ID:Date: From:MIME-Version; bh=rqePkcOqKKSlWKJFzPSR0bkrn6hbfy2LL5DYY7SBum8=; b=zT2fRlw phrMkxd2zV6e2R0fRg5kzxMXBXM2+CLQ70TeEtlBuKesJvqHCuPC/NEIGM4wSDUGVcOIcOKpVJbPd OjgbnnLwBbmkFrXYziAy1yGH9k9ZarffgCSYa61+DRnzWAreH8/HCCSwhD3nc9r7lt2pNxeV7Qwp3 vTLy+fyFMg=; X-Gm-Message-State: AOJu0YwzAMB5wNUiJhjyd+F0A4HF+Tx4BTG2YO5TxXOIoDIqluKmhVC9 zwDmrMPrsJqcGaT64EMc282MB6Kr1DoJoFEjkdDXoGZ+XRdewniMrwNZJJFADaArEttKZRNUh2P m8MSNzJ+7w40NAOztxdJTJ6QWb1QzRSQ= X-Received: by 2002:a2e:a588:0:b0:38e:a12c:418c with SMTP id 38308e7fff4ca-393c410af2dmr2819051fa.11.1778011347480; Tue, 05 May 2026 13:02:27 -0700 (PDT) MIME-Version: 1.0 From: Cody Zuschlag Date: Tue, 5 May 2026 22:02:16 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AVHnY4I0i28I8kZ_YWlqHZ5EDkxbkE2r30nYyvs7aHGvWHBLz6ipyX2TNDHTSGM Message-ID: Subject: [ANNOUNCE] - Call for agenda items for May 7 Xen Community Call @ 15:00 UTC To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="000000000000c5f5990651178608" --000000000000c5f5990651178608 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi everyone, It=E2=80=99s time for the May Xen Project Community Call, happening this Th= ursday at 4 pm UK time. We=E2=80=99d love to have you join. You=E2=80=99re welcome to participate o= r just listen in. It=E2=80=99s a great way to stay aligned, hear what others are working = on, and help move a few ongoing topics forward. *Preparation*: Please take a moment to review and update the agenda ahead of the call: =F0=9F=91=89 Agenda Feel free to: - Add topics or updates - Suggest anything we can drop or defer - Include links to patches, threads, or docs where helpful *Call Details: * Date: Thursday, 7 May 2026 Time: 15:00 UTC (agenda starts at 15:05 UTC) Find your local timezone here Join: https://meet.jit.si/XenProjectCommunityCall We=E2=80=99ll open the room at 15:00 UTC and start the agenda at 15:05 UTC = to give everyone a few minutes to join. Want to be CC=E2=80=99d on future calls? Add or remove yourself from our Sign-up Sheet See you there! Cody Zuschlag Xen Project - Community Manager --000000000000c5f5990651178608 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi ever= yone,

It=E2= =80=99s time for the May Xen Project Community Call, happening this Thursda= y at 4 pm UK time.

We=E2=80=99d love to have you join. You=E2=80=99re welcome to partic= ipate or just listen in. It=E2=80=99s a great way to stay aligned, hear wha= t others are working on, and help move a few ongoing topics forward.

Preparation= :
Please take a moment to review and updat= e the agenda ahead of the call:
=F0=9F=91= =89 Agenda

Feel free to:
- Add topics or updates
- Suggest anything we can drop or defer
= - Include links to patches, threads, or docs where helpful

Call Details:
Date: Thursday, 7 May 2026
Time: 15:00 UTC (agenda starts at 15:05 UTC)
Find your local timezone here

Join: https:/= /meet.jit.si/XenProjectCommunityCall
<= br style=3D"font-size:inherit">We=E2=80=99ll open the room at 15:00 UTC and= start the agenda at 15:05 UTC to give everyone a few minutes to join.

Want to be CC=E2= =80=99d on future calls?
Add or remove you= rself from our Sign-up Sheet

See you there!

<= div dir=3D"ltr">

= Cody Zuschlag
Xen Project - Community Manager
--000000000000c5f5990651178608-- From xen-devel-bounces@lists.xenproject.org Tue May 05 20:33:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:33:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301081.1575418 (Exim 4.92) (envelope-from ) id 1wKMSN-0004TX-Vj; Tue, 05 May 2026 20:33:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301081.1575418; Tue, 05 May 2026 20:33:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMSN-0004TQ-Sm; Tue, 05 May 2026 20:33:27 +0000 Received: by outflank-mailman (input) for mailman id 1301081; Tue, 05 May 2026 20:33:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMSL-0004TK-Ot for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:33:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKMSK-0078Ld-1Y for xen-devel@lists.xenproject.org; Tue, 05 May 2026 22:33:24 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa5403-e002-0a2a0a5209dd-0a2a45039108-8 for ; Tue, 05 May 2026 22:33:23 +0200 Received: from [136.143.188.51] (helo=sender4-of-o51.zoho.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa5411-672d-0a2a45030019-888fbc335283-3 for ; Tue, 05 May 2026 22:33:23 +0200 Received: by mx.zohomail.com with SMTPS id 1778013197458240.2115813323103; Tue, 5 May 2026 13:33:17 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=zoho header.d=apertussolutions.com header.i="dpsmith@apertussolutions.com" header.h="Message-ID:Date:MIME-Version:Subject:To:References:From:In-Reply-To:Content-Type:Content-Transfer-Encoding" ARC-Seal: i=1; a=rsa-sha256; t=1778013200; cv=none; d=zohomail.com; s=zohoarc; b=MolC+U6dDRgKzEgEsYoJgtFaUaV8n+ElOL9dZY0AGCRi3X8aFbO6qkA50UR/1PTlnkAuXJ0/dPka9x1CDye0dx2fF/HjMTkPEjQs9CPtTijAyzvtN11iYszSys5zdGcRI/Ojhs9D2CTsQ8LnQgFBMWxADBSdQtaDhi9udbZeXME= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778013200; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=1ymrRuK40LDWL4DAPkTL6UWbQmdGYGFd2FHyD/hl/RU=; b=HPJqjcch0PtOeNrg69GG4pK+3TConFsd0zmxbSfNFk56qp/EpTovy2zcmoaak+FjG1zigKwOQlrdK3KAdIny4ARj9Yq+6+h5ziVpufA07BRSzM62dfFDz+SaunSB9E2Eb2yhQiFYabBB+ZxW2h7Z9jwkzW/qhzZ7UMO0jWveefA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1778013200; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To:Cc; bh=1ymrRuK40LDWL4DAPkTL6UWbQmdGYGFd2FHyD/hl/RU=; b=Bo8gWvoWSLR8+7vtSvOPFzq+ULBWxX4pSiho0Rx5dTwnGYdGq/tcg0T2MwSucW0G RE6U7JabUEHHDMC6fc//Udutgxb1sBXB3nz0yv+m/nwQgkOaXUNgOeb/hNkO49N7D8D VhmdHVysNy30NOQpYNsMz4zRs4pJrzM7sD9Mw/V8= Message-ID: <800d7a78-6125-4bf5-9e5d-5f3befcaa9bf@apertussolutions.com> Date: Tue, 5 May 2026 16:33:16 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" References: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Language: en-US From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External X-purgate-ID: tlsNG-33051d/1778013203-2997D938-DD9FF2D5/0/0 X-purgate-type: clean X-purgate-size: 1941 On 5/1/26 10:17, Dmytro Prokopchuk1 wrote: > When booting Xen with CONFIG_USBAN=y and CONFIG_XSM_FLASK=y, > UBSAN reports undefined behaviour in avc_dump_av() due to a left > shift on a signed int: > > (XEN) [ 1.104348] ================================================================================ > (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 > (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represented in type 'int' > (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 > (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 1.108848] CPU: 0 > (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0xd4 > [...] > (XEN) [ 1.146320] Xen call trace: > (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0xd4 (PC) > (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bounds+0x1a0/0x290 (LR) > (XEN) [ 1.147868] > (XEN) [ 1.148177] ================================================================================ > > This can be solved by making 'perm' an unsigned 32-bit type (u32). > > Signed-off-by: Dmytro Prokopchuk > --- > Test CI pipeline: > https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 > --- > xen/xsm/flask/avc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c > index 3d39e55cae..9c3ffdc070 100644 > --- a/xen/xsm/flask/avc.c > +++ b/xen/xsm/flask/avc.c > @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) > */ > static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) > { > - int i, i2, perm; > + int i, i2; > + u32 perm; > > if ( av == 0 ) > { Acked-by: Daniel P. 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Tue, 05 May 2026 13:34:31 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> In-Reply-To: <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 23:34:18 +0300 X-Gm-Features: AVHnY4K3UZk2RzYUFWDotoJb9uIiNxdTcGP2Cj4IhABczaSfQaf-V__RkQSzYVA Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778013272-A2B64938-1ED61C94/0/0 X-purgate-type: clean X-purgate-size: 15558 Hi Luca, Thanks for the feedback. On Wed, Apr 29, 2026 at 11:06=E2=80=AFAM Luca Fancellu wrote: > > Hi Mykola, > > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > index e38566b0b7..4d1289776b 100644 > > --- a/xen/arch/arm/suspend.c > > +++ b/xen/arch/arm/suspend.c > > @@ -1,9 +1,190 @@ > > /* SPDX-License-Identifier: GPL-2.0-only */ > > > > +#include > > #include > > > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > struct cpu_context cpu_context =3D {}; > > > > +static int can_system_suspend(void) > > +{ > > + int ret =3D 0; > > + struct domain *d; > > + > > + rcu_read_lock(&domlist_read_lock); > > + > > + for_each_domain ( d ) > > + { > > + bool domain_suspended; > > + > > + spin_lock(&d->shutdown_lock); > > + domain_suspended =3D d->is_shut_down && > > + d->shutdown_code =3D=3D SHUTDOWN_suspend; > > + spin_unlock(&d->shutdown_lock); > > + > > + if ( domain_suspended ) > > + continue; > > + > > + printk(XENLOG_ERR > > + "System suspend requires all domains to be shut down fo= r suspend (dom%d: isn't in suspend state)\n", > > d->domain_id is unsigned if I=E2=80=99m not mistaken, it wants %u (typede= f uint16_t domid_t;) Ack, I will fix it in v9. > > > + d->domain_id); > > + > > + ret =3D -EBUSY; > > + break; > > + } > > + > > + rcu_read_unlock(&domlist_read_lock); > > + > > + return ret; > > +} > > + > > +/* Xen suspend. data identifies the domain that initiated suspend. */ > > +static void system_suspend(void *data) > > +{ > > + int status; > > + unsigned long flags; > > + struct domain *d =3D (struct domain *)data; > > + > > + BUG_ON(system_state !=3D SYS_STATE_active); > > + > > + system_state =3D SYS_STATE_suspend; > > + > > + printk("Xen suspending...\n"); > > + > > + freeze_domains(); > > + scheduler_disable(); > > + > > + status =3D can_system_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_scheduler; > > When we have an error and we get the resume_scheduler path, we apply back= the > context of the guest saved previously in do_psci_1_0_system_suspend(), so= am I > correct saying the guest won=E2=80=99t get any PSCI error back and we res= ume the guest > from the guest resume entrypoint? > > In case, should we have a different path that returns a PSCI error (PSCI_= *) into the guest > x0, and skips the context restore? You are right about the current control flow: once the virtual SYSTEM_SUSPEND request has been accepted and the domain has been parked, a later failure in the Xen-wide suspend path resumes the domain through the n= ormal domain resume path, rather than returning a PSCI error from the original ca= ll. This is intentional in the current design. The virtual PSCI SYSTEM_SUSPEND path parks the domain and saves its resume context. The actual Xen-wide hos= t suspend is a separate step that is attempted only after all domains are suspended. So a failure in the later Xen-wide suspend step is treated as an abort of t= he host suspend attempt after the domain suspend was already accepted. The dom= ain is then resumed through the existing domain resume path, similarly to the toolstack/xl suspend-resume flow, rather than by re-entering the guest PSCI call path and modifying the saved vCPU context again. I agree this design is not obvious from the patch. I will clarify the commi= t message and comments. If you or the maintainers think that failures before = the physical SYSTEM_SUSPEND call succeeds should be reported back through the original virtual PSCI call, then this would require a different flow. I was trying to avoid that extra complexity in this series. > > > + } > > + > > + /* > > + * Non-boot CPUs have to be disabled on suspend and enabled on res= ume > > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to= PSCI > > + * CPU_OFF to be called by each non-boot CPU. Depending on the und= erlying > > + * platform capabilities, this may lead to the physical powering d= own of > > + * CPUs. > > + */ > > + status =3D disable_nonboot_cpus(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_nonboot_cpus; > > + } > > + > > + time_suspend(); > > + > > + status =3D iommu_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_time; > > + } > > + > > + console_start_sync(); > > + status =3D console_suspend(); > > + if ( status ) > > + { > > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=3D%d\n= ", status); > > + system_state =3D SYS_STATE_resume; > > + goto resume_end_sync; > > + } > > + > > + local_irq_save(flags); > > + status =3D gic_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_irqs; > > + } > > + > > + set_init_ttbr(xen_pgtable); > > + > > + /* > > + * Enable identity mapping before entering suspend to simplify > > + * the resume path > > + */ > > + update_boot_mapping(true); > > + > > + if ( prepare_resume_ctx(&cpu_context) ) > > + { > > + status =3D call_psci_system_suspend(); > > + /* > > + * If suspend is finalized properly by above system suspend PS= CI call, > > + * the code below in this 'if' branch will never execute. Exec= ution > > + * will continue from hyp_resume which is the hypervisor's res= ume point. > > + * In hyp_resume CPU context will be restored and since link-r= egister is > > + * restored as well, it will appear to return from prepare_res= ume_ctx. > > + * The difference in returning from prepare_resume_ctx on syst= em suspend > > + * versus resume is in function's return value: on suspend, th= e return > > + * value is a non-zero value, on resume it is zero. That is wh= y the > > + * control flow will not re-enter this 'if' branch on resume. > > + */ > > + if ( status ) > > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err= =3D%d\n", > > + status); > > + } > > + > > + system_state =3D SYS_STATE_resume; > > + update_boot_mapping(false); > > + > > + gic_resume(); > > + > > + resume_irqs: > > + local_irq_restore(flags); > > + > > + console_resume(); > > + resume_end_sync: > > + console_end_sync(); > > + > > + iommu_resume(); > > + > > + resume_time: > > + time_resume(); > > + > > + resume_nonboot_cpus: > > + /* > > + * The rcu_barrier() has to be added to ensure that the per cpu ar= ea is > > + * freed before a non-boot CPU tries to initialize it (_free_percp= u_area() > > + * has to be called before the init_percpu_area()). This scenario = occurs > > + * when non-boot CPUs are hot-unplugged on suspend and hotplugged = on resume. > > + */ > > + rcu_barrier(); > > + enable_nonboot_cpus(); > > + > > + resume_scheduler: > > + scheduler_enable(); > > + thaw_domains(); > > + > > + system_state =3D SYS_STATE_active; > > + > > + printk("Resume (status %d)\n", status); > > + > > + domain_resume(d); > > +} > > + > > +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL); > > + > > +void host_system_suspend(struct domain *d) > > +{ > > + system_suspend_tasklet.data =3D (void *)d; > > + /* > > + * The suspend procedure has to be finalized by the pCPU#0 (non-bo= ot pCPUs > > + * will be disabled during the suspend). > > + */ > > + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); > > +} > > + > > /* > > * Local variables: > > * mode: C > > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > > index bd87ec430d..8fb9172186 100644 > > --- a/xen/arch/arm/vpsci.c > > +++ b/xen/arch/arm/vpsci.c > > @@ -5,6 +5,7 @@ > > > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(register_= t epoint, register_t cid) > > if ( is_64bit_domain(d) && is_thumb ) > > return PSCI_INVALID_ADDRESS; > > > > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ > > - if ( is_hardware_domain(d) ) > > + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d) ) > > return PSCI_NOT_SUPPORTED; > > > > /* Ensure that all CPUs other than the calling one are offline */ > > @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(register_= t epoint, register_t cid) > > "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid=3D= %#"PRIregister"\n", > > epoint, cid); > > > > + if ( is_control_domain(d) ) > > Why is_control_domain() here and not is_hardware_domain() ? The use of is_control_domain() is intentional. The intended model is that Xen-wide host suspend is orchestrated by the privileged management/control domain. The control domain coordinates the toolstack side, asks other domains to enter suspend, and then issues the fi= nal SYSTEM_SUSPEND request to Xen. This does not have to be the same entity as the hardware domain. If the hardware domain is separate, it is one of the domains that the control doma= in parks before the final host suspend step. The hwdom-specific checks in this patch have a different purpose: they avoi= d the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardware domain to be parked as part of the suspend sequence. They do not define the policy for who is allowed to trigger Xen-wide host suspend. That said, this policy may not be optimal for all configurations, especiall= y when the control and hardware domain roles are split. I would appreciate yo= ur view, as well as the maintainers' views, on whether the trigger should rema= in control-domain based, be tied to the hardware domain instead, or be express= ed through a separate host-suspend capability/helper. > > > + host_system_suspend(d); > > + > > return rc; > > } > > > > @@ -290,7 +293,10 @@ static int32_t do_psci_1_0_features(uint32_t psci_= func_id) > > return 0; > > case PSCI_1_0_FN32_SYSTEM_SUSPEND: > > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > > - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTE= D : 0; > > + if ( IS_ENABLED(CONFIG_SYSTEM_SUSPEND) || > > + !is_hardware_domain(current->domain) ) > > Should this have also the condition that =E2=80=9Cis hardware domain and = psci_ver >=3D PSCI_VERSION(1, 0)=E2=80=9D? > Otherwise if the host machine doestn=E2=80=99t support PSCI 1.0 we would = return OK here but the call would > fail later in call_psci_system_suspend()? Good point. I agree that, for the domain allowed to trigger Xen-wide suspend, Xen shoul= d not advertise SYSTEM_SUSPEND if the host suspend path cannot be used. I think this should be checked as an explicit host SYSTEM_SUSPEND capabilit= y, rather than only as psci_ver >=3D PSCI_VERSION(1, 0). The same capability c= heck also needs to be enforced in the actual SYSTEM_SUSPEND handler before parki= ng the domain, because a caller may invoke SYSTEM_SUSPEND directly without fir= st querying PSCI_FEATURES. For ordinary guests, the physical PSCI version is not relevant because they cannot trigger host suspend; their SYSTEM_SUSPEND path is virtual. I will make this consistent in v9: PSCI_FEATURES will advertise SYSTEM_SUSP= END for the host-suspend-triggering domain only when the host SYSTEM_SUSPEND ba= ckend is available, and the actual SYSTEM_SUSPEND path will enforce the same chec= k. > > > + return 0; > > + fallthrough; > > default: > > return PSCI_NOT_SUPPORTED; > > } > > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > > index 0a20aa0a12..feb1336f46 100644 > > --- a/xen/common/Kconfig > > +++ b/xen/common/Kconfig > > @@ -137,6 +137,9 @@ config HAS_EX_TABLE > > config HAS_FAST_MULTIPLY > > bool > > > > +config HAS_HWDOM_SYSTEM_SUSPEND > > + bool > > + > > config HAS_IOPORTS > > bool > > > > diff --git a/xen/common/domain.c b/xen/common/domain.c > > index bb9e210c28..d3edfb2a13 100644 > > --- a/xen/common/domain.c > > +++ b/xen/common/domain.c > > @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) > > domain_shutdown(d, SHUTDOWN_crash); > > } > > > > +static inline bool want_hwdom_shutdown(uint8_t reason) > > +{ > > + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || > > + reason !=3D SHUTDOWN_suspend; > > +} > > > > int domain_shutdown(struct domain *d, u8 reason) > > { > > @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) > > d->shutdown_code =3D reason; > > reason =3D d->shutdown_code; > > > > - if ( is_hardware_domain(d) ) > > + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) > > hwdom_shutdown(reason); > > > > if ( d->is_shutting_down ) > > diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrou= gh/arm/smmu.c > > index 22d306d0cb..45f29ef8ec 100644 > > --- a/xen/drivers/passthrough/arm/smmu.c > > +++ b/xen/drivers/passthrough/arm/smmu.c > > @@ -2947,6 +2947,13 @@ static void arm_smmu_iommu_domain_teardown(struc= t domain *d) > > xfree(xen_domain); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +static int arm_smmu_suspend(void) > > +{ > > + return -ENOSYS; > > +} > > +#endif > > Maybe we want to gate the feature also to !CONFIG_ARM_SMMU ? I would wait= for the maintainers > view on this. I feel that gating this strictly on !CONFIG_ARM_SMMU might not be the most optimal approach here. CONFIG_ARM_SMMU is a build-time option and does not mean that an old SMMUv1= /v2 device is actually present. Using it would disable system suspend even on platforms where only SMMUv3 is used, because CONFIG_ARM_SMMU is enabled by default for Arm. The condition should be runtime-based: whether the active/probed IOMMU devi= ces have system suspend/resume support. For the old ARM SMMU driver this is not implemented today, so a platform with an SMMUv1/v2 instance should not expo= se or attempt host suspend. I think we should handle this by tracking whether any old ARM SMMUv1/v2 dev= ice was actually probed, or by adding a generic IOMMU suspend capability check.= Then the host suspend availability check can reject system suspend only when suc= h an unsupported IOMMU is present, instead of disabling the feature for all Arm builds with CONFIG_ARM_SMMU enabled. I would be interested to hear if you or the maintainers see a better way to express this capability. Best regards, Mykola > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Tue May 05 20:39:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:39:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301098.1575435 (Exim 4.92) (envelope-from ) id 1wKMYM-0005mV-Pj; Tue, 05 May 2026 20:39:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301098.1575435; Tue, 05 May 2026 20:39:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMYM-0005mO-N7; Tue, 05 May 2026 20:39:38 +0000 Received: by outflank-mailman (input) for mailman id 1301098; Tue, 05 May 2026 20:39:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMYL-0005mI-Np for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:39:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKMYL-006JzV-4k for xen-devel@lists.xenproject.org; Tue, 05 May 2026 22:39:37 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa5589-2eae-0a2a0a5409dd-0a2a4507df40-0 for ; Tue, 05 May 2026 22:39:37 +0200 Received: from [136.143.188.51] (helo=sender4-of-o51.zoho.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa5587-229c-0a2a45070019-888fbc3352be-3 for ; Tue, 05 May 2026 22:39:36 +0200 Received: by mx.zohomail.com with SMTPS id 1778013565284692.9140756033918; Tue, 5 May 2026 13:39:25 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=zoho header.d=apertussolutions.com header.i="dpsmith@apertussolutions.com" header.h="Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Content-Type:Content-Transfer-Encoding" ARC-Seal: i=1; a=rsa-sha256; t=1778013568; cv=none; d=zohomail.com; s=zohoarc; b=fdvo+7ThLN5jMZJStd9qYcScfM3HotMoTGfOsksKBK57IamhYTHwIU+JJB7od9l84jV1jIJdeDS+3LYoDiGgWQc3/UaIuSMVuwZLgX+pOpIcEImCcbOigakt87KCUqalnhlefeWiOR7rFOKp4WxukwivKkj73Rhecuq5ZjwOMFI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778013568; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=KOuaFhoFvTlT5kNzqoeorQp/xZ922AkKTe5UI5FSTls=; b=Wp6VG+dGY5y7YDr8fs31QaSzxoxv0B7+8hcG7KhdG3yjiJXTxhDt4tSiUJs0WvlYhK7yrIkfW2PzKDOx8w+bVeQ1iJuYam3zywX2i087td8Ux8+ljrobpJeY0IniCbvgVRpbmPXlQTjs0FmNhge0VspnjiQEgYxRDMd+epnF9Rw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1778013568; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=KOuaFhoFvTlT5kNzqoeorQp/xZ922AkKTe5UI5FSTls=; b=PHdMvxcFd+qsfbCCh3I6+GKiwIt83u9XtP3cobgiEXahILK+YEo8xQ8IIm9wLTxH wAwo8RGnA3qR8LM7FijMMEC7xLanILOLkQr/m6LzaDPN8/Q08mpqFMJHigmVCuSyXZn FGQGeTSOmwItGMbGcBKU+bcZOisf5JF4EVMHecp8= Message-ID: <2c747296-5f18-406f-9a78-4deabdc27ac1@apertussolutions.com> Date: Tue, 5 May 2026 16:39:23 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Ping: [PATCH] EFI: adjust cfg file buffer freeing Content-Language: en-US To: Jan Beulich , Marek Marczykowski Cc: Bernhard Kaindl , "xen-devel@lists.xenproject.org" References: From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External X-purgate-ID: tlsNG-ef75cf/1778013577-2B175C48-0E11125E/0/0 X-purgate-type: clean X-purgate-size: 2843 On 5/4/26 09:30, Jan Beulich wrote: > On 22.04.2026 13:51, Jan Beulich wrote: >> The boot services FreePages() needs passing the size. Since we allocated >> one more byte to put a trailing nul there, we also need to bump the size >> passed there. Make a small helper function to centralize this. >> >> Note that there's no permanent memory leak because of the oversight: The >> allocation is done using EfiLoaderData, and all memory of that type is >> later reclaimed anyway. >> >> Fixes: df75f77092c1 ("EFI: avoid OOB config file reads") >> Reported-by: Bernhard Kaindl >> Signed-off-by: Jan Beulich > > Marek, Daniel? > > Thanks, Jan > >> --- >> This is an alternative proposal to >> https://lists.xen.org/archives/html/xen-devel/2026-04/msg01044.html. >> >> --- a/xen/common/efi/boot.c >> +++ b/xen/common/efi/boot.c >> @@ -778,6 +778,16 @@ static void __init efi_relocate_esrt(EFI >> */ >> #include "efi-boot.h" >> >> +static void __init free_cfg(void) >> +{ >> + if ( !cfg.need_to_free ) >> + return; >> + >> + /* One extra byte was allocated to put a nul character there. */ >> + efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size + 1)); >> + cfg.need_to_free = false; >> +} >> + >> void __init noreturn blexit(const CHAR16 *str) >> { >> if ( str ) >> @@ -787,8 +797,7 @@ void __init noreturn blexit(const CHAR16 >> if ( !efi_bs ) >> efi_arch_halt(); >> >> - if ( cfg.need_to_free ) >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> + free_cfg(); >> if ( kernel.need_to_free ) >> efi_bs->FreePages(kernel.addr, PFN_UP(kernel.size)); >> if ( ramdisk.need_to_free ) >> @@ -1557,11 +1566,7 @@ void EFIAPI __init noreturn efi_start(EF >> name.s = get_value(&cfg, "global", "chain"); >> if ( !name.s ) >> break; >> - if ( cfg.need_to_free ) >> - { >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> - cfg.need_to_free = false; >> - } >> + free_cfg(); >> if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) >> { >> PrintStr(L"Chained configuration file '"); >> @@ -1631,11 +1636,7 @@ void EFIAPI __init noreturn efi_start(EF >> >> efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); >> >> - if ( cfg.need_to_free ) >> - { >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> - cfg.need_to_free = false; >> - } >> + free_cfg(); >> >> if ( dir_handle ) >> dir_handle->Close(dir_handle); > Acked-by: Daniel P. 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pr=C Message-ID: <089b9287-addb-4736-8174-f8a297de877f@amd.com> Date: Tue, 5 May 2026 17:10:22 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jason Andryuk Subject: Re: [PATCH v10 2/2] xen: Strip xen.efi by default To: Frediano Ziglio , CC: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , "Julien Grall" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Frediano Ziglio" , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Stewart Hildebrand , Oleksii Kurochko References: <20251208133945.61375-1-frediano.ziglio@citrix.com> <20251208133945.61375-3-frediano.ziglio@citrix.com> Content-Language: en-US In-Reply-To: <20251208133945.61375-3-frediano.ziglio@citrix.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B3:EE_|SA1PR12MB9472:EE_ X-MS-Office365-Filtering-Correlation-Id: 44152470-33cb-4ff9-afbc-08deaaeab9b8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|7416014|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: TLFFy0clTYwzbss+yz02rb3wmjcQiJffNHv6iQAsr5axiQW/Np7+VznloPjV1Nv27sO8Z26AtzY19Wqn3+L+wOVbfy9PiXD3dSe8aNHeLFwjSvReUNF9FHGFNjnM6BVlsRicCTMXu8un0mXeZRU/f0UNYC2ZpnT1dYrRkFTMdC9j7XIPNqzVSZ+KqNL2i1qtynpV/9sUGASd4FHsk5CXSstX6FZsr/svjw9hfGZAlod9e5VoHNLDK25w0JmhAmMD8lCGHGqLde5bX9uHs9vCp35EurXqWNpWSlthVgX/TnCERmfu17XBl9NKg6mz3B1vV+XlHUeIb0T619Vl/fXT4KHgA622t7xIlmECd9lvfErNGEPZY5wf86EVH99m4bXQlJ6FhUK6K1aWlGZVwrDZUECU+muL+OS6RuXChuXjMxPB8NpgaaU68LqgJeTS+FFt X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 21:10:24.7781 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44152470-33cb-4ff9-afbc-08deaaeab9b8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9472 X-purgate-ID: tlsNG-d62444/1778015430-BF07EFF4-044A71D2/10/73395122804 X-purgate-type: spam X-purgate-size: 672 On 2025-12-08 08:39, Frediano Ziglio wrote: > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms.efi file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. > > Signed-off-by: Frediano Ziglio > Acked-by: Andrew Cooper > Acked-by: Oleksii Kurochko Reviewed-by: Jason Andryuk While there is some discussion about patch 1, it seems like this patch can do in independently of it? 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No.  One of the containers in CI has a buggy binutils. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 23:45:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 23:45:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301140.1575464 (Exim 4.92) (envelope-from ) id 1wKPRa-0006Vr-Sd; Tue, 05 May 2026 23:44:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301140.1575464; Tue, 05 May 2026 23:44:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKPRa-0006Vk-Nj; Tue, 05 May 2026 23:44:50 +0000 Received: by outflank-mailman (input) for mailman id 1301140; Tue, 05 May 2026 23:44:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKPRZ-0006Vb-9U for xen-devel@lists.xenproject.org; Tue, 05 May 2026 23:44:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKPRY-006eM6-CN for xen-devel@lists.xenproject.org; Wed, 06 May 2026 01:44:48 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa80c1-5cb7-0a2a0a5109dd-0a2a4501adb2-10 for ; Wed, 06 May 2026 01:44:48 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa80ef-c1f2-0a2a45010019-ac6904feb116-3 for ; Wed, 06 May 2026 01:44:48 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id B71886132B; Tue, 5 May 2026 23:44:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F9CDC2BCB4; Tue, 5 May 2026 23:44:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778024686; bh=b8j1sHpjkVrIyErITFXadqJdjC4rkucTFOGDYG9cubk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=p7fWhtDUJAH9gqVJbuN752kRyZ76ePntis6fNOYwoZLg8g/qMt01rjU0RndH+mYFu cvV9ZeQOpKeSAE4mKJdKbVIB44KiAQFgea6UNQFJpExpgCfkb9EhYteYi3aQwo/XHy Z8h79KNMow/J9YOcrfuxiuPizgpz2QFHyYy0OpHOXn9SHoJOimGyQd0/6OHRzUMunB 7qa879iKj9F9iLs1Br3HJpkCtZ1YGMncRXDCk6IutrRoJcVG71jRnjlAdBtHjJOpDw n/z/1pcTKHM+p0sMaLa4iTTdDlosACv+PvXVgR0T01eUkafOZ/FbtrHQxvKXg0V+xd rgZhF6uU5uFDg== Date: Tue, 5 May 2026 16:44:45 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Andrew Cooper cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: Re: [PATCH v2] CI: Refresh the Debian 12 cppcheck container In-Reply-To: <20260505191708.1432070-1-andrew.cooper3@citrix.com> Message-ID: References: <20260505191708.1432070-1-andrew.cooper3@citrix.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d62444/1778024688-B727DFF4-71B108DF/0/0 X-purgate-type: clean X-purgate-size: 598 On Tue, 5 May 2026, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to derive from bookworm-slim, and to build and run > cppcheck as a normal user. User heredocs for readability and use apt-get > --no-install-recommends to keep the size down. > > Changed the libpcre3-dev dependency to libpcre3, as the -dev package > is only needed for building, not for running. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Wed May 06 05:56:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 05:56:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301155.1575475 (Exim 4.92) (envelope-from ) id 1wKVFJ-0006aj-Vk; Wed, 06 May 2026 05:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301155.1575475; Wed, 06 May 2026 05:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKVFJ-0006Zv-RA; Wed, 06 May 2026 05:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1301155; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 2/2] x86/amd_node: reject SMN access when amd_smn_init() did not complete Date: Wed, 6 May 2026 13:55:19 +0800 Message-ID: <20260506055528.476493-3-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260506055528.476493-1-penny.zheng@amd.com> References: <20260506055528.476493-1-penny.zheng@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|DS0PR12MB7947:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b19c043-6684-4e11-fa26-08deab3434d1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|22082099003|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: rRckkP3aBlyKpJ0JzlJhaH7wsLTuUgan2bBVLQb/lIlh3jq9TbXEC/maTaqXnA3p+KOFPB2WnVdE0JVR7LHvjfDK0KKdC4M+YYNbtKUN8O3B3mIvpL/0YQViEV8BkcizmGwKEnVsOdxXYfo3JnTwuTl9sOFL0/t+MkbZhz1fXkJoMWDqkSSYv+pNl2s4epDEt+uvUY9k2KHvj1Av0H1tv/J35mj8Z1bd1utvg5zVUoePREBNDYNMPgQNEb7mrq+/DtaEhP46N7NcUnpLy2QT86ylBYkUvgP75xqHNZcbM2B45jMhHtr5IfiYIQ28Vx7wrGJOY1hHJyxiLBm2bBJxQPkAfU23qtxUevy75TbwUsfUSdJmN+43fXTFp70mg/lpLCwXo9q9VpoNapX2LyhuAYfj5HJm3APs6XBh65MBu0B3Wr339DfA+LckWdwV5vs4RECUAnB4aOZeCiJ+L7+qOT74mB1AbyDQQCtN3eBsAJrTp++mRxY/KgbcnGr3yfwGNQ/7D2paE202UltBTEgRAtrsTGizokittgKyfP8sFgzdZQw5PrpvRZ58ldRVQJs0XmQptp9BpDHrmAx7Xy6EJvelLI1sFu4xXnhyNTkyhIOOc9vU2MhJP7J1bt0qB2tLSR+SbHL09sYSaeZfmyiUrhZk21QeR7e60/wxAqMHb6x50NOQLlGUNTA5WMFbDdx5hj2WGnsBsb0p4Lv8zwjOsmoR0Lh4uvd534RHAQbv6Mc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mXlVNtNoo1kzNJh+imVuy1XCt55xpUiuUDxjjkMAl8pFT9/CRKPgt1GQRf/r9cBPnpteeU83OnlPkexoYYHuoyoXhpCSA1GVDnt9A3oiMtwz35sRv1XOlAdkLXTGZOH0b42+qZuSpy77jjNRbJ6kYRl4sW+ht86bNLSYR0WdAjeTLZeE2Ppr/axbgyxZQ0jRfvoN3AkIKyNeIROrCvqmp0nfTV8BjGcuzvTVW7jmHWENvOjcPvILp32Ugs9sLim4E8WlTOebbQchJddVJD9c7rKKg0Le3aIkstFutYHxDBfrja/VcZeofuF02gjI5bRxL1CCQMifEBdrFbv2NcP8ObmmFL+WdxF/YHnkaCUT8BSNqWufN4FeRbwMY1a3wqXP5kZQuhS9+7Mx04hBQcJRdGiVL7/EAY63PtI5steD0dMCSvTalNSdig/3tugytaRL X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:24.5348 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b19c043-6684-4e11-fa26-08deab3434d1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7947 X-purgate-ID: tlsNG-d62444/1778046991-B5E6BFF4-2BC44A69/0/0 X-purgate-type: clean X-purgate-size: 1820 amd_smn_init() can fail early (e.g. -ENODEV when num_roots < num_nodes, -ENOMEM from kcalloc) without setting smn_exclusive. In that case amd_roots stays NULL, but the existing __amd_smn_rw() ordering dereferenced amd_roots[node] before the smn_exclusive guard. The first SMN consumer (e.g. amd_pmc_probe -> amd_smn_read) then hit a NULL pointer dereference instead of getting -ENODEV. Move the smn_exclusive check to the very beginning of __amd_smn_rw() so a failed init is rejected before any deref. Also zero *value in amd_smn_read() on the error path so callers never read uninitialized data via the subsequent PCI_POSSIBLE_ERROR() check. Signed-off-by: Penny Zheng --- arch/x86/kernel/amd_node.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/amd_node.c b/arch/x86/kernel/amd_node.c index c896060fe0df..cb9ed022c53c 100644 --- a/arch/x86/kernel/amd_node.c +++ b/arch/x86/kernel/amd_node.c @@ -88,6 +88,9 @@ static int __amd_smn_rw(u8 i_off, u8 d_off, u16 node, u32 address, u32 *value, b struct pci_dev *root; int err = -ENODEV; + if (!smn_exclusive) + return err; + if (node >= amd_num_nodes()) return err; @@ -95,9 +98,6 @@ static int __amd_smn_rw(u8 i_off, u8 d_off, u16 node, u32 address, u32 *value, b if (!root) return err; - if (!smn_exclusive) - return err; - guard(mutex)(&smn_mutex); err = pci_write_config_dword(root, i_off, address); @@ -116,6 +116,11 @@ int __must_check amd_smn_read(u16 node, u32 address, u32 *value) { int err = __amd_smn_rw(SMN_INDEX_OFFSET, SMN_DATA_OFFSET, node, address, value, false); + if (err) { + *value = 0; + return err; + } + if (PCI_POSSIBLE_ERROR(*value)) { err = -ENODEV; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 0/2] x86/amd_node: harden amd_smn_init() against Xen dom0 topology Date: Wed, 6 May 2026 13:55:17 +0800 Message-ID: <20260506055528.476493-1-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|SN7PR12MB7177:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e8aa03c-bfff-4236-e045-08deab3433fb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|376014|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: 1NVEyBkMl3LqMEGt3NC80/SzFN0Hpg6xvKTMYGPUfbUj+o3m43e3P/GFMl7j8LgTmd0cEyjE0W+LysZM1VytePiUkHviB8EAzKcwVu0EHtPWD5aZKrGpVWDTlMrJQ8ngXg18qI3TEamqGggEjBPY2OunV8flVlCYimLTLEstjWxbUpsxbLJKyNkOhlYYhlVgNgALKsImOrTsw12n2tKTfg84koAlywp+NeqiEdnIViQG9Qmlpmi16qbZemWEYaIpOthItOFH61Ut2l5pG/nfbzcmXef8YbAlOzFMTvM4jDIxHjxcVsSd3PopNc8hmiJnNCraND5uMiFCpAVdU4DP4p/mP7K2KCHzKUTIxS8/VE5EPTGZwFjPXFMmY5boz9+DJBgNjzKLvQB4r8Rn4z8hrLttWi8PsZo2y+oEyFGfa/6v2qg6Uvyezb5PpxpDPpHoWGRv8qrZ7KJWC0937/uhX7JbWQH0hoUjVhKBlfCbzQoCfAlIky3ut9vzQmaNcRVW8Tn68QhTqR6B8+ahXItUsIif120DoNvg/Sgg3W8o14DGguxRl9FAx0JGlMBFL4kFQHiHtXUWWEs+JzstBnRbhkbFVDMaDVlck7J55+x8uVL4vTuJjbde+alI1RENN85yKQJiY0cxTstwu1Y2jD+oe1vc/km3nNpdWvWL8OYEQu+edm7cl/isd25bYM0vvksiJeTTluaQb5lwzsUN92IKsdcJPpEvRKjEKEUxm5wv2Yc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(1800799024)(376014)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XYJrrHJ4b4FCGJ9KDdD1K1CPGDtG7/qztUH2o+cpSMg3ux0VNL6RooTSTIJIjJxSA3Xo3Y9uisdahDYebfT3F2qXaAXlVWNjVkn1m1CNmKMHUOluzyI3VLwffFiWNWokh6F7wuh6DnLuxdtgo+C14+yDWuTtYGXwsyoR3bhvnv/sExlPskZRmnVCu4Z/J9kL0fsjkTT5oBtQg8tFQny9WoKRm3S1/xaId4/gbCmWNiOguO92d+wV6uqq+ETxsqkdT3mAe3AvsbYeD4Y2mjZx7EdnVpuXm1mloSJJKL6AAplOwRd7M6aRiLJPCCS0gEYk4A0n3sm78JLwEb68X955cb0imcrlDPWfQ9vo2sYZooivw1TFLwS1Vo5ME/edHnDKwsskejCXNuTB6Q9uTK4LDaBqM+oGCcAP9xngdp1yEDH7p6diOoH0xVWiKg8JMoS+ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:23.1329 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e8aa03c-bfff-4236-e045-08deab3433fb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7177 X-purgate-ID: tlsNG-4011c0/1778046991-4797E8B7-CA23AB72/0/0 X-purgate-type: clean X-purgate-size: 1221 While booting a recent linux-next kernel as a Xen PVH dom0 on x86, the kernel oopses very early during fs_initcall: Oops: divide error: 0000 [#1] SMP NOPTI RIP: 0010:amd_smn_init+0x188/0x2e0 Followed: on a kernel that survives the divide, it will fail by a NULL pointer dereference from the first SMN consumer (amd_pmc_probe -> amd_smn_read). Root cause ========== To prevent each dom0 vCPU from looking like an SMT sibling of another vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every vCPU's APIC ID by 2 can push the synthesized IDs past the package-field boundary. Linux then infers more "packages" and therefore more AMD nodes via amd_num_nodes() than the platform actually has, while the PCI-side host-bridge scan correctly reports the number of root complex. The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of linux-next/master (next-20260505). Penny Zheng (2): x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 x86/amd_node: reject SMN access when amd_smn_init() did not complete arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 05:56:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 05:56:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301154.1575472 (Exim 4.92) (envelope-from ) id 1wKVFJ-0006Yg-OX; Wed, 06 May 2026 05:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301154.1575472; Wed, 06 May 2026 05:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKVFJ-0006YY-Jn; Wed, 06 May 2026 05:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1301154; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 1/2] x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 Date: Wed, 6 May 2026 13:55:18 +0800 Message-ID: <20260506055528.476493-2-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260506055528.476493-1-penny.zheng@amd.com> References: <20260506055528.476493-1-penny.zheng@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|SA5PPFD911547FB:EE_ X-MS-Office365-Filtering-Correlation-Id: 8b51d57d-91d4-4d7f-2040-08deab343453 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700016|82310400026|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: cy+qAi7I4xJtTYFwg/Xv7Tf5ht5MGr4cHFOe3vAYX6IGgQHjPpYRnQsWan9wkuai6Jj+offQtYO1a1DZ3DFKZOBJ5o/noynfsAfbgt2A4U8d5cTei0ixs27v7xMT+2yojuHuNqM+hGf06B6nIbCwUFZKWiJ/cZI1475bzWKqlCoejTdvRZbL3UpWw6SMh2MVKYA9rtT860nQ0zuwKV2iWxqjasmZXtM/lD3hVrYCyFM1FT3Im9Y9whYUOAeLwWycJHhYp6vQtzZU4GicFEkLe+NI09m+z73+PTru7C9xHVc8XIwEZYMNiI7DXmHTXyhjMpdPF9n8jn7uoQqPM9fqKYinEot94XLBVeHhkpFrxy+lN3qCs7aIKnsX4xwZFWHcHy/oYvJHrrXY8AIspkxkFKCFmn5uOFnjOPKKqblVe6kDqznl65NqqhDHsIyikKOZq4MP4M6EIe8uvqxw0ES8leypt+1rolay4rEIxbTUrJUeHkTZVsJx/qCyadgF3ph7Yl3nfJrwg23rWAlcWq6eTFvBsZu3P3b1UEKk3h8kMglSpJweo+d2thA8o+8Zb2Us8uzl3/faQMGRdim3S4+VSdUYXA1BSoSeDkUWCA9kGO+7qxKwMgcZZEErYgtpMLkjQYCaQFn8avXeon9FTFo1V1bkz6gO6FuWUYNF/6mCeE79ycMdQ/b/p1iqYTlXuk1WeF5TsMx9HsnBbQNy35P6z1y4ywiXQ3wAsNZEKmTwx5Y= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700016)(82310400026)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ++9QBZu2qMm3vsjUnSr6e/ceM3c0R7gkHyjkPA3d39jAg4M4Pa7Qsqf233LskQMdMpJ55jhPitso3p9oVCLA3rOg68QI2Z/75Cps89DZL2FwE053LrUHxaQ4OiZZS0Gqv1rgtktWwkjn3uDLEcenMs5Z3jaGjEAQYaB/Qi392OueHGbE0JmpXmLAg4U21UNd/9Y2EKwUR5EHYaBG7fCPGDXFN04TwyoWlGyrZhj7vr1akeJOnni2JY6NqugsvmZNnKCfgomEU0QwTyess8jlgJvD+mWXIIVlhDBpPPMznA8qkIe7xIQ6tJM+MRt7cxHt0MpuC2y4lrAXtpwo74IggP4eyEr33IYWUVry2Gsxmqf2lt36dIIhebhGF6z7HlYbDiNNV+Xo4W+G+HMypvfagZGULW14DH5D+Yeza3FzAB+08/8fbqLqoXC+wStUWgQa X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:23.7040 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b51d57d-91d4-4d7f-2040-08deab343453 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPFD911547FB X-purgate-ID: tlsNG-720697/1778046989-83961161-0B5678D3/0/0 X-purgate-type: clean X-purgate-size: 1563 To prevent each dom0 vCPU from looking like an SMT sibling of another vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. While the spacing every vCPU's APIC ID by 2 can therefore push the IDs past the package-field boundary, making Linux see more packages than the platform actually has. amd_num_nodes() inherits that inflated count, so num_nodes can exceed num_roots (the number of AMD root complexes discovered on the PCI bus). The subsequent roots_per_node = num_roots / num_nodes; ... count % roots_per_node ... then divides by zero in amd_smn_init(). Reject num_roots < num_nodes explicitly and bail out with -ENODEV. Signed-off-by: Penny Zheng --- arch/x86/kernel/amd_node.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/kernel/amd_node.c b/arch/x86/kernel/amd_node.c index 0be01725a2a4..c896060fe0df 100644 --- a/arch/x86/kernel/amd_node.c +++ b/arch/x86/kernel/amd_node.c @@ -282,6 +282,18 @@ static int __init amd_smn_init(void) return -ENODEV; num_nodes = amd_num_nodes(); + + /* + * Xen dom0's synthetic APIC IDs may imply more nodes than host + * bridges visible in PCI config space. Bail out to avoid a + * divide-by-zero when later computing roots_per_node. + */ + if (num_roots < num_nodes) { + pr_debug("AMD root count (%u) < node count (%u); skipping SMN init\n", + num_roots, num_nodes); + return -ENODEV; + } + amd_roots = kzalloc_objs(*amd_roots, num_nodes); if (!amd_roots) return -ENOMEM; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:04:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:04:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301193.1575499 (Exim 4.92) (envelope-from ) id 1wKWIh-0000Ec-4L; Wed, 06 May 2026 07:04:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301193.1575499; Wed, 06 May 2026 07:04:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWIh-0000EV-0q; Wed, 06 May 2026 07:04:07 +0000 Received: by outflank-mailman (input) for mailman id 1301193; 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bh=Fg+lytjX2eC7vk4fU66yjnfexhWiq5rgVoT1c2N5wDg=; b=zojqloKswAjeR2nh53EBWtLKs2w5lrn6JJuduH+DcPB36l7A1Bpyqc2XfUYrpoKe9q2BSIOjpTZ7s8Xtq9PnHz2+nB2/xQnX299APs0PEdlQmK7md9uV2ch8ZviMXXLtQ2crtaGlF1t+g/kWodQ9vmAa+1S37WsE7dOQW+Zc/ZU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Wed, 6 May 2026 09:01:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie , References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> <8c5424c1-113a-4f5e-96bf-2613f28b8bac@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <8c5424c1-113a-4f5e-96bf-2613f28b8bac@suse.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: o0qT/yoEs3ABHz4tj8yem7OkVtr8v745S1GYmPIL4vWYhLCCWEdsaCFmAhPHOS73Q9ehJ67j0yq2A5DVMaaFoG7h5BNTAUFdjm/p5sleASq54MsplHhFXJkTODNMXZuX5kqgUJzCB69ogoRzIbf6oWLvtQqXcJhOQGQeGd6CulJMaphDubZmH9p+rAI34Ryc4CZLVqcWCZSk6ltOM1PcO4Yzt1c0eUNoTOzSgp/1l+XptDzZG27TwusDCmdQ0CA8vkbvgIz+1AVJzgYYl2BDX7LhRlsWHfKjzc7/PkQ1Mrco1lDZmpQvq+HKjxOxF7Mpv+8cyiwreVkcpFCJ1wFwQETPr84rETbt4MbMQP60Fl35XAzhh1OTRQrj4kdFmNhDc/1fX1hWchrNHD/exfXlicgdcer2C0vE9o8jN9wQUl9/8z9q62pkxkaGqL5JtMJN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 07:01:48.0559 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0e8820b-f4e9-491a-fbf6-08deab3d576a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8740 X-purgate-ID: tlsNG-33051d/1778051043-2A567938-9167F4E0/0/0 X-purgate-type: clean X-purgate-size: 2662 On 05-May-26 18:11, Jan Beulich wrote: > On 05.05.2026 16:52, Orzel, Michal wrote: >> >> >> On 05-May-26 15:05, Jan Beulich wrote: >>> On 30.04.2026 14:51, Michal Orzel wrote: >>>> --- a/xen/include/xen/pdx.h >>>> +++ b/xen/include/xen/pdx.h >>>> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >>>> */ >>>> bool __mfn_valid(unsigned long mfn); >>>> >>>> -#define page_to_pdx(pg) ((pg) - frame_table) >>>> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >>>> +#define page_to_pdx(pg) \ >>>> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >>>> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) >>> >>> If you alter these, ... >>> >>>> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >>>> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) >>> >>> ... how come these can remain unaltered? Maybe you have some special >>> arrangements in Arm code, but surely in generic code transformations done >>> should be uniform. After all >>> >>> ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); >>> >>> (and alike) ought to be universally true for valid inputs. >> The invariant holds. There are two transformations on different >> boundaries: >> >> - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / >> pdx_to_mfn. >> - PDX <-> frame-table index: +/- frametable_base_pdx — lives in >> page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). >> >> On x86 the second is the identity (frametable_base_pdx == 0), so it's >> invisible. On Arm it isn't, so it has to appear in the macros that >> cross that boundary. Pushing it into mfn_to_pdx as well would mix the >> two boundaries and double-apply on Arm (page_to_mfn already adds it). > > That's yet more odd. These transformations should equally apply to > MFN <-> page (i.e. frame table index) and MFN <-> PDX translations. > PDX really is meant to be the frame table index, and at the same > time (scaled by PAGE_SHIFT) the direct map index. Both (generally > huge) tables equally benefit from whatever compression is in use, > and hence also ought to equally benefit from that > frametable_base_pdx-only sub-form of offset compression. The > anomaly of shrinking only one of the two pretty clearly shouldn't > be extended past Arm, and ideally would be addressed there at some > point. Fair enough. I'll drop this patch and update the second with a local change (as in v1 but this time with a comment explaining why) not to extend this behavior past Arm and we can try to make things generic next release. ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 06 07:37:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:37:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301210.1575517 (Exim 4.92) (envelope-from ) id 1wKWpD-00055L-Sp; Wed, 06 May 2026 07:37:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301210.1575517; Wed, 06 May 2026 07:37:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpD-00055E-Pm; Wed, 06 May 2026 07:37:43 +0000 Received: by outflank-mailman (input) for mailman id 1301210; Wed, 06 May 2026 07:37:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpC-00054i-Hd for xen-devel@lists.xenproject.org; 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While there remove the unlikely(), this is not a hot path anyway. No functional change, as there are no current callers that pass force == true. Signed-off-by: Roger Pau Monné --- xen/drivers/passthrough/amd/iommu_init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..76ae78e5ea53 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -929,13 +929,13 @@ static void enable_iommu(struct amd_iommu *iommu) amd_iommu_flush_all_caches(iommu); } -static void disable_iommu(struct amd_iommu *iommu) +static void disable_iommu(struct amd_iommu *iommu, bool force) { unsigned long flags; spin_lock_irqsave(&iommu->lock, flags); - if ( unlikely(!iommu->enabled) ) + if ( !iommu->enabled && !force ) goto out; if ( !iommu->ctrl.int_cap_xt_en ) @@ -1139,7 +1139,7 @@ static void __init amd_iommu_init_cleanup(void) iommu->ctrl.int_cap_xt_en = 0; if ( iommu->enabled ) - disable_iommu(iommu); + disable_iommu(iommu, false); else if ( iommu->mmio_base ) writeq(iommu->ctrl.raw, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); @@ -1584,7 +1584,7 @@ void cf_check amd_iommu_crash_shutdown(void) struct amd_iommu *iommu; for_each_amd_iommu ( iommu ) - disable_iommu(iommu); + disable_iommu(iommu, false); } void cf_check amd_iommu_resume(void) @@ -1598,7 +1598,7 @@ void cf_check amd_iommu_resume(void) * To make sure that iommus have not been touched * before re-enablement */ - disable_iommu(iommu); + disable_iommu(iommu, false); enable_iommu(iommu); if ( !iommu->features.flds.ia_sup ) invalidate_all = false; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:37:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:37:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301209.1575508 (Exim 4.92) (envelope-from ) id 1wKWp9-0004rs-Ku; Wed, 06 May 2026 07:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301209.1575508; Wed, 06 May 2026 07:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWp9-0004rl-I2; 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Get rid of the zeroing, and instead attempt to disable the IOMMU ahead of enabling it. Thanks, Roger. Roger Pau Monne (2): iommu/amd-vi: allow disable_iommu() against non-initialized IOMMUs iommu/amd-vi: do not zero IOMMU MMIO region xen/drivers/passthrough/amd/iommu_init.c | 34 +++++++++++------------- 1 file changed, 15 insertions(+), 19 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:38:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:38:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301223.1575525 (Exim 4.92) (envelope-from ) id 1wKWpn-0005kD-4H; Wed, 06 May 2026 07:38:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301223.1575525; Wed, 06 May 2026 07:38:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpn-0005k6-1b; Wed, 06 May 2026 07:38:19 +0000 Received: by outflank-mailman (input) for mailman id 1301223; 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b=Xl7w26QzyeIMXs9DoJH1eDpCF6QLbQH6Fw+3CvxOmG4hsECShroLleJlxE+Sja8nig9i6yrU6BgtBx0kZ+574xbj3DHvIcebIid9F5Tfkdnu9QPAitXPIObC5FicLoBq+4glftGcCH+bakc+NfPSycIKEbpRD4qoTYLKEg9yedg= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region Date: Wed, 6 May 2026 09:37:19 +0200 Message-ID: <20260506073719.40075-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260506073719.40075-1-roger.pau@citrix.com> References: <20260506073719.40075-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MR1P264CA0217.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:56::16) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|DS7PR03MB5397:EE_ X-MS-Office365-Filtering-Correlation-Id: 69905622-d2ca-495e-dbcf-08deab426e01 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|22082099003|18002099003|56012099003; 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We don't know what registers might be there, neither what values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region can put the IOMMU in a broken state, which is not recovered by the IOMMU initialization procedure in Xen. Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold map_iommu_mmio_region() into it's only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- xen/drivers/passthrough/amd/iommu_init.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 76ae78e5ea53..8bf5ca4de18f 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* Read current control register and forcefully disable the IOMMU. */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + disable_iommu(iommu, true); + iommu->ctrl.raw = 0; + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:45:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:45:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301233.1575534 (Exim 4.92) (envelope-from ) id 1wKWwA-0007Qk-Rt; Wed, 06 May 2026 07:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301233.1575534; Wed, 06 May 2026 07:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWwA-0007Qd-PG; Wed, 06 May 2026 07:44:54 +0000 Received: by outflank-mailman (input) for mailman id 1301233; Wed, 06 May 2026 07:44:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKWw8-0007QX-WE for xen-devel@lists.xenproject.org; Wed, 06 May 2026 07:44:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKWw7-008Xqc-S1 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:44:51 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf173-2eae-0a2a0a5409dd-0a2a4502b3fc-0 for ; Wed, 06 May 2026 09:44:51 +0200 Received: from [209.85.218.46] (helo=mail-ej1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf173-af86-0a2a45020019-d155da2ec48a-3 for ; Wed, 06 May 2026 09:44:51 +0200 Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-b8f9568e074so917106266b.0 for ; Wed, 06 May 2026 00:44:51 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Also, drop and add some parentheses to be aligned >> with the similar if() below. >> >> x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as >> x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no >> longer builds, the fallback is currently only relevant for arm32. >> >> Signed-off-by: Oleksii Kurochko >> Reviewed-by: Michal Orzel > > In principle: > Acked-by: Jan Beulich Thanks. > > However, still a few remarks: > >> --- a/xen/include/xen/domain.h >> +++ b/xen/include/xen/domain.h >> @@ -13,6 +13,19 @@ struct guest_area { >> void *map; >> }; >> >> +#ifdef CONFIG_HAS_DOMAIN_TYPE >> +enum __packed domain_type { >> + DOMAIN_32BIT, >> + DOMAIN_64BIT, >> +}; >> +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) >> +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) >> +#elif !defined(CONFIG_64BIT) >> +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ >> +#define is_32bit_domain(d) (true) >> +#define is_64bit_domain(d) (false) > > I think it would be nice if the excess parentheses were dropped from here. > >> --- a/xen/include/xen/fdt-domain-build.h >> +++ b/xen/include/xen/fdt-domain-build.h >> @@ -7,6 +7,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> struct domain; >> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >> } >> >> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) > > Pointer-to-const for the 2nd parameter? I will apply this comment and comment above. > >> +{ >> +#ifdef CONFIG_HAS_DOMAIN_TYPE >> + /* Type must be set before allocate memory */ > > This comment would be more prominent if it lived outside of the #ifdef, > perhaps (read on) ahead of the function. I wonder though why it's only > a comment, and not e.g. an assertion. If an assertion was possible to > add, the comment would want to live next to it. Without an assertion > putting it ahead of the function may be better. > > Depending on how far to go, changes could be made while committing, or a > proper v5 may want submitting. I think that instead of comment or just after comment the following could be added: ASSERT(!domain_tot_pages(d)); Jan, Michal, do you see any concern with that ASSERT() or I could add it and keep your Ack-by and R-by. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 08:10:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:10:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301256.1575543 (Exim 4.92) (envelope-from ) id 1wKXL4-00043Z-5I; Wed, 06 May 2026 08:10:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301256.1575543; Wed, 06 May 2026 08:10:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXL4-00043S-2A; Wed, 06 May 2026 08:10:38 +0000 Received: by outflank-mailman (input) for mailman id 1301256; Wed, 06 May 2026 08:10:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXL2-00043J-NH for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:10:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXL1-008psN-Vq for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:10:36 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf77a-e002-0a2a0a5209dd-0a2a450ba0e2-16 for ; Wed, 06 May 2026 10:10:35 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf77b-212f-0a2a450b0019-d1558036a962-3 for ; Wed, 06 May 2026 10:10:35 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488b3f8fa2bso5781685e9.1 for ; Wed, 06 May 2026 01:10:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778055035-7FF7EF3B-F6077B4E/0/0 X-purgate-type: clean X-purgate-size: 1649 On 06.05.2026 09:44, Oleksii Kurochko wrote: > On 5/4/26 2:21 PM, Jan Beulich wrote: >> On 27.04.2026 17:34, Oleksii Kurochko wrote: >>> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >>> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >>> } >>> >>> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) >> >> Pointer-to-const for the 2nd parameter? > > I will apply this comment and comment above. > >> >>> +{ >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> + /* Type must be set before allocate memory */ >> >> This comment would be more prominent if it lived outside of the #ifdef, >> perhaps (read on) ahead of the function. I wonder though why it's only >> a comment, and not e.g. an assertion. If an assertion was possible to >> add, the comment would want to live next to it. Without an assertion >> putting it ahead of the function may be better. >> >> Depending on how far to go, changes could be made while committing, or a >> proper v5 may want submitting. > > I think that instead of comment or just after comment the following > could be added: > ASSERT(!domain_tot_pages(d)); > > Jan, Michal, do you see any concern with that ASSERT() or I could add it > and keep your Ack-by and R-by. I'm okay with it being added, as long as you have made sure that it is legitimate to have. IOW (as pointed out numerous times before) you may not assert on state that's user/admin controlled, and that isn't covered by another, earlier check. In such a case an error would need returning instead. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 08:19:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:19:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301264.1575552 (Exim 4.92) (envelope-from ) id 1wKXTk-0004r8-UC; Wed, 06 May 2026 08:19:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301264.1575552; Wed, 06 May 2026 08:19:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXTk-0004r1-RX; Wed, 06 May 2026 08:19:36 +0000 Received: by outflank-mailman (input) for mailman id 1301264; Wed, 06 May 2026 08:19:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXTj-0004qv-VI for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:19:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXTi-001jOe-TU for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:19:34 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf990-e002-0a2a0a5209dd-0a2a45039f9a-4 for ; Wed, 06 May 2026 10:19:34 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf996-672d-0a2a45030019-d155dd2be8f4-3 for ; Wed, 06 May 2026 10:19:34 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-44e5624c053so1784738f8f.2 for ; Wed, 06 May 2026 01:19:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506073719.40075-2-roger.pau@citrix.com> Content-Type: text/plain; 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While there remove the unlikely(), > this is not a hot path anyway. > > No functional change, as there are no current callers that pass force == > true. > > Signed-off-by: Roger Pau Monné Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed May 06 08:20:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:20:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301272.1575561 (Exim 4.92) (envelope-from ) id 1wKXUQ-0006GS-5l; Wed, 06 May 2026 08:20:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301272.1575561; Wed, 06 May 2026 08:20:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXUQ-0006GL-37; Wed, 06 May 2026 08:20:18 +0000 Received: by outflank-mailman (input) for mailman id 1301272; Wed, 06 May 2026 08:20:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXUO-0006GC-PL for xen-devel@lists.xenproject.org; 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Message-ID: <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> Date: Wed, 6 May 2026 09:20:07 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506073719.40075-1-roger.pau@citrix.com> <20260506073719.40075-3-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506073719.40075-3-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, neither what > values might be safe for those registers. Minor grammar.  "there, nor which values". > On a forthcoming platform doing > the zeroing of the MMIO region can put the IOMMU in a broken state, "does put" > which is not recovered by the IOMMU initialization procedure in Xen. "recoverable". > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > index 76ae78e5ea53..8bf5ca4de18f 100644 > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > { > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > - if ( !rc ) > - rc = map_iommu_mmio_region(iommu); > if ( rc ) > return rc; > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > + IOMMU_MMIO_REGION_LENGTH); > + if ( !iommu->mmio_base ) > + return -ENOMEM; > + > get_iommu_features(iommu); > > /* > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + disable_iommu(iommu, true); > + iommu->ctrl.raw = 0; > + > return 0; > } These two things are unrelated at want splitting into separate patches at a minimum.  The removal of memset() critically needs backporting. As for disabling the IOMMU, I'm not certain it's wise. Linux can already "bring up" an already-live IOMMU and Xen needs to gain this ability in due course.  This is mainly for supporting PreBoot DMA Protection, but also for things like the kexec environment. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 08:29:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:29:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301283.1575570 (Exim 4.92) (envelope-from ) id 1wKXco-0007C5-2T; Wed, 06 May 2026 08:28:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301283.1575570; Wed, 06 May 2026 08:28:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXcn-0007By-Vv; Wed, 06 May 2026 08:28:57 +0000 Received: by outflank-mailman (input) for mailman id 1301283; Wed, 06 May 2026 08:28:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXcm-0007Br-77 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:28:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXcl-008tlS-JQ for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:28:55 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fafbc0-2eae-0a2a0a5409dd-0a2a450b8a6c-32 for ; Wed, 06 May 2026 10:28:55 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fafbc6-212f-0a2a450b0019-d155dd29e916-3 for ; Wed, 06 May 2026 10:28:54 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44509921fbcso3137171f8f.3 for ; Wed, 06 May 2026 01:28:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506073719.40075-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778056134-7E16DF3B-D0636BED/0/0 X-purgate-type: clean X-purgate-size: 1067 On 06.05.2026 09:37, Roger Pau Monne wrote: > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + disable_iommu(iommu, true); Don't you also need to pre-fill iommu->features? And with that field's use in disable_iommu(), won't we be at risk of leaving stuff enabled which we are entirely unaware of? Even if we fully cleared the control register (which would eliminate the need to fetch features), down the road a 2nd control register could appear. Has it become clear which register(s) or bit(s) it really is that are causing the observed issue? IOW is there truly something we may not clear? Or is it maybe that memset() really isn't suitable for use against MMIO, especially after having switched to use of REP MOVSB when ERMS is available? Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 08:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301290.1575580 (Exim 4.92) (envelope-from ) id 1wKXhl-0000HD-JE; Wed, 06 May 2026 08:34:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301290.1575580; Wed, 06 May 2026 08:34:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXhl-0000H6-Gc; Wed, 06 May 2026 08:34:05 +0000 Received: by outflank-mailman (input) for mailman id 1301290; Wed, 06 May 2026 08:34:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXhk-0000H0-UH for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:34:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXhj-00GuST-Pi for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:34:03 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fafcee-2eae-0a2a0a5409dd-0a2a4506dcc6-42 for ; Wed, 06 May 2026 10:34:03 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fafc83-7371-0a2a45060019-d155dd2de40e-3 for ; Wed, 06 May 2026 10:32:03 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44c4cc7c1cfso2830886f8f.0 for ; Wed, 06 May 2026 01:32:03 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778056323-CE777D75-FC790A96/13/0 X-purgate-type: clean X-purgate-size: 1745 On 06.05.2026 10:20, Andrew Cooper wrote: > On 06/05/2026 8:37 am, Roger Pau Monne wrote: >> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> { >> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >> >> - if ( !rc ) >> - rc = map_iommu_mmio_region(iommu); >> if ( rc ) >> return rc; >> >> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> + IOMMU_MMIO_REGION_LENGTH); >> + if ( !iommu->mmio_base ) >> + return -ENOMEM; >> + >> get_iommu_features(iommu); >> >> /* >> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >> return -ERANGE; >> >> + /* Read current control register and forcefully disable the IOMMU. */ >> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + disable_iommu(iommu, true); >> + iommu->ctrl.raw = 0; >> + >> return 0; >> } > > These two things are unrelated at want splitting into separate patches > at a minimum.  The removal of memset() critically needs backporting. > > As for disabling the IOMMU, I'm not certain it's wise. > > Linux can already "bring up" an already-live IOMMU and Xen needs to gain > this ability in due course.  This is mainly for supporting PreBoot DMA > Protection, but also for things like the kexec environment. While I agree we would better support this, as per my reply to Roger: How is that going to work if the IOMMU has features enabled we may not even be aware of? We'd still need to blindly clear everything we can't drive ourselves. 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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v3] xen/arm: skip holes in physical address space when setting up frametable Date: Wed, 6 May 2026 10:41:37 +0200 Message-ID: <20260506084137.40913-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E2:EE_|PH7PR12MB8105:EE_ X-MS-Office365-Filtering-Correlation-Id: 276a9620-9f95-44d2-451e-08deab4b4f33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|1800799024|82310400026|13003099007|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: XbeBhU5nw00yHQabv266JeQlfzoVEdv3P0Ypa2Cdr2pw2CfbVLxiM8mb3vkZKE60UfOXKv7g5Nk2RjjRuacy0Yt9+l/JlvgjrLjxQ8ghCPq9ac8xidXVI9I41n+We8VxHN/8EYDh7nl+2kTwtJsWNxAIkCImkutpTHHfAWI0TZ7yxRL9NcidttHCYgoa+IecpaY/EcUTShUqA6tYvPh+XxItBwXxIHtB5gMG8iFSN/1RnP8WRhK8s1c/ysWnSOxU9h58GHoglNLuR20g5EfxbcdGywmcg+I2Yqp8uflptrbqFCBrwFYOAjAD0DJwb4X55l0MBiCb9kRnU+3AVUPUBvhnL1GDeVMYFdVpxFPJqDwE/BzvKsNMuT8dnbZLzjgzKPJFhFUhOMujEAeb4aTo/GeBZWDRgPWAGBY48l7rMtPUFt2iguZzWlT4Oo9Y67BV3RNUsgAFdvgUn2Wb7UvdaLQ2tsT2Lhy7kUNKdaGalIdwycqYJIOEPKpineG5etUGG/IOVtIpbeBQRBxHa4LScGKCHmVqKzSPrGfUaQyFjB3LQ7T4ki14O2C5q6byOIO9MISvW+oS8fRCENZz7DkwLhIVcCFAVayqtQ7Lj+vpggWEtfHhBIpyrnoiK4JRdqn4kr7yQwyEbiAwk9ByLunA5PiKbJHZeYooNskOCXnIQzZF9eoO+zpRiPDB9tZsQlcM1cLYFf+mwza4LfLJJYBAt7QAtkETyaQEma9aEsuLordl8H1MF7SE+LwbtMlHfOOr X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700016)(1800799024)(82310400026)(13003099007)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: G5FAaZ736o6YnnhI35F6Pp65fVzkCQ2Oh+YS0OAEXHuOYZLdQANpj79iyBRH4DRWkQOjJWn8SMhGE/gprlX5RswyHiXkNsjz4HtW55da4NJBlmTaTP7QosS0cRQHbttbrfSGnnLyDJWqik24AiK0GiPxRR3lMgAOMPta+BIgY/Q97DLKQfuCzWn0+OlKsm6T0VPM9UXiVaUXAzwqVuaKFvHqiFaW0OmHmSMnZ8y35Hts5HPqxhdGrh+og08sZYDQY86E1T3qKQ2TVVVDk+JXSAvWbGVVZtObWzP5BjvUV3DSyp6V4hGVarQfhklnX0p+ovh5zvGrCaHOtAJRT1cXPQnPbNpwEv9k5YCIltR61S7YE46jURcwriargzoNsJ6OvbMMoyMkmQZhtWQLHAMuoR95r9vwou/yT7xD+WTj93B6A+ao6l6IXM6Av+XB/f0w X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 08:41:47.2495 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 276a9620-9f95-44d2-451e-08deab4b4f33 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8105 X-purgate-ID: tlsNG-ebf023/1778056916-2B1663FF-7239EC51/0/0 X-purgate-type: clean X-purgate-size: 11641 Refactor setup_frametable_mappings() into init_frametable(), modeled after x86's implementation. Instead of mapping one contiguous frametable covering ram_start to ram_end (including holes), iterate the pdx_group_valid bitmap to allocate and map frametable memory only for valid PDX groups, skipping gaps in the physical address space. This reduces memory consumption on systems with sparse RAM layouts by not allocating frametable entries for non-existent memory regions. The chunk allocator rounds chunk_size up to PAGE_SIZE only, rather than to a larger mapping granularity, to avoid overshooting past chunk boundaries into subsequent gaps or valid regions. This rounding has no impact for in-loop chunks given that chunk size is a multiple of 14MB on Arm64 and 2MB on Arm32. The rounding matters only for the last out-of-loop chunk. Physical allocations prefer 32MB alignment so that map_pages_to_xen() can use the contiguous bit for larger TLB entries where virtual alignment also permits. Fall back to 2MB if the chunk is smaller than 32MB. Add a comment explaining why we don't use pdx_to_page(). For complete discussion see [1]. As ram_end is no longer needed by init_frametable(), drop the now-dead ram_end/bank_end computation from setup_mm(). Update the MPU implementation to match the new init_frametable() signature. Since MPU has no virtual address translation (ma == va), hole-skipping is not possible and the frametable remains a single contiguous allocation. [1] https://lore.kernel.org/xen-devel/20260430125103.401811-1-michal.orzel@amd.com/T/#m803025eb6720a1425443dd0f8e72be93ef02f344 Signed-off-by: Michal Orzel --- Changes in v3: - don't generalize pdx_to_page with frametable_base_pdx - use different alignment depending on chunk size - drop tags due to the above changes Changes in v2: - fix overshoot problem with 32MB rounding --- xen/arch/arm/arm32/mmu/mm.c | 3 +- xen/arch/arm/include/asm/mm.h | 4 +- xen/arch/arm/mm.c | 5 +- xen/arch/arm/mmu/mm.c | 99 +++++++++++++++++++++++++++-------- xen/arch/arm/mpu/mm.c | 23 ++++---- 5 files changed, 92 insertions(+), 42 deletions(-) diff --git a/xen/arch/arm/arm32/mmu/mm.c b/xen/arch/arm/arm32/mmu/mm.c index 5e4766ddcf65..0b595baa11b3 100644 --- a/xen/arch/arm/arm32/mmu/mm.c +++ b/xen/arch/arm/arm32/mmu/mm.c @@ -178,8 +178,7 @@ void __init setup_mm(void) setup_directmap_mappings(mfn_x(directmap_mfn_start), xenheap_pages); - /* Frame table covers all of RAM region, including holes */ - setup_frametable_mappings(ram_start, ram_end); + init_frametable(ram_start); /* * The allocators may need to use map_domain_page() (such as for diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 72a692862420..2eb8465aa904 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -196,8 +196,8 @@ extern void *early_fdt_map(paddr_t fdt_paddr); extern void remove_early_mappings(void); /* Prepare the memory subystem to bring-up the given secondary CPU */ extern int prepare_secondary_mm(int cpu); -/* Map a frame table to cover physical addresses ps through pe */ -extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); +/* Map a frame table */ +void init_frametable(paddr_t ram_start); /* Helper function to setup memory management */ void setup_mm_helper(void); /* map a physical range in virtual memory */ diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6eddbcf912ee..65aea71c4351 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -33,7 +33,6 @@ void __init setup_mm(void) { const struct membanks *banks = bootinfo_get_mem(); paddr_t ram_start = INVALID_PADDR; - paddr_t ram_end = 0; paddr_t ram_size = 0; unsigned int i; @@ -42,11 +41,9 @@ void __init setup_mm(void) for ( i = 0; i < banks->nr_banks; i++ ) { const struct membank *bank = &banks->bank[i]; - paddr_t bank_end = bank->start + bank->size; ram_size = ram_size + bank->size; ram_start = min(ram_start, bank->start); - ram_end = max(ram_end, bank_end); } total_pages = ram_size >> PAGE_SHIFT; @@ -62,7 +59,7 @@ void __init setup_mm(void) setup_mm_helper(); - setup_frametable_mappings(ram_start, ram_end); + init_frametable(ram_start); init_staticmem_pages(); init_sharedmem_pages(); diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c index 6604f3bf4e6a..c4018a61aa01 100644 --- a/xen/arch/arm/mmu/mm.c +++ b/xen/arch/arm/mmu/mm.c @@ -6,18 +6,55 @@ #include #include #include +#include #include -/* Map a frame table to cover physical addresses ps through pe */ -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) +static void __init init_frametable_chunk(unsigned long pdx_s, + unsigned long pdx_e) { - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - - mfn_to_pdx(maddr_to_mfn(ps)) + 1; - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); - mfn_t base_mfn; - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) - : MB(32); + unsigned long nr_pdxs = pdx_e - pdx_s; + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); + unsigned long pfn_align; + struct page_info *pg; int rc; + mfn_t base_mfn; + + /* + * In-loop chunks span whole PDX groups, which are always page-size + * aligned. The last chunk ending at max_pdx may not be, so round up. + */ + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); + + /* + * Try to align the allocation to the contiguous mapping size so that + * map_pages_to_xen() can use the contiguous bit. + */ + pfn_align = ((chunk_size >= MB(32)) ? MB(32) : MB(2)) >> PAGE_SHIFT; + + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, pfn_align); + + /* + * Resolve the frametable VA via mfn_to_page(pdx_to_mfn(...)) rather + * than pdx_to_page() because the generic pdx_to_page() does not subtract + * frametable_base_pdx. There's more work to be done to make it generic, so + * for now route through mfn_to_page(), which on Arm applies the + * frametable_base_pdx offset and yields the correct VA. + */ + pg = mfn_to_page(pdx_to_mfn(pdx_s)); + rc = map_pages_to_xen((unsigned long)pg, base_mfn, + chunk_size >> PAGE_SHIFT, + PAGE_HYPERVISOR_RW | _PAGE_BLOCK); + if ( rc ) + panic("Unable to setup the frametable mappings\n"); + + memset(pg, 0, nr_pdxs * sizeof(struct page_info)); + memset(pg + nr_pdxs, -1, + chunk_size - nr_pdxs * sizeof(struct page_info)); +} + +void __init init_frametable(paddr_t ram_start) +{ + unsigned int sidx, nidx, max_idx; /* * The size of paddr_t should be sufficient for the complete range of @@ -26,24 +63,40 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); - if ( frametable_size > FRAMETABLE_SIZE ) - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", - ps, pe); + /* init_frametable_chunk() allocation alignment assumes 4KB granule */ + BUILD_BUG_ON(PAGE_SIZE != SZ_4K); - frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps)); - /* Round up to 2M or 32M boundary, as appropriate. */ - frametable_size = ROUNDUP(frametable_size, mapping_size); - base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12)); + /* In-loop chunks must produce page-aligned frametable regions */ + BUILD_BUG_ON((PDX_GROUP_COUNT * sizeof(struct page_info)) % PAGE_SIZE); - rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn, - frametable_size >> PAGE_SHIFT, - PAGE_HYPERVISOR_RW | _PAGE_BLOCK); - if ( rc ) - panic("Unable to setup the frametable mappings.\n"); + max_idx = DIV_ROUND_UP(max_pdx, PDX_GROUP_COUNT); + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); + + /* + * Mapping address in init_frametable_chunk must be page-aligned + * for map_pages_to_xen(). Aligning to PDX_GROUP_COUNT guarantees this + * because PDX_GROUP_COUNT * sizeof(page_info) is always a multiple of + * PAGE_SIZE by construction. + */ + frametable_base_pdx = ROUNDDOWN(frametable_base_pdx, PDX_GROUP_COUNT); + + if ( (max_pdx - frametable_base_pdx) > FRAMETABLE_NR ) + panic("Frametable too small\n"); + + for ( sidx = (frametable_base_pdx / PDX_GROUP_COUNT); ; sidx = nidx ) + { + unsigned int eidx; + + eidx = find_next_zero_bit(pdx_group_valid, max_idx, sidx); + nidx = find_next_bit(pdx_group_valid, max_idx, eidx); + + if ( nidx >= max_idx ) + break; + + init_frametable_chunk(sidx * PDX_GROUP_COUNT, eidx * PDX_GROUP_COUNT); + } - memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info)); - memset(&frame_table[nr_pdxs], -1, - frametable_size - (nr_pdxs * sizeof(struct page_info))); + init_frametable_chunk(sidx * PDX_GROUP_COUNT, max_pdx); } /* diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index aff88bd3a9c1..9c568831c128 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -186,16 +186,15 @@ static int is_mm_attr_match(pr_t *region, unsigned int attributes) return 0; } -/* Map a frame table to cover physical addresses ps through pe */ -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) +/* + * Allocate a contiguous frame table covering ram_start through max_pdx. + * Unlike the MMU version, MPU cannot skip holes because there is no virtual + * address translation (ma == va). + */ +void __init init_frametable(paddr_t ram_start) { + unsigned long nr_pdxs, frametable_size; mfn_t base_mfn; - paddr_t aligned_ps = ROUNDUP(ps, PAGE_SIZE); - paddr_t aligned_pe = ROUNDDOWN(pe, PAGE_SIZE); - - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(aligned_pe), -1)) - - mfn_to_pdx(maddr_to_mfn(aligned_ps)) + 1; - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); /* * The size of paddr_t should be sufficient for the complete range of @@ -204,11 +203,13 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); + nr_pdxs = max_pdx - frametable_base_pdx; + frametable_size = nr_pdxs * sizeof(struct page_info); + if ( frametable_size > FRAMETABLE_SIZE ) - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", - ps, pe); + panic("Frametable too small\n"); - frametable_base_pdx = paddr_to_pdx(aligned_ps); frametable_size = ROUNDUP(frametable_size, PAGE_SIZE); base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 1); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 08:43:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:43:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301310.1575599 (Exim 4.92) (envelope-from ) id 1wKXrJ-0002id-RQ; Wed, 06 May 2026 08:43:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301310.1575599; Wed, 06 May 2026 08:43:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXrJ-0002iW-Nk; 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> > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + disable_iommu(iommu, true); > > Don't you also need to pre-fill iommu->features? Indeed, that's done just ahead of this chunk, in the get_iommu_features() call. > And with that field's use in > disable_iommu(), won't we be at risk of leaving stuff enabled which we are > entirely unaware of? Possibly, yes, that's always a risk. > Even if we fully cleared the control register (which > would eliminate the need to fetch features), down the road a 2nd control > register could appear. We do clear the control register, it's indirectly done by us setting iommu->ctrl.raw = 0 after the disable_iommu() call. I did wonder about just doing a write of 0 to the control register, but I think it's best if we try to gracefully disable the features (as done in disable_iommu()), and then reset the cached control state to 0. Future writes to the control register will clear any bits not directly set by Xen. > Has it become clear which register(s) or bit(s) it > really is that are causing the observed issue? IOW is there truly something > we may not clear? It's not so much as not clearing something, but rather the clearing itself putting the IOMMU in a broken state which we then can't recover from using the initialization procedure in Xen. Thanks, Roger. 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Wed, 06 May 2026 01:45:50 -0700 (PDT) Message-ID: <4ca0f24d-2526-4e49-a4e0-f8497aa8f4b0@suse.com> Date: Wed, 6 May 2026 10:45:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Problem with PCI-passthrough to PV guest To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" References: <04c8ed4e-4e99-46ae-b83d-af9031f5b622@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; 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We don't know what registers might be there, neither what > > values might be safe for those registers. > > Minor grammar.  "there, nor which values". > > > On a forthcoming platform doing > > the zeroing of the MMIO region can put the IOMMU in a broken state, > > "does put" > > > which is not recovered by the IOMMU initialization procedure in Xen. > > "recoverable". > > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > > index 76ae78e5ea53..8bf5ca4de18f 100644 > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > { > > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > > > - if ( !rc ) > > - rc = map_iommu_mmio_region(iommu); > > if ( rc ) > > return rc; > > > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > + IOMMU_MMIO_REGION_LENGTH); > > + if ( !iommu->mmio_base ) > > + return -ENOMEM; > > + > > get_iommu_features(iommu); > > > > /* > > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > > return -ERANGE; > > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + disable_iommu(iommu, true); > > + iommu->ctrl.raw = 0; > > + > > return 0; > > } > > These two things are unrelated at want splitting into separate patches > at a minimum.  The removal of memset() critically needs backporting. But is it safe to backport the memset without also backporting the disabling side? We might then be dealing with an enabled IOMMU which could lead to all sorts of fun. > As for disabling the IOMMU, I'm not certain it's wise. > > Linux can already "bring up" an already-live IOMMU and Xen needs to gain > this ability in due course.  This is mainly for supporting PreBoot DMA > Protection, but also for things like the kexec environment. Note that Linux (when not booted from kdump) will do a similar sequence of what I'm attempting to do here for Xen and will call iommu_disable() ahead of attempting to enable the IOMMU. I understand that when Xen supports kdump or preboot DMA protection we would need to be more careful there, but going from zeroing the whole MMIO area (which disables everything) to not doing any kind of disabling is IMO a dangerous approach, and I would rather backport a change that at least attempts to make sure the IOMMU is disabled. Thanks, Roger. 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I wonder though why it's only >>> a comment, and not e.g. an assertion. If an assertion was possible to >>> add, the comment would want to live next to it. Without an assertion >>> putting it ahead of the function may be better. >>> >>> Depending on how far to go, changes could be made while committing, or a >>> proper v5 may want submitting. >> >> I think that instead of comment or just after comment the following >> could be added: >> ASSERT(!domain_tot_pages(d)); >> >> Jan, Michal, do you see any concern with that ASSERT() or I could add it >> and keep your Ack-by and R-by. > > I'm okay with it being added, as long as you have made sure that it is > legitimate to have. IOW (as pointed out numerous times before) you may > not assert on state that's user/admin controlled, and that isn't covered > by another, earlier check. In such a case an error would need returning > instead. All callers of set_domain_type() are in the domain build path, before any memory allocation, so domain_tot_pages(d) being zero at this point is an internal code invariant, not user-controlled. Also, I checked CI and it looks okay except ARM64 randcondig I mentioned in xen-devel matrix channel: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2503536959 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 09:02:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:02:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301359.1575642 (Exim 4.92) (envelope-from ) id 1wKY9L-00088B-6g; Wed, 06 May 2026 09:02:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301359.1575642; Wed, 06 May 2026 09:02:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKY9L-000884-3v; Wed, 06 May 2026 09:02:35 +0000 Received: by outflank-mailman (input) for mailman id 1301359; Wed, 06 May 2026 09:02:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKY9J-00087y-AW for xen-devel@lists.xenproject.org; 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Message-ID: Date: Wed, 6 May 2026 10:02:24 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jason Andryuk , Teddy Astie , Roger Pau Monne , xen-devel@lists.xenproject.org Subject: Re: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Jan Beulich References: <20260506073719.40075-1-roger.pau@citrix.com> <20260506073719.40075-3-roger.pau@citrix.com> <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> <1d771706-35b1-4d6c-bcd8-a3bccfa825f3@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1d771706-35b1-4d6c-bcd8-a3bccfa825f3@suse.com> Content-Type: text/plain; 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>>> >>> - if ( !rc ) >>> - rc = map_iommu_mmio_region(iommu); >>> if ( rc ) >>> return rc; >>> >>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> + IOMMU_MMIO_REGION_LENGTH); >>> + if ( !iommu->mmio_base ) >>> + return -ENOMEM; >>> + >>> get_iommu_features(iommu); >>> >>> /* >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >>> + iommu->ctrl.raw = 0; >>> + >>> return 0; >>> } >> These two things are unrelated at want splitting into separate patches >> at a minimum.  The removal of memset() critically needs backporting. >> >> As for disabling the IOMMU, I'm not certain it's wise. >> >> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >> this ability in due course.  This is mainly for supporting PreBoot DMA >> Protection, but also for things like the kexec environment. > While I agree we would better support this, as per my reply to Roger: How > is that going to work if the IOMMU has features enabled we may not even > be aware of? We'd still need to blindly clear everything we can't drive > ourselves. Zeroing 16k of unknown MMIO is completely unreasonable.  It is not RAM, and 0 is not a safe thing to write into an unknown register. But to the AMD IOMMU specifically, the spec makes it clear that there are registers configured by firmware that we are expected to leave alone. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:18:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:18:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301373.1575651 (Exim 4.92) (envelope-from ) id 1wKYOs-0001xf-Iu; Wed, 06 May 2026 09:18:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301373.1575651; Wed, 06 May 2026 09:18:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYOs-0001xY-GI; Wed, 06 May 2026 09:18:38 +0000 Received: by outflank-mailman (input) for mailman id 1301373; Wed, 06 May 2026 09:18:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYOr-0001xS-6R for xen-devel@lists.xenproject.org; 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It was missing commit 0949c646d646, which makes the difference. > > So for now this issue will only show up for cases where a PV-guest is > setup for PCI passthrough and it gets memory hotplugged before the PCI > device is added to it. Hm, yes, this is yet more fallout from the unpopulated-alloc changes. For PV guests that have the e820 host available we could try to create the hotplug regions over what are host RAM region in the memory map, as then we know we won't be overlapping with MMIO areas. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778059047-87F7BD75-ED28DE7F/0/0 X-purgate-type: clean X-purgate-size: 1615 On 06.05.2026 10:43, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 10:28:52AM +0200, Jan Beulich wrote: >> On 06.05.2026 09:37, Roger Pau Monne wrote: >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >> >> Don't you also need to pre-fill iommu->features? > > Indeed, that's done just ahead of this chunk, in the > get_iommu_features() call. > >> And with that field's use in >> disable_iommu(), won't we be at risk of leaving stuff enabled which we are >> entirely unaware of? > > Possibly, yes, that's always a risk. > >> Even if we fully cleared the control register (which >> would eliminate the need to fetch features), down the road a 2nd control >> register could appear. > > We do clear the control register, it's indirectly done by us setting > iommu->ctrl.raw = 0 after the disable_iommu() call. > > I did wonder about just doing a write of 0 to the control register, > but I think it's best if we try to gracefully disable the features (as > done in disable_iommu()), and then reset the cached control state to > 0. Future writes to the control register will clear any bits not > directly set by Xen. Maybe better to explicitly write out that 0 right away, even if you want to keep using disable_iommu()? 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> >>> > >>> + /* Read current control register and forcefully disable the IOMMU. */ > >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > >>> + disable_iommu(iommu, true); > >> > >> Don't you also need to pre-fill iommu->features? > > > > Indeed, that's done just ahead of this chunk, in the > > get_iommu_features() call. > > > >> And with that field's use in > >> disable_iommu(), won't we be at risk of leaving stuff enabled which we are > >> entirely unaware of? > > > > Possibly, yes, that's always a risk. > > > >> Even if we fully cleared the control register (which > >> would eliminate the need to fetch features), down the road a 2nd control > >> register could appear. > > > > We do clear the control register, it's indirectly done by us setting > > iommu->ctrl.raw = 0 after the disable_iommu() call. > > > > I did wonder about just doing a write of 0 to the control register, > > but I think it's best if we try to gracefully disable the features (as > > done in disable_iommu()), and then reset the cached control state to > > 0. Future writes to the control register will clear any bits not > > directly set by Xen. > > Maybe better to explicitly write out that 0 right away, even if you want > to keep using disable_iommu()? Yeah, I also considered that. So after disable_iommu() set the cached control state to 0 and also zero the control register right there. Can do in the next version, unless there are further objections. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778059637-41B68A53-A2277708/0/0 X-purgate-type: clean X-purgate-size: 3029 On 06.05.2026 11:02, Andrew Cooper wrote: > On 06/05/2026 9:32 am, Jan Beulich wrote: >> On 06.05.2026 10:20, Andrew Cooper wrote: >>> On 06/05/2026 8:37 am, Roger Pau Monne wrote: >>>> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>> { >>>> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >>>> >>>> - if ( !rc ) >>>> - rc = map_iommu_mmio_region(iommu); >>>> if ( rc ) >>>> return rc; >>>> >>>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>>> + IOMMU_MMIO_REGION_LENGTH); >>>> + if ( !iommu->mmio_base ) >>>> + return -ENOMEM; >>>> + >>>> get_iommu_features(iommu); >>>> >>>> /* >>>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>>> return -ERANGE; >>>> >>>> + /* Read current control register and forcefully disable the IOMMU. */ >>>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>>> + disable_iommu(iommu, true); >>>> + iommu->ctrl.raw = 0; >>>> + >>>> return 0; >>>> } >>> These two things are unrelated at want splitting into separate patches >>> at a minimum.  The removal of memset() critically needs backporting. >>> >>> As for disabling the IOMMU, I'm not certain it's wise. >>> >>> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >>> this ability in due course.  This is mainly for supporting PreBoot DMA >>> Protection, but also for things like the kexec environment. >> While I agree we would better support this, as per my reply to Roger: How >> is that going to work if the IOMMU has features enabled we may not even >> be aware of? We'd still need to blindly clear everything we can't drive >> ourselves. > > Zeroing 16k of unknown MMIO is completely unreasonable.  It is not RAM, > and 0 is not a safe thing to write into an unknown register. >From a very general perspective I agree. However, when adding new registers (or new bits in existing ones), having them default to 0 (and hence making 0 be a valid value) is common practice. > But to the AMD IOMMU specifically, the spec makes it clear that there > are registers configured by firmware that we are expected to leave alone. Well, okay. For firmware settings I think we can assume these would indeed be settings, not enables of any features which would typically require driving by an OS. Yet that still leaves the question (along the lines of what I had raised before) of how we'd deal with being invoked with unknown to us features enabled. We need to disable them, yet how do you suggest doing that without blindly clearing most (if not all) registers? The only clean way of doing that would look to be a "soft reset" command to the IOMMU (of course not to be issued via the command queue). I'm unaware of anything like this, though. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 09:28:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:28:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301407.1575687 (Exim 4.92) (envelope-from ) id 1wKYYl-0005Ig-7w; Wed, 06 May 2026 09:28:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301407.1575687; Wed, 06 May 2026 09:28:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYYl-0005IZ-5K; Wed, 06 May 2026 09:28:51 +0000 Received: by outflank-mailman (input) for mailman id 1301407; Wed, 06 May 2026 09:28:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYYj-0005IR-KI for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:28:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYYi-00H8Pc-Te for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:28:48 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb09cf-2eae-0a2a0a5409dd-0a2a4504d74e-2 for ; Wed, 06 May 2026 11:28:48 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb09d0-1dec-0a2a45040019-d155802abdd2-3 for ; Wed, 06 May 2026 11:28:48 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488b0046078so54061365e9.1 for ; Wed, 06 May 2026 02:28:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778059728-2A9623FF-4246A0B2/0/0 X-purgate-type: clean X-purgate-size: 2130 On 06.05.2026 11:20, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:17:25AM +0200, Jan Beulich wrote: >> On 06.05.2026 10:43, Roger Pau Monné wrote: >>> On Wed, May 06, 2026 at 10:28:52AM +0200, Jan Beulich wrote: >>>> On 06.05.2026 09:37, Roger Pau Monne wrote: >>>>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>>>> return -ERANGE; >>>>> >>>>> + /* Read current control register and forcefully disable the IOMMU. */ >>>>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>>>> + disable_iommu(iommu, true); >>>> >>>> Don't you also need to pre-fill iommu->features? >>> >>> Indeed, that's done just ahead of this chunk, in the >>> get_iommu_features() call. >>> >>>> And with that field's use in >>>> disable_iommu(), won't we be at risk of leaving stuff enabled which we are >>>> entirely unaware of? >>> >>> Possibly, yes, that's always a risk. >>> >>>> Even if we fully cleared the control register (which >>>> would eliminate the need to fetch features), down the road a 2nd control >>>> register could appear. >>> >>> We do clear the control register, it's indirectly done by us setting >>> iommu->ctrl.raw = 0 after the disable_iommu() call. >>> >>> I did wonder about just doing a write of 0 to the control register, >>> but I think it's best if we try to gracefully disable the features (as >>> done in disable_iommu()), and then reset the cached control state to >>> 0. Future writes to the control register will clear any bits not >>> directly set by Xen. >> >> Maybe better to explicitly write out that 0 right away, even if you want >> to keep using disable_iommu()? > > Yeah, I also considered that. So after disable_iommu() set the cached > control state to 0 and also zero the control register right there. > Can do in the next version, unless there are further objections. Well, as said - I'm wary of fully dropping the memset(). It may help now, but it could easily cause issues later. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 09:34:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:34:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301415.1575697 (Exim 4.92) (envelope-from ) id 1wKYdl-0006pG-Qd; Wed, 06 May 2026 09:34:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301415.1575697; Wed, 06 May 2026 09:34:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYdl-0006p9-Mv; Wed, 06 May 2026 09:34:01 +0000 Received: by outflank-mailman (input) for mailman id 1301415; Wed, 06 May 2026 09:34:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYdk-0006p3-3Y for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:34:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYdh-006gnA-BA for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:33:58 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0b00-e002-0a2a0a5209dd-0a2a4502a5d4-20 for ; Wed, 06 May 2026 11:33:58 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0b06-af86-0a2a45020019-d1558036f09f-3 for ; Wed, 06 May 2026 11:33:58 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488d2079582so64398205e9.2 for ; Wed, 06 May 2026 02:33:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:33:57 -0700 (PDT) Message-ID: <95a2bc5d-c551-42f1-8f65-9f8db4100fe6@suse.com> Date: Wed, 6 May 2026 11:33:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86/time: make early NOW() uses slightly more precise Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778060038-82F6E161-CD531B69/0/0 X-purgate-type: clean X-purgate-size: 1437 For early NOW() uses to yield sufficiently precise results (scaling incurs some error, which grows with the delta being scaled), init_percpu_time() wants to have run as early as possible. With 93340297802b ("x86/time: calibrate TSC against platform timer") having moved the invocation of init_platform_timer() from init_xen_time() to early_time_init(), this other call could be moved as well. Moving, however, has the unwanted effect of then growing the gap until time calibration runs for the 1st time. Therefore keep the present invocation, and add another from early_time_init(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2597,6 +2597,11 @@ int __init init_xen_time(void) /* Finish platform timer initialization. */ try_platform_timer_tail(); + /* + * While early_time_init() called this already, call it again here to + * reduce the gap until local_time_calibration() gets to run for the + * first time. + */ init_percpu_time(); init_timer(&calibration_timer, time_calibration, NULL, 0); @@ -2642,6 +2647,8 @@ void __init early_time_init(void) set_time_scale(&t->tsc_scale, tmp); t->stamp.local_tsc = boot_tsc_stamp; + init_percpu_time(); + cpu_khz = DIV_ROUND(tmp, 1000); printk("Detected %lu.%03lu MHz processor.\n", cpu_khz / 1000, cpu_khz % 1000); From xen-devel-bounces@lists.xenproject.org Wed May 06 09:35:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:35:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301424.1575706 (Exim 4.92) (envelope-from ) id 1wKYfV-0007Jo-3m; Wed, 06 May 2026 09:35:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301424.1575706; Wed, 06 May 2026 09:35:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYfV-0007Jh-0m; Wed, 06 May 2026 09:35:49 +0000 Received: by outflank-mailman (input) for mailman id 1301424; Wed, 06 May 2026 09:35:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYfU-0007JZ-1A for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:35:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYfT-008DZC-Cn for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:35:47 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0b64-2eae-0a2a0a5409dd-0a2a450badd6-38 for ; Wed, 06 May 2026 11:35:47 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0b73-212f-0a2a450b0019-d155dd29c5a2-3 for ; Wed, 06 May 2026 11:35:47 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-445795cf6f1so3825595f8f.1 for ; Wed, 06 May 2026 02:35:47 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:35:46 -0700 (PDT) Message-ID: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Date: Wed, 6 May 2026 11:35:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini From: Jan Beulich Subject: [PATCH] x86/time: make do_settime() uses more accurate Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778060147-19F6EF3B-ACEBE957/0/0 X-purgate-type: clean X-purgate-size: 2801 As a comment next to one of the invocations states, get_wallclock_time() can take over a second. The order of evaluation of function arguments is in principle unspecified; in practice at least gcc looks to be evaluating them from last to first. Hence with NOW() invoked first, the respective value passed to do_settime() can be off by over a second (which is in contrast to __get_cmos_time() attempting to get the time exactly after an update, i.e. [pretty] precisely at a seconds boundary). This also addresses a Misra C:2012 rule 13.2 ("The value of an expression and its persistent side-effects shall be the same under all permitted evaluation orders") violation each. Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") Signed-off-by: Jan Beulich --- Of course the time it takes to do all the CMOS reads (or whichever else wallclock time source is in use) also results in an inaccuracy. For __get_cmos_time() this might be solvable by having it latch NOW() before doing the 6 reads, but in particular for efi_get_time() there's hardly anything we can do. As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't find any deviation for the two instances fixed here. What am I missing? For __get_cmos_time(), tangentially: Wouldn't we better use the century byte if available? As it stands, things will break in 2070. Which is a long way out, yes, but still. (Of course this would mean a 7th slow I/O port write/read pair.) --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2575,6 +2575,8 @@ __initcall(verify_tsc_reliability); /* Late init function (after interrupts are enabled). */ int __init init_xen_time(void) { + unsigned long wc; + tsc_check_writability(); open_softirq(TIME_CALIBRATE_SOFTIRQ, local_time_calibration); @@ -2592,7 +2594,8 @@ int __init init_xen_time(void) printk(XENLOG_INFO "Wallclock source: %s\n", wallclock_type_to_string()); /* NB. get_wallclock_time() can take over one second to execute. */ - do_settime(get_wallclock_time(), 0, NOW()); + wc = get_wallclock_time(); + do_settime(wc, 0, NOW()); /* Finish platform timer initialization. */ try_platform_timer_tail(); @@ -2745,6 +2748,8 @@ int time_suspend(void) int time_resume(void) { + unsigned long wc; + preinit_pit(); resume_platform_timer(); @@ -2756,7 +2761,8 @@ int time_resume(void) set_timer(&calibration_timer, NOW() + EPOCH); - do_settime(get_wallclock_time() + cmos_utc_offset, 0, NOW()); + wc = get_wallclock_time(); + do_settime(wc + cmos_utc_offset, 0, NOW()); update_vcpu_system_time(current); From xen-devel-bounces@lists.xenproject.org Wed May 06 09:37:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:37:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301433.1575714 (Exim 4.92) (envelope-from ) id 1wKYhO-00089u-Hl; Wed, 06 May 2026 09:37:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301433.1575714; Wed, 06 May 2026 09:37:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYhO-00089n-F9; Wed, 06 May 2026 09:37:46 +0000 Received: by outflank-mailman (input) for mailman id 1301433; Wed, 06 May 2026 09:37:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYhM-00089f-RS for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:37:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYhM-00FTsG-7u for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:37:44 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0be1-e002-0a2a0a5209dd-0a2a4506eae8-22 for ; Wed, 06 May 2026 11:37:44 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0be7-7371-0a2a45060019-d155802ae136-3 for ; Wed, 06 May 2026 11:37:44 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso65292125e9.3 for ; Wed, 06 May 2026 02:37:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:37:43 -0700 (PDT) Message-ID: <746ce9af-156b-4c16-8cc0-6e8d929107a0@suse.com> Date: Wed, 6 May 2026 11:37:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH RFC] x86/time: avoid early uses of NOW() to return zero Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778060264-84566D75-AC2B156B/0/0 X-purgate-type: clean X-purgate-size: 2361 Waiting loops like the one in flush_command_buffer() will degenerate to infinite ones when used early enough for NOW() to still return constant zero. Make sure the returned value at least monotonically increases. Do this only in get_s_time(), as producing a sane value in get_s_time_fixed() for non-zero inputs won't be reasonably possible. Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which checks for NOW() returning 0 (falling back to TSM_RAW in this case). For now I have no idea how to avoid this, except that when CPUID leaf 0x15 is available we could leverage that to put in place at least an approximate scale value. Doing so could, however, lead to a discontinuity (returned value moving backwards) once the final scale value was put in place. (Note, however, that such a discontinuity can also result from init_percpu_time() using the BSP's scale value as initial estimate for APs. Then again local_time_calibration() at least makes an attempt at avoiding such.) RFC: While generally the mentioned waiting loops will take longer to time out, on a very fast CPU tight loops may time out too early. RFC: In get_s_time_fixed(), should we perhaps assert that the scale was set? I don't think Fixes: tags should be put here. If we did, we'd have to enumerate all introductions of early uses of NOW() (or get_s_time()), with the exception of those dealing with getting back 0 (which I expect is only printk_start_of_line()). --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1668,6 +1668,20 @@ s_time_t get_s_time_fixed(u64 at_tsc) s_time_t get_s_time(void) { + /* + * Before the TSC scale is set, avoid returning constant 0 (or whatever + * this_cpu(cpu_time).stamp.local_stime is set to). While the returned + * value is in no way representing time, it at least increases + * monotonically, thus avoiding e.g. waiting loops to degenerate to + * entirely infinite ones. + */ + if ( unlikely(!this_cpu(cpu_time).tsc_scale.mul_frac) ) + { + static s_time_t counter; + + return arch_fetch_and_add(&counter, 1); + } + return get_s_time_fixed(0); } From xen-devel-bounces@lists.xenproject.org Wed May 06 09:39:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:39:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301442.1575725 (Exim 4.92) (envelope-from ) id 1wKYis-0000HN-Sn; Wed, 06 May 2026 09:39:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301442.1575725; Wed, 06 May 2026 09:39:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYis-0000HF-Om; Wed, 06 May 2026 09:39:18 +0000 Received: by outflank-mailman (input) for mailman id 1301442; Wed, 06 May 2026 09:39:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYir-0000H7-GX for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:39:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYip-006i3W-89 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:39:16 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0c3d-e002-0a2a0a5209dd-0a2a4503b96a-30 for ; Wed, 06 May 2026 11:39:16 +0200 Received: from [209.85.221.44] (helo=mail-wr1-f44.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0c44-672d-0a2a45030019-d155dd2ccc04-3 for ; Wed, 06 May 2026 11:39:16 +0200 Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-44ce78ab5feso3208057f8f.0 for ; Wed, 06 May 2026 02:39:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:39:15 -0700 (PDT) Message-ID: <1e23dd78-b246-4fc7-9e18-de8b0cd57721@suse.com> Date: Wed, 6 May 2026 11:39:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH RFC] x86/time: set AP's TSC scale estimate earlier Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778060356-3AB64938-CCE377A3/0/0 X-purgate-type: clean X-purgate-size: 1998 NOW() (in particular) can be used ahead of init_percpu_time(). As the initial scale value set is merely the BSP's, we can as well set it before actually launching the AP. Don't introduce yet another notifier function though; do this from smpboot.c's. Setting the scale alone, however, doesn't work, so the entire struct cpu_time is copied. Signed-off-by: Jan Beulich --- RFC: Copying the entire struct won't work very well when tsc_adjust[] is in use (and values there differ between sockets). This in particular eliminates an anomaly with log messages issued early while APs are coming up, when "boot" console timestamps are in use. --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preinit_percpu_time(unsigned int cpu); void init_percpu_time(void); void time_latch_stamps(void); --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -1139,6 +1139,7 @@ static int cf_check cpu_smpboot_callback { case CPU_UP_PREPARE: rc = cpu_smpboot_alloc(cpu); + preinit_percpu_time(cpu); break; case CPU_UP_CANCELED: case CPU_DEAD: --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); } +void preinit_percpu_time(unsigned int cpu) +{ + /* Initial estimate for TSC rate etc. */ + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); +} + void init_percpu_time(void) { struct cpu_time *t = &this_cpu(cpu_time); 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citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0808c1ab-0190-4653-4ea1-08deab53b75f X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 09:41:58.1238 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cS+mlVzY11glrkdWmWvIQHLAJS+MgqA0E7GpSWObIrROJzkqnrjjRWg4/0ZjiODjyay3B0QCeEu4qP/Svx09rMam98Yjj1cwfOrW8sVGlwg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR03MB7196 X-purgate-ID: tlsNG-ebf023/1778060523-4014E3FF-254269E4/0/0 X-purgate-type: clean X-purgate-size: 3773 On 06/05/2026 9:58 am, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 09:20:07AM +0100, Andrew Cooper wrote: >> On 06/05/2026 8:37 am, Roger Pau Monne wrote: >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>> say the least. We don't know what registers might be there, neither what >>> values might be safe for those registers. >> Minor grammar.  "there, nor which values". >> >>> On a forthcoming platform doing >>> the zeroing of the MMIO region can put the IOMMU in a broken state, >> "does put" >> >>> which is not recovered by the IOMMU initialization procedure in Xen. >> "recoverable". >> >>> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c >>> index 76ae78e5ea53..8bf5ca4de18f 100644 >>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> { >>> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >>> >>> - if ( !rc ) >>> - rc = map_iommu_mmio_region(iommu); >>> if ( rc ) >>> return rc; >>> >>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> + IOMMU_MMIO_REGION_LENGTH); >>> + if ( !iommu->mmio_base ) >>> + return -ENOMEM; >>> + >>> get_iommu_features(iommu); >>> >>> /* >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >>> + iommu->ctrl.raw = 0; >>> + >>> return 0; >>> } >> These two things are unrelated at want splitting into separate patches >> at a minimum.  The removal of memset() critically needs backporting. > But is it safe to backport the memset without also backporting the > disabling side? We might then be dealing with an enabled IOMMU which > could lead to all sorts of fun. I would absolutely take working with a potentially active IOMMU over zeroing the registers which don't appear in the public documentation. This is where BIOS norms save us.  The IOMMU can't be enabled without active OS negotiation, or DoS wouldn't be able to boot.  It is only in the past couple of years where this has not been the base compatibility case on all systems. But I see your point.  Given that we were clearing the main enable bit, we ought to continue to do so for backport purposes. It would be nice to have a printk_once() in there so we can spot when the IOMMU is enabled.  I expect it not to trigger but if it does trigger, we've got more investigation to do. >> As for disabling the IOMMU, I'm not certain it's wise. >> >> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >> this ability in due course.  This is mainly for supporting PreBoot DMA >> Protection, but also for things like the kexec environment. > Note that Linux (when not booted from kdump) will do a similar sequence of > what I'm attempting to do here for Xen and will call iommu_disable() > ahead of attempting to enable the IOMMU. Lovely...  That's broken. The AMD IOMMU makes this especially easy to do.  Each of the ring buffers have enable bits separate to the general IOMMU enable, so you can temporary disable, move the buffer and clear the ring pointers, then re-enable. What is critical for Preboot DMA protection is that DMA translation doesn't get turned off. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:47:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:47:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301470.1575751 (Exim 4.92) (envelope-from ) id 1wKYr7-0003AL-74; Wed, 06 May 2026 09:47:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301470.1575751; Wed, 06 May 2026 09:47:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYr7-0003AE-3I; Wed, 06 May 2026 09:47:49 +0000 Received: by outflank-mailman (input) for mailman id 1301470; Wed, 06 May 2026 09:47:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYr6-0003A8-CN for xen-devel@lists.xenproject.org; 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Message-ID: Date: Wed, 6 May 2026 10:47:38 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Type: text/plain; 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich > --- > Of course the time it takes to do all the CMOS reads (or whichever else > wallclock time source is in use) also results in an inaccuracy. For > __get_cmos_time() this might be solvable by having it latch NOW() before > doing the 6 reads, but in particular for efi_get_time() there's hardly > anything we can do. > > As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > find any deviation for the two instances fixed here. What am I missing? >From deviations.ecl: -doc_begin="The following file is imported from Linux: ignore for now." -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} I've said before and it bears repeating.  This claim is false and should never have been put in to start with, and time.c is not impacted file. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:48:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:48:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301478.1575760 (Exim 4.92) (envelope-from ) id 1wKYri-0003iF-IE; Wed, 06 May 2026 09:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301478.1575760; Wed, 06 May 2026 09:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYri-0003i8-Ei; Wed, 06 May 2026 09:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1301478; Wed, 06 May 2026 09:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKYrg-0003hx-NV for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYrg-00HCqb-48 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:48:24 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0e67-5cb7-0a2a0a5109dd-0a2a4502875e-4 for ; Wed, 06 May 2026 11:48:24 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0e67-af86-0a2a45020019-d155da32d4ed-3 for ; Wed, 06 May 2026 11:48:24 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-b9382e59c0eso981838166b.0 for ; Wed, 06 May 2026 02:48:23 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc55f30a2cfsm61872266b.57.2026.05.06.02.48.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 May 2026 02:48:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778060903; x=1778665703; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=zoE8x6AZyFV8b4Hk8uB8r7cxZqKnUgwsB6f57Kd4bDY=; b=PSXuSEhqdo9mS2z3fCo4o66dQ04w4zznKnVR1gJfBCpFSm17wJm3stmBqGExYFP1rq XwSVPofVgWlXcz9ss219d5u50a/R9V81nbKz8JRM+N/Jd89wNJ3yFXhGHDNuXwrqQ04G RG8/spK8YK23uAiDN/+fJQfwSgFH1xbsuKHuOgMuxlRVgD9h8fIR+gj/s/RB/f+yhirh TWo3luOpvApBMQxOzLH29hS9jACeRdvR3d3+z9nqKlZL9N3Gw4yq/ySCqFeIjOg/l8Od 2KZHFoMHgRMgwLNT5e1y8keY40KRItlixidZL3qWd7tuSSirhxHIvbBZwbBFqToYu1j2 aEeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778060903; x=1778665703; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=zoE8x6AZyFV8b4Hk8uB8r7cxZqKnUgwsB6f57Kd4bDY=; b=Jxtau/hE/r/zjlSCo8GxdSjvrsjy+ltHl07lEnwZ0uAAhnH3Jk0pujI1n4PixsDhJU lcVtWXJ/UxkzP5FXwnZyPTdOjB+UcwS2Pshwk/f+ZigiFj5mxiuqXcbih0sVtkaWfBPh 0o7dQmo5F2ogSOsZheBVaszpgevyIrBLXToH4Z0jlA98fHWHXs/lUGRlRoRue9jQ/Ugo shqMWSyYZXEourhseno8oGhPSPZ4Xo8Zr9z+4LC+M9yl2P5v5MZFRpr8szpuz6clO/pC yX8aUUXlbdLkEKunT0empBGo536a8V0sSpYcaMYdAsYQz2U7J+s8bpmZwSwW24z6COD8 kwPg== X-Gm-Message-State: AOJu0YxAiq6uIg32FNiUA3DadV7DKP8NAaaTMIk9rBDFIKhPmymCICTL qBQOV5LNDY6YQlq83yJ+PcvG8QpVKclNcGtrP8QxQw0JHPGy3oB9xugo X-Gm-Gg: AeBDievSZtuAtnoCffoOPow+O2hq41vBS2SfDT/xU6QRlLmN1J9Xda0vZR/sEkywKkT mbdurhPG2ozWmfLQV1Ehc/InE0XFW/xPjfoU1AqOuWaVVVbgJ0aqjkSwvFdM+MJeTzX3yS7WXqJ 9/IZkz+RZzjP32nXqXHHMGPVmT3yAbLa7DxsYJ5JRs1Rpmo3PfzFfe1J0A7DIZ5DoWV4ThPKFB9 AhT7sgkcMHkD0Eh2DOLwbPDNI3ygiQw0Fzve2wf5Psmk1w6hKWqIm6y3R0CTMTyVSxZ7Ad066Jq WbMNqlS4iMnZLxzHR+za5NYuuiKSHciF0wRwQ0QdO831AlP+nRb+s8mDaxL3y2tFCxg5queBo6t Kkuljwd9Ioo1T8H3iho+eq2ITC2P9qzWrNGVXKhveE4NDVvhvfP4WK6EZmR1WpU0GDknpZdTkAX cI3hbII4KOrIv1CVdaIekv9lgS38DO6O67vpC0JDyaNAHQcCfvxxZo/0jIpNOhY7EgLgvBmhPXr iGcSlPM+YunUg== X-Received: by 2002:a17:906:fe42:b0:b9d:2fce:308b with SMTP id a640c23a62f3a-bc56d80c34fmr115713166b.30.1778060903344; Wed, 06 May 2026 02:48:23 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 11:48:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778060904-83D67161-83155A11/10/73395122804 X-purgate-type: spam X-purgate-size: 4561 On 4/29/26 12:59 PM, Luca Fancellu wrote: > Hi Oleksii, > >> >> diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c >> index 9395b5af8745..a5554714cd7b 100644 >> --- a/xen/arch/arm/kernel.c >> +++ b/xen/arch/arm/kernel.c >> @@ -101,8 +101,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> paddr_t load_addr; >> >> #ifdef CONFIG_HAS_DOMAIN_TYPE >> - if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) >> - return mem->bank[0].start + info->zimage.text_offset; >> + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) >> + return mem->bank[0].start + info->image.text_offset; >> #endif >> >> /* >> @@ -111,19 +111,19 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> * and above 32MiB. Load it as high as possible within these >> * constraints, while also avoiding the DTB. >> */ >> - if ( info->zimage.start == 0 ) >> + if ( info->image.start == 0 ) >> { >> paddr_t load_end; >> >> load_end = mem->bank[0].start + mem->bank[0].size; >> load_end = MIN(mem->bank[0].start + MB(128), load_end); >> >> - load_addr = load_end - info->zimage.len; >> + load_addr = load_end - info->image.len; >> /* Align to 2MB */ >> load_addr &= ~((2 << 20) - 1); >> } >> else >> - load_addr = info->zimage.start; >> + load_addr = info->image.start; >> >> return load_addr; >> } >> @@ -131,8 +131,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> static void __init kernel_zimage_load(struct kernel_info *info) >> { >> paddr_t load_addr = kernel_zimage_place(info); >> - paddr_t paddr = info->zimage.kernel_addr; >> - paddr_t len = info->zimage.len; >> + paddr_t paddr = info->image.kernel_addr; >> + paddr_t len = info->image.len; >> void *kernel; >> int rc; >> >> @@ -215,7 +215,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> return -EOPNOTSUPP; >> } >> >> - info->zimage.start = be32_to_cpu(uimage.load); >> + info->image.start = be32_to_cpu(uimage.load); >> info->entry = be32_to_cpu(uimage.ep); >> >> /* >> @@ -224,20 +224,20 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> * independent image. That means Xen is free to load such an image at >> * any valid address. >> */ >> - if ( info->zimage.start == 0 ) >> + if ( info->image.start == 0 ) >> printk(XENLOG_INFO >> "No load address provided. Xen will decide where to load it.\n"); >> else >> printk(XENLOG_INFO >> "Provided load address: %"PRIpaddr" and entry address: %"PRIpaddr"\n", >> - info->zimage.start, info->entry); >> + info->image.start, info->entry); >> >> /* >> * If the image supports position independent execution, then user cannot >> * provide an entry point as Xen will load such an image at any appropriate >> * memory address. Thus, we need to return error. >> */ >> - if ( (info->zimage.start == 0) && (info->entry != 0) ) >> + if ( (info->image.start == 0) && (info->entry != 0) ) >> { >> printk(XENLOG_ERR >> "Entry point cannot be non zero for PIE image.\n"); >> @@ -257,13 +257,13 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> if ( rc ) >> return rc; >> >> - info->zimage.kernel_addr = mod->start; >> - info->zimage.len = mod->size; >> + info->image.kernel_addr = mod->start; >> + info->image.len = mod->size; >> } >> else >> { >> - info->zimage.kernel_addr = addr + sizeof(uimage); >> - info->zimage.len = len; >> + info->image.kernel_addr = addr + sizeof(uimage); >> + info->image.len = len; >> } >> >> info->load = kernel_zimage_load; >> @@ -289,7 +289,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> * Thus, Xen uses uimage.load attribute to determine the load address and >> * zimage.text_offset is ignored. > > Should we update the comment as well? > > Also in here: > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/include/xen/fdt-kernel.h;h=4d0467bb396a9cf317954fd511469e7f56d67844;hb=refs/heads/staging#l111 Agree, it should be updated. I'll do that in the next version. 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The order of evaluation of function arguments is >> in principle unspecified; in practice at least gcc looks to be evaluating >> them from last to first. Hence with NOW() invoked first, the respective >> value passed to do_settime() can be off by over a second (which is in >> contrast to __get_cmos_time() attempting to get the time exactly after an >> update, i.e. [pretty] precisely at a seconds boundary). >> >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression >> and its persistent side-effects shall be the same under all permitted >> evaluation orders") violation each. >> >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >> Signed-off-by: Jan Beulich >> --- >> Of course the time it takes to do all the CMOS reads (or whichever else >> wallclock time source is in use) also results in an inaccuracy. For >> __get_cmos_time() this might be solvable by having it latch NOW() before >> doing the 6 reads, but in particular for efi_get_time() there's hardly >> anything we can do. >> >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't >> find any deviation for the two instances fixed here. What am I missing? > From deviations.ecl: > > -doc_begin="The following file is imported from Linux: ignore for now." > -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} > > I've said before and it bears repeating.  This claim is false and should > never have been put in to start with, and time.c is not impacted file. is not the only* ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:55:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:55:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301496.1575778 (Exim 4.92) (envelope-from ) id 1wKYye-0005mr-F3; Wed, 06 May 2026 09:55:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301496.1575778; Wed, 06 May 2026 09:55:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYye-0005mk-Bd; Wed, 06 May 2026 09:55:36 +0000 Received: by outflank-mailman (input) for mailman id 1301496; Wed, 06 May 2026 09:55:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYyd-0005me-4M for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:55:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYyc-00FYJY-BV for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:55:34 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb100e-bab6-0a2a0a5309dd-0a2a450ac94c-26 for ; Wed, 06 May 2026 11:55:34 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0f9d-56b3-0a2a450a0019-a237832fa2ae-3 for ; Wed, 06 May 2026 11:53:34 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id BCFCE4EE3CD2; Wed, 6 May 2026 11:53:33 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778061213; b=px8G2yXEIN9aQ0VKbJeoLEXkn3Pqgo1XmG1bO7jb80ujXnvEGjXCtRJg+M2EdiIULwGi 5c4yziMexQoRlWyC5CZCPjwIkJdtIh+ik2ZDR2fJKhyc/HyOnu5+DBZvi5WR5HbyJK2xp f5ef142YxTojay6wZLwuxKqZT8JEL6LpjdutwfX7z/9H/zNfHMU1l29WDI1/RyBkNzDaf OUu8vot3hsunXEW0UY3QdCi+37MKUckLSDJ9asIRjyo40MuWBy6oEzwGYrjqGl1jx6tLL i2PmKxPfraiMTw77nk7+pQQI0MsuSLqRBjc7ZuoLGO4SXK0e3BzNtO2ONHl/QjohlUfxU eUWpKAbiiCJBdNOZv8xWBOLTtkAYLN7YaPIM6Y67ODll6IYfaspZWWWZokouy5TEFlOwt uZZFUyDTQlrJlVViUiBrucemanQcKF8wMzaLDCriO1OZ8d2OPpdscK+P4nfm0NNpwOmIn Y3lXMRR8tsaJAS92uzoapDAVJJZFSu+a7Ezo8BNxLwrfYiWavOXd4XWHXKHUBSU9BBWHa 8iX6OjnMIlGjoDMmE85Vq/PdpSeQ5b+vskFz17KKnHKPZrADEheS4xgG0oYPlWjSqYbSc FYPqbqXg3NpGI0plxACm/bOTkk59JG5QiMvY4DQr0ohh9kTslDdTSRWVcb+bfiA= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778061213; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=t0TU+owBELoRIKHKbCVQjRfjhvioRegLSxOHOhzdJbI=; b=hBnQ3hx3j+Y/H/erJ9e1T8U/b55iL3twIELe5OZSCqxM/q0UU8kq0jNqZaa0D9HsNkbH 3EdvCgCto5skC7XYNVDPIezf1PExGR8R9wuWXF31i6ywIk2B2SbLkx7i+J8uFzBtuOQsI fjn9/7DoJtc5qRW8eJ7cIee9LQlXKmykjbLV/wWjQV95x5x/6Tb94rvZ7C7OrGxTl4Ghg /IWI7O7ugWAaMRtaquXAIzl1FyKhId8C+vFv56qHuZyIMvQihjyG8ymAo3SS57HJiTiev 4kzeHbSJ8LvHMSReHidSWB7y58xMIdk5xz5BEgswB9HUD4TZzJA9BC35pS3Z4fL1AFMDH LVouKHdtFLAXt04GsnBLh2MWqfoo7o6bSJLfqje7Ld+8o7sDlKsXPAlsn0r2yDKslt3eO Fa5JogGliHzcMW2Smw55BglDbnoFjEMK8O91z5uzh1+QH1nZsutpIeVOvBDwiCw6NZrf9 dC/DHWXNDkAsrdAAkzifm+94yDVq4N3NHUrZLeSdnq5fgDB5hU8CCW+A2rZBhZlaoAaIS rCJ4/AGLiYkgFCY2cTsiB8kFI3hxjtahv4CsGiHgKvTBl7Dh8VvTxFoanguquAMpiDK19 +dfHnuxY09Bj89wPRGMVnifBYVrC/9auEhrBJL7LnNBKfoex8+/23tRK2az9B54= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 06 May 2026 11:53:33 +0200 From: Nicola Vetrini To: Andrew Cooper Cc: Jan Beulich , xen-devel@lists.xenproject.org, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate In-Reply-To: References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Message-ID: <8d96673827e5d38f2e665ba3a1126fbb@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778061214-70D608B7-759A420C/13/0 X-purgate-type: clean X-purgate-size: 2180 On 2026-05-06 11:48, Andrew Cooper wrote: > On 06/05/2026 10:47 am, Andrew Cooper wrote: >> On 06/05/2026 10:35 am, Jan Beulich wrote: >>> As a comment next to one of the invocations states, >>> get_wallclock_time() >>> can take over a second. The order of evaluation of function arguments >>> is >>> in principle unspecified; in practice at least gcc looks to be >>> evaluating >>> them from last to first. Hence with NOW() invoked first, the >>> respective >>> value passed to do_settime() can be off by over a second (which is in >>> contrast to __get_cmos_time() attempting to get the time exactly >>> after an >>> update, i.e. [pretty] precisely at a seconds boundary). >>> >>> This also addresses a Misra C:2012 rule 13.2 ("The value of an >>> expression >>> and its persistent side-effects shall be the same under all permitted >>> evaluation orders") violation each. >>> >>> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of >>> wallclock change") >>> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >>> Signed-off-by: Jan Beulich >>> --- >>> Of course the time it takes to do all the CMOS reads (or whichever >>> else >>> wallclock time source is in use) also results in an inaccuracy. For >>> __get_cmos_time() this might be solvable by having it latch NOW() >>> before >>> doing the 6 reads, but in particular for efi_get_time() there's >>> hardly >>> anything we can do. >>> >>> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also >>> can't >>> find any deviation for the two instances fixed here. What am I >>> missing? >> From deviations.ecl: >> >> -doc_begin="The following file is imported from Linux: ignore for >> now." >> -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} >> >> I've said before and it bears repeating.  This claim is false and >> should >> never have been put in to start with, and time.c is not impacted file. > > is not the only* > Patches welcome :) -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 06 10:12:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:12:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301510.1575786 (Exim 4.92) (envelope-from ) id 1wKZES-0000kv-Qf; Wed, 06 May 2026 10:11:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301510.1575786; Wed, 06 May 2026 10:11:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKZES-0000ko-O6; Wed, 06 May 2026 10:11:56 +0000 Received: by outflank-mailman (input) for mailman id 1301510; Wed, 06 May 2026 10:11:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKZER-0000ki-Ef for xen-devel@lists.xenproject.org; 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Make sure the returned value at least monotonically increases. > > Do this only in get_s_time(), as producing a sane value in > get_s_time_fixed() for non-zero inputs won't be reasonably possible. > > Reported-by: Roger Pau Monné > Signed-off-by: Jan Beulich > --- > RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which > checks for NOW() returning 0 (falling back to TSM_RAW in this case). > For now I have no idea how to avoid this, except that when CPUID leaf > 0x15 is available we could leverage that to put in place at least an > approximate scale value. Doing so could, however, lead to a > discontinuity (returned value moving backwards) once the final scale > value was put in place. (Note, however, that such a discontinuity can > also result from init_percpu_time() using the BSP's scale value as > initial estimate for APs. Then again local_time_calibration() at > least makes an attempt at avoiding such.) For the purposes of printk_start_of_line() we could unconditionally use get_cycles() when system_state < SYS_STATE_smp_boot IMO. Using the frequency value from CPUID seems like a good approach also on boxes that expose this information. I wonder, we seem to unconditionally perform the TSC calibration against a known frequency time source, wouldn't it be more reliable to use the information from leaf 0x15 when available? > > RFC: While generally the mentioned waiting loops will take longer to time > out, on a very fast CPU tight loops may time out too early. I was wondering about that, increasing just a nano-second for each call seems like it's going to make progress fairly slow? Obviously depends on how tights the calls to NOW() are in the outside loop. Maybe when lacking frequency information from CPUID we could assume something like 8GHz and scale the TSC based on that? AFAICT it's advisable to use a frequency greater than any CPU, as then we don't risk NOW() running too fast. > RFC: In get_s_time_fixed(), should we perhaps assert that the scale was > set? Might be good, but I would like to see what explodes when doing that... > I don't think Fixes: tags should be put here. If we did, we'd have to > enumerate all introductions of early uses of NOW() (or get_s_time()), with > the exception of those dealing with getting back 0 (which I expect is only > printk_start_of_line()). I'm fine with no fixes tag, but we need to remember to backport this one. Thanks, Roger. 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With 93340297802b ("x86/time: > calibrate TSC against platform timer") having moved the invocation of > init_platform_timer() from init_xen_time() to early_time_init(), this > other call could be moved as well. > > Moving, however, has the unwanted effect of then growing the gap until > time calibration runs for the 1st time. Therefore keep the present > invocation, and add another from early_time_init(). Yeah, keeping the second init_xen_time() will make sure the BSP doesn't diverge too much from the platform timer during boot. WE migth as well skip it and wait for the first rendezvous, but this is likely more accurate at the cost of doing the extra init_xen_time() in the BSP. > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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Wed, 06 May 2026 03:27:01 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:26:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <2577e757d32f85fb8b3308863e6d7a53d70636dc.1777303844.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778063222-BF171DB1-E829D69D/10/73395122804 X-purgate-type: spam X-purgate-size: 1302 Hello Luca, On 4/29/26 5:10 PM, Luca Fancellu wrote: >> diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c >> index c51520ebadf9..6949203dacdc 100644 >> --- a/xen/common/device-tree/domain-build.c >> +++ b/xen/common/device-tree/domain-build.c >> @@ -1,6 +1,7 @@ >> /* SPDX-License-Identifier: GPL-2.0-only */ >> >> #include >> +#include >> #include >> #include >> #include >> diff --git a/xen/include/xen/domain-layout.h b/xen/include/xen/domain-layout.h >> new file mode 100644 >> index 000000000000..0532a27b44ce >> --- /dev/null >> +++ b/xen/include/xen/domain-layout.h > > New files should have SPDX tag I will add: /* SPDX-License-Identifier: GPL-2.0-only */ > >> @@ -0,0 +1,27 @@ >> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >> +#define __XEN_DOMAIN_LAYOUT_H__ > > I think this include guard doesn’t satisfy the coding style: > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=CODING_STYLE;h=aae5a47ac20345978b3c465b9d85f1d5f6774731;hb=refs/heads/staging#l167 Will rename to XEN_DOMAIN_LAYOUT_H. > > Apart from this, the rest looks ok to me, after fixing the above I will leave my R-by Thanks for review. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 10:32:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:32:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301543.1575814 (Exim 4.92) (envelope-from ) id 1wKZYW-0004yJ-09; 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Make sense. I will rephrase commit message according to your suggestion. > >> On 28 Apr 2026, at 15:33, Oleksii Kurochko wrote: >> >> The IPA terminology is Arm-specific, so rename p2m_ipa_bits to >> p2m_gpa_bits to use architecture-neutral naming in >> xen/common/device-tree/ code. >> >> No functional changes. >> >> Reported-by: Jan Beulich >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v4: >> - Nothing changed only rebase. >> --- >> Changes in v3: >> - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of >> renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of >> changes clearer and keep using Arm-specific terminolgy inside >> Arm code. >> --- >> Changes in v2: >> - New patch. >> --- >> --- > > If the maintainer agrees and the title is fixed: > > Reviewed-by: Luca Fancellu Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 10:33:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:33:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301551.1575823 (Exim 4.92) (envelope-from ) id 1wKZZG-0005Qt-99; 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As the > initial scale value set is merely the BSP's, we can as well set it before > actually launching the AP. Don't introduce yet another notifier function > though; do this from smpboot.c's. > > Setting the scale alone, however, doesn't work, so the entire struct > cpu_time is copied. > > Signed-off-by: Jan Beulich > --- > RFC: Copying the entire struct won't work very well when tsc_adjust[] is > in use (and values there differ between sockets). > > This in particular eliminates an anomaly with log messages issued early > while APs are coming up, when "boot" console timestamps are in use. Could we consider moving init_percpu_time() earlier in start_secondary()? I think it's main dependency is on set_cpu_sibling_map(), which we could also move earlier? Looking further, seems like it depends on smp_callin() having parsed the CPUID features, plus the socket_cpumask[] also being set. > --- a/xen/arch/x86/include/asm/time.h > +++ b/xen/arch/x86/include/asm/time.h > @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int > int time_suspend(void); > int time_resume(void); > > +void preinit_percpu_time(unsigned int cpu); > void init_percpu_time(void); > void time_latch_stamps(void); > > --- a/xen/arch/x86/smpboot.c > +++ b/xen/arch/x86/smpboot.c > @@ -1139,6 +1139,7 @@ static int cf_check cpu_smpboot_callback > { > case CPU_UP_PREPARE: > rc = cpu_smpboot_alloc(cpu); > + preinit_percpu_time(cpu); > break; > case CPU_UP_CANCELED: > case CPU_DEAD: > --- a/xen/arch/x86/time.c > +++ b/xen/arch/x86/time.c > @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) > ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); > } > > +void preinit_percpu_time(unsigned int cpu) > +{ > + /* Initial estimate for TSC rate etc. */ > + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); > +} > + > void init_percpu_time(void) > { > struct cpu_time *t = &this_cpu(cpu_time); > @@ -2353,9 +2359,6 @@ void init_percpu_time(void) > u64 tsc; > s_time_t now; > > - /* Initial estimate for TSC rate. */ > - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; Wouldn't it be simpler to pull this out of init_percpu_time() and do it at the start of start_secondary()? Thanks, Roger. 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Wed, 06 May 2026 03:38:13 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:38:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/time: avoid early uses of NOW() to return zero To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <746ce9af-156b-4c16-8cc0-6e8d929107a0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778063894-A857B161-6FDD20FA/0/0 X-purgate-type: clean X-purgate-size: 3601 On 06.05.2026 12:11, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:37:41AM +0200, Jan Beulich wrote: >> RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which >> checks for NOW() returning 0 (falling back to TSM_RAW in this case). >> For now I have no idea how to avoid this, except that when CPUID leaf >> 0x15 is available we could leverage that to put in place at least an >> approximate scale value. Doing so could, however, lead to a >> discontinuity (returned value moving backwards) once the final scale >> value was put in place. (Note, however, that such a discontinuity can >> also result from init_percpu_time() using the BSP's scale value as >> initial estimate for APs. Then again local_time_calibration() at >> least makes an attempt at avoiding such.) > > For the purposes of printk_start_of_line() we could unconditionally > use get_cycles() when system_state < SYS_STATE_smp_boot IMO. Hmm, "raw" console timestamps are quite a bit uglier to deal with as a human. Also, while init_xen_time() is pretty close to us setting SYS_STATE_smp_boot, early_time_init() occurs earlier (and with init_percpu_time() also called from there that's enough for "good" timestamps). > Using > the frequency value from CPUID seems like a good approach also on > boxes that expose this information. As per what you suggest below, we may then need to increase that value by some margin, to have NOW() rather move a little to slow than too fast. Plus of course it won't help for AMD at all. > I wonder, we seem to unconditionally perform the TSC calibration > against a known frequency time source, wouldn't it be more reliable to > use the information from leaf 0x15 when available? Andrew has been suggesting this, but I can only keep saying that what CPUID reports are nominal values aiui, not actual ones. From what I know, there's always some (small) variation as to the frequency of actual crystals. And it's unclear whether our calibration is more precise than what CPUID tells us. (If we knew at least average errors, we could maybe calculate the value to use from both the calculated and the nominal value.) >> RFC: While generally the mentioned waiting loops will take longer to time >> out, on a very fast CPU tight loops may time out too early. > > I was wondering about that, increasing just a nano-second for each > call seems like it's going to make progress fairly slow? Obviously > depends on how tights the calls to NOW() are in the outside loop. > > Maybe when lacking frequency information from CPUID we could assume > something like 8GHz and scale the TSC based on that? AFAICT it's > advisable to use a frequency greater than any CPU, as then we don't > risk NOW() running too fast. Whatever value we pick, something faster may later appear. And too high a value isn't good either. >> RFC: In get_s_time_fixed(), should we perhaps assert that the scale was >> set? > > Might be good, but I would like to see what explodes when doing > that... Of course that would need checking first. I've audited the callers, and all looked safe to me. Will do for v2. >> I don't think Fixes: tags should be put here. If we did, we'd have to >> enumerate all introductions of early uses of NOW() (or get_s_time()), with >> the exception of those dealing with getting back 0 (which I expect is only >> printk_start_of_line()). > > I'm fine with no fixes tag, but we need to remember to backport this > one. Definitely. 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Wed, 06 May 2026 03:46:11 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:46:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/time: set AP's TSC scale estimate earlier To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <1e23dd78-b246-4fc7-9e18-de8b0cd57721@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778064372-23F7EC48-12E38768/0/0 X-purgate-type: clean X-purgate-size: 2332 On 06.05.2026 12:33, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:39:14AM +0200, Jan Beulich wrote: >> NOW() (in particular) can be used ahead of init_percpu_time(). As the >> initial scale value set is merely the BSP's, we can as well set it before >> actually launching the AP. Don't introduce yet another notifier function >> though; do this from smpboot.c's. >> >> Setting the scale alone, however, doesn't work, so the entire struct >> cpu_time is copied. >> >> Signed-off-by: Jan Beulich >> --- >> RFC: Copying the entire struct won't work very well when tsc_adjust[] is >> in use (and values there differ between sockets). >> >> This in particular eliminates an anomaly with log messages issued early >> while APs are coming up, when "boot" console timestamps are in use. > > Could we consider moving init_percpu_time() earlier in > start_secondary()? I think it's main dependency is on > set_cpu_sibling_map(), which we could also move earlier? > > Looking further, seems like it depends on smp_callin() having parsed > the CPUID features, plus the socket_cpumask[] also being set. Right, and CPUID retrieving in turn wants to be after ucode loading. Ucode loading, however, is the primary source of AP boot log messages that I'm aware of. >> --- a/xen/arch/x86/time.c >> +++ b/xen/arch/x86/time.c >> @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) >> ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); >> } >> >> +void preinit_percpu_time(unsigned int cpu) >> +{ >> + /* Initial estimate for TSC rate etc. */ >> + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); >> +} >> + >> void init_percpu_time(void) >> { >> struct cpu_time *t = &this_cpu(cpu_time); >> @@ -2353,9 +2359,6 @@ void init_percpu_time(void) >> u64 tsc; >> s_time_t now; >> >> - /* Initial estimate for TSC rate. */ >> - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; > > Wouldn't it be simpler to pull this out of init_percpu_time() and do > it at the start of start_secondary()? As long as it's only copying memory, that may work fine. Plus, yes, it would allow accessing actual registers of the CPU being brought up, if need be. I'm slightly wary, but I guess I'll follow this suggestion. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="BPtx1NF9RdXMA+6z" Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-33051d/1778066127-41B92938-64094735/0/0 X-purgate-type: clean X-purgate-size: 2720 --BPtx1NF9RdXMA+6z Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Wed, 6 May 2026 13:15:22 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= , "xen-devel@lists.xenproject.org" Subject: Re: Problem with PCI-passthrough to PV guest On Wed, May 06, 2026 at 11:18:28AM +0200, Roger Pau Monn=C3=A9 wrote: > On Wed, May 06, 2026 at 10:45:49AM +0200, J=C3=BCrgen Gro=C3=9F wrote: > > On 05.05.26 20:47, Roger Pau Monn=C3=A9 wrote: > > > On Tue, May 05, 2026 at 05:53:31PM +0200, J=C3=BCrgen Gro=C3=9F wrote: > > > > SUSE QA is seeing a problem with PCI-passthrough of a SR-IOV to a P= V guest > > > > running a 6.4 based kernel, but I can reproduce the problem with up= stream > > > > kernel, too. > >=20 > > Uh, seems my tested kernel was only "nearly upstream" (it was an early > > 7.0 kernel). It was missing commit 0949c646d646, which makes the differ= ence. > >=20 > > So for now this issue will only show up for cases where a PV-guest is > > setup for PCI passthrough and it gets memory hotplugged before the PCI > > device is added to it. >=20 > Hm, yes, this is yet more fallout from the unpopulated-alloc changes. > For PV guests that have the e820 host available we could try to create > the hotplug regions over what are host RAM region in the memory map, > as then we know we won't be overlapping with MMIO areas. FWIW, my Linux testing series also(?) found a PV PCI-passthrough issue in recent Linux (linux-next from a few days ago there). While it looks to be a different issue, it would help a lot to have that series in, to at least detect regressions early. See https://lore.kernel.org/xen-devel/cover.30e6171ddf1c6a72eadf4af0a77c892d4f1= 8d811.1777898148.git-series.marmarek@invisiblethingslab.com/ --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --BPtx1NF9RdXMA+6z Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmn7IsoACgkQ24/THMrX 1yzPYAgAgL0huzKRxGal0fySxl+meBobKw0S0jiS74w24B6k4KQkl8hmw/CwNhYq zSK17H8yOFaIVTI1rZoyHn7ZYP2siwn65wkB7wo5FWzp7ArZo4l9olERLrj+m29n XZyKUdjsvakSpF7jcl66SVi6tHpVR1Gkn2+Ve+LXlmn1deUmsfdxaAZpdkxjlxpM pvIEo83m8DEdN8kjdbRXiU/IhiUT/wI8r12pItFoO7VyxSNs1gd4vWvCZHYG1aXf Z8ABTE7E54GUKyibvWXmK+ZK/vUoxpsbaz1DqMOh7N+u2J+BoSvYJdCzoWnzz2fU pajl8R+7UzBQYuETMHZ3nZx67v2nWw== =+GUB -----END PGP SIGNATURE----- --BPtx1NF9RdXMA+6z-- From xen-devel-bounces@lists.xenproject.org Wed May 06 11:15:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 11:15:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301600.1575859 (Exim 4.92) (envelope-from ) id 1wKaEG-0004Ik-Tv; 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich > --- > Of course the time it takes to do all the CMOS reads (or whichever else > wallclock time source is in use) also results in an inaccuracy. For > __get_cmos_time() this might be solvable by having it latch NOW() before > doing the 6 reads, but in particular for efi_get_time() there's hardly > anything we can do. > > As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > find any deviation for the two instances fixed here. What am I missing? > > For __get_cmos_time(), tangentially: Wouldn't we better use the > century byte if available? As it stands, things will break in 2070. Which > is a long way out, yes, but still. (Of course this would mean a 7th slow > I/O port write/read pair.) Seems fine to me. One further note: in __get_cmos_time() I think we want to read backwards, so start with century then year and so on, so the last read is seconds, as to avoid extra skew. Thanks, Roger. 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Wed, 06 May 2026 04:45:38 -0700 (PDT) Message-ID: <8bd8e079-f3af-404e-adc5-1542422f39b5@suse.com> Date: Wed, 6 May 2026 13:45:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Nicola Vetrini References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778067938-AE143FF4-30D2E27C/0/0 X-purgate-type: clean X-purgate-size: 2456 On 06.05.2026 13:15, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:35:45AM +0200, Jan Beulich wrote: >> As a comment next to one of the invocations states, get_wallclock_time() >> can take over a second. The order of evaluation of function arguments is >> in principle unspecified; in practice at least gcc looks to be evaluating >> them from last to first. Hence with NOW() invoked first, the respective >> value passed to do_settime() can be off by over a second (which is in >> contrast to __get_cmos_time() attempting to get the time exactly after an >> update, i.e. [pretty] precisely at a seconds boundary). >> >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression >> and its persistent side-effects shall be the same under all permitted >> evaluation orders") violation each. >> >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >> Signed-off-by: Jan Beulich >> --- >> Of course the time it takes to do all the CMOS reads (or whichever else >> wallclock time source is in use) also results in an inaccuracy. For >> __get_cmos_time() this might be solvable by having it latch NOW() before >> doing the 6 reads, but in particular for efi_get_time() there's hardly >> anything we can do. >> >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't >> find any deviation for the two instances fixed here. What am I missing? >> >> For __get_cmos_time(), tangentially: Wouldn't we better use the >> century byte if available? As it stands, things will break in 2070. Which >> is a long way out, yes, but still. (Of course this would mean a 7th slow >> I/O port write/read pair.) > > Seems fine to me. I'll make a patch, provided I can figure out under what conditions the byte is present / valid (hopefully that won't involve ACPI AML). > One further note: in __get_cmos_time() I think we want to read > backwards, so start with century then year and so on, so the last read > is seconds, as to avoid extra skew. I don't think this matters. It would be awkward if those reads took over a second. Plus if it did, the UIP flag would transiently be set, in which case doing the reads wouldn't be valid in the first place. Arguably this can in principle happen if a SMI hits in the middle, and its handling takes excessively long. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778068451-09B68C48-499F5830/0/0 X-purgate-type: clean X-purgate-size: 3165 On 06.05.2026 11:39, Mykyta Poturai wrote: > On 5/4/26 08:37, Jan Beulich wrote: >> On 23.04.2026 12:12, Mykyta Poturai wrote: >>> On 4/21/26 17:43, Jan Beulich wrote: >>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>> From: Stewart Hildebrand >>>>> >>>>> This code is expected to only be used by privileged domains, >>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>> >>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>> for possible changes in the system page size register. Also force VFs to >>>>> always use emulated reads for command register, this is needed to >>>>> prevent some drivers accidentally unmapping BARs. >>>> >>>> This apparently refers to the change to vpci_init_header(). Writes are >>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>> the memory decode bit there is hardwired to 0. >>>> >>>>> Discovery of VFs is >>>>> done by Dom0, which must register them with Xen. >>>> >>>> If we intercept control register writes, why would we still require >>>> Dom0 to report the VFs that appear? >>>> >>> >>> Sorry, I don't understand this question. You specifically requested this >>> to be done this way in V2. Quoting your reply from V2 below. >>> >>> > Aren't you effectively busy-waiting for these 100ms, by simply >>> returning "true" >>> > from vpci_process_pending() until the time has passed? This imo is a >>> no-go. You >>> > want to set a timer and put the vCPU to sleep, to wake it up again >>> when the >>> > timer has expired. That'll then eliminate the need for the >>> not-so-nice patch 4. >>> >>> > Question is whether we need to actually go this far (right away). I >>> expect you >>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>> > domain, can't we trust it to set things up correctly, just like we >>> trust it in >>> > a number of other aspects? >> >> How's any of this related to the question I raised here, or your reply >> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >> Why still demand Dom0 to report them then? >> > > The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > set to become alive. We discussed in the V2 that it is not acceptable to > do a required 100ms wait in Xen while blocking a domain. And not doing > that blocking would require some mechanism to only allow a domain to run > for precisely 99(or more?)ms. You yourself suggested that we can trust > the hardware domain with registering VFs if we already trust it with > other PCI-related stuff. Did you change your mind, or am I completely > misunderstanding this question? No, I still think that we can trust hwdom enough. Nevertheless we should aim at being independent of it where possible. And I seem to recall that I had also outlined an approach how to avoid spin-waiting for 100ms in the hypervisor. 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No specific reason except to be aligned with similar alignment below, it could be lesser (PAGE_SIZE or even just unsigned long aligned) or even dropped, I think. It was just easier then to calculate aligned addresses. But I don't see any big issue to have such alignments except maybe that it will waste some memory. > >> + const paddr_t modsize = initrd_len + dtb_len; >> + unsigned int bi = banks->nr_banks; >> + >> + BUG_ON(modsize < initrd_len); > > Where's the earlier check that allows this to be BUG_ON()? There isn't one. I will replace that with: if ( modsize < initrd_len ) panic("Module size overflow: initrd + dtb size wraps paddr_t\n"); > >> + /* >> + * Place modules as high in RAM as possible, scanning banks from >> + * last to first so that the end of the last bank is preferred. >> + */ >> + while ( bi-- > 0 ) >> + { >> + const struct membank *bank = &banks->bank[bi]; >> + const paddr_t bank_end = bank->start + bank->size; >> + paddr_t modbase; >> + >> + if ( modsize > bank->size ) >> + continue; >> + >> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); > > Same question here. I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be potentially used in page table. > >> + if ( modbase < bank->start ) >> + continue; >> + >> + /* >> + * If modules would overlap the kernel, try placing them below it. >> + */ > > With how kernel_image_place() works, and with the heavy alignment applied > above, is this even possible to succeed? Oh, wait, yes - for the not- > position-independent case. I don't understand what is wrong with putting initrd and dtb to basically any place except where kernel is expected to be placed (as in case of position dependent case I assume it is pretty crucial). > >> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >> + (modbase + modsize > kernbase) ) >> + { >> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); > > What prevents this subtraction from underflowing? I will put the following check at the start of the place_modules() function: if ( kernbase < modsize ) panic("Underflow could happen between kernbase and modsize\n"); > >> +static paddr_t __init kernel_image_place(struct kernel_info *info) >> +{ >> + paddr_t load_addr = INVALID_PADDR; >> + uint64_t image_size = info->image.image_size ?: info->image.len; >> + const struct membanks *banks = kernel_info_get_mem_const(info); >> + unsigned int nr_banks = banks->nr_banks; >> + unsigned int bi; >> + >> + dprintk(XENLOG_DEBUG, "nr_banks(%u)\n", nr_banks); > > Did you mean to drop this before submitting? Sure, it should be dropped. > >> + /* >> + * At the moment, RISC-V's Linux kernel should be always position >> + * independent based on "Per-MMU execution" of boot.rst: >> + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution >> + * >> + * But just for the case when RISC-V's Linux kernel isn't position >> + * independent it is needed to take load address from >> + * info->image.start. >> + * >> + * If `start` is zero, the Image is position independent. >> + */ >> + if ( likely(!info->image.start) ) >> + { >> + for ( bi = 0; bi != nr_banks; bi++ ) >> + { >> + const struct membank *bank = &banks->bank[bi]; >> + paddr_t bank_start = bank->start; >> + /* >> + * According to boot.rst kernel load address should be properly >> + * aligned: >> + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location >> + * >> + * As Image in this case is PIC we can ignore >> + * info->image.text_offset. >> + */ >> + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); >> + paddr_t bank_end = bank_start + bank->size; >> + paddr_t bank_size; >> + >> + if ( aligned_start > bank_end ) >> + continue; >> + >> + bank_size = bank_end - aligned_start; >> + >> + dprintk(XENLOG_DEBUG, "bank[%u].start=%"PRIpaddr"\n", bi, bank->start); > > And this one? (I also find it puzzling that ->start would be of (primary) interest > here, when ... > >> + if ( image_size <= bank_size ) > > ... bank_size is what's relevant. This one should be dropped too. > >> +/* Check if the image is a 64-bit Image */ >> +static int __init kernel_image64_probe(struct kernel_info *info, >> + paddr_t addr, paddr_t size) >> +{ >> + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ >> + struct { >> + uint32_t code0; /* Executable code */ >> + uint32_t code1; /* Executable code */ >> + uint64_t text_offset; /* Image load offset, little endian */ >> + uint64_t image_size; /* Effective Image size, little endian */ >> + uint64_t flags; /* kernel flags, little endian */ >> + uint32_t version; /* Version of this header */ >> + uint32_t res1; /* Reserved */ >> + uint64_t res2; /* Reserved */ >> + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ >> + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ >> + uint32_t res3; /* Reserved for PE COFF offset */ >> + } image; >> + uint64_t effective_size; >> + >> + if ( size < sizeof(image) ) >> + return -EINVAL; >> + >> + copy_from_paddr(&image, addr, sizeof(image)); >> + >> + /* Magic v1 is deprecated and may be removed. Only use v2 */ >> + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) >> + return -EINVAL; >> + >> + effective_size = le64_to_cpu(image.image_size); >> + >> + if ( effective_size && size > effective_size ) >> + return -EINVAL; > > Is the rhs of the && the wrong way round? If effective_size > size, > aren't you in trouble? Question of course is what "effective" really > means. Yet in any event it seems dubious to me that effective_size < > size would really be a problem. IOW this will want commenting upon > if the check is to stay. > > Actually ... > >> + info->image.kernel_addr = addr; >> + /* Actual size in the binary file */ >> + info->image.len = size; >> + /* Total memory the kernel occupies at runtime */ >> + info->image.image_size = effective_size; > > ... this looks to suggest something .bss-like. Yes, effective_size it is size which included .bss. size it of LK after decompression of Image.gz and it doesn't include .bss so it should be lesser then effective_size. I don't think that I am in trouble that effective_size is bigger then size if we allocate enough space in memory effective_size is fine to be bigger. It is a good question if effective_size < size is a problem. I think it isn't but could it be really happen? I think that I am okay to drop that part of if(). > >> --- a/xen/include/xen/fdt-kernel.h >> +++ b/xen/include/xen/fdt-kernel.h >> @@ -59,8 +59,15 @@ struct kernel_info { >> struct { >> paddr_t kernel_addr; >> paddr_t len; >> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) >> - paddr_t text_offset; /* 64-bit Image only */ >> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) >> + /* >> + * ARM: 64-bit Image only. >> + * RISC-V: both 32-bit and 64-bit Images. >> + */ >> + paddr_t text_offset; >> +#endif >> +#if defined(CONFIG_RISCV) >> + uint64_t image_size; /* Effective size of Image */ > > As this (apparently) is for both RV64 and RV32 - can the latter really have > wider than 32-bit image sizes? If not - use size_t or unsigned long here? Agree, unsigned long should be enough. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 12:05:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 12:05:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301663.1575895 (Exim 4.92) (envelope-from ) id 1wKb0A-0004oR-4i; Wed, 06 May 2026 12:05:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301663.1575895; Wed, 06 May 2026 12:05:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKb0A-0004oK-1m; Wed, 06 May 2026 12:05:18 +0000 Received: by outflank-mailman (input) for mailman id 1301663; Wed, 06 May 2026 12:05:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKb09-0004oD-3V for xen-devel@lists.xenproject.org; Wed, 06 May 2026 12:05:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKb08-00DLT7-Cp for xen-devel@lists.xenproject.org; Wed, 06 May 2026 14:05:16 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb2e73-bab6-0a2a0a5309dd-0a2a4505ad8a-30 for ; Wed, 06 May 2026 14:05:16 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb2e7c-aaa8-0a2a45050019-d1558035d8ca-3 for ; Wed, 06 May 2026 14:05:16 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4891c00e7aeso54011925e9.2 for ; Wed, 06 May 2026 05:05:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 05:05:15 -0700 (PDT) Message-ID: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Date: Wed, 6 May 2026 14:05:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper From: Jan Beulich Subject: [PATCH] CI: collect certain intermediate files as artifacts Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778069116-DAF6E443-656ED7D2/0/0 X-purgate-type: clean X-purgate-size: 1624 When one of the linking passes fails, additional intermediate files are still in place. Having them available for analysis of the underlying problem can be pretty helpful. Collect some into a new intermediates/ directory. (Nothing new will be collected if linking succeeds.) While there also make sure xen-syms is collected (into binaries/). This is rather more useful for analysis of possible problems than its stripped counterpart. Signed-off-by: Jan Beulich --- As the issue this is meant to help with didn't re-occur with this in place, the new logic wasn't really tested yet. --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -6,6 +6,7 @@ artifacts: paths: - binaries/ + - intermediates/ - xen-config - xen-cppcheck.txt - '*.log' --- a/automation/scripts/build +++ b/automation/scripts/build @@ -41,18 +41,24 @@ fi # to exit early -- bash is invoked with -e. cp xen/.config xen-config -# Directory for the artefacts to be dumped into -mkdir -p binaries +# Directories for the artefacts to be dumped into +mkdir -p binaries intermediates collect_xen_artefacts() { local f - for f in xen/xen xen/xen.efi; do + for f in xen/xen xen/xen-syms xen/xen.efi; do if [[ -f $f ]]; then cp $f binaries/ fi done + + for f in xen/.xen-syms.* xen/.xen.efi.*; do + if [[ -f $f ]]; then + cp $f intermediates/ + fi + done } if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then From xen-devel-bounces@lists.xenproject.org Wed May 06 12:45:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 12:45:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301692.1575908 (Exim 4.92) (envelope-from ) id 1wKbcv-0002JB-2m; Wed, 06 May 2026 12:45:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301692.1575908; Wed, 06 May 2026 12:45:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKbcu-0002J3-Vr; Wed, 06 May 2026 12:45:20 +0000 Received: by outflank-mailman (input) for mailman id 1301692; Wed, 06 May 2026 12:45:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKbcs-0002Ix-Sz for xen-devel@lists.xenproject.org; Wed, 06 May 2026 12:45:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKbcr-002h4o-U4 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 14:45:17 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb37d0-bab6-0a2a0a5309dd-0a2a4508be68-38 for ; Wed, 06 May 2026 14:45:17 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb37dd-63b5-0a2a45080019-d1558035a5a5-3 for ; Wed, 06 May 2026 14:45:17 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so6463875e9.1 for ; Wed, 06 May 2026 05:45:17 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778071517-BEF72DB1-CF07FBC7/0/0 X-purgate-type: clean X-purgate-size: 6045 On 06.05.2026 13:57, Oleksii Kurochko wrote: > On 5/4/26 4:05 PM, Jan Beulich wrote: >> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>> --- /dev/null >>> +++ b/xen/arch/riscv/kernel.c >>> @@ -0,0 +1,242 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#include >>> + >>> +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ >>> + >>> +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, >>> + paddr_t kernend) >>> +{ >>> + const struct boot_module *mod = info->bd.initrd; >>> + const struct membanks *banks = kernel_info_get_mem_const(info); >>> + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, >>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>> + KERNEL_LOAD_ADDR_ALIGNMENT); >> > >> Why would modules need to be this strongly aligned? > No specific reason except to be aligned with similar alignment below, it > could be lesser (PAGE_SIZE or even just unsigned long aligned) or even > dropped, I think. It was just easier then to calculate aligned > addresses. But I don't see any big issue to have such alignments except > maybe that it will waste some memory. Or result in there not being enough memory to hold everything. >>> + /* >>> + * Place modules as high in RAM as possible, scanning banks from >>> + * last to first so that the end of the last bank is preferred. >>> + */ >>> + while ( bi-- > 0 ) >>> + { >>> + const struct membank *bank = &banks->bank[bi]; >>> + const paddr_t bank_end = bank->start + bank->size; >>> + paddr_t modbase; >>> + >>> + if ( modsize > bank->size ) >>> + continue; >>> + >>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >> >> Same question here. > > I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be > potentially used in page table. I fear I'm lost. All the modules are temporary entities, aren't they? >>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>> + (modbase + modsize > kernbase) ) >>> + { >>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >> >> What prevents this subtraction from underflowing? > > I will put the following check at the start of the place_modules() function: > if ( kernbase < modsize ) > panic("Underflow could happen between kernbase and modsize\n"); Wait - why would this be a legitimate condition to panic? >>> +/* Check if the image is a 64-bit Image */ >>> +static int __init kernel_image64_probe(struct kernel_info *info, >>> + paddr_t addr, paddr_t size) >>> +{ >>> + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ >>> + struct { >>> + uint32_t code0; /* Executable code */ >>> + uint32_t code1; /* Executable code */ >>> + uint64_t text_offset; /* Image load offset, little endian */ >>> + uint64_t image_size; /* Effective Image size, little endian */ >>> + uint64_t flags; /* kernel flags, little endian */ >>> + uint32_t version; /* Version of this header */ >>> + uint32_t res1; /* Reserved */ >>> + uint64_t res2; /* Reserved */ >>> + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ >>> + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ >>> + uint32_t res3; /* Reserved for PE COFF offset */ >>> + } image; >>> + uint64_t effective_size; >>> + >>> + if ( size < sizeof(image) ) >>> + return -EINVAL; >>> + >>> + copy_from_paddr(&image, addr, sizeof(image)); >>> + >>> + /* Magic v1 is deprecated and may be removed. Only use v2 */ >>> + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) >>> + return -EINVAL; >>> + >>> + effective_size = le64_to_cpu(image.image_size); >>> + >>> + if ( effective_size && size > effective_size ) >>> + return -EINVAL; >> >> Is the rhs of the && the wrong way round? If effective_size > size, >> aren't you in trouble? Question of course is what "effective" really >> means. Yet in any event it seems dubious to me that effective_size < >> size would really be a problem. IOW this will want commenting upon >> if the check is to stay. >> >> Actually ... >> >>> + info->image.kernel_addr = addr; >>> + /* Actual size in the binary file */ >>> + info->image.len = size; >>> + /* Total memory the kernel occupies at runtime */ >>> + info->image.image_size = effective_size; >> >> ... this looks to suggest something .bss-like. > > Yes, effective_size it is size which included .bss. > > size it of LK after decompression of Image.gz and it doesn't include > .bss so it should be lesser then effective_size. > > I don't think that I am in trouble that effective_size is bigger then > size if we allocate enough space in memory effective_size is fine to be > bigger. > > It is a good question if effective_size < size is a problem. I think it > isn't but could it be really happen? A kernel image (file) could have data appended to it, e.g. a certificate. With only small .bss that certificate could end up larger than the .bss size, and hence effective_size < size. > I think that I am okay to drop that part of if(). Please do, unless there is a(nother) reason to have it. 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The order of evaluation of function arguments is > >> in principle unspecified; in practice at least gcc looks to be evaluating > >> them from last to first. Hence with NOW() invoked first, the respective > >> value passed to do_settime() can be off by over a second (which is in > >> contrast to __get_cmos_time() attempting to get the time exactly after an > >> update, i.e. [pretty] precisely at a seconds boundary). > >> > >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > >> and its persistent side-effects shall be the same under all permitted > >> evaluation orders") violation each. > >> > >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > >> Signed-off-by: Jan Beulich > >> --- > >> Of course the time it takes to do all the CMOS reads (or whichever else > >> wallclock time source is in use) also results in an inaccuracy. For > >> __get_cmos_time() this might be solvable by having it latch NOW() before > >> doing the 6 reads, but in particular for efi_get_time() there's hardly > >> anything we can do. > >> > >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > >> find any deviation for the two instances fixed here. What am I missing? > >> > >> For __get_cmos_time(), tangentially: Wouldn't we better use the > >> century byte if available? As it stands, things will break in 2070. Which > >> is a long way out, yes, but still. (Of course this would mean a 7th slow > >> I/O port write/read pair.) > > > > Seems fine to me. > > I'll make a patch, provided I can figure out under what conditions the byte > is present / valid (hopefully that won't involve ACPI AML). It's in the ACPI FADT table AFAIK. > > One further note: in __get_cmos_time() I think we want to read > > backwards, so start with century then year and so on, so the last read > > is seconds, as to avoid extra skew. > > I don't think this matters. It would be awkward if those reads took over a > second. Plus if it did, the UIP flag would transiently be set, in which > case doing the reads wouldn't be valid in the first place. Arguably this > can in principle happen if a SMI hits in the middle, and its handling > takes excessively long. Oh, I see, indeed. Thanks, Roger. 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mod->size : 0, >>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>> >> >>> Why would modules need to be this strongly aligned? >> No specific reason except to be aligned with similar alignment below, it >> could be lesser (PAGE_SIZE or even just unsigned long aligned) or even >> dropped, I think. It was just easier then to calculate aligned >> addresses. But I don't see any big issue to have such alignments except >> maybe that it will waste some memory. > > Or result in there not being enough memory to hold everything. Do you prefer than not to have alignment at all? > >>>> + /* >>>> + * Place modules as high in RAM as possible, scanning banks from >>>> + * last to first so that the end of the last bank is preferred. >>>> + */ >>>> + while ( bi-- > 0 ) >>>> + { >>>> + const struct membank *bank = &banks->bank[bi]; >>>> + const paddr_t bank_end = bank->start + bank->size; >>>> + paddr_t modbase; >>>> + >>>> + if ( modsize > bank->size ) >>>> + continue; >>>> + >>>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>> >>> Same question here. >> >> I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be >> potentially used in page table. > > I fear I'm lost. All the modules are temporary entities, aren't they? They are temporary entities but they should be copied to guest memory, right? So ioremap() should be called for paddr where module is located and so at least less cycles will be needed to add entries to Xen page tables. I don't know if it makes sense to have such type of optimizations. If not then probably we don't need alignment here too. I don't see at the moment any alignment requirements for initrd and dtb. The only theoretical reason why at least for dtb we need requirement is that what Arm mentioned in its booting.rst: The device tree blob (dtb) must be placed on an 8-byte boundary and must not exceed 2 megabytes in size. Since the dtb will be mapped cacheable using blocks of up to 2 megabytes in size, it must not be placed within any 2M region which must be mapped with any specific attributes. It likely should be true for RISC-V as I assume this part was copied from Arm port. On other side it doesn't mentioned explicitly in boot.rst of RISC-V in LK. > >>>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>>> + (modbase + modsize > kernbase) ) >>>> + { >>>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>> >>> What prevents this subtraction from underflowing? >> >> I will put the following check at the start of the place_modules() function: >> if ( kernbase < modsize ) >> panic("Underflow could happen between kernbase and modsize\n"); > > Wait - why would this be a legitimate condition to panic? It is legitimate to panic() as common API which leads to place_module() has void in its return type (what should be changed in future, I have this in TODO) and so if something is going wrong in place_module() there is not better option except panic() for now. But generally i think it was too much to panic and it would be just better to put: if ( kernbase < modsize ) continue; above modbase = ROUNDDOWN(...) so it will just put modules in different bank. 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While there remove the unlikely(), this is not a hot path anyway. No functional change, as there are no current callers that pass force == true. Signed-off-by: Roger Pau Monné Acked-by: Jan Beulich --- xen/drivers/passthrough/amd/iommu_init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..76ae78e5ea53 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -929,13 +929,13 @@ static void enable_iommu(struct amd_iommu *iommu) amd_iommu_flush_all_caches(iommu); } -static void disable_iommu(struct amd_iommu *iommu) +static void disable_iommu(struct amd_iommu *iommu, bool force) { unsigned long flags; spin_lock_irqsave(&iommu->lock, flags); - if ( unlikely(!iommu->enabled) ) + if ( !iommu->enabled && !force ) goto out; if ( !iommu->ctrl.int_cap_xt_en ) @@ -1139,7 +1139,7 @@ static void __init amd_iommu_init_cleanup(void) iommu->ctrl.int_cap_xt_en = 0; if ( iommu->enabled ) - disable_iommu(iommu); + disable_iommu(iommu, false); else if ( iommu->mmio_base ) writeq(iommu->ctrl.raw, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); @@ -1584,7 +1584,7 @@ void cf_check amd_iommu_crash_shutdown(void) struct amd_iommu *iommu; for_each_amd_iommu ( iommu ) - disable_iommu(iommu); + disable_iommu(iommu, false); } void cf_check amd_iommu_resume(void) @@ -1598,7 +1598,7 @@ void cf_check amd_iommu_resume(void) * To make sure that iommus have not been touched * before re-enablement */ - disable_iommu(iommu); + disable_iommu(iommu, false); enable_iommu(iommu); if ( !iommu->features.flds.ia_sup ) invalidate_all = false; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 13:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 13:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301764.1575965 (Exim 4.92) (envelope-from ) id 1wKcjd-0004tB-5n; Wed, 06 May 2026 13:56:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301764.1575965; Wed, 06 May 2026 13:56:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjd-0004t2-1L; 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We don't know what registers might be there, nor which values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region does put the IOMMU in a broken state, which is not recoverable by the IOMMU initialization procedure in Xen. Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold map_iommu_mmio_region() into it's only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- Changes since v1: - Zero the control register after calling disable_iommu(). - Print a warning message if the IOMMU is handed enabled to Xen from firmware. - Fix commit log grammar issues. --- xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 76ae78e5ea53..ffc041211fb5 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* Read current control register and forcefully disable the IOMMU. */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + if ( iommu->ctrl.iommu_en ) + printk(XENLOG_WARNING + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", + &iommu->sbdf, iommu->ctrl.raw); + disable_iommu(iommu, true); + + /* With the IOMMU disabled zero the control register. */ + iommu->ctrl.raw = 0; + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 13:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 13:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301761.1575947 (Exim 4.92) (envelope-from ) id 1wKcjV-0004QM-JK; Wed, 06 May 2026 13:56:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301761.1575947; Wed, 06 May 2026 13:56:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjV-0004QF-Fc; Wed, 06 May 2026 13:56:13 +0000 Received: by outflank-mailman (input) for mailman id 1301761; Wed, 06 May 2026 13:56:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjT-0004Q9-Fo for xen-devel@lists.xenproject.org; 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From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: [PATCH v2 0/2] iommu/amd-vi: remove zeroing of MMIO region Date: Wed, 6 May 2026 15:55:12 +0200 Message-ID: <20260506135514.47310-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.53.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MR1P264CA0164.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:55::15) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|BY5PR03MB5064:EE_ X-MS-Office365-Filtering-Correlation-Id: b4a54b7c-be1e-4ff5-8781-08deab773825 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: l1Rb7onEzjtHT2uObgiM7/OI8aGg5ZGcJUQr1UOa72S4xpegeBNZEs0SncbwaHY7ao+p1BzqQ5Fxw2RZk/TTrQZgv6Ng8KNRoTpe1Ynphq5hZx2tCMOUNF93VcCWKZK09yJtEK3Bi2E3BhYIQAArWWH2KOl2ChmuZJDim9gQBL7GKwvJM1LiCRxQcIwYdTVdTF3SY+Rbj1HyhOYqBHxYMi3avva10oY+9CnHDSeu4AK+IDzRtYlzfPeC3Ul0xbwY7GZ3jJIBisyqh62m58+clXBiINpICF/iWTUxNETbRjDRcXwqzd8tyn540D5acCPbx2m8OYfrxHN5MilOUBlgJX2pIWoRbCzFaXDk1YPVSpWRTcjuFuTVjFJzS+NeTJ4ivMefvammkrqtvmfeODW8tIaCZqLW7PfAGcmLJmiC/KIfliYbVzNnqpBjj1p+VR6/XUZR+5NoccC9UHrFmPYq6HJp9KsbU5gWeXcpRscTrVfF8hLUT8DiBWQ4hKWb3VIf9mRZMbdEyEGpIuHu0Iqyr8VysrEOAVqSjEe/Pa9cwN5pZ2dLBtzk0RiReAL+NLMflW/IRnnVKZhJt5IaKlHUQX30n2Yt4ET67pDNMTyuEOnA58FVFph6n0dmxRNHhfVhKrxS59csCK+OLDtMNQGQgYos+7aNPalB258JFcQBTSq18uYMqwSxotekgz2xmFZm X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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Get rid of the zeroing, and instead attempt to disable the IOMMU ahead of enabling it. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778076178-3A378938-60E46E77/0/0 X-purgate-type: clean X-purgate-size: 4953 On 06.05.2026 15:43, Oleksii Kurochko wrote: > On 5/6/26 2:45 PM, Jan Beulich wrote: >> On 06.05.2026 13:57, Oleksii Kurochko wrote: >>> On 5/4/26 4:05 PM, Jan Beulich wrote: >>>> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>>>> --- /dev/null >>>>> +++ b/xen/arch/riscv/kernel.c >>>>> @@ -0,0 +1,242 @@ >>>>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>>>> + >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> + >>>>> +#include >>>>> + >>>>> +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ >>>>> + >>>>> +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, >>>>> + paddr_t kernend) >>>>> +{ >>>>> + const struct boot_module *mod = info->bd.initrd; >>>>> + const struct membanks *banks = kernel_info_get_mem_const(info); >>>>> + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, >>>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>> >>>> Why would modules need to be this strongly aligned? >>> No specific reason except to be aligned with similar alignment below, it >>> could be lesser (PAGE_SIZE or even just unsigned long aligned) or even >>> dropped, I think. It was just easier then to calculate aligned >>> addresses. But I don't see any big issue to have such alignments except >>> maybe that it will waste some memory. >> >> Or result in there not being enough memory to hold everything. > > Do you prefer than not to have alignment at all? Some minimal alignment (like to machine word size) may be helpful, for copying to be more efficient. There may also be reasons to use page alignment (e.g. if the pages were to be assigned directly to the domains, without any copying, as we do for PV Dom0 under certain conditions on x86). That in turn may even justify super-page alignment. >>>>> + /* >>>>> + * Place modules as high in RAM as possible, scanning banks from >>>>> + * last to first so that the end of the last bank is preferred. >>>>> + */ >>>>> + while ( bi-- > 0 ) >>>>> + { >>>>> + const struct membank *bank = &banks->bank[bi]; >>>>> + const paddr_t bank_end = bank->start + bank->size; >>>>> + paddr_t modbase; >>>>> + >>>>> + if ( modsize > bank->size ) >>>>> + continue; >>>>> + >>>>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>>> Same question here. >>> >>> I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be >>> potentially used in page table. >> >> I fear I'm lost. All the modules are temporary entities, aren't they? > > They are temporary entities but they should be copied to guest memory, > right? > > So ioremap() should be called for paddr where module is located and so > at least less cycles will be needed to add entries to Xen page tables. Okay, that would be a small win in time for perhaps a boot failure when the modules would fit in memory if they weren't this heavily aligned. You're judgement, but please whatever higher-than-expected alignment you decide to use, please comment upon this. >>>>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>>>> + (modbase + modsize > kernbase) ) >>>>> + { >>>>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>>> What prevents this subtraction from underflowing? >>> >>> I will put the following check at the start of the place_modules() function: >>> if ( kernbase < modsize ) >>> panic("Underflow could happen between kernbase and modsize\n"); >> >> Wait - why would this be a legitimate condition to panic? > > It is legitimate to panic() as common API which leads to place_module() > has void in its return type (what should be changed in future, I have > this in TODO) and so if something is going wrong in place_module() there > is not better option except panic() for now. Feels like you're mixing two things here. I didn't ask whether panic() was appropriate to use here, but whether the condition is one upon which panic()ing is the only option (right now). And voila, ... > But generally i think it was too much to panic and it would be just > better to put: > if ( kernbase < modsize ) > continue; > above modbase = ROUNDDOWN(...) so it will just put modules in different > bank. ... looks like the situation can be handled without panic(). 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778076215-23B78C48-880476FE/10/73395122804 X-purgate-type: spam X-purgate-size: 6933 On 5/4/26 4:23 PM, Jan Beulich wrote: > On 28.04.2026 16:33, Oleksii Kurochko wrote: >> --- /dev/null >> +++ b/xen/arch/riscv/dom0less-build.c >> @@ -0,0 +1,70 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> +#include >> +#include >> + >> +#include >> + >> +int __init arch_parse_dom0less_node(struct dt_device_node *node, >> + struct boot_domain *bd) >> +{ >> + const char *mmu_type; >> + unsigned long bits; >> + const char *end; >> + >> + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) >> + { >> + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " >> + "node. %s will be used as fallback\n", max_gstage_mode->name); >> + >> + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); >> + >> + goto out; >> + } >> + >> + if ( !strcasecmp(mmu_type, "riscv,none") ) >> + { >> + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); >> + >> + return -EOPNOTSUPP; >> + } >> + >> + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) >> + { >> + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); >> + >> + return -EINVAL; >> + } >> + >> + bits = simple_strtoul(mmu_type + 8, &end, 10); >> + if ( (*end != '\0') || (end == mmu_type + 8) ) >> + { >> + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); >> + >> + return -EINVAL; >> + } >> + >> + out: >> + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) >> + { >> + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); >> + >> + return -EINVAL; >> + } >> + /* >> + * The correct value of bits will be checked in p2m_init() by call of >> + * find_gstage_mode_by_bits(). >> + * >> + * As mmu-type property contains one of string: >> + * - riscv,sv32 >> + * - riscv,sv39 >> + * - riscv,sv48 >> + * - riscv,sv57 > > Or about any other riscv,sv with N up to somewhere around 250. I see > that ... > >> + * it is needed to add '+P2M_ROOT_EXTRA_BITS' as for G-stage mode GPAs >> + * are extended by P2M_ROOT_EXTRA_BITS. >> + */ >> + bd->create_cfg.arch.gstage_addr_bits = bits + P2M_ROOT_EXTRA_BITS; > > ... the value calculated here is later checked for validity, so it's > really only the comment which may want clarifying a little. I will update the comment to: /* * The mmu-type property may specify any riscv,sv string, but only the * following are currently supported: * - riscv,sv32 * - riscv,sv39 * - riscv,sv48 * - riscv,sv57 * Any other value will be rejected by find_gstage_mode_by_bits(). * * P2M_ROOT_EXTRA_BITS is added because for G-stage mode, GPAs are * extended by that many bits. */ > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -45,12 +45,27 @@ struct p2m_pte_ctx { >> unsigned int level; /* Paging level at which the PTE resides. */ >> }; >> >> -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { >> - .mode = HGATP_MODE_OFF, >> - .paging_levels = 0, >> - .name = "Bare", >> +/* Values should be sorted by ->mode in this array */ >> +static const struct gstage_mode_desc gstage_modes[] = { >> + /* >> + * Based on the RISC-V spec: >> + * Bare mode is always supported, regardless of SXLEN. >> + * When SXLEN=32, the only other valid setting for MODE is Sv32. >> + * When SXLEN=64, three paged virtual-memory schemes are defined: >> + * Sv39, Sv48, and Sv57. >> + */ >> + { HGATP_MODE_OFF, 0, "none" }, >> +#ifdef CONFIG_RISCV_32 >> + { HGATP_MODE_SV32X4, 1, "sv32" }, >> +#else >> + { HGATP_MODE_SV39X4, 2, "sv39" }, >> + { HGATP_MODE_SV48X4, 3, "sv48" }, >> + { HGATP_MODE_SV57X4, 4, "sv57" }, >> +#endif >> }; >> >> +const struct gstage_mode_desc * __ro_after_init max_gstage_mode = &gstage_modes[0]; > > Nit: Overlong line (and, strictly speaking, a stray blank after *). I will put "&gstage_modes[0];" on next line. > >> @@ -331,8 +324,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) >> return 0; >> } >> >> -int p2m_init(struct domain *d) >> +static const struct gstage_mode_desc *find_gstage_mode_by_bits( > > Is "_by_bits" adding much value to the function name? Especially ... > >> + unsigned char gpa_bits) > > ... seeing that the parameter name is making things pretty clear? Maybe not too much, I will drop that. > >> +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) >> { >> + /* >> + * TODO: This static is a temporary constraint: all guests must use the >> + * same MMU mode because p2m_gpa_bits is not yet per-domain. >> + * Drop this once per-domain p2m_gpa_bits is introduced. >> + */ >> + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; >> struct p2m_domain *p2m = p2m_get_hostp2m(d); >> >> /* >> @@ -341,6 +361,33 @@ int p2m_init(struct domain *d) >> */ >> p2m->domain = d; >> >> + if ( !config ) >> + { >> + dprintk(XENLOG_ERR, "NULL config is passed\n"); >> + return -EINVAL; >> + } >> + >> + p2m->mode = find_gstage_mode_by_bits(config->arch.gstage_addr_bits); >> + >> + if ( !p2m->mode ) >> + { >> + dprintk(XENLOG_ERR, >> + "Unsupported or unavailable gstage addr bits: %u\n", >> + config->arch.gstage_addr_bits); >> + >> + return -EINVAL; >> + } >> + >> + if ( m->mode == HGATP_MODE_OFF ) >> + m = p2m->mode; >> + >> + if ( m->mode != p2m->mode->mode ) > > Since m always points into gstage_modes[], do you really need the extra > indirection to compare the two ->mode fields? You could simply compare > the pointers, couldn't you? Agree, just "if ( m != p2m->mode )" will work. > >> --- a/xen/include/public/arch-riscv.h >> +++ b/xen/include/public/arch-riscv.h >> @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; >> DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> >> struct xen_arch_domainconfig { >> + /* >> + * G-stage GPA address width in bits. >> + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). >> + */ >> + unsigned char gstage_addr_bits; > > Fixed-width types only in the public interface please. I will use uint8_t then. > > Also, isn't the field effectively describing the maximum width of a > guest (physical) address? In which case - simply gaddr_bits? gaddr_bits would be okay in this case. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 14:07:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 14:07:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301807.1575992 (Exim 4.92) (envelope-from ) id 1wKcuC-0008TP-JV; Wed, 06 May 2026 14:07:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301807.1575992; Wed, 06 May 2026 14:07:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcuC-0008TI-GL; Wed, 06 May 2026 14:07:16 +0000 Received: by outflank-mailman (input) for mailman id 1301807; Wed, 06 May 2026 14:07:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcuA-0008Rf-Aa for xen-devel@lists.xenproject.org; Wed, 06 May 2026 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If not - use size_t or unsigned long here? It seems like we want to have uint64_t as it is explicitly mentioned in image header: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57 and also it is used .dword here: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 15:00:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 15:00:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301852.1576009 (Exim 4.92) (envelope-from ) id 1wKdje-0000oP-Ew; Wed, 06 May 2026 15:00:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301852.1576009; Wed, 06 May 2026 15:00:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKdje-0000oI-Bk; Wed, 06 May 2026 15:00:26 +0000 Received: by outflank-mailman (input) for mailman id 1301852; Wed, 06 May 2026 15:00:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKdjd-0000oA-D6 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 15:00:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKdjc-00GYbg-Oz for xen-devel@lists.xenproject.org; Wed, 06 May 2026 17:00:24 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb5788-e002-0a2a0a5209dd-0a2a450197f0-6 for ; Wed, 06 May 2026 17:00:24 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb5788-c1f2-0a2a45010019-d155dd35b926-3 for ; Wed, 06 May 2026 17:00:24 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-44a786a9a35so3662401f8f.3 for ; Wed, 06 May 2026 08:00:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <082f5c79-0cf9-4eef-b80c-e5e9b594576d@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778079624-B6342FF4-290BCCCC/0/0 X-purgate-type: clean X-purgate-size: 1640 On 06.05.2026 16:53, Oleksii Kurochko wrote: > > > On 5/4/26 4:05 PM, Jan Beulich wrote: >>> --- a/xen/include/xen/fdt-kernel.h >>> +++ b/xen/include/xen/fdt-kernel.h >>> @@ -59,8 +59,15 @@ struct kernel_info { >>> struct { >>> paddr_t kernel_addr; >>> paddr_t len; >>> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) >>> - paddr_t text_offset; /* 64-bit Image only */ >>> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) >>> + /* >>> + * ARM: 64-bit Image only. >>> + * RISC-V: both 32-bit and 64-bit Images. >>> + */ >>> + paddr_t text_offset; >>> +#endif >>> +#if defined(CONFIG_RISCV) >>> + uint64_t image_size; /* Effective size of Image */ >> As this (apparently) is for both RV64 and RV32 - can the latter really have >> wider than 32-bit image sizes? If not - use size_t or unsigned long here? > > It seems like we want to have uint64_t as it is explicitly mentioned in > image header: > > https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57 > > and also it is used .dword here: > > https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55 Well. The image header having a 64-bit wide field still raises the question how the value being wider than 32 bits would work on RV32. IOW for Xen internal purposes I expect unsigned long or size_t would be more appropriate. When that value is taken from the image header and copied into the internal struct, it would need checking for absence of truncation. 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Replace the ARM-specific macro in asm/domain.h with a common >> static inline in a new dedicated header, xen/domain-layout.h. >> >> xen/domain.h would be the natural home, but placing it there would >> require including xen/paging.h (for paging_mode_translate()) and >> xen/sched.h (for is_hardware_domain()), which would introduce circular >> dependencies. A separate header that callers opt into avoids this. >> >> Adjust the implementation to take paging_mode_translate() into account >> so it works correctly for all architectures, including x86. Some extra >> details about implementation [2] and [3]. >> >> [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ >> [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ >> [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ >> >> Suggested-by: Stefano Stabellini >> Signed-off-by: Oleksii Kurochko > > With the SPDX tag added as indicated by Luca: > Acked-by: Jan Beulich Thanks. > > One further minor remark: > >> --- /dev/null >> +++ b/xen/include/xen/domain-layout.h >> @@ -0,0 +1,27 @@ >> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >> +#define __XEN_DOMAIN_LAYOUT_H__ >> + >> +#include > > This isn't really needed. It is ... > >> +#include >> +#include > > ... included by this one anyway (pretty much unavoidably right now, I > guess). Then it will be needed to re-order them. Do you want to put the comment above xen/sched.h: /* * Ensure xen/sched.h is included before xen/paging.h, since paging.h depends * on xen/domain.h, which is pulled in via sched.h. */ #include #include or just add this to commit message instead? ~ Oleksii > > Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 16:19:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:19:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301913.1576031 (Exim 4.92) (envelope-from ) id 1wKexX-0003a7-AC; Wed, 06 May 2026 16:18:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301913.1576031; Wed, 06 May 2026 16:18:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKexX-0003a0-7V; Wed, 06 May 2026 16:18:51 +0000 Received: by outflank-mailman (input) for mailman id 1301913; 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b=cPWDANbQhwnKfNsG/LgP03iAOONmWzKZ9e/jbariFsxeD1PwDVF8vnuiqPGJv5SyPsz2wzIrNzd55L1yca4oEF1yxPB9rUVq1ykrB0M2WEDn9aEoPCNExD5u+JjmtC4ZRmobHiNIKvoWFHl+hxq6eOFcbBo7SDW8VHA6KPS8pDo= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Date: Wed, 6 May 2026 17:18:40 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506135514.47310-1-roger.pau@citrix.com> <20260506135514.47310-3-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506135514.47310-3-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, nor which Sorry, one more.  "We don't know which registers might". > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold > map_iommu_mmio_region() into it's only caller, as the function body is just > an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné > --- > Changes since v1: > - Zero the control register after calling disable_iommu(). > - Print a warning message if the IOMMU is handed enabled to Xen from > firmware. > - Fix commit log grammar issues. > --- > xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- > 1 file changed, 17 insertions(+), 14 deletions(-) > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > index 76ae78e5ea53..ffc041211fb5 100644 > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > return iommu->ht_flags & mask; > } > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > -{ > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > - IOMMU_MMIO_REGION_LENGTH); > - if ( !iommu->mmio_base ) > - return -ENOMEM; > - > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > - > - return 0; > -} > - > static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) > { > if ( iommu->mmio_base ) > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > { > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > - if ( !rc ) > - rc = map_iommu_mmio_region(iommu); > if ( rc ) > return rc; > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > + IOMMU_MMIO_REGION_LENGTH); > + if ( !iommu->mmio_base ) > + return -ENOMEM; > + > get_iommu_features(iommu); > > /* > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + if ( iommu->ctrl.iommu_en ) > + printk(XENLOG_WARNING > + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", > + &iommu->sbdf, iommu->ctrl.raw); > + disable_iommu(iommu, true); > + > + /* With the IOMMU disabled zero the control register. */ > + iommu->ctrl.raw = 0; > + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + > return 0; > } > I don't think calling disable_iommu() is a good thing here. It's just a cascade of clearing one/few bits in ctrl at a time, but is is added unconditionally so that's 5 UC stores writing 0's to the same register in the common case. I think this logic wants to be: @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu)      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode )          return -ERANGE;   +    /* Check if the IOMMU is active, and disable. */ +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); +    if ( iommu->ctrl.iommu_en ) +    { +        printk(XENLOG_WARNING +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", +               &iommu->sbdf, iommu->ctrl.raw); + +        iommu->ctrl.raw = 0; +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); +    } +      return 0;  }   which has the advantage that it's closer to the current behaviour, and therefore arguably a safer backport. The only thing that disable_iommu() does which isn't editing the control register is playing with the PCI MSI enable bit, but that really doesn't matter when we clear ctrl.int_cap_xt_en.  (And in fact, that path is buggy because it clears MSI enable without inhibiting interrupt generation, which architecturally will turn into legacy line interrupt to deal with.) We're just about to re-set everything up, so everything's going to get re-enabled. In the commit message, I think it's worth highlighting that zeroing the control register is the current behaviour, and this will need revisiting in order to support Preboot DMA Protection. Or alternatively, would you like me to submit a patch?  (Happy either way.) ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 16:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301939.1576053 (Exim 4.92) (envelope-from ) id 1wKf9g-0006R9-Fp; Wed, 06 May 2026 16:31:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301939.1576053; Wed, 06 May 2026 16:31:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKf9g-0006R2-Bw; Wed, 06 May 2026 16:31:24 +0000 Received: by outflank-mailman (input) for mailman id 1301939; Wed, 06 May 2026 16:31:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKf9e-0006Qe-HV for xen-devel@lists.xenproject.org; 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Date: Wed, 6 May 2026 18:31:15 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] iommu/amd-vi: do not zero IOMMU MMIO region Message-ID: References: <20260506135514.47310-1-roger.pau@citrix.com> <20260506135514.47310-3-roger.pau@citrix.com> <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> X-ClientProxiedBy: MA3P292CA0052.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:48::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SAWPR03MB989156:EE_ X-MS-Office365-Filtering-Correlation-Id: a0d96647-ae0e-4eb9-27be-08deab8ce6a8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|56012099003|18002099003|22082099003; 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We don't know what registers might be there, nor which > > Sorry, one more.  "We don't know which registers might". > > > values might be safe for those registers. On a forthcoming platform doing > > the zeroing of the MMIO region does put the IOMMU in a broken state, which > > is not recoverable by the IOMMU initialization procedure in Xen. > > > > Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold > > map_iommu_mmio_region() into it's only caller, as the function body is just > > an ioremap() call after the removal of the memset(). > > > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > > Signed-off-by: Roger Pau Monné > > --- > > Changes since v1: > > - Zero the control register after calling disable_iommu(). > > - Print a warning message if the IOMMU is handed enabled to Xen from > > firmware. > > - Fix commit log grammar issues. > > --- > > xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- > > 1 file changed, 17 insertions(+), 14 deletions(-) > > > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > > index 76ae78e5ea53..ffc041211fb5 100644 > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > > return iommu->ht_flags & mask; > > } > > > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > > -{ > > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > - IOMMU_MMIO_REGION_LENGTH); > > - if ( !iommu->mmio_base ) > > - return -ENOMEM; > > - > > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > > - > > - return 0; > > -} > > - > > static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) > > { > > if ( iommu->mmio_base ) > > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > { > > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > > > - if ( !rc ) > > - rc = map_iommu_mmio_region(iommu); > > if ( rc ) > > return rc; > > > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > + IOMMU_MMIO_REGION_LENGTH); > > + if ( !iommu->mmio_base ) > > + return -ENOMEM; > > + > > get_iommu_features(iommu); > > > > /* > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > > return -ERANGE; > > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + if ( iommu->ctrl.iommu_en ) > > + printk(XENLOG_WARNING > > + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", > > + &iommu->sbdf, iommu->ctrl.raw); > > + disable_iommu(iommu, true); > > + > > + /* With the IOMMU disabled zero the control register. */ > > + iommu->ctrl.raw = 0; > > + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + > > return 0; > > } > > > > I don't think calling disable_iommu() is a good thing here. > > It's just a cascade of clearing one/few bits in ctrl at a time, but is > is added unconditionally so that's 5 UC stores writing 0's to the same > register in the common case. The approach to use disable_iommu() is because that's closer to what Linux does in iommu_disable(), which seems to explicitly disable one feature at a time instead of writing zero to the command register in one go. I've been cautious in taking the same approach on Xen. I don't mind doing a plain write of 0, let me test to ensure this is OK. > I think this logic wants to be: > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >          return -ERANGE; >   > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +    { > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +        iommu->ctrl.raw = 0; > +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    } In your snippet above, I think we want to unconditionally set iommu->ctrl.raw = 0, and also propagate that 0 to the register, otherwise we will inherit set bits from whatever is currently in the control register: > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +    iommu->ctrl.raw = 0; > +    writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); Thanks, Roger. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="j8Y+pyk47lYf6y1a" Content-Disposition: inline In-Reply-To: <20260506135514.47310-1-roger.pau@citrix.com> X-purgate-ID: tlsNG-d62444/1778086194-AD5AFFF4-42852402/0/0 X-purgate-type: clean X-purgate-size: 1949 --j8Y+pyk47lYf6y1a Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Wed, 6 May 2026 18:49:47 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau Monne Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 0/2] iommu/amd-vi: remove zeroing of MMIO region On Wed, May 06, 2026 at 03:55:12PM +0200, Roger Pau Monne wrote: > Hello, >=20 > Unconditionally zeroing the whole IOMMU MMIO region is dangerous, at > least on an upcoming platform this does put the IOMMU in a broken state > that's not recoverable by the init procedure in Xen. >=20 > Get rid of the zeroing, and instead attempt to disable the IOMMU ahead > of enabling it. Just to mention it here, while this looks like a step in the right direction, even better would be to not disable IOMMU at boot, but reconfigure it - to preserve uninterrupted protection when boot time DMA protection is enabled in firmware. But that's definitely more work... --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --j8Y+pyk47lYf6y1a Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmn7cSwACgkQ24/THMrX 1yyZxQf8CUJvMP7I1sv1PMxXjTsfAkxSupuMPirems1yZ7ya/Qq6eUBU5MSAVO6E 1INLuyh3xsdiXHkVWZEN58ugv/G7S00FrBcjQs0qjZlYRgLdkZJGtBsDEyszbHzW x3y8STslRt7A6091KHjQwfbUK2ft0tOJVcxQRGipIhQYyDyQh1CRE4FWFgHEGiDc P6+jF3guzNBskqtnt2dUQL2YxGH7wh4Os6oDEIwqDMlozH1eQP2SPSTU1w3sgi+r QOlGHAjrMwLtKR/+YzagBuImky9XAmkbWRX4thHiWIDNSp/h4qq8JanlUdATBgd4 ul18mLA1eUVeYh6JrAO8x2KqY5Hz6w== =6TDJ -----END PGP SIGNATURE----- --j8Y+pyk47lYf6y1a-- From xen-devel-bounces@lists.xenproject.org Wed May 06 16:52:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:52:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301967.1576071 (Exim 4.92) (envelope-from ) id 1wKfTv-0001iX-AW; Wed, 06 May 2026 16:52:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301967.1576071; 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We don't know what registers might be there, nor which values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region does put the IOMMU in a broken state, which is not recoverable by the IOMMU initialization procedure in Xen. Instead just zero the control register, which mimics the current behavior with regards to how the control register is handled, and ensures the IOMU setup is done with the unit disabled. This approach will need revisiting in order to support Preboot DMA Protection. Fold map_iommu_mmio_region() into its only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- Changes since v2: - Avoid the disable_iommu() dance. - Expand commit message a bit. Changes since v1: - Zero the control register after calling disable_iommu(). - Print a warning message if the IOMMU is handed enabled to Xen from firmware. - Fix commit log grammar issues. --- xen/drivers/passthrough/amd/iommu_init.c | 33 ++++++++++++++---------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..e0c8925c33f7 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,20 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* + * Check whether the IOMMU is already enabled and unconditionally disable + * it (zero the control register) ahead of Xen setup. Needs to be + * revisited to support Preboot DMA Protection. + */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + if ( iommu->ctrl.iommu_en ) + printk(XENLOG_WARNING + "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", + &iommu->sbdf, iommu->ctrl.raw); + + iommu->ctrl.raw = 0; + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 16:54:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:54:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301975.1576081 (Exim 4.92) (envelope-from ) id 1wKfVh-0002Dt-Lo; Wed, 06 May 2026 16:54:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301975.1576081; Wed, 06 May 2026 16:54:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKfVh-0002Dm-Hw; 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b=YWbs2Y2eW2/rR3VMej3GeilvLNQcKyAzZkXpzsDHXgtBu00iEdEfD0vajTkaFn/ZeP9Jvlz0OnXWSzym8WyZqKn3MxeRKaRk8VxqJZDGeaVl52cD5hGG3PfFbj6CyZuOSwpXLT9b/56fgaZhcbOuCzZuA5SGAjdjznG+NgzZfXQ= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: Date: Wed, 6 May 2026 17:53:57 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v3] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506165157.68567-1-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506165157.68567-1-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, nor which what->which > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead just zero the control register, which mimics the current behavior > with regards to how the control register is handled, and ensures the IOMU > setup is done with the unit disabled. This approach will need revisiting > in order to support Preboot DMA Protection. > > Fold map_iommu_mmio_region() into its only caller, as the function body is > just an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper Thanks. 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But that's definitely more work... Yes, we are aware of this. But IMO booting with the IOMMU enabled will be a new feature, this is strictly a fix that we can "safely" backport to stable branches to deal with broken hardware. Thanks, Roger. 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So to confirm - does amd_pmc_probe work properly with this series now? > > Root cause > ========== > > To prevent each dom0 vCPU from looking like an SMT sibling of another > vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every > vCPU's APIC ID by 2 can push the synthesized IDs past the package-field > boundary. Linux then infers more "packages" and therefore more AMD > nodes via amd_num_nodes() than the platform actually has, while the > PCI-side host-bridge scan correctly reports the number of root complex. > > The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of > linux-next/master (next-20260505). > > Penny Zheng (2): > x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 > x86/amd_node: reject SMN access when amd_smn_init() did not complete > > arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- > 1 file changed, 20 insertions(+), 3 deletions(-) > From xen-devel-bounces@lists.xenproject.org Wed May 06 20:59:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 20:59:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302065.1576115 (Exim 4.92) (envelope-from ) id 1wKjKc-0001V9-PE; Wed, 06 May 2026 20:58:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302065.1576115; Wed, 06 May 2026 20:58:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKjKc-0001V1-KX; Wed, 06 May 2026 20:58:58 +0000 Received: by outflank-mailman (input) for mailman id 1302065; Wed, 06 May 2026 20:58:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKjKb-0001Uv-GR for xen-devel@lists.xenproject.org; Wed, 06 May 2026 20:58:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKjKa-00EinO-FX for xen-devel@lists.xenproject.org; Wed, 06 May 2026 22:58:56 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbab8d-2eae-0a2a0a5409dd-0a2a4504af5e-8 for ; Wed, 06 May 2026 22:58:56 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbab8e-1dec-0a2a45040019-aceafc1feafa-3 for ; Wed, 06 May 2026 22:58:55 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id E8FFE432DE; Wed, 6 May 2026 20:58:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93889C2BCB0; Wed, 6 May 2026 20:58:53 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778101133; bh=ygxCrxTmtdcv24MTN9N1JC/G1qLohRd86Aj4uEoj9T0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=nFQtCTj8ZS7lgsOVZDHIWOc6O0JOvqyXujLxzkeg2Ma1NvSukyFY7DIwSm6zhrm2Z XCgeaIHhdd1AfF17aXtS7H83p0QM/CogJzykqUhZUrn5y+rqjEQHDnvr3FhbRPJnkX etz8gpN4csyG832+Ek0qfFWiVycVgspV1oSqynJ8a9XdsV7aGI0XYlgqa7DU+WegWk t2iFFCwq3m9M+kxbAfse0KMYRoxpCG/QnguCh9XeKnoyXDlkPpTSdgzjKYwJG5zN7v bhaOc71bziYjb6heDwA9xMjAwSHxIwIOq5xO06NnR33tRnycz6wQrS8OBUTTUj7G/l 0RmMCuMP2IzJA== Date: Wed, 6 May 2026 13:58:53 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: Re: [PATCH v3] xen/arm: skip holes in physical address space when setting up frametable In-Reply-To: <1EAB6ED4-3D64-4074-830B-EB9F8AD88547@arm.com> Message-ID: References: <20260506084137.40913-1-michal.orzel@amd.com> <1EAB6ED4-3D64-4074-830B-EB9F8AD88547@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-515320797-1778101133=:512397" X-purgate-ID: tlsNG-ebf023/1778101136-42B633FF-1C15BF66/0/0 X-purgate-type: clean X-purgate-size: 6386 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-515320797-1778101133=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Wed, 6 May 2026, Luca Fancellu wrote: > Hi Michal, > > > diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c > > index 6604f3bf4e6a..c4018a61aa01 100644 > > --- a/xen/arch/arm/mmu/mm.c > > +++ b/xen/arch/arm/mmu/mm.c > > @@ -6,18 +6,55 @@ > > Should we have also #include because we use > find_next_*? Apologies I missed this in previous reviews. > > > #include > > #include > > #include > > +#include > > #include > > > > -/* Map a frame table to cover physical addresses ps through pe */ > > -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) > > +static void __init init_frametable_chunk(unsigned long pdx_s, > > + unsigned long pdx_e) > > { > > - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - > > - mfn_to_pdx(maddr_to_mfn(ps)) + 1; > > - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); > > - mfn_t base_mfn; > > - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) > > - : MB(32); > > + unsigned long nr_pdxs = pdx_e - pdx_s; > > + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); > > + unsigned long pfn_align; > > + struct page_info *pg; > > int rc; > > + mfn_t base_mfn; > > + > > + /* > > + * In-loop chunks span whole PDX groups, which are always page-size > > + * aligned. The last chunk ending at max_pdx may not be, so round up. > > + */ > > + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); > > + > > + /* > > + * Try to align the allocation to the contiguous mapping size so that > > + * map_pages_to_xen() can use the contiguous bit. > > + */ > > + pfn_align = ((chunk_size >= MB(32)) ? MB(32) : MB(2)) >> PAGE_SHIFT; > > + > > + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, pfn_align); > > + > > + /* > > + * Resolve the frametable VA via mfn_to_page(pdx_to_mfn(...)) rather > > + * than pdx_to_page() because the generic pdx_to_page() does not subtract > > + * frametable_base_pdx. There's more work to be done to make it generic, so > > + * for now route through mfn_to_page(), which on Arm applies the > > + * frametable_base_pdx offset and yields the correct VA. > > + */ > > + pg = mfn_to_page(pdx_to_mfn(pdx_s)); > > + rc = map_pages_to_xen((unsigned long)pg, base_mfn, > > + chunk_size >> PAGE_SHIFT, > > + PAGE_HYPERVISOR_RW | _PAGE_BLOCK); > > + if ( rc ) > > + panic("Unable to setup the frametable mappings\n"); > > + > > + memset(pg, 0, nr_pdxs * sizeof(struct page_info)); > > + memset(pg + nr_pdxs, -1, > > + chunk_size - nr_pdxs * sizeof(struct page_info)); > > +} > > + > > +void __init init_frametable(paddr_t ram_start) > > +{ > > + unsigned int sidx, nidx, max_idx; > > > > /* > > * The size of paddr_t should be sufficient for the complete range of > > @@ -26,24 +63,40 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) > > BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); > > BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); > > > > - if ( frametable_size > FRAMETABLE_SIZE ) > > - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", > > - ps, pe); > > + /* init_frametable_chunk() allocation alignment assumes 4KB granule */ > > + BUILD_BUG_ON(PAGE_SIZE != SZ_4K); > > > > - frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps)); > > - /* Round up to 2M or 32M boundary, as appropriate. */ > > - frametable_size = ROUNDUP(frametable_size, mapping_size); > > - base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12)); > > + /* In-loop chunks must produce page-aligned frametable regions */ > > + BUILD_BUG_ON((PDX_GROUP_COUNT * sizeof(struct page_info)) % PAGE_SIZE); > > > > - rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn, > > - frametable_size >> PAGE_SHIFT, > > - PAGE_HYPERVISOR_RW | _PAGE_BLOCK); > > - if ( rc ) > > - panic("Unable to setup the frametable mappings.\n"); > > + max_idx = DIV_ROUND_UP(max_pdx, PDX_GROUP_COUNT); > > + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); > > + > > + /* > > + * Mapping address in init_frametable_chunk must be page-aligned > > + * for map_pages_to_xen(). Aligning to PDX_GROUP_COUNT guarantees this > > + * because PDX_GROUP_COUNT * sizeof(page_info) is always a multiple of > > + * PAGE_SIZE by construction. > > + */ > > + frametable_base_pdx = ROUNDDOWN(frametable_base_pdx, PDX_GROUP_COUNT); > > + > > + if ( (max_pdx - frametable_base_pdx) > FRAMETABLE_NR ) > > + panic("Frametable too small\n"); > > + > > + for ( sidx = (frametable_base_pdx / PDX_GROUP_COUNT); ; sidx = nidx ) > > + { > > + unsigned int eidx; > > + > > + eidx = find_next_zero_bit(pdx_group_valid, max_idx, sidx); > > + nidx = find_next_bit(pdx_group_valid, max_idx, eidx); > > + > > + if ( nidx >= max_idx ) > > + break; > > + > > + init_frametable_chunk(sidx * PDX_GROUP_COUNT, eidx * PDX_GROUP_COUNT); > > + } > > > > - memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info)); > > - memset(&frame_table[nr_pdxs], -1, > > - frametable_size - (nr_pdxs * sizeof(struct page_info))); > > + init_frametable_chunk(sidx * PDX_GROUP_COUNT, max_pdx); > > } > > > Apart from that the rest looks ok to me. I’ve also tested for Arm64 MMU/MPU and Arm32 MMU. > > Reviewed-by: Luca Fancellu > Tested-by: Luca Fancellu Acked-by: Stefano Stabellini --8323329-515320797-1778101133=:512397-- From xen-devel-bounces@lists.xenproject.org Wed May 06 22:19:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 22:19:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302086.1576124 (Exim 4.92) (envelope-from ) id 1wKkaQ-0003Tp-8Q; Wed, 06 May 2026 22:19:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302086.1576124; Wed, 06 May 2026 22:19:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKkaQ-0003Ti-4z; Wed, 06 May 2026 22:19:22 +0000 Received: by outflank-mailman (input) for mailman id 1302086; Wed, 06 May 2026 22:19:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKkaO-0003Tc-G9 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 22:19:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKkaN-00B1ni-DC for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:19:19 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbbe41-e002-0a2a0a5209dd-0a2a450b8132-12 for ; Thu, 07 May 2026 00:19:19 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbbe66-212f-0a2a450b0019-ac6904fed12c-3 for ; Thu, 07 May 2026 00:19:19 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 8C9096013B; Wed, 6 May 2026 22:19:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0F5ECC2BCB0; Wed, 6 May 2026 22:19:17 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778105957; bh=gysC/lx1i73eA4zP8jwgbWYpicdKVkkAq/If5SfmOvk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UF/aj9HS2SYPYHTIXkOa8lL3owagoxJHzGMhyRFSAxj+GJL8gP8yC5+XoLLz6s1x5 X9cL5R+VcjnFIjQexqIW2yM4i2kvMQEHMnTIu0Lb82lcqBkA1Hg3vvTFnYScS91BuS 2N40C7auuO3CTglHzgoaPeo24WGlW/+zx0190iYZVTD6bGYt2OnLQxGXS+Zi31QbCo BSVOloj3oH2LafE2j6H0SnRWGMGyru24IxEPo4APpEHqlKdF+7EKoOV6XhFqOa+f3G bqbSLPeKNIjTZdxVJ1+2t3TbHL1Z+PbeCe39zAx2EWiABfykEikLE4KgvyrMiahx6n +1VGvBd4tB8Jw== Date: Wed, 6 May 2026 17:19:15 -0500 From: Rob Herring To: Vijayanand Jitta Cc: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Charan Teja Kalla Subject: Re: [PATCH v14 0/3] of: parsing of multi #{iommu,msi}-cells in maps Message-ID: <20260506221915.GA3290640-robh@kernel.org> References: <20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com> X-purgate-ID: tlsNG-42698a/1778105959-18F66F3B-070AFEBA/0/0 X-purgate-type: clean X-purgate-size: 1480 On Fri, Apr 24, 2026 at 11:26:07AM +0530, Vijayanand Jitta wrote: > So far our parsing of {iommu,msi}-map properties has always blindly > assumed that the output specifiers will always have exactly 1 cell. > This typically does happen to be the case, but is not actually enforced > (and the PCI msi-map binding even explicitly states support for 0 or 1 > cells) - as a result we've now ended up with dodgy DTs out in the field > which depend on this behaviour to map a 1-cell specifier for a 2-cell > provider, despite that being bogus per the bindings themselves. > > Since there is some potential use[1] in being able to map at least > single input IDs to multi-cell output specifiers (and properly support > 0-cell outputs as well), add support for properly parsing and using the > target nodes' #cells values, albeit with the unfortunate complication of > still having to work around expectations of the old behaviour too. > -- Robin. > > Unlike single #{}-cell, it is complex to establish a linear relation > between input 'id' and output specifier for multi-cell properties, thus > it is always expected that len never going to be > 1. > > These changes have been tested on QEMU for the arm64 architecture. > > Since, this would also need update in dt-schema, raised PR[2] for the > same. Sashiko has some thoughts on the series: https://sashiko.dev/#/patchset/20260424-parse_iommu_cells-v14-0-fd02f11b6c38%40oss.qualcomm.com Rob From xen-devel-bounces@lists.xenproject.org Thu May 07 00:49:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 00:49:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302116.1576133 (Exim 4.92) (envelope-from ) id 1wKmv5-0006HY-Iq; Thu, 07 May 2026 00:48:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302116.1576133; Thu, 07 May 2026 00:48:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKmv5-0006HQ-Fj; Thu, 07 May 2026 00:48:51 +0000 Received: by outflank-mailman (input) for mailman id 1302116; Thu, 07 May 2026 00:48:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKmv4-0006HK-EV for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:48:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKmv3-001jGE-QQ for xen-devel@lists.xenproject.org; Thu, 07 May 2026 02:48:49 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbe0ea-bab6-0a2a0a5309dd-0a2a4509aa8c-30 for ; Thu, 07 May 2026 02:48:49 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbe170-2497-0a2a45090019-ac6904fed2c4-3 for ; Thu, 07 May 2026 02:48:49 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 2F0276015B; Thu, 7 May 2026 00:48:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A5984C2BCB0; Thu, 7 May 2026 00:48:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778114927; bh=VFTRKlWlr18PXmxokwVZ1cjbCqrjaeYTuYsJxa0Mp28=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=K4I2/r2FHQYBhsi6RgISDx0SWkyzoAMpMGQj63ULvbbVz8UvRTEuVtJhwk2icyqiQ CP4wPMQeb1qc0HnkN9EZZqFwruyWFU0qTuqng0HHyF22wP+I89lvnQj/62/+/fOnz8 p2xR/ANWcCJF6RsK/mZvIFCXN/Uo6918Xa3o7Jf9nM40WqaTEVBQKziXDhy9Q3LMnc cjQ1dLINhDiKIfq20pBaIa29tIcZ1E+qENjGV1WrfwrzzOa+qN2mZ39LJd6X1CiTko YESdryHbp2wK+TPSFt7G6Km83bcbFSGqNwjAjvUrpLId5q/2RCMCKVFTAifbLMsiYP iKUlVKoVLX17Q== Date: Wed, 6 May 2026 17:48:44 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-bad1c0/1778114929-40F66A53-FB37C0E6/0/0 X-purgate-type: clean X-purgate-size: 1902 On Wed, 6 May 2026, Jan Beulich wrote: > When one of the linking passes fails, additional intermediate files are > still in place. Having them available for analysis of the underlying > problem can be pretty helpful. Collect some into a new intermediates/ > directory. (Nothing new will be collected if linking succeeds.) > > While there also make sure xen-syms is collected (into binaries/). This > is rather more useful for analysis of possible problems than its stripped > counterpart. > > Signed-off-by: Jan Beulich > --- > As the issue this is meant to help with didn't re-occur with this in > place, the new logic wasn't really tested yet. It looks OK but please provide a link to a successful pipeline Reviewed-by: Stefano Stabellini > --- a/automation/gitlab-ci/build.yaml > +++ b/automation/gitlab-ci/build.yaml > @@ -6,6 +6,7 @@ > artifacts: > paths: > - binaries/ > + - intermediates/ > - xen-config > - xen-cppcheck.txt > - '*.log' > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -41,18 +41,24 @@ fi > # to exit early -- bash is invoked with -e. > cp xen/.config xen-config > > -# Directory for the artefacts to be dumped into > -mkdir -p binaries > +# Directories for the artefacts to be dumped into > +mkdir -p binaries intermediates > > collect_xen_artefacts() > { > local f > > - for f in xen/xen xen/xen.efi; do > + for f in xen/xen xen/xen-syms xen/xen.efi; do > if [[ -f $f ]]; then > cp $f binaries/ > fi > done > + > + for f in xen/.xen-syms.* xen/.xen.efi.*; do > + if [[ -f $f ]]; then > + cp $f intermediates/ > + fi > + done > } > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > From xen-devel-bounces@lists.xenproject.org Thu May 07 00:54:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 00:54:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302123.1576142 (Exim 4.92) (envelope-from ) id 1wKn0s-0007n5-5g; Thu, 07 May 2026 00:54:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302123.1576142; Thu, 07 May 2026 00:54:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKn0s-0007my-2K; Thu, 07 May 2026 00:54:50 +0000 Received: by outflank-mailman (input) for mailman id 1302123; Thu, 07 May 2026 00:54:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKn0r-0007mp-7v for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:54:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKn0q-0007Jm-5b for xen-devel@lists.xenproject.org; Thu, 07 May 2026 02:54:48 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbe21c-5cb7-0a2a0a5109dd-0a2a4503b7a2-38 for ; Thu, 07 May 2026 02:54:48 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbe2d7-672d-0a2a45030019-ac6904fed348-3 for ; Thu, 07 May 2026 02:54:48 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id B19356015B; Thu, 7 May 2026 00:54:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 472D7C2BCB0; Thu, 7 May 2026 00:54:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778115286; bh=Ek9bTwceeuiXv/WjhJvVjjRg1bG1EaP6Qb0v8Nf8Pyk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=J3aCLhxPyF3J2dzgx6oGACMc+1Fwtxm+TPhkmZic7491Rhyk+39pfpUO9BPCyQUEt h7JzaxjhI0eFbs3q39hKF8kSDTS3ncdetI21UFDTzFy9f6EXy/sOGWTumk9I2PTJ6P c+uKWTbb1FyOqz2MiCHGvOST+tdotsA2irfABDGM4iYmXBGEn/qZ9AeTEY/2G5EJSO oqQCpYw8dJ27osvfgjTcVnZ6ERHSyokADzHVEiP54sI7MGDMOLOb6ocdBIGwRhsNLE zgkPyPwA4tKQpR23dztRwUjSXGABYmj4Wbh6T3yLr6p1rCRb4fENv6vLwZMh8iiYYG EMe1bbqpBwv4g== Date: Wed, 6 May 2026 17:54:45 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Stefano Stabellini cc: Jan Beulich , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-33051d/1778115288-3B96D938-4AB74556/0/0 X-purgate-type: clean X-purgate-size: 2254 On Wed, 6 May 2026, Stefano Stabellini wrote: > On Wed, 6 May 2026, Jan Beulich wrote: > > When one of the linking passes fails, additional intermediate files are > > still in place. Having them available for analysis of the underlying > > problem can be pretty helpful. Collect some into a new intermediates/ > > directory. (Nothing new will be collected if linking succeeds.) > > > > While there also make sure xen-syms is collected (into binaries/). This > > is rather more useful for analysis of possible problems than its stripped > > counterpart. > > > > Signed-off-by: Jan Beulich > > --- > > As the issue this is meant to help with didn't re-occur with this in > > place, the new logic wasn't really tested yet. > > It looks OK but please provide a link to a successful pipeline > > Reviewed-by: Stefano Stabellini Actually, I see that the build script is run with bash -ex so I wonder if collect_xen_artefacts would even run if make fails. I think we need: trap collect_xen_artefacts EXIT > > --- a/automation/gitlab-ci/build.yaml > > +++ b/automation/gitlab-ci/build.yaml > > @@ -6,6 +6,7 @@ > > artifacts: > > paths: > > - binaries/ > > + - intermediates/ > > - xen-config > > - xen-cppcheck.txt > > - '*.log' > > --- a/automation/scripts/build > > +++ b/automation/scripts/build > > @@ -41,18 +41,24 @@ fi > > # to exit early -- bash is invoked with -e. > > cp xen/.config xen-config > > > > -# Directory for the artefacts to be dumped into > > -mkdir -p binaries > > +# Directories for the artefacts to be dumped into > > +mkdir -p binaries intermediates > > > > collect_xen_artefacts() > > { > > local f > > > > - for f in xen/xen xen/xen.efi; do > > + for f in xen/xen xen/xen-syms xen/xen.efi; do > > if [[ -f $f ]]; then > > cp $f binaries/ > > fi > > done > > + > > + for f in xen/.xen-syms.* xen/.xen.efi.*; do > > + if [[ -f $f ]]; then > > + cp $f intermediates/ > > + fi > > + done > > } > > > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > > > From xen-devel-bounces@lists.xenproject.org Thu May 07 06:49:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 06:49:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302169.1576151 (Exim 4.92) (envelope-from ) id 1wKsXX-0002Lo-Hu; Thu, 07 May 2026 06:48:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302169.1576151; Thu, 07 May 2026 06:48:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKsXX-0002Le-Cf; Thu, 07 May 2026 06:48:55 +0000 Received: by outflank-mailman (input) for mailman id 1302169; Thu, 07 May 2026 06:48:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKsXW-0002LY-8C for xen-devel@lists.xenproject.org; Thu, 07 May 2026 06:48:54 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKsXV-00BrPz-5s for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <8375cb34-9e95-4ca7-9d72-4dcf9fbe27c7@amd.com> Date: Thu, 7 May 2026 08:48:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] xen: introduce CONFIG_HAS_DOMAIN_TYPE To: Oleksii Kurochko , Jan Beulich CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , References: <7c91e1a705e1046be4af1c5671a8d91cf3557013.1777296786.git.oleksii.kurochko@gmail.com> <5daeb8f7-cf0f-4ea7-a686-93df36b43a30@suse.com> <2ec5eec1-0a7d-445f-9d96-99b3070afeb1@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <2ec5eec1-0a7d-445f-9d96-99b3070afeb1@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D8:EE_|LV8PR12MB9619:EE_ X-MS-Office365-Filtering-Correlation-Id: 88fbf7d7-2051-43d6-0a69-08deac04adae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|82310400026|7416014|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: X2n/tAOOld4fwwL8Tao3u/NYN/Y2+q5DOce4SfuaLq/JTq4RMDWQq8O0hlyFsU1kmN8+PMo99V3+D1MX3wosomepzcw4gGcQIErZgsqCAiSPUn80RnlFPVVm8VZ6ktQom2OKuJRZXAzk/D6d++9+M0zS11i6ci5GGFIRvSkypr4t1igKay/IYz2vUiBD3wFAILFfIobmGK54gV7+EHtqHjVD2M/ph/Owmt3QXLc/MCLa+aY3gdcmRhGIETEyWENgrOxX4VsN83YtRWtBS5/tL3xPKZMeb4I/sghsb5bQBiZyNQ20vA+utDMpX35ptkvNkI21+IWAEqpqI+FBcx1uG1hEbBL5F4IH/jXX6fP+uzjNgEVKvESj3ilRRkzLRqEr0wbi+fe1YO0kGQJVM92zAB36WOqxNSZPFw/F/yZCjaSxuLfWzPUDQSMvY8jh806Q X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 06:48:42.5812 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88fbf7d7-2051-43d6-0a69-08deac04adae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9619 X-purgate-ID: tlsNG-bad1c0/1778136532-88970A53-BD0BDF50/10/73395122804 X-purgate-type: spam X-purgate-size: 3246 On 06-May-26 09:44, Oleksii Kurochko wrote: > > > On 5/4/26 2:21 PM, Jan Beulich wrote: >> On 27.04.2026 17:34, Oleksii Kurochko wrote: >>> As domain type is part of common code now there is no any reason >>> to have architecture-specific set_domain_type() functions so >>> it is dropped. >>> >>> Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE >>> for consistency. Also, drop and add some parentheses to be aligned >>> with the similar if() below. >>> >>> x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as >>> x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no >>> longer builds, the fallback is currently only relevant for arm32. >>> >>> Signed-off-by: Oleksii Kurochko >>> Reviewed-by: Michal Orzel >> >> In principle: >> Acked-by: Jan Beulich > > Thanks. > >> >> However, still a few remarks: >> >>> --- a/xen/include/xen/domain.h >>> +++ b/xen/include/xen/domain.h >>> @@ -13,6 +13,19 @@ struct guest_area { >>> void *map; >>> }; >>> >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> +enum __packed domain_type { >>> + DOMAIN_32BIT, >>> + DOMAIN_64BIT, >>> +}; >>> +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) >>> +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) >>> +#elif !defined(CONFIG_64BIT) >>> +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ >>> +#define is_32bit_domain(d) (true) >>> +#define is_64bit_domain(d) (false) >> >> I think it would be nice if the excess parentheses were dropped from here. >> >>> --- a/xen/include/xen/fdt-domain-build.h >>> +++ b/xen/include/xen/fdt-domain-build.h >>> @@ -7,6 +7,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> struct domain; >>> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >>> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >>> } >>> >>> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) >> >> Pointer-to-const for the 2nd parameter? > > I will apply this comment and comment above. > >> >>> +{ >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> + /* Type must be set before allocate memory */ >> >> This comment would be more prominent if it lived outside of the #ifdef, >> perhaps (read on) ahead of the function. I wonder though why it's only >> a comment, and not e.g. an assertion. If an assertion was possible to >> add, the comment would want to live next to it. Without an assertion >> putting it ahead of the function may be better. >> >> Depending on how far to go, changes could be made while committing, or a >> proper v5 may want submitting. > > I think that instead of comment or just after comment the following > could be added: > ASSERT(!domain_tot_pages(d)); > > Jan, Michal, do you see any concern with that ASSERT() or I could add it > and keep your Ack-by and R-by. I don't see any issues with it. You can send a v5 and I'll commit it later on. ~Michal From xen-devel-bounces@lists.xenproject.org Thu May 07 07:25:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:25:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302184.1576159 (Exim 4.92) (envelope-from ) id 1wKt6v-0007kT-6L; Thu, 07 May 2026 07:25:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302184.1576159; Thu, 07 May 2026 07:25:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKt6v-0007kM-2y; Thu, 07 May 2026 07:25:29 +0000 Received: by outflank-mailman (input) for mailman id 1302184; Thu, 07 May 2026 07:25:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKt6t-0007kE-7H for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:25:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKt6s-00C5hR-1r for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:25:26 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc3e63-2eae-0a2a0a5409dd-0a2a4507c6dc-14 for ; Thu, 07 May 2026 09:25:25 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc3e65-229c-0a2a45070019-d155dd2ba9e6-3 for ; Thu, 07 May 2026 09:25:25 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d75312379so1110829f8f.1 for ; Thu, 07 May 2026 00:25:25 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778138725-2176AC48-F8C6D1BC/0/0 X-purgate-type: clean X-purgate-size: 1253 On 06.05.2026 17:47, Oleksii Kurochko wrote: > On 5/4/26 2:59 PM, Jan Beulich wrote: >> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>> --- /dev/null >>> +++ b/xen/include/xen/domain-layout.h >>> @@ -0,0 +1,27 @@ >>> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >>> +#define __XEN_DOMAIN_LAYOUT_H__ >>> + >>> +#include >> >> This isn't really needed. It is ... >> >>> +#include >>> +#include >> >> ... included by this one anyway (pretty much unavoidably right now, I >> guess). > > Then it will be needed to re-order them. > > Do you want to put the comment above xen/sched.h: > > /* > * Ensure xen/sched.h is included before xen/paging.h, since paging.h > depends > * on xen/domain.h, which is pulled in via sched.h. > */ > #include > #include > > or just add this to commit message instead? No. xen/paging.h only includes two asm/*.h, so doesn't itself require anything. If there's anything missing for that header to be included first, I would assume it's then RISC-V's asm/paging.h or asm/p2m.h which lack a necessary #include? Yet without you indicating what exactly the missing piece is, this is somewhat guesswork on my part. Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 07:37:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:37:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302196.1576169 (Exim 4.92) (envelope-from ) id 1wKtIc-0001Gx-9W; Thu, 07 May 2026 07:37:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302196.1576169; Thu, 07 May 2026 07:37:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtIc-0001Gq-6R; Thu, 07 May 2026 07:37:34 +0000 Received: by outflank-mailman (input) for mailman id 1302196; Thu, 07 May 2026 07:37:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKtIa-0001GU-M5 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:37:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtIY-009y4d-HD for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:37:32 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc413b-e002-0a2a0a5209dd-0a2a4505cf8a-10 for ; Thu, 07 May 2026 09:37:31 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc413b-aaa8-0a2a45050019-d155da29f1a2-3 for ; Thu, 07 May 2026 09:37:31 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bc47a96d3bbso70571266b.3 for ; Thu, 07 May 2026 00:37:31 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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It is ... >>> >>>> +#include >>>> +#include >>> >>> ... included by this one anyway (pretty much unavoidably right now, I >>> guess). >> >> Then it will be needed to re-order them. >> >> Do you want to put the comment above xen/sched.h: >> >> /* >> * Ensure xen/sched.h is included before xen/paging.h, since paging.h >> depends >> * on xen/domain.h, which is pulled in via sched.h. >> */ >> #include >> #include >> >> or just add this to commit message instead? > > No. xen/paging.h only includes two asm/*.h, so doesn't itself require anything. > If there's anything missing for that header to be included first, I would assume > it's then RISC-V's asm/paging.h or asm/p2m.h which lack a necessary #include? > Yet without you indicating what exactly the missing piece is, this is somewhat > guesswork on my part. The first time I read compiler error inattentively. The following compilation error occurs after xen/domain.h is dropped from xen/domain-layout.h: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); So the correct fix is to add forward declaration of struct page_info to RISC-V's asm/paging.h. I will add the following to commit message: " To avoid the following compilation issue: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); add the forward declaration of struct page_info to RISC-V's asm/paging.h. " ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu May 07 07:41:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:41:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302204.1576177 (Exim 4.92) (envelope-from ) id 1wKtMr-0002ps-PD; Thu, 07 May 2026 07:41:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302204.1576177; Thu, 07 May 2026 07:41:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtMr-0002pl-MN; Thu, 07 May 2026 07:41:57 +0000 Received: by outflank-mailman (input) for mailman id 1302204; Thu, 07 May 2026 07:41:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtMp-0002pf-F0 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:41:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtMn-009ymz-AB for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:41:54 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc423a-bab6-0a2a0a5309dd-0a2a4507e11c-28 for ; Thu, 07 May 2026 09:41:54 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc4242-229c-0a2a45070019-d155802dd1fd-3 for ; Thu, 07 May 2026 09:41:54 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48d146705b4so6103425e9.3 for ; Thu, 07 May 2026 00:41:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 07 May 2026 00:41:53 -0700 (PDT) Message-ID: <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Date: Thu, 7 May 2026 09:41:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts To: Stefano Stabellini Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778139714-0BD7FC48-25DE0715/0/0 X-purgate-type: clean X-purgate-size: 2090 On 07.05.2026 02:54, Stefano Stabellini wrote: > On Wed, 6 May 2026, Stefano Stabellini wrote: >> On Wed, 6 May 2026, Jan Beulich wrote: >>> When one of the linking passes fails, additional intermediate files are >>> still in place. Having them available for analysis of the underlying >>> problem can be pretty helpful. Collect some into a new intermediates/ >>> directory. (Nothing new will be collected if linking succeeds.) >>> >>> While there also make sure xen-syms is collected (into binaries/). This >>> is rather more useful for analysis of possible problems than its stripped >>> counterpart. >>> >>> Signed-off-by: Jan Beulich >>> --- >>> As the issue this is meant to help with didn't re-occur with this in >>> place, the new logic wasn't really tested yet. >> >> It looks OK but please provide a link to a successful pipeline Well, I had it in use in https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 but does that count, when the issue the change is for didn't really occur? For now I can't test the additions without having a way to trigger that symbol table issue (or any other problem at one of the linking stages). Short of artificially breaking things, that is. >> Reviewed-by: Stefano Stabellini Thanks, but the above wants clarifying first, and the below suggests you actually meant to take back the R-b. > Actually, I see that the build script is run with bash -ex so I wonder > if collect_xen_artefacts would even run if make fails. I think we need: > > trap collect_xen_artefacts EXIT I don't feel comfortable making such a change. Furthermore it's unrelated, as it would mean that on other build failures successfully created final binaries wouldn't be collected either (after all on x86 it may be only one of the two links that failed). Plus then it would likely want doing differently, by making the EXIT hook invoke a new collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered (except for the xen-syms addition there)? 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Thu, 07 May 2026 00:49:04 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Thu, 7 May 2026 10:48:52 +0300 X-Gm-Features: AVHnY4JyCMWnh7af7YUMRsqcpCkfcPjyqh0VRnG7JWBC1lK6NFUYwK6bEhIz_PY Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778140145-8336C161-E189388F/0/0 X-purgate-type: clean X-purgate-size: 6948 Hi Luca, Thank you for the feedback. On Tue, Apr 21, 2026 at 4:26=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > > index b23e72a3d0..dbff470962 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -1098,6 +1098,129 @@ static int gicv2_iomem_deny_access(struct domai= n *d) > > return iomem_deny_access(d, mfn, mfn + nr); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +/* This struct represents block of 32 IRQs */ > > +struct irq_block { > > + uint32_t icfgr[2]; /* 2 registers of 16 IRQs each */ > > + uint32_t ipriorityr[8]; > > + uint32_t isenabler; > > + uint32_t isactiver; > > + uint32_t itargetsr[8]; > > +}; > > + > > +/* GICv2 registers to be saved/restored on system suspend/resume */ > > +struct gicv2_context { > > + /* GICC context */ > > + struct cpu_ctx { > > + uint32_t ctlr; > > + uint32_t pmr; > > + uint32_t bpr; > > + } cpu; > > + > > + /* GICD context */ > > + struct dist_ctx { > > + uint32_t ctlr; > > + /* Includes banked SGI/PPI state for the boot CPU. */ > > + struct irq_block *irqs; > > + } dist; > > +}; > > + > > +static struct gicv2_context gic_ctx; > > + > > +static int gicv2_suspend(void) > > +{ > > + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32); > > + > > + /* Save GICC_CTLR configuration. */ > > + gic_ctx.cpu.ctlr =3D readl_gicc(GICC_CTLR); > > + > > + /* Quiesce the GIC CPU interface before suspend. */ > > + gicv2_cpu_disable(); > > + > > + /* Save GICD configuration */ > > + gic_ctx.dist.ctlr =3D readl_gicd(GICD_CTLR); > > + writel_gicd(0, GICD_CTLR); > > + > > + gic_ctx.cpu.pmr =3D readl_gicc(GICC_PMR); > > + gic_ctx.cpu.bpr =3D readl_gicc(GICC_BPR); > > + > > + for ( i =3D 0; i < blocks; i++ ) > > + { > > + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > > + size_t j, off =3D i * sizeof(irqs->isenabler); > > + > > + irqs->isenabler =3D readl_gicd(GICD_ISENABLER + off); > > + irqs->isactiver =3D readl_gicd(GICD_ISACTIVER + off); > > + > > + off =3D i * sizeof(irqs->ipriorityr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > > + { > > + irqs->ipriorityr[j] =3D readl_gicd(GICD_IPRIORITYR + off += j * 4); > > + irqs->itargetsr[j] =3D readl_gicd(GICD_ITARGETSR + off + j= * 4); > > regarding GICD_ITARGETSR ... > > > + } > > + > > + off =3D i * sizeof(irqs->icfgr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > > + irqs->icfgr[j] =3D readl_gicd(GICD_ICFGR + off + j * 4); > > + } > > + > > + return 0; > > +} > > + > > +static void gicv2_resume(void) > > +{ > > + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32); > > + > > + gicv2_cpu_disable(); > > + /* Disable distributor */ > > + writel_gicd(0, GICD_CTLR); > > + > > + for ( i =3D 0; i < blocks; i++ ) > > + { > > + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > > + size_t j, off =3D i * sizeof(irqs->isenabler); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); > > + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); > > + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); > > + > > + off =3D i * sizeof(irqs->ipriorityr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > > + { > > + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j= * 4); > > + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j *= 4); > > =E2=80=A6 please let me know if I read correctly this loop, but here GICD= _ITARGETSR0 =E2=80=A6 7 > are restored when i=3D0, but the specificaitons says that this block is r= ead only on > multiprocessor, so we should skip the restore part. > Also saving it could be skipped because each field returns a value that c= orresponds > only to the processor reading the register. > > 4.3.12 User constraints [1] You are right, thanks for pointing this out. I will skip saving/restoring the read-only GICD_ITARGETSR0..7 block in v9. > > > + } > > + > > + off =3D i * sizeof(irqs->icfgr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > > + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > > + } > > + > > + /* Make sure all registers are restored and enable distributor */ > > + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); > > + > > + /* Restore GIC CPU interface configuration */ > > + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); > > + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); > > + > > + /* Enable GIC CPU interface */ > > + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); > > +} > > + > > I also see that we don=E2=80=99t save pending SGIs state (by GICD_CPENDSG= IRn/GICD_SPENDSGIRn) or Active Priorities registers > state (GICC_APRn/GICC_NSAPRn [latter if security extension are there]) as= written in [1] =E2=80=9C4.5 Preserving and restoring GIC state=E2=80=9D, > was it intentional? Yes, this was intentional. The GICv2 suspend callback is called at a quiescent point in the SYSTEM_SUSPEND path: all domains are already shut down for suspend, guest execution is quiesced, the scheduler is disabled, non-boot CPUs have been offlined, and CPU0 enters gic_suspend() with local interrupts disabled. For SGIs, I don't consider GICD_CPENDSGIRn/GICD_SPENDSGIRn part of the save= d host GIC context. Xen uses physical SGIs as IPIs, and IPI delivery is an internal synchronization mechanism, not architectural state that should be replayed after SYSTEM_SUSPEND. Guest SGI state is virtual GIC state and is = not represented by these physical GICD SGI pending registers. For GICC_APRn/GICC_NSAPRn, those registers describe active priority state f= or interrupts already acknowledged by the CPU interface. The final suspend pat= h is not expected to run with an active physical interrupt context. If those registers were non-zero there, restoring only APR/NSAPR would not make the corresponding interrupt handling context valid after resume, and could inst= ead leave the CPU interface with stale active priority state. So I did not add save/restore for GICD_CPENDSGIRn/GICD_SPENDSGIRn or GICC_APRn/GICC_NSAPRn in this patch. I can add a short comment in v9 to mak= e this scope explicit. Please let me know if you think there is a suspend/resume path where this state still needs to be preserved. Best regards, Mykola > > [1] https://developer.arm.com/documentation/ihi0048/bb/?lang=3Den > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Thu May 07 07:53:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:53:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302230.1576206 (Exim 4.92) (envelope-from ) id 1wKtYT-0005m3-BD; Thu, 07 May 2026 07:53:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302230.1576206; Thu, 07 May 2026 07:53:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtYT-0005lw-6f; Thu, 07 May 2026 07:53:57 +0000 Received: by outflank-mailman (input) for mailman id 1302230; Thu, 07 May 2026 07:53:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtYS-0005lq-7R for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:53:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtYR-00C5dA-KV for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:53:55 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc4503-2eae-0a2a0a5409dd-0a2a4509884c-40 for ; Thu, 07 May 2026 09:53:55 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc4513-2497-0a2a45090019-d1558034d92d-3 for ; Thu, 07 May 2026 09:53:55 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4852b81c73aso4473525e9.3 for ; Thu, 07 May 2026 00:53:55 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <199b54b5-8571-4a18-bba6-226a5a94ecc9@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778140435-88970A53-30E5C3FF/0/0 X-purgate-type: clean X-purgate-size: 935 On 07.05.2026 09:43, Jürgen Groß wrote: > On 29.04.26 18:41, Jason Andryuk wrote: >> On 2026-04-29 08:06, Juergen Gross wrote: >>> Wit unprivileged domains now capable to use the @releaseDomain watch, >> >> s/Wit/With/ again. >> >> Regards, >> Jason >> >>> there is no reason not to remove any node permissions which relate to >>> a domain which has been removed. >>> >>> This resolves a complex scenario where a new domain could inherit the >>> permissions of an old one with the same domid. >>> >>> Signed-off-by: Juergen Gross >>> Reviewed-by: Jason Andryuk > > Can this simple fix be done while committing, or should I send V3? Afaic - of course it can be. Aiui the series wasn't committed (and can't be) because patch 1 still needs a REST maintainer ack. As per earlier comments throughout the history of the DOMID_ANY patch, I'm hesitant to offer it. Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 07:57:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:57:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302237.1576214 (Exim 4.92) (envelope-from ) id 1wKtbi-0006JA-NP; Thu, 07 May 2026 07:57:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302237.1576214; Thu, 07 May 2026 07:57:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtbi-0006J3-KB; Thu, 07 May 2026 07:57:18 +0000 Received: by outflank-mailman (input) for mailman id 1302237; Thu, 07 May 2026 07:57:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtbg-0006Ix-Vl for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:57:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtbg-005Fn6-8u for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:57:16 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc45d7-2eae-0a2a0a5409dd-0a2a45088ab0-20 for ; Thu, 07 May 2026 09:57:16 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc45dc-63b5-0a2a45080019-d155dd34c424-3 for ; Thu, 07 May 2026 09:57:16 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-43fe3e22e33so313332f8f.0 for ; Thu, 07 May 2026 00:57:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778140636-BC766DB1-A4744FC5/0/0 X-purgate-type: clean X-purgate-size: 5053 On 06.05.2026 18:18, Andrew Cooper wrote: > On 06/05/2026 2:55 pm, Roger Pau Monne wrote: >> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >> say the least. We don't know what registers might be there, nor which > > Sorry, one more.  "We don't know which registers might". > >> values might be safe for those registers. On a forthcoming platform doing >> the zeroing of the MMIO region does put the IOMMU in a broken state, which >> is not recoverable by the IOMMU initialization procedure in Xen. >> >> Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold >> map_iommu_mmio_region() into it's only caller, as the function body is just >> an ioremap() call after the removal of the memset(). >> >> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >> Signed-off-by: Roger Pau Monné >> --- >> Changes since v1: >> - Zero the control register after calling disable_iommu(). >> - Print a warning message if the IOMMU is handed enabled to Xen from >> firmware. >> - Fix commit log grammar issues. >> --- >> xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- >> 1 file changed, 17 insertions(+), 14 deletions(-) >> >> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c >> index 76ae78e5ea53..ffc041211fb5 100644 >> --- a/xen/drivers/passthrough/amd/iommu_init.c >> +++ b/xen/drivers/passthrough/amd/iommu_init.c >> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >> return iommu->ht_flags & mask; >> } >> >> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >> -{ >> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> - IOMMU_MMIO_REGION_LENGTH); >> - if ( !iommu->mmio_base ) >> - return -ENOMEM; >> - >> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >> - >> - return 0; >> -} >> - >> static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) >> { >> if ( iommu->mmio_base ) >> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> { >> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >> >> - if ( !rc ) >> - rc = map_iommu_mmio_region(iommu); >> if ( rc ) >> return rc; >> >> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> + IOMMU_MMIO_REGION_LENGTH); >> + if ( !iommu->mmio_base ) >> + return -ENOMEM; >> + >> get_iommu_features(iommu); >> >> /* >> @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >> return -ERANGE; >> >> + /* Read current control register and forcefully disable the IOMMU. */ >> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + if ( iommu->ctrl.iommu_en ) >> + printk(XENLOG_WARNING >> + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", >> + &iommu->sbdf, iommu->ctrl.raw); >> + disable_iommu(iommu, true); >> + >> + /* With the IOMMU disabled zero the control register. */ >> + iommu->ctrl.raw = 0; >> + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + >> return 0; >> } >> > > I don't think calling disable_iommu() is a good thing here. > > It's just a cascade of clearing one/few bits in ctrl at a time, but is > is added unconditionally so that's 5 UC stores writing 0's to the same > register in the common case. > > I think this logic wants to be: > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >          return -ERANGE; >   > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +    { > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +        iommu->ctrl.raw = 0; > +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    } > + >      return 0; >  } > >   > > which has the advantage that it's closer to the current behaviour, and > therefore arguably a safer backport. > > The only thing that disable_iommu() does which isn't editing the control > register is playing with the PCI MSI enable bit, but that really doesn't > matter when we clear ctrl.int_cap_xt_en.  (And in fact, that path is > buggy because it clears MSI enable without inhibiting interrupt > generation, which architecturally will turn into legacy line interrupt > to deal with.) Except there's no line interrupt associated with this? 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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none From: "Tian, Kevin" To: Jason Gunthorpe CC: Teddy Astie , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" , Xen-devel Subject: RE: How to express "externally managed" IOMMU domains for VFIO/IOMMUFD ? Thread-Topic: How to express "externally managed" IOMMU domains for VFIO/IOMMUFD ? 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Exchange-RoutingPolicyChecked: VSfCeairwr+tBnZUwy90Y9fH5KsyFjF+1tIfs1/ecuba/9l+N3WijyakW4xUQadnNgyL7wp+YR5wOrY7+XrGJUpH3pA9zz8AQwlECvi0OlvrKb/SbQQv9u+tugQh9qa0hq1WfzMdpKIoxlPAM1BZFEmln2uNlTFTXNjDaUdscjXZKth24drbhaFIlk8XO5DLCoQQEgcO83i8o2EIjhD724gxoyCCuLvvEvln8NAoEzLZL5WKqx3lB3mI7cI8y05n78X3mKtRTgRE8292TW/nnXjPrQOovfhhnGIQAiPXW1NJZcfbpMcZZTzypblhEtNTpBWIMsaRHvsAXadY+LLRGQ== X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: db3d8b33-1b3c-4739-46b1-08deac0f02d5 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 08:02:40.4075 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: N7Ss62VstNWPi7tykbszPu81JGV3Yl9Mq8W9yQ+bBt98CXAYDUeAGOZIRFCss8lkhvl1PwNQUJeJF5qaZdChBg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR11MB5915 X-OriginatorOrg: intel.com X-purgate-ID: tlsNG-720697/1778140967-ABB60161-48381AA4/0/0 X-purgate-type: clean X-purgate-size: 1551 > From: Jason Gunthorpe > Sent: Sunday, April 26, 2026 9:30 PM >=20 > On Thu, Apr 23, 2026 at 08:01:50AM +0000, Tian, Kevin wrote: > > > On Xen, we have a dedicated hypercalls for moving a device into anoth= er > > > guest (so it no longer belongs in Dom0, at far as DMA is concerned). > > > > > > But it looks like there are no way to describe that idea of "attach t= hat > > > device to this VM" nor "the device is in a VM"; which makes that > > > impracticable. > > > > > > There may be things that could be done with the vIOMMU objects, but > > > there would be no "parent domain" in such case, as said earlier it > > > doesn't exist in the IOMMU subsystem. > > > > > > What is expected to be done instead ? > > > > > > Teddy > > > > > > [1] https://www.youtube.com/watch?v=3DpLMGRgEJ-Eg > > > > > > > It'd be much easier to collect comments if you can put plain words > > to explain the problem rather than expecting other folks to watch > > the video first... >=20 > It sounds like CC and pkvm to me so I think it should re-use those > mechanisms.. >=20 for CC and pkvm the guest memory is still allocated from host. for Xen the guest memory is allocated from hypervisor and invisible to Dom0. iirc its device assignment is implemented by the toolstack issuing hypercall to hypervisor, bypassing the Dom0 kernel. I don't know the latest status in Xen side. Seems it's still the case and Astie is trying to find a way to orchestrate it via VFIO. But it's unclear what his proposal is... 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506165157.68567-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778140987-E2193443-DA7567B0/0/0 X-purgate-type: clean X-purgate-size: 2141 On 06.05.2026 18:51, Roger Pau Monne wrote: > Attempting to memset the whole IOMMU MMIO region to zero is dangerous to > say the least. We don't know what registers might be there, nor which > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead just zero the control register, which mimics the current behavior > with regards to how the control register is handled, and ensures the IOMU > setup is done with the unit disabled. This approach will need revisiting > in order to support Preboot DMA Protection. > > Fold map_iommu_mmio_region() into its only caller, as the function body is > just an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné While you got Andrew's R-b, I don't view that as enough to commit it. My prior concern towards ... > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > return iommu->ht_flags & mask; > } > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > -{ > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > - IOMMU_MMIO_REGION_LENGTH); > - if ( !iommu->mmio_base ) > - return -ENOMEM; > - > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > - > - return 0; > -} ... this part of the change wasn't addressed, neither verbally nor by an adjustment to the description of what was committed. As previously stated, blindly memset()-ing the entire area may not be the best of all options, but the downsides of not doing this need to somehow be addressed. As indicated, once they run out of bits in the main control register, they likely will add a 2nd one. That'll then also need clearing, yet we have no code to do so anymore. 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Thu, 07 May 2026 01:07:33 -0700 (PDT) Message-ID: <579169d1-8903-4056-b997-b8681f1452a6@suse.com> Date: Thu, 7 May 2026 10:07:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [ANNOUNCE] - Call for agenda items for May 7 Xen Community Call @ 15:00 UTC To: Cody Zuschlag References: Content-Language: en-US Cc: xen-devel@lists.xenproject.org From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778141253-7D1848B7-645D0950/0/0 X-purgate-type: clean X-purgate-size: 765 On 05.05.2026 22:02, Cody Zuschlag wrote: > It’s time for the May Xen Project Community Call, happening this Thursday > at 4 pm UK time. > > We’d love to have you join. You’re welcome to participate or just listen > in. It’s a great way to stay aligned, hear what others are working on, and > help move a few ongoing topics forward. > > *Preparation*: > Please take a moment to review and update the agenda ahead of the call: > 👉 Agenda Back to cryptpad? > Feel free to: > - Add topics or updates > - Suggest anything we can drop or defer > - Include links to patches, threads, or docs where helpful Mind me asking what the difference is between D) and E)? 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We don't know what registers might be there, nor which > > values might be safe for those registers. On a forthcoming platform doing > > the zeroing of the MMIO region does put the IOMMU in a broken state, which > > is not recoverable by the IOMMU initialization procedure in Xen. > > > > Instead just zero the control register, which mimics the current behavior > > with regards to how the control register is handled, and ensures the IOMU > > setup is done with the unit disabled. This approach will need revisiting > > in order to support Preboot DMA Protection. > > > > Fold map_iommu_mmio_region() into its only caller, as the function body is > > just an ioremap() call after the removal of the memset(). > > > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > > Signed-off-by: Roger Pau Monné > > While you got Andrew's R-b, I don't view that as enough to commit it. My > prior concern towards ... > > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > > return iommu->ht_flags & mask; > > } > > > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > > -{ > > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > - IOMMU_MMIO_REGION_LENGTH); > > - if ( !iommu->mmio_base ) > > - return -ENOMEM; > > - > > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > > - > > - return 0; > > -} > > ... this part of the change wasn't addressed, neither verbally nor by an > adjustment to the description of what was committed. As previously stated, > blindly memset()-ing the entire area may not be the best of all options, > but the downsides of not doing this need to somehow be addressed. As > indicated, once they run out of bits in the main control register, they > likely will add a 2nd one. That'll then also need clearing, yet we have > no code to do so anymore. I could introduce an opt-in command line option that forces the zeroing of the MMIO region (to have the option to resort to the previous behavior), but I was (wrongly) under the impression that we have agreement the proposed approach was the least bad of the ones available, sorry. Note how VT-d also doesn't zero the IOMMU registers MMIO page either, neither does it seems to zero the Global Command Register either, which I'm not saying it's correct, but is at least a (possibly wrong) precedent. I don't think there's much we can do with the handling of enabled bits in possibly registers not know/handled by Xen. Like on VT-d, we possibly need to rely on the firmware to handle the IOMMU in a half-sane configuration, with no enabled features on registers Xen doesn't know about. Regards, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778143880-B7370DB1-A52AA58B/0/0 X-purgate-type: clean X-purgate-size: 3546 On 07.05.2026 10:46, Roger Pau Monné wrote: > On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: >> On 06.05.2026 18:51, Roger Pau Monne wrote: >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>> say the least. We don't know what registers might be there, nor which >>> values might be safe for those registers. On a forthcoming platform doing >>> the zeroing of the MMIO region does put the IOMMU in a broken state, which >>> is not recoverable by the IOMMU initialization procedure in Xen. >>> >>> Instead just zero the control register, which mimics the current behavior >>> with regards to how the control register is handled, and ensures the IOMU >>> setup is done with the unit disabled. This approach will need revisiting >>> in order to support Preboot DMA Protection. >>> >>> Fold map_iommu_mmio_region() into its only caller, as the function body is >>> just an ioremap() call after the removal of the memset(). >>> >>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >>> Signed-off-by: Roger Pau Monné >> >> While you got Andrew's R-b, I don't view that as enough to commit it. My >> prior concern towards ... >> >>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >>> return iommu->ht_flags & mask; >>> } >>> >>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >>> -{ >>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> - IOMMU_MMIO_REGION_LENGTH); >>> - if ( !iommu->mmio_base ) >>> - return -ENOMEM; >>> - >>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >>> - >>> - return 0; >>> -} >> >> ... this part of the change wasn't addressed, neither verbally nor by an >> adjustment to the description of what was committed. As previously stated, >> blindly memset()-ing the entire area may not be the best of all options, >> but the downsides of not doing this need to somehow be addressed. As >> indicated, once they run out of bits in the main control register, they >> likely will add a 2nd one. That'll then also need clearing, yet we have >> no code to do so anymore. > > I could introduce an opt-in command line option that forces the > zeroing of the MMIO region (to have the option to resort to the > previous behavior), But we don't want to fully go back to this. We'd need a form that zeroes what may be zeroed, without causing the issue you're trying to address. > but I was (wrongly) under the impression that we > have agreement the proposed approach was the least bad of the ones > available, sorry. > > Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > neither does it seems to zero the Global Command Register either, > which I'm not saying it's correct, but is at least a (possibly wrong) > precedent. I don't think there's much we can do with the handling of > enabled bits in possibly registers not know/handled by Xen. Like on > VT-d, we possibly need to rely on the firmware to handle the IOMMU in > a half-sane configuration, with no enabled features on registers Xen > doesn't know about. As indicated before, for firmware we can likely rely on that. Pre-boot non-firmware environments and especially Xen being kexec-ed (or being run past something which was kexec-ed) may be of more concern. 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Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE for consistency. Also, drop and add some parentheses to be aligned with the similar if() below. x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no longer builds, the fallback is currently only relevant for arm32. Signed-off-by: Oleksii Kurochko Reviewed-by: Michal Orzel Acked-by: Jan Beulich --- CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2506583130 --- Changes in v5: - Drop excess parentheses from definion of is_{32,64}bit_domain for 32-bit case. - Add const for 2-nd argument of set_domain_type(). - Add ASSERT(!domain_tot_pages(d)); inside set_domain_type() to guarantee what is written in the comment above it. - Add Acked-by: Jan Beulich . --- Changes in v4: - Drop enum domain_type type; from Arm's struct arch_domain. - Add Reviewed-by: Michal Orzel . --- Changes in v3: - Sort properly HAS_DOMAIN_TYPE in xen/common/Kconfig. - Update the comment above is_*bit_domain() macros. --- Changes in v2: - Update the commit message. - Move HAS_DOMAIN_TYPE to xen/common/Kconfig. - Return set_domain_type(), move it to xen/fdt-domain-build.h and make it static inline. - s/CONFIG_ARM_64/CONFIG_HAS_DOMAIN for the places where kinfo->type is used. - Drop parantethes around cpu_has_el1_32 in if() and add around (kinfo->type == DOMAIN_32BIT) to be consistent with the similar check below. - Fix comment code style. - Add __packed to definition of enum domain_type --- --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/arm64/domctl.c | 4 ++-- xen/arch/arm/dom0less-build.c | 14 -------------- xen/arch/arm/domain_build.c | 12 +++++------- xen/arch/arm/include/asm/domain.h | 16 ---------------- xen/arch/arm/include/asm/kernel.h | 4 ---- xen/arch/arm/kernel.c | 16 ++++++++-------- xen/common/Kconfig | 3 +++ xen/include/xen/dom0less-build.h | 2 -- xen/include/xen/domain.h | 13 +++++++++++++ xen/include/xen/fdt-domain-build.h | 10 ++++++++++ xen/include/xen/fdt-kernel.h | 5 +++++ xen/include/xen/sched.h | 4 ++++ 13 files changed, 51 insertions(+), 53 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 2f2b501fdac4..79622b46a10d 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -7,6 +7,7 @@ config ARM_64 def_bool y depends on !ARM_32 select 64BIT + select HAS_DOMAIN_TYPE select HAS_FAST_MULTIPLY select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH diff --git a/xen/arch/arm/arm64/domctl.c b/xen/arch/arm/arm64/domctl.c index 8720d126c97d..9e9a29eb1e78 100644 --- a/xen/arch/arm/arm64/domctl.c +++ b/xen/arch/arm/arm64/domctl.c @@ -21,10 +21,10 @@ static long switch_mode(struct domain *d, enum domain_type type) return -EINVAL; if ( domain_tot_pages(d) != 0 ) return -EBUSY; - if ( d->arch.type == type ) + if ( d->type == type ) return 0; - d->arch.type = type; + d->type = type; if ( is_64bit_domain(d) ) for_each_vcpu(d, v) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c105389a..6f73c65e5151 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -237,20 +237,6 @@ int __init make_arch_nodes(struct kernel_info *kinfo) return 0; } -/* TODO: make arch.type generic ? */ -#ifdef CONFIG_ARM_64 -void __init set_domain_type(struct domain *d, struct kernel_info *kinfo) -{ - /* type must be set before allocate memory */ - d->arch.type = kinfo->arch.type; -} -#else -void __init set_domain_type(struct domain *d, struct kernel_info *kinfo) -{ - /* Nothing to do */ -} -#endif - int __init init_vuart(struct domain *d, struct kernel_info *kinfo, const struct dt_device_node *node) { diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index a3ff70102376..ad665cd3c045 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1771,15 +1771,15 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) BUG_ON(d->vcpu[0] == NULL); BUG_ON(v->is_initialised); -#ifdef CONFIG_ARM_64 +#ifdef CONFIG_HAS_DOMAIN_TYPE /* if aarch32 mode is not supported at EL1 do not allow 32-bit domain */ - if ( !(cpu_has_el1_32) && kinfo->arch.type == DOMAIN_32BIT ) + if ( !cpu_has_el1_32 && (kinfo->type == DOMAIN_32BIT) ) { printk("Platform does not support 32-bit domain\n"); return -EINVAL; } - if ( is_sve_domain(d) && (kinfo->arch.type == DOMAIN_32BIT) ) + if ( is_sve_domain(d) && (kinfo->type == DOMAIN_32BIT) ) { printk("SVE is not available for 32-bit domain\n"); return -EINVAL; @@ -1893,10 +1893,8 @@ int __init construct_hwdom(struct kernel_info *kinfo, iommu_hwdom_init(d); -#ifdef CONFIG_ARM_64 - /* type must be set before allocate_memory */ - d->arch.type = kinfo->arch.type; -#endif + set_domain_type(d, kinfo); + find_gnttab_region(d, kinfo); if ( is_domain_direct_mapped(d) ) allocate_memory_11(d, kinfo); diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index ffe5d0d9f0a6..b24f02d269be 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -18,18 +18,6 @@ struct hvm_domain uint64_t params[HVM_NR_PARAMS]; }; -#ifdef CONFIG_ARM_64 -enum domain_type { - DOMAIN_32BIT, - DOMAIN_64BIT, -}; -#define is_32bit_domain(d) ((d)->arch.type == DOMAIN_32BIT) -#define is_64bit_domain(d) ((d)->arch.type == DOMAIN_64BIT) -#else -#define is_32bit_domain(d) (1) -#define is_64bit_domain(d) (0) -#endif - /* * Is the domain using the host memory layout? * @@ -62,10 +50,6 @@ struct paging_domain { struct arch_domain { -#ifdef CONFIG_ARM_64 - enum domain_type type; -#endif - #ifdef CONFIG_ARM64_SVE /* max SVE encoded vector length */ uint8_t sve_vl; diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h index 7c3b7fde5b64..21f4273fa1b5 100644 --- a/xen/arch/arm/include/asm/kernel.h +++ b/xen/arch/arm/include/asm/kernel.h @@ -10,10 +10,6 @@ struct arch_kernel_info { -#ifdef CONFIG_ARM_64 - enum domain_type type; -#endif - /* Enable pl011 emulation */ bool vpl011; }; diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 7544fd50a20f..9395b5af8745 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -100,8 +100,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) const struct membanks *mem = kernel_info_get_mem(info); paddr_t load_addr; -#ifdef CONFIG_ARM_64 - if ( (info->arch.type == DOMAIN_64BIT) && (info->zimage.start == 0) ) +#ifdef CONFIG_HAS_DOMAIN_TYPE + if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) return mem->bank[0].start + info->zimage.text_offset; #endif @@ -268,14 +268,14 @@ int __init kernel_uimage_probe(struct kernel_info *info, info->load = kernel_zimage_load; -#ifdef CONFIG_ARM_64 +#ifdef CONFIG_HAS_DOMAIN_TYPE switch ( uimage.arch ) { case IH_ARCH_ARM: - info->arch.type = DOMAIN_32BIT; + info->type = DOMAIN_32BIT; break; case IH_ARCH_ARM64: - info->arch.type = DOMAIN_64BIT; + info->type = DOMAIN_64BIT; break; default: printk(XENLOG_ERR "Unsupported uImage arch type %d\n", uimage.arch); @@ -345,7 +345,7 @@ static int __init kernel_zimage64_probe(struct kernel_info *info, info->load = kernel_zimage_load; - info->arch.type = DOMAIN_64BIT; + info->type = DOMAIN_64BIT; return 0; } @@ -396,8 +396,8 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, info->load = kernel_zimage_load; -#ifdef CONFIG_ARM_64 - info->arch.type = DOMAIN_32BIT; +#ifdef CONFIG_HAS_DOMAIN_TYPE + info->type = DOMAIN_32BIT; #endif return 0; diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 0a20aa0a1249..5ff71480eebe 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -128,6 +128,9 @@ config HAS_DEVICE_TREE_DISCOVERY config HAS_DOM0LESS bool +config HAS_DOMAIN_TYPE + bool + config HAS_DIT # Data Independent Timing bool diff --git a/xen/include/xen/dom0less-build.h b/xen/include/xen/dom0less-build.h index faaf660424b2..4118dec76c0a 100644 --- a/xen/include/xen/dom0less-build.h +++ b/xen/include/xen/dom0less-build.h @@ -57,8 +57,6 @@ int init_vuart(struct domain *d, struct kernel_info *kinfo, int make_intc_domU_node(struct kernel_info *kinfo); int make_arch_nodes(struct kernel_info *kinfo); -void set_domain_type(struct domain *d, struct kernel_info *kinfo); - int init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt); diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 93c0fd00c1d7..a095190fc71a 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -13,6 +13,19 @@ struct guest_area { void *map; }; +#ifdef CONFIG_HAS_DOMAIN_TYPE +enum __packed domain_type { + DOMAIN_32BIT, + DOMAIN_64BIT, +}; +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) +#elif !defined(CONFIG_64BIT) +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ +#define is_32bit_domain(d) true +#define is_64bit_domain(d) false +#endif + #include typedef union { diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 0d40d8cfa105..9465a1021fe3 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -7,6 +7,7 @@ #include #include #include +#include #include struct domain; @@ -69,6 +70,15 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; } +static inline void set_domain_type(struct domain *d, const struct kernel_info *kinfo) +{ +#ifdef CONFIG_HAS_DOMAIN_TYPE + /* Type must be set before allocating memory. */ + ASSERT(!domain_tot_pages(d)); + d->type = kinfo->type; +#endif +} + #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */ /* diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 4d0467bb396a..86a37a13048b 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -9,6 +9,7 @@ #include #include +#include #include #if __has_include() @@ -65,6 +66,10 @@ struct kernel_info { } zimage; }; +#ifdef CONFIG_HAS_DOMAIN_TYPE + enum domain_type type; +#endif + #if __has_include() struct arch_kernel_info arch; #endif diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 212c7d765c3e..00db1da12f21 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -386,6 +386,10 @@ struct domain { domid_t domain_id; +#ifdef CONFIG_HAS_DOMAIN_TYPE + enum domain_type type; +#endif + unsigned int max_vcpus; uint64_t unique_id; /* Unique domain identifier */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302326.1576276 (Exim 4.92) (envelope-from ) id 1wKuZV-00028G-OH; Thu, 07 May 2026 08:59:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302326.1576276; Thu, 07 May 2026 08:59:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZV-000289-LR; Thu, 07 May 2026 08:59:05 +0000 Received: by outflank-mailman (input) for mailman id 1302326; Thu, 07 May 2026 08:59:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZU-00027t-Bm for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZT-002y5h-Da for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:03 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc544c-2eae-0a2a0a5409dd-0a2a450c9c00-48 for ; Thu, 07 May 2026 10:59:03 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5457-62f1-0a2a450c0019-d155da30a85d-3 for ; Thu, 07 May 2026 10:59:03 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc1f0830f44so329020366b.0 for ; Thu, 07 May 2026 01:59:03 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This patch series is rebased on top of patch "xen: introduce CONFIG_HAS_DOMAIN_TYPE" but there is no any technical dependency. CI: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2506574229 --- Changes in v5: - Merged to upstream staging: xen/riscv: implement get_page_from_gfn() - Address other comments from ML. --- Changes in v4: - Move patch up, closer to other common/Arm related patches: - xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() - xen: move declaration of fw_unreserved_regions() to common header - xen: move domain_use_host_layout() to common header - xen: rename p2m_ipa_bits to p2m_gpa_bits - Merged to upstream/staging: xen/riscv: implement get_page_from_gfn() - Rebase this patch series on top of [PATCH v3 0/3] dom0less: various updates. - Address the comments from ML. --- Changes in v3: - Address the comments from ML. --- Changes in v2: - Address the comments from ML. - Introduce some new patches to make dom0less solution more architecture indepenent from terminology point of view. - Minor fixes. --- Oleksii Kurochko (11): xen: arm: fix len type for guest copy functions xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() xen: move declaration of fw_unreserved_regions() to common header xen: introduce domain-layout.h with common domain_use_host_layout() xen/device-tree: use p2m_gpa_bits in common code xen/riscv: implement copy_to_guest_phys() xen/riscv: add Linux kernel loading support xen/riscv: rework G-stage mode handling xen/riscv: introduce p2m_gpa_bits xen/riscv: add definition of guest RAM banks xen/riscv: enable DOMAIN_BUILD_HELPERS xen/arch/arm/domain_build.c | 1 + xen/arch/arm/guestcopy.c | 6 +- xen/arch/arm/include/asm/domain.h | 14 -- xen/arch/arm/include/asm/guest_access.h | 2 +- xen/arch/arm/include/asm/p2m.h | 2 + xen/arch/arm/include/asm/setup.h | 3 - xen/arch/arm/kernel.c | 50 ++--- xen/arch/arm/vgic-v3.c | 1 + xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/Makefile | 3 + xen/arch/riscv/dom0less-build.c | 71 ++++++ xen/arch/riscv/guestcopy.c | 116 ++++++++++ xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/guest-layout.h | 23 ++ xen/arch/riscv/include/asm/guest_access.h | 7 + xen/arch/riscv/include/asm/p2m.h | 21 +- xen/arch/riscv/include/asm/paging.h | 1 + xen/arch/riscv/kernel.c | 249 ++++++++++++++++++++++ xen/arch/riscv/p2m.c | 134 ++++++++---- xen/arch/riscv/vmid.c | 2 +- xen/common/device-tree/domain-build.c | 3 +- xen/common/device-tree/kernel.c | 2 +- xen/include/public/arch-riscv.h | 5 + xen/include/xen/bootinfo.h | 4 + xen/include/xen/domain-layout.h | 28 +++ xen/include/xen/fdt-domain-build.h | 2 +- xen/include/xen/fdt-kernel.h | 17 +- 28 files changed, 683 insertions(+), 99 deletions(-) create mode 100644 xen/arch/riscv/dom0less-build.c create mode 100644 xen/arch/riscv/guestcopy.c create mode 100644 xen/arch/riscv/include/asm/guest-layout.h create mode 100644 xen/arch/riscv/kernel.c create mode 100644 xen/include/xen/domain-layout.h -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302327.1576286 (Exim 4.92) (envelope-from ) id 1wKuZX-0002Md-3O; Thu, 07 May 2026 08:59:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302327.1576286; Thu, 07 May 2026 08:59:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZW-0002MO-Vx; Thu, 07 May 2026 08:59:06 +0000 Received: by outflank-mailman (input) for mailman id 1302327; Thu, 07 May 2026 08:59:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZV-000288-Ov for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZV-00CM1g-5g for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:05 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-5cb7-0a2a0a5109dd-0a2a45019b40-14 for ; Thu, 07 May 2026 10:59:05 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5458-c1f2-0a2a45010019-d155da35dd29-3 for ; Thu, 07 May 2026 10:59:05 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-b9358bc9c50so97041766b.1 for ; Thu, 07 May 2026 01:59:04 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:03 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144344; x=1778749144; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XAueRDBVOniME+t2o7j9YqeJvqQdzKajUlr2rc4WITOfbKzQCQ5p66mrwjyVSYhpCv ACPvdWAr41sqPunhIh5IAoSyIpbM3DqKa4eAKgPUd9v09I1s8gOd74m+ejbOh7EPQ5v9 saMKo2GENGJOa3QRWVAQI+Sd1bNzTV+i11/BJNwdfN+eZMu5HKmqob6IBjg+T/CTfdtm dsVK/IdQytQFScY00oORXkXRfZbIQ3xIqT1o8XCMbs1oq6Z1MJNwkQ2J3XuR7Fhsuk0t cikfbxxoMcekpUueCTNcLkFM9bg2UB+ScI9pZ2Yeyh5LkYtHaB1aVpzbU1mhFCcTpdPA H2ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144344; x=1778749144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XU1hoNUieTgwu+d52eT1/uhZBEI1bjjvll13z0ZTBj4iHWMilrP+VDjLYT2s/+MtvU bD82QNnNZaWLssM0Wu1OtUCG84B2wu7vjVW1DF/RUK9pVDWtJvd2gGiJ/BXOF9m2F7HT 4Zdnjom2/pFpIsSE6wuS+mGE/DDq2FquQxjXIqHTw+vYfrMGJ+GjENFd0u1hWAWbWEyM NfvLlKyi5yLjRyeXAjTIPETOIViAXPhLdoW8/NWbMRQB9gDaARvBtB72Swz1Vd+0/5e1 OH2znqrUR801XaCcxt0PbZ+WkzfJKjT50r1V2A5Rc5z5zNLHD4e7yCWJ566mHSYZFOxw t8HQ== X-Gm-Message-State: AOJu0YwM1aVZkzPmyS/fPsWAhBLNMHJcY0XiPQlv3Zu4/i1W8xRm++7w mZjEZjD6gjbntnBZVOJn3wXGFxngaKAvdoGLwLltMUeliLSCFoM846+0c20V/Q== X-Gm-Gg: AeBDietYABACMO+/w+OfP0G3kH5KwPOXdtSMjMoVkvW+bmh+Cj02ANynOEd3uT0I6Qw HjVI+9GSAnixurztPKzpWcB9xF+F8p2A31dSGomt9jfwh/z9lTubVdfD6dM/ydZuqkI+QOsIpiQ mgp4LgBVaRHedO/Gr/KNAMAkl8/NkFh4koAiFcSSucZr7O4noljX5j98kQIciOWpqORWRwzsHIU JQSuJ1JIMWYyl+DRMf+v0JzI2dyyd58cXIU27JrqJmK3q6HNA3Eom037Me+/j5TO7N7eAdCsRDf 6fnL3cXYps1dOePH3/J62IfJF8+T5pTVsmFlh3XbXdPk7ojXNZeQeE//3dzyfC6rJS2H/UVHw9y 5gYCNxHguFAygyC/jmMKDHAYQgBE2NU5fbLZOCSuBGwR6/W1aokiNZ4aGoSID7mk2Q2hFgyNgk4 zlL9iAfB2GAor78Ecne5NgcgDnjZbfBi3xtxVE4gBRIzlik8E5wV9fr2va7W/jqnJlM2jRnYdP0 frmw4oOv6nMpXpbKkG71XWAyg== X-Received: by 2002:a17:907:3cc7:b0:bc4:aafa:65cf with SMTP id a640c23a62f3a-bc56c92bfc1mr415473166b.16.1778144343898; Thu, 07 May 2026 01:59:03 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 01/11] xen: arm: fix len type for guest copy functions Date: Thu, 7 May 2026 10:58:40 +0200 Message-ID: <6f629fe2e194382534d3b1e2400b753c43ccb04b.1778140240.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778144345-AEF58FF4-33AE15F9/10/73395122804 X-purgate-type: spam X-purgate-size: 5531 Widen the len argument of copy_to_guest_phys_flush_dcache() and the copy_to_guest_phys_cb typedef from unsigned int to unsigned long, as the function can be used to copy large blobs such as the initrd which may exceed 4GB. Update the internal copy_guest() len argument to unsigned long accordingly. Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. raw_* wrappers above copy_guest() keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe and there is no raw_* users who are using a value bigger than what can fit into 'unsigned int'. Fixes: 2986481b3d9e6 ("xen/arm: guest_copy: Extend the prototype to pass the vCPU") Fixes: 5302bd490bea7 ("xen/arm: Introduce copy_to_guest_phys_flush_dcache") Fixes: d07b7369aa65b ("xen/common: dom0less: introduce common domain-build.c") Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Reviewed-by: Luca Fancellu --- Changes in v5: - Add Review-by: Reviewed-by: Luca Fancellu --- Changes in v4: - Add Fixes: tags. - Add "arm:" prefix to commit subject. - Add Reviewed-by: Jan Beulich . - Avoid using of min_t. --- Changes in v3: - Correct the declaration of copy_to_guest_phys_cb() instead of return 'unsigned int' to be in sync with len argument, the type of len argument is changed on 'unsigned long' as initrd could be pretty big and also its size is stroed in 'paddr_t' which is 'unsigned long'. - Update copy_guest() prototype to avoid trancation bug for len argument. - Revert prototype changes for raw_* wrappers above copy_guest() as they should keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe. - Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. - Add Reported-by: Jan Beulich --- Changes in v2: - New patch. --- --- xen/arch/arm/guestcopy.c | 6 +++--- xen/arch/arm/include/asm/guest_access.h | 2 +- xen/include/xen/fdt-domain-build.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/guestcopy.c b/xen/arch/arm/guestcopy.c index fdb06422b8e9..86f1c9d0e318 100644 --- a/xen/arch/arm/guestcopy.c +++ b/xen/arch/arm/guestcopy.c @@ -53,7 +53,7 @@ static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, return page; } -static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long len, copy_info_t info, unsigned int flags) { /* XXX needs to handle faults */ @@ -65,7 +65,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, while ( len ) { void *p; - unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset); + unsigned long size = min(len, PAGE_SIZE + 0UL - offset); struct page_info *page; page = translate_get_page(info, addr, flags & COPY_linear, @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len) + unsigned long len) { return copy_guest(buf, gpa, len, GPA_INFO(d), COPY_to_guest | COPY_ipa | COPY_flush_dcache); diff --git a/xen/arch/arm/include/asm/guest_access.h b/xen/arch/arm/include/asm/guest_access.h index 18c88b70d7ec..c13cbec55b65 100644 --- a/xen/arch/arm/include/asm/guest_access.h +++ b/xen/arch/arm/include/asm/guest_access.h @@ -14,7 +14,7 @@ unsigned long raw_clear_guest(void *to, unsigned int len); unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); int access_guest_memory_by_gpa(struct domain *d, paddr_t gpa, void *buf, uint32_t size, bool is_write); diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 9465a1021fe3..671486c1c837 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -48,7 +48,7 @@ static inline int get_allocation_size(paddr_t size) typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); void initrd_load(struct kernel_info *kinfo, copy_to_guest_phys_cb cb); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302328.1576295 (Exim 4.92) (envelope-from ) id 1wKuZZ-0002bh-AA; Thu, 07 May 2026 08:59:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302328.1576295; Thu, 07 May 2026 08:59:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZZ-0002ba-6b; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144346; x=1778749146; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=CC8UBS6Zy2QL7cIqe6RcQJfEPkAYFSy+Fv6UxgljNiHPOhhCJNK4T0vmxMF1l+X8xX 51wgz9qCpj2WOwxlBvrlflDS3O9dObR46KUU/d7mnM4se/uLQ0T4JUhG6JU+Kukry+d3 AuYPKugzTGdIIx678ZstFSXTQn0NF4o7SZs6rfIhqvUFl86W7T5/GlgMFzDZEG2yqG8N /MsBtjn6Xb8VL4PAuJhyzOCRzTflz6Aj4fxnL5iZFEl26WwlUIZEbmCq48l7c6KnXvZU LBYescws0h1vhoySPVZaIR7Shdb9PpYk8Ad5/FhIs0pbzVL+I0l8c17pjX3/5jTvK+xd rRIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144346; x=1778749146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=hnTDetYd3KowvrYeV5HQiQAyx3oEPIybVB9BacPbiuqpNcH0ZOp85jcvtBOnLtL8vc HZMaqzSRJzUGjvMcnILfz47PZJtTb/ut7e0by82E3Pk+8ygDHMUMLeT2NKEgIPyJHFEY N7soqYcy2QHsmgajrKYmy/vQQrZwma3LmOQjSuWRFQhZIgi5H/owigdVDUD2wKYEFFWI ptEM5JQsf4tlITNEWfrOCDXqrr2wFnDlohjpDSo/IAJ/latB1arFpAJG49e80Y0oqHgS +5mhfkF02Gp5w14omL6Pjyb1xWtNDSlkAyXbTAvwu5nyvml8rgAvF0LYfNcyjEY8GWtH Od8A== X-Gm-Message-State: AOJu0Yxxg0CJb1c4k6HbXBs8DD7fLzfUk6WFiG7S87b8DJbcFp0vk9RB 08ZP5nMZ59Yts+AGeZ3+CH1f+EBNQ5dCujkAkZ02kuHsepymNXJ9TioqhSKalQ== X-Gm-Gg: AeBDietuIs20j1if5GSAcribvIpTRDssi/MUvP6mRDoXSbvAgttv/3hynMTJ9cx87bG lPaUAxNTd2S+mSei0DleJ5neKjf63qK6bbce4ZHXZuA7U4z3gnMHFdUzQukxUGOz0XgCVJLpz/M 6oCwjXzjKyZkuxdxw0FaZR7cBsxdQ07LxcARYW2xptXOeOba7Im/dKFMBcMTc2KkJPGnJbgBles UpQuQ1Zm/eAUb8FwS2MxCY8EDSQl4529nKSQojHbB4EQ1jJvyIgJgMtPc0Gb2PkHT4+KryB8tl9 0vzPvTD5MhBKXr7ww7htBQd9zMXhrkZOP3U6VGkJcRmH88379g1F9I8VhPv+ZLu/J0X1TStr70d 1QSR7d86G6KEA7V0m63x9LTeR2ghX5LlgQ3R1F4xWylJV9bdirsgj1PPxOddRFDQRxlw4HFAEOx 1qcO6M/lIdr2PHbS+ZRO9x3bt+Lb2x5cAV8SwyMnq4kIht3xze4qUV3x6gtbQ3nxGjS9ji68lMa BZs X-Received: by 2002:a17:907:c18:b0:bb8:b536:55dd with SMTP id a640c23a62f3a-bc56d713f3bmr418780266b.41.1778144345375; Thu, 07 May 2026 01:59:05 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() Date: Thu, 7 May 2026 10:58:41 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778144346-72B778B7-8E0966E5/10/73395122804 X-purgate-type: spam X-purgate-size: 8345 The helper kernel_zimage_probe() is referenced from common code (xen/common/device-tree/kernel.c), but its name is tied to the zImage format which is specific to Arm (from architectures supported by Xen). Other architectures supported by Xen, such as RISC-V, do not use the zImage format and instead rely on other kernel image types (e.g. Image or compressed Image variants: Image.gz, etc). Using "zimage" in the name is therefore misleading in architecture-independent code. Rename kernel_zimage_probe() to kernel_image_probe() and update the associated structure field from "zimage" to "image" to reflect that the code handles generic kernel images rather than the zImage format specifically. No functional change intended. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in v5: - s/zimage/image in some comments. --- Changes in v3-4: - Nothing changed. Only rebase. --- Changes in v2: - new patch. --- --- xen/arch/arm/kernel.c | 50 ++++++++++++++++----------------- xen/common/device-tree/kernel.c | 2 +- xen/include/xen/fdt-kernel.h | 6 ++-- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 9395b5af8745..b72585b7fed3 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -101,8 +101,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) paddr_t load_addr; #ifdef CONFIG_HAS_DOMAIN_TYPE - if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) - return mem->bank[0].start + info->zimage.text_offset; + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) + return mem->bank[0].start + info->image.text_offset; #endif /* @@ -111,19 +111,19 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) * and above 32MiB. Load it as high as possible within these * constraints, while also avoiding the DTB. */ - if ( info->zimage.start == 0 ) + if ( info->image.start == 0 ) { paddr_t load_end; load_end = mem->bank[0].start + mem->bank[0].size; load_end = MIN(mem->bank[0].start + MB(128), load_end); - load_addr = load_end - info->zimage.len; + load_addr = load_end - info->image.len; /* Align to 2MB */ load_addr &= ~((2 << 20) - 1); } else - load_addr = info->zimage.start; + load_addr = info->image.start; return load_addr; } @@ -131,8 +131,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) static void __init kernel_zimage_load(struct kernel_info *info) { paddr_t load_addr = kernel_zimage_place(info); - paddr_t paddr = info->zimage.kernel_addr; - paddr_t len = info->zimage.len; + paddr_t paddr = info->image.kernel_addr; + paddr_t len = info->image.len; void *kernel; int rc; @@ -215,7 +215,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, return -EOPNOTSUPP; } - info->zimage.start = be32_to_cpu(uimage.load); + info->image.start = be32_to_cpu(uimage.load); info->entry = be32_to_cpu(uimage.ep); /* @@ -224,20 +224,20 @@ int __init kernel_uimage_probe(struct kernel_info *info, * independent image. That means Xen is free to load such an image at * any valid address. */ - if ( info->zimage.start == 0 ) + if ( info->image.start == 0 ) printk(XENLOG_INFO "No load address provided. Xen will decide where to load it.\n"); else printk(XENLOG_INFO "Provided load address: %"PRIpaddr" and entry address: %"PRIpaddr"\n", - info->zimage.start, info->entry); + info->image.start, info->entry); /* * If the image supports position independent execution, then user cannot * provide an entry point as Xen will load such an image at any appropriate * memory address. Thus, we need to return error. */ - if ( (info->zimage.start == 0) && (info->entry != 0) ) + if ( (info->image.start == 0) && (info->entry != 0) ) { printk(XENLOG_ERR "Entry point cannot be non zero for PIE image.\n"); @@ -257,13 +257,13 @@ int __init kernel_uimage_probe(struct kernel_info *info, if ( rc ) return rc; - info->zimage.kernel_addr = mod->start; - info->zimage.len = mod->size; + info->image.kernel_addr = mod->start; + info->image.len = mod->size; } else { - info->zimage.kernel_addr = addr + sizeof(uimage); - info->zimage.len = len; + info->image.kernel_addr = addr + sizeof(uimage); + info->image.len = len; } info->load = kernel_zimage_load; @@ -287,9 +287,9 @@ int __init kernel_uimage_probe(struct kernel_info *info, * header. In other words if the user provides a uImage header on top of * zImage or zImage64 header, Xen uses the attributes of uImage header only. * Thus, Xen uses uimage.load attribute to determine the load address and - * zimage.text_offset is ignored. + * image.text_offset is ignored. */ - info->zimage.text_offset = 0; + info->image.text_offset = 0; #endif return 0; @@ -338,10 +338,10 @@ static int __init kernel_zimage64_probe(struct kernel_info *info, if ( (end - start) > size ) return -EINVAL; - info->zimage.kernel_addr = addr; - info->zimage.len = end - start; - info->zimage.text_offset = zimage.text_offset; - info->zimage.start = 0; + info->image.kernel_addr = addr; + info->image.len = end - start; + info->image.text_offset = zimage.text_offset; + info->image.start = 0; info->load = kernel_zimage_load; @@ -389,10 +389,10 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, } } - info->zimage.kernel_addr = addr; + info->image.kernel_addr = addr; - info->zimage.start = start; - info->zimage.len = end - start; + info->image.start = start; + info->image.len = end - start; info->load = kernel_zimage_load; @@ -403,7 +403,7 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, return 0; } -int __init kernel_zimage_probe(struct kernel_info *info, paddr_t addr, +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t size) { int rc; diff --git a/xen/common/device-tree/kernel.c b/xen/common/device-tree/kernel.c index 28096121a52d..cfa27464f0fc 100644 --- a/xen/common/device-tree/kernel.c +++ b/xen/common/device-tree/kernel.c @@ -235,7 +235,7 @@ int __init kernel_probe(struct kernel_info *info, if ( rc && rc != -EINVAL ) return rc; - rc = kernel_zimage_probe(info, mod->start, mod->size); + rc = kernel_image_probe(info, mod->start, mod->size); return rc; } diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 86a37a13048b..8cd1670c2c6f 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -63,7 +63,7 @@ struct kernel_info { paddr_t text_offset; /* 64-bit Image only */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ - } zimage; + } image; }; #ifdef CONFIG_HAS_DOMAIN_TYPE @@ -113,7 +113,7 @@ kernel_info_get_mem_const(const struct kernel_info *kinfo) * Probe the kernel to detemine its type and select a loader. * * Sets in info: - * ->load hook, and sets loader specific variables ->zimage + * ->load hook, and sets loader specific variables ->image */ int kernel_probe(struct kernel_info *info, const struct dt_device_node *domain); @@ -133,7 +133,7 @@ void kernel_load(struct kernel_info *info); int kernel_decompress(struct boot_module *mod, uint32_t offset); -int kernel_zimage_probe(struct kernel_info *info, paddr_t addr, paddr_t size); +int kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t size); /* * uImage isn't really used nowadays thereby leave kernel_uimage_probe() -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302330.1576304 (Exim 4.92) (envelope-from ) id 1wKuZb-0002t6-I0; Thu, 07 May 2026 08:59:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302330.1576304; Thu, 07 May 2026 08:59:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZb-0002sx-EO; Thu, 07 May 2026 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 1302330; Thu, 07 May 2026 08:59:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZZ-0002c8-Gl for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZY-002y66-Ta for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:08 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-bab6-0a2a0a5309dd-0a2a450ced94-18 for ; Thu, 07 May 2026 10:59:08 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545c-62f1-0a2a450c0019-d155da30b921-3 for ; Thu, 07 May 2026 10:59:08 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-b936331786dso67215866b.3 for ; Thu, 07 May 2026 01:59:08 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu --- Changes in v5: - Add Reviewed-by: Luca Fancellu . --- Changes in v2-v4: - Nothing changed. Only rebase. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/bootinfo.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index 899e33925ca4..0d29b46ea52b 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -43,9 +43,6 @@ int acpi_make_efi_nodes(void *fdt, struct membank tbl_add[]); void create_dom0(void); void discard_initial_modules(void); -void fw_unreserved_regions(paddr_t s, paddr_t e, - void (*cb)(paddr_t ps, paddr_t pe), - unsigned int first); void init_pdx(void); void setup_mm(void); diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index f834f1957155..dbf492c2e36e 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -210,4 +210,8 @@ static inline struct membanks *membanks_xzalloc(unsigned int nr, return banks; } +void fw_unreserved_regions(paddr_t s, paddr_t e, + void (*cb)(paddr_t ps, paddr_t pe), + unsigned int first); + #endif /* XEN_BOOTINFO_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302332.1576310 (Exim 4.92) (envelope-from ) id 1wKuZc-00030T-4o; Thu, 07 May 2026 08:59:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302332.1576310; Thu, 07 May 2026 08:59:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZb-0002zR-Vn; Thu, 07 May 2026 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 1302332; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZa-0002q9-Jj for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZa-00CM1g-0R for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:10 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-5cb7-0a2a0a5109dd-0a2a45019b40-36 for ; Thu, 07 May 2026 10:59:09 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545d-c1f2-0a2a45010019-d155da31a8e7-3 for ; Thu, 07 May 2026 10:59:09 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-bc1f0830f44so329054066b.0 for ; Thu, 07 May 2026 01:59:09 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:08 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144349; x=1778749149; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yM+vLILbE6Jc00UTwsrRi/KBPqAZVlEYVO70OjvNObQ=; b=rf55Qbtn8FqUcg0DvITB5nEH3I0tTdTzQre1pTWb4hTfnnvl4xnuJCVcjoT8CcIRxr Wp1lJvl8ff9wA7TsC2vIDHmhiTo7pefqMm372iIE+WwW3bqhcFZS9zdf5b55sUOUkLHR bjOUkahdLZFpSDRkyk133MFRFX3hsUE0yzID6MWnTDNxKz7Bq+ElV9ZOXTPjnpgtc/o7 Yl5ASPx4nuxbrgGo7GEFfZJah/cUhg5Xc5b4AjDnd+OeTNUYMCwrFTxt2bWCa1l2W47Q CUP2NY9QXizhoeNIOYMg931ikggKygwJ7U98b7IGOtnT/Gls6M6I5ealm6rks9N+sO2R WXBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144349; x=1778749149; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=yM+vLILbE6Jc00UTwsrRi/KBPqAZVlEYVO70OjvNObQ=; b=Yu4okDBODMv33xzWBLtLf6qWP6tRq9No0SsII+QqP1nkTkSb6Lnen3qJ6c9UTfojbz /cKPPz52tcjqDZqe9+r8t5YTwezsGjyOH8T+bNgJw2OGMYZ55VBAqU6N4iYo9IWtIedM ywEwoZWjUp877JR1QMuO8ElVdz/ikBVeSaKBfyJsmBFF644UWdx3gXNzvXrDy16VGsNx hFrNcRMWobCkunCTa9R9QyHAGC8LQDBDXSTnk4ya6BwnJXgyVzqI2fY+HShZrLSp/XYU G8PFCYl2KP0yf5NHFka0pZBsFsnL2BYiKRym1WK7qZuNOJduv/SO+1+j8UO87wY7beXf 7Vlw== X-Gm-Message-State: AOJu0Yz0Ue1yKkvgAzLEaeo7Pg50Cl0UCeQqUacXfQ1z7oAHviR7BWfJ bzcvKVitdUx3uULpVxZhGU6g4KbcWurhKOimmNx2VS3Zyu9eWF3NmOmezGnBlg== X-Gm-Gg: AeBDievw9t5gcD2WoGvI7B+amy+4x7uIvl0DdlUUbZwTh3J9fg0XIT2Nk7zGaMRCZAr rrsZCa4np66TsZD+VGrYNVja4/YgKsasp/8avPb35hiOC2Fhwr8kgpOIjLUaz7tovq9j3gcbQcx HVDbO2X4XUDJF4DGxW+Gd0x4qLbVPSlchd9WAZBK1QZPy+bp7gU0RstTtemmHa0ca8t+R3z83WZ 8bccRpJtlE0z1hz/SzxejvuoSNS1kWxwpOH+cSt5elH7axrRFY/qJ57NUqI3qLDbloQbE31/m7V 8F5FO0Kw7VBwO/Llpezxt+4fhuG1KFIdwBTrXetgy1IWXdURC99DG5pDKulUAEv4tyCcbWMtm0o QPMehxIyky++Ap/EVoyS42YdgCPpSQWnEbMh1TDqU7aea1wTbviCeBr9fHC1sXu1S0Urzpnq44G eYDxCwxpiFdWkS/PyKxB76ykUfUyRup7g2byVY2Woqm+t2Ffawmdh1OE8FmkWGttEBAc9QQbQuF x8p X-Received: by 2002:a17:907:6d1e:b0:ba3:7d65:c373 with SMTP id a640c23a62f3a-bc85c2b36demr103325966b.10.1778144348790; Thu, 07 May 2026 01:59:08 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Connor Davis , Luca Fancellu Subject: [PATCH v5 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() Date: Thu, 7 May 2026 10:58:43 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778144349-AD545FF4-EF64164F/10/73395122804 X-purgate-type: spam X-purgate-size: 6850 domain_use_host_layout() is not architecture-specific and may be needed on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common static inline in a new dedicated header, xen/domain-layout.h. xen/domain.h would be the natural home, but placing it there would require including xen/paging.h (for paging_mode_translate()) and xen/sched.h (for is_hardware_domain()), which would introduce circular dependencies. A separate header that callers opt into avoids this. Adjust the implementation to take paging_mode_translate() into account so it works correctly for all architectures, including x86. Some extra details about implementation [2] and [3]. To avoid the following compilation issue: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); add the forward declaration of struct page_info to RISC-V's asm/paging.h. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ Suggested-by: Stefano Stabellini Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Add /* SPDX-License-Identifier: GPL-2.0-only */ to xen/domain-layout.h. - s/__XEN_DOMAIN_LAYOUT_H__/XEN_DOMAIN_LAYOUT_H. - Drop inclusion of xen/domain.h as it is included in xen/sched.h. - Add forward declaration of page_info in asm/paging.h to fix compilation issue occured after drop inclusion of xen/domain.h. - Add Acked-by: Jan Beulich . --- Changes in v4: - Update the comment above domain_use_host_layout(). --- Changes in v3: - Make argument of domain_use_host_layout() const. - Create a separate header to avoid circular heder dependecy and making domain_use_host_layour() as static inline. - Rework domain_use_host_layout() to be protected by paging_mode_translate(). - Update the commit message. --- Changes in v2: - Drop ifdef around defintion of domain_use_host_layout() as it was suggested generic version. It could be returned back when the real use case for it will appear. - Add Suggested-by: and update the commit message. - Make domain_use_host_layout() function instead of macros to avoid ciclular header dependecies. Look at more details in the commit message. --- xen/arch/arm/domain_build.c | 1 + xen/arch/arm/include/asm/domain.h | 14 -------------- xen/arch/arm/vgic-v3.c | 1 + xen/arch/riscv/include/asm/paging.h | 1 + xen/common/device-tree/domain-build.c | 1 + xen/include/xen/domain-layout.h | 28 +++++++++++++++++++++++++++ 6 files changed, 32 insertions(+), 14 deletions(-) create mode 100644 xen/include/xen/domain-layout.h diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index ad665cd3c045..1efddc60ef0a 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2,6 +2,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..46a5cdc0c800 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -18,20 +18,6 @@ struct hvm_domain uint64_t params[HVM_NR_PARAMS]; }; -/* - * Is the domain using the host memory layout? - * - * Direct-mapped domain will always have the RAM mapped with GFN == MFN. - * To avoid any trouble finding space, it is easier to force using the - * host memory layout. - * - * The hardware domain will use the host layout regardless of - * direct-mapped because some OS may rely on a specific address ranges - * for the devices. - */ -#define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ - is_hardware_domain(d)) - struct vtimer { struct vcpu *v; int irq; diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77aab5c3c293..77517c303061 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index c1d225d02b50..e487c89a4ccd 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -4,6 +4,7 @@ #include struct domain; +struct page_info; int paging_domain_init(struct domain *d); diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index c51520ebadf9..6949203dacdc 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/xen/include/xen/domain-layout.h b/xen/include/xen/domain-layout.h new file mode 100644 index 000000000000..cc5e56c9da47 --- /dev/null +++ b/xen/include/xen/domain-layout.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_DOMAIN_LAYOUT_H +#define XEN_DOMAIN_LAYOUT_H + +#include +#include + +/* + * Is a domain using the host memory layout? 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No functional changes. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu --- Changes in v5: - Rephraze commit subject. - Reviewed-by: Luca Fancellu . --- Changes in v4: - Nothing changed only rebase. --- Changes in v3: - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of changes clearer and keep using Arm-specific terminolgy inside Arm code. --- Changes in v2: - New patch. --- --- xen/arch/arm/include/asm/p2m.h | 2 ++ xen/common/device-tree/domain-build.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..7957dbd96e57 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -14,6 +14,8 @@ /* Holds the bit size of IPAs in p2m tables. */ extern unsigned int p2m_ipa_bits; +#define p2m_gpa_bits p2m_ipa_bits + #define MAX_VMID_8_BIT (1UL << 8) #define MAX_VMID_16_BIT (1UL << 16) diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 6949203dacdc..2a760b007b57 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -221,7 +221,7 @@ int __init find_unallocated_memory(const struct kernel_info *kinfo, } start = 0; - end = (1ULL << p2m_ipa_bits) - 1; + end = (1ULL << p2m_gpa_bits) - 1; res = rangeset_report_ranges(unalloc_mem, PFN_DOWN(start), PFN_DOWN(end), cb, free_regions); if ( res ) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302336.1576330 (Exim 4.92) (envelope-from ) id 1wKuZf-0003ft-K4; Thu, 07 May 2026 08:59:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302336.1576330; Thu, 07 May 2026 08:59:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZf-0003fe-H9; Thu, 07 May 2026 08:59:15 +0000 Received: by outflank-mailman (input) for mailman id 1302336; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZd-0003LL-Gs for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZc-002yCt-Sp for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:12 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545c-2eae-0a2a0a5409dd-0a2a4508d59a-10 for ; Thu, 07 May 2026 10:59:12 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5460-63b5-0a2a45080019-d155da2bcd56-3 for ; Thu, 07 May 2026 10:59:12 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bb962ce4dcfso87521966b.1 for ; Thu, 07 May 2026 01:59:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add a generic copy_guest() helper for copying to and from guest physical (and potentially virtual addresses in the future), and implement translate_get_page() to translate a guest physical address into a struct page_info via the domain p2m. Compared to the Arm code: - Drop COPY_flush_dcache(), as no such use cases exist on RISC-V. - Do not implement the linear mapping case, which is currently unused. - Use PAGE_OFFSET() to initialize the local offset variable in copy_guest(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Avoid using of min_t. (sync with Arm) - Add Acked-by: Jan Beulich . --- Changes in v3: - s/if (page == NULL)/if ( !page ). - Drop " - offset" for unmap_domain_page() inside copy_guest() function. unmap_domain_page() is expected to mask (or something similar) the page offset bits. - Change some types for functions as copy_to_guest_phys_cb function pointer prototype was changed too in the prev. commit. --- Changes in v2: - Use BIT() instead of open-coding. - Rename COPY_ipa to COPY_gpa. - Rename COPY_linear to COPY_gva. - Use BUG_ON(linear) instead if (lineer) + BUG_ON. - Rename arg liner to gva for translate_get_page(). - Update translate_get_page() to properly handling write argument. - Return unsigned int for copy_guest() and copy_to_guest_phys() as len function parameter is only 'unsigned int'. - Reformat function arguments for alignment --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/guestcopy.c | 116 ++++++++++++++++++++++ xen/arch/riscv/include/asm/guest_access.h | 7 ++ 3 files changed, 124 insertions(+) create mode 100644 xen/arch/riscv/guestcopy.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 04f02ad89cba..cfc3fdf7d208 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -4,6 +4,7 @@ obj-y += domain.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += extable.o +obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o diff --git a/xen/arch/riscv/guestcopy.c b/xen/arch/riscv/guestcopy.c new file mode 100644 index 000000000000..8a89212e0bea --- /dev/null +++ b/xen/arch/riscv/guestcopy.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#define COPY_from_guest 0U +#define COPY_to_guest BIT(0, U) +#define COPY_gpa 0U +#define COPY_gva BIT(1, U) + +typedef union +{ + struct + { + struct vcpu *v; + } gva; + + struct + { + struct domain *d; + } gpa; +} copy_info_t; + +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) + +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, + bool gva, bool write) +{ + p2m_type_t p2mt; + struct page_info *page; + + /* + * Not implemented yet. + * + * If gva == true, the operation will likely require a struct vcpu + * rather than just a struct domain. For this reason copy_info_t is + * already passed here instead of only struct domain. + */ + BUG_ON(gva); + + page = get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_ALLOC); + + if ( !page ) + return NULL; + + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) + { + put_page(page); + return NULL; + } + + return page; +} + +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long len, + copy_info_t info, unsigned int flags) +{ + unsigned int offset = PAGE_OFFSET(addr); + + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); + + while ( len ) + { + void *p; + unsigned long size = min(len, PAGE_SIZE + 0UL - offset); + struct page_info *page; + + page = translate_get_page(info, addr, flags & COPY_gva, + flags & COPY_to_guest); + if ( !page ) + return len; + + p = __map_domain_page(page); + p += offset; + if ( flags & COPY_to_guest ) + { + /* + * buf will be NULL when the caller request to zero the + * guest memory. + */ + if ( buf ) + memcpy(p, buf, size); + else + memset(p, 0, size); + } + else + memcpy(buf, p, size); + + unmap_domain_page(p); + put_page(page); + len -= size; + buf += size; + addr += size; + + /* + * After the first iteration, guest virtual address is correctly + * aligned to PAGE_SIZE. + */ + offset = 0; + } + + return 0; +} + +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len) +{ + return copy_guest(buf, gpa, len, GPA_INFO(d), + COPY_to_guest | COPY_gpa); +} diff --git a/xen/arch/riscv/include/asm/guest_access.h b/xen/arch/riscv/include/asm/guest_access.h index 7cd51fbbdead..8d679319ded0 100644 --- a/xen/arch/riscv/include/asm/guest_access.h +++ b/xen/arch/riscv/include/asm/guest_access.h @@ -2,6 +2,10 @@ #ifndef ASM__RISCV__GUEST_ACCESS_H #define ASM__RISCV__GUEST_ACCESS_H +#include + +struct domain; + unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len); unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len); unsigned long raw_clear_guest(void *to, unsigned int len); @@ -18,6 +22,9 @@ unsigned long raw_clear_guest(void *to, unsigned int len); #define guest_handle_okay(hnd, nr) (1) #define guest_handle_subrange_okay(hnd, first, last) (1) +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len); + #endif /* ASM__RISCV__GUEST_ACCESS_H */ /* * Local variables: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302338.1576340 (Exim 4.92) (envelope-from ) id 1wKuZi-00040a-8h; Thu, 07 May 2026 08:59:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302338.1576340; Thu, 07 May 2026 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZi-000401-1H; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 1302338; Thu, 07 May 2026 08:59:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZg-0003sK-OG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZg-005UsV-4q for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:16 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545f-e002-0a2a0a5209dd-0a2a4501ca64-28 for ; Thu, 07 May 2026 10:59:15 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5463-c1f2-0a2a45010019-d155da2fb86f-3 for ; Thu, 07 May 2026 10:59:15 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bc2a455fd55so84106666b.2 for ; Thu, 07 May 2026 01:59:15 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This is because the common kernel_load() in common/device-tree/kernel.c does not expect a return code. Handling errors gracefully would require a separate refactor. The implementation is based on the Xen Arm kernel loading code. text_offset is available for both 32-bit and 64-bit Image, so fix that. Signed-off-by: Oleksii Kurochko --- Changes in v5: - Introduce MODULES_ALIGNMENT and use it inside place_modules(). - Add if() to avoid underflow when modbase is calculated in the case when modules would overlap the kernel. - Drop unnessary dprintk()s. - "&& size > effective_size" in kernel_image64_probe(). - Use 'size_t' for image_size in struct kernel_info to fit both RV32 and RV64. --- Changes in v4: - Update the patch subject: add "... Linux kernel ...". - Make bi variable unsigned. And use while() instead of for(). - Update the condition which calculates overlapping of kernel with modules. - Reject a malformed image before the loop to avoid wrapping load_addr + image_size in the per-bankcheck below. - Use mathematical representation to print ranges. - Use #error instead of just returning unsupported. - Update the comment above stuct image in kernel_image64_probe(). --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/kernel.c | 249 ++++++++++++++++++++++++++++ xen/include/xen/fdt-kernel.h | 11 +- 4 files changed, 272 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/kernel.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index cfc3fdf7d208..eecdcbc76867 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -8,6 +8,7 @@ obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o +obj-y += kernel.init.o obj-y += mm.o obj-y += p2m.o obj-y += paging.o diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 0613de008b13..fd69057826e1 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -151,6 +151,19 @@ extern unsigned long phys_offset; /* = load_start - XEN_VIRT_START */ #endif +/* + * KERNEL_LOAD_ADDR_ALIGNMENT is defined based on paragraph of + * "Kernel location" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + */ +#if defined(CONFIG_RISCV_32) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(4) +#elif defined(CONFIG_RISCV_64) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(2) +#else +#error "Define KERNEL_LOAD_ADDR_ALIGNMENT" +#endif + #endif /* ASM__RISCV__CONFIG_H */ /* * Local variables: diff --git a/xen/arch/riscv/kernel.c b/xen/arch/riscv/kernel.c new file mode 100644 index 000000000000..8580cdb32d7a --- /dev/null +++ b/xen/arch/riscv/kernel.c @@ -0,0 +1,249 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ + +/* + * Machine word alignment could be useful for copying to be more efficient. + * There is no reason for now to have bigger module alignment. + */ +#define MODULES_ALIGNMENT sizeof(unsigned long) + +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, + paddr_t kernend) +{ + const struct boot_module *mod = info->bd.initrd; + const struct membanks *banks = kernel_info_get_mem_const(info); + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, + MODULES_ALIGNMENT); + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), + MODULES_ALIGNMENT); + const paddr_t modsize = initrd_len + dtb_len; + unsigned int bi = banks->nr_banks; + + if ( modsize < initrd_len ) + panic("Module size overflow: initrd + dtb size wraps paddr_t\n"); + + /* + * Place modules as high in RAM as possible, scanning banks from + * last to first so that the end of the last bank is preferred. + */ + while ( bi-- > 0 ) + { + const struct membank *bank = &banks->bank[bi]; + const paddr_t bank_end = bank->start + bank->size; + paddr_t modbase; + + if ( modsize > bank->size ) + continue; + + modbase = ROUNDDOWN(bank_end - modsize, MODULES_ALIGNMENT); + + if ( modbase < bank->start ) + continue; + + /* + * If modules would overlap the kernel, try placing them below it. + */ + if ( (modbase < ROUNDUP(kernend, MODULES_ALIGNMENT)) && + (modbase + modsize > kernbase) ) + { + /* Avoid underflow below */ + if ( kernbase < modsize ) + continue; + + modbase = ROUNDDOWN(kernbase - modsize, MODULES_ALIGNMENT); + if ( modbase < bank->start ) + continue; + } + + info->dtb_paddr = modbase; + info->initrd_paddr = modbase + dtb_len; + + return; + } + + panic("Unable to find suitable location for dtb+initrd\n"); +} + +static paddr_t __init kernel_image_place(struct kernel_info *info) +{ + paddr_t load_addr = INVALID_PADDR; + uint64_t image_size = info->image.image_size ?: info->image.len; + const struct membanks *banks = kernel_info_get_mem_const(info); + unsigned int nr_banks = banks->nr_banks; + unsigned int bi; + + /* + * At the moment, RISC-V's Linux kernel should be always position + * independent based on "Per-MMU execution" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution + * + * But just for the case when RISC-V's Linux kernel isn't position + * independent it is needed to take load address from + * info->image.start. + * + * If `start` is zero, the Image is position independent. + */ + if ( likely(!info->image.start) ) + { + for ( bi = 0; bi != nr_banks; bi++ ) + { + const struct membank *bank = &banks->bank[bi]; + paddr_t bank_start = bank->start; + /* + * According to boot.rst kernel load address should be properly + * aligned: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + * + * As Image in this case is PIC we can ignore + * info->image.text_offset. + */ + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); + paddr_t bank_end = bank_start + bank->size; + paddr_t bank_size; + + if ( aligned_start > bank_end ) + continue; + + bank_size = bank_end - aligned_start; + + if ( image_size <= bank_size ) + { + load_addr = aligned_start; + break; + } + } + } + else + { + load_addr = info->image.start + info->image.text_offset; + + WARN_ON(!IS_ALIGNED(load_addr, KERNEL_LOAD_ADDR_ALIGNMENT)); + + /* + * Reject a malformed image before the loop to avoid wrapping + * load_addr + image_size in the per-bank check below by setting + * bi = nr_banks. + * + * image_size covers the kernel from _start (placed at load_addr = + * start + text_offset) through _end. The alignment gap + * [start, load_addr) is padding and need not lie within a bank. + */ + bi = image_size <= (paddr_t)-1 - load_addr ? 0 : nr_banks; + for ( ; bi != nr_banks; bi++ ) + { + const struct membank *bank = &banks->bank[bi]; + paddr_t bank_start = bank->start; + paddr_t bank_end = bank_start + bank->size; + + if ( (load_addr >= bank_start) && + (load_addr + image_size <= bank_end) ) + break; + } + } + + if ( bi == nr_banks ) + panic("Failed to place kernel image in any memory bank\n"); + + info->entry = load_addr; + + return load_addr; +} + +static void __init kernel_image_load(struct kernel_info *info) +{ + int rc; + paddr_t load_addr = kernel_image_place(info); + paddr_t paddr = info->image.kernel_addr; + paddr_t len = info->image.len; + paddr_t effective_size = info->image.image_size ?: len; + void *kernel; + + place_modules(info, load_addr, load_addr + effective_size); + + printk("Loading Image from %"PRIpaddr" to [%"PRIpaddr",%"PRIpaddr")\n", + paddr, load_addr, load_addr + effective_size); + + kernel = ioremap_cache(paddr, len); + + if ( !kernel ) + panic("Unable to map kernel\n"); + + /* Move kernel to proper location in guest phys map */ + rc = copy_to_guest_phys(info->bd.d, load_addr, kernel, len); + + if ( rc ) + panic("Unable to copy kernel to proper guest location\n"); + + iounmap(kernel); +} + +/* Check if the image is a 64-bit Image */ +static int __init kernel_image64_probe(struct kernel_info *info, + paddr_t addr, paddr_t size) +{ + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ + struct { + uint32_t code0; /* Executable code */ + uint32_t code1; /* Executable code */ + uint64_t text_offset; /* Image load offset, little endian */ + uint64_t image_size; /* Effective Image size, little endian */ + uint64_t flags; /* kernel flags, little endian */ + uint32_t version; /* Version of this header */ + uint32_t res1; /* Reserved */ + uint64_t res2; /* Reserved */ + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ + uint32_t res3; /* Reserved for PE COFF offset */ + } image; + uint64_t effective_size; + + if ( size < sizeof(image) ) + return -EINVAL; + + copy_from_paddr(&image, addr, sizeof(image)); + + /* Magic v1 is deprecated and may be removed. Only use v2 */ + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) + return -EINVAL; + + effective_size = le64_to_cpu(image.image_size); + + if ( !effective_size ) + return -EINVAL; + + info->image.kernel_addr = addr; + /* Actual size in the binary file */ + info->image.len = size; + /* Total memory the kernel occupies at runtime */ + info->image.image_size = effective_size; + info->image.text_offset = le64_to_cpu(image.text_offset); + info->image.start = 0; + + info->load = kernel_image_load; + + return 0; +} + +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, + paddr_t size) +{ +#ifdef CONFIG_RISCV_64 + return kernel_image64_probe(info, addr, size); +#else +# error "Only 64-bit RISC-V is supported" +#endif +} diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 8cd1670c2c6f..00c37be101bf 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -59,8 +59,15 @@ struct kernel_info { struct { paddr_t kernel_addr; paddr_t len; -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) - paddr_t text_offset; /* 64-bit Image only */ +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) + /* + * ARM: 64-bit Image only. + * RISC-V: both 32-bit and 64-bit Images. + */ + paddr_t text_offset; +#endif +#if defined(CONFIG_RISCV) + size_t image_size; /* Effective size of Image */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ } image; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302339.1576346 (Exim 4.92) (envelope-from ) id 1wKuZi-00043V-U7; Thu, 07 May 2026 08:59:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302339.1576346; Thu, 07 May 2026 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZi-00042c-G5; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 1302339; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZh-0003up-04 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZg-005UsV-DG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:16 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545b-e002-0a2a0a5209dd-0a2a450a89e4-20 for ; Thu, 07 May 2026 10:59:16 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5464-56b3-0a2a450a0019-d155da29dc61-3 for ; Thu, 07 May 2026 10:59:16 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bc64ad08bf9so94019066b.0 for ; Thu, 07 May 2026 01:59:16 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Promote gstage_modes[] from a local __initconst variable inside gstage_mode_detect() to a file-scope static const array, and convert max_gstage_mode from an embedded struct (assigned by value) to a global const pointer into gstage_modes[]. This allows referencing both the mode identifier and the mode name after init without copying the descriptor. Remove get_max_supported_mode(); its callers now dereference max_gstage_mode->mode directly. Change struct p2m_domain::mode from an embedded gstage_mode_desc to a const pointer into gstage_modes[], so each domain shares the descriptor rather than carrying its own copy. Adjust the gstage_modes[] entries in three ways: - Use lowercase names without the "x4" suffix (e.g. "sv39" instead of "Sv39x4"). The DT mmu-type binding [1] does not include the suffix, so the name can now be passed directly to the guest without transformation. The suffix is appended only in the diagnostic printk, where it remains informative. - Use "none" for Bare mode (HGATP_MODE_OFF) to match the DT binding. - Change paging_levels to represent the root page-table level index (i.e. total paging levels minus one) rather than the total count. P2M_ROOT_LEVEL() now returns the correct VPN index directly, without requiring callers to subtract one or use hardcoded offsets. Add gstage_mode to xen_arch_domainconfig so the toolstack can request a specific G-stage mode at domain creation time. Introduce find_gstage_mode() to resolve a mode descriptor by HGATP_MODE_*, capping the result at max_gstage_mode to prevent requesting a mode the hardware does not support. Update p2m_init() to accept a xen_domctl_createdomain pointer and call find_gstage_mode() instead of hardcoding Sv39x4. Add arch_parse_dom0less_node() in a new dom0less-build.c to read the "mmu-type" DT property from a guest domain node and store it in boot_domain::create_cfg.arch.gstage_mode, falling back to maximum supported mode when the property is absent. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/riscv/cpus.yaml?h=v6.19-rc3#n82 Signed-off-by: Oleksii Kurochko --- Changes in v5: - update the comment inside arch_parse_dom0less_node() before return 0; - Code style fixes. - Compare pointers instead of fields in p2m_init() as they should point to the same. - s/find_gstage_mode_by_bits/find_gstage_mode. --- --- Changes in v4: - Stray blank after * in declaration of find_gstage_mode(). - Refactor find_gstage_mode(). Now it is find_gstage_mode_by_bits(). - Add __ro_after_init for static local variable m in p2m_init. - s/ char gstage_mode[8];/unsigned char gstage_mode; in struct vcpu_guest_context. - s/modes/gstage_modes in p2m.c. - Introduce P2M_EXTRA_BITS_AT_LEVEL and re-use P2M_ROOT_EXTRA_BITS to encode magic constant 2. --- Changes in v3: - New patch. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/dom0less-build.c | 71 ++++++++++++++++++ xen/arch/riscv/include/asm/p2m.h | 18 +++-- xen/arch/riscv/p2m.c | 121 +++++++++++++++++++++---------- xen/arch/riscv/vmid.c | 2 +- xen/include/public/arch-riscv.h | 5 ++ 6 files changed, 172 insertions(+), 46 deletions(-) create mode 100644 xen/arch/riscv/dom0less-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index eecdcbc76867..8f7fd625dddd 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o +obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += extable.o diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c new file mode 100644 index 000000000000..a683972e9235 --- /dev/null +++ b/xen/arch/riscv/dom0less-build.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include + +int __init arch_parse_dom0less_node(struct dt_device_node *node, + struct boot_domain *bd) +{ + const char *mmu_type; + unsigned long bits; + const char *end; + + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) + { + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " + "node. %s will be used as fallback\n", max_gstage_mode->name); + + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); + + goto out; + } + + if ( !strcasecmp(mmu_type, "riscv,none") ) + { + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); + + return -EOPNOTSUPP; + } + + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); + + return -EINVAL; + } + + bits = simple_strtoul(mmu_type + 8, &end, 10); + if ( (*end != '\0') || (end == mmu_type + 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); + + return -EINVAL; + } + + out: + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) + { + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); + + return -EINVAL; + } + + /* + * The mmu-type property may specify any riscv,sv string, but only the + * following are currently supported: + * - riscv,sv32 + * - riscv,sv39 + * - riscv,sv48 + * - riscv,sv57 + * Any other value will be rejected by find_gstage_mode(). + * + * P2M_ROOT_EXTRA_BITS is added because for G-stage mode, GPAs are + * extended by that many bits. + */ + bd->create_cfg.arch.gaddr_bits = bits + P2M_ROOT_EXTRA_BITS; + + return 0; +} diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 54ea67990f06..638c60ddc2f7 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -13,7 +13,7 @@ #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) -#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels) +#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode->paging_levels) /* * According to the RISC-V spec: @@ -32,10 +32,13 @@ */ #define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) -#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) == P2M_ROOT_LEVEL(p2m))) +#define P2M_ROOT_EXTRA_BITS 2 + +#define P2M_LEVEL_EXTRA_BITS(p2m, lvl) \ + (P2M_ROOT_EXTRA_BITS * ((lvl) == P2M_ROOT_LEVEL(p2m))) #define P2M_PAGETABLE_ENTRIES(p2m, lvl) \ - (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL)) + (BIT(PAGETABLE_ORDER + P2M_LEVEL_EXTRA_BITS(p2m, lvl), UL)) #define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL) @@ -55,6 +58,8 @@ struct gstage_mode_desc { char name[8]; }; +extern const struct gstage_mode_desc *max_gstage_mode; + /* Per-p2m-table state */ struct p2m_domain { /* @@ -68,7 +73,7 @@ struct p2m_domain { /* The root of the p2m tree. May be concatenated */ struct page_info *root; - struct gstage_mode_desc mode; + const struct gstage_mode_desc *mode; /* Back pointer to domain */ struct domain *domain; @@ -215,9 +220,10 @@ static inline bool arch_acquire_resource_check(struct domain *d) } void guest_mm_init(void); -unsigned char get_max_supported_mode(void); -int p2m_init(struct domain *d); +struct xen_domctl_createdomain; + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config); static inline void p2m_write_lock(struct p2m_domain *p2m) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index adcf292a7092..f889978cf754 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -45,12 +45,28 @@ struct p2m_pte_ctx { unsigned int level; /* Paging level at which the PTE resides. */ }; -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { - .mode = HGATP_MODE_OFF, - .paging_levels = 0, - .name = "Bare", +/* Values should be sorted by ->mode in this array */ +static const struct gstage_mode_desc gstage_modes[] = { + /* + * Based on the RISC-V spec: + * Bare mode is always supported, regardless of SXLEN. + * When SXLEN=32, the only other valid setting for MODE is Sv32. + * When SXLEN=64, three paged virtual-memory schemes are defined: + * Sv39, Sv48, and Sv57. + */ + { HGATP_MODE_OFF, 0, "none" }, +#ifdef CONFIG_RISCV_32 + { HGATP_MODE_SV32X4, 1, "sv32" }, +#else + { HGATP_MODE_SV39X4, 2, "sv39" }, + { HGATP_MODE_SV48X4, 3, "sv48" }, + { HGATP_MODE_SV57X4, 4, "sv57" }, +#endif }; +const struct gstage_mode_desc *__ro_after_init max_gstage_mode = + &gstage_modes[0]; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -63,11 +79,6 @@ static inline void p2m_free_metadata_page(struct p2m_domain *p2m, } } -unsigned char get_max_supported_mode(void) -{ - return max_gstage_mode.mode; -} - /* * If anything is changed here, it may also require updates to * p2m_{get,set}_type(). @@ -148,41 +159,24 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) static void __init gstage_mode_detect(void) { - static const struct gstage_mode_desc modes[] __initconst = { - /* - * Based on the RISC-V spec: - * Bare mode is always supported, regardless of SXLEN. - * When SXLEN=32, the only other valid setting for MODE is Sv32. - * When SXLEN=64, three paged virtual-memory schemes are defined: - * Sv39, Sv48, and Sv57. - */ -#ifdef CONFIG_RISCV_32 - { HGATP_MODE_SV32X4, 2, "Sv32x4" } -#else - { HGATP_MODE_SV39X4, 3, "Sv39x4" }, - { HGATP_MODE_SV48X4, 4, "Sv48x4" }, - { HGATP_MODE_SV57X4, 5, "Sv57x4" }, -#endif - }; - - for ( unsigned int mode_idx = ARRAY_SIZE(modes); mode_idx-- > 0; ) + for ( unsigned int mode_idx = ARRAY_SIZE(gstage_modes); mode_idx-- > 0; ) { - unsigned long mode = modes[mode_idx].mode; + unsigned long mode = gstage_modes[mode_idx].mode; csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) { - max_gstage_mode = modes[mode_idx]; + max_gstage_mode = &gstage_modes[mode_idx]; break; } } - if ( max_gstage_mode.mode == HGATP_MODE_OFF ) + if ( max_gstage_mode->mode == HGATP_MODE_OFF ) panic("Xen expects that G-stage won't be Bare mode\n"); - printk("Max supported G-stage mode is %s\n", max_gstage_mode.name); + printk("Max supported G-stage mode is %sx4\n", max_gstage_mode->name); csr_write(CSR_HGATP, 0); @@ -283,7 +277,7 @@ static void clear_and_clean_page(struct page_info *page, bool clean_dcache) unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid) { return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) | - MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) | + MASK_INSR(p2m->mode->mode, HGATP_MODE_MASK) | MASK_INSR(vmid, HGATP_VMID_MASK); } @@ -331,8 +325,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) return 0; } -int p2m_init(struct domain *d) +static const struct gstage_mode_desc *find_gstage_mode( + unsigned char gpa_bits) +{ + ASSERT(gstage_modes[0].mode == HGATP_MODE_OFF); + + for ( unsigned int i = 1; i < ARRAY_SIZE(gstage_modes); i++ ) + { + unsigned int lvl = gstage_modes[i].paging_levels + 1; + unsigned int bits = P2M_GFN_LEVEL_SHIFT(lvl) + P2M_ROOT_EXTRA_BITS; + + if ( gpa_bits == bits ) + { + if ( gstage_modes[i].mode > max_gstage_mode->mode ) + return NULL; + return &gstage_modes[i]; + } + } + + return NULL; +} + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) { + /* + * TODO: This static is a temporary constraint: all guests must use the + * same MMU mode because p2m_gpa_bits is not yet per-domain. + * Drop this once per-domain p2m_gpa_bits is introduced. + */ + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; struct p2m_domain *p2m = p2m_get_hostp2m(d); /* @@ -341,6 +362,33 @@ int p2m_init(struct domain *d) */ p2m->domain = d; + if ( !config ) + { + dprintk(XENLOG_ERR, "NULL config is passed\n"); + return -EINVAL; + } + + p2m->mode = find_gstage_mode(config->arch.gaddr_bits); + + if ( !p2m->mode ) + { + dprintk(XENLOG_ERR, + "Unsupported or unavailable gstage addr bits: %u\n", + config->arch.gaddr_bits); + + return -EINVAL; + } + + if ( m->mode == HGATP_MODE_OFF ) + m = p2m->mode; + + if ( m != p2m->mode ) + { + dprintk(XENLOG_ERR, + "Mode should be the same for all guests at the moment\n"); + return -EINVAL; + } + paging_domain_init(d); rwlock_init(&p2m->lock); @@ -362,11 +410,6 @@ int p2m_init(struct domain *d) # error "Add init of p2m->clean_dcache" #endif - /* TODO: don't hardcode used for a domain g-stage mode. */ - p2m->mode.mode = HGATP_MODE_SV39X4; - p2m->mode.paging_levels = 2; - safe_strcpy(p2m->mode.name, "Sv39x4"); - return 0; } @@ -1304,7 +1347,7 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn, { unsigned int level = P2M_ROOT_LEVEL(p2m); unsigned int gfn_limit_bits = - P2M_LEVEL_ORDER(level + 1) + P2M_ROOT_EXTRA_BITS(p2m, level); + P2M_LEVEL_ORDER(level + 1) + P2M_LEVEL_EXTRA_BITS(p2m, level); pte_t entry, *table; int rc; mfn_t mfn = INVALID_MFN; diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c index 8fbcd500f24d..11c7e9d6d6c8 100644 --- a/xen/arch/riscv/vmid.c +++ b/xen/arch/riscv/vmid.c @@ -52,7 +52,7 @@ static DEFINE_PER_CPU(struct vmid_data, vmid_data); static unsigned int vmidlen_detect(void) { unsigned int vmid_bits; - unsigned char gstage_mode = get_max_supported_mode(); + unsigned char gstage_mode = max_gstage_mode->mode; /* * According to the RISC-V Privileged Architecture Spec: diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 360d8e6871ba..1990a1eb748c 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); struct xen_arch_domainconfig { + /* + * G-stage GPA address width in bits. + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). + */ + uint8_t gaddr_bits; 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The variable is initialised to PADDR_BITS and narrowed in p2m_init() to the GPA width of the selected G-stage mode, allowing an external entity (e.g. an IOMMU) to restrict it further if needed. p2m_gpa_bits is a global rather than a per-domain value, which is acceptable for now because all domains are required to use the same G-stage MMU mode, as dom0less common code allocates it per all domains. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Update initialization of p2m_gpa_bits and the comment above. - Rework how p2m_gpa_bits is limited. - Update the commit message. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/p2m.h | 3 +++ xen/arch/riscv/p2m.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 638c60ddc2f7..0d1dace1a0d8 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -47,6 +47,9 @@ #define P2M_LEVEL_MASK(p2m, lvl) \ (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) +/* Holds the bit size of GPAs in p2m tables */ +extern unsigned int p2m_gpa_bits; + #define paddr_bits PADDR_BITS /* Get host p2m table */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index f889978cf754..703b9f4d2540 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -11,6 +11,8 @@ #include #include +#include + #include #include #include @@ -67,6 +69,12 @@ static const struct gstage_mode_desc gstage_modes[] = { const struct gstage_mode_desc *__ro_after_init max_gstage_mode = &gstage_modes[0]; +/* + * Set to the maximum configured support for GPA bits, so the number of GPA + * bits can be restricted by an external entity (e.g. IOMMU). + */ +unsigned int __ro_after_init p2m_gpa_bits = PADDR_BITS; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -355,6 +363,7 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) */ static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; struct p2m_domain *p2m = p2m_get_hostp2m(d); + unsigned int gpa_bits; /* * "Trivial" initialisation is now complete. Set the backpointer so the @@ -410,6 +419,12 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) # error "Add init of p2m->clean_dcache" #endif + gpa_bits = P2M_GFN_LEVEL_SHIFT(p2m->mode->paging_levels + 1) + + P2M_ROOT_EXTRA_BITS; + + if ( gpa_bits < p2m_gpa_bits ) + p2m_gpa_bits = gpa_bits; + return 0; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302344.1576367 (Exim 4.92) (envelope-from ) id 1wKuZl-0004qn-V0; Thu, 07 May 2026 08:59:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302344.1576367; Thu, 07 May 2026 08:59:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZl-0004q1-Ka; Thu, 07 May 2026 08:59:21 +0000 Received: by outflank-mailman (input) for mailman id 1302344; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZj-0004BH-EO for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZi-005UsV-RG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:18 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545f-e002-0a2a0a5209dd-0a2a4501ca64-46 for ; Thu, 07 May 2026 10:59:18 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5466-c1f2-0a2a45010019-d155d02ecdcd-3 for ; Thu, 07 May 2026 10:59:18 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67c1e0229acso818406a12.1 for ; Thu, 07 May 2026 01:59:18 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The reason for 2 banks is that there is typically always a use case for low memory under 4 GB, but the bank under 4 GB ends up being small because there are other things under 4 GB it can conflict with (interrupt controller, PCI BARs, etc.). So a second bank is added above that MMIO region (starting at 8 GiB) to provide the remaining RAM; the gap between the two banks also exercises code paths handling discontiguous memory. For Sv32 guests (34-bit GPA, 16 GiB addressable), bank0 provides 2 GB (2–4 GB) and the first 8 GB of bank1 (8–16 GB) is accessible. Extended regions are useful for RISC-V: they could be used to provide a "space" for Linux to map grant mappings. Despite the fact that for every guest MMU mode the GPA could be up to 56 bits wide (except Sv32 whose GPA is 34 bits), the combined size of both banks is limited to 1018 GB as it is more than enough for most use cases. Add inclusion of asm/guest-layout.h to asm/domain.h to make dom0less common code build happy. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Move GUEST_RAM*-related defines to asm/p2m.h instead of public header. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/guest-layout.h | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 xen/arch/riscv/include/asm/guest-layout.h diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6c48bf13111d..6044ce0feee0 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include +#include #include #include diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h new file mode 100644 index 000000000000..68d95a09394c --- /dev/null +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -0,0 +1,23 @@ +#ifndef ASM_RISCV_GUEST_LAYOUT_H +#define ASM_RISCV_GUEST_LAYOUT_H + +#include + +#define GUEST_RAM_BANKS 2 + +/* + * The way to find the extended regions (to be exposed to the guest as unused + * address space) relies on the fact that the regions reserved for the RAM + * below are big enough to also accommodate such regions. + */ +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) + +#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016 GB of RAM @ 8GB */ +#define GUEST_RAM1_SIZE xen_mk_ullong(0xFE00000000) + +/* TODO: allocate these all dynamically */ +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } + +#endif /* ASM_RISCV_GUEST_LAYOUT_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302347.1576373 (Exim 4.92) (envelope-from ) id 1wKuZm-0004w9-MA; Thu, 07 May 2026 08:59:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302347.1576373; Thu, 07 May 2026 08:59:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZm-0004tg-3Y; Thu, 07 May 2026 08:59:22 +0000 Received: by outflank-mailman (input) for mailman id 1302347; Thu, 07 May 2026 08:59:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZk-0004Yz-NS for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZk-00CM51-3n for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:20 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545c-5cb7-0a2a0a5109dd-0a2a4507c4c0-32 for ; Thu, 07 May 2026 10:59:20 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5467-229c-0a2a45070019-d155da2bac29-3 for ; Thu, 07 May 2026 10:59:20 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bc264a50e7fso115628866b.0 for ; Thu, 07 May 2026 01:59:19 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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So enable it. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - Add Acked-by: Jan Beulich . --- Changes in v2: - Move introduction of p2m_ipa_bits to separate patch. - Move to separate patch introduction of guest banks constansts. --- --- xen/arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index a5e87c1757f7..41426c205292 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME select GENERIC_UART_INIT -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302296.1576385 (Exim 4.92) (envelope-from ) id 1wKua3-0007JD-PR; Thu, 07 May 2026 08:59:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302296.1576385; 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Given that 6.18 is LTS, suggesting `Cc: stable@vger.kernel.org` to get it backported. Thanks, Jiaqing On 2026-05-06 13:55, Penny Zheng wrote: > While booting a recent linux-next kernel as a Xen PVH dom0 on x86, the kernel > oopses very early during fs_initcall: > > Oops: divide error: 0000 [#1] SMP NOPTI > RIP: 0010:amd_smn_init+0x188/0x2e0 > > Followed: on a kernel that survives the divide, it will fail by a NULL pointer > dereference from the first SMN consumer (amd_pmc_probe -> amd_smn_read). > > Root cause > ========== > > To prevent each dom0 vCPU from looking like an SMT sibling of another > vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every > vCPU's APIC ID by 2 can push the synthesized IDs past the package-field > boundary. Linux then infers more "packages" and therefore more AMD > nodes via amd_num_nodes() than the platform actually has, while the > PCI-side host-bridge scan correctly reports the number of root complex. > > The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of > linux-next/master (next-20260505). > > Penny Zheng (2): > x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 > x86/amd_node: reject SMN access when amd_smn_init() did not complete > > arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- > 1 file changed, 20 insertions(+), 3 deletions(-) > From xen-devel-bounces@lists.xenproject.org Thu May 07 09:30:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:30:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302465.1576394 (Exim 4.92) (envelope-from ) id 1wKv3z-0006Mw-4G; Thu, 07 May 2026 09:30:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302465.1576394; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3mP58v/x9/4otTsX7GEm8aO6Qaubcs5BG9GagnzkvROPmu0cOfTgpTmjtQkAMwlraIHJArUdtmz7VNGAqklq3YF8o+hpyScUTPvjKw2Q/wfejzGVjjPEP64XcRipezQ6SGbUtQseB/RBeoZTl3F0r1h4HHy3yDhV8FqmufOor2ITm0h6ocSk+AD8Q+Q4wCTcb605wijhqHatI6Qa8mu4yfFSJrbIdD+0rym0pb8qSPDWk9rLRRUCwYanNy5ZgVGi1QNUygUrlmGavB1RqI1fKDrFmxqzvKWxe/Ii8VflIUBbGwMcyHZJGXx322tK/CkxSYT2o0gYviG2vdVSAz2yv7ccM6DEOGqRQVVgJiY66IeoOFx9EdYsUujDd2QrVedc7az/Xq52sHDHdzsPeWaBAq87PCUpOrw9fwBK3n0j9Mat9c+0zGJCEx+k0otIROA4 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 09:30:27.7630 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e288167-6570-4db3-fe81-08deac1b4669 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9F.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB6371 X-purgate-ID: tlsNG-c1860d/1778146231-C5784DB1-EBDD28A6/10/73395122804 X-purgate-type: spam X-purgate-size: 1972 Hi Oleksii, > On 7 May 2026, at 09:58, Oleksii Kurochko wr= ote: >=20 > domain_use_host_layout() is not architecture-specific and may be needed > on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common > static inline in a new dedicated header, xen/domain-layout.h. >=20 > xen/domain.h would be the natural home, but placing it there would > require including xen/paging.h (for paging_mode_translate()) and > xen/sched.h (for is_hardware_domain()), which would introduce circular > dependencies. A separate header that callers opt into avoids this. >=20 > Adjust the implementation to take paging_mode_translate() into account > so it works correctly for all architectures, including x86. Some extra > details about implementation [2] and [3]. >=20 > To avoid the following compilation issue: >=20 > In file included from ./include/xen/paging.h:4, > from ./include/xen/domain-layout.h:6, > from common/device-tree/domain-build.c:4: > ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' > declared inside parameter list will not be visible outside of this > definition or declaration [-Werror] > 17 | void paging_free_page(struct domain *d, struct page_info *pg); >=20 > add the forward declaration of struct page_info to RISC-V's asm/paging.h. >=20 > [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.3= 59097@ubuntu-linux-20-04-desktop/ > [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3= 148344@ubuntu-linux-20-04-desktop/ > [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3= 148344@ubuntu-linux-20-04-desktop/ >=20 > Suggested-by: Stefano Stabellini > Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 07 09:31:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:31:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302469.1576404 (Exim 4.92) (envelope-from ) id 1wKv4O-0006iD-Eh; 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Using "zimage" in the > name is therefore misleading in architecture-independent code. >=20 > Rename kernel_zimage_probe() to kernel_image_probe() and update the > associated structure field from "zimage" to "image" to reflect that the > code handles generic kernel images rather than the zImage format > specifically. >=20 > No functional change intended. >=20 > Reported-by: Jan Beulich > Signed-off-by: Oleksii Kurochko > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 07 09:32:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:32:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302484.1576411 (Exim 4.92) (envelope-from ) id 1wKv5W-0007K2-LC; Thu, 07 May 2026 09:32:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302484.1576411; Thu, 07 May 2026 09:32:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKv5W-0007Jv-ID; Thu, 07 May 2026 09:32:10 +0000 Received: by outflank-mailman (input) for mailman id 1302484; Thu, 07 May 2026 09:32:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKv5V-0007Jp-SN for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:32:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKv5V-00Bwl5-8v for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:32:09 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5c13-5cb7-0a2a0a5109dd-0a2a450ca10a-48 for ; Thu, 07 May 2026 11:32:09 +0200 Received: from [209.85.208.53] (helo=mail-ed1-f53.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5c19-62f1-0a2a450c0019-d155d035f12d-3 for ; Thu, 07 May 2026 11:32:09 +0200 Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-67c4aaf76ecso916894a12.3 for ; Thu, 07 May 2026 02:32:09 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The loop index should be used instead. Otherwise, the alignment check may be performed on the wrong MMIO address. Fix the index used in the alignment check and corresponding printk. Fixes: c9bd8b322ecbb ("xen/riscv: imsic_init() implementation") Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/imsic.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..f7b70a8da09e 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -451,11 +451,11 @@ int __init imsic_init(const struct dt_device_node *node) continue; } - if ( !IS_ALIGNED(mmios[cpu].base_addr + reloff, - IMSIC_MMIO_PAGE_SZ) ) + if ( !IS_ALIGNED(mmios[index].base_addr + reloff, IMSIC_MMIO_PAGE_SZ) ) { printk(XENLOG_WARNING "%s: MMIO address %#lx is not aligned on a page\n", - node->name, msi[cpu].base_addr + reloff); + node->name, mmios[index].base_addr + reloff); + continue; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:09:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:09:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302513.1576421 (Exim 4.92) (envelope-from ) id 1wKvfH-00043v-Dt; Thu, 07 May 2026 10:09:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302513.1576421; Thu, 07 May 2026 10:09:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKvfH-00043o-AU; Thu, 07 May 2026 10:09:07 +0000 Received: by outflank-mailman (input) for mailman id 1302513; Thu, 07 May 2026 10:09:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKvfF-00043d-UI for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:09:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKvfF-005jZ7-BD for xen-devel@lists.xenproject.org; Thu, 07 May 2026 12:09:05 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc64b6-e002-0a2a0a5209dd-0a2a450ab3e6-16 for ; Thu, 07 May 2026 12:09:05 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc64bd-56b3-0a2a450a0019-d1558030bcdd-3 for ; Thu, 07 May 2026 12:09:02 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso6518515e9.0 for ; Thu, 07 May 2026 03:09:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778148542-7397E8B7-A98FF364/10/73395122804 X-purgate-type: spam X-purgate-size: 521 On 07.05.2026 11:31, Oleksii Kurochko wrote: > The MMIO alignment check in imsic_init() incorrectly uses cpu as > the index into mmios[]. The loop index should be used instead. > Otherwise, the alignment check may be performed on the wrong MMIO > address. > > Fix the index used in the alignment check and corresponding printk. > > Fixes: c9bd8b322ecbb ("xen/riscv: imsic_init() implementation") > Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu May 07 10:21:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:21:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302532.1576430 (Exim 4.92) (envelope-from ) id 1wKvrR-0006rv-EW; Thu, 07 May 2026 10:21:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302532.1576430; Thu, 07 May 2026 10:21:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKvrR-0006ro-B8; Thu, 07 May 2026 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X-MS-Exchange-CrossTenant-Network-Message-Id: 6df7f1d4-c4ed-4024-f965-08deac226a26 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 10:21:34.5588 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /v23ACBqk4eAYg/p9uOHfHVwXfuYmXUugi8CtLx66JGiBXTv0WVz4JCqHlJs9jOg9NKGzLIc5F0C6BHaspIIhg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR03MB6146 X-purgate-ID: tlsNG-720697/1778149299-82175161-8D3A2ADC/0/0 X-purgate-type: clean X-purgate-size: 4403 On Thu, May 07, 2026 at 10:51:18AM +0200, Jan Beulich wrote: > On 07.05.2026 10:46, Roger Pau Monné wrote: > > On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: > >> On 06.05.2026 18:51, Roger Pau Monne wrote: > >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to > >>> say the least. We don't know what registers might be there, nor which > >>> values might be safe for those registers. On a forthcoming platform doing > >>> the zeroing of the MMIO region does put the IOMMU in a broken state, which > >>> is not recoverable by the IOMMU initialization procedure in Xen. > >>> > >>> Instead just zero the control register, which mimics the current behavior > >>> with regards to how the control register is handled, and ensures the IOMU > >>> setup is done with the unit disabled. This approach will need revisiting > >>> in order to support Preboot DMA Protection. > >>> > >>> Fold map_iommu_mmio_region() into its only caller, as the function body is > >>> just an ioremap() call after the removal of the memset(). > >>> > >>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > >>> Signed-off-by: Roger Pau Monné > >> > >> While you got Andrew's R-b, I don't view that as enough to commit it. My > >> prior concern towards ... > >> > >>> --- a/xen/drivers/passthrough/amd/iommu_init.c > >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c > >>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > >>> return iommu->ht_flags & mask; > >>> } > >>> > >>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > >>> -{ > >>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > >>> - IOMMU_MMIO_REGION_LENGTH); > >>> - if ( !iommu->mmio_base ) > >>> - return -ENOMEM; > >>> - > >>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > >>> - > >>> - return 0; > >>> -} > >> > >> ... this part of the change wasn't addressed, neither verbally nor by an > >> adjustment to the description of what was committed. As previously stated, > >> blindly memset()-ing the entire area may not be the best of all options, > >> but the downsides of not doing this need to somehow be addressed. As > >> indicated, once they run out of bits in the main control register, they > >> likely will add a 2nd one. That'll then also need clearing, yet we have > >> no code to do so anymore. > > > > I could introduce an opt-in command line option that forces the > > zeroing of the MMIO region (to have the option to resort to the > > previous behavior), > > But we don't want to fully go back to this. We'd need a form that zeroes > what may be zeroed, without causing the issue you're trying to address. But how do we know what needs to be zeroed? We are then in the same position where the introduction of a new control register would cause the zeroing to no longer be accurate. > > but I was (wrongly) under the impression that we > > have agreement the proposed approach was the least bad of the ones > > available, sorry. > > > > Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > > neither does it seems to zero the Global Command Register either, > > which I'm not saying it's correct, but is at least a (possibly wrong) > > precedent. I don't think there's much we can do with the handling of > > enabled bits in possibly registers not know/handled by Xen. Like on > > VT-d, we possibly need to rely on the firmware to handle the IOMMU in > > a half-sane configuration, with no enabled features on registers Xen > > doesn't know about. > > As indicated before, for firmware we can likely rely on that. Pre-boot > non-firmware environments and especially Xen being kexec-ed (or being > run past something which was kexec-ed) may be of more concern. Do we really support booting from such environments? We would need much more careful handling of enabled features IMO, as blindly zeroing the whole MMIO register area is likely to not make the IOMMU happy if it was in an enabled state. Note for example how Xen was zeroing the command and log buffer pointers ahead of disabling the features in the control register, just because those register are ahead of the control register in the MMIO space. Thanks, Roger. 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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I confirmed this by writing an XTF test that checks interrupt and event delivery behaviour with various combinations of IF and GIF set. The second patch fixes L1 hitting an assertion error in Xen. I confirmed the fix by writing an XTF test that calls VMRUN on a VMCB without the VMRUN intercept set. Thanks, Ross Ross Lagerwall (2): x86/svm: Don't toggle local event delivery on stgi/clgi nestedsvm: Clear GIF when injecting VMEXIT xen/arch/x86/hvm/svm/nestedsvm.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:55:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:55:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302573.1576457 (Exim 4.92) (envelope-from ) id 1wKwO7-0003jw-EX; Thu, 07 May 2026 10:55:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302573.1576457; Thu, 07 May 2026 10:55:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwO7-0003jp-At; Thu, 07 May 2026 10:55:27 +0000 Received: by outflank-mailman (input) for mailman id 1302573; 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This ensures the behaviour is consistent regardless of whether vGIF is used. Fold the functions into the callers since they are now only a single assignment. Signed-off-by: Ross Lagerwall --- New in v2. xen/arch/x86/hvm/svm/nestedsvm.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index ef6fa5d23b67..64fbfe8fa71f 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -19,22 +19,6 @@ #define NSVM_ERROR_VVMCB 1 #define NSVM_ERROR_VMENTRY 2 -static void -nestedsvm_vcpu_clgi(struct vcpu *v) -{ - /* clear gif flag */ - vcpu_nestedsvm(v).ns_gif = 0; - local_event_delivery_disable(); /* mask events for PV drivers */ -} - -static void -nestedsvm_vcpu_stgi(struct vcpu *v) -{ - /* enable gif flag */ - vcpu_nestedsvm(v).ns_gif = 1; - local_event_delivery_enable(); /* unmask events for PV drivers */ -} - int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) { struct nestedvcpu *nv = &vcpu_nestedhvm(v); @@ -161,7 +145,7 @@ int cf_check nsvm_vcpu_reset(struct vcpu *v) svm->ns_iomap = NULL; - nestedsvm_vcpu_stgi(v); + svm->ns_gif = 1; return 0; } @@ -667,7 +651,7 @@ nsvm_vcpu_vmentry(struct vcpu *v, struct cpu_user_regs *regs, return ret; } - nestedsvm_vcpu_stgi(v); + svm->ns_gif = 1; return 0; } @@ -1214,7 +1198,7 @@ nestedsvm_vmexit_defer(struct vcpu *v, if ( vmcb->_vintr.fields.vgif_enable ) vmcb->_vintr.fields.vgif = 0; else - nestedsvm_vcpu_clgi(v); + svm->ns_gif = 0; svm->ns_vmexit.exitcode = exitcode; svm->ns_vmexit.exitinfo1 = exitinfo1; @@ -1502,7 +1486,7 @@ void svm_vmexit_do_stgi(struct cpu_user_regs *regs, struct vcpu *v) if ( (inst_len = svm_get_insn_len(v, INSTR_STGI)) == 0 ) return; - nestedsvm_vcpu_stgi(v); + vcpu_nestedsvm(v).ns_gif = 1; __update_guest_eip(regs, inst_len); } @@ -1523,7 +1507,7 @@ void svm_vmexit_do_clgi(struct cpu_user_regs *regs, struct vcpu *v) if ( (inst_len = svm_get_insn_len(v, INSTR_CLGI)) == 0 ) return; - nestedsvm_vcpu_clgi(v); + vcpu_nestedsvm(v).ns_gif = 0; /* After a CLGI no interrupts should come */ intr = vmcb_get_vintr(vmcb); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:55:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:55:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302575.1576465 (Exim 4.92) (envelope-from ) id 1wKwOE-00041Z-Ll; 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Instead, clear the GIF when injecting a VMEXIT to match what hardware does. Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") Signed-off-by: Ross Lagerwall --- In v2: Adjusted for the preceding cleanup patch. xen/arch/x86/hvm/svm/nestedsvm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 64fbfe8fa71f..9899cb2147b1 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -717,9 +717,9 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; if ( vmcb->_vintr.fields.vgif_enable ) - ASSERT(vmcb->_vintr.fields.vgif == 0); + vmcb->_vintr.fields.vgif = 0; else - ASSERT(svm->ns_gif == 0); + svm->ns_gif = 0; ns_vmcb = nv->nv_vvmcx; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 11:20:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:20:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302608.1576474 (Exim 4.92) (envelope-from ) id 1wKwmM-0000d3-MA; Thu, 07 May 2026 11:20:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302608.1576474; Thu, 07 May 2026 11:20:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwmM-0000cw-JU; Thu, 07 May 2026 11:20:30 +0000 Received: by outflank-mailman (input) for mailman id 1302608; Thu, 07 May 2026 11:20:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwmK-0000cq-Hc for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:20:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKwmJ-00CJLn-U8 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 13:20:27 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc7578-bab6-0a2a0a5309dd-0a2a4509ae02-12 for ; Thu, 07 May 2026 13:20:27 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc757b-2497-0a2a45090019-d155802ebccf-3 for ; Thu, 07 May 2026 13:20:27 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso7246265e9.0 for ; Thu, 07 May 2026 04:20:27 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778152827-41969A53-C27FD102/0/0 X-purgate-type: clean X-purgate-size: 4901 On 07.05.2026 12:21, Roger Pau Monné wrote: > On Thu, May 07, 2026 at 10:51:18AM +0200, Jan Beulich wrote: >> On 07.05.2026 10:46, Roger Pau Monné wrote: >>> On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: >>>> On 06.05.2026 18:51, Roger Pau Monne wrote: >>>>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>>>> say the least. We don't know what registers might be there, nor which >>>>> values might be safe for those registers. On a forthcoming platform doing >>>>> the zeroing of the MMIO region does put the IOMMU in a broken state, which >>>>> is not recoverable by the IOMMU initialization procedure in Xen. >>>>> >>>>> Instead just zero the control register, which mimics the current behavior >>>>> with regards to how the control register is handled, and ensures the IOMU >>>>> setup is done with the unit disabled. This approach will need revisiting >>>>> in order to support Preboot DMA Protection. >>>>> >>>>> Fold map_iommu_mmio_region() into its only caller, as the function body is >>>>> just an ioremap() call after the removal of the memset(). >>>>> >>>>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >>>>> Signed-off-by: Roger Pau Monné >>>> >>>> While you got Andrew's R-b, I don't view that as enough to commit it. My >>>> prior concern towards ... >>>> >>>>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>>>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>>>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >>>>> return iommu->ht_flags & mask; >>>>> } >>>>> >>>>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >>>>> -{ >>>>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>>>> - IOMMU_MMIO_REGION_LENGTH); >>>>> - if ( !iommu->mmio_base ) >>>>> - return -ENOMEM; >>>>> - >>>>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >>>>> - >>>>> - return 0; >>>>> -} >>>> >>>> ... this part of the change wasn't addressed, neither verbally nor by an >>>> adjustment to the description of what was committed. As previously stated, >>>> blindly memset()-ing the entire area may not be the best of all options, >>>> but the downsides of not doing this need to somehow be addressed. As >>>> indicated, once they run out of bits in the main control register, they >>>> likely will add a 2nd one. That'll then also need clearing, yet we have >>>> no code to do so anymore. >>> >>> I could introduce an opt-in command line option that forces the >>> zeroing of the MMIO region (to have the option to resort to the >>> previous behavior), >> >> But we don't want to fully go back to this. We'd need a form that zeroes >> what may be zeroed, without causing the issue you're trying to address. > > But how do we know what needs to be zeroed? We are then in the same > position where the introduction of a new control register would cause > the zeroing to no longer be accurate. An option may be to zero everything we don't know about (plus perhaps everything we know about, but don't otherwise use), on the assumption that new (writable) registers added are okay to zero. >>> but I was (wrongly) under the impression that we >>> have agreement the proposed approach was the least bad of the ones >>> available, sorry. >>> >>> Note how VT-d also doesn't zero the IOMMU registers MMIO page either, >>> neither does it seems to zero the Global Command Register either, >>> which I'm not saying it's correct, but is at least a (possibly wrong) >>> precedent. I don't think there's much we can do with the handling of >>> enabled bits in possibly registers not know/handled by Xen. Like on >>> VT-d, we possibly need to rely on the firmware to handle the IOMMU in >>> a half-sane configuration, with no enabled features on registers Xen >>> doesn't know about. >> >> As indicated before, for firmware we can likely rely on that. Pre-boot >> non-firmware environments and especially Xen being kexec-ed (or being >> run past something which was kexec-ed) may be of more concern. > > Do we really support booting from such environments? We would need > much more careful handling of enabled features IMO, as blindly zeroing > the whole MMIO register area is likely to not make the IOMMU happy if > it was in an enabled state. > > Note for example how Xen was zeroing the command and log buffer > pointers ahead of disabling the features in the control register, just > because those register are ahead of the control register in the MMIO > space. Hmm, yes, such ordering issues could also appear with new registers. Then again, with the IOMMU as a whole disabled (which we would still want to do up front), perhaps the order of other stores can be assumed to not matter? Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 11:28:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:28:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302619.1576484 (Exim 4.92) (envelope-from ) id 1wKwu6-0001Rn-Ds; Thu, 07 May 2026 11:28:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302619.1576484; Thu, 07 May 2026 11:28:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwu6-0001Rg-B6; Thu, 07 May 2026 11:28:30 +0000 Received: by outflank-mailman (input) for mailman id 1302619; Thu, 07 May 2026 11:28:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwu4-0001RZ-W8 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:28:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKwu2-00AnK1-RB for xen-devel@lists.xenproject.org; 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Personally, I'd phrase it more sternly.  The masking (or not) of evtchn has nothing to do with GIF/IF. > stgi/clgi since HVM event delivery already takes into account the state STGI/CLGI. > of the GIF (and IF). This ensures the behaviour is consistent regardless > of whether vGIF is used. > > Fold the functions into the callers since they are now only a single > assignment. > > Signed-off-by: Ross Lagerwall For the patch itself, Reviewed-by: Andrew Cooper However there's another can of worms. This patch deletes the only user of local_event_delivery_disable(). It does not delete the only user of local_event_delivery_enable() and pulling that thread shows up a mess.  The other caller is vcpu_block_enable_events() which comes from SCHEDOP_block (probably legitimate; enabling events is at least documented for this hypercall) and hvm_hlt() which is definitely bogus. It needs deleting, but we may want to instrument that path to see if we ever clear the evtchn mask in practice, then run as many distros as we can find. Furthermore, while RISC-V and PPC have BUG() stubs for these functions, ARM implements it as clearing regs->cpsr.irq_mask which is equally bogus mixing virtualised evtchns with architectural interrupt handling. That, equally, needs deleting but I'll have to defer to the ARM maintainers (CC'd) on how to do it safely. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 07 11:29:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:29:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302624.1576493 (Exim 4.92) (envelope-from ) id 1wKwud-0001sl-MX; Thu, 07 May 2026 11:29:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302624.1576493; Thu, 07 May 2026 11:29:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwud-0001se-IK; Thu, 07 May 2026 11:29:03 +0000 Received: by outflank-mailman (input) for mailman id 1302624; Thu, 07 May 2026 11:29:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwuc-0001sW-Lr for xen-devel@lists.xenproject.org; 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Message-ID: Date: Thu, 7 May 2026 12:28:54 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] nestedsvm: Clear GIF when injecting VMEXIT To: Ross Lagerwall , xen-devel@lists.xenproject.org References: <20260507105507.2078971-1-ross.lagerwall@citrix.com> <20260507105507.2078971-3-ross.lagerwall@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260507105507.2078971-3-ross.lagerwall@citrix.com> Content-Type: text/plain; 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Thu, 07 May 2026 04:41:04 -0700 (PDT) Message-ID: Date: Thu, 7 May 2026 13:41:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Rafal Wojtczuk From: Jan Beulich Subject: [PATCH] gnttab: simplify (replace) gnttab_set_frame_gfn() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778154065-E3B8E443-7C6D85E7/0/0 X-purgate-type: clean X-purgate-size: 3448 It's not really doing anything for valid GFNs, which renders its one use site pretty pointless. The other isn't so much about setting anything, but rather about clearing. Rename the macro accordingly. The main point here, however, is about Rafal spotting the double fetching of the GFN (first in gnttab_unpopulate_status_frames(), then again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass in the already fetched GFN, while dropping the no longer used parameters. Suggested-by: Rafal Wojtczuk Signed-off-by: Jan Beulich --- Do we even need the hook anymore? It has been expanding the same for Arm and x86. --- a/xen/arch/arm/include/asm/grant_table.h +++ b/xen/arch/arm/include/asm/grant_table.h @@ -50,12 +50,8 @@ int replace_grant_host_mapping(uint64_t #define gnttab_dom0_frames() \ min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0) +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ (st) ? gnttab_status_gfn(NULL, gt, idx) \ --- a/xen/arch/x86/include/asm/grant_table.h +++ b/xen/arch/x86/include/asm/grant_table.h @@ -32,12 +32,8 @@ static inline int replace_grant_host_map return replace_grant_pv_mapping(addr, frame, new_addr, flags); } -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0 /* Handled in add_to_physmap_one(). */) +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ : gnttab_shared_mfn(gt, idx); \ --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d { int rc = gfn_eq(gfn, INVALID_GFN) ? 0 - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, - page_to_mfn(pg)); + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); if ( rc ) { @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( */ if ( !get_page(pg, d) ) rc = -EBUSY; - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) - put_page(pg); } if ( rc ) From xen-devel-bounces@lists.xenproject.org Thu May 07 12:59:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 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citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: f892d064-6cc6-4614-53c7-08deac386668 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8274.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 12:58:57.1683 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qnmcPDaL3yVrdR8AX+3zSHwp7tio/S9AClWqDivBVf3vUEkGw4h+5y5Iunf+JUtV7N11/YjXL7J0YSR9kQxwpPIRA06qcC4fnqPiAv0Zar8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR03MB7278 X-purgate-ID: tlsNG-ef75cf/1778158741-08F66C48-27139D7D/0/0 X-purgate-type: clean X-purgate-size: 1911 On 4/29/26 5:54 PM, Teddy Astie wrote: > Le 23/04/2026 à 18:13, Ross Lagerwall a écrit : >> If L1 executes VMRUN with the GIF set and it fails consistency checks, >> Xen will inject a VMEXIT and fail the assert checking the GIF is cleared. >> >> Instead, clear the GIF when injecting a VMEXIT to match what hardware >> does. >> >> Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") >> Signed-off-by: Ross Lagerwall >> --- >> xen/arch/x86/hvm/svm/nestedsvm.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c >> index ef6fa5d23b67..f89b087a1155 100644 >> --- a/xen/arch/x86/hvm/svm/nestedsvm.c >> +++ b/xen/arch/x86/hvm/svm/nestedsvm.c >> @@ -733,9 +733,9 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, >> struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; >> >> if ( vmcb->_vintr.fields.vgif_enable ) >> - ASSERT(vmcb->_vintr.fields.vgif == 0); >> + vmcb->_vintr.fields.vgif = 0; >> else >> - ASSERT(svm->ns_gif == 0); >> + nestedsvm_vcpu_clgi(v); >> >> ns_vmcb = nv->nv_vvmcx; >> > > Looks good to me, though I think we are here looking to make a "guest > CLGI" (clear GIF), so the vGIF specific logic should be collapsed into > nestedsvm_vcpu_clgi() instead of having it as the non-vgif-support case. > (as IIUC, vGIF is a hardware accelration for nested GIF handling ?) Not 100% sure I follow your point here but v2 of this series removes nestedsvm_vcpu_clgi() entirely. Does that address your concern? > > (also making me notice that svm_vmexit_do_{stgi,clgi}() seems to lack > vGIF specific logic) > Isn't that by design? If vGIF is enabled the hardware should handle STGI/CLGI without a VMEXIT. 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How about this instead? x86/svm: Don't mask/unmask evtchns on CLGI/STGI Whether or not evtchns are masked or unmasked has nothing to do with the state of the GIF/IF. Therefore, do not toggle the evtchn mask on STGI/CLGI - HVM event delivery already takes into account the state of the GIF/IF. This ensures the behaviour is consistent regardless of whether vGIF is used. Fold the functions into the callers since they are now only a single assignment. Signed-off-by: Ross Lagerwall From xen-devel-bounces@lists.xenproject.org Thu May 07 14:29:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 14:29:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302802.1576546 (Exim 4.92) (envelope-from ) id 1wKzjJ-00028h-1U; Thu, 07 May 2026 14:29:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302802.1576546; Thu, 07 May 2026 14:29:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKzjI-00028a-Tb; Thu, 07 May 2026 14:29:32 +0000 Received: by outflank-mailman (input) for mailman id 1302802; Thu, 07 May 2026 14:29:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKzjG-00028U-V7 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 14:29:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKzjE-00BS8G-Nj for xen-devel@lists.xenproject.org; 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We don't know what registers might be there, nor which > >>>>> values might be safe for those registers. On a forthcoming platform doing > >>>>> the zeroing of the MMIO region does put the IOMMU in a broken state, which > >>>>> is not recoverable by the IOMMU initialization procedure in Xen. > >>>>> > >>>>> Instead just zero the control register, which mimics the current behavior > >>>>> with regards to how the control register is handled, and ensures the IOMU > >>>>> setup is done with the unit disabled. This approach will need revisiting > >>>>> in order to support Preboot DMA Protection. > >>>>> > >>>>> Fold map_iommu_mmio_region() into its only caller, as the function body is > >>>>> just an ioremap() call after the removal of the memset(). > >>>>> > >>>>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > >>>>> Signed-off-by: Roger Pau Monné > >>>> > >>>> While you got Andrew's R-b, I don't view that as enough to commit it. My > >>>> prior concern towards ... > >>>> > >>>>> --- a/xen/drivers/passthrough/amd/iommu_init.c > >>>>> +++ b/xen/drivers/passthrough/amd/iommu_init.c > >>>>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > >>>>> return iommu->ht_flags & mask; > >>>>> } > >>>>> > >>>>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > >>>>> -{ > >>>>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > >>>>> - IOMMU_MMIO_REGION_LENGTH); > >>>>> - if ( !iommu->mmio_base ) > >>>>> - return -ENOMEM; > >>>>> - > >>>>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > >>>>> - > >>>>> - return 0; > >>>>> -} > >>>> > >>>> ... this part of the change wasn't addressed, neither verbally nor by an > >>>> adjustment to the description of what was committed. As previously stated, > >>>> blindly memset()-ing the entire area may not be the best of all options, > >>>> but the downsides of not doing this need to somehow be addressed. As > >>>> indicated, once they run out of bits in the main control register, they > >>>> likely will add a 2nd one. That'll then also need clearing, yet we have > >>>> no code to do so anymore. > >>> > >>> I could introduce an opt-in command line option that forces the > >>> zeroing of the MMIO region (to have the option to resort to the > >>> previous behavior), > >> > >> But we don't want to fully go back to this. We'd need a form that zeroes > >> what may be zeroed, without causing the issue you're trying to address. > > > > But how do we know what needs to be zeroed? We are then in the same > > position where the introduction of a new control register would cause > > the zeroing to no longer be accurate. > > An option may be to zero everything we don't know about (plus perhaps > everything we know about, but don't otherwise use), on the assumption > that new (writable) registers added are okay to zero. I don't know, I wouldn't feel very comfortable in zeroing everything we don't know about - there's a risk of zeroing hidden registers set up by the firmware. > >>> but I was (wrongly) under the impression that we > >>> have agreement the proposed approach was the least bad of the ones > >>> available, sorry. > >>> > >>> Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > >>> neither does it seems to zero the Global Command Register either, > >>> which I'm not saying it's correct, but is at least a (possibly wrong) > >>> precedent. I don't think there's much we can do with the handling of > >>> enabled bits in possibly registers not know/handled by Xen. Like on > >>> VT-d, we possibly need to rely on the firmware to handle the IOMMU in > >>> a half-sane configuration, with no enabled features on registers Xen > >>> doesn't know about. > >> > >> As indicated before, for firmware we can likely rely on that. Pre-boot > >> non-firmware environments and especially Xen being kexec-ed (or being > >> run past something which was kexec-ed) may be of more concern. > > > > Do we really support booting from such environments? We would need > > much more careful handling of enabled features IMO, as blindly zeroing > > the whole MMIO register area is likely to not make the IOMMU happy if > > it was in an enabled state. > > > > Note for example how Xen was zeroing the command and log buffer > > pointers ahead of disabling the features in the control register, just > > because those register are ahead of the control register in the MMIO > > space. > > Hmm, yes, such ordering issues could also appear with new registers. > Then again, with the IOMMU as a whole disabled (which we would still > want to do up front), perhaps the order of other stores can be assumed > to not matter? I would assume so, yes, but for the issue here the order of the writes did matter, even when the IOMMU was fully disabled. I've inquired to see if there's a recommended way to clear any previous state from an IOMMU. Thanks, Roger. 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Smith" , Oleksii Kurochko Subject: [PATCH] Drop xenpaging Date: Thu, 7 May 2026 18:19:33 +0100 Message-Id: <20260507171933.1573983-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778174396-BDD6BE11-C7921207/10/73395122804 X-purgate-type: spam X-purgate-size: 130750 This capability is experimental, has seen no development since 2011, and these days only gets edited to fix the build. While it can be compiled out (of Xen at least), it is a maintenance burden on surrounding code that we'd prefer to stop paying. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Juergen Gross CC: Tamas K Lengyel CC: Daniel P. Smith CC: Oleksii Kurochko Slightly RFC. I'm suspect I might be asked to split this up a bit, but if so, suggestions on where to draw the lines please. The diffstat speaks for itself, including the invasiveness on surrounding code. PFEC_page_paged and HVMTRANS_gfn_paged_out weren't even able to be elimiated by the compiler in !CONFIG_MEM_PAGING configurations. --- .gitignore | 1 - CHANGELOG.md | 3 + MAINTAINERS | 4 - automation/gitlab-ci/analyze.yaml | 1 - config/Paths.mk.in | 1 - configure | 4 - docs/INDEX | 1 - docs/configure | 4 - docs/misc/xenpaging.txt | 45 - m4/paths.m4 | 3 - tools/Makefile | 1 - tools/configure | 4 - tools/hotplug/common/hotplugpath.sh.in | 1 - tools/include/xenctrl.h | 20 +- tools/libs/ctrl/Makefile.common | 1 - tools/libs/ctrl/xc_mem_paging.c | 130 --- tools/xenpaging/Makefile | 43 - tools/xenpaging/file_ops.c | 71 -- tools/xenpaging/file_ops.h | 41 - tools/xenpaging/pagein.c | 79 -- tools/xenpaging/policy.h | 48 -- tools/xenpaging/policy_default.c | 186 ---- tools/xenpaging/xenpaging.c | 1084 ------------------------ tools/xenpaging/xenpaging.h | 152 ---- xen/arch/x86/hvm/Kconfig | 4 - xen/arch/x86/hvm/dm.c | 6 - xen/arch/x86/hvm/emulate.c | 9 +- xen/arch/x86/hvm/hvm.c | 21 +- xen/arch/x86/hvm/intercept.c | 2 - xen/arch/x86/hvm/vmx/vvmx.c | 2 - xen/arch/x86/include/asm/hvm/support.h | 1 - xen/arch/x86/include/asm/mem_paging.h | 24 - xen/arch/x86/include/asm/p2m.h | 39 +- xen/arch/x86/include/asm/processor.h | 1 - xen/arch/x86/livepatch.c | 4 - xen/arch/x86/mm.c | 21 +- xen/arch/x86/mm/Makefile | 1 - xen/arch/x86/mm/altp2m.c | 2 +- xen/arch/x86/mm/guest_walk.c | 9 - xen/arch/x86/mm/hap/guest_walk.c | 16 - xen/arch/x86/mm/hap/nested_ept.c | 5 - xen/arch/x86/mm/hap/nested_hap.c | 2 +- xen/arch/x86/mm/mem_paging.c | 487 ----------- xen/arch/x86/mm/mem_sharing.c | 30 - xen/arch/x86/mm/p2m-ept.c | 3 - xen/arch/x86/mm/p2m-pt.c | 7 +- xen/arch/x86/mm/p2m.c | 15 +- xen/arch/x86/mm/shadow/hvm.c | 1 - xen/arch/x86/msr.c | 6 - xen/arch/x86/x86_64/compat/mm.c | 6 - xen/arch/x86/x86_64/mm.c | 6 - xen/common/domain.c | 3 - xen/common/domctl.c | 3 - xen/common/keyhandler.c | 6 - xen/common/memory.c | 37 +- xen/common/page_alloc.c | 3 +- xen/common/vm_event.c | 83 -- xen/drivers/passthrough/x86/iommu.c | 2 - xen/include/public/memory.h | 2 +- xen/include/public/vm_event.h | 2 +- xen/include/xen/sched.h | 18 +- xen/include/xsm/dummy.h | 8 - xen/include/xsm/xsm.h | 11 - xen/xsm/dummy.c | 4 - xen/xsm/flask/hooks.c | 11 - xen/xsm/flask/policy/access_vectors | 2 - 66 files changed, 27 insertions(+), 2826 deletions(-) delete mode 100644 docs/misc/xenpaging.txt delete mode 100644 tools/libs/ctrl/xc_mem_paging.c delete mode 100644 tools/xenpaging/Makefile delete mode 100644 tools/xenpaging/file_ops.c delete mode 100644 tools/xenpaging/file_ops.h delete mode 100644 tools/xenpaging/pagein.c delete mode 100644 tools/xenpaging/policy.h delete mode 100644 tools/xenpaging/policy_default.c delete mode 100644 tools/xenpaging/xenpaging.c delete mode 100644 tools/xenpaging/xenpaging.h delete mode 100644 xen/arch/x86/include/asm/mem_paging.h delete mode 100644 xen/arch/x86/mm/mem_paging.c diff --git a/.gitignore b/.gitignore index bfc7bdf043c3..043e7b166ecc 100644 --- a/.gitignore +++ b/.gitignore @@ -161,7 +161,6 @@ tools/xcutils/lsevtchn tools/xcutils/readnotes tools/xenmon/xentrace_setmask tools/xenmon/xenbaked -tools/xenpaging/xenpaging tools/xenpmd/xenpmd tools/xentop/xentop tools/xentrace/xentrace_setsize diff --git a/CHANGELOG.md b/CHANGELOG.md index ce46020dbdb4..56ea17275b8e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -41,6 +41,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) a guest, but the vendors have been diverging since then in ways that Xen cannot compensate for, and the advent of speculative security issues has put to rest any possibility of this being a viable option. + - The xenpaging userspace daemon, and MEM_PAGING hypervisor infrastructure. + This never got beyond an experimental feature and hasn't seen any real + work since 2011. - Removed xenpm tool on non-x86 platforms as it doesn't actually provide anything useful outside of x86. diff --git a/MAINTAINERS b/MAINTAINERS index 77f72e52f46d..8df2700dd40b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -633,10 +633,6 @@ F: tools/misc/xen-cpuid.c F: tools/tests/cpu-policy/ F: tools/tests/x86_emulator/ -X86 MEMORY PAGING -S: Orphaned -F: xen/arch/x86/mm/mem_paging.c - X86 MEMORY SHARING M: Tamas K Lengyel S: Odd Fixes diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index b3f99f472d9e..f94f1be0aa89 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -52,7 +52,6 @@ eclair-x86_64-allcode: CONFIG_EXPERT=y CONFIG_HYPERV_GUEST=y CONFIG_LATE_HWDOM=y - CONFIG_MEM_PAGING=y CONFIG_MEM_SHARING=y CONFIG_PERF_ARRAYS=y CONFIG_PERF_COUNTERS=y diff --git a/config/Paths.mk.in b/config/Paths.mk.in index 6aa392b9f299..0cf6bb574a0a 100644 --- a/config/Paths.mk.in +++ b/config/Paths.mk.in @@ -40,7 +40,6 @@ INITD_DIR := @INITD_DIR@ CONFIG_LEAF_DIR := @CONFIG_LEAF_DIR@ BASH_COMPLETION_DIR := $(CONFIG_DIR)/bash_completion.d XEN_LOCK_DIR := @XEN_LOCK_DIR@ -XEN_PAGING_DIR := @XEN_PAGING_DIR@ XEN_DUMP_DIR := @XEN_DUMP_DIR@ DEBUG_DIR := @DEBUG_DIR@ diff --git a/configure b/configure index 1dbaeb3c5cfa..152c478abfd3 100755 --- a/configure +++ b/configure @@ -627,7 +627,6 @@ xen subdirs DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -2215,9 +2214,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/docs/INDEX b/docs/INDEX index e673edd75c31..6eec23f5cbc2 100644 --- a/docs/INDEX +++ b/docs/INDEX @@ -18,7 +18,6 @@ misc/distro_mapping Distro Directory Layouts misc/dump-core-format Xen Core Dump Format misc/vtd VT-d HOWTO misc/xen-error-handling Xen Error Handling -misc/xenpaging Xen Paging misc/xsm-flask XSM/FLASK Configuration misc/arm/booting How to boot Xen on ARM misc/arm/early-printk Enabling early printk on ARM diff --git a/docs/configure b/docs/configure index 8871914dcbe1..c8ef084e7ee3 100755 --- a/docs/configure +++ b/docs/configure @@ -626,7 +626,6 @@ POD2MAN FIG2DEV DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -2020,9 +2019,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/docs/misc/xenpaging.txt b/docs/misc/xenpaging.txt deleted file mode 100644 index 742523e145bc..000000000000 --- a/docs/misc/xenpaging.txt +++ /dev/null @@ -1,45 +0,0 @@ -Warning: - -The xenpaging code is new and not fully debugged. -Usage of xenpaging can crash Xen or cause severe data corruption in the -guest memory and its filesystems! - -Description: - -xenpaging writes memory pages of a given guest to a file and moves the -pages back to the pool of available memory. Once the guests wants to -access the paged-out memory, the page is read from disk and placed into -memory. This allows the sum of all running guests to use more memory -than physically available on the host. - -Requirements: - -xenpaging relies on Intel EPT or AMD RVI, other hardware is not -supported. Only HVM guests are supported. The dom0 kernel needs -paging-aware backend drivers to handle paged granttable entries. -Currently only dom0 kernels based on classic Xen Linux support this -functionality. - -Usage: - -Up to now xenpaging is not integrated into libxl/xend, so it has to be -started manually for each guest. - -Once the guest is running, run xenpaging with the guest_id and the path -to the pagefile: - - /usr/lib/xen/bin/xenpaging -f /path/to/page_file -d dom_id & - -Once xenpaging runs it needs a memory target, which is the memory -footprint of the guest. This value (in KiB) must be written manually to -xenstore. The following example sets the target to 512MB: - - xenstore-write /local/domain//memory/target-tot_pages $((1024*512)) - -Now xenpaging tries to page-out as many pages to keep the overall memory -footprint of the guest at 512MB. - -Todo: -- integrate xenpaging into libxl - -# vim: tw=72 diff --git a/m4/paths.m4 b/m4/paths.m4 index 3f94c62efb99..e9382fd6534b 100644 --- a/m4/paths.m4 +++ b/m4/paths.m4 @@ -158,9 +158,6 @@ esac AC_SUBST(XEN_LOCK_DIR) AC_DEFINE_UNQUOTED([XEN_LOCK_DIR], ["$XEN_LOCK_DIR"], [Xen's lock dir]) -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging -AC_SUBST(XEN_PAGING_DIR) - XEN_DUMP_DIR=$xen_dumpdir_path AC_SUBST(XEN_DUMP_DIR) AC_DEFINE_UNQUOTED([XEN_DUMP_DIR], ["$XEN_DUMP_DIR"], [Xen's dump directory]) diff --git a/tools/Makefile b/tools/Makefile index 6ecf7c0da821..8752c9369688 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -32,7 +32,6 @@ SUBDIRS-$(CONFIG_GOLANG) += golang SUBDIRS-y += xl SUBDIRS-y += helpers SUBDIRS-y += 9pfsd -SUBDIRS-$(CONFIG_X86) += xenpaging SUBDIRS-$(CONFIG_X86) += debugger SUBDIRS-$(CONFIG_TESTS) += tests diff --git a/tools/configure b/tools/configure index 6f69b0b52634..9e8790d90a8a 100755 --- a/tools/configure +++ b/tools/configure @@ -742,7 +742,6 @@ rpath werror DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -4558,9 +4557,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/tools/hotplug/common/hotplugpath.sh.in b/tools/hotplug/common/hotplugpath.sh.in index 1036b884b804..d8e257170605 100644 --- a/tools/hotplug/common/hotplugpath.sh.in +++ b/tools/hotplug/common/hotplugpath.sh.in @@ -9,7 +9,6 @@ XEN_CONFIG_DIR="@XEN_CONFIG_DIR@" XEN_SCRIPT_DIR="@XEN_SCRIPT_DIR@" XEN_LOCK_DIR="@XEN_LOCK_DIR@" XEN_RUN_DIR="@XEN_RUN_DIR@" -XEN_PAGING_DIR="@XEN_PAGING_DIR@" XEN_DUMP_DIR="@XEN_DUMP_DIR@" XEN_LOG_DIR="@XEN_LOG_DIR@" XEN_LIB_DIR="@XEN_LIB_DIR@" diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..a46a6cfd42ac 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2012,22 +2012,6 @@ int xc_altp2m_get_vcpu_p2m_idx(xc_interface *handle, uint32_t domid, int xc_altp2m_set_visibility(xc_interface *handle, uint32_t domid, uint16_t view_id, bool visible); -/** - * Mem paging operations. - * Paging is supported only on the x86 architecture in 64 bit mode, with - * Hardware-Assisted Paging (i.e. Intel EPT, AMD NPT). Moreover, AMD NPT - * support is considered experimental. - */ -int xc_mem_paging_enable(xc_interface *xch, uint32_t domain_id, uint32_t *port); -int xc_mem_paging_disable(xc_interface *xch, uint32_t domain_id); -int xc_mem_paging_resume(xc_interface *xch, uint32_t domain_id); -int xc_mem_paging_nominate(xc_interface *xch, uint32_t domain_id, - uint64_t gfn); -int xc_mem_paging_evict(xc_interface *xch, uint32_t domain_id, uint64_t gfn); -int xc_mem_paging_prep(xc_interface *xch, uint32_t domain_id, uint64_t gfn); -int xc_mem_paging_load(xc_interface *xch, uint32_t domain_id, - uint64_t gfn, void *buffer); - /** * Access tracking operations. * Supported only on Intel EPT 64 bit processors. @@ -2160,8 +2144,8 @@ int xc_memshr_control(xc_interface *xch, * ENOMEM happens when unsharing pages: a Copy-on-Write duplicate needs to be * allocated, and thus the out-of-memory error occurr. * - * For complete examples on how to plumb a notification ring, look into - * xenpaging or xen-access. + * For complete examples on how to plumb a notification ring, look at + * xen-access. * * On receipt of a notification, the helper should ensure there is memory * available to the domain before retrying. diff --git a/tools/libs/ctrl/Makefile.common b/tools/libs/ctrl/Makefile.common index 68137d42f2b5..c955f54743da 100644 --- a/tools/libs/ctrl/Makefile.common +++ b/tools/libs/ctrl/Makefile.common @@ -18,7 +18,6 @@ OBJS-y += xc_vm_event.o OBJS-y += xc_vmtrace.o OBJS-y += xc_version.o OBJS-y += xc_monitor.o -OBJS-y += xc_mem_paging.o OBJS-y += xc_mem_access.o OBJS-y += xc_memshr.o OBJS-y += xc_hcall_buf.o diff --git a/tools/libs/ctrl/xc_mem_paging.c b/tools/libs/ctrl/xc_mem_paging.c deleted file mode 100644 index 999a572cefdc..000000000000 --- a/tools/libs/ctrl/xc_mem_paging.c +++ /dev/null @@ -1,130 +0,0 @@ -/****************************************************************************** - * - * tools/libxc/xc_mem_paging.c - * - * Interface to low-level memory paging functionality. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; If not, see . - */ - -#include "xc_private.h" - -static int xc_mem_paging_memop(xc_interface *xch, uint32_t domain_id, - unsigned int op, uint64_t gfn, void *buffer) -{ - xen_mem_paging_op_t mpo; - DECLARE_HYPERCALL_BOUNCE(buffer, XC_PAGE_SIZE, - XC_HYPERCALL_BUFFER_BOUNCE_IN); - int rc; - - memset(&mpo, 0, sizeof(mpo)); - - mpo.op = op; - mpo.domain = domain_id; - mpo.gfn = gfn; - - if ( buffer ) - { - if ( xc_hypercall_bounce_pre(xch, buffer) ) - { - PERROR("Could not bounce memory for XENMEM_paging_op %u", op); - return -1; - } - - set_xen_guest_handle(mpo.buffer, buffer); - } - - rc = xc_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo)); - - if ( buffer ) - xc_hypercall_bounce_post(xch, buffer); - - return rc; -} - -int xc_mem_paging_enable(xc_interface *xch, uint32_t domain_id, - uint32_t *port) -{ - if ( !port ) - { - errno = EINVAL; - return -1; - } - - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_ENABLE, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - port); -} - -int xc_mem_paging_disable(xc_interface *xch, uint32_t domain_id) -{ - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_DISABLE, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - NULL); -} - -int xc_mem_paging_resume(xc_interface *xch, uint32_t domain_id) -{ - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_RESUME, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - NULL); -} - -int xc_mem_paging_nominate(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_nominate, - gfn, NULL); -} - -int xc_mem_paging_evict(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_evict, - gfn, NULL); -} - -int xc_mem_paging_prep(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_prep, - gfn, NULL); -} - -int xc_mem_paging_load(xc_interface *xch, uint32_t domain_id, - uint64_t gfn, void *buffer) -{ - errno = EINVAL; - - if ( !buffer ) - return -1; - - return xc_mem_paging_memop(xch, domain_id, XENMEM_paging_op_prep, - gfn, buffer); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/Makefile b/tools/xenpaging/Makefile deleted file mode 100644 index 835cf2b96553..000000000000 --- a/tools/xenpaging/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -XEN_ROOT=$(CURDIR)/../.. -include $(XEN_ROOT)/tools/Rules.mk - -CFLAGS += $(CFLAGS_libxentoollog) $(CFLAGS_libxenevtchn) $(CFLAGS_libxenctrl) $(CFLAGS_libxenstore) $(PTHREAD_CFLAGS) $(CFLAGS_libxencall) -LDLIBS += $(LDLIBS_libxentoollog) $(LDLIBS_libxenevtchn) $(LDLIBS_libxenctrl) $(LDLIBS_libxenstore) $(PTHREAD_LIBS) -LDFLAGS += $(PTHREAD_LDFLAGS) - -POLICY := default - -OBJS-y := file_ops.o -OBJS-y += xenpaging.o -OBJS-y += policy_$(POLICY).o -OBJS-y += pagein.o - -CFLAGS += -Wno-unused - -TARGETS := xenpaging - -all: $(TARGETS) - -xenpaging: $(OBJS-y) - $(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS) $(APPEND_LDFLAGS) - -install: all - $(INSTALL_DIR) -m 0700 $(DESTDIR)$(XEN_PAGING_DIR) - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN) - $(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC_BIN) - -uninstall: - rm -f $(addprefix $(DESTDIR)$(LIBEXEC_BIN)/, $(TARGETS)) - -clean: - rm -f *.o *~ $(DEPS_RM) TAGS $(TARGETS) - -distclean: clean - -.PHONY: clean install distclean uninstall - -.PHONY: TAGS -TAGS: - etags -t *.c *.h - --include $(DEPS_INCLUDE) diff --git a/tools/xenpaging/file_ops.c b/tools/xenpaging/file_ops.c deleted file mode 100644 index 301fb3427cc5..000000000000 --- a/tools/xenpaging/file_ops.c +++ /dev/null @@ -1,71 +0,0 @@ -/****************************************************************************** - * - * Common file operations. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#include -#include - -static int file_op(int fd, void *page, int i, - ssize_t (*fn)(int, void *, size_t)) -{ - off_t offset = i; - int total = 0; - int bytes; - - offset = lseek(fd, offset << XC_PAGE_SHIFT, SEEK_SET); - if ( offset == (off_t)-1 ) - return -1; - - while ( total < XC_PAGE_SIZE ) - { - bytes = fn(fd, page + total, XC_PAGE_SIZE - total); - if ( bytes <= 0 ) - return -1; - - total += bytes; - } - - return 0; -} - -static ssize_t my_write(int fd, void *buf, size_t count) -{ - return write(fd, buf, count); -} - -int read_page(int fd, void *page, int i) -{ - return file_op(fd, page, i, &read); -} - -int write_page(int fd, void *page, int i) -{ - return file_op(fd, page, i, &my_write); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/file_ops.h b/tools/xenpaging/file_ops.h deleted file mode 100644 index ee3fd7d8b86c..000000000000 --- a/tools/xenpaging/file_ops.h +++ /dev/null @@ -1,41 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/file_ops.h - * - * Common file operations. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __FILE_OPS_H__ -#define __FILE_OPS_H__ - - -int read_page(int fd, void *page, int i); -int write_page(int fd, void *page, int i); - - -#endif - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/pagein.c b/tools/xenpaging/pagein.c deleted file mode 100644 index 1c8a7d983dc2..000000000000 --- a/tools/xenpaging/pagein.c +++ /dev/null @@ -1,79 +0,0 @@ -/* Trigger a page-in in a separate thread-of-execution to avoid deadlock */ -#include -#include "xenpaging.h" - -struct page_in_args { - domid_t dom; - unsigned long *pagein_queue; - xc_interface *xch; -}; - -static struct page_in_args page_in_args; -static unsigned long page_in_request; -static unsigned int page_in_possible; - -static pthread_t page_in_thread; -static pthread_cond_t page_in_cond = PTHREAD_COND_INITIALIZER; -static pthread_mutex_t page_in_mutex = PTHREAD_MUTEX_INITIALIZER; - -static void *page_in(void *arg) -{ - struct page_in_args *pia = arg; - void *page; - int i, num; - xen_pfn_t gfns[XENPAGING_PAGEIN_QUEUE_SIZE]; - - while (1) - { - pthread_mutex_lock(&page_in_mutex); - while (!page_in_request) - pthread_cond_wait(&page_in_cond, &page_in_mutex); - num = 0; - for (i = 0; i < XENPAGING_PAGEIN_QUEUE_SIZE; i++) - { - if (!pia->pagein_queue[i]) - continue; - gfns[num] = pia->pagein_queue[i]; - pia->pagein_queue[i] = 0; - num++; - } - page_in_request = 0; - pthread_mutex_unlock(&page_in_mutex); - - /* Ignore errors */ - page = xc_map_foreign_pages(pia->xch, pia->dom, PROT_READ, gfns, num); - if (page) - munmap(page, XC_PAGE_SIZE * num); - } - page_in_possible = 0; - pthread_exit(NULL); -} - -void page_in_trigger(void) -{ - if (!page_in_possible) - return; - - pthread_mutex_lock(&page_in_mutex); - page_in_request = 1; - pthread_mutex_unlock(&page_in_mutex); - pthread_cond_signal(&page_in_cond); -} - -void create_page_in_thread(struct xenpaging *paging) -{ - page_in_args.dom = paging->vm_event.domain_id; - page_in_args.pagein_queue = paging->pagein_queue; - page_in_args.xch = paging->xc_handle; - if (pthread_create(&page_in_thread, NULL, page_in, &page_in_args) == 0) - page_in_possible = 1; -} - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/policy.h b/tools/xenpaging/policy.h deleted file mode 100644 index b1425a90ef6d..000000000000 --- a/tools/xenpaging/policy.h +++ /dev/null @@ -1,48 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/policy.h - * - * Xen domain paging policy hooks. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __XEN_PAGING_POLICY_H__ -#define __XEN_PAGING_POLICY_H__ - - -#include "xenpaging.h" - - -int policy_init(struct xenpaging *paging); -unsigned long policy_choose_victim(struct xenpaging *paging); -void policy_notify_paged_out(unsigned long gfn); -void policy_notify_paged_in(unsigned long gfn); -void policy_notify_paged_in_nomru(unsigned long gfn); -void policy_notify_dropped(unsigned long gfn); - -#endif // __XEN_PAGING_POLICY_H__ - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/policy_default.c b/tools/xenpaging/policy_default.c deleted file mode 100644 index 979d25123045..000000000000 --- a/tools/xenpaging/policy_default.c +++ /dev/null @@ -1,186 +0,0 @@ -/****************************************************************************** - * - * Xen domain paging default policy. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - -#include - -#include "policy.h" - - -#define DEFAULT_MRU_SIZE (1024 * 16) - - -static unsigned long *mru; -static unsigned int i_mru; -static unsigned int mru_size; -static unsigned long *bitmap; -static unsigned long *unconsumed; -static unsigned int unconsumed_cleared; -static unsigned long current_gfn; -static unsigned long max_pages; - - -int policy_init(struct xenpaging *paging) -{ - int i; - int rc = -ENOMEM; - - max_pages = paging->max_pages; - - /* Allocate bitmap for pages not to page out */ - bitmap = bitmap_alloc(max_pages); - if ( !bitmap ) - goto out; - /* Allocate bitmap to track unusable pages */ - unconsumed = bitmap_alloc(max_pages); - if ( !unconsumed ) - goto out; - - /* Initialise MRU list of paged in pages */ - if ( paging->policy_mru_size > 0 ) - mru_size = paging->policy_mru_size; - else - mru_size = paging->policy_mru_size = DEFAULT_MRU_SIZE; - - mru = malloc(sizeof(*mru) * mru_size); - if ( mru == NULL ) - goto out; - - for ( i = 0; i < mru_size; i++ ) - mru[i] = INVALID_MFN; - - /* Don't page out page 0 */ - set_bit(0, bitmap); - - /* Start in the middle to avoid paging during BIOS startup */ - current_gfn = max_pages / 2; - - rc = 0; - out: - return rc; -} - -unsigned long policy_choose_victim(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - unsigned long i; - - /* One iteration over all possible gfns */ - for ( i = 0; i < max_pages; i++ ) - { - /* Try next gfn */ - current_gfn++; - - /* Restart on wrap */ - if ( current_gfn >= max_pages ) - current_gfn = 0; - - if ( (current_gfn & (BITS_PER_LONG - 1)) == 0 ) - { - /* All gfns busy */ - if ( ~bitmap[current_gfn >> ORDER_LONG] == 0 || ~unconsumed[current_gfn >> ORDER_LONG] == 0 ) - { - current_gfn += BITS_PER_LONG; - i += BITS_PER_LONG; - continue; - } - } - - /* gfn busy */ - if ( test_bit(current_gfn, bitmap) ) - continue; - - /* gfn already tested */ - if ( test_bit(current_gfn, unconsumed) ) - continue; - - /* gfn found */ - break; - } - - /* Could not nominate any gfn */ - if ( i >= max_pages ) - { - /* No more pages, wait in poll */ - paging->use_poll_timeout = 1; - /* Count wrap arounds */ - unconsumed_cleared++; - /* Force retry every few seconds (depends on poll() timeout) */ - if ( unconsumed_cleared > 123) - { - /* Force retry of unconsumed gfns on next call */ - bitmap_clear(unconsumed, max_pages); - unconsumed_cleared = 0; - DPRINTF("clearing unconsumed, current_gfn %lx", current_gfn); - } - return INVALID_MFN; - } - - set_bit(current_gfn, unconsumed); - return current_gfn; -} - -void policy_notify_paged_out(unsigned long gfn) -{ - set_bit(gfn, bitmap); - clear_bit(gfn, unconsumed); -} - -static void policy_handle_paged_in(unsigned long gfn, int do_mru) -{ - unsigned long old_gfn = mru[i_mru & (mru_size - 1)]; - - if ( old_gfn != INVALID_MFN ) - clear_bit(old_gfn, bitmap); - - if (do_mru) { - mru[i_mru & (mru_size - 1)] = gfn; - } else { - clear_bit(gfn, bitmap); - mru[i_mru & (mru_size - 1)] = INVALID_MFN; - } - - i_mru++; -} - -void policy_notify_paged_in(unsigned long gfn) -{ - policy_handle_paged_in(gfn, 1); -} - -void policy_notify_paged_in_nomru(unsigned long gfn) -{ - policy_handle_paged_in(gfn, 0); -} - -void policy_notify_dropped(unsigned long gfn) -{ - clear_bit(gfn, bitmap); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/xenpaging.c b/tools/xenpaging/xenpaging.c deleted file mode 100644 index c7a9a8247766..000000000000 --- a/tools/xenpaging/xenpaging.c +++ /dev/null @@ -1,1084 +0,0 @@ -/****************************************************************************** - * - * Domain paging. - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - -#define _GNU_SOURCE - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "file_ops.h" -#include "policy.h" -#include "xenpaging.h" - -/* Defines number of mfns a guest should use at a time, in KiB */ -#define WATCH_TARGETPAGES "memory/target-tot_pages" -static char *watch_target_tot_pages; -static char *dom_path; -static char watch_token[16]; -static char *filename; -static int interrupted; - -static void unlink_pagefile(void) -{ - if ( filename && filename[0] ) - { - unlink(filename); - filename[0] = '\0'; - } -} - -static void close_handler(int sig) -{ - interrupted = sig; - unlink_pagefile(); -} - -static void xenpaging_mem_paging_flush_ioemu_cache(struct xenpaging *paging) -{ - struct xs_handle *xsh = paging->xs_handle; - domid_t domain_id = paging->vm_event.domain_id; - char path[80]; - - sprintf(path, "/local/domain/0/device-model/%u/command", domain_id); - - xs_write(xsh, XBT_NULL, path, "flush-cache", strlen("flush-cache")); -} - -static int xenpaging_wait_for_event_or_timeout(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - xenevtchn_handle *xce = paging->vm_event.xce_handle; - char **vec, *val; - unsigned int num; - struct pollfd fd[2]; - int port; - int rc; - int timeout; - - /* Wait for event channel and xenstore */ - fd[0].fd = xenevtchn_fd(xce); - fd[0].events = POLLIN | POLLERR; - fd[1].fd = xs_fileno(paging->xs_handle); - fd[1].events = POLLIN | POLLERR; - - /* No timeout while page-out is still in progress */ - timeout = paging->use_poll_timeout ? 100 : 0; - rc = poll(fd, 2, timeout); - if ( rc < 0 ) - { - if (errno == EINTR) - return 0; - - PERROR("Poll exited with an error"); - return -1; - } - - /* First check for guest shutdown */ - if ( rc && fd[1].revents & POLLIN ) - { - DPRINTF("Got event from xenstore\n"); - vec = xs_read_watch(paging->xs_handle, &num); - if ( vec ) - { - DPRINTF("path '%s' token '%s'\n", vec[XS_WATCH_PATH], vec[XS_WATCH_TOKEN]); - if ( strcmp(vec[XS_WATCH_TOKEN], watch_token) == 0 ) - { - /* If our guest disappeared, set interrupt flag and fall through */ - if ( xs_is_domain_introduced(paging->xs_handle, paging->vm_event.domain_id) == false ) - { - xs_unwatch(paging->xs_handle, "@releaseDomain", watch_token); - interrupted = SIGQUIT; - /* No further poll result processing */ - rc = 0; - } - } - else if ( strcmp(vec[XS_WATCH_PATH], watch_target_tot_pages) == 0 ) - { - int ret, target_tot_pages; - val = xs_read(paging->xs_handle, XBT_NULL, vec[XS_WATCH_PATH], NULL); - if ( val ) - { - ret = sscanf(val, "%d", &target_tot_pages); - if ( ret > 0 ) - { - /* KiB to pages */ - target_tot_pages >>= 2; - if ( target_tot_pages < 0 || target_tot_pages > paging->max_pages ) - target_tot_pages = paging->max_pages; - paging->target_tot_pages = target_tot_pages; - /* Disable poll() delay while new target is not yet reached */ - paging->use_poll_timeout = 0; - DPRINTF("new target_tot_pages %d\n", target_tot_pages); - } - free(val); - } - } - free(vec); - } - } - - if ( rc && fd[0].revents & POLLIN ) - { - DPRINTF("Got event from evtchn\n"); - port = xenevtchn_pending(xce); - if ( port == -1 ) - { - PERROR("Failed to read port from event channel"); - rc = -1; - goto err; - } - - rc = xenevtchn_unmask(xce, port); - if ( rc < 0 ) - { - PERROR("Failed to unmask event channel port"); - } - } -err: - return rc; -} - -static int xenpaging_get_tot_pages(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - xc_domaininfo_t domain_info; - int rc; - - rc = xc_domain_getinfo_single(xch, paging->vm_event.domain_id, &domain_info); - if ( rc < 0 ) - { - PERROR("Error getting domain info"); - return -1; - } - return domain_info.tot_pages; -} - -static void *init_page(void) -{ - void *buffer; - - /* Allocated page memory */ - errno = posix_memalign(&buffer, XC_PAGE_SIZE, XC_PAGE_SIZE); - if ( errno != 0 ) - return NULL; - - /* Lock buffer in memory so it can't be paged out */ - if ( mlock(buffer, XC_PAGE_SIZE) < 0 ) - { - free(buffer); - buffer = NULL; - } - - return buffer; -} - -static void usage(void) -{ - printf("usage:\n\n"); - - printf(" xenpaging [options] -f -d \n\n"); - - printf("options:\n"); - printf(" -d --domain= numerical domain_id of guest. This option is required.\n"); - printf(" -f --pagefile= pagefile to use. This option is required.\n"); - printf(" -m --max_memkb= maximum amount of memory to handle.\n"); - printf(" -r --mru_size= number of paged-in pages to keep in memory.\n"); - printf(" -v --verbose enable debug output.\n"); - printf(" -h --help this output.\n"); -} - -static int xenpaging_getopts(struct xenpaging *paging, int argc, char *argv[]) -{ - int ch; - static const char sopts[] = "hvd:f:m:r:"; - static const struct option lopts[] = { - {"help", 0, NULL, 'h'}, - {"verbose", 0, NULL, 'v'}, - {"domain", 1, NULL, 'd'}, - {"pagefile", 1, NULL, 'f'}, - {"mru_size", 1, NULL, 'm'}, - { } - }; - - while ((ch = getopt_long(argc, argv, sopts, lopts, NULL)) != -1) - { - switch(ch) { - case 'd': - paging->vm_event.domain_id = atoi(optarg); - break; - case 'f': - free(filename); - filename = strdup(optarg); - break; - case 'm': - /* KiB to pages */ - paging->max_pages = atoi(optarg) >> 2; - break; - case 'r': - paging->policy_mru_size = atoi(optarg); - break; - case 'v': - paging->debug = 1; - break; - case 'h': - case '?': - usage(); - return 1; - } - } - - argv += optind; argc -= optind; - - /* Path to pagefile is required */ - if ( !filename ) - { - printf("Filename for pagefile missing!\n"); - usage(); - return 1; - } - - /* Set domain id */ - if ( !paging->vm_event.domain_id ) - { - printf("Numerical missing!\n"); - return 1; - } - - return 0; -} - -static struct xenpaging *xenpaging_init(int argc, char *argv[]) -{ - struct xenpaging *paging; - xc_domaininfo_t domain_info; - xc_interface *xch = NULL; - char *p; - int rc; - unsigned long ring_pfn, mmap_pfn; - - /* Allocate memory */ - paging = calloc(1, sizeof(struct xenpaging)); - if ( !paging ) - goto err; - - /* Get cmdline options and domain_id */ - if ( xenpaging_getopts(paging, argc, argv) ) - goto err; - - paging->logger = (xentoollog_logger *)xtl_createlogger_stdiostream(stderr, - paging->debug ? XTL_DEBUG : XTL_PROGRESS, 0); - - /* Open connection to xen */ - paging->xc_handle = xch = xc_interface_open(paging->logger, NULL, 0); - if ( !xch ) - goto err; - - DPRINTF("xenpaging init\n"); - - /* Open connection to xenstore */ - paging->xs_handle = xs_open(0); - if ( paging->xs_handle == NULL ) - { - PERROR("Error initialising xenstore connection"); - goto err; - } - - /* write domain ID to watch so we can ignore other domain shutdowns */ - snprintf(watch_token, sizeof(watch_token), "%u", paging->vm_event.domain_id); - if ( xs_watch(paging->xs_handle, "@releaseDomain", watch_token) == false ) - { - PERROR("Could not bind to shutdown watch\n"); - goto err; - } - - /* Watch xenpagings working target */ - dom_path = xs_get_domain_path(paging->xs_handle, paging->vm_event.domain_id); - if ( !dom_path ) - { - PERROR("Could not find domain path\n"); - goto err; - } - if ( asprintf(&watch_target_tot_pages, "%s/%s", dom_path, WATCH_TARGETPAGES) < 0 ) - { - PERROR("Could not alloc watch path\n"); - goto err; - } - DPRINTF("watching '%s'\n", watch_target_tot_pages); - if ( xs_watch(paging->xs_handle, watch_target_tot_pages, "") == false ) - { - PERROR("Could not bind to xenpaging watch\n"); - goto err; - } - - /* Map the ring page */ - xc_get_hvm_param(xch, paging->vm_event.domain_id, - HVM_PARAM_PAGING_RING_PFN, &ring_pfn); - mmap_pfn = ring_pfn; - paging->vm_event.ring_page = - xc_map_foreign_pages(xch, paging->vm_event.domain_id, - PROT_READ | PROT_WRITE, &mmap_pfn, 1); - if ( !paging->vm_event.ring_page ) - { - /* Map failed, populate ring page */ - rc = xc_domain_populate_physmap_exact(paging->xc_handle, - paging->vm_event.domain_id, - 1, 0, 0, &ring_pfn); - if ( rc != 0 ) - { - PERROR("Failed to populate ring gfn\n"); - goto err; - } - - paging->vm_event.ring_page = - xc_map_foreign_pages(xch, paging->vm_event.domain_id, - PROT_READ | PROT_WRITE, - &mmap_pfn, 1); - if ( !paging->vm_event.ring_page ) - { - PERROR("Could not map the ring page\n"); - goto err; - } - } - - /* Initialise Xen */ - rc = xc_mem_paging_enable(xch, paging->vm_event.domain_id, - &paging->vm_event.evtchn_port); - if ( rc != 0 ) - { - switch ( errno ) { - case EBUSY: - ERROR("xenpaging is (or was) active on this domain"); - break; - case ENODEV: - ERROR("xenpaging requires Hardware Assisted Paging"); - break; - case EMLINK: - ERROR("xenpaging not supported while iommu passthrough is enabled"); - break; - case EXDEV: - ERROR("xenpaging not supported in a PoD guest"); - break; - default: - PERROR("Error initialising shared page"); - break; - } - goto err; - } - - /* Open event channel */ - paging->vm_event.xce_handle = xenevtchn_open(NULL, 0); - if ( paging->vm_event.xce_handle == NULL ) - { - PERROR("Failed to open event channel"); - goto err; - } - - /* Bind event notification */ - rc = xenevtchn_bind_interdomain(paging->vm_event.xce_handle, - paging->vm_event.domain_id, - paging->vm_event.evtchn_port); - if ( rc < 0 ) - { - PERROR("Failed to bind event channel"); - goto err; - } - - paging->vm_event.port = rc; - - /* Initialise ring */ - SHARED_RING_INIT((vm_event_sring_t *)paging->vm_event.ring_page); - BACK_RING_INIT(&paging->vm_event.back_ring, - (vm_event_sring_t *)paging->vm_event.ring_page, - XC_PAGE_SIZE); - - /* Now that the ring is set, remove it from the guest's physmap */ - if ( xc_domain_decrease_reservation_exact(xch, - paging->vm_event.domain_id, 1, 0, &ring_pfn) ) - PERROR("Failed to remove ring from guest physmap"); - - /* Get max_pages from guest if not provided via cmdline */ - if ( !paging->max_pages ) - { - rc = xc_domain_getinfo_single(xch, paging->vm_event.domain_id, - &domain_info); - if ( rc < 0 ) - { - PERROR("Error getting domain info"); - goto err; - } - - /* Record number of max_pages */ - paging->max_pages = domain_info.max_pages; - } - - /* Allocate bitmap for tracking pages that have been paged out */ - paging->bitmap = bitmap_alloc(paging->max_pages); - if ( !paging->bitmap ) - { - PERROR("Error allocating bitmap"); - goto err; - } - DPRINTF("max_pages = %d\n", paging->max_pages); - - /* Allocate indicies for pagefile slots */ - paging->slot_to_gfn = calloc(paging->max_pages, sizeof(*paging->slot_to_gfn)); - paging->gfn_to_slot = calloc(paging->max_pages, sizeof(*paging->gfn_to_slot)); - if ( !paging->slot_to_gfn || !paging->gfn_to_slot ) - goto err; - - /* Allocate stack for known free slots in pagefile */ - paging->free_slot_stack = calloc(paging->max_pages, sizeof(*paging->free_slot_stack)); - if ( !paging->free_slot_stack ) - goto err; - - /* Initialise policy */ - rc = policy_init(paging); - if ( rc != 0 ) - { - PERROR("Error initialising policy"); - goto err; - } - - paging->paging_buffer = init_page(); - if ( !paging->paging_buffer ) - { - PERROR("Creating page aligned load buffer"); - goto err; - } - - /* Open file */ - paging->fd = open(filename, O_CREAT | O_TRUNC | O_RDWR, S_IRUSR | S_IWUSR); - if ( paging->fd < 0 ) - { - PERROR("failed to open file"); - goto err; - } - - return paging; - - err: - if ( paging ) - { - if ( paging->xs_handle ) - xs_close(paging->xs_handle); - if ( xch ) - xc_interface_close(xch); - if ( paging->logger ) - xtl_logger_destroy(paging->logger); - if ( paging->paging_buffer ) - { - munlock(paging->paging_buffer, XC_PAGE_SIZE); - free(paging->paging_buffer); - } - - if ( paging->vm_event.ring_page ) - { - munmap(paging->vm_event.ring_page, XC_PAGE_SIZE); - } - - free(dom_path); - free(watch_target_tot_pages); - free(paging->free_slot_stack); - free(paging->slot_to_gfn); - free(paging->gfn_to_slot); - free(paging->bitmap); - free(paging); - } - - return NULL; -} - -static void xenpaging_teardown(struct xenpaging *paging) -{ - int rc; - xc_interface *xch = paging->xc_handle; - - xs_unwatch(paging->xs_handle, watch_target_tot_pages, ""); - xs_unwatch(paging->xs_handle, "@releaseDomain", watch_token); - - paging->xc_handle = NULL; - /* Tear down domain paging in Xen */ - munmap(paging->vm_event.ring_page, XC_PAGE_SIZE); - rc = xc_mem_paging_disable(xch, paging->vm_event.domain_id); - if ( rc != 0 ) - { - PERROR("Error tearing down domain paging in xen"); - } - - /* Unbind VIRQ */ - rc = xenevtchn_unbind(paging->vm_event.xce_handle, paging->vm_event.port); - if ( rc != 0 ) - { - PERROR("Error unbinding event port"); - } - paging->vm_event.port = -1; - - /* Close event channel */ - rc = xenevtchn_close(paging->vm_event.xce_handle); - if ( rc != 0 ) - { - PERROR("Error closing event channel"); - } - paging->vm_event.xce_handle = NULL; - - /* Close connection to xenstore */ - xs_close(paging->xs_handle); - - /* Close connection to Xen */ - xc_interface_close(xch); - - xtl_logger_destroy(paging->logger); -} - -static void get_request(struct vm_event *vm_event, vm_event_request_t *req) -{ - vm_event_back_ring_t *back_ring; - RING_IDX req_cons; - - back_ring = &vm_event->back_ring; - req_cons = back_ring->req_cons; - - /* Copy request */ - memcpy(req, RING_GET_REQUEST(back_ring, req_cons), sizeof(*req)); - req_cons++; - - /* Update ring */ - back_ring->req_cons = req_cons; - back_ring->sring->req_event = req_cons + 1; -} - -static void put_response(struct vm_event *vm_event, vm_event_response_t *rsp) -{ - vm_event_back_ring_t *back_ring; - RING_IDX rsp_prod; - - back_ring = &vm_event->back_ring; - rsp_prod = back_ring->rsp_prod_pvt; - - /* Copy response */ - memcpy(RING_GET_RESPONSE(back_ring, rsp_prod), rsp, sizeof(*rsp)); - rsp_prod++; - - /* Update ring */ - back_ring->rsp_prod_pvt = rsp_prod; - RING_PUSH_RESPONSES(back_ring); -} - -/* Evict a given gfn - * Returns < 0 on fatal error - * Returns 0 on successful evict - * Returns > 0 if gfn can not be evicted - */ -static int xenpaging_evict_page(struct xenpaging *paging, unsigned long gfn, int slot) -{ - xc_interface *xch = paging->xc_handle; - void *page; - xen_pfn_t victim = gfn; - int ret; - struct xen_domctl domctl; - - /* Nominate page */ - ret = xc_mem_paging_nominate(xch, paging->vm_event.domain_id, gfn); - if ( ret < 0 ) - { - /* unpageable gfn is indicated by EBUSY */ - if ( errno == EBUSY ) - ret = 1; - else - PERROR("Error nominating page %lx", gfn); - goto out; - } - - /* Map page */ - page = xc_map_foreign_pages(xch, paging->vm_event.domain_id, PROT_READ, &victim, 1); - if ( page == NULL ) - { - PERROR("Error mapping page %lx", gfn); - ret = -1; - goto out; - } - - /* Copy page */ - ret = write_page(paging->fd, page, slot); - if ( ret < 0 ) - { - PERROR("Error copying page %lx", gfn); - munmap(page, XC_PAGE_SIZE); - ret = -1; - goto out; - } - - /* Release page */ - munmap(page, XC_PAGE_SIZE); - - /* Tell Xen to evict page */ - ret = xc_mem_paging_evict(xch, paging->vm_event.domain_id, gfn); - if ( ret < 0 ) - { - /* A gfn in use is indicated by EBUSY */ - if ( errno == EBUSY ) - { - ret = 1; - DPRINTF("Nominated page %lx busy", gfn); - } else - PERROR("Error evicting page %lx", gfn); - goto out; - } - - DPRINTF("evict_page > gfn %lx pageslot %d\n", gfn, slot); - /* Notify policy of page being paged out */ - policy_notify_paged_out(gfn); - - /* Update index */ - paging->slot_to_gfn[slot] = gfn; - paging->gfn_to_slot[gfn] = slot; - - /* Record number of evicted pages */ - paging->num_paged_out++; - - ret = 0; - - out: - return ret; -} - -static int xenpaging_resume_page(struct xenpaging *paging, vm_event_response_t *rsp, int notify_policy) -{ - /* Put the page info on the ring */ - put_response(&paging->vm_event, rsp); - - /* Notify policy of page being paged in */ - if ( notify_policy ) - { - /* - * Do not add gfn to mru list if the target is lower than mru size. - * This allows page-out of these gfns if the target grows again. - */ - if (paging->num_paged_out > paging->policy_mru_size) - policy_notify_paged_in(rsp->u.mem_paging.gfn); - else - policy_notify_paged_in_nomru(rsp->u.mem_paging.gfn); - - /* Record number of resumed pages */ - paging->num_paged_out--; - } - - /* Tell Xen page is ready */ - return xenevtchn_notify(paging->vm_event.xce_handle, paging->vm_event.port); -} - -static int xenpaging_populate_page(struct xenpaging *paging, unsigned long gfn, int i) -{ - xc_interface *xch = paging->xc_handle; - int ret; - unsigned char oom = 0; - - DPRINTF("populate_page < gfn %lx pageslot %d\n", gfn, i); - - /* Read page */ - ret = read_page(paging->fd, paging->paging_buffer, i); - if ( ret != 0 ) - { - PERROR("Error reading page"); - goto out; - } - - do - { - /* Tell Xen to allocate a page for the domain */ - ret = xc_mem_paging_load(xch, paging->vm_event.domain_id, gfn, paging->paging_buffer); - if ( ret < 0 ) - { - if ( errno == ENOMEM ) - { - if ( oom++ == 0 ) - DPRINTF("ENOMEM while preparing gfn %lx\n", gfn); - sleep(1); - continue; - } - PERROR("Error loading %lx during page-in", gfn); - ret = -1; - break; - } - } - while ( ret && !interrupted ); - - - out: - return ret; -} - -/* Trigger a page-in for a batch of pages */ -static void resume_pages(struct xenpaging *paging, int num_pages) -{ - xc_interface *xch = paging->xc_handle; - int i, num = 0; - - for ( i = 0; i < paging->max_pages && num < num_pages; i++ ) - { - if ( test_bit(i, paging->bitmap) ) - { - paging->pagein_queue[num] = i; - num++; - if ( num == XENPAGING_PAGEIN_QUEUE_SIZE ) - break; - } - } - /* num may be less than num_pages, caller has to try again */ - if ( num ) - page_in_trigger(); -} - -/* Evict one gfn and write it to the given slot - * Returns < 0 on fatal error - * Returns 0 on successful evict - * Returns > 0 if no gfn can be evicted - */ -static int evict_victim(struct xenpaging *paging, int slot) -{ - xc_interface *xch = paging->xc_handle; - unsigned long gfn; - static int num_paged_out; - int ret; - - do - { - gfn = policy_choose_victim(paging); - if ( gfn == INVALID_MFN ) - { - /* If the number did not change after last flush command then - * the command did not reach qemu yet, or qemu still processes - * the command, or qemu has nothing to release. - * Right now there is no need to issue the command again. - */ - if ( num_paged_out != paging->num_paged_out ) - { - DPRINTF("Flushing qemu cache\n"); - xenpaging_mem_paging_flush_ioemu_cache(paging); - num_paged_out = paging->num_paged_out; - } - ret = ENOSPC; - goto out; - } - - if ( interrupted ) - { - ret = EINTR; - goto out; - } - - ret = xenpaging_evict_page(paging, gfn, slot); - if ( ret < 0 ) - goto out; - } - while ( ret ); - - if ( test_and_set_bit(gfn, paging->bitmap) ) - ERROR("Page %lx has been evicted before", gfn); - - ret = 0; - - out: - return ret; -} - -/* Evict a batch of pages and write them to a free slot in the paging file - * Returns < 0 on fatal error - * Returns 0 if no gfn can be evicted - * Returns > 0 on successful evict - */ -static int evict_pages(struct xenpaging *paging, int num_pages) -{ - xc_interface *xch = paging->xc_handle; - int rc, slot, num = 0; - - /* Reuse known free slots */ - while ( paging->stack_count > 0 && num < num_pages ) - { - slot = paging->free_slot_stack[--paging->stack_count]; - rc = evict_victim(paging, slot); - if ( rc ) - { - num = rc < 0 ? -1 : num; - return num; - } - num++; - } - - /* Scan all slots slots for remainders */ - for ( slot = 0; slot < paging->max_pages && num < num_pages; slot++ ) - { - /* Slot is allocated */ - if ( paging->slot_to_gfn[slot] ) - continue; - - rc = evict_victim(paging, slot); - if ( rc ) - { - num = rc < 0 ? -1 : num; - break; - } - - num++; - } - return num; -} - -int main(int argc, char *argv[]) -{ - struct sigaction act; - struct xenpaging *paging; - vm_event_request_t req; - vm_event_response_t rsp; - int num, prev_num = 0; - int slot; - int tot_pages; - int rc; - xc_interface *xch; - - /* Initialise domain paging */ - paging = xenpaging_init(argc, argv); - if ( paging == NULL ) - { - fprintf(stderr, "Error initialising paging\n"); - return 1; - } - xch = paging->xc_handle; - - DPRINTF("starting %s for domain_id %u with pagefile %s\n", - argv[0], paging->vm_event.domain_id, filename); - - /* ensure that if we get a signal, we'll do cleanup, then exit */ - act.sa_handler = close_handler; - act.sa_flags = 0; - sigemptyset(&act.sa_mask); - sigaction(SIGHUP, &act, NULL); - sigaction(SIGTERM, &act, NULL); - sigaction(SIGINT, &act, NULL); - sigaction(SIGALRM, &act, NULL); - - /* listen for page-in events to stop pager */ - create_page_in_thread(paging); - - /* Swap pages in and out */ - while ( 1 ) - { - /* Wait for Xen to signal that a page needs paged in */ - rc = xenpaging_wait_for_event_or_timeout(paging); - if ( rc < 0 ) - { - ERROR("Error getting event"); - goto out; - } - else if ( rc != 0 ) - { - DPRINTF("Got event from Xen\n"); - } - - while ( RING_HAS_UNCONSUMED_REQUESTS(&paging->vm_event.back_ring) ) - { - /* Indicate possible error */ - rc = 1; - - get_request(&paging->vm_event, &req); - - if ( req.u.mem_paging.gfn > paging->max_pages ) - { - ERROR("Requested gfn %"PRIx64" higher than max_pages %x\n", - req.u.mem_paging.gfn, paging->max_pages); - goto out; - } - - /* Check if the page has already been paged in */ - if ( test_and_clear_bit(req.u.mem_paging.gfn, paging->bitmap) ) - { - /* Find where in the paging file to read from */ - slot = paging->gfn_to_slot[req.u.mem_paging.gfn]; - - /* Sanity check */ - if ( paging->slot_to_gfn[slot] != req.u.mem_paging.gfn ) - { - ERROR("Expected gfn %"PRIx64" in slot %d, but found gfn %lx\n", - req.u.mem_paging.gfn, slot, paging->slot_to_gfn[slot]); - goto out; - } - - if ( req.u.mem_paging.flags & MEM_PAGING_DROP_PAGE ) - { - DPRINTF("drop_page ^ gfn %"PRIx64" pageslot %d\n", - req.u.mem_paging.gfn, slot); - /* Notify policy of page being dropped */ - policy_notify_dropped(req.u.mem_paging.gfn); - } - else - { - /* Populate the page */ - if ( xenpaging_populate_page(paging, req.u.mem_paging.gfn, slot) < 0 ) - { - ERROR("Error populating page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - } - - /* Prepare the response */ - rsp.u.mem_paging.gfn = req.u.mem_paging.gfn; - rsp.vcpu_id = req.vcpu_id; - rsp.flags = req.flags; - - if ( xenpaging_resume_page(paging, &rsp, 1) < 0 ) - { - PERROR("Error resuming page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - - /* Clear this pagefile slot */ - paging->slot_to_gfn[slot] = 0; - - /* Record this free slot */ - paging->free_slot_stack[paging->stack_count++] = slot; - } - else - { - DPRINTF("page %s populated (domain = %d; vcpu = %d;" - " gfn = %"PRIx64"; paused = %d; evict_fail = %d)\n", - req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL ? "not" : "already", - paging->vm_event.domain_id, req.vcpu_id, req.u.mem_paging.gfn, - !!(req.flags & VM_EVENT_FLAG_VCPU_PAUSED) , - !!(req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL) ); - - /* Tell Xen to resume the vcpu */ - if (( req.flags & VM_EVENT_FLAG_VCPU_PAUSED ) || - ( req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL )) - { - /* Prepare the response */ - rsp.u.mem_paging.gfn = req.u.mem_paging.gfn; - rsp.vcpu_id = req.vcpu_id; - rsp.flags = req.flags; - - if ( xenpaging_resume_page(paging, &rsp, 0) < 0 ) - { - PERROR("Error resuming page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - } - } - } - - /* If interrupted, write all pages back into the guest */ - if ( interrupted == SIGTERM || interrupted == SIGINT ) - { - /* If no more pages to process, exit loop. */ - if ( !paging->num_paged_out ) - break; - - /* One more round if there are still pages to process. */ - resume_pages(paging, paging->num_paged_out); - - /* Resume main loop */ - continue; - } - - /* Exit main loop on any other signal */ - if ( interrupted ) - break; - - /* Indicate possible error */ - rc = 1; - - /* Check if the target has been reached already */ - tot_pages = xenpaging_get_tot_pages(paging); - if ( tot_pages < 0 ) - goto out; - - /* Resume all pages if paging is disabled or no target was set */ - if ( paging->target_tot_pages == 0 ) - { - if ( paging->num_paged_out ) - resume_pages(paging, paging->num_paged_out); - } - /* Evict more pages if target not reached */ - else if ( tot_pages > paging->target_tot_pages ) - { - num = tot_pages - paging->target_tot_pages; - if ( num != prev_num ) - { - DPRINTF("Need to evict %d pages to reach %d target_tot_pages\n", num, paging->target_tot_pages); - prev_num = num; - } - /* Limit the number of evicts to be able to process page-in requests */ - if ( num > 42 ) - { - paging->use_poll_timeout = 0; - num = 42; - } - if ( evict_pages(paging, num) < 0 ) - goto out; - } - /* Resume some pages if target not reached */ - else if ( tot_pages < paging->target_tot_pages && paging->num_paged_out ) - { - num = paging->target_tot_pages - tot_pages; - if ( num != prev_num ) - { - DPRINTF("Need to resume %d pages to reach %d target_tot_pages\n", num, paging->target_tot_pages); - prev_num = num; - } - resume_pages(paging, num); - } - /* Now target was reached, enable poll() timeout */ - else - { - paging->use_poll_timeout = 1; - } - - } - - /* No error */ - rc = 0; - - DPRINTF("xenpaging got signal %d\n", interrupted); - - out: - close(paging->fd); - unlink_pagefile(); - - /* Tear down domain paging */ - xenpaging_teardown(paging); - - return rc ? 2 : 0; -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/xenpaging.h b/tools/xenpaging/xenpaging.h deleted file mode 100644 index e0fc7b31b863..000000000000 --- a/tools/xenpaging/xenpaging.h +++ /dev/null @@ -1,152 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/xenpaging.h - * - * Xen domain paging. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __XEN_PAGING2_H__ -#define __XEN_PAGING2_H__ - -#include -#include -#include -#include -#include -#include - -#include -#define XC_WANT_COMPAT_MAP_FOREIGN_API -#include -// #include -#include -#include - -#define XENPAGING_PAGEIN_QUEUE_SIZE 64 - -struct vm_event { - domid_t domain_id; - xenevtchn_handle *xce_handle; - int port; - vm_event_back_ring_t back_ring; - uint32_t evtchn_port; - void *ring_page; -}; - -struct xenpaging { - xc_interface *xc_handle; - xentoollog_logger *logger; - struct xs_handle *xs_handle; - - unsigned long *bitmap; - - unsigned long *slot_to_gfn; - int *gfn_to_slot; - - void *paging_buffer; - - struct vm_event vm_event; - int fd; - /* number of pages for which data structures were allocated */ - int max_pages; - int num_paged_out; - int target_tot_pages; - int policy_mru_size; - int use_poll_timeout; - int debug; - int stack_count; - int *free_slot_stack; - unsigned long pagein_queue[XENPAGING_PAGEIN_QUEUE_SIZE]; -}; - -#define DPRINTF(msg, args...) xtl_log(paging->logger, XTL_DETAIL, 0, \ - "paging", msg, ## args) -#define ERROR(msg, args...) xtl_log(paging->logger, XTL_ERROR, -1, \ - "paging", msg, ## args) -#define PERROR(msg, args...) xtl_log(paging->logger, XTL_ERROR, -1, \ - "paging", msg "(%d = %s)", ## args, \ - errno, strerror(errno)) - -extern void create_page_in_thread(struct xenpaging *paging); -extern void page_in_trigger(void); - -#define BITS_PER_LONG (sizeof(unsigned long) * 8) -#define ORDER_LONG (sizeof(unsigned long) == 4 ? 5 : 6) - -#define BITMAP_ENTRY(_nr,_bmap) ((_bmap))[(_nr) / 8] -#define BITMAP_SHIFT(_nr) ((_nr) % 8) - -static inline int bitmap_size(int nr_bits) -{ - return (nr_bits + 7) / 8; -} - -static inline void *bitmap_alloc(int nr_bits) -{ - return calloc(1, bitmap_size(nr_bits)); -} - -static inline void bitmap_clear(void *addr, int nr_bits) -{ - memset(addr, 0, bitmap_size(nr_bits)); -} - -static inline int test_bit(int nr, const void *_addr) -{ - const char *addr = _addr; - return (BITMAP_ENTRY(nr, addr) >> BITMAP_SHIFT(nr)) & 1; -} - -static inline void clear_bit(int nr, void *_addr) -{ - char *addr = _addr; - BITMAP_ENTRY(nr, addr) &= ~(1UL << BITMAP_SHIFT(nr)); -} - -static inline void set_bit(int nr, void *_addr) -{ - char *addr = _addr; - BITMAP_ENTRY(nr, addr) |= (1UL << BITMAP_SHIFT(nr)); -} - -static inline int test_and_clear_bit(int nr, void *addr) -{ - int oldbit = test_bit(nr, addr); - clear_bit(nr, addr); - return oldbit; -} - -static inline int test_and_set_bit(int nr, void *addr) -{ - int oldbit = test_bit(nr, addr); - set_bit(nr, addr); - return oldbit; -} - -#endif // __XEN_PAGING_H__ - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb73a..b02639d84964 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -84,10 +84,6 @@ config VIRIDIAN If unsure, say Y. -config MEM_PAGING - bool "Xen memory paging support (UNSUPPORTED)" if UNSUPPORTED - depends on VM_EVENT - config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index 3b53471af0d9..1758f37ed5b0 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -260,12 +260,6 @@ static int set_mem_type(struct domain *d, p2m_type_t ot; get_gfn_unshare(d, pfn, &ot); - if ( p2m_is_paging(ot) ) - { - put_gfn(d, pfn); - p2m_mem_paging_populate(d, _gfn(pfn)); - return -EAGAIN; - } if ( p2m_is_shared(ot) ) rc = -EAGAIN; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..1abff57d2c32 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -743,7 +743,6 @@ static void *hvmemul_map_linear_addr( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: err = ERR_PTR(~X86EMUL_RETRY); goto out; @@ -896,7 +895,7 @@ static int hvmemul_linear_to_phys( } else if ( (pfn = paging_gva_to_gfn(curr, addr, &pfec)) == gfn_x(INVALID_GFN) ) { - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) return X86EMUL_RETRY; *reps = 0; x86_emul_pagefault(pfec, addr, &hvmemul_ctxt->ctxt); @@ -915,7 +914,7 @@ static int hvmemul_linear_to_phys( if ( (npfn == gfn_x(INVALID_GFN)) || (npfn != (pfn + (reverse ? -i : i))) ) { - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) return X86EMUL_RETRY; done /= bytes_per_rep; if ( done == 0 ) @@ -1316,7 +1315,6 @@ static int linear_read(unsigned long addr, unsigned int bytes, void *p_data, hvmemul_ctxt, start, known_gla(addr, bytes, pfec)); - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; @@ -1373,7 +1371,6 @@ static int linear_write(unsigned long addr, unsigned int bytes, void *p_data, hvmemul_ctxt, start, known_gla(addr, bytes, pfec)); - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; @@ -2098,7 +2095,6 @@ static int cf_check hvmemul_rep_movs( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: return X86EMUL_RETRY; case HVMTRANS_okay: @@ -2218,7 +2214,6 @@ static int cf_check hvmemul_rep_stos( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: return X86EMUL_RETRY; case HVMTRANS_okay: diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index f759a397c557..ef8f7936d68e 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1813,7 +1813,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, struct vcpu *curr = current; struct domain *currd = curr->domain; struct p2m_domain *p2m, *hostp2m; - int rc, fall_through = 0, paged = 0; + int rc, fall_through = 0; bool sharing_enomem = false; vm_event_request_t *req_ptr = NULL; bool sync = false; @@ -2004,12 +2004,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, goto out_put_gfn; } -#ifdef CONFIG_MEM_PAGING - /* Check if the page has been paged out */ - if ( p2m_is_paged(p2mt) || (p2mt == p2m_ram_paging_out) ) - paged = 1; -#endif - #ifdef CONFIG_MEM_SHARING /* Mem sharing: if still shared on write access then its enomem */ if ( npfec.write_access && p2m_is_shared(p2mt) ) @@ -2063,8 +2057,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, * sleep on event ring wait queues, and we must not hold * locks in such circumstance. */ - if ( paged ) - p2m_mem_paging_populate(currd, _gfn(gfn)); if ( sharing_enomem ) { @@ -2823,7 +2815,7 @@ static void *hvm_map_entry(unsigned long va, bool *writable) */ pfec = PFEC_page_present; gfn = paging_gva_to_gfn(current, va, &pfec); - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) goto fail; v = hvm_map_guest_frame_rw(gfn, 0, writable); @@ -3258,9 +3250,6 @@ enum hvm_translation_result hvm_translate_get_page( if ( gfn_eq(gfn, INVALID_GFN) ) { - if ( pfec & PFEC_page_paged ) - return HVMTRANS_gfn_paged_out; - if ( pfec & PFEC_page_shared ) return HVMTRANS_gfn_shared; @@ -3294,12 +3283,6 @@ enum hvm_translation_result hvm_translate_get_page( if ( !page ) return HVMTRANS_bad_gfn_to_mfn; - if ( p2m_is_paging(p2mt) ) - { - put_page(page); - p2m_mem_paging_populate(v->domain, gfn); - return HVMTRANS_gfn_paged_out; - } if ( p2m_is_shared(p2mt) ) { put_page(page); diff --git a/xen/arch/x86/hvm/intercept.c b/xen/arch/x86/hvm/intercept.c index da22c386763e..639dee7f5c96 100644 --- a/xen/arch/x86/hvm/intercept.c +++ b/xen/arch/x86/hvm/intercept.c @@ -137,7 +137,6 @@ int hvm_process_io_intercept(const struct hvm_io_handler *handler, /* Drop the write as real hardware would. */ continue; case HVMTRANS_bad_linear_to_gfn: - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: ASSERT_UNREACHABLE(); @@ -170,7 +169,6 @@ int hvm_process_io_intercept(const struct hvm_io_handler *handler, data = ~0; break; case HVMTRANS_bad_linear_to_gfn: - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: ASSERT_UNREACHABLE(); diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index e4cdfe55c18e..1d6a1f5ed258 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -715,7 +715,6 @@ static void nvmx_update_apic_access_address(struct vcpu *v) apic_gpfn = get_vvmcs(v, APIC_ACCESS_ADDR) >> PAGE_SHIFT; apic_pg = get_page_from_gfn(v->domain, apic_gpfn, &p2mt, P2M_ALLOC); - ASSERT(apic_pg && !p2m_is_paging(p2mt)); __vmwrite(APIC_ACCESS_ADDR, page_to_maddr(apic_pg)); put_page(apic_pg); } @@ -736,7 +735,6 @@ static void nvmx_update_virtual_apic_address(struct vcpu *v) vapic_gpfn = get_vvmcs(v, VIRTUAL_APIC_PAGE_ADDR) >> PAGE_SHIFT; vapic_pg = get_page_from_gfn(v->domain, vapic_gpfn, &p2mt, P2M_ALLOC); - ASSERT(vapic_pg && !p2m_is_paging(p2mt)); __vmwrite(VIRTUAL_APIC_PAGE_ADDR, page_to_maddr(vapic_pg)); put_page(vapic_pg); } diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/asm/hvm/support.h index 9e9fa6295567..0728d19ada38 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -48,7 +48,6 @@ enum hvm_translation_result { HVMTRANS_bad_linear_to_gfn, HVMTRANS_bad_gfn_to_mfn, HVMTRANS_unhandleable, - HVMTRANS_gfn_paged_out, HVMTRANS_gfn_shared, HVMTRANS_need_retry, }; diff --git a/xen/arch/x86/include/asm/mem_paging.h b/xen/arch/x86/include/asm/mem_paging.h deleted file mode 100644 index 2c618925d01d..000000000000 --- a/xen/arch/x86/include/asm/mem_paging.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/****************************************************************************** - * include/asm-x86/mem_paging.h - * - * Memory paging support. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - */ - -#ifndef __ASM_X86_MEM_PAGING_H__ -#define __ASM_X86_MEM_PAGING_H__ - -int mem_paging_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_paging_op_t) arg); - -#endif /*__ASM_X86_MEM_PAGING_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index 3a5a5fd43c2a..2d2cd5f5e9e1 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -60,9 +60,6 @@ typedef enum { * be used in 64-bit builds */ p2m_grant_map_rw = 7, /* Read/write grant mapping */ p2m_grant_map_ro = 8, /* Read-only grant mapping */ - p2m_ram_paging_out = 9, /* Memory that is being paged out */ - p2m_ram_paged = 10, /* Memory that has been paged out */ - p2m_ram_paging_in = 11, /* Memory that is being paged in */ p2m_ram_shared = 12, /* Shared or sharable memory */ p2m_ram_broken = 13, /* Broken page, access cause domain crash */ p2m_map_foreign = 14, /* ram pages from foreign domain */ @@ -81,18 +78,13 @@ typedef unsigned int p2m_query_t; #define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw) \ | p2m_to_mask(p2m_ram_logdirty) \ | p2m_to_mask(p2m_ram_ro) \ - | p2m_to_mask(p2m_ram_paging_out) \ - | p2m_to_mask(p2m_ram_paged) \ - | p2m_to_mask(p2m_ram_paging_in) \ | p2m_to_mask(p2m_ram_shared) \ | p2m_to_mask(p2m_ioreq_server)) /* Types that represent a physmap hole that is ok to replace with a shared * entry */ #define P2M_HOLE_TYPES (p2m_to_mask(p2m_mmio_dm) \ - | p2m_to_mask(p2m_invalid) \ - | p2m_to_mask(p2m_ram_paging_in) \ - | p2m_to_mask(p2m_ram_paged)) + | p2m_to_mask(p2m_invalid)) /* Grant mapping types, which map to a real machine frame in another * VM */ @@ -120,21 +112,6 @@ typedef unsigned int p2m_query_t; #define P2M_POD_TYPES (p2m_to_mask(p2m_populate_on_demand)) -/* Pageable types */ -#define P2M_PAGEABLE_TYPES (p2m_to_mask(p2m_ram_rw) \ - | p2m_to_mask(p2m_ram_logdirty) ) - -#ifdef CONFIG_MEM_PAGING -#define P2M_PAGING_TYPES (p2m_to_mask(p2m_ram_paging_out) \ - | p2m_to_mask(p2m_ram_paged) \ - | p2m_to_mask(p2m_ram_paging_in)) - -#define P2M_PAGED_TYPES (p2m_to_mask(p2m_ram_paged)) -#else -#define P2M_PAGING_TYPES 0 -#define P2M_PAGED_TYPES 0 -#endif - /* Shared types */ #ifdef CONFIG_MEM_SHARING /* XXX: Sharable types could include p2m_ram_ro too, but we would need to @@ -154,8 +131,7 @@ typedef unsigned int p2m_query_t; /* Valid types not necessarily associated with a (valid) MFN. */ #define P2M_INVALID_MFN_TYPES (P2M_POD_TYPES \ - | p2m_to_mask(p2m_mmio_direct) \ - | P2M_PAGING_TYPES) + | p2m_to_mask(p2m_mmio_direct)) /* Broken type: the frame backing this pfn has failed in hardware * and must not be touched. */ @@ -175,9 +151,6 @@ typedef unsigned int p2m_query_t; implementations, there's no way of synchronising against that. */ #define p2m_is_valid(_t) (p2m_to_mask(_t) & \ (P2M_RAM_TYPES | p2m_to_mask(p2m_mmio_direct))) -#define p2m_is_pageable(_t) (p2m_to_mask(_t) & P2M_PAGEABLE_TYPES) -#define p2m_is_paging(_t) (p2m_to_mask(_t) & P2M_PAGING_TYPES) -#define p2m_is_paged(_t) (p2m_to_mask(_t) & P2M_PAGED_TYPES) #define p2m_is_sharable(_t) (p2m_to_mask(_t) & P2M_SHARABLE_TYPES) #define p2m_is_shared(_t) (p2m_to_mask(_t) & P2M_SHARED_TYPES) #define p2m_is_special(_t) (p2m_to_mask(_t) & P2M_SPECIAL_TYPES) @@ -775,14 +748,6 @@ static inline int relinquish_p2m_mapping(struct domain *d) /* Modify p2m table for shared gfn */ int set_shared_p2m_entry(struct domain *d, unsigned long gfn_l, mfn_t mfn); -/* Tell xenpaging to drop a paged out frame */ -void p2m_mem_paging_drop_page(struct domain *d, gfn_t gfn, p2m_type_t p2mt); -/* Start populating a paged out frame */ -void p2m_mem_paging_populate(struct domain *d, gfn_t gfn); -/* Resume normal operation (in case a domain was paused) */ -struct vm_event_st; -void p2m_mem_paging_resume(struct domain *d, struct vm_event_st *rsp); - /* * Internal functions, only called by other p2m code */ diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c37bd7a17658..ca401604d0d9 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -41,7 +41,6 @@ #define PFEC_shstk (_AC(1,U) << 6) #define PFEC_arch_mask (_AC(0xffff,U)) /* Architectural PFEC values. */ /* Internally used only flags. */ -#define PFEC_page_paged (1U<<16) #define PFEC_page_shared (1U<<17) #define PFEC_implicit (1U<<18) /* Pagewalk input for ldt/gdt/idt/tr accesses. */ #define PFEC_synth_mask (~PFEC_arch_mask) /* Synthetic PFEC values. */ diff --git a/xen/arch/x86/livepatch.c b/xen/arch/x86/livepatch.c index be40f625d206..01062dde7c03 100644 --- a/xen/arch/x86/livepatch.c +++ b/xen/arch/x86/livepatch.c @@ -43,10 +43,6 @@ int arch_livepatch_safety_check(void) #ifdef CONFIG_MEM_SHARING if ( has_active_waitqueue(d->vm_event_share) ) goto fail; -#endif -#ifdef CONFIG_MEM_PAGING - if ( has_active_waitqueue(d->vm_event_paging) ) - goto fail; #endif if ( has_active_waitqueue(d->vm_event_monitor) ) goto fail; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b2b03da52b85..cbf955ee973b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -2183,17 +2183,6 @@ static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e, page = get_page_from_gfn(pg_dom, gfn_x(gfn), &p2mt, q); - if ( p2m_is_paged(p2mt) ) - { - if ( page ) - put_page(page); - p2m_mem_paging_populate(pg_dom, gfn); - return -ENOENT; - } - - if ( p2mt == p2m_ram_paging_in && !page ) - return -ENOENT; - /* Did our attempt to unshare fail? */ if ( (q & P2M_UNSHARE) && p2m_is_shared(p2mt) ) { @@ -4110,14 +4099,8 @@ long do_mmu_update( { if ( page ) put_page(page); - if ( p2m_is_paged(p2mt) ) - { - p2m_mem_paging_populate(pt_owner, _gfn(gmfn)); - rc = -ENOENT; - } - else - gdprintk(XENLOG_WARNING, - "Could not get page for normal update\n"); + gdprintk(XENLOG_WARNING, + "Could not get page for normal update\n"); break; } diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e840945..3fb2e53aeb4d 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -5,7 +5,6 @@ obj-$(CONFIG_ALTP2M) += altp2m.o obj-$(CONFIG_HVM) += guest_walk_2.o guest_walk_3.o guest_walk_4.o obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o obj-$(CONFIG_VM_EVENT) += mem_access.o -obj-$(CONFIG_MEM_PAGING) += mem_paging.o obj-$(CONFIG_MEM_SHARING) += mem_sharing.o obj-$(CONFIG_HVM) += nested.o obj-$(CONFIG_HVM) += p2m.o diff --git a/xen/arch/x86/mm/altp2m.c b/xen/arch/x86/mm/altp2m.c index 0bc9b9ad2f52..ac9f7437843b 100644 --- a/xen/arch/x86/mm/altp2m.c +++ b/xen/arch/x86/mm/altp2m.c @@ -76,7 +76,7 @@ int altp2m_vcpu_enable_ve(struct vcpu *v, gfn_t gfn) * pageable() predicate for this, due to it having the same properties * that we want. */ - if ( !p2m_is_pageable(p2mt) || is_special_page(pg) ) + if ( is_special_page(pg) ) { rc = -EINVAL; goto err; diff --git a/xen/arch/x86/mm/guest_walk.c b/xen/arch/x86/mm/guest_walk.c index f48c3ef75f48..4ab1896fda28 100644 --- a/xen/arch/x86/mm/guest_walk.c +++ b/xen/arch/x86/mm/guest_walk.c @@ -547,15 +547,6 @@ void *map_domain_gfn(struct p2m_domain *p2m, gfn_t gfn, mfn_t *mfn, page = paging_mode_translate(p2m->domain) ? p2m_get_page_from_gfn(p2m, gfn, &p2mt, NULL, q) : get_page_from_gfn(p2m->domain, gfn_x(gfn), &p2mt, q); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - if ( page ) - put_page(page); - p2m_mem_paging_populate(p2m->domain, gfn); - *pfec = PFEC_page_paged; - return NULL; - } if ( p2m_is_shared(p2mt) ) { if ( page ) diff --git a/xen/arch/x86/mm/hap/guest_walk.c b/xen/arch/x86/mm/hap/guest_walk.c index d1b7c5762c9e..5d85c97b0605 100644 --- a/xen/arch/x86/mm/hap/guest_walk.c +++ b/xen/arch/x86/mm/hap/guest_walk.c @@ -48,15 +48,6 @@ unsigned long cf_check hap_p2m_ga_to_gfn(GUEST_PAGING_LEVELS)( top_gfn = _gfn(cr3 >> PAGE_SHIFT); top_page = p2m_get_page_from_gfn(p2m, top_gfn, &p2mt, NULL, P2M_ALLOC | P2M_UNSHARE); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - *pfec = PFEC_page_paged; - if ( top_page ) - put_page(top_page); - p2m_mem_paging_populate(p2m->domain, gaddr_to_gfn(cr3)); - return gfn_x(INVALID_GFN); - } if ( p2m_is_shared(p2mt) ) { *pfec = PFEC_page_shared; @@ -92,13 +83,6 @@ unsigned long cf_check hap_p2m_ga_to_gfn(GUEST_PAGING_LEVELS)( P2M_ALLOC | P2M_UNSHARE); if ( page ) put_page(page); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - *pfec = PFEC_page_paged; - p2m_mem_paging_populate(p2m->domain, gfn); - return gfn_x(INVALID_GFN); - } if ( p2m_is_shared(p2mt) ) { *pfec = PFEC_page_shared; diff --git a/xen/arch/x86/mm/hap/nested_ept.c b/xen/arch/x86/mm/hap/nested_ept.c index d88d677825f1..f1d021725b09 100644 --- a/xen/arch/x86/mm/hap/nested_ept.c +++ b/xen/arch/x86/mm/hap/nested_ept.c @@ -190,11 +190,6 @@ nept_walk_tables(struct vcpu *v, unsigned long l2ga, ept_walk_t *gw) goto out; map_err: - if ( rc == PFEC_page_paged ) - { - ret = EPT_TRANSLATE_RETRY; - goto out; - } /* fall through to misconfig error */ misconfig_err: ret = EPT_TRANSLATE_MISCONFIG; diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c index 255fba7e1cac..681dc238156f 100644 --- a/xen/arch/x86/mm/hap/nested_hap.c +++ b/xen/arch/x86/mm/hap/nested_hap.c @@ -126,7 +126,7 @@ static int nestedhap_walk_L0_p2m( if ( npfec.write_access && p2m_is_readonly(*p2mt) ) goto out; - if ( p2m_is_paging(*p2mt) || p2m_is_shared(*p2mt) || !p2m_is_ram(*p2mt) ) + if ( p2m_is_shared(*p2mt) || !p2m_is_ram(*p2mt) ) goto out; if ( !mfn_valid(mfn) ) diff --git a/xen/arch/x86/mm/mem_paging.c b/xen/arch/x86/mm/mem_paging.c deleted file mode 100644 index 33929b526ab9..000000000000 --- a/xen/arch/x86/mm/mem_paging.c +++ /dev/null @@ -1,487 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/****************************************************************************** - * arch/x86/mm/mem_paging.c - * - * Memory paging support. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - */ - -#include -#include - -#include -#include - -#include - -#include "mm-locks.h" - -/* - * p2m_mem_paging_drop_page - Tell pager to drop its reference to a paged page - * @d: guest domain - * @gfn: guest page to drop - * - * p2m_mem_paging_drop_page() will notify the pager that a paged-out gfn was - * released by the guest. The pager is supposed to drop its reference of the - * gfn. - */ -void p2m_mem_paging_drop_page(struct domain *d, gfn_t gfn, p2m_type_t p2mt) -{ - vm_event_request_t req = { - .reason = VM_EVENT_REASON_MEM_PAGING, - .u.mem_paging.gfn = gfn_x(gfn) - }; - - /* - * We allow no ring in this unique case, because it won't affect - * correctness of the guest execution at this point. If this is the only - * page that happens to be paged-out, we'll be okay.. but it's likely the - * guest will crash shortly anyways. - */ - int rc = vm_event_claim_slot(d, d->vm_event_paging); - - if ( rc < 0 ) - return; - - /* Send release notification to pager */ - req.u.mem_paging.flags = MEM_PAGING_DROP_PAGE; - - /* Update stats unless the page hasn't yet been evicted */ - if ( p2mt != p2m_ram_paging_out ) - atomic_dec(&d->paged_pages); - else - /* Evict will fail now, tag this request for pager */ - req.u.mem_paging.flags |= MEM_PAGING_EVICT_FAIL; - - vm_event_put_request(d, d->vm_event_paging, &req); -} - -/* - * p2m_mem_paging_populate - Tell pager to populate a paged page - * @d: guest domain - * @gfn: guest page in paging state - * - * p2m_mem_paging_populate() will notify the pager that a page in any of the - * paging states needs to be written back into the guest. - * This function needs to be called whenever gfn_to_mfn() returns any of the p2m - * paging types because the gfn may not be backed by a mfn. - * - * The gfn can be in any of the paging states, but the pager needs only be - * notified when the gfn is in the paging-out path (paging_out or paged). This - * function may be called more than once from several vcpus. If the vcpu belongs - * to the guest, the vcpu must be stopped and the pager notified that the vcpu - * was stopped. The pager needs to handle several requests for the same gfn. - * - * If the gfn is not in the paging-out path and the vcpu does not belong to the - * guest, nothing needs to be done and the function assumes that a request was - * already sent to the pager. In this case the caller has to try again until the - * gfn is fully paged in again. - */ -void p2m_mem_paging_populate(struct domain *d, gfn_t gfn) -{ - struct vcpu *v = current; - vm_event_request_t req = { - .reason = VM_EVENT_REASON_MEM_PAGING, - .u.mem_paging.gfn = gfn_x(gfn) - }; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int rc = vm_event_claim_slot(d, d->vm_event_paging); - - /* We're paging. There should be a ring. */ - if ( rc == -EOPNOTSUPP ) - { - gdprintk(XENLOG_ERR, "%pd paging gfn %"PRI_gfn" yet no ring in place\n", - d, gfn_x(gfn)); - /* Prevent the vcpu from faulting repeatedly on the same gfn */ - if ( v->domain == d ) - vcpu_pause_nosync(v); - domain_crash(d); - return; - } - else if ( rc < 0 ) - return; - - /* Fix p2m mapping */ - gfn_lock(p2m, gfn, 0); - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - /* Allow only nominated or evicted pages to enter page-in path */ - if ( p2mt == p2m_ram_paging_out || p2mt == p2m_ram_paged ) - { - /* Evict will fail now, tag this request for pager */ - if ( p2mt == p2m_ram_paging_out ) - req.u.mem_paging.flags |= MEM_PAGING_EVICT_FAIL; - - rc = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, p2m_ram_paging_in, a); - } - gfn_unlock(p2m, gfn, 0); - if ( rc < 0 ) - goto out_cancel; - - /* Pause domain if request came from guest and gfn has paging type */ - if ( p2m_is_paging(p2mt) && v->domain == d ) - { - vm_event_vcpu_pause(v); - req.flags |= VM_EVENT_FLAG_VCPU_PAUSED; - } - /* No need to inform pager if the gfn is not in the page-out path */ - else if ( p2mt != p2m_ram_paging_out && p2mt != p2m_ram_paged ) - { - /* gfn is already on its way back and vcpu is not paused */ - out_cancel: - vm_event_cancel_slot(d, d->vm_event_paging); - return; - } - - /* Send request to pager */ - req.u.mem_paging.p2mt = p2mt; - req.vcpu_id = v->vcpu_id; - - vm_event_put_request(d, d->vm_event_paging, &req); -} - -/* - * p2m_mem_paging_resume - Resume guest gfn - * @d: guest domain - * @rsp: vm_event response received - * - * p2m_mem_paging_resume() will forward the p2mt of a gfn to ram_rw. It is - * called by the pager. - * - * The gfn was previously either evicted and populated, or nominated and - * populated. If the page was evicted the p2mt will be p2m_ram_paging_in. If - * the page was just nominated the p2mt will be p2m_ram_paging_in_start because - * the pager did not call prepare(). - * - * If the gfn was dropped the vcpu needs to be unpaused. - */ -void p2m_mem_paging_resume(struct domain *d, struct vm_event_st *rsp) -{ - struct p2m_domain *p2m = p2m_get_hostp2m(d); - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - - /* Fix p2m entry if the page was not dropped */ - if ( !(rsp->u.mem_paging.flags & MEM_PAGING_DROP_PAGE) ) - { - gfn_t gfn = _gfn(rsp->u.mem_access.gfn); - - gfn_lock(p2m, gfn, 0); - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - /* - * Allow only pages which were prepared properly, or pages which - * were nominated but not evicted. - */ - if ( mfn_valid(mfn) && (p2mt == p2m_ram_paging_in) ) - { - int rc = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, - paging_mode_log_dirty(d) ? p2m_ram_logdirty - : p2m_ram_rw, a); - - if ( !rc ) - set_gpfn_from_mfn(mfn_x(mfn), gfn_x(gfn)); - } - gfn_unlock(p2m, gfn, 0); - } -} - -/* - * nominate - Mark a guest page as to-be-paged-out - * @d: guest domain - * @gfn: guest page to nominate - * - * Returns 0 for success or negative errno values if gfn is not pageable. - * - * nominate() is called by the pager and checks if a guest page can be paged - * out. If the following conditions are met the p2mt will be changed: - * - the gfn is backed by a mfn - * - the p2mt of the gfn is pageable - * - the mfn is not used for IO - * - the mfn has exactly one user and has no special meaning - * - * Once the p2mt is changed the page is readonly for the guest. On success the - * pager can write the page contents to disk and later evict the page. - */ -static int nominate(struct domain *d, gfn_t gfn) -{ - struct page_info *page; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - int ret = -EBUSY; - - gfn_lock(p2m, gfn, 0); - - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - - /* Check if mfn is valid */ - if ( !mfn_valid(mfn) ) - goto out; - - /* Check p2m type */ - if ( !p2m_is_pageable(p2mt) ) - goto out; - - /* Check for io memory page */ - if ( is_iomem_page(mfn) ) - goto out; - - /* Check page count and type */ - page = mfn_to_page(mfn); - if ( (page->count_info & (PGC_count_mask | PGC_allocated)) != - (1 | PGC_allocated) ) - goto out; - - if ( (page->u.inuse.type_info & PGT_count_mask) != 0 ) - goto out; - - /* Fix p2m entry */ - ret = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, p2m_ram_paging_out, a); - - out: - gfn_unlock(p2m, gfn, 0); - return ret; -} - -/* - * evict - Mark a guest page as paged-out - * @d: guest domain - * @gfn: guest page to evict - * - * Returns 0 for success or negative errno values if eviction is not possible. - * - * evict() is called by the pager and will free a guest page and release it - * back to Xen. If the following conditions are met the page can be freed: - * - the gfn is backed by a mfn - * - the gfn was nominated - * - the mfn has still exactly one user and has no special meaning - * - * After successful nomination some other process could have mapped the page. In - * this case eviction can not be done. If the gfn was populated before the pager - * could evict it, eviction can not be done either. In this case the gfn is - * still backed by a mfn. - */ -static int evict(struct domain *d, gfn_t gfn) -{ - struct page_info *page; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int ret = -EBUSY; - - gfn_lock(p2m, gfn, 0); - - /* Get mfn */ - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - if ( unlikely(!mfn_valid(mfn)) ) - goto out; - - /* Allow only nominated pages */ - if ( p2mt != p2m_ram_paging_out ) - goto out; - - /* Get the page so it doesn't get modified under Xen's feet */ - page = mfn_to_page(mfn); - if ( unlikely(!get_page(page, d)) ) - goto out; - - /* Check page count and type once more */ - if ( (page->count_info & (PGC_count_mask | PGC_allocated)) != - (2 | PGC_allocated) ) - goto out_put; - - if ( (page->u.inuse.type_info & PGT_count_mask) != 0 ) - goto out_put; - - /* Decrement guest domain's ref count of the page */ - put_page_alloc_ref(page); - - /* Remove mapping from p2m table */ - ret = p2m_set_entry(p2m, gfn, INVALID_MFN, PAGE_ORDER_4K, - p2m_ram_paged, a); - - /* Track number of paged gfns */ - atomic_inc(&d->paged_pages); - - out_put: - /* Put the page back so it gets freed */ - put_page(page); - - out: - gfn_unlock(p2m, gfn, 0); - return ret; -} - -/* - * prepare - Allocate a new page for the guest - * @d: guest domain - * @gfn: guest page in paging state - * - * prepare() will allocate a new page for the guest if the gfn is not backed - * by a mfn. It is called by the pager. - * It is required that the gfn was already populated. The gfn may already have a - * mfn if populate was called for gfn which was nominated but not evicted. In - * this case only the p2mt needs to be forwarded. - */ -static int prepare(struct domain *d, gfn_t gfn, - XEN_GUEST_HANDLE_64(const_uint8) buffer) -{ - struct page_info *page = NULL; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int ret, page_extant = 1; - - if ( !guest_handle_okay(buffer, PAGE_SIZE) ) - return -EINVAL; - - gfn_lock(p2m, gfn, 0); - - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - - ret = -ENOENT; - /* Allow missing pages */ - if ( (p2mt != p2m_ram_paging_in) && (p2mt != p2m_ram_paged) ) - goto out; - - /* Allocate a page if the gfn does not have one yet */ - if ( !mfn_valid(mfn) ) - { - void *guest_map; - - /* If the user did not provide a buffer, we disallow */ - ret = -EINVAL; - if ( unlikely(guest_handle_is_null(buffer)) ) - goto out; - /* Get a free page */ - ret = -ENOMEM; - page_alloc_mm_pre_lock(d); - page = alloc_domheap_page(d, 0); - if ( unlikely(page == NULL) ) - goto out; - if ( unlikely(!get_page(page, d)) ) - { - /* - * The domain can't possibly know about this page yet, so failure - * here is a clear indication of something fishy going on. - */ - gprintk(XENLOG_ERR, - "%pd: fresh page for GFN %"PRI_gfn" in unexpected state\n", - d, gfn_x(gfn)); - domain_crash(d); - page = NULL; - goto out; - } - mfn = page_to_mfn(page); - page_extant = 0; - - guest_map = map_domain_page(mfn); - ret = copy_from_guest(guest_map, buffer, PAGE_SIZE); - unmap_domain_page(guest_map); - if ( ret ) - { - ret = -EFAULT; - goto out; - } - } - - /* - * Make the page already guest-accessible. If the pager still has a - * pending resume operation, it will be idempotent p2m entry-wise, but - * will unpause the vcpu. - */ - ret = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, - paging_mode_log_dirty(d) ? p2m_ram_logdirty - : p2m_ram_rw, a); - if ( !ret ) - { - set_gpfn_from_mfn(mfn_x(mfn), gfn_x(gfn)); - - if ( !page_extant ) - atomic_dec(&d->paged_pages); - } - - out: - gfn_unlock(p2m, gfn, 0); - - if ( page ) - { - /* - * Free the page on error. Drop our temporary reference in all - * cases. - */ - if ( ret ) - put_page_alloc_ref(page); - put_page(page); - } - - return ret; -} - -int mem_paging_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_paging_op_t) arg) -{ - int rc; - xen_mem_paging_op_t mpo; - struct domain *d; - bool copyback = false; - - if ( copy_from_guest(&mpo, arg, 1) ) - return -EFAULT; - - rc = rcu_lock_live_remote_domain_by_id(mpo.domain, &d); - if ( rc ) - return rc; - - rc = xsm_mem_paging(XSM_DM_PRIV, d); - if ( rc ) - goto out; - - rc = -ENODEV; - if ( unlikely(!vm_event_check_ring(d->vm_event_paging)) ) - goto out; - - switch( mpo.op ) - { - case XENMEM_paging_op_nominate: - rc = nominate(d, _gfn(mpo.gfn)); - break; - - case XENMEM_paging_op_evict: - rc = evict(d, _gfn(mpo.gfn)); - break; - - case XENMEM_paging_op_prep: - rc = prepare(d, _gfn(mpo.gfn), mpo.buffer); - if ( !rc ) - copyback = 1; - break; - - default: - rc = -ENOSYS; - break; - } - - if ( copyback && __copy_to_guest(arg, &mpo, 1) ) - rc = -EFAULT; - -out: - rcu_unlock_domain(d); - return rc; -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 5c7a0ff30e8b..d66027eeeb0f 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1198,36 +1198,6 @@ int add_to_physmap(struct domain *sd, unsigned long sgfn, shr_handle_t sh, mem_sharing_gfn_destroy(spage, cd, gfn_info); put_page_and_type(spage); } - else - { -#ifdef CONFIG_MEM_PAGING - /* - * There is a chance we're plugging a hole where a paged out - * page was. - */ - if ( p2m_is_paging(cmfn_type) && (cmfn_type != p2m_ram_paging_out) ) - { - atomic_dec(&cd->paged_pages); - /* - * Further, there is a chance this was a valid page. - * Don't leak it. - */ - if ( mfn_valid(cmfn) ) - { - struct page_info *cpage = mfn_to_page(cmfn); - - if ( !get_page(cpage, cd) ) - { - domain_crash(cd); - ret = -EOVERFLOW; - goto err_unlock; - } - put_page_alloc_ref(cpage); - put_page(cpage); - } - } -#endif - } atomic_inc(&nr_saved_mfns); diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index dfdbfa0afec8..ea4c5729bcf2 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -85,9 +85,6 @@ static void ept_p2m_type_to_flags(const struct p2m_domain *p2m, case p2m_invalid: case p2m_mmio_dm: case p2m_populate_on_demand: - case p2m_ram_paging_out: - case p2m_ram_paged: - case p2m_ram_paging_in: default: entry->r = entry->w = entry->x = 0; break; diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c index 5a6ce2f8bc2e..515ee9780e34 100644 --- a/xen/arch/x86/mm/p2m-pt.c +++ b/xen/arch/x86/mm/p2m-pt.c @@ -64,9 +64,6 @@ static unsigned long p2m_type_to_flags(const struct p2m_domain *p2m, case p2m_invalid: case p2m_mmio_dm: case p2m_populate_on_demand: - case p2m_ram_paging_out: - case p2m_ram_paged: - case p2m_ram_paging_in: default: return flags | _PAGE_NX_BIT; case p2m_grant_map_ro: @@ -910,7 +907,7 @@ p2m_pt_get_entry(struct p2m_domain *p2m, gfn_t gfn_, pod_retry_l1: flags = l1e_get_flags(*l1e); l1t = p2m_flags_to_type(flags); - if ( !(flags & _PAGE_PRESENT) && !p2m_is_paging(l1t) ) + if ( !(flags & _PAGE_PRESENT) ) { /* PoD: Try to populate */ if ( p2m_is_pod(l1t) ) @@ -929,7 +926,7 @@ p2m_pt_get_entry(struct p2m_domain *p2m, gfn_t gfn_, *t = p2m_recalc_type(recalc || _needs_recalc(flags), l1t, p2m, gfn); unmap_domain_page(l1e); - ASSERT(mfn_valid(mfn) || !p2m_is_any_ram(*t) || p2m_is_paging(*t)); + ASSERT(mfn_valid(mfn) || !p2m_is_any_ram(*t)); return (p2m_is_valid(*t) || p2m_is_any_ram(*t)) ? mfn : INVALID_MFN; } diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index f5f9c0ac4513..c2804d39f9b1 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -405,7 +405,7 @@ struct page_info *p2m_get_page_from_gfn( return page; /* Error path: not a suitable GFN at all */ - if ( !p2m_is_ram(*t) && !p2m_is_paging(*t) && !p2m_is_pod(*t) && + if ( !p2m_is_ram(*t) && !p2m_is_pod(*t) && !mem_sharing_is_fork(p2m->domain) ) return NULL; } @@ -697,7 +697,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, return -EPERM; } - else if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + else if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); set_gpfn_from_mfn(mfn_x(omfn), INVALID_M2P_ENTRY); @@ -707,13 +707,6 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, /* Count how man PoD entries we'll be replacing if successful */ pod_count++; } -#ifdef CONFIG_MEM_PAGING - else if ( p2m_is_paging(ot) && (ot != p2m_ram_paging_out) ) - { - /* We're plugging a hole in the physmap where a paged out page was */ - atomic_dec(&d->paged_pages); - } -#endif } /* Then, look for m->p mappings for this range and deal with them */ @@ -742,7 +735,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, mfn_x(mfn_add(mfn, i)), gfn_x(ogfn), gfn_x(gfn_add(gfn, i))); omfn = p2m->get_entry(p2m, ogfn, &ot, &a, 0, NULL, NULL); - if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); P2M_DEBUG("old gfn=%#lx -> mfn %#lx\n", @@ -789,7 +782,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, set_gpfn_from_mfn(mfn_x(omfn), gfn_x(gfn) + i); paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn) + i)); } - else if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + else if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); set_gpfn_from_mfn(mfn_x(omfn), gfn_x(gfn) + i); diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index cf4862cbc9c2..9c46abffb7ba 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -126,7 +126,6 @@ hvm_read(enum x86_segment seg, case HVMTRANS_bad_gfn_to_mfn: case HVMTRANS_unhandleable: return X86EMUL_UNHANDLEABLE; - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index d10891dcfc86..7b62269f7839 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -89,12 +89,6 @@ static int guest_wrmsr_xen(struct vcpu *v, uint32_t idx, uint64_t val) if ( page ) put_page(page); - if ( p2m_is_paging(t) ) - { - p2m_mem_paging_populate(d, _gfn(gmfn)); - return X86EMUL_RETRY; - } - gdprintk(XENLOG_WARNING, "Bad GMFN %lx (MFN %#"PRI_mfn") to MSR %08x\n", gmfn, mfn_x(page ? page_to_mfn(page) : INVALID_MFN), base); diff --git a/xen/arch/x86/x86_64/compat/mm.c b/xen/arch/x86/x86_64/compat/mm.c index d54efaad21cd..fda4760989c7 100644 --- a/xen/arch/x86/x86_64/compat/mm.c +++ b/xen/arch/x86/x86_64/compat/mm.c @@ -4,7 +4,6 @@ #include #include #include -#include #include #include @@ -156,11 +155,6 @@ int compat_arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case XENMEM_get_sharing_shared_pages: return mem_sharing_get_nr_shared_mfns(); -#ifdef CONFIG_MEM_PAGING - case XENMEM_paging_op: - return mem_paging_memop(guest_handle_cast(arg, xen_mem_paging_op_t)); -#endif - #ifdef CONFIG_MEM_SHARING case XENMEM_sharing_op: return mem_sharing_memop(guest_handle_cast(arg, xen_mem_sharing_op_t)); diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 8eadab7933d0..282f35dcbd48 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -35,7 +35,6 @@ EMIT_FILE; #include #include #include -#include #include #include @@ -1023,11 +1022,6 @@ long subarch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case XENMEM_get_sharing_shared_pages: return mem_sharing_get_nr_shared_mfns(); -#ifdef CONFIG_MEM_PAGING - case XENMEM_paging_op: - return mem_paging_memop(guest_handle_cast(arg, xen_mem_paging_op_t)); -#endif - #ifdef CONFIG_MEM_SHARING case XENMEM_sharing_op: return mem_sharing_memop(guest_handle_cast(arg, xen_mem_sharing_op_t)); diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..3c62672445ea 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1511,9 +1511,6 @@ static void cf_check complete_domain_destroy(struct rcu_head *head) sched_destroy_domain(d); -#ifdef CONFIG_MEM_PAGING - xfree(d->vm_event_paging); -#endif xfree(d->vm_event_monitor); #ifdef CONFIG_MEM_SHARING xfree(d->vm_event_share); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..3296d981f462 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -100,9 +100,6 @@ void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) info->outstanding_pages = d->outstanding_pages; #ifdef CONFIG_MEM_SHARING info->shr_pages = atomic_read(&d->shr_pages); -#endif -#ifdef CONFIG_MEM_PAGING - info->paged_pages = atomic_read(&d->paged_pages); #endif info->shared_info_frame = gfn_x(mfn_to_gfn(d, _mfn(virt_to_mfn(d->shared_info)))); diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c index cb6df2823b00..7f2e72f0dda3 100644 --- a/xen/common/keyhandler.c +++ b/xen/common/keyhandler.c @@ -281,17 +281,11 @@ static void cf_check dump_domains(unsigned char key) printk(" nr_pages=%u xenheap_pages=%u" #ifdef CONFIG_MEM_SHARING " shared_pages=%u" -#endif -#ifdef CONFIG_MEM_PAGING - " paged_pages=%u" #endif " dirty_cpus={%*pbl} max_pages=%u\n", domain_tot_pages(d), d->xenheap_pages, #ifdef CONFIG_MEM_SHARING atomic_read(&d->shr_pages), -#endif -#ifdef CONFIG_MEM_PAGING - atomic_read(&d->paged_pages), #endif CPUMASK_PR(d->dirty_cpumask), d->max_pages); printk(" handle=%02x%02x%02x%02x-%02x%02x-%02x%02x-" diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..b7dade262602 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -447,28 +447,6 @@ int guest_remove_page(struct domain *d, unsigned long gmfn) return -ENOENT; } - if ( unlikely(p2m_is_paging(p2mt)) ) - { - /* - * If the page hasn't yet been paged out, there is an - * actual page that needs to be released. - */ - if ( p2mt == p2m_ram_paging_out ) - { - ASSERT(mfn_valid(mfn)); - goto obtain_page; - } - - rc = guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0); - if ( rc ) - goto out_put_gfn; - - put_gfn(d, gmfn); - - p2m_mem_paging_drop_page(d, _gfn(gmfn), p2mt); - - return 0; - } if ( p2mt == p2m_mmio_direct ) { rc = -EPERM; @@ -514,10 +492,9 @@ int guest_remove_page(struct domain *d, unsigned long gmfn) { #ifdef CONFIG_X86 put_gfn(d, gmfn); - if ( !p2m_is_paging(p2mt) ) #endif - gdprintk(XENLOG_INFO, "Bad page free for Dom%u GFN %lx\n", - d->domain_id, gmfn); + gdprintk(XENLOG_INFO, "Bad page free for Dom%u GFN %lx\n", + d->domain_id, gmfn); return -ENXIO; } @@ -2037,16 +2014,6 @@ int check_get_page_from_gfn(struct domain *d, gfn_t gfn, bool readonly, page = get_page_from_gfn(d, gfn_x(gfn), &p2mt, q); -#ifdef CONFIG_MEM_PAGING - if ( p2m_is_paging(p2mt) ) - { - if ( page ) - put_page(page); - - p2m_mem_paging_populate(d, gfn); - return -EAGAIN; - } -#endif #ifdef CONFIG_MEM_SHARING if ( (q & P2M_UNSHARE) && p2m_is_shared(p2mt) ) { diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 2c4ff2c34c70..d74fc2aa9a30 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2791,8 +2791,7 @@ void free_domheap_pages(struct page_info *pg, unsigned int order) * responsibility for erasure. We do scrub regardless if option * scrub_domheap is set. */ - scrub = d->is_dying || mem_paging_enabled(d) || - scrub_debug || opt_scrub_domheap; + scrub = d->is_dying || scrub_debug || opt_scrub_domheap; } else { diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c index cf0258223f50..e92a4fc1c409 100644 --- a/xen/common/vm_event.c +++ b/xen/common/vm_event.c @@ -395,10 +395,6 @@ static int vm_event_resume(struct domain *d, struct vm_event_domain *ved) /* Check flags which apply only when the vCPU is paused */ if ( atomic_read(&v->vm_event_pause_count) ) { -#ifdef CONFIG_MEM_PAGING - if ( rsp.reason == VM_EVENT_REASON_MEM_PAGING ) - p2m_mem_paging_resume(d, &rsp); -#endif #ifdef CONFIG_MEM_SHARING if ( mem_sharing_is_fork(d) ) { @@ -539,14 +535,6 @@ int __vm_event_claim_slot(struct domain *d, struct vm_event_domain *ved, return vm_event_grab_slot(ved, current->domain != d); } -#ifdef CONFIG_MEM_PAGING -/* Registered with Xen-bound event channel for incoming notifications. */ -static void cf_check mem_paging_notification(struct vcpu *v, unsigned int port) -{ - vm_event_resume(v->domain, v->domain->vm_event_paging); -} -#endif - /* Registered with Xen-bound event channel for incoming notifications. */ static void cf_check monitor_notification(struct vcpu *v, unsigned int port) { @@ -564,20 +552,6 @@ static void cf_check mem_sharing_notification(struct vcpu *v, unsigned int port) /* Clean up on domain destruction */ void vm_event_cleanup(struct domain *d) { -#ifdef CONFIG_MEM_PAGING - if ( vm_event_check_ring(d->vm_event_paging) ) - { - /* Destroying the wait queue head means waking up all - * queued vcpus. This will drain the list, allowing - * the disable routine to complete. It will also drop - * all domain refs the wait-queued vcpus are holding. - * Finally, because this code path involves previously - * pausing the domain (domain_kill), unpausing the - * vcpus causes no harm. */ - destroy_waitqueue_head(&d->vm_event_paging->wq); - (void)vm_event_disable(d, &d->vm_event_paging); - } -#endif if ( vm_event_check_ring(d->vm_event_monitor) ) { destroy_waitqueue_head(&d->vm_event_monitor->wq); @@ -635,63 +609,6 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec) switch ( vec->mode ) { -#ifdef CONFIG_MEM_PAGING - case XEN_DOMCTL_VM_EVENT_OP_PAGING: - { - rc = -EINVAL; - - switch( vec->op ) - { - case XEN_VM_EVENT_ENABLE: - { - rc = -EOPNOTSUPP; - /* hvm fixme: p2m_is_foreign types need addressing */ - if ( is_hvm_domain(hardware_domain) ) - break; - - rc = -ENODEV; - /* Only HAP is supported */ - if ( !hap_enabled(d) ) - break; - - /* No paging if iommu is used */ - rc = -EMLINK; - if ( unlikely(is_iommu_enabled(d)) ) - break; - - rc = -EXDEV; - /* Disallow paging in a PoD guest */ - if ( p2m_pod_active(d) ) - break; - - /* domain_pause() not required here, see XSA-99 */ - rc = vm_event_enable(d, vec, &d->vm_event_paging, _VPF_mem_paging, - HVM_PARAM_PAGING_RING_PFN, - mem_paging_notification); - } - break; - - case XEN_VM_EVENT_DISABLE: - if ( vm_event_check_ring(d->vm_event_paging) ) - { - domain_pause(d); - rc = vm_event_disable(d, &d->vm_event_paging); - domain_unpause(d); - } - break; - - case XEN_VM_EVENT_RESUME: - rc = vm_event_resume(d, d->vm_event_paging); - break; - - default: - rc = -ENOSYS; - break; - } - } - break; -#endif - case XEN_DOMCTL_VM_EVENT_OP_MONITOR: { rc = -EINVAL; diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c index 951f1f30b7ad..d9b1f5768393 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -26,7 +26,6 @@ #include #include -#include #include #include @@ -777,7 +776,6 @@ bool arch_iommu_use_permitted(const struct domain *d) */ return d == dom_io || (likely(!mem_sharing_enabled(d)) && - likely(!mem_paging_enabled(d)) && likely(!p2m_pod_active(d)) && likely(!p2m_is_global_logdirty(d))); } diff --git a/xen/include/public/memory.h b/xen/include/public/memory.h index bd9fc37b5297..65ff524016d7 100644 --- a/xen/include/public/memory.h +++ b/xen/include/public/memory.h @@ -377,7 +377,7 @@ typedef struct xen_pod_target xen_pod_target_t; #define XENMEM_get_sharing_freed_pages 18 #define XENMEM_get_sharing_shared_pages 19 -#define XENMEM_paging_op 20 +#define XENMEM_paging_op 20 /* Removed in Xen 4.22 */ #define XENMEM_paging_op_nominate 0 #define XENMEM_paging_op_evict 1 #define XENMEM_paging_op_prep 2 diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h index 3a86f0e208f1..51581f96a76f 100644 --- a/xen/include/public/vm_event.h +++ b/xen/include/public/vm_event.h @@ -130,7 +130,7 @@ /* Memory sharing event */ #define VM_EVENT_REASON_MEM_SHARING 2 /* Memory paging event */ -#define VM_EVENT_REASON_MEM_PAGING 3 +#define VM_EVENT_REASON_MEM_PAGING 3 /* Removed in 4.22 */ /* A control register was updated */ #define VM_EVENT_REASON_WRITE_CTRLREG 4 /* An MSR was updated. */ diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 00db1da12f21..ef60d4438b0c 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -426,10 +426,6 @@ struct domain atomic_t shr_pages; /* shared pages */ #endif -#ifdef CONFIG_MEM_PAGING - atomic_t paged_pages; /* paged-out pages */ -#endif - /* Scheduling. */ void *sched_priv; /* scheduler-specific data */ struct sched_unit *sched_unit_list; @@ -600,10 +596,6 @@ struct domain #ifdef CONFIG_MEM_SHARING struct vm_event_domain *vm_event_share; struct domain *parent; /* VM fork parent */ -#endif - /* Memory paging support */ -#ifdef CONFIG_MEM_PAGING - struct vm_event_domain *vm_event_paging; #endif /* VM event monitor support */ struct vm_event_domain *vm_event_monitor; @@ -1011,9 +1003,7 @@ static inline struct domain *next_domain_in_cpupool( /* VCPU affinity has changed: migrating to a new CPU. */ #define _VPF_migrating 3 #define VPF_migrating (1UL<<_VPF_migrating) - /* VCPU is blocked due to missing mem_paging ring. */ -#define _VPF_mem_paging 4 -#define VPF_mem_paging (1UL<<_VPF_mem_paging) +/* Bit 4 unused */ /* VCPU is blocked due to missing mem_access ring. */ #define _VPF_mem_access 5 #define VPF_mem_access (1UL<<_VPF_mem_access) @@ -1248,12 +1238,6 @@ static always_inline bool is_iommu_enabled(const struct domain *d) return evaluate_nospec(d->options & XEN_DOMCTL_CDF_iommu); } -#ifdef CONFIG_MEM_PAGING -# define mem_paging_enabled(d) vm_event_check_ring((d)->vm_event_paging) -#else -# define mem_paging_enabled(d) false -#endif - extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h index b8fd7aeedd9e..68c6e81b70a8 100644 --- a/xen/include/xsm/dummy.h +++ b/xen/include/xsm/dummy.h @@ -648,14 +648,6 @@ static XSM_INLINE int cf_check xsm_mem_access(XSM_DEFAULT_ARG struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static XSM_INLINE int cf_check xsm_mem_paging(XSM_DEFAULT_ARG struct domain *d) -{ - XSM_ASSERT_ACTION(XSM_DM_PRIV); - return xsm_default_action(action, current->domain, d); -} -#endif - #ifdef CONFIG_MEM_SHARING static XSM_INLINE int cf_check xsm_mem_sharing(XSM_DEFAULT_ARG struct domain *d) { diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h index cc32a6c09104..e9cfa0ada5fb 100644 --- a/xen/include/xsm/xsm.h +++ b/xen/include/xsm/xsm.h @@ -159,10 +159,6 @@ struct xsm_ops { int (*mem_access)(struct domain *d); #endif -#ifdef CONFIG_MEM_PAGING - int (*mem_paging)(struct domain *d); -#endif - #ifdef CONFIG_MEM_SHARING int (*mem_sharing)(struct domain *d); #endif @@ -655,13 +651,6 @@ static inline int xsm_mem_access(xsm_default_t def, struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static inline int xsm_mem_paging(xsm_default_t def, struct domain *d) -{ - return alternative_call(xsm_ops.mem_paging, d); -} -#endif - #ifdef CONFIG_MEM_SHARING static inline int xsm_mem_sharing(xsm_default_t def, struct domain *d) { diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c index 244ef557528b..e35b6ae3dc33 100644 --- a/xen/xsm/dummy.c +++ b/xen/xsm/dummy.c @@ -119,10 +119,6 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = { .mem_access = xsm_mem_access, #endif -#ifdef CONFIG_MEM_PAGING - .mem_paging = xsm_mem_paging, -#endif - #ifdef CONFIG_MEM_SHARING .mem_sharing = xsm_mem_sharing, #endif diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd271..b0026f91c045 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -1340,13 +1340,6 @@ static int cf_check flask_mem_access(struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static int cf_check flask_mem_paging(struct domain *d) -{ - return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__MEM_PAGING); -} -#endif - #ifdef CONFIG_MEM_SHARING static int cf_check flask_mem_sharing(struct domain *d) { @@ -1934,10 +1927,6 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = { .mem_access = flask_mem_access, #endif -#ifdef CONFIG_MEM_PAGING - .mem_paging = flask_mem_paging, -#endif - #ifdef CONFIG_MEM_SHARING .mem_sharing = flask_mem_sharing, #endif diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index bbb9c117ec4a..9d51a1d4f74b 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -235,8 +235,6 @@ class domain2 soft_reset # XENMEM_access_op mem_access -# XENMEM_paging_op - mem_paging # XENMEM_sharing_op mem_sharing # XEN_DOMCTL_psr_alloc base-commit: 2611377cf9c92b43b04a33810f03fa07bf8ba954 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 07 17:49:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 17:49:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302952.1576588 (Exim 4.92) (envelope-from ) id 1wL2qW-0004lQ-CA; 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The other isn't so much about setting anything, but > rather about clearing. Rename the macro accordingly. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich > --- > Do we even need the hook anymore? It has been expanding the same for Arm > and x86. At this point, I'd say no. The macro has changed contents several times since it's introduction.  The grant table macros especially demonstrate how poor the common/arch interfaces are. > > --- a/xen/arch/arm/include/asm/grant_table.h > +++ b/xen/arch/arm/include/asm/grant_table.h > @@ -50,12 +50,8 @@ int replace_grant_host_mapping(uint64_t > #define gnttab_dom0_frames() \ > min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0) > +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ > + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) > > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > (st) ? gnttab_status_gfn(NULL, gt, idx) \ > --- a/xen/arch/x86/include/asm/grant_table.h > +++ b/xen/arch/x86/include/asm/grant_table.h > @@ -32,12 +32,8 @@ static inline int replace_grant_host_map > return replace_grant_pv_mapping(addr, frame, new_addr, flags); > } > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0 /* Handled in add_to_physmap_one(). */) > +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ > + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ > : gnttab_shared_mfn(gt, idx); \ > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d > { > int rc = gfn_eq(gfn, INVALID_GFN) > ? 0 > - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, > - page_to_mfn(pg)); > + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); > This is just a more complex way of writing     if ( !gfn_eq(gfn, INVALID_GFN) )         rc = gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); ~Andrew > if ( rc ) > { > @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( > */ > if ( !get_page(pg, d) ) > rc = -EBUSY; > - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) > - put_page(pg); > } > > if ( rc ) From xen-devel-bounces@lists.xenproject.org Thu May 07 18:49:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 18:49:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302998.1576596 (Exim 4.92) (envelope-from ) id 1wL3mw-0004XS-Lb; Thu, 07 May 2026 18:49:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302998.1576596; Thu, 07 May 2026 18:49:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL3mw-0004XL-Iw; Thu, 07 May 2026 18:49:34 +0000 Received: by outflank-mailman (input) for mailman id 1302998; Thu, 07 May 2026 18:49:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL3mt-0004XF-KD for xen-devel@lists.xenproject.org; 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Update all relevant domid_alloc() call sites and harden the domid_alloc() input value check. Also, fix problem with passing invalid domain IDs in XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) uses 0xffff as domain ID. Fix failing tools tests too. Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") Signed-off-by: Denis Mukhin --- Changes since v7: - aligned the DOMID_ANY comment with another patch sent separately to unblock xenstore series: https://lore.kernel.org/xen-devel/20260429120619.1013440-2-jgross@suse.com/ - added fixups to mem-claim, paging-mempool, resource and tsx tests. - Link to v7: https://lore.kernel.org/xen-devel/20260408234046.1314021-1-dmukhin@ford.com/ - Link to full CI: https://gitlab.com/xen-project/people/sstabellini/xen/-/pipelines/2508345752 --- tools/libs/light/libxl_create.c | 4 +++- tools/tests/domid/harness.h | 1 + tools/tests/domid/test-domid.c | 12 ++++++------ tools/tests/mem-claim/test-mem-claim.c | 6 +++--- tools/tests/paging-mempool/test-paging-mempool.c | 2 +- tools/tests/resource/test-resource.c | 2 +- tools/tests/tsx/test-tsx.c | 2 +- xen/common/device-tree/dom0less-build.c | 2 +- xen/common/domctl.c | 3 +-- xen/common/domid.c | 5 ++++- xen/include/public/xen.h | 7 +++++++ 11 files changed, 29 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c index bfc9149096a3..6fd62d140389 100644 --- a/tools/libs/light/libxl_create.c +++ b/tools/libs/light/libxl_create.c @@ -681,8 +681,10 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config, continue; local_domid = v; + } else if (libxl_domid_valid_guest(info->domid)) { + local_domid = info->domid; } else { - local_domid = info->domid; /* May not be valid */ + local_domid = DOMID_ANY; } ret = xc_domain_create(ctx->xch, &local_domid, &create); diff --git a/tools/tests/domid/harness.h b/tools/tests/domid/harness.h index 17eb22a9a854..65da0d075a2b 100644 --- a/tools/tests/domid/harness.h +++ b/tools/tests/domid/harness.h @@ -41,6 +41,7 @@ extern unsigned long find_next_zero_bit(const unsigned long *addr, #define DOMID_FIRST_RESERVED (100) #define DOMID_INVALID (101) +#define DOMID_ANY (102) #endif /* _TEST_HARNESS_ */ diff --git a/tools/tests/domid/test-domid.c b/tools/tests/domid/test-domid.c index 5915c4699a5c..71cc4e7fd86d 100644 --- a/tools/tests/domid/test-domid.c +++ b/tools/tests/domid/test-domid.c @@ -41,20 +41,20 @@ int main(int argc, char **argv) domid_free(expected); /* - * Test that that two consecutive calls of domid_alloc(DOMID_INVALID) + * Test that that two consecutive calls of domid_alloc(DOMID_ANY) * will never return the same ID. * NB: ID#0 is reserved and shall not be allocated by - * domid_alloc(DOMID_INVALID). + * domid_alloc(DOMID_ANY). */ for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 3: expected %u allocated %u\n", expected, allocated); } for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == DOMID_INVALID, "TEST 4: expected %u allocated %u\n", DOMID_INVALID, allocated); } @@ -64,7 +64,7 @@ int main(int argc, char **argv) domid_free(expected); for ( expected = 1; expected < DOMID_FIRST_RESERVED / 2; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 5: expected %u allocated %u\n", expected, allocated); } @@ -72,7 +72,7 @@ int main(int argc, char **argv) /* Re-allocate last ID from [1..DOMID_FIRST_RESERVED - 1]. */ expected = DOMID_FIRST_RESERVED - 1; domid_free(DOMID_FIRST_RESERVED - 1); - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 6: expected %u allocated %u\n", expected, allocated); diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c index ad038e45d188..69dc99cfdd51 100644 --- a/tools/tests/mem-claim/test-mem-claim.c +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -21,7 +21,7 @@ static unsigned int nr_failures; #define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) static xc_interface *xch; -static uint32_t domid = DOMID_INVALID; +static uint32_t domid = DOMID_ANY; static xc_physinfo_t physinfo; @@ -142,7 +142,7 @@ static void run_tests(void) rc = xc_domain_destroy(xch, domid); /* Cancel the cleanup path, even in the case of an error. */ - domid = DOMID_INVALID; + domid = DOMID_ANY; if ( rc ) return fail(" Failed to destroy domain: %d - %s\n", @@ -171,7 +171,7 @@ int main(int argc, char **argv) run_tests(); - if ( domid != DOMID_INVALID ) + if ( domid != DOMID_ANY ) { rc = xc_domain_destroy(xch, domid); if ( rc ) diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 1ebc13455ac2..7e417d9798ac 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -18,7 +18,7 @@ static unsigned int nr_failures; }) static xc_interface *xch; -static uint32_t domid; +static uint32_t domid = DOMID_ANY; static struct xen_domctl_createdomain create = { .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, diff --git a/tools/tests/resource/test-resource.c b/tools/tests/resource/test-resource.c index a7f2d0464326..236da0dcd45e 100644 --- a/tools/tests/resource/test-resource.c +++ b/tools/tests/resource/test-resource.c @@ -178,7 +178,7 @@ static void test_domain_configurations(void) for ( unsigned int i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - uint32_t domid = 0; + uint32_t domid = DOMID_ANY; int rc; xen_pfn_t ram[1] = { 0 }; diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index 5af04953f340..ea7c03ad302e 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -362,7 +362,7 @@ static void test_def_max_policies(void) static void test_guest(struct xen_domctl_createdomain *c) { - uint32_t domid = 0; + uint32_t domid = DOMID_ANY; int rc; rc = xc_domain_create(xch, &domid, c); diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 6d6882a34b5a..eacfd93087ae 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -871,7 +871,7 @@ void __init create_domUs(void) if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) panic("No more domain IDs available\n"); - domid = domid_alloc(DOMID_INVALID); + domid = domid_alloc(DOMID_ANY); if ( domid == DOMID_INVALID ) panic("Error allocating ID for domain %s\n", dt_node_name(node)); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..b969f5ada6cc 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -409,8 +409,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) case XEN_DOMCTL_createdomain: { - /* NB: ID#0 is reserved, find the first suitable ID instead. */ - domid_t domid = domid_alloc(op->domain ?: DOMID_INVALID); + domid_t domid = domid_alloc(op->domain); if ( domid == DOMID_INVALID ) { diff --git a/xen/common/domid.c b/xen/common/domid.c index 2387ddb08300..b0258e477c1a 100644 --- a/xen/common/domid.c +++ b/xen/common/domid.c @@ -19,7 +19,7 @@ static DECLARE_BITMAP(domid_bitmap, DOMID_FIRST_RESERVED); * @param domid Domain ID hint: * - If an explicit domain ID is provided, verify its availability and use it * if ID is not used; - * - If DOMID_INVALID is provided, search [1..DOMID_FIRST_RESERVED-1] range, + * - If DOMID_ANY is provided, search [1..DOMID_FIRST_RESERVED-1] range, * starting from the last used ID. Implementation guarantees that two * consecutive calls will never return the same ID. ID#0 is reserved for * the first boot domain (currently, dom0) and excluded from the allocation @@ -31,6 +31,9 @@ domid_t domid_alloc(domid_t domid) { static domid_t domid_last; + if ( domid >= DOMID_FIRST_RESERVED && domid != DOMID_ANY ) + return DOMID_INVALID; + spin_lock(&domid_lock); /* Exact match. */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index b12fd10e6315..2149b8dd3808 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -608,6 +608,13 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); /* DOMID_INVALID is used to identify pages with unknown owner. */ #define DOMID_INVALID xen_mk_uint(0x7FF4) +/* + * DOMID_ANY is used to signal no specific domain ID requested. + * Handler should pick a valid ID, or handle it as a wildcard value + * depending on the context. + */ +#define DOMID_ANY xen_mk_uint(0x7FF5) + /* Idle domain. */ #define DOMID_IDLE xen_mk_uint(0x7FFF) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 20:40:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 20:40:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303058.1576614 (Exim 4.92) (envelope-from ) id 1wL5WN-0003YG-L1; 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand Subject: Re: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Topic: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Index: AQHcyClfuk/Yqk/9/E2oGahG1JP+sg== Date: Thu, 7 May 2026 20:40:29 +0000 Message-ID: <878q9vt0lg.fsf@epam.com> References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> In-Reply-To: (Jan Beulich's message of "Wed, 6 May 2026 13:54:09 +0200") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: GV1PR03MB10456:EE_|VI0PR03MB10807:EE_ x-ms-office365-filtering-correlation-id: d13e1864-94a6-4abd-4157-08deac78e044 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|366016|376014|42112799006|1800799024|56012099003|38070700021|18002099003|22082099003; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d13e1864-94a6-4abd-4157-08deac78e044 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 20:40:29.1444 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: sfgaUE+5LNbvPjiPcaOhKm1hTtnwtGT7MPe0HcxPPHo8qlKUynDC4d7O8oCCIGOq5ZU/bp6AYFaWjnG/v1g/RVsQ/Cks9w26O47YrhiMRgc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10807 X-purgate-ID: tlsNG-c201ff/1778186433-DA56B443-AF38747C/0/0 X-purgate-type: clean X-purgate-size: 3500 Hi Jan, Jan Beulich writes: > On 06.05.2026 11:39, Mykyta Poturai wrote: >> On 5/4/26 08:37, Jan Beulich wrote: >>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>> From: Stewart Hildebrand >>>>>> >>>>>> This code is expected to only be used by privileged domains, >>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>> >>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to accou= nt >>>>>> for possible changes in the system page size register. Also force VF= s to >>>>>> always use emulated reads for command register, this is needed to >>>>>> prevent some drivers accidentally unmapping BARs. >>>>> >>>>> This apparently refers to the change to vpci_init_header(). Writes ar= e >>>>> already intercepted. How would a read lead to accidental BAR unmap? E= ven >>>>> for writes I don't see how a VF driver could accidentally unmap BARs,= as >>>>> the memory decode bit there is hardwired to 0. >>>>> >>>>>> Discovery of VFs is >>>>>> done by Dom0, which must register them with Xen. >>>>> >>>>> If we intercept control register writes, why would we still require >>>>> Dom0 to report the VFs that appear? >>>>> >>>> >>>> Sorry, I don't understand this question. You specifically requested th= is >>>> to be done this way in V2. Quoting your reply from V2 below. >>>> >>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>> returning "true" >>>> > from vpci_process_pending() until the time has passed? This imo is= a >>>> no-go. You >>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>> when the >>>> > timer has expired. That'll then eliminate the need for the >>>> not-so-nice patch 4. >>>> >>>> > Question is whether we need to actually go this far (right away). = I >>>> expect you >>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the h= ardware >>>> > domain, can't we trust it to set things up correctly, just like we >>>> trust it in >>>> > a number of other aspects? >>> >>> How's any of this related to the question I raised here, or your reply >>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>> Why still demand Dom0 to report them then? >>> >>=20 >> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is= =20 >> set to become alive. We discussed in the V2 that it is not acceptable to= =20 >> do a required 100ms wait in Xen while blocking a domain. And not doing=20 >> that blocking would require some mechanism to only allow a domain to run= =20 >> for precisely 99(or more?)ms. You yourself suggested that we can trust=20 >> the hardware domain with registering VFs if we already trust it with=20 >> other PCI-related stuff. Did you change your mind, or am I completely=20 >> misunderstanding this question? > > No, I still think that we can trust hwdom enough. Nevertheless we should > aim at being independent of it where possible. And I seem to recall that > I had also outlined an approach how to avoid spin-waiting for 100ms in > the hypervisor. I want to clarify: you are telling that Xen should not wait for hwdom to report VFs and instead create them by itself. Is this correct? --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 20:49:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 20:49:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303068.1576624 (Exim 4.92) (envelope-from ) id 1wL5eS-0004OP-HT; Thu, 07 May 2026 20:48:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303068.1576624; Thu, 07 May 2026 20:48:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL5eS-0004OI-Ej; Thu, 07 May 2026 20:48:56 +0000 Received: by outflank-mailman (input) for mailman id 1303068; Thu, 07 May 2026 20:48:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL5eQ-0004OC-MM for xen-devel@lists.xenproject.org; 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cv=UM7t2ify c=1 sm=1 tr=0 ts=69fcfab2 cx=c_pps a=Pnh5LeqhM4XIZ/aCP1A8uQ==:117 a=lOEMawUel/sSvQipkIvNbg==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=kj9zAlcOel0A:10 a=NGcC8JguVDcA:10 a=3PXLN80vpJUA:10 a=6NUGLSImWEsA:10 a=w9pew1qAHqMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=P_n1zlmtWsCQbjROFjcg:22 a=0GA0A_IKJoUHBEAzNTkD:22 a=VwQbUJbxAAAA:8 a=cbNQJ9GKAAAA:8 a=p0WdMEafAAAA:8 a=-RI0ju8yAAAA:8 a=J0Q-xWDkcNhgyuBBokcA:9 a=CjuIK1q_8ugA:10 a=G69WFyCBNqGPyalROSdv:22 a=UsJdYLK5l2RqpxBViBoK:22 X-Proofpoint-ORIG-GUID: c-pWQBHyHQEV7oY36qSPldj9NfsKBxpq X-Proofpoint-GUID: c-pWQBHyHQEV7oY36qSPldj9NfsKBxpq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605070209 X-purgate-ID: tlsNG-d62444/1778186932-AE342FF4-6844BB99/0/0 X-purgate-type: clean X-purgate-size: 3408 On Wed, Apr 22, 2026 at 04:07:55PM +0200, Anthony PERARD wrote: > On Wed, Apr 08, 2026 at 04:40:46PM -0700, dmukhin@ford.com wrote: > > From: Denis Mukhin > > > > Add a new symbol DOMID_ANY to improve the readability of the code. > > > > Update all relevant domid_alloc() call sites and harden the domid_alloc() > > input value check. > > > > Also, fix problem with passing invalid domain IDs in > > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > > uses 0xffff as domain ID. > > > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > > Signed-off-by: Denis Mukhin > > --- > > Changes since v6: > > - fixed libxl_domid_valid_guest() check in libxl_create.c > > - Link to v6: https://lore.kernel.org/xen-devel/20260307025451.3148078-2-dmukhin@ford.com/ > > - CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2438790748 > > Unfortunattly, this patch breaks tests in tools/tests, see > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2471684142 > > The tests produces this: > > Running /usr/lib/xen/tests/test-mem-claim > Memory claims tests > Free pages: 3059012, Oustanding claims: 0 > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-mem-claim > > Running /usr/lib/xen/tests/test-paging-mempool > Paging mempool tests > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-paging-mempool > > Running /usr/lib/xen/tests/test-resource > XENMEM_acquire_resource tests > Test x86 PV > Domain create failure: 17 - File exists > Test x86 PVH > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-resource > > Running /usr/lib/xen/tests/test-tsx > TSX tests > Host: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Got 16 CPUs > Testing MSR_TSX_FORCE_ABORT consistency > Testing MSR_TSX_CTRL consistency > Testing MSR_MCU_OPT_CTRL consistency > Testing RTM behaviour > Got #UD > Testing PV default/max policies > Max: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Def: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Testing HVM default/max policies > Max: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Def: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Testing PV guest > Domain create failure: 17 - File exists > Testing HVM guest > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-tsx Yeah, I did not run those tests locally and the failing tests are not part of "basic" CI, certain gitlab privileges are required to execute the full CI test suite (as it turns out). Perhaps tools tests should be part of a CI runs available to all users, at least on demand? Sent v8 with a fixups for the tests: https://lore.kernel.org/xen-devel/20260507202840.293269-1-dmukhin@ford.com/ (Thanks to Stefano with help on running a full CI cycle). > > At least, the domid test passes :-) > Running /usr/lib/xen/tests/test-domid > PASSED :-) > > > -- > | Vates > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu May 07 21:44:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 21:44:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303079.1576633 (Exim 4.92) (envelope-from ) id 1wL6WJ-0003ti-Eh; Thu, 07 May 2026 21:44:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303079.1576633; Thu, 07 May 2026 21:44:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6WJ-0003tb-Be; Thu, 07 May 2026 21:44:35 +0000 Received: by outflank-mailman (input) for mailman id 1303079; Thu, 07 May 2026 21:44:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6WI-0003tV-Q1 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 21:44:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wL6WI-007a6x-71 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 23:44:34 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd078c-2eae-0a2a0a5409dd-0a2a450cebe8-28 for ; Thu, 07 May 2026 23:44:34 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd07c1-62f1-0a2a450c0019-ac6904feca48-3 for ; Thu, 07 May 2026 23:44:33 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 8AACC60181; Thu, 7 May 2026 21:44:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C3A4C2BCB8; Thu, 7 May 2026 21:44:32 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778190272; bh=g9gkwhBzLCLWdEpETe7NYqO10AySs39ht2qN9qx5eE4=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=uBebvsDcjmQy5AczypFheKEURmWdeT2cU/+k4wO2rnahqfErIcI5UibBlnSkEBftQ StvtbxZ21Z3wFfKlHSjYE9E0+4S2y6U5pS75WvoEi+PrOkTHeRzmVOT8fGNZ8w+GP3 TPDSMvgU6L/pq/OuSpOWyv/0JdytcKWGXE0XOp7vJNEF8ECKW3ZgIu5t4ltQafFdx4 xbP8snXv0/Oc+OESZqO2FMlvVYY6QTWQ8FAUqPAOPkA+bK1fU98U+UqtXtB9jbeRcy kpmUOHwF90+IJ3rgAG+J+O2V/RohgJn+8wt/HJw5imEb1O380THUzd+DVhvO/0Uej+ T3LV/YMwpelLA== Date: Thu, 7 May 2026 14:44:27 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d25034/1778190274-DBB7CCF5-6B46791F/0/0 X-purgate-type: clean X-purgate-size: 2612 On Thu, 7 May 2026, Jan Beulich wrote: > On 07.05.2026 02:54, Stefano Stabellini wrote: > > On Wed, 6 May 2026, Stefano Stabellini wrote: > >> On Wed, 6 May 2026, Jan Beulich wrote: > >>> When one of the linking passes fails, additional intermediate files are > >>> still in place. Having them available for analysis of the underlying > >>> problem can be pretty helpful. Collect some into a new intermediates/ > >>> directory. (Nothing new will be collected if linking succeeds.) > >>> > >>> While there also make sure xen-syms is collected (into binaries/). This > >>> is rather more useful for analysis of possible problems than its stripped > >>> counterpart. > >>> > >>> Signed-off-by: Jan Beulich > >>> --- > >>> As the issue this is meant to help with didn't re-occur with this in > >>> place, the new logic wasn't really tested yet. > >> > >> It looks OK but please provide a link to a successful pipeline > > Well, I had it in use in > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 > but does that count, when the issue the change is for didn't really occur? > For now I can't test the additions without having a way to trigger that > symbol table issue (or any other problem at one of the linking stages). > Short of artificially breaking things, that is. Please break it on purpose. Just push to a temporary branch. > >> Reviewed-by: Stefano Stabellini > > Thanks, but the above wants clarifying first, and the below suggests you > actually meant to take back the R-b. > > > Actually, I see that the build script is run with bash -ex so I wonder > > if collect_xen_artefacts would even run if make fails. I think we need: > > > > trap collect_xen_artefacts EXIT > > I don't feel comfortable making such a change. Furthermore it's unrelated, > as it would mean that on other build failures successfully created final > binaries wouldn't be collected either (after all on x86 it may be only one > of the two links that failed). Plus then it would likely want doing > differently, by making the EXIT hook invoke a new > collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered > (except for the xen-syms addition there)? "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain the type of change that would be needed to make this work, because as I understand it, it does not work now. >From your comment I don't understand if you think that the patch as is would work as intended or you agree with my comment that it would not work. From xen-devel-bounces@lists.xenproject.org Thu May 07 22:06:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 22:06:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303098.1576642 (Exim 4.92) (envelope-from ) id 1wL6rq-00071O-5P; Thu, 07 May 2026 22:06:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303098.1576642; Thu, 07 May 2026 22:06:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6rq-00071H-1w; Thu, 07 May 2026 22:06:50 +0000 Received: by outflank-mailman (input) for mailman id 1303098; Thu, 07 May 2026 22:06:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6ro-00071B-O1 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 22:06:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wL6ro-00544V-4z for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1dac22a1-1244-4094-8641-08deac84edeb X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:06:45.9904 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zrP1uSZM1bqsUBMlzfQ0E7RF4OqZmLXW+8nwJoPdFVNHAfngPOaB7B4eWxQJbz+ww82E5oEDHgWqpTw7Zo6GJ/cCcOjP1SvkGgVn8XymVxI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11797 X-purgate-ID: tlsNG-42698a/1778191608-13979F3B-22283C5B/0/0 X-purgate-type: clean X-purgate-size: 2134 Hi Mykola, Mykola Kvach writes: > From: Mirela Simonovic > > The MMU must be enabled during the resume path before restoring context, > as virtual addresses are used to access the saved context data. > I agree with Luca, this patch does not makes sense as is. I don't see why it should be separated from the rest of the resume path that is added in the next patch > This patch adds MMU setup during resume by reusing the existing > enable_secondary_cpu_mm function, which enables data cache and the MMU. > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > to init_ttbr (page tables used at runtime). > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v7: > - no functional changes, just moved commit > --- > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 72c7b24498..596e960152 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -561,6 +561,30 @@ END(efi_xen_start) > =20 > #endif /* CONFIG_ARM_EFI */ > =20 > +#ifdef CONFIG_SYSTEM_SUSPEND > + > +FUNC(hyp_resume) > + /* Initialize the UART if earlyprintk has been enabled. */ > +#ifdef CONFIG_EARLY_PRINTK > + bl init_uart > +#endif > + PRINT_ID("- Xen resuming -\r\n") > + > + bl check_cpu_mode > + bl cpu_init > + > + ldr x0, =3Dstart > + adr x20, start /* x20 :=3D paddr (start) */ > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > + ldr lr, =3Dmmu_resumed > + b enable_secondary_cpu_mm > + > +mmu_resumed: > + b . > +END(hyp_resume) > + > +#endif /* CONFIG_SYSTEM_SUSPEND */ > + > /* > * Local variables: > * mode: ASM --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 22:17:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 22:17:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303107.1576651 (Exim 4.92) (envelope-from ) id 1wL725-0000Tg-7t; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 913b6b2c-ba50-4cc1-0074-08deac866745 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:17:19.1191 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kc52ypWEbkIKpFphQE4GU0MeY2jv9vx0iYAZsHWt7o+rap5GkYXX9Aegw/aR2khML10P3eFnU6MJh8jbfYhGNSutRNQ8s7/dwqUt9EKTJTc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR03MB6212 X-purgate-ID: tlsNG-bad1c0/1778192241-37175A53-66E71E72/0/0 X-purgate-type: clean X-purgate-size: 8203 Hi Mikola, Mykola Kvach writes: > From: Mirela Simonovic > > The context of CPU general purpose and system control registers must be > saved on suspend and restored on resume. This is implemented in > prepare_resume_ctx and before the return from the hyp_resume function. > The prepare_resume_ctx must be invoked just before the PSCI system suspen= d > call is issued to the ATF. The prepare_resume_ctx must return a non-zero > value so that the calling 'if' statement evaluates to true, causing the > system suspend to be invoked. Upon resume, the context saved on suspend > will be restored, including the link register. Therefore, after > restoring the context, the control flow will return to the address > pointed to by the saved link register, which is the place from which > prepare_resume_ctx was called. To ensure that the calling 'if' statement > does not again evaluate to true and initiate system suspend, hyp_resume > must return a zero value after restoring the context. > > Note that the order of saving register context into cpu_context structure > must match the order of restoring. > > Support for ARM32 is not implemented. Instead, compilation fails with a > build-time error if suspend is enabled for ARM32. > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v8: > - fix alignments in code > > Changes in v7: > - no changes > --- > xen/arch/arm/Makefile | 1 + > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > xen/arch/arm/suspend.c | 14 +++++ > 4 files changed, 130 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/suspend.c > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 69200b2728..c36158271a 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > obj-y +=3D shutdown.o > obj-y +=3D smp.o > obj-y +=3D smpboot.o > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > obj-y +=3D time.o > obj-y +=3D traps.o > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 596e960152..2cb02ee314 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -562,6 +562,52 @@ END(efi_xen_start) > #endif /* CONFIG_ARM_EFI */ > =20 > #ifdef CONFIG_SYSTEM_SUSPEND > +/* > + * int prepare_resume_ctx(struct cpu_context *ptr) "cpu_context" is very generic name, especially taking into account that you are introducing a global variable with the same name. How about "resume_cpu_context"? > + * > + * x0 - pointer to the storage where callee's context will be saved > + * > + * CPU context saved here will be restored on resume in hyp_resume funct= ion. > + * prepare_resume_ctx shall return a non-zero value. Upon restoring cont= ext > + * hyp_resume shall return value zero instead. From C code that invokes > + * prepare_resume_ctx, the return value is interpreted to determine whet= her > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > + */ > +FUNC(prepare_resume_ctx) > + /* Store callee-saved registers */ How are planning to synchronise this code with actual cpu_context? I am pretty sure it is better to use offsets generated by asm-offset.c > + stp x19, x20, [x0], #16 > + stp x21, x22, [x0], #16 > + stp x23, x24, [x0], #16 > + stp x25, x26, [x0], #16 > + stp x27, x28, [x0], #16 > + stp x29, lr, [x0], #16 > + > + /* Store stack-pointer */ > + mov x2, sp > + str x2, [x0], #8 > + > + /* Store system control registers */ > + mrs x2, VBAR_EL2 > + str x2, [x0], #8 > + mrs x2, VTCR_EL2 > + str x2, [x0], #8 > + mrs x2, VTTBR_EL2 > + str x2, [x0], #8 > + mrs x2, TPIDR_EL2 > + str x2, [x0], #8 > + mrs x2, MDCR_EL2 > + str x2, [x0], #8 > + mrs x2, HSTR_EL2 > + str x2, [x0], #8 > + mrs x2, CPTR_EL2 > + str x2, [x0], #8 > + mrs x2, HCR_EL2 > + str x2, [x0], #8 > + > + /* prepare_resume_ctx must return a non-zero value */ > + mov x0, #1 > + ret > +END(prepare_resume_ctx) > =20 > FUNC(hyp_resume) > /* Initialize the UART if earlyprintk has been enabled. */ > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > b enable_secondary_cpu_mm > =20 > mmu_resumed: > - b . > + /* Now we can access the cpu_context, so restore the context her= e */ > + ldr x0, =3Dcpu_context > + > + /* Restore callee-saved registers */ > + ldp x19, x20, [x0], #16 > + ldp x21, x22, [x0], #16 > + ldp x23, x24, [x0], #16 > + ldp x25, x26, [x0], #16 > + ldp x27, x28, [x0], #16 > + ldp x29, lr, [x0], #16 > + > + /* Restore stack pointer */ > + ldr x2, [x0], #8 > + mov sp, x2 > + > + /* Restore system control registers */ > + ldr x2, [x0], #8 > + msr VBAR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTCR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTTBR_EL2, x2 > + ldr x2, [x0], #8 > + msr TPIDR_EL2, x2 > + ldr x2, [x0], #8 > + msr MDCR_EL2, x2 > + ldr x2, [x0], #8 > + msr HSTR_EL2, x2 > + ldr x2, [x0], #8 > + msr CPTR_EL2, x2 > + ldr x2, [x0], #8 > + msr HCR_EL2, x2 > + isb > + > + /* > + * Since context is restored return from this function will appe= ar > + * as return from prepare_resume_ctx. To distinguish a return fr= om > + * prepare_resume_ctx which is called upon finalizing the suspen= d, > + * as opposed to return from this function which executes on res= ume, > + * we need to return zero value here. > + */ > + mov x0, #0 > + ret > END(hyp_resume) > =20 > #endif /* CONFIG_SYSTEM_SUSPEND */ > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/as= m/suspend.h > index 31a98a1f1b..c127fa3d78 100644 > --- a/xen/arch/arm/include/asm/suspend.h > +++ b/xen/arch/arm/include/asm/suspend.h > @@ -3,6 +3,8 @@ > #ifndef ARM_SUSPEND_H > #define ARM_SUSPEND_H > =20 > +#include > + > struct domain; > struct vcpu; > struct vcpu_guest_context; > @@ -14,6 +16,30 @@ struct resume_info { > =20 > void arch_domain_resume(struct domain *d); > =20 > +#ifdef CONFIG_SYSTEM_SUSPEND > +#ifdef CONFIG_ARM_64 > +struct cpu_context { > + register_t callee_regs[12]; > + register_t sp; > + register_t vbar_el2; > + register_t vtcr_el2; > + register_t vttbr_el2; > + register_t tpidr_el2; > + register_t mdcr_el2; > + register_t hstr_el2; > + register_t cptr_el2; > + register_t hcr_el2; > +} __aligned(16); > +#else > +#error "Define cpu_context structure for arm32" > +#endif > + > +extern struct cpu_context cpu_context; > + > +int prepare_resume_ctx(struct cpu_context *ptr); > +void hyp_resume(void); > +#endif /* CONFIG_SYSTEM_SUSPEND */ > + > #endif /* ARM_SUSPEND_H */ > =20 > /* > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > new file mode 100644 > index 0000000000..e38566b0b7 > --- /dev/null > +++ b/xen/arch/arm/suspend.c > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > + > +struct cpu_context cpu_context =3D {}; Don't need to zero-initialize a global variable. > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * indent-tabs-mode: nil > + * End: > + */ --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 22:25:58 2026 Return-path: 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X-MS-Exchange-CrossTenant-Network-Message-Id: ec5d068e-a077-408a-a1e8-08deac87c07e X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:26:58.2667 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pT4ZwsCute9rKFT3XwiLDAg1Mr/W1eRhTzBzZwJoqBmQVqsvxjbP2mJGW+8zYounWMHR54Xk//oJu2gzofZKt7v/YKWvHWkGtjv+rWNyPO4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11798 X-purgate-ID: tlsNG-ef75cf/1778192819-09F6EC48-280A6FEE/0/0 X-purgate-type: clean X-purgate-size: 1082 Hi Mykola, Mykola Kvach writes: > From: Mykola Kvach > > init_tee_secondary() was marked __init and freed after boot. Calling it > from the CPU hotplug/resume path then executed discarded code, which > could crash Xen. Drop __init so the TEE mediator secondary init can run > safely on hotplugged and resumed CPUs. > > Signed-off-by: Mykola Kvach Reviewed-by: Volodymyr Babchuk > --- > xen/arch/arm/tee/tee.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c > index 8501443c8e..00e561fc78 100644 > --- a/xen/arch/arm/tee/tee.c > +++ b/xen/arch/arm/tee/tee.c > @@ -128,7 +128,7 @@ static int __init tee_init(void) > =20 > presmp_initcall(tee_init); > =20 > -void __init init_tee_secondary(void) > +void init_tee_secondary(void) > { > if ( cur_mediator && cur_mediator->ops->init_secondary ) > cur_mediator->ops->init_secondary(); --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Fri May 08 05:52:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 05:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303188.1576682 (Exim 4.92) (envelope-from ) id 1wLE8A-0001rs-7E; Fri, 08 May 2026 05:52:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303188.1576682; Fri, 08 May 2026 05:52:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE8A-0001r0-0m; Fri, 08 May 2026 05:52:10 +0000 Received: by outflank-mailman (input) for mailman id 1303188; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE89-0001qP-C3 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLE88-0045ao-PF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 07:52:08 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd79ff-5cb7-0a2a0a5109dd-0a2a450cb8f4-8 for ; Fri, 08 May 2026 07:52:08 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7a08-62f1-0a2a450c0019-d1558032d55a-3 for ; Fri, 08 May 2026 07:52:08 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488ba840146so14027085e9.1 for ; Thu, 07 May 2026 22:52:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <878q9vt0lg.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778219528-E3B7CCF5-C0C7345E/0/0 X-purgate-type: clean X-purgate-size: 3575 On 07.05.2026 22:40, Volodymyr Babchuk wrote: > Jan Beulich writes: >> On 06.05.2026 11:39, Mykyta Poturai wrote: >>> On 5/4/26 08:37, Jan Beulich wrote: >>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>> From: Stewart Hildebrand >>>>>>> >>>>>>> This code is expected to only be used by privileged domains, >>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>> >>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>> always use emulated reads for command register, this is needed to >>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>> >>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>> the memory decode bit there is hardwired to 0. >>>>>> >>>>>>> Discovery of VFs is >>>>>>> done by Dom0, which must register them with Xen. >>>>>> >>>>>> If we intercept control register writes, why would we still require >>>>>> Dom0 to report the VFs that appear? >>>>>> >>>>> >>>>> Sorry, I don't understand this question. You specifically requested this >>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>> >>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>> returning "true" >>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>> no-go. You >>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>> when the >>>>> > timer has expired. That'll then eliminate the need for the >>>>> not-so-nice patch 4. >>>>> >>>>> > Question is whether we need to actually go this far (right away). I >>>>> expect you >>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>> > domain, can't we trust it to set things up correctly, just like we >>>>> trust it in >>>>> > a number of other aspects? >>>> >>>> How's any of this related to the question I raised here, or your reply >>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>> Why still demand Dom0 to report them then? >>>> >>> >>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>> set to become alive. We discussed in the V2 that it is not acceptable to >>> do a required 100ms wait in Xen while blocking a domain. And not doing >>> that blocking would require some mechanism to only allow a domain to run >>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>> the hardware domain with registering VFs if we already trust it with >>> other PCI-related stuff. Did you change your mind, or am I completely >>> misunderstanding this question? >> >> No, I still think that we can trust hwdom enough. Nevertheless we should >> aim at being independent of it where possible. And I seem to recall that >> I had also outlined an approach how to avoid spin-waiting for 100ms in >> the hypervisor. > > I want to clarify: you are telling that Xen should not wait for hwdom to > report VFs and instead create them by itself. Is this correct? If that's technically possible, yes. Jan From xen-devel-bounces@lists.xenproject.org Fri May 08 05:52:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 05:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303187.1576678 (Exim 4.92) (envelope-from ) id 1wLE8A-0001qi-00; Fri, 08 May 2026 05:52:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303187.1576678; Fri, 08 May 2026 05:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE89-0001qa-QW; Fri, 08 May 2026 05:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1303187; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE88-0001qO-Vp for xen-devel@lists.xenproject.org; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLE87-005pz7-Sk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 07:52:07 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd79fe-e002-0a2a0a5209dd-0a2a4506ba88-12 for ; Fri, 08 May 2026 07:52:07 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7a07-7371-0a2a45060019-d1558035e5aa-3 for ; Fri, 08 May 2026 07:52:07 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso11698255e9.1 for ; Thu, 07 May 2026 22:52:07 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <878q9vt0lg.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778219527-85B6DD75-5E4E99F6/0/0 X-purgate-type: clean X-purgate-size: 3575 On 07.05.2026 22:40, Volodymyr Babchuk wrote: > Jan Beulich writes: >> On 06.05.2026 11:39, Mykyta Poturai wrote: >>> On 5/4/26 08:37, Jan Beulich wrote: >>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>> From: Stewart Hildebrand >>>>>>> >>>>>>> This code is expected to only be used by privileged domains, >>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>> >>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>> always use emulated reads for command register, this is needed to >>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>> >>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>> the memory decode bit there is hardwired to 0. >>>>>> >>>>>>> Discovery of VFs is >>>>>>> done by Dom0, which must register them with Xen. >>>>>> >>>>>> If we intercept control register writes, why would we still require >>>>>> Dom0 to report the VFs that appear? >>>>>> >>>>> >>>>> Sorry, I don't understand this question. You specifically requested this >>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>> >>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>> returning "true" >>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>> no-go. You >>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>> when the >>>>> > timer has expired. That'll then eliminate the need for the >>>>> not-so-nice patch 4. >>>>> >>>>> > Question is whether we need to actually go this far (right away). I >>>>> expect you >>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>> > domain, can't we trust it to set things up correctly, just like we >>>>> trust it in >>>>> > a number of other aspects? >>>> >>>> How's any of this related to the question I raised here, or your reply >>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>> Why still demand Dom0 to report them then? >>>> >>> >>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>> set to become alive. We discussed in the V2 that it is not acceptable to >>> do a required 100ms wait in Xen while blocking a domain. And not doing >>> that blocking would require some mechanism to only allow a domain to run >>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>> the hardware domain with registering VFs if we already trust it with >>> other PCI-related stuff. Did you change your mind, or am I completely >>> misunderstanding this question? >> >> No, I still think that we can trust hwdom enough. Nevertheless we should >> aim at being independent of it where possible. And I seem to recall that >> I had also outlined an approach how to avoid spin-waiting for 100ms in >> the hypervisor. > > I want to clarify: you are telling that Xen should not wait for hwdom to > report VFs and instead create them by itself. Is this correct? If that's technically possible, yes. Jan From xen-devel-bounces@lists.xenproject.org Fri May 08 06:11:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 06:11:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303206.1576696 (Exim 4.92) (envelope-from ) id 1wLEQc-0005Z0-N4; Fri, 08 May 2026 06:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303206.1576696; Fri, 08 May 2026 06:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLEQc-0005Yt-KI; Fri, 08 May 2026 06:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1303206; Fri, 08 May 2026 06:11:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLEQb-0005Yn-IJ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 06:11:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLEQa-001eul-GG for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:11:12 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd7e72-bab6-0a2a0a5309dd-0a2a450399de-42 for ; Fri, 08 May 2026 08:11:12 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7e7f-672d-0a2a45030019-d155dd2da5bc-3 for ; Fri, 08 May 2026 08:11:11 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-441209fb77eso990530f8f.1 for ; Thu, 07 May 2026 23:11:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 07 May 2026 23:11:11 -0700 (PDT) Message-ID: <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> Date: Fri, 8 May 2026 08:11:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts To: Stefano Stabellini Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778220671-3A965938-79FB9B79/0/0 X-purgate-type: clean X-purgate-size: 3429 On 07.05.2026 23:44, Stefano Stabellini wrote: > On Thu, 7 May 2026, Jan Beulich wrote: >> On 07.05.2026 02:54, Stefano Stabellini wrote: >>> On Wed, 6 May 2026, Stefano Stabellini wrote: >>>> On Wed, 6 May 2026, Jan Beulich wrote: >>>>> When one of the linking passes fails, additional intermediate files are >>>>> still in place. Having them available for analysis of the underlying >>>>> problem can be pretty helpful. Collect some into a new intermediates/ >>>>> directory. (Nothing new will be collected if linking succeeds.) >>>>> >>>>> While there also make sure xen-syms is collected (into binaries/). This >>>>> is rather more useful for analysis of possible problems than its stripped >>>>> counterpart. >>>>> >>>>> Signed-off-by: Jan Beulich >>>>> --- >>>>> As the issue this is meant to help with didn't re-occur with this in >>>>> place, the new logic wasn't really tested yet. >>>> >>>> It looks OK but please provide a link to a successful pipeline >> >> Well, I had it in use in >> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 >> but does that count, when the issue the change is for didn't really occur? >> For now I can't test the additions without having a way to trigger that >> symbol table issue (or any other problem at one of the linking stages). >> Short of artificially breaking things, that is. > > Please break it on purpose. Just push to a temporary branch. > > >>>> Reviewed-by: Stefano Stabellini >> >> Thanks, but the above wants clarifying first, and the below suggests you >> actually meant to take back the R-b. >> >>> Actually, I see that the build script is run with bash -ex so I wonder >>> if collect_xen_artefacts would even run if make fails. I think we need: >>> >>> trap collect_xen_artefacts EXIT >> >> I don't feel comfortable making such a change. Furthermore it's unrelated, >> as it would mean that on other build failures successfully created final >> binaries wouldn't be collected either (after all on x86 it may be only one >> of the two links that failed). Plus then it would likely want doing >> differently, by making the EXIT hook invoke a new >> collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered >> (except for the xen-syms addition there)? > > "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain > the type of change that would be needed to make this work, because as I > understand it, it does not work now. > > From your comment I don't understand if you think that the patch as is > would work as intended or you agree with my comment that it would not > work. Given the -e passed to bash, I don't expect it to work as is. However, I question this behavior. Exiting on error may be okay for any of the preparatory commands, but exiting on failure of make feels dubious [1]. Hence I'm unsure which way to deal with that aspect (i.e. I'd prefer to latch the main make's status, collect artifacts, and then exit the script with make's status). Somewhat related: Why is it that collect_xen_artefacts is invoked three times, rather than just once at the very bottom of the script? At which point it wouldn't even need to be a function. Jan [1] E.g. a failed tools build may also be easier to analyze if the already built components (libraries in particular) were collected. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778221027-8C47CD75-8A5280A1/0/0 X-purgate-type: clean X-purgate-size: 2023 On 07.05.2026 19:49, Andrew Cooper wrote: > On 07/05/2026 12:41 pm, Jan Beulich wrote: >> It's not really doing anything for valid GFNs, which renders its one use >> site pretty pointless. The other isn't so much about setting anything, but >> rather about clearing. Rename the macro accordingly. >> >> The main point here, however, is about Rafal spotting the double >> fetching of the GFN (first in gnttab_unpopulate_status_frames(), then >> again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass >> in the already fetched GFN, while dropping the no longer used parameters. >> >> Suggested-by: Rafal Wojtczuk >> Signed-off-by: Jan Beulich >> --- >> Do we even need the hook anymore? It has been expanding the same for Arm >> and x86. > > At this point, I'd say no. > > The macro has changed contents several times since it's introduction.  > The grant table macros especially demonstrate how poor the common/arch > interfaces are. Okay, unless I hear otherwise (pretty soon) I'll drop it altogether in v2. >> --- a/xen/common/grant_table.c >> +++ b/xen/common/grant_table.c >> @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d >> { >> int rc = gfn_eq(gfn, INVALID_GFN) >> ? 0 >> - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, >> - page_to_mfn(pg)); >> + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); >> > > This is just a more complex way of writing > >     if ( !gfn_eq(gfn, INVALID_GFN) ) >         rc = gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); With up-front int rc = 0; yes. As in many other cases I'm trying to keep churn low when there's no pretty much objectively better way of writing things. Personally I prefer the "just an initializer" form (iirc it was also me who introduced the above code in that shape). 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Smith" , Oleksii Kurochko , Xen-devel References: <20260507171933.1573983-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260507171933.1573983-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778221859-7216A8B7-32E0CAAD/10/73395122804 X-purgate-type: spam X-purgate-size: 1102 On 07.05.2026 19:19, Andrew Cooper wrote: > This capability is experimental, has seen no development since 2011, and these > days only gets edited to fix the build. > > While it can be compiled out (of Xen at least), it is a maintenance burden on > surrounding code that we'd prefer to stop paying. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Michal Orzel > CC: Jan Beulich > CC: Julien Grall > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Juergen Gross > CC: Tamas K Lengyel > CC: Daniel P. Smith > CC: Oleksii Kurochko > > Slightly RFC. I'm suspect I might be asked to split this up a bit, but if so, > suggestions on where to draw the lines please. tools, common, x86, xsm in (perhaps) this order? That would then also pretty much isolate who each one needs acks from. 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> >> + > >> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) > >> + return -EINVAL; > >> + > >> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) > >> + return -EINVAL; > >> + > >> + if (state->target_residency < state->exit_latency) > >> + return -EINVAL; > >> + > >> + if (!prev_state) > >> + return 0; > >> + > >> + if (state->exit_latency <= prev_state->exit_latency) > >> + return -EINVAL; > >> + > >> + if (state->target_residency <= prev_state->target_residency) > >> + return -EINVAL; > > > > I'm not an expert on C-states, but isn't this checking against the > > previous value kind of defeating part of the purpose of the command > > line? > > I don't know. The question would need raising to the author. > > > Also, it might help to also write down those limits in the command > > line documentation. > > What do you mean there? Some of the values are universal, but some > checks are against model-specific values. I don't think you mean to > enumerate them all? Maybe it's indeed not very useful. What I referring to was something along the lines of: "the command line provided residency and latency values must be smaller than the default ones". As noted above it seems weird to me than higher than current values cannot be set, albeit I have no idea what's the expected usage of this interface. Thanks, Roger. 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Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Fix lazy mmu handling across context switch Date: Fri, 8 May 2026 10:05:14 +0200 Message-ID: <20260508080514.454607-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[21]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:dkim,suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; TO_DN_SOME(0.00)[]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Queue-Id: A41BF5C480 X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Score: -3.01 X-purgate-ID: tlsNG-bad1c0/1778227518-37175A53-532E17D9/0/0 X-purgate-type: clean X-purgate-size: 3371 The recent rework of mmu lazy mode has resulted in problems when running as a Xen PV guest. Enabling lazy mmu mode for the new context during context switch is done from the arch_end_context_switch() hook, but when calling this hook current hasn't been changed yet, so the lazy mmu mode state of the wrong task is modified. Additionally it is much cleaner to use lazy_mmu_mode_pause() and lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids conditionals in those hooks. In order not having to add another hook to be called after switching current, modify lazy_mmu_mode_resume() to use a new sub-function which takes a task pointer as parameter. This new sub-function can then be used in the xen_end_context_switch() hook. Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") Signed-off-by: Juergen Gross --- arch/x86/xen/enlighten_pv.c | 7 ++----- include/linux/pgtable.h | 33 ++++++++++++++++++++++++--------- 2 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index ed2d7a3756ce..67bb6bf6d240 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct task_struct *prev) { BUG_ON(preemptible()); - if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { - arch_leave_lazy_mmu_mode(); - } + lazy_mmu_mode_pause(); enter_lazy(XEN_LAZY_CPU); } @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct task_struct *next) xen_mc_flush(); leave_lazy(XEN_LAZY_CPU); - if (__task_lazy_mmu_mode_active(next)) - arch_enter_lazy_mmu_mode(); + lazy_mmu_mode_resume_task(next); } static unsigned long xen_store_tr(void) diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index cdd68ed3ae1a..83a099bf2038 100644 --- a/include/linux/pgtable.h +++ b/include/linux/pgtable.h @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) arch_leave_lazy_mmu_mode(); } +/** + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a specific task. + * + * Like lazy_mmu_mode_resume() below, but with a task specified. + * Must be called only by lazy_mmu_mode_resume() or during context switch. + * Must never be called in interrupt context. + * + * Must match a call to lazy_mmu_mode_pause(). + * + * Has no effect if called: + * - While paused (inside another pause()/resume() pair) + */ +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) +{ + struct lazy_mmu_state *state = &task->lazy_mmu_state; + + VM_WARN_ON_ONCE(state->pause_count == 0); + + if (--state->pause_count == 0 && state->enable_count > 0) + arch_enter_lazy_mmu_mode(); +} + /** * lazy_mmu_mode_resume() - Resume the lazy MMU mode. * @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) */ static inline void lazy_mmu_mode_resume(void) { - struct lazy_mmu_state *state = ¤t->lazy_mmu_state; - - if (in_interrupt()) - return; - - VM_WARN_ON_ONCE(state->pause_count == 0); - - if (--state->pause_count == 0 && state->enable_count > 0) - arch_enter_lazy_mmu_mode(); + if (!in_interrupt()) + lazy_mmu_mode_resume_task(current); } #else static inline void lazy_mmu_mode_enable(void) {} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 08:34:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 08:34:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303288.1576745 (Exim 4.92) (envelope-from ) id 1wLGej-0001bV-IX; Fri, 08 May 2026 08:33:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303288.1576745; Fri, 08 May 2026 08:33:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGej-0001bO-Fq; Fri, 08 May 2026 08:33:57 +0000 Received: by outflank-mailman (input) for mailman id 1303288; Fri, 08 May 2026 08:33:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGeh-0001bI-Ri for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:33:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLGeh-00FZCC-3Y for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:33:55 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd9fe4-bab6-0a2a0a5309dd-0a2a4508e796-40 for ; Fri, 08 May 2026 10:33:54 +0200 Received: from [209.85.208.44] (helo=mail-ed1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd9ff2-63b5-0a2a45080019-d155d02cb05c-3 for ; Fri, 08 May 2026 10:33:54 +0200 Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-67389cf78b0so3174707a12.2 for ; Fri, 08 May 2026 01:33:54 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org References: <20260508080514.454607-1-jgross@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260508080514.454607-1-jgross@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------3Jq2hVC2vaJmzLdycTi38fj0" X-purgate-ID: tlsNG-c1860d/1778229234-B6B74DB1-1846446D/0/0 X-purgate-type: clean X-purgate-size: 11414 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------3Jq2hVC2vaJmzLdycTi38fj0 Content-Type: multipart/mixed; boundary="------------Vt7oWIJw8gIt0eyJaT1vcDAe"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: kevin.brodsky@arm.com, mmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. 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Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org Message-ID: <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch References: <20260508080514.454607-1-jgross@suse.com> In-Reply-To: <20260508080514.454607-1-jgross@suse.com> --------------Vt7oWIJw8gIt0eyJaT1vcDAe Content-Type: multipart/mixed; boundary="------------oDEGK9VJWMWYbdXgkX7jaAvL" --------------oDEGK9VJWMWYbdXgkX7jaAvL Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 UGxlYXNlIGRpc3JlZ2FyZCB0aGlzIHBhdGNoLiBJdCBpc24ndCBmaXhpbmcgdGhlIHJlYWwg cHJvYmxlbS4NCg0KT24gMDguMDUuMjYgMTA6MDUsIEp1ZXJnZW4gR3Jvc3Mgd3JvdGU6DQo+ IFRoZSByZWNlbnQgcmV3b3JrIG9mIG1tdSBsYXp5IG1vZGUgaGFzIHJlc3VsdGVkIGluIHBy b2JsZW1zIHdoZW4NCj4gcnVubmluZyBhcyBhIFhlbiBQViBndWVzdC4gRW5hYmxpbmcgbGF6 eSBtbXUgbW9kZSBmb3IgdGhlIG5ldyBjb250ZXh0DQo+IGR1cmluZyBjb250ZXh0IHN3aXRj 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gti/xheIWO80kNehWnxxjKsz7R5uFqaXoTsH58hXx0ZJSH816ryhr84MGJdXsUSFqll4xOMqiOT C1dH1Qka3zuaIQJBpRmHQkQ/p1uzIpO7H5S0xSmXPbrLXG0tLk180HKKuFZf4oZYcaTriaOpt0z 2KG8wKgwwsCGKCFMgHWHx2BbGypjj+F7YBvyrvsrclOSc5JjbCGN0exGhSRnqqakhb2QWIQBIzz MQCn7w== X-Received: by 2002:a05:6512:33ca:b0:5a8:8222:7fd2 with SMTP id 2adb3069b0e04-5a887add1f1mr3528722e87.2.1778229434408; Fri, 08 May 2026 01:37:14 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> <87lddusvpy.fsf@epam.com> In-Reply-To: <87lddusvpy.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 11:37:02 +0300 X-Gm-Features: AVHnY4JYt4-0UmJ7JSJaWoyZcgjN2R8NDLx-IG2Pt8MeXk4pyFfoI5_ZvDR8HQg Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Volodymyr Babchuk Cc: Luca Fancellu , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778229435-09B68C48-A14C093E/0/0 X-purgate-type: clean X-purgate-size: 11142 Hi Volodymyr, Thank you for the feedback. On Fri, May 8, 2026 at 1:25=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mykola, > > Mykola Kvach writes: > > [...] > > >> > + status =3D can_system_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_scheduler; > >> > >> When we have an error and we get the resume_scheduler path, we apply b= ack the > >> context of the guest saved previously in do_psci_1_0_system_suspend(),= so am I > >> correct saying the guest won=E2=80=99t get any PSCI error back and we = resume the guest > >> from the guest resume entrypoint? > >> > >> In case, should we have a different path that returns a PSCI error (PS= CI_*) into the guest > >> x0, and skips the context restore? > > > > You are right about the current control flow: once the virtual > > SYSTEM_SUSPEND request has been accepted and the domain has been parked= , a > > later failure in the Xen-wide suspend path resumes the domain through t= he normal > > domain resume path, rather than returning a PSCI error from the origina= l call. > > > > This is intentional in the current design. The virtual PSCI SYSTEM_SUSP= END > > path parks the domain and saves its resume context. The actual Xen-wide= host > > suspend is a separate step that is attempted only after all domains are > > suspended. > > > > So a failure in the later Xen-wide suspend step is treated as an abort = of the > > host suspend attempt after the domain suspend was already accepted. The= domain > > is then resumed through the existing domain resume path, similarly to t= he > > toolstack/xl suspend-resume flow, rather than by re-entering the guest = PSCI > > call path and modifying the saved vCPU context again. > > > > I agree this design is not obvious from the patch. I will clarify the c= ommit > > message and comments. If you or the maintainers think that failures bef= ore the > > physical SYSTEM_SUSPEND call succeeds should be reported back through t= he > > original virtual PSCI call, then this would require a different flow. I= was > > trying to avoid that extra complexity in this series. > > I think that there is no sense to reporting an error back to guest. PSCI > allows resume at any stage, so it is acceptable to have such brief "suspe= nd" > > > > >> > >> > + } > >> > + > >> > + /* > >> > + * Non-boot CPUs have to be disabled on suspend and enabled on = resume > >> > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead= to PSCI > >> > + * CPU_OFF to be called by each non-boot CPU. Depending on the = underlying > >> > + * platform capabilities, this may lead to the physical powerin= g down of > >> > + * CPUs. > >> > + */ > >> > + status =3D disable_nonboot_cpus(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_nonboot_cpus; > >> > + } > >> > + > >> > + time_suspend(); > >> > + > >> > + status =3D iommu_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_time; > >> > + } > >> > + > >> > + console_start_sync(); > >> > + status =3D console_suspend(); > >> > + if ( status ) > >> > + { > >> > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=3D%= d\n", status); > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_end_sync; > >> > + } > >> > + > >> > + local_irq_save(flags); > >> > + status =3D gic_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_irqs; > >> > + } > >> > + > >> > + set_init_ttbr(xen_pgtable); > >> > + > >> > + /* > >> > + * Enable identity mapping before entering suspend to simplify > >> > + * the resume path > >> > + */ > >> > + update_boot_mapping(true); > >> > + > >> > + if ( prepare_resume_ctx(&cpu_context) ) > >> > + { > >> > + status =3D call_psci_system_suspend(); > >> > + /* > >> > + * If suspend is finalized properly by above system suspend= PSCI call, > >> > + * the code below in this 'if' branch will never execute. E= xecution > >> > + * will continue from hyp_resume which is the hypervisor's = resume point. > >> > + * In hyp_resume CPU context will be restored and since lin= k-register is > >> > + * restored as well, it will appear to return from prepare_= resume_ctx. > >> > + * The difference in returning from prepare_resume_ctx on s= ystem suspend > >> > + * versus resume is in function's return value: on suspend,= the return > >> > + * value is a non-zero value, on resume it is zero. That is= why the > >> > + * control flow will not re-enter this 'if' branch on resum= e. > >> > + */ > >> > + if ( status ) > >> > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, er= r=3D%d\n", > >> > + status); > >> > + } > >> > + > >> > + system_state =3D SYS_STATE_resume; > >> > + update_boot_mapping(false); > >> > + > >> > + gic_resume(); > >> > + > >> > + resume_irqs: > >> > + local_irq_restore(flags); > >> > + > >> > + console_resume(); > >> > + resume_end_sync: > >> > + console_end_sync(); > >> > + > >> > + iommu_resume(); > >> > + > >> > + resume_time: > >> > + time_resume(); > >> > + > >> > + resume_nonboot_cpus: > >> > + /* > >> > + * The rcu_barrier() has to be added to ensure that the per cpu= area is > >> > + * freed before a non-boot CPU tries to initialize it (_free_pe= rcpu_area() > >> > + * has to be called before the init_percpu_area()). This scenar= io occurs > >> > + * when non-boot CPUs are hot-unplugged on suspend and hotplugg= ed on resume. > >> > + */ > >> > + rcu_barrier(); > >> > + enable_nonboot_cpus(); > >> > + > >> > + resume_scheduler: > >> > + scheduler_enable(); > >> > + thaw_domains(); > >> > + > >> > + system_state =3D SYS_STATE_active; > >> > + > >> > + printk("Resume (status %d)\n", status); > >> > + > >> > + domain_resume(d); > >> > +} > >> > + > >> > +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL= ); > >> > + > >> > +void host_system_suspend(struct domain *d) > >> > +{ > >> > + system_suspend_tasklet.data =3D (void *)d; > >> > + /* > >> > + * The suspend procedure has to be finalized by the pCPU#0 (non= -boot pCPUs > >> > + * will be disabled during the suspend). > >> > + */ > >> > + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); > >> > +} > >> > + > >> > /* > >> > * Local variables: > >> > * mode: C > >> > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > >> > index bd87ec430d..8fb9172186 100644 > >> > --- a/xen/arch/arm/vpsci.c > >> > +++ b/xen/arch/arm/vpsci.c > >> > @@ -5,6 +5,7 @@ > >> > > >> > #include > >> > #include > >> > +#include > >> > #include > >> > #include > >> > #include > >> > @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(regist= er_t epoint, register_t cid) > >> > if ( is_64bit_domain(d) && is_thumb ) > >> > return PSCI_INVALID_ADDRESS; > >> > > >> > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet = */ > >> > - if ( is_hardware_domain(d) ) > >> > + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d= ) ) > >> > return PSCI_NOT_SUPPORTED; > >> > > >> > /* Ensure that all CPUs other than the calling one are offline *= / > >> > @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(regist= er_t epoint, register_t cid) > >> > "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid= =3D%#"PRIregister"\n", > >> > epoint, cid); > >> > > >> > + if ( is_control_domain(d) ) > >> > >> Why is_control_domain() here and not is_hardware_domain() ? > > > > The use of is_control_domain() is intentional. > > > > The intended model is that Xen-wide host suspend is orchestrated by the > > privileged management/control domain. The control domain coordinates th= e > > toolstack side, asks other domains to enter suspend, and then issues th= e final > > SYSTEM_SUSPEND request to Xen. > > > > This does not have to be the same entity as the hardware domain. If the > > hardware domain is separate, it is one of the domains that the control = domain > > parks before the final host suspend step. > > > > The hwdom-specific checks in this patch have a different purpose: they = avoid > > the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardwa= re > > domain to be parked as part of the suspend sequence. They do not define= the > > policy for who is allowed to trigger Xen-wide host suspend. > > > > That said, this policy may not be optimal for all configurations, espec= ially > > when the control and hardware domain roles are split. I would appreciat= e your > > view, as well as the maintainers' views, on whether the trigger should = remain > > control-domain based, be tied to the hardware domain instead, or be exp= ressed > > through a separate host-suspend capability/helper. > > > Hardware domain owns all the hardware. Hardware shall be put to > power-down/suspended state before suspending the SoC, so it can be > resumed afterwards. You can't just pause hardware domain in the same way > as pausing all other domains. > > (Of course, we'll have the same issues with domain that have > passed-through hardware, but in this case Dom0 shall orchestrate proper > suspend sequence for these) Yes, I agree that the hardware domain must not be externally paused as a replacement for its own suspend path. What I meant to describe is a guest-driven suspend sequence. The control domain/toolstack may orchestrate the sequence, but each domain that needs to quiesce hardware, including the hardware domain and any domain with passed-through devices, is expected to enter its own suspend path first and quiesce its devices before issuing the virtual PSCI SYSTEM_SUSPEND call. Xen only treats other domains as ready for host suspend after they have voluntarily reached SHUTDOWN_suspend. In the split control/hardware-domain case, the final host-wide suspend request from the control domain is accepted only after the other domains, including the hardware domain, are already in SHUTDOWN_suspend. So my wording saying that the control domain "parks" the hardware domain was imprecise. The control domain orchestrates the sequence; it does not externally pause the hardware domain as a substitute for its own suspend path. Best regards, Mykola > > [...] > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 08:53:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 08:53:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303308.1576763 (Exim 4.92) (envelope-from ) id 1wLGxE-0005FZ-C3; Fri, 08 May 2026 08:53:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303308.1576763; Fri, 08 May 2026 08:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGxE-0005FS-9F; Fri, 08 May 2026 08:53:04 +0000 Received: by outflank-mailman (input) for mailman id 1303308; Fri, 08 May 2026 08:53:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGxD-0005FM-Iu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:53:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLGxC-004f2F-Vo for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:53:02 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fda46d-e002-0a2a0a5209dd-0a2a4509a580-10 for ; Fri, 08 May 2026 10:53:02 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fda46e-2497-0a2a45090019-d155da30eda8-3 for ; Fri, 08 May 2026 10:53:02 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc56c52a0d1so283622366b.1 for ; Fri, 08 May 2026 01:53:02 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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xen-devel , Boris Ostrovsky Message-ID: <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> In-Reply-To: --------------t3vC8SoGTWdPdMkfSJf5PH1L Content-Type: multipart/mixed; boundary="------------dgfJz710yWfdu8L0Ewpd6czF" --------------dgfJz710yWfdu8L0Ewpd6czF Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMDcuMDUuMjYgMTg6MzEsIErDvHJnZW4gR3Jvw58gd3JvdGU6DQo+IE9uIDA3LjA0LjI2 IDExOjIzLCBLZXZpbiBCcm9kc2t5IHdyb3RlOg0KPj4gT24gMDUvMDQvMjAyNiAxMTo0MSwg TWFyZWsgTWFyY3p5a293c2tpLUfDs3JlY2tpIHdyb3RlOg0KPj4+IE9uIFRodSwgRmViIDI2 LCAyMDI2IGF0IDAyOjQxOjEyUE0gKzAxMDAsIErDvHJnZW4gR3Jvw58gd3JvdGU6DQo+Pj4+ IE9uIDI2LjAyLjI2IDE0OjI3LCBBbmRyZXcgQ29vcGVyIHdyb3RlOg0KPj4+Pj4gT24gMjYv MDIvMjAyNiAxOjE3IHBtLCBNYXJlayBNYXJjenlrb3dza2ktR8OzcmVja2kgd3JvdGU6DQo+ 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wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn9pG0FAwAAAAAACgkQsN6d1ii/Ey9g qQgAk/1AEkTxbbY4W50dkPyk4rO4Znz1egQzLRfGWf8MdwqKG/p312vFx8ejSP+fYLf1o/I4ext/ NHUP4eT9eaxAZZeqrmgassxCGweu+QeT2fPVOdnPco8csi5bPjrscsWxfrjXEGpaVUwz4ud3nFYO Nf3AtCv7puSfPftcS8XWr9EZpNBKXGeeDd5oLXrf5sEblW9XSjo4jKItIdSVVcCDB93lOzLQY/wz fOAvLi6QPJRKpUhmZDpmkOLwU8fE2qVuVygPLXW7QGcZ38VX5IfhF8rU3DDa+f/BB/Mr0GhzxVaW lFJOFBpBRuEdWU7E9/Qf3Wqyi1tODIhvmYzF0efwvQ== =kqXH -----END PGP SIGNATURE----- --------------RdDmWq5l0sPpSc0J9FZxrZu8-- From xen-devel-bounces@lists.xenproject.org Fri May 08 09:08:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:08:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303324.1576771 (Exim 4.92) (envelope-from ) id 1wLHCE-0007Qi-OR; Fri, 08 May 2026 09:08:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303324.1576771; Fri, 08 May 2026 09:08:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHCE-0007Qb-Lo; Fri, 08 May 2026 09:08:34 +0000 Received: by outflank-mailman (input) for mailman id 1303324; Fri, 08 May 2026 09:08:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHCD-0007QV-GS for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:08:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHCA-00DoEb-SK for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:08:32 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fda80b-5cb7-0a2a0a5109dd-0a2a450c8db8-10 for ; Fri, 08 May 2026 11:08:31 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fda80f-62f1-0a2a450c0019-d98c6eacc134-1 for ; Fri, 08 May 2026 11:08:31 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 56CD51AC1; Fri, 8 May 2026 02:08:25 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F04523F7B4; Fri, 8 May 2026 02:08:25 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778231310; bh=998AzUHkBd2MHjoPernwnRkOgC5TCEI3RLAhgvrlDps=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=WPh3yUoFMFj8+b6NrCFhAXEvHu9aundhUOnMwNWD2QHqLVB/wfS7QiwL+0BDpm4RF NSMUNZAiTkWs+ukXKE7RyPNfyloPQoejZ2iApXnQrGF7MghSNxsyc0kXZ3cJwCG8wd Yjtv0h4b+w7/JhHBBOSnR+TQIO25g+ipSooZj9r0= Message-ID: <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Date: Fri, 8 May 2026 11:08:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: mmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org References: <20260508080514.454607-1-jgross@suse.com> <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778231311-DA577CF5-7D136E2F/0/0 X-purgate-type: clean X-purgate-size: 5656 On 08/05/2026 10:33, Jürgen Groß wrote: > Please disregard this patch. It isn't fixing the real problem. That's what I would expect, see below. > > On 08.05.26 10:05, Juergen Gross wrote: >> The recent rework of mmu lazy mode has resulted in problems when >> running as a Xen PV guest. Enabling lazy mmu mode for the new context >> during context switch is done from the arch_end_context_switch() hook, >> but when calling this hook current hasn't been changed yet, so the >> lazy mmu mode state of the wrong task is modified. Currently xen_end_context_switch() checks if next has lazy MMU mode enabled and if so calls arch_enter_lazy_mmu_mode(), i.e. enter_lazy(XEN_LAZY_MMU). This does *not* modify any task state, rather it writes to the xen_lazy_mode percpu variable. I've thought about this from various angles when reworking lazy MMU, and the conclusion I made is that arch_{start,end}_context_switch() have no reason to change any task state. On arm64, for instance, we do nothing at all on context switching, since everything lazy MMU-related is tracked in task_struct and therefore already switched. Xen is trickier because it tracks lazy MMU/CPU state in a percpu variable, so these hooks do need to do something about it. This is entirely Xen-internal though, and there's no reason to be calling generic functions like lazy_mmu_mode_pause() that modify task state. The idea behind commit 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") is that TIF_LAZY_MMU_UPDATES now duplicates lazy_mmu_state in task_struct and we can therefore replace the former with the latter. More specifically, the assumption is that TIF_LAZY_MMU_UPDATES is set if and only if the task has been scheduled out and __task_lazy_mmu_mode_active(task) is true. Clearly there is something wrong with this assumption, but I still can't put my finger on it. For now I would suggest reverting this commit if that solves the issue Marek reported; the intention was not to introduce any functional change, but only a (minor) optimisation. - Kevin >> >> Additionally it is much cleaner to use lazy_mmu_mode_pause() and >> lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids >> conditionals in those hooks. >> >> In order not having to add another hook to be called after switching >> current, modify lazy_mmu_mode_resume() to use a new sub-function which >> takes a task pointer as parameter. This new sub-function can then be >> used in the xen_end_context_switch() hook. >> >> Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when >> context-switching") >> Signed-off-by: Juergen Gross >> --- >>   arch/x86/xen/enlighten_pv.c |  7 ++----- >>   include/linux/pgtable.h     | 33 ++++++++++++++++++++++++--------- >>   2 files changed, 26 insertions(+), 14 deletions(-) >> >> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c >> index ed2d7a3756ce..67bb6bf6d240 100644 >> --- a/arch/x86/xen/enlighten_pv.c >> +++ b/arch/x86/xen/enlighten_pv.c >> @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct >> task_struct *prev) >>   { >>       BUG_ON(preemptible()); >>   -    if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { >> -        arch_leave_lazy_mmu_mode(); >> -    } >> +    lazy_mmu_mode_pause(); >>       enter_lazy(XEN_LAZY_CPU); >>   } >>   @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct >> task_struct *next) >>         xen_mc_flush(); >>       leave_lazy(XEN_LAZY_CPU); >> -    if (__task_lazy_mmu_mode_active(next)) >> -        arch_enter_lazy_mmu_mode(); >> +    lazy_mmu_mode_resume_task(next); >>   } >>     static unsigned long xen_store_tr(void) >> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >> index cdd68ed3ae1a..83a099bf2038 100644 >> --- a/include/linux/pgtable.h >> +++ b/include/linux/pgtable.h >> @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) >>           arch_leave_lazy_mmu_mode(); >>   } >>   +/** >> + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a >> specific task. >> + * >> + * Like lazy_mmu_mode_resume() below, but with a task specified. >> + * Must be called only by lazy_mmu_mode_resume() or during context >> switch. >> + * Must never be called in interrupt context. >> + * >> + * Must match a call to lazy_mmu_mode_pause(). >> + * >> + * Has no effect if called: >> + * - While paused (inside another pause()/resume() pair) >> + */ >> +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) >> +{ >> +    struct lazy_mmu_state *state = &task->lazy_mmu_state; >> + >> +    VM_WARN_ON_ONCE(state->pause_count == 0); >> + >> +    if (--state->pause_count == 0 && state->enable_count > 0) >> +        arch_enter_lazy_mmu_mode(); >> +} >> + >>   /** >>    * lazy_mmu_mode_resume() - Resume the lazy MMU mode. >>    * >> @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) >>    */ >>   static inline void lazy_mmu_mode_resume(void) >>   { >> -    struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> - >> -    if (in_interrupt()) >> -        return; >> - >> -    VM_WARN_ON_ONCE(state->pause_count == 0); >> - >> -    if (--state->pause_count == 0 && state->enable_count > 0) >> -        arch_enter_lazy_mmu_mode(); >> +    if (!in_interrupt()) >> +        lazy_mmu_mode_resume_task(current); >>   } >>   #else >>   static inline void lazy_mmu_mode_enable(void) {} > From xen-devel-bounces@lists.xenproject.org Fri May 08 09:09:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:09:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303330.1576781 (Exim 4.92) (envelope-from ) id 1wLHDA-0007sz-1s; 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Enable the option by default to make PVH dom0 more robust in its default configuration. Signed-off-by: Roger Pau Monné --- docs/misc/xen-command-line.pandoc | 2 +- xen/arch/x86/hvm/emulate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..0cbac1093928 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. * The `pf-fixup` boolean is only applicable when using a PVH dom0 and - defaults to false. + defaults to true. When running dom0 in PVH mode the dom0 kernel has no way to map MMIO regions into its physical memory map, such mode relies on Xen dom0 builder diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..bb1bb03ac4e9 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -165,7 +165,7 @@ void hvmemul_cancel(struct vcpu *v) hvmemul_cache_disable(v); } -bool __ro_after_init opt_dom0_pf_fixup; +bool __ro_after_init opt_dom0_pf_fixup = true; static int hwdom_fixup_p2m(paddr_t addr) { unsigned long gfn = paddr_to_pfn(addr); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 09:24:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:24:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303348.1576789 (Exim 4.92) (envelope-from ) id 1wLHRu-0002Op-7U; Fri, 08 May 2026 09:24:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303348.1576789; Fri, 08 May 2026 09:24:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHRu-0002Oi-4s; Fri, 08 May 2026 09:24:46 +0000 Received: by outflank-mailman (input) for mailman id 1303348; Fri, 08 May 2026 09:24:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHRs-0002Oc-Sh for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:24:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHRs-00Fj5r-6F for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:24:44 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdabcd-bab6-0a2a0a5309dd-0a2a4507b618-40 for ; Fri, 08 May 2026 11:24:44 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdabdb-229c-0a2a45070019-d155802ded17-3 for ; Fri, 08 May 2026 11:24:44 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4891e86fabeso21621865e9.1 for ; Fri, 08 May 2026 02:24:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260508090911.51941-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778232284-23F7EC48-252E3F46/0/0 X-purgate-type: clean X-purgate-size: 894 On 08.05.2026 11:09, Roger Pau Monne wrote: > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. > If using this option is necessary to fix an issue, please report a bug. > > * The `pf-fixup` boolean is only applicable when using a PVH dom0 and > - defaults to false. > + defaults to true. > > When running dom0 in PVH mode the dom0 kernel has no way to map MMIO > regions into its physical memory map, such mode relies on Xen dom0 builder While this paragraph is okay to keep as is, imo the last paragraph concerning this option would want re-wording to reflect the changed default. Plus, as indicated on Matrix, add a hint that people needing to use this option (in its negative form) should report that fact (and relevant details). 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pr=C From: Jiaqing Zhao To: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano Stabellini" CC: Jiaqing Zhao , Subject: [PATCH] ns16550: add support for WCH CH382 serial adapters Date: Fri, 8 May 2026 17:28:13 +0800 Message-ID: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029929:EE_|SJ0PR12MB6757:EE_ X-MS-Office365-Filtering-Correlation-Id: c84d6a3e-0779-4277-607e-08deace42e52 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700016|82310400026|13003099007|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: oz+zLRIPFVH5nvdoNTMbXpxLhYvxw1hy+Z1Z08wqCPrGxnMnfTffSgdGpJ0WHykVBep4gVMM6pgSPXtbHJLP1h5nGDddckAjkR3U7DVhS21m1SOmI6sNYc9QAn/zhRoQ4v7XP7AYjuycojAapX6ZC3qdiXued3cHCdUKiphCP7q5NH8oiSHqjQqDnNWK/RHY9DNliapu0Nk9aB5I8YH9y5+nIVHukVJPHp7ENCUp2o6DmSuvt4Ik9KJYWunm9qTJ+rt5ClgQDeGz6n0FInTB4hPaxUktMG1uMO0HVQjhvgLhhmi5a9bwqF5E3BY3vAjzfjAIX0jjUdx43lcvAjbG8W9m+evNzz6rZX3tGPwau3aXAEqTvW/98zqjJJ+3oqx6/eS5TIFftpa2xKera8qC7OgjKGu8vLNeEJeBdJ/KDXFxfxSEBgz0QdjLniX4rncRn3MNC6Exgx6x7lXQo0ho2nr3zVdRxYWHm1hAi1qxZHAYcrrgNyCyN+rNAWH+jiSAXAupYKecAQ6hghFNrHqASqFBAFyHg+ocgFqdBmVdUVrKL070hCIh2qFEORPinDCvBCMX2LOn7wHozeKdxWcyQZ4vc1h8TpvhQpdHyFCAf7bhsSBGzxwWjBTK3rsxQm4/I4MxsAwzAjGRX4NDtS62e2+Twq0aRzCRhEPrUfMWPmZ0LAQiIR3DW5iCmc7rlzPK X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700016)(82310400026)(13003099007)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao --- xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..106ef56316 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCH, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCH, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, }; static int __init diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h index 5884a20b8f..b8316d464c 100644 --- a/xen/include/xen/pci_ids.h +++ b/xen/include/xen/pci_ids.h @@ -13,6 +13,8 @@ #define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_VENDOR_ID_WCH 0x1c00 + #define PCI_VENDOR_ID_INTEL 0x8086 #endif /* XEN_PCI_IDS_H */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 09:30:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:30:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303368.1576809 (Exim 4.92) (envelope-from ) id 1wLHXL-0004fb-4w; Fri, 08 May 2026 09:30:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303368.1576809; Fri, 08 May 2026 09:30:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHXL-0004fU-19; Fri, 08 May 2026 09:30:23 +0000 Received: by outflank-mailman (input) for mailman id 1303368; Fri, 08 May 2026 09:30:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHXJ-0004fM-GG for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:30:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHXI-00FGeQ-Ia for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:30:20 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdad28-bab6-0a2a0a5309dd-0a2a450ae118-24 for ; Fri, 08 May 2026 11:30:20 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdad2b-56b3-0a2a450a0019-d98c6eacea1a-1 for ; Fri, 08 May 2026 11:30:19 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BF1E1BCA; Fri, 8 May 2026 02:30:13 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 74F673F7B4; Fri, 8 May 2026 02:30:14 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:From:To:Cc:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778232618; bh=s8DdICLhnj/DfQCudkc982W5x6Y5k2ODjetxBBj7jzQ=; h=Date:Subject:From:To:Cc:References:In-Reply-To:From; b=pGosNmLKXsFDpqHZ2v4awPO7R4BJLnRLDFG6QTRmbEy3znEuuSjWSCNr806Eg77XW R4Pa91NJ76pjBXYmMgu74Gf4TW14vrW4noSoTnyMABnH9Ok6XcDP2lWnraI7HJAZZR 0y//lSeZUixyJS7TWw3LdVRkiS9PDk3gQcxwKXMg= Message-ID: Date: Fri, 8 May 2026 11:30:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch From: Kevin Brodsky To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org, =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20260508080514.454607-1-jgross@suse.com> <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Content-Language: en-GB In-Reply-To: <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778232620-7E38D8B7-8099C4C2/0/0 X-purgate-type: clean X-purgate-size: 5884 + Marek (the wrong address was in Cc) On 08/05/2026 11:08, Kevin Brodsky wrote: > On 08/05/2026 10:33, Jürgen Groß wrote: >> Please disregard this patch. It isn't fixing the real problem. > That's what I would expect, see below. > >> On 08.05.26 10:05, Juergen Gross wrote: >>> The recent rework of mmu lazy mode has resulted in problems when >>> running as a Xen PV guest. Enabling lazy mmu mode for the new context >>> during context switch is done from the arch_end_context_switch() hook, >>> but when calling this hook current hasn't been changed yet, so the >>> lazy mmu mode state of the wrong task is modified. > Currently xen_end_context_switch() checks if next has lazy MMU mode > enabled and if so calls arch_enter_lazy_mmu_mode(), i.e. > enter_lazy(XEN_LAZY_MMU). This does *not* modify any task state, rather > it writes to the xen_lazy_mode percpu variable. > > I've thought about this from various angles when reworking lazy MMU, and > the conclusion I made is that arch_{start,end}_context_switch() have no > reason to change any task state. On arm64, for instance, we do nothing > at all on context switching, since everything lazy MMU-related is > tracked in task_struct and therefore already switched. > > Xen is trickier because it tracks lazy MMU/CPU state in a percpu > variable, so these hooks do need to do something about it. This is > entirely Xen-internal though, and there's no reason to be calling > generic functions like lazy_mmu_mode_pause() that modify task state. > > The idea behind commit 291b3abed657 ("x86/xen: use lazy_mmu_state when > context-switching") is that TIF_LAZY_MMU_UPDATES now duplicates > lazy_mmu_state in task_struct and we can therefore replace the former > with the latter. More specifically, the assumption is that > TIF_LAZY_MMU_UPDATES is set if and only if the task has been scheduled > out and __task_lazy_mmu_mode_active(task) is true. > > Clearly there is something wrong with this assumption, but I still can't > put my finger on it. For now I would suggest reverting this commit if > that solves the issue Marek reported; the intention was not to introduce > any functional change, but only a (minor) optimisation. > > - Kevin > >>> Additionally it is much cleaner to use lazy_mmu_mode_pause() and >>> lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids >>> conditionals in those hooks. >>> >>> In order not having to add another hook to be called after switching >>> current, modify lazy_mmu_mode_resume() to use a new sub-function which >>> takes a task pointer as parameter. This new sub-function can then be >>> used in the xen_end_context_switch() hook. >>> >>> Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when >>> context-switching") >>> Signed-off-by: Juergen Gross >>> --- >>>   arch/x86/xen/enlighten_pv.c |  7 ++----- >>>   include/linux/pgtable.h     | 33 ++++++++++++++++++++++++--------- >>>   2 files changed, 26 insertions(+), 14 deletions(-) >>> >>> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c >>> index ed2d7a3756ce..67bb6bf6d240 100644 >>> --- a/arch/x86/xen/enlighten_pv.c >>> +++ b/arch/x86/xen/enlighten_pv.c >>> @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct >>> task_struct *prev) >>>   { >>>       BUG_ON(preemptible()); >>>   -    if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { >>> -        arch_leave_lazy_mmu_mode(); >>> -    } >>> +    lazy_mmu_mode_pause(); >>>       enter_lazy(XEN_LAZY_CPU); >>>   } >>>   @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct >>> task_struct *next) >>>         xen_mc_flush(); >>>       leave_lazy(XEN_LAZY_CPU); >>> -    if (__task_lazy_mmu_mode_active(next)) >>> -        arch_enter_lazy_mmu_mode(); >>> +    lazy_mmu_mode_resume_task(next); >>>   } >>>     static unsigned long xen_store_tr(void) >>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >>> index cdd68ed3ae1a..83a099bf2038 100644 >>> --- a/include/linux/pgtable.h >>> +++ b/include/linux/pgtable.h >>> @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) >>>           arch_leave_lazy_mmu_mode(); >>>   } >>>   +/** >>> + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a >>> specific task. >>> + * >>> + * Like lazy_mmu_mode_resume() below, but with a task specified. >>> + * Must be called only by lazy_mmu_mode_resume() or during context >>> switch. >>> + * Must never be called in interrupt context. >>> + * >>> + * Must match a call to lazy_mmu_mode_pause(). >>> + * >>> + * Has no effect if called: >>> + * - While paused (inside another pause()/resume() pair) >>> + */ >>> +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) >>> +{ >>> +    struct lazy_mmu_state *state = &task->lazy_mmu_state; >>> + >>> +    VM_WARN_ON_ONCE(state->pause_count == 0); >>> + >>> +    if (--state->pause_count == 0 && state->enable_count > 0) >>> +        arch_enter_lazy_mmu_mode(); >>> +} >>> + >>>   /** >>>    * lazy_mmu_mode_resume() - Resume the lazy MMU mode. >>>    * >>> @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) >>>    */ >>>   static inline void lazy_mmu_mode_resume(void) >>>   { >>> -    struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> - >>> -    if (in_interrupt()) >>> -        return; >>> - >>> -    VM_WARN_ON_ONCE(state->pause_count == 0); >>> - >>> -    if (--state->pause_count == 0 && state->enable_count > 0) >>> -        arch_enter_lazy_mmu_mode(); >>> +    if (!in_interrupt()) >>> +        lazy_mmu_mode_resume_task(current); >>>   } >>>   #else >>>   static inline void lazy_mmu_mode_enable(void) {} From xen-devel-bounces@lists.xenproject.org Fri May 08 09:54:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:54:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303391.1576817 (Exim 4.92) (envelope-from ) id 1wLHua-0007rf-VP; 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Fri, 08 May 2026 11:54:22 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdb2ce-62f1-0a2a450c0019-d98c6eacc006-1 for ; Fri, 08 May 2026 11:54:22 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 53F741BCA; Fri, 8 May 2026 02:54:16 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6A97A3F836; Fri, 8 May 2026 02:54:20 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778234061; bh=UKXz8qe6CYYl8KXHQkBSeLcEXveBk25zWF0FLtT+yKE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Ut8+a+EPP3X/dGPsnJmH2XWvwOLX3QKyFPxb/dXyfTZ15exwUseKgJi4fk74OstOH MTTVJGJv2XIha/tcFrEOG6KBdbcohMz6tRbsgYxppTIqOXj65xlm7yD4toUkI5IznK dFuDW1ZHsf/TF0D6F/GH2OqG/w7Bu4yxSVWkVolQ= Message-ID: <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> Date: Fri, 8 May 2026 11:54:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 To: Juergen Gross , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778234062-E0D63CF5-133CD4DB/0/0 X-purgate-type: clean X-purgate-size: 2334 On 08/05/2026 10:53, Juergen Gross wrote: > [...] > > But now I think I have found the real culprit in lazy_mmu_mode_enable(): > > static inline void lazy_mmu_mode_enable(void) > { >         struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > >         if (in_interrupt() || state->pause_count > 0) >                 return; > >         VM_WARN_ON_ONCE(state->enable_count == U8_MAX); > >         if (state->enable_count++ == 0) >                 arch_enter_lazy_mmu_mode(); > } > > Consider a preemption just before calling arch_enter_lazy_mmu_mode(). The > enable_count will be 1 now, but there was no switch to lazy mode yet. > > When the task becomes active again, context switch handling will see lazy > mode enabled (enable_count > 0), so it will call > arch_enter_lazy_mmu_mode(). > And then the task resumes and is calling arch_enter_lazy_mmu_mode() > another > time. Agreed, this must be the problem. I did wonder whether the lack of atomicity would cause trouble... arm64 isn't impacted because it tracks related state in task_struct only. powerpc and sparc do use percpu variables but that shouldn't matter as they disable preemption in the entire lazy MMU section. > > The only chance I'm seeing to avoid that would be to disable preemption > around all instances of testing a condition and then enabling or > disabling > lazy mmu mode. I don't immediately see why we would need such a big hammer. If we revert commit 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching"), then arch_{start,end}_context_switch() should once again do the right thing for Xen since the TIF_LAZY_MMU_UPDATES flag is separate from lazy_mmu_state. I think it looks like this: lazy_mmu_mode_enable()     state->enable_count++             arch_start_context_switch()              xen_lazy_mode == XEN_LAZY_NONE -> do nothing                          arch_end_context_switch()              TIF_LAZY_MMU_UPDATES not set -> do nothing             enter_lazy(XEN_LAZY_MMU) Nothing else should be checking lazy MMU state during the context switch. Does that make sense? - Kevin From xen-devel-bounces@lists.xenproject.org Fri May 08 10:09:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:09:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303408.1576826 (Exim 4.92) (envelope-from ) id 1wLI9Y-0001bM-7V; Fri, 08 May 2026 10:09:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303408.1576826; Fri, 08 May 2026 10:09:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLI9Y-0001bF-4C; Fri, 08 May 2026 10:09:52 +0000 Received: by outflank-mailman (input) for mailman id 1303408; Fri, 08 May 2026 10:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLI9W-0001as-BF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:09:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLI9V-00Frqh-HL for xen-devel@lists.xenproject.org; Fri, 08 May 2026 12:09:49 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdb66b-bab6-0a2a0a5309dd-0a2a4507a360-14 for ; Fri, 08 May 2026 12:09:49 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdb66d-229c-0a2a45070019-d155802ee0ee-3 for ; Fri, 08 May 2026 12:09:49 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so28688905e9.2 for ; Fri, 08 May 2026 03:09:49 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------NxeXpDUtU1CVH5wQvtQoY0qb" X-purgate-ID: tlsNG-ef75cf/1778234989-0A772C48-0C341B5A/0/0 X-purgate-type: clean X-purgate-size: 10243 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------NxeXpDUtU1CVH5wQvtQoY0qb Content-Type: multipart/mixed; boundary="------------344B6733Ezlm0YXXLj6S7075"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Kevin Brodsky , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky Message-ID: Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> In-Reply-To: <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> --------------344B6733Ezlm0YXXLj6S7075 Content-Type: multipart/mixed; boundary="------------9gc1VbDJpspadR0eY8H0pg21" --------------9gc1VbDJpspadR0eY8H0pg21 Content-Type: text/plain; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn9tmsFAwAAAAAACgkQsN6d1ii/Ey/P qgf9H8zBdSqCtTtRHMDzl02ActywwJ78jYULAg7+WwI7uGTjUqeVe4f9mlZcj5+z7F9bbP3tRjKu lf5Zp9LLtWdgAQw961hDhJdgg7hOzYxqIFDuMaH4Bb5i0tMFBbW11AGKTBy6elvrFT+BWVLwALuj akr7Em8rmM7KGBLsQtUywRaVyaWSQ6AbGW/6BJRs0v40xUAtFIsAyiadIJwKld0DtiP+5nrMJPrn zVWaBcvKK2dHhRPc4jFIRWlHZSc9x+f8JFHP2V1bRzVJP/5LhVwLg5uP4wv2KLoTJd4eWZ9tambs 6nsCkSPiEi8KDg/6oneUPpRlXzpKFkrtfiOgDT4nQg== =8Epf -----END PGP SIGNATURE----- --------------NxeXpDUtU1CVH5wQvtQoY0qb-- From xen-devel-bounces@lists.xenproject.org Fri May 08 10:28:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:28:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303428.1576835 (Exim 4.92) (envelope-from ) id 1wLIRb-0004hl-Oi; Fri, 08 May 2026 10:28:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303428.1576835; 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>>> >>>          if (in_interrupt() || state->pause_count > 0) >>>                  return; >>> >>>          VM_WARN_ON_ONCE(state->enable_count == U8_MAX); >>> >>>          if (state->enable_count++ == 0) >>>                  arch_enter_lazy_mmu_mode(); >>> } >>> >>> Consider a preemption just before calling >>> arch_enter_lazy_mmu_mode(). The >>> enable_count will be 1 now, but there was no switch to lazy mode yet. >>> >>> When the task becomes active again, context switch handling will see >>> lazy >>> mode enabled (enable_count > 0), so it will call >>> arch_enter_lazy_mmu_mode(). >>> And then the task resumes and is calling arch_enter_lazy_mmu_mode() >>> another >>> time. >> >> Agreed, this must be the problem. I did wonder whether the lack of >> atomicity would cause trouble... >> >> arm64 isn't impacted because it tracks related state in task_struct >> only. powerpc and sparc do use percpu variables but that shouldn't >> matter as they disable preemption in the entire lazy MMU section. >> >>> >>> The only chance I'm seeing to avoid that would be to disable preemption >>> around all instances of testing a condition and then enabling or >>> disabling >>> lazy mmu mode. >> >> I don't immediately see why we would need such a big hammer. If we >> revert commit 291b3abed657 ("x86/xen: use lazy_mmu_state when >> context-switching"), then arch_{start,end}_context_switch() should once >> again do the right thing for Xen since the TIF_LAZY_MMU_UPDATES flag is >> separate from lazy_mmu_state. I think it looks like this: >> >> lazy_mmu_mode_enable() >>      state->enable_count++ >>      >>          arch_start_context_switch() >>              xen_lazy_mode == XEN_LAZY_NONE -> do nothing >>                   >> >>          arch_end_context_switch() >>              TIF_LAZY_MMU_UPDATES not set -> do nothing >> >>          >>      enter_lazy(XEN_LAZY_MMU) >> >> Nothing else should be checking lazy MMU state during the context >> switch. >> >> Does that make sense? > > This would work, yes. > > OTOH I don't like the multiple conditions used for testing > (state->enable_count, > TIF_LAZY_MMU_UPDATES, xen_lazy_mode). > > Another variant would be to just let the Xen specific code tolerate > the double > calls by disabling preemption in the Xen code and checking via > __task_lazy_mmu_mode_active() if anything needs to be done. > > I'd really like to get rid of xen_lazy_mode completely. Without wishing to interrupt the flow too much. In XenServer, work on migration performance[1] has demonstrated that a very large number of multicalls issued by Linux are single-op multicalls. (I blindly assert) these must be coming from the lazy_mode logic, and they're even less efficient than making the hypercall normally, owing to the need to marshal it through the multicall ABI. There's a possibility that you can simply delete lazy mode and stuff gets faster.  (Although it's far more likely that the difference is in the noise). ~Andrew [1] The dominating perf problem for migration is ptwr emulation and Linux not using a hypercall, which IIRC accounts for 40% of wallclock time during live migration. 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Fri, 08 May 2026 03:38:35 -0700 (PDT) MIME-Version: 1.0 References: <87tssisw41.fsf@epam.com> In-Reply-To: <87tssisw41.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 13:38:24 +0300 X-Gm-Features: AVHnY4JlozUSNvhy8wXCtlMYC7rK6agBwsWomgaChMHdZYvMJ539aO9EpDsPkJw Message-ID: Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Volodymyr Babchuk Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1778236716-B6F72DB1-924C254B/0/0 X-purgate-type: clean X-purgate-size: 8864 Hi Volodymyr, Thanks for taking a look at this. On Fri, May 8, 2026 at 1:17=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mikola, > > Mykola Kvach writes: > > > From: Mirela Simonovic > > > > The context of CPU general purpose and system control registers must be > > saved on suspend and restored on resume. This is implemented in > > prepare_resume_ctx and before the return from the hyp_resume function. > > The prepare_resume_ctx must be invoked just before the PSCI system susp= end > > call is issued to the ATF. The prepare_resume_ctx must return a non-zer= o > > value so that the calling 'if' statement evaluates to true, causing the > > system suspend to be invoked. Upon resume, the context saved on suspend > > will be restored, including the link register. Therefore, after > > restoring the context, the control flow will return to the address > > pointed to by the saved link register, which is the place from which > > prepare_resume_ctx was called. To ensure that the calling 'if' statemen= t > > does not again evaluate to true and initiate system suspend, hyp_resume > > must return a zero value after restoring the context. > > > > Note that the order of saving register context into cpu_context structu= re > > must match the order of restoring. > > > > Support for ARM32 is not implemented. Instead, compilation fails with a > > build-time error if suspend is enabled for ARM32. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v8: > > - fix alignments in code > > > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/Makefile | 1 + > > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > > xen/arch/arm/suspend.c | 14 +++++ > > 4 files changed, 130 insertions(+), 1 deletion(-) > > create mode 100644 xen/arch/arm/suspend.c > > > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > > index 69200b2728..c36158271a 100644 > > --- a/xen/arch/arm/Makefile > > +++ b/xen/arch/arm/Makefile > > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > > obj-y +=3D shutdown.o > > obj-y +=3D smp.o > > obj-y +=3D smpboot.o > > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > > obj-y +=3D time.o > > obj-y +=3D traps.o > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 596e960152..2cb02ee314 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -562,6 +562,52 @@ END(efi_xen_start) > > #endif /* CONFIG_ARM_EFI */ > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > +/* > > + * int prepare_resume_ctx(struct cpu_context *ptr) > > "cpu_context" is very generic name, especially taking into account that > you are introducing a global variable with the same name. How about > "resume_cpu_context"? Ack. > > > + * > > + * x0 - pointer to the storage where callee's context will be saved > > + * > > + * CPU context saved here will be restored on resume in hyp_resume fun= ction. > > + * prepare_resume_ctx shall return a non-zero value. Upon restoring co= ntext > > + * hyp_resume shall return value zero instead. From C code that invoke= s > > + * prepare_resume_ctx, the return value is interpreted to determine wh= ether > > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > > + */ > > +FUNC(prepare_resume_ctx) > > + /* Store callee-saved registers */ > > How are planning to synchronise this code with actual cpu_context? > > I am pretty sure it is better to use offsets generated by asm-offset.c Ack. > > > + stp x19, x20, [x0], #16 > > + stp x21, x22, [x0], #16 > > + stp x23, x24, [x0], #16 > > + stp x25, x26, [x0], #16 > > + stp x27, x28, [x0], #16 > > + stp x29, lr, [x0], #16 > > + > > + /* Store stack-pointer */ > > + mov x2, sp > > + str x2, [x0], #8 > > + > > + /* Store system control registers */ > > + mrs x2, VBAR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTTBR_EL2 > > + str x2, [x0], #8 > > + mrs x2, TPIDR_EL2 > > + str x2, [x0], #8 > > + mrs x2, MDCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HSTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, CPTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HCR_EL2 > > + str x2, [x0], #8 > > + > > + /* prepare_resume_ctx must return a non-zero value */ > > + mov x0, #1 > > + ret > > +END(prepare_resume_ctx) > > > > FUNC(hyp_resume) > > /* Initialize the UART if earlyprintk has been enabled. */ > > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > > b enable_secondary_cpu_mm > > > > mmu_resumed: > > - b . > > + /* Now we can access the cpu_context, so restore the context h= ere */ > > + ldr x0, =3Dcpu_context > > + > > + /* Restore callee-saved registers */ > > + ldp x19, x20, [x0], #16 > > + ldp x21, x22, [x0], #16 > > + ldp x23, x24, [x0], #16 > > + ldp x25, x26, [x0], #16 > > + ldp x27, x28, [x0], #16 > > + ldp x29, lr, [x0], #16 > > + > > + /* Restore stack pointer */ > > + ldr x2, [x0], #8 > > + mov sp, x2 > > + > > + /* Restore system control registers */ > > + ldr x2, [x0], #8 > > + msr VBAR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTTBR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr TPIDR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr MDCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HSTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr CPTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HCR_EL2, x2 > > + isb > > + > > + /* > > + * Since context is restored return from this function will ap= pear > > + * as return from prepare_resume_ctx. To distinguish a return = from > > + * prepare_resume_ctx which is called upon finalizing the susp= end, > > + * as opposed to return from this function which executes on r= esume, > > + * we need to return zero value here. > > + */ > > + mov x0, #0 > > + ret > > END(hyp_resume) > > > > #endif /* CONFIG_SYSTEM_SUSPEND */ > > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/= asm/suspend.h > > index 31a98a1f1b..c127fa3d78 100644 > > --- a/xen/arch/arm/include/asm/suspend.h > > +++ b/xen/arch/arm/include/asm/suspend.h > > @@ -3,6 +3,8 @@ > > #ifndef ARM_SUSPEND_H > > #define ARM_SUSPEND_H > > > > +#include > > + > > struct domain; > > struct vcpu; > > struct vcpu_guest_context; > > @@ -14,6 +16,30 @@ struct resume_info { > > > > void arch_domain_resume(struct domain *d); > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +#ifdef CONFIG_ARM_64 > > +struct cpu_context { > > + register_t callee_regs[12]; > > + register_t sp; > > + register_t vbar_el2; > > + register_t vtcr_el2; > > + register_t vttbr_el2; > > + register_t tpidr_el2; > > + register_t mdcr_el2; > > + register_t hstr_el2; > > + register_t cptr_el2; > > + register_t hcr_el2; > > +} __aligned(16); > > +#else > > +#error "Define cpu_context structure for arm32" > > +#endif > > + > > +extern struct cpu_context cpu_context; > > + > > +int prepare_resume_ctx(struct cpu_context *ptr); > > +void hyp_resume(void); > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > #endif /* ARM_SUSPEND_H */ > > > > /* > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > new file mode 100644 > > index 0000000000..e38566b0b7 > > --- /dev/null > > +++ b/xen/arch/arm/suspend.c > > @@ -0,0 +1,14 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > + > > +#include > > + > > +struct cpu_context cpu_context =3D {}; > > Don't need to zero-initialize a global variable. Ack. Best regards, Mykola > > > + > > +/* > > + * Local variables: > > + * mode: C > > + * c-file-style: "BSD" > > + * c-basic-offset: 4 > > + * indent-tabs-mode: nil > > + * End: > > + */ > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 10:57:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:57:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303471.1576853 (Exim 4.92) (envelope-from ) id 1wLItj-0001C4-6I; Fri, 08 May 2026 10:57:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303471.1576853; Fri, 08 May 2026 10:57:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLItj-0001Bx-3E; Fri, 08 May 2026 10:57:35 +0000 Received: by outflank-mailman (input) for mailman id 1303471; Fri, 08 May 2026 10:57:34 +0000 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May 2026 13:34:38 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdca4d-c1f2-0a2a45010019-d98c6eacba5e-1 for ; Fri, 08 May 2026 13:34:38 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D79FB1BCA; Fri, 8 May 2026 04:34:31 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 03E453F836; Fri, 8 May 2026 04:34:35 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778240077; bh=jpZIElX28Dxn2BuY+beEs3GW5syLtcYHN+XpcMGjiFY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qWY/h57NvsKI49wz5DLKCCIr5xt/2ZZ45prTKDk+k2p1b/f0g3KzD2HptIGsv57/7 Cn8Q+/nIpPWjY6vPElWyfJxqykz/kSw45oYJP1XQ+5x5kNRCq3/CshZUowk9OAEXpt jz9cOa/8qtz+tVpsMrRjfOVZKv2x0bUlnB7OZt4Y= Message-ID: <265c0534-b480-4ab8-8f8a-2b5b8e7ca591@arm.com> Date: Fri, 8 May 2026 13:34:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778240078-AF555FF4-16C3EFE4/0/0 X-purgate-type: clean X-purgate-size: 1025 On 08/05/2026 12:09, Jürgen Groß wrote: > > OTOH I don't like the multiple conditions used for testing > (state->enable_count, > TIF_LAZY_MMU_UPDATES, xen_lazy_mode). > > Another variant would be to just let the Xen specific code tolerate > the double > calls by disabling preemption in the Xen code and checking via > __task_lazy_mmu_mode_active() if anything needs to be done. > > I'd really like to get rid of xen_lazy_mode completely. That certainly crossed my mind, but I didn't feel qualified to perform that kind of surgery, especially considering XEN_LAZY_CPU. There is presumably a good reason to track this one via a percpu variable, but for the MMU side it feels like this creates more problems than it solves. Maybe it is possible to keep XEN_LAZY_CPU untouched while removing XEN_LAZY_MMU and using is_lazy_mmu_mode_active() instead? If we do that, I don't think preemption is a concern - the lazy MMU mode is only relevant for current and cannot be used in interrupt context. - Kevin From xen-devel-bounces@lists.xenproject.org Fri May 08 12:22:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 12:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303561.1576884 (Exim 4.92) (envelope-from ) id 1wLKDh-0005vu-N9; Fri, 08 May 2026 12:22:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303561.1576884; Fri, 08 May 2026 12:22:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLKDh-0005vn-KF; Fri, 08 May 2026 12:22:17 +0000 Received: by outflank-mailman (input) for mailman id 1303561; Fri, 08 May 2026 12:22:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLKDg-0005uv-2S for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vPx0C38LbWoxxzsXJgZ+93nPzCnrrfcnJjxdTeIhFKFSai1EUEM0p/M0cEgR/ZyS6p6eo8ZMtGeTAHfXTXELYqZ8+I+slI9ZYZ3fo8s3f2jiyHB0FsPy5Xpo4wadwVIk9udOy2LLie66eAvtDXgkkTmifjjnDCvKXGDQOMImST1R6kphqplz6NvNES2z3NoEVQuEFTd/MMiXJyM4GJmhszUXWy+z78kENbsPmubOEIidTIwD5ojwai3igjKhndzx/jNCMwyyc1gOudb9aCleosSIQTDAAlMOZEnh5y6mZDNvXGgWhtQujYBXnSJpKFQxaAtHMbL/mlYdYTESVd9QqD65YWMgw8Gdu2v9RCss3JhCEuyrDCi0+sS9J6BxK0i033G5hjajdzcJG2ZwAEBrgsjMdKfReGlMjtHh+hAR1txDtKT5doZQ7Jay/ylwpoSV X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 May 2026 13:28:00.4865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c04522f5-c09f-4eb6-3159-08dead05a01b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000091.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7857 X-purgate-ID: tlsNG-16d1c6/1778246886-87D7AD75-602AFC03/0/0 X-purgate-type: clean X-purgate-size: 1872 Hi Mykola, >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>>=20 >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S >>> index 72c7b24498..596e960152 100644 >>> --- a/xen/arch/arm/arm64/head.S >>> +++ b/xen/arch/arm/arm64/head.S >>> @@ -561,6 +561,30 @@ END(efi_xen_start) >>>=20 >>> #endif /* CONFIG_ARM_EFI */ >>>=20 >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + >>> +FUNC(hyp_resume) >>=20 >> I think we should mask all exceptions here: >> msr DAIFSet, 0xf >>=20 >> until we resume correctly the status (VBAR_EL2, etc). >=20 > This was discussed in an earlier version: >=20 > https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef15= cb605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com/#= CAGeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com >=20 > For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In > particular, section 5.20.2 says that the caller must observe all the rule= s > described for CPU_SUSPEND, and section 6.4 explicitly says that the initi= al > state rules also apply to SYSTEM_SUSPEND. >=20 > For the return Exception level on AArch64, section 6.4.3.3 requires > SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to en= ter > this resume path with DAIF already masked by PSCI-compliant firmware. >=20 > I agree this assumption is not obvious from the code, so I will add a com= ment > at the resume entry point to document that this path relies on the PSCI i= nitial > core configuration requirements. Yes please, something along the line of /* * PSCI SYSTEM_SUSPEND follows CPU_SUSPEND initial-state rules. * On AArch64, firmware must return with SPSR_ELx.DAIF set, so * PSTATE.DAIF is already masked on entry here. */ Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 08 13:31:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 13:31:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303639.1576912 (Exim 4.92) (envelope-from ) id 1wLLIu-00080H-1q; Fri, 08 May 2026 13:31:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303639.1576912; Fri, 08 May 2026 13:31:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLLIt-00080A-V3; Fri, 08 May 2026 13:31:43 +0000 Received: by outflank-mailman (input) for mailman id 1303639; Fri, 08 May 2026 13:31:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLLIs-000804-BP for xen-devel@lists.xenproject.org; Fri, 08 May 2026 13:31:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLLIr-00GPEE-Ok for xen-devel@lists.xenproject.org; Fri, 08 May 2026 15:31:41 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fde5af-2eae-0a2a0a5409dd-0a2a45049a14-40 for ; Fri, 08 May 2026 15:31:41 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fde5bd-1dec-0a2a45040019-d155802ab012-3 for ; Fri, 08 May 2026 15:31:41 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48d102471a4so20242535e9.2 for ; Fri, 08 May 2026 06:31:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 08 May 2026 06:31:41 -0700 (PDT) Message-ID: <20642e09-5dce-4979-b126-b24a78db698e@suse.com> Date: Fri, 8 May 2026 15:31:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] time: drop dead code from gmtime() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778247101-28F753FF-0CC86827/0/0 X-purgate-type: clean X-purgate-size: 1298 "days", as calculated, can't be negative. Drop the respective loop and change its type. Similarly "rem" can't be negative and doesn't require more than 32 bits. Change its type, too. As a consequence, the tm_wday calculation also can't yield negative values, so the respective conditional can be dropped as well. Signed-off-by: Jan Beulich --- unstable.orig/xen/common/time.c 2025-07-22 16:21:18.000000000 +0200 +++ unstable/xen/common/time.c 2026-05-07 12:22:11.687769995 +0200 @@ -45,7 +45,8 @@ static DEFINE_SPINLOCK(wc_lock); struct tm gmtime(unsigned long t) { struct tm tbuf; - long days, rem; + unsigned long days; + unsigned int rem; int y; const unsigned short int *ip; @@ -70,18 +71,11 @@ struct tm gmtime(unsigned long t) tbuf.tm_sec = rem % 60; /* January 1, 1970 was a Thursday. */ tbuf.tm_wday = (4 + days) % 7; - if ( tbuf.tm_wday < 0 ) - tbuf.tm_wday += 7; while ( days >= (rem = __isleap(y) ? 366 : 365) ) { ++y; days -= rem; } - while ( days < 0 ) - { - --y; - days += __isleap(y) ? 366 : 365; - } tbuf.tm_year = y - 1900; tbuf.tm_yday = days; /* SAF-14-safe use boolean as an array index */ From xen-devel-bounces@lists.xenproject.org Fri May 08 13:36:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 13:36:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303649.1576921 (Exim 4.92) (envelope-from ) id 1wLLNT-000074-IW; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20642e09-5dce-4979-b126-b24a78db698e@suse.com> Content-Type: text/plain; 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Drop the respective loop and > change its type. Similarly "rem" can't be negative and doesn't require > more than 32 bits. Change its type, too. > > As a consequence, the tm_wday calculation also can't yield negative > values, so the respective conditional can be dropped as well. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper But, I really would prefer to rip this out entirely. This is used by exactly 2 things.  One is a console timestamp mode that isn't synchronised with dom0 updates to the RTC so of dubious utility in reality, and the other is for an intermediate representation of some of the emulation logic ported from QEMU, which I think we can remove entirely by swapping to s_time_t instead. This will fix a whole raft of MISRA violations about use of unsafe library functions.  We're safe because we are not C-compatible (return by value not by pointer), but a better option would be to remove it entirely. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 08 14:31:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:31:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303675.1576930 (Exim 4.92) (envelope-from ) id 1wLMEi-000062-DN; Fri, 08 May 2026 14:31:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303675.1576930; Fri, 08 May 2026 14:31:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMEi-00005v-AM; Fri, 08 May 2026 14:31:28 +0000 Received: by outflank-mailman (input) for mailman id 1303675; Fri, 08 May 2026 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IGV4cG9zZQ0KPiBvciBhdHRlbXB0IGhvc3Qgc3VzcGVuZC4NCj4gDQo+IEkgdGhpbmsgd2Ugc2hv dWxkIGhhbmRsZSB0aGlzIGJ5IHRyYWNraW5nIHdoZXRoZXIgYW55IG9sZCBBUk0gU01NVXYxL3Yy IGRldmljZQ0KPiB3YXMgYWN0dWFsbHkgcHJvYmVkLCBvciBieSBhZGRpbmcgYSBnZW5lcmljIElP TU1VIHN1c3BlbmQgY2FwYWJpbGl0eSBjaGVjay4gVGhlbg0KPiB0aGUgaG9zdCBzdXNwZW5kIGF2 YWlsYWJpbGl0eSBjaGVjayBjYW4gcmVqZWN0IHN5c3RlbSBzdXNwZW5kIG9ubHkgd2hlbiBzdWNo IGFuDQo+IHVuc3VwcG9ydGVkIElPTU1VIGlzIHByZXNlbnQsIGluc3RlYWQgb2YgZGlzYWJsaW5n IHRoZSBmZWF0dXJlIGZvciBhbGwNCj4gQXJtIGJ1aWxkcw0KPiB3aXRoIENPTkZJR19BUk1fU01N VSBlbmFibGVkLg0KPiANCj4gSSB3b3VsZCBiZSBpbnRlcmVzdGVkIHRvIGhlYXIgaWYgeW91IG9y IHRoZSBtYWludGFpbmVycyBzZWUgYSBiZXR0ZXIgd2F5IHRvDQo+IGV4cHJlc3MgdGhpcyBjYXBh YmlsaXR5Lg0KDQpvaywgbGV04oCZcyBhZGRyZXNzIEphbiBjb21tZW50IG5vdyBhbmQgd2UgY2Fu IHNlZSB3aGF0IHRoZSBtYWludGFpbmVycyB0aGluayBhYm91dCB0aGlzLg0KDQpDaGVlcnMsDQpM dWNhDQoNCg0K From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303687.1576939 (Exim 4.92) (envelope-from ) id 1wLMHF-0000hl-TV; Fri, 08 May 2026 14:34:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303687.1576939; Fri, 08 May 2026 14:34:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHF-0000he-QM; Fri, 08 May 2026 14:34:05 +0000 Received: by outflank-mailman (input) for mailman id 1303687; Fri, 08 May 2026 14:34:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHE-0000hU-Mb for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHE-00A7Or-3q for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:04 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf443-e002-0a2a0a5209dd-0a2a450290cc-46 for ; Fri, 08 May 2026 16:34:04 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45a-af86-0a2a45020019-d98c6eace33e-1 for ; Fri, 08 May 2026 16:34:03 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 384F51D34; Fri, 8 May 2026 07:33:57 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0CF9C3F763; Fri, 8 May 2026 07:34:00 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250842; bh=zq3DhQH4sl+9uv2VKEwOOwkj7NuXi59OI/wXqdtf3Pw=; h=From:To:Cc:Subject:Date:From; b=PF+FVPhbQG7HcoMKXQxp8e4yU+r+X/SaVca58YM4DmXRhB3Mo6Y8PgtrNiabyit72 HKxf7eoDnYW2k1ESfpi+WhEcyuyiOt4r0KKrRkjvcpdmose1njskqM9mMRqUjO6m4h S6Zsjh/Dq1wCpvouNP/Vgzu1eyFHrKDpVvGcimSA= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v5 0/3] Fifth MPU Series Date: Fri, 8 May 2026 15:33:50 +0100 Message-Id: <20260508143353.3512004-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778250844-AB36C161-ED15C89A/0/0 X-purgate-type: clean X-purgate-size: 1518 This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU systems docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ xen/arch/arm/domain.c | 11 ++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 21 +++++++ xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 8 +++ xen/arch/arm/mpu/arm32/mm.c | 17 +++++ xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- xen/include/public/arch-arm.h | 6 ++ xen/include/public/domctl.h | 4 +- 18 files changed, 353 insertions(+), 9 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303688.1576948 (Exim 4.92) (envelope-from ) id 1wLMHI-0000vV-2w; Fri, 08 May 2026 14:34:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303688.1576948; Fri, 08 May 2026 14:34:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHH-0000vO-WE; Fri, 08 May 2026 14:34:08 +0000 Received: by outflank-mailman (input) for mailman id 1303688; Fri, 08 May 2026 14:34:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHG-0000kf-7f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHF-00DAHk-Kv for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:05 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf44f-5cb7-0a2a0a5109dd-0a2a450a9812-32 for ; Fri, 08 May 2026 16:34:05 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45c-56b3-0a2a450a0019-d98c6eaceb08-1 for ; Fri, 08 May 2026 16:34:05 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2CD643591; Fri, 8 May 2026 07:33:59 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D62373F763; Fri, 8 May 2026 07:34:02 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250844; bh=3OwJmJ83fF7wYUwwajm97vdwH/PiBu+huX5oR7YFd8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GtkHKE7eaEuqzyAEc+28pZDGbOT7oHXCt0WMgxCsQqSWXGwxAbYLMt0apfFw+sy97 VS0dr5OxqufzNH2YDBnrmc2ceWqaY1rn4JZDxQUUpFhkkSrFnk7wJgNNBJo76ytoAq koqbbcb5PHK8FtzsXURapvm1tBchwM+2Axh5yKKo= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Hari Limaye , Harry Ramsey Subject: [PATCH v5 1/3] arm/mpu: implement setup_virt_paging for MPU systems Date: Fri, 8 May 2026 15:33:51 +0100 Message-Id: <20260508143353.3512004-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778250845-7E58E8B7-07AC936A/0/0 X-purgate-type: clean X-purgate-size: 7761 From: Penny Zheng Implement setup_virt_paging for AArch64 MPU systems, taking care of stage 2 address translation regime, IPA bits, supported VMID length configuration and VTCR_EL2/VSTCR_EL2 register programming. Implement also the Armv8-R specific changes to ID_AA64MMFR0_EL1, related to the supported memory system architecture (PMSA/VMSA) and check that when MPU is built, the underlying HW is compatible with PMSA. By default MPU at EL2 and EL1 is required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey Reviewed-by: Michal Orzel --- v5: - removed spaces in inline if condition - Add Michal R-by v4: - Fixed typo in the comments - Fixed typo in the commit title and message - moved p2m_vmid_allocator_init() after write of VTCR_EL2 - Fixed printf format specifier %d -> %u v3: - Refactor unused code to more relevant commits. - Add P2M print information - Formatting issues - Update commit message v2: - Separate commit into multiple commits --- xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/processor.h | 8 +++ 4 files changed, 101 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b58..4547417df97e 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,89 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + register_t vtcr_el2 = READ_SYSREG(VTCR_EL2); + register_t vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against PA size. + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_PMSA_SUPPORT) && + (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT) ) + goto fault; + + /* Stage 1 EL1&0 translation regime uses PMSAv8 by default */ + vtcr_el2 &= ~VTCR_MSA; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8-R only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * cpuinfo sanitization makes sure we support 16-bits VMID only if all cores + * are supporting it. + * + * Set the VS bit only if 16 bit VMID is supported. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + { + vtcr_el2 |= VTCR_VS; + max_vmid = MAX_VMID_16_BIT; + } + else + vtcr_el2 &= ~VTCR_VS; + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + p2m_vmid_allocator_init(); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + printk("P2M: %u-bit IPA with %u-bit PA and %u-bit VMID\n", + p2m_ipa_bits, + pa_range_info[system_cpuinfo.mm64.pa_range], + (MAX_VMID == MAX_VMID_16_BIT) ? 16 : 8); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb5a..f3c11d871e86 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,U) << 30) +#define VSTCR_EL2_SC (_AC(0x1,U) << 20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1ad1..bf902a397068 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b39..895d7cd50244 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,9 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#define VTCR_MSA (_AC(0x1,UL)<<31) +#define VTCR_NSA (_AC(0x1,UL)<<30) + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +467,11 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303689.1576957 (Exim 4.92) (envelope-from ) id 1wLMHK-0001A3-Aj; Fri, 08 May 2026 14:34:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303689.1576957; Fri, 08 May 2026 14:34:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHK-00019u-7W; Fri, 08 May 2026 14:34:10 +0000 Received: by outflank-mailman (input) for mailman id 1303689; Fri, 08 May 2026 14:34:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHI-0000yn-FV for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHH-007WJL-SE for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:07 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf446-2eae-0a2a0a5409dd-0a2a4509829e-42 for ; Fri, 08 May 2026 16:34:07 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45e-2497-0a2a45090019-d98c6eaca344-1 for ; Fri, 08 May 2026 16:34:07 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3DE3D1D34; Fri, 8 May 2026 07:34:01 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C97093F763; Fri, 8 May 2026 07:34:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250846; bh=uOx6o3Ma3CDEZYD8HLSisMuej2xnQvxCr5Ghf1MGQ4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YfNVCBFMoqLbWa8T0NU2W5xPSWLGjnjVlwGeUxqZ8CEdh5pBw3Czhs9o15L1x92Kp N5LvsV2jEKfW53O758lizcPXFPqV2GOhNIgAg+Mvt+Xdlk2op94Z5dFc/hkEVzquF3 +xGXytZaFPXOmyln83DBdYQkyTChbFbi+yRfEA/g= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Fri, 8 May 2026 15:33:52 +0100 Message-Id: <20260508143353.3512004-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778250847-8AF8CA53-284254DA/0/0 X-purgate-type: clean X-purgate-size: 11918 From: Harry Ramsey Add a new device tree property `v8r_el1_msa` to select the MSA (memory system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the former is the default if the property is not passed. Implement the dom0less path to parse the new device tree property, add a new domctl hypercall input parameter `v8r_el1_msa` for arm and add the sanitisation in arch_sanitise_domain_config(), the parameter is intended to be used on CONFIG_MPU systems and returns an error if selected for MMU. Given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v5: - follow the way domu_dt_sci_parse and ARM_SCI is doing, but return error if property is present in MMU systems. - Align the commit message on the new changes - fix documentation - fix multiline comment - drop the explicit padding from struct xen_arch_domainconfig v4: - Rework the patch to have the v8r_el1_msa input parameter more enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. v3: - Improve commit message and device tree property description - Remove macro protection - Remove unused function is_mpu_domain - Code formatting --- docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 11 ++++ xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 21 +++++++ xen/arch/arm/mpu/arm32/mm.c | 17 ++++++ xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ xen/include/public/arch-arm.h | 6 ++ xen/include/public/domctl.h | 4 +- 9 files changed, 167 insertions(+), 2 deletions(-) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b4286082f..2389ae610963 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R systems at EL1, a domain + should use PMSAv8 (MPU) or VMSAv8 (MMU). + + - "mmu" + Enables VMSAv8 at EL1. This requires hardware support and is only + optionally available on AArch64. Not supported on AArch32. + + - "mpu" + Enables PMSAv8 at EL1. This is the default behaviour when the property is + not passed. This configuration requires static allocation (xen,static-mem) + and direct mapping (direct-map). + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 6f73c65e5151..2a0671bd0e8e 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -295,6 +295,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, return 0; } +static int __init +domu_dt_v8r_el1_msa_parse(struct dt_device_node *node, + struct xen_domctl_createdomain *d_cfg, + unsigned int flags) +{ + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); + + if ( !property_present ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + else + { + const char *v8r_el1_msa; + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); + + if ( ret ) + return ret; + + if ( !strcmp(v8r_el1_msa, "mpu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else if ( !strcmp(v8r_el1_msa, "mmu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; + else + { + printk(XENLOG_ERR + "v8r_el1_msa value (%s) not valid for domain %s\n", + v8r_el1_msa, dt_node_name(node)); + return -EINVAL; + } + } + + if ( !IS_ENABLED(CONFIG_MPU) ) + { + if ( !property_present ) + return 0; + + printk(XENLOG_ERR + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", + dt_node_name(node)); + return -EINVAL; + } + + switch ( d_cfg->arch.v8r_el1_msa ) + { + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: + fallthrough; + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + { + printk(XENLOG_ERR + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", + dt_node_name(node)); + return -EINVAL; + } + break; + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: + if ( !has_v8r_vmsa_support() ) + { + printk(XENLOG_ERR + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); + return -EINVAL; + } + break; + + default: + return -EINVAL; + } + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { @@ -308,6 +379,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) + panic("Error getting v8r_el1_msa configuration\n"); + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..ac7d1abd9c7c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -630,6 +631,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( !v8r_el1_msa_domain_sanitise_config(config) ) + { + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); + return -EINVAL; + } + return sci_domain_sanitise_config(config); } @@ -722,6 +729,10 @@ int arch_domain_create(struct domain *d, d->arch.sve_vl = config->arch.sve_vl; #endif +#ifdef CONFIG_MPU + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..ac7300e41fcd 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -112,6 +112,10 @@ struct arch_domain #endif struct resume_info resume_ctx; + +#ifdef CONFIG_MPU + uint8_t v8r_el1_msa; +#endif } __cacheline_aligned; struct arch_vcpu diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 6674dac5e2f8..50ddc0511e7e 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#ifdef CONFIG_MPU +/* Utility function to determine if an Armv8-R processor supports VMSA. */ +bool has_v8r_vmsa_support(void); +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config); +#else +static inline bool has_v8r_vmsa_support(void) +{ + return false; +} + +static inline bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE ) + return false; + + return true; +} +#endif /* CONFIG_MPU */ + #endif /* diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c index a4673c351141..a759ebdfc124 100644 --- a/xen/arch/arm/mpu/arm32/mm.c +++ b/xen/arch/arm/mpu/arm32/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ case num: \ @@ -38,6 +40,21 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return false; +} + +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA ) + return false; + + return true; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c index ed643cad4073..441d209601c1 100644 --- a/xen/arch/arm/mpu/arm64/mm.c +++ b/xen/arch/arm/mpu/arm64/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include /* * The following are needed for the cases: GENERATE_WRITE_PR_REG_CASE @@ -32,6 +34,22 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; +} + +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA ) + return false; + + return true; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf70684..6d222f15f6d5 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 + struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t v8r_el1_msa; }; #endif /* __XEN__ || __XEN_TOOLS__ */ diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..23124547f347 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -30,9 +30,9 @@ * fields) don't require a change of the version. * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! * - * Last version bump: Xen 4.19 + * Last version bump: Xen 4.22 */ -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 /* * NB. xen_domctl.domain is an IN/OUT parameter for this operation. -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303690.1576962 (Exim 4.92) (envelope-from ) id 1wLMHK-0001GQ-NO; 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a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250848; bh=+4j7r30qXJ3aM1HfODFFXXITIfg6L1ltdhkKBsZq2Gw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ud4MLurcDiQ/Ou5vERRTxiUlb0uetXgD4hULtOJqqP7m8pOB7jFwk9WbNn/d08t// PNKW7qSvQ/ZiDNaWmR0o/GT2TKWidfh0k6EqFBFgdrGFYx1BhVugWaNRNxTGyvvC/2 S+2MiC1kEB/TzU+KUGFhUPxxS8xp3bB5xnKJJjWk= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v5 3/3] arm/mpu: Implement p2m tables Date: Fri, 8 May 2026 15:33:53 +0100 Message-Id: <20260508143353.3512004-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1778250849-19B68F3B-C370D5E2/0/0 X-purgate-type: clean X-purgate-size: 5702 From: Harry Ramsey Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v5: - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER - used MAX_MPU_REGION_NR instead of opencoding 255 - use 'table' in p2m_alloc_table to clear pages - remove p2m_free_vmid() from error path in p2m_init() which is already handled outside v4: - no changes v3: - Check for alloc_xenheap_pages allocation - Clear additional page allocated for ARM64 - Add check for INVALID_VCPU_ID - Remove unnecessary function generate_vsctlr - Code formatting fixes --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- 5 files changed, 85 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbacae..d565230f84ee 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8a3..8b86a03fee44 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a1d..0d4149c71987 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -3,8 +3,15 @@ #ifndef __ARM_MPU_P2M_H__ #define __ARM_MPU_P2M_H__ +#include +#include +#include + struct p2m_domain; +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) + static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..ed1b6dd40f40 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6aa8..8d5c65b1003f 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + unsigned int i; + + if ( !table ) + { + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", + d); + return -ENOMEM; + } + + p2m->root = virt_to_page(table); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_page(table + (i * PAGE_SIZE)); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported in MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); + + return p2m_alloc_table(d); } void p2m_save_state(struct vcpu *p) @@ -46,7 +99,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:39:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:39:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303726.1576975 (Exim 4.92) (envelope-from ) id 1wLMMd-00033F-Bc; Fri, 08 May 2026 14:39:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303726.1576975; Fri, 08 May 2026 14:39:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMMd-000338-8N; Fri, 08 May 2026 14:39:39 +0000 Received: by outflank-mailman (input) for mailman id 1303726; Fri, 08 May 2026 14:39:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMMc-000332-1q for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:39:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMMb-003Ice-15 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:39:37 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf59b-e002-0a2a0a5209dd-0a2a450acde4-20 for ; Fri, 08 May 2026 16:39:36 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf5a8-56b3-0a2a450a0019-c387df83eda0-3 for ; Fri, 08 May 2026 16:39:36 +0200 Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 6A1DC5C115; Fri, 8 May 2026 14:39:36 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 215A5593A7; Fri, 8 May 2026 14:39:36 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id GKQGB6j1/WlcVgAAD6G6ig (envelope-from ); Fri, 08 May 2026 14:39:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778251176; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=qcH0oyDgGShFY8obpKeBe1gSWCv27CYVU+nGbBQx6uk=; b=eIuw8rpP3+bLN054/2BzceWEYq44u78XjU+o/Hk63wuCt6dDM53cF6B9HfXABaLBH2U1xQ p6ltDFfK8+KEsrmabJzOTwdyfB5/COMiL9/p378+C/sLW+lOaj3LjigyBTFzadJe0Vq06w 0tPe7/qqbqbmOgDTAWLKAuhLF6d+zvE= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778251176; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=qcH0oyDgGShFY8obpKeBe1gSWCv27CYVU+nGbBQx6uk=; b=eIuw8rpP3+bLN054/2BzceWEYq44u78XjU+o/Hk63wuCt6dDM53cF6B9HfXABaLBH2U1xQ p6ltDFfK8+KEsrmabJzOTwdyfB5/COMiL9/p378+C/sLW+lOaj3LjigyBTFzadJe0Vq06w 0tPe7/qqbqbmOgDTAWLKAuhLF6d+zvE= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: kevin.brodsky@arm.com, marmarek@invisiblethingslab.com, Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving Date: Fri, 8 May 2026 16:39:33 +0200 Message-ID: <20260508143933.493013-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; RCPT_COUNT_TWELVE(0.00)[12]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -2.80 X-purgate-ID: tlsNG-4011c0/1778251176-70F618B7-A88E1767/0/0 X-purgate-type: clean X-purgate-size: 1487 With the support of nested lazy mmu sections it can happen that arch_enter_lazy_mmu_mode() is being called twice without a call of arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers are not disabling preemption when checking for nested lazy mmu sections. This is a problem when running as a Xen PV guest, as xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this case. Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order not to hurt all other lazy mmu mode users. Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") Signed-off-by: Juergen Gross --- arch/x86/xen/mmu_pv.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index c80d0058efd1..3eee5f84f8a7 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) static void xen_enter_lazy_mmu(void) { - enter_lazy(XEN_LAZY_MMU); + preempt_disable(); + if (xen_get_lazy_mode() != XEN_LAZY_MMU) + enter_lazy(XEN_LAZY_MMU); + preempt_enable(); } static void xen_flush_lazy_mmu(void) @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) { preempt_disable(); xen_mc_flush(); - leave_lazy(XEN_LAZY_MMU); + if (xen_get_lazy_mode() != XEN_LAZY_NONE) + leave_lazy(XEN_LAZY_MMU); preempt_enable(); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303735.1576999 (Exim 4.92) (envelope-from ) id 1wLMQZ-0004xI-HD; Fri, 08 May 2026 14:43:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303735.1576999; Fri, 08 May 2026 14:43:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQZ-0004vn-Ak; Fri, 08 May 2026 14:43:43 +0000 Received: by outflank-mailman (input) for mailman id 1303735; Fri, 08 May 2026 14:43:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQY-0004oR-Hu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQW-00Epe9-Cr for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:41 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-5cb7-0a2a0a5109dd-0a2a4506c6fc-20 for ; Fri, 08 May 2026 16:43:41 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf69d-7371-0a2a45060019-d155da32a9cc-3 for ; Fri, 08 May 2026 16:43:41 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-ba3115fe0d5so575680866b.1 for ; Fri, 08 May 2026 07:43:41 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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To initialize this list, domain_p2m_set_allocation() may be called from construct_domU() in the common Dom0less code, so RISC-V provides an implementation and enables CONFIG_ARCH_PAGING_MEMPOOL unconditionally. Additionally, implement arch_{set,get}_paging_mempool_size(). They are not directly used yet, but are required to support the XEN_DOMCTL_{get,set}_paging_mempool_size hypercalls. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Turn on CONFIG_ARCH_PAGING_MEMPOOL=y unconditionally and drop all ifdef-s related to this config. - Optimize check inside arch_set_paging_mempool_size which verify size argument. - Use pfn_to_paddr() inside arch_get_paging_mempool_size() instead of open coding the stuff. - Drop ASSERT() from arch_set_paging_mempool_size() as it is impossible to have here preempted = true and rc != -ERESTART. --- --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/p2m.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 41426c205292..48520588fe40 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select ARCH_PAGING_MEMPOOL select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 41d6d3d5e699..bed997bd9d5a 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1606,3 +1606,27 @@ struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); } + +int arch_set_paging_mempool_size(struct domain *d, uint64_t size) +{ + unsigned long pages = PFN_DOWN(size); + int rc; + + /* Non page-sized request or 32-bit overflow? */ + if ( pfn_to_paddr(pages) != size ) + return -EINVAL; + + spin_lock(&d->arch.paging.lock); + rc = p2m_set_allocation(d, pages, true); + spin_unlock(&d->arch.paging.lock); + + return rc; +} + +/* Return the size of the pool, in bytes. */ +int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) +{ + *size = pfn_to_paddr(ACCESS_ONCE(d->arch.paging.total_pages)); + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303733.1576984 (Exim 4.92) (envelope-from ) id 1wLMQX-0004ez-Qk; Fri, 08 May 2026 14:43:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303733.1576984; Fri, 08 May 2026 14:43:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQX-0004es-NQ; Fri, 08 May 2026 14:43:41 +0000 Received: by outflank-mailman (input) for mailman id 1303733; Fri, 08 May 2026 14:43:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQV-0004ea-OY for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQV-007XVC-5E for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:39 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-2eae-0a2a0a5409dd-0a2a45028638-32 for ; Fri, 08 May 2026 16:43:39 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf69b-af86-0a2a45020019-d155d02ea9a7-3 for ; Fri, 08 May 2026 16:43:39 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67b32c695efso5000726a12.1 for ; Fri, 08 May 2026 07:43:39 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The stuff necessary to start/launch domains will be introduced separately. This patch series is based on [1], but a lot of patch could go even without it. [1] https://lore.kernel.org/xen-devel/cover.1778140240.git.oleksii.kurochko@gmail.com/T/#t CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2510638764 --- Changes in v2: - Move patch "[PATCH v1 04/27] xen/riscv: rework G-stage mode handling" to patch series [1] - Address the comments from ML. - The following patches were folded into one: # xen/riscv: implement init_intc_phandle() # xen/riscv: call do_initcalls() in start_xen() # xen/riscv: setup system domains - The following patch were folded into one: # xen/riscv: add vaplic access check # xen/riscv: emulate guest writes to virtual APLIC MMIO # xen/riscv: emulate guest reads from virtual APLIC MMIO - Add new bug fix, not really necessary to this patch series: xen/riscv: manage IRQ_DISABLED flag in APLIC irq enable/disable callbacks --- Oleksii Kurochko (26): xen: arm: update p2m_set_allocation() prototype xen/riscv: Implement ARCH_PAGING_MEMPOOL xen/riscv: Implement construct_domain() xen/riscv: implement prerequisites for domain_create() xen/riscv: introduce guest riscv,isa string xen/riscv: implement make_cpus_node() xen/riscv: implement make_timer_node() xen/riscv: implement make_arch_nodes() xen/riscv: introduce init interrupt controller operations xen/riscv: implement make_intc_domU_node() xen/riscv: introduce aia_init() and aia_usable() xen/riscv: add basic VGEIN management for AIA guests xen/riscv: introduce per-vCPU IMSIC state xen/riscv: add very early virtual APLIC (vAPLIC) initialization support xen/riscv: introduce (de)initialization helpers for vINTC xen/riscv: create APLIC DT node for guest domains xen/riscv: generate IMSIC DT node for guest domains xen: move declaration of map_device_irqs_to_domain() to common header xen/riscv: implement IRQ routing for device passthrough xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h. xen/riscv: implement virtual APLIC MMIO emulation xen/riscv: implement init_intc_phandle() xen/riscv: initialize RCU, scheduler, and system domains in start_xen() xen/riscv: provide init_vuart() xen/riscv: add initial dom0less infrastructure support xen/riscv: manage IRQ_DISABLED flag in APLIC irq enable/disable callbacks automation/gitlab-ci/build.yaml | 1 + xen/arch/arm/include/asm/p2m.h | 1 - xen/arch/arm/include/asm/setup.h | 3 - xen/arch/arm/mmu/p2m.c | 22 +- xen/arch/riscv/Kconfig | 3 + xen/arch/riscv/Makefile | 4 + xen/arch/riscv/aia.c | 167 +++++++++ xen/arch/riscv/aplic.c | 49 ++- xen/arch/riscv/cpufeature.c | 59 ++- xen/arch/riscv/device.c | 108 ++++++ xen/arch/riscv/dom0less-build.c | 39 ++ xen/arch/riscv/domain-build.c | 179 +++++++++ xen/arch/riscv/domain.c | 44 ++- xen/arch/riscv/imsic.c | 167 +++++++++ xen/arch/riscv/include/asm/aia.h | 18 + xen/arch/riscv/include/asm/aplic.h | 53 +++ xen/arch/riscv/include/asm/cpufeature.h | 5 + xen/arch/riscv/include/asm/domain.h | 8 + xen/arch/riscv/include/asm/guest-layout.h | 7 + xen/arch/riscv/include/asm/imsic.h | 26 ++ xen/arch/riscv/include/asm/intc.h | 58 ++- xen/arch/riscv/include/asm/irq.h | 3 + xen/arch/riscv/include/asm/paging.h | 2 +- xen/arch/riscv/include/asm/setup.h | 8 +- xen/arch/riscv/include/asm/vaplic.h | 37 ++ xen/arch/riscv/intc.c | 103 ++++- xen/arch/riscv/irq.c | 178 ++++++++- xen/arch/riscv/p2m.c | 31 +- xen/arch/riscv/paging.c | 7 +- xen/arch/riscv/setup.c | 14 + xen/arch/riscv/stubs.c | 12 - xen/arch/riscv/vaplic.c | 436 ++++++++++++++++++++++ xen/common/device-tree/dom0less-build.c | 2 +- xen/include/xen/fdt-domain-build.h | 13 + xen/include/xen/p2m-common.h | 2 + 35 files changed, 1807 insertions(+), 62 deletions(-) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/device.c create mode 100644 xen/arch/riscv/domain-build.c create mode 100644 xen/arch/riscv/include/asm/aia.h create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303734.1576993 (Exim 4.92) (envelope-from ) id 1wLMQZ-0004rz-1E; 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This led to the caller-side ASSERT(preempted == (rc == -ERESTART)) added solely to document their agreement. Drop the out-argument entirely. The return code alone is sufficient to distinguish preemption (-ERESTART) from success (0) or other failures. Replace the pointer with a plain bool can_preempt that controls whether the preemption check is performed at all, making the previous NULL-to-suppress-preemption calling convention explicit and type-safe. Since p2m_set_allocation() is called by the common dom0less build code, move its declaration from the ARM-specific asm/p2m.h to xen/p2m-common.h. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in v2: - new patch --- xen/arch/arm/include/asm/p2m.h | 1 - xen/arch/arm/mmu/p2m.c | 22 ++++++++-------------- xen/arch/riscv/include/asm/paging.h | 2 +- xen/arch/riscv/p2m.c | 7 ++++--- xen/arch/riscv/paging.c | 7 ++----- xen/common/device-tree/dom0less-build.c | 2 +- xen/include/xen/p2m-common.h | 2 ++ 7 files changed, 18 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 7957dbd96e57..62b37a05f79e 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -232,7 +232,6 @@ void p2m_restore_state(struct vcpu *n); /* Print debugging/statistial info about a domain's p2m */ void p2m_dump_info(struct domain *d); -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted); int p2m_teardown_allocation(struct domain *d); static inline void p2m_write_lock(struct p2m_domain *p2m) diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c index 51abf3504fcf..e5c6be7c0890 100644 --- a/xen/arch/arm/mmu/p2m.c +++ b/xen/arch/arm/mmu/p2m.c @@ -67,10 +67,11 @@ int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_preempt) { struct page_info *pg; @@ -112,11 +113,8 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) break; /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted = true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } return 0; @@ -125,7 +123,6 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) int arch_set_paging_mempool_size(struct domain *d, uint64_t size) { unsigned long pages = size >> PAGE_SHIFT; - bool preempted = false; int rc; if ( (size & ~PAGE_MASK) || /* Non page-sized request? */ @@ -133,27 +130,24 @@ int arch_set_paging_mempool_size(struct domain *d, uint64_t size) return -EINVAL; spin_lock(&d->arch.paging.lock); - rc = p2m_set_allocation(d, pages, &preempted); + rc = p2m_set_allocation(d, pages, true); spin_unlock(&d->arch.paging.lock); - ASSERT(preempted == (rc == -ERESTART)); - return rc; } int p2m_teardown_allocation(struct domain *d) { int ret = 0; - bool preempted = false; spin_lock(&d->arch.paging.lock); if ( d->arch.paging.p2m_total_pages != 0 ) { - ret = p2m_set_allocation(d, 0, &preempted); - if ( preempted ) + ret = p2m_set_allocation(d, 0, true); + if ( ret == -ERESTART ) { spin_unlock(&d->arch.paging.lock); - return -ERESTART; + return ret; } ASSERT(d->arch.paging.p2m_total_pages == 0); } diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index e487c89a4ccd..103384723dc5 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -9,7 +9,7 @@ struct page_info; int paging_domain_init(struct domain *d); int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted); + bool can_preempt); int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 703b9f4d2540..41d6d3d5e699 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -430,15 +430,16 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_preempt) { struct p2m_domain *p2m = p2m_get_hostp2m(d); int rc; - if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) + if ( (rc = paging_freelist_adjust(d, pages, can_preempt)) ) return rc; /* diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 76a203edbb0c..35f572689a7c 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -47,7 +47,7 @@ static int _paging_add_to_freelist(struct domain *d) } int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted) + bool can_preempt) { ASSERT(spin_is_locked(&d->arch.paging.lock)); @@ -66,11 +66,8 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, return rc; /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted = true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } return 0; diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 6d6882a34b5a..1058699ab25b 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -747,7 +747,7 @@ static int __init domain_p2m_set_allocation(struct domain *d, uint64_t mem, domain_p2m_pages(mem, d->max_vcpus); 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It also creates additional vCPUs up to max_vcpus and assigns the device tree address and boot cpuid in registers. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rework construct_domain() to print that vCPU1...n are created using %pv. - Use true instead of 1 for initialization of v->is_initialised. - Drop unnessary BUG_ON() in construct_domain(). - Add TODO comment above *_load() functions. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain-build.c | 52 +++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 xen/arch/riscv/domain-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 8f7fd625dddd..fd5e499eb4b9 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o +obj-y += domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c new file mode 100644 index 000000000000..492327631e33 --- /dev/null +++ b/xen/arch/riscv/domain-build.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +#include +#include + +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) +{ + struct vcpu *v = d->vcpu[0]; + struct cpu_user_regs *regs = vcpu_guest_cpu_user_regs(v); + + BUG_ON(v->is_initialised); + + /* + * At the moment *_load() don't return value and will just panic() + * inside. + * TODO: it will be good to change that. + */ + kernel_load(kinfo); + initrd_load(kinfo, copy_to_guest_phys); + dtb_load(kinfo, copy_to_guest_phys); + + regs->sepc = kinfo->entry; + + /* Guest boot cpuid = 0 */ + regs->a0 = 0; + regs->a1 = kinfo->dtb_paddr; + + for ( unsigned int i = 1; i < d->max_vcpus; i++ ) + { + const struct vcpu *tmp_v = vcpu_create(d, i); + + if ( !tmp_v ) + { + printk("Failed to allocate %pd v%d\n", d, i); + break; + } + + dprintk(XENLOG_INFO, "Created vcpu %pv\n", tmp_v); + } + + domain_update_node_affinity(d); + + v->is_initialised = true; + clear_bit(_VPF_down, &v->pause_flags); + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303738.1577021 (Exim 4.92) (envelope-from ) id 1wLMQc-0005Zw-Vr; Fri, 08 May 2026 14:43:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303738.1577021; Fri, 08 May 2026 14:43:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQc-0005Zn-Qp; Fri, 08 May 2026 14:43:46 +0000 Received: by outflank-mailman (input) for mailman id 1303738; Fri, 08 May 2026 14:43:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQb-0005KE-72 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQa-00A8wX-KC for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:44 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf692-bab6-0a2a0a5309dd-0a2a4503938a-12 for ; Fri, 08 May 2026 16:43:44 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a0-672d-0a2a45030019-d155d02ef00b-3 for ; Fri, 08 May 2026 16:43:44 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67929ff6dbfso3147676a12.2 for ; Fri, 08 May 2026 07:43:44 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - update the commit message. - Drop vcpu_switch_to_aarch64_mode() from riscv/stubs. It shouldn't be under riscv/ at all. - Drop next_phandle as it is now in common code. --- xen/arch/riscv/domain.c | 25 +++++++++++++++++++++++++ xen/arch/riscv/stubs.c | 12 ------------ 2 files changed, 25 insertions(+), 12 deletions(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index c77be3b827eb..669dd27d79a3 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -289,6 +289,31 @@ void sync_vcpu_execstate(struct vcpu *v) /* Nothing to do -- no lazy switching */ } +int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) +{ + return 0; +} + +int arch_domain_create(struct domain *d, + struct xen_domctl_createdomain *config, + unsigned int flags) +{ + int rc = 0; + + if ( is_idle_domain(d) ) + return 0; + + if ( (rc = p2m_init(d, config)) != 0) + goto fail; + + return rc; + + fail: + d->is_dying = DOMDYING_dead; + arch_domain_destroy(d); + return rc; +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbb5b9123ea..cfb12d51d00b 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -101,18 +101,6 @@ void dump_pageframe_info(struct domain *d) BUG_ON("unimplemented"); } -int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) -{ - BUG_ON("unimplemented"); -} - -int arch_domain_create(struct domain *d, - struct xen_domctl_createdomain *config, - unsigned int flags) -{ - BUG_ON("unimplemented"); -} - int arch_domain_teardown(struct domain *d) { BUG_ON("unimplemented"); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303739.1577028 (Exim 4.92) (envelope-from ) id 1wLMQe-0005ps-58; Fri, 08 May 2026 14:43:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303739.1577028; Fri, 08 May 2026 14:43:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQe-0005od-1f; Fri, 08 May 2026 14:43:48 +0000 Received: by outflank-mailman (input) for mailman id 1303739; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQc-0005Xa-OM for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQc-007XVC-50 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-2eae-0a2a0a5409dd-0a2a45028638-42 for ; Fri, 08 May 2026 16:43:46 +0200 Received: from [209.85.218.52] (helo=mail-ej1-f52.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a2-af86-0a2a45020019-d155da34ac9a-3 for ; Fri, 08 May 2026 16:43:46 +0200 Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-bc264a50e7fso393112866b.0 for ; Fri, 08 May 2026 07:43:46 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:44 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251425; x=1778856225; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xB7Os2MChM3TR6KXilRQ9GrrVvrhO9KwN/leWcO7waQ=; b=ZTcXv4As0mhUaqbZ/HCiD4KCkNRCRLOq6m8vItlSOxVdh7axaljw69rd4bBoNx9fcX d8nz+qwhshOSN0ssUUnupXbPGxSqbLV5J0slMxfEKMMSRGQDaQ4AQKAsB9YGw48E46tG GLEiC6bkOcgBqHrHZQu3lI97yCVsdZYU8Gp4gT/lNdgsYHr3xGsPxoaqnHZLh5a+cTeJ nc0nh9c37EycI3l9LjVqBq+Ipf2eEJ8F0GG9BZzAixykNcnEhZqXTs4DEcp5gxnLsm2M Qcu0oyeuWCyL8tGCLDJtNZb0xwgMLWv089s+oPzw8rHzYnVibF9abDidlXWX2yPBpkUD +naw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251425; x=1778856225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=xB7Os2MChM3TR6KXilRQ9GrrVvrhO9KwN/leWcO7waQ=; b=iURBWlcKczyx27XgWhjSqIPN55vKijCCHRrBDYjhqh4dDPgcwEcuihhEXXu2qDeCMp hKyFth5fi7Eb4nMw8O/OrIhE6eWQHVz9Sf9ln8uz0+Pzj5y7AWhq+ntQ+sVkbyerIVz1 94U551Kxu7S/4p7Cj6UTePnJSXF+s6mhPpN/8kIXCdgLmX9vIAqLKoVaBbU1li9WKHvk AuMMNGY1EEuT5VVr8rhDkIJxwDwcYZEVU5GKqIR86/7aTwwWctOeiHWUW4tIZfVTCQdH 6y6NfWzUqtuUe+uofKEUu0BUCfOr0RWaF4KH2DWqv/2Yq9JKGIDekmhyWe8vu+rZ69fR g59g== X-Gm-Message-State: AOJu0YwSnrCnaQ1NBQbNJZdHstZlx7sKk+jFjQHbu5qmxX2lzhAikwyN ZORp352So6bMLBNiJ02Wi9MxVuHCtjj7j10l1sbeEPobkx4KbBI7bo4+awVkJA== X-Gm-Gg: AeBDieuUnjT0pjJB/ronluEqj1QRYZzCl4ksI7wsGInjMob7I5IgQjwxj73zdfUzfX7 QWx0Ek0/3jKQ2h4WKOBxP3y+xyGA/9mVadY69jlyTQsOu3vTYD8msOGVaJStWTv4NRNsDWfgmpM oEOah/Ebe2xGw/5BEEK0TH6egaSyvpggNPm50R+1gu1cyGLuY0FsZM8J+wgI9CJFZXhS0WXOPHh Bs0tiEhnpWshB96OIZRq+pgHQfq5ct47nv6rywxUmAU9wzrAaKNsTkzgry07cLmhMhbfhWmotDL Hfl2n3LMCgRqL0PiQQ3gyNM57m3raEXQsxv1cQnxykuh57N2uqtnM0Ryh/C+HPekzaQQFr0dGv5 D1E5KDQNXxnXZESjP6ibkaWSGDAJLDAwOzm+mAUhfAA2OzYBoiHJCIwji+dLlTfjrZRIgmv3L4f /wIA5aluQMDkDReHP3dehHKAo/6TwVQhVgASe4xHrrPDZS+7xrwRoWnjvwqwErY9CX6Ek0Sd6wW nKn5Y42z4/yReI= X-Received: by 2002:a17:906:f59e:b0:bc6:5f97:8f90 with SMTP id a640c23a62f3a-bcaa9f60b9amr189903266b.3.1778251425147; Fri, 08 May 2026 07:43:45 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 05/26] xen/riscv: introduce guest riscv,isa string Date: Fri, 8 May 2026 16:43:07 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778251426-80D7F161-4FE5235E/10/73395122804 X-purgate-type: spam X-purgate-size: 6692 Introduce generation of the riscv,isa string passed to the guest via the Device Tree riscv,isa property. Introduce the per-domain isa string and guest isa bitmap, populated during domain creation by calling init_guest_isa(). Introduce guest_unsupp to filter out ISA extensions that should not be exposed to guests: - f/d/q/v: FPU and vector context save/restore are not yet implemented for guests. - h: Nested virtualisation is not supported. - sstc: Xen owns the supervisor timer; guests must use SBI. - svade: Xen manages hardware A/D bit updates in stage-2 page tables. - svpbmt: Page-based memory types are not yet wired up in stage-2 code. Drop __initconst for riscv_isa_ext() as it can be used after init stage by init_guest_isa(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/guest_unsupp_bmp/guest_unsupp. - Drop guest_isa_str. - Provide init_guest_isa() instead of polluting match_isa_ext(). - Drop xlen. - Add the comment about guest_unsupp. - Update the way how guest_unsupp is init-ed. - Drop __initconst for riscv_isa_ext[] as it is used in init_guest_isa() which isn't marked as __init as it could be used after init stage. --- --- xen/arch/riscv/cpufeature.c | 59 ++++++++++++++++++++++++- xen/arch/riscv/domain.c | 3 ++ xen/arch/riscv/include/asm/cpufeature.h | 5 +++ xen/arch/riscv/include/asm/domain.h | 4 ++ 4 files changed, 70 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 92235fdfd5ab..618592e6096a 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -120,7 +121,7 @@ static int __init dt_get_cpuid_from_node(const struct dt_device_node *cpu, * and strncmp() is used in match_isa_ext() to compare extension names instead * of strncasecmp(). */ -const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { +const struct riscv_isa_ext_data riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(i), RISCV_ISA_EXT_DATA(m), RISCV_ISA_EXT_DATA(a), @@ -128,6 +129,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(d), RISCV_ISA_EXT_DATA(q), RISCV_ISA_EXT_DATA(c), + RISCV_ISA_EXT_DATA(v), RISCV_ISA_EXT_DATA(h), RISCV_ISA_EXT_DATA(zicntr), RISCV_ISA_EXT_DATA(zicsr), @@ -160,6 +162,12 @@ static const struct riscv_isa_ext_data __initconst required_extensions[] = { RISCV_ISA_EXT_DATA(svpbmt), }; +/* + * Everything in riscv_isa_ext[] which shouldn't be exposed to guests should + * appear here. + */ +static __ro_after_init DECLARE_BITMAP(guest_unsupp, RISCV_ISA_EXT_MAX); + static bool __init is_lowercase_extension_name(const char *str) { /* @@ -480,6 +488,53 @@ bool riscv_isa_extension_available(const unsigned long *isa_bitmap, return test_bit(id, isa_bitmap); } +int init_guest_isa(struct domain *d) +{ + char *buf = d->arch.guest_isa_str; + size_t len = sizeof(d->arch.guest_isa_str); + + bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, + RISCV_ISA_EXT_MAX); + +#if defined(CONFIG_RISCV_32) + if ( snprintf(buf, len, "rv32") >= len ) + return -ENOBUFS; +#elif defined(CONFIG_RISCV_64) + if ( snprintf(buf, len, "rv64") >= len ) + return -ENOBUFS; +#else +# error "Unsupported RISC-V bitness" +#endif + + for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) + { + const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; + + if ( !riscv_isa_extension_available(d->arch.guest_isa, ext->id) ) + continue; + + if ( ext->id >= RISCV_ISA_EXT_BASE && strlcat(buf, "_", len) >= len ) + return -ENOBUFS; + + if ( strlcat(buf, ext->name, len) >= len ) + return -ENOBUFS; + } + + return 0; +} + +static void __init init_guest_unsupp(void) +{ + set_bit(RISCV_ISA_EXT_f, guest_unsupp); + set_bit(RISCV_ISA_EXT_d, guest_unsupp); + set_bit(RISCV_ISA_EXT_q, guest_unsupp); + set_bit(RISCV_ISA_EXT_v, guest_unsupp); + set_bit(RISCV_ISA_EXT_h, guest_unsupp); + set_bit(RISCV_ISA_EXT_sstc, guest_unsupp); + set_bit(RISCV_ISA_EXT_svade, guest_unsupp); + set_bit(RISCV_ISA_EXT_svpbmt, guest_unsupp); +} + void __init riscv_fill_hwcap(void) { unsigned int i; @@ -527,4 +582,6 @@ void __init riscv_fill_hwcap(void) if ( !all_extns_available ) panic("Look why the extensions above are needed in " "https://xenbits.xenproject.org/docs/unstable/misc/riscv/booting.txt\n"); + + init_guest_unsupp(); } diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 669dd27d79a3..041aed176f32 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -303,6 +303,9 @@ int arch_domain_create(struct domain *d, if ( is_idle_domain(d) ) return 0; + if ( (rc = init_guest_isa(d)) != 0 ) + goto fail; + if ( (rc = p2m_init(d, config)) != 0) goto fail; diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index 0c48d57a03bb..42d13d9dbdbe 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -17,6 +17,8 @@ */ #define RISCV_ISA_EXT_BASE 26 +#define RISCV_GUEST_ISA_STR_MAX 256 + enum riscv_isa_ext_id { RISCV_ISA_EXT_a, RISCV_ISA_EXT_c, @@ -44,7 +46,10 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_MAX }; +struct domain; + void riscv_fill_hwcap(void); +int init_guest_isa(struct domain *d); bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6044ce0feee0..664b0b9f9129 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -94,6 +95,9 @@ struct arch_domain { struct p2m_domain p2m; struct paging_domain paging; + + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; }; #include -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303741.1577038 (Exim 4.92) (envelope-from ) id 1wLMQf-00066m-PU; Fri, 08 May 2026 14:43:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303741.1577038; Fri, 08 May 2026 14:43:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQf-00066Z-KP; Fri, 08 May 2026 14:43:49 +0000 Received: by outflank-mailman (input) for mailman id 1303741; Fri, 08 May 2026 14:43:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQe-0005ne-3z for xen-devel@lists.xenproject.org; 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This function is going to be use by common dom0less code during construction domain. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/u32/uint32_t for timebase_frequency local variable. - Drop +1 from BUILD_BUG_ON(). - return fdt_end_node(fdt); instead of res at the end of the function. --- --- xen/arch/riscv/domain-build.c | 106 ++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 492327631e33..3063328d96e4 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,8 +3,10 @@ #include #include #include +#include #include +#include #include #include @@ -50,3 +52,107 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) return 0; } +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) +{ + int res; + const struct dt_device_node *cpus = dt_find_node_by_path("/cpus"); + unsigned int cpu; + uint32_t timebase_frequency; + bool frequency_valid; + void *fdt = kinfo->fdt; + + dt_dprintk("Create cpus node\n"); + + if ( !cpus ) + { + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); + return -ENOENT; + } + + frequency_valid = dt_property_read_u32(cpus, "timebase-frequency", + &timebase_frequency); + + res = fdt_begin_node(fdt, "cpus"); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#address-cells", 1); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#size-cells", 0); + if ( res ) + return res; + + if ( frequency_valid ) + res = fdt_property_cell(fdt, "timebase-frequency", timebase_frequency); + + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + uint32_t reg = cpu_to_fdt32(cpu); + + snprintf(buf, sizeof(buf), "cpu@%u", cpu); + res = fdt_begin_node(fdt, buf); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", ®, sizeof(reg)); + if ( res ) + return res; + + res = fdt_property_string(fdt, "status", "okay"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "riscv"); + if ( res ) + return res; + + BUILD_BUG_ON((sizeof("riscv,") + + sizeof_field(struct gstage_mode_desc, name)) >= sizeof(buf)); + snprintf(buf, sizeof(buf), "riscv,%s", max_gstage_mode->name); + res = fdt_property_string(fdt, "mmu-type", buf); + if ( res ) + return res; + + res = fdt_property_string(fdt, "riscv,isa", d->arch.guest_isa_str); + if ( res ) + return res; + + res = fdt_property_string(fdt, "device_type", "cpu"); + if ( res ) + return res; + + res = fdt_begin_node(fdt, "interrupt-controller"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#interrupt-cells", 1); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); + if ( res ) + return res; + + /* end of interrupt-controller */ + res = fdt_end_node(fdt); + if ( res ) + return res; + + res = fdt_end_node(fdt); + if ( res ) + return res; + } + + return fdt_end_node(fdt); +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303742.1577048 (Exim 4.92) (envelope-from ) id 1wLMQh-0006MP-3i; Fri, 08 May 2026 14:43:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303742.1577048; Fri, 08 May 2026 14:43:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQg-0006Ll-T3; Fri, 08 May 2026 14:43:50 +0000 Received: by outflank-mailman (input) for mailman id 1303742; Fri, 08 May 2026 14:43:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQf-00062y-Ev for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQd-00EphB-A5 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a1-e002-0a2a0a5209dd-0a2a4507ac04-2 for ; Fri, 08 May 2026 16:43:48 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a4-229c-0a2a45070019-d155da30a8f9-3 for ; Fri, 08 May 2026 16:43:48 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc1f0830f44so590070366b.0 for ; Fri, 08 May 2026 07:43:48 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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It matches the CPU node (compatible "riscv"), not the timer node itself. It then calls of_find_compatible_node(NULL, NULL, "riscv,timer") only to read the optional riscv,timer-cannot-wake-cpu property. Since Xen does not care about that property for now, make_timer_node() is implemented to return 0, as no timer node needs to be created for RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Acked-by: Jan Beulich - Update the commit message. --- --- xen/arch/riscv/domain-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 3063328d96e4..02b293239142 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include @@ -156,3 +157,10 @@ int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) return fdt_end_node(fdt); } + +int __init make_timer_node(const struct kernel_info *kinfo) +{ + /* There is no need for timer node for RISC-V. */ + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303745.1577056 (Exim 4.92) (envelope-from ) id 1wLMQi-0006dm-F6; Fri, 08 May 2026 14:43:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303745.1577056; Fri, 08 May 2026 14:43:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQi-0006dN-7v; Fri, 08 May 2026 14:43:52 +0000 Received: by outflank-mailman (input) for mailman id 1303745; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQg-0006J3-QL for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQg-007XVC-6p for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:50 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-2 for ; Fri, 08 May 2026 16:43:50 +0200 Received: from [209.85.218.51] (helo=mail-ej1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a6-af86-0a2a45020019-d155da33a5c7-3 for ; Fri, 08 May 2026 16:43:50 +0200 Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-bc23bebd345so31302266b.1 for ; Fri, 08 May 2026 07:43:50 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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It is placed in dom0less-build.c as make_arch_nodes() is only used in the dom0less code path. In the future, it will be extended to create an emulated UART node. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Update the commit message. --- --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index a683972e9235..4cc00012aa8d 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -2,10 +2,18 @@ #include #include +#include #include #include +int __init make_arch_nodes(struct kernel_info *kinfo) +{ + /* No RISC-V specific nodes need to be made, at the moment. */ + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303746.1577064 (Exim 4.92) (envelope-from ) id 1wLMQj-0006vi-Uh; Fri, 08 May 2026 14:43:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303746.1577064; Fri, 08 May 2026 14:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQj-0006ux-Lw; Fri, 08 May 2026 14:43:53 +0000 Received: by outflank-mailman (input) for mailman id 1303746; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQi-0006aZ-5O for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQh-00A90j-Id for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:51 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-2 for ; Fri, 08 May 2026 16:43:51 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a7-aaa8-0a2a45050019-d155da31a443-3 for ; Fri, 08 May 2026 16:43:51 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-b93698bb57aso376275666b.0 for ; Fri, 08 May 2026 07:43:51 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 7 +++++-- xen/arch/riscv/include/asm/intc.h | 10 +++++++--- xen/arch/riscv/intc.c | 10 ++++++++-- 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 739e8dab3498..97dc0ef731f0 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -306,12 +306,15 @@ static const hw_irq_controller aplic_xen_irq_type = { static const struct intc_hw_operations aplic_ops = { .info = &aplic_info, - .init = aplic_init, .host_irq_type = &aplic_xen_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, }; +static const struct intc_hw_init_ops __initdata aplic_init_ops = { + .init = aplic_init, +}; + static int cf_check aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize, unsigned int *out_hwirq, @@ -347,7 +350,7 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat) dt_irq_xlate = aplic_irq_xlate; - register_intc_ops(&aplic_ops); + register_intc_ops(&aplic_ops, &aplic_init_ops); /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index ecdc8a5e6577..8b498e43b33f 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -28,8 +28,6 @@ struct intc_info { struct intc_hw_operations { /* Hold intc hw information */ const struct intc_info *info; - /* Initialize the intc and the boot CPU */ - int (*init)(void); /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; @@ -43,9 +41,15 @@ struct intc_hw_operations { void (*handle_interrupt)(struct cpu_user_regs *regs); }; +struct intc_hw_init_ops { + /* Initialize the intc and the boot CPU */ + int (*init)(void); +}; + void intc_preinit(void); -void register_intc_ops(const struct intc_hw_operations *ops); +void register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops); void intc_init(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index ea317aea5ad8..8649160403f7 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -12,9 +12,13 @@ static const struct intc_hw_operations *__ro_after_init intc_hw_ops; -void __init register_intc_ops(const struct intc_hw_operations *ops) +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; + +void __init register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops) { intc_hw_ops = ops; + intc_hw_init_ops = init_ops; } void __init intc_preinit(void) @@ -27,7 +31,9 @@ void __init intc_preinit(void) void __init intc_init(void) { - if ( intc_hw_ops->init() ) + ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303749.1577072 (Exim 4.92) (envelope-from ) id 1wLMQl-0007EP-Ea; Fri, 08 May 2026 14:43:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303749.1577072; Fri, 08 May 2026 14:43:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQl-0007Ds-9K; Fri, 08 May 2026 14:43:55 +0000 Received: by outflank-mailman (input) for mailman id 1303749; Fri, 08 May 2026 14:43:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQj-0006sB-JQ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQj-00A90j-02 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:53 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a1-bab6-0a2a0a5309dd-0a2a450ad498-16 for ; Fri, 08 May 2026 16:43:52 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a8-56b3-0a2a450a0019-d155da32b892-3 for ; Fri, 08 May 2026 16:43:52 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-bc2a455fd55so299695866b.2 for ; Fri, 08 May 2026 07:43:52 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add make_intc_domU_node() to the dom0less build path and wire it to a new generic helper, intc_make_domu_dt_node(), which delegates DT node creation to the active interrupt controller implementation via vintc_init_ops. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/intc_make_domu_dt_node/make_intc_domU_node. - introduce separate intc_hw_init_ops structure for init operations. - Return -EOPNOTSUPP instead of -ENOSYS. - Drop const for kinfo argument as it could be changed by interrupt controller node creation code. - Refactor make_domu_dt_node(). - Make make_domu_dt_node part of vintc structure as it looks more logical to be there. --- xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/intc.h | 12 ++++++++++-- xen/arch/riscv/intc.c | 11 +++++++++++ 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 664b0b9f9129..136d9e816a44 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -98,6 +98,8 @@ struct arch_domain { DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; + + struct vintc *vintc; }; #include diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 8b498e43b33f..70df461a2a51 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -8,14 +8,13 @@ #ifndef ASM__RISCV__INTERRUPT_CONTOLLER_H #define ASM__RISCV__INTERRUPT_CONTOLLER_H -struct dt_device_node; - enum intc_version { INTC_APLIC, }; struct cpu_user_regs; struct irq_desc; +struct kernel_info; struct intc_info { enum intc_version hw_version; @@ -46,6 +45,15 @@ struct intc_hw_init_ops { int (*init)(void); }; +struct vintc_init_ops { + /* Create interrupt controller node for domain */ + int (*make_domu_dt_node)(struct kernel_info *kinfo); +}; + +struct vintc { + struct vintc_init_ops *init_ops; +}; + void intc_preinit(void); void register_intc_ops(const struct intc_hw_operations *ops, diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 8649160403f7..0994deddcb2c 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -73,3 +74,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) intc_set_irq_type(desc, desc->arch.type); intc_set_irq_priority(desc, priority); } + +int __init make_intc_domU_node(struct kernel_info *kinfo) +{ + struct vintc *vintc = kinfo->bd.d->arch.vintc; + + if ( intc_hw_ops && vintc->init_ops && vintc->init_ops->make_domu_dt_node ) + return vintc->init_ops->make_domu_dt_node(kinfo); + + return -EOPNOTSUPP; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303751.1577081 (Exim 4.92) (envelope-from ) id 1wLMQn-0007XN-1J; Fri, 08 May 2026 14:43:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303751.1577081; Fri, 08 May 2026 14:43:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQm-0007X3-OJ; Fri, 08 May 2026 14:43:56 +0000 Received: by outflank-mailman (input) for mailman id 1303751; Fri, 08 May 2026 14:43:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQl-0007Cq-8s for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQk-007XVC-Kx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:54 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-14 for ; Fri, 08 May 2026 16:43:54 +0200 Received: from [209.85.218.46] (helo=mail-ej1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6aa-af86-0a2a45020019-d155da2eb034-3 for ; Fri, 08 May 2026 16:43:54 +0200 Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-b8f97c626aaso358645366b.2 for ; Fri, 08 May 2026 07:43:54 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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At the moment, it only checks whether the SSAIA extension is available, and if so, sets is_aia_usable (which indicates more than just the availability of the extension) to true; it also signifies that the necessary components (to be introduced in follow-up patches) have been initialized. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/is_aia_available/is_aia_usable. - Drop return value for aia_init(). - s/aia_available()/aia_usable(). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aia.c | 23 +++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 10 ++++++++++ xen/arch/riscv/intc.c | 3 +++ 4 files changed, 37 insertions(+) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/include/asm/aia.h diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index fd5e499eb4b9..9df8b72b5494 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,3 +1,4 @@ +obj-y += aia.o obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c new file mode 100644 index 000000000000..f67f422c5a45 --- /dev/null +++ b/xen/arch/riscv/aia.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +static bool __ro_after_init is_aia_usable; + +bool aia_usable(void) +{ + return is_aia_usable; +} + +void __init aia_init(void) +{ + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + return; + + is_aia_usable = true; +} diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/aia.h new file mode 100644 index 000000000000..ca42c3086126 --- /dev/null +++ b/xen/arch/riscv/include/asm/aia.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM__RISCV__AIA_H +#define ASM__RISCV__AIA_H + +bool aia_usable(void); + +void aia_init(void); + +#endif /* ASM__RISCV__ACPI_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 0994deddcb2c..a611c9dc5f32 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -9,6 +9,7 @@ #include #include +#include #include static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -34,6 +35,8 @@ void __init intc_init(void) { ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + aia_init(); + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303756.1577089 (Exim 4.92) (envelope-from ) id 1wLMQo-0007uM-Mn; Fri, 08 May 2026 14:43:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303756.1577089; Fri, 08 May 2026 14:43:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQo-0007sk-A4; Fri, 08 May 2026 14:43:58 +0000 Received: by outflank-mailman (input) for mailman id 1303756; Fri, 08 May 2026 14:43:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQm-0007TQ-H3 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQk-00EpjT-Bx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-5cb7-0a2a0a5109dd-0a2a4506c6fc-34 for ; Fri, 08 May 2026 16:43:55 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6ab-7371-0a2a45060019-d155da2da8ee-3 for ; Fri, 08 May 2026 16:43:55 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-bc1f0830f44so590084566b.0 for ; Fri, 08 May 2026 07:43:55 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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AIA provides a hardware-accelerated mechanism for delivering external interrupts to domains via "guest interrupt files" located in IMSIC. A single physical hart can implement multiple such files (up to GEILEN), allowing several virtual harts to receive interrupts directly from hardware. Introduce per-CPU tracking of guest interrupt file identifiers (VGEIN) for systems implementing AIA specification. Each CPU maintains a bitmap describing which guest interrupt files are currently in use. Add helpers to initialize the bitmap based on the number of available guest interrupt files (GEILEN), assign a VGEIN to a vCPU, and release it when no longer needed. When assigning a VGEIN, the corresponding value is written to the VGEIN field of the guest hstatus register so that VS-level external interrupts are delivered from the selected interrupt file. Signed-off-by: Oleksii Kurochko --- Changes in v2: - add static for defintion of vgein_bmp; - Drop declarartion of vgein_bmp from aia.h. - Move declaration of 'struct vgein_bmp' from aia.h to aia.c as all the management is inside aia.c. - Instead of decrement of vgein->geilen just update the wait how it is initialized. - Return -EOPNOTSUPP in vgein_init() instead of BUG_ON(). - Use %u to print unsigned int. - make bmp field in vgein_bmp not a pointer. - allocate owners dynamically. - Drop unnessary blank lines. - use find_first_zero_bit() instead of bitmap_weight() to find a free slot for vgein number. - Drop the section number for the comment. - Start to search from bitnum 1 for free vgein_id, as bitnum 0 is reserved to tell that no guest extrenal interrupt number is used. Thereby drop vgein_id++ at the end of vgein_assign(). - s/bitmap_set/__set_bit. - s/bitmap_clear/__clear_bit. - as vgein_init() is needed to be invoked once per CPU being brought up, drop __init for it. - Return vgein_id == 0 if vgein_id is higher then maximun supported by h/w VGEIN. - Add check in vgein_relase() that vgein is 0 and if it is there is nothing is needed to do. - Use gdprintk instead of printk() in vgein_{assign,release}. - Add the claryfing comment above geilen field. - Drop ASSERT in vgein_assign() and return just vgein_id = 0 in the case when there is no aviablable h/w VGEINs. - Make vgein_init() static. --- xen/arch/riscv/aia.c | 144 +++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 8 ++ 2 files changed, 152 insertions(+) diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c index f67f422c5a45..f7f44961e0f5 100644 --- a/xen/arch/riscv/aia.c +++ b/xen/arch/riscv/aia.c @@ -1,11 +1,33 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include #include #include #include +#include +#include #include +#include +#include #include +#include +#include + +struct vgein_ctrl { + unsigned long bmp; + spinlock_t lock; + struct vcpu **owners; + /* The least-significant bits are implemented first, apart from bit 0 */ + unsigned int geilen; +}; + +/* + * Bitmap for each physical cpus to detect which VS (guest) + * interrupt file id was used. + */ +static DEFINE_PER_CPU(struct vgein_ctrl, vgein); static bool __ro_after_init is_aia_usable; @@ -14,10 +36,132 @@ bool aia_usable(void) return is_aia_usable; } +static int vgein_init(unsigned int cpu) +{ + struct vgein_ctrl *vgein = &per_cpu(vgein, cpu); + + csr_write(CSR_HGEIE, -1UL); + vgein->geilen = flsl(csr_read(CSR_HGEIE) >> 1); + csr_write(CSR_HGEIE, 0); + + printk("cpu%d.geilen=%u\n", cpu, vgein->geilen); + + if ( !vgein->geilen ) + return -EOPNOTSUPP; + + vgein->owners = xvzalloc_array(struct vcpu *, vgein->geilen); + if ( !vgein->owners ) + return -ENOMEM; + + spin_lock_init(&vgein->lock); + + return 0; +} + +static int cf_check cpu_callback(struct notifier_block *nfb, unsigned long action, + void *hcpu) +{ + unsigned int cpu = (unsigned long)hcpu; + int rc = 0; + + switch ( action ) + { + case CPU_STARTING: + rc = vgein_init(cpu); + if ( rc ) + printk("AIA: failed to init vgein for CPU%un", cpu); + break; + } + + return notifier_from_errno(rc); +} + +static struct notifier_block cpu_nfb = { + .notifier_call = cpu_callback, +}; + void __init aia_init(void) { + int rc; + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + { + dprintk(XENLOG_WARNING, "SSAIA isn't present in riscv,isa\n"); + return; + } + + if ( (rc = vgein_init(0)) ) + { + dprintk(XENLOG_ERR, "vgein_init() failed with rc(%d)\n", rc); return; + } is_aia_usable = true; + + register_cpu_notifier(&cpu_nfb); +} + +unsigned int vgein_assign(struct vcpu *v) +{ + unsigned int vgein_id; + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); + unsigned long *bmp = &vgein->bmp; + unsigned long flags; + + spin_lock_irqsave(&vgein->lock, flags); + /* + * The vgein_id shouldn't be zero, as it will indicate that no guest + * external interrupt source is selected for VS-level external interrupts + * according to RISC-V priviliged spec: + * Hypervisor Status Register (hstatus) in RISC-V priviliged spec: + * + * The VGEIN (Virtual Guest External Interrupt Number) field selects + * a guest external interrupt source for VS-level external interrupts. + * VGEIN is a WLRL field that must be able to hold values between zero + * and the maximum guest external interrupt number (known as GEILEN), + * inclusive. + * When VGEIN=0, no guest external interrupt source is selected for + * VS-level external interrupts. + * + * So start to search from bit number 1. + */ + vgein_id = find_next_zero_bit(bmp, vgein->geilen + 1, 1); + + if ( vgein_id > vgein->geilen ) + vgein_id = 0; + else + __set_bit(vgein_id, bmp); + + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: %pv: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", + __func__, v, vgein_id, v->processor, *bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; + vcpu_guest_cpu_user_regs(v)->hstatus |= + MASK_INSR(vgein_id, HSTATUS_VGEIN); + + return vgein_id; +} + +void vgein_release(struct vcpu *v, unsigned int vgen_id) +{ + unsigned long flags; + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); + + if ( !vgen_id ) + return; + + spin_lock_irqsave(&vgein->lock, flags); + __clear_bit(vgen_id, &vgein->bmp); + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", + __func__, vgen_id, v->processor, vgein->bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; } diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/aia.h index ca42c3086126..6073c89774bb 100644 --- a/xen/arch/riscv/include/asm/aia.h +++ b/xen/arch/riscv/include/asm/aia.h @@ -3,8 +3,16 @@ #ifndef ASM__RISCV__AIA_H #define ASM__RISCV__AIA_H +#include +#include + +struct vcpu; + bool aia_usable(void); void aia_init(void); +unsigned int vgein_assign(struct vcpu *v); +void vgein_release(struct vcpu *v, unsigned int vgen_id); + #endif /* ASM__RISCV__ACPI_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303757.1577096 (Exim 4.92) (envelope-from ) id 1wLMQp-000837-Kq; Fri, 08 May 2026 14:43:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303757.1577096; Fri, 08 May 2026 14:43:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQp-00081x-3W; Fri, 08 May 2026 14:43:59 +0000 Received: by outflank-mailman (input) for mailman id 1303757; Fri, 08 May 2026 14:43:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQo-0007kt-0g for xen-devel@lists.xenproject.org; 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Introduce a per-vCPU structure to hold IMSIC-related state, including the guest interrupt file identifier and the CPU providing the backing VS-file. Access to the guest file identifier is protected by a lock. Initialize this structure during vCPU setup and store it in arch_vcpu. The initial state marks the VS-file as software-backed until it becomes associated with a physical CPU. Add helpers to retrieve and update the guest interrupt file identifier: - imsic_set_guest_file_id() is going to be used during vCPU creation to initialize IMSIC interrupt controller things for this vCPU. - vcpu_guest_file_id() is going to be used during update of APLIC's target register with the pair of information (to have MSI delivery mode work properly) when guest is trying to access vAPLIC's target register. It will be used in the follow up patches. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rename imsic_state to vimsic_state. - Use 'unsigned int' for vsfile_pcpu. - Drop initialzation of ->guest_file_id as it will be by default zero. - Add the comment about ->guest_file_id field. - Drop __init for vcpu_imsic_init() as it could be used during post-boot vCPU creation. - Update the commit message. - Drop locks around ->guest_file_id() in vcpu_guest_file_id() and imsic_set_guest_file_id(). --- xen/arch/riscv/imsic.c | 35 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/imsic.h | 23 +++++++++++++++++++ 3 files changed, 60 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..8b46419ca23b 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,16 @@ do { \ csr_clear(CSR_SIREG, v); \ } while (0) +unsigned int vcpu_guest_file_id(const struct vcpu *v) +{ + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); +} + +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id) +{ + ACCESS_ONCE(v->arch.vimsic_state->guest_file_id) = guest_file_id; +} + void __init imsic_ids_local_delivery(bool enable) { if ( enable ) @@ -312,6 +323,30 @@ static int imsic_parse_node(const struct dt_device_node *node, return 0; } +int vcpu_imsic_init(struct vcpu *v) +{ + struct vimsic_state *imsic_state; + + /* Allocate IMSIC context */ + imsic_state = xvzalloc(struct vimsic_state); + if ( !imsic_state ) + return -ENOMEM; + + v->arch.vimsic_state = imsic_state; + + /* Setup IMSIC context */ + rwlock_init(&imsic_state->vsfile_lock); + + imsic_state->vsfile_pcpu = NR_CPUS; + + return 0; +} + +void vcpu_imsic_deinit(const struct vcpu *v) +{ + xvfree(v->arch.vimsic_state); +} + /* * Initialize the imsic_cfg structure based on the IMSIC DT node. * diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 136d9e816a44..42c1db91bd86 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,8 @@ struct arch_vcpu { struct vtimer vtimer; + struct vimsic_state *vimsic_state; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h index c6c59215df20..2b84824cd377 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -11,6 +11,7 @@ #ifndef ASM_RISCV_IMSIC_H #define ASM_RISCV_IMSIC_H +#include #include #include #include @@ -61,7 +62,24 @@ struct imsic_config { spinlock_t lock; }; +struct vimsic_state { + /* IMSIC VS-file */ + rwlock_t vsfile_lock; + /* + * (guest_file_id == 0) -> s/w IMSIC SW-file + * (guest_file_id > 0) -> h/w IMSIC VS-file + */ + unsigned int guest_file_id; + /* + * (vsfile_pcpu >= 0) => h/w IMSIC VS-file + * (vsfile_pcpu == NR_CPUS) => s/w IMSIC SW-file + */ + unsigned int vsfile_pcpu; +}; + struct dt_device_node; +struct vcpu; + int imsic_init(const struct dt_device_node *node); const struct imsic_config *imsic_get_config(void); @@ -71,4 +89,9 @@ void imsic_irq_disable(unsigned int hwirq); void imsic_ids_local_delivery(bool enable); +int vcpu_imsic_init(struct vcpu *v); +void vcpu_imsic_deinit(const struct vcpu *v); +unsigned int vcpu_guest_file_id(const struct vcpu *v); +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id); + #endif /* ASM_RISCV_IMSIC_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303761.1577105 (Exim 4.92) (envelope-from ) id 1wLMQs-00009F-A6; Fri, 08 May 2026 14:44:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303761.1577105; Fri, 08 May 2026 14:44:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQr-00005V-Fo; Fri, 08 May 2026 14:44:01 +0000 Received: by outflank-mailman (input) for mailman id 1303761; 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Initialize vAPLIC's domaincfg to with the interrupt-enable bit set and MSI delivery mode selected as the current solution is exepcted to have always IMSIC, and initialize vintc->ops. Other operations such as emulate_load(), emulate_store(), and is_access() will be needed once guests are running and MMIO accesses to APLIC MMIO range must be handled. These will be introduced separately later. Introduce a structure to describe a virtual interrupt controller (vINTC) and a vintc_ops structure, which provides operations to emulate load and store accesses to interrupt controller MMIOs and to check whether a given address falls within the MMIO range of a specific virtual interrupt controller. The vAPLIC implementation of these operations will be provided later once guests can be run and these operations are actually needed. Introduce these structures here as they are required for the implementation of domain_vaplic_init() and domain_vaplic_alloc(). Also, introduce vcpu_vaplic_init() and init vintc_ops->vcpu_init() with it. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/vcpu/v for function arguments in struct vintc_ops(). - Update the comment above is_access() and drop const for addr argument. - Update to_vaplic() to work with 'struct domain *'. - Drop smsiaddrcfg{h} from vaplic_regs struct as they aren't used for now. - Drop inclusion of xen/schec.h from intc.c. - use result of xvzalloc() as initializer in vpalic_alloc(). - Drop goto in domain_vaplic_init(). - s/XVFREE/xvfree. - s/aplic/vintc. - Drop __init for vcpu_vaplic_init() as it could be called for secondary CPU bring up. - Drop vaplic_alloc(). - Drop vintc_ops struct, embed callbacks iniside struct vintc. - Introduce and init vintc irqs for vAPLIC. - Introduce intc_irq_nums() to properly initialize number of vAPLIC's irqs. --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 6 +++ xen/arch/riscv/domain.c | 13 ++--- xen/arch/riscv/include/asm/intc.h | 17 ++++++- xen/arch/riscv/include/asm/vaplic.h | 34 +++++++++++++ xen/arch/riscv/intc.c | 7 +++ xen/arch/riscv/vaplic.c | 78 +++++++++++++++++++++++++++++ 7 files changed, 147 insertions(+), 9 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9df8b72b5494..9d8d21b65188 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -25,6 +25,7 @@ obj-y += smpboot.o obj-y += stubs.o obj-y += time.o obj-y += traps.o +obj-y += vaplic.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 97dc0ef731f0..aba9f3945236 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -295,6 +295,11 @@ static void cf_check aplic_set_irq_type(struct irq_desc *desc, spin_unlock(&aplic.lock); } +static unsigned int cf_check aplic_irq_num(void) +{ + return aplic_info.num_irqs; +} + static const hw_irq_controller aplic_xen_irq_type = { .typename = "aplic", .startup = aplic_irq_startup, @@ -309,6 +314,7 @@ static const struct intc_hw_operations aplic_ops = { .host_irq_type = &aplic_xen_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, + .irq_nums = aplic_irq_num, }; static const struct intc_hw_init_ops __initdata aplic_init_ops = { diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 041aed176f32..7aa00d6cfd95 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -155,14 +156,10 @@ int arch_vcpu_create(struct vcpu *v) if ( (rc = vcpu_vtimer_init(v)) ) goto fail; - /* - * As interrupt controller (IC) is not yet implemented, - * return an error. - * - * TODO: Drop this once IC is implemented. - */ - rc = -EOPNOTSUPP; - goto fail; + ASSERT(v->domain->arch.vintc->ops->vcpu_init); + + if ( (rc = v->domain->arch.vintc->ops->vcpu_init(v)) ) + goto fail; return rc; diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 70df461a2a51..3b30d000066a 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -15,6 +15,7 @@ enum intc_version { struct cpu_user_regs; struct irq_desc; struct kernel_info; +struct vcpu; struct intc_info { enum intc_version hw_version; @@ -38,6 +39,8 @@ struct intc_hw_operations { /* handle external interrupt */ void (*handle_interrupt)(struct cpu_user_regs *regs); + + unsigned int (*irq_nums)(void); }; struct intc_hw_init_ops { @@ -50,8 +53,18 @@ struct vintc_init_ops { int (*make_domu_dt_node)(struct kernel_info *kinfo); }; +struct vintc_ops { + /* Initialize some vINTC-related stuff for a vCPU */ + int (*vcpu_init)(struct vcpu *v); + + /* Check if a address is virtual interrupt controller MMIO */ + int (*is_access)(const struct vcpu *v, unsigned long addr); +}; + struct vintc { - struct vintc_init_ops *init_ops; + unsigned int irq_nums; + const struct vintc_init_ops *init_ops; + const struct vintc_ops *ops; }; void intc_preinit(void); @@ -65,4 +78,6 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); void intc_handle_external_irqs(struct cpu_user_regs *regs); +unsigned int intc_irq_nums(void); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/asm/vaplic.h new file mode 100644 index 000000000000..630ca14657f2 --- /dev/null +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__VAPLIC_H +#define ASM__RISCV__VAPLIC_H + +#include +#include + +#include + +struct domain; + +#define to_vaplic(d) container_of(d->arch.vintc, struct vaplic, vintc) + +struct vaplic_regs { + uint32_t domaincfg; +}; + +struct vaplic { + struct vintc vintc; + struct vaplic_regs regs; +}; + +int domain_vaplic_init(struct domain *d); +void domain_vaplic_deinit(struct domain *d); + +#endif /* ASM__RISCV__VAPLIC_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index a611c9dc5f32..122adf78a391 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -78,6 +78,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) intc_set_irq_priority(desc, priority); } +unsigned int intc_irq_nums(void) +{ + ASSERT(intc_hw_ops && intc_hw_ops->irq_nums); + + return intc_hw_ops->irq_nums(); +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc = kinfo->bd.d->arch.vintc; diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c new file mode 100644 index 000000000000..d2ec196668bc --- /dev/null +++ b/xen/arch/riscv/vaplic.c @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + * Copyright (c) Vates + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "aplic-priv.h" + +#define VAPLIC_NUM_SOURCES 96 + +static int cf_check vcpu_vaplic_init(struct vcpu *v) +{ + int rc = 0; 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - Drop __init for domain_vintc_(de)init(). - Update the commit message. --- xen/arch/riscv/domain.c | 3 +++ xen/arch/riscv/include/asm/intc.h | 3 +++ xen/arch/riscv/intc.c | 36 +++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 7aa00d6cfd95..6de5b82b3724 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -306,6 +306,9 @@ int arch_domain_create(struct domain *d, if ( (rc = p2m_init(d, config)) != 0) goto fail; + if ( (rc = domain_vintc_init(d)) ) + goto fail; + return rc; fail: diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 3b30d000066a..89a9c6806e55 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -80,4 +80,7 @@ void intc_handle_external_irqs(struct cpu_user_regs *regs); unsigned int intc_irq_nums(void); +int domain_vintc_init(struct domain *d); +void domain_vintc_deinit(struct domain *d); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 122adf78a391..7f9850416bb4 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -11,6 +11,7 @@ #include #include +#include static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -94,3 +95,38 @@ int __init make_intc_domU_node(struct kernel_info *kinfo) return -EOPNOTSUPP; } + +int domain_vintc_init(struct domain *d) +{ + int ret = -EOPNOTSUPP; + const enum intc_version ver = intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + ret = domain_vaplic_init(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); + break; + } + + return ret; +} + +void domain_vintc_deinit(struct domain *d) +{ + const enum intc_version ver = intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + domain_vaplic_deinit(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); + break; + } +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303771.1577120 (Exim 4.92) (envelope-from ) id 1wLMQv-0000vs-W1; Fri, 08 May 2026 14:44:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303771.1577120; Fri, 08 May 2026 14:44:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQv-0000rx-98; Fri, 08 May 2026 14:44:05 +0000 Received: by outflank-mailman (input) for mailman id 1303771; Fri, 08 May 2026 14:44:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQs-0000CP-8H for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQq-00EpjT-2x for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:01 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6ae-5cb7-0a2a0a5109dd-0a2a45048fc2-6 for ; Fri, 08 May 2026 16:44:01 +0200 Received: from [209.85.218.44] (helo=mail-ej1-f44.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b1-1dec-0a2a45040019-d155da2ca595-3 for ; Fri, 08 May 2026 16:44:01 +0200 Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-bc23bebd345so31342266b.1 for ; Fri, 08 May 2026 07:44:01 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:00 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251441; x=1778856241; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sJgcbaZaXFB0dLYekd715MJ/zMchLKXDN0/D0Xu69Sc=; b=q8khQGGcXsdPCPAm5C3SRMtpdqUnoDAq10ucq+AJ4fL23SZ+NR7OwWb8W7XYk4tDlO xigIB0my7Lct5BkORRdrtDEgdTqR8/RlHIbTWP10E3M5ajtnlgvQMMkilwBtW/3s2Si5 rePktaLcgOvX3wK2tISVwY3PfOxcgir25eyiwqn7X2AxKs3LQX/zRIrpv2zS3eDTPgOk J7Ilp0SEwes63C1VlTqcgFFu2/QjuLeNmz/BtGe4vtYg1W0MXCoOlnO0Nm24neQjcaNg 8juiSXdkQNRJcYjFAQDOxvFyaM2ZmPFNgvP979iDoDRTv0ACLZuHZ4Ved/3tYEsGVJIA cQnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251441; x=1778856241; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sJgcbaZaXFB0dLYekd715MJ/zMchLKXDN0/D0Xu69Sc=; b=V/imjLQNKMgSNXjKpBnk8ByS4E6Zb2vLGj3bi7g2lGrxd5oeIBQ2Add8ynwQVoMTMI L0u55ZLkx+IXJjaaz+ScG+rJt3Zd0axlnMHHnsEkyiY0/TX4aq9tYOxbfbFDzoCnDJJa KPrx+pzC4rvzv1cXXLQcQQHMU9LiO4mpr0St5XMcu/OWHhHdktu9oCF3WzT9en+wWo5s n7+6nnS7hleHCWwAootDpw+qoX9P19ZqGEPs4De8k1xSVr7uFfgDzAZQ8L+AacM7bCqI U6cRX7uThiacJkzhgoV9NCvLwOsjHAkPUxahmesPp06mbo9peJRoliERzhoZ1IA0u7DN Et9g== X-Gm-Message-State: AOJu0YxSzyjOml+7uSIJpCjRuUZfX9CELTJLFSQTGyEyygwjBE3ACOnA RKhE2xkuNP1JOV9UJ+5uWv4X/Aem47jng2zxEbgAStND5yDe2aOJz9jjJt/CYw== X-Gm-Gg: AeBDiesEtacOxV+dkcZasLpemFMMuMbLbh9g/fs1NjSILvPlWY+jS3cEj+R6SMdYnf6 FECP4vA9KRMB0IDivb5kJhX2gdcIMyHWUpPZc5pUcVL0t9LSIskLX2XoIsKjFLaSgqintybLkMj SRgA7FgkdbfZtkmK25wdAyGYYz37iyiKcDKgmqRRawWWKXV4Eid4lxjJsboLJePg08AFL9uMUdX MvYtYmvrbMIIDVB0XkSnVYdGN8IdwVOaiz36EFUW60vM8fdmtcQOx6nd/ZJn1xbYaKZdre2TUCn E66Q7/5hIQlnHksYVr29LGcgv9qMZVCxWlRiOM/lIvgoUOyhZeVUVpfSTk/yfom45uD2vRMUqDZ vLmDc1yhJp27Ek3XYouV6f4zlJwDVEiIcDwxwquGlrpg9ovuhaLhcUm/OiZCic5QizgfnoMJ0UQ 9yF0r/dgDgll85wGwLyNZ+mGYwVO7no3tekv/mX1O1olQozWnVTLsPt4ps5IyuSB9Ahg== X-Received: by 2002:a17:907:26c4:b0:bc2:c99f:fb22 with SMTP id a640c23a62f3a-bc84cc7300emr434513366b.2.1778251440590; Fri, 08 May 2026 07:44:00 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 16/26] xen/riscv: create APLIC DT node for guest domains Date: Fri, 8 May 2026 16:43:18 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778251441-2997A3FF-93BDCA80/10/73395122804 X-purgate-type: spam X-purgate-size: 7708 Guests require a Device Tree description of the interrupt controller topology. Add support for creating an APLIC node when building the guest DT. Provide stub for imsic_make_dt_node() it will be introduced properly in follow-up patch. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Avoid as max as possible of host properties inheritance. Only number of APLIC's irqs are checked what leads to an introduction of get_aplic_irqs_num(). - Move this patch earlier what leads to an introduction of vimsic_make_domu_dt_node() stub. - s/vimsic_make_domu_dt_node/imsic_make_domu_dt_node. - Refactor vimsic_make_domu_dt_node() to avoid re-usage of APLIC host properties. - Drop next_phandle as it is now in common code. - Drop const for kinfo argument of vimsic_make_domu_dt_node() is is going to be updated inside vimsic_make_domu_dt_node(). - Use introduced before vintc->num_irqs. --- xen/arch/riscv/aplic.c | 2 + xen/arch/riscv/imsic.c | 7 +++ xen/arch/riscv/include/asm/aplic.h | 9 +++ xen/arch/riscv/include/asm/guest-layout.h | 2 + xen/arch/riscv/include/asm/imsic.h | 3 + xen/arch/riscv/vaplic.c | 77 ++++++++++++++++++++++- 6 files changed, 98 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index aba9f3945236..6ed9118485f3 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -12,8 +12,10 @@ #include #include #include +#include #include #include +#include #include #include #include diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index 8b46419ca23b..ceea6778d9dc 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -522,3 +523,9 @@ int __init imsic_init(const struct dt_device_node *node) return rc; } + +int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, + unsigned int *phandle) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index b0724fe6f360..b42b159496b8 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,7 @@ #include +#define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) @@ -27,6 +28,14 @@ #define APLIC_TARGET_HART_IDX_SHIFT 18 +#define APLIC_IDC_SIZE 32 + +#define APLIC_MIN_SIZE 0x4000 +#define APLIC_SIZE_ALIGN(x) ROUNDUP(x, APLIC_MIN_SIZE) + +#define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ + APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpus))) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index 68d95a09394c..9fc990c057f2 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -3,6 +3,8 @@ #include +#define GUEST_APLIC_S_BASE 0xd000000 + #define GUEST_RAM_BANKS 2 /* diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h index 2b84824cd377..604f88db9322 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -78,6 +78,7 @@ struct vimsic_state { }; struct dt_device_node; +struct kernel_info; struct vcpu; int imsic_init(const struct dt_device_node *node); @@ -94,4 +95,6 @@ void vcpu_imsic_deinit(const struct vcpu *v); unsigned int vcpu_guest_file_id(const struct vcpu *v); void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id); +int vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phandle); + #endif /* ASM_RISCV_IMSIC_H */ diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index d2ec196668bc..3f967464335a 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -9,6 +9,8 @@ */ #include +#include +#include #include #include @@ -19,8 +21,11 @@ #include "aplic-priv.h" +#define VAPLIC_COMPATIBLE "riscv,aplic" #define VAPLIC_NUM_SOURCES 96 +#define FDT_VAPLIC_INT_CELLS 2 + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc = 0; @@ -47,6 +52,73 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) return rc; } +static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *kinfo) +{ + int res = 0; + void *fdt = kinfo->fdt; + unsigned int msi_parent_phandle; + char vaplic_name[128]; + paddr_t aplic_addr = GUEST_APLIC_S_BASE; + paddr_t aplic_size = APLIC_SIZE(kinfo->bd.d->max_vcpus); + const __be32 reg[] = { + cpu_to_be32(aplic_addr >> 32), + cpu_to_be32(aplic_addr), + cpu_to_be32(aplic_size >> 32), + cpu_to_be32(aplic_size), + }; + struct vintc *vintc = kinfo->bd.d->arch.vintc; + + res = snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", + GUEST_APLIC_S_BASE); + if ( res >= sizeof(vaplic_name) ) + { + dprintk(XENLOG_DEBUG, "vaplic name is truncated\n"); + return -ENOBUFS; + } + + res = vimsic_make_domu_dt_node(kinfo, &msi_parent_phandle); + if ( res ) + return res; + + res = fdt_begin_node(fdt, vaplic_name); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#interrupt-cells", FDT_VAPLIC_INT_CELLS); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", reg, sizeof(reg)); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "riscv,num-sources", vintc->irq_nums); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", VAPLIC_COMPATIBLE); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "msi-parent", msi_parent_phandle); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "phandle", kinfo->phandle_intc); + if ( res ) + return res; + + return fdt_end_node(fdt); +} + +static const struct vintc_init_ops __initdata init_ops = { + .make_domu_dt_node = vaplic_make_domu_dt_node, +}; + static const struct vintc_ops vintc_ops = { .vcpu_init = vcpu_vaplic_init, }; @@ -60,13 +132,14 @@ int __init domain_vaplic_init(struct domain *d) d->arch.vintc = &vaplic->vintc; d->arch.vintc->ops = &vintc_ops; + d->arch.vintc->init_ops = &init_ops; - vaplic->regs.domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM; + vaplic->regs.domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM | + APLIC_DOMAINCFG_RO80; d->arch.vintc->irq_nums = min(intc_irq_nums(), VAPLIC_NUM_SOURCES + 0U); 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Add support for generating an IMSIC node when building the guest DT. This allows guests to discover and use the IMSIC interrupt controller. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/imsic_make_reg_property/guest_imsic_make_reg_property. - s/imsic_set_interrupt_extended_prop/guest_imsic_set_interrupt_extended_prop. - Use initalizer for regs[] array in imsic_make_reg_property(). - Move buf[] insde the for() loop. - Correct check of returned phandle. - Drop local variable len. - /s/XVFREE/xvfree in imsic_set_interrupt_extended_prop(). - Drop initializer for local variable data. - s/uint32_t/unsinged int for pos and cpu in imsic_set_interrupt_extended_prop(). - Drop next_phandle as it is now in common code. - Introduce vcpu_imsic_deinit. - Refactor vimsic_make_domu_dt_node() to avoid usage of host IMSIC dt node. --- xen/arch/riscv/imsic.c | 127 +++++++++++++++++++++- xen/arch/riscv/include/asm/guest-layout.h | 2 + 2 files changed, 128 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index ceea6778d9dc..19cbacdf96e1 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -13,9 +13,12 @@ #include #include #include +#include #include +#include #include #include +#include #include #include #include @@ -35,6 +38,11 @@ static struct imsic_config imsic_cfg = { .lock = SPIN_LOCK_UNLOCKED, }; +static unsigned int __ro_after_init guest_num_msis; + +#define GUEST_IMSIC_COMPATIBLE "riscv,imsics" +#define GUEST_IMSIC_NUM_MSIS 255 + #define IMSIC_DISABLE_EIDELIVERY 0 #define IMSIC_ENABLE_EIDELIVERY 1 #define IMSIC_DISABLE_EITHRESHOLD 1 @@ -291,6 +299,11 @@ static int imsic_parse_node(const struct dt_device_node *node, return -ENOENT; } + if ( dt_property_read_u32(node, "riscv,num-guest-ids", &tmp) ) + guest_num_msis = tmp; + else + guest_num_msis = imsic_cfg.nr_ids; + if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) || (imsic_cfg.nr_ids > IMSIC_MAX_ID) ) { @@ -524,8 +537,120 @@ int __init imsic_init(const struct dt_device_node *node) return rc; } +static int __init guest_imsic_make_reg_property(struct domain *d, void *fdt) +{ + paddr_t base_addr = GUEST_IMSIC_S_BASE; + __be32 regs[4] = { + cpu_to_be32(base_addr >> 32), + cpu_to_be32(base_addr), + cpu_to_be32((IMSIC_MMIO_PAGE_SZ * d->max_vcpus) >> 32), + cpu_to_be32(IMSIC_MMIO_PAGE_SZ * d->max_vcpus), + }; + + return fdt_property(fdt, "reg", regs, sizeof(regs)); +} + +static int __init guest_imsic_set_interrupt_extended_prop(struct domain *d, + void *fdt) +{ + unsigned int cpu, pos = 0; + uint32_t phandle; + uint32_t *irq_ext; + int res; + + irq_ext = xvzalloc_array(uint32_t, d->max_vcpus * 2); + if ( !irq_ext ) + return -ENOMEM; + + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + + snprintf(buf, sizeof(buf), "/cpus/cpu@%u/interrupt-controller", cpu); + phandle = fdt_get_phandle(fdt, fdt_path_offset(fdt, buf)); + + if ( !phandle ) + { + res = -ENODEV; + goto out; + } + + irq_ext[pos++] = cpu_to_be32(phandle); + irq_ext[pos++] = cpu_to_be32(IRQ_S_EXT); + } + + res = fdt_property(fdt, "interrupts-extended", irq_ext, + d->max_vcpus * 2 * sizeof(*irq_ext)); + + out: + xvfree(irq_ext); + + return res; +} + int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phandle) { - return -EOPNOTSUPP; + int res; + void *fdt = kinfo->fdt; + char vimsic_name[128]; + unsigned int vimsic_phandle; + unsigned int num_msis = min(GUEST_IMSIC_NUM_MSIS + 0U, guest_num_msis); + + res = snprintf(vimsic_name, sizeof(vimsic_name), "/soc/imsic@%x", + GUEST_IMSIC_S_BASE); + if ( res >= sizeof(vimsic_name) ) + { + dprintk(XENLOG_DEBUG, "vimsic name is truncated\n"); + return -ENOBUFS; + } + + res = fdt_begin_node(fdt, vimsic_name); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", GUEST_IMSIC_COMPATIBLE); + if ( res ) + return res; + + res = guest_imsic_make_reg_property(kinfo->bd.d, fdt); + if ( res ) + return res; + + res = guest_imsic_set_interrupt_extended_prop(kinfo->bd.d, fdt); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "riscv,num-ids", num_msis); + if ( res ) + return res; + + res = fdt_property(fdt, "msi-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "#msi-cells", 0); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "#interrupt-cells", 0); + if ( res ) + return res; + + vimsic_phandle = alloc_phandle(kinfo); + if ( !vimsic_phandle ) + return -EOVERFLOW; + + res = fdt_property_cell(fdt, "phandle", vimsic_phandle); + if ( res ) + return res; + + if ( phandle ) + *phandle = vimsic_phandle; + + return fdt_end_node(fdt); } diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index 9fc990c057f2..b16ec79c3786 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -5,6 +5,8 @@ #define GUEST_APLIC_S_BASE 0xd000000 +#define GUEST_IMSIC_S_BASE 0x28000000 + #define GUEST_RAM_BANKS 2 /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303781.1577134 (Exim 4.92) (envelope-from ) id 1wLMQz-0001Zs-7v; Fri, 08 May 2026 14:44:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303781.1577134; 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/fdt-domain-build.h | 13 +++++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index 0d29b46ea52b..0adfa4993a8f 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -53,9 +53,6 @@ void init_traps(void); int handle_device(struct domain *d, struct dt_device_node *dev, p2m_type_t p2mt, struct rangeset *iomem_ranges, struct rangeset *irq_ranges); -int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, - bool need_mapping, struct rangeset *irq_ranges); - int map_irq_to_domain(struct domain *d, unsigned int irq, bool need_mapping, const char *devname); diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 671486c1c837..8612e98dfda5 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -12,6 +12,7 @@ struct domain; struct page_info; +struct rangeset; struct membanks; typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg, @@ -79,6 +80,18 @@ static inline void set_domain_type(struct domain *d, const struct kernel_info *k #endif } +/* + * Retrieves the interrupts configuration from a device tree node and maps + * those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges); + #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */ /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303790.1577139 (Exim 4.92) (envelope-from ) id 1wLMR0-0001mR-LU; Fri, 08 May 2026 14:44:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303790.1577139; Fri, 08 May 2026 14:44:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQz-0001ge-Az; Fri, 08 May 2026 14:44:09 +0000 Received: by outflank-mailman (input) for mailman id 1303790; Fri, 08 May 2026 14:44:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQw-00018r-N1 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQw-007XaD-1f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:06 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6b5-2eae-0a2a0a5409dd-0a2a45068ed4-2 for ; Fri, 08 May 2026 16:44:06 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b5-7371-0a2a45060019-d155da2de86b-3 for ; Fri, 08 May 2026 16:44:05 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-b79f8f7ea43so339684666b.2 for ; Fri, 08 May 2026 07:44:05 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Introduce map_device_irqs_to_domain() to enumerate a DT node's interrupt properties, skipping those not owned by the primary interrupt controller (as at the moment I haven't seen usages of it), and map_irq_to_domain() to grant domain access and configure Xen's interrupt descriptor accordingly. Sharing IRQ between domains is rejected. route_irq_to_guest() and release_irq() manage irq_desc ownership for guest-assigned interrupts. Each assignment carries a small irq_guest structure as irqaction::dev_id, recording the owning domain and virtual IRQ number which is 1:1 mapped to physical IRQ number. A per-domain vIRQ allocation bitmap (allocated_irqs in struct vintc), managed by vintc_reserve_virq(), prevents the same vIRQ being claimed twice. With APLIC+IMSIC, guest interrupts are delivered directly by hardware through the IMSIC, bypassing do_IRQ(). The _IRQ_GUEST branch in do_IRQ() is therefore left as BUG() until a platform without direct IMSIC delivery is encountered. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rework IRQ mapping in more common (similar approach to Arm). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 4 + xen/arch/riscv/device.c | 108 ++++++++++++++++++ xen/arch/riscv/include/asm/intc.h | 10 ++ xen/arch/riscv/include/asm/irq.h | 3 + xen/arch/riscv/include/asm/setup.h | 4 + xen/arch/riscv/intc.c | 36 ++++++ xen/arch/riscv/irq.c | 175 +++++++++++++++++++++++++++++ 8 files changed, 341 insertions(+) create mode 100644 xen/arch/riscv/device.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9d8d21b65188..fc6b34661111 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aia.o obj-y += aplic.o obj-y += cpufeature.o +obj-y += device.o obj-y += domain.o obj-y += domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 6ed9118485f3..1c8fd0145eb2 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -311,9 +311,13 @@ static const hw_irq_controller aplic_xen_irq_type = { .set_affinity = aplic_set_irq_affinity, }; +/* At the moment there is no difference between guest and Xen ops */ +#define aplic_guest_irq_type aplic_xen_irq_type + static const struct intc_hw_operations aplic_ops = { .info = &aplic_info, .host_irq_type = &aplic_xen_irq_type, + .guest_irq_type = &aplic_guest_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, .irq_nums = aplic_irq_num, diff --git a/xen/arch/riscv/device.c b/xen/arch/riscv/device.c new file mode 100644 index 000000000000..ba78032028af --- /dev/null +++ b/xen/arch/riscv/device.c @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include + +#include + +int map_irq_to_domain(struct domain *d, unsigned int irq, + bool need_mapping, const char *devname) +{ + int res; + + res = irq_permit_access(d, irq); + if ( res ) + { + printk(XENLOG_ERR "Unable to permit to %pd access to IRQ %u\n", d, irq); + return res; + } + + if ( need_mapping ) + { + /* + * Checking the return of vintc_reserve_virq is not + * necessary. It should not fail except when we try to map + * the IRQ twice. This can legitimately happen if the IRQ is shared. + */ + vintc_reserve_virq(d, irq); + + res = route_irq_to_guest(d, irq, irq, devname); + if ( res < 0 ) + { + printk(XENLOG_ERR "Unable to map IRQ%u to %pd\n", irq, d); + return res; + } + } + + dt_dprintk(" - IRQ: %u\n", irq); + + return 0; +} + +/* + * map_device_irqs_to_domain retrieves the interrupts configuration from + * a device tree node and maps those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, + struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges) +{ + unsigned int i, nirq; + int res, irq; + struct dt_raw_irq rirq; + + nirq = dt_number_of_irq(dev); + + /* Give permission and map IRQs */ + for ( i = 0; i < nirq; i++ ) + { + res = dt_device_get_raw_irq(dev, i, &rirq); + if ( res ) + { + printk(XENLOG_ERR "Unable to retrieve irq %u for %s\n", + i, dt_node_full_name(dev)); + return res; + } + + /* + * Don't map IRQ that have no physical meaning + * ie: IRQ whose controller is not APLIC/IMSIC/PLIC. + */ + if ( rirq.controller != dt_interrupt_controller ) + { + dt_dprintk("irq %u not connected to primary controller." + "Connected to %s\n", i, + dt_node_full_name(rirq.controller)); + continue; + } + + irq = platform_get_irq(dev, i); + if ( irq < 0 ) + { + printk("Unable to get irq %u for %s\n", i, dt_node_full_name(dev)); + return irq; + } + + res = map_irq_to_domain(d, irq, need_mapping, dt_node_name(dev)); + if ( res ) + return res; + + + /* + * At the moment there is only one user of map_device_irqs_to_domain() + * for RISC-V which calls it irq_ranges == NULL. + */ + if ( irq_ranges ) + return -EOPNOTSUPP; + } + + return 0; +} diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 89a9c6806e55..1ff992b6c20b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -13,8 +13,11 @@ enum intc_version { }; struct cpu_user_regs; +struct domain; +struct dt_device_node; struct irq_desc; struct kernel_info; +struct rangeset; struct vcpu; struct intc_info { @@ -32,6 +35,9 @@ struct intc_hw_operations { /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; + /* hw_irq_controller to enable/disable/eoi guest irq */ + const struct hw_interrupt_type *guest_irq_type; + /* Set IRQ type */ void (*set_irq_type)(struct irq_desc *desc, unsigned int type); /* Set IRQ priority */ @@ -63,6 +69,7 @@ struct vintc_ops { struct vintc { unsigned int irq_nums; + unsigned long *allocated_irqs; const struct vintc_init_ops *init_ops; const struct vintc_ops *ops; }; @@ -75,6 +82,7 @@ void register_intc_ops(const struct intc_hw_operations *ops, void intc_init(void); void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); +int intc_route_irq_to_guest(struct irq_desc *desc, unsigned int priority); void intc_handle_external_irqs(struct cpu_user_regs *regs); @@ -83,4 +91,6 @@ unsigned int intc_irq_nums(void); int domain_vintc_init(struct domain *d); void domain_vintc_deinit(struct domain *d); +bool vintc_reserve_virq(const struct domain *d, unsigned int virq); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h index f633636dc308..98dd536be86e 100644 --- a/xen/arch/riscv/include/asm/irq.h +++ b/xen/arch/riscv/include/asm/irq.h @@ -49,6 +49,9 @@ void init_IRQ(void); void do_IRQ(struct cpu_user_regs *regs, unsigned int irq); +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname); + #endif /* ASM__RISCV__IRQ_H */ /* diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index 2215894cfbb1..9dbd3a8cbef7 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,10 @@ #include +struct domain; +struct dt_device_node; +struct rangeset; + #define max_init_domid (0) void setup_mm(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 7f9850416bb4..a24c679c0cf8 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -7,7 +7,9 @@ #include #include #include +#include #include +#include #include #include @@ -86,6 +88,22 @@ unsigned int intc_irq_nums(void) return intc_hw_ops->irq_nums(); } +int intc_route_irq_to_guest(struct irq_desc *desc, + unsigned int priority) +{ + ASSERT(spin_is_locked(&desc->lock)); + + ASSERT(intc_hw_ops->guest_irq_type); + + desc->handler = intc_hw_ops->guest_irq_type; + set_bit(_IRQ_GUEST, &desc->status); + + intc_set_irq_type(desc, desc->arch.type); + intc_set_irq_priority(desc, priority); + + return 0; +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc = kinfo->bd.d->arch.vintc; @@ -112,6 +130,14 @@ int domain_vintc_init(struct domain *d) break; } + if ( !ret ) + { + d->arch.vintc->allocated_irqs = + xvzalloc_array(unsigned long, BITS_TO_LONGS(d->arch.vintc->irq_nums)); + if ( !d->arch.vintc->allocated_irqs ) + ret = -ENOMEM; + } + return ret; } @@ -129,4 +155,14 @@ void domain_vintc_deinit(struct domain *d) printk("vintc (ver:%d) isn't implemented\n", ver); break; } + + xvfree(d->arch.vintc->allocated_irqs); +} + +bool vintc_reserve_virq(const struct domain *d, unsigned int virq) +{ + if ( virq >= d->arch.vintc->irq_nums ) + return false; + + return !test_and_set_bit(virq, d->arch.vintc->allocated_irqs); } diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 25d329500212..4481ae23aa8e 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -12,11 +12,20 @@ #include #include #include +#include #include +#include #include #include +/* Describe an IRQ assigned to a guest */ +struct irq_guest +{ + struct domain *d; + unsigned int virq; +}; + static irq_desc_t irq_desc[NR_IRQS]; static bool irq_validate_new_type(unsigned int curr, unsigned int new) @@ -192,6 +201,15 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq) if ( desc->handler->ack ) desc->handler->ack(desc); + if ( desc->status & IRQ_GUEST ) + /* + * As at the moment APLIC + IMSIC is used for guest interrupts will + * be directly passed to guest. But if/when IMSIC won't be available + * all interrupts will go through Xenand here an irq injection + * will be necessary to do. + */ + panic("unimplemented"); + if ( desc->status & IRQ_DISABLED ) goto out; @@ -221,3 +239,160 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq) spin_unlock(&desc->lock); irq_exit(); } + +static inline struct irq_guest *irq_get_guest_info(struct irq_desc *desc) +{ + ASSERT(spin_is_locked(&desc->lock)); + ASSERT(test_bit(_IRQ_GUEST, &desc->status)); + ASSERT(desc->action != NULL); + + return desc->action->dev_id; +} + +static inline struct domain *irq_get_domain(struct irq_desc *desc) +{ + return irq_get_guest_info(desc)->d; +} + +void release_irq(unsigned int irq, const void *dev_id) +{ + struct irq_desc *desc; + unsigned long flags; + struct irqaction *action, **action_ptr; + + desc = irq_to_desc(irq); + + spin_lock_irqsave(&desc->lock,flags); + + action_ptr = &desc->action; +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION + for ( ;; ) + { + action = *action_ptr; + if ( !action ) + { + printk(XENLOG_WARNING "Trying to free already-free IRQ %u\n", irq); + spin_unlock_irqrestore(&desc->lock, flags); + return; + } + + if ( action->dev_id == dev_id ) + break; + + action_ptr = &action->next; + } + + /* Found it - remove it from the action list */ + *action_ptr = action->next; +#else + action = *action_ptr; +#endif + + /* If this was the last action, shut down the IRQ */ + if ( !desc->action ) + { + desc->handler->shutdown(desc); + clear_bit(_IRQ_GUEST, &desc->status); + } + + spin_unlock_irqrestore(&desc->lock,flags); + + /* Wait to make sure it's not being used on another CPU */ + do { smp_mb(); } while ( test_bit(_IRQ_INPROGRESS, &desc->status) ); + + if ( action->free_on_release ) + xvfree(action); +} + +/* Route an IRQ to a specific guest */ +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname) +{ + struct irqaction *action; + struct irq_guest *info; + struct irq_desc *desc; + unsigned long flags; + int retval = 0; + + desc = irq_to_desc(irq); + + action = xvmalloc(struct irqaction); + if ( !action ) + return -ENOMEM; + + info = xvmalloc(struct irq_guest); + if ( !info ) + { + xvfree(action); + return -ENOMEM; + } + + info->d = d; + info->virq = virq; + + action->dev_id = info; + action->name = devname; + action->free_on_release = 1; + + spin_lock_irqsave(&desc->lock, flags); + + /* + * If the IRQ is already used by someone + * - If it's the same domain -> Xen doesn't need to update the IRQ desc. + * For safety check if we are not trying to assign the IRQ to a + * different vIRQ. + * - Otherwise -> For now, don't allow the IRQ to be shared between + * Xen and domains. + */ + if ( desc->action != NULL ) + { + if ( test_bit(_IRQ_GUEST, &desc->status) ) + { + struct domain *ad = irq_get_domain(desc); + + if ( d != ad ) + { + printk(XENLOG_G_ERR "IRQ %u is already used by domain %u\n", + irq, ad->domain_id); + retval = -EBUSY; + } + else if ( irq_get_guest_info(desc)->virq != virq ) + { + printk(XENLOG_G_ERR + "d%u: IRQ %u is already assigned to vIRQ %u\n", + d->domain_id, irq, irq_get_guest_info(desc)->virq); + retval = -EBUSY; + } + } + else + { + printk(XENLOG_G_ERR "IRQ %u is already used by Xen\n", irq); + retval = -EBUSY; + } + goto out; + } + + retval = _setup_irq(desc, 0, action); + if ( retval ) + goto out; + + retval = intc_route_irq_to_guest(desc, IRQ_NO_PRIORITY); + + spin_unlock_irqrestore(&desc->lock, flags); + + if ( retval ) + { + release_irq(desc->irq, info); + goto free_info; + } + + return 0; + + out: + spin_unlock_irqrestore(&desc->lock, flags); + xvfree(action); + free_info: + xvfree(info); + + return retval; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303793.1577147 (Exim 4.92) (envelope-from ) id 1wLMR2-0002Ie-NL; Fri, 08 May 2026 14:44:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303793.1577147; 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Date: Fri, 8 May 2026 16:43:22 +0200 Message-ID: <736349477470f316da7020c4c1c7e92e37470d31.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778251447-28678C48-FCBD3EF2/10/73395122804 X-purgate-type: spam X-purgate-size: 2205 These definitions are required for correct decoding of APLIC MMIO accesses and target configuration, and will be used by both the physical and virtual APLIC implementations. No functional change is intended by this patch; it only centralises hardware definitions that were previously missing. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/aplic.h | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index b42b159496b8..e418fc53433b 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,11 @@ #include +#define APLIC_REG_OFFSET_MASK 0x3fff +#define APLIC_TARGET_IPRIO_MASK 0xff +#define APLIC_TARGET_GUEST_IDX_SHIFT 12 +#define APLIC_TARGET_EIID_MASK 0x7ff + #define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) @@ -26,6 +31,36 @@ #define APLIC_SOURCECFG_SM_LEVEL_HIGH 0x6 #define APLIC_SOURCECFG_SM_LEVEL_LOW 0x7 +#define APLIC_DOMAINCFG 0x0000 +#define APLIC_SOURCECFG_BASE 0x0004 +#define APLIC_SOURCECFG_LAST 0x0ffc + +#define APLIC_SMSICFGADDR 0x1bc8 +#define APLIC_SMSICFGADDRH 0x1bcc + +#define APLIC_SETIP_BASE 0x1c00 +#define APLIC_SETIP_LAST 0x1c7c +#define APLIC_SETIPNUM 0x1cdc + +#define APLIC_CLRIP_BASE 0x1d00 +#define APLIC_CLRIP_LAST 0x1d7c +#define APLIC_CLRIPNUM 0x1ddc + +#define APLIC_SETIE_BASE 0x1e00 +#define APLIC_SETIE_LAST 0x1e7c +#define APLIC_SETIENUM 0x1edc + +#define APLIC_CLRIE_BASE 0x1f00 +#define APLIC_CLRIE_LAST 0x1f7c +#define APLIC_CLRIENUM 0x1fdc + +#define APLIC_SETIPNUM_LE 0x2000 + +#define APLIC_GENMSI 0x3000 + +#define APLIC_TARGET_BASE 0x3004 +#define APLIC_TARGET_LAST 0x3ffc + #define APLIC_TARGET_HART_IDX_SHIFT 18 #define APLIC_IDC_SIZE 32 -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303805.1577155 (Exim 4.92) (envelope-from ) id 1wLMR4-0002bn-Gb; Fri, 08 May 2026 14:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303805.1577155; Fri, 08 May 2026 14:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR3-0002Wz-GC; Fri, 08 May 2026 14:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1303805; Fri, 08 May 2026 14:44:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQz-0001g9-9w for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQy-007XaD-LF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:08 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a0-2eae-0a2a0a5409dd-0a2a450197ec-16 for ; Fri, 08 May 2026 16:44:08 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b8-c1f2-0a2a45010019-d155da35b4a7-3 for ; Fri, 08 May 2026 16:44:08 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bc1f3a393c0so315224166b.0 for ; Fri, 08 May 2026 07:44:08 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Xen must intercept these accesses to enforce interrupt isolation between domains and to translate guest routing intent into the underlying physical MSI topology. Writes are gated by the domain's authorised interrupt bitmap so that a guest cannot affect interrupts it does not own. TARGET register writes additionally require translation of the hart and IMSIC guest-file indices from virtual to physical, as the APLIC uses these fields directly to compute the MSI delivery address. Delegation (APLIC_SOURCECFG_D) is not yet supported. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Merge the following patches into one: xen/riscv: add vaplic access check: - Add check that address is properly aligned. - Check vaplic range intead of APLIC one. - Return bool from vaplic_is_access instead of int. xen/riscv: emulate guest writes to virtual APLIC MMIO - Drop CALC_REG_VALUE. - Use unsigned int instead of uin32_t for offset. - s/.../subtracting in the comment. - start one line comments from the upper case. - Check the value before being written to sourcecfg register. - 'unsigned int' for loop index. - Omit unneessary braces. - s/vaplic_update_target/aplic_msi_target_gen. - Use IMSIC_MMIO_PAGE_SHIFT instead of 12 in aplic_msi_target_gen(). - Drop explicit usage of APLIC register in store function. - Drop APLIC_REG_{GET,SET} macros and introudce APLIC specific funtcions. - Ignore write to SOURCECFG_BASE when value is out-of-range. - Drop ASSERT(!target_vcpu) inside handler of targer register setting, just avoid such writings + debug message. - domain_crash() instead of panic() in the case of default case. - Drop ASSERT() in APLIC_SOURCE_CFG_BASE case and use domain_crash() instead. xen/riscv: emulate guest reads from virtual APLIC MMIO: - s/regval_to_irqn/regindx_to_irqn. - pass to to_vaplic() a domain instead of vintc. - add check that load access is aligned. - instead of panic() just crash a domain(). - use 'unsigned int' for local variable offset. - Return 0 in the case APLIC_CLRIE_BASE ...APLIC_CLRIE_LAST reading to follow AIA spec. - Drop explicit usage of physical APLIC registers. --- xen/arch/riscv/aplic.c | 25 +++ xen/arch/riscv/include/asm/aplic.h | 9 + xen/arch/riscv/include/asm/intc.h | 10 +- xen/arch/riscv/include/asm/vaplic.h | 3 + xen/arch/riscv/vaplic.c | 289 +++++++++++++++++++++++++++- 5 files changed, 333 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1c8fd0145eb2..1976733dfbaa 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -40,6 +40,31 @@ static struct intc_info __ro_after_init aplic_info = { .hw_version = INTC_APLIC, }; +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask) +{ + unsigned long flags; + uint32_t val; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + val = readl((void __iomem *)((uintptr_t)aplic.regs + offset)) & mask; + spin_unlock_irqrestore(&aplic.lock, flags); + + return val; +} + +void aplic_hw_write_reg(unsigned int offset, uint32_t value) +{ + unsigned long flags; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + writel(value, (void __iomem *)((uintptr_t)aplic.regs + offset)); + spin_unlock_irqrestore(&aplic.lock, flags); +} + static void __init aplic_init_hw_interrupts(void) { unsigned int i; diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index e418fc53433b..7905db9876d4 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,8 @@ #include +#define APLIC_NUM_REGS 32 + #define APLIC_REG_OFFSET_MASK 0x3fff #define APLIC_TARGET_IPRIO_MASK 0xff #define APLIC_TARGET_GUEST_IDX_SHIFT 12 @@ -24,6 +26,8 @@ #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) +#define APLIC_SOURCECFG_D BIT(10, U) + #define APLIC_SOURCECFG_SM_INACTIVE 0x0 #define APLIC_SOURCECFG_SM_DETACH 0x1 #define APLIC_SOURCECFG_SM_EDGE_RISE 0x4 @@ -71,6 +75,8 @@ #define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpus))) +#define APLIC_SETCLR_OFFSET_MASK ((32 * sizeof(uint32_t)) - 1) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ @@ -114,4 +120,7 @@ struct aplic_regs { uint32_t target[1023]; /* 0x3008 */ }; +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask); +void aplic_hw_write_reg(unsigned int offset, uint32_t value); + #endif /* ASM_RISCV_APLIC_H */ diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 1ff992b6c20b..641c83125a5b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -64,7 +64,15 @@ struct vintc_ops { int (*vcpu_init)(struct vcpu *v); /* Check if a address is virtual interrupt controller MMIO */ - int (*is_access)(const struct vcpu *v, unsigned long addr); + bool (*is_access)(const struct vcpu *v, unsigned long addr); + + /* Emulate load to virtual interrupt controller MMIOs */ + int (*emulate_load)(const struct vcpu *vcpu, unsigned long addr, + uint32_t *out); + + /* Emulate store to virtual interrupt controller MMIOs */ + int (*emulate_store)(const struct vcpu *vcpu, unsigned long addr, + uint32_t in); }; struct vintc { diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/asm/vaplic.h index 630ca14657f2..0fa690fcb2d7 100644 --- a/xen/arch/riscv/include/asm/vaplic.h +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -26,6 +26,9 @@ struct vaplic_regs { struct vaplic { struct vintc vintc; struct vaplic_regs regs; + + paddr_t regs_start; + paddr_t regs_size; }; int domain_vaplic_init(struct domain *d); diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index 3f967464335a..57c3433ba03b 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -26,6 +26,283 @@ #define FDT_VAPLIC_INT_CELLS 2 +#define AUTH_IRQ_BIT(d, irqn) ( \ + ((irqn) <= (d)->arch.vintc->irq_nums) && \ + test_bit(irqn, (d)->arch.vintc->allocated_irqs) ) + +#define regindx_to_irqn(reg_val) ((reg_val) / sizeof(uint32_t)) + +static inline uint32_t generate_auth_mask(const struct domain *d, + unsigned int irqsn) +{ + if ( irqsn >= DIV_ROUND_UP(d->arch.vintc->irq_nums, + sizeof(uint32_t) * BITS_PER_BYTE) ) + { + dprintk(XENLOG_DEBUG, "incorrect irqsn(%d) is passed\n", irqsn); + + return 0U; + } + + return *((uint32_t *)d->arch.vintc->allocated_irqs + irqsn); +} + +static int vaplic_emulate_load(const struct vcpu *vcpu, + const unsigned long addr, uint32_t *out) +{ + const struct domain *d = vcpu->domain; + const struct vaplic *vaplic = to_vaplic(d); + const unsigned int offset = addr & APLIC_REG_OFFSET_MASK; + uint32_t auth_mask; + unsigned int i; + + switch ( offset ) + { + case APLIC_DOMAINCFG: + *out = vaplic->regs.domaincfg; + + return 0; + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + /* + * Based on the RISC-V AIA spec a read of these registers + * always returns zero + */ + *out = 0; + + return 0; + + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + i = regindx_to_irqn(offset & APLIC_SETCLR_OFFSET_MASK); + auth_mask = generate_auth_mask(d, i); + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + /* + * As target registers start for 1: + * 0x3000 genmsi + * 0x3004 target[1] + * 0x3008 target[2] + * ... + * 0x3FFC target[1023] + * It is necessary to calculate an interrupt number by substracting + * of APLIC_GENMSI instead of APLIC_TARGET_BASE. + */ + i = regindx_to_irqn(offset - APLIC_GENMSI); + + if ( !AUTH_IRQ_BIT(d, i) ) + { + *out = 0; + + return 0; + } + + auth_mask = ~0U; + + break; + + default: + gdprintk(XENLOG_WARNING, "Unhandled APLIC read at offset %#x\n", + offset); + + domain_crash(vcpu->domain); + + return -EINVAL; + } + + *out = aplic_hw_read_reg(offset, auth_mask); + + return 0; +} + +static uint32_t aplic_msi_target_gen(const struct vcpu *target_vcpu, + uint32_t base_val) +{ + const struct imsic_config *imsic = imsic_get_config(); + unsigned int guest_id = vcpu_guest_file_id(target_vcpu); + unsigned long hart_id = cpuid_to_hartid(target_vcpu->processor); + unsigned long group_index; + unsigned int hhxw = imsic->group_index_bits; + unsigned int lhxw = imsic->hart_index_bits; + unsigned int hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2; + unsigned long base_ppn = imsic->msi[hart_id].base_addr >> IMSIC_MMIO_PAGE_SHIFT; + + group_index = (base_ppn >> (hhxs + IMSIC_MMIO_PAGE_SHIFT)) & (BIT(hhxw, UL) - 1); + + base_val &= APLIC_TARGET_EIID_MASK; + base_val |= guest_id << APLIC_TARGET_GUEST_IDX_SHIFT; + base_val |= hart_id << APLIC_TARGET_HART_IDX_SHIFT; + base_val |= group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT); + + return base_val; +} + +static int cf_check vaplic_emulate_store(const struct vcpu *vcpu, + unsigned long addr, uint32_t value) +{ + int rc = -EINVAL; + const struct domain *d = vcpu->domain; + unsigned int offset = addr & APLIC_REG_OFFSET_MASK; + + switch ( offset ) + { + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + { + unsigned int irqn = regindx_to_irqn(offset & APLIC_SETCLR_OFFSET_MASK); + value &= generate_auth_mask(d, irqn); + + break; + } + + case APLIC_SOURCECFG_BASE ... APLIC_SOURCECFG_LAST: + if ( value & APLIC_SOURCECFG_D ) + { + rc = -EOPNOTSUPP; + + dprintk(XENLOG_ERR, "APLIC_SOURCECFG_D isn't supported\n"); + + goto fail; + } + + /* + * As sourcecfg register starts from 1: + * 0x0000 domaincfg + * 0x0004 sourcecfg[1] + * 0x0008 sourcecfg[2] + * ... + * 0x0FFC sourcecfg[1023] + * It is necessary to calculate an interrupt number by subtracting + * of APLIC_DOMAINCFG instead of APLIC_SOURCECFG_BASE. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_DOMAINCFG)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + if ( value > APLIC_SOURCECFG_SM_LEVEL_LOW ) + { + gdprintk(XENLOG_ERR, + "value(%u) is incorrect for sourcecfg register\n", value); + + return 0; + } + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + { + struct vcpu *target_vcpu = NULL; + + /* + * Look at vaplic_emulate_load() for explanation why + * APLIC_GENMSI is subtracted. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_GENMSI)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + for ( unsigned int i = 0; i < vcpu->domain->max_vcpus; i++ ) + { + struct vcpu *v = vcpu->domain->vcpu[i]; + + if ( v->vcpu_id == (value >> APLIC_TARGET_HART_IDX_SHIFT) ) + { + target_vcpu = v; + break; + } + } + + if ( !target_vcpu ) + { + dprintk(XENLOG_ERR, "Invalid vCPU id in target register\n"); + + /* Ignore such writings */ + return 0; + } + + value = aplic_msi_target_gen(target_vcpu, value); + + break; + } + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + if ( !value || !AUTH_IRQ_BIT(d, value) ) + return 0; + + break; + + case APLIC_DOMAINCFG: + /* + * TODO: + * The domaincfg register has this format: + * bits 31:24 read-only 0x80 + * bit 8 IE + * bit 7 read-only 0 + * bit 2 DM (WARL) + * bit 0 BE (WARL) + * + * The most interesting bit for us is IE(Interrupt Enable) bit. + * At the moment, at least, Linux doesn't use domaincfg.IE bit to + * disable interrupts globally, but if one day someone will use it + * then extra actions should be done. + */ + + printk_once("%s: Ignore writes to domaincfg as it is set by aplic " + " during initialization in Xen\n", __func__); + + return 0; + + default: + goto fail; + } + + aplic_hw_write_reg(offset, value); + + return 0; + + fail: + domain_crash(vcpu->domain, + "Unhandled APLIC write at offset %#x (value %#x)\n", offset, + value); + + return rc; +} + +static bool cf_check vaplic_is_access(const struct vcpu *vcpu, + unsigned long addr) +{ + const struct vaplic *vaplic = to_vaplic(vcpu->domain); + paddr_t start = vaplic->regs_start; + paddr_t end = vaplic->regs_start + vaplic->regs_size; + + if ( addr & 0x3 ) + { + dprintk(XENLOG_DEBUG, + "APLIC MMIO address should be properly aligned\n"); + + return false; + } + + /* check if it is an APLIC access */ + if ( start <= addr && addr < end ) + return true; + + return false; +} + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc = 0; @@ -54,19 +331,24 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *kinfo) { + struct domain *d = kinfo->bd.d; int res = 0; void *fdt = kinfo->fdt; unsigned int msi_parent_phandle; char vaplic_name[128]; paddr_t aplic_addr = GUEST_APLIC_S_BASE; - paddr_t aplic_size = APLIC_SIZE(kinfo->bd.d->max_vcpus); + paddr_t aplic_size = APLIC_SIZE(d->max_vcpus); const __be32 reg[] = { cpu_to_be32(aplic_addr >> 32), cpu_to_be32(aplic_addr), cpu_to_be32(aplic_size >> 32), cpu_to_be32(aplic_size), }; - struct vintc *vintc = kinfo->bd.d->arch.vintc; + struct vintc *vintc = d->arch.vintc; + struct vaplic *vaplic = to_vaplic(d); + + vaplic->regs_start = GUEST_APLIC_S_BASE; + vaplic->regs_size = aplic_size; res = snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", GUEST_APLIC_S_BASE); @@ -121,6 +403,9 @@ static const struct vintc_init_ops __initdata init_ops = { static const struct vintc_ops vintc_ops = { .vcpu_init = vcpu_vaplic_init, + .is_access = vaplic_is_access, + .emulate_store = vaplic_emulate_store, + .emulate_load = vaplic_emulate_load, }; int __init domain_vaplic_init(struct domain *d) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303807.1577159 (Exim 4.92) (envelope-from ) id 1wLMR6-0002vE-1f; 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/dom0less-build.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index 4cc00012aa8d..a1fa51b996a7 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -4,9 +4,26 @@ #include #include #include +#include #include +int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, + const int node_next, const void *pfdt) +{ + if ( dt_node_cmp(name, "intc") == 0 ) + { + uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next); + + if ( phandle_intc != 0 ) + kinfo->phandle_intc = phandle_intc; + + return 0; + } + + return 1; +} + int __init make_arch_nodes(struct kernel_info *kinfo) { /* No RISC-V specific nodes need to be made, at the moment. */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303811.1577172 (Exim 4.92) (envelope-from ) id 1wLMR8-0003Up-TA; Fri, 08 May 2026 14:44:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303811.1577172; Fri, 08 May 2026 14:44:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR7-0003Pi-Gw; Fri, 08 May 2026 14:44:17 +0000 Received: by outflank-mailman (input) for mailman id 1303811; Fri, 08 May 2026 14:44:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR1-0002Ba-UH for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR1-007XaD-9g for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:11 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-32 for ; Fri, 08 May 2026 16:44:11 +0200 Received: from [209.85.218.44] (helo=mail-ej1-f44.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bb-af86-0a2a45020019-d155da2cd8c6-3 for ; Fri, 08 May 2026 16:44:11 +0200 Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-bad54961385so338805566b.2 for ; Fri, 08 May 2026 07:44:11 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The scheduler must be initialized prior to do_initcalls() because cpupool_create_pool() is called during initcalls; without it, BUG_ON(IS_ERR(pool)) is triggered inside cpupool_create_pool(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. Several patches were folded into one. --- xen/arch/riscv/setup.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 56a0907a855f..c3e98733ebc3 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -6,9 +6,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include @@ -156,12 +159,21 @@ void __init noreturn start_xen(unsigned long bootcpu_id, timer_init(); + rcu_init(); + + setup_system_domains(); + local_irq_enable(); console_init_postirq(); guest_mm_init(); + scheduler_init(); + set_current(idle_vcpu[0]); + + do_initcalls(); + printk("All set up\n"); machine_halt(); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303819.1577177 (Exim 4.92) (envelope-from ) id 1wLMRA-0003p6-76; Fri, 08 May 2026 14:44:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303819.1577177; Fri, 08 May 2026 14:44:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR9-0003jz-5g; Fri, 08 May 2026 14:44:19 +0000 Received: by outflank-mailman (input) for mailman id 1303819; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR3-0002WB-Cl for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR2-005krU-OQ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:12 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-44 for ; Fri, 08 May 2026 16:44:12 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bc-aaa8-0a2a45050019-d155d02dd96c-3 for ; Fri, 08 May 2026 16:44:12 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-67c566cb519so3921629a12.3 for ; Fri, 08 May 2026 07:44:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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For full guesst console support it will better to have something similar to [1], thereby there is nothing specific should be done, at least, for now and init_vuart() is provided to make dom0less code buildable. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602041533440.3175371@ubuntu-linux-20-04-desktop/ Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index a1fa51b996a7..d1a51b92936a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -8,6 +8,14 @@ #include +int __init init_vuart(struct domain *d, struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + /* Nothing to do at the moment */ + + return 0; +} + int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt) { -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303824.1577189 (Exim 4.92) (envelope-from ) id 1wLMRC-0004B3-26; Fri, 08 May 2026 14:44:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303824.1577189; Fri, 08 May 2026 14:44:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMRA-000427-SJ; Fri, 08 May 2026 14:44:20 +0000 Received: by outflank-mailman (input) for mailman id 1303824; Fri, 08 May 2026 14:44:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR4-0002gH-As for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR3-007XaD-M5 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:13 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-42 for ; Fri, 08 May 2026 16:44:13 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bd-af86-0a2a45020019-d155da35e4fd-3 for ; Fri, 08 May 2026 16:44:13 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bb91b426e40so355083466b.0 for ; Fri, 08 May 2026 07:44:13 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add stub implementations for architecture-specific helpers used when building domains from the device tree. These currently perform no additional work but allow the generic dom0less code to build and run on RISC-V. Introduce max_init_domid as a runtime variable rather than a constant so that it can be updated during dom0less domain creation. Provide missing helpers and definitions required by the domain construction code, including domain bitness helpers and the p2m_set_allocation() prototype. Additionally define the guest magic memory region in the public RISC-V interface. As HAS_DOM0LESS is selected for RISC-V now it could be a compilation issue if CONFIG_STATIC_MEMORY=y as guest_physmap_add_pages() isn't yet provided. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Move declaration of p2m_set_allocation() to p2m-common.h. - Add __initdata for max_init_domid and drop initalizer for it. - Add CONFIG_STATIC_MEMORY=n to CI's randconfig to avoid compilation error because of guest_physmap_add_pages() isn't provided. - Select HAS_DOMAIN_TYPE for RISC-V and drop things which were introduced when HAS_DOMAIN_TYPE doesn't exist. --- automation/gitlab-ci/build.yaml | 1 + xen/arch/riscv/Kconfig | 2 ++ xen/arch/riscv/dom0less-build.c | 6 ++++++ xen/arch/riscv/domain-build.c | 13 +++++++++++++ xen/arch/riscv/include/asm/guest-layout.h | 3 +++ xen/arch/riscv/include/asm/setup.h | 4 +++- xen/arch/riscv/setup.c | 2 ++ 7 files changed, 30 insertions(+), 1 deletion(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f05895729147..3c3e7cb356a4 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -805,6 +805,7 @@ debian-13-riscv64-gcc: CONFIG_GRANT_TABLE=n CONFIG_LIVEPATCH=n CONFIG_QEMU_PLATFORM=y + CONFIG_STATIC_MEMORY=n CONFIG_VM_EVENT=n CONFIG_XSM=n diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 48520588fe40..d8a348c0cf07 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -6,6 +6,8 @@ config RISCV select GENERIC_BUG_FRAME select GENERIC_UART_INIT select HAS_DEVICE_TREE_DISCOVERY + select HAS_DOM0LESS + select HAS_DOMAIN_TYPE select HAS_EX_TABLE select HAS_PMAP select HAS_UBSAN diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index d1a51b92936a..b5390175538a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -102,3 +102,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, return 0; } + +int __init arch_handle_passthrough_prop(struct kernel_info *kinfo, + struct dt_device_node *node) +{ + return 0; +} diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 02b293239142..a70306434fc9 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -158,9 +158,22 @@ int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) return fdt_end_node(fdt); } +int __init construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + return -EOPNOTSUPP; +} + int __init make_timer_node(const struct kernel_info *kinfo) { /* There is no need for timer node for RISC-V. */ return 0; } + +int __init make_hypervisor_node(struct domain *d, + const struct kernel_info *kinfo, + int addrcells, int sizecells) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index b16ec79c3786..81cc87545054 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -24,4 +24,7 @@ #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } +#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) +#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) + #endif /* ASM_RISCV_GUEST_LAYOUT_H */ diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index 9dbd3a8cbef7..416d2301dcde 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,11 +5,13 @@ #include +#include + struct domain; struct dt_device_node; struct rangeset; -#define max_init_domid (0) +extern domid_t max_init_domid; void setup_mm(void); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index c3e98733ebc3..b8fa004cbf25 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -33,6 +33,8 @@ #include #include +domid_t __initdata max_init_domid; + /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303827.1577194 (Exim 4.92) (envelope-from ) id 1wLMRD-0004S3-IH; Fri, 08 May 2026 14:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303827.1577194; Fri, 08 May 2026 14:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMRC-0004M8-53; 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No rmb() is needed on the do_IRQ() side because desc->status is read under a spinlock, which implies an acquire barrier. No barrier is needed in aplic_irq_disable() because the hardware disables the interrupt before the status is updated, so do_IRQ() cannot fire, and spin_unlock() makes the updated value visible. Fixes: d4676a1398bc5 ("xen/riscv: implementation of aplic and imsic operations") Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 5 +++++ xen/arch/riscv/irq.c | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1976733dfbaa..7933a00772a8 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -161,6 +161,9 @@ static void cf_check aplic_irq_enable(struct irq_desc *desc) spin_lock(&aplic.lock); + desc->status &= ~IRQ_DISABLED; + wmb(); + /* Enable interrupt in IMSIC */ imsic_irq_enable(desc->irq); @@ -189,6 +192,8 @@ static void cf_check aplic_irq_disable(struct irq_desc *desc) /* Disable interrupt in IMSIC */ imsic_irq_disable(desc->irq); + desc->status |= IRQ_DISABLED; + spin_unlock(&aplic.lock); } diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 4481ae23aa8e..f9c10a7c9faf 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -145,9 +145,6 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new) desc->handler->set_affinity(desc, cpumask_of(smp_processor_id())); desc->handler->startup(desc); - - /* Enable irq */ - desc->status &= ~IRQ_DISABLED; } err: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 16:28:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 16:28:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304027.1577226 (Exim 4.92) (envelope-from ) id 1wLO3q-0002Ps-Sc; Fri, 08 May 2026 16:28:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304027.1577226; Fri, 08 May 2026 16:28:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLO3q-0002Pl-Pw; Fri, 08 May 2026 16:28:22 +0000 Received: by outflank-mailman (input) for mailman id 1304027; Fri, 08 May 2026 16:28:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLO3p-0002Nd-9M for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:28:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLO3o-007knQ-Ma for xen-devel@lists.xenproject.org; Fri, 08 May 2026 18:28:20 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe0eed-e002-0a2a0a5209dd-0a2a45028ab8-32 for ; Fri, 08 May 2026 18:28:20 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe0f24-af86-0a2a45020019-d155802ba5a5-3 for ; Fri, 08 May 2026 18:28:20 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so14953325e9.1 for ; Fri, 08 May 2026 09:28:20 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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This supercedes https://lore.kernel.org/xen-devel/94ffdeb1-6826-4c3a-a9c1-3ccc8b129a61@durham.ac.uk/T/#u using Anthony's suggested approach. Failed run: https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14282279751 Succeeding run (same container): https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14282714527 --- tools/libs/light/libxl_nocpuid.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/tools/libs/light/libxl_nocpuid.c b/tools/libs/light/libxl_nocpuid.c index 0630959e760c..ce334633b376 100644 --- a/tools/libs/light/libxl_nocpuid.c +++ b/tools/libs/light/libxl_nocpuid.c @@ -40,11 +40,21 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, return 0; } +#ifdef HAVE_LIBJSONC +int libxl_cpuid_policy_list_gen_jso(json_object **jso_r, libxl_cpuid_policy_list *pl) +{ + *jso_r = NULL; + return 0; +} +#endif + +#ifdef HAVE_LIBYAJL yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, libxl_cpuid_policy_list *pcpuid) { return 0; } +#endif int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, const libxl__json_object *o, -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 16:36:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 16:36:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304039.1577236 (Exim 4.92) (envelope-from ) id 1wLOBu-00047d-LH; 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The CH382 is available in two > variants: > - CH382 2S [1c00:3253]: 2 serial ports > - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port > > This chip uses IO BAR0, base baud rate 115200, ports starting at offset > 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] > > [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html > > Signed-off-by: Jiaqing Zhao > --- > xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 878da27f2e..106ef56316 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -95,6 +95,7 @@ struct ns16550_config { > param_exar_xr17v354, > param_exar_xr17v358, > param_intel_lpss, > + param_wch_ch382, > } param; > }; > > @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { > .mmio = 1, > .max_ports = 1, > }, > + [param_wch_ch382] = { > + .base_baud = 115200, > + .first_offset = 0xc0, > + .uart_offset = 8, > + .reg_width = 1, > + .fifo_size = 256, > + .lsr_mask = UART_LSR_THRE, > + .bar0 = 1, > + .max_ports = 2, > + }, > }; > > static const struct ns16550_config __initconst uart_config[] = > @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = > .dev_id = 0x7adc, > .param = param_intel_lpss > }, > + /* WCH CH382 2S */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3253, > + .param = param_wch_ch382 > + }, > + /* WCH CH382 2S1P */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3250, > + .param = param_wch_ch382 > + }, Suggest to keep the records sorted by .dev_id field. With that: Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Fri May 08 20:29:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:29:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304093.1577246 (Exim 4.92) (envelope-from ) id 1wLRoj-0000UX-Ev; Fri, 08 May 2026 20:29:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304093.1577246; Fri, 08 May 2026 20:29:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRoj-0000UQ-9u; Fri, 08 May 2026 20:29:01 +0000 Received: by outflank-mailman (input) for mailman id 1304093; Fri, 08 May 2026 20:29:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRoi-0000UK-Ct for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:29:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRog-00Ap9l-Ao for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:28:58 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe475c-e002-0a2a0a5209dd-0a2a4503ec68-26 for ; Fri, 08 May 2026 22:28:58 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe4789-672d-0a2a45030019-a0658309b772-3 for ; Fri, 08 May 2026 22:28:57 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 4A4448245FD5; Fri, 8 May 2026 16:27:51 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Juergen Gross , "Daniel P. Smith" , Christian Lindig , David Scott Subject: [PATCH v7 0/3] xen/mm: Introduce NUMA-aware memory claim sets Date: Fri, 8 May 2026 21:27:56 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778272138-39D7B938-8ACBBA69/0/0 X-purgate-type: clean X-purgate-size: 4355 Xen's existing memory claim interface can account only for a host-wide amount of memory for a domain. That is not enough for toolstacks that need to claim memory from particular NUMA nodes before building the domain. This series extends Xen's memory claim design to support claim sets with NUMA-node-specific entries. Roger Pau Monné summarized the core design requirement as: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. A claim set can contain multiple node-specific claims and a host-wide claim for memory that may come from any NUMA node. The new domctl installs the full claim set atomically, and the allocator is updated so that claim checks and claim consumption are NUMA-node aware. The components are: 1. installing multi-node claim sets atomically, 2. protecting claimed pages from other claim requests and allocations, and 3. redeeming claims in a NUMA-aware manner when satisfying allocations for domains with claims. Legacy XENMEM_claim_pages behaviour is preserved; the legacy interface is deprecated and superseded by XEN_DOMCTL_claim_memory. This update addresses v6 review comments, refactors claim redemption, and adds a GET operation for inspecting a domain's claim set. Only one preparatory patch remains in this version, followed by the main feature and finally the OCaml bindings. The updated design document for this series was submitted on May 5: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00163.html Rendered version: https://xen.kaindl.dev/claims-v7-design/designs/claims/ The core operational principles have been validated in the following ways: 1. A comprehensive functional system test suite running in Dom0, which will follow this submission. 2. A native integration test environment for the Xen page allocator, providing a configurable synthetic Xen heap for each test case, which will follow this submission as well. 3. A set of high-level functional integration tests and performance tests, executed as part of end-to-end product deployment validation. 4. Validation in a customer's application performance lab to confirm performance expectations. This was done on predecessor code sharing the same design; that earlier code only supported single-node claims. Best regards, Bernhard Changes since v6: - Incorporated v6 review feedback. - Restored claim invariants as needed after offlining pages. - Addressed Jan's point about the ambiguity of the term "global": See https://lists.xen.org/archives/html/xen-devel/2026-05/msg00026.html - Use "host-wide claims", with "host_claims" and "node_claims" as shorthands. In addition, I adjusted helper names to make the domain scope explicit and to keep the "release", "set", and "get" operations named consistently: * deduct_global_claims() -> domain_release_host_claims() * deduct_node_claims() -> domain_release_node_claims() * domain_set_outstanding_pages() -> domain_set_claim_entries() * domain_get_claim_entries() was added. - The new domain_set_claim_entries() helper also handles the legacy XENMEM_claim_pages interface for backward compatibility, replacing domain_set_outstanding_pages(). Bernhard Kaindl (3): xen/mm: Introduce per-node free page counter xen/mm: Introduce NUMA-aware memory claim sets tools/ocaml: Add OCaml binding for NUMA claim sets tools/include/xenctrl.h | 11 + tools/libs/ctrl/xc_domain.c | 28 ++ tools/ocaml/libs/xc/xenctrl.ml | 10 + tools/ocaml/libs/xc/xenctrl.mli | 10 + tools/ocaml/libs/xc/xenctrl_stubs.c | 50 ++++ xen/common/domain.c | 5 +- xen/common/domctl.c | 57 ++++ xen/common/memory.c | 5 +- xen/common/page_alloc.c | 416 +++++++++++++++++++++++----- xen/include/public/domctl.h | 38 +++ xen/include/public/memory.h | 2 + xen/include/xen/mm.h | 6 +- xen/include/xen/sched.h | 4 + xen/xsm/flask/hooks.c | 1 + xen/xsm/flask/policy/access_vectors | 1 + 15 files changed, 570 insertions(+), 74 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304115.1577253 (Exim 4.92) (envelope-from ) id 1wLRr6-00020R-Qx; Fri, 08 May 2026 20:31:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304115.1577253; Fri, 08 May 2026 20:31:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRr6-00020K-OR; Fri, 08 May 2026 20:31:28 +0000 Received: by outflank-mailman (input) for mailman id 1304115; Fri, 08 May 2026 20:31:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRr4-00020C-NW for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:31:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRr4-0008Mq-4d for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:31:26 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4817-5cb7-0a2a0a5109dd-0a2a450adec8-8 for ; Fri, 08 May 2026 22:31:26 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe481d-56b3-0a2a450a0019-a0658308cc16-3 for ; Fri, 08 May 2026 22:31:25 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 620124373E19; Fri, 8 May 2026 16:30:30 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo Subject: [PATCH v7 1/3] xen/mm: Introduce per-node free page counter Date: Fri, 8 May 2026 21:27:57 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778272286-7176D8B7-6DC2C879/0/0 X-purgate-type: clean X-purgate-size: 3964 From: Alejandro Vallejo Add node_avail_pages[], updated under heap_lock in sync with avail[node][zone] to cache the per-node sum of free pages. Use it in avail_node_heap_pages() to avoid summing all zones on each call. Guard it with nodeid < MAX_NUMNODES and node_online(nodeid). Signed-off-by: Alejandro Vallejo Signed-off-by: Bernhard Kaindl --- This patch was originally sent by Alejandro Vallejo: https://lists.xenproject.org/archives/html/xen-devel/2025-03/msg01130.html I use node_avail_pages[] in avail_node_heap_pages() as an optimisation. Verification of the changes: 1. node_avail_pages[node] is updated whenever avail[node][zone] changes, so the two remain in sync. 2. avail_node_heap_pages() previously summed all zones of a node and now returns node_avail_pages[node], so the same free buddy pages are counted. 3. avail_node_heap_pages() returns 0 for offline nodes and for nodes >= MAX_NUMNODES as before. 4. avail_node_heap_pages(-1) returned the sum from all nodes, equal to total_avail_pages, but this is not used by current callers. avail_heap_pages(z, z, -1) is used by other callers for that instead. To avoid dead code, a check for -1 to implement this is not added. Update locations: - free_heap_pages() increments node_avail_pages[node] alongside avail[node][zone] when pages are freed, including during heap initialisation. - alloc_heap_pages() decrements node_avail_pages[node] alongside avail[node][zone] when pages are allocated. - reserve_offlined_page() decrements node_avail_pages[node] alongside avail[node][zone] when pages are offlined. Colored pages do not go through the buddy allocator. Since they do not update avail[node][zone], they are not reflected in node_avail_pages[node] either. N.B. Current callers already iterate over online nodes only. Changes since v6: - Preserved the 0 return for offline nodes and nodes >= MAX_NUMNODES. --- xen/common/page_alloc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 2c4ff2c34c70..7e17bafa1e45 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -485,6 +485,7 @@ static unsigned long node_need_scrub[MAX_NUMNODES]; static unsigned long *avail[MAX_NUMNODES]; static unsigned long total_avail_pages; +static unsigned long node_avail_pages[MAX_NUMNODES]; static DEFINE_SPINLOCK(heap_lock); /* Total outstanding claims by all domains */ @@ -1050,6 +1051,8 @@ static struct page_info *alloc_heap_pages( avail[node][zone] -= request; ASSERT(total_avail_pages >= request); total_avail_pages -= request; + ASSERT(node_avail_pages[node] >= request); + node_avail_pages[node] -= request; if ( d && d->outstanding_pages && !(memflags & MEMF_no_refcount) ) { @@ -1243,6 +1246,8 @@ static int reserve_offlined_page(struct page_info *head) avail[node][zone]--; ASSERT(total_avail_pages > 0); total_avail_pages--; + ASSERT(node_avail_pages[node] > 0); + node_avail_pages[node]--; page_list_add_tail(cur_head, test_bit(_PGC_broken, &cur_head->count_info) ? @@ -1566,6 +1571,7 @@ static void free_heap_pages( avail[node][zone] += 1 << order; total_avail_pages += 1 << order; + node_avail_pages[node] += 1 << order; if ( need_scrub ) { node_need_scrub[node] += 1 << order; @@ -2831,7 +2837,9 @@ unsigned long avail_domheap_pages_region( unsigned long avail_node_heap_pages(unsigned int nodeid) { - return avail_heap_pages(MEMZONE_XEN, NR_ZONES -1, nodeid); + if ( nodeid < MAX_NUMNODES && node_online(nodeid) ) + return node_avail_pages[nodeid]; + return 0; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:37:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:37:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304146.1577263 (Exim 4.92) (envelope-from ) id 1wLRwV-0002cx-DG; Fri, 08 May 2026 20:37:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304146.1577263; Fri, 08 May 2026 20:37:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRwV-0002cq-A7; Fri, 08 May 2026 20:37:03 +0000 Received: by outflank-mailman (input) for mailman id 1304146; Fri, 08 May 2026 20:37:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRwT-0002ck-4h for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:37:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRwS-00Aq1l-EX for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:37:00 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4906-2eae-0a2a0a5409dd-0a2a4506dc28-46 for ; Fri, 08 May 2026 22:37:00 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe496b-7371-0a2a45060019-a0658309d4c2-3 for ; Fri, 08 May 2026 22:37:00 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 972C78245F8E; Fri, 8 May 2026 16:35:53 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Juergen Gross , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" Subject: [PATCH v7 2/3] xen/mm: Introduce NUMA-aware memory claim sets Date: Fri, 8 May 2026 21:27:58 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778272620-7F77FD75-8A8972F8/0/0 X-purgate-type: clean X-purgate-size: 31474 This commit extends Xen's memory claim design to support installing claim sets spanning multiple NUMA nodes atomically. As Roger Pau Monné suggested: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. A claim set can contain multiple node-specific claims and a host-wide claim for memory that may come from any NUMA node. The new domctl installs the full claim set atomically, and the allocator is updated so that claim checks and claim consumption follow the new semantics. This adds: 1. installing multi-node claim sets atomically, 2. protecting claimed pages from other claim requests and allocations, and 3. redeeming held claims when satisfying allocations. Legacy XENMEM_claim_pages behaviour is preserved; the interface is deprecated and superseded by XEN_DOMCTL_claim_memory. Signed-off-by: Roger Pau Monné Signed-off-by: Bernhard Kaindl --- The v7 design document submitted ahead of this series may help with review. It explains the background, design rationale, and implementation details. Rendered version: https://xen.kaindl.dev/claims-v7-design/designs/claims Many thanks to everyone who contributed to the earlier work and review: especially Roger Pau Monné, Alejandro Vallejo, Jan Beulich, Andrew Cooper, Marcus Granado, and Edwin Török. Thanks, Bernhard --- tools/include/xenctrl.h | 11 + tools/libs/ctrl/xc_domain.c | 28 ++ xen/common/domain.c | 5 +- xen/common/domctl.c | 57 ++++ xen/common/memory.c | 5 +- xen/common/page_alloc.c | 410 +++++++++++++++++++++++----- xen/include/public/domctl.h | 38 +++ xen/include/public/memory.h | 2 + xen/include/xen/mm.h | 6 +- xen/include/xen/sched.h | 4 + xen/xsm/flask/hooks.c | 1 + xen/xsm/flask/policy/access_vectors | 1 + 12 files changed, 493 insertions(+), 75 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..fffa4d3b9c09 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2659,6 +2659,17 @@ int xc_domain_set_llc_colors(xc_interface *xch, uint32_t domid, const uint32_t *llc_colors, uint32_t num_llc_colors); +/* + * Set or get memory claims for a domain. + * + * For XEN_DOMCTL_CLAIM_MEMORY_GET, callers may pass *nr_entries == 0 and + * claim_set == NULL to query the number of records needed. In that case the + * call fails with ERANGE and updates *nr_entries with the required count. + */ +int xc_domain_claim_memory(xc_interface *xch, uint32_t domid, uint32_t mode, + uint32_t *nr_entries, + xen_memory_claim_t *claim_set); + #if defined(__arm__) || defined(__aarch64__) int xc_dt_overlay(xc_interface *xch, void *overlay_fdt, uint32_t overlay_fdt_size, uint8_t overlay_op); diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 01c0669c8863..f78e085dd700 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1070,6 +1070,34 @@ int xc_domain_remove_from_physmap(xc_interface *xch, return xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp)); } +/* Set or get memory claims for a domain. */ +int xc_domain_claim_memory(xc_interface *xch, uint32_t domid, uint32_t mode, + uint32_t *nr_entries, xen_memory_claim_t *claim_set) +{ + struct xen_domctl domctl = {}; + DECLARE_HYPERCALL_BOUNCE(claim_set, *nr_entries * sizeof(*claim_set), + XC_HYPERCALL_BUFFER_BOUNCE_BOTH); + int ret; + + if ( xc_hypercall_bounce_pre(xch, claim_set) ) + return -1; + + domctl.cmd = XEN_DOMCTL_claim_memory; + domctl.domain = domid; + domctl.u.claim_memory.mode = mode; + domctl.u.claim_memory.nr_entries = *nr_entries; + set_xen_guest_handle(domctl.u.claim_memory.claim_set, claim_set); + + ret = do_domctl(xch, &domctl); + + *nr_entries = domctl.u.claim_memory.nr_entries; + + xc_hypercall_bounce_post(xch, claim_set); + + return ret; +} + +/* XENMEM_claim_pages is deprecated; use xc_domain_claim_memory() instead. */ int xc_domain_claim_pages(xc_interface *xch, uint32_t domid, unsigned long nr_pages) diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..8cb4241b0511 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1319,7 +1319,10 @@ int domain_kill(struct domain *d) rspin_barrier(&d->domain_lock); argo_destroy(d); vnuma_destroy(d->vnuma); - domain_set_outstanding_pages(d, 0); + /* Release all outstanding claims of the domain. */ + domain_set_claim_entries(d, 1, &(xen_memory_claim_t){ + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 0, + }); /* fallthrough */ case DOMDYING_dying: rc = domain_teardown(d); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..391f256f013c 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -51,6 +51,57 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nodemask, MAX_NUMNODES); } +/* Set or get memory claims for a domain. */ +static int claim_memory(struct domain *d, + struct xen_domctl_claim_memory *uinfo, bool *copyback) +{ + xen_memory_claim_t *entries; + int rc = -EFAULT; + + /* Reject LLC coloring; alloc_color_heap_page() does not handle claims. */ + if ( llc_coloring_enabled ) + return -EOPNOTSUPP; + + switch ( uinfo->mode ) + { + case XEN_DOMCTL_CLAIM_MEMORY_SET: + if ( !uinfo->nr_entries ) + return -EINVAL; + if ( uinfo->nr_entries > MAX_NUMNODES + 1 ) + return -E2BIG; + break; + case XEN_DOMCTL_CLAIM_MEMORY_GET: + if ( uinfo->nr_entries > MAX_NUMNODES + 1 ) + uinfo->nr_entries = MAX_NUMNODES + 1; + break; + default: + return -EOPNOTSUPP; + } + if ( d->is_dying ) + return -ESRCH; + + entries = xmalloc_array(xen_memory_claim_t, uinfo->nr_entries); + if ( entries == NULL ) + return -ENOMEM; + + switch ( uinfo->mode ) + { + case XEN_DOMCTL_CLAIM_MEMORY_SET: + if ( !copy_from_guest(entries, uinfo->claim_set, uinfo->nr_entries) ) + rc = domain_set_claim_entries(d, uinfo->nr_entries, entries); + break; + case XEN_DOMCTL_CLAIM_MEMORY_GET: + rc = domain_get_claim_entries(d, &uinfo->nr_entries, entries); + *copyback = true; + if ( !rc && copy_to_guest(uinfo->claim_set, entries, + uinfo->nr_entries) ) + rc = -EFAULT; + break; + } + xfree(entries); + return rc; +} + void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) { struct vcpu *v; @@ -865,6 +916,12 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) copyback = true; break; + case XEN_DOMCTL_claim_memory: + ret = xsm_claim_pages(XSM_PRIV, d); + if ( !ret ) + ret = claim_memory(d, &op->u.claim_memory, ©back); + break; + default: ret = arch_do_domctl(op, d, u_domctl); break; diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..d7515da28fe3 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1805,7 +1805,10 @@ long do_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) rc = -EINVAL; if ( !rc ) - rc = domain_set_outstanding_pages(d, reservation.nr_extents); + rc = domain_set_claim_entries(d, 1, &(xen_memory_claim_t){ + .target = XEN_DOMCTL_CLAIM_MEMORY_LEGACY, + .pages = reservation.nr_extents, + }); rcu_unlock_domain(d); diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 7e17bafa1e45..46c01a9fca2a 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -477,6 +477,11 @@ mfn_t __init alloc_boot_pages(unsigned long nr_pfns, unsigned long pfn_align) #define page_to_zone(pg) (is_xen_heap_page(pg) ? MEMZONE_XEN : \ (flsl(mfn_x(page_to_mfn(pg))) ? : 1)) +/* + * The heap, page, and claim counters below, and all claim counters + * in struct domain, are protected by heap_lock. The lock order with + * d->page_alloc_lock is d->page_alloc_lock first, then heap_lock. + */ typedef struct page_list_head heap_by_zone_and_order_t[NR_ZONES][MAX_ORDER+1]; static heap_by_zone_and_order_t *_heap[MAX_NUMNODES]; #define heap(node, zone, order) ((*_heap[node])[zone][order]) @@ -491,6 +496,9 @@ static DEFINE_SPINLOCK(heap_lock); /* Total outstanding claims by all domains */ static unsigned long outstanding_claims; +/* Sum of the outstanding claims of all domains per node */ +static unsigned long claimed_pages[MAX_NUMNODES]; + static unsigned long avail_heap_pages( unsigned int zone_lo, unsigned int zone_hi, unsigned int node) { @@ -520,67 +528,6 @@ unsigned long domain_adjust_tot_pages(struct domain *d, long pages) return d->tot_pages; } -int domain_set_outstanding_pages(struct domain *d, unsigned long pages) -{ - int ret = -ENOMEM; - unsigned long claim, avail_pages; - - /* - * Two locks are needed here: - * - d->page_alloc_lock: protects accesses to d->{tot,max,extra}_pages. - * - heap_lock: protects accesses to d->outstanding_pages, total_avail_pages - * and outstanding_claims. - */ - nrspin_lock(&d->page_alloc_lock); - spin_lock(&heap_lock); - - /* pages==0 means "unset" the claim. */ - if ( pages == 0 ) - { - outstanding_claims -= d->outstanding_pages; - d->outstanding_pages = 0; - ret = 0; - goto out; - } - - /* only one active claim per domain please */ - if ( d->outstanding_pages ) - { - ret = -EINVAL; - goto out; - } - - /* disallow a claim not exceeding domain_tot_pages() or above max_pages */ - if ( (pages <= domain_tot_pages(d)) || (pages > d->max_pages) ) - { - ret = -EINVAL; - goto out; - } - - /* how much memory is available? */ - avail_pages = total_avail_pages; - - avail_pages -= outstanding_claims; - - /* - * Note, if domain has already allocated memory before making a claim - * then the claim must take domain_tot_pages() into account - */ - claim = pages - domain_tot_pages(d); - if ( claim > avail_pages ) - goto out; - - /* yay, claim fits in available memory, stake the claim, success! */ - d->outstanding_pages = claim; - outstanding_claims += d->outstanding_pages; - ret = 0; - -out: - spin_unlock(&heap_lock); - nrspin_unlock(&d->page_alloc_lock); - return ret; -} - #ifdef CONFIG_SYSCTL void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages) { @@ -858,6 +805,253 @@ static void check_and_stop_scrub(struct page_info *head) } } +/* Release claims from the host-wide claims pool of the domain. */ +static unsigned long domain_release_host_claims(struct domain *d, + unsigned long release) +{ + unsigned long host_wide_claims; + + ASSERT(d->outstanding_pages >= d->node_claims); + host_wide_claims = d->outstanding_pages - d->node_claims; + + if ( release > host_wide_claims ) + release = host_wide_claims; + + ASSERT(release <= outstanding_claims); + + outstanding_claims -= release; + d->outstanding_pages -= release; + + return release; +} + +/* Release claims from the node-specific claims pool of the domain. */ +static unsigned long domain_release_node_claims( + struct domain *d, nodeid_t node, unsigned long release) +{ + if ( !d->claims[node] ) + return 0; + + if ( release > d->claims[node] ) + release = d->claims[node]; + + ASSERT(claimed_pages[node] >= release); + ASSERT(d->node_claims >= release); + ASSERT(d->outstanding_pages >= release); + ASSERT(outstanding_claims >= release); + + claimed_pages[node] -= release; + d->claims[node] -= release; + d->node_claims -= release; + d->outstanding_pages -= release; + outstanding_claims -= release; + + return release; +} + +/* + * Recall node-specific claims from a domain until either the specified number + * of pages has been recalled, or all node-specific claims have been exhausted. + */ +static void domain_recall_node_claims(struct domain *d, unsigned long recall) +{ + nodeid_t node; + + /* + * When NUMA node offlining is implemented, it will be responsible for + * recalling or moving claims off a node before offlining it. Therefore, + * offline nodes are not iterated here. + */ + for_each_online_node ( node ) + { + if ( !recall || !d->node_claims ) + break; + recall -= domain_release_node_claims(d, node, recall); + } +} + +/* Get claim entries for the outstanding claims of a domain. */ +int domain_get_claim_entries(struct domain *d, uint32_t *nr_entries, + xen_memory_claim_t *entries) +{ + unsigned int needed_entries = 1, max_entries = *nr_entries; + nodeid_t node; + + /* If max_entries is 0, only the number of needed entries is returned. */ + if ( max_entries ) + { + memset(entries, 0, sizeof(*entries) * max_entries); + entries[0].target = XEN_DOMCTL_CLAIM_MEMORY_HOST; + } + + spin_lock(&heap_lock); + if ( max_entries ) + { + ASSERT(d->outstanding_pages >= d->node_claims); + entries[0].pages = d->outstanding_pages - d->node_claims; + } + + for_each_online_node ( node ) + { + if ( !d->claims[node] ) + continue; + + if ( needed_entries < max_entries ) + { + entries[needed_entries].target = node; + entries[needed_entries].pages = d->claims[node]; + } + needed_entries++; + } + spin_unlock(&heap_lock); + *nr_entries = needed_entries; + return needed_entries <= max_entries ? 0 : -ERANGE; +} + +/* Validate a set of claim records and install it if valid. */ +int domain_set_claim_entries(struct domain *d, uint32_t nr_entries, + const xen_memory_claim_t *claim_set) +{ + uint64_t avail_pages, request, node_requests = 0, host_requests = 0; + nodemask_t nodes; + uint32_t node; + int ret = -EINVAL; + bool host_request_seen = false, legacy_semantics = false; + + /* + * Two locks are needed here: + * - d->page_alloc_lock: protects accesses to d->{tot,max,extra}_pages. + * - heap_lock: protects accesses to total_avail_pages, node_avail_pages, + * avail[], scrub state and all total and node-specific claim counters. + */ + nrspin_lock(&d->page_alloc_lock); + spin_lock(&heap_lock); + + /* + * Phase 1: Check and process the individual claim entries. Check + * the node-specific claim requests, and validate them against the + * available memory. Track legacy and host-wide claim requests and + * prepare validation of the combined claims in Phase 2. + */ + nodes_clear(nodes); + for ( uint32_t i = 0; i < nr_entries; i++ ) + { + node = claim_set[i].target; + request = claim_set[i].pages; + + if ( claim_set[i].cmd ) /* Reserved for possible future use. */ + goto out; + + switch ( node ) + { + case XEN_DOMCTL_CLAIM_MEMORY_LEGACY: + legacy_semantics = true; + fallthrough; + case XEN_DOMCTL_CLAIM_MEMORY_HOST: + if ( host_request_seen ) /* Only one host-wide request allowed. */ + goto out; + + host_request_seen = true; + host_requests = request; + continue; + } + + /* Node-specific claim. */ + if ( node >= MAX_NUMNODES || !node_online(node) ) + { + ret = -ENOENT; /* Node not valid or not online. */ + goto out; + } + + if ( nodemask_test(node, &nodes) ) /* Only one request per node. */ + goto out; + node_set(node, nodes); + + ASSERT(node_avail_pages[node] >= claimed_pages[node]); + avail_pages = node_avail_pages[node] - claimed_pages[node]; + + if ( request > avail_pages + d->claims[node] ) + { + ret = -ENOMEM; /* Request exceeds available memory on node. */ + goto out; + } + node_requests += request; /* The combined total is checked below. */ + } + + /* + * Phase 2: Validate the combined claim set. + * Apply legacy semantics if needed, then check that the total fits + * within d->max_pages and within the available unclaimed heap memory. + * A zero new-claim request is a pure release; skip validation entirely. + */ + if ( legacy_semantics ) + { + if ( node_requests ) + goto out; + + if ( !host_requests ) + goto release_existing; + + /* + * Legacy semantics require the request to exceed the current + * allocation; the request is then reduced by the current allocation. + * Existing outstanding claims are not allowed. + */ + if ( d->outstanding_pages || + host_requests <= domain_tot_pages(d) ) + goto out; + + host_requests -= domain_tot_pages(d); + } + else if ( !host_requests && !node_requests ) + goto release_existing; + + /* Ensure new claims plus domain_tot_pages() fit into d->max_pages. */ + if ( host_requests > d->max_pages || + node_requests > d->max_pages - host_requests || + node_requests + host_requests + domain_tot_pages(d) > d->max_pages ) + goto out; + + /* Ensure new claims fit in the total unclaimed heap memory. */ + ASSERT(total_avail_pages >= outstanding_claims); + if ( node_requests + host_requests > + (total_avail_pages - outstanding_claims) + d->outstanding_pages ) + { + /* New claims would exceed available unclaimed memory. */ + ret = -ENOMEM; + goto out; + } + + release_existing: + /* Phase 3: Remove the old claims before installing the new claims. */ + domain_recall_node_claims(d, d->node_claims); + domain_release_host_claims(d, d->outstanding_pages); + ASSERT(!d->node_claims && !d->outstanding_pages); + + /* Phase 4: Install new node-specific and host-wide claims. */ + d->node_claims = node_requests; + d->outstanding_pages = host_requests + node_requests; + outstanding_claims += d->outstanding_pages; + + /* Phase 5: Install the individual node claims. */ + for ( uint32_t i = 0; i < nr_entries; i++ ) + { + node = claim_set[i].target; + request = claim_set[i].pages; + if ( node >= MAX_NUMNODES ) /* Skip non-node claim targets. */ + continue; + + ASSERT(!d->claims[node]); + d->claims[node] = request; + claimed_pages[node] += request; + } + ret = 0; + out: + spin_unlock(&heap_lock); + nrspin_unlock(&d->page_alloc_lock); + return ret; +} + static struct page_info *get_free_buddy(unsigned int zone_lo, unsigned int zone_hi, unsigned int order, unsigned int memflags, @@ -907,6 +1101,18 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, */ for ( ; ; ) { + unsigned long avail_pages; + + ASSERT(node_avail_pages[node] >= claimed_pages[node]); + avail_pages = node_avail_pages[node] - claimed_pages[node]; + + if ( d && !(memflags & MEMF_no_refcount) ) + avail_pages += d->claims[node]; + + /* Skip this node if memory and claims do not permit this request. */ + if ( avail_pages < (1UL << order) ) + goto next_node; + zone = zone_hi; do { /* Check if target node can support the allocation. */ @@ -936,6 +1142,7 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, } } while ( zone-- > zone_lo ); /* careful: unsigned zone may wrap */ + next_node: if ( (memflags & MEMF_exact_node) && req_node != NUMA_NO_NODE ) return NULL; @@ -1047,13 +1254,13 @@ static struct page_info *alloc_heap_pages( } } - ASSERT(avail[node][zone] >= request); - avail[node][zone] -= request; - ASSERT(total_avail_pages >= request); - total_avail_pages -= request; - ASSERT(node_avail_pages[node] >= request); - node_avail_pages[node] -= request; - + /* + * Ensure the domain's claims are fully redeemed before deducting + * the allocation from the page counters, otherwise the host or the + * node might be left with more claims than available pages. This would + * break the invariants claimed_pages[node] <= node_avail_pages[node] + * and outstanding_claims <= total_avail_pages. + */ if ( d && d->outstanding_pages && !(memflags & MEMF_no_refcount) ) { /* @@ -1071,13 +1278,34 @@ static struct page_info *alloc_heap_pages( * the domain being destroyed before creation is finished. Losing part * of the claim makes no difference. */ - unsigned long outstanding = min(d->outstanding_pages + 0UL, request); + unsigned long redeem = min(d->outstanding_pages + 0UL, request); + + BUG_ON(redeem > outstanding_claims); + + /* Maintain invariant: claimed_pages[node] <= node_avail_pages[node] */ + redeem -= domain_release_node_claims(d, node, redeem); - BUG_ON(outstanding > outstanding_claims); - outstanding_claims -= outstanding; - d->outstanding_pages -= outstanding; + if ( redeem ) + { + /* + * Maintain the invariant outstanding_claims <= total_avail_pages: + * Redeem from the host-wide claims pool and if needed from other + * nodes' claims pools to maintain that outstanding_claims do not + * exceed total_avail_pages after deducting the allocation. + */ + redeem -= domain_release_host_claims(d, redeem); + domain_recall_node_claims(d, redeem); + } } + /* Having redeemed claims, deduct the allocation from the page counters. */ + ASSERT(total_avail_pages >= request); + total_avail_pages -= request; + ASSERT(node_avail_pages[node] >= request); + node_avail_pages[node] -= request; + ASSERT(avail[node][zone] >= request); + avail[node][zone] -= request; + check_low_mem_virq(); if ( d != NULL ) @@ -1166,6 +1394,7 @@ static int reserve_offlined_page(struct page_info *head) unsigned int node = page_to_nid(head); int zone = page_to_zone(head), i, head_order = PFN_ORDER(head), count = 0; struct page_info *cur_head; + struct domain *d; unsigned int cur_order, first_dirty; ASSERT(spin_is_locked(&heap_lock)); @@ -1256,6 +1485,43 @@ static int reserve_offlined_page(struct page_info *head) count++; } + /* Offlining pages may violate claim invariants; restore them if needed. */ + if ( claimed_pages[node] > node_avail_pages[node] || + outstanding_claims > total_avail_pages ) + { + rcu_read_lock(&domlist_read_lock); + + if ( claimed_pages[node] > node_avail_pages[node] ) + { + unsigned long overclaim = claimed_pages[node] - + node_avail_pages[node]; + + for_each_domain ( d ) + { + overclaim -= domain_release_node_claims(d, node, overclaim); + if ( !overclaim ) + break; + } + } + + if ( outstanding_claims > total_avail_pages ) + { + unsigned long overclaim = outstanding_claims - total_avail_pages; + + for_each_domain ( d ) + { + overclaim -= domain_release_host_claims(d, overclaim); + if ( !overclaim ) + break; + } + } + + rcu_read_unlock(&domlist_read_lock); + + ASSERT(claimed_pages[node] <= node_avail_pages[node]); + ASSERT(outstanding_claims <= total_avail_pages); + } + return count; } diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..352d7095c944 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1276,6 +1276,42 @@ struct xen_domctl_get_domain_state { uint64_t unique_id; /* Unique domain identifier. */ }; +struct xen_memory_claim { + uint64_aligned_t pages; /* Number of pages to claim. */ + uint32_t target; /* NUMA node or special target constant. */ + uint32_t cmd; /* Reserved, must be zero. */ +}; +typedef struct xen_memory_claim xen_memory_claim_t; +DEFINE_XEN_GUEST_HANDLE(xen_memory_claim_t); + +/* Special claim targets for the target field of xen_memory_claim_t. */ +#define XEN_DOMCTL_CLAIM_MEMORY_HOST 0x80000000U /* Host-wide claims. */ +#define XEN_DOMCTL_CLAIM_MEMORY_LEGACY 0x40000000U /* Legacy semantics. */ + +/* + * XEN_DOMCTL_claim_memory + * + * Install or query a domain memory claim set. A SET operation replaces the + * existing claim set atomically. Claims are redeemed by later allocations to + * the domain. A SET request whose entries all have pages == 0 releases any + * existing claims. + * + * For GET, callers may pass nr_entries == 0 and claim_set == NULL to query the + * number of records needed. Xen returns -ERANGE and updates nr_entries. If the + * supplied array is too small, Xen returns -ERANGE and updates nr_entries + * without copying partial records. + */ +struct xen_domctl_claim_memory { + /* IN/OUT: Array of struct xen_memory_claim. */ + XEN_GUEST_HANDLE_64(xen_memory_claim_t) claim_set; + /* IN/OUT: Number of records in the claim_set array. */ + uint32_t nr_entries; + /* IN: Operation to perform on the claim set (GET or SET). */ + uint32_t mode; +#define XEN_DOMCTL_CLAIM_MEMORY_SET 0U /* Set the claim set for the domain. */ +#define XEN_DOMCTL_CLAIM_MEMORY_GET 1U /* Get the claim set of the domain. */ +}; + struct xen_domctl { /* Stable domctl ops: interface_version is required to be 0. */ uint32_t cmd; @@ -1368,6 +1404,7 @@ struct xen_domctl { #define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_set_llc_colors 89 #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ +#define XEN_DOMCTL_claim_memory 91 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1436,6 +1473,7 @@ struct xen_domctl { #endif struct xen_domctl_set_llc_colors set_llc_colors; struct xen_domctl_get_domain_state get_domain_state; + struct xen_domctl_claim_memory claim_memory; uint8_t pad[128]; } u; }; diff --git a/xen/include/public/memory.h b/xen/include/public/memory.h index bd9fc37b5297..086334af051b 100644 --- a/xen/include/public/memory.h +++ b/xen/include/public/memory.h @@ -569,6 +569,8 @@ DEFINE_XEN_GUEST_HANDLE(xen_mem_sharing_op_t); * for 10, only 7 additional pages are claimed. * * Caller must be privileged or the hypercall fails. + * + * Note: This hypercall is superseded by XEN_DOMCTL_claim_memory. */ #define XENMEM_claim_pages 24 diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b80bec00c124..b3a35c4bc8d6 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -72,6 +72,7 @@ #include struct page_info; +struct xen_memory_claim; extern bool using_static_heap; @@ -131,7 +132,10 @@ int populate_pt_range(unsigned long virt, unsigned long nr_mfns); /* Claim handling */ unsigned long __must_check domain_adjust_tot_pages(struct domain *d, long pages); -int domain_set_outstanding_pages(struct domain *d, unsigned long pages); +int domain_set_claim_entries(struct domain *d, uint32_t nr_entries, + const struct xen_memory_claim *claim_set); +int domain_get_claim_entries(struct domain *d, uint32_t *nr_entries, + struct xen_memory_claim *claim_set); void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages); /* Domain suballocator. These functions are *not* interrupt-safe.*/ diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 00db1da12f21..f671e0c4c7b3 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -419,6 +419,10 @@ struct domain unsigned int xenheap_pages; /* pages allocated from Xen heap */ /* Pages claimed but not possessed, protected by global heap_lock. */ unsigned int outstanding_pages; + unsigned int node_claims; /* Sum of per-node claims. */ + /* Domain objects use dedicated pages, leaving room for per-node claims. */ + unsigned int claims[MAX_NUMNODES]; /* Per-NUMA-node claims. */ + unsigned int max_pages; /* maximum value for domain_tot_pages() */ unsigned int extra_pages; /* pages not included in domain_tot_pages() */ diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd271..9e999ac1ba73 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -651,6 +651,7 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd, /* These have individual XSM hooks (common/domctl.c) */ case XEN_DOMCTL_getdomaininfo: + case XEN_DOMCTL_claim_memory: case XEN_DOMCTL_scheduler_op: case XEN_DOMCTL_irq_permission: case XEN_DOMCTL_iomem_permission: diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index bbb9c117ec4a..e7defa117a16 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -216,6 +216,7 @@ class domain2 # XEN_DOMCTL_scheduler_op with XEN_DOMCTL_SCHEDOP_putinfo setscheduler # XENMEM_claim_pages +# XEN_DOMCTL_claim_memory setclaim # XEN_DOMCTL_cacheflush cacheflush -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:42:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:42:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304175.1577271 (Exim 4.92) (envelope-from ) id 1wLS1P-0004NK-0F; Fri, 08 May 2026 20:42:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304175.1577271; Fri, 08 May 2026 20:42:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS1O-0004ND-To; Fri, 08 May 2026 20:42:06 +0000 Received: by outflank-mailman (input) for mailman id 1304175; Fri, 08 May 2026 20:42:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS1O-0004N7-Fu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:42:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLS1N-003xE7-PW for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:42:05 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4a84-bab6-0a2a0a5309dd-0a2a4509d400-24 for ; Fri, 08 May 2026 22:42:05 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe4a9c-2497-0a2a45090019-a0658309da50-3 for ; Fri, 08 May 2026 22:42:05 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 6A3498245FBA; Fri, 8 May 2026 16:40:59 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Christian Lindig , David Scott , Anthony PERARD , Christian Lindig , Andrew Cooper Subject: [PATCH v7 3/3] tools/ocaml: Add OCaml binding for NUMA claim sets Date: Fri, 8 May 2026 21:27:59 +0100 Message-Id: <10726c7afb43856a1014c6b6e24700442ff8740e.1778272036.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778272925-89775A53-D74062C2/0/0 X-purgate-type: clean X-purgate-size: 4695 Add an OCaml binding for xc_domain_claim_memory(): - tools/ocaml/libs/xc/xenctrl.ml/mli: Add claim record type and domain_claim_memory external. - tools/ocaml/libs/xc/xenctrl_stubs.c: Marshal the OCaml claim array into a xen_memory_claim_t array. Map nodes of -1 to XEN_DOMCTL_CLAIM_MEMORY_HOST for host-wide claims. Acked-by: Christian Lindig Requested-by: Andrew Cooper Signed-off-by: Bernhard Kaindl --- tools/ocaml/libs/xc/xenctrl.ml | 10 ++++++ tools/ocaml/libs/xc/xenctrl.mli | 10 ++++++ tools/ocaml/libs/xc/xenctrl_stubs.c | 50 +++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index 97108b9d861a..8dd0c932e3ee 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -370,6 +370,16 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory() to claim memory for a domain *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for host-wide claims *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version: handle -> version = "stub_xc_version_version" external version_compile_info: handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 9fccb2c2c287..e78ea0dfe6c4 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -297,6 +297,16 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory() to claim memory for a domain *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for host-wide claims *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version : handle -> version = "stub_xc_version_version" external version_compile_info : handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c index c55f73b265b2..e91bebf5a4ed 100644 --- a/tools/ocaml/libs/xc/xenctrl_stubs.c +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c @@ -1435,6 +1435,56 @@ CAMLprim value stub_xc_watchdog(value xch_val, value domid, value timeout) CAMLreturn(Val_int(ret)); } +/* OCaml binding for xc_domain_claim_memory() to claim memory for a domain */ +CAMLprim value stub_xc_domain_claim_memory(value xch_val, value domid, + value claim_set) +{ + CAMLparam3(xch_val, domid, claim_set); + xc_interface *xch = xch_of_val(xch_val); + mlsize_t nr_entries = Wosize_val(claim_set); + uint32_t c_domid = (uint32_t)Int_val(domid); + uint32_t c_nr_entries = (uint32_t)nr_entries; + xen_memory_claim_t *c_claim_set; + + if (!nr_entries) + caml_invalid_argument("domain_claim_memory: claim_set cannot be empty"); + + c_claim_set = calloc(c_nr_entries, sizeof(*c_claim_set)); + if (c_claim_set == NULL) + caml_raise_out_of_memory(); + + /* The entries of the claim_set are claim entries with {pages, node} */ + for (mlsize_t i = 0; i < nr_entries; i++) { + value claim_entry = Field(claim_set, i); + int64_t pages = Int64_val(Field(claim_entry, 0)); + int32_t node = Int32_val(Field(claim_entry, 1)); + + if (pages < 0 || node < -1) { + free(c_claim_set); + caml_invalid_argument("domain_claim_memory: invalid pages or node"); + } + c_claim_set[i] = (xen_memory_claim_t) { + .pages = (uint64_t)pages, + .target = (node == -1) + ? XEN_DOMCTL_CLAIM_MEMORY_HOST + : (uint32_t)node + }; + } + + /* May have to wait for the domctl lock, release the OCaml runtime lock. */ + caml_enter_blocking_section(); + int retval = xc_domain_claim_memory(xch, c_domid, + XEN_DOMCTL_CLAIM_MEMORY_SET, + &c_nr_entries, c_claim_set); + caml_leave_blocking_section(); + + free(c_claim_set); + if (retval < 0) + failwith_xc(xch); + + CAMLreturn(Val_unit); +} + /* * Local variables: * indent-tabs-mode: t -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:49:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:49:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304208.1577281 (Exim 4.92) (envelope-from ) id 1wLS8W-0005As-Nv; Fri, 08 May 2026 20:49:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304208.1577281; Fri, 08 May 2026 20:49:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS8W-0005Al-Kr; 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Fri, 08 May 2026 13:49:24 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> In-Reply-To: From: Mykola Kvach Date: Fri, 8 May 2026 23:49:13 +0300 X-Gm-Features: AVHnY4JUSBzt2DGg28-D9DWL1tOx1SosJsJFoIGEmfYFJ2gyh8R7BFJU-1_31KU Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778273366-4086B938-7669A946/0/0 X-purgate-type: clean X-purgate-size: 11936 On Fri, May 8, 2026 at 5:31=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > >>> +/* Xen suspend. data identifies the domain that initiated suspend. *= / > >>> +static void system_suspend(void *data) > >>> +{ > >>> + int status; > >>> + unsigned long flags; > >>> + struct domain *d =3D (struct domain *)data; > >>> + > >>> + BUG_ON(system_state !=3D SYS_STATE_active); > >>> + > >>> + system_state =3D SYS_STATE_suspend; > >>> + > >>> + printk("Xen suspending...\n"); > >>> + > >>> + freeze_domains(); > >>> + scheduler_disable(); > >>> + > >>> + status =3D can_system_suspend(); > >>> + if ( status ) > >>> + { > >>> + system_state =3D SYS_STATE_resume; > >>> + goto resume_scheduler; > >> > >> When we have an error and we get the resume_scheduler path, we apply b= ack the > >> context of the guest saved previously in do_psci_1_0_system_suspend(),= so am I > >> correct saying the guest won=E2=80=99t get any PSCI error back and we = resume the guest > >> from the guest resume entrypoint? > >> > >> In case, should we have a different path that returns a PSCI error (PS= CI_*) into the guest > >> x0, and skips the context restore? > > > > You are right about the current control flow: once the virtual > > SYSTEM_SUSPEND request has been accepted and the domain has been parked= , a > > later failure in the Xen-wide suspend path resumes the domain through t= he normal > > domain resume path, rather than returning a PSCI error from the origina= l call. > > > > This is intentional in the current design. The virtual PSCI SYSTEM_SUSP= END > > path parks the domain and saves its resume context. The actual Xen-wide= host > > suspend is a separate step that is attempted only after all domains are > > suspended. > > > > So a failure in the later Xen-wide suspend step is treated as an abort = of the > > host suspend attempt after the domain suspend was already accepted. The= domain > > is then resumed through the existing domain resume path, similarly to t= he > > toolstack/xl suspend-resume flow, rather than by re-entering the guest = PSCI > > call path and modifying the saved vCPU context again. > > > > I agree this design is not obvious from the patch. I will clarify the c= ommit > > message and comments. If you or the maintainers think that failures bef= ore the > > physical SYSTEM_SUSPEND call succeeds should be reported back through t= he > > original virtual PSCI call, then this would require a different flow. I= was > > trying to avoid that extra complexity in this series. > > Ok I understand, I=E2=80=99m wondering if inside do_psci_1_0_system_suspe= nd() we could do something > like: > > [=E2=80=A6] > if ( is_control_domain(d) && !other_domains_ready_for_suspend(d) ) > return PSCI_DENIED; Yes. I have reworked this locally and will include it in v9. The control-domain readiness check is now done in the vPSCI SYSTEM_SUSPEND path before building the guest resume context and before calling domain_shutdown(..., SHUTDOWN_suspend), so in that case the call returns PSCI_DENIED early rather than parking the domain first. > > [=E2=80=A6] > > But I=E2=80=99m ok also to only document this behaviour. > > > >>> > >>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > >>> index bd87ec430d..8fb9172186 100644 > >>> --- a/xen/arch/arm/vpsci.c > >>> +++ b/xen/arch/arm/vpsci.c > >>> @@ -5,6 +5,7 @@ > >>> > >>> #include > >>> #include > >>> +#include > >>> #include > >>> #include > >>> #include > >>> @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(registe= r_t epoint, register_t cid) > >>> if ( is_64bit_domain(d) && is_thumb ) > >>> return PSCI_INVALID_ADDRESS; > >>> > >>> - /* SYSTEM_SUSPEND is not supported for the hardware domain yet *= / > >>> - if ( is_hardware_domain(d) ) > >>> + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d)= ) > >>> return PSCI_NOT_SUPPORTED; > >>> > >>> /* Ensure that all CPUs other than the calling one are offline */ > >>> @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(registe= r_t epoint, register_t cid) > >>> "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid= =3D%#"PRIregister"\n", > >>> epoint, cid); > >>> > >>> + if ( is_control_domain(d) ) > >> > >> Why is_control_domain() here and not is_hardware_domain() ? > > > > The use of is_control_domain() is intentional. > > > > The intended model is that Xen-wide host suspend is orchestrated by the > > privileged management/control domain. The control domain coordinates th= e > > toolstack side, asks other domains to enter suspend, and then issues th= e final > > SYSTEM_SUSPEND request to Xen. > > > > This does not have to be the same entity as the hardware domain. If the > > hardware domain is separate, it is one of the domains that the control = domain > > parks before the final host suspend step. > > > > The hwdom-specific checks in this patch have a different purpose: they = avoid > > the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardwa= re > > domain to be parked as part of the suspend sequence. They do not define= the > > policy for who is allowed to trigger Xen-wide host suspend. > > > > That said, this policy may not be optimal for all configurations, espec= ially > > when the control and hardware domain roles are split. I would appreciat= e your > > view, as well as the maintainers' views, on whether the trigger should = remain > > control-domain based, be tied to the hardware domain instead, or be exp= ressed > > through a separate host-suspend capability/helper. > > In the commit message and title I saw HW domain, so maybe the commit shou= ld be updated > to say control domain instead? Yes, that was stale wording from an older version. I have fixed it locally for v9. > > At this point however I=E2=80=99m wondering about this code above: > ``` > if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d) ) > return PSCI_NOT_SUPPORTED; > ``` > and in do_psci_1_0_features(), shouldn=E2=80=99t we use consistently is_c= ontrol_domain()? Yes. I have reworked this locally so the policy is now explicit and consistent. The control domain is the only domain whose SYSTEM_SUSPEND request may drive the Xen-wide host suspend path. For that domain, both PSCI_FEATURES(SYSTEM_SUSPEND) and the real SYSTEM_SUSPEND path now consult the same helper, so the advertised capability and the execution path stay consistent. That helper is an explicit host-suspend capability check: it requires firmware support for PSCI SYSTEM_SUSPEND and it also keeps host suspend disabled when Xen detects a missing suspend/resume path in required host-side components. For a non-control hardware domain, SYSTEM_SUSPEND remains a virtual guest suspend operation and does not by itself trigger Xen-wide host suspend. Other guests keep the existing virtual behaviour as well. > > > > >> > >>> + host_system_suspend(d); > >>> + > >>> return rc; > >>> } > >>> > >>> @@ -290,7 +293,10 @@ static int32_t do_psci_1_0_features(uint32_t psc= i_func_id) > >>> return 0; > >>> case PSCI_1_0_FN32_SYSTEM_SUSPEND: > >>> case PSCI_1_0_FN64_SYSTEM_SUSPEND: > >>> - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPOR= TED : 0; > >>> + if ( IS_ENABLED(CONFIG_SYSTEM_SUSPEND) || > >>> + !is_hardware_domain(current->domain) ) > >> > >> Should this have also the condition that =E2=80=9Cis hardware domain a= nd psci_ver >=3D PSCI_VERSION(1, 0)=E2=80=9D? > >> Otherwise if the host machine doestn=E2=80=99t support PSCI 1.0 we wou= ld return OK here but the call would > >> fail later in call_psci_system_suspend()? > > > > Good point. > > > > I agree that, for the domain allowed to trigger Xen-wide suspend, Xen s= hould > > not advertise SYSTEM_SUSPEND if the host suspend path cannot be used. > > > > I think this should be checked as an explicit host SYSTEM_SUSPEND capab= ility, > > rather than only as psci_ver >=3D PSCI_VERSION(1, 0). The same capabili= ty check > > also needs to be enforced in the actual SYSTEM_SUSPEND handler before p= arking > > the domain, because a caller may invoke SYSTEM_SUSPEND directly without= first > > querying PSCI_FEATURES. > > > > For ordinary guests, the physical PSCI version is not relevant because = they > > cannot trigger host suspend; their SYSTEM_SUSPEND path is virtual. > > > > I will make this consistent in v9: PSCI_FEATURES will advertise SYSTEM_= SUSPEND > > for the host-suspend-triggering domain only when the host SYSTEM_SUSPEN= D backend > > is available, and the actual SYSTEM_SUSPEND path will enforce the same = check. > > ok I have reworked this locally accordingly. Rather than open-coding a psci_ver >=3D PSCI_VERSION(1, 0) test, the new code uses an explicit host SYSTEM_SUSPEND capability predicate. For the control domain, PSCI_FEATURES(SYSTEM_SUSPEND) and the actual SYSTEM_SUSPEND handler now share that same check, so they stay consistent even when host suspend is blocked by firmware capability or by Xen-side runtime suspend/resume limitations. > > >>> > >>> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthr= ough/arm/smmu.c > >>> index 22d306d0cb..45f29ef8ec 100644 > >>> --- a/xen/drivers/passthrough/arm/smmu.c > >>> +++ b/xen/drivers/passthrough/arm/smmu.c > >>> @@ -2947,6 +2947,13 @@ static void arm_smmu_iommu_domain_teardown(str= uct domain *d) > >>> xfree(xen_domain); > >>> } > >>> > >>> +#ifdef CONFIG_SYSTEM_SUSPEND > >>> +static int arm_smmu_suspend(void) > >>> +{ > >>> + return -ENOSYS; > >>> +} > >>> +#endif > >> > >> Maybe we want to gate the feature also to !CONFIG_ARM_SMMU ? I would w= ait for the maintainers > >> view on this. > > > > I feel that gating this strictly on !CONFIG_ARM_SMMU might not be the m= ost > > optimal approach here. > > > > CONFIG_ARM_SMMU is a build-time option and does not mean that an old SM= MUv1/v2 > > device is actually present. Using it would disable system suspend even = on > > platforms where only SMMUv3 is used, because CONFIG_ARM_SMMU is enabled= by > > default for Arm. > > > > The condition should be runtime-based: whether the active/probed IOMMU = devices > > have system suspend/resume support. For the old ARM SMMU driver this is= not > > implemented today, so a platform with an SMMUv1/v2 instance should not = expose > > or attempt host suspend. > > > > I think we should handle this by tracking whether any old ARM SMMUv1/v2= device > > was actually probed, or by adding a generic IOMMU suspend capability ch= eck. Then > > the host suspend availability check can reject system suspend only when= such an > > unsupported IOMMU is present, instead of disabling the feature for all > > Arm builds > > with CONFIG_ARM_SMMU enabled. > > > > I would be interested to hear if you or the maintainers see a better wa= y to > > express this capability. > > ok, let=E2=80=99s address Jan comment now and we can see what the maintai= ners think about this. Ack, thanks. I have already reworked the Jan-related part locally for v9: the control-domain readiness/capability checks now happen in the vPSCI SYSTEM_SUSPEND path before the domain finishes suspend, and PSCI_FEATURES plus the real call now use the same host-suspend capability predicate. I=E2=80=99ll fold that into the next revision, and then we can see what the maintainers prefer for the remaining runtime-gating details. Best regards, Mykola > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:51:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:51:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304214.1577291 (Exim 4.92) (envelope-from ) id 1wLSAq-0006dq-5y; Fri, 08 May 2026 20:51:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304214.1577291; Fri, 08 May 2026 20:51:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSAq-0006dj-0h; Fri, 08 May 2026 20:51:52 +0000 Received: by outflank-mailman (input) for mailman id 1304214; Fri, 08 May 2026 20:51:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSAo-0006dd-W1 for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 13:51:49 -0700 (PDT) MIME-Version: 1.0 References: <02b55a02f329d09c9f8b15d97ca9176b3c33017a.1775125380.git.mykola_kvach@epam.com> <4BFA8CEE-0168-4C14-8B5F-E19E6FD7D747@arm.com> In-Reply-To: <4BFA8CEE-0168-4C14-8B5F-E19E6FD7D747@arm.com> From: Mykola Kvach Date: Fri, 8 May 2026 23:51:37 +0300 X-Gm-Features: AVHnY4IBHwfA-r4Hx63WBO9W13PGwaDdwuvkxW7WBHq8XbIt1kQISSKl2FDYMmA Message-ID: Subject: Re: [PATCH v8 10/13] xen/arm: Resume memory management on Xen resume To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778273510-295783FF-15B33EA2/0/0 X-purgate-type: clean X-purgate-size: 2063 On Fri, May 8, 2026 at 4:28=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > >>> 1 file changed, 24 insertions(+) > >>> > >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > >>> index 72c7b24498..596e960152 100644 > >>> --- a/xen/arch/arm/arm64/head.S > >>> +++ b/xen/arch/arm/arm64/head.S > >>> @@ -561,6 +561,30 @@ END(efi_xen_start) > >>> > >>> #endif /* CONFIG_ARM_EFI */ > >>> > >>> +#ifdef CONFIG_SYSTEM_SUSPEND > >>> + > >>> +FUNC(hyp_resume) > >> > >> I think we should mask all exceptions here: > >> msr DAIFSet, 0xf > >> > >> until we resume correctly the status (VBAR_EL2, etc). > > > > This was discussed in an earlier version: > > > > https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef= 15cb605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com= /#CAGeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com > > > > For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In > > particular, section 5.20.2 says that the caller must observe all the ru= les > > described for CPU_SUSPEND, and section 6.4 explicitly says that the ini= tial > > state rules also apply to SYSTEM_SUSPEND. > > > > For the return Exception level on AArch64, section 6.4.3.3 requires > > SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to = enter > > this resume path with DAIF already masked by PSCI-compliant firmware. > > > > I agree this assumption is not obvious from the code, so I will add a c= omment > > at the resume entry point to document that this path relies on the PSCI= initial > > core configuration requirements. > > Yes please, something along the line of > > /* > * PSCI SYSTEM_SUSPEND follows CPU_SUSPEND initial-state rules. > * On AArch64, firmware must return with SPSR_ELx.DAIF set, so > * PSTATE.DAIF is already masked on entry here. > */ Ack. Best regards, Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:55:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:55:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304225.1577299 (Exim 4.92) (envelope-from ) id 1wLSE3-0007G6-JN; Fri, 08 May 2026 20:55:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304225.1577299; Fri, 08 May 2026 20:55:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSE3-0007Fy-Go; Fri, 08 May 2026 20:55:11 +0000 Received: by outflank-mailman (input) for mailman id 1304225; Fri, 08 May 2026 20:55:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSE1-0007Fr-Qk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:55:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSE1-000AXG-0f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:55:09 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4d03-2eae-0a2a0a5409dd-0a2a45078d66-40 for ; Fri, 08 May 2026 22:55:08 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fe4dac-229c-0a2a45070019-d98c6eacd0de-1 for ; Fri, 08 May 2026 22:55:08 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A79F1C25; Fri, 8 May 2026 13:55:02 -0700 (PDT) Received: from [10.57.35.132] (unknown [10.57.35.132]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B76E33F836; Fri, 8 May 2026 13:55:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778273707; bh=EYkONMkW0IatpZ5QawspWJ7T/VJZH158OZO7NH03taE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=oT/QNC9yXHo4z1ugT7/FLiBNGDpaiDMdHzLuLsLDP/RfnuNDn7+RkOx6fUHYck5WY 4JiTtgOh/rHTuurIlP+VjgGp6OdeXiP8hc2bG238RdglsrJ4AC+VD81LgCQr74gaL9 avbGNpzxwH5AeadHWfiYrYy0idGktRIUI2usTaMk= Message-ID: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Date: Fri, 8 May 2026 22:54:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving To: Juergen Gross , linux-kernel@vger.kernel.org, x86@kernel.org Cc: marmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org References: <20260508143933.493013-1-jgross@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <20260508143933.493013-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778273708-23979C48-DAF182A4/0/0 X-purgate-type: clean X-purgate-size: 2086 On 08/05/2026 16:39, Juergen Gross wrote: > With the support of nested lazy mmu sections it can happen that > arch_enter_lazy_mmu_mode() is being called twice without a call of > arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers > are not disabling preemption when checking for nested lazy mmu > sections. I think this is a correct description of the issue, i.e. potentially we have arch_enter_lazy_mmu_mode() called twice *sequentially*. Therefore I don't think that disabling preemption inside arch_enter_lazy_mmu_mode() is enough - we have a problem with preemption occurring inside lazy_mmu_mode_enable() generally, not necessarily inside arch_enter_lazy_mmu_mode(). Preemption shouldn't matter if commit 291b3abed657 is reverted. AFAICT this is the only easy fix. - Kevin > This is a problem when running as a Xen PV guest, as > xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this > case. > > Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order > not to hurt all other lazy mmu mode users. > > Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") > Signed-off-by: Juergen Gross > --- > arch/x86/xen/mmu_pv.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index c80d0058efd1..3eee5f84f8a7 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) > > static void xen_enter_lazy_mmu(void) > { > - enter_lazy(XEN_LAZY_MMU); > + preempt_disable(); > + if (xen_get_lazy_mode() != XEN_LAZY_MMU) > + enter_lazy(XEN_LAZY_MMU); > + preempt_enable(); > } > > static void xen_flush_lazy_mmu(void) > @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) > { > preempt_disable(); > xen_mc_flush(); > - leave_lazy(XEN_LAZY_MMU); > + if (xen_get_lazy_mode() != XEN_LAZY_NONE) > + leave_lazy(XEN_LAZY_MMU); > preempt_enable(); > } > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:59:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:59:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304233.1577308 (Exim 4.92) (envelope-from ) id 1wLSII-000864-2F; Fri, 08 May 2026 20:59:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304233.1577308; Fri, 08 May 2026 20:59:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSIH-00085x-Va; Fri, 08 May 2026 20:59:33 +0000 Received: by outflank-mailman (input) for mailman id 1304233; Fri, 08 May 2026 20:59:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSIG-00085r-56 for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 13:59:30 -0700 (PDT) MIME-Version: 1.0 References: <02b55a02f329d09c9f8b15d97ca9176b3c33017a.1775125380.git.mykola_kvach@epam.com> <873402ub63.fsf@epam.com> In-Reply-To: <873402ub63.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 23:59:19 +0300 X-Gm-Features: AVHnY4KwmCRNlh-rjvCBDnZlHGwH0fbsH41MPUKe0T4UvNUHB2xg6MnS1t1Edb0 Message-ID: Subject: Re: [PATCH v8 10/13] xen/arm: Resume memory management on Xen resume To: Volodymyr Babchuk Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1778273971-43D7FA53-9522E16B/0/0 X-purgate-type: clean X-purgate-size: 2482 Hi Volodymyr, Thank you for the feedback. On Fri, May 8, 2026 at 1:06=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mykola, > > Mykola Kvach writes: > > > From: Mirela Simonovic > > > > The MMU must be enabled during the resume path before restoring context= , > > as virtual addresses are used to access the saved context data. > > > > I agree with Luca, this patch does not makes sense as is. I don't see > why it should be separated from the rest of the resume path that is > added in the next patch Ack. I'll combine this with the next patch in v9. Best regards, Mykola > > > This patch adds MMU setup during resume by reusing the existing > > enable_secondary_cpu_mm function, which enables data cache and the MMU. > > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > > to init_ttbr (page tables used at runtime). > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no functional changes, just moved commit > > --- > > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > > 1 file changed, 24 insertions(+) > > > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 72c7b24498..596e960152 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -561,6 +561,30 @@ END(efi_xen_start) > > > > #endif /* CONFIG_ARM_EFI */ > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +FUNC(hyp_resume) > > + /* Initialize the UART if earlyprintk has been enabled. */ > > +#ifdef CONFIG_EARLY_PRINTK > > + bl init_uart > > +#endif > > + PRINT_ID("- Xen resuming -\r\n") > > + > > + bl check_cpu_mode > > + bl cpu_init > > + > > + ldr x0, =3Dstart > > + adr x20, start /* x20 :=3D paddr (start) */ > > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > > + ldr lr, =3Dmmu_resumed > > + b enable_secondary_cpu_mm > > + > > +mmu_resumed: > > + b . > > +END(hyp_resume) > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* > > * Local variables: > > * mode: ASM > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 21:23:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:23:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304240.1577317 (Exim 4.92) (envelope-from ) id 1wLSfk-0003ve-SK; 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s=k20201202; t=1778275424; bh=NAKnjKkODxWcV+2m2D9TCncmSNBk1eGzdy/HehPI1mI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=UoRMBodVC/DLgpW2vRuqRK2gDSMAI9m4sdZOHmwJMXDsD/heFcqUTqAxDOdQYl8qx u2M/67qQPq961yiGsCC6Ue05Kl8kPMTpU0gMOOCDhkOJMgxJln1PoAZLLaU0LGYKaR /b8XYdki5J738s4BhiXLKB0JOeDG66wCa1qaWRwewze8m8xQ1OzwumrpqtXMfsSEcL Ag8CreR74efjmvht0yTvpnnEkFdFRAa4CZO2PFo2/wVsgckYbyv4D7wCL7NNgozjeQ MOqs5iE77wFiQwuGYZTOizmO0ipHfsCT9gy5ygdweZSox1pF/KuYy3wK5/MMfvbsv4 Yue7bt5W+IHPA== Date: Fri, 8 May 2026 14:23:43 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jiaqing Zhao cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH] ns16550: add support for WCH CH382 serial adapters In-Reply-To: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> Message-ID: References: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-c1860d/1778275426-B6368DB1-4A47739F/0/0 X-purgate-type: clean X-purgate-size: 2850 On Fri, 8 May 2026, Jiaqing Zhao wrote: > Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.) > CH382 PCIe dual port serial adapter. The CH382 is available in two > variants: > - CH382 2S [1c00:3253]: 2 serial ports > - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port > > This chip uses IO BAR0, base baud rate 115200, ports starting at offset > 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] > > [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html > > Signed-off-by: Jiaqing Zhao WCH has a few PCI vendor IDs, including 0x1c00 and also 0x4348. Linux distinguishes them as PCI_VENDOR_ID_WCHIC = 0x1c00 and PCI_VENDOR_ID_WCHCN = 0x4348. It would probably be better to rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC in this patch. Everything else looks good. > --- > xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 878da27f2e..106ef56316 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -95,6 +95,7 @@ struct ns16550_config { > param_exar_xr17v354, > param_exar_xr17v358, > param_intel_lpss, > + param_wch_ch382, > } param; > }; > @@ -862,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { > .mmio = 1, > .max_ports = 1, > }, > + [param_wch_ch382] = { > + .base_baud = 115200, > + .first_offset = 0xc0, > + .uart_offset = 8, > + .reg_width = 1, > + .fifo_size = 256, > + .lsr_mask = UART_LSR_THRE, > + .bar0 = 1, > + .max_ports = 2, > + }, > }; > > static const struct ns16550_config __initconst uart_config[] = > @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = > .dev_id = 0x7adc, > .param = param_intel_lpss > }, > + /* WCH CH382 2S */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3253, > + .param = param_wch_ch382 > + }, > + /* WCH CH382 2S1P */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3250, > + .param = param_wch_ch382 > + }, > }; > > static int __init > diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h > index 5884a20b8f..b8316d464c 100644 > --- a/xen/include/xen/pci_ids.h > +++ b/xen/include/xen/pci_ids.h > @@ -13,6 +13,8 @@ > > #define PCI_VENDOR_ID_BROADCOM 0x14e4 > > +#define PCI_VENDOR_ID_WCH 0x1c00 > + > #define PCI_VENDOR_ID_INTEL 0x8086 > > #endif /* XEN_PCI_IDS_H */ > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304251.1577344 (Exim 4.92) (envelope-from ) id 1wLSl0-0005C8-1b; Fri, 08 May 2026 21:29:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304251.1577344; Fri, 08 May 2026 21:29:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkz-0005C1-Ts; Fri, 08 May 2026 21:29:13 +0000 Received: by outflank-mailman (input) for mailman id 1304251; Fri, 08 May 2026 21:29:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLSky-0004lM-8S for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkx-00E1Ak-Lx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:11 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5538-bab6-0a2a0a5309dd-0a2a4507b2e6-32 for ; Fri, 08 May 2026 23:29:11 +0200 Received: from [209.85.221.54] (helo=mail-wr1-f54.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a7-229c-0a2a45070019-d155dd36acc1-3 for ; Fri, 08 May 2026 23:29:11 +0200 Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-44e1860558fso1643891f8f.0 for ; Fri, 08 May 2026 14:29:11 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Convert it to being a non-root container. Add checkpolicy as FLASK is an available build option for arm32 under Randconfig testing. Rename the CI jobs to debian-12-arm32-* to follow the naming scheme of all the other CI jobs. No functional change. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein --- .../build/debian/12-arm64v8-arm32.dockerfile | 32 +++++++++++++++++++ .../bookworm-arm64v8-arm32-gcc.dockerfile | 24 -------------- automation/gitlab-ci/build.yaml | 24 +++++++------- automation/gitlab-ci/test.yaml | 14 ++++---- automation/scripts/containerize | 2 +- 5 files changed, 52 insertions(+), 44 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-arm32.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile diff --git a/automation/build/debian/12-arm64v8-arm32.dockerfile b/automation/build/debian/12-arm64v8-arm32.dockerfile new file mode 100644 index 000000000000..a4d70f1111ed --- /dev/null +++ b/automation/build/debian/12-arm64v8-arm32.dockerfile @@ -0,0 +1,32 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- + +RUN <&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32 + - debian-12-arm32-gcc qemu-smoke-dom0less-arm32-gcc-debug: extends: .qemu-arm32 @@ -608,7 +608,7 @@ qemu-smoke-dom0less-arm32-gcc-debug: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-debug-staticmem: extends: .qemu-arm32 @@ -616,7 +616,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug-staticmem + - debian-12-arm32-gcc-debug-staticmem qemu-smoke-dom0less-arm32-gcc-debug-gzip: extends: .qemu-arm32 @@ -624,7 +624,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-gzip: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh gzip 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-without-dom0: extends: .qemu-arm32 @@ -632,7 +632,7 @@ qemu-smoke-dom0less-arm32-gcc-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32 + - debian-12-arm32-gcc qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: extends: .qemu-arm32 @@ -640,7 +640,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-debug-earlyprintk: extends: .qemu-arm32 @@ -648,7 +648,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-earlyprintk: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh earlyprintk 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug-earlyprintk + - debian-12-arm32-gcc-debug-earlyprintk qemu-alpine-x86_64-gcc: extends: .qemu-x86-64 diff --git a/automation/scripts/containerize b/automation/scripts/containerize index ad3e2372703f..ef3b97b65578 100755 --- a/automation/scripts/containerize +++ b/automation/scripts/containerize @@ -38,7 +38,7 @@ case "_${CONTAINER}" in _bookworm|_bookworm-x86_64) CONTAINER="${BASE}/debian:12-x86_64" ;; _trixie-x86_64|_) CONTAINER="${BASE}/debian:13-x86_64" ;; _bookworm-i386|_bookworm-x86_32) CONTAINER="${BASE}/debian:12-x86_32" ;; - _bookworm-arm64v8-arm32-gcc) CONTAINER="${BASE}/debian:bookworm-arm64v8-arm32-gcc" ;; + _bookworm-arm64v8-arm32) CONTAINER="${BASE}/debian:12-arm64v8-arm32" ;; _bookworm-arm64v8) CONTAINER="${BASE}/debian:bookworm-arm64v8" ;; _bookworm-cppcheck) CONTAINER="${BASE}/debian:12-arm64v8-cppcheck" ;; _opensuse-leap|_leap) CONTAINER="${BASE}/opensuse:leap-15.6-x86_64" ;; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304253.1577358 (Exim 4.92) (envelope-from ) id 1wLSl1-0005Sh-KD; Fri, 08 May 2026 21:29:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304253.1577358; Fri, 08 May 2026 21:29:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSl1-0005Re-D8; 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These will be used to remove the export jobs. Switch qemu-arm{32,64} jobs to use this container. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein We should probably wire up some build tests too, but it's too late on a Friday for me to be thinking about that for this posting. --- automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ automation/gitlab-ci/test.yaml | 4 +- automation/scripts/containerize | 1 + 3 files changed, 74 insertions(+), 2 deletions(-) create mode 100644 automation/build/debian/13-arm64v8.dockerfile diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile new file mode 100644 index 000000000000..b9062ee8b443 --- /dev/null +++ b/automation/build/debian/13-arm64v8.dockerfile @@ -0,0 +1,71 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:trixie-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304249.1577325 (Exim 4.92) (envelope-from ) id 1wLSky-0004lW-E9; Fri, 08 May 2026 21:29:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304249.1577325; Fri, 08 May 2026 21:29:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSky-0004lN-Ba; Fri, 08 May 2026 21:29:12 +0000 Received: by outflank-mailman (input) for mailman id 1304249; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkx-0004lB-Gp for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkw-00AvHv-Qk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:10 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5568-e002-0a2a0a5209dd-0a2a45028108-16 for ; Fri, 08 May 2026 23:29:10 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a6-af86-0a2a45020019-d155dd33c191-3 for ; Fri, 08 May 2026 23:29:10 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43eb05b1875so1482956f8f.3 for ; Fri, 08 May 2026 14:29:10 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275749; x=1778880549; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sVmq4etdovYoJDRMA/BMmOvUPNieQX2pyEDBr8hljoM=; b=TDSltpKa2KHPfHE1NkLympPxuOBRljN/VqLXBfUT861kaBBT1x+9IkKL5ngNDvgHdB SXP6bl9rzOlcN6nqQNHSQvu07hs2XP50ypeOF2AS+NLOyL04F24TDgB1icQ7brBwLgKA VJcJrzm6U4LsNyLqktiqJf3mpojSh000nAesk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275749; x=1778880549; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sVmq4etdovYoJDRMA/BMmOvUPNieQX2pyEDBr8hljoM=; b=UXm3GfBH6wxWkymUMxq7tMB8FjYVNT4355GqUgKZVD8LWfyHPkTvJzsJlNCCbRZ1BT mWBqomaMJRP2u1rd0CAZh/6Mqf7/QJjnHwak87G6a8YUq7bynMDmkYKE7dUqZrb5Lyov 5sXAleuD07i2PL7sUc4Pm6clip80aml7CtANwtjkf+dMeoFfvQ8tLAwwibdfVgSsp3yl mmwBIUOhRIyMYeAHD4b2Yfy2ZwSUlwShutBjiqx27RjbMakipxvY8Q2vzM0//0i2dTI/ bcm1e2gQlybTMHVOJDl9D+gG7Eq0IWtwunBFyEGaBP1DzAcGmUKDzniUdZLZtguN0W5u tsAA== X-Gm-Message-State: AOJu0YyVpnLh+TiqBPbBGOEA6B6MSbMdc+hCEwUMcimqF2LqFdJepDnR gvwx6tR6k3cJBRtugJXTXaLplhD627EGHtU5szC3OeZvtGxLc8FZzCkbGaJRUYpCAWUixQh5R7G unJDe7vc= X-Gm-Gg: Acq92OHvvL0TbUwhGjzXEN6HbT51YvXNxEwnl2XLK+OISRm+6HaOecMyVcw1CJXOd2V lSkW8CaPxk3qw33odjwjXFayYLIxGj2SdTUvlV+ElnCrcj9tEjsO356QtKThVBdDqA1IqC4Os0y DPnfE+faKalm+afsw8ptYd+k8IaYswXYP6OWysAtxzepTM3UYa4PlhxINqZbGxzUbfkzRH4AZv0 NeaNa2wxvEKAPYWHeqJyJOWsiXXfGLu9Dko+PNNgnv5+4Apeaew4xCsUekdljEyMamF/HqCANmA 1kcTSMD13Aj7GJ4KderYTpRJuePQZZn3YdMJjgM8KWbxyDxecwJwhi2IgrEFK4CYKOJe+0pFmP7 dqlAu/yyb6JBTXhEre9+QsJ+BoBWuLSITrb0RORjmMa0GUq5852GZgmVZ7jfqW9Xrxwe10WUN7/ Oum3clFXLw18U/w3+2hpgH0+nk47sKt10jvbF/EUcUtwoIvt5iWoiGTaAKJ4vPtiWgMwCTYfOYA k8W X-Received: by 2002:a5d:5d85:0:b0:454:86d:b4d2 with SMTP id ffacd0b85a97d-45689baa9b3mr100523f8f.8.1778275749343; Fri, 08 May 2026 14:29:09 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root Date: Fri, 8 May 2026 22:29:03 +0100 Message-Id: <20260508212907.1643761-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778275750-AB563161-4DC6A5B8/0/0 X-purgate-type: clean X-purgate-size: 2648 The binaries/ directory is a composition from the artefacts, and also used as a working directory for most of the tests. If the very first artefact is from a root container, then the test must also be a root container to use it as a working directory. For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the microcode-x86 artefact as it's the smallest available. This bodge can be removed when all build containers have become non-root. For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate the *-export dependency. This will allow us to change containers to being non-root one at a time, rather than all in one go. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein We should also stop using binaries/ as a working directory for the tests, but that gets very complicated very quickly and I don't have time to do it at this juncture. --- automation/gitlab-ci/test.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8770c523e228..517af1732437 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -15,6 +15,12 @@ - qemu-system-aarch64-6.0.0-arm64-export .arm32-test-needs: &arm32-test-needs + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes + # from a non-root container, and microcode-x86 is the smallest. Remove when + # all build containers have become non-root. + - project: $ARTIFACTS_REPO + job: microcode-x86 + ref: $ARTIFACTS_BRANCH - qemu-system-aarch64-6.0.0-arm32-export .x86-64-test-needs: &x86-64-test-needs @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: script: - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} needs: + - *arm64-test-needs - alpine-3.18-gcc-arm64 - - qemu-system-aarch64-6.0.0-arm64-export qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: extends: .qemu-arm64 script: - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} needs: + - *arm64-test-needs - alpine-3.18-gcc-debug-arm64 - - qemu-system-aarch64-6.0.0-arm64-export qemu-smoke-dom0-arm32-gcc: extends: .qemu-arm32 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304254.1577364 (Exim 4.92) (envelope-from ) id 1wLSl2-0005cE-1f; Fri, 08 May 2026 21:29:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304254.1577364; Fri, 08 May 2026 21:29:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSl1-0005ah-T1; Fri, 08 May 2026 21:29:15 +0000 Received: by outflank-mailman (input) for mailman id 1304254; Fri, 08 May 2026 21:29:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLSl0-0005Gs-GH for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkz-000E8K-Tf for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:13 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5508-5cb7-0a2a0a5109dd-0a2a4508bcd8-36 for ; Fri, 08 May 2026 23:29:13 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a9-63b5-0a2a45080019-d155dd35d1fa-3 for ; Fri, 08 May 2026 23:29:13 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-45297094718so1933598f8f.3 for ; Fri, 08 May 2026 14:29:13 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:12 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275753; x=1778880553; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3pK0KfhDLNVVZ6TWY1JZ97U9wzF5HmGiXTOWuG1PAs8=; b=YW3kIXyVCV8+kHX+dX/5jZATJW7G7uq0dyrX8E73zEn4p2fOeEETk1k4wI8HAIhrPX Rp1GBc4oknSKFIj/fiBOfX0bZhL7yq5tCb0A1/PumjWCN/ABRGG4IocqJkjSyMi+ViZL wKBzeBKiIGeaJbfzPJnBBM+c9oYOGrqzVAwUY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275753; x=1778880553; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3pK0KfhDLNVVZ6TWY1JZ97U9wzF5HmGiXTOWuG1PAs8=; b=dlNSijxEWSRPDiTLlbYPA5FAwwFpjOSd4clmjm0nngbNWb3AbsD54OwXjIO70bqwQg WT0Deys9lxXwIeq4JH+NuIx2fo/mdUID2llbJF/00qhlqFQyW6Un4H/3cjvROj0PoGqE pwbTZB8PwW4CX/qsKW7x/YbLE2riyoLDDWCgEOmwYalhKconig29/irES0VPUQZiBn8X OQt9/ZWFlPooMDWlufxgFRD8ZIQ66DFKM++qW6F1AJMNDjsCWB5sVt1hmvWTuUHPMqeV 81mSSGPqaH46gHa/gbF5BOF6CSTYfQLd+v60wiCsw79/9/qPXTAfi21567zk6ikh1izC jt6A== X-Gm-Message-State: AOJu0YwqcYkRwTMU9/wQBnIHf0SVNGb1YOvsVxJNbjun9NQAKg3JRom4 4EHAcFRnDT5j5NI78vX5c2kpqJvhwKt1lRFAqbhux2lprZAKbBpZyjEFbnQl4Z2mPCcOq3e8vbi uWY98TNU= X-Gm-Gg: Acq92OFzvjrCyTD7wcmF4A2+qn4i7P6kuLewlqw3flIeTLFxURqiqzEwAWwTyq7Fbyv /TKxUkChP06n3WcGqzP3tyJN4TQ/hQB2FHDdK8JuhPeq7EjKfY7XGIKzmuye/J8hFPBT2pl5coC A1pv4FNmmLobzBXkaK+jZX8fBu06IlUmdjsvWel8ahJxuvcVE+Msu5ZvEzgcSDUN03HGhoqDqHE f2mUDwZGKcDFJbz64bJn75eoy/evfJGeQSJh85yyNJtfCvSZOrk63hkCex5N7Kj9rCwXixm8cZ2 Hw29FJbAjMBHJnYxIBhGxj7MDc58RvjkB5yRq306GEBtlZsocAEkPGClL+ywtwFSZK1KWBp1Qg5 0Wp/ssEpQRBvq/8xIY0t0qa2NmKh/jvm1OItJAn/hfu/yCnvHYbWrNae/qyjaNADiqtMfFnG3M5 hdnfetXo+ysnDhBuHYS9sxUhm8i0L5ka80McQHDrfj7yy9qHC7XPxUJO7/DtuuXkabKGLWgKf3l 495MarUsTTkI3g= X-Received: by 2002:a05:6000:2087:b0:451:b1a:a753 with SMTP id ffacd0b85a97d-4515b0572a7mr22726817f8f.6.1778275752521; Fri, 08 May 2026 14:29:12 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 5/5] CI: Switch qemu-arm* jobs to using the distro provided QEMU Date: Fri, 8 May 2026 22:29:07 +0100 Message-Id: <20260508212907.1643761-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778275753-B5F6ADB1-C4C1A11A/10/63158204843 X-purgate-type: spam X-purgate-size: 11153 This removes qemu-system-aarch64-6.0.0-*-export and fixes the outstanding TODOs about efi-virtio.rom, now that the QEMU in use has it's /usr/share/ properly packaged. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein --- automation/gitlab-ci/build.yaml | 33 -------- automation/gitlab-ci/test.yaml | 2 - automation/scripts/include/xtf-arm64 | 7 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 6 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm32.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm64.sh | 6 +- .../6.0.0-arm64v8.dockerfile | 77 ------------------- 8 files changed, 10 insertions(+), 133 deletions(-) delete mode 100644 automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index e50ff6936c5c..be4a038363ac 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -265,39 +265,6 @@ variables: <<: *gcc -## Test artifacts common - -.test-jobs-artifact-common: - stage: build - needs: [] - rules: - - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - when: on_success - -# Arm test artifacts - -qemu-system-aarch64-6.0.0-arm64-export: - extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8 - script: - - mkdir binaries && cp /qemu-system-aarch64 binaries/qemu-system-aarch64 - artifacts: - paths: - - binaries/qemu-system-aarch64 - tags: - - arm64 - -qemu-system-aarch64-6.0.0-arm32-export: - extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8 - script: - - mkdir binaries && cp /qemu-system-arm binaries/qemu-system-arm - artifacts: - paths: - - binaries/qemu-system-arm - tags: - - arm64 - # Jobs below this line # Build jobs needed for tests diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 008deef98d1e..1722800c1541 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -12,7 +12,6 @@ - project: $ARTIFACTS_REPO job: alpine-3.18-arm64-rootfs ref: $ARTIFACTS_BRANCH - - qemu-system-aarch64-6.0.0-arm64-export .arm32-test-needs: &arm32-test-needs # Bodge to ensure binaries/ is non-root. Can be any artefact which comes @@ -21,7 +20,6 @@ - project: $ARTIFACTS_REPO job: microcode-x86 ref: $ARTIFACTS_BRANCH - - qemu-system-aarch64-6.0.0-arm32-export .x86-64-test-needs: &x86-64-test-needs - project: $ARTIFACTS_REPO diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/include/xtf-arm64 index 1a318b7aa0ba..5d851af788a1 100644 --- a/automation/scripts/include/xtf-arm64 +++ b/automation/scripts/include/xtf-arm64 @@ -7,7 +7,7 @@ function xtf_arch_prepare() { export FW_PREFIX="${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}" - export QEMU_PREFIX="${QEMU_PREFIX:-${WORKDIR}/}" + export QEMU_PREFIX="${QEMU_PREFIX:-}" export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen}" export XEN_CMDLINE="${XEN_CMDLINE:-loglvl=all noreboot console_timestamps=boot console=dtuart}" export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-xtf-arm}" @@ -18,9 +18,6 @@ function xtf_arch_prepare() # Perform arch-specific XTF environment setup. function xtf_arch_setup() { - # QEMU looks for "efi-virtio.rom" even if it is unneeded - curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom - # Crude check for local testing if [ ! -d imagebuilder ]; then git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git @@ -47,7 +44,7 @@ EOF cp ${XTF_BINARY} ${WORKDIR}/xtf-test # Generate virt-gicv2.dtb - ${WORKDIR}/qemu-system-aarch64 \ + ${QEMU_PREFIX}qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 \ -machine type=virt \ diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh index 58797f7d30d3..5dc348c71aa9 100755 --- a/automation/scripts/qemu-smoke-dom0-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0-arm32.sh @@ -39,9 +39,7 @@ cp ../zImage ./root find . | cpio -R 0:0 -H newc -o | gzip > ../initrd.gz cd .. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./qemu-system-arm \ +qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ @@ -77,7 +75,7 @@ git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config rm -f ${serial_log} -export TEST_CMD="./qemu-system-arm \ +export TEST_CMD="qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh index 05962bdc0203..1d673f184251 100755 --- a/automation/scripts/qemu-smoke-dom0-arm64.sh +++ b/automation/scripts/qemu-smoke-dom0-arm64.sh @@ -57,9 +57,7 @@ chmod +x etc/local.d/xen.start find . | cpio -R 0:0 -H newc -o | gzip >> ../dom0-rootfs.cpio.gz cd ../.. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./binaries/qemu-system-aarch64 \ +qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt \ -m 2048 -smp 2 -display none \ @@ -90,7 +88,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binaries/conf # Run the test rm -f smoke.serial -export TEST_CMD="./binaries/qemu-system-aarch64 \ +export TEST_CMD="qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt \ -m 2048 -monitor none -serial stdio \ diff --git a/automation/scripts/qemu-smoke-dom0less-arm32.sh b/automation/scripts/qemu-smoke-dom0less-arm32.sh index 627d890a3926..20e43b4f049d 100755 --- a/automation/scripts/qemu-smoke-dom0less-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0less-arm32.sh @@ -78,9 +78,7 @@ chmod +x init find . | cpio -R 0:0 -H newc -o | gzip > ../initrd.gz cd .. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./qemu-system-arm \ +qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ @@ -130,7 +128,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config # Run the test rm -f ${serial_log} -export TEST_CMD="./qemu-system-arm \ +export TEST_CMD="qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh index 05c4a6acbb59..a9e99f1ae392 100755 --- a/automation/scripts/qemu-smoke-dom0less-arm64.sh +++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh @@ -78,9 +78,7 @@ if [[ "${test_variant}" == "gicv3" ]]; then domU_check="echo \"${passed}\"" fi -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./binaries/qemu-system-aarch64 \ +qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt,gic-version=$gic_version \ -m 2048 -smp 2 -display none \ @@ -203,7 +201,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binaries/conf # Run the test rm -f smoke.serial -export TEST_CMD="./binaries/qemu-system-aarch64 \ +export TEST_CMD="qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt,gic-version=$gic_version \ -m 2048 -monitor none -serial stdio \ diff --git a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile b/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile deleted file mode 100644 index e9f5576be7a6..000000000000 --- a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile +++ /dev/null @@ -1,77 +0,0 @@ -# syntax=docker/dockerfile:1 -FROM --platform=linux/arm64/v8 debian:bookworm -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV QEMU_VERSION=6.0.0 -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - curl \ - python3 \ - ninja-build \ - pkg-config \ - libglib2.0-dev \ - libpixman-1-dev \ - && \ - \ - curl -fsSLO https://download.qemu.org/qemu-"$QEMU_VERSION".tar.xz && \ - tar xvJf qemu-"$QEMU_VERSION".tar.xz && \ - cd qemu-"$QEMU_VERSION" && \ - ./configure \ - --target-list=arm-softmmu,aarch64-softmmu \ - --enable-system \ - --disable-blobs \ - --disable-bsd-user \ - --disable-debug-info \ - --disable-glusterfs \ - --disable-gtk \ - --disable-guest-agent \ - --disable-linux-user \ - --disable-sdl \ - --disable-spice \ - --disable-tpm \ - --disable-vhost-net \ - --disable-vhost-scsi \ - --disable-vhost-user \ - --disable-vhost-vsock \ - --disable-virtfs \ - --disable-vnc \ - --disable-werror \ - --disable-xen \ - --disable-safe-stack \ - --disable-libssh \ - --disable-opengl \ - --disable-tools \ - --disable-virglrenderer \ - --disable-stack-protector \ - --disable-containers \ - --disable-replication \ - --disable-cloop \ - --disable-dmg \ - --disable-vvfat \ - --disable-vdi \ - --disable-parallels \ - --disable-qed \ - --disable-bochs \ - --disable-qom-cast-debug \ - --disable-vhost-vdpa \ - --disable-vhost-kernel \ - --disable-qcow1 \ - --disable-live-block-migration \ - && \ - make -j$(nproc) && \ - cp ./build/qemu-system-aarch64 / && \ - cp ./build/qemu-system-arm / && \ - cd /build && \ - rm -rf qemu-"$QEMU_VERSION"* && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304252.1577353 (Exim 4.92) (envelope-from ) id 1wLSl1-0005Q0-8n; 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:10 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275752; x=1778880552; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UxdUfwcXb8ISQulfHsZ5+IBQxfYeU+5dzOWpCcoWqBo=; b=svfHOJtyRIt6foUhLLrmGzGMUWf7nLYydc6CJd3M2mBAlpVLSejt+xuCPekxhUhbfU sIbtHpmuxzn2TnnlTCpd84YXziOptC9Ip5oz3ZQUC0y3Wtmv+m3D921clGi6GNtwH28K bTkx3/nvreo7cqenRc5ISN/Q/2Z/l+e3a45AY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275752; x=1778880552; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UxdUfwcXb8ISQulfHsZ5+IBQxfYeU+5dzOWpCcoWqBo=; b=RX4nrYuz05udJdGFfWbVBYKIfKWY5GTxMFCD6U/2x12YA4vTt8aLrCBavy1zC1xVpy 4TOaUBCTMWutTXT4a7yM8zQAsCbmHgsDfK2ZITmGOMm5w5lz0n+wmYCvQauL2AuGqQbi Tv0PKS56KI9UJJNSqt/CLoWsNq+lVPNW830LNAqyxL4UWmCq/nQVZuFEtplJlFsQ8+JU ybBkt4rW6zh5F19kWNsO7hVtKFgkv67iQosH++kLjrPccZVxnWba0nw5GjmlVZCQhIua J1erBXgDG+ne3JNoCJmcbDURM7W/VkG6zKLZZQCYi4YGkhcnmj91QCC+JSv2B05pX/2A 3x8Q== X-Gm-Message-State: AOJu0YxqDW8B3NgMoEFU8SV6KlJ8JGxBh3L8t38sor26NiyFwuw1bFw7 5qburdkioqsESKvb177z2NwYJLx3wU0dqsMSdl1KST5X144SaP+I8EpakYh/NhGBsEo1klQJYbU KYmua/mY= X-Gm-Gg: Acq92OHYFnHkhjLCC16vyUBVUyphuNPwyxGvwSQpwwUDDSi6T9J+5Zc2O1ITwily+n2 ItdWZ4QwGnWcTMQ3A07zRTswrxejqLznRouU4DXSAVArDWNFfIsnLgx7/S0FqGyQVYZBk5lhIFr 15Q78vXMI9pA1+5F8pQRUHZrfgEvZNvKlcKcMGOlLfVXQTH9JLkSBZWxg3zH6TCdn14UIIF0vBd 4BP7PDddxvKxlx2AmSCRJozP9MNGe118+//eoyFT4fsNwnLY17HrNnnRJMi0310zLHA7Oc8CTMl vYIbaezD7MInqbsz4B3NeM98WAkUBqh840avtsfxNZbFMtIXB4EpbhikQv9Cl/pkuy1XVqVGW6W L7bsyGse1XwSqgaxOOtsorzT0/HcMAXszfznGXiB7VtJnMSB+Jw2OKALCT/BXi23wLbkTu7zlMD hZ/7NKER3+G4u+kDmp9ZOLJbzapAz5rT/+o8myyq2xhOcKpvSCWxRB6QVJSk1tdFDKrnhlW5+nf bX0 X-Received: by 2002:a5d:5683:0:b0:452:a5c3:3e4a with SMTP id ffacd0b85a97d-452a5c33e5amr11336261f8f.2.1778275751316; Fri, 08 May 2026 14:29:11 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 3/5] CI: Refresh the Debian 12 arm64 container Date: Fri, 8 May 2026 22:29:05 +0100 Message-Id: <20260508212907.1643761-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778275752-B7754FF4-8CED085D/10/63158204843 X-purgate-type: spam X-purgate-size: 7184 From: Javi Merino Rework the container to user heredocs for readability, derive from bookworm-slim and use apt-get --no-install-recommends to keep the size down. Additionally: * Make it a non-root container. * Drop libext2fs-dev which is an x86-only dependency. * Add libncurses5-dev for xentop and zlib1g-dev which was missing from the libxenguest decompressors. * As there's no ninja, the container can no loger build QEMU so drop libglib2.0-dev and libpixman-1-dev too. * Swap libyajl-dev for libjson-c-dev given the latters deprecation. Rename the job to debian-12-arm64-* to follow the naming scheme of all the other CI jobs. This reduces the size of the debian:12-arm64v8 from 2.25GB down to 1.62GB. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein Depends on "[PATCH] tools/libxl: Fix libxl_nocpuid.c build with json-c" submitted separately. --- automation/build/debian/12-arm64v8.dockerfile | 69 +++++++++++++++++++ .../build/debian/bookworm-arm64v8.dockerfile | 55 --------------- automation/gitlab-ci/build.yaml | 8 +-- automation/gitlab-ci/test.yaml | 4 +- automation/scripts/containerize | 2 +- 5 files changed, 76 insertions(+), 62 deletions(-) create mode 100644 automation/build/debian/12-arm64v8.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8.dockerfile diff --git a/automation/build/debian/12-arm64v8.dockerfile b/automation/build/debian/12-arm64v8.dockerfile new file mode 100644 index 000000000000..c0e08a010f6a --- /dev/null +++ b/automation/build/debian/12-arm64v8.dockerfile @@ -0,0 +1,69 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304250.1577330 (Exim 4.92) (envelope-from ) id 1wLSky-0004oa-Mi; Fri, 08 May 2026 21:29:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304250.1577330; Fri, 08 May 2026 21:29:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSky-0004oJ-Iu; Fri, 08 May 2026 21:29:12 +0000 Received: by outflank-mailman (input) for mailman id 1304250; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkx-0004lA-G4 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkw-000E8K-Ke for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:10 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5568-5cb7-0a2a0a5109dd-0a2a4504d398-24 for ; Fri, 08 May 2026 23:29:10 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a6-1dec-0a2a45040019-d155dd34d4e1-3 for ; Fri, 08 May 2026 23:29:10 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso1423792f8f.0 for ; Fri, 08 May 2026 14:29:10 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:08 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275749; x=1778880549; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=N7PhNq5m+H+OFW/x+gihCJ9/fpAKXYUtHMB+rax9vss=; b=FM0OR8FR30opGqMsRAySRLXdL3J383mB8ntp6Aq16juqWua3Lt52+pLRJg75yBiAul 4Hhf6CTbFe90wc58cYfOXgx5Q+bzLg6rffRyDQy3Cd4Zyo+jmmCJJKeW4SttSscND9Zu Bn8swhWr5O63dOp3+e9qcrHd7PnAIAlDc6BzA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275749; x=1778880549; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=N7PhNq5m+H+OFW/x+gihCJ9/fpAKXYUtHMB+rax9vss=; b=gysg0PU+R75rQ48/Z/xaNYeVxO2VoQr/yKjmXoZioI80kWli0Vb9DMVA/m8RN5gP/L PScY8DTmydyz3d9OhIEK1RLWJeONvUEFcF/7iqz1iHJSOBVynRbEEBa/oNacjrvy3sDM HbaKyLQehgjaYeFIzVmYTl7leITxuIAHwl9+N8yILJGMqCxZCvhRcpq0TCDnmpZ7ocj3 +ds8EMKCeqXatC8fploznl2RsJmjKkezW4EVH7Ih34pfJqBujI520uT9J89f4aH2pyRc PlZTfKcbf4hnGj69m10KQw+LiSzMGa7AncfK9PHNUrk8Pu/6HSo4iJDwjgHDdjFodh11 kKxQ== X-Gm-Message-State: AOJu0YzGc19Od86FQtEGPVIoi41bbj3CnihhmXFw9EZp+mFcLAtsdM8E yRwEQfwAMnb3HnmyEhuR8RjX5Os1iKln0zSyoGysLFpntdjeajapKGcV19N4KGA0GTzBcQzPZSF vFb2pQIk= X-Gm-Gg: Acq92OGz7ww1jEURp4rQ9h92/k5ZeNSX6hAkWwnYNvfNnkfmoe4kGXe6CMBlDxA+6b4 awR1ZM0ddK5HP59Q0rFph5bMJ9XTnNXSSUU3FZKwGiUja4rIgVzG2X7tfTb4lNTvc6A9jpEVLDk rfgz6vUQFhZAuaaNnq4HrHWt7qDs1QbSUATp2sSWbQboWeRewsFhCu/61ALHJub9jD6ayU5IZGI dgIIz9lw/N4js1iRJMsc3Af/wcvBv+s/sLx9D1JCoNA/qMBLx/f9BHKKjrsOLcdCsM4Lqk0vFpA NRg7opeAQWUzh4LVM8/ZLqSW5npp8N68EBrpIcbEN3cgYce+psO94bknihUXdLghxJAsbyxkd3O 4mgyw+R4OyH09SZvnxdz6Wo32NH6f4EZIzWB5kdKJYBRFVFPOcRUJB4aVwvISWh3qyVS+mgRB4M 12SVOBML0/xFtyDX8+YnAIJ9DrZhJ5jatBaF1n3oNTazH5TyfwYxgJrx7qUhdc/n64WWKd6E86P fp5 X-Received: by 2002:a05:6000:24ca:b0:449:a07a:967f with SMTP id ffacd0b85a97d-4515cf127cemr23232077f8f.28.1778275748693; Fri, 08 May 2026 14:29:08 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 0/5] CI: Refresh ARM Debian testing Date: Fri, 8 May 2026 22:29:02 +0100 Message-Id: <20260508212907.1643761-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778275750-40B733FF-922BD691/0/0 X-purgate-type: clean X-purgate-size: 2017 Long overdue. Clean up the ARM Debian containers, conforming to the new style and naming schemes, and purge the final *-export jobs. I have already deployed the containers as they're new names and don't collide. I have also checked that the series produces a green pipeline on every commit. Andrew Cooper (3): CI: Adjust test needs[] to ensure binaries/ is non-root CI: Add a Debian 13 (Trixie) arm64 container CI: Switch qemu-arm* jobs to using the distro provided QEMU Javi Merino (2): CI: Refresh the Debian 12 arm32 cross compile container CI: Refresh the Debian 12 arm64 container .../build/debian/12-arm64v8-arm32.dockerfile | 32 ++++++++ automation/build/debian/12-arm64v8.dockerfile | 69 +++++++++++++++++ automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++ .../bookworm-arm64v8-arm32-gcc.dockerfile | 24 ------ .../build/debian/bookworm-arm64v8.dockerfile | 55 ------------- automation/gitlab-ci/build.yaml | 65 ++++------------ automation/gitlab-ci/test.yaml | 30 ++++---- automation/scripts/containerize | 5 +- automation/scripts/include/xtf-arm64 | 7 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 6 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm32.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm64.sh | 6 +- .../6.0.0-arm64v8.dockerfile | 77 ------------------- 14 files changed, 218 insertions(+), 241 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-arm32.dockerfile create mode 100644 automation/build/debian/12-arm64v8.dockerfile create mode 100644 automation/build/debian/13-arm64v8.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8.dockerfile delete mode 100644 automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:44:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:44:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304302.1577379 (Exim 4.92) (envelope-from ) id 1wLT00-00020V-8Q; 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Fri, 08 May 2026 14:44:40 -0700 (PDT) MIME-Version: 1.0 References: <038337ec0e3f1474c6cc6a92090e28c6972e4dc6.1775125380.git.mykola_kvach@epam.com> <6E040BE7-0133-46AE-8B5C-85EA02704285@arm.com> In-Reply-To: <6E040BE7-0133-46AE-8B5C-85EA02704285@arm.com> From: Mykola Kvach Date: Sat, 9 May 2026 00:44:28 +0300 X-Gm-Features: AVHnY4I0Dk2BilN5FXWZwMs1RodiY10g2RcGJNBpEZQCimgeqB7rX_DKU3Xpq9s Message-ID: Subject: Re: [PATCH v8 09/13] arm/smmu-v3: add suspend/resume handlers To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778276681-09969C48-B36CE70F/0/0 X-purgate-type: clean X-purgate-size: 3043 On Fri, May 8, 2026 at 3:22=E2=80=AFPM Luca Fancellu wrote: > > HI Mykola, > > >>> > >>> -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu= ) > >>> +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > >>> { > >>> int ret; > >>> u32 reg, enables; > >>> @@ -2163,17 +2166,9 @@ static int __init arm_smmu_device_reset(struct= arm_smmu_device *smmu) > >>> } > >>> } > >>> > >>> - ret =3D arm_smmu_setup_irqs(smmu); > >>> - if (ret) { > >>> - dev_err(smmu->dev, "failed to setup irqs\n"); > >> > >> We are moving this one to the probe and .. > >> > >>> + ret =3D arm_smmu_enable_irqs(smmu); > >>> + if ( ret ) > >> > >> changing with this one, but arm_smmu_setup_irqs() also calls arm_smmu_= setup_unique_irqs() which > >> calls arm_smmu_setup_msis(), are we sure that on resume we will get th= e same state? > > > > This follows the split introduced in the Linux arm-smmu-v3 runtime/syst= em sleep > > series: > > > > https://lore.kernel.org/linux-iommu/20260414194702.1229094-1-praan@goog= le.com/ > > > > The intent is to keep IRQ handler registration as one-time probe state,= while > > reset/resume only restores the SMMU hardware state and re-enables inter= rupt > > generation. > > > > You are right that the MSI case needs extra care. In the Linux series t= his is > > handled by arm_smmu_resume_msis(), which restores the SMMU-side MSI > > configuration. I did not port that part in this patch because Xen SMMUv= 3 MSI > > support is currently documented as unsupported and is not part of the > > supported/tested path, so this patch only covers the wired IRQ path use= d by Xen > > today. > > > > If Xen SMMUv3 MSI support becomes usable in the future, the resume path= will > > need an equivalent MSI restore step before IRQ_CTRL is re-enabled. > > In the mean time should we check maybe smmu->features doesn=E2=80=99t hav= e > ARM_SMMU_FEAT_MSI flag and document it in commit message? > > What do you think about it? I=E2=80=99m just worried someone uses CONFIG_= MSI and your > feature and ends up in some trouble, while we know that your feature brea= ks > CONFIG_MSI. Good point. I don't think checking only ARM_SMMU_FEAT_MSI in this patch is the right approach, since that reflects hardware capability rather than whether Xen i= s actually using the SMMUv3 MSI IRQ path. For v9, I plan to keep this SMMUv3 patch limited to documenting the current limitation in the driver and in the commit message: the MSI IRQ path is not host-suspend-safe yet because resume does not restore the SMMU *_IRQ_CFGn registers. The actual runtime block will be added in a later host suspend policy patch= , together with the other runtime blockers. That keeps the policy in one plac= e and ensures PSCI_FEATURES(SYSTEM_SUSPEND) stays consistent with the actual SYSTEM_SUSPEND handling. Best regards, Mykola > > Maybe the maintainers can give their opinion here as well. > > Cheers, > Luca From xen-devel-bounces@lists.xenproject.org Fri May 08 21:46:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:46:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304310.1577389 (Exim 4.92) (envelope-from ) id 1wLT1K-0002Ue-Ht; Fri, 08 May 2026 21:46:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304310.1577389; Fri, 08 May 2026 21:46:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT1K-0002UX-FF; Fri, 08 May 2026 21:46:06 +0000 Received: by outflank-mailman (input) for mailman id 1304310; Fri, 08 May 2026 21:46:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT1H-0002UN-QU for xen-devel@lists.xenproject.org; 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> > - unsigned int start, size, chunk, order, memflags; > > + unsigned int start, size, chunk; > > unsigned long flags; > > > > if ( !opt_conring_size ) > > return; > > > > - order = get_order_from_bytes(max(opt_conring_size, conring_size)); > > - memflags = MEMF_bits(crashinfo_maxaddr_bits); > > - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) > > + opt_conring_size = max(opt_conring_size, conring_size); > > + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > > + if ( size != opt_conring_size ) > > { > > - BUG_ON(order == 0); > > - order--; > > + opt_conring_size = size; > > + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", > > + PAGE_SIZE >> 10); > > } > > - opt_conring_size = PAGE_SIZE << order; > > + if ( opt_conring_size >= GB(2) ) > > + { > > + opt_conring_size = GB(2); > > + printk(XENLOG_WARNING "Limiting user-configured console ring size.\n"); > > + } > > + else if ( opt_conring_size < _CONRING_SIZE ) > > + { > > + opt_conring_size = _CONRING_SIZE; > > + printk(XENLOG_WARNING "Using compile-time console ring size.\n"); > > + } > > + > > + /* Contiguous buffer; does not need to be naturally aligned. */ > > + ring = xmalloc_bytes(opt_conring_size); > > I'm sorry, but I'm going to veto any new uses of xmalloc_bytes(). As per the > comment at the top of xvmalloc.h, the family of functions there should be used > in new code. That family deliberately doesn't include a counterpart of > xmalloc_bytes(). You're wanting a multiple of page size anyway, so perhaps it > is warranted here to actually use vmalloc() directly. Thanks for taking a look at the series! Sorry it's been a while, I am getting back to the series only now :-/ Turns out that vmalloc() is not available on MPU systems (*-mpu jobs in CI): CONFIG_HAS_VMAP is disabled. I will switch to xvmalloc-backed allocation, if that's OK. -- Denis From xen-devel-bounces@lists.xenproject.org Fri May 08 21:46:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:46:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304319.1577398 (Exim 4.92) (envelope-from ) id 1wLT2A-00031A-1R; Fri, 08 May 2026 21:46:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304319.1577398; Fri, 08 May 2026 21:46:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT29-000313-Tz; Fri, 08 May 2026 21:46:57 +0000 Received: by outflank-mailman (input) for mailman id 1304319; Fri, 08 May 2026 21:46:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT28-00030q-Dr for xen-devel@lists.xenproject.org; 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The more that, with the original behavior > properly restored in patch 5, it'll be a power-of-2 multiple of PAGE_SIZE > anyway? > > > Also, update the logline reporting the final conring buffer size to report > > bytes instead of kilobytes, since the user-defined size may not necessarily > > be kilobyte-alined. > > Yet making the number harder to grok. > > > Suggested-by: Andrew Cooper > > Having talked to him, I don't think he meant what you're doing here. All he > apparently meant is to stop using alloc_*heap_pages(), which needlessly > supplies order-aligned memory. Thanks, I will drop that patch. -- Denis From xen-devel-bounces@lists.xenproject.org Fri May 08 22:10:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 22:10:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304337.1577406 (Exim 4.92) (envelope-from ) id 1wLTOT-0007NE-Po; Fri, 08 May 2026 22:10:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304337.1577406; Fri, 08 May 2026 22:10:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTOT-0007Mj-MK; Fri, 08 May 2026 22:10:01 +0000 Received: by outflank-mailman (input) for mailman id 1304337; Fri, 08 May 2026 22:10:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTOS-0007Ec-K9 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:10:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLTOS-008ItA-0y for xen-devel@lists.xenproject.org; Sat, 09 May 2026 00:10:00 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5f34-2eae-0a2a0a5409dd-0a2a450c9ac2-4 for ; Sat, 09 May 2026 00:09:59 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe5f36-62f1-0a2a450c0019-ac6904feecee-3 for ; Sat, 09 May 2026 00:09:59 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 28D5860181; Fri, 8 May 2026 22:09:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AB865C2BCB0; Fri, 8 May 2026 22:09:57 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778278197; bh=kHdcgmqC5b2xNkh8ZM37T9xVRgnh1ZpkO/c85/rTw8M=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=VmUyuDEXWQ96wivWfgCTxptNpYwWfn2fwr4uIPSEVD/0d85lkXdPwjm7+fRmJNfvK FIV0WVKd9onTZkRzLq7Upf4sb1Y3pSaK6MR0QS6AC6NnnPyHVgl6CNKH67M+LTlTS4 Il7IeQ5Xbf/2w75qiERGZ+Ba0MjmwnLyf1P1TU+ZTlZnCC7gtLsAIFiYqAvjxlarK7 SaywCoc3aCzcIZHAUOOlm+Lxc6a1RhGO1/TZ8X0Q91d20RxVCAy5UyPa53KduCrUfx xc+csJVJIeplKjmEzdfJhqycu/6pKAufjVVj9I4xyOxnrZ+rtduhh05s8GL2jTjCmt HAyjR9zYAtWzw== Date: Fri, 8 May 2026 15:09:57 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d25034/1778278199-E0D63CF5-3DBB9276/0/0 X-purgate-type: clean X-purgate-size: 3694 On Fri, 8 May 2026, Jan Beulich wrote: > On 07.05.2026 23:44, Stefano Stabellini wrote: > > On Thu, 7 May 2026, Jan Beulich wrote: > >> On 07.05.2026 02:54, Stefano Stabellini wrote: > >>> On Wed, 6 May 2026, Stefano Stabellini wrote: > >>>> On Wed, 6 May 2026, Jan Beulich wrote: > >>>>> When one of the linking passes fails, additional intermediate files are > >>>>> still in place. Having them available for analysis of the underlying > >>>>> problem can be pretty helpful. Collect some into a new intermediates/ > >>>>> directory. (Nothing new will be collected if linking succeeds.) > >>>>> > >>>>> While there also make sure xen-syms is collected (into binaries/). This > >>>>> is rather more useful for analysis of possible problems than its stripped > >>>>> counterpart. > >>>>> > >>>>> Signed-off-by: Jan Beulich > >>>>> --- > >>>>> As the issue this is meant to help with didn't re-occur with this in > >>>>> place, the new logic wasn't really tested yet. > >>>> > >>>> It looks OK but please provide a link to a successful pipeline > >> > >> Well, I had it in use in > >> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 > >> but does that count, when the issue the change is for didn't really occur? > >> For now I can't test the additions without having a way to trigger that > >> symbol table issue (or any other problem at one of the linking stages). > >> Short of artificially breaking things, that is. > > > > Please break it on purpose. Just push to a temporary branch. > > > > > >>>> Reviewed-by: Stefano Stabellini > >> > >> Thanks, but the above wants clarifying first, and the below suggests you > >> actually meant to take back the R-b. > >> > >>> Actually, I see that the build script is run with bash -ex so I wonder > >>> if collect_xen_artefacts would even run if make fails. I think we need: > >>> > >>> trap collect_xen_artefacts EXIT > >> > >> I don't feel comfortable making such a change. Furthermore it's unrelated, > >> as it would mean that on other build failures successfully created final > >> binaries wouldn't be collected either (after all on x86 it may be only one > >> of the two links that failed). Plus then it would likely want doing > >> differently, by making the EXIT hook invoke a new > >> collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered > >> (except for the xen-syms addition there)? > > > > "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain > > the type of change that would be needed to make this work, because as I > > understand it, it does not work now. > > > > From your comment I don't understand if you think that the patch as is > > would work as intended or you agree with my comment that it would not > > work. > > Given the -e passed to bash, I don't expect it to work as is. However, I > question this behavior. Exiting on error may be okay for any of the > preparatory commands, but exiting on failure of make feels dubious [1]. > Hence I'm unsure which way to deal with that aspect (i.e. I'd prefer to > latch the main make's status, collect artifacts, and then exit the > script with make's status). I am OK with your preference. > Somewhat related: Why is it that collect_xen_artefacts is invoked three > times, rather than just once at the very bottom of the script? At which > point it wouldn't even need to be a function. There doesn't seem to be a good reason > Jan > > [1] E.g. a failed tools build may also be easier to analyze if the > already built components (libraries in particular) were collected. > From xen-devel-bounces@lists.xenproject.org Fri May 08 22:11:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 22:11:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304344.1577415 (Exim 4.92) (envelope-from ) id 1wLTPf-0000E0-1l; Fri, 08 May 2026 22:11:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304344.1577415; Fri, 08 May 2026 22:11:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTPe-0000Do-VT; Fri, 08 May 2026 22:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1304344; Fri, 08 May 2026 22:11:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTPd-0000De-LQ for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 15:11:11 -0700 (PDT) MIME-Version: 1.0 References: <5a42b7c32fadf21262b8342f27e685916d0e5812.1775125380.git.mykola_kvach@epam.com> <0BBBB87D-4A54-4378-BC30-4CFAB7553286@arm.com> In-Reply-To: <0BBBB87D-4A54-4378-BC30-4CFAB7553286@arm.com> From: Mykola Kvach Date: Sat, 9 May 2026 01:11:00 +0300 X-Gm-Features: AVHnY4KELghW99FEnZfoYqB5SCXdtGae_3u-LzCWYOF0UcLWMBnXjDQnDLH9bQY Message-ID: Subject: Re: [PATCH v8 05/13] xen/arm: gic-v3: add ITS suspend/resume support To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778278272-B474CFF4-85C35F64/0/0 X-purgate-type: clean X-purgate-size: 3800 On Fri, May 8, 2026 at 2:31=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > On Fri, Apr 24, 2026 at 1:54=E2=80=AFPM Luca Fancellu wrote: > >> > >> Hi Mykola, > >> > >>> On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > >>> > >>> From: Mykola Kvach > >>> > >>> Handle system suspend/resume for GICv3 with an ITS present so LPIs ke= ep > >>> working after firmware powers the GIC down. Snapshot the CPU interfac= e, > >>> distributor and last-CPU redistributor state, > > =E2=80=9CSnapshot the CPU interface, distributor and last-CPU redistribut= or state=E2=80=9D happened in the commit before? Yes, fair point. That wording is too broad for this patch. It describes the wider GICv3 suspend/resume flow in which the ITS handling is invoked, rather than the ITS-specific part added here. The CPU interface, distributor and redistributor handling are covered by the related GICv3 suspend/resume patches, while this patch itself adds the ITS state save/restore. I will tighten the commit message in the next version so it only describes the ITS-specific suspend/resume handling done by this patch. > > >>> disable the ITS to cache its > >>> CTLR/CBASER/BASER registers, then restore everything and re-arm the > >>> collection on resume. > >>> > >>> Add list_for_each_entry_continue_reverse() in list.h for the ITS susp= end > >>> error path that needs to roll back partially saved state. > >>> > >>> Based on Linux commit dba0bc7b76dc ("irqchip/gic-v3-its: Add ability = to save/restore ITS state") > >>> Signed-off-by: Mykola Kvach > >>> --- > [=E2=80=A6] > > > >> > >>> + { > >>> + unsigned int i; > >>> + void __iomem *base =3D its->its_base; > >>> + > >>> + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR); > >>> + ret =3D gicv3_disable_its(its); > >> > >> This is called from system_suspend(), along the path iommu_suspend and > >> console_suspend() are called, finally reaching gic_suspend() and this = one. > >> > >> In the IHI 0069H.b, 5.6.2 Disabling an ITS, it says: > >> =E2=80=9CEnsure that all interrupts that target the ITS that is being = powered down are > >> either redirected or disabled=E2=80=9D, is it correct to assume all th= e ITS targeting source > >> at this point are disabled because domains should be already suspended= ? > > > > Yes, that is the assumption here. > > > > Before Xen reaches this path, each domain must already have entered > > SHUTDOWN_suspend. In other words, the guest OS has already requested > > SYSTEM_SUSPEND only after completing its own suspend flow, so the > > ITS-targeting interrupt sources owned by that OS are expected to be > > quiesced at this point. > > > > So this code relies on the owning OS having disabled or otherwise > > quiesced those sources before issuing SYSTEM_SUSPEND, rather than Xen > > explicitly doing that in gicv3_its_suspend(). > > Ok! I would be for a comment stating this assumption, unless the maintain= ers disagree Ack. Best regards, Mykola > > > > >> > >> > >>> + if ( ret ) > >>> + { > >>> + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > >> > >> here and in the other places we write GITS_CTLR, this reg has Quiescen= t as RO, > >> maybe we should mask the write to only the other bits that are writabl= e? > > > > Yes, this was inherited from the Linux ITS suspend/resume code, which r= estores > > the saved GITS_CTLR value directly. > > > > That said, masking the write to the writable bits is cleaner, and I wil= l do > > that in the next version. > > ok > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304390.1577452 (Exim 4.92) (envelope-from ) id 1wLW0r-00068C-M6; Sat, 09 May 2026 00:57:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304390.1577452; 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Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v5: - fixed memcpy() logic --- xen/drivers/char/console.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 5ab3b0de12d8..5cac87d052b9 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -463,7 +463,8 @@ static void cf_check conring_dump_keyhandler(unsigned char key) void __init console_init_ring(void) { char *ring; - unsigned int i, order, memflags; + XENCONS_RING_IDX i, size; + unsigned int order, memflags; unsigned long flags; if ( !opt_conring_size ) @@ -479,8 +480,22 @@ void __init console_init_ring(void) opt_conring_size = PAGE_SIZE << order; nrspin_lock_irqsave(&console_lock, flags); - for ( i = conringc ; i != conringp; i++ ) - ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; + + i = 0; + size = conringp - conringc; + while ( i < size ) + { + XENCONS_RING_IDX src = (conringc + i) & (conring_size - 1); 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Patch 1 introduces CONRING_CONRING_SHIFT to select compile-time conring buffer size. Patch 2 updates conring{,_size} annotations to __ro_after_init as per [2]. Patch 3 optimizes switch from early conring to permanent conring. Patch 4 update the conring buffer allocation code. [1] Link to v6: https://lore.kernel.org/xen-devel/20260205013606.3384798-1-dmukhin@ford.com/ [2] https://lore.kernel.org/xen-devel/1a5ed8ad-0cc7-4e05-9b9c-cd6930d9b9ea@citrix.com [3] Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2511597097 Denis Mukhin (4): xen/console: make console buffer size configurable xen/console: promote conring{,_size} to __ro_after_init xen/console: use memcpy() in console_init_ring() xen/console: switch conring runtime allocation to xvmalloc docs/misc/xen-command-line.pandoc | 5 +-- xen/drivers/char/Kconfig | 15 ++++++++ xen/drivers/char/console.c | 60 +++++++++++++++++++++++-------- 3 files changed, 63 insertions(+), 17 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304388.1577431 (Exim 4.92) (envelope-from ) id 1wLW0m-0005VK-2t; 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Change the conring integer parameters type to `unsigned int` as required by CODING_STYLE. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin Acked-by: Jan Beulich --- Changes since v5: - used `unsigned int` - added Jan's A-b --- xen/drivers/char/console.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 522b2f489a53..5ab3b0de12d8 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -340,15 +340,15 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) */ /* conring_size: override build-time CONFIG_CONRING_SHIFT setting. */ -static uint32_t __initdata opt_conring_size; +static unsigned int __initdata opt_conring_size; size_param("conring_size", opt_conring_size); #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; -static char *__read_mostly conring = _conring; -static uint32_t __read_mostly conring_size = _CONRING_SIZE; -static uint32_t conringc, conringp; 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it does not need a naturally aligned or physically contiguous allocation. Replace the runtime xenheap allocation in console_init_ring() with an xvmalloc-backed buffer. Also clamp the user-configured ring size to the supported range and emit warnings when the requested size is adjusted. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v5: - switched to xvmalloc_array() - fixed conring size checks - corrected diagnostic messages --- xen/drivers/char/console.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 5cac87d052b9..29b9359468e7 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -33,6 +33,7 @@ #include #include #include +#include #ifdef CONFIG_X86 #include @@ -343,6 +344,7 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) static unsigned int __initdata opt_conring_size; size_param("conring_size", opt_conring_size); +#define CONRING_SIZE_MIN (1U << 14) #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; @@ -464,20 +466,33 @@ void __init console_init_ring(void) { char *ring; XENCONS_RING_IDX i, size; - unsigned int order, memflags; + unsigned int order; unsigned long flags; if ( !opt_conring_size ) return; order = get_order_from_bytes(max(opt_conring_size, conring_size)); - memflags = MEMF_bits(crashinfo_maxaddr_bits); - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) + size = PAGE_SIZE << order; + if ( size != opt_conring_size ) { - BUG_ON(order == 0); - order--; + opt_conring_size = size; + printk(XENLOG_WARNING "Normalizing console ring size.\n"); } - opt_conring_size = PAGE_SIZE << order; + if ( opt_conring_size < CONRING_SIZE_MIN ) + { + opt_conring_size = 0; + printk(XENLOG_WARNING "Ignoring too-small console ring size override.\n"); + return; + } + else if ( opt_conring_size > GB(2) ) + { + opt_conring_size = GB(2); + printk(XENLOG_WARNING "Limiting user-configured console ring size to 2 GiB.\n"); + } + + ring = xvmalloc_array(char, opt_conring_size); + BUG_ON(ring == NULL); nrspin_lock_irqsave(&console_lock, flags); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304389.1577443 (Exim 4.92) (envelope-from ) id 1wLW0n-0005sx-DI; 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The supported range is [14..27] -> [16KiB..128MiB]. Set default to 15 (32 KiB). Resolves: https://gitlab.com/xen-project/xen/-/issues/185 Signed-off-by: Denis Mukhin Reviewed-by: Jason Andryuk --- Changes since v5: - shortened the Kconfig option description - kept Jason's R-b since the change is minimal - just dropping few lines from the Kconfig description --- docs/misc/xen-command-line.pandoc | 5 +++-- xen/drivers/char/Kconfig | 15 +++++++++++++++ xen/drivers/char/console.c | 6 +++--- 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..29393631d885 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -425,10 +425,11 @@ The following are examples of correct specifications: ### conring_size > `= ` -> Default: `conring_size=16k` - Specify the size of the console ring buffer. +The default console ring buffer size is selected at build time via +CONFIG_CONRING_SHIFT setting. + ### console > `= List of [ vga | com1[H,L] | com2[H,L] | pv | dbgp | ehci | xhci | none ]` diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig index 8e49a52c735b..11f48415c12a 100644 --- a/xen/drivers/char/Kconfig +++ b/xen/drivers/char/Kconfig @@ -95,6 +95,21 @@ config SERIAL_TX_BUFSIZE Default value is 32768 (32KiB). +config CONRING_SHIFT + int "Console ring buffer size (power of 2)" + range 14 27 + default 15 + help + Select the boot console ring buffer size as a power of 2. + Run-time console ring buffer size is the same as the boot console ring + buffer size, unless overridden via 'conring_size=' boot parameter. + + 27 => 128 MiB + 26 => 64 MiB + ... + 15 => 32 KiB (default) + 14 => 16 KiB + config XHCI bool "XHCI DbC UART driver" depends on X86 diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index bcd6d261491b..522b2f489a53 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -339,12 +339,12 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) * ******************************************************** */ -/* conring_size: allows a larger console ring than default (16kB). */ +/* conring_size: override build-time CONFIG_CONRING_SHIFT setting. */ static uint32_t __initdata opt_conring_size; size_param("conring_size", opt_conring_size); -#define _CONRING_SIZE 16384 -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) +#define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) +#define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; static char *__read_mostly conring = _conring; static uint32_t __read_mostly conring_size = _CONRING_SIZE; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 05:07:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 05:07:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304451.1577470 (Exim 4.92) (envelope-from ) id 1wLZtz-0005wS-RM; Sat, 09 May 2026 05:06:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304451.1577470; Sat, 09 May 2026 05:06:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLZtz-0005wD-MG; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao --- v2: - Reorder entries ns16550_config to keep it sorted by device ID. - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple vendor ids. xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..cf10a06a3d 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, }; static int __init diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h index 5884a20b8f..15e938225c 100644 --- a/xen/include/xen/pci_ids.h +++ b/xen/include/xen/pci_ids.h @@ -13,6 +13,8 @@ #define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_VENDOR_ID_WCHIC 0x1c00 + #define PCI_VENDOR_ID_INTEL 0x8086 #endif /* XEN_PCI_IDS_H */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 06:32:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 06:32:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304467.1577479 (Exim 4.92) (envelope-from ) id 1wLbEm-0000v1-Ly; Sat, 09 May 2026 06:32:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304467.1577479; Sat, 09 May 2026 06:32:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLbEm-0000uu-Hu; Sat, 09 May 2026 06:32:32 +0000 Received: by outflank-mailman (input) for mailman id 1304467; Sat, 09 May 2026 06:32:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLbEl-0000uo-1i for xen-devel@lists.xenproject.org; Sat, 09 May 2026 06:32:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLbEk-007LIm-Av for xen-devel@lists.xenproject.org; Sat, 09 May 2026 08:32:30 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fed4e3-bab6-0a2a0a5309dd-0a2a4505ca8a-26 for ; Sat, 09 May 2026 08:32:30 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fed4fd-aaa8-0a2a45050019-d155da2bd87b-3 for ; Sat, 09 May 2026 08:32:30 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bcc9fdc959cso4099166b.2 for ; Fri, 08 May 2026 23:32:30 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , xen-devel@lists.xenproject.org References: <20260508143933.493013-1-jgross@suse.com> <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------yQe00ZL7pHPDBzCDdn2c0s4x" X-purgate-ID: tlsNG-c201ff/1778308350-E3B8E443-69F41CA8/0/0 X-purgate-type: clean X-purgate-size: 7999 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------yQe00ZL7pHPDBzCDdn2c0s4x Content-Type: multipart/mixed; boundary="------------ep6tsSF0uwnyPXMR3gMS8gVC"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Kevin Brodsky , linux-kernel@vger.kernel.org, x86@kernel.org Cc: marmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Message-ID: <36fc4317-d7a0-410c-9d95-28858018053c@suse.com> Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving References: <20260508143933.493013-1-jgross@suse.com> <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> In-Reply-To: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> --------------ep6tsSF0uwnyPXMR3gMS8gVC Content-Type: multipart/mixed; boundary="------------m4M3UMd5trYCjNeUTP33zbJF" --------------m4M3UMd5trYCjNeUTP33zbJF Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMDguMDUuMjYgMjI6NTQsIEtldmluIEJyb2Rza3kgd3JvdGU6DQo+IE9uIDA4LzA1LzIw MjYgMTY6MzksIEp1ZXJnZW4gR3Jvc3Mgd3JvdGU6DQo+PiBXaXRoIHRoZSBzdXBwb3J0IG9m IG5lc3RlZCBsYXp5IG1tdSBzZWN0aW9ucyBpdCBjYW4gaGFwcGVuIHRoYXQNCj4+IGFyY2hf ZW50ZXJfbGF6eV9tbXVfbW9kZSgpIGlzIGJlaW5nIGNhbGxlZCB0d2ljZSB3aXRob3V0IGEg Y2FsbCBvZg0KPj4gYXJjaF9sZWF2ZV9sYXp5X21tdV9tb2RlKCkgaW4gYmV0d2VlbiwgYXMg dGhlIGxhenlfbW11XyooKSBoZWxwZXJzDQo+PiBhcmUgbm90IGRpc2FibGluZyBwcmVlbXB0 aW9uIHdoZW4gY2hlY2tpbmcgZm9yIG5lc3RlZCBsYXp5IG1tdQ0KPj4gc2VjdGlvbnMuDQo+ IA0KPiBJIHRoaW5rIHRoaXMgaXMgYSBjb3JyZWN0IGRlc2NyaXB0aW9uIG9mIHRoZSBpc3N1 ZSwgaS5lLiBwb3RlbnRpYWxseSB3ZQ0KPiBoYXZlIGFyY2hfZW50ZXJfbGF6eV9tbXVfbW9k ZSgpIGNhbGxlZCB0d2ljZSAqc2VxdWVudGlhbGx5Ki4gVGhlcmVmb3JlIEkNCj4gZG9uJ3Qg dGhpbmsgdGhhdCBkaXNhYmxpbmcgcHJlZW1wdGlvbiBpbnNpZGUgYXJjaF9lbnRlcl9sYXp5 X21tdV9tb2RlKCkNCj4gaXMgZW5vdWdoIC0gd2UgaGF2ZSBhIHByb2JsZW0gd2l0aCBwcmVl bXB0aW9uIG9jY3VycmluZyBpbnNpZGUNCj4gbGF6eV9tbXVfbW9kZV9lbmFibGUoKSBnZW5l cmFsbHksIG5vdCBuZWNlc3NhcmlseSBpbnNpZGUNCj4gYXJjaF9lbnRlcl9sYXp5X21tdV9t b2RlKCkuDQo+IA0KPiBQcmVlbXB0aW9uIHNob3VsZG4ndCBtYXR0ZXIgaWYgY29tbWl0IDI5 MWIzYWJlZDY1NyBpcyByZXZlcnRlZC4gQUZBSUNUDQo+IHRoaXMgaXMgdGhlIG9ubHkgZWFz eSBmaXguDQpUaGUgZGVzY3JpcHRpb24gd2Fzbid0IHJlYWxseSBjb21wbGV0ZSwgSSB0aGlu ay4NCg0KVGhlIGRvdWJsZSBjYWxsIHdpbGwgb25seSBiZSBwb3NzaWJsZSBpZiBhcmNoX2Vu ZF9jb250ZXh0X3N3aXRjaCgpIGlzDQpjYWxsaW5nIGFyY2hfZW50ZXJfbGF6eV9tbXVfbW9k ZSgpLCBhbmQgdGhpcyBpcyBoYXBwZW5pbmcgZm9yIFhlbiBQViBvbmx5Lg0KYXJjaF9lbmRf Y29udGV4dF9zd2l0Y2goKSBpcyBhIG5vcCBmb3IgYWxsIG90aGVyIGNhc2VzLg0KDQpTbyB0 aGlzIGNhbiBiZSBoYW5kbGVkIGNvbXBsZXRlbHkgaW50ZXJuYWwgb2YgWGVuIChvdGhlcndp c2UgYSByZXZlcnQgb2YNCjI5MWIzYWJlZDY1NyB3b3VsZG4ndCBoZWxwKSwgYW5kIGl0IGlz IGVhc3kgdG8gZG8gc28gYXMgbXkgcGF0Y2ggaXMNCnNob3dpbmcuDQoNCkFzIHNhaWQsIEkn ZCBsaWtlIHRvIGdldCByaWQgb2YgdGhlIGV4dHJhIHRyYWNraW5nIGJ5IFhlbiByZWdhcmRp bmcgbGF6eSBtb2RlLg0KDQoNCkp1ZXJnZW4NCg== --------------m4M3UMd5trYCjNeUTP33zbJF Content-Type: application/pgp-keys; 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dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778312363; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7QYqPOdnppReAVRJ5P/m4/A1UFEhBGpvGj/XUDUfT3M=; b=R2pvFxDKTxTPwfuH259puMRLOPlnQHIJMyxgjmzuSS1auXaAThRDU3b/2jtwW0LgwmM5UC XSU3BMQRQ1l7zMI4BkbsllTH2Z8Rv+Gy/tPAMlNVKI5abCvSy23FPlrzy8Qv3wS03DymgU YgNpqU1yDNps0s09hhVrAYeTgBBk6a4= X-MC-Unique: manh_PZEMKe58UYmNSnICg-1 X-Mimecast-MFC-AGG-ID: manh_PZEMKe58UYmNSnICg_1778312353 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: stefanha@gmail.com, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Jan Kiszka , Peter Maydell , Phil Dennis-Jordan , Richard Henderson , Helge Deller , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Gerd Hoffmann , Mark Cave-Ayland , Samuel Tardieu , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , Laurent Vivier , Thomas Huth , BALATON Zoltan , "Michael S. Tsirkin" , Stefano Garzarella , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Akihiko Odaki , Dmitry Osipenko , Dmitry Fleytman , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Alistair Francis , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org (open list:Musicpal), qemu-ppc@nongnu.org (open list:sam460ex), xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PULL 28/32] ui/console: rename public API to use consistent qemu_console_ prefix Date: Sat, 9 May 2026 11:36:14 +0400 Message-ID: <20260509073621.1011778-29-marcandre.lureau@redhat.com> In-Reply-To: <20260509073621.1011778-1-marcandre.lureau@redhat.com> References: <20260509073621.1011778-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: kE95bF1YTuOMHVChyh3duK1SQH_ovnBpQov2sB9RoBk_1778312353 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778312364-ACE52C54-FD554556/0/0 X-purgate-type: clean X-purgate-size: 111657 From: Marc-André Lureau Rename the display and graphic console public functions to follow a consistent qemu_console_ (or qemu_graphic_console_) naming convention. The previous API used a mix of prefixes: dpy_, graphic_hw_, graphic_console_, console_has_, and update_displaychangelistener(). Unify them under a common qemu_console_ namespace for better discoverability and consistency. The main renames are: - dpy_gfx_*() / dpy_text_*() / dpy_gl_*() → qemu_console_*() - dpy_{get,set}_ui_info() → qemu_console_{get,set}_ui_info() - graphic_hw_*() → qemu_console_hw_*() - graphic_console_*() → qemu_graphic_console_*() - console_has_gl() → qemu_console_has_gl() - update_displaychangelistener() → qemu_console_listener_set_refresh() No functional changes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Marc-André Lureau --- include/ui/console.h | 108 ++++++++++++------------ hw/arm/musicpal.c | 4 +- hw/display/artist.c | 4 +- hw/display/ati.c | 16 ++-- hw/display/bcm2835_fb.c | 5 +- hw/display/bochs-display.c | 14 ++-- hw/display/cg3.c | 6 +- hw/display/cirrus_vga.c | 8 +- hw/display/cirrus_vga_isa.c | 2 +- hw/display/dm163.c | 6 +- hw/display/exynos4210_fimd.c | 4 +- hw/display/g364fb.c | 10 +-- hw/display/jazz_led.c | 8 +- hw/display/macfb.c | 6 +- hw/display/next-fb.c | 4 +- hw/display/omap_lcdc.c | 4 +- hw/display/pl110.c | 4 +- hw/display/qxl-render.c | 12 +-- hw/display/qxl.c | 14 ++-- hw/display/ramfb-standalone.c | 2 +- hw/display/ramfb.c | 4 +- hw/display/sm501.c | 6 +- hw/display/ssd0303.c | 4 +- hw/display/ssd0323.c | 5 +- hw/display/tcx.c | 16 ++-- hw/display/vga-isa.c | 2 +- hw/display/vga-mmio.c | 2 +- hw/display/vga-pci.c | 6 +- hw/display/vga.c | 40 +++++---- hw/display/vhost-user-gpu.c | 22 ++--- hw/display/virtio-gpu-base.c | 2 +- hw/display/virtio-gpu-rutabaga.c | 10 +-- hw/display/virtio-gpu-udmabuf.c | 4 +- hw/display/virtio-gpu-virgl.c | 20 ++--- hw/display/virtio-gpu.c | 26 +++--- hw/display/virtio-vga.c | 2 +- hw/display/vmware_vga.c | 12 +-- hw/display/xenfb.c | 6 +- hw/display/xlnx_dp.c | 10 +-- hw/vfio/display.c | 32 +++---- ui/console-vc.c | 12 +-- ui/console.c | 140 +++++++++++++++---------------- ui/curses.c | 8 +- ui/dbus-console.c | 4 +- ui/dbus-listener.c | 10 +-- ui/egl-headless.c | 4 +- ui/gtk-egl.c | 6 +- ui/gtk-gl-area.c | 6 +- ui/gtk.c | 18 ++-- ui/sdl2-2d.c | 2 +- ui/sdl2-gl.c | 2 +- ui/sdl2.c | 6 +- ui/spice-display.c | 16 ++-- ui/vnc.c | 22 ++--- hw/display/apple-gfx.m | 16 ++-- ui/cocoa.m | 10 +-- 56 files changed, 372 insertions(+), 382 deletions(-) diff --git a/include/ui/console.h b/include/ui/console.h index 69ac7b01b33..cfa940d4c66 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -294,49 +294,49 @@ DisplayState *init_displaystate(void); void qemu_console_register_listener(QemuConsole *con, DisplayChangeListener *dcl, const DisplayChangeListenerOps *ops); -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval); +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval); void qemu_console_unregister_listener(DisplayChangeListener *dcl); -bool dpy_ui_info_supported(const QemuConsole *con); -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con); -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); - -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_gfx_update_full(QemuConsole *con); -void dpy_gfx_replace_surface(QemuConsole *con, - DisplaySurface *surface); -void dpy_text_cursor(QemuConsole *con, int x, int y); -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_text_resize(QemuConsole *con, int w, int h); -void dpy_mouse_set(QemuConsole *con, int x, int y, bool on); -void dpy_cursor_define(QemuConsole *con, QEMUCursor *cursor); -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format); - -void dpy_gl_scanout_disable(QemuConsole *con); -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, bool backing_y_0_top, - uint32_t backing_width, uint32_t backing_height, - uint32_t x, uint32_t y, uint32_t w, uint32_t h, - void *d3d_tex2d); -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y); -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y); -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h); - -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - QEMUGLParams *params); -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); - -bool console_has_gl(QemuConsole *con); +bool qemu_console_ui_info_supported(const QemuConsole *con); +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con); +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); + +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_update_full(QemuConsole *con); +void qemu_console_set_surface(QemuConsole *con, + DisplaySurface *surface); +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y); +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_text_resize(QemuConsole *con, int w, int h); +void qemu_console_set_mouse(QemuConsole *con, int x, int y, bool on); +void qemu_console_set_cursor(QemuConsole *con, QEMUCursor *cursor); +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format); + +void qemu_console_gl_scanout_disable(QemuConsole *con); +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, bool backing_y_0_top, + uint32_t backing_width, uint32_t backing_height, + uint32_t x, uint32_t y, uint32_t w, uint32_t h, + void *d3d_tex2d); +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y); +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y); +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h); + +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *params); +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); + +bool qemu_console_has_gl(QemuConsole *con); enum { GRAPHIC_FLAGS_NONE = 0, @@ -361,19 +361,19 @@ typedef struct GraphicHwOps { void (*gl_block)(void *opaque, bool block); } GraphicHwOps; -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *ops, - void *opaque); -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque); -void graphic_console_close(QemuConsole *con); - -void graphic_hw_update(QemuConsole *con); -void graphic_hw_update_done(QemuConsole *con); -void graphic_hw_invalidate(QemuConsole *con); -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata); -void graphic_hw_gl_block(QemuConsole *con, bool block); +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *ops, + void *opaque); +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque); +void qemu_graphic_console_close(QemuConsole *con); + +void qemu_console_hw_update(QemuConsole *con); +void qemu_console_hw_update_done(QemuConsole *con); +void qemu_console_hw_invalidate(QemuConsole *con); +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata); +void qemu_console_hw_gl_block(QemuConsole *con, bool block); void qemu_console_early_init(void); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index ba88ed756e2..83676eb7fea 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -170,7 +170,7 @@ static bool lcd_refresh(void *opaque) } } - dpy_gfx_update(s->con, 0, 0, 128*3, 64*3); + qemu_console_update(s->con, 0, 0, 128*3, 64*3); return true; } @@ -253,7 +253,7 @@ static const GraphicHwOps musicpal_gfx_ops = { static void musicpal_lcd_realize(DeviceState *dev, Error **errp) { musicpal_lcd_state *s = MUSICPAL_LCD(dev); - s->con = graphic_console_init(dev, 0, &musicpal_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &musicpal_gfx_ops, s); qemu_console_resize(s->con, 128 * 3, 64 * 3); } diff --git a/hw/display/artist.c b/hw/display/artist.c index a07508378c7..288d466ec64 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1324,7 +1324,7 @@ static bool artist_update_display(void *opaque) artist_draw_cursor(s); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->width, last - first + 1); + qemu_console_update(s->con, 0, first, s->width, last - first + 1); } return true; @@ -1424,7 +1424,7 @@ static void artist_realizefn(DeviceState *dev, Error **errp) s->misc_video |= 0x0A000000; s->misc_ctrl |= 0x00800000; - s->con = graphic_console_init(dev, 0, &artist_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &artist_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/ati.c b/hw/display/ati.c index 3a7d45a8820..d77589df67a 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -161,7 +161,7 @@ static void ati_cursor_define(ATIVGAState *s) } cursor_set_mono(s->cursor, s->regs.cur_color1, s->regs.cur_color0, (uint8_t *)&data[64], 1, (uint8_t *)&data[0]); - dpy_cursor_define(s->vga.con, s->cursor); + qemu_console_set_cursor(s->vga.con, s->cursor); } /* Alternatively support guest rendered hardware cursor */ @@ -626,9 +626,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, if (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) { ati_cursor_define(s); } - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, - (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, + (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); } } if ((val & (CRTC2_EXT_DISP_EN | CRTC2_EN)) != @@ -780,8 +780,8 @@ static void ati_mm_write(void *opaque, hwaddr addr, } if (!s->cursor_guest_mode && (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) && !(t & BIT(31))) { - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, true); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, true); } break; } @@ -1094,7 +1094,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) } vga_init(vga, OBJECT(s), pci_address_space(dev), pci_address_space_io(dev), true); - vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, vga); + vga->con = qemu_graphic_console_create(DEVICE(s), 0, s->vga.hw_ops, vga); if (s->cursor_guest_mode) { vga->cursor_invalidate = ati_cursor_invalidate; vga->cursor_draw_line = ati_cursor_draw_line; @@ -1167,7 +1167,7 @@ static void ati_vga_exit(PCIDevice *dev) ATIVGAState *s = ATI_VGA(dev); timer_del(&s->vblank_timer); - graphic_console_close(s->vga.con); + qemu_graphic_console_close(s->vga.con); } static const Property ati_vga_properties[] = { diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 83c4c03c7ca..bd58f625fcd 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -207,8 +207,7 @@ static bool fb_update_display(void *opaque) draw_line_src16, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->config.xres, - last - first + 1); + qemu_console_update(s->con, 0, first, s->config.xres, last - first + 1); } s->invalidate = false; @@ -427,7 +426,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp) bcm2835_fb_reset(dev); - s->con = graphic_console_init(dev, 0, &vgafb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &vgafb_ops, s); qemu_console_resize(s->con, s->config.xres, s->config.yres); } diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 8ef9b76cf85..64e669429c4 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -224,12 +224,12 @@ static bool bochs_display_update(void *opaque) mode.format, mode.stride, ptr + mode.offset); - dpy_gfx_replace_surface(s->con, ds); + qemu_console_set_surface(s->con, ds); full_update = true; } if (full_update) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } else { snap = memory_region_snapshot_and_clear_dirty(&s->vram, mode.offset, mode.size, @@ -243,14 +243,12 @@ static bool bochs_display_update(void *opaque) ys = y; } if (!dirty && ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); ys = -1; } } if (ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); } g_free(snap); @@ -279,7 +277,7 @@ static void bochs_display_realize(PCIDevice *dev, Error **errp) } s->vgamem = pow2ceil(s->vgamem); - s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, &bochs_display_gfx_ops, s); memory_region_init_ram(&s->vram, obj, "bochs-display-vram", s->vgamem, &error_fatal); @@ -344,7 +342,7 @@ static void bochs_display_exit(PCIDevice *dev) { BochsDisplayState *s = BOCHS_DISPLAY(dev); - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); } static const Property bochs_display_properties[] = { diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 963bb3427a6..f9dda1549dd 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -137,7 +137,7 @@ static bool cg3_update_display(void *opaque) } } else { if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } pix += width; @@ -146,7 +146,7 @@ static bool cg3_update_display(void *opaque) } s->full_update = 0; if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { @@ -311,7 +311,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); - s->con = graphic_console_init(dev, 0, &cg3_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &cg3_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 48be3c8a932..0a8c74e1374 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -779,9 +779,9 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) s->cirrus_blt_width, s->cirrus_blt_height); if (notify) { - dpy_gfx_update(s->vga.con, dx, dy, - s->cirrus_blt_width / depth, - s->cirrus_blt_height); + qemu_console_update(s->vga.con, dx, dy, + s->cirrus_blt_width / depth, + s->cirrus_blt_height); } /* we don't have to notify the display that this portion has @@ -2964,7 +2964,7 @@ static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) } cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), pci_address_space_io(dev)); - s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); /* setup PCI */ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000); diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 76034a88605..b8052d1d8ed 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -62,7 +62,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0, isa_address_space(isadev), isa_address_space_io(isadev)); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ diff --git a/hw/display/dm163.c b/hw/display/dm163.c index 9ea62cb4f76..afade0b98c3 100644 --- a/hw/display/dm163.c +++ b/hw/display/dm163.c @@ -277,8 +277,8 @@ static uint32_t *update_display_of_row(DM163State *s, uint32_t *dest, } } - dpy_gfx_update(s->console, 0, LED_SQUARE_SIZE * row, - RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); + qemu_console_update(s->console, 0, LED_SQUARE_SIZE * row, + RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); s->redraw &= ~(1 << row); trace_dm163_redraw(s->redraw); @@ -322,7 +322,7 @@ static void dm163_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, dm163_en_b_gpio_handler, 1); qdev_init_gpio_out_named(dev, &s->sout, "sout", 1); - s->console = graphic_console_init(dev, 0, &dm163_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &dm163_ops, s); qemu_console_resize(s->console, RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, RGB_MATRIX_NUM_ROWS * LED_SQUARE_SIZE); } diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index a91f04aaf79..5133623ee2e 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1340,7 +1340,7 @@ static bool exynos4210_fimd_update(void *opaque) fimd_copy_line_toqemu(global_width, s->ifb + global_width * line * RGBA_SIZE, d + global_width * line * bpp); } - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); } s->invalidate = false; s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND; @@ -1964,7 +1964,7 @@ static void exynos4210_fimd_realize(DeviceState *dev, Error **errp) return; } - s->console = graphic_console_init(dev, 0, &exynos4210_fimd_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &exynos4210_fimd_ops, s); } static void exynos4210_fimd_class_init(ObjectClass *klass, const void *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index bd15f6f0acc..af54f1f9005 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -191,8 +191,8 @@ static void g364fb_draw_graphic8(G364State *s) } else { int dy; if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, - xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, + xmax - xmin + 1, ymax - ymin + 1); xmin = s->width; xmax = 0; ymin = s->height; @@ -211,7 +211,7 @@ static void g364fb_draw_graphic8(G364State *s) done: if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); } g_free(snap); } @@ -234,7 +234,7 @@ static void g364fb_draw_blank(G364State *s) d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->blanked = 1; } @@ -478,7 +478,7 @@ static const GraphicHwOps g364fb_ops = { static void g364fb_init(DeviceState *dev, G364State *s) { - s->con = graphic_console_init(dev, 0, &g364fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &g364fb_ops, s); memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &g364fb_ctrl_ops, s, "ctrl", 0x180000); diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index ee9758a94b5..84fe1058406 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -217,7 +217,7 @@ static bool jazz_led_update_display(void *opaque) } s->state = REDRAW_NONE; - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); return true; } @@ -233,7 +233,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) LedState *s = opaque; char buf[3]; - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); qemu_console_resize(s->con, 2, 1); /* TODO: draw the segments */ @@ -243,7 +243,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) *chardata++ = ATTR2CHTYPE(buf[1], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, 2, 1); + qemu_console_text_update(s->con, 0, 0, 2, 1); } static int jazz_led_post_load(void *opaque, int version_id) @@ -284,7 +284,7 @@ static void jazz_led_realize(DeviceState *dev, Error **errp) { LedState *s = JAZZ_LED(dev); - s->con = graphic_console_init(dev, 0, &jazz_led_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &jazz_led_ops, s); } static void jazz_led_reset(DeviceState *d) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 848c3c282bd..f40a7ed9f52 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -320,14 +320,14 @@ static void macfb_draw_graphic(MacfbState *s) } } else { if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); ymin = -1; } } } if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); } g_free(snap); @@ -671,7 +671,7 @@ static bool macfb_common_realize(DeviceState *dev, MacfbState *s, Error **errp) s->regs[DAFB_MODE_CTRL1 >> 2] = s->mode->mode_ctrl1; s->regs[DAFB_MODE_CTRL2 >> 2] = s->mode->mode_ctrl2; - s->con = graphic_console_init(dev, 0, &macfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &macfb_ops, s); surface = qemu_console_surface(s->con); if (surface_bits_per_pixel(surface) != 32) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index e758b223ef7..fa2e0d0da80 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -89,7 +89,7 @@ static bool nextfb_update(void *opaque) src_width, dest_width, 0, 1, nextfb_draw_line, s, &first, &last); - dpy_gfx_update(s->con, 0, 0, s->cols, s->rows); + qemu_console_update(s->con, 0, 0, s->cols, s->rows); return true; } @@ -117,7 +117,7 @@ static void nextfb_realize(DeviceState *dev, Error **errp) s->cols = 1120; s->rows = 832; - s->con = graphic_console_init(dev, 0, &nextfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &nextfb_ops, s); qemu_console_resize(s->con, s->cols, s->rows); } diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 1e8385ebffb..2a8d5ffdd57 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -320,7 +320,7 @@ static bool omap_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1); + qemu_console_update(omap_lcd->con, 0, first, width, last - first + 1); } omap_lcd->invalidate = 0; @@ -504,7 +504,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100); memory_region_add_subregion(sysmem, base, &s->iomem); - s->con = graphic_console_init(NULL, 0, &omap_ops, s); + s->con = qemu_graphic_console_create(NULL, 0, &omap_ops, s); return s; } diff --git a/hw/display/pl110.c b/hw/display/pl110.c index e134ac28eb6..4a93cf4cda9 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -303,7 +303,7 @@ static bool pl110_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1); + qemu_console_update(s->con, 0, first, s->cols, last - first + 1); } s->invalidate = 0; return true; @@ -557,7 +557,7 @@ static void pl110_realize(DeviceState *dev, Error **errp) s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl110_vblank_interrupt, s); qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1); - s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &pl110_gfx_ops, s); } static void pl110_init(Object *obj) diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c index 5b4f8842011..7b692d5a854 100644 --- a/hw/display/qxl-render.c +++ b/hw/display/qxl-render.c @@ -135,7 +135,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) (width, height); } - dpy_gfx_replace_surface(vga->con, surface); + qemu_console_set_surface(vga->con, surface); } if (!qxl->guest_primary.data) { @@ -154,16 +154,16 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) continue; } qxl_blit(qxl, qxl->dirty+i); - dpy_gfx_update(vga->con, - qxl->dirty[i].left, qxl->dirty[i].top, - qxl->dirty[i].right - qxl->dirty[i].left, - qxl->dirty[i].bottom - qxl->dirty[i].top); + qemu_console_update(vga->con, + qxl->dirty[i].left, qxl->dirty[i].top, + qxl->dirty[i].right - qxl->dirty[i].left, + qxl->dirty[i].bottom - qxl->dirty[i].top); } qxl->num_dirty_rects = 0; end: if (qxl->render_update_cookie_num == 0) { - graphic_hw_update_done(qxl->ssd.dcl.con); + qemu_console_hw_update_done(qxl->ssd.dcl.con); } } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 4244ebe51d2..74258afa582 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1153,13 +1153,13 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) } trace_qxl_enter_vga_mode(d->id); spice_qxl_driver_unload(&d->ssd.qxl); - graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); qemu_spice_create_host_primary(&d->ssd); d->mode = QXL_MODE_VGA; qemu_spice_display_switch(&d->ssd, d->ssd.ds); vga_dirty_log_start(&d->vga); - graphic_hw_update(d->vga.con); + qemu_console_hw_update(d->vga.con); } static void qxl_exit_vga_mode(PCIQXLDevice *d) @@ -1168,8 +1168,8 @@ static void qxl_exit_vga_mode(PCIQXLDevice *d) return; } trace_qxl_exit_vga_mode(d->id); - graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); vga_dirty_log_stop(&d->vga); qxl_destroy_primary(d, QXL_SYNC); } @@ -2237,7 +2237,7 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); qxl->have_vga = true; - vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + vga->con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->id = qemu_console_get_index(vga->con); /* == channel_id */ if (qxl->id != 0) { error_setg(errp, "primary qxl-vga device must be console 0 " @@ -2262,7 +2262,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); - qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->ssd.dcl.con = qxl->vga.con; qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */ diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 27f0ba19f90..8e8ba37514a 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -41,7 +41,7 @@ static void ramfb_realizefn(DeviceState *dev, Error **errp) { RAMFBStandaloneState *ramfb = RAMFB(dev); - ramfb->con = graphic_console_init(dev, 0, &wrapper_ops, dev); + ramfb->con = qemu_graphic_console_create(dev, 0, &wrapper_ops, dev); ramfb->state = ramfb_setup(ramfb->use_legacy_x86_rom, errp); } diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 50c25706a52..7a88f934e11 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -111,12 +111,12 @@ void ramfb_display_update(QemuConsole *con, RAMFBState *s) } if (s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); s->ds = NULL; } /* simple full screen update */ - dpy_gfx_update_full(con); + qemu_console_update_full(con); } static int ramfb_post_load(void *opaque, int version_id) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index a3993ceba29..af870048372 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1822,7 +1822,7 @@ static bool sm501_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } } @@ -1831,7 +1831,7 @@ static bool sm501_update_display(void *opaque) /* complete flush to display */ if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } return true; @@ -1936,7 +1936,7 @@ static void sm501_init(SM501State *s, DeviceState *dev, &s->twoD_engine_region); /* create qemu graphic console */ - s->con = graphic_console_init(dev, 0, &sm501_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &sm501_ops, s); } static const VMStateDescription vmstate_sm501_state = { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 229856cc427..4e3dede33f1 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -268,7 +268,7 @@ static bool ssd0303_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); return true; } @@ -309,7 +309,7 @@ static void ssd0303_realize(DeviceState *dev, Error **errp) { ssd0303_state *s = SSD0303(dev); - s->con = graphic_console_init(dev, 0, &ssd0303_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0303_ops, s); qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY); } diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 67db16086c8..9309d4d10c4 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -270,7 +270,8 @@ static bool ssd0323_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + return true; } @@ -356,7 +357,7 @@ static void ssd0323_realize(SSIPeripheral *d, Error **errp) s->col_end = 63; s->row_end = 79; - s->con = graphic_console_init(dev, 0, &ssd0323_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0323_ops, s); qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY); qdev_init_gpio_in(dev, ssd0323_cd, 1); diff --git a/hw/display/tcx.c b/hw/display/tcx.c index cedbf5c7acd..2c33a9c4a32 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -243,8 +243,7 @@ static bool tcx_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -253,8 +252,7 @@ static bool tcx_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -297,8 +295,7 @@ static bool tcx24_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -309,8 +306,7 @@ static bool tcx24_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -864,9 +860,9 @@ static void tcx_realize(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); if (s->depth == 8) { - s->con = graphic_console_init(dev, 0, &tcx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx_ops, s); } else { - s->con = graphic_console_init(dev, 0, &tcx24_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx24_ops, s); } s->thcmisc = 0; diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 5f55c884a1b..2cccb0ef12e 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -79,7 +79,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) 0x000a0000, vga_io_memory, 1); memory_region_set_coalescing(vga_io_memory); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); memory_region_add_subregion(isa_address_space(isadev), VBE_DISPI_LFB_PHYSICAL_ADDRESS, diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index 1a9608d865f..3cd64951c09 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -108,7 +108,7 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) } sysbus_init_mmio(sbd, &s->vga.vram); - s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(dev, 0, s->vga.hw_ops, &s->vga); } static const Property vga_mmio_properties[] = { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 4e68dd57a17..d089847bdae 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -247,7 +247,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), true); - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* XXX: VGA_RAM_SIZE must be a power of two */ pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); @@ -282,7 +282,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) if (!vga_common_init(s, OBJECT(dev), errp)) { return; } - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* mmio bar */ memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, @@ -306,7 +306,7 @@ static void pci_secondary_vga_exit(PCIDevice *dev) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); memory_region_del_subregion(&d->mmio, &d->mrs[0]); memory_region_del_subregion(&d->mmio, &d->mrs[1]); if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { diff --git a/hw/display/vga.c b/hw/display/vga.c index 2f266f47a39..0ac4bf37310 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1246,7 +1246,7 @@ static void vga_draw_text(VGACommonState *s, int full_update) s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); surface = qemu_console_surface(s->con); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1365,8 +1365,8 @@ static void vga_draw_text(VGACommonState *s, int full_update) ch_attr_ptr++; } if (cx_max != -1) { - dpy_gfx_update(s->con, cx_min * cw, cy * cheight, - (cx_max - cx_min + 1) * cw, cheight); + qemu_console_update(s->con, cx_min * cw, cy * cheight, + (cx_max - cx_min + 1) * cw, cheight); } dest += linesize * cheight; line1 = line + cheight; @@ -1610,7 +1610,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) */ format = qemu_default_pixman_format(depth, !byteswap); if (format) { - allocate_surface = !dpy_gfx_check_format(s->con, format) + allocate_surface = !qemu_console_check_format(s->con, format) || s->force_shadow || force_shadow; } else { allocate_surface = true; @@ -1647,7 +1647,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) surface = qemu_create_displaysurface_from(disp_width, height, format, s->params.line_offset, s->vram_ptr + (s->params.start_addr * 4)); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } else { qemu_console_resize(s->con, disp_width, height); surface = qemu_console_surface(s->con); @@ -1720,8 +1720,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); y_start = -1; } } @@ -1745,8 +1744,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); } g_free(snap); memset(s->invalidated_y_table, 0, sizeof(s->invalidated_y_table)); @@ -1767,7 +1765,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) /* unshare buffer, otherwise the blanking corrupts vga vram */ surface = qemu_create_displaysurface(s->last_scr_width, s->last_scr_height); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } w = s->last_scr_width * surface_bytes_per_pixel(surface); @@ -1776,7 +1774,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) memset(d, 0, w); d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } #define GMODE_TEXT 0 @@ -1967,7 +1965,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->last_scr_width = width * cw; s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1992,11 +1990,11 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) { cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20); if (cursor_visible && cursor_offset < size && cursor_offset >= 0) - dpy_text_cursor(s->con, - TEXTMODE_X(cursor_offset), - TEXTMODE_Y(cursor_offset)); + qemu_console_text_set_cursor(s->con, + TEXTMODE_X(cursor_offset), + TEXTMODE_Y(cursor_offset)); else - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); s->cursor_offset = cursor_offset; s->cursor_start = s->cr[VGA_CRTC_CURSOR_START]; s->cursor_end = s->cr[VGA_CRTC_CURSOR_END]; @@ -2009,7 +2007,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) for (i = 0; i < size; src ++, dst ++, i ++) *dst = VMEM2CHTYPE(le32_to_cpu(*src)); - dpy_text_update(s->con, 0, 0, width, height); + qemu_console_text_update(s->con, 0, 0, width, height); } else { c_max = 0; @@ -2032,7 +2030,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) if (c_min <= c_max) { i = TEXTMODE_Y(c_min); - dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); + qemu_console_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); } } @@ -2057,8 +2055,8 @@ static void vga_update_text(void *opaque, uint32_t *chardata) /* Display a message */ s->last_width = 60; s->last_height = height = 3; - dpy_text_cursor(s->con, -1, -1); - dpy_text_resize(s->con, s->last_width, height); + qemu_console_text_set_cursor(s->con, -1, -1); + qemu_console_text_resize(s->con, s->last_width, height); for (dst = chardata, i = 0; i < s->last_width * height; i ++) *dst++ = ' '; @@ -2070,7 +2068,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) *dst++ = ATTR2CHTYPE(msg_buffer[i], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, s->last_width, height); + qemu_console_text_update(s->con, 0, 0, s->last_width, height); } static uint64_t vga_mem_read(void *opaque, hwaddr addr, diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 3f6fb7a8033..6e5e6540a46 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -142,11 +142,11 @@ vhost_user_gpu_handle_cursor(VhostUserGPU *g, VhostUserGpuMsg *msg) memcpy(s->current_cursor->data, up->data, 64 * 64 * sizeof(uint32_t)); - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); } - dpy_mouse_set(s->con, pos->x, pos->y, - msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); + qemu_console_set_mouse(s->con, pos->x, pos->y, + msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); } static void @@ -238,7 +238,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) con = s->con; if (m->width == 0) { - dpy_gfx_replace_surface(con, NULL); + qemu_console_set_surface(con, NULL); } else { s->ds = qemu_create_displaysurface(m->width, m->height); /* replace surface on next update */ @@ -269,12 +269,12 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) if (dmabuf) { qemu_dmabuf_close(dmabuf); - dpy_gl_release_dmabuf(con, dmabuf); + qemu_console_gl_release_dmabuf(con, dmabuf); g_clear_pointer(&dmabuf, qemu_dmabuf_free); } if (fd == -1) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); g->dmabuf[m->scanout_id] = NULL; break; } @@ -291,7 +291,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) &fd, 1, false, m->fd_flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP); - dpy_gl_scanout_dmabuf(con, dmabuf); + qemu_console_gl_scanout_dmabuf(con, dmabuf); g->dmabuf[m->scanout_id] = dmabuf; break; } @@ -306,13 +306,13 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) } con = g->parent_obj.scanout[m->scanout_id].con; - if (!console_has_gl(con)) { + if (!qemu_console_has_gl(con)) { error_report("console doesn't support GL!"); vhost_user_gpu_unblock(g); break; } g->backend_blocked = true; - dpy_gl_update(con, m->x, m->y, m->width, m->height); + qemu_console_gl_update(con, m->x, m->y, m->width, m->height); break; } #ifdef CONFIG_PIXMAN @@ -337,9 +337,9 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) pixman_image_unref(image); if (qemu_console_surface(con) != s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); } else { - dpy_gfx_update(con, m->x, m->y, m->width, m->height); + qemu_console_update(con, m->x, m->y, m->width, m->height); } break; } diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index bdc24492850..a68b1848295 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -253,7 +253,7 @@ virtio_gpu_base_device_realize(DeviceState *qdev, g->hw_ops = &virtio_gpu_ops; for (i = 0; i < g->conf.max_outputs; i++) { g->scanout[i].con = - graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g); + qemu_graphic_console_create(DEVICE(g), i, &virtio_gpu_ops, g); } return true; diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c index ebb6c783fb0..6ff12639012 100644 --- a/hw/display/virtio-gpu-rutabaga.c +++ b/hw/display/virtio-gpu-rutabaga.c @@ -282,7 +282,7 @@ rutabaga_cmd_resource_flush(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) rf.resource_id, &transfer, &transfer_iovec); CHECK(!result, cmd); - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); } static void @@ -306,8 +306,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) scanout = &vb->scanout[ss.scanout_id]; if (ss.resource_id == 0) { - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gl_scanout_disable(scanout->con); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_gl_scanout_disable(scanout->con); return; } @@ -331,8 +331,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) /* realloc the surface ptr */ scanout->ds = qemu_create_displaysurface_pixman(res->image); - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, scanout->ds); res->scanout_bitmask = ss.scanout_id; } diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabuf.c index 74b6a7766af..d5ac1cfca0e 100644 --- a/hw/display/virtio-gpu-udmabuf.c +++ b/hw/display/virtio-gpu-udmabuf.c @@ -156,7 +156,7 @@ static void virtio_gpu_free_dmabuf(VirtIOGPU *g, VGPUDMABuf *dmabuf) struct virtio_gpu_scanout *scanout; scanout = &g->parent_obj.scanout[dmabuf->scanout_id]; - dpy_gl_release_dmabuf(scanout->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(scanout->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); QTAILQ_REMOVE(&g->dmabuf.bufs, dmabuf, next); g_free(dmabuf); @@ -232,7 +232,7 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, height = qemu_dmabuf_get_height(new_primary->buf); g->dmabuf.primary[scanout_id] = new_primary; qemu_console_resize(scanout->con, width, height); - dpy_gl_scanout_dmabuf(scanout->con, new_primary->buf); + qemu_console_gl_scanout_dmabuf(scanout->con, new_primary->buf); if (old_primary) { virtio_gpu_free_dmabuf(g, old_primary); diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index add85bd4e61..60c78af06a4 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -521,7 +521,7 @@ static void virtio_gpu_rect_update(VirtIOGPU *g, int idx, int x, int y, return; } - dpy_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); + qemu_console_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); } static void virgl_cmd_resource_flush(VirtIOGPU *g, @@ -584,16 +584,15 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g, qemu_console_resize(g->parent_obj.scanout[ss.scanout_id].con, ss.r.width, ss.r.height); virgl_renderer_force_ctx_0(); - dpy_gl_scanout_texture( + qemu_console_gl_scanout_texture( g->parent_obj.scanout[ss.scanout_id].con, info.tex_id, info.flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP, info.width, info.height, ss.r.x, ss.r.y, ss.r.width, ss.r.height, d3d_tex2d); } else { - dpy_gfx_replace_surface( - g->parent_obj.scanout[ss.scanout_id].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); + qemu_console_set_surface(g->parent_obj.scanout[ss.scanout_id].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); } g->parent_obj.scanout[ss.scanout_id].resource_id = ss.resource_id; } @@ -1315,7 +1314,7 @@ virgl_create_context(void *opaque, int scanout_idx, qparams.major_ver = params->major_ver; qparams.minor_ver = params->minor_ver; - ctx = dpy_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); + ctx = qemu_console_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); return (virgl_renderer_gl_context)ctx; } @@ -1324,7 +1323,7 @@ static void virgl_destroy_context(void *opaque, virgl_renderer_gl_context ctx) VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - dpy_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); + qemu_console_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); } static int virgl_make_context_current(void *opaque, int scanout_idx, @@ -1333,8 +1332,7 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - return dpy_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, - qctx); + return qemu_console_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, qctx); } static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { @@ -1399,8 +1397,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) int i; for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[i].con); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[i].con); } } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index dbb72bbb22d..88526051a99 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -103,14 +103,14 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) if (cursor->resource_id > 0) { vgc->update_cursor_data(g, s, cursor->resource_id); } - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); s->cursor = *cursor; } else { s->cursor.pos.x = cursor->pos.x; s->cursor.pos.y = cursor->pos.y; } - dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); + qemu_console_set_mouse(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); } struct virtio_gpu_simple_resource * @@ -390,7 +390,7 @@ void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) res->scanout_bitmask &= ~(1 << scanout_id); } - dpy_gfx_replace_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, NULL); scanout->resource_id = 0; scanout->ds = NULL; scanout->width = 0; @@ -531,8 +531,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, rf.r.y + rf.r.height >= scanout->y) { within_bounds = true; - if (console_has_gl(scanout->con)) { - dpy_gl_update(scanout->con, 0, 0, scanout->width, + if (qemu_console_has_gl(scanout->con)) { + qemu_console_gl_update(scanout->con, 0, 0, scanout->width, scanout->height); update_submitted = true; } @@ -582,8 +582,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, /* work out the area we need to update for each console */ if (qemu_rect_intersect(&flush_rect, &rect, &rect)) { qemu_rect_translate(&rect, -scanout->x, -scanout->y); - dpy_gfx_update(g->parent_obj.scanout[i].con, - rect.x, rect.y, rect.width, rect.height); + qemu_console_update(g->parent_obj.scanout[i].con, + rect.x, rect.y, rect.width, rect.height); } } } @@ -649,7 +649,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, g->parent_obj.enable = 1; if (res->blob) { - if (console_has_gl(scanout->con)) { + if (qemu_console_has_gl(scanout->con)) { if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb, r)) { virtio_gpu_update_scanout(g, scanout_id, res, fb, r); } else { @@ -665,7 +665,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, } /* create a surface for this scanout */ - if ((res->blob && !console_has_gl(scanout->con)) || + if ((res->blob && !qemu_console_has_gl(scanout->con)) || !scanout->ds || surface_data(scanout->ds) != data + fb->offset || scanout->width != r->width || @@ -686,7 +686,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, fb->offset); pixman_image_unref(rect); - dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, + qemu_console_set_surface(g->parent_obj.scanout[scanout_id].con, scanout->ds); } @@ -1483,10 +1483,10 @@ static int virtio_gpu_post_load(void *opaque, int version_id) } scanout->ds = qemu_create_displaysurface_pixman(res->image); qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, 0); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, scanout->ds); } - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); if (scanout->cursor.resource_id) { update_cursor(g, &scanout->cursor); } @@ -1602,7 +1602,7 @@ static void virtio_gpu_reset_bh(void *opaque) } for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); } g->reset_finished = true; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index efd4858f3d0..2ae649c91ae 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -172,7 +172,7 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vvga->vga_mrs, true, false); vga->con = g->scanout[0].con; - graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); + qemu_graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); for (i = 0; i < g->conf.max_outputs; i++) { object_property_set_link(OBJECT(g->scanout[i].con), "device", diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 11f13c98d7a..f6f9edfd1d9 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -378,7 +378,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s, for (line = h; line > 0; line--, src += bypl, dst += bypl) { memcpy(dst, src, width); } - dpy_gfx_update(s->vga.con, x, y, w, h); + qemu_console_update(s->vga.con, x, y, w, h); } static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) @@ -554,7 +554,7 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, qc = cursor_builtin_left_ptr(); } - dpy_cursor_define(s->vga.con, qc); + qemu_console_set_cursor(s->vga.con, qc); cursor_unref(qc); } #endif @@ -1082,7 +1082,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); #ifdef HW_MOUSE_ACCEL if (value <= SVGA_CURSOR_ON_SHOW) { - dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); + qemu_console_set_mouse(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); } #endif break; @@ -1130,7 +1130,7 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s) surface = qemu_create_displaysurface_from(s->new_width, s->new_height, format, stride, s->vga.vram_ptr); - dpy_gfx_replace_surface(s->vga.con, surface); + qemu_console_set_surface(s->vga.con, surface); s->invalidated = 1; } } @@ -1151,7 +1151,7 @@ static bool vmsvga_update_display(void *opaque) if (s->invalidated) { s->invalidated = 0; - dpy_gfx_update_full(s->vga.con); + qemu_console_update_full(s->vga.con); } return true; @@ -1254,7 +1254,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->scratch_size = SVGA_SCRATCH_SIZE; s->scratch = g_malloc(s->scratch_size * 4); - s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); + s->vga.con = qemu_graphic_console_create(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 2e431e27be6..8e9953bda43 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -657,7 +657,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h) xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n", __func__, xenfb->depth, bpp); - dpy_gfx_update(xenfb->con, x, y, w, h); + qemu_console_update(xenfb->con, x, y, w, h); } #ifdef XENFB_TYPE_REFRESH_PERIOD @@ -743,7 +743,7 @@ static bool xenfb_update(void *opaque) surface = qemu_create_displaysurface(xenfb->width, xenfb->height); break; } - dpy_gfx_replace_surface(xenfb->con, surface); + qemu_console_set_surface(xenfb->con, surface); xen_pv_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n", xenfb->width, xenfb->height, xenfb->depth, @@ -903,7 +903,7 @@ static int fb_initialise(struct XenLegacyDevice *xendev) if (rc != 0) return rc; - fb->con = graphic_console_init(NULL, 0, &xenfb_ops, fb); + fb->con = qemu_graphic_console_create(NULL, 0, &xenfb_ops, fb); if (xenstore_read_fe_int(xendev, "feature-update", &fb->feature_update) == -1) fb->feature_update = 0; diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 50e6ef10984..2486d9e5825 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -605,7 +605,7 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) if ((width != 0) && (height != 0)) { /* - * As dpy_gfx_replace_surface calls qemu_free_displaysurface on the + * As qemu_console_replace_surface calls qemu_free_displaysurface on the * surface we need to be careful and don't free the surface associated * to the console or double free will happen. */ @@ -631,10 +631,10 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) height, s->g_plane.format, 0, NULL); - dpy_gfx_replace_surface(s->console, s->bout_plane.surface); + qemu_console_set_surface(s->console, s->bout_plane.surface); } else { s->bout_plane.surface = NULL; - dpy_gfx_replace_surface(s->console, s->g_plane.surface); + qemu_console_set_surface(s->console, s->g_plane.surface); } xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, @@ -1287,7 +1287,7 @@ static bool xlnx_dp_update_display(void *opaque) /* * XXX: We might want to update only what changed. */ - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); return true; } @@ -1387,7 +1387,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), &error_fatal); - s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &xlnx_dp_gfx_ops, s); surface = qemu_console_surface(s->console); xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, surface_data(surface)); diff --git a/hw/vfio/display.c b/hw/vfio/display.c index 4a9a58036e3..8f91e83da88 100644 --- a/hw/vfio/display.c +++ b/hw/vfio/display.c @@ -264,7 +264,7 @@ static void vfio_display_free_one_dmabuf(VFIODisplay *dpy, VFIODMABuf *dmabuf) QTAILQ_REMOVE(&dpy->dmabuf.bufs, dmabuf, next); qemu_dmabuf_close(dmabuf->buf); - dpy_gl_release_dmabuf(dpy->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(dpy->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); g_free(dmabuf); } @@ -307,7 +307,7 @@ static bool vfio_display_dmabuf_update(void *opaque) if (dpy->dmabuf.primary != primary) { dpy->dmabuf.primary = primary; qemu_console_resize(dpy->con, width, height); - dpy_gl_scanout_dmabuf(dpy->con, primary->buf); + qemu_console_gl_scanout_dmabuf(dpy->con, primary->buf); free_bufs = true; } @@ -321,21 +321,21 @@ static bool vfio_display_dmabuf_update(void *opaque) if (cursor && (new_cursor || cursor->hot_updates)) { bool have_hot = (cursor->hot_x != 0xffffffff && cursor->hot_y != 0xffffffff); - dpy_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, - cursor->hot_x, cursor->hot_y); + qemu_console_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, + cursor->hot_x, cursor->hot_y); cursor->hot_updates = 0; } else if (!cursor && new_cursor) { - dpy_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); + qemu_console_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); } if (cursor && cursor->pos_updates) { - dpy_gl_cursor_position(dpy->con, + qemu_console_gl_cursor_position(dpy->con, cursor->pos_x, cursor->pos_y); cursor->pos_updates = 0; } - dpy_gl_update(dpy->con, 0, 0, width, height); + qemu_console_gl_update(dpy->con, 0, 0, width, height); if (free_bufs) { vfio_display_free_dmabufs(vdev); @@ -363,7 +363,7 @@ static bool vfio_display_dmabuf_init(VFIOPCIDevice *vdev, Error **errp) } vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_dmabuf_ops, vdev); if (vdev->enable_ramfb) { @@ -396,9 +396,9 @@ void vfio_display_reset(VFIOPCIDevice *vdev) return; } - dpy_gl_scanout_disable(vdev->dpy->con); + qemu_console_gl_scanout_disable(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); - dpy_gfx_update_full(vdev->dpy->con); + qemu_console_update_full(vdev->dpy->con); } static bool vfio_display_region_update(void *opaque) @@ -471,13 +471,13 @@ static bool vfio_display_region_update(void *opaque) dpy->region.surface = qemu_create_displaysurface_from (plane.width, plane.height, format, plane.stride, dpy->region.buffer.mmaps[0].mmap); - dpy_gfx_replace_surface(dpy->con, dpy->region.surface); + qemu_console_set_surface(dpy->con, dpy->region.surface); } /* full screen update */ - dpy_gfx_update(dpy->con, 0, 0, - surface_width(dpy->region.surface), - surface_height(dpy->region.surface)); + qemu_console_update(dpy->con, 0, 0, + surface_width(dpy->region.surface), + surface_height(dpy->region.surface)); return true; err: @@ -493,7 +493,7 @@ static const GraphicHwOps vfio_display_region_ops = { static bool vfio_display_region_init(VFIOPCIDevice *vdev, Error **errp) { vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_region_ops, vdev); if (vdev->enable_ramfb) { @@ -553,7 +553,7 @@ void vfio_display_finalize(VFIOPCIDevice *vdev) return; } - graphic_console_close(vdev->dpy->con); + qemu_graphic_console_close(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); vfio_display_region_exit(vdev->dpy); vfio_display_edid_exit(vdev->dpy); diff --git a/ui/console-vc.c b/ui/console-vc.c index 99ad6d079df..828e78c41ea 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -90,15 +90,15 @@ static void text_console_update(void *opaque, uint32_t *chardata) s->vt.cells[src].t_attrib.bgcol, s->vt.cells[src].t_attrib.bold); } - dpy_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], - s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); + qemu_console_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], + s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); s->vt.text_x[0] = s->vt.width; s->vt.text_y[0] = s->vt.height; s->vt.text_x[1] = 0; s->vt.text_y[1] = 0; } if (s->vt.cursor_invalidate) { - dpy_text_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); + qemu_console_text_set_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); s->vt.cursor_invalidate = 0; } } @@ -186,14 +186,14 @@ static void vc_chr_set_echo(Chardev *chr, bool echo) void qemu_text_console_update_size(QemuTextConsole *c) { - dpy_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); + qemu_console_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); } static void text_console_image_update(QemuVT100 *vt, int x, int y, int width, int height) { QemuTextConsole *console = container_of(vt, QemuTextConsole, vt); - dpy_gfx_update(QEMU_CONSOLE(console), x, y, width, height); + qemu_console_update(QEMU_CONSOLE(console), x, y, width, height); } static void text_console_out_flush(QemuVT100 *vt) @@ -232,7 +232,7 @@ static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s = QEMU_TEXT_CONSOLE(object_new(TYPE_QEMU_FIXED_TEXT_CONSOLE)); } - dpy_gfx_replace_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); + qemu_console_set_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); if (vc->has_encoding) { drv->encoding = vc->encoding; } diff --git a/ui/console.c b/ui/console.c index 22ca1c35db3..6f6330d61f1 100644 --- a/ui/console.c +++ b/ui/console.c @@ -129,26 +129,26 @@ static void gui_setup_refresh(DisplayState *ds) } } -void graphic_hw_update_done(QemuConsole *con) +void qemu_console_hw_update_done(QemuConsole *con) { if (con) { qemu_co_enter_all(&con->dump_queue, NULL); } } -void graphic_hw_update(QemuConsole *con) +void qemu_console_hw_update(QemuConsole *con) { if (!con) { return; } if (!con->hw_ops->gfx_update || con->hw_ops->gfx_update(con->hw)) { - graphic_hw_update_done(con); + qemu_console_hw_update_done(con); } } -static void graphic_hw_update_bh(void *con) +static void console_hw_update_bh(void *con) { - graphic_hw_update(con); + qemu_console_hw_update(con); } void qemu_console_co_wait_update(QemuConsole *con) @@ -156,18 +156,18 @@ void qemu_console_co_wait_update(QemuConsole *con) if (qemu_co_queue_empty(&con->dump_queue)) { /* Defer the update, it will restart the pending coroutines */ aio_bh_schedule_oneshot(qemu_get_aio_context(), - graphic_hw_update_bh, con); + console_hw_update_bh, con); } qemu_co_queue_wait(&con->dump_queue, NULL); } -static void graphic_hw_gl_unblock_timer(void *opaque) +static void console_hw_gl_unblock_timer(void *opaque) { warn_report("console: no gl-unblock within one second"); } -void graphic_hw_gl_block(QemuConsole *con, bool block) +void qemu_console_hw_gl_block(QemuConsole *con, bool block) { uint64_t timeout; assert(con != NULL); @@ -205,14 +205,14 @@ void qemu_console_set_window_id(QemuConsole *con, int window_id) con->window_id = window_id; } -void graphic_hw_invalidate(QemuConsole *con) +void qemu_console_hw_invalidate(QemuConsole *con) { if (con && con->hw_ops->invalidate) { con->hw_ops->invalidate(con->hw); } } -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata) +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata) { if (con && con->hw_ops->text_update) { con->hw_ops->text_update(con->hw, chardata); @@ -502,7 +502,7 @@ qemu_graphic_console_init(Object *obj) { } -bool console_has_gl(QemuConsole *con) +bool qemu_console_has_gl(QemuConsole *con) { return con->gl != NULL; } @@ -527,7 +527,7 @@ static bool console_compatible_with(QemuConsole *con, flags = con->hw_ops->get_flags ? con->hw_ops->get_flags(con->hw) : 0; - if (console_has_gl(con) && + if (qemu_console_has_gl(con) && !con->gl->ops->dpy_gl_ctx_is_compatible_dcl(con->gl, dcl)) { error_setg(errp, "Display %s is incompatible with the GL context", dcl->ops->dpy_name); @@ -535,7 +535,7 @@ static bool console_compatible_with(QemuConsole *con, } if (flags & GRAPHIC_FLAGS_GL && - !console_has_gl(con)) { + !qemu_console_has_gl(con)) { error_setg(errp, "The console requires a GL context."); return false; @@ -605,8 +605,8 @@ void qemu_console_register_listener(QemuConsole *con, vt100_update_cursor(); } -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval) +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval) { DisplayState *ds = dcl->ds; @@ -645,7 +645,7 @@ static void dpy_set_ui_info_timer(void *opaque) con->hw_ops->ui_info(con->hw, head, &con->ui_info); } -bool dpy_ui_info_supported(const QemuConsole *con) +bool qemu_console_ui_info_supported(const QemuConsole *con) { if (con == NULL) { return false; @@ -654,16 +654,16 @@ bool dpy_ui_info_supported(const QemuConsole *con) return con->hw_ops->ui_info != NULL; } -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con) +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con) { - assert(dpy_ui_info_supported(con)); + assert(qemu_console_ui_info_supported(con)); return &con->ui_info; } -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) { - if (!dpy_ui_info_supported(con)) { + if (!qemu_console_ui_info_supported(con)) { return -1; } if (memcmp(&con->ui_info, info, sizeof(con->ui_info)) == 0) { @@ -682,7 +682,7 @@ int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) return 0; } -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -707,15 +707,15 @@ void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_gfx_update_full(QemuConsole *con) +void qemu_console_update_full(QemuConsole *con) { int w = qemu_console_get_width(con, 0); int h = qemu_console_get_height(con, 0); - dpy_gfx_update(con, 0, 0, w, h); + qemu_console_update(con, 0, 0, w, h); } -void dpy_gfx_replace_surface(QemuConsole *con, +void qemu_console_set_surface(QemuConsole *con, DisplaySurface *surface) { static const char placeholder_msg[] = "Display output is not active."; @@ -753,8 +753,8 @@ void dpy_gfx_replace_surface(QemuConsole *con, qemu_free_displaysurface(old_surface); } -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format) +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format) { DisplayChangeListener *dcl; DisplayState *s = con->ds; @@ -789,7 +789,7 @@ static void dpy_refresh(DisplayState *s) } } -void dpy_text_cursor(QemuConsole *con, int x, int y) +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -804,7 +804,7 @@ void dpy_text_cursor(QemuConsole *con, int x, int y) } } -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -819,7 +819,7 @@ void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_text_resize(QemuConsole *con, int w, int h) +void qemu_console_text_resize(QemuConsole *con, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -834,7 +834,7 @@ void dpy_text_resize(QemuConsole *con, int w, int h) } } -void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) +void qemu_console_set_mouse(QemuConsole *c, int x, int y, bool on) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -853,7 +853,7 @@ void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) } } -void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) +void qemu_console_set_cursor(QemuConsole *c, QEMUCursor *cursor) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -871,26 +871,26 @@ void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) } } -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - struct QEMUGLParams *qparams) +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *qparams) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_create(con->gl, qparams); } -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); con->gl->ops->dpy_gl_ctx_destroy(con->gl, ctx); } -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_make_current(con->gl, ctx); } -void dpy_gl_scanout_disable(QemuConsole *con) +void qemu_console_gl_scanout_disable(QemuConsole *con) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -908,14 +908,14 @@ void dpy_gl_scanout_disable(QemuConsole *con) } } -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, - bool backing_y_0_top, - uint32_t backing_width, - uint32_t backing_height, - uint32_t x, uint32_t y, - uint32_t width, uint32_t height, - void *d3d_tex2d) +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, + bool backing_y_0_top, + uint32_t backing_width, + uint32_t backing_height, + uint32_t x, uint32_t y, + uint32_t width, uint32_t height, + void *d3d_tex2d) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -939,8 +939,8 @@ void dpy_gl_scanout_texture(QemuConsole *con, } } -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -957,8 +957,8 @@ void dpy_gl_scanout_dmabuf(QemuConsole *con, } } -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y) +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -974,8 +974,8 @@ void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, } } -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y) +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -990,8 +990,8 @@ void dpy_gl_cursor_position(QemuConsole *con, } } -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -1006,15 +1006,15 @@ void dpy_gl_release_dmabuf(QemuConsole *con, } } -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h) +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; assert(con->gl); - graphic_hw_gl_block(con, true); + qemu_console_hw_gl_block(con, true); QLIST_FOREACH(dcl, &s->listeners, next) { if (con != dcl->con) { continue; @@ -1023,7 +1023,7 @@ void dpy_gl_update(QemuConsole *con, dcl->ops->dpy_gl_update(dcl, x, y, w, h); } } - graphic_hw_gl_block(con, false); + qemu_console_hw_gl_block(con, false); } /***********************************************************/ @@ -1060,17 +1060,17 @@ DisplayState *init_displaystate(void) return display_state; } -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque) +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque) { con->hw_ops = hw_ops; con->hw = opaque; } -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *hw_ops, - void *opaque) +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *hw_ops, + void *opaque) { static const char noinit[] = "Guest has not initialized the display (yet)."; @@ -1089,16 +1089,16 @@ QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, s = (QemuConsole *)object_new(TYPE_QEMU_GRAPHIC_CONSOLE); } QEMU_GRAPHIC_CONSOLE(s)->head = head; - graphic_console_set_hwops(s, hw_ops, opaque); + qemu_graphic_console_set_hwops(s, hw_ops, opaque); if (dev) { object_property_set_link(OBJECT(s), "device", OBJECT(dev), &error_abort); } surface = qemu_create_placeholder_surface(width, height, noinit); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); s->gl_unblock_timer = timer_new_ms(QEMU_CLOCK_REALTIME, - graphic_hw_gl_unblock_timer, s); + console_hw_gl_unblock_timer, s); return s; } @@ -1106,7 +1106,7 @@ static const GraphicHwOps unused_ops = { /* no callbacks */ }; -void graphic_console_close(QemuConsole *con) +void qemu_graphic_console_close(QemuConsole *con) { static const char unplugged[] = "Guest display has been unplugged"; @@ -1116,13 +1116,13 @@ void graphic_console_close(QemuConsole *con) trace_console_gfx_close(con->index); object_property_set_link(OBJECT(con), "device", NULL, &error_abort); - graphic_console_set_hwops(con, &unused_ops, NULL); + qemu_graphic_console_set_hwops(con, &unused_ops, NULL); if (con->gl) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); } surface = qemu_create_placeholder_surface(width, height, unplugged); - dpy_gfx_replace_surface(con, surface); + qemu_console_set_surface(con, surface); } QemuConsole *qemu_console_lookup_default(void) @@ -1308,7 +1308,7 @@ void qemu_console_resize(QemuConsole *s, int width, int height) } surface = qemu_create_displaysurface(width, height); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); } DisplaySurface *qemu_console_surface(QemuConsole *console) diff --git a/ui/curses.c b/ui/curses.c index dbb5992981c..24d3713e57d 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -1,8 +1,8 @@ /* * QEMU curses/ncurses display driver - * + * * Copyright (c) 2005 Andrzej Zaborowski - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -275,11 +275,11 @@ static void curses_refresh(DisplayChangeListener *dcl) clear(); refresh(); curses_calc_pad(); - graphic_hw_invalidate(dcl->con); + qemu_console_hw_invalidate(dcl->con); invalidate = 0; } - graphic_hw_text_update(dcl->con, screen); + qemu_console_hw_text_update(dcl->con, screen); while (1) { /* while there are any pending key strokes to process */ diff --git a/ui/dbus-console.c b/ui/dbus-console.c index 23f547a673d..b8e5c57b148 100644 --- a/ui/dbus-console.c +++ b/ui/dbus-console.c @@ -200,7 +200,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, .height = arg_height, }; - if (!dpy_ui_info_supported(ddc->dcl.con)) { + if (!qemu_console_ui_info_supported(ddc->dcl.con)) { g_dbus_method_invocation_return_error(invocation, DBUS_DISPLAY_ERROR, DBUS_DISPLAY_ERROR_UNSUPPORTED, @@ -208,7 +208,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, return DBUS_METHOD_INVOCATION_HANDLED; } - dpy_set_ui_info(ddc->dcl.con, &info, false); + qemu_console_set_ui_info(ddc->dcl.con, &info, false); qemu_dbus_display1_console_complete_set_uiinfo(ddc->iface, invocation); return DBUS_METHOD_INVOCATION_HANDLED; } diff --git a/ui/dbus-listener.c b/ui/dbus-listener.c index cc2c969686e..2e2f6ba4183 100644 --- a/ui/dbus-listener.c +++ b/ui/dbus-listener.c @@ -241,7 +241,7 @@ static void dbus_update_gl_cb(GObject *source_object, } #endif - graphic_hw_gl_block(ddl->dcl.con, false); + qemu_console_hw_gl_block(ddl->dcl.con, false); g_object_unref(ddl); } #endif @@ -257,7 +257,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, glFlush(); #ifdef CONFIG_GBM - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); qemu_dbus_display1_listener_call_update_dmabuf(ddl->proxy, x, y, w, h, G_DBUS_CALL_FLAGS_NONE, @@ -276,7 +276,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, Error *err = NULL; assert(ddl->d3d_texture); - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); if (!d3d_texture2d_release0(ddl->d3d_texture, &err)) { error_report_err(err); return; @@ -711,7 +711,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) { DBusDisplayListener *ddl = container_of(dcl, DBusDisplayListener, dcl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (!ddl->ds || qemu_console_is_gl_blocked(ddl->dcl.con)) { return; @@ -740,7 +740,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) static void dbus_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } #ifdef CONFIG_OPENGL diff --git a/ui/egl-headless.c b/ui/egl-headless.c index 4f046c975a9..878bfebb40c 100644 --- a/ui/egl-headless.c +++ b/ui/egl-headless.c @@ -23,7 +23,7 @@ typedef struct egl_dpy { static void egl_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static void egl_gfx_update(DisplayChangeListener *dcl, @@ -161,7 +161,7 @@ static void egl_scanout_flush(DisplayChangeListener *dcl, } egl_fb_read(edpy->ds, &edpy->blit_fb); - dpy_gfx_update(edpy->dcl.con, x, y, w, h); + qemu_console_update(edpy->dcl.con, x, y, w, h); } static const DisplayChangeListenerOps egl_ops = { diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c index fa8fe8970c1..7c5c9b2428c 100644 --- a/ui/gtk-egl.c +++ b/ui/gtk-egl.c @@ -108,7 +108,7 @@ void gd_egl_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -176,7 +176,7 @@ void gd_egl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -405,7 +405,7 @@ void gd_egl_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_egl_set_scanout_mode(vc, true); gtk_widget_queue_draw_area(area, x, y, w, h); diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c index ce49000d3f1..23806b9d01b 100644 --- a/ui/gtk-gl-area.c +++ b/ui/gtk-gl-area.c @@ -131,7 +131,7 @@ void gd_gl_area_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -195,7 +195,7 @@ void gd_gl_area_refresh(DisplayChangeListener *dcl) } } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -347,7 +347,7 @@ void gd_gl_area_scanout_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_gl_area_set_scanout_mode(vc, true); } diff --git a/ui/gtk.c b/ui/gtk.c index ef3707b3634..2c61b601f78 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -436,7 +436,7 @@ static void gd_update(DisplayChangeListener *dcl, static void gd_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static GdkDevice *gd_get_pointer(GdkDisplay *dpy) @@ -602,7 +602,7 @@ void gd_hw_gl_flushed(void *vcon) qemu_set_fd_handler(fence_fd, NULL, NULL, NULL); close(fence_fd); qemu_dmabuf_set_fence_fd(dmabuf, -1); - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } } @@ -729,27 +729,27 @@ static void gd_set_ui_refresh_rate(VirtualConsole *vc, int refresh_rate) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.refresh_rate = refresh_rate; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } static void gd_set_ui_size(VirtualConsole *vc, gint width, gint height) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.width = width; info.height = height; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } #if defined(CONFIG_OPENGL) @@ -2333,7 +2333,7 @@ static GSList *gd_vc_gfx_init(GtkDisplayState *s, VirtualConsole *vc, gd_connect_vc_gfx_signals(vc); group = gd_vc_menu_init(s, vc, idx, group, view_menu); - if (dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (qemu_console_ui_info_supported(vc->gfx.dcl.con)) { zoom_to_fit = true; } if (s->opts->u.gtk.has_zoom_to_fit) { diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index 73052383c2e..68a3aff7151 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -129,7 +129,7 @@ void sdl2_2d_refresh(DisplayChangeListener *dcl) struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); assert(!scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); sdl2_poll_events(scon); } diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index bb066cdd885..1547ad2f6f8 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -115,7 +115,7 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl) assert(scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (scon->updates && scon->real_window) { scon->updates = 0; sdl2_gl_render_surface(scon); diff --git a/ui/sdl2.c b/ui/sdl2.c index 89516f95c41..4fcdbd79d3c 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -604,7 +604,7 @@ static void handle_windowevent(SDL_Event *ev) .width = ev->window.data1, .height = ev->window.data2, }; - dpy_set_ui_info(scon->dcl.con, &info, true); + qemu_console_set_ui_info(scon->dcl.con, &info, true); } sdl2_redraw(scon); break; @@ -632,10 +632,10 @@ static void handle_windowevent(SDL_Event *ev) } break; case SDL_WINDOWEVENT_RESTORED: - update_displaychangelistener(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_console_listener_set_refresh(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); break; case SDL_WINDOWEVENT_MINIMIZED: - update_displaychangelistener(&scon->dcl, 500); + qemu_console_listener_set_refresh(&scon->dcl, 500); break; case SDL_WINDOWEVENT_CLOSE: if (qemu_console_is_graphic(scon->dcl.con)) { diff --git a/ui/spice-display.c b/ui/spice-display.c index 56d8140fad8..e3716127203 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -468,7 +468,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) assert(ssd->dcl.con); cursor_ref(c); qemu_mutex_unlock(&ssd->lock); - dpy_cursor_define(ssd->dcl.con, c); + qemu_console_set_cursor(ssd->dcl.con, c); qemu_mutex_lock(&ssd->lock); cursor_unref(c); } @@ -481,7 +481,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) ssd->mouse_x = -1; ssd->mouse_y = -1; qemu_mutex_unlock(&ssd->lock); - dpy_mouse_set(ssd->dcl.con, x, y, true); + qemu_console_set_mouse(ssd->dcl.con, x, y, true); } else { qemu_mutex_unlock(&ssd->lock); } @@ -489,7 +489,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) { - graphic_hw_update(ssd->dcl.con); + qemu_console_hw_update(ssd->dcl.con); WITH_QEMU_LOCK_GUARD(&ssd->lock) { if (QTAILQ_EMPTY(&ssd->updates) && ssd->ds) { @@ -668,7 +668,7 @@ static int interface_client_monitors_config(QXLInstance *sin, QemuUIInfo info; int head; - if (!dpy_ui_info_supported(ssd->dcl.con)) { + if (!qemu_console_ui_info_supported(ssd->dcl.con)) { return 0; /* == not supported by guest */ } @@ -676,7 +676,7 @@ static int interface_client_monitors_config(QXLInstance *sin, return 1; } - info = *dpy_get_ui_info(ssd->dcl.con); + info = *qemu_console_get_ui_info(ssd->dcl.con); head = qemu_console_get_index(ssd->dcl.con); if (mc->num_of_monitors > head) { @@ -690,7 +690,7 @@ static int interface_client_monitors_config(QXLInstance *sin, } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); - dpy_set_ui_info(ssd->dcl.con, &info, false); + qemu_console_set_ui_info(ssd->dcl.con, &info, false); return 1; } @@ -817,7 +817,7 @@ static void qemu_spice_gl_block(SimpleSpiceDisplay *ssd, bool block) } else { timer_del(ssd->gl_unblock_timer); } - graphic_hw_gl_block(ssd->dcl.con, block); + qemu_console_hw_gl_block(ssd->dcl.con, block); } static void qemu_spice_gl_unblock_bh(void *opaque) @@ -861,7 +861,7 @@ static void spice_gl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (ssd->gl_updates && ssd->have_surface) { qemu_spice_gl_block(ssd, true); glFlush(); diff --git a/ui/vnc.c b/ui/vnc.c index e8c8773a36e..d3dfabede03 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -2325,8 +2325,8 @@ static void set_pixel_format(VncState *vs, int bits_per_pixel, set_pixel_conversion(vs); - graphic_hw_invalidate(vs->vd->dcl.con); - graphic_hw_update(vs->vd->dcl.con); + qemu_console_hw_invalidate(vs->vd->dcl.con); + qemu_console_hw_update(vs->vd->dcl.con); } static void pixel_format_message (VncState *vs) { @@ -2384,7 +2384,7 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) VncDisplay *vd = vs->vd; if (data[0] > 3) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } switch (data[0]) { @@ -2638,9 +2638,9 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) h = read_u16(data, 4); trace_vnc_msg_client_set_desktop_size(vs, vs->ioc, w, h, screens); - if (dpy_ui_info_supported(vs->vd->dcl.con)) { + if (qemu_console_ui_info_supported(vs->vd->dcl.con)) { QemuUIInfo info = { .width = w, .height = h }; - dpy_set_ui_info(vs->vd->dcl.con, &info, false); + qemu_console_set_ui_info(vs->vd->dcl.con, &info, false); vnc_desktop_resize_ext(vs, 4 /* Request forwarded */); } else { vnc_desktop_resize_ext(vs, 3 /* Invalid screen layout */); @@ -3242,14 +3242,14 @@ static void vnc_refresh(DisplayChangeListener *dcl) int has_dirty, rects = 0; if (QTAILQ_EMPTY(&vd->clients)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); return; } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (vnc_trylock_display(vd)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); return; } @@ -3323,7 +3323,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, sioc, websocket, vs->auth, vs->subauth); VNC_DEBUG("New client on socket %p\n", vs->sioc); - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); qio_channel_set_blocking(vs->ioc, false, &error_abort); g_clear_handle_id(&vs->ioc_tag, g_source_remove); if (websocket) { @@ -3363,7 +3363,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, vnc_update_server_surface(vd); } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (!vs->websocket) { vnc_start_protocol(vs); @@ -3419,7 +3419,7 @@ static void vmstate_change_handler(void *opaque, bool running, RunState state) if (state != RUN_STATE_RUNNING) { return; } - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } static bool vnc_display_open(VncDisplay *vd, Error **errp); diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index 77d80fb7cef..be0061b9db2 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -317,8 +317,8 @@ static void apple_gfx_render_frame_completed_bh(void *opaque) copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface)); if (s->gfx_update_requested) { s->gfx_update_requested = false; - dpy_gfx_update_full(s->con); - graphic_hw_update_done(s->con); + qemu_console_update_full(s->con); + qemu_console_hw_update_done(s->con); s->new_frame_ready = false; } else { s->new_frame_ready = true; @@ -337,7 +337,7 @@ static bool apple_gfx_fb_update_display(void *opaque) assert(bql_locked()); if (s->new_frame_ready) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->new_frame_ready = false; } else if (s->pending_frames > 0) { s->gfx_update_requested = true; @@ -380,14 +380,14 @@ static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height) (s->texture.storageMode == MTLStorageModeManaged); } - dpy_gfx_replace_surface(s->con, s->surface); + qemu_console_set_surface(s->con, s->surface); } static void update_cursor(AppleGFXState *s) { assert(bql_locked()); - dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x, - s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); + qemu_console_set_mouse(s->con, s->pgdisp.cursorPosition.x, + s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); } static void update_cursor_bh(void *opaque) @@ -443,7 +443,7 @@ static void set_cursor_glyph(void *opaque) } px_data += padding_bytes_per_row; } - dpy_cursor_define(s->con, s->cursor); + qemu_console_set_cursor(s->con, s->cursor); update_cursor(s); } [glyph release]; @@ -792,7 +792,7 @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev, apple_gfx_create_display_mode_array(display_modes, num_display_modes); [mode_array release]; - s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &apple_gfx_fb_ops, s); return true; } diff --git a/ui/cocoa.m b/ui/cocoa.m index aaf82421589..98394cdc507 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -421,7 +421,7 @@ - (void) selectConsoleLocked:(unsigned int)index return; } - unregister_displaychangelistener(&dcl); + qemu_console_unregister_listener(&dcl); qkbd_state_switch_console(kbd, con); qemu_console_register_listener(con, &dcl, &dcl_ops); [self notifyMouseModeChange]; @@ -669,8 +669,8 @@ - (void) updateUIInfoLocked CVTime period = CVDisplayLinkGetNominalOutputVideoRefreshPeriod(displayLink); CVDisplayLinkRelease(displayLink); if (!(period.flags & kCVTimeIsIndefinite)) { - update_displaychangelistener(&dcl, - 1000 * period.timeValue / period.timeScale); + qemu_console_listener_set_refresh(&dcl, + 1000 * period.timeValue / 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www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2A090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:47:58 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=SBZa0nIoCp0ki8/Oc5ku4abkqOmqJgEICyF8p7mx+3g=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323679; v=1; b=jMm6FSTg3+WzoljBa1xx0VEIo3rCyipLRB/bXqKMrcdNR+6DvkjrOPX+E8rgREyl fuoDukk7jeWjRH1RJb//0ZivG9KN+Ul5uESgLkuohDwIcRoPNt8uRy5T0Gp++vJT 4ljy4BIr3xPq7yw9Gpv9nXQvfz4i8pRAk2U38IxKW5FtOqeKZ0ntoI+Lqs3KyDDv nDjEcHNRD6ijVNCuvkoaQ5cAbV5r1D3Dhm5B8CbAEzMIQN3EJEZr5W6C+DSMzgNd cVHxAtdtdiH/vXly+xP1n9bu5GWF/sZlyQ+nRmXFWnTsPqR04jZ5qyvejk2hAT2O axrvfxvwxSeG40g+JiQtnw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:21 +0900 Subject: [PATCH RFC 09/28] hw/display/xenfb: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-9-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=1604; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=Q2mGMH2ClWf3nbm1bPmZWB8Bg9tg0j4lbTXQFfwDMGE=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gUtdcxRqAx2EuLe8LbbcLJ3V2baEYQqb3WGOpp0vp j7/IbKxo5SFQYyLQVZMkSWlaDe3RnTtp8KE+BaYOaxMIEMYuDgFYCI9RQy/2Q8qiKx+tYp1h+il SjZJSbOzDF2vF/9SspNzeul288a9zYwMdxVK8qJ7uQ2LMkV3Hb/AejX38skJoiU7t+x5kynJVxz DBgA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c1860d/1778323707-C4A7ADB1-63265AD0/0/0 X-purgate-type: clean X-purgate-size: 1606 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- hw/display/xenfb.c | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 9bf89a1e6223..ee23c483499f 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -191,29 +191,14 @@ static int xenfb_send_position(struct XenInput *xenfb, return xenfb_kbd_event(xenfb, &event); } -/* - * Send a key event from the client to the guest OS - * QEMU gives us a QCode. - * We have to turn this into a Linux Input layer keycode. - * - * Wish we could just send scancodes straight to the guest which - * already has code for dealing with this... - */ +/* Send a key event from the client to the guest OS */ static void xenfb_key_event(DeviceState *dev, QemuConsole *src, QemuInputEvent *evt) { struct XenInput *xenfb = (struct XenInput *)dev; - int qcode = qemu_input_linux_to_qcode(evt->key.key); - int lnx; - if (qcode < qemu_input_map_qcode_to_linux_len) { - lnx = qemu_input_map_qcode_to_linux[qcode]; - - if (lnx) { - trace_xenfb_key_event(xenfb, lnx, evt->key.down); - xenfb_send_key(xenfb, evt->key.down, lnx); - } - } + trace_xenfb_key_event(xenfb, evt->key.key, evt->key.down); + xenfb_send_key(xenfb, evt->key.down, evt->key.key); } /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304599.1577509 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001cK-5H; Sat, 09 May 2026 10:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304599.1577509; Sat, 09 May 2026 10:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEQ-0001bU-0D; Sat, 09 May 2026 10:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1304599; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEN-0001aR-8o for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfEM-007lJU-M4 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:22 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10e2-5cb7-0a2a0a5109dd-0a2a45079184-8 for ; Sat, 09 May 2026 12:48:22 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f3-229c-0a2a45070019-31d4f359d5ec-3 for ; Sat, 09 May 2026 12:48:21 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2G090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:48:00 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=uJTvyFxVV0KiKR88wATfRrbdCU5rpbZH8pTJ+9EpZgo=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323680; v=1; b=ck991oxPhvCSI7vlQnQmqDhO8qPNpIzbu7vQgVPPFIogHVvJJp6FOUtEbLRQs7Wq rJybWJpAWrQKHDhTosWtzhajw2VXe/kw3fqKqiG2UhS9trsPHRXw5t29i1L3Pa2s +j0bnxv4lZ7iKLJ+RSnx/Fk6fV06j1QEd0f2DZaYOkH+hIvabREPjGBGXAfix4UT u5sxCXEef9jdvlJ4+vb2i2Iaa1BR1/88G7zSBM9FftH39xA9FNW9i9w0sJwKTfQE R8iErBOQm5A6UBQcyPdBjMiMgsjAiy42tAkuW960cpjVozRZs7xwxt+nafvBV0Ls pc6J3r84Hg0rUW0OzLGetw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:27 +0900 Subject: [PATCH RFC 15/28] replay: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-15-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=2453; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=VN8yQ5lgMxcp3qE4EJjzPaXZLmpoeQItNok0BraEMYc=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gautArYL7NVW29YU/82Suvbv1+mU9UyamRs3sy+8c O1P+/W5HaUsDGJcDLJiiiwpRbu5NaJrPxUmxLfAzGFlAhnCwMUpABOZZM3wz26v8oI5qjXvGxZy vDj3JaP5tf5XTkkXuTjpzYxcrldXaTIyXGPb6Kos+3ROQNmxc851LwXPL1cJKFylWjyxeb+YNMN ETgA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ef75cf/1778323702-0B374C48-FF672CCC/0/0 X-purgate-type: clean X-purgate-size: 2455 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- replay/replay-input.c | 20 +++----------------- replay/replay.c | 2 +- 2 files changed, 4 insertions(+), 18 deletions(-) diff --git a/replay/replay-input.c b/replay/replay-input.c index acf0993c7285..c86e00af0efd 100644 --- a/replay/replay-input.c +++ b/replay/replay-input.c @@ -23,8 +23,7 @@ void replay_save_input_event(QemuInputEvent *evt) switch (evt->type) { case INPUT_EVENT_KIND_KEY: - replay_put_dword(KEY_VALUE_KIND_QCODE); - replay_put_dword(qemu_input_linux_to_qcode(evt->key.key)); + replay_put_dword(evt->key.key); replay_put_byte(evt->key.down); break; case INPUT_EVENT_KIND_BTN: @@ -55,25 +54,12 @@ void replay_save_input_event(QemuInputEvent *evt) QemuInputEvent *replay_read_input_event(void) { QemuInputEvent *evt = g_new(QemuInputEvent, 1); - int qcode; evt->type = replay_get_dword(); switch (evt->type) { case INPUT_EVENT_KIND_KEY: - switch (replay_get_dword()) { - case KEY_VALUE_KIND_NUMBER: - qcode = qemu_input_key_number_to_qcode(replay_get_qword()); - evt->key.down = replay_get_byte(); - break; - case KEY_VALUE_KIND_QCODE: - qcode = (QKeyCode)replay_get_dword(); - evt->key.down = replay_get_byte(); - break; - default: - g_assert_not_reached(); - } - evt->key.key = qcode < qemu_input_map_qcode_to_linux_len ? - qemu_input_map_qcode_to_linux[qcode] : 0; + evt->key.key = replay_get_dword(); + evt->key.down = replay_get_byte(); break; case INPUT_EVENT_KIND_BTN: evt->btn.button = (InputButton)replay_get_dword(); diff --git a/replay/replay.c b/replay/replay.c index 2e5c6fa82eaa..14437b32566b 100644 --- a/replay/replay.c +++ b/replay/replay.c @@ -22,7 +22,7 @@ /* Current version of the replay mechanism. Increase it when file format changes. */ -#define REPLAY_VERSION 0xe0200d +#define REPLAY_VERSION 0xe0200e /* Size of replay log header */ #define HEADER_SIZE (sizeof(uint32_t) + sizeof(uint64_t)) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304601.1577515 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001fu-DX; Sat, 09 May 2026 10:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304601.1577515; Sat, 09 May 2026 10:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEQ-0001ez-7j; Sat, 09 May 2026 10:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1304601; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEN-0001aS-Ej for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfEM-0010Ja-SC for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:22 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10a2-e002-0a2a0a5209dd-0a2a4504db1e-44 for ; Sat, 09 May 2026 12:48:22 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f3-1dec-0a2a45040019-31d4f359d5f0-3 for ; Sat, 09 May 2026 12:48:21 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2K090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:48:01 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=+9TsdwOjpr1iHxskLt3f2EYt5zfwd9os5E2Yt8jChVM=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323681; v=1; b=aLv1AfwGALDvOFPckAZuQsHV3Iq6x1BBqVwrJH00u/XyCobZnIeo+UuTjIee/uF1 CE7iaauZdwme0etKlR5JtF6nC0R4K2QjXjLnqSFPtJWk2ZWtRkDDChsSXeBDsQYL t4cz59uBHpJkYTCKhAXYsXzKJcJw1fxZKr9JE5pnHcjQV/zCZWpQq4uz5NqOuYUA 6z35XYQLT0Y79u8LPa5ntwP90qqvy4sTBUAfjBYPNVktzrWr3HocC6rjxSB+UTXf dAYGRlX4aivYRczJu9IfluABueOT/ha6MU3Piq4vdmWISSPc6JXVQqkGpIhsq0Ym sxPNGql4PziyvN6QUjaK9A== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:31 +0900 Subject: [PATCH RFC 19/28] ui/input-barrier: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-19-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=3193; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=c6O0syJR1NIU9Ef/YUHm+OV3aKIWUGDzhmEGlDmaM/E=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gete29q+nqlp3CUa0eKVzCXTcqzHpGl5rly6/9OtT k8dj+7pKGVhEONikBVTZEkp2s2tEV37qTAhvgVmDisTyBAGLk4BmMiLBYwM7x9FPytacndF5S3l 7K2H5K7nWFySMXwgGDir9kdN9TrZDEaGJ1VfTL5p89oVhZ4UyOF8ofTxs8amlCAF+a3TbXacLtj BBAA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ebf023/1778323702-42D643FF-654C105C/0/0 X-purgate-type: clean X-purgate-size: 3195 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- ui/input-barrier.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/ui/input-barrier.c b/ui/input-barrier.c index 0a2198ca5003..eb7f0b952d51 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -84,11 +84,11 @@ static const char *cmd_names[] = { static kbd_layout_t *kbd_layout; -static int input_barrier_to_qcode(uint16_t keyid, uint16_t keycode) +static int input_barrier_to_linux(uint16_t keyid, uint16_t keycode) { /* keycode is optional, if it is not provided use keyid */ - if (keycode && keycode <= qemu_input_map_xorgkbd_to_qcode_len) { - return qemu_input_map_xorgkbd_to_qcode[keycode]; + if (keycode && keycode <= qemu_input_map_xorgkbd_to_linux_len) { + return qemu_input_map_xorgkbd_to_linux[keycode]; } if (keyid >= 0xE000 && keyid <= 0xEFFF) { @@ -99,10 +99,10 @@ static int input_barrier_to_qcode(uint16_t keyid, uint16_t keycode) if (kbd_layout) { keycode = keysym2scancode(kbd_layout, keyid, NULL, false); - return qemu_input_key_number_to_qcode(keycode); + return qemu_input_key_number_to_linux(keycode); } - return qemu_input_map_x11_to_qcode[keyid]; + return qemu_input_map_x11_to_linux[keyid]; } static int input_barrier_to_mouse(uint8_t buttonid) @@ -431,23 +431,23 @@ static gboolean writecmd(InputBarrier *ib, struct barrierMsg *msg) /* keyboard */ case barrierCmdDKeyDown: - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->key.keyid, msg->key.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->key.keyid, msg->key.button), true); break; case barrierCmdDKeyRepeat: for (i = 0; i < msg->repeat.repeat; i++) { - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->repeat.keyid, msg->repeat.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->repeat.keyid, msg->repeat.button), false); - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->repeat.keyid, msg->repeat.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->repeat.keyid, msg->repeat.button), true); } break; case barrierCmdDKeyUp: - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->key.keyid, msg->key.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->key.keyid, msg->key.button), false); break; default: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304600.1577506 (Exim 4.92) (envelope-from ) id 1wLfEP-0001ay-Uo; Sat, 09 May 2026 10:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304600.1577506; Sat, 09 May 2026 10:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEP-0001ap-Pr; Sat, 09 May 2026 10:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1304600; 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Sat, 9 May 2026 19:48:03 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=1HZL/g+SoS2O30ERYe2Yb6nxo7jFOLr4qDArV1Di8vs=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323683; v=1; b=t78Qg2FX6fQPQYjv6ccpjNB5PHM57Z7vH/sFNvFVepBntRbIzBYVxDoFA4Z8zcUH yNwbFuM/ho+hh5SZ7tf+Lkfd6Wii0FvKwt2Neo7Zxyyjj0CPtZ4hhs+44YPVNLLd H36Sm6ApZio0GZOtvJjE7gfl/iPNr1pEm9G79xaqieF17GWnxd4PNKVHVkqEn2ls /0VUSq1OHHAEnBbOUVdWr/eFNLlH0fNvZTrUrycauuM0c2twgV+IGere0olLlQui J1WlwuqN0kKbylZVRId1EEn/7T+bo86HLmzUhdvkZ04CYAklhxjCBTPvbnydSqGn /+uvgM+9RWPYf4U/G5z4Iw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:38 +0900 Subject: [PATCH RFC 26/28] qemu-keymap: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-26-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=4832; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=gcrDwacqS5bkEtnqJY5QTRr0nAfP9KdzJWUdu+r+4i4=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gdv2pyc8enzc0iTzyvf7mQVVX9WD1Rq6ixadzH/JV yrMcK6po5SFQYyLQVZMkSWlaDe3RnTtp8KE+BaYOaxMIEMYuDgFYCJC+xn+x7yYeKUtmfn115RK 3xvJgtvLP+5/9FLHS22im/b1xpj4EIb/gfX6z9rXXG/80tV+1W2F992I945mHGvOMaadZLTVPBL LDwA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ebf023/1778323703-42B633FF-F2E52775/0/0 X-purgate-type: clean X-purgate-size: 4834 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- qemu-keymap.c | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/qemu-keymap.c b/qemu-keymap.c index d4dccf456ef3..d63b6be8ce32 100644 --- a/qemu-keymap.c +++ b/qemu-keymap.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" #include "qemu/notify.h" +#include "standard-headers/linux/input-event-codes.h" #include "ui/input.h" #include @@ -32,19 +33,17 @@ static FILE *outfile; /* ------------------------------------------------------------------------ */ -static uint32_t qcode_to_number(uint32_t qcode) +static uint32_t linux_to_number(uint32_t lnx) { - KeyValue keyvalue; uint32_t number; - keyvalue.type = KEY_VALUE_KIND_QCODE; - keyvalue.u.qcode.data = qcode; - number = qemu_input_key_value_to_number(&keyvalue); + assert(lnx < qemu_input_map_linux_to_qnum_len); + number = qemu_input_map_linux_to_qnum[lnx]; assert(number != 0); return number; } -static void print_sym(xkb_keysym_t sym, uint32_t qcode, const char *mod) +static void print_sym(xkb_keysym_t sym, uint32_t lnx, const char *mod) { char name[64]; @@ -54,7 +53,7 @@ static void print_sym(xkb_keysym_t sym, uint32_t qcode, const char *mod) xkb_keysym_get_name(sym, name, sizeof(name)); /* TODO: make ui/keymap.c parser accept QKeyCode names */ - fprintf(outfile, "%s 0x%02x%s\n", name, qcode_to_number(qcode), mod); + fprintf(outfile, "%s 0x%02x%s\n", name, linux_to_number(lnx), mod); } static void walk_map(struct xkb_keymap *map, xkb_keycode_t code, void *data) @@ -84,37 +83,37 @@ static void walk_map(struct xkb_keymap *map, xkb_keycode_t code, void *data) fprintf(outfile, "# evdev %d (0x%x), QKeyCode \"%s\", number 0x%x\n", evdev, evdev, QKeyCode_str(qcode), - qcode_to_number(qcode)); + linux_to_number(evdev)); /* * check which modifier states generate which keysyms */ xkb_state_update_mask(state, 0, 0, 0, 0, 0, 0); kbase = xkb_state_key_get_one_sym(state, code); - print_sym(kbase, qcode, ""); + print_sym(kbase, evdev, ""); xkb_state_update_mask(state, 0, 0, numlock, 0, 0, 0); knumlock = xkb_state_key_get_one_sym(state, code); if (kbase != knumlock) { - print_sym(knumlock, qcode, " numlock"); + print_sym(knumlock, evdev, " numlock"); } xkb_state_update_mask(state, shift, 0, 0, 0, 0, 0); kshift = xkb_state_key_get_one_sym(state, code); if (kbase != kshift && knumlock != kshift) { - print_sym(kshift, qcode, " shift"); + print_sym(kshift, evdev, " shift"); } xkb_state_update_mask(state, altgr, 0, 0, 0, 0, 0); kaltgr = xkb_state_key_get_one_sym(state, code); if (kbase != kaltgr) { - print_sym(kaltgr, qcode, " altgr"); + print_sym(kaltgr, evdev, " altgr"); } xkb_state_update_mask(state, altgr | shift, 0, 0, 0, 0, 0); kaltgrshift = xkb_state_key_get_one_sym(state, code); if (kshift != kaltgrshift && kaltgr != kaltgrshift) { - print_sym(kaltgrshift, qcode, " shift altgr"); + print_sym(kaltgrshift, evdev, " shift altgr"); } } @@ -251,16 +250,16 @@ int main(int argc, char *argv[]) "# keysyms. So append them here.\n" "#\n" "\n"); - print_sym(XKB_KEY_Print, Q_KEY_CODE_SYSRQ, ""); - print_sym(XKB_KEY_Sys_Req, Q_KEY_CODE_SYSRQ, ""); - print_sym(XKB_KEY_Execute, Q_KEY_CODE_SYSRQ, ""); + print_sym(XKB_KEY_Print, KEY_SYSRQ, ""); + print_sym(XKB_KEY_Sys_Req, KEY_SYSRQ, ""); + print_sym(XKB_KEY_Execute, KEY_SYSRQ, ""); - print_sym(XKB_KEY_KP_Decimal, Q_KEY_CODE_KP_DECIMAL, " numlock"); - print_sym(XKB_KEY_KP_Separator, Q_KEY_CODE_KP_DECIMAL, " numlock"); + print_sym(XKB_KEY_KP_Decimal, KEY_KPDOT, " numlock"); + print_sym(XKB_KEY_KP_Separator, KEY_KPDOT, " numlock"); - print_sym(XKB_KEY_Alt_R, Q_KEY_CODE_ALT_R, ""); - print_sym(XKB_KEY_ISO_Level3_Shift, Q_KEY_CODE_ALT_R, ""); - print_sym(XKB_KEY_Mode_switch, Q_KEY_CODE_ALT_R, ""); + print_sym(XKB_KEY_Alt_R, KEY_RIGHTALT, ""); + print_sym(XKB_KEY_ISO_Level3_Shift, KEY_RIGHTALT, ""); + print_sym(XKB_KEY_Mode_switch, KEY_RIGHTALT, ""); fprintf(outfile, "\n" -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304605.1577556 (Exim 4.92) (envelope-from ) id 1wLfEU-0002hy-Ip; Sat, 09 May 2026 10:48:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304605.1577556; Sat, 09 May 2026 10:48:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEU-0002h7-Aw; Sat, 09 May 2026 10:48:30 +0000 Received: by outflank-mailman (input) for mailman id 1304605; Sat, 09 May 2026 10:48:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfES-0002X5-Gq for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfER-007lJU-Tw for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:27 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10ec-5cb7-0a2a0a5109dd-0a2a4508be8e-6 for ; Sat, 09 May 2026 12:48:27 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f9-63b5-0a2a45080019-31d4f359d6d7-3 for ; Sat, 09 May 2026 12:48:27 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2B090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:47:59 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=ROUhaRxtDzPB8FJJRyCm0S9ppDBULPhLkvEBb93D+50=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323679; v=1; b=lzTC9DyfFbto9QQqJIWX4TjTyGPPBAJyLLupmTJeGxRQGJSl/m+z8PbzrGj5hs5Y 84QpcOTGt4CAoUiRUmz6+tjrT/UqoeEQb9qAfhRxtUf7YNGY1wd1b3Lf8a0T6c11 vor9zI6VjIBEyD7sutt1sCCc/pt+vyuQiA4Lr+CzuVgmzPORLpPOaycOiNXJy1aR KB2DGB0ETvv4v37fuYY7QfFxlZDJE9F4XyhrMnY5UaUcbnwTnYSm5SVr4SuKM/aQ E/5b8EMUHyI+CPmrnRojYg9V7ff5dRTjDhRpOe1G4l0ZZ3zplR32h3OZGA5AouHL XzFQzM4WKw9gg6KvIq+S0g== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:22 +0900 Subject: [PATCH RFC 10/28] hw/input/adb-kbd: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-10-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=11545; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=IuNc0nZq13Cfg85XfjaPn1/m1nF4glzSwdiuAeVhaoQ=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gUu3xSqPLlG2uVqgmuKU9vDaMn/3f4kTXl74G97Rw mkd//9PRykLgxgXg6yYIktK0W5ujejaT4UJ8S0wc1iZQIYwcHEKwEQi8hn+x/GuUVd/6lP7xX1l htXZq2nLzl24X71jt8LHrOe79m7oMGP4Xyd7QKOyrOl61MacbtUXanklidZJsRM2Meeov2i8r/u FAwA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c1860d/1778323707-C4E78DB1-4D55FD79/0/0 X-purgate-type: clean X-purgate-size: 11547 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- hw/input/adb-kbd.c | 242 ++++++++++++++++++++++++++--------------------------- 1 file changed, 120 insertions(+), 122 deletions(-) diff --git a/hw/input/adb-kbd.c b/hw/input/adb-kbd.c index 060481d0db6d..c4ef9ebb90c8 100644 --- a/hw/input/adb-kbd.c +++ b/hw/input/adb-kbd.c @@ -26,6 +26,7 @@ #include "hw/input/adb.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "standard-headers/linux/input-event-codes.h" #include "ui/input.h" #include "hw/input/adb-keys.h" #include "adb-internal.h" @@ -55,124 +56,122 @@ struct ADBKeyboardClass { /* The adb keyboard doesn't have every key imaginable */ #define NO_KEY 0xff -int qcode_to_adb_keycode[] = { +int linux_to_adb_keycode[] = { /* Make sure future additions are automatically set to NO_KEY */ - [0 ... 0xff] = NO_KEY, - - [Q_KEY_CODE_SHIFT] = ADB_KEY_LEFT_SHIFT, - [Q_KEY_CODE_SHIFT_R] = ADB_KEY_RIGHT_SHIFT, - [Q_KEY_CODE_ALT] = ADB_KEY_LEFT_OPTION, - [Q_KEY_CODE_ALT_R] = ADB_KEY_RIGHT_OPTION, - [Q_KEY_CODE_CTRL] = ADB_KEY_LEFT_CONTROL, - [Q_KEY_CODE_CTRL_R] = ADB_KEY_RIGHT_CONTROL, - [Q_KEY_CODE_META_L] = ADB_KEY_COMMAND, - [Q_KEY_CODE_META_R] = ADB_KEY_COMMAND, - [Q_KEY_CODE_SPC] = ADB_KEY_SPACEBAR, - - [Q_KEY_CODE_ESC] = ADB_KEY_ESC, - [Q_KEY_CODE_1] = ADB_KEY_1, - [Q_KEY_CODE_2] = ADB_KEY_2, - [Q_KEY_CODE_3] = ADB_KEY_3, - [Q_KEY_CODE_4] = ADB_KEY_4, - [Q_KEY_CODE_5] = ADB_KEY_5, - [Q_KEY_CODE_6] = ADB_KEY_6, - [Q_KEY_CODE_7] = ADB_KEY_7, - [Q_KEY_CODE_8] = ADB_KEY_8, - [Q_KEY_CODE_9] = ADB_KEY_9, - [Q_KEY_CODE_0] = ADB_KEY_0, - [Q_KEY_CODE_MINUS] = ADB_KEY_MINUS, - [Q_KEY_CODE_EQUAL] = ADB_KEY_EQUAL, - [Q_KEY_CODE_BACKSPACE] = ADB_KEY_DELETE, - [Q_KEY_CODE_TAB] = ADB_KEY_TAB, - [Q_KEY_CODE_Q] = ADB_KEY_Q, - [Q_KEY_CODE_W] = ADB_KEY_W, - [Q_KEY_CODE_E] = ADB_KEY_E, - [Q_KEY_CODE_R] = ADB_KEY_R, - [Q_KEY_CODE_T] = ADB_KEY_T, - [Q_KEY_CODE_Y] = ADB_KEY_Y, - [Q_KEY_CODE_U] = ADB_KEY_U, - [Q_KEY_CODE_I] = ADB_KEY_I, - [Q_KEY_CODE_O] = ADB_KEY_O, - [Q_KEY_CODE_P] = ADB_KEY_P, - [Q_KEY_CODE_BRACKET_LEFT] = ADB_KEY_LEFT_BRACKET, - [Q_KEY_CODE_BRACKET_RIGHT] = ADB_KEY_RIGHT_BRACKET, - [Q_KEY_CODE_RET] = ADB_KEY_RETURN, - [Q_KEY_CODE_A] = ADB_KEY_A, - [Q_KEY_CODE_S] = ADB_KEY_S, - [Q_KEY_CODE_D] = ADB_KEY_D, - [Q_KEY_CODE_F] = ADB_KEY_F, - [Q_KEY_CODE_G] = ADB_KEY_G, - [Q_KEY_CODE_H] = ADB_KEY_H, - [Q_KEY_CODE_J] = ADB_KEY_J, - [Q_KEY_CODE_K] = ADB_KEY_K, - [Q_KEY_CODE_L] = ADB_KEY_L, - [Q_KEY_CODE_SEMICOLON] = ADB_KEY_SEMICOLON, - [Q_KEY_CODE_APOSTROPHE] = ADB_KEY_APOSTROPHE, - [Q_KEY_CODE_GRAVE_ACCENT] = ADB_KEY_GRAVE_ACCENT, - [Q_KEY_CODE_BACKSLASH] = ADB_KEY_BACKSLASH, - [Q_KEY_CODE_Z] = ADB_KEY_Z, - [Q_KEY_CODE_X] = ADB_KEY_X, - [Q_KEY_CODE_C] = ADB_KEY_C, - [Q_KEY_CODE_V] = ADB_KEY_V, - [Q_KEY_CODE_B] = ADB_KEY_B, - [Q_KEY_CODE_N] = ADB_KEY_N, - [Q_KEY_CODE_M] = ADB_KEY_M, - [Q_KEY_CODE_COMMA] = ADB_KEY_COMMA, - [Q_KEY_CODE_DOT] = ADB_KEY_PERIOD, - [Q_KEY_CODE_SLASH] = ADB_KEY_FORWARD_SLASH, - [Q_KEY_CODE_ASTERISK] = ADB_KEY_KP_MULTIPLY, - [Q_KEY_CODE_CAPS_LOCK] = ADB_KEY_CAPS_LOCK, - - [Q_KEY_CODE_F1] = ADB_KEY_F1, - [Q_KEY_CODE_F2] = ADB_KEY_F2, - [Q_KEY_CODE_F3] = ADB_KEY_F3, - [Q_KEY_CODE_F4] = ADB_KEY_F4, - [Q_KEY_CODE_F5] = ADB_KEY_F5, - [Q_KEY_CODE_F6] = ADB_KEY_F6, - [Q_KEY_CODE_F7] = ADB_KEY_F7, - [Q_KEY_CODE_F8] = ADB_KEY_F8, - [Q_KEY_CODE_F9] = ADB_KEY_F9, - [Q_KEY_CODE_F10] = ADB_KEY_F10, - [Q_KEY_CODE_F11] = ADB_KEY_F11, - [Q_KEY_CODE_F12] = ADB_KEY_F12, - [Q_KEY_CODE_PRINT] = ADB_KEY_F13, - [Q_KEY_CODE_SYSRQ] = ADB_KEY_F13, - [Q_KEY_CODE_SCROLL_LOCK] = ADB_KEY_F14, - [Q_KEY_CODE_PAUSE] = ADB_KEY_F15, - - [Q_KEY_CODE_NUM_LOCK] = ADB_KEY_KP_CLEAR, - [Q_KEY_CODE_KP_EQUALS] = ADB_KEY_KP_EQUAL, - [Q_KEY_CODE_KP_DIVIDE] = ADB_KEY_KP_DIVIDE, - [Q_KEY_CODE_KP_MULTIPLY] = ADB_KEY_KP_MULTIPLY, - [Q_KEY_CODE_KP_SUBTRACT] = ADB_KEY_KP_SUBTRACT, - [Q_KEY_CODE_KP_ADD] = ADB_KEY_KP_PLUS, - [Q_KEY_CODE_KP_ENTER] = ADB_KEY_KP_ENTER, - [Q_KEY_CODE_KP_DECIMAL] = ADB_KEY_KP_PERIOD, - [Q_KEY_CODE_KP_0] = ADB_KEY_KP_0, - [Q_KEY_CODE_KP_1] = ADB_KEY_KP_1, - [Q_KEY_CODE_KP_2] = ADB_KEY_KP_2, - [Q_KEY_CODE_KP_3] = ADB_KEY_KP_3, - [Q_KEY_CODE_KP_4] = ADB_KEY_KP_4, - [Q_KEY_CODE_KP_5] = ADB_KEY_KP_5, - [Q_KEY_CODE_KP_6] = ADB_KEY_KP_6, - [Q_KEY_CODE_KP_7] = ADB_KEY_KP_7, - [Q_KEY_CODE_KP_8] = ADB_KEY_KP_8, - [Q_KEY_CODE_KP_9] = ADB_KEY_KP_9, - - [Q_KEY_CODE_UP] = ADB_KEY_UP, - [Q_KEY_CODE_DOWN] = ADB_KEY_DOWN, - [Q_KEY_CODE_LEFT] = ADB_KEY_LEFT, - [Q_KEY_CODE_RIGHT] = ADB_KEY_RIGHT, - - [Q_KEY_CODE_HELP] = ADB_KEY_HELP, - [Q_KEY_CODE_INSERT] = ADB_KEY_HELP, - [Q_KEY_CODE_DELETE] = ADB_KEY_FORWARD_DELETE, - [Q_KEY_CODE_HOME] = ADB_KEY_HOME, - [Q_KEY_CODE_END] = ADB_KEY_END, - [Q_KEY_CODE_PGUP] = ADB_KEY_PAGE_UP, - [Q_KEY_CODE_PGDN] = ADB_KEY_PAGE_DOWN, - - [Q_KEY_CODE_POWER] = ADB_KEY_POWER + [0 ... KEY_MAX] = NO_KEY, + + [KEY_LEFTSHIFT] = ADB_KEY_LEFT_SHIFT, + [KEY_RIGHTSHIFT] = ADB_KEY_RIGHT_SHIFT, + [KEY_LEFTALT] = ADB_KEY_LEFT_OPTION, + [KEY_RIGHTALT] = ADB_KEY_RIGHT_OPTION, + [KEY_LEFTCTRL] = ADB_KEY_LEFT_CONTROL, + [KEY_RIGHTCTRL] = ADB_KEY_RIGHT_CONTROL, + [KEY_LEFTMETA] = ADB_KEY_COMMAND, + [KEY_RIGHTMETA] = ADB_KEY_COMMAND, + [KEY_SPACE] = ADB_KEY_SPACEBAR, + + [KEY_ESC] = ADB_KEY_ESC, + [KEY_1] = ADB_KEY_1, + [KEY_2] = ADB_KEY_2, + [KEY_3] = ADB_KEY_3, + [KEY_4] = ADB_KEY_4, + [KEY_5] = ADB_KEY_5, + [KEY_6] = ADB_KEY_6, + [KEY_7] = ADB_KEY_7, + [KEY_8] = ADB_KEY_8, + [KEY_9] = ADB_KEY_9, + [KEY_0] = ADB_KEY_0, + [KEY_MINUS] = ADB_KEY_MINUS, + [KEY_EQUAL] = ADB_KEY_EQUAL, + [KEY_BACKSPACE] = ADB_KEY_DELETE, + [KEY_TAB] = ADB_KEY_TAB, + [KEY_Q] = ADB_KEY_Q, + [KEY_W] = ADB_KEY_W, + [KEY_E] = ADB_KEY_E, + [KEY_R] = ADB_KEY_R, + [KEY_T] = ADB_KEY_T, + [KEY_Y] = ADB_KEY_Y, + [KEY_U] = ADB_KEY_U, + [KEY_I] = ADB_KEY_I, + [KEY_O] = ADB_KEY_O, + [KEY_P] = ADB_KEY_P, + [KEY_LEFTBRACE] = ADB_KEY_LEFT_BRACKET, + [KEY_RIGHTBRACE] = ADB_KEY_RIGHT_BRACKET, + [KEY_ENTER] = ADB_KEY_RETURN, + [KEY_A] = ADB_KEY_A, + [KEY_S] = ADB_KEY_S, + [KEY_D] = ADB_KEY_D, + [KEY_F] = ADB_KEY_F, + [KEY_G] = ADB_KEY_G, + [KEY_H] = ADB_KEY_H, + [KEY_J] = ADB_KEY_J, + [KEY_K] = ADB_KEY_K, + [KEY_L] = ADB_KEY_L, + [KEY_SEMICOLON] = ADB_KEY_SEMICOLON, + [KEY_APOSTROPHE] = ADB_KEY_APOSTROPHE, + [KEY_GRAVE] = ADB_KEY_GRAVE_ACCENT, + [KEY_BACKSLASH] = ADB_KEY_BACKSLASH, + [KEY_Z] = ADB_KEY_Z, + [KEY_X] = ADB_KEY_X, + [KEY_C] = ADB_KEY_C, + [KEY_V] = ADB_KEY_V, + [KEY_B] = ADB_KEY_B, + [KEY_N] = ADB_KEY_N, + [KEY_M] = ADB_KEY_M, + [KEY_COMMA] = ADB_KEY_COMMA, + [KEY_DOT] = ADB_KEY_PERIOD, + [KEY_SLASH] = ADB_KEY_FORWARD_SLASH, + [KEY_CAPSLOCK] = ADB_KEY_CAPS_LOCK, + + [KEY_F1] = ADB_KEY_F1, + [KEY_F2] = ADB_KEY_F2, + [KEY_F3] = ADB_KEY_F3, + [KEY_F4] = ADB_KEY_F4, + [KEY_F5] = ADB_KEY_F5, + [KEY_F6] = ADB_KEY_F6, + [KEY_F7] = ADB_KEY_F7, + [KEY_F8] = ADB_KEY_F8, + [KEY_F9] = ADB_KEY_F9, + [KEY_F10] = ADB_KEY_F10, + [KEY_F11] = ADB_KEY_F11, + [KEY_F12] = ADB_KEY_F12, + [KEY_SYSRQ] = ADB_KEY_F13, + [KEY_SCROLLLOCK] = ADB_KEY_F14, + [KEY_PAUSE] = ADB_KEY_F15, + + [KEY_NUMLOCK] = ADB_KEY_KP_CLEAR, + [KEY_KPEQUAL] = ADB_KEY_KP_EQUAL, + [KEY_KPSLASH] = ADB_KEY_KP_DIVIDE, + [KEY_KPASTERISK] = ADB_KEY_KP_MULTIPLY, + [KEY_KPMINUS] = ADB_KEY_KP_SUBTRACT, + [KEY_KPPLUS] = ADB_KEY_KP_PLUS, + [KEY_KPENTER] = ADB_KEY_KP_ENTER, + [KEY_KPDOT] = ADB_KEY_KP_PERIOD, + [KEY_KP0] = ADB_KEY_KP_0, + [KEY_KP1] = ADB_KEY_KP_1, + [KEY_KP2] = ADB_KEY_KP_2, + [KEY_KP3] = ADB_KEY_KP_3, + [KEY_KP4] = ADB_KEY_KP_4, + [KEY_KP5] = ADB_KEY_KP_5, + [KEY_KP6] = ADB_KEY_KP_6, + [KEY_KP7] = ADB_KEY_KP_7, + [KEY_KP8] = ADB_KEY_KP_8, + [KEY_KP9] = ADB_KEY_KP_9, + + [KEY_UP] = ADB_KEY_UP, + [KEY_DOWN] = ADB_KEY_DOWN, + [KEY_LEFT] = ADB_KEY_LEFT, + [KEY_RIGHT] = ADB_KEY_RIGHT, + + [KEY_HELP] = ADB_KEY_HELP, + [KEY_INSERT] = ADB_KEY_HELP, + [KEY_DELETE] = ADB_KEY_FORWARD_DELETE, + [KEY_HOME] = ADB_KEY_HOME, + [KEY_END] = ADB_KEY_END, + [KEY_PAGEUP] = ADB_KEY_PAGE_UP, + [KEY_PAGEDOWN] = ADB_KEY_PAGE_DOWN, + + [KEY_POWER] = ADB_KEY_POWER }; static void adb_kbd_put_keycode(void *opaque, int keycode) @@ -309,14 +308,13 @@ static void adb_keyboard_event(DeviceState *dev, QemuConsole *src, QemuInputEvent *evt) { KBDState *s = (KBDState *)dev; - int qcode, keycode; + int keycode; - qcode = qemu_input_linux_to_qcode(evt->key.key); - if (qcode >= ARRAY_SIZE(qcode_to_adb_keycode)) { + if (evt->key.key >= ARRAY_SIZE(linux_to_adb_keycode)) { return; } - /* FIXME: take handler into account when translating qcode */ - keycode = qcode_to_adb_keycode[qcode]; + /* FIXME: take handler into account when translating evt->key.key */ + keycode = linux_to_adb_keycode[evt->key.key]; if (keycode == NO_KEY) { /* We don't want to send this to the guest */ trace_adb_device_kbd_no_key(); return; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304602.1577520 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001ib-LJ; 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bh=xdQOdc7TBZKnyuoO4opRDkTrA3cJx8lBTarnEJcV0aU=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323683; v=1; b=GIZRVXUprHxdgxXu37WO+oDE2tz2qK9qCDhUVa6i501Q91fZ3ewidrfX+a8lpkAF 6GqCbMHjs4ZNM/T0U3JUUNO0lOuRgt45WaPhjxfRUQzQ7L41jedjZJWipNEubGOE phEjj2/PsKnUryJDy3atw73TABpx0Y4RKe2xapC3S35WIb2p/Sj+GgbMhxfd+I70 AZYj1bbqe2j25S7YFoc+uJIXEsy4Kj2NTOTGcdZAcyrOD159de5VRjVD/hXBc01L nZ1SauA8vcN6tXKEc/UJt4UHl2gikPAmNjculIMWV+molbtmhbb9DaqjVYaa6FS5 4ThCfIkHGRDhexBedKxrCQ== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:40 +0900 Subject: [PATCH RFC 28/28] ui/input: Remove unused QKeyCode helpers and keymaps MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-28-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=10998; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=C1sfssKpLnbwImq0G/bJG/Pt5wdJQR3NAMSed0uq3qA=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gTsvbv/RVWZK0P/Ye32FUfvZF0LeavN4fqxacE/m2 LZffzYc7yhlYRDjYpAVU2RJKdrNrRFd+6kwIb4FZg4rE8gQBi5OAZiINAfD/zyXjrvBn7VsX/38 oJZuI3cv/2e13IRlN6JljeY/jlVWsWX4nz7hxrV1iZZ5b0xCA5OvZrmoHWAssvl9n2vl1as9GzJ yuQE= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c201ff/1778323703-D8B78443-CA7F16EE/0/0 X-purgate-type: clean X-purgate-size: 11000 Their users have migrated to Linux key codes. Signed-off-by: Akihiko Odaki --- include/ui/input.h | 50 -------------------------------------------------- ui/input-keymap.c | 39 --------------------------------------- ui/input.c | 18 +----------------- ui/meson.build | 15 --------------- 4 files changed, 1 insertion(+), 121 deletions(-) diff --git a/include/ui/input.h b/include/ui/input.h index caa757ea1c2e..6e4892b73155 100644 --- a/include/ui/input.h +++ b/include/ui/input.h @@ -58,18 +58,13 @@ void qemu_input_event_send_impl(QemuConsole *src, QemuInputEvent *evt); void qemu_input_event_sync(void); void qemu_input_event_sync_impl(void); -void qemu_input_event_send_key(QemuConsole *src, KeyValue *key, bool down); void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, bool down); void qemu_input_event_send_key_number(QemuConsole *src, int num, bool down); -void qemu_input_event_send_key_qcode(QemuConsole *src, QKeyCode q, bool down); void qemu_input_event_send_key_delay(uint32_t delay_ms); int qemu_input_key_number_to_qcode(unsigned int nr); unsigned int qemu_input_key_number_to_linux(unsigned int nr); -int qemu_input_key_value_to_number(const KeyValue *value); -int qemu_input_key_value_to_qcode(const KeyValue *value); unsigned int qemu_input_key_value_to_linux(const KeyValue *value); -int qemu_input_qcode_to_scancode(QKeyCode qcode, bool down, int *codes); int qemu_input_linux_to_scancode(unsigned int lnx, bool down, int *codes); int qemu_input_linux_to_qcode(unsigned int lnx); @@ -94,96 +89,51 @@ void qemu_input_check_mode_change(void); void qemu_add_mouse_mode_change_notifier(Notifier *notify); void qemu_remove_mouse_mode_change_notifier(Notifier *notify); -extern const guint qemu_input_map_atset1_to_qcode_len; -extern const guint16 qemu_input_map_atset1_to_qcode[]; - extern const guint qemu_input_map_atset1_to_linux_len; extern const guint16 qemu_input_map_atset1_to_linux[]; extern const guint qemu_input_map_linux_to_qcode_len; extern const guint16 qemu_input_map_linux_to_qcode[]; -extern const guint qemu_input_map_qcode_to_atset1_len; -extern const guint16 qemu_input_map_qcode_to_atset1[]; - extern const guint qemu_input_map_linux_to_atset1_len; extern const guint16 qemu_input_map_linux_to_atset1[]; -extern const guint qemu_input_map_qcode_to_atset2_len; -extern const guint16 qemu_input_map_qcode_to_atset2[]; - extern const guint qemu_input_map_linux_to_atset2_len; extern const guint16 qemu_input_map_linux_to_atset2[]; -extern const guint qemu_input_map_qcode_to_atset3_len; -extern const guint16 qemu_input_map_qcode_to_atset3[]; - extern const guint qemu_input_map_linux_to_atset3_len; extern const guint16 qemu_input_map_linux_to_atset3[]; extern const guint qemu_input_map_qcode_to_linux_len; extern const guint16 qemu_input_map_qcode_to_linux[]; -extern const guint qemu_input_map_qcode_to_qnum_len; -extern const guint16 qemu_input_map_qcode_to_qnum[]; - extern const guint qemu_input_map_linux_to_qnum_len; extern const guint16 qemu_input_map_linux_to_qnum[]; -extern const guint qemu_input_map_qcode_to_sun_len; -extern const guint16 qemu_input_map_qcode_to_sun[]; - extern const guint qemu_input_map_linux_to_sun_len; extern const guint16 qemu_input_map_linux_to_sun[]; -extern const guint qemu_input_map_qnum_to_qcode_len; -extern const guint16 qemu_input_map_qnum_to_qcode[]; - extern const guint qemu_input_map_qnum_to_linux_len; extern const guint16 qemu_input_map_qnum_to_linux[]; -extern const guint qemu_input_map_usb_to_qcode_len; -extern const guint16 qemu_input_map_usb_to_qcode[]; - extern const guint qemu_input_map_usb_to_linux_len; extern const guint16 qemu_input_map_usb_to_linux[]; -extern const guint qemu_input_map_win32_to_qcode_len; -extern const guint16 qemu_input_map_win32_to_qcode[]; - extern const guint qemu_input_map_win32_to_linux_len; extern const guint16 qemu_input_map_win32_to_linux[]; -extern const guint qemu_input_map_x11_to_qcode_len; -extern const guint16 qemu_input_map_x11_to_qcode[]; - extern const guint qemu_input_map_x11_to_linux_len; extern const guint16 qemu_input_map_x11_to_linux[]; -extern const guint qemu_input_map_xorgevdev_to_qcode_len; -extern const guint16 qemu_input_map_xorgevdev_to_qcode[]; - -extern const guint qemu_input_map_xorgkbd_to_qcode_len; -extern const guint16 qemu_input_map_xorgkbd_to_qcode[]; - extern const guint qemu_input_map_xorgkbd_to_linux_len; extern const guint16 qemu_input_map_xorgkbd_to_linux[]; -extern const guint qemu_input_map_xorgxquartz_to_qcode_len; -extern const guint16 qemu_input_map_xorgxquartz_to_qcode[]; - extern const guint qemu_input_map_xorgxquartz_to_linux_len; extern const guint16 qemu_input_map_xorgxquartz_to_linux[]; -extern const guint qemu_input_map_xorgxwin_to_qcode_len; -extern const guint16 qemu_input_map_xorgxwin_to_qcode[]; - extern const guint qemu_input_map_xorgxwin_to_linux_len; extern const guint16 qemu_input_map_xorgxwin_to_linux[]; -extern const guint qemu_input_map_osx_to_qcode_len; -extern const guint16 qemu_input_map_osx_to_qcode[]; - extern const guint qemu_input_map_osx_to_linux_len; extern const guint16 qemu_input_map_osx_to_linux[]; diff --git a/ui/input-keymap.c b/ui/input-keymap.c index 2b77ef09fd66..ec2a1fbc1a95 100644 --- a/ui/input-keymap.c +++ b/ui/input-keymap.c @@ -4,36 +4,21 @@ #include "standard-headers/linux/input.h" -#include "ui/input-keymap-atset1-to-qcode.c.inc" #include "ui/input-keymap-atset1-to-linux.c.inc" #include "ui/input-keymap-linux-to-qcode.c.inc" -#include "ui/input-keymap-qcode-to-atset1.c.inc" #include "ui/input-keymap-linux-to-atset1.c.inc" -#include "ui/input-keymap-qcode-to-atset2.c.inc" #include "ui/input-keymap-linux-to-atset2.c.inc" -#include "ui/input-keymap-qcode-to-atset3.c.inc" #include "ui/input-keymap-linux-to-atset3.c.inc" #include "ui/input-keymap-qcode-to-linux.c.inc" -#include "ui/input-keymap-qcode-to-qnum.c.inc" #include "ui/input-keymap-linux-to-qnum.c.inc" -#include "ui/input-keymap-qcode-to-sun.c.inc" #include "ui/input-keymap-linux-to-sun.c.inc" -#include "ui/input-keymap-qnum-to-qcode.c.inc" #include "ui/input-keymap-qnum-to-linux.c.inc" -#include "ui/input-keymap-usb-to-qcode.c.inc" #include "ui/input-keymap-usb-to-linux.c.inc" -#include "ui/input-keymap-win32-to-qcode.c.inc" #include "ui/input-keymap-win32-to-linux.c.inc" -#include "ui/input-keymap-x11-to-qcode.c.inc" #include "ui/input-keymap-x11-to-linux.c.inc" -#include "ui/input-keymap-xorgevdev-to-qcode.c.inc" -#include "ui/input-keymap-xorgkbd-to-qcode.c.inc" #include "ui/input-keymap-xorgkbd-to-linux.c.inc" -#include "ui/input-keymap-xorgxquartz-to-qcode.c.inc" #include "ui/input-keymap-xorgxquartz-to-linux.c.inc" -#include "ui/input-keymap-xorgxwin-to-qcode.c.inc" #include "ui/input-keymap-xorgxwin-to-linux.c.inc" -#include "ui/input-keymap-osx-to-qcode.c.inc" #include "ui/input-keymap-osx-to-linux.c.inc" int qemu_input_linux_to_qcode(unsigned int lnx) @@ -44,19 +29,6 @@ int qemu_input_linux_to_qcode(unsigned int lnx) return qemu_input_map_linux_to_qcode[lnx]; } -int qemu_input_key_value_to_number(const KeyValue *value) -{ - if (value->type == KEY_VALUE_KIND_QCODE) { - if (value->u.qcode.data >= qemu_input_map_qcode_to_qnum_len) { - return 0; - } - return qemu_input_map_qcode_to_qnum[value->u.qcode.data]; - } else { - assert(value->type == KEY_VALUE_KIND_NUMBER); - return value->u.number.data; - } -} - int qemu_input_key_number_to_qcode(unsigned int nr) { return qemu_input_linux_to_qcode(qemu_input_key_number_to_linux(nr)); @@ -70,11 +42,6 @@ unsigned int qemu_input_key_number_to_linux(unsigned int nr) return qemu_input_map_qnum_to_linux[nr]; } -int qemu_input_key_value_to_qcode(const KeyValue *value) -{ - return qemu_input_linux_to_qcode(qemu_input_key_value_to_linux(value)); -} - unsigned int qemu_input_key_value_to_linux(const KeyValue *value) { switch (value->type) { @@ -89,12 +56,6 @@ unsigned int qemu_input_key_value_to_linux(const KeyValue *value) } } -int qemu_input_qcode_to_scancode(QKeyCode qcode, bool down, int *codes) -{ - return qemu_input_linux_to_scancode(qemu_input_map_qcode_to_linux[qcode], - down, codes); -} - int qemu_input_linux_to_scancode(unsigned int lnx, bool down, int *codes) { int keycode = lnx < qemu_input_map_linux_to_qnum_len ? diff --git a/ui/input.c b/ui/input.c index e3e277117949..2524abaedf7b 100644 --- a/ui/input.c +++ b/ui/input.c @@ -352,14 +352,6 @@ void qemu_input_event_sync(void) replay_input_sync_event(); } -void qemu_input_event_send_key(QemuConsole *src, KeyValue *key, bool down) -{ - unsigned int lnx = qemu_input_key_value_to_linux(key); - - g_free(key); - qemu_input_event_send_key_linux(src, lnx, down); -} - void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, bool down) { @@ -383,15 +375,7 @@ void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, void qemu_input_event_send_key_number(QemuConsole *src, int num, bool down) { unsigned int lnx = qemu_input_key_number_to_linux(num); - qemu_input_event_send_key_qcode(src, lnx, down); -} - -void qemu_input_event_send_key_qcode(QemuConsole *src, QKeyCode q, bool down) -{ - KeyValue *key = g_new0(KeyValue, 1); - key->type = KEY_VALUE_KIND_QCODE; - key->u.qcode.data = q; - qemu_input_event_send_key(src, key, down); + qemu_input_event_send_key_linux(src, lnx, down); } void qemu_input_event_send_key_delay(uint32_t delay_ms) diff --git a/ui/meson.build b/ui/meson.build index 4aa2a38c52f4..0b810925d2db 100644 --- a/ui/meson.build +++ b/ui/meson.build @@ -149,36 +149,21 @@ if spice.found() endif keymaps = [ - ['atset1', 'qcode'], ['atset1', 'linux'], ['linux', 'qcode'], - ['qcode', 'atset1'], ['linux', 'atset1'], - ['qcode', 'atset2'], ['linux', 'atset2'], - ['qcode', 'atset3'], ['linux', 'atset3'], ['qcode', 'linux'], - ['qcode', 'qnum'], ['linux', 'qnum'], - ['qcode', 'sun'], ['linux', 'sun'], - ['qnum', 'qcode'], ['qnum', 'linux'], - ['usb', 'qcode'], ['usb', 'linux'], - ['win32', 'qcode'], ['win32', 'linux'], - ['x11', 'qcode'], ['x11', 'linux'], - ['xorgevdev', 'qcode'], - ['xorgkbd', 'qcode'], ['xorgkbd', 'linux'], - ['xorgxquartz', 'qcode'], ['xorgxquartz', 'linux'], - ['xorgxwin', 'qcode'], ['xorgxwin', 'linux'], - ['osx', 'qcode'], ['osx', 'linux'], ] -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304603.1577542 (Exim 4.92) (envelope-from ) id 1wLfER-0002Ql-Vu; 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bh=8DrbNDimPytD2Lqd2BsnuvqZLeFlu5Z+sunaR47ICfs=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323681; v=1; b=EZUG6OgWnMEi80mWOv2bjQh69KIzj095fUuL+GG0Y+Ocgqc0ySNqx21bn9jTgoBi gIOOXCAYQ6WtAM8ujVLEiqtd9gSR0j4rd4xO7o5RqI2XPMW3/UooD+7tSggeiP4L gE0NUbscSS8YA+Mx1Gfr2UylEtbic/4xW8GTk6m2P9EznvTyEH4iV/4IZA+UHNGx dUmXYXfrVKC7U3HU4oua43HgpUYTg1YNjbSpvneEbJ8jidGE8CTbWnEeqeiXZVip MXUMoqwQTbNunaDlZcL3/vUInNW0z7NbHiONGReOLeJaq1Zb585hY6sdxGHqBKgs ZyyMt54SD4C3BEJvhcbbUw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:32 +0900 Subject: [PATCH RFC 20/28] ui/input-legacy: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-20-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=2048; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=Fw4LZt0Zxdxd+pp/aswa6uqQEJsaIMY4eIVuWOuDFDU=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gRuRrFtN2E/2hy4vFXHjb+T9L3/4tGJiRbZhv8OPb n3ll5YdpSwMYlwMsmKKLClFu7k1oms/FSbEt8DMYWUCGcLAxSkAE7nAz/A/x8pUpe/X57bWK/cM bW+638299/u5v635S2aD3y8sV8SyMjIsmraO89bZEL2iixLlB53cTK4dZf/jVxn+dprRhGtK56R 5AA== X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c201ff/1778323706-E338A443-BC534A78/0/0 X-purgate-type: clean X-purgate-size: 2050 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- ui/input-legacy.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/ui/input-legacy.c b/ui/input-legacy.c index e2b48dd8f0aa..193c9ae2ef9f 100644 --- a/ui/input-legacy.c +++ b/ui/input-legacy.c @@ -71,23 +71,11 @@ int index_from_key(const char *key, size_t key_length) return i; } -static KeyValue *copy_key_value(KeyValue *src) -{ - KeyValue *dst = g_new(KeyValue, 1); - memcpy(dst, src, sizeof(*src)); - if (dst->type == KEY_VALUE_KIND_NUMBER) { - QKeyCode code = qemu_input_key_number_to_qcode(dst->u.number.data); - dst->type = KEY_VALUE_KIND_QCODE; - dst->u.qcode.data = code; - } - return dst; -} - void qmp_send_key(KeyValueList *keys, bool has_hold_time, int64_t hold_time, Error **errp) { KeyValueList *p; - KeyValue **up = NULL; + unsigned int *up = NULL; int count = 0; if (!has_hold_time) { @@ -95,15 +83,15 @@ void qmp_send_key(KeyValueList *keys, bool has_hold_time, int64_t hold_time, } for (p = keys; p != NULL; p = p->next) { - qemu_input_event_send_key(NULL, copy_key_value(p->value), true); - qemu_input_event_send_key_delay(hold_time); up = g_realloc(up, sizeof(*up) * (count+1)); - up[count] = copy_key_value(p->value); + up[count] = qemu_input_key_value_to_linux(p->value); + qemu_input_event_send_key_linux(NULL, up[count], true); + qemu_input_event_send_key_delay(hold_time); count++; } while (count) { count--; - qemu_input_event_send_key(NULL, up[count], false); + qemu_input_event_send_key_linux(NULL, up[count], false); qemu_input_event_send_key_delay(hold_time); } g_free(up); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 17:01:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 17:01:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304888.1577569 (Exim 4.92) (envelope-from ) id 1wLl2v-0002tL-Ki; Sat, 09 May 2026 17:00:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304888.1577569; Sat, 09 May 2026 17:00:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLl2v-0002tC-Fk; Sat, 09 May 2026 17:00:57 +0000 Received: by outflank-mailman (input) for mailman id 1304888; Sat, 09 May 2026 17:00:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLl2t-0002t6-Un for xen-devel@lists.xenproject.org; Sat, 09 May 2026 17:00:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLl2s-001bV2-VQ for xen-devel@lists.xenproject.org; Sat, 09 May 2026 19:00:55 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff6830-2eae-0a2a0a5409dd-0a2a45048f3a-26 for ; Sat, 09 May 2026 19:00:54 +0200 Received: from [209.85.222.180] (helo=mail-qk1-f180.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff6845-1dec-0a2a45040019-d155deb4a4ee-3 for ; Sat, 09 May 2026 19:00:54 +0200 Received: by mail-qk1-f180.google.com with SMTP id af79cd13be357-8dbbc6c16b2so404700585a.0 for ; Sat, 09 May 2026 10:00:54 -0700 (PDT) Received: from ziepe.ca (crbknf0213w-47-54-130-67.pppoe-dynamic.high-speed.nl.bellaliant.net. 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Message-ID: <20260509170051.GD9285@ziepe.ca> References: <1776873531.8631fc262581453bbf619ec5b2062170.19db5ea67ab000f373@vates.tech> <20260426133027.GB3501894@ziepe.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-ebf023/1778346054-2A5603FF-95453907/0/0 X-purgate-type: clean X-purgate-size: 2153 On Thu, May 07, 2026 at 08:02:40AM +0000, Tian, Kevin wrote: > > From: Jason Gunthorpe > > Sent: Sunday, April 26, 2026 9:30 PM > > > > On Thu, Apr 23, 2026 at 08:01:50AM +0000, Tian, Kevin wrote: > > > > On Xen, we have a dedicated hypercalls for moving a device into another > > > > guest (so it no longer belongs in Dom0, at far as DMA is concerned). > > > > > > > > But it looks like there are no way to describe that idea of "attach that > > > > device to this VM" nor "the device is in a VM"; which makes that > > > > impracticable. > > > > > > > > There may be things that could be done with the vIOMMU objects, but > > > > there would be no "parent domain" in such case, as said earlier it > > > > doesn't exist in the IOMMU subsystem. > > > > > > > > What is expected to be done instead ? > > > > > > > > Teddy > > > > > > > > [1] https://www.youtube.com/watch?v=pLMGRgEJ-Eg > > > > > > > > > > It'd be much easier to collect comments if you can put plain words > > > to explain the problem rather than expecting other folks to watch > > > the video first... > > > > It sounds like CC and pkvm to me so I think it should re-use those > > mechanisms.. > > > > for CC and pkvm the guest memory is still allocated from host. >From an iommu perspective that doesn't entirely matter, what it sees is that the translation is controlled by some secure world and it only needs a way to associate the kvm handle for the secure world with any required call for configuring the viommu. It is not very different from KVM installing encrypted pages that have been completed unmapped from all page tables in the hypervisor into the VM's secure EPT through TDX calls and then iommufd creating a viommu that re-uses the secure EPT. The only thing dealing with the memory map is KVM. I'd expect Xen to work the same, however the invisible memory was affiliated with the VM through KVM the iommu side should pick up the KVM and then request a VIOMMU to be setup for the VFIO device on the target KVM and that should trigger the hypercalls to move the device into the selected guest. Jason From xen-devel-bounces@lists.xenproject.org Sat May 09 17:17:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 17:17:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304899.1577578 (Exim 4.92) (envelope-from ) id 1wLlIW-0004kF-TD; Sat, 09 May 2026 17:17:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304899.1577578; Sat, 09 May 2026 17:17:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLlIW-0004k8-P6; Sat, 09 May 2026 17:17:04 +0000 Received: by outflank-mailman (input) for mailman id 1304899; Sat, 09 May 2026 17:17:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLlIU-0004k2-GJ for xen-devel@lists.xenproject.org; Sat, 09 May 2026 17:17:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLlIT-0026KT-TV for xen-devel@lists.xenproject.org; Sat, 09 May 2026 19:17:01 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff6bfe-5cb7-0a2a0a5109dd-0a2a4502e204-8 for ; Sat, 09 May 2026 19:17:01 +0200 Received: from [170.10.133.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff6c0c-af86-0a2a45020019-aa0a857c766d-3 for ; Sat, 09 May 2026 19:17:01 +0200 Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-636-BfaoMpQBOwe2Oicoz6BwWg-1; Sat, 09 May 2026 13:16:55 -0400 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 6AB3819560B4; Sat, 9 May 2026 17:16:50 +0000 (UTC) Received: from localhost (unknown [10.44.24.4]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 444FB3002D30; Sat, 9 May 2026 17:16:44 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778347020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S55zZ457fOtWSDgpU0+d8V9m5MMTKNlkmEv79oOosxI=; b=C+TmSI3nIwTwD4oIrctDe9CWbo9P2q+dcej67Ab4ATrZPkE20KAHf35ntdpwWOVz0YQN94 6WlFODnMCIPPg/WEWa8JdCVptM+ojhMTuYepz/WHVG13+ZCDh8BgfbWeQ+brjM+7yKXRYq WcWL1NzGNzlDeUROA94epJNehYQy2T0= X-MC-Unique: BfaoMpQBOwe2Oicoz6BwWg-1 X-Mimecast-MFC-AGG-ID: BfaoMpQBOwe2Oicoz6BwWg_1778347011 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: stefanha@gmail.com, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Jan Kiszka , Peter Maydell , Phil Dennis-Jordan , Richard Henderson , Helge Deller , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Gerd Hoffmann , Mark Cave-Ayland , Samuel Tardieu , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , Jean-Christophe Dubois , Laurent Vivier , Thomas Huth , BALATON Zoltan , "Michael S. Tsirkin" , Stefano Garzarella , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Akihiko Odaki , Dmitry Osipenko , Dmitry Fleytman , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Alistair Francis , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org (open list:Musicpal), qemu-ppc@nongnu.org (open list:sam460ex), xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PULL v2 28/33] ui/console: rename public API to use consistent qemu_console_ prefix Date: Sat, 9 May 2026 21:13:49 +0400 Message-ID: <20260509171356.1157879-29-marcandre.lureau@redhat.com> In-Reply-To: <20260509171356.1157879-1-marcandre.lureau@redhat.com> References: <20260509171356.1157879-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: D35fY0rVM-B65eHF4-ZLT2s8iET6TQw44jBDt0cMmao_1778347011 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778347021-7BD672C1-286549E4/0/0 X-purgate-type: clean X-purgate-size: 114193 From: Marc-André Lureau Rename the display and graphic console public functions to follow a consistent qemu_console_ (or qemu_graphic_console_) naming convention. The previous API used a mix of prefixes: dpy_, graphic_hw_, graphic_console_, console_has_, and update_displaychangelistener(). Unify them under a common qemu_console_ namespace for better discoverability and consistency. The main renames are: - dpy_gfx_*() / dpy_text_*() / dpy_gl_*() → qemu_console_*() - dpy_{get,set}_ui_info() → qemu_console_{get,set}_ui_info() - graphic_hw_*() → qemu_console_hw_*() - graphic_console_*() → qemu_graphic_console_*() - console_has_gl() → qemu_console_has_gl() - update_displaychangelistener() → qemu_console_listener_set_refresh() No functional changes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Marc-André Lureau --- include/ui/console.h | 108 ++++++++++++------------ hw/arm/musicpal.c | 4 +- hw/display/artist.c | 4 +- hw/display/ati.c | 16 ++-- hw/display/bcm2835_fb.c | 5 +- hw/display/bochs-display.c | 14 ++-- hw/display/cg3.c | 6 +- hw/display/cirrus_vga.c | 8 +- hw/display/cirrus_vga_isa.c | 2 +- hw/display/dm163.c | 6 +- hw/display/exynos4210_fimd.c | 4 +- hw/display/g364fb.c | 10 +-- hw/display/imx6ul_lcdif.c | 14 ++-- hw/display/jazz_led.c | 8 +- hw/display/macfb.c | 6 +- hw/display/next-fb.c | 4 +- hw/display/omap_lcdc.c | 4 +- hw/display/pl110.c | 4 +- hw/display/qxl-render.c | 12 +-- hw/display/qxl.c | 14 ++-- hw/display/ramfb-standalone.c | 2 +- hw/display/ramfb.c | 4 +- hw/display/sm501.c | 6 +- hw/display/ssd0303.c | 4 +- hw/display/ssd0323.c | 5 +- hw/display/tcx.c | 16 ++-- hw/display/vga-isa.c | 2 +- hw/display/vga-mmio.c | 2 +- hw/display/vga-pci.c | 6 +- hw/display/vga.c | 40 +++++---- hw/display/vhost-user-gpu.c | 22 ++--- hw/display/virtio-gpu-base.c | 2 +- hw/display/virtio-gpu-rutabaga.c | 10 +-- hw/display/virtio-gpu-udmabuf.c | 4 +- hw/display/virtio-gpu-virgl.c | 20 ++--- hw/display/virtio-gpu.c | 26 +++--- hw/display/virtio-vga.c | 2 +- hw/display/vmware_vga.c | 12 +-- hw/display/xenfb.c | 6 +- hw/display/xlnx_dp.c | 10 +-- hw/vfio/display.c | 32 +++---- ui/console-vc.c | 12 +-- ui/console.c | 140 +++++++++++++++---------------- ui/curses.c | 8 +- ui/dbus-console.c | 4 +- ui/dbus-listener.c | 10 +-- ui/egl-headless.c | 4 +- ui/gtk-egl.c | 6 +- ui/gtk-gl-area.c | 6 +- ui/gtk.c | 18 ++-- ui/sdl2-2d.c | 2 +- ui/sdl2-gl.c | 2 +- ui/sdl2.c | 6 +- ui/spice-display.c | 16 ++-- ui/vnc.c | 22 ++--- hw/display/apple-gfx.m | 16 ++-- ui/cocoa.m | 10 +-- 57 files changed, 379 insertions(+), 389 deletions(-) diff --git a/include/ui/console.h b/include/ui/console.h index 69ac7b01b33..cfa940d4c66 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -294,49 +294,49 @@ DisplayState *init_displaystate(void); void qemu_console_register_listener(QemuConsole *con, DisplayChangeListener *dcl, const DisplayChangeListenerOps *ops); -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval); +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval); void qemu_console_unregister_listener(DisplayChangeListener *dcl); -bool dpy_ui_info_supported(const QemuConsole *con); -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con); -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); - -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_gfx_update_full(QemuConsole *con); -void dpy_gfx_replace_surface(QemuConsole *con, - DisplaySurface *surface); -void dpy_text_cursor(QemuConsole *con, int x, int y); -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_text_resize(QemuConsole *con, int w, int h); -void dpy_mouse_set(QemuConsole *con, int x, int y, bool on); -void dpy_cursor_define(QemuConsole *con, QEMUCursor *cursor); -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format); - -void dpy_gl_scanout_disable(QemuConsole *con); -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, bool backing_y_0_top, - uint32_t backing_width, uint32_t backing_height, - uint32_t x, uint32_t y, uint32_t w, uint32_t h, - void *d3d_tex2d); -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y); -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y); -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h); - -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - QEMUGLParams *params); -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); - -bool console_has_gl(QemuConsole *con); +bool qemu_console_ui_info_supported(const QemuConsole *con); +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con); +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); + +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_update_full(QemuConsole *con); +void qemu_console_set_surface(QemuConsole *con, + DisplaySurface *surface); +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y); +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_text_resize(QemuConsole *con, int w, int h); +void qemu_console_set_mouse(QemuConsole *con, int x, int y, bool on); +void qemu_console_set_cursor(QemuConsole *con, QEMUCursor *cursor); +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format); + +void qemu_console_gl_scanout_disable(QemuConsole *con); +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, bool backing_y_0_top, + uint32_t backing_width, uint32_t backing_height, + uint32_t x, uint32_t y, uint32_t w, uint32_t h, + void *d3d_tex2d); +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y); +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y); +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h); + +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *params); +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); + +bool qemu_console_has_gl(QemuConsole *con); enum { GRAPHIC_FLAGS_NONE = 0, @@ -361,19 +361,19 @@ typedef struct GraphicHwOps { void (*gl_block)(void *opaque, bool block); } GraphicHwOps; -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *ops, - void *opaque); -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque); -void graphic_console_close(QemuConsole *con); - -void graphic_hw_update(QemuConsole *con); -void graphic_hw_update_done(QemuConsole *con); -void graphic_hw_invalidate(QemuConsole *con); -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata); -void graphic_hw_gl_block(QemuConsole *con, bool block); +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *ops, + void *opaque); +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque); +void qemu_graphic_console_close(QemuConsole *con); + +void qemu_console_hw_update(QemuConsole *con); +void qemu_console_hw_update_done(QemuConsole *con); +void qemu_console_hw_invalidate(QemuConsole *con); +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata); +void qemu_console_hw_gl_block(QemuConsole *con, bool block); void qemu_console_early_init(void); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index ba88ed756e2..83676eb7fea 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -170,7 +170,7 @@ static bool lcd_refresh(void *opaque) } } - dpy_gfx_update(s->con, 0, 0, 128*3, 64*3); + qemu_console_update(s->con, 0, 0, 128*3, 64*3); return true; } @@ -253,7 +253,7 @@ static const GraphicHwOps musicpal_gfx_ops = { static void musicpal_lcd_realize(DeviceState *dev, Error **errp) { musicpal_lcd_state *s = MUSICPAL_LCD(dev); - s->con = graphic_console_init(dev, 0, &musicpal_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &musicpal_gfx_ops, s); qemu_console_resize(s->con, 128 * 3, 64 * 3); } diff --git a/hw/display/artist.c b/hw/display/artist.c index a07508378c7..288d466ec64 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1324,7 +1324,7 @@ static bool artist_update_display(void *opaque) artist_draw_cursor(s); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->width, last - first + 1); + qemu_console_update(s->con, 0, first, s->width, last - first + 1); } return true; @@ -1424,7 +1424,7 @@ static void artist_realizefn(DeviceState *dev, Error **errp) s->misc_video |= 0x0A000000; s->misc_ctrl |= 0x00800000; - s->con = graphic_console_init(dev, 0, &artist_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &artist_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/ati.c b/hw/display/ati.c index 3a7d45a8820..d77589df67a 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -161,7 +161,7 @@ static void ati_cursor_define(ATIVGAState *s) } cursor_set_mono(s->cursor, s->regs.cur_color1, s->regs.cur_color0, (uint8_t *)&data[64], 1, (uint8_t *)&data[0]); - dpy_cursor_define(s->vga.con, s->cursor); + qemu_console_set_cursor(s->vga.con, s->cursor); } /* Alternatively support guest rendered hardware cursor */ @@ -626,9 +626,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, if (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) { ati_cursor_define(s); } - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, - (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, + (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); } } if ((val & (CRTC2_EXT_DISP_EN | CRTC2_EN)) != @@ -780,8 +780,8 @@ static void ati_mm_write(void *opaque, hwaddr addr, } if (!s->cursor_guest_mode && (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) && !(t & BIT(31))) { - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, true); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, true); } break; } @@ -1094,7 +1094,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) } vga_init(vga, OBJECT(s), pci_address_space(dev), pci_address_space_io(dev), true); - vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, vga); + vga->con = qemu_graphic_console_create(DEVICE(s), 0, s->vga.hw_ops, vga); if (s->cursor_guest_mode) { vga->cursor_invalidate = ati_cursor_invalidate; vga->cursor_draw_line = ati_cursor_draw_line; @@ -1167,7 +1167,7 @@ static void ati_vga_exit(PCIDevice *dev) ATIVGAState *s = ATI_VGA(dev); timer_del(&s->vblank_timer); - graphic_console_close(s->vga.con); + qemu_graphic_console_close(s->vga.con); } static const Property ati_vga_properties[] = { diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 83c4c03c7ca..bd58f625fcd 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -207,8 +207,7 @@ static bool fb_update_display(void *opaque) draw_line_src16, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->config.xres, - last - first + 1); + qemu_console_update(s->con, 0, first, s->config.xres, last - first + 1); } s->invalidate = false; @@ -427,7 +426,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp) bcm2835_fb_reset(dev); - s->con = graphic_console_init(dev, 0, &vgafb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &vgafb_ops, s); qemu_console_resize(s->con, s->config.xres, s->config.yres); } diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 8ef9b76cf85..64e669429c4 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -224,12 +224,12 @@ static bool bochs_display_update(void *opaque) mode.format, mode.stride, ptr + mode.offset); - dpy_gfx_replace_surface(s->con, ds); + qemu_console_set_surface(s->con, ds); full_update = true; } if (full_update) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } else { snap = memory_region_snapshot_and_clear_dirty(&s->vram, mode.offset, mode.size, @@ -243,14 +243,12 @@ static bool bochs_display_update(void *opaque) ys = y; } if (!dirty && ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); ys = -1; } } if (ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); } g_free(snap); @@ -279,7 +277,7 @@ static void bochs_display_realize(PCIDevice *dev, Error **errp) } s->vgamem = pow2ceil(s->vgamem); - s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, &bochs_display_gfx_ops, s); memory_region_init_ram(&s->vram, obj, "bochs-display-vram", s->vgamem, &error_fatal); @@ -344,7 +342,7 @@ static void bochs_display_exit(PCIDevice *dev) { BochsDisplayState *s = BOCHS_DISPLAY(dev); - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); } static const Property bochs_display_properties[] = { diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 963bb3427a6..f9dda1549dd 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -137,7 +137,7 @@ static bool cg3_update_display(void *opaque) } } else { if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } pix += width; @@ -146,7 +146,7 @@ static bool cg3_update_display(void *opaque) } s->full_update = 0; if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { @@ -311,7 +311,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); - s->con = graphic_console_init(dev, 0, &cg3_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &cg3_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 48be3c8a932..0a8c74e1374 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -779,9 +779,9 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) s->cirrus_blt_width, s->cirrus_blt_height); if (notify) { - dpy_gfx_update(s->vga.con, dx, dy, - s->cirrus_blt_width / depth, - s->cirrus_blt_height); + qemu_console_update(s->vga.con, dx, dy, + s->cirrus_blt_width / depth, + s->cirrus_blt_height); } /* we don't have to notify the display that this portion has @@ -2964,7 +2964,7 @@ static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) } cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), pci_address_space_io(dev)); - s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); /* setup PCI */ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000); diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 76034a88605..b8052d1d8ed 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -62,7 +62,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0, isa_address_space(isadev), isa_address_space_io(isadev)); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ diff --git a/hw/display/dm163.c b/hw/display/dm163.c index 9ea62cb4f76..afade0b98c3 100644 --- a/hw/display/dm163.c +++ b/hw/display/dm163.c @@ -277,8 +277,8 @@ static uint32_t *update_display_of_row(DM163State *s, uint32_t *dest, } } - dpy_gfx_update(s->console, 0, LED_SQUARE_SIZE * row, - RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); + qemu_console_update(s->console, 0, LED_SQUARE_SIZE * row, + RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); s->redraw &= ~(1 << row); trace_dm163_redraw(s->redraw); @@ -322,7 +322,7 @@ static void dm163_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, dm163_en_b_gpio_handler, 1); qdev_init_gpio_out_named(dev, &s->sout, "sout", 1); - s->console = graphic_console_init(dev, 0, &dm163_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &dm163_ops, s); qemu_console_resize(s->console, RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, RGB_MATRIX_NUM_ROWS * LED_SQUARE_SIZE); } diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index a91f04aaf79..5133623ee2e 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1340,7 +1340,7 @@ static bool exynos4210_fimd_update(void *opaque) fimd_copy_line_toqemu(global_width, s->ifb + global_width * line * RGBA_SIZE, d + global_width * line * bpp); } - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); } s->invalidate = false; s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND; @@ -1964,7 +1964,7 @@ static void exynos4210_fimd_realize(DeviceState *dev, Error **errp) return; } - s->console = graphic_console_init(dev, 0, &exynos4210_fimd_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &exynos4210_fimd_ops, s); } static void exynos4210_fimd_class_init(ObjectClass *klass, const void *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index bd15f6f0acc..af54f1f9005 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -191,8 +191,8 @@ static void g364fb_draw_graphic8(G364State *s) } else { int dy; if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, - xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, + xmax - xmin + 1, ymax - ymin + 1); xmin = s->width; xmax = 0; ymin = s->height; @@ -211,7 +211,7 @@ static void g364fb_draw_graphic8(G364State *s) done: if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); } g_free(snap); } @@ -234,7 +234,7 @@ static void g364fb_draw_blank(G364State *s) d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->blanked = 1; } @@ -478,7 +478,7 @@ static const GraphicHwOps g364fb_ops = { static void g364fb_init(DeviceState *dev, G364State *s) { - s->con = graphic_console_init(dev, 0, &g364fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &g364fb_ops, s); memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &g364fb_ctrl_ops, s, "ctrl", 0x180000); diff --git a/hw/display/imx6ul_lcdif.c b/hw/display/imx6ul_lcdif.c index afcd0805ca4..7b5be2b5a75 100644 --- a/hw/display/imx6ul_lcdif.c +++ b/hw/display/imx6ul_lcdif.c @@ -203,7 +203,7 @@ static bool imx6ul_lcdif_update_display(void *opaque) src_width, surface_stride(surface), 0, s->invalidate, fn, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, width, last - first + 1); + qemu_console_update(s->con, 0, first, width, last - first + 1); } s->invalidate = false; @@ -301,7 +301,7 @@ static void imx6ul_lcdif_write(void *opaque, hwaddr offset, if (!FIELD_EX32(oldv, CTRL, RUN) && FIELD_EX32(s->regs[idx], CTRL, RUN)) { s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); imx6ul_lcdif_maybe_schedule_frame(s); break; } @@ -318,17 +318,17 @@ static void imx6ul_lcdif_write(void *opaque, hwaddr offset, break; case A_V4_TRANSFER_COUNT: s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); break; case A_V4_CUR_BUF: s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); break; case A_V4_NEXT_BUF: s->regs[IMX6UL_LCDIF_REG_V4_CUR_BUF] = s->regs[idx]; imx6ul_lcdif_frame_done(s); s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); imx6ul_lcdif_maybe_schedule_frame(s); return; case A_AS_NEXT_BUF: @@ -411,7 +411,7 @@ static void imx6ul_lcdif_realize(DeviceState *dev, Error **errp) TYPE_IMX6UL_LCDIF, LCDIF_MMIO_SIZE); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq); - s->con = graphic_console_init(dev, 0, &imx6ul_lcdif_graphic_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &imx6ul_lcdif_graphic_ops, s); } static void imx6ul_lcdif_unrealize(DeviceState *dev) @@ -423,7 +423,7 @@ static void imx6ul_lcdif_unrealize(DeviceState *dev) s->frame_timer = NULL; if (s->con) { - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); s->con = NULL; } } diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index ee9758a94b5..84fe1058406 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -217,7 +217,7 @@ static bool jazz_led_update_display(void *opaque) } s->state = REDRAW_NONE; - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); return true; } @@ -233,7 +233,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) LedState *s = opaque; char buf[3]; - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); qemu_console_resize(s->con, 2, 1); /* TODO: draw the segments */ @@ -243,7 +243,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) *chardata++ = ATTR2CHTYPE(buf[1], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, 2, 1); + qemu_console_text_update(s->con, 0, 0, 2, 1); } static int jazz_led_post_load(void *opaque, int version_id) @@ -284,7 +284,7 @@ static void jazz_led_realize(DeviceState *dev, Error **errp) { LedState *s = JAZZ_LED(dev); - s->con = graphic_console_init(dev, 0, &jazz_led_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &jazz_led_ops, s); } static void jazz_led_reset(DeviceState *d) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 848c3c282bd..f40a7ed9f52 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -320,14 +320,14 @@ static void macfb_draw_graphic(MacfbState *s) } } else { if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); ymin = -1; } } } if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); } g_free(snap); @@ -671,7 +671,7 @@ static bool macfb_common_realize(DeviceState *dev, MacfbState *s, Error **errp) s->regs[DAFB_MODE_CTRL1 >> 2] = s->mode->mode_ctrl1; s->regs[DAFB_MODE_CTRL2 >> 2] = s->mode->mode_ctrl2; - s->con = graphic_console_init(dev, 0, &macfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &macfb_ops, s); surface = qemu_console_surface(s->con); if (surface_bits_per_pixel(surface) != 32) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index e758b223ef7..fa2e0d0da80 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -89,7 +89,7 @@ static bool nextfb_update(void *opaque) src_width, dest_width, 0, 1, nextfb_draw_line, s, &first, &last); - dpy_gfx_update(s->con, 0, 0, s->cols, s->rows); + qemu_console_update(s->con, 0, 0, s->cols, s->rows); return true; } @@ -117,7 +117,7 @@ static void nextfb_realize(DeviceState *dev, Error **errp) s->cols = 1120; s->rows = 832; - s->con = graphic_console_init(dev, 0, &nextfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &nextfb_ops, s); qemu_console_resize(s->con, s->cols, s->rows); } diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 1e8385ebffb..2a8d5ffdd57 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -320,7 +320,7 @@ static bool omap_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1); + qemu_console_update(omap_lcd->con, 0, first, width, last - first + 1); } omap_lcd->invalidate = 0; @@ -504,7 +504,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100); memory_region_add_subregion(sysmem, base, &s->iomem); - s->con = graphic_console_init(NULL, 0, &omap_ops, s); + s->con = qemu_graphic_console_create(NULL, 0, &omap_ops, s); return s; } diff --git a/hw/display/pl110.c b/hw/display/pl110.c index e134ac28eb6..4a93cf4cda9 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -303,7 +303,7 @@ static bool pl110_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1); + qemu_console_update(s->con, 0, first, s->cols, last - first + 1); } s->invalidate = 0; return true; @@ -557,7 +557,7 @@ static void pl110_realize(DeviceState *dev, Error **errp) s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl110_vblank_interrupt, s); qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1); - s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &pl110_gfx_ops, s); } static void pl110_init(Object *obj) diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c index 5b4f8842011..7b692d5a854 100644 --- a/hw/display/qxl-render.c +++ b/hw/display/qxl-render.c @@ -135,7 +135,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) (width, height); } - dpy_gfx_replace_surface(vga->con, surface); + qemu_console_set_surface(vga->con, surface); } if (!qxl->guest_primary.data) { @@ -154,16 +154,16 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) continue; } qxl_blit(qxl, qxl->dirty+i); - dpy_gfx_update(vga->con, - qxl->dirty[i].left, qxl->dirty[i].top, - qxl->dirty[i].right - qxl->dirty[i].left, - qxl->dirty[i].bottom - qxl->dirty[i].top); + qemu_console_update(vga->con, + qxl->dirty[i].left, qxl->dirty[i].top, + qxl->dirty[i].right - qxl->dirty[i].left, + qxl->dirty[i].bottom - qxl->dirty[i].top); } qxl->num_dirty_rects = 0; end: if (qxl->render_update_cookie_num == 0) { - graphic_hw_update_done(qxl->ssd.dcl.con); + qemu_console_hw_update_done(qxl->ssd.dcl.con); } } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 4244ebe51d2..74258afa582 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1153,13 +1153,13 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) } trace_qxl_enter_vga_mode(d->id); spice_qxl_driver_unload(&d->ssd.qxl); - graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); qemu_spice_create_host_primary(&d->ssd); d->mode = QXL_MODE_VGA; qemu_spice_display_switch(&d->ssd, d->ssd.ds); vga_dirty_log_start(&d->vga); - graphic_hw_update(d->vga.con); + qemu_console_hw_update(d->vga.con); } static void qxl_exit_vga_mode(PCIQXLDevice *d) @@ -1168,8 +1168,8 @@ static void qxl_exit_vga_mode(PCIQXLDevice *d) return; } trace_qxl_exit_vga_mode(d->id); - graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); vga_dirty_log_stop(&d->vga); qxl_destroy_primary(d, QXL_SYNC); } @@ -2237,7 +2237,7 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); qxl->have_vga = true; - vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + vga->con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->id = qemu_console_get_index(vga->con); /* == channel_id */ if (qxl->id != 0) { error_setg(errp, "primary qxl-vga device must be console 0 " @@ -2262,7 +2262,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); - qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->ssd.dcl.con = qxl->vga.con; qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */ diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 27f0ba19f90..8e8ba37514a 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -41,7 +41,7 @@ static void ramfb_realizefn(DeviceState *dev, Error **errp) { RAMFBStandaloneState *ramfb = RAMFB(dev); - ramfb->con = graphic_console_init(dev, 0, &wrapper_ops, dev); + ramfb->con = qemu_graphic_console_create(dev, 0, &wrapper_ops, dev); ramfb->state = ramfb_setup(ramfb->use_legacy_x86_rom, errp); } diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 50c25706a52..7a88f934e11 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -111,12 +111,12 @@ void ramfb_display_update(QemuConsole *con, RAMFBState *s) } if (s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); s->ds = NULL; } /* simple full screen update */ - dpy_gfx_update_full(con); + qemu_console_update_full(con); } static int ramfb_post_load(void *opaque, int version_id) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index a3993ceba29..af870048372 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1822,7 +1822,7 @@ static bool sm501_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } } @@ -1831,7 +1831,7 @@ static bool sm501_update_display(void *opaque) /* complete flush to display */ if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } return true; @@ -1936,7 +1936,7 @@ static void sm501_init(SM501State *s, DeviceState *dev, &s->twoD_engine_region); /* create qemu graphic console */ - s->con = graphic_console_init(dev, 0, &sm501_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &sm501_ops, s); } static const VMStateDescription vmstate_sm501_state = { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 229856cc427..4e3dede33f1 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -268,7 +268,7 @@ static bool ssd0303_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); return true; } @@ -309,7 +309,7 @@ static void ssd0303_realize(DeviceState *dev, Error **errp) { ssd0303_state *s = SSD0303(dev); - s->con = graphic_console_init(dev, 0, &ssd0303_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0303_ops, s); qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY); } diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 67db16086c8..9309d4d10c4 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -270,7 +270,8 @@ static bool ssd0323_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + return true; } @@ -356,7 +357,7 @@ static void ssd0323_realize(SSIPeripheral *d, Error **errp) s->col_end = 63; s->row_end = 79; - s->con = graphic_console_init(dev, 0, &ssd0323_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0323_ops, s); qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY); qdev_init_gpio_in(dev, ssd0323_cd, 1); diff --git a/hw/display/tcx.c b/hw/display/tcx.c index cedbf5c7acd..2c33a9c4a32 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -243,8 +243,7 @@ static bool tcx_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -253,8 +252,7 @@ static bool tcx_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -297,8 +295,7 @@ static bool tcx24_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -309,8 +306,7 @@ static bool tcx24_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -864,9 +860,9 @@ static void tcx_realize(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); if (s->depth == 8) { - s->con = graphic_console_init(dev, 0, &tcx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx_ops, s); } else { - s->con = graphic_console_init(dev, 0, &tcx24_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx24_ops, s); } s->thcmisc = 0; diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 5f55c884a1b..2cccb0ef12e 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -79,7 +79,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) 0x000a0000, vga_io_memory, 1); memory_region_set_coalescing(vga_io_memory); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); memory_region_add_subregion(isa_address_space(isadev), VBE_DISPI_LFB_PHYSICAL_ADDRESS, diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index 1a9608d865f..3cd64951c09 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -108,7 +108,7 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) } sysbus_init_mmio(sbd, &s->vga.vram); - s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(dev, 0, s->vga.hw_ops, &s->vga); } static const Property vga_mmio_properties[] = { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 4e68dd57a17..d089847bdae 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -247,7 +247,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), true); - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* XXX: VGA_RAM_SIZE must be a power of two */ pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); @@ -282,7 +282,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) if (!vga_common_init(s, OBJECT(dev), errp)) { return; } - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* mmio bar */ memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, @@ -306,7 +306,7 @@ static void pci_secondary_vga_exit(PCIDevice *dev) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); memory_region_del_subregion(&d->mmio, &d->mrs[0]); memory_region_del_subregion(&d->mmio, &d->mrs[1]); if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { diff --git a/hw/display/vga.c b/hw/display/vga.c index 2f266f47a39..0ac4bf37310 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1246,7 +1246,7 @@ static void vga_draw_text(VGACommonState *s, int full_update) s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); surface = qemu_console_surface(s->con); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1365,8 +1365,8 @@ static void vga_draw_text(VGACommonState *s, int full_update) ch_attr_ptr++; } if (cx_max != -1) { - dpy_gfx_update(s->con, cx_min * cw, cy * cheight, - (cx_max - cx_min + 1) * cw, cheight); + qemu_console_update(s->con, cx_min * cw, cy * cheight, + (cx_max - cx_min + 1) * cw, cheight); } dest += linesize * cheight; line1 = line + cheight; @@ -1610,7 +1610,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) */ format = qemu_default_pixman_format(depth, !byteswap); if (format) { - allocate_surface = !dpy_gfx_check_format(s->con, format) + allocate_surface = !qemu_console_check_format(s->con, format) || s->force_shadow || force_shadow; } else { allocate_surface = true; @@ -1647,7 +1647,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) surface = qemu_create_displaysurface_from(disp_width, height, format, s->params.line_offset, s->vram_ptr + (s->params.start_addr * 4)); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } else { qemu_console_resize(s->con, disp_width, height); surface = qemu_console_surface(s->con); @@ -1720,8 +1720,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); y_start = -1; } } @@ -1745,8 +1744,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); } g_free(snap); memset(s->invalidated_y_table, 0, sizeof(s->invalidated_y_table)); @@ -1767,7 +1765,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) /* unshare buffer, otherwise the blanking corrupts vga vram */ surface = qemu_create_displaysurface(s->last_scr_width, s->last_scr_height); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } w = s->last_scr_width * surface_bytes_per_pixel(surface); @@ -1776,7 +1774,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) memset(d, 0, w); d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } #define GMODE_TEXT 0 @@ -1967,7 +1965,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->last_scr_width = width * cw; s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1992,11 +1990,11 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) { cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20); if (cursor_visible && cursor_offset < size && cursor_offset >= 0) - dpy_text_cursor(s->con, - TEXTMODE_X(cursor_offset), - TEXTMODE_Y(cursor_offset)); + qemu_console_text_set_cursor(s->con, + TEXTMODE_X(cursor_offset), + TEXTMODE_Y(cursor_offset)); else - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); s->cursor_offset = cursor_offset; s->cursor_start = s->cr[VGA_CRTC_CURSOR_START]; s->cursor_end = s->cr[VGA_CRTC_CURSOR_END]; @@ -2009,7 +2007,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) for (i = 0; i < size; src ++, dst ++, i ++) *dst = VMEM2CHTYPE(le32_to_cpu(*src)); - dpy_text_update(s->con, 0, 0, width, height); + qemu_console_text_update(s->con, 0, 0, width, height); } else { c_max = 0; @@ -2032,7 +2030,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) if (c_min <= c_max) { i = TEXTMODE_Y(c_min); - dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); + qemu_console_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); } } @@ -2057,8 +2055,8 @@ static void vga_update_text(void *opaque, uint32_t *chardata) /* Display a message */ s->last_width = 60; s->last_height = height = 3; - dpy_text_cursor(s->con, -1, -1); - dpy_text_resize(s->con, s->last_width, height); + qemu_console_text_set_cursor(s->con, -1, -1); + qemu_console_text_resize(s->con, s->last_width, height); for (dst = chardata, i = 0; i < s->last_width * height; i ++) *dst++ = ' '; @@ -2070,7 +2068,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) *dst++ = ATTR2CHTYPE(msg_buffer[i], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, s->last_width, height); + qemu_console_text_update(s->con, 0, 0, s->last_width, height); } static uint64_t vga_mem_read(void *opaque, hwaddr addr, diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 3f6fb7a8033..6e5e6540a46 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -142,11 +142,11 @@ vhost_user_gpu_handle_cursor(VhostUserGPU *g, VhostUserGpuMsg *msg) memcpy(s->current_cursor->data, up->data, 64 * 64 * sizeof(uint32_t)); - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); } - dpy_mouse_set(s->con, pos->x, pos->y, - msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); + qemu_console_set_mouse(s->con, pos->x, pos->y, + msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); } static void @@ -238,7 +238,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) con = s->con; if (m->width == 0) { - dpy_gfx_replace_surface(con, NULL); + qemu_console_set_surface(con, NULL); } else { s->ds = qemu_create_displaysurface(m->width, m->height); /* replace surface on next update */ @@ -269,12 +269,12 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) if (dmabuf) { qemu_dmabuf_close(dmabuf); - dpy_gl_release_dmabuf(con, dmabuf); + qemu_console_gl_release_dmabuf(con, dmabuf); g_clear_pointer(&dmabuf, qemu_dmabuf_free); } if (fd == -1) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); g->dmabuf[m->scanout_id] = NULL; break; } @@ -291,7 +291,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) &fd, 1, false, m->fd_flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP); - dpy_gl_scanout_dmabuf(con, dmabuf); + qemu_console_gl_scanout_dmabuf(con, dmabuf); g->dmabuf[m->scanout_id] = dmabuf; break; } @@ -306,13 +306,13 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) } con = g->parent_obj.scanout[m->scanout_id].con; - if (!console_has_gl(con)) { + if (!qemu_console_has_gl(con)) { error_report("console doesn't support GL!"); vhost_user_gpu_unblock(g); break; } g->backend_blocked = true; - dpy_gl_update(con, m->x, m->y, m->width, m->height); + qemu_console_gl_update(con, m->x, m->y, m->width, m->height); break; } #ifdef CONFIG_PIXMAN @@ -337,9 +337,9 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) pixman_image_unref(image); if (qemu_console_surface(con) != s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); } else { - dpy_gfx_update(con, m->x, m->y, m->width, m->height); + qemu_console_update(con, m->x, m->y, m->width, m->height); } break; } diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index bdc24492850..a68b1848295 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -253,7 +253,7 @@ virtio_gpu_base_device_realize(DeviceState *qdev, g->hw_ops = &virtio_gpu_ops; for (i = 0; i < g->conf.max_outputs; i++) { g->scanout[i].con = - graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g); + qemu_graphic_console_create(DEVICE(g), i, &virtio_gpu_ops, g); } return true; diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c index ebb6c783fb0..6ff12639012 100644 --- a/hw/display/virtio-gpu-rutabaga.c +++ b/hw/display/virtio-gpu-rutabaga.c @@ -282,7 +282,7 @@ rutabaga_cmd_resource_flush(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) rf.resource_id, &transfer, &transfer_iovec); CHECK(!result, cmd); - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); } static void @@ -306,8 +306,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) scanout = &vb->scanout[ss.scanout_id]; if (ss.resource_id == 0) { - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gl_scanout_disable(scanout->con); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_gl_scanout_disable(scanout->con); return; } @@ -331,8 +331,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) /* realloc the surface ptr */ scanout->ds = qemu_create_displaysurface_pixman(res->image); - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, scanout->ds); res->scanout_bitmask = ss.scanout_id; } diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabuf.c index 74b6a7766af..d5ac1cfca0e 100644 --- a/hw/display/virtio-gpu-udmabuf.c +++ b/hw/display/virtio-gpu-udmabuf.c @@ -156,7 +156,7 @@ static void virtio_gpu_free_dmabuf(VirtIOGPU *g, VGPUDMABuf *dmabuf) struct virtio_gpu_scanout *scanout; scanout = &g->parent_obj.scanout[dmabuf->scanout_id]; - dpy_gl_release_dmabuf(scanout->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(scanout->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); QTAILQ_REMOVE(&g->dmabuf.bufs, dmabuf, next); g_free(dmabuf); @@ -232,7 +232,7 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, height = qemu_dmabuf_get_height(new_primary->buf); g->dmabuf.primary[scanout_id] = new_primary; qemu_console_resize(scanout->con, width, height); - dpy_gl_scanout_dmabuf(scanout->con, new_primary->buf); + qemu_console_gl_scanout_dmabuf(scanout->con, new_primary->buf); if (old_primary) { virtio_gpu_free_dmabuf(g, old_primary); diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index add85bd4e61..60c78af06a4 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -521,7 +521,7 @@ static void virtio_gpu_rect_update(VirtIOGPU *g, int idx, int x, int y, return; } - dpy_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); + qemu_console_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); } static void virgl_cmd_resource_flush(VirtIOGPU *g, @@ -584,16 +584,15 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g, qemu_console_resize(g->parent_obj.scanout[ss.scanout_id].con, ss.r.width, ss.r.height); virgl_renderer_force_ctx_0(); - dpy_gl_scanout_texture( + qemu_console_gl_scanout_texture( g->parent_obj.scanout[ss.scanout_id].con, info.tex_id, info.flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP, info.width, info.height, ss.r.x, ss.r.y, ss.r.width, ss.r.height, d3d_tex2d); } else { - dpy_gfx_replace_surface( - g->parent_obj.scanout[ss.scanout_id].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); + qemu_console_set_surface(g->parent_obj.scanout[ss.scanout_id].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); } g->parent_obj.scanout[ss.scanout_id].resource_id = ss.resource_id; } @@ -1315,7 +1314,7 @@ virgl_create_context(void *opaque, int scanout_idx, qparams.major_ver = params->major_ver; qparams.minor_ver = params->minor_ver; - ctx = dpy_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); + ctx = qemu_console_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); return (virgl_renderer_gl_context)ctx; } @@ -1324,7 +1323,7 @@ static void virgl_destroy_context(void *opaque, virgl_renderer_gl_context ctx) VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - dpy_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); + qemu_console_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); } static int virgl_make_context_current(void *opaque, int scanout_idx, @@ -1333,8 +1332,7 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - return dpy_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, - qctx); + return qemu_console_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, qctx); } static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { @@ -1399,8 +1397,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) int i; for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[i].con); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[i].con); } } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index dbb72bbb22d..88526051a99 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -103,14 +103,14 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) if (cursor->resource_id > 0) { vgc->update_cursor_data(g, s, cursor->resource_id); } - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); s->cursor = *cursor; } else { s->cursor.pos.x = cursor->pos.x; s->cursor.pos.y = cursor->pos.y; } - dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); + qemu_console_set_mouse(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); } struct virtio_gpu_simple_resource * @@ -390,7 +390,7 @@ void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) res->scanout_bitmask &= ~(1 << scanout_id); } - dpy_gfx_replace_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, NULL); scanout->resource_id = 0; scanout->ds = NULL; scanout->width = 0; @@ -531,8 +531,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, rf.r.y + rf.r.height >= scanout->y) { within_bounds = true; - if (console_has_gl(scanout->con)) { - dpy_gl_update(scanout->con, 0, 0, scanout->width, + if (qemu_console_has_gl(scanout->con)) { + qemu_console_gl_update(scanout->con, 0, 0, scanout->width, scanout->height); update_submitted = true; } @@ -582,8 +582,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, /* work out the area we need to update for each console */ if (qemu_rect_intersect(&flush_rect, &rect, &rect)) { qemu_rect_translate(&rect, -scanout->x, -scanout->y); - dpy_gfx_update(g->parent_obj.scanout[i].con, - rect.x, rect.y, rect.width, rect.height); + qemu_console_update(g->parent_obj.scanout[i].con, + rect.x, rect.y, rect.width, rect.height); } } } @@ -649,7 +649,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, g->parent_obj.enable = 1; if (res->blob) { - if (console_has_gl(scanout->con)) { + if (qemu_console_has_gl(scanout->con)) { if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb, r)) { virtio_gpu_update_scanout(g, scanout_id, res, fb, r); } else { @@ -665,7 +665,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, } /* create a surface for this scanout */ - if ((res->blob && !console_has_gl(scanout->con)) || + if ((res->blob && !qemu_console_has_gl(scanout->con)) || !scanout->ds || surface_data(scanout->ds) != data + fb->offset || scanout->width != r->width || @@ -686,7 +686,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, fb->offset); pixman_image_unref(rect); - dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, + qemu_console_set_surface(g->parent_obj.scanout[scanout_id].con, scanout->ds); } @@ -1483,10 +1483,10 @@ static int virtio_gpu_post_load(void *opaque, int version_id) } scanout->ds = qemu_create_displaysurface_pixman(res->image); qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, 0); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, scanout->ds); } - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); if (scanout->cursor.resource_id) { update_cursor(g, &scanout->cursor); } @@ -1602,7 +1602,7 @@ static void virtio_gpu_reset_bh(void *opaque) } for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); } g->reset_finished = true; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index efd4858f3d0..2ae649c91ae 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -172,7 +172,7 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vvga->vga_mrs, true, false); vga->con = g->scanout[0].con; - graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); + qemu_graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); for (i = 0; i < g->conf.max_outputs; i++) { object_property_set_link(OBJECT(g->scanout[i].con), "device", diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 11f13c98d7a..f6f9edfd1d9 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -378,7 +378,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s, for (line = h; line > 0; line--, src += bypl, dst += bypl) { memcpy(dst, src, width); } - dpy_gfx_update(s->vga.con, x, y, w, h); + qemu_console_update(s->vga.con, x, y, w, h); } static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) @@ -554,7 +554,7 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, qc = cursor_builtin_left_ptr(); } - dpy_cursor_define(s->vga.con, qc); + qemu_console_set_cursor(s->vga.con, qc); cursor_unref(qc); } #endif @@ -1082,7 +1082,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); #ifdef HW_MOUSE_ACCEL if (value <= SVGA_CURSOR_ON_SHOW) { - dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); + qemu_console_set_mouse(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); } #endif break; @@ -1130,7 +1130,7 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s) surface = qemu_create_displaysurface_from(s->new_width, s->new_height, format, stride, s->vga.vram_ptr); - dpy_gfx_replace_surface(s->vga.con, surface); + qemu_console_set_surface(s->vga.con, surface); s->invalidated = 1; } } @@ -1151,7 +1151,7 @@ static bool vmsvga_update_display(void *opaque) if (s->invalidated) { s->invalidated = 0; - dpy_gfx_update_full(s->vga.con); + qemu_console_update_full(s->vga.con); } return true; @@ -1254,7 +1254,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->scratch_size = SVGA_SCRATCH_SIZE; s->scratch = g_malloc(s->scratch_size * 4); - s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); + s->vga.con = qemu_graphic_console_create(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 2e431e27be6..8e9953bda43 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -657,7 +657,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h) xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n", __func__, xenfb->depth, bpp); - dpy_gfx_update(xenfb->con, x, y, w, h); + qemu_console_update(xenfb->con, x, y, w, h); } #ifdef XENFB_TYPE_REFRESH_PERIOD @@ -743,7 +743,7 @@ static bool xenfb_update(void *opaque) surface = qemu_create_displaysurface(xenfb->width, xenfb->height); break; } - dpy_gfx_replace_surface(xenfb->con, surface); + qemu_console_set_surface(xenfb->con, surface); xen_pv_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n", xenfb->width, xenfb->height, xenfb->depth, @@ -903,7 +903,7 @@ static int fb_initialise(struct XenLegacyDevice *xendev) if (rc != 0) return rc; - fb->con = graphic_console_init(NULL, 0, &xenfb_ops, fb); + fb->con = qemu_graphic_console_create(NULL, 0, &xenfb_ops, fb); if (xenstore_read_fe_int(xendev, "feature-update", &fb->feature_update) == -1) fb->feature_update = 0; diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 50e6ef10984..2486d9e5825 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -605,7 +605,7 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) if ((width != 0) && (height != 0)) { /* - * As dpy_gfx_replace_surface calls qemu_free_displaysurface on the + * As qemu_console_replace_surface calls qemu_free_displaysurface on the * surface we need to be careful and don't free the surface associated * to the console or double free will happen. */ @@ -631,10 +631,10 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) height, s->g_plane.format, 0, NULL); - dpy_gfx_replace_surface(s->console, s->bout_plane.surface); + qemu_console_set_surface(s->console, s->bout_plane.surface); } else { s->bout_plane.surface = NULL; - dpy_gfx_replace_surface(s->console, s->g_plane.surface); + qemu_console_set_surface(s->console, s->g_plane.surface); } xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, @@ -1287,7 +1287,7 @@ static bool xlnx_dp_update_display(void *opaque) /* * XXX: We might want to update only what changed. */ - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); return true; } @@ -1387,7 +1387,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), &error_fatal); - s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &xlnx_dp_gfx_ops, s); surface = qemu_console_surface(s->console); xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, surface_data(surface)); diff --git a/hw/vfio/display.c b/hw/vfio/display.c index 4a9a58036e3..8f91e83da88 100644 --- a/hw/vfio/display.c +++ b/hw/vfio/display.c @@ -264,7 +264,7 @@ static void vfio_display_free_one_dmabuf(VFIODisplay *dpy, VFIODMABuf *dmabuf) QTAILQ_REMOVE(&dpy->dmabuf.bufs, dmabuf, next); qemu_dmabuf_close(dmabuf->buf); - dpy_gl_release_dmabuf(dpy->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(dpy->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); g_free(dmabuf); } @@ -307,7 +307,7 @@ static bool vfio_display_dmabuf_update(void *opaque) if (dpy->dmabuf.primary != primary) { dpy->dmabuf.primary = primary; qemu_console_resize(dpy->con, width, height); - dpy_gl_scanout_dmabuf(dpy->con, primary->buf); + qemu_console_gl_scanout_dmabuf(dpy->con, primary->buf); free_bufs = true; } @@ -321,21 +321,21 @@ static bool vfio_display_dmabuf_update(void *opaque) if (cursor && (new_cursor || cursor->hot_updates)) { bool have_hot = (cursor->hot_x != 0xffffffff && cursor->hot_y != 0xffffffff); - dpy_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, - cursor->hot_x, cursor->hot_y); + qemu_console_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, + cursor->hot_x, cursor->hot_y); cursor->hot_updates = 0; } else if (!cursor && new_cursor) { - dpy_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); + qemu_console_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); } if (cursor && cursor->pos_updates) { - dpy_gl_cursor_position(dpy->con, + qemu_console_gl_cursor_position(dpy->con, cursor->pos_x, cursor->pos_y); cursor->pos_updates = 0; } - dpy_gl_update(dpy->con, 0, 0, width, height); + qemu_console_gl_update(dpy->con, 0, 0, width, height); if (free_bufs) { vfio_display_free_dmabufs(vdev); @@ -363,7 +363,7 @@ static bool vfio_display_dmabuf_init(VFIOPCIDevice *vdev, Error **errp) } vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_dmabuf_ops, vdev); if (vdev->enable_ramfb) { @@ -396,9 +396,9 @@ void vfio_display_reset(VFIOPCIDevice *vdev) return; } - dpy_gl_scanout_disable(vdev->dpy->con); + qemu_console_gl_scanout_disable(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); - dpy_gfx_update_full(vdev->dpy->con); + qemu_console_update_full(vdev->dpy->con); } static bool vfio_display_region_update(void *opaque) @@ -471,13 +471,13 @@ static bool vfio_display_region_update(void *opaque) dpy->region.surface = qemu_create_displaysurface_from (plane.width, plane.height, format, plane.stride, dpy->region.buffer.mmaps[0].mmap); - dpy_gfx_replace_surface(dpy->con, dpy->region.surface); + qemu_console_set_surface(dpy->con, dpy->region.surface); } /* full screen update */ - dpy_gfx_update(dpy->con, 0, 0, - surface_width(dpy->region.surface), - surface_height(dpy->region.surface)); + qemu_console_update(dpy->con, 0, 0, + surface_width(dpy->region.surface), + surface_height(dpy->region.surface)); return true; err: @@ -493,7 +493,7 @@ static const GraphicHwOps vfio_display_region_ops = { static bool vfio_display_region_init(VFIOPCIDevice *vdev, Error **errp) { vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_region_ops, vdev); if (vdev->enable_ramfb) { @@ -553,7 +553,7 @@ void vfio_display_finalize(VFIOPCIDevice *vdev) return; } - graphic_console_close(vdev->dpy->con); + qemu_graphic_console_close(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); vfio_display_region_exit(vdev->dpy); vfio_display_edid_exit(vdev->dpy); diff --git a/ui/console-vc.c b/ui/console-vc.c index 99ad6d079df..828e78c41ea 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -90,15 +90,15 @@ static void text_console_update(void *opaque, uint32_t *chardata) s->vt.cells[src].t_attrib.bgcol, s->vt.cells[src].t_attrib.bold); } - dpy_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], - s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); + qemu_console_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], + s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); s->vt.text_x[0] = s->vt.width; s->vt.text_y[0] = s->vt.height; s->vt.text_x[1] = 0; s->vt.text_y[1] = 0; } if (s->vt.cursor_invalidate) { - dpy_text_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); + qemu_console_text_set_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); s->vt.cursor_invalidate = 0; } } @@ -186,14 +186,14 @@ static void vc_chr_set_echo(Chardev *chr, bool echo) void qemu_text_console_update_size(QemuTextConsole *c) { - dpy_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); + qemu_console_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); } static void text_console_image_update(QemuVT100 *vt, int x, int y, int width, int height) { QemuTextConsole *console = container_of(vt, QemuTextConsole, vt); - dpy_gfx_update(QEMU_CONSOLE(console), x, y, width, height); + qemu_console_update(QEMU_CONSOLE(console), x, y, width, height); } static void text_console_out_flush(QemuVT100 *vt) @@ -232,7 +232,7 @@ static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s = QEMU_TEXT_CONSOLE(object_new(TYPE_QEMU_FIXED_TEXT_CONSOLE)); } - dpy_gfx_replace_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); + qemu_console_set_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); if (vc->has_encoding) { drv->encoding = vc->encoding; } diff --git a/ui/console.c b/ui/console.c index 22ca1c35db3..6f6330d61f1 100644 --- a/ui/console.c +++ b/ui/console.c @@ -129,26 +129,26 @@ static void gui_setup_refresh(DisplayState *ds) } } -void graphic_hw_update_done(QemuConsole *con) +void qemu_console_hw_update_done(QemuConsole *con) { if (con) { qemu_co_enter_all(&con->dump_queue, NULL); } } -void graphic_hw_update(QemuConsole *con) +void qemu_console_hw_update(QemuConsole *con) { if (!con) { return; } if (!con->hw_ops->gfx_update || con->hw_ops->gfx_update(con->hw)) { - graphic_hw_update_done(con); + qemu_console_hw_update_done(con); } } -static void graphic_hw_update_bh(void *con) +static void console_hw_update_bh(void *con) { - graphic_hw_update(con); + qemu_console_hw_update(con); } void qemu_console_co_wait_update(QemuConsole *con) @@ -156,18 +156,18 @@ void qemu_console_co_wait_update(QemuConsole *con) if (qemu_co_queue_empty(&con->dump_queue)) { /* Defer the update, it will restart the pending coroutines */ aio_bh_schedule_oneshot(qemu_get_aio_context(), - graphic_hw_update_bh, con); + console_hw_update_bh, con); } qemu_co_queue_wait(&con->dump_queue, NULL); } -static void graphic_hw_gl_unblock_timer(void *opaque) +static void console_hw_gl_unblock_timer(void *opaque) { warn_report("console: no gl-unblock within one second"); } -void graphic_hw_gl_block(QemuConsole *con, bool block) +void qemu_console_hw_gl_block(QemuConsole *con, bool block) { uint64_t timeout; assert(con != NULL); @@ -205,14 +205,14 @@ void qemu_console_set_window_id(QemuConsole *con, int window_id) con->window_id = window_id; } -void graphic_hw_invalidate(QemuConsole *con) +void qemu_console_hw_invalidate(QemuConsole *con) { if (con && con->hw_ops->invalidate) { con->hw_ops->invalidate(con->hw); } } -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata) +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata) { if (con && con->hw_ops->text_update) { con->hw_ops->text_update(con->hw, chardata); @@ -502,7 +502,7 @@ qemu_graphic_console_init(Object *obj) { } -bool console_has_gl(QemuConsole *con) +bool qemu_console_has_gl(QemuConsole *con) { return con->gl != NULL; } @@ -527,7 +527,7 @@ static bool console_compatible_with(QemuConsole *con, flags = con->hw_ops->get_flags ? con->hw_ops->get_flags(con->hw) : 0; - if (console_has_gl(con) && + if (qemu_console_has_gl(con) && !con->gl->ops->dpy_gl_ctx_is_compatible_dcl(con->gl, dcl)) { error_setg(errp, "Display %s is incompatible with the GL context", dcl->ops->dpy_name); @@ -535,7 +535,7 @@ static bool console_compatible_with(QemuConsole *con, } if (flags & GRAPHIC_FLAGS_GL && - !console_has_gl(con)) { + !qemu_console_has_gl(con)) { error_setg(errp, "The console requires a GL context."); return false; @@ -605,8 +605,8 @@ void qemu_console_register_listener(QemuConsole *con, vt100_update_cursor(); } -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval) +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval) { DisplayState *ds = dcl->ds; @@ -645,7 +645,7 @@ static void dpy_set_ui_info_timer(void *opaque) con->hw_ops->ui_info(con->hw, head, &con->ui_info); } -bool dpy_ui_info_supported(const QemuConsole *con) +bool qemu_console_ui_info_supported(const QemuConsole *con) { if (con == NULL) { return false; @@ -654,16 +654,16 @@ bool dpy_ui_info_supported(const QemuConsole *con) return con->hw_ops->ui_info != NULL; } -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con) +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con) { - assert(dpy_ui_info_supported(con)); + assert(qemu_console_ui_info_supported(con)); return &con->ui_info; } -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) { - if (!dpy_ui_info_supported(con)) { + if (!qemu_console_ui_info_supported(con)) { return -1; } if (memcmp(&con->ui_info, info, sizeof(con->ui_info)) == 0) { @@ -682,7 +682,7 @@ int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) return 0; } -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -707,15 +707,15 @@ void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_gfx_update_full(QemuConsole *con) +void qemu_console_update_full(QemuConsole *con) { int w = qemu_console_get_width(con, 0); int h = qemu_console_get_height(con, 0); - dpy_gfx_update(con, 0, 0, w, h); + qemu_console_update(con, 0, 0, w, h); } -void dpy_gfx_replace_surface(QemuConsole *con, +void qemu_console_set_surface(QemuConsole *con, DisplaySurface *surface) { static const char placeholder_msg[] = "Display output is not active."; @@ -753,8 +753,8 @@ void dpy_gfx_replace_surface(QemuConsole *con, qemu_free_displaysurface(old_surface); } -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format) +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format) { DisplayChangeListener *dcl; DisplayState *s = con->ds; @@ -789,7 +789,7 @@ static void dpy_refresh(DisplayState *s) } } -void dpy_text_cursor(QemuConsole *con, int x, int y) +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -804,7 +804,7 @@ void dpy_text_cursor(QemuConsole *con, int x, int y) } } -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -819,7 +819,7 @@ void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_text_resize(QemuConsole *con, int w, int h) +void qemu_console_text_resize(QemuConsole *con, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -834,7 +834,7 @@ void dpy_text_resize(QemuConsole *con, int w, int h) } } -void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) +void qemu_console_set_mouse(QemuConsole *c, int x, int y, bool on) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -853,7 +853,7 @@ void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) } } -void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) +void qemu_console_set_cursor(QemuConsole *c, QEMUCursor *cursor) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -871,26 +871,26 @@ void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) } } -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - struct QEMUGLParams *qparams) +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *qparams) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_create(con->gl, qparams); } -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); con->gl->ops->dpy_gl_ctx_destroy(con->gl, ctx); } -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_make_current(con->gl, ctx); } -void dpy_gl_scanout_disable(QemuConsole *con) +void qemu_console_gl_scanout_disable(QemuConsole *con) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -908,14 +908,14 @@ void dpy_gl_scanout_disable(QemuConsole *con) } } -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, - bool backing_y_0_top, - uint32_t backing_width, - uint32_t backing_height, - uint32_t x, uint32_t y, - uint32_t width, uint32_t height, - void *d3d_tex2d) +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, + bool backing_y_0_top, + uint32_t backing_width, + uint32_t backing_height, + uint32_t x, uint32_t y, + uint32_t width, uint32_t height, + void *d3d_tex2d) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -939,8 +939,8 @@ void dpy_gl_scanout_texture(QemuConsole *con, } } -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -957,8 +957,8 @@ void dpy_gl_scanout_dmabuf(QemuConsole *con, } } -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y) +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -974,8 +974,8 @@ void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, } } -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y) +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -990,8 +990,8 @@ void dpy_gl_cursor_position(QemuConsole *con, } } -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -1006,15 +1006,15 @@ void dpy_gl_release_dmabuf(QemuConsole *con, } } -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h) +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; assert(con->gl); - graphic_hw_gl_block(con, true); + qemu_console_hw_gl_block(con, true); QLIST_FOREACH(dcl, &s->listeners, next) { if (con != dcl->con) { continue; @@ -1023,7 +1023,7 @@ void dpy_gl_update(QemuConsole *con, dcl->ops->dpy_gl_update(dcl, x, y, w, h); } } - graphic_hw_gl_block(con, false); + qemu_console_hw_gl_block(con, false); } /***********************************************************/ @@ -1060,17 +1060,17 @@ DisplayState *init_displaystate(void) return display_state; } -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque) +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque) { con->hw_ops = hw_ops; con->hw = opaque; } -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *hw_ops, - void *opaque) +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *hw_ops, + void *opaque) { static const char noinit[] = "Guest has not initialized the display (yet)."; @@ -1089,16 +1089,16 @@ QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, s = (QemuConsole *)object_new(TYPE_QEMU_GRAPHIC_CONSOLE); } QEMU_GRAPHIC_CONSOLE(s)->head = head; - graphic_console_set_hwops(s, hw_ops, opaque); + qemu_graphic_console_set_hwops(s, hw_ops, opaque); if (dev) { object_property_set_link(OBJECT(s), "device", OBJECT(dev), &error_abort); } surface = qemu_create_placeholder_surface(width, height, noinit); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); s->gl_unblock_timer = timer_new_ms(QEMU_CLOCK_REALTIME, - graphic_hw_gl_unblock_timer, s); + console_hw_gl_unblock_timer, s); return s; } @@ -1106,7 +1106,7 @@ static const GraphicHwOps unused_ops = { /* no callbacks */ }; -void graphic_console_close(QemuConsole *con) +void qemu_graphic_console_close(QemuConsole *con) { static const char unplugged[] = "Guest display has been unplugged"; @@ -1116,13 +1116,13 @@ void graphic_console_close(QemuConsole *con) trace_console_gfx_close(con->index); object_property_set_link(OBJECT(con), "device", NULL, &error_abort); - graphic_console_set_hwops(con, &unused_ops, NULL); + qemu_graphic_console_set_hwops(con, &unused_ops, NULL); if (con->gl) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); } surface = qemu_create_placeholder_surface(width, height, unplugged); - dpy_gfx_replace_surface(con, surface); + qemu_console_set_surface(con, surface); } QemuConsole *qemu_console_lookup_default(void) @@ -1308,7 +1308,7 @@ void qemu_console_resize(QemuConsole *s, int width, int height) } surface = qemu_create_displaysurface(width, height); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); } DisplaySurface *qemu_console_surface(QemuConsole *console) diff --git a/ui/curses.c b/ui/curses.c index dbb5992981c..24d3713e57d 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -1,8 +1,8 @@ /* * QEMU curses/ncurses display driver - * + * * Copyright (c) 2005 Andrzej Zaborowski - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -275,11 +275,11 @@ static void curses_refresh(DisplayChangeListener *dcl) clear(); refresh(); curses_calc_pad(); - graphic_hw_invalidate(dcl->con); + qemu_console_hw_invalidate(dcl->con); invalidate = 0; } - graphic_hw_text_update(dcl->con, screen); + qemu_console_hw_text_update(dcl->con, screen); while (1) { /* while there are any pending key strokes to process */ diff --git a/ui/dbus-console.c b/ui/dbus-console.c index 23f547a673d..b8e5c57b148 100644 --- a/ui/dbus-console.c +++ b/ui/dbus-console.c @@ -200,7 +200,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, .height = arg_height, }; - if (!dpy_ui_info_supported(ddc->dcl.con)) { + if (!qemu_console_ui_info_supported(ddc->dcl.con)) { g_dbus_method_invocation_return_error(invocation, DBUS_DISPLAY_ERROR, DBUS_DISPLAY_ERROR_UNSUPPORTED, @@ -208,7 +208,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, return DBUS_METHOD_INVOCATION_HANDLED; } - dpy_set_ui_info(ddc->dcl.con, &info, false); + qemu_console_set_ui_info(ddc->dcl.con, &info, false); qemu_dbus_display1_console_complete_set_uiinfo(ddc->iface, invocation); return DBUS_METHOD_INVOCATION_HANDLED; } diff --git a/ui/dbus-listener.c b/ui/dbus-listener.c index cc2c969686e..2e2f6ba4183 100644 --- a/ui/dbus-listener.c +++ b/ui/dbus-listener.c @@ -241,7 +241,7 @@ static void dbus_update_gl_cb(GObject *source_object, } #endif - graphic_hw_gl_block(ddl->dcl.con, false); + qemu_console_hw_gl_block(ddl->dcl.con, false); g_object_unref(ddl); } #endif @@ -257,7 +257,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, glFlush(); #ifdef CONFIG_GBM - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); qemu_dbus_display1_listener_call_update_dmabuf(ddl->proxy, x, y, w, h, G_DBUS_CALL_FLAGS_NONE, @@ -276,7 +276,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, Error *err = NULL; assert(ddl->d3d_texture); - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); if (!d3d_texture2d_release0(ddl->d3d_texture, &err)) { error_report_err(err); return; @@ -711,7 +711,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) { DBusDisplayListener *ddl = container_of(dcl, DBusDisplayListener, dcl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (!ddl->ds || qemu_console_is_gl_blocked(ddl->dcl.con)) { return; @@ -740,7 +740,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) static void dbus_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } #ifdef CONFIG_OPENGL diff --git a/ui/egl-headless.c b/ui/egl-headless.c index 4f046c975a9..878bfebb40c 100644 --- a/ui/egl-headless.c +++ b/ui/egl-headless.c @@ -23,7 +23,7 @@ typedef struct egl_dpy { static void egl_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static void egl_gfx_update(DisplayChangeListener *dcl, @@ -161,7 +161,7 @@ static void egl_scanout_flush(DisplayChangeListener *dcl, } egl_fb_read(edpy->ds, &edpy->blit_fb); - dpy_gfx_update(edpy->dcl.con, x, y, w, h); + qemu_console_update(edpy->dcl.con, x, y, w, h); } static const DisplayChangeListenerOps egl_ops = { diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c index fa8fe8970c1..7c5c9b2428c 100644 --- a/ui/gtk-egl.c +++ b/ui/gtk-egl.c @@ -108,7 +108,7 @@ void gd_egl_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -176,7 +176,7 @@ void gd_egl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -405,7 +405,7 @@ void gd_egl_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_egl_set_scanout_mode(vc, true); gtk_widget_queue_draw_area(area, x, y, w, h); diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c index ce49000d3f1..23806b9d01b 100644 --- a/ui/gtk-gl-area.c +++ b/ui/gtk-gl-area.c @@ -131,7 +131,7 @@ void gd_gl_area_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -195,7 +195,7 @@ void gd_gl_area_refresh(DisplayChangeListener *dcl) } } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -347,7 +347,7 @@ void gd_gl_area_scanout_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_gl_area_set_scanout_mode(vc, true); } diff --git a/ui/gtk.c b/ui/gtk.c index ef3707b3634..2c61b601f78 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -436,7 +436,7 @@ static void gd_update(DisplayChangeListener *dcl, static void gd_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static GdkDevice *gd_get_pointer(GdkDisplay *dpy) @@ -602,7 +602,7 @@ void gd_hw_gl_flushed(void *vcon) qemu_set_fd_handler(fence_fd, NULL, NULL, NULL); close(fence_fd); qemu_dmabuf_set_fence_fd(dmabuf, -1); - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } } @@ -729,27 +729,27 @@ static void gd_set_ui_refresh_rate(VirtualConsole *vc, int refresh_rate) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.refresh_rate = refresh_rate; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } static void gd_set_ui_size(VirtualConsole *vc, gint width, gint height) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.width = width; info.height = height; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } #if defined(CONFIG_OPENGL) @@ -2333,7 +2333,7 @@ static GSList *gd_vc_gfx_init(GtkDisplayState *s, VirtualConsole *vc, gd_connect_vc_gfx_signals(vc); group = gd_vc_menu_init(s, vc, idx, group, view_menu); - if (dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (qemu_console_ui_info_supported(vc->gfx.dcl.con)) { zoom_to_fit = true; } if (s->opts->u.gtk.has_zoom_to_fit) { diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index 73052383c2e..68a3aff7151 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -129,7 +129,7 @@ void sdl2_2d_refresh(DisplayChangeListener *dcl) struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); assert(!scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); sdl2_poll_events(scon); } diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index bb066cdd885..1547ad2f6f8 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -115,7 +115,7 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl) assert(scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (scon->updates && scon->real_window) { scon->updates = 0; sdl2_gl_render_surface(scon); diff --git a/ui/sdl2.c b/ui/sdl2.c index 89516f95c41..4fcdbd79d3c 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -604,7 +604,7 @@ static void handle_windowevent(SDL_Event *ev) .width = ev->window.data1, .height = ev->window.data2, }; - dpy_set_ui_info(scon->dcl.con, &info, true); + qemu_console_set_ui_info(scon->dcl.con, &info, true); } sdl2_redraw(scon); break; @@ -632,10 +632,10 @@ static void handle_windowevent(SDL_Event *ev) } break; case SDL_WINDOWEVENT_RESTORED: - update_displaychangelistener(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_console_listener_set_refresh(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); break; case SDL_WINDOWEVENT_MINIMIZED: - update_displaychangelistener(&scon->dcl, 500); + qemu_console_listener_set_refresh(&scon->dcl, 500); break; case SDL_WINDOWEVENT_CLOSE: if (qemu_console_is_graphic(scon->dcl.con)) { diff --git a/ui/spice-display.c b/ui/spice-display.c index 56d8140fad8..e3716127203 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -468,7 +468,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) assert(ssd->dcl.con); cursor_ref(c); qemu_mutex_unlock(&ssd->lock); - dpy_cursor_define(ssd->dcl.con, c); + qemu_console_set_cursor(ssd->dcl.con, c); qemu_mutex_lock(&ssd->lock); cursor_unref(c); } @@ -481,7 +481,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) ssd->mouse_x = -1; ssd->mouse_y = -1; qemu_mutex_unlock(&ssd->lock); - dpy_mouse_set(ssd->dcl.con, x, y, true); + qemu_console_set_mouse(ssd->dcl.con, x, y, true); } else { qemu_mutex_unlock(&ssd->lock); } @@ -489,7 +489,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) { - graphic_hw_update(ssd->dcl.con); + qemu_console_hw_update(ssd->dcl.con); WITH_QEMU_LOCK_GUARD(&ssd->lock) { if (QTAILQ_EMPTY(&ssd->updates) && ssd->ds) { @@ -668,7 +668,7 @@ static int interface_client_monitors_config(QXLInstance *sin, QemuUIInfo info; int head; - if (!dpy_ui_info_supported(ssd->dcl.con)) { + if (!qemu_console_ui_info_supported(ssd->dcl.con)) { return 0; /* == not supported by guest */ } @@ -676,7 +676,7 @@ static int interface_client_monitors_config(QXLInstance *sin, return 1; } - info = *dpy_get_ui_info(ssd->dcl.con); + info = *qemu_console_get_ui_info(ssd->dcl.con); head = qemu_console_get_index(ssd->dcl.con); if (mc->num_of_monitors > head) { @@ -690,7 +690,7 @@ static int interface_client_monitors_config(QXLInstance *sin, } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); - dpy_set_ui_info(ssd->dcl.con, &info, false); + qemu_console_set_ui_info(ssd->dcl.con, &info, false); return 1; } @@ -817,7 +817,7 @@ static void qemu_spice_gl_block(SimpleSpiceDisplay *ssd, bool block) } else { timer_del(ssd->gl_unblock_timer); } - graphic_hw_gl_block(ssd->dcl.con, block); + qemu_console_hw_gl_block(ssd->dcl.con, block); } static void qemu_spice_gl_unblock_bh(void *opaque) @@ -861,7 +861,7 @@ static void spice_gl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (ssd->gl_updates && ssd->have_surface) { qemu_spice_gl_block(ssd, true); glFlush(); diff --git a/ui/vnc.c b/ui/vnc.c index e8c8773a36e..d3dfabede03 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -2325,8 +2325,8 @@ static void set_pixel_format(VncState *vs, int bits_per_pixel, set_pixel_conversion(vs); - graphic_hw_invalidate(vs->vd->dcl.con); - graphic_hw_update(vs->vd->dcl.con); + qemu_console_hw_invalidate(vs->vd->dcl.con); + qemu_console_hw_update(vs->vd->dcl.con); } static void pixel_format_message (VncState *vs) { @@ -2384,7 +2384,7 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) VncDisplay *vd = vs->vd; if (data[0] > 3) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } switch (data[0]) { @@ -2638,9 +2638,9 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) h = read_u16(data, 4); trace_vnc_msg_client_set_desktop_size(vs, vs->ioc, w, h, screens); - if (dpy_ui_info_supported(vs->vd->dcl.con)) { + if (qemu_console_ui_info_supported(vs->vd->dcl.con)) { QemuUIInfo info = { .width = w, .height = h }; - dpy_set_ui_info(vs->vd->dcl.con, &info, false); + qemu_console_set_ui_info(vs->vd->dcl.con, &info, false); vnc_desktop_resize_ext(vs, 4 /* Request forwarded */); } else { vnc_desktop_resize_ext(vs, 3 /* Invalid screen layout */); @@ -3242,14 +3242,14 @@ static void vnc_refresh(DisplayChangeListener *dcl) int has_dirty, rects = 0; if (QTAILQ_EMPTY(&vd->clients)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); return; } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (vnc_trylock_display(vd)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); return; } @@ -3323,7 +3323,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, sioc, websocket, vs->auth, vs->subauth); VNC_DEBUG("New client on socket %p\n", vs->sioc); - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); qio_channel_set_blocking(vs->ioc, false, &error_abort); g_clear_handle_id(&vs->ioc_tag, g_source_remove); if (websocket) { @@ -3363,7 +3363,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, vnc_update_server_surface(vd); } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (!vs->websocket) { vnc_start_protocol(vs); @@ -3419,7 +3419,7 @@ static void vmstate_change_handler(void *opaque, bool running, RunState state) if (state != RUN_STATE_RUNNING) { return; } - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } static bool vnc_display_open(VncDisplay *vd, Error **errp); diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index 77d80fb7cef..be0061b9db2 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -317,8 +317,8 @@ static void apple_gfx_render_frame_completed_bh(void *opaque) copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface)); if (s->gfx_update_requested) { s->gfx_update_requested = false; - dpy_gfx_update_full(s->con); - graphic_hw_update_done(s->con); + qemu_console_update_full(s->con); + qemu_console_hw_update_done(s->con); s->new_frame_ready = false; } else { s->new_frame_ready = true; @@ -337,7 +337,7 @@ static bool apple_gfx_fb_update_display(void *opaque) assert(bql_locked()); if (s->new_frame_ready) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->new_frame_ready = false; } else if (s->pending_frames > 0) { s->gfx_update_requested = true; @@ -380,14 +380,14 @@ static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height) (s->texture.storageMode == MTLStorageModeManaged); } - dpy_gfx_replace_surface(s->con, s->surface); + qemu_console_set_surface(s->con, s->surface); } static void update_cursor(AppleGFXState *s) { assert(bql_locked()); - dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x, - s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); + qemu_console_set_mouse(s->con, s->pgdisp.cursorPosition.x, + s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); } static void update_cursor_bh(void *opaque) @@ -443,7 +443,7 @@ static void set_cursor_glyph(void *opaque) } px_data += padding_bytes_per_row; } - dpy_cursor_define(s->con, s->cursor); + qemu_console_set_cursor(s->con, s->cursor); update_cursor(s); } [glyph release]; @@ -792,7 +792,7 @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev, apple_gfx_create_display_mode_array(display_modes, num_display_modes); [mode_array release]; - s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &apple_gfx_fb_ops, s); return true; } diff --git a/ui/cocoa.m b/ui/cocoa.m index aaf82421589..98394cdc507 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -421,7 +421,7 @@ - (void) selectConsoleLocked:(unsigned int)index return; } - unregister_displaychangelistener(&dcl); + qemu_console_unregister_listener(&dcl); qkbd_state_switch_console(kbd, con); qemu_console_register_listener(con, &dcl, &dcl_ops); [self notifyMouseModeChange]; @@ -669,8 +669,8 @@ - (void) updateUIInfoLocked CVTime period = CVDisplayLinkGetNominalOutputVideoRefreshPeriod(displayLink); CVDisplayLinkRelease(displayLink); if (!(period.flags & kCVTimeIsIndefinite)) { - update_displaychangelistener(&dcl, - 1000 * period.timeValue / period.timeScale); + qemu_console_listener_set_refresh(&dcl, + 1000 * period.timeValue / period.timeScale); info.refresh_rate = (int64_t)1000 * period.timeScale / period.timeValue; } } @@ -688,7 +688,7 @@ - (void) updateUIInfoLocked info.width = frameSize.width * [[self window] backingScaleFactor]; info.height = frameSize.height * [[self window] backingScaleFactor]; - dpy_set_ui_info(dcl.con, &info, TRUE); + qemu_console_set_ui_info(dcl.con, &info, TRUE); } #pragma clang diagnostic pop @@ -2056,7 +2056,7 @@ static void cocoa_refresh(DisplayChangeListener *dcl) NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; COCOA_DEBUG("qemu_cocoa: cocoa_refresh\n"); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (cbchangecount != [[NSPasteboard generalPasteboard] changeCount]) { qemu_clipboard_info_unref(cbinfo); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304993.1577613 (Exim 4.92) (envelope-from ) id 1wLqTX-0005M5-LA; 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Sun, 10 May 2026 00:48:41 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzF-0RGR; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI5-2o9a; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=Oq7VlckxNB8n7bgOcYWjANYFO3DaRLJberU5GacjSuU=; b=jOrFkvKSfeCH2LUZsk7Qa4q1si 1cn2IXB0FgOjsTvTZrRNh7hhDnUF8iTy5VNQzVGLiQ984kbOjdsQRGiboozozJGahDXezf18ODPOP vLZ1u/o/ZKszo6dSJzCMpUstTESVub+zW6qh8ELRo/vVCiPiwiPqaopf43w87euwlcuz+Oa6kMbpx mDCdrHYDgvg45+ZMLcU/FFslcL9x2/h7QtNRBZ21TczgtYTF+SONYyGOjwayzVfwqLZVyvg45wqBd Wn9xGyIKM7wr67talThaujuyRgCWgtvctcUaOov/T4ngH7RYFyLBNTuQ7p8OJ1mcIMpwBU2PYI0q8 N7Tvd8hQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 13/30] KVM: x86: Fix KVM clock precision in get_kvmclock() with TSC scaling Date: Sat, 9 May 2026 23:46:39 +0100 Message-ID: <20260509224824.3264567-14-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366922-21B86F3B-F70B1F2A/0/0 X-purgate-type: clean X-purgate-size: 4576 From: David Woodhouse When in master clock mode, the KVM clock is defined in terms of the guest TSC. But get_kvmclock() was computing it from the host TSC without applying TSC scaling, leading to a systemic drift from the values the guest computes from its own TSC. Store the VM's TSC scaling ratio in kvm_arch and precompute the guest-TSC-based mul/shift in pvclock_update_vm_gtod_copy(). Use these in get_kvmclock() to scale the host TSC delta to guest TSC before converting to nanoseconds. This avoids "definition C" of the KVM clock described in the earlier commit "KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init()". Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 4 +++ arch/x86/kvm/x86.c | 50 +++++++++++++++++++++++++++++---- 2 files changed, 49 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 37264212c7df..5348fd5ea3f3 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1490,6 +1490,7 @@ struct kvm_arch { u64 last_tsc_write; u32 last_tsc_khz; u64 last_tsc_offset; + u64 last_tsc_scaling_ratio; u64 cur_tsc_nsec; u64 cur_tsc_write; u64 cur_tsc_offset; @@ -1504,6 +1505,9 @@ struct kvm_arch { bool use_master_clock; u64 master_kernel_ns; u64 master_cycle_now; + u64 master_tsc_scaling_ratio; + s8 master_tsc_shift; + u32 master_tsc_mul; #ifdef CONFIG_KVM_HYPERV struct kvm_hv hyperv; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index f2653eaccdf8..09b00906b1de 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2781,6 +2781,7 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, kvm->arch.last_tsc_write = tsc; kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz; kvm->arch.last_tsc_offset = offset; + kvm->arch.last_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; vcpu->arch.last_guest_tsc = tsc; @@ -3109,6 +3110,8 @@ static bool kvm_get_walltime_and_clockread(struct timespec64 *ts, * */ +static unsigned long get_cpu_tsc_khz(void); + static void pvclock_update_vm_gtod_copy(struct kvm *kvm) { #ifdef CONFIG_X86_64 @@ -3132,9 +3135,28 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) && !ka->backwards_tsc_observed && !ka->boot_vcpu_runs_old_kvmclock; - if (ka->use_master_clock) + if (ka->use_master_clock) { + u64 tsc_hz; + atomic_set(&kvm_guest_has_master_clock, 1); + /* + * Copy the scaling ratio and precompute the mul/shift for + * converting guest TSC to nanoseconds. These are used by + * get_kvmclock() to compute kvmclock from the host TSC + * without needing a vCPU reference. + */ + ka->master_tsc_scaling_ratio = ka->last_tsc_scaling_ratio; + tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (tsc_hz && kvm_caps.has_tsc_control) + tsc_hz = kvm_scale_tsc(tsc_hz, + ka->master_tsc_scaling_ratio); + if (tsc_hz) + kvm_get_time_scale(NSEC_PER_SEC, tsc_hz, + &ka->master_tsc_shift, + &ka->master_tsc_mul); + } + vclock_mode = pvclock_gtod_data.clock.vclock_mode; trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode, vcpus_matched); @@ -3235,10 +3257,28 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) data->flags |= KVM_CLOCK_TSC_STABLE; hv_clock.tsc_timestamp = ka->master_cycle_now; hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; - kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + + /* + * Use the precomputed guest-TSC-based mul/shift + * so that the kvmclock value matches what the + * guest computes from its own TSC. + */ + hv_clock.tsc_shift = ka->master_tsc_shift; + hv_clock.tsc_to_system_mul = ka->master_tsc_mul; + + if (kvm_caps.has_tsc_control) { + u64 tsc_delta = data->host_tsc - ka->master_cycle_now; + + tsc_delta = kvm_scale_tsc(tsc_delta, + ka->master_tsc_scaling_ratio); + data->clock = hv_clock.system_time + + pvclock_scale_delta(tsc_delta, + hv_clock.tsc_to_system_mul, + hv_clock.tsc_shift); + } else { + data->clock = __pvclock_read_cycles(&hv_clock, + data->host_tsc); + } put_cpu(); } else { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304990.1577591 (Exim 4.92) (envelope-from ) id 1wLqTW-00050F-Kr; Sat, 09 May 2026 22:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304990.1577591; Sat, 09 May 2026 22:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-000507-FG; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304990; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xv-RP for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-0026cu-8W; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8f5-5cb7-0a2a0a5109dd-0a2a4506e2c6-30 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cb-7371-0a2a45060019-5a9b5cc79ecc-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzH-0U6f; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhID-35Yi; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=D3ZD9svrsYhkrCggc0KSRTT7FBRjbp88Q/98SjyDptU=; b=NrR9w8Khx8VGuwXJ3A16aybrkh ouMjKpQP6w9R9TcqzykS72xA/q0gH4AnT/doDfI3e5MH+ZYve9uiC4MpDjdR9lV6ySGhrydJumLyu NRE6qOZhbMnyVxh0P9LHfCe6NExErdMqYT1Nw3g8Wv/ITqy9kuvgl0DnJY4N544z/iucLmfyYY4c4 YfuyAi3lxDKP1xpkaJePxhXdW73RHEX+f4rOvW6iiVc02rg0BLNX/qjWlRfklA0qK5eTITC9i6vD3 6pSwy+DBngCkFGmK2VnZxRsO13YK8EaftPUcsEt0y86xLTVynuB/ogM2Ne36wGplkptXKQWhZVUSB R/Rz284g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 15/30] KVM: x86: Fix compute_guest_tsc() to handle negative time deltas Date: Sat, 9 May 2026 23:46:41 +0100 Message-ID: <20260509224824.3264567-16-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366924-8C07ED75-342E4FF8/0/0 X-purgate-type: clean X-purgate-size: 1886 From: David Woodhouse The compute_guest_tsc() function computes the guest TSC at a given kernel_ns timestamp. When the master clock reference point (master_kernel_ns) is earlier than vcpu->arch.this_tsc_nsec, the delta is negative. Since pvclock_scale_delta() takes a u64, the negative value wraps to a huge positive number, producing a wildly wrong result. Change the return type to s64 and handle negative deltas explicitly by negating the delta, scaling it, and subtracting from this_tsc_write. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 2bbc2c7ac449..e281c49561fa 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2586,13 +2586,23 @@ static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz) return set_tsc_khz(vcpu, user_tsc_khz, use_scaling); } -static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns) +static s64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns) { - u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec, - vcpu->arch.virtual_tsc_mult, - vcpu->arch.virtual_tsc_shift); - tsc += vcpu->arch.this_tsc_write; - return tsc; + s64 delta_ns = kernel_ns - vcpu->arch.this_tsc_nsec; + u64 tsc; + + /* Handle negative deltas gracefully (master clock ref may be earlier) */ + if (delta_ns < 0) { + tsc = pvclock_scale_delta(-delta_ns, + vcpu->arch.virtual_tsc_mult, + vcpu->arch.virtual_tsc_shift); + return vcpu->arch.this_tsc_write - tsc; + } + + tsc = pvclock_scale_delta(delta_ns, + vcpu->arch.virtual_tsc_mult, + vcpu->arch.virtual_tsc_shift); + return vcpu->arch.this_tsc_write + tsc; } #ifdef CONFIG_X86_64 -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304998.1577675 (Exim 4.92) (envelope-from ) id 1wLqTb-00073C-UM; Sat, 09 May 2026 22:48:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304998.1577675; Sat, 09 May 2026 22:48:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTb-00071C-Lg; Sat, 09 May 2026 22:48:51 +0000 Received: by outflank-mailman (input) for mailman id 1304998; Sat, 09 May 2026 22:48:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-00058x-8n for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTW-008qns-Lp; Sun, 10 May 2026 00:48:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb9ce-2eae-0a2a0a5409dd-0a2a4502d38a-0 for ; Sun, 10 May 2026 00:48:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-af86-0a2a45020019-5a9b32228c18-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LE-0JLi; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIL-3UdM; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=ryZ6RDjir7eBEFWKcHfpnqGgBXXchIxkMDMcoDjTga0=; b=oYH6BxSE1/APIWTTtlkr9hOcnO GVYavHsEtJ1rcc7nBZtYhkeXnYPtdBB0VJfIJ1yTlSI/efp3CMvNOrSGpTjYv+L3IkYoJU2jM+k9w D1JozTm+DSVNSXz8TrpuEO+XGJFQJHZVDEdzqV9324DIRBPFASZorppyCmEWb1PGax+JBNaviBtfe rtlmPRds0TKNavS5M8SBASEBFeeib8EYiDyB9u4bnAhgHEgz3gM3+1IXGJntw4buZeRH+mSoezzun a9HG9lmrKzQe8EMNelYypA8qTUCAdCJcXoHPWJVu3c8AaBGq6ROOlyg7Bgte+C2xigcy3oxXFr7bB 8v+W0vfw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 17/30] KVM: x86: Simplify and comment kvm_get_time_scale() Date: Sat, 9 May 2026 23:46:43 +0100 Message-ID: <20260509224824.3264567-18-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366926-A9B70161-7656F2D5/0/0 X-purgate-type: clean X-purgate-size: 3192 From: David Woodhouse The kvm_get_time_scale() function was entirely opaque. Add comments explaining what it does: compute a fixed-point multiplier and shift for converting TSC ticks to nanoseconds via pvclock_scale_delta(). Rename the local variables from the cryptic tps64/tps32/scaled64 to base_hz_u64/base32/scaled_hz_u64 to make the code self-documenting. The "tps32" name stood for "Ticks Per Second" but was misleading since it held the shifted base frequency, not a tick count. No functional change. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 55 +++++++++++++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8e4993ef4f6b..980fc22ee05b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2472,32 +2472,57 @@ static uint32_t div_frac(uint32_t dividend, uint32_t divisor) return dividend; } -static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz, +static void kvm_get_time_scale(u64 scaled_hz, u64 base_hz, s8 *pshift, u32 *pmultiplier) { - uint64_t scaled64; - int32_t shift = 0; - uint64_t tps64; - uint32_t tps32; + u64 scaled_hz_u64 = scaled_hz; + s32 shift = 0; + u64 base_hz_u64; + u32 base32; - tps64 = base_hz; - scaled64 = scaled_hz; - while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) { - tps64 >>= 1; + /* + * This function calculates a fixed-point multiplier and shift such + * that: + * time_ns = (tsc_cycles << shift) * multiplier >> 32 + * + * Where tsc_cycles tick at base_hz, and time_ns should count at + * scaled_hz (typically NSEC_PER_SEC for a TSC→nanoseconds conversion). + * + * The multiplier is: (scaled_hz << 32) / base_hz, adjusted by shift + * to keep everything in range. + */ + + base_hz_u64 = base_hz; + + /* + * Start by shifting base_hz right until it fits in 32 bits, and + * is lower than double the target rate. This introduces a negative + * shift value which would result in pvclock_scale_delta() shifting + * the actual tick count right before performing the multiplication. + */ + while (base_hz_u64 > scaled_hz_u64 * 2 || base_hz_u64 >> 32) { + base_hz_u64 >>= 1; shift--; } - tps32 = (uint32_t)tps64; - while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) { - if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000) - scaled64 >>= 1; + /* Now the shifted base_hz fits in 32 bits. */ + base32 = (u32)base_hz_u64; + + /* + * Next, shift scaled_hz right until it fits in 32 bits, and ensure + * that the shifted base_hz is not larger (so that the result of the + * final division also fits in 32 bits). + */ + while (base32 <= scaled_hz_u64 || scaled_hz_u64 >> 32) { + if (scaled_hz_u64 >> 32 || base32 & BIT(31)) + scaled_hz_u64 >>= 1; else - tps32 <<= 1; + base32 <<= 1; shift++; } *pshift = shift; - *pmultiplier = div_frac(scaled64, tps32); + *pmultiplier = div_frac(scaled_hz_u64, base32); } #ifdef CONFIG_X86_64 -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304988.1577587 (Exim 4.92) (envelope-from ) id 1wLqTW-0004z2-DV; Sat, 09 May 2026 22:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304988.1577587; Sat, 09 May 2026 22:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-0004yk-7u; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304988; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004xx-1k for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-00DG64-De; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8ed-e002-0a2a0a5209dd-0a2a450aedf4-32 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9ca-56b3-0a2a450a0019-5a9b5cc7c8dc-3 for ; Sun, 10 May 2026 00:48:43 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzE-0SAJ; Sat, 09 May 2026 22:48:34 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI1-2gsb; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=zKn6rM5SNp1NUsYTwVeNP1ZCWEOK4E9JR5PloHDb+Ck=; b=nkedMhJt8F9vSW46ftqs+afk74 R2kXr8DGF/BR2ZbLetJk7cK8mb7U8wrd+BjH0SLOd2HT+EGkf+eHfiV6BHYj9S3aMKR1w+7RbmCgL WfZdFYRkUyitRkvhEwFbn8/RZK606OSsjn+RxBhvg4DRPETaEapIcUUaSBInJkB6+TK5nUtBNgb72 fA3ZOT6czVLlApEuNGzRjCGH87yrxPogqqE0x+gC0ah5O5nNxLIWkSQaGtRdHx9srHNiP4bM1d0lV h0qnlA792499cVUurkX1eNKfWL1N3jMb9S/HMH93MHG6mUxkvvyxBtKCKH195l2JIeGXuHxtogYJU dinfu75Q==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 12/30] KVM: x86: Use get_kvmclock_base_ns() as fallback in get_kvmclock() Date: Sat, 9 May 2026 23:46:38 +0100 Message-ID: <20260509224824.3264567-13-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366924-725748B7-EE4BF64C/0/0 X-purgate-type: clean X-purgate-size: 1265 From: David Woodhouse If kvm_get_walltime_and_clockread() fails unexpectedly (the WARN case), restart the seqcount loop rather than falling back to a raw rdtsc() which would set KVM_CLOCK_TSC_STABLE without KVM_CLOCK_REALTIME. That code path could never actually be reached in practice: on 64-bit hosts, use_master_clock can only be true when the clocksource is TSC-based, and on 32-bit hosts, use_master_clock is never set. But the fallback to raw rdtsc() was misleading and the resulting flags combination was inconsistent. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9b395c00ccf2..f2653eaccdf8 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3225,7 +3225,8 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; } else if (WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) { - data->host_tsc = rdtsc(); + put_cpu(); + continue; } #else data->host_tsc = rdtsc(); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304995.1577627 (Exim 4.92) (envelope-from ) id 1wLqTY-0005aA-G0; Sat, 09 May 2026 22:48:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304995.1577627; Sat, 09 May 2026 22:48:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTY-0005YC-1a; Sat, 09 May 2026 22:48:48 +0000 Received: by outflank-mailman (input) for mailman id 1304995; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xt-3C for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTT-002bXZ-Gi; Sun, 10 May 2026 00:48:43 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8a3-bab6-0a2a0a5309dd-0a2a45028e02-46 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9ca-af86-0a2a45020019-5a9b5cc7d974-3 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTE-00000008wzN-1WDo; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJ3-1Fbj; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=6tRK559BiNuC9vPX6A/P9bB+NgbxmEIjWbF4mmHiKwg=; b=XdZwbo1A+QS0GQ4rSXUX4N1mON +BlsbG3jDpcSWQhV5QxKCntdc8Vov11hWedcSRVSsOFPwppBqsZ6Nis+O8bwl2CCSQ5hYR8W++geD vukV7rjaZBOrvt6I9xowd93yPY0C0Lzh/iojh9p1uQWpLnPfReYKg8eWZhCQMUPCsNXSqu/Y7toLg E6Frch+y/WEDPUhLCG957OQIe+Z+QGM3b4WJ3AXNaeyT5E4hHAIpCsvm122/2Vp2ysz/lvM+nk7kL WDy8f4TtKpFr0JcieI8f8+0F+JBj1RNoxvcmBf9YzAQnVG0oBiA+L4x/Lzr26MdYoNPIdFM9YVMzi 3sLkfLjQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 28/30] KVM: x86: Remove runtime Xen TSC frequency CPUID update Date: Sat, 9 May 2026 23:46:54 +0100 Message-ID: <20260509224824.3264567-29-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366922-7BF66161-A2170A75/0/0 X-purgate-type: clean X-purgate-size: 3108 From: David Woodhouse Remove the code in kvm_cpuid() that dynamically updates the Xen TSC info CPUID leaf at runtime. This code was updating the wrong sub-leaf anyway (0x40000x03/2 EAX is the *host* TSC frequency per the Xen ABI, not the guest frequency which belongs in 0x40000x03/0 ECX). Userspace now has all the information it needs to populate the Xen TSC info leaves (and the generic 0x40000010 timing leaf) at vCPU setup time: - KVM_GET_CLOCK_GUEST returns the pvclock_vcpu_time_info structure containing tsc_to_system_mul and tsc_shift (Xen leaf index 1) - KVM_VCPU_TSC_EFFECTIVE_FREQ returns the effective TSC and bus frequencies in kHz (Xen leaf index 2, and 0x40000010) - KVM_VCPU_TSC_SCALE returns the raw hardware scaling ratio for precise arithmetic (VMClock) This eliminates the last instance of KVM modifying guest CPUID entries at runtime for timing information. Signed-off-by: David Woodhouse --- arch/x86/kvm/cpuid.c | 16 ---------------- arch/x86/kvm/xen.h | 13 ------------- 2 files changed, 29 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 621d950ec692..826637a0b72d 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -2117,22 +2117,6 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, } else if (function == 0x80000007) { if (kvm_hv_invtsc_suppressed(vcpu)) *edx &= ~feature_bit(CONSTANT_TSC); - } else if (IS_ENABLED(CONFIG_KVM_XEN) && - kvm_xen_is_tsc_leaf(vcpu, function)) { - /* - * Update guest TSC frequency information if necessary. - * Ignore failures, there is no sane value that can be - * provided if KVM can't get the TSC frequency. - */ - if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) - kvm_guest_time_update(vcpu); - - if (index == 1) { - *ecx = vcpu->arch.pvclock_tsc_mul; - *edx = vcpu->arch.pvclock_tsc_shift; - } else if (index == 2) { - *eax = div_u64(vcpu->arch.hw_tsc_hz, 1000); - } } } else { *eax = *ebx = *ecx = *edx = 0; diff --git a/arch/x86/kvm/xen.h b/arch/x86/kvm/xen.h index 59e6128a7bd3..f372855857a8 100644 --- a/arch/x86/kvm/xen.h +++ b/arch/x86/kvm/xen.h @@ -50,14 +50,6 @@ static inline void kvm_xen_sw_enable_lapic(struct kvm_vcpu *vcpu) kvm_xen_inject_vcpu_vector(vcpu); } -static inline bool kvm_xen_is_tsc_leaf(struct kvm_vcpu *vcpu, u32 function) -{ - return static_branch_unlikely(&kvm_xen_enabled.key) && - vcpu->arch.xen.cpuid.base && - function <= vcpu->arch.xen.cpuid.limit && - function == (vcpu->arch.xen.cpuid.base | XEN_CPUID_LEAF(3)); -} - static inline bool kvm_xen_msr_enabled(struct kvm *kvm) { return static_branch_unlikely(&kvm_xen_enabled.key) && @@ -177,11 +169,6 @@ static inline bool kvm_xen_timer_enabled(struct kvm_vcpu *vcpu) { return false; } - -static inline bool kvm_xen_is_tsc_leaf(struct kvm_vcpu *vcpu, u32 function) -{ - return false; -} #endif int kvm_xen_hypercall(struct kvm_vcpu *vcpu); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304989.1577598 (Exim 4.92) (envelope-from ) id 1wLqTX-00056O-0T; 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Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzM-0Uid; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIv-0xnG; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=CvARcxGjW2rk76ZnbjloHmvArQA7vOXWK2cN1ZjzCjA=; b=JwWsCSTN0jP5CaRFdIC/kq7DJK 1ckbZPZwhNr+bWo+2Nhf9ylITeR8BeXmgLFP+SLIQy4R3DZLic8UmfJCBL5L/HKQUEiJRG0E/oNuN +lwLHmVzILBn/0iCKWTWSrft7nOvyYmtLxwuFUVmSHB8ERSs5oQFnzVtmRGkTjYFBlwInjCp4Xkjk DZsdQFZY+Wi0hj8gEaa+ri3S19xehlprECPd42H2HjvqS913SmW4HTcoBeS5SSq8WxjSdNReZYJMO P7XDr1BLUNqOsGb6V0VGGUsZ6d3Y6v65PQFbi1ulY6TtP16QxEvcTW/cb1Z5dK786u3iT28gS5bBR /Fo08+AA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 26/30] KVM: x86: Avoid redundant masterclock updates from multiple vCPUs Date: Sat, 9 May 2026 23:46:52 +0100 Message-ID: <20260509224824.3264567-27-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366924-1B77AF3B-836CBEAA/0/0 X-purgate-type: clean X-purgate-size: 4493 From: David Woodhouse When a masterclock update is triggered (e.g. by the clocksource change notifier), KVM_REQ_MASTERCLOCK_UPDATE is set on all vCPUs. Without this fix, each vCPU independently processes the request and redundantly re-executes the entire pvclock_update_vm_gtod_copy() sequence, serialized only by tsc_write_lock. Each redundant re-snapshot of the master clock reference point introduces potential clock drift. Fix this by having __kvm_start_pvclock_update() check, after acquiring the lock, whether the requesting vCPU's KVM_REQ_MASTERCLOCK_UPDATE is still set. If another vCPU already did the update and cleared it, bail out. Otherwise, clear the request on all other vCPUs before proceeding. The caller in vcpu_enter_guest() now uses kvm_test_request() (non-clearing) since the clearing is done inside __kvm_start_pvclock_update() under the lock. Suggested-by: Dongli Zhang Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 56 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 44 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 7d9ec0638d28..77dfd4455a4e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3259,10 +3259,39 @@ static void kvm_make_mclock_inprogress_request(struct kvm *kvm) kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS); } -static void __kvm_start_pvclock_update(struct kvm *kvm) +static void kvm_clear_mclock_inprogress_request(struct kvm *kvm) { + struct kvm_vcpu *vcpu; + unsigned long i; + + kvm_for_each_vcpu(i, vcpu, kvm) + kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu); +} + +static bool __kvm_start_pvclock_update(struct kvm *kvm, struct kvm_vcpu *requesting_vcpu) +{ + struct kvm_vcpu *vcpu; + unsigned long i; + raw_spin_lock_irq(&kvm->arch.tsc_write_lock); + + /* + * If another vCPU already did the update while we were waiting + * for the lock, our request will have been cleared. Bail out. + */ + if (requesting_vcpu && + !kvm_test_request(KVM_REQ_MASTERCLOCK_UPDATE, requesting_vcpu)) { + kvm_clear_mclock_inprogress_request(kvm); + raw_spin_unlock_irq(&kvm->arch.tsc_write_lock); + return false; + } + + /* The update is VM-wide; prevent other vCPUs from redoing it. */ + kvm_for_each_vcpu(i, vcpu, kvm) + kvm_clear_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu); + write_seqcount_begin(&kvm->arch.pvclock_sc); + return true; } static void kvm_start_pvclock_update(struct kvm *kvm) @@ -3270,7 +3299,7 @@ static void kvm_start_pvclock_update(struct kvm *kvm) kvm_make_mclock_inprogress_request(kvm); /* no guest entries from this point */ - __kvm_start_pvclock_update(kvm); + __kvm_start_pvclock_update(kvm, NULL); } static void kvm_end_pvclock_update(struct kvm *kvm) @@ -3279,22 +3308,25 @@ static void kvm_end_pvclock_update(struct kvm *kvm) struct kvm_vcpu *vcpu; unsigned long i; - write_seqcount_end(&ka->pvclock_sc); - raw_spin_unlock_irq(&ka->tsc_write_lock); kvm_for_each_vcpu(i, vcpu, kvm) kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); /* guest entries allowed */ - kvm_for_each_vcpu(i, vcpu, kvm) - kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu); + kvm_clear_mclock_inprogress_request(kvm); + + write_seqcount_end(&ka->pvclock_sc); + raw_spin_unlock_irq(&ka->tsc_write_lock); } -static void kvm_update_masterclock(struct kvm *kvm) +static void kvm_update_masterclock(struct kvm *kvm, struct kvm_vcpu *vcpu) { kvm_hv_request_tsc_page_update(kvm); - kvm_start_pvclock_update(kvm); - pvclock_update_vm_gtod_copy(kvm); - kvm_end_pvclock_update(kvm); + kvm_make_mclock_inprogress_request(kvm); + + if (__kvm_start_pvclock_update(kvm, vcpu)) { + pvclock_update_vm_gtod_copy(kvm); + kvm_end_pvclock_update(kvm); + } } /* @@ -11485,8 +11517,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) kvm_mmu_free_obsolete_roots(vcpu); if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu)) __kvm_migrate_timers(vcpu); - if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu)) - kvm_update_masterclock(vcpu->kvm); + if (kvm_test_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu)) + kvm_update_masterclock(vcpu->kvm, vcpu); if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu)) kvm_gen_kvmclock_update(vcpu); if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304992.1577606 (Exim 4.92) (envelope-from ) id 1wLqTX-0005C8-BL; Sat, 09 May 2026 22:48:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304992.1577606; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-0005B4-4l; Sat, 09 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1304992; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004xy-8i for xen-devel@lists.xenproject.org; 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dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=VZW3BYOsJBjCxrX0Ak3Y7mLfSYoVJvjVzeACh4h0wdA=; b=F8o2huYCyGm1b+IKEhxif0OKZe 1/VjHOyqiLIQDr1VUqRvk7k4ZwOHLp8x2xUQoPmNubIdn/Y9PGOOKLUCPS0Bd6huZraf2VXT69Tcy PrYoG0wU7gMusTyFns2Sk+299Y82Z4fHtRYuTFtZd8fvUT/6x9Lu9Uqy/UPrHonTZFD7kEszHE5Es s0CbR3wEQ7PbLtr3p6fRXS1cxQxf/q+QIwcW3ESwiOvm2ZnZymrCuIOOmVlJ0ZsoEgLs3M07cKcok GwmW2q+R9tkBkUh3woXo6m/KggKAhiNjMtxICUNY9cdd96vI/ocFJGk0T4R8oFSPGI1cygwDPHqGH zDppAOQA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 06/30] KVM: x86: Explicitly disable TSC scaling without CONSTANT_TSC Date: Sat, 9 May 2026 23:46:32 +0100 Message-ID: <20260509224824.3264567-7-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1778366924-AEF58FF4-D61C0A67/0/0 X-purgate-type: clean X-purgate-size: 1884 From: David Woodhouse KVM does make an attempt to cope with non-constant TSC, and has notifiers to handle host TSC frequency changes. However, it *only* adjusts the KVM clock, and doesn't adjust TSC frequency scaling when the host changes. This is presumably because non-constant TSCs were fixed in hardware long before TSC scaling was implemented, so there should never be real CPUs which have TSC scaling but *not* CONSTANT_TSC. Such a combination could potentially happen in some odd L1 nesting environment, but it isn't worth trying to support it. Just make the dependency explicit. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/svm/svm.c | 3 ++- arch/x86/kvm/vmx/vmx.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index e7fdd7a9c280..7817752533fe 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -5546,7 +5546,8 @@ static __init int svm_hardware_setup(void) XFEATURE_MASK_BNDCSR); if (tsc_scaling) { - if (!boot_cpu_has(X86_FEATURE_TSCRATEMSR)) { + if (!boot_cpu_has(X86_FEATURE_TSCRATEMSR) || + !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { tsc_scaling = false; } else { pr_info("TSC scaling supported\n"); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 5c2c33a5f7dc..4f6035d72bbe 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -8696,7 +8696,7 @@ __init int vmx_hardware_setup(void) if (!enable_apicv || !cpu_has_vmx_ipiv()) enable_ipiv = false; - if (cpu_has_vmx_tsc_scaling()) + if (cpu_has_vmx_tsc_scaling() && boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) kvm_caps.has_tsc_control = true; kvm_caps.max_tsc_scaling_ratio = KVM_VMX_TSC_MULTIPLIER_MAX; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304997.1577664 (Exim 4.92) (envelope-from ) id 1wLqTa-0006ce-Sh; Sat, 09 May 2026 22:48:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304997.1577664; Sat, 09 May 2026 22:48:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTa-0006aw-Df; Sat, 09 May 2026 22:48:50 +0000 Received: by outflank-mailman (input) for mailman id 1304997; Sat, 09 May 2026 22:48:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTY-0005Zz-Aa for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTX-002bXZ-Ng; Sun, 10 May 2026 00:48:47 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb9cf-bab6-0a2a0a5309dd-0a2a450bc9d2-0 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-212f-0a2a450b0019-5a9b3222ce9e-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060L9-2Pfv; Sat, 09 May 2026 22:48:32 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHV-0c3b; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=QaE/jvGdpKCrMu7vuBQqqJqP5vWDROke7W8G0eRZk4g=; b=DoOTPUu0tDOpDhNUD5GD3VymGC agkMnNVNF3tXlzjfcJ3f8fgMLH0TVNE6lTDA+SmaBZpdndkRQvdUfYpNNQUjYo4h9pmFg1ghTy6JK TJTD6SNzc2p9xzSd92A3Nod6poc4y3RYpG6snRh5AMmLjSitEoxCD9SnH0EZvrtQ4BiPzgnLMFjUy usxXQCvIHAmTY5b1qUnWerxbab01zCu1M4crES3M4j2BRAHhvBHu1n2xa4oyoj0CIviPuT/Ak90um Wp9wF78NVSSs0glwlOn0E3FZMCPVRqMhutT0hqOqdevTMtFNPl2n/xRBHkhARcz3GtW5FPLogwoms 3soFmUOA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration Date: Sat, 9 May 2026 23:46:30 +0100 Message-ID: <20260509224824.3264567-5-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366927-1A971F3B-EEF38261/0/0 X-purgate-type: clean X-purgate-size: 10255 From: Jack Allister In the common case (where kvm->arch.use_master_clock is true), the KVM clock is defined as a simple arithmetic function of the guest TSC, based on a reference point stored in kvm->arch.master_kernel_ns and kvm->arch.master_cycle_now. The existing KVM_[GS]ET_CLOCK functionality does not allow for this relationship to be precisely saved and restored by userspace. All it can currently do is set the KVM clock at a given UTC reference time, which is necessarily imprecise. So on live update, the guest TSC can remain cycle accurate at precisely the same offset from the host TSC, but there is no way for userspace to restore the KVM clock accurately. Even on live migration to a new host, where the accuracy of the guest time-keeping is fundamentally limited by the accuracy of wallclock synchronization between the source and destination hosts, the clock jump experienced by the guest's TSC and its KVM clock should at least be *consistent*. Even when the guest TSC suffers a discontinuity, its KVM clock should still remain the *same* arithmetic function of the guest TSC, and not suffer an *additional* discontinuity. To allow for accurate migration of the KVM clock, add per-vCPU ioctls which save and restore the actual PV clock info in pvclock_vcpu_time_info. The restoration in KVM_SET_CLOCK_GUEST works by creating a new reference point in time just as kvm_update_masterclock() does, and calculating the corresponding guest TSC value. This guest TSC value is then passed through the user-provided pvclock structure to generate the *intended* KVM clock value at that point in time, and through the *actual* KVM clock calculation. Then kvm->arch.kvmclock_offset is adjusted to eliminate the difference. Where kvm->arch.use_master_clock is false (because the host TSC is unreliable, or the guest TSCs are configured strangely), the KVM clock is *not* defined as a function of the guest TSC so KVM_GET_CLOCK_GUEST returns an error. In this case, as documented, userspace shall use the legacy KVM_GET_CLOCK ioctl. The loss of precision is acceptable in this case since the clocks are imprecise in this mode anyway. On *restoration*, if kvm->arch.use_master_clock is false, an error is returned for similar reasons and userspace shall fall back to using KVM_SET_CLOCK. This does mean that, as documented, userspace needs to use *both* KVM_GET_CLOCK_GUEST and KVM_GET_CLOCK and send both results with the migration data (unless the intent is to refuse to resume on a host with bad TSC). Co-developed-by: David Woodhouse Signed-off-by: David Woodhouse Signed-off-by: Jack Allister Reviewed-by: Paul Durrant Cc: Dongli Zhang --- Documentation/virt/kvm/api.rst | 37 ++++++++ arch/x86/kvm/x86.c | 151 +++++++++++++++++++++++++++++++++ include/uapi/linux/kvm.h | 3 + 3 files changed, 191 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 52bbbb553ce1..2268b4442df6 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -6553,6 +6553,43 @@ KVM_S390_KEYOP_SSKE Sets the storage key for the guest address ``guest_addr`` to the key specified in ``key``, returning the previous value in ``key``. +4.145 KVM_GET_CLOCK_GUEST +---------------------------- + +:Capability: none +:Architectures: x86_64 +:Type: vcpu ioctl +:Parameters: struct pvclock_vcpu_time_info (out) +:Returns: 0 on success, <0 on error + +Retrieves the current time information structure used for KVM/PV clocks, +in precisely the form advertised to the guest vCPU, which gives parameters +for a direct conversion from a guest TSC value to nanoseconds. + +When the KVM clock is not in "master clock" mode, for example because the +host TSC is unreliable or the guest TSCs are oddly configured, the KVM clock +is actually defined by the host CLOCK_MONOTONIC_RAW instead of the guest TSC. +In this case, the KVM_GET_CLOCK_GUEST ioctl returns -EINVAL. + +4.146 KVM_SET_CLOCK_GUEST +---------------------------- + +:Capability: none +:Architectures: x86_64 +:Type: vcpu ioctl +:Parameters: struct pvclock_vcpu_time_info (in) +:Returns: 0 on success, <0 on error + +Sets the KVM clock (for the whole VM) in terms of the vCPU TSC, using the +pvclock structure as returned by KVM_GET_CLOCK_GUEST. This allows the precise +arithmetic relationship between guest TSC and KVM clock to be preserved by +userspace across migration. + +When the KVM clock is not in "master clock" mode, and the KVM clock is actually +defined by the host CLOCK_MONOTONIC_RAW, this ioctl returns -EINVAL. Userspace +may choose to set the clock using the less precise KVM_SET_CLOCK ioctl, or may +choose to fail, denying migration to a host whose TSC is misbehaving. + .. _kvm_run: 5. The kvm_run structure diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d9ef165df6a1..d1327d5fba3f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6205,6 +6205,149 @@ static int kvm_get_reg_list(struct kvm_vcpu *vcpu, return 0; } +#ifdef CONFIG_X86_64 +static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) +{ + struct pvclock_vcpu_time_info hv_clock = {}; + struct kvm_vcpu_arch *vcpu = &v->arch; + struct kvm_arch *ka = &v->kvm->arch; + unsigned int seq; + + /* + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the pvclock + * has never been generated at all, call kvm_guest_time_update(). + */ + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, v) || !vcpu->hw_tsc_hz) { + int idx = srcu_read_lock(&v->kvm->srcu); + int ret = kvm_guest_time_update(v); + + srcu_read_unlock(&v->kvm->srcu, idx); + if (ret) + return -EINVAL; + } + + /* + * Reconstruct the pvclock from the master clock state, matching + * exactly what kvm_guest_time_update() writes to the guest. + */ + do { + seq = read_seqcount_begin(&ka->pvclock_sc); + + if (!ka->use_master_clock) + return -EINVAL; + + hv_clock.tsc_timestamp = kvm_read_l1_tsc(v, ka->master_cycle_now); + hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + } while (read_seqcount_retry(&ka->pvclock_sc, seq)); + + hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; + hv_clock.tsc_to_system_mul = vcpu->pvclock_tsc_mul; + hv_clock.flags = PVCLOCK_TSC_STABLE_BIT; + + if (copy_to_user(argp, &hv_clock, sizeof(hv_clock))) + return -EFAULT; + + return 0; +} + +/* + * Reverse the calculation in the hv_clock definition. + * + * time_ns = ( (cycles << shift) * mul ) >> 32; + * (although shift can be negative, so that's bad C) + * + * So for a single second, + * NSEC_PER_SEC = ( ( FREQ_HZ << shift) * mul ) >> 32 + * NSEC_PER_SEC << 32 = ( FREQ_HZ << shift ) * mul + * ( NSEC_PER_SEC << 32 ) / mul = FREQ_HZ << shift + * ( NSEC_PER_SEC << 32 ) / mul ) >> shift = FREQ_HZ + */ +static u64 hvclock_to_hz(u32 mul, s8 shift) +{ + u64 tm = NSEC_PER_SEC << 32; + + /* Maximise precision. Shift right until the top bit is set */ + tm <<= 2; + shift += 2; + + /* While 'mul' is even, increase the shift *after* the division */ + while (!(mul & 1)) { + shift++; + mul >>= 1; + } + + tm /= mul; + + if (shift > 0) + return tm >> shift; + else + return tm << -shift; +} + +static int kvm_vcpu_ioctl_set_clock_guest(struct kvm_vcpu *v, void __user *argp) +{ + struct pvclock_vcpu_time_info user_hv_clock; + struct kvm *kvm = v->kvm; + struct kvm_arch *ka = &kvm->arch; + u64 curr_tsc_hz, user_tsc_hz; + u64 user_clk_ns; + u64 guest_tsc; + int rc = 0; + + if (copy_from_user(&user_hv_clock, argp, sizeof(user_hv_clock))) + return -EFAULT; + + if (!user_hv_clock.tsc_to_system_mul) + return -EINVAL; + + user_tsc_hz = hvclock_to_hz(user_hv_clock.tsc_to_system_mul, + user_hv_clock.tsc_shift); + + kvm_hv_request_tsc_page_update(kvm); + kvm_start_pvclock_update(kvm); + pvclock_update_vm_gtod_copy(kvm); + + if (!ka->use_master_clock) { + rc = -EINVAL; + goto out; + } + + curr_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (unlikely(curr_tsc_hz == 0)) { + rc = -EINVAL; + goto out; + } + + if (kvm_caps.has_tsc_control) + curr_tsc_hz = kvm_scale_tsc(curr_tsc_hz, + v->arch.l1_tsc_scaling_ratio); + + /* + * Allow for a discrepancy of 1 kHz either way between the TSC + * frequency used to generate the user's pvclock and the current + * host's measured frequency, since they may not precisely match. + */ + if (user_tsc_hz < curr_tsc_hz - 1000 || + user_tsc_hz > curr_tsc_hz + 1000) { + rc = -ERANGE; + goto out; + } + + /* + * Calculate the guest TSC at the new reference point, and the + * corresponding KVM clock value according to user_hv_clock. + * Adjust kvmclock_offset so both definitions agree. + */ + guest_tsc = kvm_read_l1_tsc(v, ka->master_cycle_now); + user_clk_ns = __pvclock_read_cycles(&user_hv_clock, guest_tsc); + ka->kvmclock_offset = user_clk_ns - ka->master_kernel_ns; + +out: + kvm_end_pvclock_update(kvm); + return rc; +} +#endif + long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg) { @@ -6605,6 +6748,14 @@ long kvm_arch_vcpu_ioctl(struct file *filp, srcu_read_unlock(&vcpu->kvm->srcu, idx); break; } +#ifdef CONFIG_X86_64 + case KVM_SET_CLOCK_GUEST: + r = kvm_vcpu_ioctl_set_clock_guest(vcpu, argp); + break; + case KVM_GET_CLOCK_GUEST: + r = kvm_vcpu_ioctl_get_clock_guest(vcpu, argp); + break; +#endif #ifdef CONFIG_KVM_HYPERV case KVM_GET_SUPPORTED_HV_CPUID: r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp); diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 6c8afa2047bf..9b50191b859c 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1669,4 +1669,7 @@ struct kvm_pre_fault_memory { __u64 padding[5]; }; +#define KVM_SET_CLOCK_GUEST _IOW(KVMIO, 0xd6, struct pvclock_vcpu_time_info) +#define KVM_GET_CLOCK_GUEST _IOR(KVMIO, 0xd7, struct pvclock_vcpu_time_info) + #endif /* __LINUX_KVM_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304996.1577636 (Exim 4.92) (envelope-from ) id 1wLqTY-0005jS-V1; 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bh=wfrMtj5ZnQw5qzm4tVj9nJs76L69YTBE+psOfwhJUqs=; b=WH1+Pf0sgeUE/1kLOZi2zQe61+ clX/XjFXxTT+HlO735BJ+oBKA2xFoMIwzCRYs9uPFc+tsR2LTvxBT9YU2rhNSq4xECjvRfuLc5zvP uUPr2hiZ/luP/qeJhQYWXATigOx1W799RsiWGCpFIGVbB6n1zkpYPwFnjZDgbFJLCzS+5x7nuIzvk aISbB4j22HT0p5iIcmczYYifqI4UCo1f4iaIVWGou3HmdziKDWtow1GUkQEwb1vSxtNUPcvB1WESA 20D4xRu8stcXhQ493WDRq1vz29jJfNmBc2S8KOifh8+DNtKnbo0Js6r6FJVLPKtAmF3LKaTEaWwmV SJuOPcbw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 02/30] KVM: x86: Improve accuracy of KVM clock when TSC scaling is in force Date: Sat, 9 May 2026 23:46:28 +0100 Message-ID: <20260509224824.3264567-3-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366925-BE776DB1-84D15631/0/0 X-purgate-type: clean X-purgate-size: 4034 From: David Woodhouse The kvm_guest_time_update() function scales the host TSC frequency to the guest's using kvm_scale_tsc() and the v->arch.l1_tsc_scaling_ratio scaling ratio previously calculated for that vCPU. Then calculates the scaling factors for the KVM clock itself based on that guest TSC frequency. However, it uses kHz as the unit when scaling, and then multiplies by 1000 only at the end. With a host TSC frequency of 3000MHz and a guest set to 2500MHz, the result of kvm_scale_tsc() will actually come out at 2,499,999kHz. So the KVM clock advertised to the guest is based on a frequency of 2,499,999,000 Hz. By using Hz as the unit from the beginning, the KVM clock would be based on a more accurate frequency of 2,499,999,999 Hz in this example. Use u64 for the hw_tsc_hz field since an unsigned int would overflow for TSC frequencies above 4GHz. Use div_u64() for the Xen CPUID leaf to play nice with 32-bit kernels. Fixes: 78db6a503796 ("KVM: x86: rewrite handling of scaled TSC for kvmclock") Reviewed-by: Paul Durrant Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/x86.c | 17 +++++++++-------- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index c470e40a00aa..37264212c7df 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -950,7 +950,7 @@ struct kvm_vcpu_arch { gpa_t time; s8 pvclock_tsc_shift; u32 pvclock_tsc_mul; - unsigned int hw_tsc_khz; + u64 hw_tsc_hz; struct gfn_to_pfn_cache pv_time; /* set guest stopped flag in pvclock flags field */ bool pvclock_set_guest_stopped_request; diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e69156b54cff..621d950ec692 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -2131,7 +2131,7 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, *ecx = vcpu->arch.pvclock_tsc_mul; *edx = vcpu->arch.pvclock_tsc_shift; } else if (index == 2) { - *eax = vcpu->arch.hw_tsc_khz; + *eax = div_u64(vcpu->arch.hw_tsc_hz, 1000); } } } else { diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0a1b63c63d1a..d9ef165df6a1 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3314,7 +3314,8 @@ static void kvm_setup_guest_pvclock(struct pvclock_vcpu_time_info *ref_hv_clock, int kvm_guest_time_update(struct kvm_vcpu *v) { struct pvclock_vcpu_time_info hv_clock = {}; - unsigned long flags, tgt_tsc_khz; + unsigned long flags; + u64 tgt_tsc_hz; unsigned seq; struct kvm_vcpu_arch *vcpu = &v->arch; struct kvm_arch *ka = &v->kvm->arch; @@ -3340,8 +3341,8 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* Keep irq disabled to prevent changes to the clock */ local_irq_save(flags); - tgt_tsc_khz = get_cpu_tsc_khz(); - if (unlikely(tgt_tsc_khz == 0)) { + tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (unlikely(tgt_tsc_hz == 0)) { local_irq_restore(flags); kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); return 1; @@ -3376,16 +3377,16 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* With all the info we got, fill in the values */ if (kvm_caps.has_tsc_control) { - tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz, + tgt_tsc_hz = kvm_scale_tsc(tgt_tsc_hz, v->arch.l1_tsc_scaling_ratio); - tgt_tsc_khz = tgt_tsc_khz ? : 1; + tgt_tsc_hz = tgt_tsc_hz ? : 1; } - if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) { - kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL, + if (unlikely(vcpu->hw_tsc_hz != tgt_tsc_hz)) { + kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_hz, &vcpu->pvclock_tsc_shift, &vcpu->pvclock_tsc_mul); - vcpu->hw_tsc_khz = tgt_tsc_khz; + vcpu->hw_tsc_hz = tgt_tsc_hz; } hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304991.1577601 (Exim 4.92) (envelope-from ) id 1wLqTX-00058N-6S; Sat, 09 May 2026 22:48:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304991.1577601; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-000575-U7; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304991; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xu-Pl for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTT-00DG64-Lm; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb98b-e002-0a2a0a5209dd-0a2a4508e700-24 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9c9-63b5-0a2a45080019-5a9b5cc79ec6-3 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzB-0RLs; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHp-297o; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=Rlefrv035dE/A4ZfqxoNxpMximz7sVxUML4oSeehurg=; b=BpdCMag+qQeRQ5HUSztZ5825NR CwsTyPlVzrIaUi3MD2Pgs7SkvujS/dAokWA6r0Uea/18K0TZbpMa+C1GC+RQlvY0ZYeA3V0RLgLyH p84QoHNsDoHOem2wktR9d4GMZ4ZXX4ztZGHkA1B2w/VbuGQwNcW4Mp0D5Gi7Vhk5jbzcpmAiPdeOu AxF8VicBNW8EGM7sV+t5BG+wftPQ6ysKcPuc12W/1jcsihSjGgIiHhma2EKG3q+C8LRMLwHtaGaiH 454cyuN/RcRhYiF83g1XnCoTGkyuFg3UanYe4rklrxhs9DBPoMmVvUToHOkIEJ/RUQMiq/LdRh6py hcsFWZkw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 09/30] KVM: x86: WARN if kvm_get_walltime_and_clockread() fails unexpectedly Date: Sat, 9 May 2026 23:46:35 +0100 Message-ID: <20260509224824.3264567-10-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366922-B6368DB1-AA82E900/0/0 X-purgate-type: clean X-purgate-size: 1130 From: David Woodhouse The master clock depends on the pvclock being based on TSC, so the only way kvm_get_walltime_and_clockread() can fail when use_master_clock is true is if the clocksource changed and use_master_clock is stale, in which case a seqcount retry should be pending. Add a WARN_ON_ONCE if the seqcount has not been invalidated, to catch any case where the failure is genuinely unexpected. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1e1834533e98..ccdfd3fa3402 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3474,7 +3474,8 @@ uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm) local_tsc_khz = get_cpu_tsc_khz(); if (local_tsc_khz && - !kvm_get_walltime_and_clockread(&ts, &host_tsc)) + !kvm_get_walltime_and_clockread(&ts, &host_tsc) && + WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) local_tsc_khz = 0; /* Fall back to old method */ put_cpu(); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304994.1577620 (Exim 4.92) (envelope-from ) id 1wLqTY-0005SX-29; Sat, 09 May 2026 22:48:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304994.1577620; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-0005Qw-OT; Sat, 09 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1304994; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004yF-Af for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-00DG64-Nq; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb98b-e002-0a2a0a5209dd-0a2a4508e700-28 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cc-63b5-0a2a45080019-5a9b5cc7e076-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzG-0XFY; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI9-2vDj; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=1qL8Ver0eVRy2vup5TVneuXo0fgeLVr0y5FVTqd09W0=; b=TIN9a1E8sNcAlsWC1Aa8d+j4n2 ykdU+MKOO6mMS//0nZ9gk/6GtNeig/iy0ktOWfZxfE3Y9oC+BDjozpK+YTRlioH1mCNDrnrIIELfn Dk90c8X8czam38NJuoQCGkKSyonAfsIF0B4Gxy6aAg4JXguhERu1nsTDdjXKIBO+eLUfCrpEUY/KI TvcJr5SlC/FZt8Ny/XRCRRj8ai9g6+Wohw9ZHE3J4GVELHu0tc8Vjezkb9vglY98NiUkuDsAWG3W4 8Keg1ENmXJQKCp20kaYBBMtgVeR3RnqtpIwL3rLtS4PlhMLY7MseveZJDp6XxLDLJem5Fzuh0or1E O8puK54w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 14/30] KVM: x86: Use get_kvmclock() in kvm_get_wall_clock_epoch() Date: Sat, 9 May 2026 23:46:40 +0100 Message-ID: <20260509224824.3264567-15-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366924-BDB6CDB1-357D2A13/0/0 X-purgate-type: clean X-purgate-size: 2903 From: David Woodhouse Now that get_kvmclock() correctly handles TSC scaling and captures both wallclock and kvmclock from the same TSC reading, kvm_get_wall_clock_epoch() can simply call it instead of duplicating the pvclock computation. This eliminates the last instance of the "definition C" kvmclock calculation that computed nanoseconds directly from the host TSC without accounting for guest TSC scaling. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 58 +++++++--------------------------------------- 1 file changed, 8 insertions(+), 50 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 09b00906b1de..2bbc2c7ac449 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3491,60 +3491,18 @@ int kvm_guest_time_update(struct kvm_vcpu *v) */ uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm) { -#ifdef CONFIG_X86_64 - struct pvclock_vcpu_time_info hv_clock; - struct kvm_arch *ka = &kvm->arch; - unsigned long seq, local_tsc_khz; - struct timespec64 ts; - uint64_t host_tsc; - - do { - seq = read_seqcount_begin(&ka->pvclock_sc); - - local_tsc_khz = 0; - if (!ka->use_master_clock) - break; - - /* - * The TSC read and the call to get_cpu_tsc_khz() must happen - * on the same CPU. - */ - get_cpu(); - - local_tsc_khz = get_cpu_tsc_khz(); - - if (local_tsc_khz && - !kvm_get_walltime_and_clockread(&ts, &host_tsc) && - WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) - local_tsc_khz = 0; /* Fall back to old method */ - - put_cpu(); - - /* - * These values must be snapshotted within the seqcount loop. - * After that, it's just mathematics which can happen on any - * CPU at any time. - */ - hv_clock.tsc_timestamp = ka->master_cycle_now; - hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + struct kvm_clock_data data; - } while (read_seqcount_retry(&ka->pvclock_sc, seq)); + get_kvmclock(kvm, &data); /* - * If the conditions were right, and obtaining the wallclock+TSC was - * successful, calculate the KVM clock at the corresponding time and - * subtract one from the other to get the guest's epoch in nanoseconds - * since 1970-01-01. + * If get_kvmclock() captured both wallclock and kvmclock from the + * same TSC reading, use them for a precise epoch calculation. */ - if (local_tsc_khz) { - kvm_get_time_scale(NSEC_PER_SEC, local_tsc_khz * NSEC_PER_USEC, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - return ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec - - __pvclock_read_cycles(&hv_clock, host_tsc); - } -#endif - return ktime_get_real_ns() - get_kvmclock_ns(kvm); + if (data.flags & KVM_CLOCK_REALTIME) + return data.realtime - data.clock; + + return ktime_get_real_ns() - data.clock; } /* -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305070.1577691 (Exim 4.92) (envelope-from ) id 1wLqWn-00030c-HD; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305070.1577691; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-00030U-CQ; Sat, 09 May 2026 22:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1305070; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWl-0002wM-Mi for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqWk-008rH7-WF; Sun, 10 May 2026 00:52:07 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba8d-2eae-0a2a0a5409dd-0a2a4509c56c-4 for ; Sun, 10 May 2026 00:52:06 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9e2-2497-0a2a45090019-5a9b5cc7e918-3 for ; Sun, 10 May 2026 00:49:06 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz5-0QFm; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTB-0000000DhHJ-44Nq; Sat, 09 May 2026 23:48:25 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=TZcXqNntDdHe2w9Q79uCDKAXjVj99JYmMNiVQxMISEk=; b=RYTR6PWoDUrLsNMTzdy0wN2kqO p2Ct4KIVednYPMMXB0h+BxNxxY7O6nyKBfNP26vfbtWUonLSjWNKqF8JNkVVWSgJgZl4CyajD+edo 4EZlrbjl/OqTlok1XxDPd5FKMil3Wdsji/F6cFiRBrNRtoexB+/kFQLLzZF6BGgqQAlB2dFrOjpl2 tKJmulW3eInQuCu10yq4buJjH3yMHj4IgjJlcUW41Feia/vkvndFrmwDxFdpdhVhXixJEvjKItda0 eNWx5YWoDjbrSh11HV9CZ6JTdwttGJYpV1E8mDXXI8K+qyit3Bfka8oTtZN0UDnOxmjR6dYimmjQ5 frlllr1w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 01/30] KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init() Date: Sat, 9 May 2026 23:46:27 +0100 Message-ID: <20260509224824.3264567-2-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1778366946-4015DA53-E50630F4/0/0 X-purgate-type: clean X-purgate-size: 4433 From: David Woodhouse The KVM clock is an interesting thing. It is defined as "nanoseconds since the guest was created", but in practice it runs at two *different* rates — or three different rates, if you count implementation bugs. Definition A is that it runs synchronously with the CLOCK_MONOTONIC_RAW of the host, with a delta of kvm->arch.kvmclock_offset. But that version doesn't actually get used in the common case, where the host has a reliable TSC and the guest TSCs are all running at the same rate and in sync with each other, and kvm->arch.use_master_clock is set. In that common case, definition B is used: There is a reference point in time at kvm->arch.master_kernel_ns (again a CLOCK_MONOTONIC_RAW time), and a corresponding host TSC value kvm->arch.master_cycle_now. This fixed point in time is converted to guest units (the time offset by kvmclock_offset and the TSC Value scaled and offset to be a guest TSC value) and advertised to the guest in the pvclock structure. While in this 'use_master_clock' mode, the fixed point in time never needs to be changed, and the clock runs precisely in time with the guest TSC, at the rate advertised in the pvclock structure. The third definition C is implemented in kvm_get_wall_clock_epoch() and __get_kvmclock(), using the master_cycle_now and master_kernel_ns fields but converting the *host* TSC cycles directly to a value in nanoseconds instead of scaling via the guest TSC. One might naïvely think that all three definitions are identical, since CLOCK_MONOTONIC_RAW is not skewed by NTP frequency corrections; all three are just the result of counting the host TSC at a known frequency, or the scaled guest TSC at a known precise fraction of the host's frequency. The problem is with arithmetic precision, and the way that frequency scaling is done in a division-free way by multiplying by a scale factor, then shifting right. In practice, all three ways of calculating the KVM clock will suffer a systemic drift from each other. Eventually, definition C should just be eliminated. Commit 451a707813ae ("KVM: x86/xen: improve accuracy of Xen timers") worked around it for the specific case of Xen timers, which are defined in terms of the KVM clock and suffered from a continually increasing error in timer expiry times. That commit notes that get_kvmclock_ns() is non-trivial to fix and says "I'll come back to that", which remains true. Definitions A and B do need to coexist, the former to handle the case where the host or guest TSC is suboptimally configured. But KVM should be more careful about switching between them, and the discontinuity in guest time which could result. In particular, KVM_REQ_MASTERCLOCK_UPDATE will take a new snapshot of time as the reference in master_kernel_ns and master_cycle_now, yanking the guest's clock back to match definition A at that moment. When invoked from in 'use_master_clock' mode, kvm_update_masterclock() should probably *adjust* kvm->arch.kvmclock_offset to account for the drift, instead of yanking the clock back to definition A. But in the meantime there are a bunch of places where it just doesn't need to be invoked at all. To start with: there is no need to do such an update when a Xen guest populates the shared_info page. This seems to have been a hangover from the very first implementation of shared_info which automatically populated the vcpu_info structures at their default locations, but even then it should just have raised KVM_REQ_CLOCK_UPDATE on each vCPU instead of using KVM_REQ_MASTERCLOCK_UPDATE. And now that userspace is expected to explicitly set the vcpu_info even in its default locations, there's not even any need for that either. Fixes: 629b5348841a ("KVM: x86/xen: update wallclock region") Reviewed-by: Paul Durrant Signed-off-by: David Woodhouse --- arch/x86/kvm/xen.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c index 91fd3673c09a..82e34edbfdbd 100644 --- a/arch/x86/kvm/xen.c +++ b/arch/x86/kvm/xen.c @@ -98,8 +98,6 @@ static int kvm_xen_shared_info_init(struct kvm *kvm) wc->version = wc_version + 1; read_unlock_irq(&gpc->lock); - kvm_make_all_cpus_request(kvm, KVM_REQ_MASTERCLOCK_UPDATE); - out: srcu_read_unlock(&kvm->srcu, idx); return ret; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305069.1577685 (Exim 4.92) (envelope-from ) id 1wLqWn-0002xT-7s; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305069.1577685; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-0002xM-4n; Sat, 09 May 2026 22:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1305069; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWl-0002wR-On for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqWl-008rH7-5c; Sun, 10 May 2026 00:52:07 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-28 for ; Sun, 10 May 2026 00:52:06 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9e2-7371-0a2a45060019-5a9b5cc7e19a-3 for ; Sun, 10 May 2026 00:49:06 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz7-0Xnk; Sat, 09 May 2026 22:48:34 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHP-0ITl; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=cy4WX+pEhq0ONnRd44jsWeJgn8jdEFwX+WNyOailsXI=; b=f1v81ARMTELtkK8Uo8Dot8XJtu ZPciDZdzdNb1UHVK8ThK5p7adwR8E97R+9zIyV0sMXwSSyxjd4IvQlFS1KguGP5C+dFNoPz2650YT vZPBfyVoT3pRwi4VvjZVlaifWMSpT8PK8VePe/zBIi4e47aMk1d9kmUFgZknxrqOXL2hEvnpa6Snd y4uvxo7khgiNAVT2itX+II+hxxOa7kgC788aR89gNlujoCfM6pkUPukM1rscIT6j4W8yH9v0XoPYA LkcLMKnb6NvFlwXfeMKBZDHIP502+a0Hxb+TlAS4PXWuTHMYVmQlYlBXe0VjTlPt4/nVgJdkX0n4H 2lt+5C2w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 03/30] UAPI: x86: Move pvclock-abi to UAPI for x86 platforms Date: Sat, 9 May 2026 23:46:29 +0100 Message-ID: <20260509224824.3264567-4-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366946-84964D75-378A9408/0/0 X-purgate-type: clean X-purgate-size: 2944 From: Jack Allister A subsequent commit will provide a new KVM interface for performing a fixup/correction of the KVM clock against the reference TSC. The KVM_[GS]ET_CLOCK_GUEST API requires a pvclock_vcpu_time_info, as such the caller must know about this definition. Move the definition to the UAPI folder so that it is exported to usermode and also change the type definitions to use the standard for UAPI exports. Signed-off-by: Jack Allister Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- MAINTAINERS | 4 +-- arch/x86/include/{ => uapi}/asm/pvclock-abi.h | 27 ++++++++++--------- 2 files changed, 17 insertions(+), 14 deletions(-) rename arch/x86/include/{ => uapi}/asm/pvclock-abi.h (82%) diff --git a/MAINTAINERS b/MAINTAINERS index e0b307b2108c..e49676955c0c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14406,7 +14406,7 @@ S: Supported T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git F: arch/um/include/asm/kvm_para.h F: arch/x86/include/asm/kvm_para.h -F: arch/x86/include/asm/pvclock-abi.h +F: arch/x86/include/uapi/asm/pvclock-abi.h F: arch/x86/include/uapi/asm/kvm_para.h F: arch/x86/kernel/kvm.c F: arch/x86/kernel/kvmclock.c @@ -29087,7 +29087,7 @@ R: Boris Ostrovsky L: xen-devel@lists.xenproject.org (moderated for non-subscribers) S: Supported F: arch/x86/configs/xen.config -F: arch/x86/include/asm/pvclock-abi.h +F: arch/x86/include/uapi/asm/pvclock-abi.h F: arch/x86/include/asm/xen/ F: arch/x86/platform/pvh/ F: arch/x86/xen/ diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/uapi/asm/pvclock-abi.h similarity index 82% rename from arch/x86/include/asm/pvclock-abi.h rename to arch/x86/include/uapi/asm/pvclock-abi.h index b9fece5fc96d..6d70cf640362 100644 --- a/arch/x86/include/asm/pvclock-abi.h +++ b/arch/x86/include/uapi/asm/pvclock-abi.h @@ -1,6 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_PVCLOCK_ABI_H #define _ASM_X86_PVCLOCK_ABI_H + +#include + #ifndef __ASSEMBLER__ /* @@ -24,20 +27,20 @@ */ struct pvclock_vcpu_time_info { - u32 version; - u32 pad0; - u64 tsc_timestamp; - u64 system_time; - u32 tsc_to_system_mul; - s8 tsc_shift; - u8 flags; - u8 pad[2]; + __u32 version; + __u32 pad0; + __u64 tsc_timestamp; + __u64 system_time; + __u32 tsc_to_system_mul; + __s8 tsc_shift; + __u8 flags; + __u8 pad[2]; } __attribute__((__packed__)); /* 32 bytes */ struct pvclock_wall_clock { - u32 version; - u32 sec; - u32 nsec; + __u32 version; + __u32 sec; + __u32 nsec; } __attribute__((__packed__)); #define PVCLOCK_TSC_STABLE_BIT (1 << 0) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305071.1577697 (Exim 4.92) (envelope-from ) id 1wLqWn-00036x-RG; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305071.1577697; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-00036j-MJ; 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From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 10/30] KVM: x86: Fold __get_kvmclock() into get_kvmclock() Date: Sat, 9 May 2026 23:46:36 +0100 Message-ID: <20260509224824.3264567-11-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366947-19B68F3B-F6348F77/0/0 X-purgate-type: clean X-purgate-size: 3279 From: David Woodhouse There is no need for the separate __get_kvmclock() helper; just inline its body into get_kvmclock() within the seqcount retry loop. No functional change. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 63 +++++++++++++++++++++------------------------- 1 file changed, 28 insertions(+), 35 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ccdfd3fa3402..6f660c3210ee 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3200,50 +3200,43 @@ static unsigned long get_cpu_tsc_khz(void) return __this_cpu_read(cpu_tsc_khz); } -/* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */ -static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) +static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) { struct kvm_arch *ka = &kvm->arch; struct pvclock_vcpu_time_info hv_clock; + unsigned int seq; - /* both __this_cpu_read() and rdtsc() should be on the same cpu */ - get_cpu(); + do { + seq = read_seqcount_begin(&ka->pvclock_sc); - data->flags = 0; - if (ka->use_master_clock && - (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { + /* both __this_cpu_read() and rdtsc() should be on the same cpu */ + get_cpu(); + + data->flags = 0; + if (ka->use_master_clock && + (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { #ifdef CONFIG_X86_64 - struct timespec64 ts; + struct timespec64 ts; - if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { - data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; - data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; - } else + if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { + data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; + data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; + } else #endif - data->host_tsc = rdtsc(); - - data->flags |= KVM_CLOCK_TSC_STABLE; - hv_clock.tsc_timestamp = ka->master_cycle_now; - hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; - kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); - } else { - data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; - } - - put_cpu(); -} - -static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) -{ - struct kvm_arch *ka = &kvm->arch; - unsigned seq; + data->host_tsc = rdtsc(); + + data->flags |= KVM_CLOCK_TSC_STABLE; + hv_clock.tsc_timestamp = ka->master_cycle_now; + hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, + &hv_clock.tsc_shift, + &hv_clock.tsc_to_system_mul); + data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + } else { + data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; + } - do { - seq = read_seqcount_begin(&ka->pvclock_sc); - __get_kvmclock(kvm, data); + put_cpu(); } while (read_seqcount_retry(&ka->pvclock_sc, seq)); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305072.1577712 (Exim 4.92) (envelope-from ) id 1wLqWs-0003gU-7F; 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Sun, 10 May 2026 00:49:11 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzI-0OeQ; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIH-3IBh; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=LepzYKC8zChWcqxDUMiFOK7RmizpFH9hCCvlIfnf3aY=; b=bkTTeIeQ6yjciV79dnwOCTS3X8 kWPljQM5uuCcLf9xYvOMvxwp0BudJtlKdezBUn+2HsrUtDHGE8X85ygS5I9M1clK6zpm2ifFrsLyI 6vHlr9bbTcd192RWw5BeCaycQCXib9QwDp+uVtaExyL6cHh0l//vCGieuOmQt3Zb6k0V42gUmdzy2 v+X/RNkqyGK6O828YYwwQwcGi7JC5ICV2+sjdn6xRCbShFs6B4a8UPDR2YF3J0Ue6G7OcdLr2c0KW mS9Em/atYVqzn+EMq4KLzVjs83ETumOZCG//oet13+jOZDJ2WZbahqUjO1qRQftiPO8dK8pbrQTVE zPdP0YPA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 16/30] KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling Date: Sat, 9 May 2026 23:46:42 +0100 Message-ID: <20260509224824.3264567-17-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366951-86D72D75-A28EBC8B/0/0 X-purgate-type: clean X-purgate-size: 4131 From: David Woodhouse Restructure kvm_guest_time_update() so that kernel_ns/host_tsc are always "now" when doing TSC catchup, then swap in the master clock reference values afterward for the hv_clock. This makes the TSC upscaling code considerably simpler: the catchup adjustment is computed as the delta between what the guest TSC *should* be at "now" and what it actually is, rather than mixing "now" and "master clock reference" timestamps. The seqcount loop now also contains the kvm_get_time_and_clockread() call (matching get_kvmclock's pattern), with the same WARN for unexpected failure. Based on a suggestion by Sean Christopherson. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 67 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 47 insertions(+), 20 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index e281c49561fa..8e4993ef4f6b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3363,39 +3363,51 @@ int kvm_guest_time_update(struct kvm_vcpu *v) struct kvm_arch *ka = &v->kvm->arch; s64 kernel_ns; u64 tsc_timestamp, host_tsc; + u64 master_host_tsc = 0; + s64 master_kernel_ns = 0; bool use_master_clock; - kernel_ns = 0; - host_tsc = 0; - /* * If the host uses TSC clock, then passthrough TSC as stable * to the guest. */ do { seq = read_seqcount_begin(&ka->pvclock_sc); + use_master_clock = ka->use_master_clock; - if (use_master_clock) { - host_tsc = ka->master_cycle_now; - kernel_ns = ka->master_kernel_ns; - } + + /* + * The TSC read and the call to get_cpu_tsc_khz() must happen + * on the same CPU. + */ + get_cpu(); + + tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + + if (use_master_clock && + !kvm_get_time_and_clockread(&kernel_ns, &host_tsc) && + WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) + use_master_clock = false; + + put_cpu(); + + if (!use_master_clock) + break; + + master_host_tsc = ka->master_cycle_now; + master_kernel_ns = ka->master_kernel_ns; } while (read_seqcount_retry(&ka->pvclock_sc, seq)); - /* Keep irq disabled to prevent changes to the clock */ - local_irq_save(flags); - tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; if (unlikely(tgt_tsc_hz == 0)) { - local_irq_restore(flags); kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); return 1; } + if (!use_master_clock) { host_tsc = rdtsc(); kernel_ns = get_kvmclock_base_ns(); } - tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); - /* * We may have to catch up the TSC to match elapsed wall clock * time for two reasons, even if kvmclock is used. @@ -3404,17 +3416,32 @@ int kvm_guest_time_update(struct kvm_vcpu *v) * entry to avoid unknown leaps of TSC even when running * again on the same CPU. This may cause apparent elapsed * time to disappear, and the guest to stand still or run - * very slowly. + * very slowly. */ if (vcpu->tsc_catchup) { - u64 tsc = compute_guest_tsc(v, kernel_ns); - if (tsc > tsc_timestamp) { - adjust_tsc_offset_guest(v, tsc - tsc_timestamp); - tsc_timestamp = tsc; - } + s64 adjustment; + + /* + * Calculate the delta between what the guest TSC *should* be + * and what it actually is according to kvm_read_l1_tsc(). + */ + adjustment = compute_guest_tsc(v, kernel_ns) - + kvm_read_l1_tsc(v, host_tsc); + if (adjustment > 0) + adjust_tsc_offset_guest(v, adjustment); } - local_irq_restore(flags); + /* + * Now that TSC upscaling is out of the way, the remaining calculations + * are all relative to the reference time that's placed in hv_clock. + * If the master clock is NOT in use, the reference time is "now". If + * master clock is in use, the reference time comes from there. + */ + if (use_master_clock) { + host_tsc = master_host_tsc; + kernel_ns = master_kernel_ns; + } + tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); /* With all the info we got, fill in the values */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305099.1577721 (Exim 4.92) (envelope-from ) id 1wLqXP-0004qr-Gz; Sat, 09 May 2026 22:52:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305099.1577721; Sat, 09 May 2026 22:52:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qc-Da; Sat, 09 May 2026 22:52:47 +0000 Received: by outflank-mailman (input) for mailman id 1305099; Sat, 09 May 2026 22:52:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXO-0004qF-Hz for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXN-008rH7-VM; Sun, 10 May 2026 00:52:45 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-46 for ; Sun, 10 May 2026 00:52:45 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cc-7371-0a2a45060019-5a9b5cc78a84-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz8-0RZG; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHZ-0vyl; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=fjV26NrwIY9cQcLo8KkXdG7OKt7Yi3rTCYPgBP8g6KA=; b=KLhaK8eBC6ebOLVUd2G2XJdjhp GXwrOjDkaQr8ATVtUHjTxBu5zBqFFwsjGTlzl3hjb+yDwKI/GmtnzkbTLBCprwF5i88X+i2gNfNtu AhTzqJLvX1o0xaW7BbsUEpF6HwIzH+C2ZBvSKAi6klr3u/5mYzzCxSJlrpU+cmgbBrcCNwGqty8hx MvQC0vAJX2NsYDgXYha5BQc60V0RqWatSl4OwQvuBRfWWCc1TYsEBzZ4dkPj7w/H8YWI9dn5o/cm6 juwXijSC7WN8YToiRDEbEXHGa1bNmrufksGVCXtjiXykouJq4qg1d6G3d2NX7Gxi1KBXm5+3pWC0N o7slZr4g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 05/30] KVM: selftests: Add KVM/PV clock selftest to prove timer correction Date: Sat, 9 May 2026 23:46:31 +0100 Message-ID: <20260509224824.3264567-6-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366924-8556ED75-AF4EFC7B/0/0 X-purgate-type: clean X-purgate-size: 15144 From: Jack Allister A VM's KVM/PV clock has an inherent relationship to its TSC. When either the host system live-updates or the VM is live-migrated this pairing of the two clock sources should stay the same. In reality this is not the case without some correction taking place. The KVM_GET_CLOCK_GUEST/KVM_SET_CLOCK_GUEST ioctls can be used to perform a correction on the PVTI (PV time information) structure held by KVM to effectively fix up the kvmclock_offset prior to the guest VM resuming in either a live-update/migration scenario. This test proves that without the necessary fixup there is a perceived change in the guest TSC and KVM/PV clock relationship before and after a simulated LU/LM takes place, and that the correction eliminates it. The test: 1. Snapshots the PVTI at boot (PVTI0). 2. Induces a change in PVTI data (KVM_REQ_MASTERCLOCK_UPDATE). 3. Snapshots the PVTI after the change (PVTI1). 4. Requests correction via KVM_SET_CLOCK_GUEST using PVTI0. 5. Snapshots the PVTI after correction (PVTI2). Then samples the TSC at a single point in time and calculates the KVM clock using each PVTI snapshot. The corrected clock should match the boot clock to within ±1ns. The test enumerates multiple TSC frequencies from 1GHz to 5GHz at 500MHz steps, crossing the 32-bit boundary, to exercise the scaling path at various ratios. The sleep duration between snapshots is configurable via the -s/--sleep command line option. Co-developed-by: David Woodhouse Signed-off-by: David Woodhouse Signed-off-by: Jack Allister Reviewed-by: Paul Durrant Cc: Dongli Zhang --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../testing/selftests/kvm/x86/pvclock_test.c | 415 ++++++++++++++++++ 2 files changed, 416 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/pvclock_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index 9118a5a51b89..fb935ae3bf38 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -105,6 +105,7 @@ TEST_GEN_PROGS_x86 += x86/pmu_counters_test TEST_GEN_PROGS_x86 += x86/pmu_event_filter_test TEST_GEN_PROGS_x86 += x86/private_mem_conversions_test TEST_GEN_PROGS_x86 += x86/private_mem_kvm_exits_test +TEST_GEN_PROGS_x86 += x86/pvclock_test TEST_GEN_PROGS_x86 += x86/set_boot_cpu_id TEST_GEN_PROGS_x86 += x86/set_sregs_test TEST_GEN_PROGS_x86 += x86/smaller_maxphyaddr_emulation_test diff --git a/tools/testing/selftests/kvm/x86/pvclock_test.c b/tools/testing/selftests/kvm/x86/pvclock_test.c new file mode 100644 index 000000000000..1a3d52923c71 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/pvclock_test.c @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © Amazon.com, Inc. or its affiliates. + * + * Tests for pvclock API + * KVM_SET_CLOCK_GUEST/KVM_GET_CLOCK_GUEST + */ +#include +#include +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +/* + * Reproduce the pvclock calculation the guest uses to convert TSC to + * nanoseconds. This must match the kernel's __pvclock_read_cycles(). + */ +static inline uint64_t pvclock_scale_delta(uint64_t delta, uint32_t mul, + int8_t shift) +{ + if (shift < 0) + delta >>= -shift; + else + delta <<= shift; + return ((__uint128_t)delta * mul) >> 32; +} + +static inline uint64_t pvclock_read_cycles(struct pvclock_vcpu_time_info *src, + uint64_t tsc) +{ + uint64_t delta = tsc - src->tsc_timestamp; + + return src->system_time + pvclock_scale_delta(delta, + src->tsc_to_system_mul, + src->tsc_shift); +} + +enum { + STAGE_FIRST_BOOT, + STAGE_UNCORRECTED, + STAGE_CORRECTED +}; + +#define KVMCLOCK_GPA 0xc0000000ull +#define KVMCLOCK_SIZE sizeof(struct pvclock_vcpu_time_info) + +static void trigger_pvti_update(void) +{ + /* + * Toggle between KVM's old and new system time methods to coerce KVM + * into updating the fields in the PV time info struct. + */ + wrmsr(MSR_KVM_SYSTEM_TIME, KVMCLOCK_GPA | KVM_MSR_ENABLED); + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); +} + +static void guest_code(void) +{ + struct pvclock_vcpu_time_info *pvti = + (void *)(unsigned long)KVMCLOCK_GPA; + struct pvclock_vcpu_time_info pvti_boot; + struct pvclock_vcpu_time_info pvti_uncorrected; + struct pvclock_vcpu_time_info pvti_corrected; + uint64_t tsc_guest; + uint64_t clk_boot, clk_uncorrected, clk_corrected; + int64_t delta_corrected; + + /* Set up kvmclock and snapshot the initial pvclock parameters. */ + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); + pvti_boot = *pvti; + GUEST_SYNC(STAGE_FIRST_BOOT); + + /* + * Trigger an update of the PVTI. Calculating the KVM clock using this + * updated structure will show a delta from the original. + */ + trigger_pvti_update(); + pvti_uncorrected = *pvti; + GUEST_SYNC(STAGE_UNCORRECTED); + + /* + * Snapshot the corrected time (the host does KVM_SET_CLOCK_GUEST when + * handling STAGE_UNCORRECTED). + */ + pvti_corrected = *pvti; + + /* + * Sample the TSC at a single point in time, then calculate the + * effective KVM clock using the PVTI from each stage. Verify that the + * corrected clock matches the boot clock to within ±1ns. + */ + tsc_guest = rdtsc(); + + clk_boot = pvclock_read_cycles(&pvti_boot, tsc_guest); + clk_uncorrected = pvclock_read_cycles(&pvti_uncorrected, tsc_guest); + clk_corrected = pvclock_read_cycles(&pvti_corrected, tsc_guest); + + delta_corrected = clk_boot - clk_corrected; + + __GUEST_ASSERT(delta_corrected >= -2 && delta_corrected <= 2, + "corrected delta %ld out of range (boot=%lu uncorrected=%lu corrected=%lu)", + delta_corrected, clk_boot, clk_uncorrected, clk_corrected); + + GUEST_SYNC(STAGE_CORRECTED); +} + +static void run_test(struct kvm_vm *vm, struct kvm_vcpu *vcpu, + unsigned int sleep_sec) +{ + struct pvclock_vcpu_time_info pvti_before; + struct ucall uc; + + for (;;) { + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } + + switch (uc.args[1]) { + case STAGE_FIRST_BOOT: + /* Save the pvclock parameters before the update. */ + vcpu_ioctl(vcpu, KVM_GET_CLOCK_GUEST, &pvti_before); + + /* Sleep to let the clocks diverge. */ + sleep(sleep_sec); + break; + + case STAGE_UNCORRECTED: + /* Restore the original pvclock parameters. */ + vcpu_ioctl(vcpu, KVM_SET_CLOCK_GUEST, &pvti_before); + break; + + case STAGE_CORRECTED: + /* Guest verified the delta in-guest. */ + return; + + default: + TEST_FAIL("Unknown stage %lu", uc.args[1]); + } + } +} + +static void configure_pvclock(struct kvm_vm *vm) +{ + unsigned int nr_pages; + + nr_pages = vm_calc_num_guest_pages(VM_MODE_DEFAULT, KVMCLOCK_SIZE); + vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, + KVMCLOCK_GPA, 1, nr_pages, 0); + virt_map(vm, KVMCLOCK_GPA, KVMCLOCK_GPA, nr_pages); +} + +static void run_at_frequency(uint64_t tsc_khz, unsigned int sleep_sec) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + pr_info("Testing at TSC frequency %lu kHz\n", tsc_khz); + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + configure_pvclock(vm); + vcpu_ioctl(vcpu, KVM_SET_TSC_KHZ, (void *)tsc_khz); + run_test(vm, vcpu, sleep_sec); + kvm_vm_release(vm); +} + +static void test_tsc_stable_bit(void); +static void test_clock_guest_with_offsets(void); + +static void usage(const char *name) +{ + printf("Usage: %s [options]\n" + " -s, --sleep SEC sleep duration between snapshots (default: 2)\n" + " -h, --help show this help\n", name); +} + +int main(int argc, char *argv[]) +{ + static const struct option long_opts[] = { + { "sleep", required_argument, NULL, 's' }, + { "help", no_argument, NULL, 'h' }, + { NULL, 0, NULL, 0 }, + }; + unsigned int sleep_sec = 2; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + uint64_t host_khz; + uint64_t freq; + int opt; + + while ((opt = getopt_long(argc, argv, "s:h", long_opts, NULL)) != -1) { + switch (opt) { + case 's': + sleep_sec = atoi(optarg); + break; + case 'h': + default: + usage(argv[0]); + return opt == 'h' ? 0 : 1; + } + } + + TEST_REQUIRE(sys_clocksource_is_based_on_tsc()); + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + configure_pvclock(vm); + + /* First run at native frequency (no scaling). */ + run_test(vm, vcpu, sleep_sec); + + /* + * Then enumerate a range of TSC frequencies crossing the 32-bit + * boundary, to exercise the scaling path at various ratios. + */ + host_khz = __vcpu_ioctl(vcpu, KVM_GET_TSC_KHZ, NULL); + kvm_vm_release(vm); + + for (freq = 1000000; freq <= 5000000; freq += 500000) { + if (freq == host_khz) + continue; + run_at_frequency(freq, sleep_sec); + } + + test_tsc_stable_bit(); + test_clock_guest_with_offsets(); + + return 0; +} + +static void guest_code_stable_bit(void) +{ + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); + GUEST_SYNC(0); + GUEST_SYNC(0); + GUEST_SYNC(0); +} + +static void set_tsc_offset(struct kvm_vcpu *vcpu, uint64_t offset) +{ + struct kvm_device_attr attr = { + .group = KVM_VCPU_TSC_CTRL, + .attr = KVM_VCPU_TSC_OFFSET, + .addr = (__u64)(uintptr_t)&offset, + }; + vcpu_ioctl(vcpu, KVM_SET_DEVICE_ATTR, &attr); +} + +static void run_vcpu_once(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } +} + +static void test_tsc_stable_bit(void) +{ + struct pvclock_vcpu_time_info pvti; + struct kvm_vcpu *vcpus[2]; + struct kvm_vm *vm; + int ret; + + pr_info("Testing PVCLOCK_TSC_STABLE_BIT with matched/unmatched TSCs\n"); + + vm = vm_create_with_vcpus(2, guest_code_stable_bit, vcpus); + configure_pvclock(vm); + + /* + * Case 1: All TSCs matched (same frequency and offset). + * Master clock should be active, PVCLOCK_TSC_STABLE_BIT set. + */ + run_vcpu_once(vcpus[0]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST should succeed with matched TSCs"); + TEST_ASSERT(pvti.flags & PVCLOCK_TSC_STABLE_BIT, + "PVCLOCK_TSC_STABLE_BIT should be set with matched TSCs"); + + /* + * Case 2: Different TSC offset, same frequency. + * Master clock should still be active (frequency matches), but + * PVCLOCK_TSC_STABLE_BIT should be cleared (offsets differ). + */ + set_tsc_offset(vcpus[1], 12345678); + run_vcpu_once(vcpus[1]); + run_vcpu_once(vcpus[0]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + if (ret) { + /* Master clock disabled by offset mismatch — old kernel */ + pr_info(" Skipping offset tests (master clock requires matched offsets)\n"); + goto out_stable; + } + TEST_ASSERT(!(pvti.flags & PVCLOCK_TSC_STABLE_BIT), + "PVCLOCK_TSC_STABLE_BIT should be clear with offset-mismatched TSCs"); + + /* + * Case 3: Different TSC frequency. + * Master clock should be disabled entirely. + */ + vcpu_ioctl(vcpus[1], KVM_SET_TSC_KHZ, + (void *)(unsigned long)(__vcpu_ioctl(vcpus[1], KVM_GET_TSC_KHZ, NULL) / 2)); + /* Write TSC to trigger kvm_synchronize_tsc / kvm_track_tsc_matching */ + vcpu_set_msr(vcpus[1], MSR_IA32_TSC, 0); + run_vcpu_once(vcpus[1]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(ret && errno == EINVAL, + "GET_CLOCK_GUEST should fail with frequency-mismatched TSCs, got %d (errno %d)", + ret, errno); + +out_stable: + kvm_vm_release(vm); +} + +static void test_clock_guest_with_offsets(void) +{ + struct pvclock_vcpu_time_info pvti0, pvti1, pvti1_after; + struct kvm_vcpu *vcpus[2]; + struct kvm_vm *vm; + int64_t delta; + int ret; + + pr_info("Testing KVM_[GS]ET_CLOCK_GUEST with different TSC offsets\n"); + + vm = vm_create_with_vcpus(2, guest_code_stable_bit, vcpus); + configure_pvclock(vm); + + /* Set different TSC offsets on the two vCPUs */ + set_tsc_offset(vcpus[0], 0); + set_tsc_offset(vcpus[1], 1000000000ull); + + /* Run both to establish kvmclock */ + run_vcpu_once(vcpus[0]); + run_vcpu_once(vcpus[1]); + + /* GET_CLOCK_GUEST on both — should succeed (master clock active) */ + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti0); + if (ret) { + pr_info(" Skipping (master clock requires matched offsets on this kernel)\n"); + kvm_vm_release(vm); + return; + } + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 failed"); + + /* The tsc_timestamps should differ (different offsets) */ + TEST_ASSERT(pvti0.tsc_timestamp != pvti1.tsc_timestamp, + "tsc_timestamps should differ with different offsets"); + + /* Sleep to let time elapse, then restore vcpu0's clock */ + sleep(1); + vcpu_ioctl(vcpus[0], KVM_SET_CLOCK_GUEST, &pvti0); + + /* Run vcpu0 to process the clock update */ + run_vcpu_once(vcpus[0]); + + /* GET_CLOCK_GUEST on vcpu1 — should reflect the correction */ + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 after SET failed"); + + /* + * After SET on vcpu0, verify the correction worked by getting + * the clock on vcpu0 again. The mul/shift should be the same, + * and computing kvmclock at the same TSC should give the same + * result as the original (within ±2ns). + */ + { + struct pvclock_vcpu_time_info pvti0_after; + uint64_t tsc_now, clk_from_old, clk_from_new; + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti0_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu0 after SET failed"); + + tsc_now = pvti0_after.tsc_timestamp; + clk_from_old = pvclock_read_cycles(&pvti0, tsc_now); + clk_from_new = pvclock_read_cycles(&pvti0_after, tsc_now); + + delta = (int64_t)clk_from_new - (int64_t)clk_from_old; + TEST_ASSERT(delta >= -2 && delta <= 2, + "clock correction delta should be <=2ns, got %ld ns", + delta); + } + + /* + * Also verify that vcpu1's clock is still accessible (master + * clock still active with different offsets). + */ + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 after SET failed"); + + kvm_vm_release(vm); +} -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305100.1577730 (Exim 4.92) (envelope-from ) id 1wLqXQ-00055G-T6; Sat, 09 May 2026 22:52:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305100.1577730; Sat, 09 May 2026 22:52:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000558-QG; Sat, 09 May 2026 22:52:48 +0000 Received: by outflank-mailman (input) for mailman id 1305100; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qN-8E for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXO-008rH7-LN; Sun, 10 May 2026 00:52:46 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-48 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-7371-0a2a45060019-5a9b3222d576-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LP-2pj4; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJ7-1V2k; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=HcPos2+xuZTjBV7pxq7NSClTpw+Fu99QdQJ5Jy1Ls+M=; b=Zf77LfPtfI70hL1gqLbAhPtLtX ibkr66p3p6/yNwf1wG6qqc/ms/D0cd+mf/gL9RKluGUlABJWL954X+hC7rfWjImiJ7CROZMthVqh7 OTkMC4vADFkwf63SWHGMNbF2qJVf9rruhAcDBmTZgzvOH0jHPndB5bEQv9StPED9R1rJWRdq5KqsA idLIC0tiDnsbUYQlxQkaFsJ1rxU7HJqRe1UHoilCGBY2oTbY3Qok9mr4jH7I9F9puYYvsCXOgoRSg aGZgxEUEluS1lC7dL54o1eq6sM/iCEMUEUte4b9q7W4oNzFdeq8Z9C54Hgb9kHKHIxTuTapNwFb2v 46Z9XONA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 29/30] x86/kvm: Obtain TSC frequency from CPUID if present Date: Sat, 9 May 2026 23:46:55 +0100 Message-ID: <20260509224824.3264567-30-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366926-8FD7AD75-F860CF9A/0/0 X-purgate-type: clean X-purgate-size: 3522 From: David Woodhouse In https://lore.kernel.org/all/1222881242.9381.17.camel@alok-dev1/ a proposal was made for generic CPUID conventions across hypervisors. It was mostly shot down in flames, but the leaf at 0x40000010 containing timing information didn't die. It's used by XNU and FreeBSD guests under all hypervisors to determine the TSC frequency, and also exposed by the EC2 Nitro hypervisor and VMware. Use it under KVM to obtain the TSC frequency more accurately, instead of reverse-calculating the frequency from the mul/shift values in the KVM clock. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/include/uapi/asm/kvm_para.h | 11 +++++++++++ arch/x86/kernel/kvm.c | 10 ++++++++++ arch/x86/kernel/kvmclock.c | 7 ++++++- 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 4a47c16e2df8..03fa1228fcf2 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -121,6 +121,7 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, void kvmclock_init(void); void kvmclock_disable(void); bool kvm_para_available(void); +unsigned int kvm_para_tsc_khz(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); void kvm_async_pf_task_wait_schedule(u32 token); diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h index a1efa7907a0b..dc0d036fe678 100644 --- a/arch/x86/include/uapi/asm/kvm_para.h +++ b/arch/x86/include/uapi/asm/kvm_para.h @@ -44,6 +44,17 @@ */ #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 +/* + * In https://lore.kernel.org/all/1222881242.9381.17.camel@alok-dev1/ + * VMware proposed a timing information leaf providing the TSC and + * local APIC timer frequencies: + * + * # EAX: (Virtual) TSC frequency in kHz. + * # EBX: (Virtual) Bus (local apic timer) frequency in kHz. + * # ECX, EDX: RESERVED (reserved fields are set to zero). + */ +#define KVM_CPUID_TIMING_INFO 0x40000010 + #define MSR_KVM_WALL_CLOCK 0x11 #define MSR_KVM_SYSTEM_TIME 0x12 diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 29226d112029..60375165b66c 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -910,6 +910,16 @@ bool kvm_para_available(void) } EXPORT_SYMBOL_GPL(kvm_para_available); +unsigned int kvm_para_tsc_khz(void) +{ + u32 base = kvm_cpuid_base(); + + if (base && cpuid_eax(base) >= (base | KVM_CPUID_TIMING_INFO)) + return cpuid_eax(base | KVM_CPUID_TIMING_INFO); + + return 0; +} + unsigned int kvm_arch_para_features(void) { return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES); diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b5991d53fc0e..74aca22dc726 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -118,7 +118,12 @@ static inline void kvm_sched_clock_init(bool stable) static unsigned long kvm_get_tsc_khz(void) { setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); - return pvclock_tsc_khz(this_cpu_pvti()); + + /* + * If KVM advertises the frequency directly in CPUID, use that + * instead of reverse-calculating it from the KVM clock data. + */ + return kvm_para_tsc_khz() ? : pvclock_tsc_khz(this_cpu_pvti()); } static void __init kvm_get_preset_lpj(void) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305101.1577736 (Exim 4.92) (envelope-from ) id 1wLqXR-000580-95; Sat, 09 May 2026 22:52:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305101.1577736; Sat, 09 May 2026 22:52:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-00056z-1J; Sat, 09 May 2026 22:52:49 +0000 Received: by outflank-mailman (input) for mailman id 1305101; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qO-94 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXO-002c5y-MQ; Sun, 10 May 2026 00:52:46 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-16 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-56b3-0a2a450a0019-5a9b3222bc10-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060L8-2QAw; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTB-0000000DhHG-3mRt; Sat, 09 May 2026 23:48:25 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:To:From:Reply-To:Cc:Content-Type: Content-ID:Content-Description:In-Reply-To:References; bh=XG5p4cJcLgImpvW6Me4R9NQ4kt4cFymqrFSnQMVMwOY=; b=ES7WV1IaPYdAPQghiFOJa/RmZY 4LlcRdnPpTdc4p2WmH6+v831QI/nCxKhQTpeiQvQrzWuSN4lUBadGmnwriNY/sd4I32yr/WcNisPu zxc1dbf2YiOSilzjsQoIyixtVnPxtRgYEGOk/3O7TNWwNux0b0TRIy1Ou5tsIHkzYUvYbfVgT6xxo TFOzByeaxUYJVDT/7L+l+B0HN24YMmuUuyb51SEhxtyguBU1yjwvirNy12P9s7lrPmH1QtMISeoV/ VY6XaeAoQkrjuUqg8fTQThOxdknMqCh4N9HgtHWTEQqrk7RIg92pmHDd09fvkAm1nJkmrZgL2jgs/ oRqO8Acg==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4] 00/30] Cleaning up the KVM clock mess Date: Sat, 9 May 2026 23:46:26 +0100 Message-ID: <20260509224824.3264567-1-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366926-7C07C8B7-89B9C4F6/0/0 X-purgate-type: clean X-purgate-size: 6354 This is v4 of the series to clean up the KVM clock, addressing review feedback from Sean Christopherson and Paul Durrant on v3, rebased to the current kernel, and incorporating related work from Dongli Zhang. The KVM clock has historically suffered from three problems: 1. Imprecision: get_kvmclock_ns() computed the clock from the *host* TSC without applying guest TSC scaling, causing systemic drift from the values the guest computes from its own TSC. 2. Unnecessary discontinuities: gratuitous KVM_REQ_MASTERCLOCK_UPDATE requests caused the master clock reference point to be re-snapshotted, yanking the guest's clock due to arithmetic precision differences. 3. No precise migration API: the existing KVM_[GS]ET_CLOCK only allows setting the clock at a given UTC reference time, which is necessarily imprecise. There was no way to preserve the exact arithmetic relationship between guest TSC and KVM clock across live migration. This series addresses all three, and adds new APIs for precise clock migration and TSC frequency reporting. Changes since v3: - Rebased to v7.1-rc2 - Split patch 09 (__get_kvmclock fix) into 6 incremental patches per Sean's review - Split patch 10 (TSC upscaling) into 2 patches per Sean's review - Split patch 15 (offset TSCs) into frequency-match vs offset-match - Addressed Sean's review: hw_tsc_hz overflow (u64), KVM_VCPU_TSC_SCALE gated on has_tsc_control, pvclock_gtod_notifier unregister path, kvm_get_time_scale() readability, and many more - Incorporated Dongli Zhang's masterclock drift mitigation, reworked as a proper deduplication of redundant updates via request clearing under the tsc_write_lock - Added KVM_VCPU_TSC_EFFECTIVE_FREQ attribute for userspace to populate CPUID timing leaves without KVM modifying guest CPUID at runtime - Removed runtime Xen TSC CPUID modification (was updating wrong leaf) - Added guest-side patches to use CPUID 0x40000010 for TSC frequency under both KVM and Xen - Selftest covers clock correction at multiple TSC frequencies, PVCLOCK_TSC_STABLE_BIT behaviour, and multi-vCPU offset scenarios - Fixed RCU splat in KVM_GET_CLOCK_GUEST (needs srcu_read_lock) The series can be broadly grouped as: Patches 1-5: Core clock fixes and new KVM_[GS]ET_CLOCK_GUEST API Patches 6-8: TSC scaling prerequisites Patches 9-14: Fix get_kvmclock() precision (split per review) Patches 15-16: Fix kvm_guest_time_update() for TSC upscaling Patches 17-20: Code cleanup and simplification Patches 21-22: Allow master clock with offset TSCs Patches 23-24: Eliminate gratuitous clock updates Patch 25: Xen runstate negative time fix Patch 26: Deduplicate redundant masterclock updates Patches 27-28: TSC frequency reporting for CPUID Patches 29-30: Guest-side CPUID frequency consumption David Woodhouse (27): KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init() KVM: x86: Improve accuracy of KVM clock when TSC scaling is in force KVM: x86: Explicitly disable TSC scaling without CONSTANT_TSC KVM: x86: Add KVM_VCPU_TSC_SCALE and fix the documentation on TSC migration KVM: x86: Avoid NTP frequency skew for KVM clock on 32-bit host KVM: x86: WARN if kvm_get_walltime_and_clockread() fails unexpectedly KVM: x86: Fold __get_kvmclock() into get_kvmclock() KVM: x86: Add WARN and restructure get_kvmclock() KVM: x86: Use get_kvmclock_base_ns() as fallback in get_kvmclock() KVM: x86: Fix KVM clock precision in get_kvmclock() with TSC scaling KVM: x86: Use get_kvmclock() in kvm_get_wall_clock_epoch() KVM: x86: Fix compute_guest_tsc() to handle negative time deltas KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling KVM: x86: Simplify and comment kvm_get_time_scale() KVM: x86: Remove implicit rdtsc() from kvm_compute_l1_tsc_offset() KVM: x86: Improve synchronization in kvm_synchronize_tsc() KVM: x86: Kill last_tsc_{nsec,write,offset} fields KVM: x86: Replace nr_vcpus_matched_tsc count with all_vcpus_matched_tsc bool KVM: x86: Allow KVM master clock mode when TSCs are offset from each other KVM: x86: Factor out kvm_use_master_clock() KVM: x86: Avoid gratuitous global clock updates KVM: x86/xen: Prevent runstate times from becoming negative KVM: x86: Avoid redundant masterclock updates from multiple vCPUs KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute KVM: x86: Remove runtime Xen TSC frequency CPUID update x86/kvm: Obtain TSC frequency from CPUID if present x86/xen: Obtain TSC frequency from CPUID if present Jack Allister (3): UAPI: x86: Move pvclock-abi to UAPI for x86 platforms KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration KVM: selftests: Add KVM/PV clock selftest to prove timer correction Documentation/virt/kvm/api.rst | 37 ++ Documentation/virt/kvm/devices/vcpu.rst | 69 ++- MAINTAINERS | 4 +- arch/x86/include/asm/kvm_host.h | 13 +- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/include/uapi/asm/kvm.h | 12 + arch/x86/include/uapi/asm/kvm_para.h | 11 + arch/x86/include/{ => uapi}/asm/pvclock-abi.h | 27 +- arch/x86/kernel/kvm.c | 10 + arch/x86/kernel/kvmclock.c | 7 +- arch/x86/kvm/cpuid.c | 16 - arch/x86/kvm/svm/svm.c | 3 +- arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/x86.c | 735 ++++++++++++++++++------- arch/x86/kvm/xen.c | 21 +- arch/x86/kvm/xen.h | 13 - arch/x86/xen/time.c | 12 + include/uapi/linux/kvm.h | 3 + tools/testing/selftests/kvm/Makefile.kvm | 1 + tools/testing/selftests/kvm/x86/pvclock_test.c | 415 ++++++++++++++ 20 files changed, 1157 insertions(+), 255 deletions(-) create mode 100644 tools/testing/selftests/kvm/x86/pvclock_test.c rename arch/x86/include/{asm => uapi/asm}/pvclock-abi.h (82%) From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305102.1577742 (Exim 4.92) (envelope-from ) id 1wLqXR-0005CL-Nb; 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Sun, 10 May 2026 00:48:46 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LF-0WlZ; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIP-3h9H; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=b7vK04j3ME79EByeo7DIf/aiU6TZ9fbb5omdiwpyWzc=; b=S2A6ymwriAt64z9TQK3O/qNgAN N8Ha10Fnpk9cyE11JyOV9pteTaq1j1VA/HgVSrPtKweFAdNaCJtwgaOB0BqIBjb2U5qybT08nHlqv xii0wn7hkW8fGmcyIX0jnFsCVvpGq7akuF7b9OK/S5JyBBC3Y8HtWS8HJclPsQNfa/UDTBuiPYyfn fhTclwPmu5i6rZ9PmzVgA0eLcOdU/nHxOFMHS54bZkPkb3Gp9jhjgUtG0NSInmOkImKCqDRj8Ae5c gGGeVrXNwhBE24V2+6zvu3na1yuNyDvRQ+GsAKRctkF7Ih1XQq1Q/F1Snn5YPhWeuHJWjLp83tBxT OXCP80SQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 18/30] KVM: x86: Remove implicit rdtsc() from kvm_compute_l1_tsc_offset() Date: Sat, 9 May 2026 23:46:44 +0100 Message-ID: <20260509224824.3264567-19-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366926-8797CD75-D2F4383B/0/0 X-purgate-type: clean X-purgate-size: 2890 From: David Woodhouse Let the callers pass the host TSC value in as an explicit parameter. This leaves some fairly obviously stupid code, which is using this function to compare the guest TSC at some *other* time, with the newly-minted TSC value from rdtsc(). Unless it's being used to measure *elapsed* time, that isn't very sensible. In this case, "obviously stupid" is an improvement over being non-obviously so. No functional change intended. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 980fc22ee05b..c9cbebd6a92a 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2693,11 +2693,12 @@ u64 kvm_scale_tsc(u64 tsc, u64 ratio) return _tsc; } -static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc) +static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 host_tsc, + u64 target_tsc) { u64 tsc; - tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio); + tsc = kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio); return target_tsc - tsc; } @@ -2859,7 +2860,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) bool synchronizing = false; raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); - offset = kvm_compute_l1_tsc_offset(vcpu, data); + offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); ns = get_kvmclock_base_ns(); elapsed = ns - kvm->arch.last_tsc_nsec; @@ -2908,7 +2909,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) } else { u64 delta = nsec_to_cycles(vcpu, elapsed); data += delta; - offset = kvm_compute_l1_tsc_offset(vcpu, data); + offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); } matched = true; } @@ -4143,7 +4144,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) if (msr_info->host_initiated) { kvm_synchronize_tsc(vcpu, &data); } else if (!vcpu->arch.guest_tsc_protected) { - u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset; + u64 adj = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data) - + vcpu->arch.l1_tsc_offset; adjust_tsc_offset_guest(vcpu, adj); vcpu->arch.ia32_tsc_adjust_msr += adj; } @@ -5267,7 +5269,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) mark_tsc_unstable("KVM discovered backwards TSC"); if (kvm_check_tsc_unstable()) { - u64 offset = kvm_compute_l1_tsc_offset(vcpu, + u64 offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), vcpu->arch.last_guest_tsc); kvm_vcpu_write_tsc_offset(vcpu, offset); if (!vcpu->arch.guest_tsc_protected) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305103.1577749 (Exim 4.92) (envelope-from ) id 1wLqXS-0005MZ-4h; Sat, 09 May 2026 22:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305103.1577749; Sat, 09 May 2026 22:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-0005L2-S1; Sat, 09 May 2026 22:52:49 +0000 Received: by outflank-mailman (input) for mailman id 1305103; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qZ-J7 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXP-00270l-0L; Sun, 10 May 2026 00:52:47 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba0e-5cb7-0a2a0a5109dd-0a2a450cd954-22 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-62f1-0a2a450c0019-5a9b32228c26-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LH-1BBJ; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIb-00Lr; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=i7duIEXMStsWYL6WzEUEDaNP/mNDkLAL2ohxoamlxeI=; b=tUOlFFtqlQAYYwkkjSAjnrd09b FlczeN8fbJ55CAdtEjipsEF6BGQa+jEwKWCAu7ZQWWLZNA2WyNUiwJqoU+9cIhKfRX3YlSbjCad+8 RJqZPdPJcvOSafcL8lIn0h/w9WRQZ42JkLCMmYn4ILswgFOm4+KN31x6l3TGrtDS/qyiqOqcGMmKo fW7cDJ9FimXogOx1R346817oTvmQRox1amlNQsTtmjffDrdm1jYEhJegyoEfIsc63AyrMh/jXzx7f Qd9kK+oZ4I03WNImARQGDVWRdK9mKi82Qx3p1Hw+Hu4WdPTsKlMcpx6Ju7nMHg0f2pvnTAmcwHySc jpEdKDRA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 21/30] KVM: x86: Replace nr_vcpus_matched_tsc count with all_vcpus_matched_tsc bool Date: Sat, 9 May 2026 23:46:47 +0100 Message-ID: <20260509224824.3264567-22-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1778366926-DB57FCF5-33742259/0/0 X-purgate-type: clean X-purgate-size: 2980 From: David Woodhouse Using a count and comparing with kvm->online_vcpus was always racy because a new vCPU could be created while kvm_track_tsc_matching() was running and comparing with kvm->online_vcpus. That variable is only atomic with respect to itself; kvm_arch_vcpu_create() runs before kvm->online_vcpus is incremented for the new vCPU. Replace the count with a boolean that is set in kvm_track_tsc_matching() after comparing the count, and cleared when a new TSC generation starts. The boolean is consumed by pvclock_update_vm_gtod_copy() under the tsc_write_lock, which serializes against __kvm_synchronize_tsc(). Keep the count for now as it's still used in the trace event. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/x86.c | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 59298a8f78eb..eb81f90284ba 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1492,6 +1492,7 @@ struct kvm_arch { u64 cur_tsc_write; u64 cur_tsc_offset; u64 cur_tsc_generation; + bool all_vcpus_matched_tsc; int nr_vcpus_matched_tsc; u32 default_tsc_khz; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 3c68d2a4c8d0..b74fd8b088ad 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2648,11 +2648,12 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) /* * To use the masterclock, the host clocksource must be based on TSC - * and all vCPUs must have matching TSCs. Note, the count for matching - * vCPUs doesn't include the reference vCPU, hence "+1". + * and all vCPUs must have matching TSCs. */ - bool use_master_clock = (ka->nr_vcpus_matched_tsc + 1 == - atomic_read(&vcpu->kvm->online_vcpus)) && + ka->all_vcpus_matched_tsc = (ka->nr_vcpus_matched_tsc + 1 == + atomic_read(&vcpu->kvm->online_vcpus)); + + bool use_master_clock = ka->all_vcpus_matched_tsc && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -2837,6 +2838,7 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, kvm->arch.cur_tsc_write = tsc; kvm->arch.cur_tsc_offset = offset; kvm->arch.nr_vcpus_matched_tsc = 0; + kvm->arch.all_vcpus_matched_tsc = false; } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) { kvm->arch.nr_vcpus_matched_tsc++; } @@ -3176,8 +3178,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) bool host_tsc_clocksource, vcpus_matched; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 == - atomic_read(&kvm->online_vcpus)); + vcpus_matched = ka->all_vcpus_matched_tsc; /* * If the host uses TSC clock, then passthrough TSC as stable -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305104.1577756 (Exim 4.92) (envelope-from ) id 1wLqXS-0005Xy-Qa; Sat, 09 May 2026 22:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305104.1577756; Sat, 09 May 2026 22:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXS-0005W9-FU; Sat, 09 May 2026 22:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1305104; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000518-Fn for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXP-002c5y-Sz; Sun, 10 May 2026 00:52:47 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-18 for ; Sun, 10 May 2026 00:52:47 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-56b3-0a2a450a0019-5a9b3222ce94-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LL-20sT; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIr-0oMS; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=cVUBIMjJ1XQ+25DjUmKRxKTuLcXblZ+qoogoFwNKcIc=; b=torvBl2IxVi6KiT3kAGIroWI4I UHAsuTdRPh4qRitOygfigQ1bAbUUG7McF3OzIG9i9a0E5Fdpf7W2dxYsdi2T+3Da7wSe5wrhAU0Hu UXTwlv8WaP3QzacDy4C4jM3KVH7+Pp5XHWGBU/9KK0WTB73LlGyLWuyHeZv0hc5Kyz465wyPP1mlc lhDLx6WzRZ83hVWzBaedx016ZIz5E3feT+mmNponeRyijVADq9F52nSgTNfk9oNhSl0O0YtolH7OG 473u+7Q9XkH2jKKZnfrEAA5BnEuleCjxcuQLdk9/M+yQswQjTCyZ3FIwzZHbaOwIrPfMtA7EknKKU 2zPWQIJA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 25/30] KVM: x86/xen: Prevent runstate times from becoming negative Date: Sat, 9 May 2026 23:46:51 +0100 Message-ID: <20260509224824.3264567-26-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366927-6FB5F8B7-CB0D16A1/0/0 X-purgate-type: clean X-purgate-size: 2734 From: David Woodhouse When kvm_xen_update_runstate() is invoked to set a vCPU's runstate, the time spent in the previous runstate is accounted. This is based on the delta between the current KVM clock time, and the previous value stored in vcpu->arch.xen.runstate_entry_time. If the KVM clock goes backwards, that delta will be negative. Or, since it's an unsigned 64-bit integer, very *large*. Linux guests deal with that particularly badly, reporting 100% steal time for ever more (well, for *centuries* at least, until the delta has been consumed). So when a negative delta is detected, just refrain from updating the runstates until the KVM clock catches up with runstate_entry_time again. Also clamp steal_ns to delta_ns to prevent steal time from exceeding the total elapsed time, and handle negative steal_ns (which can happen if run_delay goes backwards across a scheduler update). The userspace APIs for setting the runstate times do not allow them to be set past the current KVM clock, but userspace can still adjust the KVM clock *after* setting the runstate times, which would cause this situation to occur. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/xen.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c index 82e34edbfdbd..fef52b8ea26a 100644 --- a/arch/x86/kvm/xen.c +++ b/arch/x86/kvm/xen.c @@ -586,24 +586,33 @@ void kvm_xen_update_runstate(struct kvm_vcpu *v, int state) { struct kvm_vcpu_xen *vx = &v->arch.xen; u64 now = get_kvmclock_ns(v->kvm); - u64 delta_ns = now - vx->runstate_entry_time; u64 run_delay = current->sched_info.run_delay; + s64 delta_ns = now - vx->runstate_entry_time; + s64 steal_ns = run_delay - vx->last_steal; if (unlikely(!vx->runstate_entry_time)) vx->current_runstate = RUNSTATE_offline; + vx->last_steal = run_delay; + + /* + * If KVM clock time went backwards, stop updating until it + * catches up (or the runstates are reset by userspace). + */ + if (delta_ns < 0) + return; + /* * Time waiting for the scheduler isn't "stolen" if the * vCPU wasn't running anyway. */ - if (vx->current_runstate == RUNSTATE_running) { - u64 steal_ns = run_delay - vx->last_steal; + if (vx->current_runstate == RUNSTATE_running && steal_ns > 0) { + if (steal_ns > delta_ns) + steal_ns = delta_ns; delta_ns -= steal_ns; - vx->runstate_times[RUNSTATE_runnable] += steal_ns; } - vx->last_steal = run_delay; vx->runstate_times[vx->current_runstate] += delta_ns; vx->current_runstate = state; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305105.1577762 (Exim 4.92) (envelope-from ) id 1wLqXT-0005eb-70; Sat, 09 May 2026 22:52:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305105.1577762; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXS-0005cd-Rw; Sat, 09 May 2026 22:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1305105; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000532-LL for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-006SzZ-2G; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba91-bab6-0a2a0a5309dd-0a2a450884bc-22 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-63b5-0a2a45080019-5a9b322294c0-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LJ-1pmT; Sat, 09 May 2026 22:48:31 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIj-0Fe7; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=fg8C3e0zngZ/qjTwoH3UeG+KjIQgclDXz6pRh4tinms=; b=PKujpKHmlrgXqjPVL9jaYkGJO3 T53JltigiUhtpHLz+35Soyi64kAnFI6avFDSQ7/IsNyZ28l+qFCRvclVStCfZHOZz828JXHb31UdJ N7lE9EYlEhuJZCzxJ4ROVt9rXq8DoQ6Kq4DUaUrRGuQx0dP4khkmjRDJ/M13crOzpM7oqACBUXIs3 Q4nD8VTOzo/a5INBq2ieHxDAu27u1CaWybhnejK7d4D9LRkfa7L3FXKr81GvuOhbDZFGzyrQ8YMGi 8v/2/UeGdEcEt4bq95OSqY24tuE+B53teUl+Vpo85e3cKBhcevIqPiHpEnEnceUh3LIMiGmLn2PyW NDQeV2eg==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 23/30] KVM: x86: Factor out kvm_use_master_clock() Date: Sat, 9 May 2026 23:46:49 +0100 Message-ID: <20260509224824.3264567-24-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366927-BFD7BDB1-47E21989/13/0 X-purgate-type: clean X-purgate-size: 3576 From: David Woodhouse Both kvm_track_tsc_matching() and pvclock_update_vm_gtod_copy() make a decision about whether the KVM clock should be in master clock mode. They used *different* criteria for the decision though. This isn't really a problem; it only has the potential to cause unnecessary invocations of KVM_REQ_MASTERCLOCK_UPDATE if the masterclock was disabled due to TSC going backwards, or the guest using the old MSR. But it isn't pretty. Factor the decision out to a single function. And document the historical reason why it's disabled for guests that use the old MSR_KVM_SYSTEM_TIME. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d36d03b8268e..0656d901fe79 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2640,6 +2640,27 @@ static inline bool gtod_is_based_on_tsc(int mode) } #endif +static bool kvm_use_master_clock(struct kvm *kvm) +{ + struct kvm_arch *ka = &kvm->arch; + + /* + * The 'old kvmclock' check is a workaround (from 2015) for a + * SUSE 2.6.16 kernel that didn't boot if the system_time in + * its kvmclock was too far behind the current time. So the + * mode of just setting the reference point and allowing time + * to proceed linearly from there makes it fail to boot. + * Despite that being kind of the *point* of the way the clock + * is exposed to the guest. By coincidence, the offending + * kernels used the old MSR_KVM_SYSTEM_TIME, which was moved + * only because it resided in the wrong number range. So the + * workaround is activated for *all* guests using the old MSR. + */ + return ka->all_vcpus_matched_freq && + !ka->backwards_tsc_observed && + !ka->boot_vcpu_runs_old_kvmclock; +} + static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) { #ifdef CONFIG_X86_64 @@ -2662,7 +2683,7 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) * are fine — each vCPU's pvclock has its own tsc_timestamp that * accounts for its offset. */ - bool use_master_clock = ka->all_vcpus_matched_freq && + bool use_master_clock = kvm_use_master_clock(vcpu->kvm) && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -3190,10 +3211,9 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) #ifdef CONFIG_X86_64 struct kvm_arch *ka = &kvm->arch; int vclock_mode; - bool host_tsc_clocksource, vcpus_matched; + bool host_tsc_clocksource; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = ka->all_vcpus_matched_freq; /* * If the host uses TSC clock, then passthrough TSC as stable @@ -3203,9 +3223,8 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) &ka->master_kernel_ns, &ka->master_cycle_now); - ka->use_master_clock = host_tsc_clocksource && vcpus_matched - && !ka->backwards_tsc_observed - && !ka->boot_vcpu_runs_old_kvmclock; + ka->use_master_clock = host_tsc_clocksource && + kvm_use_master_clock(kvm); if (ka->use_master_clock) { u64 tsc_hz; @@ -3231,7 +3250,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) vclock_mode = pvclock_gtod_data.clock.vclock_mode; trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode, - vcpus_matched); + ka->all_vcpus_matched_freq); #endif } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305106.1577768 (Exim 4.92) (envelope-from ) id 1wLqXT-0005kL-I0; Sat, 09 May 2026 22:52:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305106.1577768; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXT-0005j1-7k; Sat, 09 May 2026 22:52:51 +0000 Received: by outflank-mailman (input) for mailman id 1305106; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-00054w-S0 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-00270l-8r; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba8c-5cb7-0a2a0a5109dd-0a2a4502af40-16 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-af86-0a2a45020019-5a9b322294d0-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LG-11bn; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIX-44HE; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=iwNDogNMnm4WL4MqrZc8nsIfoorb7pJAk0uuGh5ggK4=; b=mRIMgmptP6nlE1xwJJE7wWchlj c5hj715Dq8L1J2PI/D8dsuU7xrbXhQSFIt0oyARLK3GdPSMaIrfKJHxkF9HDegFgOkjueS3rlt6/W 67i4Frua5/XiZINxBRRzCpomDpKO/csTN/dT245yPE+YO/RGSemOgeVIrNqUFKZUie5YfIuoBg59D g4vHNMHV7b+p80wEm1WwTOrLjMRW61Rdrzxh+x2pC5SJvDvJ5xkIWKHTGA60lHzLK+h51bNW2SkUq GFEo/NItxLK2xl668Yom6hg1gOvV+KTatfa1uufQQBtqoY9AZDAAT79NjCzqnQxh6Fr9HrZUmpbLh cxvDdfFQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 20/30] KVM: x86: Kill last_tsc_{nsec,write,offset} fields Date: Sat, 9 May 2026 23:46:46 +0100 Message-ID: <20260509224824.3264567-21-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366927-AB762161-F367B231/13/0 X-purgate-type: clean X-purgate-size: 5500 From: David Woodhouse These pointlessly duplicate the cur_tsc_{nsec,write,offset} values. The only place they were used was where the TSC is stable and a new vCPU is being synchronized to the previous setting, in which case the cur_tsc_* value is definitely identical. Rename last_tsc_khz and last_tsc_scaling_ratio to cur_tsc_khz and cur_tsc_scaling_ratio respectively, since they are properties of the current TSC generation. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/include/asm/kvm_host.h | 7 ++----- arch/x86/kvm/x86.c | 32 ++++++++++++++------------------ 2 files changed, 16 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 5348fd5ea3f3..59298a8f78eb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1486,11 +1486,8 @@ struct kvm_arch { * preemption-disabled region, so it must be a raw spinlock. */ raw_spinlock_t tsc_write_lock; - u64 last_tsc_nsec; - u64 last_tsc_write; - u32 last_tsc_khz; - u64 last_tsc_offset; - u64 last_tsc_scaling_ratio; + u32 cur_tsc_khz; + u64 cur_tsc_scaling_ratio; u64 cur_tsc_nsec; u64 cur_tsc_write; u64 cur_tsc_offset; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 097df58749c3..3c68d2a4c8d0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2813,14 +2813,12 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, vcpu->kvm->arch.user_set_tsc = true; /* - * We also track th most recent recorded KHZ, write and time to - * allow the matching interval to be extended at each write. + * Track the TSC frequency, scaling ratio, and offset for the current + * generation. These are used to detect matching TSC writes and to + * compute the guest TSC from the host clock. */ - kvm->arch.last_tsc_nsec = ns; - kvm->arch.last_tsc_write = tsc; - kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz; - kvm->arch.last_tsc_offset = offset; - kvm->arch.last_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; + kvm->arch.cur_tsc_khz = vcpu->arch.virtual_tsc_khz; + kvm->arch.cur_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; vcpu->arch.last_guest_tsc = tsc; @@ -2833,8 +2831,6 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, * nanosecond time, offset, and write, so if TSCs are in * sync, we can match exact offset, and if not, we can match * exact software computation in compute_guest_tsc() - * - * These values are tracked in kvm->arch.cur_xxx variables. */ kvm->arch.cur_tsc_generation++; kvm->arch.cur_tsc_nsec = ns; @@ -2873,7 +2869,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); offset = kvm_compute_l1_tsc_offset(vcpu, host_tsc, data); - elapsed = ns - kvm->arch.last_tsc_nsec; + elapsed = ns - kvm->arch.cur_tsc_nsec; if (vcpu->arch.virtual_tsc_khz) { if (data == 0) { @@ -2883,7 +2879,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) */ synchronizing = true; } else if (kvm->arch.user_set_tsc) { - u64 tsc_exp = kvm->arch.last_tsc_write + + u64 tsc_exp = kvm->arch.cur_tsc_write + nsec_to_cycles(vcpu, elapsed); u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL; /* @@ -2914,14 +2910,14 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) * it's better to try to match offsets from the beginning. */ if (synchronizing && - vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) { + vcpu->arch.virtual_tsc_khz == kvm->arch.cur_tsc_khz) { /* * If synchronizing, the "last written" TSC value/time * recorded by __kvm_synchronize_tsc() should not change * (i.e. should be precisely the same as the existing * generation). */ - data = kvm->arch.last_tsc_write; + data = kvm->arch.cur_tsc_write; if (!kvm_check_tsc_unstable()) { offset = kvm->arch.cur_tsc_offset; @@ -3206,7 +3202,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) * get_kvmclock() to compute kvmclock from the host TSC * without needing a vCPU reference. */ - ka->master_tsc_scaling_ratio = ka->last_tsc_scaling_ratio; + ka->master_tsc_scaling_ratio = ka->cur_tsc_scaling_ratio; tsc_hz = (u64)get_cpu_tsc_khz() * 1000; if (tsc_hz && kvm_caps.has_tsc_control) tsc_hz = kvm_scale_tsc(tsc_hz, @@ -6075,8 +6071,8 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); matched = (vcpu->arch.virtual_tsc_khz && - kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz && - kvm->arch.last_tsc_offset == offset); + kvm->arch.cur_tsc_khz == vcpu->arch.virtual_tsc_khz && + kvm->arch.cur_tsc_offset == offset); tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset; ns = get_kvmclock_base_ns(); @@ -13520,8 +13516,8 @@ int kvm_arch_enable_virtualization_cpu(void) * you may have some problem. Solving this issue is * left as an exercise to the reader. */ - kvm->arch.last_tsc_nsec = 0; - kvm->arch.last_tsc_write = 0; + kvm->arch.cur_tsc_nsec = 0; + kvm->arch.cur_tsc_write = 0; } } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305107.1577770 (Exim 4.92) (envelope-from ) id 1wLqXU-0005uO-1d; Sat, 09 May 2026 22:52:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305107.1577770; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXT-0005sG-Ok; Sat, 09 May 2026 22:52:51 +0000 Received: by outflank-mailman (input) for mailman id 1305107; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-000585-AO for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-006SzZ-NA; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-bab6-0a2a0a5309dd-0a2a4507d1b8-14 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9d0-229c-0a2a45070019-5a9b3222c1fe-3 for ; Sun, 10 May 2026 00:48:48 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060LA-3IS1; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHl-1rbg; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=XMpTG0soXwBy/thkGcHgDsOpdH9egi4Ry9N+LywUSzQ=; b=EKu/r3asoX2SfZ406BfO/egThQ F7iNeLfLoiU4BsuJsLO9wR8exCZfZ16VgO9TgglaLHmvaRE6F70VHCnwl5QPDB/JwnS10nhgau/yJ J7wo3Gx/Lb6KtqMv+CitqIMVfrl98+1mN1P9qTui4wUaHmhIF2QPv9yvu5B+ImTV0eMefXLrJykZI RZJN17BBtlrWPeX5MOsjcAWOEZY+jE7pmxG6iDAaJ3T+mJBuYORNrVKRUOhpuPNI4KwilZw/E9oC2 RqxHvK8aRbu2faUJNYRKNfBxBr/ZIi3kMgj6xBoxv/3p4ZSilEZi4CxBzlFx3KoZ7DRnwk1LjYxuB p3RWaigw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 08/30] KVM: x86: Avoid NTP frequency skew for KVM clock on 32-bit host Date: Sat, 9 May 2026 23:46:34 +0100 Message-ID: <20260509224824.3264567-9-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778366928-09D6FC48-54E68A94/13/0 X-purgate-type: clean X-purgate-size: 3670 From: David Woodhouse Commit 53fafdbb8b21 ("KVM: x86: switch KVMCLOCK base to monotonic raw clock") did so only for 64-bit hosts, by capturing the boot offset from within the existing clocksource notifier update_pvclock_gtod(). That notifier was added in commit 16e8d74d2da9 ("KVM: x86: notifier for clocksource changes") but only on x86_64, because its original purpose was just to disable the "master clock" mode which is only supported on x86_64. Now that the notifier is used for more than disabling master clock mode, enable it for the 32-bit build too so that get_kvmclock_base_ns() can be unaffected by NTP sync on 32-bit too. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 2179ea2da8e0..1e1834533e98 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2342,7 +2342,6 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) return kvm_set_msr_ignored_check(vcpu, index, *data, true); } -#ifdef CONFIG_X86_64 struct pvclock_clock { int vclock_mode; u64 cycle_last; @@ -2400,13 +2399,6 @@ static s64 get_kvmclock_base_ns(void) /* Count up from boot time, but with the frequency of the raw clock. */ return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot)); } -#else -static s64 get_kvmclock_base_ns(void) -{ - /* Master clock not used, so we can just use CLOCK_BOOTTIME. */ - return ktime_get_boottime_ns(); -} -#endif static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs) { @@ -10160,6 +10152,7 @@ static void pvclock_irq_work_fn(struct irq_work *w) } static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn); +#endif /* * Notification about pvclock gtod data update. @@ -10167,26 +10160,26 @@ static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn); static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused, void *priv) { - struct pvclock_gtod_data *gtod = &pvclock_gtod_data; struct timekeeper *tk = priv; update_pvclock_gtod(tk); +#ifdef CONFIG_X86_64 /* * Disable master clock if host does not trust, or does not use, * TSC based clocksource. Delegate queue_work() to irq_work as * this is invoked with tk_core.seq write held. */ - if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) && + if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode) && atomic_read(&kvm_guest_has_master_clock) != 0) irq_work_queue(&pvclock_irq_work); +#endif return 0; } static struct notifier_block pvclock_gtod_notifier = { .notifier_call = pvclock_gtod_notify, }; -#endif void kvm_setup_xss_caps(void) { @@ -10375,9 +10368,9 @@ int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops) if (pi_inject_timer == -1) pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER); -#ifdef CONFIG_X86_64 pvclock_gtod_register_notifier(&pvclock_gtod_notifier); +#ifdef CONFIG_X86_64 if (hypervisor_is_type(X86_HYPER_MS_HYPERV)) set_hv_tscchange_cb(kvm_hyperv_tsc_notifier); #endif @@ -10434,8 +10427,8 @@ void kvm_x86_vendor_exit(void) CPUFREQ_TRANSITION_NOTIFIER); cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE); } -#ifdef CONFIG_X86_64 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier); +#ifdef CONFIG_X86_64 irq_work_sync(&pvclock_irq_work); cancel_work_sync(&pvclock_gtod_work); #endif -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305109.1577803 (Exim 4.92) (envelope-from ) id 1wLqXZ-0007Co-O5; Sat, 09 May 2026 22:52:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305109.1577803; Sat, 09 May 2026 22:52:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXZ-0007Bf-G4; Sat, 09 May 2026 22:52:57 +0000 Received: by outflank-mailman (input) for mailman id 1305109; Sat, 09 May 2026 22:52:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXX-000748-Pe for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXX-006SzZ-6b; Sun, 10 May 2026 00:52:55 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba91-bab6-0a2a0a5309dd-0a2a450884bc-28 for ; Sun, 10 May 2026 00:52:55 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9d6-63b5-0a2a45080019-5a9b3222c200-3 for ; Sun, 10 May 2026 00:48:54 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LN-26fo; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIz-16xH; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=iccKma5DaUh/za+fsn0g6dyqukLvuPzbIDc21T+eVFU=; b=u6RYDSbD4U67hGcbeOF2FyQMxF 4dNfxJgj+Jw1VpmpgORUTUZi/lx3jqCjscmmNps9Ktu6RmyhKNQqG8Zrshc/lCMPNKFIfu5ClurIy afITS5d2xHSMWTG1ed+ca466NtWYvBcu88t51HCKij8WUt4q45fFjeqxZY2/6d429QdDCMJqzlYX7 P+yZB0umg7J4duqoMjVX9Fgti9c5kdgIh1TnkR32o+5SZVuXwWnuwEIwgF0Q+TO4dsFx/cw9gg56g 4jcjQhe2ozp2dKpbnlzBRde2x4i2wfno53zqxKIRk7l41GA2YKpPWUPfJlcBAfuh3NmuEZZFoC7Td q83vedYA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute Date: Sat, 9 May 2026 23:46:53 +0100 Message-ID: <20260509224824.3264567-28-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366934-BF77EDB1-33DC7014/13/0 X-purgate-type: clean X-purgate-size: 5057 From: David Woodhouse Add a read-only per-vCPU attribute that reports the effective TSC and APIC bus frequencies as seen by the guest, after hardware TSC scaling is applied. This allows userspace to populate CPUID leaf 0x40000010 (the "generic" timing information leaf used by FreeBSD, XNU, and VMware) with correct values, without KVM needing to modify guest CPUID at runtime. The effective TSC frequency differs from what userspace requested via KVM_SET_TSC_KHZ due to the granularity of hardware scaling and the host kernel's measurement of its own TSC frequency. The relationship between the attributes in KVM_VCPU_TSC_CTRL: KVM_VCPU_TSC_OFFSET: the offset added to the scaled host TSC KVM_VCPU_TSC_SCALE: the raw hardware scaling ratio and frac_bits, for VMClock and precise arithmetic KVM_VCPU_TSC_EFFECTIVE_FREQ: the resulting frequencies in kHz, for populating CPUID leaves Signed-off-by: David Woodhouse --- Documentation/virt/kvm/devices/vcpu.rst | 33 +++++++++++++++++++++++++ arch/x86/include/uapi/asm/kvm.h | 6 +++++ arch/x86/kvm/x86.c | 23 +++++++++++++++++ 3 files changed, 62 insertions(+) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 56562b932280..75d1c2bbb8bc 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -326,3 +326,36 @@ host TSC values are converted to guest TSC using the formula: Userspace can use this to precisely calculate the guest TSC from the host TSC at any given moment. This is needed for accurate migration of guests, as described in the documentation for the KVM_VCPU_TSC_OFFSET attribute. + +4.3 ATTRIBUTE: KVM_VCPU_TSC_EFFECTIVE_FREQ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:Parameters: struct kvm_vcpu_tsc_effective_freq + +Returns: + + ======= ====================================== + -EFAULT Error reading the provided parameter + address. + -ENXIO Attribute not supported (no constant TSC) + ======= ====================================== + +This read-only attribute reports the effective TSC and APIC bus timer +frequencies as observed by the guest, after hardware TSC scaling is +applied:: + + struct kvm_vcpu_tsc_effective_freq { + __u32 tsc_khz; + __u32 bus_khz; + }; + +The tsc_khz field is the guest's effective TSC frequency in kHz. This +may differ slightly from what userspace requested via KVM_SET_TSC_KHZ +due to the granularity of hardware scaling and the host kernel's +measurement of its own TSC frequency. + +The bus_khz field is the APIC bus timer frequency in kHz. + +Userspace can use these values to populate CPUID timing leaves for the +guest, such as the generic timing leaf at 0x40000010 (EAX=tsc_khz, +EBX=bus_khz) or hypervisor-specific equivalents. diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h index 384be9a53395..196899296f84 100644 --- a/arch/x86/include/uapi/asm/kvm.h +++ b/arch/x86/include/uapi/asm/kvm.h @@ -962,12 +962,18 @@ struct kvm_hyperv_eventfd { #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */ #define KVM_VCPU_TSC_SCALE 1 /* attribute for TSC scaling factor */ +#define KVM_VCPU_TSC_EFFECTIVE_FREQ 2 /* attribute for effective frequencies */ struct kvm_vcpu_tsc_scale { __u64 tsc_ratio; __u64 tsc_frac_bits; }; +struct kvm_vcpu_tsc_effective_freq { + __u32 tsc_khz; + __u32 bus_khz; +}; + /* x86-specific KVM_EXIT_HYPERCALL flags. */ #define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 77dfd4455a4e..c15303963686 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6079,6 +6079,9 @@ static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu, case KVM_VCPU_TSC_SCALE: r = kvm_caps.has_tsc_control ? 0 : -ENXIO; break; + case KVM_VCPU_TSC_EFFECTIVE_FREQ: + r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ? 0 : -ENXIO; + break; default: r = -ENXIO; } @@ -6115,6 +6118,25 @@ static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu, r = 0; break; } + case KVM_VCPU_TSC_EFFECTIVE_FREQ: { + struct kvm_vcpu_tsc_effective_freq freq; + + if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { + r = -ENXIO; + break; + } + + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) + kvm_guest_time_update(vcpu); + + freq.tsc_khz = div_u64(vcpu->arch.hw_tsc_hz, 1000); + freq.bus_khz = 1000000 / vcpu->kvm->arch.apic_bus_cycle_ns; + r = -EFAULT; + if (copy_to_user(uaddr, &freq, sizeof(freq))) + break; + r = 0; + break; + } default: r = -ENXIO; } @@ -6155,6 +6177,7 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, break; } case KVM_VCPU_TSC_SCALE: + case KVM_VCPU_TSC_EFFECTIVE_FREQ: r = -EINVAL; /* Read only */ break; default: -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305120.1577812 (Exim 4.92) (envelope-from ) id 1wLqXf-0007nO-4A; Sat, 09 May 2026 22:53:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305120.1577812; Sat, 09 May 2026 22:53:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007mx-Sm; Sat, 09 May 2026 22:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1305120; Sat, 09 May 2026 22:53:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXd-0007i0-Si for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-9C; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba1a-bab6-0a2a0a5309dd-0a2a4501b8f8-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-c1f2-0a2a45010019-5a9b5cc7e740-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzD-0P9r; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHx-2Z87; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=r8GUuEfSqVDY4ObHqgt5fkCwzZUXPNLZaFFwnl8uecE=; b=HmsoA/x37thVn7QmEUqzXzZ9dp ISe/5Rd32SNWt4q/Hbqvi9qSeQ3m/RtXJVGMmKWoN+OBAG8rHeLvJxRArpgwhp/bdKz6lzirvf8+j lU6es406aj7gY7eg4CaYfnmcL3Ekw6pKnOBZbpEf5Yi7Ujp3B0CbSJpFSogmG934w7gSa13zWF15F 8WY2cypbbhm5GfQeDwrC57KIozrcjnTuGUB//phuSrDxdxKUBVfD8R4QRbDbZwVGHlu49uXm1L5jK p7AtGqj6hNRZwETSVvraP00ZpIIBVXPuj3ThBQtbUkwVhFMHy4lwLeaSA6Rd3M8bbeKoJBkhcuJxJ rYlaHovQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 11/30] KVM: x86: Add WARN and restructure get_kvmclock() Date: Sat, 9 May 2026 23:46:37 +0100 Message-ID: <20260509224824.3264567-12-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1778366940-ADBA8FF4-964F25BB/13/0 X-purgate-type: clean X-purgate-size: 2313 From: David Woodhouse Add the same WARN_ON_ONCE for unexpected kvm_get_walltime_and_clockread() failure as in kvm_get_wall_clock_epoch(). Move get/put_cpu inside the use_master_clock branch since they are only needed there (for RDTSC and get_cpu_tsc_khz() to be on the same CPU). Also simplify the use_master_clock condition: the open-coded CONSTANT_TSC || cpu_tsc_khz check is unnecessary since use_master_clock can only be true when the TSC is usable. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 6f660c3210ee..9b395c00ccf2 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3209,21 +3209,27 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) do { seq = read_seqcount_begin(&ka->pvclock_sc); - /* both __this_cpu_read() and rdtsc() should be on the same cpu */ - get_cpu(); - data->flags = 0; - if (ka->use_master_clock && - (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { + if (ka->use_master_clock) { #ifdef CONFIG_X86_64 struct timespec64 ts; +#endif + /* + * The RDTSC and get_cpu_tsc_khz() must happen on + * the same CPU. + */ + get_cpu(); +#ifdef CONFIG_X86_64 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; - } else -#endif + } else if (WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) { + data->host_tsc = rdtsc(); + } +#else data->host_tsc = rdtsc(); +#endif data->flags |= KVM_CLOCK_TSC_STABLE; hv_clock.tsc_timestamp = ka->master_cycle_now; @@ -3232,11 +3238,11 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) &hv_clock.tsc_shift, &hv_clock.tsc_to_system_mul); data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + + put_cpu(); } else { data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; } - - put_cpu(); } while (read_seqcount_retry(&ka->pvclock_sc, seq)); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305121.1577817 (Exim 4.92) (envelope-from ) id 1wLqXf-0007sI-Jt; Sat, 09 May 2026 22:53:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305121.1577817; Sat, 09 May 2026 22:53:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007re-Bq; Sat, 09 May 2026 22:53:03 +0000 Received: by outflank-mailman (input) for mailman id 1305121; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007ik-0l for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-Dj; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffbac8-bab6-0a2a0a5309dd-0a2a45058fce-2 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-aaa8-0a2a45050019-5a9b5cc785ee-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzL-0Tzi; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIn-0aFl; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=gfI2hlP2ghO7kkyYaxpeS6acpLBXM/Xjzeg1dOVvOBY=; b=QRXeSw9e0EZn2zrMh0ZMFdeOuH gWYH1Am3+0BI9z6x5jPUh85q3k5sy+S+6PCYf+8U0ulYWYrn5/9WtjOSvz+Fb4yRPvNn8wMEVq2Ee FqXuKANiZmVNTzEwuvyyzfQAkk5rPcDM94g8+018sWE0TCxEZYMBGG0dANDcR7FGqRlFbpFf7uuVt L++xNEjHUy1cqZyLQx3TVzs2EHXd6EoPsZIbj3oBDvKW5wu6DgH0+fohc1QpxXw+gtceIic+69G9B p1nYyIjwdlj0NMHJxzeg3E8VYyVWxIgA+QxNsssMNKPpcSi3HsTIune8KieKthZ++YCViDvVKCj83 1riSTOmA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 24/30] KVM: x86: Avoid gratuitous global clock updates Date: Sat, 9 May 2026 23:46:50 +0100 Message-ID: <20260509224824.3264567-25-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c201ff/1778366940-E119B443-EB3518E7/13/0 X-purgate-type: clean X-purgate-size: 2521 From: David Woodhouse Eliminate three sources of unnecessary KVM_REQ_GLOBAL_CLOCK_UPDATE: 1. kvm_write_system_time(): The global clock update was a workaround for ever-drifting clocks based on the host's CLOCK_MONOTONIC subject to NTP skew. On booting or resuming a guest, it just leads to running kvm_guest_time_update() twice for each vCPU for no good reason. Use KVM_REQ_CLOCK_UPDATE on the vCPU itself, and only when the clock is being enabled, not disabled. 2. kvm_arch_vcpu_load(): Use KVM_REQ_CLOCK_UPDATE instead of KVM_REQ_GLOBAL_CLOCK_UPDATE. There is no need to update all vCPUs' clocks when one vCPU is loaded. 3. kvm_gen_kvmclock_update(): Skip the periodic global update entirely when in master clock mode, since the clock is defined precisely by the guest TSC and doesn't drift. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0656d901fe79..7d9ec0638d28 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2457,13 +2457,13 @@ static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time, } vcpu->arch.time = system_time; - kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu); /* we verify if the enable bit is set... */ - if (system_time & 1) + if (system_time & 1) { kvm_gpc_activate(&vcpu->arch.pv_time, system_time & ~1ULL, sizeof(struct pvclock_vcpu_time_info)); - else + kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); + } else kvm_gpc_deactivate(&vcpu->arch.pv_time); return; @@ -3638,6 +3638,10 @@ static void kvm_gen_kvmclock_update(struct kvm_vcpu *v) struct kvm_vcpu *vcpu; struct kvm *kvm = v->kvm; + /* In master clock mode, the clock doesn't need periodic updates. */ + if (kvm->arch.use_master_clock) + return; + kvm_for_each_vcpu(i, vcpu, kvm) { kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); kvm_vcpu_kick(vcpu); @@ -5339,7 +5343,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) * kvmclock on vcpu->cpu migration */ if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1) - kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu); + kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); if (vcpu->cpu != cpu) kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu); vcpu->cpu = cpu; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305122.1577822 (Exim 4.92) (envelope-from ) id 1wLqXg-0007y6-72; Sat, 09 May 2026 22:53:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305122.1577822; Sat, 09 May 2026 22:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007wb-Sh; Sat, 09 May 2026 22:53:03 +0000 Received: by outflank-mailman (input) for mailman id 1305122; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007ja-6a for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-JV; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-bab6-0a2a0a5309dd-0a2a4507d1b8-18 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-229c-0a2a45070019-5a9b5cc7b00c-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTE-00000008wzO-1SLK; Sat, 09 May 2026 22:48:29 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJB-1rWh; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=7Ju9ZkuVTj15MTYPuc5v1baLIQZcnrhBioVVlGYLmig=; b=p9tq+aOMSeacmQ+4Sy4WtR+Bw1 rYvCfaSU8+lYsJ1CJ4Wy3pzj2uKXGy0pM0Ahea/jCqrw+5As5J8XgCbgN62RH7j2INOMeBQZuAIWB Hf1L4TNwru7qFAI4f8D1WGgtpujT/IjjqAWnDWz1VUrvNaFptMW1b+O++qTbN/ppWqeM6TyUvW8YV mflTFSI3RImhAJIQtf+O/jPIOeMiS7dA5nYi8sUibf5VboP3isIb2W1I3Dg+YT/BxfLoQkCXVpUAH R9/k0agLsuB17tEyMDxJhZ4DYg0sSBuzd2sIN4BUNWtGOm1xtsfk4W0cUu9vX8LGFQUJf9OwLePSX sjG3n0SA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 30/30] x86/xen: Obtain TSC frequency from CPUID if present Date: Sat, 9 May 2026 23:46:56 +0100 Message-ID: <20260509224824.3264567-31-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778366940-28C7DC48-9A34D9A4/13/0 X-purgate-type: clean X-purgate-size: 2077 From: David Woodhouse The Xen CPUID leaf 3, sub-leaf 0, ECX provides the guest TSC frequency in kHz directly. Use it when available instead of reverse-calculating the frequency from the pvclock tsc_to_system_mul and tsc_shift values, which loses precision. This mirrors the equivalent change for KVM guests using the generic 0x40000010 timing leaf. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 +-- arch/x86/xen/time.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c15303963686..ac982652e5e0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3469,7 +3469,6 @@ static void kvm_setup_guest_pvclock(struct pvclock_vcpu_time_info *ref_hv_clock, int kvm_guest_time_update(struct kvm_vcpu *v) { struct pvclock_vcpu_time_info hv_clock = {}; - unsigned long flags; u64 tgt_tsc_hz; unsigned seq; struct kvm_vcpu_arch *vcpu = &v->arch; @@ -10162,7 +10161,7 @@ static void kvm_hyperv_tsc_notifier(void) kvm_caps.max_guest_tsc_khz = tsc_khz; list_for_each_entry(kvm, &vm_list, vm_list) { - __kvm_start_pvclock_update(kvm); + __kvm_start_pvclock_update(kvm, NULL); pvclock_update_vm_gtod_copy(kvm); kvm_end_pvclock_update(kvm); } diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 6f9f665bb7ae..862b8e9e8405 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -41,8 +41,20 @@ static unsigned long xen_tsc_khz(void) { struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; + u32 eax, ebx, ecx, edx; + u32 base = xen_cpuid_base(); setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + + /* + * If Xen provides the guest TSC frequency directly in CPUID + * (leaf 3, sub-leaf 0, ECX), use that instead of reverse- + * calculating from the pvclock mul/shift. + */ + cpuid_count(base + 3, 0, &eax, &ebx, &ecx, &edx); + if (ecx) + return ecx; + return pvclock_tsc_khz(info); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305123.1577828 (Exim 4.92) (envelope-from ) id 1wLqXh-00085l-6G; Sat, 09 May 2026 22:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305123.1577828; Sat, 09 May 2026 22:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXg-000835-Hw; Sat, 09 May 2026 22:53:04 +0000 Received: by outflank-mailman (input) for mailman id 1305123; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007k5-CC for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-00AYGp-P8; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba0e-5cb7-0a2a0a5109dd-0a2a450cd954-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-62f1-0a2a450c0019-5a9b5cc7e912-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzA-0Oe2; Sat, 09 May 2026 22:48:32 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHh-1YLk; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=dFbbY5OtZVYUw6Qy5tHS1aKoaYMuSOyj4x77iW34VYE=; b=SE6rkQzNLq7L4CqMdEC8BZZ0P6 EjpyYbZKK7v43rP/AeQVjSCbX4CyqL7SJgHZ4T2fJwadBOsjBMNWV4O9xztFhbc8UcA+mg4CVAeM/ pF/f/hHOOeWQWkfR1yJ2MttlyGrwYzwM8Us9usfEsF/GJA5jH2cvu8IwGenT2kPZ0o39/N1dT+CvY nxohuJurpY0cff1GFCz0rJ1gt7T7yFG3MUVg02Quc5oH80soyrmI4lVS78+lhGlGprjcpiGEuprPs JbtHdqIH9/IguEaANVzJe00VtBFhZaDJfm4NidetUasrra5NgYbGP82uPUI+FCBzQ8t4ujGxOn5Cs 38tbJYDw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 07/30] KVM: x86: Add KVM_VCPU_TSC_SCALE and fix the documentation on TSC migration Date: Sat, 9 May 2026 23:46:33 +0100 Message-ID: <20260509224824.3264567-8-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1778366940-F4E78CF5-1807B8E8/13/0 X-purgate-type: clean X-purgate-size: 4939 From: David Woodhouse The documentation on TSC migration using KVM_VCPU_TSC_OFFSET is woefully inadequate. It ignores TSC scaling, and ignores the fact that the host TSC may differ from one host to the next (and in fact because of the way the kernel calibrates it, it generally differs from one boot to the next even on the same hardware). Add KVM_VCPU_TSC_SCALE to extract the actual scale ratio and frac_bits, and attempt to document the process that userspace needs to follow to preserve the TSC across migration. Only enumerate KVM_VCPU_TSC_SCALE when kvm_caps.has_tsc_control is true, since the scaling ratio is only meaningful when hardware TSC scaling is supported. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- Documentation/virt/kvm/devices/vcpu.rst | 36 ++++++++++++++++++++++++- arch/x86/include/uapi/asm/kvm.h | 6 +++++ arch/x86/kvm/x86.c | 22 +++++++++++++++ 3 files changed, 63 insertions(+), 1 deletion(-) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 5e3805820010..56562b932280 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -243,7 +243,10 @@ Returns: Specifies the guest's TSC offset relative to the host's TSC. The guest's TSC is then derived by the following equation: - guest_tsc = host_tsc + KVM_VCPU_TSC_OFFSET + guest_tsc = ((host_tsc * tsc_scale_ratio) >> tsc_scale_bits) + KVM_VCPU_TSC_OFFSET + +The values of tsc_scale_ratio and tsc_scale_bits can be obtained using +the KVM_VCPU_TSC_SCALE attribute. This attribute is useful to adjust the guest's TSC on live migration, so that the TSC counts the time during which the VM was paused. The @@ -292,3 +295,34 @@ From the destination VMM process: 7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the respective value derived in the previous step. + +4.2 ATTRIBUTE: KVM_VCPU_TSC_SCALE +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:Parameters: struct kvm_vcpu_tsc_scale + +Returns: + + ======= ====================================== + -EFAULT Error reading the provided parameter + address. + -ENXIO Attribute not supported (no TSC scaling) + -EINVAL Invalid request to write the attribute + ======= ====================================== + +This read-only attribute reports the guest's TSC scaling factor, in the form +of a fixed-point number represented by the following structure:: + + struct kvm_vcpu_tsc_scale { + __u64 tsc_ratio; + __u64 tsc_frac_bits; + }; + +The tsc_frac_bits field indicates the location of the fixed point, such that +host TSC values are converted to guest TSC using the formula: + + guest_tsc = ((host_tsc * tsc_ratio) >> tsc_frac_bits) + offset + +Userspace can use this to precisely calculate the guest TSC from the host +TSC at any given moment. This is needed for accurate migration of guests, +as described in the documentation for the KVM_VCPU_TSC_OFFSET attribute. diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h index 5f2b30d0405c..384be9a53395 100644 --- a/arch/x86/include/uapi/asm/kvm.h +++ b/arch/x86/include/uapi/asm/kvm.h @@ -961,6 +961,12 @@ struct kvm_hyperv_eventfd { /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */ #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */ +#define KVM_VCPU_TSC_SCALE 1 /* attribute for TSC scaling factor */ + +struct kvm_vcpu_tsc_scale { + __u64 tsc_ratio; + __u64 tsc_frac_bits; +}; /* x86-specific KVM_EXIT_HYPERCALL flags. */ #define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d1327d5fba3f..2179ea2da8e0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -5930,6 +5930,9 @@ static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu, case KVM_VCPU_TSC_OFFSET: r = 0; break; + case KVM_VCPU_TSC_SCALE: + r = kvm_caps.has_tsc_control ? 0 : -ENXIO; + break; default: r = -ENXIO; } @@ -5950,6 +5953,22 @@ static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu, break; r = 0; break; + case KVM_VCPU_TSC_SCALE: { + struct kvm_vcpu_tsc_scale scale; + + if (!kvm_caps.has_tsc_control) { + r = -ENXIO; + break; + } + + scale.tsc_ratio = vcpu->arch.l1_tsc_scaling_ratio; + scale.tsc_frac_bits = kvm_caps.tsc_scaling_ratio_frac_bits; + r = -EFAULT; + if (copy_to_user(uaddr, &scale, sizeof(scale))) + break; + r = 0; + break; + } default: r = -ENXIO; } @@ -5989,6 +6008,9 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, r = 0; break; } + case KVM_VCPU_TSC_SCALE: + r = -EINVAL; /* Read only */ + break; default: r = -ENXIO; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305124.1577831 (Exim 4.92) (envelope-from ) id 1wLqXh-0008Bw-Lr; Sat, 09 May 2026 22:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305124.1577831; Sat, 09 May 2026 22:53:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXh-00089s-3B; Sat, 09 May 2026 22:53:05 +0000 Received: by outflank-mailman (input) for mailman id 1305124; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007kw-Ga for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-002c5y-Ts; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-56b3-0a2a450a0019-5a9b5cc7b01a-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzK-0NIx; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIf-06oU; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=kOxo26JgkgBnkgpV4u4u6bNS0TzdmD76LNhTnJ/HBkg=; b=S1Qj7ot+NvaVb/ETnLNcOSWLI7 a8uV8eSZQIwsFNUiD0HkK8FYHDMAVTpOBbqWewmXi9iTOyErjosby5Pac1eE/QdywtKg3s1IgXLek HsNyTFM+ykVPLWmEpjCYTbzPzXkWq2gBFRY2VWy5lSXutf/hfKCAX5QZID2vs2Qba7bmYbLFSYdHJ e63CuDfT1qC1GqGhST/XGcE8ayKk2efxCazSVC33178g9UgpHiWeSxDzwAU6HGywcZLQDaNc+JTqO f/VY+Sc/cuha12qsM/abTJXD6y2KRPxWwrDd1pwd3HDISKnYc2g96zWw4BFuGCu9pg1BtxPbgj7Dm WQFH5k/g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 22/30] KVM: x86: Allow KVM master clock mode when TSCs are offset from each other Date: Sat, 9 May 2026 23:46:48 +0100 Message-ID: <20260509224824.3264567-23-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366940-727758B7-C95BCE30/13/0 X-purgate-type: clean X-purgate-size: 4581 From: David Woodhouse There is no reason why the KVM clock cannot be in masterclock mode when the TSCs are not in sync, as long as they are at the same *frequency*. Running at a different frequency would lead to a systemic skew between the clock(s) as observed by different vCPUs due to arithmetic precision in the scaling. So that should indeed force the clock to be based on the host's CLOCK_MONOTONIC_RAW instead of being in masterclock mode where it is defined by the guest TSC. But when the vCPUs merely have a different TSC *offset*, that's not a problem. The offset is applied to that vCPU's kvmclock->tsc_timestamp field, and it all comes out in the wash. Track frequency matching separately from full TSC matching. Use frequency match for master clock eligibility, and full TSC match (including offset) only for PVCLOCK_TSC_STABLE_BIT, which tells the guest it is safe to skip cross-vCPU monotonicity enforcement. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/x86.c | 27 +++++++++++++++++++++------ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index eb81f90284ba..c770c63087cb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1493,6 +1493,7 @@ struct kvm_arch { u64 cur_tsc_offset; u64 cur_tsc_generation; bool all_vcpus_matched_tsc; + bool all_vcpus_matched_freq; int nr_vcpus_matched_tsc; u32 default_tsc_khz; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index b74fd8b088ad..d36d03b8268e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2647,13 +2647,22 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) struct pvclock_gtod_data *gtod = &pvclock_gtod_data; /* - * To use the masterclock, the host clocksource must be based on TSC - * and all vCPUs must have matching TSCs. + * Track whether all vCPUs have matching TSC offsets (for + * PVCLOCK_TSC_STABLE_BIT) and matching frequencies (for + * master clock eligibility). */ ka->all_vcpus_matched_tsc = (ka->nr_vcpus_matched_tsc + 1 == atomic_read(&vcpu->kvm->online_vcpus)); + if (ka->all_vcpus_matched_tsc) + ka->all_vcpus_matched_freq = true; - bool use_master_clock = ka->all_vcpus_matched_tsc && + /* + * To use the masterclock, the host clocksource must be based on TSC + * and all vCPUs must have matching TSC *frequency*. Different offsets + * are fine — each vCPU's pvclock has its own tsc_timestamp that + * accounts for its offset. + */ + bool use_master_clock = ka->all_vcpus_matched_freq && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -2817,7 +2826,13 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, * Track the TSC frequency, scaling ratio, and offset for the current * generation. These are used to detect matching TSC writes and to * compute the guest TSC from the host clock. + * + * If the frequency changed, master clock mode can no longer be used + * since the kvmclock scaling factors differ between vCPUs. */ + if (vcpu->arch.virtual_tsc_khz != kvm->arch.cur_tsc_khz) + kvm->arch.all_vcpus_matched_freq = false; + kvm->arch.cur_tsc_khz = vcpu->arch.virtual_tsc_khz; kvm->arch.cur_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; @@ -3178,7 +3193,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) bool host_tsc_clocksource, vcpus_matched; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = ka->all_vcpus_matched_tsc; + vcpus_matched = ka->all_vcpus_matched_freq; /* * If the host uses TSC clock, then passthrough TSC as stable @@ -3513,7 +3528,7 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* If the host uses TSC clocksource, then it is stable */ hv_clock.flags = 0; - if (use_master_clock) + if (use_master_clock && ka->all_vcpus_matched_tsc) hv_clock.flags |= PVCLOCK_TSC_STABLE_BIT; if (vcpu->pv_time.active) { @@ -6340,7 +6355,7 @@ static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; hv_clock.tsc_to_system_mul = vcpu->pvclock_tsc_mul; - hv_clock.flags = PVCLOCK_TSC_STABLE_BIT; + hv_clock.flags = ka->all_vcpus_matched_tsc ? PVCLOCK_TSC_STABLE_BIT : 0; if (copy_to_user(argp, &hv_clock, sizeof(hv_clock))) return -EFAULT; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305125.1577839 (Exim 4.92) (envelope-from ) id 1wLqXi-0008RV-TA; Sat, 09 May 2026 22:53:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305125.1577839; Sat, 09 May 2026 22:53:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXi-0008OH-AD; Sat, 09 May 2026 22:53:06 +0000 Received: by outflank-mailman (input) for mailman id 1305125; Sat, 09 May 2026 22:53:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007tu-Tc for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXf-008rH7-8W; Sun, 10 May 2026 00:53:03 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffbac3-2eae-0a2a0a5409dd-0a2a450bb858-4 for ; Sun, 10 May 2026 00:53:03 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9de-212f-0a2a450b0019-5a9b5cc7e74a-3 for ; Sun, 10 May 2026 00:49:02 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzJ-0RiQ; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIT-3ti3; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=zXYXQPXLzd2dcTYMg1gTvCK26tkN2cOEOzkWZ733ogk=; b=AEobeMIDugUN7eiHan6hG45ktT R8amBcPRPjDj++/KH0EpUAl64+jTiq4HqRCpFlKNJbg0Of6kv36aIL7EvtIvglcW5i5jGHAErQ/Vc dKqUBmeqrAnIe6LEB2fkB/ovB+UQdK3lXaCR+dnU6korDQshJ5DAdhqpWOyaEv2G77UTRa8f2x22C vKZ63Pm6BoF5585QClj84e8/cDylBglkhaMYVB2KseLvn9zQSkWprSvtDDW1OWTfLa57WKhE62eZM 6HqViX8GtTkrFcAN4TnSazhzMhDCuRlzY/mlo7x8njgH/Krm4SCYrSqNM4P0sypNw9QrDVk8fCKh2 5QfynusA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 19/30] KVM: x86: Improve synchronization in kvm_synchronize_tsc() Date: Sat, 9 May 2026 23:46:45 +0100 Message-ID: <20260509224824.3264567-20-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366942-19165F3B-805BB91F/13/0 X-purgate-type: clean X-purgate-size: 3595 From: David Woodhouse When synchronizing to an existing TSC (either by explicitly writing zero, or the legacy hack where the TSC is written within one second's worth of the previously written TSC), the last_tsc_write and last_tsc_nsec values were being misrecorded by __kvm_synchronize_tsc(). The *unsynchronized* value of the TSC (perhaps even zero) was being recorded, along with the current time at which kvm_synchronize_tsc() was called. This could cause *subsequent* writes to fail to synchronize correctly. Fix that by resetting {data, ns} to the previous values before passing them to __kvm_synchronize_tsc() when synchronization is detected. Except in the case where the TSC is unstable and *has* to be synthesised from the host clock, in which case attempt to create a nsec/tsc pair which is on the correct line. Furthermore, there were *three* different TSC reads used for calculating the "current" time, all slightly different from each other. Fix that by using kvm_get_time_and_clockread() where possible and using the same host_tsc value in all cases. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c9cbebd6a92a..097df58749c3 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -203,6 +203,9 @@ module_param(mitigate_smt_rsb, bool, 0444); * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU * returns to userspace, i.e. the kernel can run with the guest's value. */ +#ifdef CONFIG_X86_64 +static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp); +#endif #define KVM_MAX_NR_USER_RETURN_MSRS 16 struct kvm_user_return_msrs { @@ -2854,14 +2857,22 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) { u64 data = user_value ? *user_value : 0; struct kvm *kvm = vcpu->kvm; - u64 offset, ns, elapsed; + u64 offset, host_tsc, ns, elapsed; unsigned long flags; bool matched = false; bool synchronizing = false; +#ifdef CONFIG_X86_64 + if (!kvm_get_time_and_clockread(&ns, &host_tsc)) +#endif + { + ns = get_kvmclock_base_ns(); + host_tsc = rdtsc(); + } + raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); - offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); - ns = get_kvmclock_base_ns(); + + offset = kvm_compute_l1_tsc_offset(vcpu, host_tsc, data); elapsed = ns - kvm->arch.last_tsc_nsec; if (vcpu->arch.virtual_tsc_khz) { @@ -2904,12 +2915,25 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) */ if (synchronizing && vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) { + /* + * If synchronizing, the "last written" TSC value/time + * recorded by __kvm_synchronize_tsc() should not change + * (i.e. should be precisely the same as the existing + * generation). + */ + data = kvm->arch.last_tsc_write; + if (!kvm_check_tsc_unstable()) { offset = kvm->arch.cur_tsc_offset; + ns = kvm->arch.cur_tsc_nsec; } else { + /* + * ...unless the TSC is unstable and has to be + * synthesised from the host clock in nanoseconds. + */ u64 delta = nsec_to_cycles(vcpu, elapsed); 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Sat, 09 May 2026 23:02:53 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Sun, 10 May 2026 09:02:42 +0300 X-Gm-Features: AVHnY4Liw9b4vVk0zuGrKmULc20ZcK-O_7r4lptAmDphN-WnqIpD3Sa7zwS3D0Y Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1778392974-E0D63CF5-B8D4D1B9/0/0 X-purgate-type: clean X-purgate-size: 6276 On Fri, May 8, 2026 at 1:57=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > >> > >>> + } > >>> + > >>> + off =3D i * sizeof(irqs->icfgr); > >>> + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > >>> + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > >>> + } > >>> + > >>> + /* Make sure all registers are restored and enable distributor *= / > >>> + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); > >>> + > >>> + /* Restore GIC CPU interface configuration */ > >>> + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); > >>> + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); > >>> + > >>> + /* Enable GIC CPU interface */ > >>> + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); > >>> +} > >>> + > >> > >> I also see that we don=E2=80=99t save pending SGIs state (by GICD_CPEN= DSGIRn/GICD_SPENDSGIRn) or Active Priorities registers > >> state (GICC_APRn/GICC_NSAPRn [latter if security extension are there])= as written in [1] =E2=80=9C4.5 Preserving and restoring GIC state=E2=80=9D= , > >> was it intentional? > > > > Yes, this was intentional. > > > > The GICv2 suspend callback is called at a quiescent point in the > > SYSTEM_SUSPEND path: all domains are already shut down for suspend, gue= st > > execution is quiesced, the scheduler is disabled, non-boot CPUs have be= en > > offlined, and CPU0 enters gic_suspend() with local interrupts disabled. > > > > For SGIs, I don't consider GICD_CPENDSGIRn/GICD_SPENDSGIRn part of the = saved > > host GIC context. Xen uses physical SGIs as IPIs, and IPI delivery is a= n > > internal synchronization mechanism, not architectural state that should= be > > replayed after SYSTEM_SUSPEND. Guest SGI state is virtual GIC state and= is not > > represented by these physical GICD SGI pending registers. > > ack, I would maybe mention in the commit message that we exclude transien= t IPI/active-priority > state at the suspend quiescent point. Ack. > > > > > For GICC_APRn/GICC_NSAPRn, those registers describe active priority sta= te for > > interrupts already acknowledged by the CPU interface. The final suspend= path is > > not expected to run with an active physical interrupt context. If those > > registers were non-zero there, restoring only APR/NSAPR would not make = the > > corresponding interrupt handling context valid after resume, and could = instead > > leave the CPU interface with stale active priority state. > > Ok I understand now, but if we are expecting here GICD_ISACTIVERn zeroed,= why are > we saving/restoring it? Shouldn=E2=80=99t we instead have a runtime check= that it=E2=80=99s zero and in case > it=E2=80=99s not bail out? And in the resume path we would only zero it. > > Am I missing something? Good questions. Yes, the distinction I should have made clearer is between CPU-interface active-priority state and distributor active state. For GICC_APRn/GICC_NSAPRn, I expect the state to be quiesced at this point. Those registers track active priorities in the CPU interface. Xen reaches gic_suspend() with local interrupts disabled, and for the guest-routed interrupt case that can leave a distributor active bit behind, Xen has already performed the physical EOI, so the CPU-interface priority has been dropped. There is no CPU-interface active-priority context that we can meaningfully replay after resume. That is different from GICD_ISACTIVERn. In EOImode=3D=3D1, EOIR only drops = the priority. The interrupt remains active in the distributor until the separat= e deactivation step. For a guest-routed interrupt Xen's GICv2 guest end path = does only the physical EOI; deactivation is completed later by the virtual GIC/G= ICV path when the guest completes the interrupt. This is why APR/NSAPR and ISACTIVERn are treated differently. For example: 1. A physical IRQ routed to a guest is acknowledged by Xen. 2. The GIC marks the interrupt active in the distributor. 3. Xen EOIs it, which drops the physical priority. 4. Xen queues/injects the interrupt to the vGIC. 5. The guest has not yet run, or the virtual interrupt is not yet deliver= able because of guest PMR/priority/local IRQ masking/vGIC state. 6. Therefore the guest-side deactivate has not happened yet, and the phys= ical distributor active bit remains set. There is also a late suspend window in the current Xen path: domains are suspended and the scheduler is disabled before local IRQs are disabled. A guest-routed IRQ can therefore be taken by Xen after the guest is already suspended, but before gic_suspend(). Xen can EOI/priority-drop it and queue it for the guest, while the guest cannot run and deactivate it before the GIC state is saved. This is the same class of issue handled by Linux for GIC EOImode=3D=3D1. Li= nux saves/restores the active state because forwarded interrupts can remain act= ive while passed to a VM [1]. So I don't think GICD_ISACTIVERn should be treated as "must be zero" unless= we also add an explicit suspend-abort/quiesce policy for in-flight guest interrupts. That would be a different design: detect non-zero active/in-fli= ght state, unwind suspend, thaw domains, let the guest drain/deactivate the interrupts, and retry later. This series does not implement that policy. Gi= ven the current flow, preserving GICD_ISACTIVERn avoids losing architectural interrupt-controller state across suspend/resume. I am not opposed to such a policy as a follow-up if we want stricter suspen= d quiescence rules, but I think it should be designed explicitly rather than inferred from the GIC save/restore code. Best regards, Mykola [1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/1447701208-= 18150-5-git-send-email-marc.zyngier@arm.com/ > > > > > So I did not add save/restore for GICD_CPENDSGIRn/GICD_SPENDSGIRn or > > GICC_APRn/GICC_NSAPRn in this patch. I can add a short comment in v9 to= make > > this scope explicit. > > > > Please let me know if you think there is a suspend/resume path where th= is > > state still needs to be preserved. > > > > Best regards, > > Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Sun May 10 20:59:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 10 May 2026 20:59:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305593.1577884 (Exim 4.92) (envelope-from ) id 1wMBFI-0005H9-Eb; Sun, 10 May 2026 20:59:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305593.1577884; Sun, 10 May 2026 20:59:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMBFI-0005H2-AY; Sun, 10 May 2026 20:59:28 +0000 Received: by outflank-mailman (input) for mailman id 1305593; Sun, 10 May 2026 20:59:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMBFH-0005FU-9P for xen-devel@lists.xenproject.org; Sun, 10 May 2026 20:59:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMBFG-003wke-Mc; Sun, 10 May 2026 22:59:26 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a00f152-5cb7-0a2a0a5109dd-0a2a450aec3c-34 for ; Sun, 10 May 2026 22:59:25 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a00f1ad-56b3-0a2a450a0019-5a9b322292ea-3 for ; Sun, 10 May 2026 22:59:25 +0200 Received: from 54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBEe-00000007GLM-0IXw; Sun, 10 May 2026 20:58:58 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=xVN4cOYEHLvsvTsrs+Mo4ZF+TKkKL5dKm3kNYJ9llFY=; b=qnSpKJ33qhVTOfzu2g2xy/mOWn WgAnKyKONg75//4h4TDKLqKtbEQC7vadz8Gu58pP3oL3ub0M1GFAwcY9vKlYRq/oc8zuJV92NgJwN f0/3F1kmVCbhl4p3jm+cNSRXnfz7h4ZI6Wro/2ShZlH3AuHcVuiCSkNIe2CWQ44+SFexvzRskAKPJ T4d0cDCMojrcEffGmo1ijQzcCVZZp+YHV9S8qlpFnbGMvSBzPvWGFumv+QOsL2MzlaF3y1cNVq0zR 1YRaRp9pbvZTesm0G9/tAEwB+YZfloUwHm951aEWeSoah+Ey4FFSi/QSgIo8wW8wNsxc+W7c3bUQ0 F7hgqY/A==; Message-ID: <6a820ac041d4d289dba2e78eff815443a036fe0d.camel@infradead.org> Subject: [PATCH v4 31/30] KVM: selftests: Add Xen/generic CPUID timing leaf test From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 21:58:21 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-Baioh5K8VSQI5oIkCRkB" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778446765-7D5868B7-18587396/0/0 X-purgate-type: clean X-purgate-size: 16200 --=-Baioh5K8VSQI5oIkCRkB Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse Verify that userspace can correctly populate Xen and generic CPUID timing leaves using the KVM_VCPU_TSC_EFFECTIVE_FREQ and KVM_VCPU_TSC_SCALE attributes. This validates that the removal of KVM's runtime Xen CPUID modification doesn't break guests: userspace queries the effective TSC and bus frequencies, computes the pvclock mul/shift, populates the CPUID leaves, and the guest verifies the values match. The test exercises: - KVM_VCPU_TSC_EFFECTIVE_FREQ at native and scaled frequencies - KVM_VCPU_TSC_SCALE ratio verification against effective frequency - Generic timing leaf 0x40000010 (EAX=3Dtsc_khz, EBX=3Dbus_khz) - Xen leaf 3 sub-leaf 0 (ECX=3Dguest TSC kHz) - Xen leaf 3 sub-leaf 1 (ECX=3Dmul, EDX=3Dshift) Gracefully skips TSC scaling tests on hardware without support. Signed-off-by: David Woodhouse --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/x86/xen_cpuid_timing_test.c | 232 ++++++++++++++++++ 2 files changed, 233 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index fb935ae3bf38..50f02116249f 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -139,6 +139,7 @@ TEST_GEN_PROGS_x86 +=3D x86/xss_msr_test TEST_GEN_PROGS_x86 +=3D x86/debug_regs TEST_GEN_PROGS_x86 +=3D x86/tsc_msrs_test TEST_GEN_PROGS_x86 +=3D x86/vmx_pmu_caps_test +TEST_GEN_PROGS_x86 +=3D x86/xen_cpuid_timing_test TEST_GEN_PROGS_x86 +=3D x86/xen_shinfo_test TEST_GEN_PROGS_x86 +=3D x86/xen_vmcall_test TEST_GEN_PROGS_x86 +=3D x86/sev_init2_tests diff --git a/tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c b/tool= s/testing/selftests/kvm/x86/xen_cpuid_timing_test.c new file mode 100644 index 000000000000..f574343ed449 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Test that userspace can correctly populate Xen and generic CPUID + * timing leaves using KVM_VCPU_TSC_EFFECTIVE_FREQ. + * + * This validates that the removal of KVM's runtime Xen CPUID modification + * doesn't break guests, because userspace has all the information needed. + */ +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +#define XEN_CPUID_BASE 0x40000100 +#define XEN_CPUID_LEAF(n) (XEN_CPUID_BASE + (n)) +#define GENERIC_TIMING_LEAF 0x40000010 + +/* Values set by host, verified by guest */ +static uint32_t expected_tsc_khz; +static uint32_t expected_bus_khz; +static uint32_t expected_tsc_mul; +static int8_t expected_tsc_shift; +static uint64_t host_khz; + +static void guest_code(void) +{ + uint32_t eax, ebx, ecx, edx; + + /* Check generic timing leaf 0x40000010 */ + __cpuid(GENERIC_TIMING_LEAF, 0, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(eax, expected_tsc_khz); + GUEST_ASSERT_EQ(ebx, expected_bus_khz); + + /* Check Xen leaf 3, sub-leaf 0: ECX =3D guest TSC frequency */ + __cpuid(XEN_CPUID_LEAF(3), 0, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(ecx, expected_tsc_khz); + + /* Check Xen leaf 3, sub-leaf 1: ECX =3D mul, EDX =3D shift */ + __cpuid(XEN_CPUID_LEAF(3), 1, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(ecx, expected_tsc_mul); + GUEST_ASSERT_EQ((int8_t)edx, expected_tsc_shift); + + GUEST_SYNC(0); +} + +static void add_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function, + uint32_t index, uint32_t eax, uint32_t ebx, + uint32_t ecx, uint32_t edx) +{ + struct kvm_cpuid2 *cpuid =3D vcpu->cpuid; + struct kvm_cpuid_entry2 *entry; + int n =3D cpuid->nent; + + vcpu->cpuid =3D realloc(vcpu->cpuid, + sizeof(*cpuid) + (n + 1) * sizeof(*entry)); + cpuid =3D vcpu->cpuid; + cpuid->nent =3D n + 1; + + entry =3D &cpuid->entries[n]; + memset(entry, 0, sizeof(*entry)); + entry->function =3D function; + entry->index =3D index; + entry->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + entry->eax =3D eax; + entry->ebx =3D ebx; + entry->ecx =3D ecx; + entry->edx =3D edx; +} + +/* + * Compute pvclock mul/shift from frequency, matching kvm_get_time_scale()= . + */ +static void compute_tsc_mul_shift(uint64_t tsc_hz, uint32_t *mul, int8_t *= shift) +{ + uint64_t scaled =3D 1000000000ULL; + uint64_t base =3D tsc_hz; + int32_t s =3D 0; + uint32_t base32; + + while (base > scaled * 2 || base >> 32) { + base >>=3D 1; + s--; + } + base32 =3D (uint32_t)base; + while (base32 <=3D scaled || scaled >> 32) { + if (scaled >> 32 || base32 & (1U << 31)) + scaled >>=3D 1; + else + base32 <<=3D 1; + s++; + } + *mul =3D (uint32_t)((scaled << 32) / base32); + *shift =3D (int8_t)s; +} + +static void run_test(uint64_t tsc_khz) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct ucall uc; + struct { uint32_t tsc_khz; uint32_t bus_khz; } freq; + struct kvm_device_attr freq_attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 2, /* KVM_VCPU_TSC_EFFECTIVE_FREQ */ + .addr =3D (uint64_t)(uintptr_t)&freq, + }; + + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); + + if (tsc_khz) { + pr_info("Testing at TSC frequency %lu kHz\n", tsc_khz); + vcpu_ioctl(vcpu, KVM_SET_TSC_KHZ, (void *)(unsigned long)tsc_khz); + } else { + pr_info("Testing at native TSC frequency\n"); + } + + vcpu_ioctl(vcpu, KVM_GET_DEVICE_ATTR, &freq_attr); + + /* If scaling wasn't applied, skip this frequency */ + if (tsc_khz && freq.tsc_khz =3D=3D host_khz) { + pr_info(" TSC scaling not available, skipping\n"); + kvm_vm_release(vm); + return; + } + + pr_info(" Effective TSC: %u kHz, Bus: %u kHz\n", freq.tsc_khz, freq.bus_= khz); + + /* Also exercise KVM_VCPU_TSC_SCALE if available */ + { + struct { uint64_t ratio; uint64_t frac_bits; } scale; + struct kvm_device_attr scale_attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 1, /* KVM_VCPU_TSC_SCALE */ + .addr =3D (uint64_t)(uintptr_t)&scale, + }; + + if (!__vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &scale_attr)) { + vcpu_ioctl(vcpu, KVM_GET_DEVICE_ATTR, &scale_attr); + pr_info(" TSC scale: ratio=3D%lu frac_bits=3D%lu\n", + scale.ratio, scale.frac_bits); + + /* + * Verify: applying the ratio to the host TSC frequency + * should give approximately the effective frequency. + */ + if (tsc_khz) { + uint64_t computed =3D ((__uint128_t)host_khz * scale.ratio) >> scale.f= rac_bits; + int64_t diff =3D (int64_t)computed - (int64_t)freq.tsc_khz; + + TEST_ASSERT(diff >=3D -1 && diff <=3D 1, + "TSC_SCALE ratio mismatch: computed %lu vs effective %u (diff %ld= )", + computed, freq.tsc_khz, diff); + } + } + } + + compute_tsc_mul_shift((uint64_t)freq.tsc_khz * 1000, + &expected_tsc_mul, &expected_tsc_shift); + + expected_tsc_khz =3D freq.tsc_khz; + expected_bus_khz =3D freq.bus_khz; + + sync_global_to_guest(vm, expected_tsc_khz); + sync_global_to_guest(vm, expected_bus_khz); + sync_global_to_guest(vm, expected_tsc_mul); + sync_global_to_guest(vm, expected_tsc_shift); + + /* Populate CPUID leaves as a VMM would */ + add_cpuid_entry(vcpu, GENERIC_TIMING_LEAF, 0, + freq.tsc_khz, freq.bus_khz, 0, 0); + add_cpuid_entry(vcpu, XEN_CPUID_LEAF(3), 0, + 0, 0, freq.tsc_khz, 0); + add_cpuid_entry(vcpu, XEN_CPUID_LEAF(3), 1, + 0, 0, expected_tsc_mul, + (uint32_t)(uint8_t)expected_tsc_shift); + + vcpu_set_cpuid(vcpu); + + pr_info(" pvclock mul=3D%u shift=3D%d\n", expected_tsc_mul, expected_tsc= _shift); + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } + + kvm_vm_release(vm); +} + +int main(void) +{ + uint64_t freq; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct kvm_device_attr attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 2, + }; + + TEST_REQUIRE(sys_clocksource_is_based_on_tsc()); + + /* Check KVM_VCPU_TSC_EFFECTIVE_FREQ is supported */ + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); + TEST_REQUIRE(!__vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &attr)); + host_khz =3D __vcpu_ioctl(vcpu, KVM_GET_TSC_KHZ, NULL); + kvm_vm_release(vm); + + /* Native frequency */ + run_test(0); + + /* Scaled frequencies =E2=80=94 skip if TSC scaling not available */ + for (freq =3D 1000000; freq <=3D 4000000; freq +=3D 1000000) { + if (freq =3D=3D host_khz) + continue; + run_test(freq); + } + + pr_info("PASS: All CPUID timing leaf tests passed\n"); + return 0; +} --=20 2.43.0 --=-Baioh5K8VSQI5oIkCRkB Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT 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for ; Sun, 10 May 2026 22:59:04 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a00f197-229c-0a2a45070019-5a9b3222df74-3 for ; Sun, 10 May 2026 22:59:04 +0200 Received: from 54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBER-00000007GKB-3RrH; Sun, 10 May 2026 20:58:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2fh66ArsKe8U1Q1vazOhgHC7ZL/RSaZ7Onoha+m5hJY=; b=vgVEtbex1j5sE2mCcKtcKlE90c nPwt7nAiy4w+dbfimkczHzK87JFH4kM4KgZjrdWnOLksjWypfG3VOs67WLsDD8y03Qqi0InQ2OtXC WYZXB/uvdNqa016XglX2VV6uCC+d7mD0aGi2i+5qfchaeHrFdf3sty4Lsrompyku6pTWNTcvjbBA6 vihKszwBl4Nffc6cDeaKKXKEBO+wjUBJltWD5cvYUZtDGAAQUqK1UtUUNUWfxZBhQojEcmQ/90YKn QoO8kKJeV0kpegy7ENLQBcdbTpTH2LoKfQiCkFZBbchm6mcPDsPNSw83iPAmkMo3HqEc0TBTVKeya FAE5luUA==; Message-ID: <0c199440c2cfd56a4c8e451134c6a0b1137507d6.camel@infradead.org> Subject: [PATCH v4 33/30] KVM: selftests: Add Xen runstate migration test From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 21:56:35 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-SFVUe3tfsnRVPe9dwb/j" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778446744-0B175C48-6EC8CD65/0/0 X-purgate-type: clean X-purgate-size: 15302 --=-SFVUe3tfsnRVPe9dwb/j Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse Test that Xen runstate (steal time) is correctly accounted across a simulated live migration using KVM_XEN_VCPU_ATTR and KVM_[GS]ET_CLOCK_GUEST= . The test simulates what a real VMM does during migration: 1. Creates a VM with Xen HVM config and runstate tracking 2. Runs the guest to accumulate some kvmclock time 3. Saves clock (KVM_GET_CLOCK_GUEST), TSC offset, and runstate 4. Marks the saved state as RUNSTATE_runnable (vCPU not running) 5. Destroys the source VM 6. Sleeps 10ms (simulating migration network transfer time) 7. Creates a new VM and restores all state precisely as saved 8. Runs the guest and verifies the migration gap appears as steal The kernel accounts the gap because: on vcpu_load, it transitions from RUNSTATE_runnable to RUNSTATE_running, computing delta =3D kvmclock_now - state_entry_time. Since kvmclock has advanced past the saved entry time (real time elapsed during migration), the delta is added to time_runnable. Signed-off-by: David Woodhouse --- .../selftests/kvm/x86/xen_migration_test.c | 194 ++++++++++++++++++ 1 file changed, 194 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/xen_migration_test.c diff --git a/tools/testing/selftests/kvm/x86/xen_migration_test.c b/tools/t= esting/selftests/kvm/x86/xen_migration_test.c new file mode 100644 index 000000000000..37e8ace00611 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/xen_migration_test.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Test Xen runstate (steal time) preservation across simulated migration. + * + * Verifies that the kernel correctly accounts the migration gap as + * steal time (runnable) when runstate data is saved and restored + * precisely, but real time elapses during the migration. + * + * The key insight: userspace saves the runstate with state=3DRUNSTATE_run= nable + * (the vCPU is not running during migration). On restore, the kernel sees + * that kvmclock has advanced past state_entry_time, and accounts the + * difference as time spent in the runnable state. + */ +#include +#include +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +#define SHINFO_GPA 0xc0000000ULL +#define RUNSTATE_GPA (SHINFO_GPA + 0x1000) + +#define RUNSTATE_running 0 +#define RUNSTATE_runnable 1 +#define RUNSTATE_blocked 2 +#define RUNSTATE_offline 3 + +struct vcpu_runstate_info { + uint32_t state; + uint64_t state_entry_time; + uint64_t time[4]; +} __attribute__((packed)); + +static void guest_code(void) +{ + volatile struct vcpu_runstate_info *rs =3D + (void *)(unsigned long)RUNSTATE_GPA; + + /* Report runstate times =E2=80=94 no need to enable kvmclock MSR, + * the kernel writes runstate using its internal kvmclock. */ + GUEST_SYNC_ARGS(0, rs->time[RUNSTATE_runnable], + rs->time[RUNSTATE_running], 0, 0); +} + +static struct kvm_vm *create_xen_vm(struct kvm_vcpu **vcpu) +{ + struct kvm_vm *vm; + int xen_caps; + + vm =3D vm_create_with_one_vcpu(vcpu, guest_code); + + xen_caps =3D kvm_check_cap(KVM_CAP_XEN_HVM); + TEST_REQUIRE(xen_caps & KVM_XEN_HVM_CONFIG_SHARED_INFO); + TEST_REQUIRE(xen_caps & KVM_XEN_HVM_CONFIG_RUNSTATE); + + /* Map pages */ + vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, + SHINFO_GPA, 1, 2, 0); + virt_map(vm, SHINFO_GPA, SHINFO_GPA, 2); + + /* Enable Xen HVM with MSR interception (enables runstate tracking) */ + struct kvm_xen_hvm_config cfg =3D { + .flags =3D KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL, + .msr =3D 0x40000000, + }; + vm_ioctl(vm, KVM_XEN_HVM_CONFIG, &cfg); + + /* Set shared_info */ + struct kvm_xen_hvm_attr ha =3D { + .type =3D KVM_XEN_ATTR_TYPE_SHARED_INFO, + .u.shared_info.gfn =3D SHINFO_GPA >> 12, + }; + vm_ioctl(vm, KVM_XEN_HVM_SET_ATTR, &ha); + + /* Set runstate address */ + struct kvm_xen_vcpu_attr rs_addr =3D { + .type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR, + .u.gpa =3D RUNSTATE_GPA, + }; + vcpu_ioctl(*vcpu, KVM_XEN_VCPU_SET_ATTR, &rs_addr); + + return vm; +} + +int main(void) +{ + struct pvclock_vcpu_time_info pvti; + struct kvm_xen_vcpu_attr runstate_save; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct ucall uc; + uint64_t tsc_offset; + int ret; + + /* =3D=3D=3D SOURCE SIDE =3D=3D=3D */ + pr_info("=3D=3D=3D Source: create VM and run guest =3D=3D=3D\n"); + vm =3D create_xen_vm(&vcpu); + + /* Run guest once to accumulate some runstate time */ + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + TEST_ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC); + + pr_info(" Guest sees: runnable=3D%" PRIu64 " running=3D%" PRIu64 "\n", + uc.args[2], uc.args[3]); + + /* Save clock state */ + ret =3D __vcpu_ioctl(vcpu, KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(!ret, "KVM_GET_CLOCK_GUEST failed"); + + /* Save TSC offset */ + tsc_offset =3D vcpu_get_msr(vcpu, MSR_IA32_TSC_ADJUST); + + /* Save runstate =E2=80=94 the vCPU is now "runnable" (not running) */ + runstate_save.type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA; + vcpu_ioctl(vcpu, KVM_XEN_VCPU_GET_ATTR, &runstate_save); + + /* + * Transition to runnable state before saving =E2=80=94 the vCPU is + * not running during migration. + */ + runstate_save.u.runstate.state =3D RUNSTATE_runnable; + + pr_info(" Saved runstate: running=3D%" PRIu64 " runnable=3D%" PRIu64 + " entry=3D%" PRIu64 "\n", + (uint64_t)runstate_save.u.runstate.time_running, + (uint64_t)runstate_save.u.runstate.time_runnable, + (uint64_t)runstate_save.u.runstate.state_entry_time); + + uint64_t saved_runnable =3D runstate_save.u.runstate.time_runnable; + + kvm_vm_release(vm); + + /* =3D=3D=3D MIGRATION GAP =3D=3D=3D */ + pr_info("=3D=3D=3D Simulating migration (sleeping 10ms) =3D=3D=3D\n"); + usleep(10000); + + /* =3D=3D=3D DESTINATION SIDE =3D=3D=3D */ + pr_info("=3D=3D=3D Destination: create new VM and restore =3D=3D=3D\n"); + vm =3D create_xen_vm(&vcpu); + + /* Restore TSC offset */ + vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, tsc_offset); + + /* Restore clock =E2=80=94 kvmclock will now be ~10ms ahead of the snapsh= ot */ + vcpu_ioctl(vcpu, KVM_SET_CLOCK_GUEST, &pvti); + + /* Restore runstate exactly as saved (state=3Drunnable) */ + runstate_save.type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA; + ret =3D __vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &runstate_save); + TEST_ASSERT(!ret, "Restore runstate failed: errno %d", errno); + + /* + * Run the guest. When the vCPU enters vcpu_run, the kernel + * transitions from RUNSTATE_runnable to RUNSTATE_running. + * It computes: delta =3D kvmclock_now - state_entry_time + * This delta (which includes the migration gap) is added to + * time_runnable (steal time). + */ + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + TEST_ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC); + + uint64_t guest_runnable =3D uc.args[2]; + uint64_t guest_running =3D uc.args[3]; + + pr_info(" Guest sees: runnable=3D%" PRIu64 " running=3D%" PRIu64 "\n", + guest_runnable, guest_running); + + uint64_t steal_increase =3D guest_runnable - saved_runnable; + pr_info(" Steal time increase: %" PRIu64 " ns (migration gap)\n", + steal_increase); + + /* + * The steal time increase should be at least 10ms (the sleep) + * but not more than 5s (allowing for VM creation overhead). + * The actual gap is from the source's state_entry_time to the + * destination's kvmclock "now" at vcpu_load time. + */ + TEST_ASSERT(steal_increase >=3D 10000000ULL && + steal_increase < 5000000000ULL, + "Steal time increase %" PRIu64 " ns not in expected range " + "[10ms, 5s]", steal_increase); + + kvm_vm_release(vm); + pr_info("PASS: Migration gap correctly accounted as steal time\n"); + return 0; +} --=20 2.43.0 --=-SFVUe3tfsnRVPe9dwb/j Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj 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54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBLA-00000007GmD-1vIF; Sun, 10 May 2026 21:05:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=bhNOFvkH719t7i9pQvqgD9PQhJFs6ir/zUj3G3rKD18=; b=k3gDaT7vBcXRudpVf2JczbIT1q 5afuzuA0DX9RyNuKWPIbcFfMzM95N5bcyy38ZIevIkLL9zY4zLoghfyqt5mCgw8RfARtFladk4DRS mhEmCZR0wnj1sMkVgMRew2bzKtPMcrFIMBGzMRto5CiJui/yonAWitgBo7DXOG5JF9RIu1i377M2A pgfSLhdq3rJcC+kwSrgxUxqx9iVfay9FgtA+vIZz0+eZTBiF3uABfmOlRptJ3ez23N83pSvwwqWSb icd8XPttOeADBiZBrMnnQzrvU7QGpB/zx9+imXaF4rhTGXJghLDrx3sI7cbaAI/Qvr8bngLVEixRy 87Plb/WQ==; Message-ID: <66458bbc44f98b7f9742007348a9f70ee8086429.camel@infradead.org> Subject: [PATCH v4 32/30] KVM: x86: Re-synchronize TSC after KVM_SET_TSC_KHZ From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 22:05:31 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-n1rYoFphXBZk9zIVxw0J" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778447153-28479C48-A21FFE83/0/0 X-purgate-type: clean X-purgate-size: 9332 --=-n1rYoFphXBZk9zIVxw0J Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse KVM_SET_TSC_KHZ changes the vCPU's TSC scaling ratio but does not update the VM-wide cur_tsc_scaling_ratio used by get_kvmclock(). This causes get_kvmclock() to use a stale (default 1:1) ratio when computing the KVM clock, leading to drift between the host-side kvmclock and what the guest observes. Fix this by calling kvm_synchronize_tsc() after changing the TSC frequency. This: - Updates cur_tsc_scaling_ratio (consumed by pvclock_update_vm_gtod_copy) - Ensures the TSC value is continuous across the frequency change - Triggers kvm_track_tsc_matching() for proper masterclock handling - Allows subsequent vCPUs to synchronize via the 1-second slop hack Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ac982652e5e0..833a4f119e22 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -206,6 +206,7 @@ module_param(mitigate_smt_rsb, bool, 0444); #ifdef CONFIG_X86_64 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)= ; #endif +static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value); #define KVM_MAX_NR_USER_RETURN_MSRS 16 =20 struct kvm_user_return_msrs { @@ -2611,7 +2612,20 @@ static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u3= 2 user_tsc_khz) user_tsc_khz, thresh_lo, thresh_hi); use_scaling =3D 1; } - return set_tsc_khz(vcpu, user_tsc_khz, use_scaling); + if (set_tsc_khz(vcpu, user_tsc_khz, use_scaling)) + return -1; + + /* + * Re-synchronize the TSC after changing frequency. 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+0200 Roger Pau Monn=C3=A9 wrote: > >> + pci_writel(devfn, 0x40, ACPI_PM1A_EVT_BLK_ADDRESS_V1 | 1); >> + pci_writeb(devfn, 0x44, 0x80); /* enable PM io space */ >> + outl(SCI_EN_IOPORT, inl(SCI_EN_IOPORT) | GBL_SMI_EN | APMC_EN); > >Most of the above looks like black magic. It's not like the context >of this function is great, most of the existing stuff is poorly >documented. Can we get a bit more comments about what's this supposed >to do, and maybe a reference to the Intel specification that lists >where those PCI config space registers are coming from? This is a precondition for the (later) switch to ACPI. First, we set the ACPI I/O registers base - it can be absolutely arbitrary but we choose the same value that was used before for PIIX4 - ACPI_PM1A_EVT_BLK_ADDRESS_V1. The "| 1" part is likely NOT necessary and should be removed unless QEMU has a bug with its handling - according to Intel datasheet, bit0 is "Hardwired to 1 to indicate I/O space", no need to set it explicitly. At this point we can use ACPI I/O register block at ACPI_PM1A_EVT_BLK_ADDRESS_V1. We are only interested in one register from this range - at offset +30h. SCI_EN_IOPORT is a wrong name actually, it should be renamed to SMI_EN_IOPORT. Finally, the line "outl(SCI_EN_IOPORT, inl(SCI_EN_IOPORT) | GBL_SMI_EN | APMC_EN)" enables SMI generation - we will use it later to perform a classic APM -> ACPI switch via a write to the APM_CNT (0B2h) register to trigger an SW SMI, followed by validating SCI_EN=3D1 to confirm the successful switch. Basically, all this setup is just a preparation for the step done in the next patch - "hvmloader: add ACPI enabling for Q35". What I don't remember is who was actually responsible for actual ACPI enabling - either QEMU or firmware. On real systems it is a bit more complicated - the APM -> ACPI switch is done by an ACPI-aware OS itself (OSPM, how they call it). The OS extracts information from ACPI tables and use it to find out what and where to write in order to switch to ACPI. Under the hood it's still a special value written to the SW SMI register, triggering a SMI handler in the firmware. The actual hand-off to ACPI was done by the SMI handler, including switching the PM interrupt from SMI to ACPI's SCI. I'm not sure why hvmloader does this switch early instead. But at least this APM -> ACPI switch flow matches the older (PIIX4) one. Perhaps this is how it was handled by QEMU. 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pr=C Message-ID: Date: Mon, 11 May 2026 08:16:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-2-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468A:EE_|SJ5PPF4D350AC80:EE_ X-MS-Office365-Filtering-Correlation-Id: 7b3daa51-a50f-438a-1005-08deaf24e7b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700016|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PzD+cxI9Vgws0aogubZQWwvV+NhUTySfMr8pNfvcqPcLS37QXpIr/D+qjwaG3Fhh/3D6raN2+NeH8BXKXK741IbyE//pj2tuA81tRzSUtpqexjnXFHLcPgq9N+MFRcr5WixLZn6qcjEpGIsA7mwR3HajTM4oQlzUT3ZeaoNnLizQ3VL7nwbvSLkh2olbcdAOzwTmwpnRdYEIlrWM9R6GHbhNwyBzsETUM9Ih0LqqftB2+kcRYGkbUhy6x4T4y0UyyZMKyNrhw/kooh9iPkyAJ3kRzi4innXqX86DhECaoGrqIKuQQEcqAve9h867fx9T0fHUal+Dbx2lEzyyG60c/J90wnyP1AtIIIxBZ8J59o6wpl7WevBF1XI1Bz0G21PnS9DhpumO48XrDZmPRibfUCw4zdJL8phZFYk8bIa0P/ufQsuNjuJsipblf1Ufz8Nq X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:16:57.3853 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b3daa51-a50f-438a-1005-08deaf24e7b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF4D350AC80 X-purgate-ID: tlsNG-33051d/1778480223-38B74938-F545CCBE/0/0 X-purgate-type: clean X-purgate-size: 3134 On 08-May-26 23:29, Andrew Cooper wrote: > The binaries/ directory is a composition from the artefacts, and also used as > a working directory for most of the tests. If the very first artefact is from > a root container, then the test must also be a root container to use it as a > working directory. > > For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the > microcode-x86 artefact as it's the smallest available. This bodge can be > removed when all build containers have become non-root. > > For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs > ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate > the *-export dependency. > > This will allow us to change containers to being non-root one at a time, > rather than all in one go. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Stefano Stabellini > CC: Michal Orzel > CC: Doug Goldstein > > We should also stop using binaries/ as a working directory for the tests, but > that gets very complicated very quickly and I don't have time to do it at this > juncture. > --- > automation/gitlab-ci/test.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index 8770c523e228..517af1732437 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -15,6 +15,12 @@ > - qemu-system-aarch64-6.0.0-arm64-export > > .arm32-test-needs: &arm32-test-needs > + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes > + # from a non-root container, and microcode-x86 is the smallest. Remove when > + # all build containers have become non-root. > + - project: $ARTIFACTS_REPO > + job: microcode-x86 > + ref: $ARTIFACTS_BRANCH I don't see it being removed in this series even though the containers are non-root. > - qemu-system-aarch64-6.0.0-arm32-export > > .x86-64-test-needs: &x86-64-test-needs > @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: > script: > - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} > needs: > + - *arm64-test-needs This also pulls in Linux image and rootfs which XTF tests don't need. I think it's much better for a test to list the actual list of its dependencies. Otherwise you are asking user/developer to dig into the yaml. ~Michal > - alpine-3.18-gcc-arm64 > - - qemu-system-aarch64-6.0.0-arm64-export > > qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: > extends: .qemu-arm64 > script: > - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} > needs: > + - *arm64-test-needs > - alpine-3.18-gcc-debug-arm64 > - - qemu-system-aarch64-6.0.0-arm64-export > > qemu-smoke-dom0-arm32-gcc: > extends: .qemu-arm32 From xen-devel-bounces@lists.xenproject.org Mon May 11 06:20:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:20:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305769.1577920 (Exim 4.92) (envelope-from ) id 1wMK0F-0001Ox-79; Mon, 11 May 2026 06:20:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305769.1577920; Mon, 11 May 2026 06:20:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMK0F-0001Oq-3e; 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bh=jdM50mrh+pLYS3OuhZx93MxruQNAV7za+f+2dsNIGHI=; b=DuhJUDGTUT0ApIGE104cq5qXHSMeZHIiXOEdLvlJqBtu3R3VM7p2qom3w6WOyMCxtPr3QOXJQgpKC8Wscut66m5S8zARHxyuXjVGzXCVMWAGxqWqpKE5bQJpqzYZkB/5QRwnTncp7Yr242v8cUlqHiPE5WTnhgjr75FRsSxPOTs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 08:20:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] CI: Refresh the Debian 12 arm32 cross compile container To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-3-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-3-andrew.cooper3@citrix.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7veMQPN66XqAvkyGCc5+jfHd8yIhGKAnc2BEY6bzTBt7whu3M9ynyUaGQnjGGX/RZtkSn+6iYqi5TxEnRodYGc8VV913ORSNEe0o9dUAupbKvk2zPufMZwhjda1yNnO7NUanjY5wtL6SxlYh1qMqdL7Xsqg2HuL7IiKn1E4PjEyPjptR/MV+xFFSy/bsAi1k1EztB+THr20LwER8hEGtLvr6xeaZDy7ZlWUQC1H1Ff8iURE591YouJpV8EVOJwhLf0bEsXKsB3CaJ0a3dPd3RpizWIUMhmj9is3HRDqYEzmeA3P5dvGzLZC1Rh7jqn0I+mLgIWE6Zy7MLPoNrRbCcSXqkzuKWqE0jTQMubcnLBNPaPH0NbARctzaoaAeSgxEGebYFjQdy/SozShPG4NfYAqdwKvU/k4YCZzm2lEWHl0QsHE63DXWQY5Qgdx+C3/P X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:20:19.9290 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a00b48ea-851d-425e-db29-08deaf25606e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A108.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5792 X-purgate-ID: tlsNG-42698a/1778480428-22589F3B-5C8879EC/0/0 X-purgate-type: clean X-purgate-size: 702 On 08-May-26 23:29, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to user heredocs for readability, derive from > bookworm-slim and use apt-get --no-install-recommends to keep the size down. > > Convert it to being a non-root container. Add checkpolicy as FLASK is an > available build option for arm32 under Randconfig testing. > > Rename the CI jobs to debian-12-arm32-* to follow the naming scheme of all the > other CI jobs. > > No functional change. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 06:23:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:23:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305779.1577928 (Exim 4.92) (envelope-from ) id 1wMK34-0001wo-M4; Mon, 11 May 2026 06:23:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305779.1577928; Mon, 11 May 2026 06:23:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMK34-0001wh-JM; Mon, 11 May 2026 06:23:26 +0000 Received: by outflank-mailman (input) for mailman id 1305779; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QyIkAxWO9gXLOjkyKCkHKMq5ldkNVKefUdOFpaMpMkmG9ZbIo6rSCQlhkn11GEpHDji/OSUeNFcVuHcDcoZ/j1+Lt4mp5laUM/iK2nO9PqBZWqzJwIrlBCrZQBlzLgHJ44ch0RcGyv15xy0G7sGYT8Qy8tiZnUT5qiQkmwQtPS3z+Z9kzgFJHvNgSQFYipzVcRElwQgrW6sk9TlYD78gJgq/JuCgLUJ1iks+jBEdCKYyvy1QzyI5wz23N8DpeLgMV22dWRfB0kCr7a2/H+MHsdp/STAl5rB0VN2i68gG66eBJHDSxh9N8D9ezy9YoybP/qg35NimlAzFHj8xuE9gQ0aDx/NQu98/EXUYN+VDjLamBYkEk9zJ7gMoDRLrObVD5tgpC2f+cPLiLp5xesRAsX+P8f+wgUimi0vp4nJpNDt0NsJDwhpWLaT4uWn5PZ96 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:23:18.0046 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ceb89621-e260-4f2c-f0be-08deaf25ca91 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029928.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPFABD533732 X-purgate-ID: tlsNG-33051d/1778480603-4279C938-8FA99089/0/0 X-purgate-type: clean X-purgate-size: 1030 On 08-May-26 23:29, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to user heredocs for readability, derive from > bookworm-slim and use apt-get --no-install-recommends to keep the size down. > > Additionally: > > * Make it a non-root container. > * Drop libext2fs-dev which is an x86-only dependency. > * Add libncurses5-dev for xentop and zlib1g-dev which was missing from the > libxenguest decompressors. > * As there's no ninja, the container can no loger build QEMU so drop > libglib2.0-dev and libpixman-1-dev too. > * Swap libyajl-dev for libjson-c-dev given the latters deprecation. > > Rename the job to debian-12-arm64-* to follow the naming scheme of all the > other CI jobs. > > This reduces the size of the debian:12-arm64v8 from 2.25GB down to 1.62GB. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 06:29:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:29:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305788.1577938 (Exim 4.92) (envelope-from ) id 1wMK8l-0002iC-9B; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zCpjqdGGJUEu4icy4WvLx0ZK09CB6WBsMeGTeh5WXIw3zZZHa/PivVXMkpQOstvK8ZgmS4O3cxA8Yit+SUV4VjUBjfImYIC8NLt5xTrLf0NCdK4iaBiPYrKKPG86d8T5ts7+BrAg+0ayMjmAvsmty2Z2W8e5T/QtDTlS/kPVZ7IJEK4+xPB+gVE6VJHv4aR6UNa1Dqdv57g58jsoPbrQsKZB7/KtibJyRKjGNXGpCRdRD9Ws2uoAxJZQQA4RRredBX3GqP5TwanF4oj7MaaX4YTOleRNMTTqoFVLWd8FjymEurlhQBRs3VTNEx3l8XcgvIPZARxraxSYomxCdDg+iE3lJAnLXvb9zXTs3x6iBCLKTr0KjwcjXjLipOG7RGPYUKOBep5/IOB1trYPDjGwVzt/j+AFgYSMmu5Hqq2SQIpl5x4z2ea61d93Eei4Mjrk X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:29:09.7036 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77f5967f-4a23-4354-d775-08deaf269c3a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4116 X-purgate-ID: tlsNG-720697/1778480956-A9971161-D022E69A/10/63158204843 X-purgate-type: spam X-purgate-size: 4664 On 08-May-26 23:29, Andrew Cooper wrote: > Exactly as per the Bookworm container, but additionally with the ipxe-qemu and > qemu-system-aarch64 packages. These will be used to remove the export jobs. > > Switch qemu-arm{32,64} jobs to use this container. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Stefano Stabellini > CC: Michal Orzel > CC: Doug Goldstein > > We should probably wire up some build tests too, but it's too late on a Friday > for me to be thinking about that for this posting. > --- > automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ > automation/gitlab-ci/test.yaml | 4 +- > automation/scripts/containerize | 1 + > 3 files changed, 74 insertions(+), 2 deletions(-) > create mode 100644 automation/build/debian/13-arm64v8.dockerfile > > diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile > new file mode 100644 > index 000000000000..b9062ee8b443 > --- /dev/null > +++ b/automation/build/debian/13-arm64v8.dockerfile > @@ -0,0 +1,71 @@ > +# syntax=docker/dockerfile:1 > +FROM --platform=linux/arm64/v8 debian:trixie-slim > +LABEL maintainer.name="The Xen Project" > +LABEL maintainer.email="xen-devel@lists.xenproject.org" > + > +ENV DEBIAN_FRONTEND=noninteractive > + > +RUN < +#!/bin/bash > + set -eu > + > + useradd --create-home user > + > + apt-get update > + > + DEPS=( > + # Xen > + bison > + build-essential > + checkpolicy > + flex > + > + # Tools (general) > + ca-certificates > + cpio > + git-core > + pkg-config > + wget > + # libxenguest dombuilder > + libbz2-dev > + liblzma-dev > + liblzo2-dev > + libzstd-dev > + zlib1g-dev > + # libacpi > + acpica-tools > + # libxl > + libfdt-dev > + libjson-c-dev > + uuid-dev > + # xentop > + libncurses5-dev > + # Python bindings > + python3-dev > + python3-setuptools > + # Golang bindings > + golang-go > + # Ocaml bindings/oxenstored > + ocaml-nox > + ocaml-findlib Since this is a container used only for tests, why listing packages required for Xen and tools build? > + > + # for test phase, qemu-* jobs > + busybox-static > + curl > + device-tree-compiler > + expect > + file > + ipxe-qemu > + ovmf > + qemu-system-aarch64 > + u-boot-qemu > + u-boot-tools So after this change, even though you replace debian-12 with debian-13 for all the tests, the debian-12 still contains the unneeded packages (i.e. for a test phase that it no longer runs). ~Michal > + ) > + > + apt-get -y --no-install-recommends install "${DEPS[@]}" > + > + rm -rf /var/lib/apt/lists* > +EOF > + > +USER user > +WORKDIR /build > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index 982fd86db079..008deef98d1e 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -37,7 +37,7 @@ > .qemu-arm64: > extends: .test-jobs-common > variables: > - CONTAINER: debian:12-arm64v8 > + CONTAINER: debian:13-arm64v8 > LOGFILE: qemu-smoke-arm64.log > artifacts: > paths: > @@ -50,7 +50,7 @@ > .qemu-arm32: > extends: .test-jobs-common > variables: > - CONTAINER: debian:12-arm64v8 > + CONTAINER: debian:13-arm64v8 > LOGFILE: qemu-smoke-arm32.log > artifacts: > paths: > diff --git a/automation/scripts/containerize b/automation/scripts/containerize > index bda06054ebde..8bd2a847aac0 100755 > --- a/automation/scripts/containerize > +++ b/automation/scripts/containerize > @@ -41,6 +41,7 @@ case "_${CONTAINER}" in > _bookworm-arm64v8-arm32) CONTAINER="${BASE}/debian:12-arm64v8-arm32" ;; > _bookworm-arm64v8) CONTAINER="${BASE}/debian:12-arm64v8" ;; > _bookworm-cppcheck) CONTAINER="${BASE}/debian:12-arm64v8-cppcheck" ;; > + _trixie-arm64v8) CONTAINER="${BASE}/debian:13-arm64v8" ;; > _opensuse-leap|_leap) CONTAINER="${BASE}/opensuse:leap-15.6-x86_64" ;; > _opensuse-tumbleweed|_tumbleweed) CONTAINER="${BASE}/opensuse:tumbleweed-x86_64" ;; > _xenial) CONTAINER="${BASE}/ubuntu:16.04-x86_64" ;; From xen-devel-bounces@lists.xenproject.org Mon May 11 06:42:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:42:00 +0000 Received: from list by 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Each port on the chip is a standalone PCI function, with UART registers on its I/O BAR0. Signed-off-by: Jiaqing Zhao --- xen/drivers/char/ns16550.c | 15 +++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index cf10a06a3d..26503070dc 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -96,6 +96,7 @@ struct ns16550_config { param_exar_xr17v358, param_intel_lpss, param_wch_ch382, + param_asix, } param; }; @@ -872,6 +873,14 @@ static const struct ns16550_config_param __initconst uart_param[] = { .bar0 = 1, .max_ports = 2, }, + [param_asix] = { + .base_baud = 115200, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 1, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1212,6 +1221,12 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x3253, .param = param_wch_ch382 }, + /* ASIX AX99100 PCIe to Multi I/O Controller */ + { + .vendor_id = PCI_VENDOR_ID_ASIX, + .dev_id = 0x9910, + .param = param_asix + }, }; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao Reviewed-by: Denis Mukhin --- xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..cf10a06a3d 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, }; 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pr=C From: Jiaqing Zhao To: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano Stabellini" CC: , Jiaqing Zhao Subject: [PATCH v3 0/2] ns16550: add support for WCH CH382 and ASIX AX99100 Date: Mon, 11 May 2026 15:54:13 +0800 Message-ID: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|SJ2PR12MB9237:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a2f3a31-fff7-4330-06cf-08deaf329e7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: aB/BRV0jDxNUxoocxZcZTmE7OaUb7orQfqmD8eQ/LzDAezIgu4VXtlyLFraKWgz9o06rZ26i9xiWSF1W50D0DB1d8+oDIv9O+p14GpnORrvf1Ge4dCkZAnHN28VEVc5vYgdie6jpQg5KyeBhVVO61qQrsyCT/l3IhhQFQOxAqGknUyR1lfX6NjrMyQMKWBocfNrUVfc2guCX3P9CjkqVpLM14crSCcCqekkmO8+cY2tzPT1qkzqhk9q+8l8bqYokIg+tro0n9Ll3vrxXjjTtNy90DEMKb1LKTslHjw/HWXQ1bN+LAacdpXhtQWsh2ZbSGjnb9QIvYojDav38zuFYEpjNQxhN9pPP47R9XfVMxRduNQMHpSj1Lw4KPHJ614YCe1EADcRKdtnCmW+p0kD/51XAYdpOk/vKD0FyvtYNimPhMvMjitFNOfp4oWqZUeF9byAqvenoE6g5sPfxvMSDbr992ATgL/cVeTq8dO3UlxZW5bpN0GVDyliq/xnxRgepuEzbpMW7lbWL68qJ67w+4jinC0FLfdWrTJtcngzDw6gSvFO1dThlsJB9Bq8BKe5xrJILP2dDSLpi2Mv7LBuMM4LOtFQwK5YPJHOPwQekslS1nLRQwikTlOILTSJqZFl0yASqU9GNulBSlOyb/LMhHg4c4UcZiRjULzZLCYZglnulFKAsQ5ZQnHGqQYn0xmzwM3cMvPyqoirSRDnsp7bvtorI6I5e+c0qml6/Nfx3LcI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(1800799024)(56012099003)(18002099003);DIR:OUT;SFP:1101; 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Both chips expose 16550-compatible UARTs through PCI I/O BAR0 and work with the existing ns16550 driver once a matching device table entry and parameter set are added. v3: - New patch 2/2: add support for ASIX AX99100. - Add forgotten Reviewed-by from Denis in patch 1/2 (WCH CH382). v2: - Reorder entries in ns16550_config to keep them sorted by device ID. - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple vendor IDs. Jiaqing Zhao (2): ns16550: add support for WCH CH382 serial adapters ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller xen/drivers/char/ns16550.c | 38 ++++++++++++++++++++++++++++++++++++++ xen/include/xen/pci_ids.h | 4 ++++ 2 files changed, 42 insertions(+) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 11 08:28:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 08:28:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305856.1577983 (Exim 4.92) (envelope-from ) id 1wMM0J-0004I6-SP; Mon, 11 May 2026 08:28:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305856.1577983; Mon, 11 May 2026 08:28:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMM0J-0004Hz-PY; Mon, 11 May 2026 08:28:43 +0000 Received: by outflank-mailman (input) for mailman id 1305856; Mon, 11 May 2026 08:28:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMM0I-0004Hn-JK for xen-devel@lists.xenproject.org; Mon, 11 May 2026 08:28:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMM0G-009vIl-Nz for xen-devel@lists.xenproject.org; Mon, 11 May 2026 10:28:40 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a019334-e002-0a2a0a5209dd-0a2a4507814c-20 for ; Mon, 11 May 2026 10:28:40 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a019338-229c-0a2a45070019-d1558029d9e4-3 for ; Mon, 11 May 2026 10:28:40 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-48e82c23840so4886825e9.3 for ; Mon, 11 May 2026 01:28:40 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 11 May 2026 01:28:39 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 10:28:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/2] ns16550: add support for WCH CH382 and ASIX AX99100 To: Jiaqing Zhao Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778488120-22F76C48-E4B26C31/0/0 X-purgate-type: clean X-purgate-size: 1230 On 11.05.2026 09:54, Jiaqing Zhao wrote: > This series adds ns16550 support for two PCIe serial adapters found on > market: > > - WCH (Nanjing Qinheng Microelectronics) CH382, available as > CH382 2S [1c00:3253] and CH382 2S1P [1c00:3250]. > - ASIX AX99100 PCIe to Multi-I/O Controller [125b:9910]. > > Both chips expose 16550-compatible UARTs through PCI I/O BAR0 and > work with the existing ns16550 driver once a matching device table > entry and parameter set are added. > > v3: > - New patch 2/2: add support for ASIX AX99100. > - Add forgotten Reviewed-by from Denis in patch 1/2 (WCH CH382). > > v2: > - Reorder entries in ns16550_config to keep them sorted by device ID. > - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple > vendor IDs. > > Jiaqing Zhao (2): > ns16550: add support for WCH CH382 serial adapters > ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller > > xen/drivers/char/ns16550.c | 38 ++++++++++++++++++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 4 ++++ > 2 files changed, 42 insertions(+) Please can you adhere to patch submission rules? They're sent To: the list, with relevant maintainers Cc:-ed. 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If the very first artefact is from >> a root container, then the test must also be a root container to use it as a >> working directory. >> >> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >> microcode-x86 artefact as it's the smallest available. This bodge can be >> removed when all build containers have become non-root. >> >> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >> the *-export dependency. >> >> This will allow us to change containers to being non-root one at a time, >> rather than all in one go. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Anthony PERARD >> CC: Stefano Stabellini >> CC: Michal Orzel >> CC: Doug Goldstein >> >> We should also stop using binaries/ as a working directory for the tests, but >> that gets very complicated very quickly and I don't have time to do it at this >> juncture. >> --- >> automation/gitlab-ci/test.yaml | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >> index 8770c523e228..517af1732437 100644 >> --- a/automation/gitlab-ci/test.yaml >> +++ b/automation/gitlab-ci/test.yaml >> @@ -15,6 +15,12 @@ >> - qemu-system-aarch64-6.0.0-arm64-export >> >> .arm32-test-needs: &arm32-test-needs >> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >> + # from a non-root container, and microcode-x86 is the smallest. Remove when >> + # all build containers have become non-root. >> + - project: $ARTIFACTS_REPO >> + job: microcode-x86 >> + ref: $ARTIFACTS_BRANCH > I don't see it being removed in this series even though the containers are non-root. Correct.  The Alpine container still being root is discussed in the commit message, and is why ... > >> - qemu-system-aarch64-6.0.0-arm32-export >> >> .x86-64-test-needs: &x86-64-test-needs >> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >> script: >> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >> needs: >> + - *arm64-test-needs ... why use here is ahead of ... > This also pulls in Linux image and rootfs which XTF tests don't need. I think > it's much better for a test to list the actual list of its dependencies. > Otherwise you are asking user/developer to dig into the yaml. > > ~Michal > >> - alpine-3.18-gcc-arm64 >> - - qemu-system-aarch64-6.0.0-arm64-export ... the alpine inclusion here. This can get reverted once the alpine container is split/reworked, but not before. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 09:07:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:07:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305878.1578001 (Exim 4.92) (envelope-from ) id 1wMMbQ-0001n9-UM; Mon, 11 May 2026 09:07:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305878.1578001; Mon, 11 May 2026 09:07:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMbQ-0001n2-Qz; Mon, 11 May 2026 09:07:04 +0000 Received: by outflank-mailman (input) for mailman id 1305878; Mon, 11 May 2026 09:07:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMbO-0001mu-PZ for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 11 May 2026 11:06:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000011:EE_|DS7PR12MB6007:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ece4e74-363c-4a7d-1ad8-08deaf3ca6d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|1800799024|22082099003|56012099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: p7n6e9Oh9u6lH+QStZorANeaavRV1KQAuUlwLmkqi6UaEjxlZZLkheBkNZimDi1DQe28D5ePsCtYrCMkmXrxoQ2O3N5D+X7mNbRT23AYa/NqYph1BZyTMiMXtpeJl5EOrsmyxKCK9kmnxSGm5oTCGPR9mmudQnWb+vHAlNvqxvNaz5CyJdQASMEQ7M4a379uJbTqI6eeXjWnXevwfivwosUK/oHTriiF6vTeaJfRHJKvQYAYs6XqvzYvt7R9EcE6zgrNfLUUBI0mVEC7/hmEiwPj4GfEMPC3FmHPerWOhL5pxNED02eMFmeG5M50v0u0gcrEFo3EcH4Rqf7VuFNDpHU7ox7+fYf8Odo6RKCtusyfT0Wzbw4QbSdQ/HOyUmP+1l1FZeBBrSRQbm0EZn+TLSl2HsghaMu7Dre8c3rp7o3maThrxP3DHl4GZaF01brg X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 09:06:56.4445 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ece4e74-363c-4a7d-1ad8-08deaf3ca6d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000011.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6007 X-purgate-ID: tlsNG-c1860d/1778490421-B6D73DB1-B56C75CD/0/0 X-purgate-type: clean X-purgate-size: 3431 On 11-May-26 11:03, Andrew Cooper wrote: > On 11/05/2026 7:16 am, Orzel, Michal wrote: >> >> On 08-May-26 23:29, Andrew Cooper wrote: >>> The binaries/ directory is a composition from the artefacts, and also used as >>> a working directory for most of the tests. If the very first artefact is from >>> a root container, then the test must also be a root container to use it as a >>> working directory. >>> >>> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >>> microcode-x86 artefact as it's the smallest available. This bodge can be >>> removed when all build containers have become non-root. >>> >>> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >>> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >>> the *-export dependency. >>> >>> This will allow us to change containers to being non-root one at a time, >>> rather than all in one go. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >>> --- >>> CC: Anthony PERARD >>> CC: Stefano Stabellini >>> CC: Michal Orzel >>> CC: Doug Goldstein >>> >>> We should also stop using binaries/ as a working directory for the tests, but >>> that gets very complicated very quickly and I don't have time to do it at this >>> juncture. >>> --- >>> automation/gitlab-ci/test.yaml | 10 ++++++++-- >>> 1 file changed, 8 insertions(+), 2 deletions(-) >>> >>> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >>> index 8770c523e228..517af1732437 100644 >>> --- a/automation/gitlab-ci/test.yaml >>> +++ b/automation/gitlab-ci/test.yaml >>> @@ -15,6 +15,12 @@ >>> - qemu-system-aarch64-6.0.0-arm64-export >>> >>> .arm32-test-needs: &arm32-test-needs >>> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >>> + # from a non-root container, and microcode-x86 is the smallest. Remove when >>> + # all build containers have become non-root. >>> + - project: $ARTIFACTS_REPO >>> + job: microcode-x86 >>> + ref: $ARTIFACTS_BRANCH >> I don't see it being removed in this series even though the containers are non-root. > > Correct.  The Alpine container still being root is discussed in the > commit message, and is why ... > >> >>> - qemu-system-aarch64-6.0.0-arm32-export >>> >>> .x86-64-test-needs: &x86-64-test-needs >>> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >>> script: >>> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >>> needs: >>> + - *arm64-test-needs > > ... why use here is ahead of ... > > >> This also pulls in Linux image and rootfs which XTF tests don't need. I think >> it's much better for a test to list the actual list of its dependencies. >> Otherwise you are asking user/developer to dig into the yaml. >> >> ~Michal >> >>> - alpine-3.18-gcc-arm64 >>> - - qemu-system-aarch64-6.0.0-arm64-export > > ... the alpine inclusion here. > > This can get reverted once the alpine container is split/reworked, but > not before. Ok, so once the Alpine container is reworked, we will get back to proper dependencies list. In that case: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 09:21:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:21:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305901.1578009 (Exim 4.92) (envelope-from ) id 1wMMp9-0004jf-2n; Mon, 11 May 2026 09:21:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305901.1578009; Mon, 11 May 2026 09:21:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMp8-0004jY-WB; Mon, 11 May 2026 09:21:14 +0000 Received: by outflank-mailman (input) for mailman id 1305901; Mon, 11 May 2026 09:21:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMMp7-0004jS-T2 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:21:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMMp7-00EFS9-9N for xen-devel@lists.xenproject.org; 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These will be used to remove the export jobs. >> >> Switch qemu-arm{32,64} jobs to use this container. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Anthony PERARD >> CC: Stefano Stabellini >> CC: Michal Orzel >> CC: Doug Goldstein >> >> We should probably wire up some build tests too, but it's too late on a Friday >> for me to be thinking about that for this posting. >> --- >> automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ >> automation/gitlab-ci/test.yaml | 4 +- >> automation/scripts/containerize | 1 + >> 3 files changed, 74 insertions(+), 2 deletions(-) >> create mode 100644 automation/build/debian/13-arm64v8.dockerfile >> >> diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile >> new file mode 100644 >> index 000000000000..b9062ee8b443 >> --- /dev/null >> +++ b/automation/build/debian/13-arm64v8.dockerfile >> @@ -0,0 +1,71 @@ >> +# syntax=docker/dockerfile:1 >> +FROM --platform=linux/arm64/v8 debian:trixie-slim >> +LABEL maintainer.name="The Xen Project" >> +LABEL maintainer.email="xen-devel@lists.xenproject.org" >> + >> +ENV DEBIAN_FRONTEND=noninteractive >> + >> +RUN <> +#!/bin/bash >> + set -eu >> + >> + useradd --create-home user >> + >> + apt-get update >> + >> + DEPS=( >> + # Xen >> + bison >> + build-essential >> + checkpolicy >> + flex >> + >> + # Tools (general) >> + ca-certificates >> + cpio >> + git-core >> + pkg-config >> + wget >> + # libxenguest dombuilder >> + libbz2-dev >> + liblzma-dev >> + liblzo2-dev >> + libzstd-dev >> + zlib1g-dev >> + # libacpi >> + acpica-tools >> + # libxl >> + libfdt-dev >> + libjson-c-dev >> + uuid-dev >> + # xentop >> + libncurses5-dev >> + # Python bindings >> + python3-dev >> + python3-setuptools >> + # Golang bindings >> + golang-go >> + # Ocaml bindings/oxenstored >> + ocaml-nox >> + ocaml-findlib > Since this is a container used only for tests, why listing packages required for > Xen and tools build? I did leave a note about that. > >> + >> + # for test phase, qemu-* jobs >> + busybox-static >> + curl >> + device-tree-compiler >> + expect >> + file >> + ipxe-qemu >> + ovmf >> + qemu-system-aarch64 >> + u-boot-qemu >> + u-boot-tools > So after this change, even though you replace debian-12 with debian-13 for all > the tests, the debian-12 still contains the unneeded packages (i.e. for a test > phase that it no longer runs). Yes.  I can't do this series bisectably without it.  Also, in the past people have explicitly requested to be able to run the qemu smoke testing from the build container, which is why it's like this and not split. Honestly, I was hoping to leave the Trixie update to the ARM maintainers, but despite the Bookworm QEMU (7.2) being newer than the 6.0 in the export jobs, it contains the SYSREG interception bugs which prevents hiding ThumbEE from guests, and breaks all the arm32 testing with a Linux dom0. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 09:35:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:35:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305911.1578018 (Exim 4.92) (envelope-from ) id 1wMN31-0006e3-8U; Mon, 11 May 2026 09:35:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305911.1578018; Mon, 11 May 2026 09:35:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN31-0006dw-5t; Mon, 11 May 2026 09:35:35 +0000 Received: by outflank-mailman (input) for mailman id 1305911; Mon, 11 May 2026 09:35:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN30-0006dp-Ia for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:35:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN2y-00ACPl-WE for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:35:33 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a2e3-2eae-0a2a0a5409dd-0a2a4508d342-16 for ; Mon, 11 May 2026 11:35:32 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a2e4-63b5-0a2a45080019-d1558029e161-3 for ; Mon, 11 May 2026 11:35:32 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso37066515e9.3 for ; Mon, 11 May 2026 02:35:32 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260508143353.3512004-3-luca.fancellu@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778492132-BED73DB1-3A8411D4/0/0 X-purgate-type: clean X-purgate-size: 1316 On 08.05.2026 16:33, Luca Fancellu wrote: > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); > #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 > #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 > > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 > + > struct xen_arch_domainconfig { > /* IN/OUT */ > uint8_t gic_version; > @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { > uint32_t clock_frequency; > /* IN */ > uint8_t arm_sci_type; > + /* IN */ > + uint8_t v8r_el1_msa; > }; Can you please take the opportunity and insert (and check) explicit padding, so that the next uint8_t field addition won't require ... > --- a/xen/include/public/domctl.h > +++ b/xen/include/public/domctl.h > @@ -30,9 +30,9 @@ > * fields) don't require a change of the version. > * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! > * > - * Last version bump: Xen 4.19 > + * Last version bump: Xen 4.22 > */ > -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 > +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 ... such a bump? Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 09:36:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:36:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305916.1578027 (Exim 4.92) (envelope-from ) id 1wMN3Q-00071z-LP; Mon, 11 May 2026 09:36:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305916.1578027; Mon, 11 May 2026 09:36:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN3Q-00071s-IS; Mon, 11 May 2026 09:36:00 +0000 Received: by outflank-mailman (input) for mailman id 1305916; Mon, 11 May 2026 09:35:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMN3P-00070M-57 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:35:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN3O-00ACdq-I7 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:35:58 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a2f3-2eae-0a2a0a5409dd-0a2a4509caf0-26 for ; Mon, 11 May 2026 11:35:58 +0200 Received: from [209.85.221.44] (helo=mail-wr1-f44.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a2fe-2497-0a2a45090019-d155dd2cd4c7-3 for ; Mon, 11 May 2026 11:35:58 +0200 Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso2286058f8f.0 for ; Mon, 11 May 2026 02:35:58 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Bugfixes may continue to be accepted by maintainers without R-Ack. Thanks in advance. Have a good week. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 09:39:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:39:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305933.1578036 (Exim 4.92) (envelope-from ) id 1wMN6W-0007ud-3X; Mon, 11 May 2026 09:39:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305933.1578036; Mon, 11 May 2026 09:39:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN6W-0007uW-0i; Mon, 11 May 2026 09:39:12 +0000 Received: by outflank-mailman (input) for mailman id 1305933; Mon, 11 May 2026 09:39:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN6U-0007uQ-SL for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:39:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN6U-005lBz-9L for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:39:10 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a3b7-e002-0a2a0a5209dd-0a2a450cc314-42 for ; Mon, 11 May 2026 11:39:10 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a3be-62f1-0a2a450c0019-d155dd33d5be-3 for ; Mon, 11 May 2026 11:39:10 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d7645adbdso2175959f8f.1 for ; Mon, 11 May 2026 02:39:10 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778492350-DB97DCF5-304221DF/0/0 X-purgate-type: clean X-purgate-size: 693 On 08.05.2026 22:27, Bernhard Kaindl wrote: > Add an OCaml binding for xc_domain_claim_memory(): > > - tools/ocaml/libs/xc/xenctrl.ml/mli: > Add claim record type and domain_claim_memory external. > > - tools/ocaml/libs/xc/xenctrl_stubs.c: > Marshal the OCaml claim array into a xen_memory_claim_t array. > Map nodes of -1 to XEN_DOMCTL_CLAIM_MEMORY_HOST for host-wide claims. > > Acked-by: Christian Lindig > Requested-by: Andrew Cooper > Signed-off-by: Bernhard Kaindl Nit: Chronologically order tags, please: Christian can't have ack-ed this before you signed off on it. Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 09:41:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:41:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305939.1578047 (Exim 4.92) (envelope-from ) id 1wMN8r-0000wM-GK; Mon, 11 May 2026 09:41:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305939.1578047; Mon, 11 May 2026 09:41:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN8r-0000wF-CM; Mon, 11 May 2026 09:41:37 +0000 Received: by outflank-mailman (input) for mailman id 1305939; Mon, 11 May 2026 09:41:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN8p-0000w9-DP for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:41:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN8n-0044AH-4x for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:41:34 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a430-5cb7-0a2a0a5109dd-0a2a4509894a-46 for ; Mon, 11 May 2026 11:41:34 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a44e-2497-0a2a45090019-d1558033b105-3 for ; Mon, 11 May 2026 11:41:34 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-4893940bb5eso24218605e9.3 for ; Mon, 11 May 2026 02:41:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1778492494-8A589A53-FD705782/0/0 X-purgate-type: clean X-purgate-size: 541 On 11.05.2026 11:35, Oleksii Kurochko wrote: > I would like to inform you that Code freeze period is started and will > be until Fri Jun 05, 2026 (+4 weeks from Feature freeze). > > Bugfixes may continue to be accepted by maintainers without R-Ack. Gives me context to ask right away: "x86/mwait-idle: sync up with Linux 7.0-rc" has had a few small adjustments and hence would want re-posting. Question is: Does that even make sense at this point, i.e. would you give it a release-ack despite it not all being bug fixes? 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Mon, 11 May 2026 03:00:01 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 12:00:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko From: Jan Beulich Subject: [PATCH] symbols: explicitly specify source file name for symtab Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778493602-A8D7F161-852BBC38/10/73395122804 X-purgate-type: spam X-purgate-size: 3295 If there are any local symbols in an object file, GNU ld will create an STT_FILE symbol derived from the object file name if there is none in the incoming symbol table. The object file name, however, varies between linking passes. As a result, symbol name compression can yield different results if any of those local symbols need retaining (Arm [and RISC-V] mapping symbols are omitted, for example). If that difference in compression would yield a difference in the sizes of symbol_names[] or symbols_token_table[], the compare-symbol-tables sanity check will fail. Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") Reported-by: Oleksii Kurochko Signed-off-by: Jan Beulich --- The observed problem was with a stub generated as Arm64 erratum 843419 workaround. Such stubs' symbols (imo wrongly) are associated with the last input object, rather than the input object they belong to. Also for other kinds of stubs, afaict. See https://sourceware.org/bugzilla/show_bug.cgi?id=34140. As per the above, having a Fixes: tag here is questionable. --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no ifeq ($(CONFIG_DEBUG_INFO),y) $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" endif - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ + > $(dot-target).0s.S $(MAKE) $(build)=$(@D) .$(@F).0s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ @@ -210,6 +211,7 @@ endif > $(dot-target).1r.S $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + --source-name=$(@F).S \ > $(dot-target).1s.S $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ @@ -220,6 +222,7 @@ endif > $(dot-target).2r.S $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + --source-name=$(@F).S \ > $(dot-target).2s.S $(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o $(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o) --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -66,6 +66,7 @@ int token_profit[0x10000]; unsigned char best_table[256][2]; unsigned char best_table_len[256]; +static const char *srcname = "xen-syms.S"; static void usage(void) { @@ -356,6 +357,7 @@ static void write_src(void) printf("#define ALGN 4\n"); printf("#endif\n"); + printf("\t.file \"%s\"\n", srcname); printf("\t.section .rodata, \"a\"\n"); printf("#ifndef SYMBOLS_ORIGIN\n"); @@ -679,6 +681,8 @@ int main(int argc, char **argv) unsorted = true; else if (strcmp(argv[i], "--sort-by-name") == 0) sort_by_name = 1; + else if (strncmp(argv[i], "--source-name=", 14) == 0) + srcname = argv[i] + 14; else if (strcmp(argv[i], "--warn-dup") == 0) warn_dup = true; else if (strcmp(argv[i], "--error-dup") == 0) From xen-devel-bounces@lists.xenproject.org Mon May 11 10:16:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:16:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305966.1578064 (Exim 4.92) (envelope-from ) id 1wMNgB-00066b-Am; Mon, 11 May 2026 10:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305966.1578064; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6E2i9eEwH3eNSU08KxErThEKw+hdyS+BCYlWNrXcZ3kjdLnvcU+TxZ1CyKlBFO1ipZ3arGCFWT502O/VQPkL3uxbSmZKIc1xQeg8wBvAMCaVfXBlb92xuqWhaa9QY8LFNCbFfRsL1raGv7W1jSPQ2NHjWjiF3TurLePA2NL6IMFI2C+c3VAtUDiqKSyklXlu1zuiQsVuzInl8VdaTeeY7+HkcKF4IrFdjv0km1R9M5y0vyffmySERw3czvrNHcLYlAOCcKLesfRseolQeluoQuD5Z3qg5i7yUwDNN03tvMAPBea/T3ziW/HDmxMUGHvSp+onSk2UgMU06Pfly1JDat4D11/QR7WBUJUutdN4iWAPU5Lq7RZpMth1QWq+PrrnS/JYs+GRh+x83bzxWCs9x4CSdimBYK7VoiGPXBorGlYAc61us47haOfuWJ5IKTgu X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:15:52.8618 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 87f1bc23-f951-4305-9893-08deaf464858 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6984 X-purgate-ID: tlsNG-c201ff/1778494560-E0461443-F87F1A77/0/0 X-purgate-type: clean X-purgate-size: 10302 On 08-May-26 16:33, Luca Fancellu wrote: > From: Harry Ramsey > > Add a new device tree property `v8r_el1_msa` to select the MSA (memory > system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the > former is the default if the property is not passed. > > Implement the dom0less path to parse the new device tree property, add > a new domctl hypercall input parameter `v8r_el1_msa` for arm and > add the sanitisation in arch_sanitise_domain_config(), the parameter > is intended to be used on CONFIG_MPU systems and returns an error if > selected for MMU. > > Given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v5: > - follow the way domu_dt_sci_parse and ARM_SCI is doing, but > return error if property is present in MMU systems. > - Align the commit message on the new changes > - fix documentation > - fix multiline comment > - drop the explicit padding from struct xen_arch_domainconfig > v4: > - Rework the patch to have the v8r_el1_msa input parameter more > enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. > v3: > - Improve commit message and device tree property description > - Remove macro protection > - Remove unused function is_mpu_domain > - Code formatting > --- > docs/misc/arm/device-tree/booting.txt | 14 +++++ > xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ > xen/arch/arm/domain.c | 11 ++++ > xen/arch/arm/include/asm/domain.h | 4 ++ > xen/arch/arm/include/asm/domain_build.h | 21 +++++++ > xen/arch/arm/mpu/arm32/mm.c | 17 ++++++ > xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ > xen/include/public/arch-arm.h | 6 ++ > xen/include/public/domctl.h | 4 +- > 9 files changed, 167 insertions(+), 2 deletions(-) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 977b4286082f..2389ae610963 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -322,6 +322,20 @@ with the following properties: > Should be used together with scmi-smc-passthrough Xen command line > option. > > +- v8r_el1_msa > + > + A string property specifying whether, on Armv8-R systems at EL1, a domain > + should use PMSAv8 (MPU) or VMSAv8 (MMU). > + > + - "mmu" > + Enables VMSAv8 at EL1. This requires hardware support and is only > + optionally available on AArch64. Not supported on AArch32. > + > + - "mpu" > + Enables PMSAv8 at EL1. This is the default behaviour when the property is s/behaviour/behavior/ > + not passed. This configuration requires static allocation (xen,static-mem) > + and direct mapping (direct-map). > + > Under the "xen,domain" compatible node, one or more sub-nodes are present > for the DomU kernel and ramdisk. > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 6f73c65e5151..2a0671bd0e8e 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -295,6 +295,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, > return 0; > } > > +static int __init > +domu_dt_v8r_el1_msa_parse(struct dt_device_node *node, node can be const > + struct xen_domctl_createdomain *d_cfg, > + unsigned int flags) > +{ > + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); > + > + if ( !property_present ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; > + else > + { > + const char *v8r_el1_msa; > + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); > + > + if ( ret ) > + return ret; > + > + if ( !strcmp(v8r_el1_msa, "mpu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; > + else if ( !strcmp(v8r_el1_msa, "mmu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; > + else > + { > + printk(XENLOG_ERR > + "v8r_el1_msa value (%s) not valid for domain %s\n", > + v8r_el1_msa, dt_node_name(node)); dt_node_name can be any arbitrary name not necessarily denoting a domain in a meaningful way. Without a full path it can be misleading. Either print a full path or don't print it at all. Here and elsewhere. > + return -EINVAL; > + } > + } > + > + if ( !IS_ENABLED(CONFIG_MPU) ) > + { > + if ( !property_present ) > + return 0; > + > + printk(XENLOG_ERR > + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", > + dt_node_name(node)); > + return -EINVAL; > + } > + > + switch ( d_cfg->arch.v8r_el1_msa ) > + { > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: > + fallthrough; > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: > + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > + { > + printk(XENLOG_ERR > + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", > + dt_node_name(node)); > + return -EINVAL; > + } > + break; > + > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: > + if ( !has_v8r_vmsa_support() ) > + { > + printk(XENLOG_ERR > + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); > + return -EINVAL; > + } > + break; > + > + default: > + return -EINVAL; > + } > + > + return 0; > +} > + > int __init arch_parse_dom0less_node(struct dt_device_node *node, > struct boot_domain *bd) > { > @@ -308,6 +379,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > if ( domu_dt_sci_parse(node, d_cfg) ) > panic("Error getting SCI configuration\n"); > > + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) > + panic("Error getting v8r_el1_msa configuration\n"); > + > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) > { > int vpl011_virq = GUEST_VPL011_SPI; > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 26380a807cad..ac7d1abd9c7c 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -630,6 +631,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > return -EINVAL; > } > > + if ( !v8r_el1_msa_domain_sanitise_config(config) ) > + { > + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); > + return -EINVAL; > + } > + > return sci_domain_sanitise_config(config); > } > > @@ -722,6 +729,10 @@ int arch_domain_create(struct domain *d, > d->arch.sve_vl = config->arch.sve_vl; > #endif > > +#ifdef CONFIG_MPU > + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; > +#endif > + > if ( (rc = sci_domain_init(d, config)) != 0 ) > goto fail; > > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h > index b24f02d269be..ac7300e41fcd 100644 > --- a/xen/arch/arm/include/asm/domain.h > +++ b/xen/arch/arm/include/asm/domain.h > @@ -112,6 +112,10 @@ struct arch_domain > #endif > > struct resume_info resume_ctx; > + > +#ifdef CONFIG_MPU > + uint8_t v8r_el1_msa; > +#endif > } __cacheline_aligned; > > struct arch_vcpu > diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h > index 6674dac5e2f8..50ddc0511e7e 100644 > --- a/xen/arch/arm/include/asm/domain_build.h > +++ b/xen/arch/arm/include/asm/domain_build.h > @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); > > int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); > > +#ifdef CONFIG_MPU > +/* Utility function to determine if an Armv8-R processor supports VMSA. */ > +bool has_v8r_vmsa_support(void); > +bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config); > +#else > +static inline bool has_v8r_vmsa_support(void) > +{ > + return false; > +} > + > +static inline bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config) Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 MPU, MMU) but they do not have anything that would prevent from generalizing them in a single function. > +{ > + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE ) > + return false; > + > + return true; > +} > +#endif /* CONFIG_MPU */ > + > #endif > > /* > diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c > index a4673c351141..a759ebdfc124 100644 > --- a/xen/arch/arm/mpu/arm32/mm.c > +++ b/xen/arch/arm/mpu/arm32/mm.c > @@ -5,6 +5,8 @@ > #include > #include > #include > +#include > +#include > > #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ > case num: \ > @@ -38,6 +40,21 @@ > break; \ > } > > +bool has_v8r_vmsa_support(void) > +{ > + return false; > +} > + > +bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config) > +{ > + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && > + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA ) Please add brackets ( () && () ) ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:36:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:36:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305979.1578072 (Exim 4.92) (envelope-from ) id 1wMO06-0000o5-UN; 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bh=RmlcBMtgTUbMbO5vSUFU8z0giO0xkCTKxNxFf/bABSU=; b=4LhAGxe8C48MvneKm5QzGVsG34hAFfM1ECDTfUUlsEt771BWW22+VPeWfkGS6xx+kFI8iKc85JnCGsSw8tSLe7syxqLKTMvu/PGuEVwTzqK6KaXJtZn8uHCi05/NHs7OZ9EK9t5RqCsKv8XpYQ227sYgMsi8NHzKxdO+fT8n8YU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 12:36:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-4-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508143353.3512004-4-luca.fancellu@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 86qu4UT6d5AUdGI8zPjOp8rS8wP11DAPEzlG9Ztu3J8UJSs2+piciVNzqnsnvkuCHxa5/g+a9nxCFJayJtdPJYG3vEa4MVyomqJ7yz8D9Nwy5LqEU5P0R9de1OzPaP1ReXZW34FIiqGGpbOzp3ydK/SJ2TUWjY4H2xhFmlLrsq99222lsw4me5lDClyk2oh6r5zyLFRQ6F1Oc+S2ARZhdj+H8Nr9Y2wDteVUJuR4jshP9Zxca+UVDsjVwqvDUNfPgNjQKSCXl5n+WrBJM5y/8WLcK3yOK2Y7Kgq53iNIFfgUdwMn+aZ0Rb7b6V4pUkr9QDMHrbFKEEO4y0h/3ussbueieQkWXE/YUvTPwT1jn4Z1qaHVdRuBhjg/uvBbDlyslLuvLpIHPebHXxqGyMkeqy5s/lMBDX+vbZdjhN/E6711wNu+2ziWP5JRYjK4t0jy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:36:31.0784 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 53816c8d-cf0c-4632-3fa7-08deaf492a58 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F41.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB999088 X-purgate-ID: tlsNG-bad1c0/1778495796-43D7FA53-EF40598B/0/0 X-purgate-type: clean X-purgate-size: 4961 On 08-May-26 16:33, Luca Fancellu wrote: > From: Harry Ramsey > > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v5: > - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER > - used MAX_MPU_REGION_NR instead of opencoding 255 > - use 'table' in p2m_alloc_table to clear pages > - remove p2m_free_vmid() from error path in p2m_init() > which is already handled outside > v4: > - no changes > v3: > - Check for alloc_xenheap_pages allocation > - Clear additional page allocated for ARM64 > - Add check for INVALID_VCPU_ID > - Remove unnecessary function generate_vsctlr > - Code formatting fixes > --- > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- > 5 files changed, 85 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 2cf0f8cbacae..d565230f84ee 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -11,6 +11,8 @@ > */ > #define MPU_REGION_RES0 0x0 > > +#define VSCTLR_VMID_SHIFT 16 > + > /* Hypervisor Protection Region Base Address Register */ > typedef union { > struct { > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index 4f694190a8a3..8b86a03fee44 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -7,6 +7,8 @@ > > #define MPU_REGION_RES0 (0xFFFFULL << 48) > > +#define VSCTLR_VMID_SHIFT 48 > + > /* Protection Region Base Address Register */ > typedef union { > struct __packed { > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a1d..0d4149c71987 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -3,8 +3,15 @@ > #ifndef __ARM_MPU_P2M_H__ > #define __ARM_MPU_P2M_H__ > > +#include > +#include > +#include > + > struct p2m_domain; > > +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) You should include mpu.h for MAX_MPU_REGION_NR definition > +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) > + > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9ebbd..ed1b6dd40f40 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c > index f7fb58ab6aa8..8d5c65b1003f 100644 > --- a/xen/arch/arm/mpu/p2m.c > +++ b/xen/arch/arm/mpu/p2m.c > @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) > BUG_ON("unimplemented"); > } > > +static int p2m_alloc_table(struct domain *d) > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); Why char and not void? We use void and pointer arithmetic is done by treating the size of a void as 1. > + unsigned int i; > + > + if ( !table ) > + { > + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", > + d); > + return -ENOMEM; > + } > + > + p2m->root = virt_to_page(table); > + > + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) > + clear_page(table + (i * PAGE_SIZE)); > + > + return 0; > +} > + > int p2m_init(struct domain *d) > { > - BUG_ON("unimplemented"); > - return -EINVAL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + int rc = 0; > + unsigned int cpu; > + > + rwlock_init(&p2m->lock); > + > + p2m->vmid = INVALID_VMID; > + p2m->max_mapped_gfn = _gfn(0); > + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); > + > + p2m->default_access = p2m_access_rwx; > + /* mem_access is NOT supported in MPU system. */ s/in/on With the above fixed: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:40:54 2026 Return-path: Envelope-to: archives@lists.xen.org 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Mon, 11 May 2026 03:41:03 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 12:41:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 9/9] x86/mwait-idle: Add C-states validation To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> <57233a5d-3944-433c-a7c5-a1a491a2c1dd@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778496064-C5784DB1-064AD845/0/0 X-purgate-type: clean X-purgate-size: 2912 On 08.05.2026 09:38, Roger Pau Monné wrote: > On Mon, May 04, 2026 at 11:34:40AM +0200, Jan Beulich wrote: >> On 24.04.2026 21:15, Roger Pau Monné wrote: >>> On Thu, Mar 12, 2026 at 05:58:21PM +0100, Jan Beulich wrote: >>>> @@ -1589,6 +1594,41 @@ static char *__init get_cmdline_field(ch >>>> } >>>> >>>> /** >>>> + * validate_cmdline_cstate - Validate a C-state from cmdline. >>>> + * @state: The C-state to validate. >>>> + * @prev_state: The previous C-state in the table or NULL. >>>> + * >>>> + * Return: 0 if the C-state is valid or -EINVAL otherwise. >>> >>> Hm, I know we picked this up from upstream, but this function would >>> better return a boolean, rather than 0 or -EINVAL. >> >> I agree, but I didn't want to deviate from their code purely for cosmetic >> reasons. >> >>>> +static int __init validate_cmdline_cstate(struct cpuidle_state *state, >>>> + struct cpuidle_state *prev_state) >>>> +{ >>>> + if (state->exit_latency == 0) >>>> + /* Exit latency 0 can only be used for the POLL state */ >>>> + return -EINVAL; >>>> + >>>> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency < state->exit_latency) >>>> + return -EINVAL; >>>> + >>>> + if (!prev_state) >>>> + return 0; >>>> + >>>> + if (state->exit_latency <= prev_state->exit_latency) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency <= prev_state->target_residency) >>>> + return -EINVAL; >>> >>> I'm not an expert on C-states, but isn't this checking against the >>> previous value kind of defeating part of the purpose of the command >>> line? >> >> I don't know. The question would need raising to the author. >> >>> Also, it might help to also write down those limits in the command >>> line documentation. >> >> What do you mean there? Some of the values are universal, but some >> checks are against model-specific values. I don't think you mean to >> enumerate them all? > > Maybe it's indeed not very useful. What I referring to was something > along the lines of: "the command line provided residency and latency > values must be smaller than the default ones". As noted above it > seems weird to me than higher than current values cannot be set, > albeit I have no idea what's the expected usage of this interface. Hmm, while meaning to make this change I came to wonder: What exactly do you refer to by "current values" and "default ones"? prev_state here isn't "previous state" as in "before this option was parsed", but as in "next lower C-state", as per prev_state = i ? &cmdline_states[i - 1] : NULL; ahead of the call site. Instead what I'm inclined to do (despite deviating from the original) is to constify the function's parameters. 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bh=3UUBguPlhjyv2WTqU3xP1vMGoLN6aTg6DByEoeNDgSA=; b=Z2bMSfd/Xl00T7alORmA8x7rij4UFo9SgvZCoaV3SmpgdyXFuHoCYI/+9oVIuIcysNkI1iDUkSsVaZ54H5D8BrnFiBhEVQLpKq1qyqP7yIhHSSxjr665842IWOVa2bGv+w4upb7IZkENAWIVFjnsNLKOFQQwZ8phvc0lv0Un0F4= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 12:50:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8Kf3/8ImtdbGmAHp+uhJGRveW6ByO4CtqUuSxJlD2wqangZ1SdhpkKcHTuD0rQf5ozDUB8/WOmST6NfaAQX4bhR/3FULdoabLnkOoBpnErIVDWFy+/XowPPE8feeN1Y4h8uN7jVJ1YC6WTSWmg4N5k5hQZOkglnHgvmdtk/+wPHzeuKATY7sEqXFqDg7d6vj3C9EnipmP/MFpXeNi2LZ9CmzNb7F5+TBAk2VLD7BtNihA83hulEL02jsPHQ31lMC8M05eB3k19u8Wg3du8ZLltK3aRhbxyPrD7WC7K+snEGgE2fToB6S1Z9zONksc4DHwyHWzPQoISkilwcuzDlHbs0GNzl8rZsg9vs6Z50As+DObXKy60mgQk2BIBHVdbdEnLjHm3PTuR1jOfTPyepDXhab7BuLjFq4TSOBXZardIafado49aHmdeTbreXP+DdO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:50:43.7696 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac027343-50cf-422b-747d-08deaf4b2697 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F41.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7144 X-purgate-ID: tlsNG-4011c0/1778496651-709668B7-5DDC8C7B/0/0 X-purgate-type: clean X-purgate-size: 1689 On 11-May-26 12:44, Luca Fancellu wrote: > Hi Michal, > >>> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h >>> index 6674dac5e2f8..50ddc0511e7e 100644 >>> --- a/xen/arch/arm/include/asm/domain_build.h >>> +++ b/xen/arch/arm/include/asm/domain_build.h >>> @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); >>> >>> int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); >>> >>> +#ifdef CONFIG_MPU >>> +/* Utility function to determine if an Armv8-R processor supports VMSA. */ >>> +bool has_v8r_vmsa_support(void); >>> +bool v8r_el1_msa_domain_sanitise_config( >>> + const struct xen_domctl_createdomain *config); >>> +#else >>> +static inline bool has_v8r_vmsa_support(void) >>> +{ >>> + return false; >>> +} >>> + >>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>> + const struct xen_domctl_createdomain *config) >> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >> MPU, MMU) but they do not have anything that would prevent from generalizing >> them in a single function. > > I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? > > Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed > Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed > Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed What's the reason for allowing NONE for MPU here? None denotes property not specified but at this point it should be set to a default. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:52:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:52:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306023.1578117 (Exim 4.92) (envelope-from ) id 1wMOFd-0005uV-8K; Mon, 11 May 2026 10:52:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306023.1578117; Mon, 11 May 2026 10:52:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOFd-0005uO-5X; Mon, 11 May 2026 10:52:41 +0000 Received: by outflank-mailman (input) for mailman id 1306023; Mon, 11 May 2026 10:52:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOFb-0005u0-3o for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <494b99b4-2d45-4893-9300-b3e8ffdd4396@amd.com> Date: Mon, 11 May 2026 12:45:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-4-luca.fancellu@arm.com> <0A9C53BD-D9FD-4CBF-B874-E7465C8E421E@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0A9C53BD-D9FD-4CBF-B874-E7465C8E421E@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529F:EE_|DS0PR12MB8416:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d0f368a-ce0d-469a-25dd-08deaf4a6be4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|1800799024|376014|56012099003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hPWgL4FGdLEi79U4gEPJKG+AvbMZ6h921NhI9Od4xDIJ1fcl4oGO3pSFBsesR5byUghe/uXjFHjEMINfNgF5eaUxGgGVcwPp89T3Z2aPQqFyaplhY/MK1WHEBuDSyQf1VFkG7z2q4mC4pp2hu8ZMY9s8XQVDX9OoUEdIwVT52qSLaaRNCXYd9xdZ4/mborHlinxVPHA1YlFnfeRMcuV0sTgs/YFFayE2dqGwN87Pfcm5hS59rU21u/gLDqSinjuQmC/nWx72PgbmbH7xt9VxRw80V3jT6c0C+WxOTZQDxlat5jp1aQKN9KIyftmw1Ve5XnnehHV5KvZIFl+54khNxJYljsFzhi3sDXYhEO6HBNqoNsajBxO8bQcuZ6hszGqfiYPDyFAet8KNIwU68Zrh4PClEmsarRBAVtWLd9cBlDof6Rd/rJoWfvyQbEn3P+TN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:45:30.5088 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d0f368a-ce0d-469a-25dd-08deaf4a6be4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8416 X-purgate-ID: tlsNG-bad1c0/1778496337-89377A53-B48A3C80/37/8731086901-1579827 X-purgate-type: clean X-purgate-size: 3075 On 11-May-26 12:39, Luca Fancellu wrote: > Hi Michal, > > >>> diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h >>> index e46d9e757a1d..0d4149c71987 100644 >>> --- a/xen/arch/arm/include/asm/mpu/p2m.h >>> +++ b/xen/arch/arm/include/asm/mpu/p2m.h >>> @@ -3,8 +3,15 @@ >>> #ifndef __ARM_MPU_P2M_H__ >>> #define __ARM_MPU_P2M_H__ >>> >>> +#include >>> +#include >>> +#include >>> + >>> struct p2m_domain; >>> >>> +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) >> You should include mpu.h for MAX_MPU_REGION_NR definition > > right, I’ll include > >> >>> +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) >>> + >>> static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} >>> >>> static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} >>> diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h >>> index 010ce8c9ebbd..ed1b6dd40f40 100644 >>> --- a/xen/arch/arm/include/asm/p2m.h >>> +++ b/xen/arch/arm/include/asm/p2m.h >>> @@ -48,8 +48,13 @@ struct p2m_domain { >>> /* Current VMID in use */ >>> uint16_t vmid; >>> >>> +#ifdef CONFIG_MMU >>> /* Current Translation Table Base Register for the p2m */ >>> uint64_t vttbr; >>> +#else >>> + /* Current Virtualization System Control Register for the p2m */ >>> + register_t vsctlr; >>> +#endif >>> >>> /* Highest guest frame that's ever been mapped in the p2m */ >>> gfn_t max_mapped_gfn; >>> diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c >>> index f7fb58ab6aa8..8d5c65b1003f 100644 >>> --- a/xen/arch/arm/mpu/p2m.c >>> +++ b/xen/arch/arm/mpu/p2m.c >>> @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) >>> BUG_ON("unimplemented"); >>> } >>> >>> +static int p2m_alloc_table(struct domain *d) >>> +{ >>> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >>> + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); >> Why char and not void? We use void and pointer arithmetic is done by treating >> the size of a void as 1. > > I did it on purpose since it’s a compiler extension, but if you say it’s ok I’ll change it to void. Yes, this is a documented extension in our MISRA language toolchain and as you can see, we use it in our code base. BTW, please also ... > >>> + unsigned int i; >>> + >>> + if ( !table ) >>> + { >>> + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", >>> + d); >>> + return -ENOMEM; >>> + } >>> + >>> + p2m->root = virt_to_page(table); >>> + >>> + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) >>> + clear_page(table + (i * PAGE_SIZE)); >>> + >>> + return 0; >>> +} >>> + >>> int p2m_init(struct domain *d) >>> { >>> - BUG_ON("unimplemented"); >>> - return -EINVAL; >>> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >>> + int rc = 0; ... drop this redundant assignment. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:55:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:55:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306029.1578128 (Exim 4.92) (envelope-from ) id 1wMOI7-0006QT-Ld; Mon, 11 May 2026 10:55:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306029.1578128; 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I can see 3 definitions (Arm64 MPU, = Arm32 >>> MPU, MMU) but they do not have anything that would prevent from general= izing >>> them in a single function. >>=20 >> I can do a common one I think, just to be aligned, should the common one= behaves as the current implementation? >>=20 >> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_= NONE allowed >> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,P= MSA,VMSA} allowed >> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,P= MSA} allowed > What's the reason for allowing NONE for MPU here? None denotes property n= ot > specified but at this point it should be set to a default. We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lea= d to PMSA at EL1 Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 10:59:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:59:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306045.1578136 (Exim 4.92) (envelope-from ) id 1wMOMK-0007Gz-8Z; Mon, 11 May 2026 10:59:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306045.1578136; Mon, 11 May 2026 10:59:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOMK-0007Gs-5H; Mon, 11 May 2026 10:59:36 +0000 Received: by outflank-mailman (input) for mailman id 1306045; Mon, 11 May 2026 10:59:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOMI-0007Gm-Sr for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <74ffed08-caae-4d70-959b-12daf5d67cb1@amd.com> Date: Mon, 11 May 2026 12:59:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC4:EE_|SA3PR12MB7951:EE_ X-MS-Office365-Filtering-Correlation-Id: c48abdf5-4178-4237-eccc-08deaf4c5e1d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700016|1800799024|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DTBfqOwGsrvLvQs0eC4eWxRbcsoJPdp/e9BFHLMuXZF6ZDurn+Fw9S6qDU8i9lkoLEw3xZnujJySA8vM8XVGoHRJRchMu78mbBWIQYFnsmXj99ORyCzDtdpTqlQCwYpZ0XlVcQ7OFen/AMmcSw1y0BKlIBs54z3FYGfH3IBW2hHrogShDYQwETy/+/W4UP04J5eGSc4XSLraCAataqESRmYVwmOlTGkTj8+HreluPXtJe4ojKYJ7UfYwtEWx3w0yWKrxi9E3Ye/6p+wLNJMLwjZd9t09KQaImiwXr3Zpp58lhw9TC4IPBY7tR1lB1KZPtaJFMdFPuMwBGXnEIxObD7YCGiGgAosw1lKUgV0ij9eEq5chpAf9GnBN+jTeT+PrQzPgkX8S0GX/1HAXjuWQ5CyFQ5fie3T2mpkNjfsLAIOfgmDIrzIdLLch2buVLq7j X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:59:26.3693 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c48abdf5-4178-4237-eccc-08deaf4c5e1d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7951 X-purgate-ID: tlsNG-4011c0/1778497173-7E58E8B7-009DECE8/0/0 X-purgate-type: clean X-purgate-size: 1312 On 11-May-26 12:53, Luca Fancellu wrote: > Hi Michal, > >>>>> + >>>>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>>>> + const struct xen_domctl_createdomain *config) >>>> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >>>> MPU, MMU) but they do not have anything that would prevent from generalizing >>>> them in a single function. >>> >>> I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? >>> >>> Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed >>> Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed >>> Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed >> What's the reason for allowing NONE for MPU here? None denotes property not >> specified but at this point it should be set to a default. > > We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lead to PMSA at EL1 NONE denotes property not set i.e. set a default. IMO at the place where we set a default, NONE should be switched to PMSA. This is a cleaner solution than giving two options the same meaning. Sanitization could then verify that indeed the default setting took place. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 11:08:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:08:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306056.1578145 (Exim 4.92) (envelope-from ) id 1wMOUg-0000gK-0t; Mon, 11 May 2026 11:08:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306056.1578145; Mon, 11 May 2026 11:08:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOUf-0000gD-U0; Mon, 11 May 2026 11:08:13 +0000 Received: by outflank-mailman (input) for mailman id 1306056; Mon, 11 May 2026 11:08:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOUe-0000g7-K4 for xen-devel@lists.xenproject.org; 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I can see 3 definitions (Arm64 MPU= , Arm32 >>>>> MPU, MMU) but they do not have anything that would prevent from gener= alizing >>>>> them in a single function. >>>>=20 >>>> I can do a common one I think, just to be aligned, should the common o= ne behaves as the current implementation? >>>>=20 >>>> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MS= A_NONE allowed >>>> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE= ,PMSA,VMSA} allowed >>>> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE= ,PMSA} allowed >>> What's the reason for allowing NONE for MPU here? None denotes property= not >>> specified but at this point it should be set to a default. >>=20 >> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and = lead to PMSA at EL1 > NONE denotes property not set i.e. set a default. IMO at the place where = we set > a default, NONE should be switched to PMSA. This is a cleaner solution th= an > giving two options the same meaning. Sanitization could then verify that = indeed > the default setting took place. Ok so this is a bit different from how all other *_NONE are handled current= ly (TEE and SCI). So on MPU Arm32/64 now we will stop the domain creation if NONE is passed, = is that the behaviour you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get this b= ecause we will switch during DT parse) Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 11:09:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:09:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306062.1578154 (Exim 4.92) (envelope-from ) id 1wMOWF-0001AG-CR; Mon, 11 May 2026 11:09:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306062.1578154; Mon, 11 May 2026 11:09:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOWF-0001A9-8q; Mon, 11 May 2026 11:09:51 +0000 Received: by outflank-mailman (input) for mailman id 1306062; Mon, 11 May 2026 11:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOWD-00019z-Ui for xen-devel@lists.xenproject.org; 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Message-ID: <12f44475-f4de-494f-8d75-3c3ac039b96c@citrix.com> Date: Mon, 11 May 2026 12:09:33 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Doug Goldstein Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: "Orzel, Michal" , Xen-devel References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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If the very first artefact is from >>>> a root container, then the test must also be a root container to use it as a >>>> working directory. >>>> >>>> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >>>> microcode-x86 artefact as it's the smallest available. This bodge can be >>>> removed when all build containers have become non-root. >>>> >>>> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >>>> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >>>> the *-export dependency. >>>> >>>> This will allow us to change containers to being non-root one at a time, >>>> rather than all in one go. >>>> >>>> No functional change. >>>> >>>> Signed-off-by: Andrew Cooper >>>> --- >>>> CC: Anthony PERARD >>>> CC: Stefano Stabellini >>>> CC: Michal Orzel >>>> CC: Doug Goldstein >>>> >>>> We should also stop using binaries/ as a working directory for the tests, but >>>> that gets very complicated very quickly and I don't have time to do it at this >>>> juncture. >>>> --- >>>> automation/gitlab-ci/test.yaml | 10 ++++++++-- >>>> 1 file changed, 8 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >>>> index 8770c523e228..517af1732437 100644 >>>> --- a/automation/gitlab-ci/test.yaml >>>> +++ b/automation/gitlab-ci/test.yaml >>>> @@ -15,6 +15,12 @@ >>>> - qemu-system-aarch64-6.0.0-arm64-export >>>> >>>> .arm32-test-needs: &arm32-test-needs >>>> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >>>> + # from a non-root container, and microcode-x86 is the smallest. Remove when >>>> + # all build containers have become non-root. >>>> + - project: $ARTIFACTS_REPO >>>> + job: microcode-x86 >>>> + ref: $ARTIFACTS_BRANCH >>> I don't see it being removed in this series even though the containers are non-root. >> Correct.  The Alpine container still being root is discussed in the >> commit message, and is why ... >> >>>> - qemu-system-aarch64-6.0.0-arm32-export >>>> >>>> .x86-64-test-needs: &x86-64-test-needs >>>> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >>>> script: >>>> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >>>> needs: >>>> + - *arm64-test-needs >> ... why use here is ahead of ... >> >> >>> This also pulls in Linux image and rootfs which XTF tests don't need. I think >>> it's much better for a test to list the actual list of its dependencies. >>> Otherwise you are asking user/developer to dig into the yaml. >>> >>> ~Michal >>> >>>> - alpine-3.18-gcc-arm64 >>>> - - qemu-system-aarch64-6.0.0-arm64-export >> ... the alpine inclusion here. >> >> This can get reverted once the alpine container is split/reworked, but >> not before. > Ok, so once the Alpine container is reworked, we will get back to proper > dependencies list. Yes.  I hope to do so for 4.22, but the alpine container needs more careful work as it's also used by the QubeOS hardware runner environment. > In that case: > Reviewed-by: Michal Orzel Thankyou. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 11:18:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:18:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306074.1578162 (Exim 4.92) (envelope-from ) id 1wMOe4-00035M-6i; Mon, 11 May 2026 11:17:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306074.1578162; Mon, 11 May 2026 11:17:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOe4-00035E-3R; Mon, 11 May 2026 11:17:56 +0000 Received: by outflank-mailman (input) for mailman id 1306074; Mon, 11 May 2026 11:17:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOe1-000358-Sp for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 11 May 2026 13:17:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> <74ffed08-caae-4d70-959b-12daf5d67cb1@amd.com> <4E3CC074-A194-4B55-9B69-12204047D1E4@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <4E3CC074-A194-4B55-9B69-12204047D1E4@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37D:EE_|SA3PR12MB8021:EE_ X-MS-Office365-Filtering-Correlation-Id: f042fea1-ab06-461f-a36f-08deaf4eec48 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|1800799024|7416014|376014|56012099003|22082099003|18002099003|11063799002; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: cOGXfhaPsIlq6Vbr45rpKoBVLDh+Ug8bcVvdossImhp0tzvpEhZfQEmZGjkR3IKEmxRhYdH7Fb8AthbLeGvODpt7WdCSyDKFHsFtf8KCZSpLG9gQ40jtPEe/kHls1CvgBMbm2tmvehg2GpO9uT8HTtMPE0/7Mbvtzjt0OmKSK3PGs8RZZUwnZJOtTEeZaIyxLooNwa8tFBfZL2WCp3WIPdEXAKi5nBbvACMyDA5hZKgBl8vf5JP03oRyUKv2UZX7t89m8m5fJ8bVrLilhbibphWuu2/EJ1DW02qGUC5TnBi2qgr1a6/n+SavT1BOczu+C4LJbVusi3Jzj4LsneHM3rPAyOqP0GuWhfz6zjhpfXASIlJSamYMTshPjffDUVKBSDyO8yzXImxv7yNfUWp+p+K/NdfqXDBqt0+UnUhUrSrsrPf29dy5W8o59m/AIk1X X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 11:17:43.8846 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f042fea1-ab06-461f-a36f-08deaf4eec48 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8021 X-purgate-ID: tlsNG-ef75cf/1778498272-0AF76C48-5BFDBE7F/0/0 X-purgate-type: clean X-purgate-size: 2005 On 11-May-26 13:07, Luca Fancellu wrote: > Hi Michal, > >>> >>>>>>> + >>>>>>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>>>>>> + const struct xen_domctl_createdomain *config) >>>>>> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >>>>>> MPU, MMU) but they do not have anything that would prevent from generalizing >>>>>> them in a single function. >>>>> >>>>> I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? >>>>> >>>>> Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed >>>>> Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed >>>>> Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed >>>> What's the reason for allowing NONE for MPU here? None denotes property not >>>> specified but at this point it should be set to a default. >>> >>> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lead to PMSA at EL1 >> NONE denotes property not set i.e. set a default. IMO at the place where we set >> a default, NONE should be switched to PMSA. This is a cleaner solution than >> giving two options the same meaning. Sanitization could then verify that indeed >> the default setting took place. > > Ok so this is a bit different from how all other *_NONE are handled currently (TEE and SCI). > > So on MPU Arm32/64 now we will stop the domain creation if NONE is passed, is that the behaviour > you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get this because we will switch > during DT parse) I think the confusion is that you are mixing the meaning of none (i.e. I don't want it) with not set. In case of TEE and SCI, none means you I don't want TEE or SCI, please disable them. Now, how would this look like for MPU. I don't want PMSA or VMSA? This does not make any sense because it's something impossible. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 11:27:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:27:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306082.1578172 (Exim 4.92) (envelope-from ) id 1wMOnS-0004m2-0R; Mon, 11 May 2026 11:27:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306082.1578172; Mon, 11 May 2026 11:27:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOnR-0004lv-Tr; Mon, 11 May 2026 11:27:37 +0000 Received: by outflank-mailman (input) for mailman id 1306082; Mon, 11 May 2026 11:27:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOnQ-0004kV-Hk for xen-devel@lists.xenproject.org; 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I can see 3 definitions (Arm64 M= PU, Arm32 >>>>>>> MPU, MMU) but they do not have anything that would prevent from gen= eralizing >>>>>>> them in a single function. >>>>>>=20 >>>>>> I can do a common one I think, just to be aligned, should the common= one behaves as the current implementation? >>>>>>=20 >>>>>> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_= MSA_NONE allowed >>>>>> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NO= NE,PMSA,VMSA} allowed >>>>>> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NO= NE,PMSA} allowed >>>>> What's the reason for allowing NONE for MPU here? None denotes proper= ty not >>>>> specified but at this point it should be set to a default. >>>>=20 >>>> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid an= d lead to PMSA at EL1 >>> NONE denotes property not set i.e. set a default. IMO at the place wher= e we set >>> a default, NONE should be switched to PMSA. This is a cleaner solution = than >>> giving two options the same meaning. Sanitization could then verify tha= t indeed >>> the default setting took place. >>=20 >> Ok so this is a bit different from how all other *_NONE are handled curr= ently (TEE and SCI). >>=20 >> So on MPU Arm32/64 now we will stop the domain creation if NONE is passe= d, is that the behaviour >> you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get thi= s because we will switch >> during DT parse) > I think the confusion is that you are mixing the meaning of none (i.e. I = don't > want it) with not set. In case of TEE and SCI, none means you I don't wan= t TEE > or SCI, please disable them. Now, how would this look like for MPU. I don= 't want > PMSA or VMSA? This does not make any sense because it's something impossi= ble. ok makes sense, I will then: Arm 64/32 MMU: allow only XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE Arm 64 MPU: allow XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{PMSA,VMSA} Arm 32 MPU: allow XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 12:27:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 12:27:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306111.1578180 (Exim 4.92) (envelope-from ) id 1wMPim-0004XL-53; Mon, 11 May 2026 12:26:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306111.1578180; Mon, 11 May 2026 12:26:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPim-0004XE-2C; Mon, 11 May 2026 12:26:52 +0000 Received: by outflank-mailman (input) for mailman id 1306111; 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CPUID-wise, > while its and FRED's enumerators were already introduced, their dependency > still needs adding. > > While adding a testcase, also add a SWAPGS one. In order to not affect > the behavior of pre-existing tests, install write_{segment,msr} hooks > only transiently. > > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Mon May 11 12:37:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 12:37:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306124.1578189 (Exim 4.92) (envelope-from ) id 1wMPtD-0006RX-2d; Mon, 11 May 2026 12:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306124.1578189; Mon, 11 May 2026 12:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPtD-0006RQ-02; Mon, 11 May 2026 12:37:39 +0000 Received: by outflank-mailman (input) for mailman id 1306124; Mon, 11 May 2026 12:37:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPtB-0006RK-DO for xen-devel@lists.xenproject.org; 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Message-ID: Date: Mon, 11 May 2026 13:37:29 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] x86/MCE: adjust S3 resume handling To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <1e0a8808-4594-4574-819b-1a75d104294d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1e0a8808-4594-4574-819b-1a75d104294d@suse.com> Content-Type: text/plain; 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The additional "bsp" boolean needs to be used (and > propagated as necessary) instead. > > While touching intel_init_thermal(), constify its 1st parameter, which > in turn requires touching intel_thermal_supported() as well. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper This is all horrible. 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>> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >>=20 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 >> + >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> uint8_t gic_version; >> @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { >> uint32_t clock_frequency; >> /* IN */ >> uint8_t arm_sci_type; >> + /* IN */ >> + uint8_t v8r_el1_msa; >> }; >=20 > Can you please take the opportunity and insert (and check) explicit > padding, so that the next uint8_t field addition won't require ... >=20 >> --- a/xen/include/public/domctl.h >> +++ b/xen/include/public/domctl.h >> @@ -30,9 +30,9 @@ >> * fields) don't require a change of the version. >> * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! >> * >> - * Last version bump: Xen 4.19 >> + * Last version bump: Xen 4.22 >> */ >> -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 >> +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 >=20 > ... such a bump? Yes, will be part of v6, thanks for your review. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 13:03:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:03:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306146.1578208 (Exim 4.92) (envelope-from ) id 1wMQIU-0002id-BA; Mon, 11 May 2026 13:03:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306146.1578208; Mon, 11 May 2026 13:03:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQIU-0002iW-8F; Mon, 11 May 2026 13:03:46 +0000 Received: by outflank-mailman (input) for mailman id 1306146; Mon, 11 May 2026 13:03:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQIS-0002iO-BG for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:03:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQIR-006Tjw-ON for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:03:43 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01d3aa-bab6-0a2a0a5309dd-0a2a450aa54c-12 for ; Mon, 11 May 2026 15:03:43 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01d3af-56b3-0a2a450a0019-d155dd33b85a-3 for ; Mon, 11 May 2026 15:03:43 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d76dd4ee8so3939332f8f.2 for ; Mon, 11 May 2026 06:03:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778504623-7C67F8B7-96893E8B/0/0 X-purgate-type: clean X-purgate-size: 212 1: re-work Xen artifacts collection 2: collect certain intermediate files as artifacts Pipeline (PPC intentionally broken): https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 13:04:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:04:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306153.1578217 (Exim 4.92) (envelope-from ) id 1wMQJF-0003BY-JM; Mon, 11 May 2026 13:04:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306153.1578217; Mon, 11 May 2026 13:04:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJF-0003BR-GE; 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Mon, 11 May 2026 06:04:30 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 15:04:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 1/2] CI: re-work Xen artifacts collection From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778504671-7377D8B7-AF9A630E/0/0 X-purgate-type: clean X-purgate-size: 1989 There's no need to do this separately from three places. Once moved to the bottom of the script, the need for this to be a function also disappears. While there also make sure xen-syms is collected. This is rather more useful for analysis of possible problems than its stripped counterpart. Signed-off-by: Jan Beulich --- a/automation/scripts/build +++ b/automation/scripts/build @@ -44,30 +44,15 @@ cp xen/.config xen-config # Directory for the artefacts to be dumped into mkdir -p binaries -collect_xen_artefacts() -{ - local f - - for f in xen/xen xen/xen.efi; do - if [[ -f $f ]]; then - cp $f binaries/ - fi - done -} - if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Cppcheck analysis invokes Xen-only build xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) # Preserve artefacts - collect_xen_artefacts cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Xen-only build make -j$(nproc) xen - - # Preserve artefacts - collect_xen_artefacts else # Full build. Figure out our ./configure options cfgargs=("--prefix=/usr") @@ -108,9 +93,16 @@ else make -j$(nproc) dist # Preserve artefacts - # Note: Some smoke tests depending on finding binaries/xen on a full build - # even though dist/ contains everything, while some containers don't even - # build Xen (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz - collect_xen_artefacts fi + +# Preserve Xen artefacts +# +# Note: Some smoke tests depend on finding binaries/xen on a full build +# even though dist/ contains everything, while some containers don't even +# build Xen. +for f in xen/xen xen/xen-syms xen/xen.efi; do + if [[ -f $f ]]; then + cp $f binaries/ + fi +done From xen-devel-bounces@lists.xenproject.org Mon May 11 13:05:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:05:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306158.1578225 (Exim 4.92) (envelope-from ) id 1wMQJj-0003bg-Qy; Mon, 11 May 2026 13:05:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306158.1578225; Mon, 11 May 2026 13:05:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJj-0003bZ-O6; Mon, 11 May 2026 13:05:03 +0000 Received: by outflank-mailman (input) for mailman id 1306158; Mon, 11 May 2026 13:05:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJi-0003bJ-4o for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:05:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQJh-00DB1g-HZ for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:05:01 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01d3fb-2eae-0a2a0a5409dd-0a2a450ba71a-6 for ; Mon, 11 May 2026 15:05:01 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01d3fd-212f-0a2a450b0019-d1558030bd12-3 for ; Mon, 11 May 2026 15:05:01 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b0046078so35992875e9.1 for ; Mon, 11 May 2026 06:05:01 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 11 May 2026 06:05:00 -0700 (PDT) Message-ID: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> Date: Mon, 11 May 2026 15:05:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 2/2] CI: collect certain intermediate files as artifacts From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778504701-22589F3B-C2F86D50/0/0 X-purgate-type: clean X-purgate-size: 2753 When one of the linking passes fails, additional intermediate files are still in place. Having them available for analysis of the underlying problem can be pretty helpful. Collect some into a new intermediates/ directory. (Nothing new will be collected if linking succeeds.) As the script is run with -e passed to bash, defer exit if the main "make" (or substituent script thereof) failed. This way more artifacts are collected, potentially making it easier to analyze the failure. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 (with PPC forced to invoke the new logic, hence respective failures there) --- v2: Different approach. --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -6,6 +6,7 @@ artifacts: paths: - binaries/ + - intermediates/ - xen-config - xen-cppcheck.txt - '*.log' --- a/automation/scripts/build +++ b/automation/scripts/build @@ -37,22 +37,24 @@ else make -j$(nproc) -C xen olddefconfig fi -# Save the config file before building because build failure causes the script -# to exit early -- bash is invoked with -e. +# Save the config file before building, just in case. cp xen/.config xen-config -# Directory for the artefacts to be dumped into -mkdir -p binaries +# Directories for artefacts to be dumped into +mkdir -p binaries intermediates + +# Script exit status, to be overridden by the main make's status below. +ret=0 if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Cppcheck analysis invokes Xen-only build - xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) + xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) || ret=$? # Preserve artefacts cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Xen-only build - make -j$(nproc) xen + make -j$(nproc) xen || ret=$? else # Full build. Figure out our ./configure options cfgargs=("--prefix=/usr") @@ -90,7 +92,7 @@ else fi ./configure "${cfgargs[@]}" - make -j$(nproc) dist + make -j$(nproc) dist || ret=$? # Preserve artefacts (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz @@ -106,3 +108,12 @@ for f in xen/xen xen/xen-syms xen/xen.ef cp $f binaries/ fi done + +# Preserve Xen intermediate files. Some may be there only upon build failure. +for f in xen/.xen-syms.* xen/.xen.efi.*; do + if [[ -f $f ]]; then + cp $f intermediates/ + fi +done + +exit $ret From xen-devel-bounces@lists.xenproject.org Mon May 11 13:17:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:17:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306171.1578239 (Exim 4.92) (envelope-from ) id 1wMQVj-0005fY-UP; Mon, 11 May 2026 13:17:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306171.1578239; Mon, 11 May 2026 13:17:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQVj-0005fR-R2; Mon, 11 May 2026 13:17:27 +0000 Received: by outflank-mailman (input) for mailman id 1306171; Mon, 11 May 2026 13:17:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by 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I don't see any Fixes: tag in the mentioned patch series and also based on cover letter it doesn't really clear what this patch series is fixing. Could you please clarify? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 13:41:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:41:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306195.1578257 (Exim 4.92) (envelope-from ) id 1wMQtD-0002D3-1W; Mon, 11 May 2026 13:41:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306195.1578257; Mon, 11 May 2026 13:41:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQtC-0002Cw-Ui; Mon, 11 May 2026 13:41:42 +0000 Received: by outflank-mailman (input) for mailman id 1306195; Mon, 11 May 2026 13:41:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMQtC-0002Cq-4R for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:41:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQtB-00B4U0-3G for xen-devel@lists.xenproject.org; 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich > --- > The observed problem was with a stub generated as Arm64 erratum 843419 > workaround. Such stubs' symbols (imo wrongly) are associated with the last > input object, rather than the input object they belong to. Also for other > kinds of stubs, afaict. See > https://sourceware.org/bugzilla/show_bug.cgi?id=34140. > > As per the above, having a Fixes: tag here is questionable. > > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no > ifeq ($(CONFIG_DEBUG_INFO),y) > $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" > endif > - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S > + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ > + > $(dot-target).0s.S > $(MAKE) $(build)=$(@D) .$(@F).0s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ > @@ -210,6 +211,7 @@ endif > > $(dot-target).1r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).1s.S > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > @@ -220,6 +222,7 @@ endif > > $(dot-target).2r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).2s.S > $(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o > $(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o) > --- a/xen/tools/symbols.c > +++ b/xen/tools/symbols.c > @@ -66,6 +66,7 @@ int token_profit[0x10000]; > unsigned char best_table[256][2]; > unsigned char best_table_len[256]; > > +static const char *srcname = "xen-syms.S"; > > static void usage(void) > { > @@ -356,6 +357,7 @@ static void write_src(void) > printf("#define ALGN 4\n"); > printf("#endif\n"); > > + printf("\t.file \"%s\"\n", srcname); > printf("\t.section .rodata, \"a\"\n"); > > printf("#ifndef SYMBOLS_ORIGIN\n"); > @@ -679,6 +681,8 @@ int main(int argc, char **argv) > unsorted = true; > else if (strcmp(argv[i], "--sort-by-name") == 0) > sort_by_name = 1; > + else if (strncmp(argv[i], "--source-name=", 14) == 0) > + srcname = argv[i] + 14; > else if (strcmp(argv[i], "--warn-dup") == 0) > warn_dup = true; > else if (strcmp(argv[i], "--error-dup") == 0) Why does x86 need to plumb the source name in, but the other architectures don't? xen-syms.S suffices for both x86 builds AFAICT, so can't it just be unconditional? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 13:45:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:45:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306203.1578265 (Exim 4.92) (envelope-from ) id 1wMQx4-0002kb-FV; Mon, 11 May 2026 13:45:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306203.1578265; Mon, 11 May 2026 13:45:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQx4-0002kU-Cw; Mon, 11 May 2026 13:45:42 +0000 Received: by outflank-mailman (input) for mailman id 1306203; Mon, 11 May 2026 13:45:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQx3-0002kO-Rw for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:45:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQx3-00DIsP-8P for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:45:41 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01dd79-e002-0a2a0a5209dd-0a2a450c9c28-34 for ; Mon, 11 May 2026 15:45:41 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01dd84-62f1-0a2a450c0019-d155dd2de8e2-3 for ; Mon, 11 May 2026 15:45:41 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44e5624c053so2436454f8f.2 for ; Mon, 11 May 2026 06:45:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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AFNElJ/gp0hbxZ3hvMFaRqUSIP1k75CbPzEFycXq263laWOWN5/RS4w7ixRHFbLpnoktwdRIbVGreGaFAMA=@lists.xenproject.org X-Gm-Message-State: AOJu0YwnkIX6pAw0XSAZPK5Aoj1Qbc0M9jT6M1Pg/VIEWBa2foD8lYll hIOCi6YvkVNKxaT8S1dPfDl/2/4R0GzbhQg+muwoslaecRBSf8O5DdBHkgmdCQl1jg== X-Gm-Gg: Acq92OHTMIWt9O4UhqGJ4fAKsinEtPmT2olvnFKJMtpO/WVn2MLueOgDtvmmkM7Rzv+ HfwhxuUBBCI9k3tlgcjmFZKUWRfBcO9Jj2z39BeL6LT9OxbBbZ4WMJ2v6XHeqn0S6hKEsi6BE/A EEw6AGehF+AbcdKnXL8WpZLRlalXmuZuNw30KJwHtTPC1Ac9Eqr/MfHLL7Gy4aqUtaDyOFIsTvL IH0BvW871Sk9JWt0ct5z0KHAU1urKE/rs9OT/Ut7TF6XVQA1iGJQnIdMG/HlkO2v2dpwtMjzF6p 7FELQhbFv+QsEzYiMquN/KVR76RzpN4y75Ko6dr96R9cPp+E+qi2mcdqaRiWDvSbiXg2gQHv6UA XmuSJ4VP33XvoOFHGErYjanRL5PXHzOg8Q04nd6M2OWR1fhQjPIGAdfvsVs9Sy1hRASLV2wEXe8 0HR9mJWkXdL/JbJGQl49VZz033NcJ2P2bpzgLxCnDMbQ2xoAmzn36JB58KwNJJoeNutSAqExrYE FKXBJl+GtIQ9KY= X-Received: by 2002:a05:6000:1ac6:b0:43e:a9ba:b194 with SMTP id ffacd0b85a97d-4515d5c6b69mr39595707f8f.34.1778507140425; Mon, 11 May 2026 06:45:40 -0700 (PDT) Message-ID: <4b0f55a1-1e9b-4ce1-b6b6-29b868d57e25@suse.com> Date: Mon, 11 May 2026 15:45:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Code freeze for 4.22 started on May 11, 2026 To: Oleksii Kurochko Cc: Community Manager , "committers@xenproject.org" , Xen-devel References: <2a6117e6-e458-4818-9c22-0c356982eb59@suse.com> <58f80bf6-b9e0-42b8-9f84-831a1c546768@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <58f80bf6-b9e0-42b8-9f84-831a1c546768@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778507141-E3B7CCF5-4321E6A0/0/0 X-purgate-type: clean X-purgate-size: 965 On 11.05.2026 15:34, Oleksii Kurochko wrote: > On 5/11/26 11:41 AM, Jan Beulich wrote: >> On 11.05.2026 11:35, Oleksii Kurochko wrote: >>> I would like to inform you that Code freeze period is started and will >>> be until Fri Jun 05, 2026 (+4 weeks from Feature freeze). >>> >>> Bugfixes may continue to be accepted by maintainers without R-Ack. >> >> Gives me context to ask right away: "x86/mwait-idle: sync up with Linux >> 7.0-rc" has had a few small adjustments and hence would want re-posting. >> Question is: Does that even make sense at this point, i.e. would you >> give it a release-ack despite it not all being bug fixes? > > I don't see any Fixes: tag in the mentioned patch series and also based > on cover letter it doesn't really clear what this patch series is fixing. > > Could you please clarify? It is "fixing" us lagging behind the Linux driver that ours was cloned from. Plus the series was posted well in time. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778507235-71B6F8B7-0703080A/0/0 X-purgate-type: clean X-purgate-size: 1358 On 11.05.2026 15:41, Andrew Cooper wrote: > On 11/05/2026 11:00 am, Jan Beulich wrote: >> --- a/xen/tools/symbols.c >> +++ b/xen/tools/symbols.c >> @@ -66,6 +66,7 @@ int token_profit[0x10000]; >> unsigned char best_table[256][2]; >> unsigned char best_table_len[256]; >> >> +static const char *srcname = "xen-syms.S"; >> >> static void usage(void) >> { >> @@ -356,6 +357,7 @@ static void write_src(void) >> printf("#define ALGN 4\n"); >> printf("#endif\n"); >> >> + printf("\t.file \"%s\"\n", srcname); >> printf("\t.section .rodata, \"a\"\n"); >> >> printf("#ifndef SYMBOLS_ORIGIN\n"); >> @@ -679,6 +681,8 @@ int main(int argc, char **argv) >> unsorted = true; >> else if (strcmp(argv[i], "--sort-by-name") == 0) >> sort_by_name = 1; >> + else if (strncmp(argv[i], "--source-name=", 14) == 0) >> + srcname = argv[i] + 14; >> else if (strcmp(argv[i], "--warn-dup") == 0) >> warn_dup = true; >> else if (strcmp(argv[i], "--error-dup") == 0) > > Why does x86 need to plumb the source name in, but the other > architectures don't? > > xen-syms.S suffices for both x86 builds AFAICT, so can't it just be > unconditional? It could. Yet I'd prefer the distinction between xen.efi and xen-syms to be recognizable (in case any dependent local symbol would show up). Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 13:53:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:53:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306222.1578284 (Exim 4.92) (envelope-from ) id 1wMR46-0005D3-Fv; Mon, 11 May 2026 13:52:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306222.1578284; Mon, 11 May 2026 13:52:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMR46-0005Cw-DF; Mon, 11 May 2026 13:52:58 +0000 Received: by outflank-mailman (input) for mailman id 1306222; Mon, 11 May 2026 13:52:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMR44-0005Cq-Rk for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:52:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMR42-00FE5f-MQ for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:52:54 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01df27-e002-0a2a0a5209dd-0a2a450ca008-44 for ; Mon, 11 May 2026 15:52:54 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01df36-62f1-0a2a450c0019-d1558031d93d-3 for ; Mon, 11 May 2026 15:52:54 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48e82c23840so8884275e9.3 for ; Mon, 11 May 2026 06:52:54 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich I would like to note that with the current staging I can't reproduce this bug anymore with configs I have: 10d417b8b62e (HEAD -> staging, upstream/staging) xen/arm: skip holes in physical address space when setting up frametable 2611377cf9c9 xen/riscv: fix MMIO alignment check in imsic_init() 54ca0aadc821 x86/time: make do_settime() uses more accurate 4526d6763466 x86/time: make early NOW() uses slightly more precise 9f976dec039c xen: introduce CONFIG_HAS_DOMAIN_TYPE bdb30883f352 iommu/amd-vi: do not zero IOMMU MMIO region 4f9457ece11a xsm/flask: Fix undefined behaviour in avc_dump_av() 4ff927133ebc EFI: adjust cfg file buffer freeing 96ffccef5a5f xvmalloc: adjust XVFREE() ordering e8c1feab33cb CI: Refresh the Debian 12 cppcheck container 278953f6c155 (origin/staging, origin/HEAD) automation/gitlab: introduce macOS build jobs But when I switched to origin/HEAD I can reproduce the bug and I applied the suggested patch on top of it and I don't see this bug anymore with this fix: Tested-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 13:58:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:58:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306232.1578293 (Exim 4.92) (envelope-from ) id 1wMR93-00063e-1X; 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Plus the series was posted well in time. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM6PR03MB6070.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20a6b063-9825-4ca8-6df2-08deaf6701f6 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2026 14:10:08.2545 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VOW8xu4AfxP0j6Cqf5LDcJBu4WK/OvgbtdijC4OcgXaWlSTFuUn1k2CRIHVx4U2kmTjOd3FewP3u6X2yCvYoOwmmQqwR7pFuUMSpSi53Yo4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7850 X-purgate-ID: tlsNG-720697/1778508610-8256B161-1303DAF6/0/0 X-purgate-type: clean X-purgate-size: 4202 Hi Jan, Jan Beulich writes: > On 07.05.2026 22:40, Volodymyr Babchuk wrote: >> Jan Beulich writes: >>> On 06.05.2026 11:39, Mykyta Poturai wrote: >>>> On 5/4/26 08:37, Jan Beulich wrote: >>>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>>> From: Stewart Hildebrand >>>>>>>> >>>>>>>> This code is expected to only be used by privileged domains, >>>>>>>> unprivileged domains should not get access to the SR-IOV capabilit= y. >>>>>>>> >>>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to acc= ount >>>>>>>> for possible changes in the system page size register. Also force = VFs to >>>>>>>> always use emulated reads for command register, this is needed to >>>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>>> >>>>>>> This apparently refers to the change to vpci_init_header(). Writes = are >>>>>>> already intercepted. How would a read lead to accidental BAR unmap?= Even >>>>>>> for writes I don't see how a VF driver could accidentally unmap BAR= s, as >>>>>>> the memory decode bit there is hardwired to 0. >>>>>>> >>>>>>>> Discovery of VFs is >>>>>>>> done by Dom0, which must register them with Xen. >>>>>>> >>>>>>> If we intercept control register writes, why would we still require >>>>>>> Dom0 to report the VFs that appear? >>>>>>> >>>>>> >>>>>> Sorry, I don't understand this question. You specifically requested = this >>>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>>> >>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>>> returning "true" >>>>>> > from vpci_process_pending() until the time has passed? This imo = is a >>>>>> no-go. You >>>>>> > want to set a timer and put the vCPU to sleep, to wake it up aga= in >>>>>> when the >>>>>> > timer has expired. That'll then eliminate the need for the >>>>>> not-so-nice patch 4. >>>>>> >>>>>> > Question is whether we need to actually go this far (right away)= . I >>>>>> expect you >>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the= hardware >>>>>> > domain, can't we trust it to set things up correctly, just like = we >>>>>> trust it in >>>>>> > a number of other aspects? >>>>> >>>>> How's any of this related to the question I raised here, or your repl= y >>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created= . >>>>> Why still demand Dom0 to report them then? >>>>> >>>> >>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit = is=20 >>>> set to become alive. We discussed in the V2 that it is not acceptable = to=20 >>>> do a required 100ms wait in Xen while blocking a domain. And not doing= =20 >>>> that blocking would require some mechanism to only allow a domain to r= un=20 >>>> for precisely 99(or more?)ms. You yourself suggested that we can trust= =20 >>>> the hardware domain with registering VFs if we already trust it with=20 >>>> other PCI-related stuff. Did you change your mind, or am I completely= =20 >>>> misunderstanding this question? >>> >>> No, I still think that we can trust hwdom enough. Nevertheless we shoul= d >>> aim at being independent of it where possible. And I seem to recall tha= t >>> I had also outlined an approach how to avoid spin-waiting for 100ms in >>> the hypervisor. >>=20 >> I want to clarify: you are telling that Xen should not wait for hwdom to >> report VFs and instead create them by itself. Is this correct? > > If that's technically possible, yes. Okay, so let's clear this. If I remember correct, you discussed this with Mykyta in the previous version and suggested to put the vCPU to sleep for 100ms. I don't think that this is a good idea, because guest kernel will not be happy about that. So, IMO, it is better to just allows the guest to tell Xen when VFs are ready. Or maybe I am missing something and you had some another idea? --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Mon May 11 14:24:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 14:24:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306255.1578311 (Exim 4.92) (envelope-from ) id 1wMRYL-0002e8-7V; Mon, 11 May 2026 14:24:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306255.1578311; Mon, 11 May 2026 14:24:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRYL-0002e1-4b; Mon, 11 May 2026 14:24:13 +0000 Received: by outflank-mailman (input) for mailman id 1306255; Mon, 11 May 2026 14:24:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMRYK-0002dv-Gw for xen-devel@lists.xenproject.org; Mon, 11 May 2026 14:24:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMRYJ-006jwc-G8 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:24:11 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01e679-5cb7-0a2a0a5109dd-0a2a4505baae-28 for ; Mon, 11 May 2026 16:24:11 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01e68b-aaa8-0a2a45050019-d155802eb863-3 for ; Mon, 11 May 2026 16:24:11 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so49510335e9.2 for ; Mon, 11 May 2026 07:24:11 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Plus the series was posted well in time. It was posted well in time but it wasn't committed before Code freeze started. But considering that it is necessary for new CPUs (as Andrew C. mentioned in one of reply) we want to have that in release. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 14:36:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 14:36:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306266.1578319 (Exim 4.92) (envelope-from ) id 1wMRjs-0004SO-7O; Mon, 11 May 2026 14:36:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306266.1578319; Mon, 11 May 2026 14:36:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRjs-0004SH-3h; Mon, 11 May 2026 14:36:08 +0000 Received: by outflank-mailman (input) for mailman id 1306266; Mon, 11 May 2026 14:36:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRjp-0004SB-Pr for xen-devel@lists.xenproject.org; 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Mon, 11 May 2026 16:35:58 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=a0q201vIKf1vO7S42ZZHRgvkH9wSeEzbBYXM2JnybF8=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=V8MqBWm04AuDl1a1z51cnFDQt+J5C+n/jORdx/RAQe+2faalV6c01fsblUpIpQp48YD7s7Pb8 IcHQVTTHHzBnau8FH18wUekMcTEAcwPth0XUOXC4CMsG7+Ao/GYxH7Ih2hsUIjxkSALZ5QaoNh8 ryJBY+94Bf/nqT9BI+UuJtEJqstecQNve32DAnwKZi3NKKthbnt5BHPeD0C/qVhQ8OGDmDJ+JXv LYtzn5oMugsROh1cTpMdfqvT9Xyx0a/uKwp8hSPhsE3cVWDJ7biFb1HOt6EWH7QJx3V0Mpgmu33 +v6kAk22eqNmeDuPCgrHocsVx/oYGmrZ0l+P9Rwhn5Lg== X-Zone-Loop: 78f179093fe7b0610ca74ffcc80f43a459d16538e9c5 x-campaign-type: default x-transaction-id: 54fdc653-9cd2-4b3b-93d9-8b7273cb7261 x-swg-uid: 01-7354f868-cbc0-4385-9139-e58603462f12 X-Mailer: Sweego Message-ID: <1778510159.8631fc262581453bbf619ec5b2062170.19e17775cf1000f373@vates.tech> x-swg-bid: 1778510159.8631fc262581453bbf619ec5b2062170.19e17775cf1000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Mon, 11 May 2026 16:35:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] nestedsvm: Clear GIF when injecting VMEXIT To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk References: <20260423161112.50221-1-ross.lagerwall@citrix.com> <1777481694.8631fc262581453bbf619ec5b2062170.19dda2a3d88000f373@vates.tech> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------2tCv8lah157BJQF9rpGpL77U" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778510158434 X-purgate-ID: tlsNG-d25034/1778510164-DBD7BCF5-553F3735/0/0 X-purgate-type: clean X-purgate-size: 8354 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------2tCv8lah157BJQF9rpGpL77U Content-Type: multipart/mixed; boundary="------------C0cURaa7BNCpW75c6NUlBXOP"; protected-headers="v1" From: Teddy Astie To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk Message-ID: <00bc6b62-3529-4b55-8626-d25ba9376bda@vates.tech> Subject: Re: [PATCH] nestedsvm: Clear GIF when injecting VMEXIT References: <20260423161112.50221-1-ross.lagerwall@citrix.com> <1777481694.8631fc262581453bbf619ec5b2062170.19dda2a3d88000f373@vates.tech> In-Reply-To: --------------C0cURaa7BNCpW75c6NUlBXOP Content-Type: multipart/mixed; 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>>>>        if ( vmcb->_vintr.fields.vgif_enable ) >>>> -        ASSERT(vmcb->_vintr.fields.vgif == 0); >>>> +        vmcb->_vintr.fields.vgif = 0; >>>>        else >>>> -        ASSERT(svm->ns_gif == 0); >>>> +        nestedsvm_vcpu_clgi(v); >>>>        ns_vmcb = nv->nv_vvmcx; >>> >>> Looks good to me, though I think we are here looking to make a "guest >>> CLGI" (clear GIF), so the vGIF specific logic should be collapsed into >>> nestedsvm_vcpu_clgi() instead of having it as the non-vgif-support >>> case. >>> (as IIUC, vGIF is a hardware accelration for nested GIF handling ?) >> >> Not 100% sure I follow your point here but v2 of this series removes >> nestedsvm_vcpu_clgi() entirely. Does that address your concern? >> >>> >>> (also making me notice that svm_vmexit_do_{stgi,clgi}() seems to lack >>> vGIF specific logic) >>> >> >> Isn't that by design? If vGIF is enabled the hardware should handle >> STGI/CLGI without a VMEXIT. >> > > I think at some point in the future, we may need a > `nestedsvm_vcpu_{stgi,clgi}()` function, or something in that regard; > e.g for emulating this instruction outside of a SVM intercept path > (x86 emulator bits ?). As I think there are cases where the > instruction is not intercepted but still needs to be emulated. > > Such function would need to know whether or not we use vGIF. Yes we will (eventually) want emulation of STGI/CLGI.  It will specifically not reintroduce nestedsvm_vcpu_{stgi,clgi}(). With introspection, we do get arbitrary instructions running through the emulator.  This is why we take care to ensure that the emulator can cope before a feature gets enabled generally. For normal cases, we either have vGIF active and everything is handled without VMExit, or we don't have vGIF active and everything hits the intercept; this is not a split based on hardware support - it includes both L0 and L1's configuration. In fact, vGIF is a feature where on older hardware it's actually faster for L0 to emulate it for L1, because a virtual VMExit/Entry and running the L1 vmexit handler is much slower than L0 just emulating it and re-entering L2 as if nothing had happened.  But that's an optimisation for a later day. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 16:01:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 16:01:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306308.1578338 (Exim 4.92) (envelope-from ) id 1wMT3z-0000Y6-CH; Mon, 11 May 2026 16:00:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306308.1578338; Mon, 11 May 2026 16:00:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMT3z-0000Xz-8k; Mon, 11 May 2026 16:00:59 +0000 Received: by outflank-mailman (input) for mailman id 1306308; Mon, 11 May 2026 16:00:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMT3x-0000Xp-Rv for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:00:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMT3u-007hct-AW for xen-devel@lists.xenproject.org; Mon, 11 May 2026 18:00:54 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01fd25-5cb7-0a2a0a5109dd-0a2a45019b44-18 for ; Mon, 11 May 2026 18:00:54 +0200 Received: from [209.85.208.181] (helo=mail-lj1-f181.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01fd35-c1f2-0a2a45010019-d155d0b5b19b-3 for ; Mon, 11 May 2026 18:00:54 +0200 Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-39393c1b5aaso40018451fa.3 for ; Mon, 11 May 2026 09:00:54 -0700 (PDT) Received: from [10.17.80.122] (ll-74.141.223.85.sovam.net.ua. [85.223.141.74]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-393f6131c08sm28569531fa.30.2026.05.11.09.00.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 May 2026 09:00:52 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778515253; x=1779120053; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=+ug0aCUEmDPdrZzEZL+s+UF5tIuI8VwfPl3ENnEI/bU=; b=Wxnbl9hnWsu9UWf3ytnnBycu+lhrFtPqhA1Oa3jPOWs73v5iFOFhTgnkklL3TZJnt8 UY6DnHn3swnBjPr8lo4aEUabFqNXPswTegfANc709ovqliHgUBOPTK0XcXRqXlcHh0zp oDV1xh++GcucaRfAByYkXxepk8DyGNXBtIvrZ6ZneDSV403JWQtBuL3ksbZRr7quzhty wScZciAOMc0vbirQbiN1+MIXTwbfYnY8DlGANXkwriNlZKuj/ABFqmpS5i9SPxEnsVSI kWz+SvC8c/KftJSaQaFz3Pkkflr+heRBU61iDj8E0IJ0cFOUcsHUIY1IZVqmsXv5zm41 cRwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778515253; x=1779120053; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+ug0aCUEmDPdrZzEZL+s+UF5tIuI8VwfPl3ENnEI/bU=; b=JC1u4SEZUKKNnBWwHTRPX7ASAr4qCDNx4auPWjgzJ+gqnm3ozXbxY5t3uDgC2SYZxc j2Sd+YmTLLlLklva0JtIDkbDHlHliOKE15hWXIYTcWa7RgD3psK3tQWpOvAc8hyaetNU urKbfSTMfvNMympEEXMyqWsCpUAdIVxym4DPlSW3AAyVAIS4+Y17Ou8rgqHYqZGy4n0A PrP6Ffuatp0cQDiX5hYcc2QBkjDNzRkLrbIgM3z0Y6MbcalgW5ddePB3dlH9zweealaa 49Alc+oTl5V36PGPF4HLcEPo4c7SbimMzTiCF/zf37Ih4CjERqHEuRIbHOVpUnnw2nFu jC7w== X-Forwarded-Encrypted: i=1; AFNElJ8Lo0P1LoJ14JAMvOcTdvjUjwa4tiffBzlsOJw7zq7zjrXwEBnYOsq8CQRY7a+QrhY5I7atJweeFiE=@lists.xenproject.org X-Gm-Message-State: AOJu0YyhbzWEaP8RP/8r3gkWOJikpP4y6ZVSd3DgGf82RAMqgBbD0w2s 671+Dku+Sc5rlRD7H5evC3cdc9pwFicNQR13tbvEV1N0zXOVFncuQy7k X-Gm-Gg: Acq92OHycYWSFmqQhylMKVoy3u5xJ0yedIJYBdrK62mFy28uNpKqbZ1zSMYgjV9DJy9 F2pAleBfups842PnxTRINqI33GdL7UOwCZQFBT5dJTOavg5pVWSotZ3ZmM8OSA3eGPpTJjt4c34 hDd6PZ9cLMpukHdEV4MJmZGxkYrs5vvRqC//UMGGNhIixtt9Xo9YuffPMCDPDvOJ6YOgNq46Gm/ TzLrryoA8fRPmMGSGmKREB6rbg4AyIjxjhBHPYTLqMUegnvhiiAU/ZsDLqtvZSPC4CsNkaPPgjk dPfenjyK5RgXqTBP2zfS4j6GBdhCDEJZRbO25FLlF1JV/hurvC3AiRe7HePKeZ8uNxQ5l8sX/bN wy1cHp6w3jiIc2exNS4WlG4eAkFVnNFTXXVhcBCsbgv1CgCMwNOOvJ3Nrhc8YPxPKw+8bl8yiJ1 Z8Ana7a8efdblRoIPrV5dZb5kUKhbb/xJB0WVXCALpIfW5ZI/To9kkz8fyuYw3kW+ZPA== X-Received: by 2002:a2e:bc09:0:b0:393:bffa:d815 with SMTP id 38308e7fff4ca-393f4f1d3edmr38453991fa.21.1778515253066; Mon, 11 May 2026 09:00:53 -0700 (PDT) Message-ID: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> Date: Mon, 11 May 2026 19:00:50 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Mykola Kvach , xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778515254-AC055FF4-57AE83BC/0/0 X-purgate-type: clean X-purgate-size: 7202 On 4/2/26 13:45, Mykola Kvach wrote: Hello Mykola I did not spot any obvious issues with this patch. As far as I can tell, the save/restore register set appears to be complete and correct for the current codebase. Just one observation: there is an API asymmetry between prepare_resume_ctx() and hyp_resume() (save uses pointer, restore hardcodes global) ... > From: Mirela Simonovic > > The context of CPU general purpose and system control registers must be > saved on suspend and restored on resume. This is implemented in > prepare_resume_ctx and before the return from the hyp_resume function. > The prepare_resume_ctx must be invoked just before the PSCI system suspend > call is issued to the ATF. The prepare_resume_ctx must return a non-zero > value so that the calling 'if' statement evaluates to true, causing the > system suspend to be invoked. Upon resume, the context saved on suspend > will be restored, including the link register. Therefore, after > restoring the context, the control flow will return to the address > pointed to by the saved link register, which is the place from which > prepare_resume_ctx was called. To ensure that the calling 'if' statement > does not again evaluate to true and initiate system suspend, hyp_resume > must return a zero value after restoring the context. > > Note that the order of saving register context into cpu_context structure > must match the order of restoring. > > Support for ARM32 is not implemented. Instead, compilation fails with a > build-time error if suspend is enabled for ARM32. > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v8: > - fix alignments in code > > Changes in v7: > - no changes > --- > xen/arch/arm/Makefile | 1 + > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > xen/arch/arm/suspend.c | 14 +++++ > 4 files changed, 130 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/suspend.c > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 69200b2728..c36158271a 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -51,6 +51,7 @@ obj-y += setup.o > obj-y += shutdown.o > obj-y += smp.o > obj-y += smpboot.o > +obj-$(CONFIG_SYSTEM_SUSPEND) += suspend.o > obj-$(CONFIG_SYSCTL) += sysctl.o > obj-y += time.o > obj-y += traps.o > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 596e960152..2cb02ee314 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -562,6 +562,52 @@ END(efi_xen_start) > #endif /* CONFIG_ARM_EFI */ > > #ifdef CONFIG_SYSTEM_SUSPEND > +/* > + * int prepare_resume_ctx(struct cpu_context *ptr) > + * > + * x0 - pointer to the storage where callee's context will be saved ... the C signature takes a pointer (struct cpu_context *ptr) and the save path uses it, ... > + * > + * CPU context saved here will be restored on resume in hyp_resume function. > + * prepare_resume_ctx shall return a non-zero value. Upon restoring context > + * hyp_resume shall return value zero instead. From C code that invokes > + * prepare_resume_ctx, the return value is interpreted to determine whether > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > + */ > +FUNC(prepare_resume_ctx) > + /* Store callee-saved registers */ > + stp x19, x20, [x0], #16 > + stp x21, x22, [x0], #16 > + stp x23, x24, [x0], #16 > + stp x25, x26, [x0], #16 > + stp x27, x28, [x0], #16 > + stp x29, lr, [x0], #16 > + > + /* Store stack-pointer */ > + mov x2, sp > + str x2, [x0], #8 > + > + /* Store system control registers */ > + mrs x2, VBAR_EL2 > + str x2, [x0], #8 > + mrs x2, VTCR_EL2 > + str x2, [x0], #8 > + mrs x2, VTTBR_EL2 > + str x2, [x0], #8 > + mrs x2, TPIDR_EL2 > + str x2, [x0], #8 > + mrs x2, MDCR_EL2 > + str x2, [x0], #8 > + mrs x2, HSTR_EL2 > + str x2, [x0], #8 > + mrs x2, CPTR_EL2 > + str x2, [x0], #8 > + mrs x2, HCR_EL2 > + str x2, [x0], #8 > + > + /* prepare_resume_ctx must return a non-zero value */ > + mov x0, #1 > + ret > +END(prepare_resume_ctx) > > FUNC(hyp_resume) > /* Initialize the UART if earlyprintk has been enabled. */ > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > b enable_secondary_cpu_mm > > mmu_resumed: > - b . > + /* Now we can access the cpu_context, so restore the context here */ > + ldr x0, =cpu_context ... but the restore path hardcodes =cpu_context, ignoring whatever pointer was originally passed. If a caller were to pass anything other than &cpu_context, the resume would load from the wrong location. Since the sole call site does pass &cpu_context (called from system_suspend() in the last patch), this works correctly today — but the API is somewhat misleading. I might be missing something, but why not make prepare_resume_ctx() take no arguments and use =cpu_context directly inside the assembly? That way the save and restore paths would both use the same global, and the API would not be misleading. > + > + /* Restore callee-saved registers */ > + ldp x19, x20, [x0], #16 > + ldp x21, x22, [x0], #16 > + ldp x23, x24, [x0], #16 > + ldp x25, x26, [x0], #16 > + ldp x27, x28, [x0], #16 > + ldp x29, lr, [x0], #16 > + > + /* Restore stack pointer */ > + ldr x2, [x0], #8 > + mov sp, x2 > + > + /* Restore system control registers */ > + ldr x2, [x0], #8 > + msr VBAR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTCR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTTBR_EL2, x2 > + ldr x2, [x0], #8 > + msr TPIDR_EL2, x2 > + ldr x2, [x0], #8 > + msr MDCR_EL2, x2 > + ldr x2, [x0], #8 > + msr HSTR_EL2, x2 > + ldr x2, [x0], #8 > + msr CPTR_EL2, x2 > + ldr x2, [x0], #8 > + msr HCR_EL2, x2 > + isb > + > + /* > + * Since context is restored return from this function will appear > + * as return from prepare_resume_ctx. To distinguish a return from > + * prepare_resume_ctx which is called upon finalizing the suspend, > + * as opposed to return from this function which executes on resume, > + * we need to return zero value here. > + */ > + mov x0, #0 > + ret > END(hyp_resume) > > #endif /* CONFIG_SYSTEM_SUSPEND */ [snip] From xen-devel-bounces@lists.xenproject.org Mon May 11 16:11:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 16:11:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306319.1578347 (Exim 4.92) (envelope-from ) id 1wMTE2-0002Ju-9s; Mon, 11 May 2026 16:11:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306319.1578347; Mon, 11 May 2026 16:11:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMTE2-0002Jn-6l; Mon, 11 May 2026 16:11:22 +0000 Received: by outflank-mailman (input) for mailman id 1306319; Mon, 11 May 2026 16:11:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMTE0-0002Jf-VY for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:11:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMTE0-006ykw-1o for xen-devel@lists.xenproject.org; Mon, 11 May 2026 18:11:20 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01ff99-bab6-0a2a0a5309dd-0a2a4504e8f0-28 for ; Mon, 11 May 2026 18:11:20 +0200 Received: from [209.85.167.48] (helo=mail-lf1-f48.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01ffa7-1dec-0a2a45040019-d155a730dd6d-3 for ; Mon, 11 May 2026 18:11:19 +0200 Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-5a8cb92f26aso1217441e87.1 for ; Mon, 11 May 2026 09:11:19 -0700 (PDT) Received: from [10.17.80.122] (ll-74.141.223.85.sovam.net.ua. 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I don't see >> why it should be separated from the rest of the resume path that is >> added in the next patch > > Ack. I'll combine this with the next patch in v9. > > Best regards, > Mykola > >> >>> This patch adds MMU setup during resume by reusing the existing >>> enable_secondary_cpu_mm function, which enables data cache and the MMU. >>> Before the MMU is enabled, the content of TTBR0_EL2 is changed to point >>> to init_ttbr (page tables used at runtime). >>> >>> Signed-off-by: Mirela Simonovic >>> Signed-off-by: Saeed Nowshadi >>> Signed-off-by: Mykyta Poturai >>> Signed-off-by: Mykola Kvach >>> --- >>> Changes in v7: >>> - no functional changes, just moved commit >>> --- >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S >>> index 72c7b24498..596e960152 100644 >>> --- a/xen/arch/arm/arm64/head.S >>> +++ b/xen/arch/arm/arm64/head.S >>> @@ -561,6 +561,30 @@ END(efi_xen_start) >>> >>> #endif /* CONFIG_ARM_EFI */ >>> >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + >>> +FUNC(hyp_resume) >>> + /* Initialize the UART if earlyprintk has been enabled. */ >>> +#ifdef CONFIG_EARLY_PRINTK >>> + bl init_uart >>> +#endif >>> + PRINT_ID("- Xen resuming -\r\n") >>> + >>> + bl check_cpu_mode >>> + bl cpu_init >>> + >>> + ldr x0, =start >>> + adr x20, start /* x20 := paddr (start) */ >>> + sub x20, x20, x0 /* x20 := phys-offset */ >>> + ldr lr, =mmu_resumed >>> + b enable_secondary_cpu_mm >>> + >>> +mmu_resumed: >>> + b . I also think this patch would be better squashed with the next one, as they are tightly coupled. During the review of patch 11, I had to switch between patches 10 and 11 several times to understand the full context—patch 10 sets up hyp_resume with a placeholder (b .), and patch 11 immediately fills in the actual context restore. >>> +END(hyp_resume) >>> + >>> +#endif /* CONFIG_SYSTEM_SUSPEND */ >>> + >>> /* >>> * Local variables: >>> * mode: ASM >> >> -- >> WBR, Volodymyr > From xen-devel-bounces@lists.xenproject.org Mon May 11 18:52:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:52:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306366.1578356 (Exim 4.92) (envelope-from ) id 1wMVjR-0005wK-9b; Mon, 11 May 2026 18:51:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306366.1578356; Mon, 11 May 2026 18:51:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVjR-0005w4-3t; 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Enable the option by default to make PVH dom0 more robust in its default configuration. Signed-off-by: Roger Pau Monné --- Changes since v1: - Slightly reword an expand option help text. - Mention the change of defaults in CHANGELOG. --- CHANGELOG.md | 2 ++ docs/misc/xen-command-line.pandoc | 8 ++++++-- xen/arch/x86/hvm/emulate.c | 2 +- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ce46020dbdb4..25f5a192ed48 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD ### Changed + - On x86: + - Enable pf-fixup option by default for PVH dom0. ### Added - Support for per-domain Xenstore quota in C xenstored (includes diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..2da90548d8fb 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. * The `pf-fixup` boolean is only applicable when using a PVH dom0 and - defaults to false. + defaults to true. When running dom0 in PVH mode the dom0 kernel has no way to map MMIO regions into its physical memory map, such mode relies on Xen dom0 builder @@ -857,10 +857,14 @@ Controls for how dom0 is constructed on x86 systems. access. However Xen doesn't have a complete picture of the host memory map, due to not being able to process ACPI dynamic tables. - The `pf-fixup` option allows Xen to attempt to add missing MMIO regions + The `pf-fixup` option causes Xen to attempt to add missing MMIO regions to the dom0 physical memory map in response to page-faults generated by dom0 trying to access unpopulated entries in the memory map. + Users having to disable the feature to boot in PVH dom0 mode should report + it to the xen-devel mailing list, together with Xen and dom0 output with the + option enabled. + Enables features on dom0 on Arm systems. * The `sve` integer parameter enables Arm SVE usage for Dom0 and sets the diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..bb1bb03ac4e9 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -165,7 +165,7 @@ void hvmemul_cancel(struct vcpu *v) hvmemul_cache_disable(v); } -bool __ro_after_init opt_dom0_pf_fixup; +bool __ro_after_init opt_dom0_pf_fixup = true; static int hwdom_fixup_p2m(paddr_t addr) { unsigned long gfn = paddr_to_pfn(addr); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 11 18:52:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:52:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306370.1578365 (Exim 4.92) (envelope-from ) id 1wMVk5-0006NJ-FU; Mon, 11 May 2026 18:52:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306370.1578365; Mon, 11 May 2026 18:52:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVk5-0006NC-Bo; Mon, 11 May 2026 18:52:37 +0000 Received: by outflank-mailman (input) for mailman id 1306370; Mon, 11 May 2026 18:52:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVk3-0006N1-J7 for xen-devel@lists.xenproject.org; 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Mon, 11 May 2026 11:52:33 -0700 (PDT) MIME-Version: 1.0 References: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> In-Reply-To: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> From: Mykola Kvach Date: Mon, 11 May 2026 21:52:22 +0300 X-Gm-Features: AVHnY4J3h-b6myBnxQz8_mxa7K4zWtVZ_3YhrYRdOqN1yMuVXJvULZvcvf1b5gI Message-ID: Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778525554-491763FF-87D55BBF/0/0 X-purgate-type: clean X-purgate-size: 8050 Hi Oleksandr, Thank you for the review. On Mon, May 11, 2026 at 7:00=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 4/2/26 13:45, Mykola Kvach wrote: > > Hello Mykola > > I did not spot any obvious issues with this patch. As far as I can tell, > the save/restore register set appears to be complete and correct for the > current codebase. > > Just one observation: there is an API asymmetry between > prepare_resume_ctx() and hyp_resume() (save uses pointer, restore > hardcodes global) ... > > > From: Mirela Simonovic > > > > The context of CPU general purpose and system control registers must be > > saved on suspend and restored on resume. This is implemented in > > prepare_resume_ctx and before the return from the hyp_resume function. > > The prepare_resume_ctx must be invoked just before the PSCI system susp= end > > call is issued to the ATF. The prepare_resume_ctx must return a non-zer= o > > value so that the calling 'if' statement evaluates to true, causing the > > system suspend to be invoked. Upon resume, the context saved on suspend > > will be restored, including the link register. Therefore, after > > restoring the context, the control flow will return to the address > > pointed to by the saved link register, which is the place from which > > prepare_resume_ctx was called. To ensure that the calling 'if' statemen= t > > does not again evaluate to true and initiate system suspend, hyp_resume > > must return a zero value after restoring the context. > > > > Note that the order of saving register context into cpu_context structu= re > > must match the order of restoring. > > > > Support for ARM32 is not implemented. Instead, compilation fails with a > > build-time error if suspend is enabled for ARM32. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v8: > > - fix alignments in code > > > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/Makefile | 1 + > > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++= - > > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > > xen/arch/arm/suspend.c | 14 +++++ > > 4 files changed, 130 insertions(+), 1 deletion(-) > > create mode 100644 xen/arch/arm/suspend.c > > > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > > index 69200b2728..c36158271a 100644 > > --- a/xen/arch/arm/Makefile > > +++ b/xen/arch/arm/Makefile > > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > > obj-y +=3D shutdown.o > > obj-y +=3D smp.o > > obj-y +=3D smpboot.o > > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > > obj-y +=3D time.o > > obj-y +=3D traps.o > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 596e960152..2cb02ee314 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -562,6 +562,52 @@ END(efi_xen_start) > > #endif /* CONFIG_ARM_EFI */ > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > +/* > > + * int prepare_resume_ctx(struct cpu_context *ptr) > > + * > > + * x0 - pointer to the storage where callee's context will be saved > > ... the C signature takes a pointer (struct cpu_context *ptr) and > the save path uses it, ... > > > + * > > + * CPU context saved here will be restored on resume in hyp_resume fun= ction. > > + * prepare_resume_ctx shall return a non-zero value. Upon restoring co= ntext > > + * hyp_resume shall return value zero instead. From C code that invoke= s > > + * prepare_resume_ctx, the return value is interpreted to determine wh= ether > > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > > + */ > > +FUNC(prepare_resume_ctx) > > + /* Store callee-saved registers */ > > + stp x19, x20, [x0], #16 > > + stp x21, x22, [x0], #16 > > + stp x23, x24, [x0], #16 > > + stp x25, x26, [x0], #16 > > + stp x27, x28, [x0], #16 > > + stp x29, lr, [x0], #16 > > + > > + /* Store stack-pointer */ > > + mov x2, sp > > + str x2, [x0], #8 > > + > > + /* Store system control registers */ > > + mrs x2, VBAR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTTBR_EL2 > > + str x2, [x0], #8 > > + mrs x2, TPIDR_EL2 > > + str x2, [x0], #8 > > + mrs x2, MDCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HSTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, CPTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HCR_EL2 > > + str x2, [x0], #8 > > + > > + /* prepare_resume_ctx must return a non-zero value */ > > + mov x0, #1 > > + ret > > +END(prepare_resume_ctx) > > > > FUNC(hyp_resume) > > /* Initialize the UART if earlyprintk has been enabled. */ > > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > > b enable_secondary_cpu_mm > > > > mmu_resumed: > > - b . > > + /* Now we can access the cpu_context, so restore the context h= ere */ > > + ldr x0, =3Dcpu_context > > ... but the restore path hardcodes =3Dcpu_context, ignoring whatever > pointer was originally passed. If a caller were to pass anything other > than &cpu_context, the resume would load from the wrong location. Since > the sole call site does pass &cpu_context (called from system_suspend() > in the last patch), this works correctly today =E2=80=94 but the API is s= omewhat > misleading. > > I might be missing something, but why not make prepare_resume_ctx() take > no arguments and use =3Dcpu_context directly inside the assembly? That wa= y > the save and restore paths would both use the same global, and the API > would not be misleading. Yes, good point. Since the resume path restores from the global context obj= ect, the argument to prepare_resume_ctx() is misleading. I will remove the argument and make both the save and restore paths use the same global resume_cpu_context object. Best regards, Mykola > > > + > > + /* Restore callee-saved registers */ > > + ldp x19, x20, [x0], #16 > > + ldp x21, x22, [x0], #16 > > + ldp x23, x24, [x0], #16 > > + ldp x25, x26, [x0], #16 > > + ldp x27, x28, [x0], #16 > > + ldp x29, lr, [x0], #16 > > + > > + /* Restore stack pointer */ > > + ldr x2, [x0], #8 > > + mov sp, x2 > > + > > + /* Restore system control registers */ > > + ldr x2, [x0], #8 > > + msr VBAR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTTBR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr TPIDR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr MDCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HSTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr CPTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HCR_EL2, x2 > > + isb > > + > > + /* > > + * Since context is restored return from this function will ap= pear > > + * as return from prepare_resume_ctx. To distinguish a return = from > > + * prepare_resume_ctx which is called upon finalizing the susp= end, > > + * as opposed to return from this function which executes on r= esume, > > + * we need to return zero value here. > > + */ > > + mov x0, #0 > > + ret > > END(hyp_resume) > > > > #endif /* CONFIG_SYSTEM_SUSPEND */ > > > [snip] > > From xen-devel-bounces@lists.xenproject.org Mon May 11 18:54:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:54:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306377.1578373 (Exim 4.92) (envelope-from ) id 1wMVlR-0006tC-Ns; Mon, 11 May 2026 18:54:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306377.1578373; Mon, 11 May 2026 18:54:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVlR-0006t5-LL; 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Hello, I would like to inquire about whether changing an option default value could still be accepted: https://lore.kernel.org/xen-devel/20260511185145.23750-1-roger.pau@citrix.com/ This is not new code, just changing a default. I believe this makes dom0 PVH more usable out of the box (see commit message). Thanks, Roger. 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Mon, 11 May 2026 13:41:24 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> <81FE9BB6-2C8D-49B8-86E4-BD1B19B3F76E@arm.com> In-Reply-To: <81FE9BB6-2C8D-49B8-86E4-BD1B19B3F76E@arm.com> From: Mykola Kvach Date: Mon, 11 May 2026 23:41:13 +0300 X-Gm-Features: AVHnY4L6KVcmSANctcbMbzU_-qNRJXjCUsosZNN4ylII2i0mx_ZY4nBcQsbGw5k Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1778532085-7CE7B8B7-A5661A24/0/0 X-purgate-type: clean X-purgate-size: 4638 On Mon, May 11, 2026 at 9:41=E2=80=AFAM Luca Fancellu wrote: > > Hi Mykola, > > > > >> > >>> > >>> For GICC_APRn/GICC_NSAPRn, those registers describe active priority s= tate for > >>> interrupts already acknowledged by the CPU interface. The final suspe= nd path is > >>> not expected to run with an active physical interrupt context. If tho= se > >>> registers were non-zero there, restoring only APR/NSAPR would not mak= e the > >>> corresponding interrupt handling context valid after resume, and coul= d instead > >>> leave the CPU interface with stale active priority state. > >> > >> Ok I understand now, but if we are expecting here GICD_ISACTIVERn zero= ed, why are > >> we saving/restoring it? Shouldn=E2=80=99t we instead have a runtime ch= eck that it=E2=80=99s zero and in case > >> it=E2=80=99s not bail out? And in the resume path we would only zero i= t. > >> > >> Am I missing something? > > > > Good questions. > > > > Yes, the distinction I should have made clearer is between CPU-interfac= e > > active-priority state and distributor active state. > > > > For GICC_APRn/GICC_NSAPRn, I expect the state to be quiesced at this po= int. > > Those registers track active priorities in the CPU interface. Xen reach= es > > gic_suspend() with local interrupts disabled, and for the guest-routed > > interrupt case that can leave a distributor active bit behind, Xen has > > already performed the physical EOI, so the CPU-interface priority has b= een > > dropped. > > There is no CPU-interface active-priority context that we can meaningfu= lly > > replay after resume. > > > > That is different from GICD_ISACTIVERn. In EOImode=3D=3D1, EOIR only dr= ops the > > priority. The interrupt remains active in the distributor until the sep= arate > > deactivation step. For a guest-routed interrupt Xen's GICv2 guest end p= ath does > > only the physical EOI; deactivation is completed later by the virtual G= IC/GICV > > path when the guest completes the interrupt. > > > > This is why APR/NSAPR and ISACTIVERn are treated differently. For examp= le: > > > > 1. A physical IRQ routed to a guest is acknowledged by Xen. > > 2. The GIC marks the interrupt active in the distributor. > > 3. Xen EOIs it, which drops the physical priority. > > 4. Xen queues/injects the interrupt to the vGIC. > > 5. The guest has not yet run, or the virtual interrupt is not yet deli= verable > > because of guest PMR/priority/local IRQ masking/vGIC state. > > 6. Therefore the guest-side deactivate has not happened yet, and the p= hysical > > distributor active bit remains set. > > > > There is also a late suspend window in the current Xen path: domains ar= e > > suspended and the scheduler is disabled before local IRQs are disabled. > > A guest-routed IRQ can therefore be taken by Xen after the guest is alr= eady > > suspended, but before gic_suspend(). Xen can EOI/priority-drop it and q= ueue > > it for the guest, while the guest cannot run and deactivate it before t= he > > GIC state is saved. > > > > This is the same class of issue handled by Linux for GIC EOImode=3D=3D1= . Linux > > saves/restores the active state because forwarded interrupts can remain= active > > while passed to a VM [1]. > > > > So I don't think GICD_ISACTIVERn should be treated as "must be zero" un= less we > > also add an explicit suspend-abort/quiesce policy for in-flight guest > > interrupts. That would be a different design: detect non-zero active/in= -flight > > state, unwind suspend, thaw domains, let the guest drain/deactivate the > > interrupts, and retry later. This series does not implement that policy= . Given > > the current flow, preserving GICD_ISACTIVERn avoids losing architectura= l > > interrupt-controller state across suspend/resume. > > > > I am not opposed to such a policy as a follow-up if we want stricter su= spend > > quiescence rules, but I think it should be designed explicitly rather t= han > > inferred from the GIC save/restore code. > > > > Best regards, > > Mykola > > > > [1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/1447701= 208-18150-5-git-send-email-marc.zyngier@arm.com/ > > Right, yes I agree! I have another question though, since GICC_APRn state= should be > quiesced in the suspend path (allimplemented active-priority bits should = read as zero), > should we have a runtime check just after disabling the CPU interface? Yes, I think a runtime check is appropriate here. Best regards, Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Tue May 12 01:39:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 01:39:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306497.1578392 (Exim 4.92) (envelope-from ) id 1wMc5G-0006ls-Ie; Tue, 12 May 2026 01:38:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306497.1578392; Tue, 12 May 2026 01:38:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc5G-0006lj-Da; Tue, 12 May 2026 01:38:54 +0000 Received: by outflank-mailman (input) for mailman id 1306497; Tue, 12 May 2026 01:38:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc5F-0006ld-8d for xen-devel@lists.xenproject.org; Tue, 12 May 2026 01:38:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMc5E-00CVao-MA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 03:38:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a028472-2eae-0a2a0a5409dd-0a2a4506b7fe-36 for ; Tue, 12 May 2026 03:38:52 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0284ab-7371-0a2a45060019-ac6904feb2f2-3 for ; Tue, 12 May 2026 03:38:52 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 0FB0960055; Tue, 12 May 2026 01:38:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95B27C2BCB0; Tue, 12 May 2026 01:38:50 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778549930; bh=8yKlDYprkgFD+kXbd1+3tO2NcMOvkhTdD+b0zY6Bwgg=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=pBNl3uf5nH7g8NANprrSypC3QbgSBw6YLGTCJJ55dpByV0ewjskUvOIdPP9x2cmax R2hhQHrqpp+P01Y3kLy5cngcYTbOzFAsXQ4fON2zFmkk1mNUj+any9ANyzargQlxR8 Nt3wd2CgqmkDIkE1OTuvMFWH9nNFCvxA9CqI+IrYnxV28EsiF293suEjCr8l2+Mgc7 Rk5HsSijJdS3FOC7TfeRypycelBxw94oGSu6x7+QGjaG1PO8ESzrtY4TLXZrIWoSUz vCHiX2nTncnVUQnMG7oZMSbkjCobd9zrJCjnzPG6oRfGhE5myAkg737jv4W5qESPS7 BEq4YmayosTAg== Date: Mon, 11 May 2026 18:38:49 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH v2 1/2] CI: re-work Xen artifacts collection In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-16d1c6/1778549932-8596CD75-DB421C3C/0/0 X-purgate-type: clean X-purgate-size: 2216 On Mon, 11 May 2026, Jan Beulich wrote: > There's no need to do this separately from three places. Once moved to the > bottom of the script, the need for this to be a function also disappears. > > While there also make sure xen-syms is collected. This is rather more > useful for analysis of possible problems than its stripped counterpart. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -44,30 +44,15 @@ cp xen/.config xen-config > # Directory for the artefacts to be dumped into > mkdir -p binaries > > -collect_xen_artefacts() > -{ > - local f > - > - for f in xen/xen xen/xen.efi; do > - if [[ -f $f ]]; then > - cp $f binaries/ > - fi > - done > -} > - > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Cppcheck analysis invokes Xen-only build > xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) > > # Preserve artefacts > - collect_xen_artefacts > cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt > elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Xen-only build > make -j$(nproc) xen > - > - # Preserve artefacts > - collect_xen_artefacts > else > # Full build. Figure out our ./configure options > cfgargs=("--prefix=/usr") > @@ -108,9 +93,16 @@ else > make -j$(nproc) dist > > # Preserve artefacts > - # Note: Some smoke tests depending on finding binaries/xen on a full build > - # even though dist/ contains everything, while some containers don't even > - # build Xen > (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz > - collect_xen_artefacts > fi > + > +# Preserve Xen artefacts > +# > +# Note: Some smoke tests depend on finding binaries/xen on a full build > +# even though dist/ contains everything, while some containers don't even > +# build Xen. > +for f in xen/xen xen/xen-syms xen/xen.efi; do > + if [[ -f $f ]]; then > + cp $f binaries/ > + fi > +done > From xen-devel-bounces@lists.xenproject.org Tue May 12 01:40:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 01:40:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306504.1578401 (Exim 4.92) (envelope-from ) id 1wMc6z-0008Bd-Sz; Tue, 12 May 2026 01:40:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306504.1578401; Tue, 12 May 2026 01:40:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc6z-0008BW-Ou; Tue, 12 May 2026 01:40:41 +0000 Received: by outflank-mailman (input) for mailman id 1306504; Tue, 12 May 2026 01:40:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc6y-0008BQ-EH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 01:40:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMc6x-007pn1-OB for xen-devel@lists.xenproject.org; Tue, 12 May 2026 03:40:39 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02845f-bab6-0a2a0a5309dd-0a2a450ab7bc-30 for ; Tue, 12 May 2026 03:40:39 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a028516-56b3-0a2a450a0019-aceafc1f9a3e-3 for ; Tue, 12 May 2026 03:40:39 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 5D1434452E; Tue, 12 May 2026 01:40:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DFEBC2BCB0; Tue, 12 May 2026 01:40:37 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778550037; bh=WCPI3dg8DDCJlpoPRAjEBYQiGGCHc21thDzCEXK8g74=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=iz0i5OXtoc9GL0oQ2CXsNwvuNChREi6mxIBhONyw7M+pqM5zD1Yc9Ooqd6aiRDw8p LWFVSuRC+1BL55fSIM8g/OJeOsmMc3kXZwxsVxXRids722Vg/wOGC653oSm3kq27ex LuP3xYoY0HtQV0BTLv9vc/vUPwKpCyp6hzXbeou5pn4rT4OPcWpJeRnLzCWgocdu9R Aq9Dl5LiaNIX2gTvaoNnNkT+uIveCZgOaPAYW4AdG2wovqI8/KEmW7kRZ8S4ws/vUU bwtiGS/2knMqoXNwKPMAKvqt/qQRSu6DqDmUY47EkXYgbQoDYnW9Xa98CCcfTgY+FZ 3K3FpoQIw21Ag== Date: Mon, 11 May 2026 18:40:36 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH v2 2/2] CI: collect certain intermediate files as artifacts In-Reply-To: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> Message-ID: References: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-4011c0/1778550039-705648B7-8D5D352F/0/0 X-purgate-type: clean X-purgate-size: 3020 On Mon, 11 May 2026, Jan Beulich wrote: > When one of the linking passes fails, additional intermediate files are > still in place. Having them available for analysis of the underlying > problem can be pretty helpful. Collect some into a new intermediates/ > directory. (Nothing new will be collected if linking succeeds.) > > As the script is run with -e passed to bash, defer exit if the main > "make" (or substituent script thereof) failed. This way more artifacts > are collected, potentially making it easier to analyze the failure. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 > (with PPC forced to invoke the new logic, hence respective failures there) > --- > v2: Different approach. > > --- a/automation/gitlab-ci/build.yaml > +++ b/automation/gitlab-ci/build.yaml > @@ -6,6 +6,7 @@ > artifacts: > paths: > - binaries/ > + - intermediates/ > - xen-config > - xen-cppcheck.txt > - '*.log' > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -37,22 +37,24 @@ else > make -j$(nproc) -C xen olddefconfig > fi > > -# Save the config file before building because build failure causes the script > -# to exit early -- bash is invoked with -e. > +# Save the config file before building, just in case. > cp xen/.config xen-config > > -# Directory for the artefacts to be dumped into > -mkdir -p binaries > +# Directories for artefacts to be dumped into > +mkdir -p binaries intermediates > + > +# Script exit status, to be overridden by the main make's status below. > +ret=0 > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Cppcheck analysis invokes Xen-only build > - xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) > + xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) || ret=$? > > # Preserve artefacts > cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt > elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Xen-only build > - make -j$(nproc) xen > + make -j$(nproc) xen || ret=$? > else > # Full build. Figure out our ./configure options > cfgargs=("--prefix=/usr") > @@ -90,7 +92,7 @@ else > fi > > ./configure "${cfgargs[@]}" > - make -j$(nproc) dist > + make -j$(nproc) dist || ret=$? > > # Preserve artefacts > (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz > @@ -106,3 +108,12 @@ for f in xen/xen xen/xen-syms xen/xen.ef > cp $f binaries/ > fi > done > + > +# Preserve Xen intermediate files. Some may be there only upon build failure. > +for f in xen/.xen-syms.* xen/.xen.efi.*; do > + if [[ -f $f ]]; then > + cp $f intermediates/ > + fi > +done > + > +exit $ret > From xen-devel-bounces@lists.xenproject.org Tue May 12 06:20:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 06:20:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306561.1578430 (Exim 4.92) (envelope-from ) id 1wMgTX-0001Nl-Ot; Tue, 12 May 2026 06:20:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306561.1578430; Tue, 12 May 2026 06:20:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgTX-0001Nd-JU; Tue, 12 May 2026 06:20:15 +0000 Received: by outflank-mailman (input) for mailman id 1306561; Tue, 12 May 2026 06:20:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgTW-0001NX-6N for xen-devel@lists.xenproject.org; Tue, 12 May 2026 06:20:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMgTT-006t8m-Ht for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:20:13 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02c68b-e002-0a2a0a5209dd-0a2a45068d94-30 for ; Tue, 12 May 2026 08:20:12 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02c69c-7371-0a2a45060019-d155dd31adfd-3 for ; Tue, 12 May 2026 08:20:12 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-459bf19e87bso876161f8f.1 for ; Mon, 11 May 2026 23:20:12 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <877bparq9t.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778566812-8EF89D75-7771194F/0/0 X-purgate-type: clean X-purgate-size: 4311 On 11.05.2026 16:10, Volodymyr Babchuk wrote: > Hi Jan, > > Jan Beulich writes: > >> On 07.05.2026 22:40, Volodymyr Babchuk wrote: >>> Jan Beulich writes: >>>> On 06.05.2026 11:39, Mykyta Poturai wrote: >>>>> On 5/4/26 08:37, Jan Beulich wrote: >>>>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>>>> From: Stewart Hildebrand >>>>>>>>> >>>>>>>>> This code is expected to only be used by privileged domains, >>>>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>>>> >>>>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>>>> always use emulated reads for command register, this is needed to >>>>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>>>> >>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>>>> the memory decode bit there is hardwired to 0. >>>>>>>> >>>>>>>>> Discovery of VFs is >>>>>>>>> done by Dom0, which must register them with Xen. >>>>>>>> >>>>>>>> If we intercept control register writes, why would we still require >>>>>>>> Dom0 to report the VFs that appear? >>>>>>>> >>>>>>> >>>>>>> Sorry, I don't understand this question. You specifically requested this >>>>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>>>> >>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>>>> returning "true" >>>>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>>>> no-go. You >>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>>>> when the >>>>>>> > timer has expired. That'll then eliminate the need for the >>>>>>> not-so-nice patch 4. >>>>>>> >>>>>>> > Question is whether we need to actually go this far (right away). I >>>>>>> expect you >>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>>>> > domain, can't we trust it to set things up correctly, just like we >>>>>>> trust it in >>>>>>> > a number of other aspects? >>>>>> >>>>>> How's any of this related to the question I raised here, or your reply >>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>>>> Why still demand Dom0 to report them then? >>>>>> >>>>> >>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>>>> set to become alive. We discussed in the V2 that it is not acceptable to >>>>> do a required 100ms wait in Xen while blocking a domain. And not doing >>>>> that blocking would require some mechanism to only allow a domain to run >>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>>>> the hardware domain with registering VFs if we already trust it with >>>>> other PCI-related stuff. Did you change your mind, or am I completely >>>>> misunderstanding this question? >>>> >>>> No, I still think that we can trust hwdom enough. Nevertheless we should >>>> aim at being independent of it where possible. And I seem to recall that >>>> I had also outlined an approach how to avoid spin-waiting for 100ms in >>>> the hypervisor. >>> >>> I want to clarify: you are telling that Xen should not wait for hwdom to >>> report VFs and instead create them by itself. Is this correct? >> >> If that's technically possible, yes. > > Okay, so let's clear this. If I remember correct, you discussed this > with Mykyta in the previous version and suggested to put the vCPU to > sleep for 100ms. I don't think I did (except perhaps from a very abstract perspective), precisely because of ... > I don't think that this is a good idea, because guest > kernel will not be happy about that. ... this. Instead iirc I suggested to refuse (short-circuit) handling VF register accesses for the next 100ms. Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 06:27:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 06:27:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306570.1578439 (Exim 4.92) (envelope-from ) id 1wMgZq-000219-F8; Tue, 12 May 2026 06:26:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306570.1578439; Tue, 12 May 2026 06:26:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgZq-000211-BN; Tue, 12 May 2026 06:26:46 +0000 Received: by outflank-mailman (input) for mailman id 1306570; Tue, 12 May 2026 06:26:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgZp-00020v-Ba for xen-devel@lists.xenproject.org; Tue, 12 May 2026 06:26:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMgZo-008Opg-L6 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:26:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02c80e-e002-0a2a0a5209dd-0a2a450ac0c8-42 for ; Tue, 12 May 2026 08:26:44 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02c824-56b3-0a2a450a0019-d155dd34ad6c-3 for ; Tue, 12 May 2026 08:26:44 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-459bf19e87bso879573f8f.1 for ; Mon, 11 May 2026 23:26:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260511185145.23750-1-roger.pau@citrix.com> Content-Type: text/plain; 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Enable the option by default to make PVH dom0 more > robust in its default configuration. > > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue May 12 07:32:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 07:32:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306586.1578448 (Exim 4.92) (envelope-from ) id 1wMhbP-0002sK-TG; Tue, 12 May 2026 07:32:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306586.1578448; Tue, 12 May 2026 07:32:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMhbP-0002sD-Q1; Tue, 12 May 2026 07:32:27 +0000 Received: by outflank-mailman (input) for mailman id 1306586; Tue, 12 May 2026 07:32:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMhbO-0002s5-7O for xen-devel@lists.xenproject.org; Tue, 12 May 2026 07:32:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMhbN-009Tbs-2j for xen-devel@lists.xenproject.org; Tue, 12 May 2026 09:32:25 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02d77b-e002-0a2a0a5209dd-0a2a4501eb6c-38 for ; Tue, 12 May 2026 09:32:25 +0200 Received: from [40.107.162.105] (helo=PA4PR04CU001.outbound.protection.outlook.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02d788-c1f2-0a2a45010019-286ba2693bc0-3 for ; Tue, 12 May 2026 09:32:24 +0200 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com (2603:10a6:102:30d::12) by PR3PR03MB6378.eurprd03.prod.outlook.com (2603:10a6:102:5f::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9913.11; Tue, 12 May 2026 07:32:21 +0000 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb]) by PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb%5]) with mapi id 15.20.9891.020; Tue, 12 May 2026 07:32:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:x-ms-exchange-senderadcheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Q2bT+ramku/bOZvmMW0cIyU9Rn6hd7T13T2g6TIPBfOrurHQhLlXUCjjI4/DAchtBP5468XRkoOt/eYIAeoDI9I/T+GLDqZFNqYNMQdjaxzt2dY4N0v4mudpJ/zpnlTWFZUYDQ/vwOMcLETU9v2sVfjRw5KQmo3w9AHQVvsAAUlwLT4C7W7byYg+EFIWJaO7Zlm+Rhsgc2TMqK44ntstdIpwOB0TvNu32X9tx0NUxC/XMVkTEqnn22lARatAbU9LzNbcGtfmkUi/O8vdHLI1O/HZ74EDlkMPWxGaCECYChF25EFuF8+g1FykpP+t7vQTDRipw4TuWzvz5dNM4585dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=x11TnGOl04orQbuqqYgUo62byMZqkXSryoufrsNuqH0=; b=gfsjC8CZMG/c5DKBPJxsH07hhDFrDFqBqaZQWhrY3UBZfW8gIwI9/73o/LsaeVKk/PccTu5s5ZXRgkKa1e3F6hQna496HKiIH6+0mB7ylkKQZpFDlscWQGYu+Dw4llWbO6X9fVZi7vA4Pmg34PRQZzPniBnP86OYemYx9cPciJa+0AidX9opCBexE/k+hVJI0x4XC7OQMhpVh/RGSyPwTDCNHGgaKULPIk8xOeVjJfukYNMir9BJiSI34dVMX2UqEPAa6Man3wsW1esdd/yf5e2AAHDR8q9FNRZIC1eGehtT4xfHxn0Ttm2Dux5Ash7xLKPYV99Sca3JGFCef8DEYg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=x11TnGOl04orQbuqqYgUo62byMZqkXSryoufrsNuqH0=; b=JyUMKLHvAxICUBK64Ol3+C6CoPZLMjceuCEsm5FQfUQeVTkp+T3ET1SHHuXK96t6E04mT2P7eSv3NazK9SP3t9yK806AyuFerbxb/Kf9A7tjsQdOErgJTPMqc4STnweL6MYg00bR8KyAVerdggH2QE91uRilP17KxOZCZIy+1Eiw9DLEuyF+HW2t3RbbGdblfPpxE6o1NXohMLB19rnhVmEan7PRR0NIwKvKrF+zGnvS72MYvYHMcI/SMBcRqLZARgHTO3/A1GgOPrnVtvr81igYaq+YhIRKnVKxBNGBYcnLPklPeyjVvAZ+lhMIO3CaFlQNRX9V6o/CJxUVxgGevg== From: Mykyta Poturai To: Jan Beulich , Volodymyr Babchuk CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , "Daniel P. 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3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A349.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4125 X-purgate-ID: tlsNG-ebf023/1778573702-2B96A3FF-31ED3B11/0/0 X-purgate-type: clean X-purgate-size: 2812 On Arm we stay on the safe side and refuse to create a domain on user requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to the feature not being compiled in. SCI fall through the crack and does not adhere to that i.e. a user request for SCI type other than NONE when CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently ignored. Fix it by not allowing anything else other than NONE if the feature is not enabled. Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, single agent") Signed-off-by: Michal Orzel --- xen/arch/arm/dom0less-build.c | 11 +++++++++-- xen/arch/arm/include/asm/firmware/sci.h | 5 +++++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 6f73c65e5151..52cf788a45ea 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -273,8 +273,7 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_NONE; - if ( !IS_ENABLED(CONFIG_ARM_SCI) || - !dt_property_read_bool(node, "xen,sci_type") ) + if ( !dt_property_read_bool(node, "xen,sci_type") ) return 0; ret = dt_property_read_string(node, "xen,sci_type", &sci_type); @@ -284,7 +283,15 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, if ( !strcmp(sci_type, "none") ) d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_NONE; else if ( !strcmp(sci_type, "scmi_smc") ) + { + if ( !IS_ENABLED(CONFIG_SCMI_SMC) ) + { + printk(XENLOG_ERR "xen,sci_type=scmi_smc requested, but CONFIG_SCMI_SMC not set\n"); + return -EINVAL; + } + d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; + } else { printk(XENLOG_ERR "xen,sci_type in not valid (%s) for domain %s\n", diff --git a/xen/arch/arm/include/asm/firmware/sci.h b/xen/arch/arm/include/asm/firmware/sci.h index 3500216bc250..485ce211c995 100644 --- a/xen/arch/arm/include/asm/firmware/sci.h +++ b/xen/arch/arm/include/asm/firmware/sci.h @@ -148,6 +148,8 @@ int sci_dt_finalize(struct domain *d, void *fdt); int sci_assign_dt_device(struct domain *d, struct dt_device_node *dev); #else +#include + static inline bool sci_domain_is_enabled(struct domain *d) { return false; @@ -162,6 +164,9 @@ static inline int sci_domain_init(struct domain *d, static inline int sci_domain_sanitise_config(struct xen_domctl_createdomain *config) { + if ( config->arch.arm_sci_type != XEN_DOMCTL_CONFIG_ARM_SCI_NONE ) + return -EINVAL; + return 0; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 08:54:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 08:54:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306626.1578466 (Exim 4.92) (envelope-from ) id 1wMise-00062m-0r; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: y8RvMewNYyqngI48n0lc96h0Uz5Nd9nmvSW5LchAbL824ZJK4Ecm3N21LLUfR3C5u7vpRk/1rO6PlZh1eck7qeJTMjbnXJdmjN1XomCcbiedqo6CxwpaDbXXx6L47oOP3jgIr7VtVG2/acjAtUSkhx/mMB0mgU1H9i1JzFivAn/Ukj4m6yAJMW91CxKqMPnSfXK9F9L/7EAGSmGbtwp5fOlmtEeudn0gAiU/zGO9Q5umgLlQ8JACoyMgM9aBWjdqwyKYdrj+HH4SskxkaY2lC/v/oARD4pQi7JRGtqOiMcM4NIWpEwGlGsHmsbscxlzd6nerideZfZNjkGZNSJtq4QyelErf82t9giQ+Qb14fx9CPtJKAF8Gp03AKCr/aOHEzMkGv07qiF4O8P7ad/yO/8TkTn2EACQJED4H/Zm/HgjNXdnfDhffAm5OcU37cMgd X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 08:54:07.4100 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec9faf35-6823-48d1-7412-08deb00406e3 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF00028D0D.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6289 X-purgate-ID: tlsNG-33051d/1778576055-4006F938-3D8BB1D4/0/0 X-purgate-type: clean X-purgate-size: 984 Hi Michal, > On 12 May 2026, at 09:14, Michal Orzel wrote: >=20 > On Arm we stay on the safe side and refuse to create a domain on user > requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to > the feature not being compiled in. SCI fall through the crack and does no= t > adhere to that i.e. a user request for SCI type other than NONE when > CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently > ignored. Fix it by not allowing anything else other than NONE if the > feature is not enabled. >=20 > Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, = single agent") > Signed-off-by: Michal Orzel > --- > xen/arch/arm/dom0less-build.c | 11 +++++++++-- > xen/arch/arm/include/asm/firmware/sci.h | 5 +++++ > 2 files changed, 14 insertions(+), 2 deletions(-) Looks ok to me Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Tue May 12 08:58:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 08:58:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306636.1578475 (Exim 4.92) (envelope-from ) id 1wMiwu-0006l3-H0; Tue, 12 May 2026 08:58:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306636.1578475; Tue, 12 May 2026 08:58:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMiwu-0006kw-Ds; Tue, 12 May 2026 08:58:44 +0000 Received: by outflank-mailman (input) for mailman id 1306636; Tue, 12 May 2026 08:58:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMiws-0006kq-3L for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:58:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMiwr-00325c-GT for xen-devel@lists.xenproject.org; Tue, 12 May 2026 10:58:41 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02ebc0-bab6-0a2a0a5309dd-0a2a45019034-4 for ; Tue, 12 May 2026 10:58:41 +0200 Received: from [52.101.62.35] (helo=DM5PR21CU001.outbound.protection.outlook.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02ebc0-c1f2-0a2a45010019-34653e232d5a-3 for ; Tue, 12 May 2026 10:58:41 +0200 Received: from CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) by CH4PR03MB7603.namprd03.prod.outlook.com (2603:10b6:610:23c::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9913.11; Tue, 12 May 2026 08:58:38 +0000 Received: from CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343]) by CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343%4]) with mapi id 15.20.9891.021; Tue, 12 May 2026 08:58:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=nnxlfFEIl6LbOy5ahady0CbZ3k4PGlQaHE2iX0YaQsxb6oqNE9Lls+PJ/w1IASsy6IjDU0qABeEFZEH2zP+mf2MxpQtItse9pAvnPJgxCLCfNGulB1IBFuiDjhIlYq5UjAzk76OwFv+CjWr/qQ5DPkiHw/e5KZ0CEpFwJJsuhOtEUlXdpkf8phpDOVOMTFeFbxdkUFqV743M1G2DJaIKJ2wcSoVY2dSGCj2lxIIVMDHfipkpULUI63zUr9ltid9Ny6YK3QiCAxiLq84Lijs7+eyIuHC+ce7R1ZExeudXQgGLTyOv9l/9YZepPVTzBZ4PntzmJLX6P1B93GA0qXmphw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=qH4EWmAqN6sVd9w3DT5QYXve3FhDQLaIzlvXI4tn7w8=; b=FjZs75dTFqogmSMMmoqDHnmV2d2SAry+GkyHaEFCHIVTvY4BqDoARPOFKgcpWsRqG0jd6KZHGcXTRn4W/lo5GEeK53fRSbCCZEE4h4i9dhofWDF1CFYeQtMZjmVDTbujgzOV1EOiVRzP1AhRxh+0pjKx8rcbFlOtKueRMoYrHZZPUV1l1TaX4JcqlNx0e88BPuFFAp69sRGgarZVQC9ymxev72tEALAS/Rib4amiiDHGLcY44YBmCoH9g2fCXMOP+p4zuFkc4+4HENTEfaTQyMQWdgIuzNj+DcmIAwv404j6nonSA+ib8hR+h7GO6scgtMQhgeglI6hH2iY2lILfUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qH4EWmAqN6sVd9w3DT5QYXve3FhDQLaIzlvXI4tn7w8=; b=hTSVqqLmUtvXKccTCLImU8P5r6GG+en4bFc8IJs4dfmj2ZIGjsfgpa52/jhb0DwmTstJG1uBsE10nbCxhFUnT2MCRD0r51Ok9wr/fVHSCtDacJWA/YTWywqZVf2rcrBd8OW6Ese3ucl1BzyeE9Vc5PGv1oZTyw/r9goHSnszRNk= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Tue, 12 May 2026 10:58:34 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Mykyta Poturai Cc: Jan Beulich , Volodymyr Babchuk , "Daniel P. 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Recalculate BAR sizes before mapping VFs to account > >>>>>>>>>> for possible changes in the system page size register. Also force VFs to > >>>>>>>>>> always use emulated reads for command register, this is needed to > >>>>>>>>>> prevent some drivers accidentally unmapping BARs. > >>>>>>>>> > >>>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are > >>>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even > >>>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as > >>>>>>>>> the memory decode bit there is hardwired to 0. > >>>>>>>>> > >>>>>>>>>> Discovery of VFs is > >>>>>>>>>> done by Dom0, which must register them with Xen. > >>>>>>>>> > >>>>>>>>> If we intercept control register writes, why would we still require > >>>>>>>>> Dom0 to report the VFs that appear? > >>>>>>>>> > >>>>>>>> > >>>>>>>> Sorry, I don't understand this question. You specifically requested this > >>>>>>>> to be done this way in V2. Quoting your reply from V2 below. > >>>>>>>> > >>>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply > >>>>>>>> returning "true" > >>>>>>>> > from vpci_process_pending() until the time has passed? This imo is a > >>>>>>>> no-go. You > >>>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again > >>>>>>>> when the > >>>>>>>> > timer has expired. That'll then eliminate the need for the > >>>>>>>> not-so-nice patch 4. > >>>>>>>> > >>>>>>>> > Question is whether we need to actually go this far (right away). I > >>>>>>>> expect you > >>>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > >>>>>>>> > domain, can't we trust it to set things up correctly, just like we > >>>>>>>> trust it in > >>>>>>>> > a number of other aspects? > >>>>>>> > >>>>>>> How's any of this related to the question I raised here, or your reply > >>>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. > >>>>>>> Why still demand Dom0 to report them then? > >>>>>>> > >>>>>> > >>>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > >>>>>> set to become alive. We discussed in the V2 that it is not acceptable to > >>>>>> do a required 100ms wait in Xen while blocking a domain. And not doing > >>>>>> that blocking would require some mechanism to only allow a domain to run > >>>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust > >>>>>> the hardware domain with registering VFs if we already trust it with > >>>>>> other PCI-related stuff. Did you change your mind, or am I completely > >>>>>> misunderstanding this question? > >>>>> > >>>>> No, I still think that we can trust hwdom enough. Nevertheless we should > >>>>> aim at being independent of it where possible. And I seem to recall that > >>>>> I had also outlined an approach how to avoid spin-waiting for 100ms in > >>>>> the hypervisor. > >>>> > >>>> I want to clarify: you are telling that Xen should not wait for hwdom to > >>>> report VFs and instead create them by itself. Is this correct? > >>> > >>> If that's technically possible, yes. > >> > >> Okay, so let's clear this. If I remember correct, you discussed this > >> with Mykyta in the previous version and suggested to put the vCPU to > >> sleep for 100ms. > > > > I don't think I did (except perhaps from a very abstract perspective), > > precisely because of ... > > > >> I don't think that this is a good idea, because guest > >> kernel will not be happy about that. > > > > ... this. Instead iirc I suggested to refuse (short-circuit) handling > > VF register accesses for the next 100ms. > > > > Jan > > Do you have any suggestions on how to ensure that we accurately catch > the window where 100ms have already passed, but guests haven’t tried to > read anything yet, to flip this back? As I mentioned in the previous > version, Linux, for example, doesn’t attempt to re-read anything if the > first read failed after 100ms. So it appears to me that this approach > would be prone to racing with the guest for getting to the VF first. One > approach I can think of is to somehow swap the register handlers back > in-flight during the first read by the guest if 100ms have already > passed. However, this would still depend on Dom0 for registering VFs, > but in a more convoluted way. We also can’t add the VFs before 100ms > have passed and add timing checks to all register handlers, because > pci_add_device and everything below it expects the device to be > functional at the moment of addition. > > > > Maybe you see some other way to avoid these problems that I am missing? We could maybe do some middle ground here, kind of similar to what Linux does. The overall idea would be to put on hold any accesses to the device(s) PCI config space for 100ms, that would include the PF and any VFs. At the point when VF enable is set Xen already knows the position of the VFs in the PCI config space. Any PCI config space access attempts to the PF or VFs during that 100ms window would cause the guest vCPU to be put on hold, and the access would only be retried once the 100ms window has passed and Xen has registered the VFs with vPCI. This approach needs extra logic to put vPCI accesses on hold, similar to what Xen does when mapping a BAR into the p2m, and a timer to defer the adding of the Vfs and the unlocking of the affected PCI config space region. That would be a middle ground IMO, as the guest vCPUs could be running freely, unless accesses to the affected PCI config space was attempted before the 100ms window, at which point they would be blocked waiting for the timeout to expire. A well-behaved domain shouldn't try to access the PCI config space either ahead the 100ms window expiring. Roger. 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné > --- > The observed problem was with a stub generated as Arm64 erratum 843419 > workaround. Such stubs' symbols (imo wrongly) are associated with the last > input object, rather than the input object they belong to. Also for other > kinds of stubs, afaict. See > https://sourceware.org/bugzilla/show_bug.cgi?id=34140. > > As per the above, having a Fixes: tag here is questionable. > > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no > ifeq ($(CONFIG_DEBUG_INFO),y) > $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" > endif > - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S > + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ > + > $(dot-target).0s.S > $(MAKE) $(build)=$(@D) .$(@F).0s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ > @@ -210,6 +211,7 @@ endif > > $(dot-target).1r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).1s.S > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > @@ -220,6 +222,7 @@ endif > > $(dot-target).2r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).2s.S Wouldn't it be more accurate to use $(dot-target) as the source name? Maybe $(notdir $(dot-target)).S? I see the default is already set to the target filename for other arches, so not a big deal IMO. Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Vv19JzTfa2MMOurpAFjE/2g5kTKiaqzMI65+hgtNK68pyBSWRaN9Q9V1MUs1a2sTGoYCbj5QOMQsrCuYco3c2BDvrg3BbSXjpwOomYBOagRWBg48mi2CRqiLYLwllSws3XFGASSJk3UPGo9fRmYJw2XcPMk+e2iVwLfWdWdv0l3kz68FroEzuOQ60HTC4rhxi21CUAPmtJ38t9qWMxPmHYmOVuqdlkqS3dNAqlhYJQxRLpFveBwKnnU1MxvzK79K1bwkB+H/KbixDfAwiULlyvMJ05WxTYggKNcUD3eT+60HROAiUCu7GJLNXVoYulPK5ERckYiZwuDiGHeh2d4TpE9YqD0jUYIQ1jCsisNEbXBubvOQStRK9cwQ31xIdgfxHyvq1Fj9e4WRTtwKFxyHYhwo7zRtbIe3YFGP0KML+wK5CfRVLqBsD4ih+eetqWmG X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 09:30:52.9245 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ee8026b-2286-45b1-7371-08deb009297a X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9B.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB11167 X-purgate-ID: tlsNG-d25034/1778578262-F407FCF5-6EFEC896/0/0 X-purgate-type: clean X-purgate-size: 820 Hi Michal, > On 12 May 2026, at 10:14, Michal Orzel wrote: >=20 > On Arm we stay on the safe side and refuse to create a domain on user > requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to > the feature not being compiled in. SCI fall through the crack and does no= t > adhere to that i.e. a user request for SCI type other than NONE when > CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently > ignored. Fix it by not allowing anything else other than NONE if the > feature is not enabled. >=20 > Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, = single agent") > Signed-off-by: Michal Orzel Looks good to me: Reviewed-by: Bertrand Marquis Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Tue May 12 10:28:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 10:28:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306684.1578510 (Exim 4.92) (envelope-from ) id 1wMkLW-00033m-7Y; Tue, 12 May 2026 10:28:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306684.1578510; Tue, 12 May 2026 10:28:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMkLW-00033e-4J; Tue, 12 May 2026 10:28:14 +0000 Received: by outflank-mailman (input) for mailman id 1306684; Tue, 12 May 2026 10:28:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMkLU-00033W-2m for xen-devel@lists.xenproject.org; Tue, 12 May 2026 10:28:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMkLT-000aIq-Fu for xen-devel@lists.xenproject.org; Tue, 12 May 2026 12:28:11 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0300ac-bab6-0a2a0a5309dd-0a2a45039c0c-38 for ; Tue, 12 May 2026 12:28:11 +0200 Received: from [40.107.159.98] (helo=OSPPR02CU001.outbound.protection.outlook.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0300b9-672d-0a2a45030019-286b9f6286d5-3 for ; Tue, 12 May 2026 12:28:09 +0200 Received: from VE1PR03MB6078.eurprd03.prod.outlook.com (2603:10a6:803:113::29) by VI1PR03MB10078.eurprd03.prod.outlook.com (2603:10a6:800:1ca::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9891.23; Tue, 12 May 2026 10:28:06 +0000 Received: from VE1PR03MB6078.eurprd03.prod.outlook.com ([fe80::4722:b91:9b24:ee48]) by VE1PR03MB6078.eurprd03.prod.outlook.com ([fe80::4722:b91:9b24:ee48%4]) with mapi id 15.20.9891.021; Tue, 12 May 2026 10:28:06 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:x-ms-exchange-senderadcheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=b5CjJJ5VmvcEiygxMATkEfLNMjYT0m5YmbzuqaXUTmvjO0hYa2UWs1S3uOFzJxFbZ93rQf1kRbctiTTFsx69TgfhV1aYt9dfLcFEnw47TbvPyv/r33C4zoQ0spFbJReKEEUlvbFhNazYp1CnUP6RFbXLPm0nHkdz11/sqJUkvFGhd0iHzArd2c9Ic/tjusyYZkd6KuyGOBO3rDCmvXo+lJ6NbYEXIr/Bp1XjhzaP7k10F5K/HituZpZNEZ+pn76+CWuSo0z0QtlSCTE1LdrxE1SeHPlDMk4eANcDTOW+dCIf63bTaC9RQhTnsIOnPUmiogDZGtOvuMgzYkMVqhfVpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3iO3TnDT3jNgS1XIX49S5ps9lb9t8niIpRoBJCLC8eY=; b=Je7UM4FR9wwHmsAfoZgAICyxwsqtYpiRXMJmW7niHhj/qlSx58Nu3YTdp6ICvfzbVKeQLHjN0+C9ivzbO8welIVjtald9hr6OdtIS5H0NJIBjH11BaZafWH8qS/pgl0IGIPbWzwQAQWx0Daa0giws51ktKhJJUsI1FyuMXHwqqOucmeA3SCAzeRGT+h11m8g9nhnxhuRo9hif4gHUDHIAOZwvBOseHGTyYQAH+gra7wFeHj2OVuQtPr+VEJ4Eh9AiBFGrRWjYpCXX0qfW4vszCwhpUy39Pt1dqgoF8zFUNpbuJvzgZ0KKPHXcthD2xwHVj0zoHEy5nopaTHYHcVcPg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=3iO3TnDT3jNgS1XIX49S5ps9lb9t8niIpRoBJCLC8eY=; b=VFccf7+SCRC2bI/foY8GNugjFRob3YnJ4Qcq6iynory4dkWBU402rq+dZ6Rh+iIDDb4Ox2EVIxhIxy+v/n5I/wmPQDtt5ATbZqkqxhDNhl+11NSTvdhGBxg2w5ugWhaPeDXPgVrLLv2XNSXWig1S8gQn7l+63/o/BmObLWPo/4+7RfWFP4KGff1Zy3hKG6smjbzF1g/k7TQcC7k3LN/1p1hXcIrcrANGcucB5AKYDY7A2fY9PCX39knrUpld65cKfsEpxNNva2GokCKE4RQ73M5vOKMkiEUvo6GdhzBywt6GKcFyzWe/iwEpzq9Ee7CwoZedIghMghK9PY8tnOYFBw== From: Volodymyr Babchuk To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= CC: Mykyta Poturai , Jan Beulich , "Daniel P. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand , Mykyta Poturai References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> <1d591ff7-599d-4dfa-b521-bfaded430a76@suse.com> <925f2076-f98b-4102-ba45-a85a83861c9f@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778582690-D3563443-EE73FDAD/0/0 X-purgate-type: clean X-purgate-size: 3091 On 12.05.2026 10:58, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 07:32:20AM +0000, Mykyta Poturai wrote: >> On 5/12/26 09:20, Jan Beulich wrote: >>> On 11.05.2026 16:10, Volodymyr Babchuk wrote: >>>> Okay, so let's clear this. If I remember correct, you discussed this >>>> with Mykyta in the previous version and suggested to put the vCPU to >>>> sleep for 100ms. >>> >>> I don't think I did (except perhaps from a very abstract perspective), >>> precisely because of ... >>> >>>> I don't think that this is a good idea, because guest >>>> kernel will not be happy about that. >>> >>> ... this. Instead iirc I suggested to refuse (short-circuit) handling >>> VF register accesses for the next 100ms. >> >> Do you have any suggestions on how to ensure that we accurately catch >> the window where 100ms have already passed, but guests haven’t tried to >> read anything yet, to flip this back? As I mentioned in the previous >> version, Linux, for example, doesn’t attempt to re-read anything if the >> first read failed after 100ms. So it appears to me that this approach >> would be prone to racing with the guest for getting to the VF first. When we do the write to the control register in Xen, our timer will start ticking before the guest's. Hence our 100ms will be over (slightly) earlier, and a well-behaved guest (having waited for the full 100ms according to its own tracking) will be handled fine. >> One >> approach I can think of is to somehow swap the register handlers back >> in-flight during the first read by the guest if 100ms have already >> passed. However, this would still depend on Dom0 for registering VFs, >> but in a more convoluted way. We also can’t add the VFs before 100ms >> have passed and add timing checks to all register handlers, because >> pci_add_device and everything below it expects the device to be >> functional at the moment of addition. I fear I'm not following this. > We could maybe do some middle ground here, kind of similar to what > Linux does. The overall idea would be to put on hold any accesses to > the device(s) PCI config space for 100ms, that would include the PF > and any VFs. For the PF, at most parts of the SR-IOV capability should be thus constrained, I think. > At the point when VF enable is set Xen already knows the > position of the VFs in the PCI config space. > > Any PCI config space access attempts to the PF or VFs during that > 100ms window would cause the guest vCPU to be put on hold, and the > access would only be retried once the 100ms window has passed and Xen > has registered the VFs with vPCI. This approach needs extra logic to > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > into the p2m, and a timer to defer the adding of the Vfs and the > unlocking of the affected PCI config space region. I was meaning to have this done in even simpler a way: Simply record when the VFs were configured, and within the next 100ms terminate all accesses (read all ones, discard writes). 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Tue, 12 May 2026 03:51:34 -0700 (PDT) Message-ID: <5b77896d-4f56-439c-9b7f-c3d83d671066@suse.com> Date: Tue, 12 May 2026 12:51:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] symbols: explicitly specify source file name for symtab To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Oleksii Kurochko References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778583095-D3D67443-AD105564/10/73395122804 X-purgate-type: spam X-purgate-size: 2711 On 12.05.2026 11:20, Roger Pau Monné wrote: > On Mon, May 11, 2026 at 12:00:03PM +0200, Jan Beulich wrote: >> If there are any local symbols in an object file, GNU ld will create an >> STT_FILE symbol derived from the object file name if there is none in the >> incoming symbol table. The object file name, however, varies between >> linking passes. As a result, symbol name compression can yield different >> results if any of those local symbols need retaining (Arm [and RISC-V] >> mapping symbols are omitted, for example). If that difference in >> compression would yield a difference in the sizes of symbol_names[] or >> symbols_token_table[], the compare-symbol-tables sanity check will fail. >> >> Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") >> Reported-by: Oleksii Kurochko >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- a/xen/arch/x86/Makefile >> +++ b/xen/arch/x86/Makefile >> @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no >> ifeq ($(CONFIG_DEBUG_INFO),y) >> $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" >> endif >> - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S >> + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ >> + > $(dot-target).0s.S >> $(MAKE) $(build)=$(@D) .$(@F).0s.o >> $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ >> $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ >> @@ -210,6 +211,7 @@ endif >> > $(dot-target).1r.S >> $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ >> | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> + --source-name=$(@F).S \ >> > $(dot-target).1s.S >> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o >> $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ >> @@ -220,6 +222,7 @@ endif >> > $(dot-target).2r.S >> $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ >> | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> + --source-name=$(@F).S \ >> > $(dot-target).2s.S > > Wouldn't it be more accurate to use $(dot-target) as the source name? > > Maybe $(notdir $(dot-target)).S? Why would that be better (more accurate)? The file names change, so the specified file is "virtual" anyway. I simply don't see why prepending a . would be helpful. > I see the default is already set to the target filename for other > arches, so not a big deal IMO. It's a "virtual" filename also there. No real xen-syms.S is ever created. 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If I remember correct, you discussed this > >>>> with Mykyta in the previous version and suggested to put the vCPU to > >>>> sleep for 100ms. > >>> > >>> I don't think I did (except perhaps from a very abstract perspective), > >>> precisely because of ... > >>> > >>>> I don't think that this is a good idea, because guest > >>>> kernel will not be happy about that. > >>> > >>> ... this. Instead iirc I suggested to refuse (short-circuit) handling > >>> VF register accesses for the next 100ms. > >> > >> Do you have any suggestions on how to ensure that we accurately catch > >> the window where 100ms have already passed, but guests haven’t tried to > >> read anything yet, to flip this back? As I mentioned in the previous > >> version, Linux, for example, doesn’t attempt to re-read anything if the > >> first read failed after 100ms. So it appears to me that this approach > >> would be prone to racing with the guest for getting to the VF first. > > When we do the write to the control register in Xen, our timer will start > ticking before the guest's. Hence our 100ms will be over (slightly) > earlier, and a well-behaved guest (having waited for the full 100ms > according to its own tracking) will be handled fine. > > >> One > >> approach I can think of is to somehow swap the register handlers back > >> in-flight during the first read by the guest if 100ms have already > >> passed. However, this would still depend on Dom0 for registering VFs, > >> but in a more convoluted way. We also can’t add the VFs before 100ms > >> have passed and add timing checks to all register handlers, because > >> pci_add_device and everything below it expects the device to be > >> functional at the moment of addition. > > I fear I'm not following this. > > > We could maybe do some middle ground here, kind of similar to what > > Linux does. The overall idea would be to put on hold any accesses to > > the device(s) PCI config space for 100ms, that would include the PF > > and any VFs. > > For the PF, at most parts of the SR-IOV capability should be thus > constrained, I think. Linux blocks access to the whole device PCI config space, but that might be simply because it's easier to implement that way on their side. Certainly the spec doesn't mention any restriction in accessing the PF config space during that window. As a simpler approach we might want to reject write accesses to the SR-IOV capability during that window. > > At the point when VF enable is set Xen already knows the > > position of the VFs in the PCI config space. > > > > Any PCI config space access attempts to the PF or VFs during that > > 100ms window would cause the guest vCPU to be put on hold, and the > > access would only be retried once the 100ms window has passed and Xen > > has registered the VFs with vPCI. This approach needs extra logic to > > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > > into the p2m, and a timer to defer the adding of the Vfs and the > > unlocking of the affected PCI config space region. > > I was meaning to have this done in even simpler a way: Simply record > when the VFs were configured, and within the next 100ms terminate all > accesses (read all ones, discard writes). Hm, I thought about such approach also, I was mostly worried that some drivers might know the device has a shorter initialization time, and hence attempt to access before the 100ms window. However simply discarding accesses might be easier to implement initially, and hence I would be fien with such approach. We would need to log any such discarded accesses during the init window. Thanks, Roger. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand Subject: Re: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Message-ID: References: <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> <1d591ff7-599d-4dfa-b521-bfaded430a76@suse.com> <925f2076-f98b-4102-ba45-a85a83861c9f@epam.com> <87v7csrkgb.fsf@epam.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87v7csrkgb.fsf@epam.com> X-ClientProxiedBy: BN9PR03CA0543.namprd03.prod.outlook.com (2603:10b6:408:138::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SA1PR03MB7053:EE_ X-MS-Office365-Filtering-Correlation-Id: 16d537a5-c150-4db3-f180-08deb02983ec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|56012099003|22082099003|18002099003|11063799003; X-Microsoft-Antispam-Message-Info: 0k1iM+7QYtjvOX+K5FMN852Iu4ueFjgVLT87xj1PuWJiYoQoPW2QO/jII2q13+gTYks9ge1oouHZwXSxhEZtjRFutB9e1iK3F5QBT2qOK461Q1ra02hRhjUk8hvSYF3Pmv3cikFZOslkUcC1ZIAwfcQ8SNiycCfZLK/YISgEzNBjgnJwvmMZRi4sFwGX5l3Kn1/dBhSLyYPbCh2zE8SSsHfWsbIJf4owyDwj0XuIOZClWeCD0bUvhookdsLvmOJLv9zDYaZwuQTU8z5sq/ofve2O+6IwTJtVO2gfvLxHOGJNwvBwNAGv6VVgO/3FaJeCxcbjqebku9mU8IA8NpqKSCJYTBLNFdsY3IygRly4UPy8P7uQVKnH1MrjXTxkXKCyiwbsNTQPE6ezThIMkaJPetPo8eWPuefbtfSUJzFi8du5f8prxSREM9CfLySr9khoC36gpyLIVDDFtZ/QvsblLr1XFdxnp+dpf9uXiq2PSswphkYnEOmifhHtKAZLUZOTLYL/b8lDDqZ0v2IRlQ13xjYxK4v/mtDAU714roT7Q77jRlc+0NtDeItZemqG2LY7NR0Tnr3UcgKlCnHVljLciwfciwn/ow6AmHqp5pxgTV4+xgFGFq7udDzPqAN1JLMoJ8CaJp5Rs3UNKenx3kEvWHWlPeRK9NlNpNZU0umvXTehy25JRgGlI0vw1VynPvig X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(56012099003)(22082099003)(18002099003)(11063799003);DIR:OUT;SFP:1101; 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Recalculate BAR sizes before mapping VFs to account > >> >>>>>>>>>> for possible changes in the system page size register. Also force VFs to > >> >>>>>>>>>> always use emulated reads for command register, this is needed to > >> >>>>>>>>>> prevent some drivers accidentally unmapping BARs. > >> >>>>>>>>> > >> >>>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are > >> >>>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even > >> >>>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as > >> >>>>>>>>> the memory decode bit there is hardwired to 0. > >> >>>>>>>>> > >> >>>>>>>>>> Discovery of VFs is > >> >>>>>>>>>> done by Dom0, which must register them with Xen. > >> >>>>>>>>> > >> >>>>>>>>> If we intercept control register writes, why would we still require > >> >>>>>>>>> Dom0 to report the VFs that appear? > >> >>>>>>>>> > >> >>>>>>>> > >> >>>>>>>> Sorry, I don't understand this question. You specifically requested this > >> >>>>>>>> to be done this way in V2. Quoting your reply from V2 below. > >> >>>>>>>> > >> >>>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply > >> >>>>>>>> returning "true" > >> >>>>>>>> > from vpci_process_pending() until the time has passed? This imo is a > >> >>>>>>>> no-go. You > >> >>>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again > >> >>>>>>>> when the > >> >>>>>>>> > timer has expired. That'll then eliminate the need for the > >> >>>>>>>> not-so-nice patch 4. > >> >>>>>>>> > >> >>>>>>>> > Question is whether we need to actually go this far (right away). I > >> >>>>>>>> expect you > >> >>>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > >> >>>>>>>> > domain, can't we trust it to set things up correctly, just like we > >> >>>>>>>> trust it in > >> >>>>>>>> > a number of other aspects? > >> >>>>>>> > >> >>>>>>> How's any of this related to the question I raised here, or your reply > >> >>>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. > >> >>>>>>> Why still demand Dom0 to report them then? > >> >>>>>>> > >> >>>>>> > >> >>>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > >> >>>>>> set to become alive. We discussed in the V2 that it is not acceptable to > >> >>>>>> do a required 100ms wait in Xen while blocking a domain. And not doing > >> >>>>>> that blocking would require some mechanism to only allow a domain to run > >> >>>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust > >> >>>>>> the hardware domain with registering VFs if we already trust it with > >> >>>>>> other PCI-related stuff. Did you change your mind, or am I completely > >> >>>>>> misunderstanding this question? > >> >>>>> > >> >>>>> No, I still think that we can trust hwdom enough. Nevertheless we should > >> >>>>> aim at being independent of it where possible. And I seem to recall that > >> >>>>> I had also outlined an approach how to avoid spin-waiting for 100ms in > >> >>>>> the hypervisor. > >> >>>> > >> >>>> I want to clarify: you are telling that Xen should not wait for hwdom to > >> >>>> report VFs and instead create them by itself. Is this correct? > >> >>> > >> >>> If that's technically possible, yes. > >> >> > >> >> Okay, so let's clear this. If I remember correct, you discussed this > >> >> with Mykyta in the previous version and suggested to put the vCPU to > >> >> sleep for 100ms. > >> > > >> > I don't think I did (except perhaps from a very abstract perspective), > >> > precisely because of ... > >> > > >> >> I don't think that this is a good idea, because guest > >> >> kernel will not be happy about that. > >> > > >> > ... this. Instead iirc I suggested to refuse (short-circuit) handling > >> > VF register accesses for the next 100ms. > >> > > >> > Jan > >> > >> Do you have any suggestions on how to ensure that we accurately catch > >> the window where 100ms have already passed, but guests haven’t tried to > >> read anything yet, to flip this back? As I mentioned in the previous > >> version, Linux, for example, doesn’t attempt to re-read anything if the > >> first read failed after 100ms. So it appears to me that this approach > >> would be prone to racing with the guest for getting to the VF first. One > >> approach I can think of is to somehow swap the register handlers back > >> in-flight during the first read by the guest if 100ms have already > >> passed. However, this would still depend on Dom0 for registering VFs, > >> but in a more convoluted way. We also can’t add the VFs before 100ms > >> have passed and add timing checks to all register handlers, because > >> pci_add_device and everything below it expects the device to be > >> functional at the moment of addition. > >> > >> > >> > >> Maybe you see some other way to avoid these problems that I am missing? > > > > We could maybe do some middle ground here, kind of similar to what > > Linux does. The overall idea would be to put on hold any accesses to > > the device(s) PCI config space for 100ms, that would include the PF > > and any VFs. At the point when VF enable is set Xen already knows the > > position of the VFs in the PCI config space. > > > > Any PCI config space access attempts to the PF or VFs during that > > 100ms window would cause the guest vCPU to be put on hold, and the > > access would only be retried once the 100ms window has passed and Xen > > has registered the VFs with vPCI. This approach needs extra logic to > > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > > into the p2m, and a timer to defer the adding of the Vfs and the > > unlocking of the affected PCI config space region. > > > > That would be a middle ground IMO, as the guest vCPUs could be running > > freely, unless accesses to the affected PCI config space was attempted > > before the 100ms window, at which point they would be blocked waiting > > for the timeout to expire. A well-behaved domain shouldn't try to > > access the PCI config space either ahead the 100ms window expiring. > > This approach seems reasonable for me, but this would require big > changes in vPCI logic, as now pci_add_device() needs ability to defer > all config space accesses till VFs are ready and in meantime we'll have > to deal with half-initialized pdev. PCI/vPCI logic is already convoluted > enough and adding more intermediate states, which need to be dealt with > in different places will make things even worse. Unless I miss some easy > fix, of course... You could just defer the pci_add_device() to after the 100ms window from having enabled VFs? The only requirement would be blocking PCI config space accesses to VFs during those 100ms. You could use a bitmap to signal which SBDF should be rejected in vpci_{read,write}. There's already logic in those functions to reject accesses. > What I am trying to say is that your suggestion is technically doable, > but requires lots of work, and we don't need resources for this right > now. So, what's your opinion on existing approach? Is relying on a > domain to introduce VFs such a bad idea? IMO yes, requiring the usage of an hypercall (or any other side-band interface) when not strictly required is just adding a handicap for OSes that then need to be ported to run on Xen. It might seem easier at first, but adding and maintaining such side-band interfaces in OSes tend to be cumbersome and prone to errors. We could have avoided introducing vPCI at the cost of adding a completely new side-band interface to manage PCI config space accesses and interrupts on x86 PVH, yet we didn't do it because albeit easier to implement from the Xen side, it would have a huge cost on OSes that would want to run in PVH mode. Thanks, Roger. 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I believe this makes > dom0 PVH more usable out of the box (see commit message). I am okay to have this patch in release. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 13:36:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 13:36:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306788.1578572 (Exim 4.92) (envelope-from ) id 1wMnHU-0004KY-BK; Tue, 12 May 2026 13:36:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306788.1578572; Tue, 12 May 2026 13:36:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMnHU-0004KR-7Z; Tue, 12 May 2026 13:36:16 +0000 Received: by outflank-mailman (input) for mailman id 1306788; Tue, 12 May 2026 13:36:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMnHT-0004KL-JR for xen-devel@lists.xenproject.org; Tue, 12 May 2026 13:36:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMnHS-003yMz-SJ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:14 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a032cce-2eae-0a2a0a5409dd-0a2a4505896e-0 for ; Tue, 12 May 2026 15:36:14 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a032cce-aaa8-0a2a45050019-d1558033c07d-3 for ; Tue, 12 May 2026 15:36:14 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso51066445e9.2 for ; Tue, 12 May 2026 06:36:14 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Enable the option by default to make PVH dom0 more > robust in its default configuration. > > Signed-off-by: Roger Pau Monné > --- > Changes since v1: > - Slightly reword an expand option help text. > - Mention the change of defaults in CHANGELOG. > --- > CHANGELOG.md | 2 ++ > docs/misc/xen-command-line.pandoc | 8 ++++++-- > xen/arch/x86/hvm/emulate.c | 2 +- > 3 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index ce46020dbdb4..25f5a192ed48 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -7,6 +7,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD > > ### Changed > + - On x86: > + - Enable pf-fixup option by default for PVH dom0. LGTM: Acked-by: Oleksii Kurochko And also, Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 14:46:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:46:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306832.1578584 (Exim 4.92) (envelope-from ) id 1wMoNG-0005LK-DG; Tue, 12 May 2026 14:46:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306832.1578584; Tue, 12 May 2026 14:46:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoNG-0005LD-AJ; Tue, 12 May 2026 14:46:18 +0000 Received: by outflank-mailman (input) for mailman id 1306832; Tue, 12 May 2026 14:46:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoNE-0005L7-OV for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:46:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoNE-00AHY7-55 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:46:16 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033d2d-5cb7-0a2a0a5109dd-0a2a4503d1c6-30 for ; Tue, 12 May 2026 16:46:16 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033d37-672d-0a2a45030019-d155802ad525-3 for ; Tue, 12 May 2026 16:46:15 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488ba840146so50706295e9.1 for ; Tue, 12 May 2026 07:46:15 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:46:15 -0700 (PDT) Message-ID: <6e3dbb4f-5849-4525-8f8b-a2818c39da2d@suse.com> Date: Tue, 12 May 2026 16:46:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH for-4.22(?) v2] gnttab: simplify (really: drop) gnttab_set_frame_gfn() To: "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Rafal Wojtczuk , Oleksii Kurochko Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778597175-42965938-03EF2E91/0/0 X-purgate-type: clean X-purgate-size: 3269 It's not really doing anything for valid GFNs, which renders its one use site pretty pointless. The other isn't so much about setting anything, but rather about clearing. The main point here, however, is about Rafal spotting the double fetching of the GFN (first in gnttab_unpopulate_status_frames(), then again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass in the already fetched GFN, while dropping the no longer used parameters. As the result is a mere wrapper around guest_physmap_remove_page(), drop the hook altogether. Suggested-by: Rafal Wojtczuk Signed-off-by: Jan Beulich --- v2: Drop hook altogether. --- a/xen/arch/arm/include/asm/grant_table.h +++ b/xen/arch/arm/include/asm/grant_table.h @@ -50,13 +50,6 @@ int replace_grant_host_mapping(uint64_t #define gnttab_dom0_frames() \ min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0) - #define gnttab_get_frame_gfn(gt, st, idx) ({ \ (st) ? gnttab_status_gfn(NULL, gt, idx) \ : gnttab_shared_gfn(NULL, gt, idx); \ --- a/xen/arch/x86/include/asm/grant_table.h +++ b/xen/arch/x86/include/asm/grant_table.h @@ -32,12 +32,6 @@ static inline int replace_grant_host_map return replace_grant_pv_mapping(addr, frame, new_addr, flags); } -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0 /* Handled in add_to_physmap_one(). */) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ : gnttab_shared_mfn(gt, idx); \ --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d { int rc = gfn_eq(gfn, INVALID_GFN) ? 0 - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, - page_to_mfn(pg)); + : guest_physmap_remove_page(d, gfn, page_to_mfn(pg), 0); if ( rc ) { @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( */ if ( !get_page(pg, d) ) rc = -EBUSY; - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) - put_page(pg); } if ( rc ) From xen-devel-bounces@lists.xenproject.org Tue May 12 14:49:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:49:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306865.1578595 (Exim 4.92) (envelope-from ) id 1wMoQW-00062Z-RU; Tue, 12 May 2026 14:49:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306865.1578595; Tue, 12 May 2026 14:49:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoQW-00062S-Nf; Tue, 12 May 2026 14:49:40 +0000 Received: by outflank-mailman (input) for mailman id 1306865; Tue, 12 May 2026 14:49:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoQV-00062K-CH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:49:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoQU-004Dpu-PN for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:49:38 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033dfb-e002-0a2a0a5209dd-0a2a450ac3d2-12 for ; Tue, 12 May 2026 16:49:38 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033e02-56b3-0a2a450a0019-d155dd31d89a-3 for ; Tue, 12 May 2026 16:49:38 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44e1ebb3122so2950226f8f.2 for ; Tue, 12 May 2026 07:49:38 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:49:38 -0700 (PDT) Message-ID: <7b5dd0c9-ff34-4d03-be4c-7d50e517b0e9@suse.com> Date: Tue, 12 May 2026 16:49:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH RFC v2] x86/time: set AP's TSC scale estimate earlier To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778597378-7397E8B7-C2DD9C81/0/0 X-purgate-type: clean X-purgate-size: 2010 NOW() (in particular) can be used ahead of init_percpu_time(). As the initial scale value set is merely the BSP's, we can as well set it very early when the AP is coming up. Setting the scale alone, however, doesn't work, so the entire struct cpu_time is copied. Signed-off-by: Jan Beulich --- RFC: Copying the entire struct won't work very well when tsc_adjust[] is in use (and values there differ between sockets). This in particular mostly eliminates an anomaly with log messages issued early while APs are coming up, when "boot" console timestamps are in use. --- v2: Call the function from very early in start_secondary() --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preinit_percpu_time(unsigned int cpu); void init_percpu_time(void); void time_latch_stamps(void); --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -356,6 +356,8 @@ void asmlinkage start_secondary(void) /* Safe to enable feature such as CR4.MCE with the IDT set up now. */ write_cr4(mmu_cr4_features); + preinit_percpu_time(cpu); + percpu_traps_init(); cpu_init(); --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); } +void preinit_percpu_time(unsigned int cpu) +{ + /* Initial estimate for TSC rate etc. */ + per_cpu(cpu_time, cpu) = per_cpu(cpu_time, 0); +} + void init_percpu_time(void) { struct cpu_time *t = &this_cpu(cpu_time); @@ -2353,9 +2359,6 @@ void init_percpu_time(void) u64 tsc; s_time_t now; - /* Initial estimate for TSC rate. */ - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; - if ( tsc_adjust ) { unsigned int socket = cpu_to_socket(smp_processor_id()); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:57:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:57:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306878.1578603 (Exim 4.92) (envelope-from ) id 1wMoXz-0007do-HC; Tue, 12 May 2026 14:57:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306878.1578603; Tue, 12 May 2026 14:57:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoXz-0007dh-DS; Tue, 12 May 2026 14:57:23 +0000 Received: by outflank-mailman (input) for mailman id 1306878; Tue, 12 May 2026 14:57:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoXx-0007da-Mv for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:57:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoXv-008lpm-EY for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:57:21 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033fc7-e002-0a2a0a5209dd-0a2a45018c90-12 for ; Tue, 12 May 2026 16:57:20 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033fd0-c1f2-0a2a45010019-d155dd29ed54-3 for ; Tue, 12 May 2026 16:57:20 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44b330c5cc6so4097357f8f.1 for ; Tue, 12 May 2026 07:57:20 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:57:20 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 16:57:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko From: Jan Beulich Subject: [PATCH 0/5] x86/time: CMOS RTC century byte Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778597840-B534AFF4-ADE2EF33/0/0 X-purgate-type: clean X-purgate-size: 499 I'm surprised that we didn't consume this thus far, and that we got away with also not emulating it for HVM guests. The 1st and 3rd patches are imo candidates for 4.22, whereas the others (more or less associated cleanup) likely aren't. 1: x86/time: use RTC century byte when available 2: x86/time: move BCD_TO_BIN() uses 3: x86/vRTC: support century field 4: x86/vRTC: use available macros for BCD <-> BIN conversion 5: tools/xen-hvmctx: shorten various format strings a little Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 14:58:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:58:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306883.1578611 (Exim 4.92) (envelope-from ) id 1wMoZK-0008Gs-Pn; Tue, 12 May 2026 14:58:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306883.1578611; Tue, 12 May 2026 14:58:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZK-0008Gl-Mu; Tue, 12 May 2026 14:58:46 +0000 Received: by outflank-mailman (input) for mailman id 1306883; Tue, 12 May 2026 14:58:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZJ-0008Gd-FN for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:58:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoZI-001UUo-SJ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:58:44 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034015-2eae-0a2a0a5409dd-0a2a4505cdba-38 for ; Tue, 12 May 2026 16:58:44 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034024-aaa8-0a2a45050019-d155dd2bd5dc-3 for ; Tue, 12 May 2026 16:58:44 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d7645adbdso3076242f8f.1 for ; Tue, 12 May 2026 07:58:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:58:44 -0700 (PDT) Message-ID: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> Date: Tue, 12 May 2026 16:58:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 1/5] x86/time: use RTC century byte when available From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; 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Signed-off-by: Jan Beulich --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1257,6 +1257,7 @@ struct rtc_time { static bool __get_cmos_time(struct rtc_time *rtc) { s_time_t start, t1, t2; + unsigned int century = 0; unsigned long flags; spin_lock_irqsave(&rtc_lock, flags); @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); rtc->mon = CMOS_READ(RTC_MONTH); rtc->year = CMOS_READ(RTC_YEAR); + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) + century = CMOS_READ(acpi_gbl_FADT.century); if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) { @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t spin_unlock_irqrestore(&rtc_lock, flags); - if ( (rtc->year += 1900) < 1970 ) + if ( century ) + { + BCD_TO_BIN(century); + rtc->year += century * 100; + } + else if ( (rtc->year += 1900) < 1970 ) rtc->year += 100; return t1 <= SECONDS(1) && t2 < MILLISECS(3); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:59:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:59:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306887.1578621 (Exim 4.92) (envelope-from ) id 1wMoZe-0000Eo-50; Tue, 12 May 2026 14:59:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306887.1578621; Tue, 12 May 2026 14:59:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZe-0000Eh-1s; Tue, 12 May 2026 14:59:06 +0000 Received: by outflank-mailman (input) for mailman id 1306887; Tue, 12 May 2026 14:59:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZd-0000EM-7h for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:59:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoZc-00B5ja-Kr for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:59:04 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034037-5cb7-0a2a0a5109dd-0a2a4506e0c2-4 for ; Tue, 12 May 2026 16:59:04 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034038-7371-0a2a45060019-d1558029f084-3 for ; Tue, 12 May 2026 16:59:04 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488d2079582so59943355e9.2 for ; Tue, 12 May 2026 07:59:04 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:59:04 -0700 (PDT) Message-ID: <2c5af8f9-05f6-43c4-afb4-a50cbacd2d49@suse.com> Date: Tue, 12 May 2026 16:59:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/5] x86/time: move BCD_TO_BIN() uses From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778597944-8797CD75-EA009AFA/0/0 X-purgate-type: clean X-purgate-size: 1496 ... outside of __get_cmos_time()'s locked region. There's no need to hold the lock for these computations. Signed-off-by: Jan Beulich --- How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an inverted comment? Looks like we've inherited this from Linux, and even in Linus'es current tree it's still this same way. Yet all half-way recent chipsets I'm aware of properly implement the DM bit in reg B. Might this be another 32-bit leftover? --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1257,6 +1257,7 @@ struct rtc_time { static bool __get_cmos_time(struct rtc_time *rtc) { s_time_t start, t1, t2; + bool bcd; unsigned int century = 0; unsigned long flags; @@ -1283,8 +1284,12 @@ static bool __get_cmos_time(struct rtc_t rtc->year = CMOS_READ(RTC_YEAR); if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) century = CMOS_READ(acpi_gbl_FADT.century); - - if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) + + bcd = RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY); + + spin_unlock_irqrestore(&rtc_lock, flags); + + if ( bcd ) { BCD_TO_BIN(rtc->sec); BCD_TO_BIN(rtc->min); @@ -1294,8 +1299,6 @@ static bool __get_cmos_time(struct rtc_t BCD_TO_BIN(rtc->year); } - spin_unlock_irqrestore(&rtc_lock, flags); - if ( century ) { BCD_TO_BIN(century); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:59:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:59:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306897.1578629 (Exim 4.92) (envelope-from ) id 1wMoaB-0000pI-Bi; Tue, 12 May 2026 14:59:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306897.1578629; Tue, 12 May 2026 14:59:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoaB-0000pB-97; Tue, 12 May 2026 14:59:39 +0000 Received: by outflank-mailman (input) for mailman id 1306897; Tue, 12 May 2026 14:59:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoaA-0000nk-7x for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:59:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoa9-00B61l-Kx for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:59:37 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03403e-e002-0a2a0a5209dd-0a2a4503a98e-30 for ; Tue, 12 May 2026 16:59:37 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034059-672d-0a2a45030019-d1558029b5cf-3 for ; Tue, 12 May 2026 16:59:37 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488b150559bso44170885e9.1 for ; Tue, 12 May 2026 07:59:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:59:36 -0700 (PDT) Message-ID: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> Date: Tue, 12 May 2026 16:59:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 3/5] x86/vRTC: support century field From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778597977-4086B938-1FA6D66E/0/0 X-purgate-type: clean X-purgate-size: 8908 Both ROMBIOS and SeaBIOS (with CONFIG_QEMU=y, as we build it) blindly assume availability of this field (at its conventional index 0x32); OVMF at least has code to inspect FADT. Hence we ought to have supported it virtually forever. As the index is beyond RTC_CMOS_SIZE, leverage the padding field in struct hvm_hw_rtc to hold its value. Update the field only when involved values are valid BCD century specifiers. Otherwise (for VMs migrated in from an older hypervisor) leave handling to the DM. This makes the Linux rtc-cmos driver report y3k compatibility. While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") Signed-off-by: Jan Beulich --- Am I overly paranoid with the checking of the field, considering that Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests have ever run with should have been aware of the field? Or am I, quite the opposite, still not strict enough? I can't help the impression that this introduces a latency issue for the 2nd of gmtime()'s while() loops: We now allow years up into the 99th century, i.e. over 8000 years away from 1970. 8000 years are very roughly 2^^38 seconds, making for (again very roughly) 5 million iterations there. Did I get my math wrong, or do we need a prereq change to (vastly) reduce the number of iterations of that loop (e.g. along the lines of the other one, first going in 400 year steps)? Isn't day-of-week handling flawed? If the field is brought out of sync with the other values, shouldn't it stay respectively out-of-sync? And isn't it excessive overhead to go through rtc_set_time() when the field is updated while SET is clear? Perhaps we ought to also support alarm day/month features? --- a/tools/libacpi/static_tables.c +++ b/tools/libacpi/static_tables.c @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ + struct acpi_fadt Fadt = { .header = { .signature = ACPI_FADT_SIGNATURE, @@ -88,7 +90,9 @@ struct acpi_fadt Fadt = { .register_bit_width = ACPI_PM_TMR_BLK_BIT_WIDTH, .register_bit_offset = ACPI_PM_TMR_BLK_BIT_OFFSET, .address = ACPI_PM_TMR_BLK_ADDRESS_V1, - } + }, + + .century = CMOS_CENTURY, }; struct acpi_20_rsdt Rsdt = { --- a/tools/misc/xen-hvmctx.c +++ b/tools/misc/xen-hvmctx.c @@ -311,7 +311,7 @@ static void dump_rtc(void) printf(" 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x, index 0x%2.2x\n", r.cmos_data[8], r.cmos_data[9], r.cmos_data[10], r.cmos_data[11], r.cmos_data[12], r.cmos_data[13], r.cmos_index); - + printf(" century 0x%02x offset %"PRId64"\n", r.century, r.rtc_offset); } static void dump_hpet(void) --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -47,6 +47,12 @@ #define epoch_year 1900 #define get_year(x) ((x) + epoch_year) +static inline bool is_century(unsigned int x) +{ + /* Constant below should match epoch_year above, just as BCD value. */ + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; +} + enum rtc_mode { rtc_mode_no_ack, rtc_mode_strict @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque data &= 0x7f; s->hw.cmos_index = data; spin_unlock(&s->lock); + /* RTC_CENTURY always forwarded to DM. */ return (data < RTC_CMOS_SIZE); } - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) + switch ( s->hw.cmos_index ) { + case 0 ... RTC_CMOS_SIZE - 1: + orig = s->hw.cmos_data[s->hw.cmos_index]; + break; + + case RTC_CENTURY: + orig = s->hw.century; + if ( !is_century(orig) || !is_century(data) ) + { + /* Prevent further use of the field. */ + s->hw.century = 0; + spin_unlock(&s->lock); + return 0; + } + break; + + default: spin_unlock(&s->lock); return 0; } - orig = s->hw.cmos_data[s->hw.cmos_index]; switch ( s->hw.cmos_index ) { case RTC_SECONDS_ALARM: @@ -507,6 +529,7 @@ static int rtc_ioport_write(void *opaque case RTC_DAY_OF_MONTH: case RTC_MONTH: case RTC_YEAR: + case RTC_CENTURY: /* if in set mode, just write the register */ if ( (s->hw.cmos_data[RTC_REG_B] & RTC_SET) ) s->hw.cmos_data[s->hw.cmos_index] = data; @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque /* Fetch the current time and update just this field. */ s->current_tm = gmtime(get_localtime(d)); rtc_copy_date(s); - s->hw.cmos_data[s->hw.cmos_index] = data; + if ( s->hw.cmos_index != RTC_CENTURY ) + s->hw.cmos_data[s->hw.cmos_index] = data; + else + s->hw.century = data; rtc_set_time(s); } alarm_timer_update(s); @@ -591,7 +617,16 @@ static void rtc_set_time(RTCState *s) tm->tm_wday = from_bcd(s, s->hw.cmos_data[RTC_DAY_OF_WEEK]); tm->tm_mday = from_bcd(s, s->hw.cmos_data[RTC_DAY_OF_MONTH]); tm->tm_mon = from_bcd(s, s->hw.cmos_data[RTC_MONTH]) - 1; - tm->tm_year = from_bcd(s, s->hw.cmos_data[RTC_YEAR]) + 100; + tm->tm_year = from_bcd(s, s->hw.cmos_data[RTC_YEAR]); + if ( is_century(s->hw.century) ) + { + unsigned int century = s->hw.century; + + BCD_TO_BIN(century); + tm->tm_year += century * 100 - epoch_year; + } + else + tm->tm_year += 100; after = mktime(get_year(tm->tm_year), tm->tm_mon + 1, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); @@ -629,6 +664,12 @@ static void rtc_copy_date(RTCState *s) s->hw.cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday); s->hw.cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1); s->hw.cmos_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100); + + if ( is_century(s->hw.century) ) + { + s->hw.century = get_year(tm->tm_year) / 100; + BIN_TO_BCD(s->hw.century); + } } static int update_in_progress(RTCState *s) @@ -656,6 +697,13 @@ static uint32_t rtc_ioport_read(RTCState switch ( s->hw.cmos_index ) { + case RTC_CENTURY: + if ( !is_century(s->hw.century) ) + { + ret = UINT32_MAX; + break; + } + fallthrough; case RTC_SECONDS: case RTC_MINUTES: case RTC_HOURS: @@ -669,7 +717,10 @@ static uint32_t rtc_ioport_read(RTCState s->current_tm = gmtime(get_localtime(d)); rtc_copy_date(s); } - ret = s->hw.cmos_data[s->hw.cmos_index]; + if ( s->hw.cmos_index != RTC_CENTURY ) + ret = s->hw.cmos_data[s->hw.cmos_index]; + else + ret = s->hw.century; break; case RTC_REG_A: ret = s->hw.cmos_data[s->hw.cmos_index]; @@ -718,10 +769,12 @@ static int cf_check handle_rtc_io( *val = 0xff; return X86EMUL_OKAY; } - else if ( vrtc->hw.cmos_index < RTC_CMOS_SIZE ) + else if ( vrtc->hw.cmos_index < RTC_CMOS_SIZE || + vrtc->hw.cmos_index == RTC_CENTURY ) { *val = rtc_ioport_read(vrtc); - return X86EMUL_OKAY; + if ( *val != UINT32_MAX ) + return X86EMUL_OKAY; } return X86EMUL_UNHANDLEABLE; @@ -873,6 +926,8 @@ void rtc_init(struct domain *d) s->hw.cmos_data[RTC_REG_C] = 0; s->hw.cmos_data[RTC_REG_D] = RTC_VRT; + s->hw.century = 0x20; /* Arbitrary initial value satisfying is_century() */ + s->current_tm = gmtime(get_localtime(d)); s->start_time = NOW(); --- a/xen/arch/x86/include/asm/mc146818rtc.h +++ b/xen/arch/x86/include/asm/mc146818rtc.h @@ -37,6 +37,9 @@ bool is_cmos_port(unsigned int port, uns #define RTC_REG_C 12 #define RTC_REG_D 13 +/* Conventional index used without (and typically also with) ACPI. */ +#define RTC_CENTURY 0x32 + /********************************************************************** * register details **********************************************************************/ --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -485,7 +485,7 @@ struct hvm_hw_rtc { uint8_t cmos_data[RTC_CMOS_SIZE]; /* Index register for 2-part operations */ uint8_t cmos_index; - uint8_t pad0; + uint8_t century; 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Tue, 12 May 2026 08:00:05 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:00:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 4/5] x86/vRTC: use available macros for BCD <-> BIN conversion From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778598006-C5386DB1-604F2D14/0/0 X-purgate-type: clean X-purgate-size: 889 There's no need to open-code these. No functional change intended, even if the | changes to + in to_bcd(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -253,18 +253,18 @@ static void cf_check rtc_update_timer2(v static unsigned int to_bcd(const RTCState *s, unsigned int a) { - if ( s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY ) - return a; + if ( !(s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY) ) + BIN_TO_BCD(a); - return ((a / 10) << 4) | (a % 10); + return a; } static unsigned int from_bcd(const RTCState *s, unsigned int a) { - if ( s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY ) - return a; + if ( !(s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY) ) + BCD_TO_BIN(a); - return ((a >> 4) * 10) + (a & 0x0f); + return a; } /* From xen-devel-bounces@lists.xenproject.org Tue May 12 15:00:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:00:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306914.1578648 (Exim 4.92) (envelope-from ) id 1wMobI-0002qx-0w; Tue, 12 May 2026 15:00:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306914.1578648; Tue, 12 May 2026 15:00:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMobH-0002qp-Tp; Tue, 12 May 2026 15:00:47 +0000 Received: by outflank-mailman (input) for mailman id 1306914; Tue, 12 May 2026 15:00:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMobF-0002qd-QA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:00:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMobF-004Fsk-70 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:00:45 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034097-bab6-0a2a0a5309dd-0a2a4504baf4-36 for ; Tue, 12 May 2026 17:00:45 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a03409d-1dec-0a2a45040019-d155dd2dc5a2-3 for ; Tue, 12 May 2026 17:00:45 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-45562c41ec7so2406316f8f.1 for ; Tue, 12 May 2026 08:00:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:00:44 -0700 (PDT) Message-ID: <4bcd76e9-1bd5-4a2c-8d75-7d29b9dfa31f@suse.com> Date: Tue, 12 May 2026 17:00:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 5/5] tools/xen-hvmctx: shorten various format strings a little From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778598045-433673FF-6E94AD80/0/0 X-purgate-type: clean X-purgate-size: 6655 %4.4x and alike format specifiers can be expressed shorter as %04x or, as e.g. dump_ioapic() has it, %.4x. In dump_fpu()'s XMM register dumping, also move away from showing bogus xmm03 and alike. The proper register name is xmm3 for that particular example. Also strip trailing whitespace from lines touched. Signed-off-by: Jan Beulich --- a/tools/misc/xen-hvmctx.c +++ b/tools/misc/xen-hvmctx.c @@ -107,26 +107,26 @@ static void dump_fpu(void *p) struct fpu_regs *r = p; int i; - printf(" FPU: fcw 0x%4.4x fsw 0x%4.4x\n" - " ftw 0x%2.2x (0x%2.2x) fop 0x%4.4x\n" - " fpuip 0x%16.16"PRIx64" fpudp 0x%16.16"PRIx64"\n" - " mxcsr 0x%8.8lx mask 0x%8.8lx\n", + printf(" FPU: fcw 0x%04x fsw 0x%04x\n" + " ftw 0x%02x (0x%02x) fop 0x%04x\n" + " fpuip 0x%016"PRIx64" fpudp 0x%016"PRIx64"\n" + " mxcsr 0x%08lx mask 0x%08lx\n", (unsigned)r->fcw, (unsigned)r->fsw, (unsigned)r->ftw, (unsigned)r->res0, (unsigned)r->fop, r->fpuip, r->fpudp, (unsigned long)r->mxcsr, (unsigned long)r->mxcsr_mask); for ( i = 0 ; i < 8 ; i++ ) - printf(" mm%i 0x%4.4x%16.16"PRIx64" (0x%4.4x%4.4x%4.4x)\n", + printf(" mm%i 0x%04x%016"PRIx64" (0x%04x%04x%04x)\n", i, r->mm[i].hi, r->mm[i].lo, r->mm[i].pad[2], r->mm[i].pad[1], r->mm[i].pad[0]); for ( i = 0 ; i < 16 ; i++ ) - printf(" xmm%2.2i 0x%16.16"PRIx64"%16.16"PRIx64"\n", + printf(" xmm%-2i 0x%016"PRIx64"%016"PRIx64"\n", i, r->xmm[i].hi, r->xmm[i].lo); for ( i = 0 ; i < 6 ; i++ ) - printf(" (0x%16.16"PRIx64"%16.16"PRIx64")\n", + printf(" (0x%016"PRIx64"%016"PRIx64")\n", r->res1[2*i+1], r->res1[2*i]); } @@ -134,20 +134,20 @@ static void dump_cpu(void) { HVM_SAVE_TYPE(CPU) c; READ(c); - printf(" CPU: rax 0x%16.16llx rbx 0x%16.16llx\n" - " rcx 0x%16.16llx rdx 0x%16.16llx\n" - " rbp 0x%16.16llx rsi 0x%16.16llx\n" - " rdi 0x%16.16llx rsp 0x%16.16llx\n" - " r8 0x%16.16llx r9 0x%16.16llx\n" - " r10 0x%16.16llx r11 0x%16.16llx\n" - " r12 0x%16.16llx r13 0x%16.16llx\n" - " r14 0x%16.16llx r15 0x%16.16llx\n" - " rip 0x%16.16llx rflags 0x%16.16llx\n" - " cr0 0x%16.16llx cr2 0x%16.16llx\n" - " cr3 0x%16.16llx cr4 0x%16.16llx\n" - " dr0 0x%16.16llx dr1 0x%16.16llx\n" - " dr2 0x%16.16llx dr3 0x%16.16llx\n" - " dr6 0x%16.16llx dr7 0x%16.16llx\n" + printf(" CPU: rax 0x%016llx rbx 0x%016llx\n" + " rcx 0x%016llx rdx 0x%016llx\n" + " rbp 0x%016llx rsi 0x%016llx\n" + " rdi 0x%016llx rsp 0x%016llx\n" + " r8 0x%016llx r9 0x%016llx\n" + " r10 0x%016llx r11 0x%016llx\n" + " r12 0x%016llx r13 0x%016llx\n" + " r14 0x%016llx r15 0x%016llx\n" + " rip 0x%016llx rflags 0x%016llx\n" + " cr0 0x%016llx cr2 0x%016llx\n" + " cr3 0x%016llx cr4 0x%016llx\n" + " dr0 0x%016llx dr1 0x%016llx\n" + " dr2 0x%016llx dr3 0x%016llx\n" + " dr6 0x%016llx dr7 0x%016llx\n" " cs %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" " es %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" " ds %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" @@ -158,12 +158,12 @@ static void dump_cpu(void) " ldtr %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.4" PRIx32 " / %#7.4" PRIx32 ")\n" " idtr (%#18.8" PRIx64 " + %#10.4" PRIx32 ")\n" " gdtr (%#18.8" PRIx64 " + %#10.4" PRIx32 ")\n" - " sysenter cs 0x%8.8llx eip 0x%16.16llx esp 0x%16.16llx\n" + " sysenter cs 0x%08llx eip 0x%016llx esp 0x%016llx\n" " shadow gs %#18.16" PRIx64 " efer %#18.8" PRIx64 "\n" " lstar %#18.16" PRIx64 " cstar %#18.16" PRIx64 "\n" " star %#18.16" PRIx64 " sfmask %#18.8" PRIx64 "\n" - " tsc 0x%16.16llx\n" - " event 0x%8.8lx error 0x%8.8lx\n", + " tsc 0x%016llx\n" + " event 0x%08lx error 0x%08lx\n", (unsigned long long) c.rax, (unsigned long long) c.rbx, (unsigned long long) c.rcx, (unsigned long long) c.rdx, (unsigned long long) c.rbp, (unsigned long long) c.rsi, @@ -260,7 +260,7 @@ static void dump_pci_irq(void) { HVM_SAVE_TYPE(PCI_IRQ) i; READ(i); - printf(" PCI IRQs: 0x%16.16llx%16.16llx\n", + printf(" PCI IRQs: 0x%016llx%016llx\n", (unsigned long long) i.pad[0], (unsigned long long) i.pad[1]); } @@ -268,7 +268,7 @@ static void dump_isa_irq(void) { HVM_SAVE_TYPE(ISA_IRQ) i; READ(i); - printf(" ISA IRQs: 0x%4.4llx\n", + printf(" ISA IRQs: 0x%04llx\n", (unsigned long long) i.pad[0]); } @@ -305,10 +305,10 @@ static void dump_rtc(void) { HVM_SAVE_TYPE(RTC) r; READ(r); - printf(" RTC: regs 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x\n", + printf(" RTC: regs 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", r.cmos_data[0], r.cmos_data[1], r.cmos_data[2], r.cmos_data[3], r.cmos_data[4], r.cmos_data[5], r.cmos_data[6], r.cmos_data[7]); - printf(" 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x, index 0x%2.2x\n", + printf(" 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x, index 0x%02x\n", r.cmos_data[8], r.cmos_data[9], r.cmos_data[10], r.cmos_data[11], r.cmos_data[12], r.cmos_data[13], r.cmos_index); printf(" century 0x%02x offset %"PRId64"\n", r.century, r.rtc_offset); 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pr=C Message-ID: Date: Tue, 12 May 2026 17:06:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/5] CI: Switch qemu-arm* jobs to using the distro provided QEMU To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-6-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-6-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE9:EE_|PH8PR12MB7231:EE_ X-MS-Office365-Filtering-Correlation-Id: c586d971-af51-468a-e442-08deb038184e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|1800799024|36860700016|11063799003|56012099003|18002099003|22082099003; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778599377-D8F7E443-2BC24D1F/10/73395122804 X-purgate-type: spam X-purgate-size: 582 On 3/12/26 5:53 PM, Jan Beulich wrote: > Includes a few custom changes, too. > > 1: arrange for BSP MSR adjustments during S3 resume > 2: clean up BYT/CHT auto demotion disable > 3: latch struct idle_cpu contents > 4: move pre-initialized struct idle_cpu instances > 5: Remove unused driver version constant > 6: Remove the 'preferred_cstates' parameter > 7: drop const from struct cpuidle_state arrays > 8: Add cmdline option to adjust C-states table > 9: Add C-states validation > Release-Acked-by: Oleksii Kurochko ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:23:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:23:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306946.1578675 (Exim 4.92) (envelope-from ) id 1wMoxg-0007GF-6G; Tue, 12 May 2026 15:23:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306946.1578675; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778599433-87371D75-43463CD8/10/73395122804 X-purgate-type: spam X-purgate-size: 1804 Hello Luca, On 5/8/26 4:33 PM, Luca Fancellu wrote: > This series continues to further the ongoing work to introduce support > for MPU systems in Xen. > > The patches in this series aim to implement MPU specific p2m functions. > > This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. > > Harry Ramsey (2): > arm/mpu: Introduce `v8r_el1_msa` device tree property for domains > arm/mpu: Implement p2m tables > > Penny Zheng (1): > arm/mpu: implement setup_virt_paging for MPU systems > > docs/misc/arm/device-tree/booting.txt | 14 +++++ > xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- > xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ > xen/arch/arm/domain.c | 11 ++++ > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ > xen/arch/arm/include/asm/cpufeature.h | 13 +++- > xen/arch/arm/include/asm/domain.h | 4 ++ > xen/arch/arm/include/asm/domain_build.h | 21 +++++++ > xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/include/asm/processor.h | 8 +++ > xen/arch/arm/mpu/arm32/mm.c | 17 +++++ > xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ > xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- > xen/include/public/arch-arm.h | 6 ++ > xen/include/public/domctl.h | 4 +- > 18 files changed, 353 insertions(+), 9 deletions(-) > I am okay to have this patch series in the current release: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:25:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:25:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306958.1578683 (Exim 4.92) (envelope-from ) id 1wMozb-0007s6-Ix; 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The other isn't so much about setting anything, but > rather about clearing. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > As the result is a mere wrapper around guest_physmap_remove_page(), drop > the hook altogether. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue May 12 15:27:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:27:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306966.1578692 (Exim 4.92) (envelope-from ) id 1wMp0k-0008M3-Ra; Tue, 12 May 2026 15:27:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306966.1578692; Tue, 12 May 2026 15:27:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp0k-0008Lw-Ot; Tue, 12 May 2026 15:27:06 +0000 Received: by outflank-mailman (input) for mailman id 1306966; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8Sf6Ls6wLoE2w8NfLl+DB/xV7KpjS109ThpkNcf3TOZHIPUu8SI2YAFIkb8mwdABkih5UaVeVM24r8URdbzf5uGKe8vVD/58UPYgqbR9ZcpN4mrUtZMQd68AFy4kq+y9q5YUoJOgiJsw3XfHyUZQwMAp+6deWMlZgZ7gZL7QVjvmgczVUZZBtSogkysgnASpqR4czd1EMOwk+eIdkYPlyibB91wXvb4cXkH4kgCwEz1nYU7VJfARtNp0ke89ImuQf2p+qdIUvG3WPymvDjYEEfaTP6VZXaCmZ7LOfCIeCb9LGQv1gOgruyrSBI18gYCg4t+GiE2Z3KgGpu61cW+P+Iiv73rSlWnk2k4boLygo4ZmJW7wSovwHTNSsjHPH1BomlVYnL3aG2uGDhCNynQsoYelHEI0DkyAm7LVfaMznoxBhgjVSeB6FeHSMRN/0aUC X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 15:26:59.3147 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dbd57d7e-61f2-48c3-aa23-08deb03ae8d4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001AD.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB6349 X-purgate-ID: tlsNG-d25034/1778599623-E2169CF5-CC246201/10/73395122804 X-purgate-type: spam X-purgate-size: 1979 Hi Oleksii, > On 12 May 2026, at 16:23, Oleksii Kurochko w= rote: >=20 > Hello Luca, >=20 > On 5/8/26 4:33 PM, Luca Fancellu wrote: >> This series continues to further the ongoing work to introduce support >> for MPU systems in Xen. >> The patches in this series aim to implement MPU specific p2m functions. >> This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. >> Harry Ramsey (2): >> arm/mpu: Introduce `v8r_el1_msa` device tree property for domains >> arm/mpu: Implement p2m tables >> Penny Zheng (1): >> arm/mpu: implement setup_virt_paging for MPU systems >> docs/misc/arm/device-tree/booting.txt | 14 +++++ >> xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- >> xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ >> xen/arch/arm/domain.c | 11 ++++ >> xen/arch/arm/include/asm/arm32/mpu.h | 2 + >> xen/arch/arm/include/asm/arm64/mpu.h | 2 + >> xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ >> xen/arch/arm/include/asm/cpufeature.h | 13 +++- >> xen/arch/arm/include/asm/domain.h | 4 ++ >> xen/arch/arm/include/asm/domain_build.h | 21 +++++++ >> xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ >> xen/arch/arm/include/asm/p2m.h | 5 ++ >> xen/arch/arm/include/asm/processor.h | 8 +++ >> xen/arch/arm/mpu/arm32/mm.c | 17 +++++ >> xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ >> xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- >> xen/include/public/arch-arm.h | 6 ++ >> xen/include/public/domctl.h | 4 +- >> 18 files changed, 353 insertions(+), 9 deletions(-) >=20 > I am okay to have this patch series in the current release: > Release-Acked-by: Oleksii Kurochko Thanks, I will send the v6 shortly and CC you as well in the cover letter. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Tue May 12 15:32:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:32:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306979.1578702 (Exim 4.92) (envelope-from ) id 1wMp6J-0001ts-EK; Tue, 12 May 2026 15:32:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306979.1578702; Tue, 12 May 2026 15:32:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp6J-0001tk-Av; Tue, 12 May 2026 15:32:51 +0000 Received: by outflank-mailman (input) for mailman id 1306979; Tue, 12 May 2026 15:32:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMp6H-0001te-LA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:32:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp6H-00ALJ3-1x for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:32:49 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03481b-e002-0a2a0a5209dd-0a2a4508e73a-8 for ; Tue, 12 May 2026 17:32:49 +0200 Received: from [209.85.221.46] (helo=mail-wr1-f46.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034820-63b5-0a2a45080019-d155dd2eb916-3 for ; Tue, 12 May 2026 17:32:49 +0200 Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-453903ee4adso4957149f8f.3 for ; Tue, 12 May 2026 08:32:48 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The other isn't so much about setting anything, but > rather about clearing. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > As the result is a mere wrapper around guest_physmap_remove_page(), drop > the hook altogether. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:34:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:34:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306988.1578711 (Exim 4.92) (envelope-from ) id 1wMp7T-0002RV-RH; Tue, 12 May 2026 15:34:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306988.1578711; Tue, 12 May 2026 15:34:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp7T-0002RO-OG; Tue, 12 May 2026 15:34:03 +0000 Received: by outflank-mailman (input) for mailman id 1306988; Tue, 12 May 2026 15:34:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp7T-0002RI-4Y for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:34:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp7S-00ALYr-6z for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:34:02 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034867-5cb7-0a2a0a5109dd-0a2a4509dbf6-10 for ; Tue, 12 May 2026 17:34:02 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034869-2497-0a2a45090019-d155802cc8e7-3 for ; Tue, 12 May 2026 17:34:02 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4891e5b9c1fso53004525e9.2 for ; Tue, 12 May 2026 08:34:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:34:01 -0700 (PDT) Message-ID: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Date: Tue, 12 May 2026 17:34:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH for-4.22 v2 0/8] x86/mwait-idle: sync up with Linux 7.0-rc To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1778600042-3777AA53-922562DE/0/0 X-purgate-type: clean X-purgate-size: 397 Includes a few custom changes, too. 1: arrange for BSP MSR adjustments during S3 resume 2: clean up BYT/CHT auto demotion disable 3: latch struct idle_cpu contents 4: move pre-initialized struct idle_cpu instances 5: Remove the 'preferred_cstates' parameter 6: drop const from struct cpuidle_state arrays 7: Add cmdline option to adjust C-states table 8: Add C-states validation Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 15:35:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:35:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306994.1578719 (Exim 4.92) (envelope-from ) id 1wMp8z-0002wn-3t; Tue, 12 May 2026 15:35:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306994.1578719; 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Tue, 12 May 2026 08:35:34 -0700 (PDT) Message-ID: <5c66cfb1-e234-4efa-9a01-88acb284e414@suse.com> Date: Tue, 12 May 2026 17:35:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 1/8] x86/mwait-idle: arrange for BSP MSR adjustments during S3 resume From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778600135-0AB70C48-33CB9FDF/0/0 X-purgate-type: clean X-purgate-size: 3124 mwait_idle_cpu_init() is only called for APs, yet MSR writes will typically need re-doing post-S3 even for the BSP. When multiple cores / threads are present (and to come back online) in a package, for package scope MSRs this may be covered by APs doing the writes, but we can't rely on that. Signed-off-by: Jan Beulich --- a/xen/arch/x86/acpi/power.c +++ b/xen/arch/x86/acpi/power.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -299,6 +300,7 @@ static int enter_state(u32 state) acpi_sleep_post(state); if ( hvm_cpu_up() ) BUG(); + mwait_idle_resume(); cpufreq_add_cpu(0); enable_cpu: --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1677,6 +1677,28 @@ static int __init mwait_idle_probe(void) return 0; } +static void mwait_idle_cpu_tweak(unsigned int cpu) +{ + if (icpu->auto_demotion_disable_flags) + on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); + + if (icpu->byt_auto_demotion_disable_flag) + on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); + + switch (icpu->c1e_promotion) { + case C1E_PROMOTION_DISABLE: + on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); + break; + + case C1E_PROMOTION_ENABLE: + on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); + break; + + case C1E_PROMOTION_PRESERVE: + break; + } +} + static int cf_check mwait_idle_cpu_init( struct notifier_block *nfb, unsigned long action, void *hcpu) { @@ -1759,24 +1781,7 @@ static int cf_check mwait_idle_cpu_init( dev->count++; } - if (icpu->auto_demotion_disable_flags) - on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - - if (icpu->byt_auto_demotion_disable_flag) - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); - - switch (icpu->c1e_promotion) { - case C1E_PROMOTION_DISABLE: - on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); - break; - - case C1E_PROMOTION_ENABLE: - on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); - break; - - case C1E_PROMOTION_PRESERVE: - break; - } + mwait_idle_cpu_tweak(cpu); return NOTIFY_DONE; } @@ -1808,6 +1813,14 @@ int __init mwait_idle_init(struct notifi return err; } +void mwait_idle_resume(void) +{ + if (!icpu) + return; + + mwait_idle_cpu_tweak(smp_processor_id()); +} + /* Helper function for HPET. */ bool __init mwait_pc10_supported(void) { --- a/xen/arch/x86/include/asm/mwait.h +++ b/xen/arch/x86/include/asm/mwait.h @@ -14,9 +14,12 @@ #define MWAIT_ECX_INTERRUPT_BREAK 0x1 void mwait_idle_with_hints(unsigned int eax, unsigned int ecx); + #ifdef CONFIG_INTEL +void mwait_idle_resume(void); bool mwait_pc10_supported(void); #else +static inline void mwait_idle_resume(void) {} static inline bool mwait_pc10_supported(void) { return false; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306999.1578729 (Exim 4.92) (envelope-from ) id 1wMp9W-0003Nc-Bk; Tue, 12 May 2026 15:36:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306999.1578729; Tue, 12 May 2026 15:36:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9W-0003NV-7x; Tue, 12 May 2026 15:36:10 +0000 Received: by outflank-mailman (input) for mailman id 1306999; Tue, 12 May 2026 15:36:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9U-0003NH-QH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp9U-00AQXI-6u for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:36:08 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0348dc-bab6-0a2a0a5309dd-0a2a4503a70c-40 for ; Tue, 12 May 2026 17:36:08 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0348e8-672d-0a2a45030019-d1558032c526-3 for ; Tue, 12 May 2026 17:36:08 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so32813645e9.1 for ; Tue, 12 May 2026 08:36:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:36:07 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:36:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 2/8] x86/mwait-idle: clean up BYT/CHT auto demotion disable From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778600168-3B96D938-1DFE7A89/0/0 X-purgate-type: clean X-purgate-size: 3850 Bay Trail (BYT) and Cherry Trail (CHT) platforms have a very specific way of disabling auto-demotion via specific MSR bits. Clean up the code so that BYT/CHT-specifics do not show up in the common 'struct idle_cpu' data structure. Remove the 'byt_auto_demotion_disable_flag' flag from 'struct idle_cpu', because a better coding pattern is to avoid very case-specific fields like 'bool byt_auto_demotion_disable_flag' in a common data structure, which is used for all platforms, not only BYT/CHT. The code is just more readable when common data structures contain only commonly used fields. Instead, match BYT/CHT in the 'intel_idle_init_cstates_icpu()' function, and introduce a small helper to take care of BYT/CHT auto-demotion. This is consistent with how platform-specific things are done for other platforms. No intended functional changes. Inspired by (and description largely taken from) Linux'es c93d13b661a6 ("intel_idle: clean up BYT/CHT auto demotion disable"). Signed-off-by: Jan Beulich --- v2: Init "first" to "true" in mwait_idle_cpu_init(). --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -103,7 +103,6 @@ struct idle_cpu { * Indicate which enable bits to clear here. */ unsigned long auto_demotion_disable_flags; - bool byt_auto_demotion_disable_flag; enum c1e_promotion c1e_promotion; }; @@ -1144,7 +1143,7 @@ static void cf_check auto_demotion_disab wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); } -static void cf_check byt_auto_demotion_disable(void *dummy) +static void byt_cht_auto_demotion_disable(void) { wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0); wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0); @@ -1195,13 +1194,11 @@ static const struct idle_cpu idle_cpu_sn static const struct idle_cpu idle_cpu_byt = { .state_table = byt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, - .byt_auto_demotion_disable_flag = true, }; static const struct idle_cpu idle_cpu_cht = { .state_table = cht_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, - .byt_auto_demotion_disable_flag = true, }; static const struct idle_cpu idle_cpu_ivb = { @@ -1677,14 +1674,11 @@ static int __init mwait_idle_probe(void) return 0; } -static void mwait_idle_cpu_tweak(unsigned int cpu) +static void mwait_idle_cpu_tweak(unsigned int cpu, bool bsp) { if (icpu->auto_demotion_disable_flags) on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - if (icpu->byt_auto_demotion_disable_flag) - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); - switch (icpu->c1e_promotion) { case C1E_PROMOTION_DISABLE: on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); @@ -1697,12 +1691,24 @@ static void mwait_idle_cpu_tweak(unsigne case C1E_PROMOTION_PRESERVE: break; } + + /* Pkg-scope MSRs on 1-socket-only systems need writing only once. */ + if (!bsp) + return; + + switch (boot_cpu_data.vfm) { + case INTEL_ATOM_SILVERMONT: + case INTEL_ATOM_AIRMONT: + byt_cht_auto_demotion_disable(); + break; + } } static int cf_check mwait_idle_cpu_init( struct notifier_block *nfb, unsigned long action, void *hcpu) { unsigned int cpu = (unsigned long)hcpu, cstate; + static bool first = true; struct acpi_processor_power *dev = processor_powers[cpu]; switch (action) { @@ -1781,7 +1787,8 @@ static int cf_check mwait_idle_cpu_init( dev->count++; } - mwait_idle_cpu_tweak(cpu); + mwait_idle_cpu_tweak(cpu, first); + first = false; return NOTIFY_DONE; } @@ -1818,7 +1825,7 @@ void mwait_idle_resume(void) if (!icpu) return; - mwait_idle_cpu_tweak(smp_processor_id()); + mwait_idle_cpu_tweak(smp_processor_id(), true); } /* Helper function for HPET. */ From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307004.1578737 (Exim 4.92) (envelope-from ) id 1wMp9s-0003lj-HG; Tue, 12 May 2026 15:36:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307004.1578737; Tue, 12 May 2026 15:36:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9s-0003lc-EX; Tue, 12 May 2026 15:36:32 +0000 Received: by outflank-mailman (input) for mailman id 1307004; Tue, 12 May 2026 15:36:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9q-0003lF-NC for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:30 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp9q-00AQbz-47 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:36:30 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0348fa-bab6-0a2a0a5309dd-0a2a4501acb2-8 for ; Tue, 12 May 2026 17:36:30 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0348fd-c1f2-0a2a45010019-d1558032d188-3 for ; Tue, 12 May 2026 17:36:30 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48d146705b4so69766415e9.3 for ; Tue, 12 May 2026 08:36:30 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:36:29 -0700 (PDT) Message-ID: <696b4fe5-d8a5-4768-9b24-5c2d2975e686@suse.com> Date: Tue, 12 May 2026 17:36:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 3/8] x86/mwait-idle: latch struct idle_cpu contents From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778600190-B695FFF4-1EE8C1D0/0/0 X-purgate-type: clean X-purgate-size: 5850 Rather than storing a pointer (and needing to keep all struct instances in memory post-init), and rather than (like the Linux counterpart has it) keeping individual variables, simply copy the respective structure instance. By implication, subsequent updates now need doing to the copy. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -106,14 +106,14 @@ struct idle_cpu { enum c1e_promotion c1e_promotion; }; -static const struct idle_cpu *__ro_after_init icpu; +static struct idle_cpu __ro_after_init icpu; -static const struct cpuidle_state { +struct cpuidle_state { char name[16]; unsigned int flags; unsigned int exit_latency; /* in US */ unsigned int target_residency; /* in US */ -} *__ro_after_init cpuidle_state_table; +}; #define CPUIDLE_FLAG_DISABLED 0x1 /* @@ -1097,7 +1097,7 @@ static void cf_check mwait_idle(void) * leave_mm() to avoid costly and often unnecessary wakeups * for flushing the user TLB's associated with the active mm. */ - if (cpuidle_state_table[].flags & CPUIDLE_FLAG_TLB_FLUSHED) + if (icpu.state_table[].flags & CPUIDLE_FLAG_TLB_FLUSHED) leave_mm(cpu); #endif @@ -1139,7 +1139,7 @@ static void cf_check auto_demotion_disab u64 msr_bits; rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); - msr_bits &= ~(icpu->auto_demotion_disable_flags); + msr_bits &= ~icpu.auto_demotion_disable_flags; wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); } @@ -1371,10 +1371,10 @@ static void __init ivt_idle_state_table_ /* 1 and 2 socket systems use default ivt_cstates */ break; case 2: case 3: - cpuidle_state_table = ivt_cstates_4s; + icpu.state_table = ivt_cstates_4s; break; default: - cpuidle_state_table = ivt_cstates_8s; + icpu.state_table = ivt_cstates_8s; break; } } @@ -1525,14 +1525,12 @@ static void __init adl_idle_state_table_ adl_l_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; /* Disable C1E by clearing the "C1E promotion" bit. */ - idle_cpu_adl.c1e_promotion = C1E_PROMOTION_DISABLE; - idle_cpu_adl_l.c1e_promotion = C1E_PROMOTION_DISABLE; + icpu.c1e_promotion = C1E_PROMOTION_DISABLE; return; } /* Make sure C1E is enabled by default */ - idle_cpu_adl.c1e_promotion = C1E_PROMOTION_ENABLE; - idle_cpu_adl_l.c1e_promotion = C1E_PROMOTION_ENABLE; + icpu.c1e_promotion = C1E_PROMOTION_ENABLE; } /* @@ -1593,6 +1591,7 @@ static int __init mwait_idle_probe(void) { unsigned int eax, ebx, ecx; const struct x86_cpu_id *id; + const struct idle_cpu *idle_cpu; const char *str; if (boot_cpu_data.vendor != X86_VENDOR_INTEL) @@ -1627,8 +1626,8 @@ static int __init mwait_idle_probe(void) pr_debug(PREFIX "MWAIT substates: %#x\n", mwait_substates); - icpu = id->driver_data; - cpuidle_state_table = icpu->state_table; + idle_cpu = id->driver_data; + icpu = *idle_cpu; if (boot_cpu_has(X86_FEATURE_XEN_ARAT)) lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; @@ -1644,7 +1643,7 @@ static int __init mwait_idle_probe(void) const char *ss; do { - const struct cpuidle_state *state = icpu->state_table; + const struct cpuidle_state *state = idle_cpu->state_table; unsigned int bit = 1; ss = strchr(str, ','); @@ -1676,10 +1675,10 @@ static int __init mwait_idle_probe(void) static void mwait_idle_cpu_tweak(unsigned int cpu, bool bsp) { - if (icpu->auto_demotion_disable_flags) + if (icpu.auto_demotion_disable_flags) on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - switch (icpu->c1e_promotion) { + switch (icpu.c1e_promotion) { case C1E_PROMOTION_DISABLE: on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); break; @@ -1732,11 +1731,11 @@ static int cf_check mwait_idle_cpu_init( dev->count = 1; - for (cstate = 0; cpuidle_state_table[cstate].target_residency; ++cstate) { + for (cstate = 0; icpu.state_table[cstate].target_residency; ++cstate) { unsigned int num_substates, hint, state; struct acpi_processor_cx *cx; - hint = flg2MWAIT(cpuidle_state_table[cstate].flags); + hint = flg2MWAIT(icpu.state_table[cstate].flags); state = MWAIT_HINT2CSTATE(hint) + 1; if (state > max_cstate()) { @@ -1752,10 +1751,10 @@ static int cf_check mwait_idle_cpu_init( continue; /* if state marked as disabled, skip it */ - if (cpuidle_state_table[cstate].flags & + if (icpu.state_table[cstate].flags & CPUIDLE_FLAG_DISABLED) { printk(XENLOG_DEBUG PREFIX "state %s is disabled\n", - cpuidle_state_table[cstate].name); + icpu.state_table[cstate].name); continue; } @@ -1773,15 +1772,15 @@ static int cf_check mwait_idle_cpu_init( cx->type = state; cx->address = hint; cx->entry_method = ACPI_CSTATE_EM_FFH; - cx->latency = cpuidle_state_table[cstate].exit_latency; + cx->latency = icpu.state_table[cstate].exit_latency; cx->target_residency = - cpuidle_state_table[cstate].target_residency; - if ((cpuidle_state_table[cstate].flags & + icpu.state_table[cstate].target_residency; + if ((icpu.state_table[cstate].flags & CPUIDLE_FLAG_IRQ_ENABLE) && /* cstate_restore_tsc() needs to be a no-op */ boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) cx->irq_enable_early = true; - if (cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) + if (icpu.state_table[cstate].flags & CPUIDLE_FLAG_IBRS) cx->ibrs_disable = true; dev->count++; @@ -1822,7 +1821,7 @@ int __init mwait_idle_init(struct notifi void mwait_idle_resume(void) { - if (!icpu) + if (!icpu.state_table) return; mwait_idle_cpu_tweak(smp_processor_id(), true); From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307009.1578747 (Exim 4.92) (envelope-from ) id 1wMpAB-0004Gq-S7; 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Tue, 12 May 2026 08:36:48 -0700 (PDT) Message-ID: <2e8a4a74-fae9-4c75-aa98-f4b0dc7ac6bf@suse.com> Date: Tue, 12 May 2026 17:36:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 4/8] x86/mwait-idle: move pre-initialized struct idle_cpu instances From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778600209-BCD63DB1-4E30620E/0/0 X-purgate-type: clean X-purgate-size: 5568 Now that they're not referenced anymore post-init, they can themselves move into .init.rodata. (idle_cpu_adl{,_l} can also become const in the first place.) Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1167,132 +1167,132 @@ static void cf_check c1e_promotion_disab wrmsrl(MSR_IA32_POWER_CTL, msr_bits); } -static const struct idle_cpu idle_cpu_nehalem = { +static const struct idle_cpu __initconstrel idle_cpu_nehalem = { .state_table = nehalem_cstates, .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_atom = { +static const struct idle_cpu __initconstrel idle_cpu_atom = { .state_table = atom_cstates, }; -static const struct idle_cpu idle_cpu_tangier = { +static const struct idle_cpu __initconstrel idle_cpu_tangier = { .state_table = tangier_cstates, }; -static const struct idle_cpu idle_cpu_lincroft = { +static const struct idle_cpu __initconstrel idle_cpu_lincroft = { .state_table = atom_cstates, .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE, }; -static const struct idle_cpu idle_cpu_snb = { +static const struct idle_cpu __initconstrel idle_cpu_snb = { .state_table = snb_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_byt = { +static const struct idle_cpu __initconstrel idle_cpu_byt = { .state_table = byt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_cht = { +static const struct idle_cpu __initconstrel idle_cpu_cht = { .state_table = cht_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_ivb = { +static const struct idle_cpu __initconstrel idle_cpu_ivb = { .state_table = ivb_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_ivt = { +static const struct idle_cpu __initconstrel idle_cpu_ivt = { .state_table = ivt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_hsw = { +static const struct idle_cpu __initconstrel idle_cpu_hsw = { .state_table = hsw_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_bdw = { +static const struct idle_cpu __initconstrel idle_cpu_bdw = { .state_table = bdw_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_skl = { +static const struct idle_cpu __initconstrel idle_cpu_skl = { .state_table = skl_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_skx = { +static const struct idle_cpu __initconstrel idle_cpu_skx = { .state_table = skx_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_icx = { +static const struct idle_cpu __initconstrel idle_cpu_icx = { .state_table = icx_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static struct idle_cpu __ro_after_init idle_cpu_adl = { +static const struct idle_cpu __initconstrel idle_cpu_adl = { .state_table = adl_cstates, }; -static struct idle_cpu __ro_after_init idle_cpu_adl_l = { +static const struct idle_cpu __initconstrel idle_cpu_adl_l = { .state_table = adl_l_cstates, }; -static const struct idle_cpu idle_cpu_mtl_l = { +static const struct idle_cpu __initconstrel idle_cpu_mtl_l = { .state_table = mtl_l_cstates, }; -static const struct idle_cpu idle_cpu_gmt = { +static const struct idle_cpu __initconstrel idle_cpu_gmt = { .state_table = gmt_cstates, }; -static const struct idle_cpu idle_cpu_spr = { +static const struct idle_cpu __initconstrel idle_cpu_spr = { .state_table = spr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_gnr = { +static const struct idle_cpu __initconstrel idle_cpu_gnr = { .state_table = gnr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_gnrd = { +static const struct idle_cpu __initconstrel idle_cpu_gnrd = { .state_table = gnrd_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_avn = { +static const struct idle_cpu __initconstrel idle_cpu_avn = { .state_table = avn_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_bxt = { +static const struct idle_cpu __initconstrel idle_cpu_bxt = { .state_table = bxt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_dnv = { +static const struct idle_cpu __initconstrel idle_cpu_dnv = { .state_table = dnv_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_snr = { +static const struct idle_cpu __initconstrel idle_cpu_snr = { .state_table = snr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_grr = { +static const struct idle_cpu __initconstrel idle_cpu_grr = { .state_table = grr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_srf = { +static const struct idle_cpu __initconstrel idle_cpu_srf = { .state_table = srf_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:37:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:37:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307018.1578756 (Exim 4.92) (envelope-from ) id 1wMpAZ-0004r9-2k; Tue, 12 May 2026 15:37:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307018.1578756; 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Tue, 12 May 2026 08:37:12 -0700 (PDT) Message-ID: <70787b38-b656-4259-a496-0d0545fa98ba@suse.com> Date: Tue, 12 May 2026 17:37:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 5/8] x86/mwait-idle: Remove the 'preferred_cstates' parameter From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778600233-3B161938-09C28C5E/0/0 X-purgate-type: clean X-purgate-size: 5567 From: Artem Bityutskiy Remove the 'preferred_cstates' module parameter as it is not really useful. The parameter currently only affects Alder Lake, where it controls C1/C1E preference, with C1E being the default. The parameter does not support any other platform. For example, Meteor Lake has a similar C1/C1E limitation, but the parameter does not support Meteor Lake. This indicates that the parameter is not very useful. Generally, independent C1 and C1E are important for server platforms where low latency is key. However, they are not as important for client platforms, like Alder Lake, where C1E providing better energy savings is generally preferred. The parameter was originally introduced for Sapphire Rapids Xeon: da0e58c038e6 intel_idle: add 'preferred_cstates' module argument Later it was added to Alder Lake: d1cf8bbfed1ed ("intel_idle: Add AlderLake support") But it was removed from Sapphire Rapids when firmware fixed the C1/C1E limitation: 1548fac47a114 ("intel_idle: make SPR C1 and C1E be independent") So Alder Lake is the only platform left where this parameter has any effect. Remove this parameter to simplify the driver and reduce maintenance burden. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251215111300.132803-1-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git a36dc37b5672 Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2071,12 +2071,6 @@ compression is selected at build time fr ### ple_window (Intel) > `= ` -### preferred-cstates (x86) -> `= ( | List of ( C1 | C1E | C2 | ... )` - -This is a mask of C-states which are to be used preferably. This option is -applicable only on hardware were certain C-states are exclusive of one another. - ### probe-port-aliases (x86) > `= ` --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -72,19 +72,6 @@ boolean_param("mwait-idle", opt_mwait_id static unsigned int mwait_substates; -/* - * Some platforms come with mutually exclusive C-states, so that if one is - * enabled, the other C-states must not be used. Example: C1 and C1E on - * Sapphire Rapids platform. This parameter allows for selecting the - * preferred C-states among the groups of mutually exclusive C-states - the - * selected C-states will be registered, the other C-states from the mutually - * exclusive group won't be registered. If the platform has no mutually - * exclusive C-states, this parameter has no effect. - */ -static unsigned int __ro_after_init preferred_states_mask; -static char __initdata preferred_states[64]; -string_param("preferred-cstates", preferred_states); - #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF /* Reliable LAPIC Timer States, bit 1 for C1 etc. Default to only C1. */ static unsigned int lapic_timer_reliable_states = (1 << 1); @@ -1512,28 +1499,6 @@ static void __init skx_idle_state_table_ } /* - * adl_idle_state_table_update - Adjust AlderLake idle states table. - */ -static void __init adl_idle_state_table_update(void) -{ - /* Check if user prefers C1 over C1E. */ - if ((preferred_states_mask & BIT(1, U)) && - !(preferred_states_mask & BIT(2, U))) { - adl_cstates[0].flags &= ~CPUIDLE_FLAG_DISABLED; - adl_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; - adl_l_cstates[0].flags &= ~CPUIDLE_FLAG_DISABLED; - adl_l_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; - - /* Disable C1E by clearing the "C1E promotion" bit. */ - icpu.c1e_promotion = C1E_PROMOTION_DISABLE; - return; - } - - /* Make sure C1E is enabled by default */ - icpu.c1e_promotion = C1E_PROMOTION_ENABLE; -} - -/* * spr_idle_state_table_update - Adjust Sapphire Rapids idle states table. */ static void __init spr_idle_state_table_update(void) @@ -1579,11 +1544,6 @@ static void __init mwait_idle_state_tabl case INTEL_EMERALDRAPIDS_X: spr_idle_state_table_update(); break; - case INTEL_ALDERLAKE: - case INTEL_ALDERLAKE_L: - case INTEL_ATOM_GRACEMONT: - adl_idle_state_table_update(); - break; } } @@ -1592,7 +1552,6 @@ static int __init mwait_idle_probe(void) unsigned int eax, ebx, ecx; const struct x86_cpu_id *id; const struct idle_cpu *idle_cpu; - const char *str; if (boot_cpu_data.vendor != X86_VENDOR_INTEL) return -ENODEV; @@ -1635,39 +1594,6 @@ static int __init mwait_idle_probe(void) pr_debug(PREFIX "lapic_timer_reliable_states %#x\n", lapic_timer_reliable_states); - str = preferred_states; - if (isdigit(str[0])) - preferred_states_mask = simple_strtoul(str, &str, 0); - else if (str[0]) - { - const char *ss; - - do { - const struct cpuidle_state *state = idle_cpu->state_table; - unsigned int bit = 1; - - ss = strchr(str, ','); - if (!ss) - ss = strchr(str, '\0'); - - for (; state->name[0]; ++state) { - bit <<= 1; - if (!cmdline_strcmp(str, state->name)) { - preferred_states_mask |= bit; - break; - } - } - if (!state->name[0]) - break; - - str = ss + 1; - } while (*ss); - - str -= str == ss + 1; - } - if (str[0]) - printk("unrecognized \"preferred-cstates=%s\"\n", str); - mwait_idle_state_table_update(); return 0; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:37:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:37:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307026.1578764 (Exim 4.92) (envelope-from ) id 1wMpAx-0005Tb-9k; Tue, 12 May 2026 15:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307026.1578764; Tue, 12 May 2026 15:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpAx-0005TU-6k; Tue, 12 May 2026 15:37:39 +0000 Received: by outflank-mailman (input) for mailman id 1307026; Tue, 12 May 2026 15:37:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpAw-0005Ov-5K for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:37:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpAv-00BBxs-I1 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:37:37 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034938-bab6-0a2a0a5309dd-0a2a45098220-34 for ; Tue, 12 May 2026 17:37:37 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034941-2497-0a2a45090019-d155dd32c877-3 for ; Tue, 12 May 2026 17:37:37 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-43d77f6092eso3543632f8f.2 for ; Tue, 12 May 2026 08:37:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:37:36 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:37:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 6/8] x86/mwait-idle: drop const from struct cpuidle_state arrays From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778600257-40D67A53-BB1F923F/0/0 X-purgate-type: clean X-purgate-size: 6280 A subsequent change will want to be able to alter them based on a new command line option. (Note that some were __ro_after_init already.) Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -83,7 +83,7 @@ enum c1e_promotion { }; struct idle_cpu { - const struct cpuidle_state *state_table; + struct cpuidle_state *state_table; /* * Hardware C-state auto-demotion may not always be optimal. @@ -139,7 +139,7 @@ struct cpuidle_state { * which is also the index into the MWAIT hint array. * Thus C0 is a dummy. */ -static const struct cpuidle_state nehalem_cstates[] = { +static struct cpuidle_state __ro_after_init nehalem_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -167,7 +167,7 @@ static const struct cpuidle_state nehale {} }; -static const struct cpuidle_state snb_cstates[] = { +static struct cpuidle_state __ro_after_init snb_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -201,7 +201,7 @@ static const struct cpuidle_state snb_cs {} }; -static const struct cpuidle_state byt_cstates[] = { +static struct cpuidle_state __ro_after_init byt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -235,7 +235,7 @@ static const struct cpuidle_state byt_cs {} }; -static const struct cpuidle_state cht_cstates[] = { +static struct cpuidle_state __ro_after_init cht_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -269,7 +269,7 @@ static const struct cpuidle_state cht_cs {} }; -static const struct cpuidle_state ivb_cstates[] = { +static struct cpuidle_state __ro_after_init ivb_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -303,7 +303,7 @@ static const struct cpuidle_state ivb_cs {} }; -static const struct cpuidle_state ivt_cstates[] = { +static struct cpuidle_state __ro_after_init ivt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -331,7 +331,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state ivt_cstates_4s[] = { +static struct cpuidle_state __ro_after_init ivt_cstates_4s[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -359,7 +359,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state ivt_cstates_8s[] = { +static struct cpuidle_state __ro_after_init ivt_cstates_8s[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -387,7 +387,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state hsw_cstates[] = { +static struct cpuidle_state __ro_after_init hsw_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -439,7 +439,7 @@ static const struct cpuidle_state hsw_cs {} }; -static const struct cpuidle_state bdw_cstates[] = { +static struct cpuidle_state __ro_after_init bdw_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -565,7 +565,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state icx_cstates[] = { +static struct cpuidle_state __ro_after_init icx_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_IRQ_ENABLE, @@ -665,7 +665,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state mtl_l_cstates[] = { +static struct cpuidle_state __ro_after_init mtl_l_cstates[] = { { .name = "C1E", .flags = MWAIT2flg(0x01), @@ -687,7 +687,7 @@ static const struct cpuidle_state mtl_l_ {} }; -static const struct cpuidle_state gmt_cstates[] = { +static struct cpuidle_state __ro_after_init gmt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_DISABLED, @@ -743,7 +743,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state gnr_cstates[] = { +static struct cpuidle_state __ro_after_init gnr_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -771,7 +771,7 @@ static const struct cpuidle_state gnr_cs {} }; -static const struct cpuidle_state gnrd_cstates[] = { +static struct cpuidle_state __ro_after_init gnrd_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -799,7 +799,7 @@ static const struct cpuidle_state gnrd_c {} }; -static const struct cpuidle_state atom_cstates[] = { +static struct cpuidle_state __ro_after_init atom_cstates[] = { { .name = "C1E", .flags = MWAIT2flg(0x00), @@ -827,7 +827,7 @@ static const struct cpuidle_state atom_c {} }; -static const struct cpuidle_state tangier_cstates[] = { +static struct cpuidle_state __ro_after_init tangier_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -861,7 +861,7 @@ static const struct cpuidle_state tangie {} }; -static const struct cpuidle_state avn_cstates[] = { +static struct cpuidle_state __ro_after_init avn_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -923,7 +923,7 @@ static struct cpuidle_state __ro_after_i {} }; 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Tue, 12 May 2026 08:38:09 -0700 (PDT) Message-ID: <8c46fedd-f1f3-4cad-91fb-1b3b8d58db50@suse.com> Date: Tue, 12 May 2026 17:38:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 7/8] x86/mwait-idle: Add cmdline option to adjust C-states table From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778600289-4217E3FF-6158878D/0/0 X-purgate-type: clean X-purgate-size: 8619 From: Artem Bityutskiy Add a new module parameter that allows adjusting the C-states table used by the driver. Currently, the C-states table is hardcoded in the driver based on the CPU model. The goal is to have good enough defaults for most users. However, C-state characteristics, such as exit latency and residency, can vary between different variants of the same CPU model and BIOS settings. Moreover, different platform usage models and user preferences may benefit from different C-state target_residency values. Provide a way for users to adjust the C-states table via a module parameter "table". The general format is: "state1:latency1:target_residency1,state2:latency2:target_residency2,..." In other words, represent each C-state by its name, exit latency (in microseconds), and target residency (in microseconds), separated by colons. Separate multiple C-states by commas. For example, suppose a CPU has 3 C-states with the following characteristics: C1: exit_latency=1, target_residency=2 C1E: exit_latency=10, target_residency=10 C6: exit_latency=100, target_residency=500 Users can specify a custom C-states table as follows: 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" Result: C1: exit_latency=2, target_residency=2 C1E: exit_latency=5, target_residency=20 C6: exit_latency=150, target_residency=600 2. intel_idle.table="C6::400" Result: C1: exit_latency=1, target_residency=2 (unchanged) C1E: exit_latency=10, target_residency=10 (unchanged) C6: exit_latency=100, target_residency=400 (only target_residency changed) Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. Other adjustments to fit our env. Signed-off-by: Jan Beulich --- For the initial attempt, I've left the new option as a standalone one. It may be worth integrating with "mwait-idle", but I think much of the parsing would then want doing differently. It'll then likely be much harder to apply future Linux changes there. --- v2: Correct example in cmdline doc. --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1916,6 +1916,23 @@ Print boot time MTRR state. Use the MWAIT idle driver (with model specific C-state knowledge) instead of the ACPI based one. +### mwait-idle.table (x86) +> `= ` + + Define the C-states table from a user input string. Expected format is + 'name:latency:residency', where: + - name: The C-state name. + - latency: The C-state exit latency in us. + - residency: The C-state target residency in us. + + Multiple C-states can be defined by separating them with commas: + 'name1:latency1:residency1,name2:latency2:residency2' + + Example: mwait-idle.table=C1:1:1,C1E:5:10,C6:100:600 + + To leave latency or residency unchanged, use an empty field, for example: + 'C1:1:1,C1E::10' - leaves C1E latency unchanged. + ### nmi (x86) > `= ignore | dom0 | fatal` --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -70,6 +70,11 @@ static __initdata bool opt_mwait_idle = true; boolean_param("mwait-idle", opt_mwait_idle); +/* The maximum allowed length for the 'table' module parameter */ +#define MAX_CMDLINE_TABLE_LEN 256 +static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; +string_param("mwait-idle.table", cmdline_table_str); + static unsigned int mwait_substates; #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF @@ -122,6 +127,9 @@ struct cpuidle_state { */ #define CPUIDLE_FLAG_IBRS 0x20000 +/* C-states data from the 'mwait-idle.table' cmdline parameter */ +static struct cpuidle_state cmdline_states[ACPI_PROCESSOR_MAX_POWER] __initdata; + /* * MWAIT takes an 8-bit "hint" in EAX "suggesting" * the C-state (top nibble) and sub-state (bottom nibble) @@ -1547,6 +1555,161 @@ static void __init mwait_idle_state_tabl } } + /** + * get_cmdline_field - Get the current field from a cmdline string. + * @args: The cmdline string to get the current field from. + * @field: Pointer to the current field upon return. + * @sep: The fields separator character. + * + * Examples: + * Input: args="C1:1:1,C1E:2:10", sep=':' + * Output: field="C1", return "1:1,C1E:2:10" + * Input: args="C1:1:1,C1E:2:10", sep=',' + * Output: field="C1:1:1", return "C1E:2:10" + * Ipnut: args="::", sep=':' + * Output: field="", return ":" + * + * Return: The continuation of the cmdline string after the field or NULL. + */ +static char *__init get_cmdline_field(char *args, char **field, char sep) +{ + unsigned int i; + + for (i = 0; args[i] && !isspace(args[i]); i++) { + if (args[i] == sep) + break; + } + + *field = args; + + if (args[i] != sep) + return NULL; + + args[i] = '\0'; + return args + i + 1; +} + +/** + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. + * + * Adjust the C-states table with data from the 'mwait-idle.table' parameter + * (if specified). + */ +static void __init cmdline_table_adjust(void) +{ + char *args = cmdline_table_str; + struct cpuidle_state *state; + unsigned int i, state_count; + + if (args[0] == '\0') + /* The 'mwait-idle.table' module parameter was not specified */ + return; + + /* Create a copy of the C-states table */ + for (i = 0; + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; + i++) + cmdline_states[i] = icpu.state_table[i]; + + state_count = i; + + /* + * Adjust the C-states table copy with data from the 'mwait-idle.table' + * module parameter. + */ + while (args) { + char *fields, *name, *val; + + /* + * Get the next C-state definition, which is expected to be + * '::'. Treat "empty" + * fields as unchanged. For example, + * '::' leaves the latency unchanged. + */ + args = get_cmdline_field(args, &fields, ','); + + /* name */ + fields = get_cmdline_field(fields, &name, ':'); + if (!fields) + goto error; + + /* Find the C-state by its name */ + state = NULL; + for (i = 0; i < state_count; i++) { + if (!strcmp(name, cmdline_states[i].name)) { + state = &cmdline_states[i]; + break; + } + } + + if (!state) { + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", + name); + continue; + } + + /* Latency */ + fields = get_cmdline_field(fields, &val, ':'); + if (!fields) + goto error; + + if (*val) { + const char *end; + unsigned long n = simple_strtoul(val, &end, 0); + + state->exit_latency = n; + if (*end || state->exit_latency != n) + goto error; + } + + /* Target residency */ + fields = get_cmdline_field(fields, &val, ':'); + + if (*val) { + const char *end; + unsigned long n = simple_strtoul(val, &end, 0); + + state->target_residency = n; + if (*end || state->target_residency != n) + goto error; + } + + /* + * Allow for 3 more fields, but ignore them. Helps to make + * possible future extensions of the cmdline format backward + * compatible. + */ + for (i = 0; fields && i < 3; i++) { + fields = get_cmdline_field(fields, &val, ':'); + if (!fields) + break; + } + + if (fields) { + printk(XENLOG_ERR PREFIX + "Too many fields for C-state '%s'\n", + state->name); + goto error; + } + + printk(XENLOG_INFO PREFIX + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", + state->name, state->exit_latency, state->target_residency); + } + + /* Copy the adjusted C-states table back */ + for (i = 0; i < state_count; i++) + icpu.state_table[i] = cmdline_states[i]; + + printk(XENLOG_INFO PREFIX + "Adjusted C-states with data from 'mwait-idle.table'\n"); + return; + + error: + printk(PREFIX + "Failed to adjust C-states with data from 'mwait-idle.table'\n"); +} + static int __init mwait_idle_probe(void) { unsigned int eax, ebx, ecx; @@ -1596,6 +1759,8 @@ static int __init mwait_idle_probe(void) mwait_idle_state_table_update(); + cmdline_table_adjust(); + return 0; } From xen-devel-bounces@lists.xenproject.org Tue May 12 15:38:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:38:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307041.1578782 (Exim 4.92) (envelope-from ) id 1wMpBs-0006yV-Rw; Tue, 12 May 2026 15:38:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307041.1578782; Tue, 12 May 2026 15:38:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpBs-0006xs-Oz; Tue, 12 May 2026 15:38:36 +0000 Received: by outflank-mailman (input) for mailman id 1307041; Tue, 12 May 2026 15:38:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpBr-0006ve-1f for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:38:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpBq-004MKj-Eh for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:38:34 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03495d-5cb7-0a2a0a5109dd-0a2a4505e454-42 for ; Tue, 12 May 2026 17:38:34 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a03497a-aaa8-0a2a45050019-d1558034dc9f-3 for ; Tue, 12 May 2026 17:38:34 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48909558b3aso58479815e9.0 for ; Tue, 12 May 2026 08:38:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:38:33 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:38:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 8/8] x86/mwait-idle: Add C-states validation From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778600314-DAD6F443-93512BCA/0/0 X-purgate-type: clean X-purgate-size: 3148 From: Artem Bityutskiy Add validation for C-states specified via the "table=" module parameter. Treat this module parameter as untrusted input and validate it thoroughly. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251216080402.156988-4-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git be6a150829b3 Add __init to validate_cmdline_cstate(). Other adjustments to fit our env. Signed-off-by: Jan Beulich --- v2: Const-ify validate_cmdline_cstate()'s parameters. --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -72,6 +72,11 @@ boolean_param("mwait-idle", opt_mwait_id /* The maximum allowed length for the 'table' module parameter */ #define MAX_CMDLINE_TABLE_LEN 256 +/* Maximum allowed C-state latency */ +#define MAX_CMDLINE_LATENCY_US (5 * 1000 /* USEC_PER_MSEC */) +/* Maximum allowed C-state target residency */ +#define MAX_CMDLINE_RESIDENCY_US (100 * 1000 /* USEC_PER_MSEC */) + static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; string_param("mwait-idle.table", cmdline_table_str); @@ -1590,6 +1595,41 @@ static char *__init get_cmdline_field(ch } /** + * validate_cmdline_cstate - Validate a C-state from cmdline. + * @state: The C-state to validate. + * @prev_state: The previous C-state in the table or NULL. + * + * Return: 0 if the C-state is valid or -EINVAL otherwise. + */ +static int __init validate_cmdline_cstate(const struct cpuidle_state *state, + const struct cpuidle_state *prev_state) +{ + if (state->exit_latency == 0) + /* Exit latency 0 can only be used for the POLL state */ + return -EINVAL; + + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) + return -EINVAL; + + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) + return -EINVAL; + + if (state->target_residency < state->exit_latency) + return -EINVAL; + + if (!prev_state) + return 0; + + if (state->exit_latency <= prev_state->exit_latency) + return -EINVAL; + + if (state->target_residency <= prev_state->target_residency) + return -EINVAL; + + return 0; +} + +/** * cmdline_table_adjust - Adjust the C-states table with data from cmdline. * * Adjust the C-states table with data from the 'mwait-idle.table' parameter @@ -1697,6 +1737,21 @@ static void __init cmdline_table_adjust( state->name, state->exit_latency, state->target_residency); } + /* Validate the adjusted C-states */ + for (i = 0; i < state_count; i++) { + struct cpuidle_state *prev_state; + + state = &cmdline_states[i]; + prev_state = i ? &cmdline_states[i - 1] : NULL; + + if (validate_cmdline_cstate(state, prev_state)) { + printk(XENLOG_ERR PREFIX + "C-state '%s' validation failed\n", + state->name); + goto error; + } + } + /* Copy the adjusted C-states table back */ for (i = 0; i < state_count; i++) icpu.state_table[i] = cmdline_states[i]; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:39:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:39:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307053.1578791 (Exim 4.92) (envelope-from ) id 1wMpCy-0007ac-4A; Tue, 12 May 2026 15:39:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307053.1578791; Tue, 12 May 2026 15:39:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpCy-0007aV-1X; Tue, 12 May 2026 15:39:44 +0000 Received: by outflank-mailman (input) for mailman id 1307053; Tue, 12 May 2026 15:39:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpCw-0007aL-LQ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:39:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpCw-00AMT0-2C for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:39:42 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0349a6-bab6-0a2a0a5309dd-0a2a4501e428-36 for ; Tue, 12 May 2026 17:39:42 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0349bd-c1f2-0a2a45010019-d155802acc0b-3 for ; Tue, 12 May 2026 17:39:41 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so60580955e9.0 for ; Tue, 12 May 2026 08:39:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778600382-AE342FF4-B284F238/0/0 X-purgate-type: clean X-purgate-size: 516 On 12.05.2026 17:34, Jan Beulich wrote: > Includes a few custom changes, too. > > 1: arrange for BSP MSR adjustments during S3 resume > 2: clean up BYT/CHT auto demotion disable > 3: latch struct idle_cpu contents > 4: move pre-initialized struct idle_cpu instances > 5: Remove the 'preferred_cstates' parameter > 6: drop const from struct cpuidle_state arrays > 7: Add cmdline option to adjust C-states table > 8: Add C-states validation I probably should have Cc-ed you on the v2 submission. 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In order not to make it easy for a domU > to query existence of a domid, adding permission for a non-existing > domain is not rejected by Xenstore. The XSA-417 patches solved that > problem by adding a flag to a permission entry referencing a not > existing domain, indicating that the permission should not be > effective for Xenstore. > > One corner case was not handled: > > Consider guest 1 and guest 2 running. Guest 1 adds guest 2 to be able > to access a Xenstore entry. Now guest 2 is removed from the system and > a new guest 3 with the same domid as guest 2 had is being created. > > When guest 3 would try now to access the Xenstore entry, it would fail, > as Xenstore would see that the Xenstore entry is older than guest 3. > > But if guest 1 is modifying the permissions of the Xenstore entry > again, e.g. by adding another domain, the permission entry for guest 2 > would lose its "special flag", resulting in guest 3 now really gaining > access to the Xenstore entry. > > This series is fixing this problem by the following means: > > - In order to allow guests to know that a Xenstore entry permission > might have gone stale, allow unprivileged guests to receive > @releaseDomain watch events. This doesn't open a security hole, as > the only knowledge which can by gathered from that change is that a > domain is gone, not that a domain with a specific domid is existing. > > - When a domain is removed, remove all permissions relating to this > domain from all Xenstore entries. > > Note that this issue was discussed by the Xen security team and we > decided not to issue an XSA, as there are no known use cases where one > unprivileged guest would grant access to its Xenstore nodes to more > than one other unprivileged guests. > > We decided to delay this patch series until the watch depth feature has > been committed, as with that feature available it is now possible for > a guest to handle the death of a specific domain in a sane way. > > Changes in V2: > - some minor comments addressed > > Denis Mukhin (1): > xen/public: introduce DOMID_ANY > > Juergen Gross (3): > tools/xenstored: add support for "all domains" node permission > tools/xenstored: allow @releaseDomain watch for all domains > tools/xenstored: remove permissions related to dead domain > > docs/man/xl.cfg.5.pod.in | 4 ++ > tools/xenstored/core.c | 45 ++++++++++++++----- > tools/xenstored/domain.c | 78 +++++++++++++++++++++------------ > tools/xenstored/domain.h | 3 +- > xen/include/public/io/xs_wire.h | 2 + > xen/include/public/xen.h | 7 +++ > 6 files changed, 100 insertions(+), 39 deletions(-) > Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:53:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:53:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307082.1578810 (Exim 4.92) (envelope-from ) id 1wMpPq-0002zK-IL; Tue, 12 May 2026 15:53:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307082.1578810; Tue, 12 May 2026 15:53:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpPq-0002zD-FT; Tue, 12 May 2026 15:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1307082; Tue, 12 May 2026 15:53:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMpPo-0002z7-Th for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:53:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpPo-004OV0-7B for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:53:00 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034cd7-5cb7-0a2a0a5109dd-0a2a450193be-6 for ; Tue, 12 May 2026 17:53:00 +0200 Received: from [209.85.208.50] (helo=mail-ed1-f50.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034cdb-c1f2-0a2a45010019-d155d032c0ad-3 for ; Tue, 12 May 2026 17:53:00 +0200 Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-67e2498f3a7so9388797a12.2 for ; Tue, 12 May 2026 08:53:00 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------lTQ1cRUfiNgBk99CdoxkFxlz" X-purgate-ID: tlsNG-d62444/1778601180-B7555FF4-13DA3B1C/10/73395122804 X-purgate-type: spam X-purgate-size: 12454 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------lTQ1cRUfiNgBk99CdoxkFxlz Content-Type: multipart/mixed; boundary="------------RODOeHPUGP0nvgf27v1Dq21C"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Oleksii Kurochko , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Message-ID: <06e1554e-87b0-4aae-ac55-a547bf810a92@suse.com> Subject: Re: [PATCH v2 0/4] tools/xenstore: fix issue related to XSA-417 References: <20260429120619.1013440-1-jgross@suse.com> <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> In-Reply-To: <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------RODOeHPUGP0nvgf27v1Dq21C Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoDTNoFAwAAAAAACgkQsN6d1ii/Ey8X AQf/czV3eozegtxuUwnqXhiGgwIW0+htQ26fLwRZTRSIMNM7bZQTVPEurz4IhVZa3LR9GXypS20J P0H80L7JChOdFdXkgiiRcAJ0zOSf+z+f7bzPjSva60toaP+ZBuNp3tSXCHr7hQoD/v7xlKIF2Ogr TvP97mKMsZUIoPVWCjNLYfMyYz7hioOhhG1b7idhRb3Qe+mEFKRuB0L96sOiJ/jvny0fQHGaAZ7e i6Jhhh2p+Bes3gJ+vv1JBWFyliP9Eb1/i0FHgldbvHcWsHOz78oRenefOKX065nSxSjmY/ExTO2E qcz3iwSFv2g0Ojpfjz+jGCsBdnqgDKTjn2TUL7Pmrw== =NhOb -----END PGP SIGNATURE----- --------------lTQ1cRUfiNgBk99CdoxkFxlz-- From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307094.1578837 (Exim 4.92) (envelope-from ) id 1wMpSd-0003uT-Fr; Tue, 12 May 2026 15:55:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307094.1578837; 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8d69d0bsm4361335e9.13.2026.05.12.08.55.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 08:55:51 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778601352; x=1779206152; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eWLklbcInMPQObYaiBnOHsAE/t9hZPY8o89RLu9YkzU=; b=O9THNi4xrLB6Y1oPM3C5RAVefSiWxB0mUz1/YviUnYfo77kyEii4xWoAaSKojZpRRo Ou71vQ/vApP4fDmX+Gguo8TN2NqBAu0j7H+nmj9FLLOqlk7SFrltzAMYF1pMnOQclL+M EZuXEP9bezZLP3AignX6yU2lpNTpWoKZQcTyc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778601352; x=1779206152; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eWLklbcInMPQObYaiBnOHsAE/t9hZPY8o89RLu9YkzU=; b=gHce2PX/HUB0AsAD88hC5IpcZXfu39enfhZnTG/LxSYZwnxLu3g8ZQbYAfgbKIWE2H Sqc13k6FDtLO/g4T32O/MwjSMlVDHnsLHH03ylNIcbaQlF4gjzZg6+oZBZzZe86RDrVE YboDLtXvuXN+JuLMNKbI0Qo/P8lseQ9oCtpeofUXW0NhlAdi+xzos9hw72kGUpZTON2f 6fwU4qgpa9qRWi2HW133eCOxEdMEGMUPB/KwPJW7Bf3Lah/Qq9q8ZqvAFasuB+PJS2gJ GVSt6r1jgaZvDRrN5um3UKvztEbQJyBCFexdFdV6DBZBvm2cRbPFrH3kdrB+FTO7ZWOH aEeQ== X-Gm-Message-State: AOJu0YxjKKhf3PQX4vVaAEdXit5cmzIegT0g2tJvK/4SjHkgdBrFoEpz qypkpjHqKsW0jswSZ7gIFt/ZiUZXNV78yGXzKvwMgvKC6T3CjQbiwHbsup6+jOnEEgf+QPhFOKn uV/l7zVc= X-Gm-Gg: Acq92OFZnFGKEj3datAxcOHrrQ4jtTaTOf6u+neKNOvtTKw21+BOwLQLapg3RE745ja XUqdC7AH/NqrIIcOcPQbazjxV/hRp3z9hh90Tzl62rz+G3OJ2l0C7c2WmnIREQWffj4KYBVaJmz I9kSPm0oFQnadFel535d6fbBkRBbLEcIxpyVF0uIYabQU3EJTEvTW3oSpUU5vr+jzwW+fucxipF V3f4GjvFntZcO/r+5xcnX/3YwVemyPunPA6pJAW5nhRG//vRjhXi668WrSBF7ecG1QKZe9fu3C0 6No2r3iu3EAwhyaMMeysgKb6vvVVqWlaET7Z7zL1yOnBeXBAU7SICwyCSXPqNrerMyMj8npUjD9 a6403XygFWeHoJihhpGCWrwidM5vpvDDUUQY8dHjpQs21T7s7fo/+2Q4Ud+fSSgiNYiFGhaLCrA c0GF7GRUBSPqpbgYmfRirhv3J2MHgy2zbs2G5hJXwKPJTBtMw+Z+fFEwqeZMAhICOpfMfiXGnTw nmn X-Received: by 2002:a05:600c:45d0:b0:488:7ff6:1f75 with SMTP id 5b1f17b1804b1-48e707f821dmr238327625e9.21.1778601351719; Tue, 12 May 2026 08:55:51 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko Subject: [PATCH 2/2] tests/paging-mempool: Extend to test P2M relocation Date: Tue, 12 May 2026 16:55:40 +0100 Message-Id: <20260512155540.1733403-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260512155540.1733403-1-andrew.cooper3@citrix.com> References: <20260512155540.1733403-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778601352-37F7EA53-072FC948/10/73395122804 X-purgate-type: spam X-purgate-size: 12153 XENMAPSPACE_gmfn_range was found to be buggy with overlapping ranges, and the fix is sufficiently far from clear that yours truely decided a test was in order. XENMAPSPACE_gmfn_range is exposed by xendevicemodel_relocate_memory() so take the opportunity to create a better example for others to copy. The test works as follows. Populate 2M of RAM in the guest, marking the pages so they can be identified later. Then construct four relocation test cases (overlapping vs non-overlapping, forwards vs backwards) using the marks in the guest pages to confirm that the P2M was adjusted correctly. The use of XEN_DOMCTL_CDF_iommu forces xenmem_add_to_physmap() to limit the iteration count to a maximum of 16. Use this to force a continuation and exercise more of the logic. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Oleksii Kurochko paging-mempool isn't necessary the best named test to put this in, but it's the one with the best structure to fit it. We are going to want to shuffle the testing structure a bit when we've got a couple more examples to draw good lines between. Without "memory: overlapping XENMAPSPACE_gmfn_range requests", this fails: ... Test p2m memory relocation Test forward, no overlap: GFNs [3e0...3ff] -> [400...41f] Test forward, overlapping: GFNs [3c0...3df] -> [3c1...3e0] Fail: check mark unable to map 003c1: -22 Fail: check mark unable to map 003c2: -22 Fail: check mark unable to map 003c3: -22 Fail: check mark unable to map 003c4: -22 Fail: check mark unable to map 003c5: -22 Fail: check mark unable to map 003c6: -22 Fail: check mark unable to map 003c7: -22 Fail: check mark unable to map 003c8: -22 Fail: check mark unable to map 003c9: -22 Fail: check mark unable to map 003ca: -22 Fail: check mark unable to map 003cb: -22 Fail: check mark unable to map 003cc: -22 Fail: check mark unable to map 003cd: -22 Fail: check mark unable to map 003ce: -22 Fail: check mark unable to map 003cf: -22 Fail: check mark unable to map 003d0: -22 Fail: check mark unable to map 003d1: -22 Fail: check mark unable to map 003d2: -22 Fail: check mark unable to map 003d3: -22 Fail: check mark unable to map 003d4: -22 Fail: check mark unable to map 003d5: -22 Fail: check mark unable to map 003d6: -22 Fail: check mark unable to map 003d7: -22 Fail: check mark unable to map 003d8: -22 Fail: check mark unable to map 003d9: -22 Fail: check mark unable to map 003da: -22 Fail: check mark unable to map 003db: -22 Fail: check mark unable to map 003dc: -22 Fail: check mark unable to map 003dd: -22 Fail: check mark unable to map 003de: -22 Fail: check mark unable to map 003df: -22 Fail: check mark: gfn 003e0 expecting fffffe20 (479), got fffffe3f (448) With the fix in place, the test passes: ... Test p2m memory relocation Test forward, no overlap: GFNs [3e0...3ff] -> [400...41f] Test forward, overlapping: GFNs [3c0...3df] -> [3c1...3e0] Test backwards, no overlap: GFNs [200...21f] -> [1e0...1ff] Test backwards, no overlap: GFNs [220...23f] -> [21f...23e] --- tools/tests/paging-mempool/Makefile | 4 + .../paging-mempool/test-paging-mempool.c | 197 +++++++++++++++++- xen/common/memory.c | 2 +- 3 files changed, 201 insertions(+), 2 deletions(-) diff --git a/tools/tests/paging-mempool/Makefile b/tools/tests/paging-mempool/Makefile index a1e12584ce80..7444d81b8460 100644 --- a/tools/tests/paging-mempool/Makefile +++ b/tools/tests/paging-mempool/Makefile @@ -25,9 +25,13 @@ uninstall: CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) +CFLAGS += $(CFLAGS_libxendevicemodel) +CFLAGS += $(CFLAGS_libxenforeignmemory) CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) +LDFLAGS += $(LDLIBS_libxendevicemodel) +LDFLAGS += $(LDLIBS_libxenforeignmemory) LDFLAGS += $(APPEND_LDFLAGS) %.o: Makefile diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index d1207d26d3fc..fc0375358324 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -19,10 +20,15 @@ static unsigned int nr_failures; }) static xc_interface *xch; +static xendevicemodel_handle *dh; +static xenforeignmemory_handle *fh; static uint32_t domid; static struct xen_domctl_createdomain create = { - .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, + .flags = (XEN_DOMCTL_CDF_hvm | + XEN_DOMCTL_CDF_hap | + XEN_DOMCTL_CDF_iommu | + 0), .max_vcpus = 1, .max_grant_frames = 1, .grant_opts = XEN_DOMCTL_GRANT_version(1), @@ -145,6 +151,183 @@ static int test_paging_mempool_size(void) return 0; } +static int mark_guest_mem(xen_pfn_t gfn, size_t count) +{ + xen_pfn_t gfns[count]; + uint32_t *mem; + size_t i; + int rc; + + for ( i = 0; i < count; ++i ) + gfns[i] = gfn + i; + + mem = xenforeignmemory_map(fh, domid, PROT_READ | PROT_WRITE, + count, gfns, NULL); + if ( !mem ) + return fail(" Fail: mark mem foreign map: %d - %s\n", + errno, strerror(errno)); + + for ( i = 0; i < count; ++i ) + { + uint32_t *mark = &mem[i << 10]; + + *mark = ~i; + } + + rc = xenforeignmemory_unmap(fh, mem, count); + if ( rc ) + return fail(" Fail: mark mem foreign unmap: %d - %s\n", + errno, strerror(errno)); + + return 0; +} + +static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) +{ + xen_pfn_t gfns[count]; + int errs[count]; + uint32_t *mem; + size_t i; + int rc = 0; + + for ( i = 0; i < count; ++i ) + gfns[i] = gfn + i; + + mem = xenforeignmemory_map(fh, domid, PROT_READ, + count, gfns, errs); + if ( !mem ) + return fail(" Fail: check mark foreign map: %d - %s\n", + errno, strerror(errno)); + + for ( i = 0; i < count; ++i ) + { + uint32_t *mark = &mem[i << 10]; + uint32_t exp = ~(mark_start + i); + + if ( errs[i] ) + { + rc = -1; + fail(" Fail: check mark unable to map %05lx: %d\n", gfns[i], errs[i]); + continue; + } + + if ( *mark == exp ) + continue; + + fail(" Fail: check mark: gfn %05lx expecting %08x (%u), got %08x (%u)\n", + gfns[i], exp, ~exp, *mark, ~*mark); + rc = -1; + } + + if ( xenforeignmemory_unmap(fh, mem, count) ) + return fail(" Fail: check marks foreign unmap: %d - %s\n", + errno, strerror(errno)); + + return rc; +} + +static int test_p2m_relocate_memory(void) +{ +#define GFN_2M ((2UL << 20) >> 12) +#define GFN_4M ((4UL << 20) >> 12) + + xen_pfn_t physmap[] = { GFN_2M }; + int rc; + + /* + * Inherited state of the domain: + * - Unlimited allocation + * + * Construction of the test: + * - Populate 2M at 2M, mark the pages. + */ + printf("Test p2m memory relocation\n"); + + rc = xc_domain_populate_physmap_exact(xch, domid, ARRAY_SIZE(physmap), + 9 /* order 2M */, 0 /* flags */, physmap); + if ( rc ) + return fail(" Fail: populate physmap: %d - %s\n", + errno, strerror(errno)); + + rc = mark_guest_mem(GFN_2M, 1 << 9 /* order 2M */); + if ( rc ) + return rc; + + /* Sanity check the start and end markers. */ + if ( (rc = check_guest_marks(GFN_2M, 0, 8)) || + (rc = check_guest_marks(GFN_4M - 8, 512 - 8, 8)) ) + return rc; + + +#define GFN_PAIR(g, c) (g), ((g) + (c) - 1) + + /* + * Move the final 32 pages below 4M forward by 32 pages. All destination + * GFNs free, and no overlap. + */ + printf(" Test forward, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_4M - 32, 32), GFN_PAIR(GFN_4M, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_4M - 32, GFN_4M); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_4M, 512 - 32, 32); + if ( rc ) + return rc; + + /* + * Move the next 32 pages below 4M forward by 1 page. The region is + * almost completely overlapping. + */ + printf(" Test forward, overlapping: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_4M - 64, 32), GFN_PAIR(GFN_4M - 63, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_4M - 64, GFN_4M - 63); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_4M - 63, 512 - 64, 32); + if ( rc ) + return rc; + + /* + * Move the first 32 pages above 2M backwards by 32 pages. All + * destination GFNs free, and no overlap. + */ + printf(" Test backwards, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_2M, 32), GFN_PAIR(GFN_2M - 32, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_2M, GFN_2M - 32); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_2M - 32, 0, 32); + if ( rc ) + return rc; + + /* + * Move the next 32 pages above 2M backwards by 1 page. The region is + * almost completely overlapping. + */ + printf(" Test backwards, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_2M + 32, 32), GFN_PAIR(GFN_2M + 31, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_2M + 32, GFN_2M + 31); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_2M + 31, 32, 32); + if ( rc ) + return rc; + + return 0; +} + static int run_tests(void) { int rc; @@ -153,6 +336,10 @@ static int run_tests(void) if ( rc ) return rc; + rc = test_p2m_relocate_memory(); + if ( rc ) + return rc; + return 0; } @@ -166,6 +353,14 @@ int main(int argc, char **argv) if ( !xch ) err(1, "xc_interface_open"); + dh = xendevicemodel_open(NULL, 0); + if ( !dh ) + err(1, "xendevicemodel_open"); + + fh = xenforeignmemory_open(NULL, 0); + if ( !fh ) + err(1, "xenforeignmemory_open"); + rc = xc_domain_create(xch, &domid, &create); if ( rc ) { diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..c6109dc7d664 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -962,7 +962,7 @@ int xenmem_add_to_physmap(struct domain *d, struct xen_add_to_physmap *xatp, unsigned int done = 0; long rc = 0; union add_to_physmap_extra extra = {}; - struct page_info *pages[16]; + struct page_info *pages[16]; /* If changing this, adjust test-paging-mempool too */ if ( !paging_mode_translate(d) ) { -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307093.1578825 (Exim 4.92) (envelope-from ) id 1wMpSc-0003XP-7j; Tue, 12 May 2026 15:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307093.1578825; Tue, 12 May 2026 15:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSc-0003WC-1l; Tue, 12 May 2026 15:55:54 +0000 Received: by outflank-mailman (input) for mailman id 1307093; Tue, 12 May 2026 15:55:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMpSa-0003UK-Vd for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpSa-001eB7-CF for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:55:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034d80-2eae-0a2a0a5409dd-0a2a450696ee-8 for ; Tue, 12 May 2026 17:55:52 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034d88-7371-0a2a45060019-d155802dd027-3 for ; Tue, 12 May 2026 17:55:52 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so55895555e9.2 for ; Tue, 12 May 2026 08:55:52 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Rename run_tests() to test_paging_mempool_size() and have it return int so the newly wrapping run_tests() can decide whether to run the next or not. Comment the parameters to xc_domain_populate_physmap_exact() to make it clearer what's going on, and remove the page added to the physmap when the test is done. No practical change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Oleksii Kurochko --- .../paging-mempool/test-paging-mempool.c | 25 ++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 1ebc13455ac2..d1207d26d3fc 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -15,6 +15,7 @@ static unsigned int nr_failures; ({ \ nr_failures++; \ (void)printf(fmt, ##__VA_ARGS__); \ + -1; \ }) static xc_interface *xch; @@ -40,7 +41,7 @@ static uint64_t default_mempool_size_bytes = 16 << 12; #endif -static void run_tests(void) +static int test_paging_mempool_size(void) { xen_pfn_t physmap[] = { 0 }; uint64_t size_bytes, old_size_bytes; @@ -80,7 +81,8 @@ static void run_tests(void) return fail(" Fail: setmaxmem: : %d - %s\n", errno, strerror(errno)); - rc = xc_domain_populate_physmap_exact(xch, domid, 1, 0, 0, physmap); + rc = xc_domain_populate_physmap_exact(xch, domid, ARRAY_SIZE(physmap), + 0 /* order 4k */, 0 /* flags */, physmap); if ( rc ) return fail(" Fail: populate physmap: %d - %s\n", errno, strerror(errno)); @@ -98,6 +100,11 @@ static void run_tests(void) return fail(" Fail: mempool size changed %"PRIu64" => %"PRIu64"\n", old_size_bytes, size_bytes); + /* We added one 4k page. Check we can remove it. */ + rc = xc_domain_remove_from_physmap(xch, domid, physmap[0]); + if ( rc ) + return fail(" Fail: remove from physmap: %d - %s\n", + errno, strerror(errno)); printf("Test bad set size\n"); @@ -134,6 +141,19 @@ static void run_tests(void) if ( size_bytes != 64 << 20 ) return fail(" Fail: expected mempool size %u, got %"PRIu64"\n", 64 << 20, size_bytes); + + return 0; +} + +static int run_tests(void) +{ + int rc; + + rc = test_paging_mempool_size(); + if ( rc ) + return rc; + + return 0; } int main(int argc, char **argv) @@ -143,7 +163,6 @@ int main(int argc, char **argv) printf("Paging mempool tests\n"); xch = xc_interface_open(NULL, NULL, 0); - if ( !xch ) err(1, "xc_interface_open"); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307092.1578819 (Exim 4.92) (envelope-from ) id 1wMpSb-0003Ud-VH; Tue, 12 May 2026 15:55:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307092.1578819; Tue, 12 May 2026 15:55:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSb-0003UW-ST; Tue, 12 May 2026 15:55:53 +0000 Received: by outflank-mailman (input) for mailman id 1307092; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSa-0003UE-Hc for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpSZ-00AP0L-HM for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:55:51 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034d71-bab6-0a2a0a5309dd-0a2a4509d370-42 for ; Tue, 12 May 2026 17:55:51 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034d87-2497-0a2a45090019-d155802ae877-3 for ; Tue, 12 May 2026 17:55:51 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488ff90d6c7so51665355e9.2 for ; Tue, 12 May 2026 08:55:51 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Tue, 12 May 2026 08:55:50 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko Subject: [PATCH 0/2] tests/paging-mempool: Testing for P2M relocation Date: Tue, 12 May 2026 16:55:38 +0100 Message-Id: <20260512155540.1733403-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: e3af387a-dd8b-4d58-8356-777319c7a2bf@suse.com References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778601351-4216DA53-B5ABC0E1/0/0 X-purgate-type: clean X-purgate-size: 371 Andrew Cooper (2): tests/paging-mempool: Misc cleanup tests/paging-mempool: Extend to test P2M relocation tools/tests/paging-mempool/Makefile | 4 + .../paging-mempool/test-paging-mempool.c | 222 +++++++++++++++++- xen/common/memory.c | 2 +- 3 files changed, 223 insertions(+), 5 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 16:00:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:00:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307119.1578847 (Exim 4.92) (envelope-from ) id 1wMpXO-0007Gd-0m; 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But since the code > change didn't end up overly intrusive, I thought I would go the "fix it" > route first. > --- > v2: Adjust XEN_DMOP_relocate_memory handling for the working-backwards > case. Acked-by: Andrew Cooper Tested-by: Andrew Cooper I can't say that I've understood everything going on here (hence the test case), but the test case says it does fix the bug I reported. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 12 16:02:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:02:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307130.1578863 (Exim 4.92) (envelope-from ) id 1wMpYv-0007uT-Pz; Tue, 12 May 2026 16:02:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307130.1578863; Tue, 12 May 2026 16:02:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpYv-0007tZ-Jn; Tue, 12 May 2026 16:02:25 +0000 Received: by outflank-mailman (input) for mailman id 1307130; Tue, 12 May 2026 16:02:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpYt-0007pW-LN; Tue, 12 May 2026 16:02:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpYt-00AUkp-25; Tue, 12 May 2026 18:02:23 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034f05-2eae-0a2a0a5409dd-0a2a4502ad60-28 for ; Tue, 12 May 2026 18:02:23 +0200 Received: from [104.130.215.37] (helo=mail.xenproject.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034f0d-af86-0a2a45020019-6882d725d11a-3 for ; Tue, 12 May 2026 18:02:22 +0200 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wMpYl-001iLv-2l; Tue, 12 May 2026 16:02:15 +0000 Received: from andrewcoop by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1wMpYl-001fwg-1X; Tue, 12 May 2026 16:02:15 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Content-Type: multipart/mixed; boundary="=separator"; charset="utf-8" Content-Transfer-Encoding: binary MIME-Version: 1.0 X-Mailer: MIME-tools 5.510 (Entity 5.510) To: xen-announce@lists.xen.org, xen-devel@lists.xen.org, xen-users@lists.xen.org, oss-security@lists.openwall.com From: Xen.org security team CC: Xen.org security team Subject: Xen Security Advisory 490 v1 (CVE-2025-54518) - x86: CPU Opcode Cache corruption Message-Id: Date: Tue, 12 May 2026 16:02:15 +0000 X-purgate-ID: tlsNG-720697/1778601742-82969161-928BE5B8/0/0 X-purgate-type: clean X-purgate-size: 29472 --=separator Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Xen Security Advisory CVE-2025-54518 / XSA-490 x86: CPU Opcode Cache corruption ISSUE DESCRIPTION ================= AMD have disclosed a potential vulnerability in certain CPUs which can cause instructions to execute at a higher privilege. For more information, see: https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7052.html IMPACT ====== Code of any privilege could escalate to a higher privilege, including userspace to kernel, and guest to host. VULNERABLE SYSTEMS ================== Systems running all versions of Xen are affected. Only AMD Fam17h CPUs (Zen2 microarchitecture) are believed to be vulnerable. Other AMD CPUs and CPUs from other manufacturers are not known to be affected. MITIGATION ========== There are no mitigations. RESOLUTION ========== Applying the appropriate attached patch resolves this issue. For Xen 4.17, patch 1 is a backport of a change which only went back as far as 4.18 under normal bugfix rules, but which is tightly texturally coupled with the XSA-940 fix. It is possible to rework patch 2 to avoid patch 1, but a number of Xen-focused downstreams already have patch 1 backported, and those without patch 1 really ought to take it. So, while this is slightly abnormal for an XSA, it is believed to be in the best interest of everyone with a 4.17 based Xen. Note that patches for released versions are generally prepared to apply to the stable branches, and may not apply cleanly to the most recent release tarball. Downstreams are encouraged to update to the tip of the stable branch before applying these patches. xsa490.patch xen-unstable xsa490-4.21.patch Xen 4.21.x - Xen 4.18.x xsa490-4.17-?.patch Xen 4.17.x $ sha256sum xsa490* 7c256d3384bf640d171ae2f18930c193a72bbdd92ebeb8942e58634dd7b27439 xsa490.patch 4d64d95937630f2147bb69d0d0ff24fc7d97efd48e376d882265662f93886ec7 xsa490-4.17-1.patch 6c717a5bd914088463c74b89893672388848a2222165478aed63b6c2a4151e28 xsa490-4.17-2.patch 1e397550a542bc0957bf93a6e6f01ffcdfe8f005697a505c62ec6120a72d3f90 xsa490-4.21.patch $ -----BEGIN PGP SIGNATURE----- iQFABAEBCAAqFiEEI+MiLBRfRHX6gGCng/4UyVfoK9kFAmoDTuQMHHBncEB4ZW4u b3JnAAoJEIP+FMlX6CvZn38H/2xujQ3YDEsE2U8RiH/6M1yVxnATlCEqEPBxIcVX h6W4QMzlFw/IXZBi6twduuzMME2uX6eKWCbE9riw2v4lybgNYMxV20oW86LhjLwr uL1NHJ3Fop1IuRy+po20jmT9sPfpieHU9zGmFvgd/k91gSZ1b/5G8k36MtgODL0j 4Svsdo3LYSvULQn5EymjO/t57ZZIDBWj5Od7aBbPuGkQKtW6+/UCE0JnrzOtP+Di 0Y5bBSUhwrMh0h32AV/w2nwvFQN/EeyakfjDWQc1ST6wHzFMLSo2kaY40TZ6C+T8 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nhdrsghrohgushhkhiesrghrmhdrtghomhdprhgtphhtthhopegsohhrihhsrdhoshhtrh hovhhskhihsehorhgrtghlvgdrtghomhdprhgtphhtthhopehtghhlgieskhgvrhhnvghl rdhorhhgpdhrtghpthhtohepmhhinhhgohesrhgvughhrghtrdgtohhmpdhrtghpthhtoh epsghpsegrlhhivghnkedruggvpdhrtghpthhtohepuggrvhgvrdhhrghnshgvnheslhhi nhhugidrihhnthgvlhdrtghomh X-ME-Proxy: Feedback-ID: i1568416f:Fastmail Date: Tue, 12 May 2026 18:05:01 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Juergen Gross Cc: linux-kernel@vger.kernel.org, x86@kernel.org, kevin.brodsky@arm.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving Message-ID: References: <20260508143933.493013-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="TX6pd/gDPiw+HuTq" Content-Disposition: inline In-Reply-To: <20260508143933.493013-1-jgross@suse.com> X-purgate-ID: tlsNG-bad1c0/1778601913-42573A53-857CACF2/0/0 X-purgate-type: clean X-purgate-size: 3498 --TX6pd/gDPiw+HuTq Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 12 May 2026 18:05:01 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Juergen Gross Cc: linux-kernel@vger.kernel.org, x86@kernel.org, kevin.brodsky@arm.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving On Fri, May 08, 2026 at 04:39:33PM +0200, Juergen Gross wrote: > With the support of nested lazy mmu sections it can happen that > arch_enter_lazy_mmu_mode() is being called twice without a call of > arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers > are not disabling preemption when checking for nested lazy mmu > sections. >=20 > This is a problem when running as a Xen PV guest, as > xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this > case. >=20 > Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order > not to hurt all other lazy mmu mode users. >=20 > Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") > Signed-off-by: Juergen Gross I have ran several test iterations with this patch (on top of 7.0.4) and it seems to fix the issue. So, Tested-by: Marek Marczykowski-G=C3=B3recki I did run some tests also with 291b3abed657 reverted (instead of this patch), and that seems to work too, but I didn't run enough of iterations to be 100% sure. Would it be helpful to that that further too? > --- > arch/x86/xen/mmu_pv.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index c80d0058efd1..3eee5f84f8a7 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr= _t phys, pgprot_t prot) > =20 > static void xen_enter_lazy_mmu(void) > { > - enter_lazy(XEN_LAZY_MMU); > + preempt_disable(); > + if (xen_get_lazy_mode() !=3D XEN_LAZY_MMU) > + enter_lazy(XEN_LAZY_MMU); > + preempt_enable(); > } > =20 > static void xen_flush_lazy_mmu(void) > @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) > { > preempt_disable(); > xen_mc_flush(); > - leave_lazy(XEN_LAZY_MMU); > + if (xen_get_lazy_mode() !=3D XEN_LAZY_NONE) > + leave_lazy(XEN_LAZY_MMU); > preempt_enable(); > } > =20 > --=20 > 2.54.0 >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --TX6pd/gDPiw+HuTq Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmoDT60ACgkQ24/THMrX 1yx4bAf/VQ75g91ht89MgBxSdIsuH3bHFEoMWP584OeaPmODQ286u3tzJYlkk6A0 N4hU2vs2cf6FGx1zFkwRrW4mCe7jsI2J0ZNinxpKEiX8Gkan1LqDWRI568/7lwHJ RoWSFmeM6fq/EmpVnRIVvTucul9r6+I5LqV3cG01RcOyV50f3zRZgIacIIgQKdU/ F0b/vQVZ9FksDmCudohF6xdOH1kFMhC/wBu+GRmE1j2rALpRZhGp9ofiLxpwtyqp 6EE45bopaGTU2EecaeSOCnmmvtP+M4BIPaRDqsdXXvh8qKFDCjuCn+0wqUWUKItr Gb8dxWXuPRtvYz/Q1el+pajOBkviBQ== =QeYe -----END PGP SIGNATURE----- --TX6pd/gDPiw+HuTq-- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:07:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:07:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307208.1578904 (Exim 4.92) (envelope-from ) id 1wMpdu-0002Jt-AG; Tue, 12 May 2026 16:07:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307208.1578904; Tue, 12 May 2026 16:07:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpdu-0002Jj-6g; Tue, 12 May 2026 16:07:34 +0000 Received: by outflank-mailman (input) for mailman id 1307208; Tue, 12 May 2026 16:07:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpds-0002JY-24 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:07:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpdr-00ARDz-Ck for xen-devel@lists.xenproject.org; Tue, 12 May 2026 18:07:31 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035023-e002-0a2a0a5209dd-0a2a450bcc6e-36 for ; Tue, 12 May 2026 18:07:31 +0200 Received: from [185.255.28.34] (helo=prod-mta-13.swg-srv.net) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035042-212f-0a2a450b0019-b9ff1c2296a9-3 for ; Tue, 12 May 2026 18:07:31 +0200 Received: from mail2.vates.fr ([37.26.189.201] mail2.vates.fr) (Authenticated sender: 8631fc262581453bbf619ec5b2062170/smtp/7773de5a-2839-4720-82ee-e06722ae1d3e) by prod-mta-13.swg-srv.net (ZoneMTA - prod-mta-13) with ESMTPSA id 19e1cf17f96000f373.005 for (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Tue, 12 May 2026 16:07:29 +0000 Received: from l14.. (unknown [82.67.99.167]) (Authenticated sender: anthony.perard) by mail2.vates.fr (Postfix) with ESMTPSA id 8768981617; Tue, 12 May 2026 18:07:28 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=Api6dZu/kYwbQY6iMbeIAyrVF8cQmcaLDQnh0B2K++o=; h=from:subject:date:message-id:to:cc:mime-version:content-type:feedback-id; b=TPJCNANsOxRaFsdRsZqF7gOcrk7PsQaX43Af5qC2t3N5EnKNwk1IUrEOE9B/oCFZNj4W6KLyW r/XZj7nr7xmzRfew+FCsu3ZscjDxl9IWSvqdRjWsG5ekNZwgmGh09PFtDhA8P0uNyIzWp94aMFA +klhS3bhZwxY4iZIhf4cejhyvS7jHaDHc0FiMy48xFICnF6qTo2iSq1a4IR8elQN3lBImhYy3U9 daXN0zZoWocv6bxRn1pO6n5D82ExFeOvRlYsX9BbKWyvB7MatAnTDMb7ixKr3JDr8gRGi/tc/G3 7zXCAuI7+6C29ZNNiFxBbI3JCWRvlujHwlnS2HNcxDsQ== X-Zone-Loop: 961a7766eba627a5ddfde0227fce3ac0adcadf422438 x-campaign-type: default x-transaction-id: 1d358507-51e9-4734-8ddd-062f1f3a7107 x-swg-uid: 01-28159fd6-ba5f-446b-acc9-bc7b6ec44ae6 X-Mailer: Sweego Message-ID: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> x-swg-bid: 1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Anthony PERARD To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Nicola Vetrini , Anthony PERARD , Doug Goldstein , Stefano Stabellini Subject: [XEN PATCH] automation/eclair: Restrict where eclair jobs are auto-started Date: Tue, 12 May 2026 18:07:22 +0200 MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778602048688 X-purgate-ID: tlsNG-42698a/1778602051-19165F3B-B2974F6D/0/0 X-purgate-type: clean X-purgate-size: 1530 ---=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable This will prevent eclair jobs from been started automatically everywhere but in the main push repo, but still have the option to start a jobs manually=2E Signed-off-by: Anthony PERARD --- Notes: eclair jobs are still manual under people: https://gitlab=2Ecom/xen-project/people/anthonyper/xen/-/pipelines= /2519778881 =20 and they are still running in hardware repos: https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/pipelines/= 2519784420 automation/gitlab-ci/analyze=2Eyaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/analyze=2Eyaml b/automation/gitlab-ci/an= alyze=2Eyaml index b3f99f472d9e=2E=2Ed6b6cf3e548b 100644 --- a/automation/gitlab-ci/analyze=2Eyaml +++ b/automation/gitlab-ci/analyze=2Eyaml @@ -33,7 +33,7 @@ when: never - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY when: never - - if: $WTOKEN && $CI_PROJECT_PATH =3D~ /^xen-project\/people\/=2E*$/ + - if: $WTOKEN && $CI_PROJECT_PATH !~ /^xen-project\/hardware\// when: manual allow_failure: true - !reference [=2Eeclair-analysis, rules] -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=--- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:10:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:10:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307223.1578913 (Exim 4.92) (envelope-from ) id 1wMpgU-0004Ix-NA; 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Peter Anvin" , xen-devel@lists.xenproject.org Message-ID: <35936020-53e2-463f-846f-f222d75e768c@suse.com> Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving References: <20260508143933.493013-1-jgross@suse.com> In-Reply-To: --------------Wy767085Ws1QL0FOH35jU760 Content-Type: multipart/mixed; boundary="------------JjmlKxfKwtEwFxHfBuAt65Jq" --------------JjmlKxfKwtEwFxHfBuAt65Jq Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMTIuMDUuMjYgMTg6MDUsIE1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSB3cm90ZToN Cj4gT24gRnJpLCBNYXkgMDgsIDIwMjYgYXQgMDQ6Mzk6MzNQTSArMDIwMCwgSnVlcmdlbiBH cm9zcyB3cm90ZToNCj4+IFdpdGggdGhlIHN1cHBvcnQgb2YgbmVzdGVkIGxhenkgbW11IHNl Y3Rpb25zIGl0IGNhbiBoYXBwZW4gdGhhdA0KPj4gYXJjaF9lbnRlcl9sYXp5X21tdV9tb2Rl KCkgaXMgYmVpbmcgY2FsbGVkIHR3aWNlIHdpdGhvdXQgYSBjYWxsIG9mDQo+PiBhcmNoX2xl YXZlX2xhenlfbW11X21vZGUoKSBpbiBiZXR3ZWVuLCBhcyB0aGUgbGF6eV9tbXVfKigpIGhl bHBlcnMNCj4+IGFyZSBub3QgZGlzYWJsaW5nIHByZWVtcHRpb24gd2hlbiBjaGVja2luZyBm b3IgbmVzdGVkIGxhenkgbW11DQo+PiBzZWN0aW9ucy4NCj4+DQo+PiBUaGlzIGlzIGEgcHJv YmxlbSB3aGVuIHJ1bm5pbmcgYXMgYSBYZW4gUFYgZ3Vlc3QsIGFzDQo+PiB4ZW5fZW50ZXJf bGF6eV9tbXUoKSBhbmQgeGVuX2xlYXZlX2xhenlfbW11KCkgZG9uJ3QgdG9sZXJhdGUgdGhp cw0KPj4gY2FzZS4NCj4+DQo+PiBGaXggdGhhdCBpbiB4ZW5fZW50ZXJfbGF6eV9tbXUoKSBh bmQgeGVuX2xlYXZlX2xhenlfbW11KCkgaW4gb3JkZXINCj4+IG5vdCB0byBodXJ0IGFsbCBv dGhlciBsYXp5IG1tdSBtb2RlIHVzZXJzLg0KPj4NCj4+IEZpeGVzOiAyOTFiM2FiZWQ2NTcg KCJ4ODYveGVuOiB1c2UgbGF6eV9tbXVfc3RhdGUgd2hlbiBjb250ZXh0LXN3aXRjaGluZyIp DQo+PiBTaWduZWQtb2ZmLWJ5OiBKdWVyZ2VuIEdyb3NzIDxqZ3Jvc3NAc3VzZS5jb20+DQo+ IA0KPiBJIGhhdmUgcmFuIHNldmVyYWwgdGVzdCBpdGVyYXRpb25zIHdpdGggdGhpcyBwYXRj aCAob24gdG9wIG9mIDcuMC40KSBhbmQNCj4gaXQgc2VlbXMgdG8gZml4IHRoZSBpc3N1ZS4g U28sDQo+IA0KPiBUZXN0ZWQtYnk6IE1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSA8bWFy bWFyZWtAaW52aXNpYmxldGhpbmdzbGFiLmNvbT4NCg0KVGhhbmtzIGZvciB0ZXN0aW5nLg0K DQo+IA0KPiBJIGRpZCBydW4gc29tZSB0ZXN0cyBhbHNvIHdpdGggMjkxYjNhYmVkNjU3IHJl dmVydGVkIChpbnN0ZWFkIG9mIHRoaXMNCj4gcGF0Y2gpLCBhbmQgdGhhdCBzZWVtcyB0byB3 b3JrIHRvbywgYnV0IEkgZGlkbid0IHJ1biBlbm91Z2ggb2YNCj4gaXRlcmF0aW9ucyB0byBi ZSAxMDAlIHN1cmUuIFdvdWxkIGl0IGJlIGhlbHBmdWwgdG8gdGhhdCB0aGF0IGZ1cnRoZXIN Cj4gdG9vPw0KDQpJIGRvIHByZWZlciBteSB2YXJpYW50LCBhcyBpdCBpcyBvbiBteSBwcmVm ZXJyZWQgcGF0aCB0byBnZXQgcmlkIG9mIHRoZQ0KWGVuLXByaXZhdGUgbGF6eSBtb2RlIHRy YWNraW5nLg0KDQpTbyBpbiBteSBwZXJzb25hbCBvcGluaW9uIHlvdSBkb24ndCBuZWVkIHRv IGNvbnRpbnVlIHRoaXMgdGVzdC4NCg0KDQpKdWVyZ2VuDQo= --------------JjmlKxfKwtEwFxHfBuAt65Jq Content-Type: application/pgp-keys; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoDUOIFAwAAAAAACgkQsN6d1ii/Ey+R igf/bLkJbK/E0deKsFcXjFAm3VlBqZmmPWllGpqk1qIJmfsCfE7YkxhY9aJHeDsElcdj/xn7sHWj b/pHVEUO/+FXaycgDzmxnAehWB7ugaFNyrR7CLprUdNQjH+j8ZODTS/JzfwrkvPbvVbt8YRbu1U2 Grck0XSF6newKzl7yoPYnIQL+CQYMUJqzFOL3neYZbPe1GUbUGkjXUFtNH+AovVR/q7LMNe8vute ArXHCoMJ1f3Qc18JgTfLY6UPjRcRg9EzXkfVn8SeT4OXuU6gy1nRj8Znuqpk7+4tEo+0pev7EpCA 9wSS1OQVqOEGGltswvcvknsLZAqoaVKYo5MlUbX2Mg== =dbfb -----END PGP SIGNATURE----- --------------0Tod8Lg01GRoSUt0eYLZ2069-- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:18:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:18:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307243.1578930 (Exim 4.92) (envelope-from ) id 1wMpoC-0005PY-Nw; Tue, 12 May 2026 16:18:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307243.1578930; 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arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Tue, 12 May 2026 18:48:04 +0200 From: Nicola Vetrini To: Anthony PERARD Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [XEN PATCH] automation/eclair: Restrict where eclair jobs are auto-started In-Reply-To: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> References: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> Message-ID: X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778604484-80B78161-086A03E3/0/0 X-purgate-type: clean X-purgate-size: 1599 On 2026-05-12 18:07, Anthony PERARD wrote: > This will prevent eclair jobs from been started automatically > everywhere but in the main push repo, but still have the option to > start a jobs manually. > > Signed-off-by: Anthony PERARD Reviewed-by: Nicola Vetrini > --- > > Notes: > eclair jobs are still manual under people: > > https://gitlab.com/xen-project/people/anthonyper/xen/-/pipelines/2519778881 > > and they are still running in hardware repos: > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2519784420 > > automation/gitlab-ci/analyze.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/automation/gitlab-ci/analyze.yaml > b/automation/gitlab-ci/analyze.yaml > index b3f99f472d9e..d6b6cf3e548b 100644 > --- a/automation/gitlab-ci/analyze.yaml > +++ b/automation/gitlab-ci/analyze.yaml > @@ -33,7 +33,7 @@ > when: never > - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY > when: never > - - if: $WTOKEN && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ > + - if: $WTOKEN && $CI_PROJECT_PATH !~ /^xen-project\/hardware\// > when: manual > allow_failure: true > - !reference [.eclair-analysis, rules] > > > -- > Anthony Perard | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech -- Nicola Vetrini, B.Sc. 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Signed-off-by: Mykola Kvach --- Changes in V9: - fix the suspend-context comment typo and split dist_ctx declarations; - restore ICC_IGRPEN1_EL1 on the suspend error path; - re-initialize GICD_IGROUPRnE during resume; - restore GICD_IROUTER only after re-enabling ARE_NS during resume. Changes in V8: - use right rdist base for prop/pend baser and ctrl Changes in V7: - restore LPI regs on resume - add timeout during redist disabling - squash with suspend/resume handling for GICv3 eSPI registers - drop ITS guard paths so suspend/resume always runs; switch missing ctx allocation to panic - trim TODO comments; narrow redistributor storage to PPI icfgr - keep distributor context allocation even without ITS; adjust resume to use GENMASK(31, 0) for clearing enables - drop storage of the SGI configuration register, as SGIs are always edge-triggered --- xen/arch/arm/gic-v3-lpi.c | 3 + xen/arch/arm/gic-v3.c | 362 ++++++++++++++++++++++++- xen/arch/arm/include/asm/gic_v3_defs.h | 1 + 3 files changed, 363 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 36bb45738e..b0289ee4dc 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -467,6 +467,9 @@ static int cpu_callback(struct notifier_block *nfb, unsigned long action, switch ( action ) { case CPU_UP_PREPARE: + if ( system_state == SYS_STATE_resume ) + break; + rc = gicv3_lpi_allocate_pendtable(cpu); if ( rc ) printk(XENLOG_ERR "Unable to allocate the pendtable for CPU%lu\n", diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index cc0569a157..6fc4354e2e 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1072,12 +1072,12 @@ out: return res; } -static void gicv3_hyp_disable(void) +static void gicv3_hyp_enable(bool enable) { register_t hcr; hcr = READ_SYSREG(ICH_HCR_EL2); - hcr &= ~GICH_HCR_EN; + hcr = enable ? (hcr | GICH_HCR_EN) : (hcr & ~GICH_HCR_EN); WRITE_SYSREG(hcr, ICH_HCR_EL2); isb(); } @@ -1184,7 +1184,7 @@ static void gicv3_disable_interface(void) spin_lock(&gicv3.lock); gicv3_cpu_disable(); - gicv3_hyp_disable(); + gicv3_hyp_enable(false); spin_unlock(&gicv3.lock); } @@ -1920,6 +1920,354 @@ static bool gic_dist_supports_lpis(void) return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents a block of 32 IRQs */ +struct dist_irq_block { + uint32_t icfgr[2]; + uint32_t ipriorityr[8]; + uint64_t irouter[32]; + uint32_t isactiver; + uint32_t isenabler; +}; + +struct redist_ctx { + uint32_t ctlr; + uint32_t icfgr; /* only PPIs stored */ + uint32_t igroupr; + uint32_t ipriorityr[8]; + uint32_t isactiver; + uint32_t isenabler; + + uint64_t pendbase; + uint64_t propbase; +}; + +/* GICv3 registers to be saved/restored on system suspend/resume */ +struct gicv3_ctx { + struct dist_ctx { + uint32_t ctlr; + struct dist_irq_block *irqs; + struct dist_irq_block *espi_irqs; + } dist; + + /* have only one rdist structure for last running CPU during suspend */ + struct redist_ctx rdist; + + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + uint32_t sre_el2; + uint32_t grpen; + } cpu; +}; + +static struct gicv3_ctx gicv3_ctx; + +static void __init gicv3_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv3_info.nr_lines, 32); + + /* The spec allows for systems without any SPIs */ + if ( blocks > 1 ) + { + gicv3_ctx.dist.irqs = xzalloc_array(struct dist_irq_block, blocks - 1); + if ( !gicv3_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv3 suspend context\n"); + } + +#ifdef CONFIG_GICV3_ESPI + if ( !gic_number_espis() ) + return; + + blocks = gic_number_espis() / 32; + gicv3_ctx.dist.espi_irqs = xzalloc_array(struct dist_irq_block, blocks); + if ( !gicv3_ctx.dist.espi_irqs ) + panic("Failed to allocate memory for GICv3 eSPI suspend context\n"); +#endif +} + +static int gicv3_disable_redist(void) +{ + void __iomem *waker = GICD_RDIST_BASE + GICR_WAKER; + s_time_t deadline; + + /* + * Avoid infinite loop if Non-secure does not have access to GICR_WAKER. + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: + * When GICD_CTLR.DS == 0 and an access is Non-secure accesses to this + * register are RAZ/WI. + */ + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) + return 0; + + deadline = NOW() + MILLISECS(1000); + + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, waker); + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) == 0 ) + { + if ( NOW() > deadline ) + { + printk("GICv3: Timeout waiting for redistributor to sleep\n"); + return -ETIMEDOUT; + } + cpu_relax(); + udelay(10); + } + + return 0; +} + +#define GET_SPI_REG_OFFSET(name, is_espi) \ + ((is_espi) ? GICD_##name##nE : GICD_##name) + +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + irqs->icfgr[0] = readl_relaxed(base); + irqs->icfgr[1] = readl_relaxed(base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) + irqs->ipriorityr[irq] = readl_relaxed(base + 4 * irq); + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) + irqs->irouter[irq] = readq_relaxed_non_atomic(base + 8 * irq); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + irqs->isactiver = readl_relaxed(base); + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + irqs->isenabler = readl_relaxed(base); +} + +static void gicv3_restore_spi_irq_config(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + writel_relaxed(irqs->icfgr[0], base); + writel_relaxed(irqs->icfgr[1], base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); +} + +static void gicv3_restore_spi_irq_routing(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); +} + +static void gicv3_restore_spi_irq_state(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + + base = GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + writel_relaxed(irqs->isenabler, base); + + base = GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + writel_relaxed(irqs->isactiver, base); +} + +static int gicv3_suspend(void) +{ + unsigned int i; + void __iomem *base; + int ret; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + /* Save GICC configuration */ + gicv3_ctx.cpu.ctlr = READ_SYSREG(ICC_CTLR_EL1); + gicv3_ctx.cpu.pmr = READ_SYSREG(ICC_PMR_EL1); + gicv3_ctx.cpu.bpr = READ_SYSREG(ICC_BPR1_EL1); + gicv3_ctx.cpu.sre_el2 = READ_SYSREG(ICC_SRE_EL2); + gicv3_ctx.cpu.grpen = READ_SYSREG(ICC_IGRPEN1_EL1); + + gicv3_disable_interface(); + + ret = gicv3_disable_redist(); + if ( ret ) + goto out_enable_iface; + + /* Save GICR configuration */ + gicv3_redist_wait_for_rwp(); + + base = GICD_RDIST_BASE; + + rdist->ctlr = readl_relaxed(base + GICR_CTLR); + + rdist->propbase = readq_relaxed(base + GICR_PROPBASER); + rdist->pendbase = readq_relaxed(base + GICR_PENDBASER); + + base = GICD_RDIST_SGI_BASE; + + /* Save priority on PPI and SGI interrupts */ + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + rdist->ipriorityr[i] = readl_relaxed(base + GICR_IPRIORITYR0 + 4 * i); + + rdist->isactiver = readl_relaxed(base + GICR_ISACTIVER0); + rdist->isenabler = readl_relaxed(base + GICR_ISENABLER0); + rdist->igroupr = readl_relaxed(base + GICR_IGROUPR0); + rdist->icfgr = readl_relaxed(base + GICR_ICFGR1); + + /* Save GICD configuration */ + gicv3_dist_wait_for_rwp(); + gicv3_ctx.dist.ctlr = readl_relaxed(GICD + GICD_CTLR); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, true); +#endif + + return 0; + + out_enable_iface: + gicv3_hyp_enable(true); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + return ret; +} + +static void gicv3_resume(void) +{ + int ret; + unsigned int i; + uint32_t dist_ctlr; + void __iomem *base; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + writel_relaxed(0, GICD + GICD_CTLR); + + for ( i = NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i += 32 ) + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) * 4); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_config(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + { + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPRnE + i * 4); + gicv3_restore_spi_irq_config(gicv3_ctx.dist.espi_irqs + i, i, true); + } +#endif + + dist_ctlr = gicv3_ctx.dist.ctlr & GICD_CTLR_ARE_NS; + if ( dist_ctlr ) + { + writel_relaxed(dist_ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.irqs + i - 1, i, + false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.espi_irqs + i, i, + true); +#endif + } + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.espi_irqs + i, i, true); +#endif + + writel_relaxed(gicv3_ctx.dist.ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + ret = gicv3_lpi_init_rdist(GICD_RDIST_BASE); + /* + * If LPIs are already enabled, assume firmware or the still-powered + * redistributor has valid PROPBASER/PENDBASER and skip reprogramming. + * Return -EBUSY so callers can ignore this case. + */ + if ( ret && ret != -ENODEV && ret != -EBUSY ) + panic("GICv3: Failed to re-initialize LPIs during resume\n"); + else if ( ret == -EBUSY ) /* extra checks, just to be sure */ + { + base = GICD_RDIST_BASE; + if ( readq_relaxed(base + GICR_PROPBASER) != rdist->propbase || + readq_relaxed(base + GICR_PENDBASER) != rdist->pendbase ) + panic("GICv3: LPIs already enabled with unexpected PROPBASER/PENDBASER during resume\n"); + } + + /* Restore GICR (Redistributor) configuration */ + if ( gicv3_enable_redist() ) + panic("GICv3: Failed to re-enable redistributor during resume\n"); + + base = GICD_RDIST_SGI_BASE; + + writel_relaxed(GENMASK(31, 0), base + GICR_ICENABLER0); + gicv3_redist_wait_for_rwp(); + + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + writel_relaxed(rdist->ipriorityr[i], base + GICR_IPRIORITYR0 + i * 4); + + writel_relaxed(rdist->isactiver, base + GICR_ISACTIVER0); + writel_relaxed(rdist->igroupr, base + GICR_IGROUPR0); + writel_relaxed(rdist->icfgr, base + GICR_ICFGR1); + + gicv3_redist_wait_for_rwp(); + + writel_relaxed(rdist->isenabler, base + GICR_ISENABLER0); + writel_relaxed(rdist->ctlr, GICD_RDIST_BASE + GICR_CTLR); + + gicv3_redist_wait_for_rwp(); + + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); + isb(); + + /* Restore CPU interface (System registers) */ + WRITE_SYSREG(gicv3_ctx.cpu.pmr, ICC_PMR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.bpr, ICC_BPR1_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + gicv3_hyp_init(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* Set up the GIC */ static int __init gicv3_init(void) { @@ -1994,6 +2342,10 @@ static int __init gicv3_init(void) gicv3_hyp_init(); +#ifdef CONFIG_SYSTEM_SUSPEND + gicv3_alloc_context(); +#endif + out: spin_unlock(&gicv3.lock); @@ -2033,6 +2385,10 @@ static const struct gic_hw_operations gicv3_ops = { #endif .iomem_deny_access = gicv3_iomem_deny_access, .do_LPI = gicv3_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv3_suspend, + .resume = gicv3_resume, +#endif }; static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data) diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/asm/gic_v3_defs.h index c373b94d19..992c8f9c2f 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -94,6 +94,7 @@ #define GICD_TYPE_LPIS (1U << 17) #define GICD_CTLR_RWP (1UL << 31) +#define GICD_CTLR_DS (1U << 6) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) #define GICD_CTLR_ENABLE_G1 (1U << 0) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307276.1579007 (Exim 4.92) (envelope-from ) id 1wMqc7-0006Fs-Ll; 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([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:43 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605784; x=1779210584; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XXX7LiIDl3A+pjPnWv0DkG9B7a9KxTjMmrGlAN2uPmo=; b=VWCqtQu9XJmjbzceO96JPfwoRYiZGQOusmT5/rBDrzxvI6P8YORsDVhS5MHneEwMbs Xata0uBfRfHfsRSRY84BLfZuwb9fL9kr0JMNAepgjUzHr59qk28T0n/9Id/hIObNaY8J XQeeJ9ucIsPJDfl11tO+Lv3tNx3gEeWUwXFr7z8QwrWc9rEWEssYExHscQEJg40TRfK7 0MSlxY4U30NZgtSYyHCiiqsDbG9gkeMAEKgiHfKe4kPq9UaEheBLIXpRLREKZo46NLTJ jHRd2D1wGY5yc7mTAC7L4BXLGV44lIPu+SpmHXCGFMenCzbKxFwIDfXTWEApKkXm3JQd 8iKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605784; x=1779210584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XXX7LiIDl3A+pjPnWv0DkG9B7a9KxTjMmrGlAN2uPmo=; b=N9f/rUhvTqgC8V0/YhL6XAUhXEVK3531rbu4f7HRy5EEYPwveTp7I4AeUiMD++5aZ5 HG0AgOgbRpwwH/hnQbfYcCw9IFChv6A6Qo0donoLehRl4TvNKJRcU6X+LyRXkFSB8JW2 5zayS+3h6gMX52j+FNGX5ZpZs2MpkZZGYC+X47kYJR9YNvzRNIhOuxJCsaijzRFFhlUy uNtijB0pfoybVIFNZc6Vly4EPHPZfzRUR6wAtSseR2tFJ3tCECnYgkAdkKKCKml2+3QU 7PwYZFYJ/oUt9xBZoIpAnmMCrWjjw8x9pcuordZwglm3LdUttMzblAwj8OHweqdKvl0S 4zdQ== X-Gm-Message-State: AOJu0Ywsf9hUm62rrHN3faP+nziBm+jqoP+Cqs6Hcn/xPQY3v02IQjyA 3b4Hvfi8Ayy9IQKcB1K0WykeYcFU1wLdMrHIfOurVHirjMjrSLmA2/xBQluHCA== X-Gm-Gg: Acq92OEQcSPRBqQNCeTbx4q8ELVYrkiA/e49p9C8JjA5jsmcd7J6x57iCoSM8uv6Goe BGkEYNyDVgGvb13ueBzdB3Wg9L/6oqEhu3xgpA5hhOEJFYl1VICDlexQt/ajkaHFi7MuttIsSlw /OzJY2z96ORXeDRSzQT6GQoqUXCvJh36x2kC+DENqVo+d+3M4hCqGToHMB+NjpuMSrDZLmlzomx i6eMNQIKq46twG6tPQvmyavP5wzVvrp42I2K0j3DyeVuEp/C7gzRaESFC6zBVZlxD6jWStmecm8 AuQ8Aieax6UxYsDKhw34zqUTD8MemT5zfHOTbkpf9ZHeMQ+/e/wt6Rc1FwHFUmozqgF5LnG4BK8 hSBqcm5gCeusJkhw3H6bpx2tYh2JV4rtAjaV50XtiA5o+2q2nBGdmIkPEB+iRihUYp+6EQhadbA JxXC9OCozH65aOrSt/BaxYfNAs3A== X-Received: by 2002:a05:600c:37c6:b0:48e:7f22:d90 with SMTP id 5b1f17b1804b1-48e7f7de432mr182800855e9.4.1778605784332; Tue, 12 May 2026 10:09:44 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v9 03/13] xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF Date: Tue, 12 May 2026 20:07:10 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778605785-2887FC48-52A15AD8/0/0 X-purgate-type: clean X-purgate-size: 10164 From: Mykola Kvach PSCI does not guarantee that a GICv3 redistributor is powered down across CPU_OFF -> CPU_ON. DEN0022F.b says CPU_OFF powers down the calling core (5.5) and CPU_ON brings the core back with a defined initial CPU state (5.6, 6.4). However, PSCI leaves interrupt migration and GIC re-initialization to the supervisory software/firmware stack: the caller must migrate interrupts away before CPU_OFF (5.5.2), and the execution context that is lost in a powerdown state must be saved and restored by software (6.8). PSCI also calls out GIC management explicitly in 6.8, including retargeting SPIs, preventing PPIs/SGIs from targeting a powered down CPU, and reinitializing the CPU interface after CPU_ON. This matches the GIC architecture. IHI0069H.b Chapter 11.1 requires the PE and CPU interface to share a power domain, but explicitly allows the associated redistributor, distributor, and ITS to remain powered while the PE and CPU interface are off. All other GIC power-management behavior is IMPLEMENTATION DEFINED. DEN0050D Chapter 4.2, "Generic Interrupt Controller (GIC)", says the GICv3 redistributor may live either in the AP core power domain or in a relatively always-on parent domain. So after CPU_OFF -> CPU_ON a secondary CPU can legitimately come back to a live redistributor with GICR_CTLR.EnableLPIs still set. Handle that case in the LPI setup path instead of assuming a fully reset redistributor. The LPI path needs special care because the GIC spec makes redistributor LPI state sticky and partially implementation defined. IHI0069H.b 5.1.1 and 5.1.2 say that changing GICR_PROPBASER or GICR_PENDBASER while GICR_CTLR.EnableLPIs == 1 is UNPREDICTABLE. After clearing EnableLPIs, software must wait for GICR_CTLR.RWP == 0 before touching the pending table. The architecture also permits implementations where, once EnableLPIs has been set, clearing it again is not guaranteed to work. Where an ITS is present, the spec strongly recommends moving LPIs to another redistributor before clearing EnableLPIs. Because of that, treat a retained EnableLPIs state as valid when the redistributor still points at Xen's expected PROPBASER/PENDBASER tables. Only try to clear EnableLPIs when the retained configuration does not match Xen's state, and wait for RWP before reprogramming the tables. This is also consistent with platform firmware reality: PSCI and the GIC architecture allow platform-specific redistributor power handling, and not all platform firmware implementations force a full redistributor power-off through implementation-defined controls during CPU_OFF. Xen therefore needs to tolerate retained redistributor state on secondary CPU bring-up. Keep gicv3_populate_rdist() resident as well, because gicv3_cpu_init() reuses it on secondary CPU bring-up after init. Tested using Xen's non-boot CPU disable/enable path on Arm FVP_Base_RevC-2xAEMvA, both with and without: -C gic_distributor.allow-LPIEN-clear=1 -C gic_distributor.GICR-clear-enable-supported=1 and on Orange Pi 5. Signed-off-by: Mykola Kvach --- Changes in v9: - move gicv3_do_wait_for_rwp prototype from its related header to gic.h - drop __init from gicv3_populate_rdist(), which is reused on secondary CPU bring-up after boot - changed print format for smp_processor_id in gicv3_populate_rdist func - cosmetic changes --- xen/arch/arm/gic-v3-lpi.c | 77 +++++++++++++++++++++++++++++++++- xen/arch/arm/gic-v3.c | 23 ++++++---- xen/arch/arm/include/asm/gic.h | 4 ++ 3 files changed, 94 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 9ee338edc2..36bb45738e 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -81,6 +81,13 @@ static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redist); #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) +#define GICR_PROPBASER_XEN_MASK GENMASK_ULL(51, 12) +/* + * For retained redistributor state, match the pending table by address only. + * Attribute bits such as PTZ may not read back with the programmed value. + */ +#define GICR_PENDBASER_XEN_MASK GENMASK_ULL(51, 16) + static union host_lpi *gic_get_host_lpi(uint32_t plpi) { union host_lpi *block; @@ -296,6 +303,60 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist_base) return 0; } +static uint64_t gicv3_lpi_expected_proptable(void) +{ + return virt_to_maddr(lpi_data.lpi_property); +} + +static uint64_t gicv3_lpi_expected_pendtable(void) +{ + return virt_to_maddr(this_cpu(lpi_redist).pending_table); +} + +static bool gicv3_lpi_tables_match(void __iomem *rdist_base) +{ + uint64_t propbase, pendbase; + + if ( !lpi_data.lpi_property || !this_cpu(lpi_redist).pending_table ) + return false; + + propbase = readq_relaxed(rdist_base + GICR_PROPBASER); + pendbase = readq_relaxed(rdist_base + GICR_PENDBASER); + + return ((propbase & GICR_PROPBASER_XEN_MASK) == + (gicv3_lpi_expected_proptable() & GICR_PROPBASER_XEN_MASK)) && + ((pendbase & GICR_PENDBASER_XEN_MASK) == + (gicv3_lpi_expected_pendtable() & GICR_PENDBASER_XEN_MASK)); +} + +static int gicv3_lpi_disable_lpis(void __iomem *rdist_base) +{ + uint32_t reg = readl_relaxed(rdist_base + GICR_CTLR); + int ret; + + if ( !(reg & GICR_CTLR_ENABLE_LPIS) ) + return 0; + + writel_relaxed(reg & ~GICR_CTLR_ENABLE_LPIS, rdist_base + GICR_CTLR); + + /* + * The spec only guarantees programmability when we have observed the bit + * cleared. Where clearing is supported, RWP must reach 0 before touching + * PROPBASER/PENDBASER again. + */ + wmb(); + + ret = gicv3_do_wait_for_rwp(rdist_base); + if ( ret ) + return ret; + + reg = readl_relaxed(rdist_base + GICR_CTLR); + if ( reg & GICR_CTLR_ENABLE_LPIS ) + return -EBUSY; + + return 0; +} + /* * Tell a redistributor about the (shared) property table, allocating one * if not already done. @@ -374,7 +435,21 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base) /* Make sure LPIs are disabled before setting up the tables. */ reg = readl_relaxed(rdist_base + GICR_CTLR); if ( reg & GICR_CTLR_ENABLE_LPIS ) - return -EBUSY; + { + if ( gicv3_lpi_tables_match(rdist_base) ) + return -EBUSY; + + ret = gicv3_lpi_disable_lpis(rdist_base); + if ( ret == -EBUSY ) + { + printk(XENLOG_ERR + "GICv3: CPU%u: LPIs still enabled with unexpected redistributor tables\n", + smp_processor_id()); + return -EINVAL; + } + if ( ret ) + return ret; + } ret = gicv3_lpi_set_pendtable(rdist_base); if ( ret ) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9..cc0569a157 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -274,8 +274,8 @@ static void gicv3_enable_sre(void) isb(); } -/* Wait for completion of a distributor change */ -static void gicv3_do_wait_for_rwp(void __iomem *base) +/* Wait for completion of a distributor/redistributor write-pending change. */ +int gicv3_do_wait_for_rwp(void __iomem *base) { uint32_t val; bool timeout = false; @@ -295,17 +295,22 @@ static void gicv3_do_wait_for_rwp(void __iomem *base) } while ( 1 ); if ( timeout ) + { dprintk(XENLOG_ERR, "RWP timeout\n"); + return -ETIMEDOUT; + } + + return 0; } static void gicv3_dist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD); + (void)gicv3_do_wait_for_rwp(GICD); } static void gicv3_redist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD_RDIST_BASE); + (void)gicv3_do_wait_for_rwp(GICD_RDIST_BASE); } static void gicv3_wait_for_rwp(int irq) @@ -857,7 +862,7 @@ static bool gicv3_enable_lpis(void) return true; } -static int __init gicv3_populate_rdist(void) +static int gicv3_populate_rdist(void) { int i; uint32_t aff; @@ -925,15 +930,15 @@ static int __init gicv3_populate_rdist(void) gicv3_set_redist_address(rdist_addr, procnum); ret = gicv3_lpi_init_rdist(ptr); - if ( ret && ret != -ENODEV ) + if ( ret && ret != -ENODEV && ret != -EBUSY ) { - printk("GICv3: CPU%d: Cannot initialize LPIs: %u\n", + printk("GICv3: CPU%u: Cannot initialize LPIs: %d\n", smp_processor_id(), ret); break; } } - printk("GICv3: CPU%d: Found redistributor in region %d @%p\n", + printk("GICv3: CPU%u: Found redistributor in region %d @%p\n", smp_processor_id(), i, ptr); return 0; } @@ -953,7 +958,7 @@ static int __init gicv3_populate_rdist(void) } while ( !(typer & GICR_TYPER_LAST) ); } - dprintk(XENLOG_ERR, "GICv3: CPU%d: mpidr 0x%"PRIregister" has no re-distributor!\n", + dprintk(XENLOG_ERR, "GICv3: CPU%u: mpidr 0x%"PRIregister" has no re-distributor!\n", smp_processor_id(), cpu_logical_map(smp_processor_id())); return -ENODEV; diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index fbf0d69edd..9293aa56e2 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,10 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_GICV3 +int gicv3_do_wait_for_rwp(void __iomem *base); +#endif + #ifdef CONFIG_SYSTEM_SUSPEND /* Suspend/resume */ extern int gic_suspend(void); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307274.1578983 (Exim 4.92) (envelope-from ) id 1wMqc5-0005fJ-1v; Tue, 12 May 2026 17:09:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307274.1578983; Tue, 12 May 2026 17:09:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005ef-VH; Tue, 12 May 2026 17:09:44 +0000 Received: by outflank-mailman (input) for mailman id 1307274; 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Suspending timers in Xen consists of disabling the physical timer and the hypervisor timer on the current CPU. The virtual timer does not need explicit handling here, as it is already disabled on vCPU context switch and its state is restored per-vCPU on the next context restore. Resuming consists of raising TIMER_SOFTIRQ, which prompts the generic timer code to reprogram the hypervisor timer with the correct timeout. Xen does not use or expose the physical timer, so it remains disabled across suspend/resume. Introduce a new helper, disable_phys_hyp_timers(), to encapsulate disabling of the physical and hypervisor timers. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykola Kvach Acked-by: Julien Grall Reviewed-by: Luca Fancellu --- Changes in V7: - Dropped EL1/EL2 wording; use "physical timer" and "hypervisor timer" - Renamed helper to disable_phys_hyp_timers() to reflect its actual scope - Clarified virtual timer handling (disabled on vCPU switch-out, restored on context restore) and added comments in suspend/resume paths - Added resume comment explaining which timers are restored by TIMER_SOFTIRQ --- xen/arch/arm/include/asm/time.h | 5 ++++ xen/arch/arm/time.c | 44 ++++++++++++++++++++++++++++----- 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index c194dbb9f5..9313b157ea 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -105,6 +105,11 @@ void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +void time_suspend(void); +void time_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* __ARM_TIME_H__ */ /* * Local variables: diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 6955b2788f..fff8e4aca6 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -296,6 +296,14 @@ static void check_timer_irq_cfg(unsigned int irq, const char *which) static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_hyp); static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_virt); +/* Disable physical and hypervisor timers on the current CPU */ +static inline void disable_phys_hyp_timers(void) +{ + WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ + WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ + isb(); +} + /* Set up the timer interrupt on this CPU */ void init_timer_interrupt(void) { @@ -306,9 +314,7 @@ void init_timer_interrupt(void) WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ /* Do not let the VMs program the physical timer, only read the physical counter */ WRITE_SYSREG(CNTHCTL_EL2_EL1PCTEN, CNTHCTL_EL2); - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ - isb(); + disable_phys_hyp_timers(); hyp_action->name = "hyptimer"; hyp_action->handler = htimer_interrupt; @@ -333,9 +339,7 @@ void init_timer_interrupt(void) */ static void deinit_timer_interrupt(void) { - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Disable physical timer */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Disable hypervisor's timer */ - isb(); + disable_phys_hyp_timers(); release_irq(timer_irq[TIMER_HYP_PPI], NULL); release_irq(timer_irq[TIMER_VIRT_PPI], NULL); @@ -375,6 +379,34 @@ void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds) /* XXX update guest visible wallclock time */ } +#ifdef CONFIG_SYSTEM_SUSPEND + +void time_suspend(void) +{ + /* CNTV already disabled by virt_timer_save() during vcpu context switch. */ + disable_phys_hyp_timers(); +} + +void time_resume(void) +{ + /* + * Raising TIMER_SOFTIRQ triggers generic timer code to reprogram the + * hypervisor timer with the correct timeout (not known here). + * + * Xen doesn't use or expose the physical timer, so it remains disabled + * across suspend/resume. + * + * The virtual timer state is restored per-vCPU on the next context switch. + * + * No further action is needed to restore timekeeping after power down, + * since the system counter is unaffected. See ARM DDI 0487 L.a, D12.1.2 + * "The system counter must be implemented in an always-on power domain." + */ + raise_softirq(TIMER_SOFTIRQ); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_time_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307279.1579034 (Exim 4.92) (envelope-from ) id 1wMqcC-000702-Qo; Tue, 12 May 2026 17:09:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307279.1579034; Tue, 12 May 2026 17:09:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcC-0006zo-Ll; Tue, 12 May 2026 17:09:52 +0000 Received: by outflank-mailman (input) for mailman id 1307279; Tue, 12 May 2026 17:09:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcB-0006je-AA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcA-007RzZ-NY for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:50 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-2eae-0a2a0a5409dd-0a2a450cc83c-42 for ; Tue, 12 May 2026 19:09:50 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ede-62f1-0a2a450c0019-d155802cd561-3 for ; Tue, 12 May 2026 19:09:50 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488ba840146so52227225e9.1 for ; Tue, 12 May 2026 10:09:50 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Calling it from the CPU hotplug/resume path then executed discarded code, which could crash Xen. Drop __init so the TEE mediator secondary init can run safely on hotplugged and resumed CPUs. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/tee/tee.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c index 8501443c8e..00e561fc78 100644 --- a/xen/arch/arm/tee/tee.c +++ b/xen/arch/arm/tee/tee.c @@ -128,7 +128,7 @@ static int __init tee_init(void) presmp_initcall(tee_init); -void __init init_tee_secondary(void) +void init_tee_secondary(void) { if ( cur_mediator && cur_mediator->ops->init_secondary ) cur_mediator->ops->init_secondary(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307278.1579025 (Exim 4.92) (envelope-from ) id 1wMqcB-0006jx-CT; Tue, 12 May 2026 17:09:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307278.1579025; Tue, 12 May 2026 17:09:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcB-0006jh-7h; Tue, 12 May 2026 17:09:51 +0000 Received: by outflank-mailman (input) for mailman id 1307278; Tue, 12 May 2026 17:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc9-0006ej-Vt for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqc9-007RzZ-9b for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:49 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-2eae-0a2a0a5409dd-0a2a450cc83c-40 for ; Tue, 12 May 2026 19:09:49 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035edd-62f1-0a2a450c0019-d1558031dcc7-3 for ; Tue, 12 May 2026 19:09:49 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48909558b3aso59332165e9.0 for ; Tue, 12 May 2026 10:09:49 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:47 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605788; x=1779210588; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0IZE3vvZX8wTCOIvxrr5h+/UmQXvZVQaktiFrkuAMu4=; b=IcD5Ikeb+fSV5jb87eN5sdQt4h2F2BytaEeYehJUmw40qv/cp+XqzuB4FGVlAd+9SP GfpwGoHKfP2AF4D9VUK3Aj0Cz/KZz2sLaIFezm4Wd2nnGIpbvZrSIVUaUQSrnngX8hM4 k4wFFEh2UBX94XBGL1wy/S8f+1ki0X6Z6KCtAdEi4Z7t7zJOCsM//hUg2e+/EIX8VXFI TBmkki1ew5FG3Y2Cr9YQIt7pNS7SI/WLf6m7ioxXFUttOH4uf1rPCE3RLzuLxeiHzK+u S9ovfQFWIi67h3j5jTSXlXQFOU/ngOdYSmalLxkC6H4fxeetUDhbssLkgj5EJW7NaPLm fuSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605788; x=1779210588; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0IZE3vvZX8wTCOIvxrr5h+/UmQXvZVQaktiFrkuAMu4=; b=Dv8n+k4f4HLDPxVvDwiaJk5+VmA7K2Mp15xHPo97UC4Ps4V9yT5Swa07uWPv5DKHoh YhWVZ4L10HFxYVFpY/GKCfQXqA9//IQ9CZ0cO4nw9E9bF/FxLcIh6pGlRpi0C/j2aDL4 VkoAytNDjPouUiOcQvEFP9ptJAxe2VgfHCl1slepQwv04OOtbm+C0W4qgHPH3NBw03Be CGkm3cmQpKkzN2yWWs9xolP4a+cQMv4/QJCksPgO0MPLnONNBEOChPNjUpBgGh+Wts0U EwrNX30iZJfFbSK+5ifn3tUXzfdrACLOcGmR5tnE6868fOGllp3PbmMnHobkdxDJFDYa cJMw== X-Gm-Message-State: AOJu0YyTaEjCgIvA+gmHhO4EVHCcCY+1SnqMScpScK9BnLo7lkIuG64E 1Sj8piNmPPfoq0M1X7GYPS6pmpbMMq20NkKWXnV65eCPh/CC/brwcIwfIa8TOw== X-Gm-Gg: Acq92OHO1CIs/KGzFDNXleamW1+7YGauD0qAByiutdwvykQ9OF9+5f48aXhABcCy4+o 5pS6oHMCLb3/MHm2OoYLaXlWoS/pa3+RpBodYWEgfYYZiqPYbtY3v9S01rgZGgFiQ5/ns4qDiUb DhCMP78+I8B+4vthgPICauD1sOZiu/TbhzAt4RnDKxd3pSOH0GQGLW4tOuANx31RVf3vDKyPsiR wGBm0PocQOogWmBEIAfTcCRbcyVIoeI/YjSYvIAkVERk86ZskR+Rpa9Xu3xIFDc6+mAuew07iKp ibzuh2nAP6m8JlZjgGFHdgayaFpCtdmPSor8jkV9dx9LrwE0u1QsopUfxVp1VwtRDJygQRfnoJ3 F87d6gQWLDHrUTSKId17jLEtuYhZDTE56eA2s7EhKHlg/XMoMoREWSXCRulliWhXn7XNrisAUxK WUKeIuQrEququ3vsm7m1aoneA4GQ== X-Received: by 2002:a05:600c:3b0f:b0:48a:7965:b943 with SMTP id 5b1f17b1804b1-48e51f4e9admr478114025e9.29.1778605788240; Tue, 12 May 2026 10:09:48 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v9 05/13] xen/arm: gic-v3: add ITS suspend/resume support Date: Tue, 12 May 2026 20:07:12 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778605789-DB57FCF5-620AAA48/0/0 X-purgate-type: clean X-purgate-size: 9457 From: Mykola Kvach Handle system suspend/resume for GICv3 with an ITS present so LPIs keep working after firmware powers the GIC down. Save and restore the ITS CTLR, CBASER and BASER registers, and re-establish the collection mapping on resume. Add list_for_each_entry_continue_reverse() in list.h for the ITS suspend error path that needs to roll back partially saved state. Based on Linux commit dba0bc7b76dc: "irqchip/gic-v3-its: Add ability to save/restore ITS state". Signed-off-by: Mykola Kvach --- Changes in V9: - fix the ITS suspend/resume coding-style nits; - preserve the saved GITS_CTLR state while masking the read-only QUIESCENT bit. Changes in V8: - Reword the CBASER/CWRITER comment to match Xen and drop the stale Linux cmd_write reference. - Clarify the list_for_each_entry_continue_reverse() comment. - Factor out per-ITS helpers for collection setup and resume. - Restore each ITS and re-establish its collection mapping in the same loop, so a failed ITS resume is not followed by MAPC/SYNC on that un-restored instance. - panic in case when resume of an ITS failed - cleanup baser cache during suspend --- xen/arch/arm/gic-v3-its.c | 133 ++++++++++++++++++++++++-- xen/arch/arm/gic-v3.c | 11 ++- xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++ xen/include/xen/list.h | 14 +++ 4 files changed, 171 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 9005ce8ce5..582c26d964 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, return its_send_command(its, cmd); } +static int gicv3_its_setup_collection_single(struct host_its *its, + unsigned int cpu) +{ + int ret; + + ret = its_send_cmd_mapc(its, cpu, cpu); + if ( ret ) + return ret; + + ret = its_send_cmd_sync(its, cpu); + if ( ret ) + return ret; + + return gicv3_its_wait_commands(its); +} + /* Set up the (1:1) collection mapping for the given host CPU. */ int gicv3_its_setup_collection(unsigned int cpu) { @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) list_for_each_entry(its, &host_its_list, entry) { - ret = its_send_cmd_mapc(its, cpu, cpu); - if ( ret ) - return ret; - - ret = its_send_cmd_sync(its, cpu); - if ( ret ) - return ret; - - ret = gicv3_its_wait_commands(its); + ret = gicv3_its_setup_collection_single(its, cpu); if ( ret ) return ret; } @@ -1210,6 +1218,113 @@ int gicv3_its_init(void) return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void) +{ + struct host_its *its; + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + unsigned int i; + void __iomem *base = its->its_base; + + /* + * By the time Xen reaches gic_suspend(), every domain is already in + * SHUTDOWN_suspend, so ITS-targeting interrupt sources are expected + * to have been quiesced by the owning OS before SYSTEM_SUSPEND. + */ + /* Preserve saved GITS_CTLR state, excluding read-only QUIESCENT. */ + its->suspend_ctx.ctlr = readl_relaxed(base + GITS_CTLR) & + ~GITS_CTLR_QUIESCENT; + ret = gicv3_disable_its(its); + if ( ret ) + { + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + goto err; + } + + its->suspend_ctx.cbaser = readq_relaxed(base + GITS_CBASER); + + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = readq_relaxed(base + GITS_BASER0 + i * 8); + + its->suspend_ctx.baser[i] = 0; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + its->suspend_ctx.baser[i] = baser; + } + } + + return 0; + + err: + list_for_each_entry_continue_reverse( its, &host_its_list, entry ) + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTLR); + + return ret; +} + +static int gicv3_its_resume_single(struct host_its *its, unsigned int cpu) +{ + void __iomem *base = its->its_base; + unsigned int i; + int ret; + + /* + * Make sure that the ITS is disabled. If it fails to quiesce, + * don't restore it since writing to CBASER or BASER + * registers is undefined according to the GIC v3 ITS + * Specification. + */ + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); + ret = gicv3_disable_its(its); + if ( ret ) + return ret; + + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); + + /* + * Writing CBASER resets CREADR to 0, so reset CWRITER to + * keep the command queue pointers aligned. + */ + writeq_relaxed(0, base + GITS_CWRITER); + + /* Restore GITS_BASER from the value cache. */ + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = its->suspend_ctx.baser[i]; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); + } + + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + + return gicv3_its_setup_collection_single(its, cpu); +} + +void gicv3_its_resume(void) +{ + struct host_its *its; + unsigned int cpu = smp_processor_id(); + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + ret = gicv3_its_resume_single(its, cpu); + if ( ret ) + panic("GICv3: ITS@%"PRIpaddr": failed to restore during resume: %d\n", + its->addr, ret); + } +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ /* * Local variables: diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 6fc4354e2e..8ef9f416d0 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -2115,10 +2115,14 @@ static int gicv3_suspend(void) gicv3_disable_interface(); - ret = gicv3_disable_redist(); + ret = gicv3_its_suspend(); if ( ret ) goto out_enable_iface; + ret = gicv3_disable_redist(); + if ( ret ) + goto out_its_resume; + /* Save GICR configuration */ gicv3_redist_wait_for_rwp(); @@ -2154,6 +2158,9 @@ static int gicv3_suspend(void) return 0; + out_its_resume: + gicv3_its_resume(); + out_enable_iface: gicv3_hyp_enable(true); WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); @@ -2253,6 +2260,8 @@ static void gicv3_resume(void) gicv3_redist_wait_for_rwp(); + gicv3_its_resume(); + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); isb(); diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index fc5a84892c..492c468ae0 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -129,6 +129,13 @@ struct host_its { spinlock_t cmd_lock; void *cmd_buf; unsigned int flags; +#ifdef CONFIG_SYSTEM_SUSPEND + struct suspend_ctx { + uint32_t ctlr; + uint64_t cbaser; + uint64_t baser[GITS_BASER_NR_REGS]; + } suspend_ctx; +#endif }; /* Map a collection for this host CPU to each host ITS. */ @@ -204,6 +211,11 @@ uint64_t gicv3_its_get_cacheability(void); uint64_t gicv3_its_get_shareability(void); unsigned int gicv3_its_get_memflags(void); +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void); +void gicv3_its_resume(void); +#endif + #else #ifdef CONFIG_ACPI @@ -271,6 +283,17 @@ static inline int gicv3_its_make_hwdom_dt_nodes(const struct domain *d, return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +static inline int gicv3_its_suspend(void) +{ + return 0; +} + +static inline void gicv3_its_resume(void) +{ +} +#endif + #endif /* CONFIG_HAS_ITS */ #endif diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h index 98d8482dab..2aab274157 100644 --- a/xen/include/xen/list.h +++ b/xen/include/xen/list.h @@ -535,6 +535,20 @@ static inline void list_splice_init(struct list_head *list, &(pos)->member != (head); \ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member)) +/** + * list_for_each_entry_continue_reverse - iterate backwards from the given point + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_head within the struct. + * + * Iterate over list of given type backwards, starting from the element previous + * to the current one in list order. + */ +#define list_for_each_entry_continue_reverse(pos, head, member) \ + for ((pos) = list_entry((pos)->member.prev, typeof(*(pos)), member); \ + &(pos)->member != (head); \ + (pos) = list_entry((pos)->member.prev, typeof(*(pos)), member)) + /** * list_for_each_entry_from - iterate over list of given type from the * current point -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307281.1579042 (Exim 4.92) (envelope-from ) id 1wMqcE-0007Fn-4E; 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As a result, CPUs going offline and back online could end up with stale or missing handlers, breaking delivery of FF-A notifications. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_notif.c | 63 ++++++++++++++++++++++++++++-------- 1 file changed, 50 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c index 186e726412..513c399594 100644 --- a/xen/arch/arm/tee/ffa_notif.c +++ b/xen/arch/arm/tee/ffa_notif.c @@ -360,10 +360,28 @@ static int32_t ffa_notification_bitmap_destroy(uint16_t vm_id) return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0, 0); } -void ffa_notif_init_interrupt(void) +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, sri_irq); + +static int request_sri_irq(void) { int ret; + struct irqaction *sri_action = &this_cpu(sri_irq); + + sri_action->name = "FF-A notif"; + sri_action->handler = notif_irq_handler; + sri_action->dev_id = NULL; + sri_action->free_on_release = 0; + + ret = setup_irq(notif_sri_irq, 0, sri_action); + if ( ret ) + printk(XENLOG_ERR "ffa: setup_irq irq %u failed: error %d\n", + notif_sri_irq, ret); + return ret; +} + +void ffa_notif_init_interrupt(void) +{ if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) { /* @@ -376,14 +394,36 @@ void ffa_notif_init_interrupt(void) * pending, while the SPMC in the secure world will not notice that * the interrupt was lost. */ - ret = request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A notif", - NULL); - if ( ret ) - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - notif_sri_irq, ret); + request_sri_irq(); } } +static void deinit_ffa_notif_interrupt(void) +{ + if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) + release_irq(notif_sri_irq, NULL); +} + +static int cpu_ffa_notif_callback(struct notifier_block *nfb, + unsigned long action, + void *hcpu) +{ + switch ( action ) + { + case CPU_DYING: + deinit_ffa_notif_interrupt(); + break; + default: + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block cpu_ffa_notif_nfb = { + .notifier_call = cpu_ffa_notif_callback, +}; + void ffa_notif_init(void) { const struct arm_smccc_1_2_regs arg = { @@ -392,7 +432,6 @@ void ffa_notif_init(void) }; struct arm_smccc_1_2_regs resp; unsigned int irq; - int ret; /* Only enable fw notification if all ABIs we need are supported */ if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) && @@ -408,13 +447,11 @@ void ffa_notif_init(void) notif_sri_irq = irq; if ( irq >= NR_GIC_SGI ) irq_set_type(irq, IRQ_TYPE_EDGE_RISING); - ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL); - if ( ret ) - { - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - irq, ret); + + if ( request_sri_irq() ) return; - } + + register_cpu_notifier(&cpu_ffa_notif_nfb); fw_notif_enabled = true; } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307283.1579047 (Exim 4.92) (envelope-from ) id 1wMqcE-0007IU-Fh; Tue, 12 May 2026 17:09:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307283.1579047; Tue, 12 May 2026 17:09:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcE-0007I9-9w; Tue, 12 May 2026 17:09:54 +0000 Received: by outflank-mailman (input) for mailman id 1307283; Tue, 12 May 2026 17:09:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcD-0007Av-Q1 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcD-007RzZ-6w for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:53 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ec9-2eae-0a2a0a5409dd-0a2a4501afae-36 for ; Tue, 12 May 2026 19:09:53 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee1-c1f2-0a2a45010019-d155802cc06e-3 for ; Tue, 12 May 2026 19:09:53 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso53223425e9.2 for ; Tue, 12 May 2026 10:09:53 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Tested on R-Car H3 Starter Kit. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Mykola Kvach --- Changes in V9: - set dt_device_set_protected() only after ipmmu_alloc_ctx_suspend() succeeds, so DT devices do not remain protected on allocation failure. Changes in V7: - moved suspend context allocation before pci stuff --- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 319 +++++++++++++++++++++-- 1 file changed, 304 insertions(+), 15 deletions(-) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c index fa9ab9cb13..e1b47a5824 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -71,6 +71,8 @@ }) #endif +#define dev_dbg(dev, fmt, ...) \ + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) #define dev_info(dev, fmt, ...) \ dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) #define dev_warn(dev, fmt, ...) \ @@ -130,6 +132,24 @@ struct ipmmu_features { unsigned int imuctr_ttsel_mask; }; +#ifdef CONFIG_SYSTEM_SUSPEND + +struct ipmmu_reg_ctx { + unsigned int imttlbr0; + unsigned int imttubr0; + unsigned int imttbcr; + unsigned int imctr; +}; + +struct ipmmu_vmsa_backup { + struct device *dev; + unsigned int *utlbs_val; + unsigned int *asids_val; + struct list_head list; +}; + +#endif + /* Root/Cache IPMMU device's information */ struct ipmmu_vmsa_device { struct device *dev; @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; unsigned int utlb_refcount[IPMMU_UTLB_MAX]; const struct ipmmu_features *features; +#ifdef CONFIG_SYSTEM_SUSPEND + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; +#endif }; /* @@ -547,6 +570,245 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, spin_unlock_irqrestore(&mmu->lock, flags); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); +static LIST_HEAD(ipmmu_devices_backup); + +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; + +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, + unsigned int utlb) +{ + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); +} + +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + backup_data->asids_val[i] = ipmmu_imuasid_read(mmu, utlb); + backup_data->utlbs_val[i] = ipmmu_imuctr_read(mmu, utlb); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->context_id); + + regs->imttlbr0 = ipmmu_ctx_read_root(domain, IMTTLBR0); + regs->imttubr0 = ipmmu_ctx_read_root(domain, IMTTUBR0); + regs->imttbcr = ipmmu_ctx_read_root(domain, IMTTBCR); + regs->imctr = ipmmu_ctx_read_root(domain, IMCTR); +} + +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->context_id); + + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); +} + +/* + * Xen: Unlike Linux implementation, Xen uses a single driver instance + * for handling all IPMMUs. There is no framework for ipmmu_suspend/resume + * callbacks to be invoked for each IPMMU device. So, we need to iterate + * through all registered IPMMUs performing required actions. + * + * Also take care of restoring special settings, such as translation + * table format, etc. + */ +static int __must_check ipmmu_suspend(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return 0; + + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); + + spin_lock(&ipmmu_devices_lock); + + list_for_each_entry( mmu, &ipmmu_devices, list ) + { + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_backup_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_backup(mmu); + } + + spin_unlock(&ipmmu_devices_lock); + + return 0; +} + +static void ipmmu_resume(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return; + + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); + + spin_lock(&ipmmu_devices_lock); + + list_for_each_entry( mmu, &ipmmu_devices, list ) + { + uint32_t reg; + + /* Do not use security group function */ + reg = IMSCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) & ~IMSCTLR_USE_SECGRP); + + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + /* Use stage 2 translation table format */ + reg = IMSAUXCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) | IMSAUXCTLR_S2PTE); + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_restore_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_restore(mmu); + } + + spin_unlock(&ipmmu_devices_lock); +} + +static int ipmmu_alloc_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data; + unsigned int *utlbs_val, *asids_val; + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + + utlbs_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !utlbs_val ) + return -ENOMEM; + + asids_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !asids_val ) + { + xfree(utlbs_val); + return -ENOMEM; + } + + backup_data = xzalloc(struct ipmmu_vmsa_backup); + if ( !backup_data ) + { + xfree(utlbs_val); + xfree(asids_val); + return -ENOMEM; + } + + backup_data->dev = dev; + backup_data->utlbs_val = utlbs_val; + backup_data->asids_val = asids_val; + + spin_lock(&ipmmu_devices_backup_lock); + list_add(&backup_data->list, &ipmmu_devices_backup); + spin_unlock(&ipmmu_devices_backup_lock); + + return 0; +} + +#ifdef CONFIG_HAS_PCI +static void ipmmu_free_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data, *tmp; + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry_safe( backup_data, tmp, &ipmmu_devices_backup, list ) + { + if ( backup_data->dev == dev ) + { + list_del(&backup_data->list); + xfree(backup_data->utlbs_val); + xfree(backup_data->asids_val); + xfree(backup_data); + break; + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} +#endif /* CONFIG_HAS_PCI */ + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { uint64_t ttbr; @@ -559,6 +821,9 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) return ret; domain->context_id = ret; +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[ret] = &root_pgtable[ret]; +#endif /* * TTBR0 @@ -615,6 +880,9 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) ipmmu_ctx_write_root(domain, IMCTR, IMCTR_FLUSH); ipmmu_tlb_sync(domain); +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[domain->context_id] = NULL; +#endif ipmmu_domain_free_context(domain->mmu->root, domain->context_id); } @@ -1338,10 +1606,11 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct iommu_fwspec *fwspec; #ifdef CONFIG_HAS_PCI + int ret; + if ( dev_is_pci(dev) ) { struct pci_dev *pdev = dev_to_pci(dev); - int ret; if ( devfn != pdev->devfn ) return 0; @@ -1358,17 +1627,24 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( !to_ipmmu(dev) ) return -ENODEV; - if ( !dev_is_pci(dev) ) + if ( !dev_is_pci(dev) && dt_device_is_protected(dev_to_dt(dev)) ) { - if ( dt_device_is_protected(dev_to_dt(dev)) ) - { - dev_err(dev, "Already added to IPMMU\n"); - return -EEXIST; - } + dev_err(dev, "Already added to IPMMU\n"); + return -EEXIST; + } - /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); +#ifdef CONFIG_SYSTEM_SUSPEND + if ( ipmmu_alloc_ctx_suspend(dev) ) + { + dev_err(dev, "Failed to allocate context for suspend\n"); + return -ENOMEM; } +#endif + + /* Let Xen know that the master device is protected by an IOMMU. */ + if ( !dev_is_pci(dev) ) + dt_device_set_protected(dev_to_dt(dev)); + #ifdef CONFIG_HAS_PCI if ( dev_is_pci(dev) ) { @@ -1377,26 +1653,28 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct pci_host_bridge *bridge; struct iommu_fwspec *fwspec_bridge; unsigned int utlb_osid0 = 0; - int ret; bridge = pci_find_host_bridge(pdev->seg, pdev->bus); if ( !bridge ) { dev_err(dev, "Failed to find host bridge\n"); - return -ENODEV; + ret = -ENODEV; + goto free_suspend_ctx; } fwspec_bridge = dev_iommu_fwspec_get(dt_to_dev(bridge->dt_node)); if ( fwspec_bridge->num_ids < 1 ) { dev_err(dev, "Failed to find host bridge uTLB\n"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } if ( fwspec->num_ids < 1 ) { dev_err(dev, "Failed to find uTLB"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } rcar4_pcie_osid_regs_init(bridge); @@ -1405,7 +1683,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( ret < 0 ) { dev_err(dev, "No unused OSID regs\n"); - return ret; + goto free_suspend_ctx; } reg_id = ret; @@ -1420,7 +1698,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) { rcar4_pcie_osid_bdf_clear(bridge, reg_id); rcar4_pcie_osid_reg_free(bridge, reg_id); - return ret; + goto free_suspend_ctx; } } #endif @@ -1429,6 +1707,13 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) dev_name(fwspec->iommu_dev), fwspec->num_ids); return 0; +#ifdef CONFIG_HAS_PCI + free_suspend_ctx: +#ifdef CONFIG_SYSTEM_SUSPEND + ipmmu_free_ctx_suspend(dev); +#endif + return ret; +#endif } static int ipmmu_iommu_domain_init(struct domain *d) @@ -1490,6 +1775,10 @@ static const struct iommu_ops ipmmu_iommu_ops = .unmap_page = arm_iommu_unmap_page, .dt_xlate = ipmmu_dt_xlate, .add_device = ipmmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = ipmmu_suspend, + .resume = ipmmu_resume, +#endif }; static __init int ipmmu_init(struct dt_device_node *node, const void *data) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307275.1578998 (Exim 4.92) (envelope-from ) id 1wMqc6-00062Q-DI; Tue, 12 May 2026 17:09:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307275.1578998; Tue, 12 May 2026 17:09:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc6-00062I-AP; Tue, 12 May 2026 17:09:46 +0000 Received: by outflank-mailman (input) for mailman id 1307275; Tue, 12 May 2026 17:09:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005cE-PB for xen-devel@lists.xenproject.org; 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Transient physical SGI pending state (GICD_CPENDSGIRn/GICD_SPENDSGIRn) is intentionally excluded. CPU-interface active-priority state is also not restored across suspend/resume. Xen reaches the final suspend path at a quiescent point, so there is no active-priority execution context to replay after resume. Enforce this with a runtime check after disabling the CPU interface: if any implemented GICC_APRn word is still non-zero, restore GICC_CTLR and abort suspend with -EBUSY. This does not apply to distributor active state. With GICv2 EOImode==1, EOIR only drops the interrupt priority; final deactivation is a separate step. For guest-routed interrupts, Xen can have already EOIed the physical IRQ while deactivation is still pending on the vGIC/GICV path. Therefore GICD_ISACTIVER is preserved as architectural in-flight interrupt state. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V9: - Skip saving/restoring GICD_ITARGETSR0..7 because SGI/PPI target registers hold no state (read-only on MP, RAZ/WI on UP). - Add a runtime GICC_APRn quiescence check after disabling the CPU interface, and restore GICC_CTLR before returning -EBUSY. Changes in V8: - disable cpu interface + distributor before suspend - change 0xffffffff to GENMASK; - cosmetic changes; Changes in V7: - Allocate one contiguous memory block for the GICv2 dist suspend context. - gicv2_resume() no longer unconditionally re-enables the distributor/CPU interface; it now writes back the saved CTLR values as-is. - gicv2_alloc_context() now returns 0 on success and panics on failure, since suspend context allocation is not recoverable. --- xen/arch/arm/gic-v2.c | 181 +++++++++++++++++++++++++++++++++ xen/arch/arm/gic.c | 29 ++++++ xen/arch/arm/include/asm/gic.h | 12 +++ 3 files changed, 222 insertions(+) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 43a379fdda..1970c4feb9 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1108,6 +1108,178 @@ static int gicv2_iomem_deny_access(struct domain *d) return iomem_deny_access(d, mfn, mfn + nr - 1); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents block of 32 IRQs */ +struct irq_block { + uint32_t icfgr[2]; /* 2 registers of 16 IRQs each */ + uint32_t ipriorityr[8]; + uint32_t isenabler; + uint32_t isactiver; + uint32_t itargetsr[8]; +}; + +/* GICv2 registers to be saved/restored on system suspend/resume */ +struct gicv2_context { + /* GICC context */ + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + } cpu; + + /* GICD context */ + struct dist_ctx { + uint32_t ctlr; + /* Includes banked SGI/PPI state for the boot CPU. */ + struct irq_block *irqs; + } dist; +}; + +static struct gicv2_context gic_ctx; + +#define GICV2_NR_APRS 4 + +static int gicv2_suspend(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + /* Save GICC_CTLR configuration. */ + gic_ctx.cpu.ctlr = readl_gicc(GICC_CTLR); + + /* Quiesce the GIC CPU interface before suspend. */ + gicv2_cpu_disable(); + + /* + * Check the active-priority state for the group Xen drives through the + * CPU interface. GICC_CTL_ENABLE enables Group 0 without SecurityExtn and + * Group 1 in Xen's Non-secure view with SecurityExtn, and in both cases + * the relevant state is visible through GICC_APRn. Only zero/non-zero + * matters here, not the implementation-defined bit layout. + */ + for ( i = 0; i < GICV2_NR_APRS; i++ ) + { + uint32_t apr = readl_gicc(GICC_APR + i * 4); + + if ( !apr ) + continue; + + printk(XENLOG_ERR "GICv2: suspend aborted: GICC_APR%u=%#08x\n", i, apr); + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); + return -EBUSY; + } + + /* Save GICD configuration */ + gic_ctx.dist.ctlr = readl_gicd(GICD_CTLR); + writel_gicd(0, GICD_CTLR); + + gic_ctx.cpu.pmr = readl_gicc(GICC_PMR); + gic_ctx.cpu.bpr = readl_gicc(GICC_BPR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + + irqs->isenabler = readl_gicd(GICD_ISENABLER + off); + + /* + * Save distributor active state as part of the hypervisor-owned + * physical interrupt state. In GICv2 EOImode==1, EOIR only drops the + * priority; final deactivation is separate. For guest-routed + * interrupts, Xen may have EOIed the physical IRQ while the guest/vGIC + * side still owns the deactivate step. Therefore GICD_ISACTIVER can + * legitimately remain set even though transient SGI pending state and + * CPU-interface active-priority state are expected to be quiesced here. + */ + irqs->isactiver = readl_gicd(GICD_ISACTIVER + off); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) + irqs->ipriorityr[j] = readl_gicd(GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) + irqs->itargetsr[j] = readl_gicd(GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + irqs->icfgr[j] = readl_gicd(GICD_ICFGR + off + j * 4); + } + + return 0; +} + +static void gicv2_resume(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gicv2_cpu_disable(); + /* Disable distributor */ + writel_gicd(0, GICD_CTLR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); + + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); + } + + /* Make sure all registers are restored and enable distributor */ + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); + + /* Restore GIC CPU interface configuration */ + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); + + /* Enable GIC CPU interface */ + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); +} + +static void __init gicv2_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gic_ctx.dist.irqs = xzalloc_array(struct irq_block, blocks); + if ( !gic_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv2 suspend context\n"); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + #ifdef CONFIG_ACPI static unsigned long gicv2_get_hwdom_extra_madt_size(const struct domain *d) { @@ -1312,6 +1484,11 @@ static int __init gicv2_init(void) spin_unlock(&gicv2.lock); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Allocate memory to be used for saving GIC context during the suspend */ + gicv2_alloc_context(); +#endif /* CONFIG_SYSTEM_SUSPEND */ + return 0; } @@ -1355,6 +1532,10 @@ static const struct gic_hw_operations gicv2_ops = { .map_hwdom_extra_mappings = gicv2_map_hwdom_extra_mappings, .iomem_deny_access = gicv2_iomem_deny_access, .do_LPI = gicv2_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv2_suspend, + .resume = gicv2_resume, +#endif /* CONFIG_SYSTEM_SUSPEND */ }; /* Set up the GIC */ diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index ee75258fc3..7727ffed5a 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -432,6 +432,35 @@ int gic_iomem_deny_access(struct domain *d) return gic_hw_ops->iomem_deny_access(d); } +#ifdef CONFIG_SYSTEM_SUSPEND + +int gic_suspend(void) +{ + /* Must be called by boot CPU#0 with interrupts disabled */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + + if ( !gic_hw_ops->suspend || !gic_hw_ops->resume ) + return -ENOSYS; + + return gic_hw_ops->suspend(); +} + +void gic_resume(void) +{ + /* + * Must be called by boot CPU#0 with interrupts disabled after gic_suspend + * has returned successfully. + */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + ASSERT(gic_hw_ops->resume); + + gic_hw_ops->resume(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_gic_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index ff22dea40d..fbf0d69edd 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,12 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +/* Suspend/resume */ +extern int gic_suspend(void); +extern void gic_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* SGI (AKA IPIs) */ enum gic_sgi { GIC_SGI_EVENT_CHECK, @@ -444,6 +450,12 @@ struct gic_hw_operations { int (*iomem_deny_access)(struct domain *d); /* Handle LPIs, which require special handling */ void (*do_LPI)(unsigned int lpi); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Save GIC configuration due to the system suspend */ + int (*suspend)(void); + /* Restore GIC configuration due to the system resume */ + void (*resume)(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ }; extern const struct gic_hw_operations *gic_hw_ops; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307273.1578980 (Exim 4.92) (envelope-from ) id 1wMqc4-0005cM-Rz; Tue, 12 May 2026 17:09:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307273.1578980; Tue, 12 May 2026 17:09:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005cF-OV; Tue, 12 May 2026 17:09:44 +0000 Received: by outflank-mailman (input) for mailman id 1307273; Tue, 12 May 2026 17:09:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc2-0005Ur-KU for xen-devel@lists.xenproject.org; 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Part 1, covering guest suspend functionality, is already in mainline. NOTE: Host-wide suspend/resume support is guarded by CONFIG_SYSTEM_SUSPEND, which can currently only be selected when UNSUPPORTED is set, and thus the host suspend backend is neither enabled by default nor built in supported configurations. The separate HAS_HWDOM_SYSTEM_SUSPEND policy bit only changes how ARM treats SHUTDOWN_suspend from the hardware domain; it does not enable the host-wide suspend backend by itself. This version is ported to Xen master and includes extensive improvements based on reviewer feedback. The patch series restructures code to improve robustness, maintainability, and implements system Suspend-to-RAM support on ARM64 hardware/control domains. Key updates in this series: - Introduced architecture-specific suspend/resume infrastructure - Integrated GICv2/GICv3 suspend and resume, including memory-backed context save/restore with error handling - Added time and IRQ suspend/resume hooks, ensuring correct timer/interrupt state across suspend cycles - Implemented proper PSCI SYSTEM_SUSPEND invocation and version checks - Improved state management and recovery in error cases during suspend/resume - Added support for IPMMU-VMSA/SMMUv3 context save/restore - Added support for GICv3 eSPI registers context save/restore - Added support for ITS registers context save/restore --- TODOs: - Enable "xl suspend" support on ARM - Add suspend/resume CI test for ARM (QEMU if feasible) - PCI suspend ? --- Detailed changelogs can be found in each patch. Changes in v9: - Split the control-domain SYSTEM_SUSPEND flow so host availability, runtime blockers and domain-readiness checks are handled separately from the host suspend backend. - Gate vPSCI SYSTEM_SUSPEND on cached host PSCI support and Xen runtime suspend blockers, and log firmware support during initialization. - Fold the arm64 resume trampoline into the CPU context save/restore patch and use asm-offsets-generated RESUME_CTX_* definitions for the assembly save/restore path. - Tighten the GICv2/GICv3/ITS/IPMMU/SMMUv3 suspend/resume paths based on review feedback, including state-save/restore fixes and safer failure handling. - Reorder the host suspend/resume phases so timer and GIC state are handled with local IRQs disabled and restored before console/IOMMU resume. Changes in v8: - Rebased to latest master and refreshed the series accordingly. - Added a new GICv3 patch to tolerate retained redistributor LPI state across CPU_OFF/CPU_ON. - GICv2 suspend now disables the CPU interface and distributor before saving state. - GICv3 suspend/resume fixes the redistributor base used for LPI state. - ITS and SMMUv3 suspend/resume paths were tightened, with safer restore/rollback handling and stricter fatal-error handling. - System suspend now checks that all domains are already in SHUTDOWN_suspend before proceeding, and renames the hardware-domain suspend capability/helper for clearer semantics. - Fixed alignment/cleanup issues in the low-level suspend/resume code. Changes in v7: - Timer helper renamed/clarified; virtual/hyper/phys handling documented. - GICv2 uses one context block; restore saved CTLR; panic on alloc failure. - GICv3/eSPI/ITS always suspend/resume; restore LPI/eSPI; rdist timeout. - IPMMU suspend context allocated before PCI setup. - System suspend: control domain drives host suspend. - Dropped v6 IRQ descriptor restore patches; use setup_irq and re-register local IRQs on resume instead. For earlier changelogs, please refer to the previous cover letters. Mirela Simonovic (5): xen/arm: Add suspend and resume timer helpers xen/arm: gic-v2: Implement GIC suspend/resume functions xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND xen/arm: Implement PSCI SYSTEM_SUSPEND call (host interface) xen/arm: Add host system suspend backend Mykola Kvach (7): xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF xen/arm: gic-v3: Implement GICv3 suspend/resume functions xen/arm: gic-v3: add ITS suspend/resume support xen/arm: tee: keep init_tee_secondary() for hotplug and resume xen/arm: ffa: fix notification SRI across CPU hotplug/suspend xen/arm: smmu-v3: add suspend/resume handlers xen/arm: Add vPSCI SYSTEM_SUSPEND policy Oleksandr Tyshchenko (1): iommu/ipmmu-vmsa: Implement suspend/resume callbacks xen/arch/arm/Kconfig | 2 + xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 20 ++ xen/arch/arm/arm64/head.S | 118 +++++++ xen/arch/arm/gic-v2.c | 181 +++++++++++ xen/arch/arm/gic-v3-its.c | 133 +++++++- xen/arch/arm/gic-v3-lpi.c | 80 ++++- xen/arch/arm/gic-v3.c | 394 ++++++++++++++++++++++- xen/arch/arm/gic.c | 35 ++ xen/arch/arm/include/asm/gic.h | 16 + xen/arch/arm/include/asm/gic_v3_defs.h | 1 + xen/arch/arm/include/asm/gic_v3_its.h | 23 ++ xen/arch/arm/include/asm/mm.h | 2 + xen/arch/arm/include/asm/psci.h | 4 + xen/arch/arm/include/asm/suspend.h | 36 +++ xen/arch/arm/include/asm/time.h | 5 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/psci.c | 38 ++- xen/arch/arm/suspend.c | 194 +++++++++++ xen/arch/arm/tee/ffa_notif.c | 63 +++- xen/arch/arm/tee/tee.c | 2 +- xen/arch/arm/time.c | 44 ++- xen/arch/arm/vpsci.c | 120 ++++++- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 + xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/ipmmu-vmsa.c | 319 +++++++++++++++++- xen/drivers/passthrough/arm/smmu-v3.c | 182 ++++++++--- xen/include/xen/list.h | 14 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 32 files changed, 1951 insertions(+), 107 deletions(-) create mode 100644 xen/arch/arm/suspend.c -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307285.1579062 (Exim 4.92) (envelope-from ) id 1wMqcH-0007rp-HP; Tue, 12 May 2026 17:09:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307285.1579062; Tue, 12 May 2026 17:09:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007rR-8A; Tue, 12 May 2026 17:09:57 +0000 Received: by outflank-mailman (input) for mailman id 1307285; Tue, 12 May 2026 17:09:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcF-0007Om-10 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcE-007RzZ-D4 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:54 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035eb4-2eae-0a2a0a5409dd-0a2a45059d4c-28 for ; Tue, 12 May 2026 19:09:54 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee2-aaa8-0a2a45050019-d1558030b83b-3 for ; Tue, 12 May 2026 19:09:54 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so64771745e9.2 for ; Tue, 12 May 2026 10:09:54 -0700 (PDT) Received: from EPUAKYIW02F7.. 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During suspend, configure GBPA to abort incoming transactions, disable the translation interface while keeping CMDQ enabled, issue CMD_SYNC to ensure all previously issued commands have completed, then disable the SMMU. Resume uses arm_smmu_device_reset() to reprogram the SMMU and re-enable translation and interrupt generation. The IRQ setup split follows the approach from Pranjal Shrivastava's Linux arm-smmu-v3 runtime/system sleep series: IRQ handlers are requested once during probe, while reset/resume only restores SMMU hardware state and re-enables IRQ_CTRL. Only the pieces relevant to Xen's currently supported SMMUv3 path are ported here. Xen documents SMMUv3 MSI and PCI ATS as unsupported and not compiled/tested, so this patch does not restore SMMU MSI IRQ_CFGn registers nor reinitialize ATS/PRI endpoints. If those paths become usable, suspend/resume will need corresponding MSI restore and ATS/PRI quiesce/reinit steps. Link: https://lore.kernel.org/r/20260414194702.1229094-1-praan@google.com/ Based-on-patch-by: Pranjal Shrivastava Signed-off-by: Mykola Kvach --- Changes in V9: - Use CMD_SYNC in suspend instead of polling CMDQ_CONS, so the suspend path waits for command completion rather than only command consumption. - Document that arm_smmu_setup_irqs() is probe-only and that future Xen SMMUv3 MSI support will need to restore SMMU IRQ_CFGn registers on resume. - Restore the reference to Pranjal's Linux runtime/system sleep series and clarify that MSI/ATS/PRI resume handling is outside the supported Xen path. - Prefix the subject with xen/arm for consistency with the rest of the Arm suspend/resume series. Changes in V8: - Honor ARM_SMMU_FEAT_SEV when draining the CMDQ during suspend, matching the existing runtime CMD_SYNC path. - Fold the suspend rollback reset path into a helper and rename the error reporting to describe suspend rollback rather than resume. - Treat SMMU reset failure during resume as fatal instead of logging and continuing with a potentially unusable IOMMU. - cosmetic changes --- xen/drivers/passthrough/arm/smmu-v3.c | 178 ++++++++++++++++++++------ 1 file changed, 142 insertions(+), 36 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index bf153227db..82c8ead979 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1814,8 +1814,7 @@ static int arm_smmu_write_reg_sync(struct arm_smmu_device *smmu, u32 val, } /* GBPA is "special" */ -static int __init arm_smmu_update_gbpa(struct arm_smmu_device *smmu, - u32 set, u32 clr) +static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set, u32 clr) { int ret; u32 reg, __iomem *gbpa = smmu->base + ARM_SMMU_GBPA; @@ -1995,10 +1994,35 @@ err_free_evtq_irq: return ret; } +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) +{ + int ret; + u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; + + if ( smmu->features & ARM_SMMU_FEAT_PRI ) + irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; + + /* Enable interrupt generation on the SMMU */ + ret = arm_smmu_write_reg_sync(smmu, irqen_flags, + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); + if ( ret ) + { + dev_warn(smmu->dev, "failed to enable irqs\n"); + return ret; + } + + return 0; +} + +/* + * Probe-time only: request host IRQs and, when available, program the SMMU's + * MSI doorbells. Resume does not restore the SMMU *_IRQ_CFGn MSI registers, + * so any host suspend support must treat the active MSI IRQ path as + * unsupported until that restore path exists. + */ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) { int ret, irq; - u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; /* Disable IRQs first */ ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, @@ -2028,22 +2052,7 @@ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) } } - if (smmu->features & ARM_SMMU_FEAT_PRI) - irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; - - /* Enable interrupt generation on the SMMU */ - ret = arm_smmu_write_reg_sync(smmu, irqen_flags, - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); - if (ret) { - dev_warn(smmu->dev, "failed to enable irqs\n"); - goto err_free_irqs; - } - return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_disable(struct arm_smmu_device *smmu) @@ -2057,7 +2066,7 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu) return ret; } -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; u32 reg, enables; @@ -2163,17 +2172,9 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } } - ret = arm_smmu_setup_irqs(smmu); - if (ret) { - dev_err(smmu->dev, "failed to setup irqs\n"); + ret = arm_smmu_enable_irqs(smmu); + if ( ret ) return ret; - } - - /* Initialize tasklets for threaded IRQs*/ - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, - smmu); /* Enable the SMMU interface, or ensure bypass */ if (disable_bypass) { @@ -2181,20 +2182,16 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } else { ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); if (ret) - goto err_free_irqs; + return ret; } ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { dev_err(smmu->dev, "failed to enable SMMU interface\n"); - goto err_free_irqs; + return ret; } return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) @@ -2558,10 +2555,23 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) if (ret) goto out_free; + ret = arm_smmu_setup_irqs(smmu); + if ( ret ) + { + dev_err(smmu->dev, "failed to setup irqs\n"); + goto out_free; + } + + /* Initialize tasklets for threaded IRQs*/ + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, + smmu); + /* Reset the device */ ret = arm_smmu_device_reset(smmu); if (ret) - goto out_free; + goto out_free_irqs; /* * Keep a list of all probed devices. This will be used to query @@ -2575,6 +2585,8 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) return 0; +out_free_irqs: + arm_smmu_free_irqs(smmu); out_free: arm_smmu_free_structures(smmu); @@ -2855,6 +2867,96 @@ static void arm_smmu_iommu_xen_domain_teardown(struct domain *d) xfree(xen_domain); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device *smmu) +{ + int ret = arm_smmu_device_reset(smmu); + + if ( ret ) + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", + ret); +} + +static int arm_smmu_suspend(void) +{ + struct arm_smmu_device *smmu; + int ret = 0; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + /* Abort all transactions before disable to avoid spurious bypass */ + ret = arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); + if ( ret ) + goto fail; + + /* Disable the SMMU via CR0.EN and all queues except CMDQ */ + ret = arm_smmu_write_reg_sync(smmu, CR0_CMDQEN, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out while disabling smmu\n"); + goto fail; + } + + /* + * At this point the translation interface is disabled and the + * SMMU won't access translation/config structures, even + * speculatively, as per the IHI0070 spec (section 6.3.9.6). + * CMDQ is still enabled so that a CMD_SYNC can complete any + * previously issued commands. + */ + + /* Ensure all previously issued commands have completed. */ + ret = arm_smmu_cmdq_issue_sync(smmu); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out waiting for pending commands\n"); + goto fail; + } + + /* Disable everything */ + ret = arm_smmu_device_disable(smmu); + if ( ret ) + goto fail; + + dev_dbg(smmu->dev, "Suspended smmu\n"); + } + + return 0; + + fail: + /* Reset the device that failed as well as any already-suspended ones. */ + arm_smmu_reset_for_suspend_rollback(smmu); + + list_for_each_entry_continue_reverse(smmu, &arm_smmu_devices, devices) + arm_smmu_reset_for_suspend_rollback(smmu); + + return ret; +} + +static void arm_smmu_resume(void) +{ + int ret; + struct arm_smmu_device *smmu; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + dev_dbg(smmu->dev, "Resuming device\n"); + + /* + * The reset will re-initialize all the base addresses, queues, + * prod and cons maintained within struct arm_smmu_device as well as + * re-enable the interrupts. + */ + ret = arm_smmu_device_reset(smmu); + if ( ret ) + panic("SMMUv3: %s: Failed to reset during resume: %d\n", + dev_name(smmu->dev), ret); + } +} +#endif + static const struct iommu_ops arm_smmu_iommu_ops = { .page_sizes = PAGE_SIZE_4K, .init = arm_smmu_iommu_xen_domain_init, @@ -2867,6 +2969,10 @@ static const struct iommu_ops arm_smmu_iommu_ops = { .unmap_page = arm_iommu_unmap_page, .dt_xlate = arm_smmu_dt_xlate, .add_device = arm_smmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = arm_smmu_suspend, + .resume = arm_smmu_resume, +#endif }; static __init int arm_smmu_dt_init(struct dt_device_node *dev, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307286.1579066 (Exim 4.92) (envelope-from ) id 1wMqcI-0007xC-76; Tue, 12 May 2026 17:09:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307286.1579066; Tue, 12 May 2026 17:09:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007vj-Qu; Tue, 12 May 2026 17:09:57 +0000 Received: by outflank-mailman (input) for mailman id 1307286; Tue, 12 May 2026 17:09:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcG-0007mm-Ix for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcF-00AdLt-Vm for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-bab6-0a2a0a5309dd-0a2a4506e5aa-36 for ; Tue, 12 May 2026 19:09:55 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee3-7371-0a2a45060019-d155802fbd5a-3 for ; Tue, 12 May 2026 19:09:55 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488b0046078so48589675e9.1 for ; Tue, 12 May 2026 10:09:55 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:54 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605795; x=1779210595; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lkhNyEzobDpYCgF/TpDVG4OQjxYfp1uqUAAZRreqhtU=; b=HIjHo2uRftMJxoWplko2MV09aZb+TgQQDwXc/9X8jOIBHNH+emuV09INzgmvNX0kWf gwVplwoTi0hvlTUKN+PwB7wJHMQqkESi5ftc48LyKXfqIgrDeaQsewfSXe+20cztL2WM gDJ91vUEYhbRGTIScsLG1AWpokGnkf/mQbAPzBqnlI+pS+Bo/dirE1XyPmUrLcJtKUyo 9G1lktAWbBU0CUdxKQKHNFIByR7qLVYdF1NtumGRL6M9ZsAqXFpV89nOUHX1fO6jOStq BUUOATjAc8I7TBYc/JJpT/43CPgz4uDj4ynsdRy1u08NIFQIzgaLd/xEWuha8MQJwU+j qbmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605795; x=1779210595; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lkhNyEzobDpYCgF/TpDVG4OQjxYfp1uqUAAZRreqhtU=; b=BPsQ6zxy/aLh+M8bOGOekgKfLUynOC/ToEgfF+0/y+1r23iQz+JHJgBbuuji2Xt7ff fz0gG4bhzgMS/IXdB6O6MbQSggOuBlrMjuDEPzeGHxpl3RFAMWmtK/H2nq6ONWccg5Mn 8KXQ8rbdgk4t2/C3T6Lg6gDRtCXEgpZMfAfyjqjoedfw2Dmkq77fXSu00vQMImU0A01r 6x0udCAKn4xzNrrxiRbTUJf8+fxpE5xiAzHzXSijtr08y4xFouSKyIy8SCxf426qc9/C 7uHiyYGxI+MvmuuzVehAXapAEozxOsc6QR6xcxxXsjzANjUNGNuklRKVGcZy8u50NfiY GnrA== X-Gm-Message-State: AOJu0YwnzLC1ypjX8naGysuUwsI4la7ULlOXMkjpF7XImAMGuOp1rZDY InL0mEcdMtgrcWcnTw4zUjmodabLWs9CCx6U1xwpt4eCZbBo0R+bxlowmWDBAQ== X-Gm-Gg: Acq92OGObMgOjuE+Wct8qwdrJBgPcddU6k+/Tu4wkCdEg56HGdtSK5bTsDmQtO3RJjl +pzQqqAl8xVpriARLEmxka02PNvMsLDRg/Lu9hIiPL0eLcnzEK1AREzJA3NvNKNaMb6KxL1ddkm uiSKbfJS3SHt2H/OuYWqO6Hnq2d8onA12cR7UE9KyftnKp0xC5lEAP37B2JJEghrkg6LmPY+LpF QA6MMNKQNJH/uW2lRomzX/iBDTxPa3XToiVcv1uiJlip5tnvB28M1URf3aV7xOFr0/Yvyh117Qh iZDYJnz8pGywViSWOq1f/sHQe6JtVSuCBfVApj8jK83QGG6LsHqS2kyTJfSH1U4Cr6jiMIUiL7u V970glNf4TaLHiD+e4dw1tw9M/N59j9Wm9P3IR6sCdJeHGBjELKjsVTSVnbGLowpMxhwY/pCpnS 3AHsLJ+s7E8twPiu0afXkhz1mVgw== X-Received: by 2002:a05:600c:5248:b0:48a:906a:9050 with SMTP id 5b1f17b1804b1-48e7069175fmr245499865e9.10.1778605794944; Tue, 12 May 2026 10:09:54 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v9 10/13] xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND Date: Tue, 12 May 2026 20:07:17 +0300 Message-ID: <46bbc9e008a65dd86fb2b368e4751eb7d2014afa.1778605274.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778605795-85361D75-333E9410/0/0 X-purgate-type: clean X-purgate-size: 11024 From: Mirela Simonovic On wakeup from PSCI SYSTEM_SUSPEND, Xen re-enters EL2 with the MMU and data cache disabled. The resume path must first switch back to Xen's runtime page tables before it can access the saved CPU context using virtual addresses. Add an arm64 hyp_resume trampoline that reuses enable_secondary_cpu_mm() to enable the data cache and MMU, switch to init_ttbr, and resume in the runtime virtual mapping. The trampoline then restores the saved CPU general-purpose and system-control register context. prepare_resume_ctx() must be invoked just before the PSCI system suspend call is issued to the platform firmware. It saves the current CPU context and returns a non-zero value so that the caller enters the physical SYSTEM_SUSPEND call. On resume, hyp_resume restores the saved context, including the saved link register. Control therefore returns to the place where prepare_resume_ctx() was called. To avoid re-entering the suspend path, the restored path sees prepare_resume_ctx() return zero. The assembly save/restore code uses offsets generated by asm-offsets.c from struct resume_cpu_context, keeping the assembly memory accesses in sync with the C structure layout. Support for ARM32 is not implemented. Instead, compilation fails with a build-time error if suspend is enabled for ARM32. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in v9: - Drop the misleading prepare_resume_ctx() pointer argument and make both save/restore paths use the global resume_cpu_context. - Squash the arm64 resume trampoline into the context save/restore patch. - Document in code that hyp_resume relies on PSCI initial-state rules. - Use generic platform firmware wording instead of ATF-specific wording. - Rename the saved context type/storage to resume_cpu_context and rely on implicit zero-initialization for the file-scope object. - Use asm-offsets.c-generated RESUME_CTX_* offsets to keep the assembly save/restore code in sync with struct resume_cpu_context. Changes in v8: - Fix alignments in code. Changes in v7: - No functional changes, just moved commit. --- xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 20 +++++ xen/arch/arm/arm64/head.S | 118 +++++++++++++++++++++++++++++ xen/arch/arm/include/asm/suspend.h | 26 +++++++ xen/arch/arm/suspend.c | 14 ++++ 5 files changed, 179 insertions(+) create mode 100644 xen/arch/arm/suspend.c diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 982c6c396a..c97df7f3a0 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -51,6 +51,7 @@ obj-y += setup.o obj-y += shutdown.o obj-y += smp.o obj-y += smpboot.o +obj-$(CONFIG_SYSTEM_SUSPEND) += suspend.o obj-$(CONFIG_SYSCTL) += sysctl.o obj-y += time.o obj-y += traps.o diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 38a3894a3b..4da5fff584 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -13,6 +13,7 @@ #include #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ( "\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\""\ @@ -57,6 +58,25 @@ void __dummy__(void) OFFSET(INITINFO_stack, struct init_info, stack); BLANK(); +#ifdef CONFIG_SYSTEM_SUSPEND + OFFSET(RESUME_CTX_X19, struct resume_cpu_context, callee_regs[0]); + OFFSET(RESUME_CTX_X21, struct resume_cpu_context, callee_regs[2]); + OFFSET(RESUME_CTX_X23, struct resume_cpu_context, callee_regs[4]); + OFFSET(RESUME_CTX_X25, struct resume_cpu_context, callee_regs[6]); + OFFSET(RESUME_CTX_X27, struct resume_cpu_context, callee_regs[8]); + OFFSET(RESUME_CTX_X29, struct resume_cpu_context, callee_regs[10]); + OFFSET(RESUME_CTX_SP, struct resume_cpu_context, sp); + OFFSET(RESUME_CTX_VBAR_EL2, struct resume_cpu_context, vbar_el2); + OFFSET(RESUME_CTX_VTCR_EL2, struct resume_cpu_context, vtcr_el2); + OFFSET(RESUME_CTX_VTTBR_EL2, struct resume_cpu_context, vttbr_el2); + OFFSET(RESUME_CTX_TPIDR_EL2, struct resume_cpu_context, tpidr_el2); + OFFSET(RESUME_CTX_MDCR_EL2, struct resume_cpu_context, mdcr_el2); + OFFSET(RESUME_CTX_HSTR_EL2, struct resume_cpu_context, hstr_el2); + OFFSET(RESUME_CTX_CPTR_EL2, struct resume_cpu_context, cptr_el2); + OFFSET(RESUME_CTX_HCR_EL2, struct resume_cpu_context, hcr_el2); + BLANK(); +#endif + OFFSET(SMCCC_RES_a0, struct arm_smccc_res, a0); OFFSET(SMCCC_RES_a2, struct arm_smccc_res, a2); OFFSET(ARM_SMCCC_1_2_REGS_X0_OFFS, struct arm_smccc_1_2_regs, a0); diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 72c7b24498..512a3c35b2 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -561,6 +561,124 @@ END(efi_xen_start) #endif /* CONFIG_ARM_EFI */ +#ifdef CONFIG_SYSTEM_SUSPEND +/* + * int prepare_resume_ctx(void) + * + * CPU context saved here will be restored on resume in hyp_resume function. + * prepare_resume_ctx shall return a non-zero value. Upon restoring context + * hyp_resume shall return value zero instead. From C code that invokes + * prepare_resume_ctx, the return value is interpreted to determine whether + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). + */ +FUNC(prepare_resume_ctx) + ldr x0, =resume_cpu_context + + /* Store callee-saved registers */ + stp x19, x20, [x0, #RESUME_CTX_X19] + stp x21, x22, [x0, #RESUME_CTX_X21] + stp x23, x24, [x0, #RESUME_CTX_X23] + stp x25, x26, [x0, #RESUME_CTX_X25] + stp x27, x28, [x0, #RESUME_CTX_X27] + stp x29, lr, [x0, #RESUME_CTX_X29] + + /* Store stack-pointer */ + mov x2, sp + str x2, [x0, #RESUME_CTX_SP] + + /* Store system control registers */ + mrs x2, VBAR_EL2 + str x2, [x0, #RESUME_CTX_VBAR_EL2] + mrs x2, VTCR_EL2 + str x2, [x0, #RESUME_CTX_VTCR_EL2] + mrs x2, VTTBR_EL2 + str x2, [x0, #RESUME_CTX_VTTBR_EL2] + mrs x2, TPIDR_EL2 + str x2, [x0, #RESUME_CTX_TPIDR_EL2] + mrs x2, MDCR_EL2 + str x2, [x0, #RESUME_CTX_MDCR_EL2] + mrs x2, HSTR_EL2 + str x2, [x0, #RESUME_CTX_HSTR_EL2] + mrs x2, CPTR_EL2 + str x2, [x0, #RESUME_CTX_CPTR_EL2] + mrs x2, HCR_EL2 + str x2, [x0, #RESUME_CTX_HCR_EL2] + + /* prepare_resume_ctx must return a non-zero value */ + mov x0, #1 + ret +END(prepare_resume_ctx) + +FUNC(hyp_resume) + /* + * PSCI states that SYSTEM_SUSPEND follows the CPU_SUSPEND initial + * state rules, so PSCI-compliant firmware must enter the return + * exception level with DAIF masked. + */ + + /* Initialize the UART if earlyprintk has been enabled. */ +#ifdef CONFIG_EARLY_PRINTK + bl init_uart +#endif + PRINT_ID("- Xen resuming -\r\n") + + bl check_cpu_mode + bl cpu_init + + ldr x0, =start + adr x20, start /* x20 := paddr (start) */ + sub x20, x20, x0 /* x20 := phys-offset */ + ldr lr, =mmu_resumed + b enable_secondary_cpu_mm + +mmu_resumed: + /* Now we can access the saved context, so restore it here. */ + ldr x0, =resume_cpu_context + + /* Restore callee-saved registers */ + ldp x19, x20, [x0, #RESUME_CTX_X19] + ldp x21, x22, [x0, #RESUME_CTX_X21] + ldp x23, x24, [x0, #RESUME_CTX_X23] + ldp x25, x26, [x0, #RESUME_CTX_X25] + ldp x27, x28, [x0, #RESUME_CTX_X27] + ldp x29, lr, [x0, #RESUME_CTX_X29] + + /* Restore stack pointer */ + ldr x2, [x0, #RESUME_CTX_SP] + mov sp, x2 + + /* Restore system control registers */ + ldr x2, [x0, #RESUME_CTX_VBAR_EL2] + msr VBAR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTCR_EL2] + msr VTCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTTBR_EL2] + msr VTTBR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_TPIDR_EL2] + msr TPIDR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_MDCR_EL2] + msr MDCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HSTR_EL2] + msr HSTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_CPTR_EL2] + msr CPTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HCR_EL2] + msr HCR_EL2, x2 + isb + + /* + * Since context is restored return from this function will appear + * as return from prepare_resume_ctx. To distinguish a return from + * prepare_resume_ctx which is called upon finalizing the suspend, + * as opposed to return from this function which executes on resume, + * we need to return zero value here. + */ + mov x0, #0 + ret +END(hyp_resume) + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* * Local variables: * mode: ASM diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 31a98a1f1b..2d9fc331fc 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -3,6 +3,8 @@ #ifndef ARM_SUSPEND_H #define ARM_SUSPEND_H +#include + struct domain; struct vcpu; struct vcpu_guest_context; @@ -14,6 +16,30 @@ struct resume_info { void arch_domain_resume(struct domain *d); +#ifdef CONFIG_SYSTEM_SUSPEND +#ifdef CONFIG_ARM_64 +struct resume_cpu_context { + register_t callee_regs[12]; + register_t sp; + register_t vbar_el2; + register_t vtcr_el2; + register_t vttbr_el2; + register_t tpidr_el2; + register_t mdcr_el2; + register_t hstr_el2; + register_t cptr_el2; + register_t hcr_el2; +} __aligned(16); +#else +#error "Define resume_cpu_context structure for arm32" +#endif + +extern struct resume_cpu_context resume_cpu_context; + +int prepare_resume_ctx(void); +void hyp_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* ARM_SUSPEND_H */ /* diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c new file mode 100644 index 0000000000..6ea4a0f9cc --- /dev/null +++ b/xen/arch/arm/suspend.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +struct resume_cpu_context resume_cpu_context; + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307288.1579071 (Exim 4.92) (envelope-from ) id 1wMqcJ-00088e-1d; Tue, 12 May 2026 17:09:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307288.1579071; Tue, 12 May 2026 17:09:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcI-00085R-P0; Tue, 12 May 2026 17:09:58 +0000 Received: by outflank-mailman (input) for mailman id 1307288; Tue, 12 May 2026 17:09:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007rj-GK for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcG-00AZHt-TV for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:56 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035eca-e002-0a2a0a5209dd-0a2a45078240-46 for ; Tue, 12 May 2026 19:09:56 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee4-229c-0a2a45070019-d1558030e133-3 for ; Tue, 12 May 2026 19:09:56 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso53138125e9.3 for ; Tue, 12 May 2026 10:09:56 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Pass the Xen resume entry point (hyp_resume) to EL3 together with a zero context ID, matching Linux. This patch wires up only the host-side PSCI SYSTEM_SUSPEND invocation. The resume trampoline and context restore are provided by earlier patches in the series. Only enable this path when CONFIG_SYSTEM_SUSPEND is set and PSCI advertises SYSTEM_SUSPEND via PSCI_FEATURES. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in v9: - cache SYSTEM_SUSPEND support using PSCI_FEATURES and gate the host call on the cached capability - keep the cached SYSTEM_SUSPEND capability read-only after init - log whether firmware reports SYSTEM_SUSPEND support - pass an explicit zero context ID in the SYSTEM_SUSPEND call - drop the stale note claiming hyp_resume is still a stub --- xen/arch/arm/include/asm/psci.h | 1 + xen/arch/arm/psci.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index 48a93e6b79..bb3c73496e 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -23,6 +23,7 @@ int call_psci_cpu_on(int cpu); void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); +int call_psci_system_suspend(void); /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index b6860a7760..e05dae1133 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -17,23 +17,27 @@ #include #include #include +#include /* * While a 64-bit OS can make calls with SMC32 calling conventions, for * some calls it is necessary to use SMC64 to pass or return 64-bit values. - * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate + * For such calls PSCI_*_FN_NATIVE(x) will choose the appropriate * (native-width) function ID. */ #ifdef CONFIG_ARM_64 #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN64_##name #else #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN32_##name #endif uint32_t psci_ver; uint32_t smccc_ver; static uint32_t psci_cpu_on_nr; +static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) @@ -60,6 +64,25 @@ void call_psci_cpu_off(void) } } +int call_psci_system_suspend(void) +{ +#ifdef CONFIG_SYSTEM_SUSPEND + struct arm_smccc_res res; + + if ( !has_psci_system_suspend ) + return PSCI_NOT_SUPPORTED; + + /* Context ID is unused for the Xen resume path. */ + arm_smccc_smc(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND), __pa(hyp_resume), 0, + &res); + return PSCI_RET(res); +#else + dprintk(XENLOG_WARNING, + "SYSTEM_SUSPEND not supported (CONFIG_SYSTEM_SUSPEND disabled)\n"); + return PSCI_NOT_SUPPORTED; +#endif +} + void call_psci_system_off(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) @@ -223,9 +246,15 @@ int __init psci_init(void) psci_init_smccc(); + has_psci_system_suspend = + psci_features(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND)) == 0; + printk(XENLOG_INFO "Using PSCI v%u.%u\n", PSCI_VERSION_MAJOR(psci_ver), PSCI_VERSION_MINOR(psci_ver)); + printk(XENLOG_DEBUG "PSCI SYSTEM_SUSPEND is %ssupported by firmware\n", + has_psci_system_suspend ? "" : "not "); + return 0; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:10:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:10:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307291.1579087 (Exim 4.92) (envelope-from ) id 1wMqcL-0000HX-FO; Tue, 12 May 2026 17:10:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307291.1579087; Tue, 12 May 2026 17:10:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcL-0000FZ-7b; Tue, 12 May 2026 17:10:01 +0000 Received: by outflank-mailman (input) for mailman id 1307291; Tue, 12 May 2026 17:09:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcI-00084X-T5 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcI-007RzZ-9l for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:58 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ec9-2eae-0a2a0a5409dd-0a2a4501afae-42 for ; Tue, 12 May 2026 19:09:58 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee6-c1f2-0a2a45010019-d155802dbd81-3 for ; Tue, 12 May 2026 19:09:58 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488b0046078so48589885e9.1 for ; Tue, 12 May 2026 10:09:58 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For non-control domains, including the hardware domain when it is not acting as a control domain, the call is handled as a guest/domain suspend request and parks the domain in SHUTDOWN_suspend. Control domains need additional sequencing because their SYSTEM_SUSPEND request is used to coordinate host-wide suspend. A non-last awake control domain may be parked in SHUTDOWN_suspend without requiring the host suspend path to be available. The last awake control domain is treated as the point where the request becomes a host-suspend request, and it may only proceed when all non-control domains are already in SHUTDOWN_suspend and the host suspend path is available. Keep the control-domain sequencing and domain-readiness checks out of PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and enforce the sequencing policy in the call handler. Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so that SHUTDOWN_suspend from the hardware domain can be treated as a domain suspend state rather than as a hardware-domain initiated host shutdown. This does not by itself imply that host-wide suspend is available. Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND capability with runtime blockers reported by Xen-owned subsystems. Add runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths lacking suspend/resume support. These blockers are runtime based, so they only apply to drivers or paths that Xen actually uses on the platform. For SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. Signed-off-by: Mykola Kvach --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/gic.c | 6 ++ xen/arch/arm/include/asm/psci.h | 3 + xen/arch/arm/include/asm/suspend.h | 10 ++- xen/arch/arm/psci.c | 7 ++ xen/arch/arm/suspend.c | 40 +++++++++ xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 +++ xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/smmu-v3.c | 4 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 14 files changed, 201 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a1..54a5bfb9ae 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -19,6 +19,7 @@ config ARM select HAS_ALTERNATIVE if HAS_VMAP select HAS_DEVICE_TREE_DISCOVERY select HAS_DOM0LESS + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE select HAS_STACK_PROTECTOR select HAS_UBSAN diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 7727ffed5a..a5efcaeb4c 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) void register_gic_ops(const struct gic_hw_operations *ops) { gic_hw_ops = ops; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("GIC driver lacks suspend/resume support"); +#endif } static void clear_cpu_lr_mask(void) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index bb3c73496e..142fa1bfe5 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); int call_psci_system_suspend(void); +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void); +#endif /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 2d9fc331fc..87db12eac3 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -38,7 +38,15 @@ extern struct resume_cpu_context resume_cpu_context; int prepare_resume_ctx(void); void hyp_resume(void); -#endif /* CONFIG_SYSTEM_SUSPEND */ +bool host_system_suspend_allowed(void); +void host_system_suspend_disable(const char *reason); + +#else /* !CONFIG_SYSTEM_SUSPEND */ + +static inline bool host_system_suspend_allowed(void) { return false; } +static inline void host_system_suspend_disable(const char *reason) {} + +#endif #endif /* ARM_SUSPEND_H */ diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index e05dae1133..e9d78668fd 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void) +{ + return has_psci_system_suspend; +} +#endif + int call_psci_cpu_on(int cpu) { struct arm_smccc_res res; diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index 6ea4a0f9cc..a571035d2c 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,9 +1,49 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include +#include +#include + struct resume_cpu_context resume_cpu_context; +/* + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid + * suspend/resume path. + * + * This gate is checked only when the last awake control domain attempts to + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. + */ +static bool host_system_suspend_runtime_allowed = true; + +static bool host_serial_suspend_allowed(void) +{ + if ( serial_suspend_supported() ) + return true; + + printk_once(XENLOG_INFO + "Host SYSTEM_SUSPEND blocked: serial driver lacks suspend/resume support\n"); + + return false; +} + +bool host_system_suspend_allowed(void) +{ + return psci_system_suspend_allowed() && + host_serial_suspend_allowed() && + host_system_suspend_runtime_allowed; +} + +void host_system_suspend_disable(const char *reason) +{ + host_system_suspend_runtime_allowed = false; + + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", + reason ? reason : "unsupported suspend/resume path"); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index ac6af6118f..48a963ae3e 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) domain_shutdown(d,SHUTDOWN_reboot); } +/* + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, + * so multiple control domains cannot all observe each other as still awake. + */ +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); + +static bool domain_in_suspend_state(struct domain *d) +{ + bool suspended; + + spin_lock(&d->shutdown_lock); + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; + spin_unlock(&d->shutdown_lock); + + return suspended; +} + +static int32_t domain_psci_system_suspend_policy(struct domain *d) +{ + struct domain *other; + bool last_awake_control_domain = true; + bool awake_non_control_domain = false; + + /* Only control domains participate in sequencing policy. */ + if ( !is_control_domain(d) ) + return 0; + + rcu_read_lock(&domlist_read_lock); + + for_each_domain ( other ) + { + bool suspended; + + if ( other == d ) + continue; + + suspended = domain_in_suspend_state(other); + if ( suspended ) + continue; + + if ( is_control_domain(other) ) + { + last_awake_control_domain = false; + break; + } + + awake_non_control_domain = true; + } + + rcu_read_unlock(&domlist_read_lock); + + /* + * Another control domain is still awake. This request is only the first + * phase of the sequencing: park this control domain and leave the host + * running. Host-wide suspend gates must not block this intermediate state. + */ + if ( !last_awake_control_domain ) + return 0; + + /* + * This is the last awake control domain. It must not be parked unless the + * request can proceed as a host-suspend request; otherwise Xen would lose + * the last domain that can coordinate the system suspend. + */ + if ( awake_non_control_domain ) + { + printk(XENLOG_DEBUG + "SYSTEM_SUSPEND denied: last awake control domain dom%u requested host suspend while non-control domains are still awake\n", + d->domain_id); + return PSCI_DENIED; + } + + /* + * Host-wide gates are relevant only for the last-control-domain case. They + * must not block parking of a non-last control domain, but they must reject + * the last control domain when host suspend is not available. + */ + if ( !host_system_suspend_allowed() ) + return PSCI_NOT_SUPPORTED; + + return 0; +} + static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) { int32_t rc; @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( is_64bit_domain(d) && is_thumb ) return PSCI_INVALID_ADDRESS; - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ - if ( is_hardware_domain(d) ) - return PSCI_NOT_SUPPORTED; - /* Ensure that all CPUs other than the calling one are offline */ domain_lock(d); for_each_vcpu ( d, v ) @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( rc ) return PSCI_DENIED; - rc = domain_shutdown(d, SHUTDOWN_suspend); + spin_lock(&vpsci_system_suspend_lock); + + rc = domain_psci_system_suspend_policy(d); + if ( !rc ) + { + rc = domain_shutdown(d, SHUTDOWN_suspend); + if ( rc ) + rc = PSCI_DENIED; + else + { + rctx->ctxt = ctxt; + rctx->wake_cpu = current; + } + } + + spin_unlock(&vpsci_system_suspend_lock); + if ( rc ) { free_vcpu_guest_context(ctxt); - return PSCI_DENIED; + return rc; } - rctx->ctxt = ctxt; - rctx->wake_cpu = current; - gprintk(XENLOG_DEBUG, "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) case PSCI_0_2_FN32_SYSTEM_RESET: case PSCI_1_0_FN32_PSCI_FEATURES: case ARM_SMCCC_VERSION_FID: - return 0; case PSCI_1_0_FN32_SYSTEM_SUSPEND: case PSCI_1_0_FN64_SYSTEM_SUSPEND: - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; + return 0; default: return PSCI_NOT_SUPPORTED; } diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480ee..816a1a4ecb 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -140,6 +140,9 @@ config HAS_EX_TABLE config HAS_FAST_MULTIPLY bool +config HAS_HWDOM_SYSTEM_SUSPEND + bool + config HAS_IOPORTS bool diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c28..d3edfb2a13 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) domain_shutdown(d, SHUTDOWN_crash); } +static inline bool want_hwdom_shutdown(uint8_t reason) +{ + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || + reason != SHUTDOWN_suspend; +} int domain_shutdown(struct domain *d, u8 reason) { @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) d->shutdown_code = reason; reason = d->shutdown_code; - if ( is_hardware_domain(d) ) + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) hwdom_shutdown(reason); if ( d->is_shutting_down ) diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c index adb312d796..cc2b5b5dee 100644 --- a/xen/drivers/char/serial.c +++ b/xen/drivers/char/serial.c @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) #ifdef CONFIG_SYSTEM_SUSPEND +static bool __read_mostly serial_suspend_available = true; + void serial_suspend(void) { int i; @@ -513,6 +515,11 @@ void serial_resume(void) com[i].driver->resume(&com[i]); } +bool serial_suspend_supported(void) +{ + return serial_suspend_available; +} + #endif /* CONFIG_SYSTEM_SUSPEND */ void __init serial_register_uart(int idx, struct uart_driver *driver, @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, /* Store UART-specific info. */ com[idx].driver = driver; com[idx].uart = uart; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !driver->suspend || !driver->resume ) + serial_suspend_available = false; +#endif } void __init serial_async_transmit(struct serial_port *port) diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/arm/iommu.c index 100545e23f..420b9fbdf0 100644 --- a/xen/drivers/passthrough/arm/iommu.c +++ b/xen/drivers/passthrough/arm/iommu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -46,6 +47,9 @@ void __init iommu_set_ops(const struct iommu_ops *ops) } iommu_ops = ops; + + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("IOMMU driver lacks suspend/resume support"); } int __init iommu_hardware_setup(void) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index 82c8ead979..443dd0e893 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -91,6 +91,7 @@ #include #include #include +#include #include "smmu-v3.h" @@ -1903,6 +1904,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) } } + host_system_suspend_disable( + "SMMUv3 MSI IRQ path is unsupported for host suspend"); + /* Add callback to free MSIs on teardown */ devm_add_action(dev, arm_smmu_free_msis, dev); } diff --git a/xen/include/xen/serial.h b/xen/include/xen/serial.h index 8e18445552..418b00ead0 100644 --- a/xen/include/xen/serial.h +++ b/xen/include/xen/serial.h @@ -137,6 +137,7 @@ const struct vuart_info* serial_vuart_info(int idx); /* Serial suspend/resume. */ void serial_suspend(void); void serial_resume(void); +bool serial_suspend_supported(void); #endif /* diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h index 6f94fd53b0..a941331035 100644 --- a/xen/include/xen/suspend.h +++ b/xen/include/xen/suspend.h @@ -6,6 +6,8 @@ #if __has_include() #include #else +struct domain; + static inline void arch_domain_resume(struct domain *d) {} #endif -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:10:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:10:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307294.1579093 (Exim 4.92) (envelope-from ) id 1wMqcM-0000Qh-8W; Tue, 12 May 2026 17:10:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307294.1579093; Tue, 12 May 2026 17:10:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcL-0000Oq-U9; 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The vPSCI policy, runtime driver blockers and control-domain sequencing checks are handled by the preceding commit; this change adds the code that actually drives the host suspend attempt. The backend runs from a tasklet scheduled on pCPU0, because non-boot CPUs are disabled during suspend. It freezes domains, disables the scheduler and then disables non-boot CPUs. Host-side suspend participants are handled in phases. IOMMU and console state are suspended first. Local IRQs are then disabled before suspending timer and GIC state. On resume or failure, the completed suspend phases are unwound in reverse: GIC and timer state are restored while IRQs are still disabled, local IRQs are restored, and then console and IOMMU state are restored. On boot, init_ttbr is normally initialized during secondary CPU hotplug. On uniprocessor systems this can leave init_ttbr uninitialized, so set it from the boot CPU before entering suspend. Note: the code is behind CONFIG_HAS_SYSTEM_SUSPEND, which is currently only selected when UNSUPPORTED is set and MPU is not set. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V9: - Split vPSCI availability policy, runtime host-suspend blockers and the domain-readiness precheck into the preceding commit. - Trigger the host suspend backend from the control-domain SYSTEM_SUSPEND path. - Reorder the host suspend/resume phases so the timer is suspended with local IRQs disabled and local IRQs are restored after the GIC and timer resume paths, before the console and IOMMU resume paths. - Move HAS_HWDOM_SYSTEM_SUSPEND and related logic to policy patch. Changes in V8: - Add a pre-suspend check in system_suspend() after scheduler_disable() to require all domains to be in the shut down state with SHUTDOWN_suspend before proceeding with the global suspend flow. - Drop the common-level depends on !ARM_64 || !SYSTEM_SUSPEND from CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND and model the ARM64 suspend case with an arch-selected capability instead. - Rename CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND to CONFIG_HAS_HWDOM_SYSTEM_SUSPEND. - Rename need_hwdom_shutdown() to want_hwdom_shutdown(). Changes in V7: - Control domain is responsible for host suspend. - Add an empty inline host_system_suspend() function when SYSTEM_SUSPEND config is disabled. - Use IS_ENABLED() for config checking instead of #ifdef. - Replace #ifdef checks in domain_shutdown() with IS_ENABLED() to simplify control flow. - Factor hardware domain shutdown condition into a helper (need_hwdom_shutdown()) to avoid preprocessor directives inside the function. - Squash with iommu suspend/resume commit. --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/include/asm/mm.h | 2 + xen/arch/arm/include/asm/suspend.h | 2 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/suspend.c | 140 +++++++++++++++++++++++++++++ xen/arch/arm/vpsci.c | 10 ++- 6 files changed, 154 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 54a5bfb9ae..119bc00674 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -9,6 +9,7 @@ config ARM_64 select 64BIT select HAS_DOMAIN_TYPE select HAS_FAST_MULTIPLY + select HAS_SYSTEM_SUSPEND if !MPU && UNSUPPORTED select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH config ARM diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 2eb8465aa9..de119cad3a 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -360,6 +360,8 @@ static inline void page_set_xenheap_gfn(struct page_info *p, gfn_t gfn) } while ( (y = cmpxchg(&p->u.inuse.type_info, x, nx)) != x ); } +void set_init_ttbr(lpae_t *root); + #endif /* __ARCH_ARM_MM__ */ /* * Local variables: diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 87db12eac3..a194dbb21a 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -40,11 +40,13 @@ int prepare_resume_ctx(void); void hyp_resume(void); bool host_system_suspend_allowed(void); void host_system_suspend_disable(const char *reason); +void host_system_suspend(struct domain *d); #else /* !CONFIG_SYSTEM_SUSPEND */ static inline bool host_system_suspend_allowed(void) { return false; } static inline void host_system_suspend_disable(const char *reason) {} +static inline void host_system_suspend(struct domain *d) {} #endif diff --git a/xen/arch/arm/mmu/smpboot.c b/xen/arch/arm/mmu/smpboot.c index 37e91d72b7..ff508ecf40 100644 --- a/xen/arch/arm/mmu/smpboot.c +++ b/xen/arch/arm/mmu/smpboot.c @@ -72,7 +72,7 @@ static void clear_boot_pagetables(void) clear_table(boot_third); } -static void set_init_ttbr(lpae_t *root) +void set_init_ttbr(lpae_t *root) { /* * init_ttbr is part of the identity mapping which is read-only. So diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index a571035d2c..b1cc67fbdb 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,10 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include +#include +#include #include +#include #include +#include struct resume_cpu_context resume_cpu_context; @@ -44,6 +50,140 @@ void host_system_suspend_disable(const char *reason) reason ? reason : "unsupported suspend/resume path"); } +/* Xen suspend. data identifies the domain that initiated suspend. */ +static void system_suspend(void *data) +{ + int status; + unsigned long flags; + struct domain *d = (struct domain *)data; + + BUG_ON(system_state != SYS_STATE_active); + + system_state = SYS_STATE_suspend; + + printk("Xen suspending...\n"); + + freeze_domains(); + scheduler_disable(); + + /* + * Non-boot CPUs have to be disabled on suspend and enabled on resume + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to PSCI + * CPU_OFF to be called by each non-boot CPU. Depending on the underlying + * platform capabilities, this may lead to the physical powering down of + * CPUs. + */ + status = disable_nonboot_cpus(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_nonboot_cpus; + } + + console_start_sync(); + status = iommu_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_end_sync; + } + + status = console_suspend(); + if ( status ) + { + dprintk(XENLOG_ERR, "Failed to suspend the console, err=%d\n", status); + system_state = SYS_STATE_resume; + goto resume_iommu; + } + + local_irq_save(flags); + + time_suspend(); + + status = gic_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_time; + } + + set_init_ttbr(xen_pgtable); + + /* + * Enable identity mapping before entering suspend to simplify + * the resume path + */ + update_boot_mapping(true); + + if ( prepare_resume_ctx() ) + { + status = call_psci_system_suspend(); + /* + * If suspend is finalized properly by above system suspend PSCI call, + * the code below in this 'if' branch will never execute. Execution + * will continue from hyp_resume which is the hypervisor's resume point. + * In hyp_resume CPU context will be restored and since link-register is + * restored as well, it will appear to return from prepare_resume_ctx. + * The difference in returning from prepare_resume_ctx on system suspend + * versus resume is in function's return value: on suspend, the return + * value is a non-zero value, on resume it is zero. That is why the + * control flow will not re-enter this 'if' branch on resume. + */ + if ( status ) + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err=%d\n", + status); + } + + system_state = SYS_STATE_resume; + update_boot_mapping(false); + + gic_resume(); + + resume_time: + time_resume(); + + local_irq_restore(flags); + + console_resume(); + + resume_iommu: + iommu_resume(); + + resume_end_sync: + console_end_sync(); + + resume_nonboot_cpus: + /* + * The rcu_barrier() has to be added to ensure that the per cpu area is + * freed before a non-boot CPU tries to initialize it (_free_percpu_area() + * has to be called before the init_percpu_area()). This scenario occurs + * when non-boot CPUs are hot-unplugged on suspend and hotplugged on resume. + */ + rcu_barrier(); + enable_nonboot_cpus(); + + scheduler_enable(); + thaw_domains(); + + system_state = SYS_STATE_active; + + printk("Resume (status %d)\n", status); + + domain_resume(d); +} + +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL); + +void host_system_suspend(struct domain *d) +{ + system_suspend_tasklet.data = (void *)d; + /* + * The suspend procedure has to be finalized by the pCPU#0 (non-boot pCPUs + * will be disabled during the suspend). + */ + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 48a963ae3e..79100cbb1e 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -237,7 +237,8 @@ static bool domain_in_suspend_state(struct domain *d) return suspended; } -static int32_t domain_psci_system_suspend_policy(struct domain *d) +static int32_t domain_psci_system_suspend_policy(struct domain *d, + bool *host_suspend) { struct domain *other; bool last_awake_control_domain = true; @@ -300,6 +301,7 @@ static int32_t domain_psci_system_suspend_policy(struct domain *d) if ( !host_system_suspend_allowed() ) return PSCI_NOT_SUPPORTED; + *host_suspend = true; return 0; } @@ -310,6 +312,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) struct vcpu *v; struct domain *d = current->domain; bool is_thumb = epoint & 1; + bool host_suspend = false; struct resume_info *rctx = &d->arch.resume_ctx; /* THUMB set is not allowed with 64-bit domain */ @@ -334,7 +337,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) spin_lock(&vpsci_system_suspend_lock); - rc = domain_psci_system_suspend_policy(d); + rc = domain_psci_system_suspend_policy(d, &host_suspend); if ( !rc ) { rc = domain_shutdown(d, SHUTDOWN_suspend); @@ -359,6 +362,9 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); + if ( host_suspend ) + host_system_suspend(d); + return rc; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307399.1579132 (Exim 4.92) (envelope-from ) id 1wMrMb-0003pd-Qm; Tue, 12 May 2026 17:57:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307399.1579132; Tue, 12 May 2026 17:57:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMb-0003pW-Nk; Tue, 12 May 2026 17:57:49 +0000 Received: by outflank-mailman (input) for mailman id 1307399; Tue, 12 May 2026 17:57:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Q1-Ei for xen-devel@lists.xenproject.org; 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dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608666; bh=VCpUi1qw2aTk/5VvkiebTI4EVFxVnB22sLNkwL9YBf4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C8OtUX6BcH+wQikMQAXfmgaR4vGdDRscBuS4SkctVe6FamUTgyyXnMxN4YEMJ7Tzv I+DX034qS0NsfRQU5+YyObmDQMIDl7MVGuHtgU1yFV9EUhYywR1okYmWm72Dg5rLsF AX7szD/UPQBqplpxxgbOy1v6JnbOq5X4Fd7dakUQ= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v6 3/3] arm/mpu: Implement p2m tables Date: Tue, 12 May 2026 18:57:29 +0100 Message-Id: <20260512175729.1915120-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608667-8336C161-6EE4EC13/0/0 X-purgate-type: clean X-purgate-size: 5922 From: Harry Ramsey Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v6: - Included mpu.h for MAX_MPU_REGION_NR - used void* instead of char* in pointer arithmetic - fixed typo in comment - Add Michal R-by v5: - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER - used MAX_MPU_REGION_NR instead of opencoding 255 - use 'table' in p2m_alloc_table to clear pages - remove p2m_free_vmid() from error path in p2m_init() which is already handled outside v4: - no changes v3: - Check for alloc_xenheap_pages allocation - Clear additional page allocated for ARM64 - Add check for INVALID_VCPU_ID - Remove unnecessary function generate_vsctlr - Code formatting fixes --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/p2m.h | 8 ++++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- 5 files changed, 86 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbacae..d565230f84ee 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8a3..8b86a03fee44 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a1d..1484c75b55aa 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -3,8 +3,16 @@ #ifndef __ARM_MPU_P2M_H__ #define __ARM_MPU_P2M_H__ +#include +#include +#include +#include + struct p2m_domain; +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) + static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..ed1b6dd40f40 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6aa8..f3ca8a4ab35f 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + void *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + unsigned int i; + + if ( !table ) + { + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", + d); + return -ENOMEM; + } + + p2m->root = virt_to_page(table); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_page(table + (i * PAGE_SIZE)); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported on MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); + + return p2m_alloc_table(d); } void p2m_save_state(struct vcpu *p) @@ -46,7 +99,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307397.1579115 (Exim 4.92) (envelope-from ) id 1wMrMa-0003Oo-6J; Tue, 12 May 2026 17:57:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307397.1579115; Tue, 12 May 2026 17:57:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Oh-3Q; Tue, 12 May 2026 17:57:48 +0000 Received: by outflank-mailman (input) for mailman id 1307397; Tue, 12 May 2026 17:57:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMX-0003Bf-W5 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMV-009D7s-RO for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:45 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a11-bab6-0a2a0a5309dd-0a2a4502963a-12 for ; Tue, 12 May 2026 19:57:45 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a17-af86-0a2a45020019-d98c6eaca98e-1 for ; Tue, 12 May 2026 19:57:44 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 205A6168F; Tue, 12 May 2026 10:57:38 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 024873F85F; Tue, 12 May 2026 10:57:41 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608663; bh=3OwJmJ83fF7wYUwwajm97vdwH/PiBu+huX5oR7YFd8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YGtG+/FGraeXfKwo6j2ZszCbIexHGTz5euMS3ApNO7W1S5knzb1eWlLwl7yHl76z8 htJu4fA71TzqxS+kS3Z+OK0tqmxB6fu5EB+s8UfHIAxCpzSVgQ1fm4dMxs9A93hetA B9kf5ORAAl6b45uX7SF1vjDdqw4xYWvcUCbV/kBE= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Hari Limaye , Harry Ramsey Subject: [PATCH v6 1/3] arm/mpu: implement setup_virt_paging for MPU systems Date: Tue, 12 May 2026 18:57:27 +0100 Message-Id: <20260512175729.1915120-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608664-ABB60161-24A4E566/0/0 X-purgate-type: clean X-purgate-size: 7761 From: Penny Zheng Implement setup_virt_paging for AArch64 MPU systems, taking care of stage 2 address translation regime, IPA bits, supported VMID length configuration and VTCR_EL2/VSTCR_EL2 register programming. Implement also the Armv8-R specific changes to ID_AA64MMFR0_EL1, related to the supported memory system architecture (PMSA/VMSA) and check that when MPU is built, the underlying HW is compatible with PMSA. By default MPU at EL2 and EL1 is required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey Reviewed-by: Michal Orzel --- v5: - removed spaces in inline if condition - Add Michal R-by v4: - Fixed typo in the comments - Fixed typo in the commit title and message - moved p2m_vmid_allocator_init() after write of VTCR_EL2 - Fixed printf format specifier %d -> %u v3: - Refactor unused code to more relevant commits. - Add P2M print information - Formatting issues - Update commit message v2: - Separate commit into multiple commits --- xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/processor.h | 8 +++ 4 files changed, 101 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b58..4547417df97e 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,89 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + register_t vtcr_el2 = READ_SYSREG(VTCR_EL2); + register_t vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against PA size. + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_PMSA_SUPPORT) && + (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT) ) + goto fault; + + /* Stage 1 EL1&0 translation regime uses PMSAv8 by default */ + vtcr_el2 &= ~VTCR_MSA; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8-R only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * cpuinfo sanitization makes sure we support 16-bits VMID only if all cores + * are supporting it. + * + * Set the VS bit only if 16 bit VMID is supported. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + { + vtcr_el2 |= VTCR_VS; + max_vmid = MAX_VMID_16_BIT; + } + else + vtcr_el2 &= ~VTCR_VS; + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + p2m_vmid_allocator_init(); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + printk("P2M: %u-bit IPA with %u-bit PA and %u-bit VMID\n", + p2m_ipa_bits, + pa_range_info[system_cpuinfo.mm64.pa_range], + (MAX_VMID == MAX_VMID_16_BIT) ? 16 : 8); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb5a..f3c11d871e86 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,U) << 30) +#define VSTCR_EL2_SC (_AC(0x1,U) << 20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1ad1..bf902a397068 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b39..895d7cd50244 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,9 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#define VTCR_MSA (_AC(0x1,UL)<<31) +#define VTCR_NSA (_AC(0x1,UL)<<30) + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +467,11 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307396.1579106 (Exim 4.92) (envelope-from ) id 1wMrMY-0003Bn-06; Tue, 12 May 2026 17:57:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307396.1579106; Tue, 12 May 2026 17:57:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMX-0003Bg-TR; Tue, 12 May 2026 17:57:45 +0000 Received: by outflank-mailman (input) for mailman id 1307396; Tue, 12 May 2026 17:57:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMW-0003BZ-H8 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMT-009D2R-UK for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:43 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a05-bab6-0a2a0a5309dd-0a2a4509aae2-22 for ; Tue, 12 May 2026 19:57:42 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a16-2497-0a2a45090019-d98c6eac94d0-1 for ; Tue, 12 May 2026 19:57:42 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6EF4A1684; Tue, 12 May 2026 10:57:36 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4BAE13F85F; Tue, 12 May 2026 10:57:40 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608661; bh=nReNm4K5rZibVDy0hIHmSNZc8OOuIK2HBFp4E3sLKok=; h=From:To:Cc:Subject:Date:From; b=s4Fs3ga/THENyHcOtOeLwzXdXQ7rtlVpYWuKxlxYKFfGfiqdA7JJ8+zxz8sGYNofx n/wpQaOt9HL6/eVdGGvO0/F/6zEno0MW2H0v+GLsqMKCSS1bWybis/Re9TmWb7pjHB iZ3q5fkMedUjLC5EYESdnqPfFi83nJPvqgJtK3pc= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Oleksii Kurochko" Subject: [PATCH v6 0/3] Fifth MPU Series Date: Tue, 12 May 2026 18:57:26 +0100 Message-Id: <20260512175729.1915120-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778608662-89F84A53-ED08F955/0/0 X-purgate-type: clean X-purgate-size: 1441 This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU systems docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 +++ xen/arch/arm/include/asm/mpu/p2m.h | 8 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 8 +++ xen/arch/arm/mpu/arm32/mm.c | 7 +++ xen/arch/arm/mpu/arm64/mm.c | 7 +++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 18 files changed, 349 insertions(+), 9 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307398.1579120 (Exim 4.92) (envelope-from ) id 1wMrMa-0003VD-Iy; Tue, 12 May 2026 17:57:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307398.1579120; Tue, 12 May 2026 17:57:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Tz-Fu; Tue, 12 May 2026 17:57:48 +0000 Received: by outflank-mailman (input) for mailman id 1307398; Tue, 12 May 2026 17:57:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMZ-0003OZ-45 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMW-009D7s-Vd for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a11-bab6-0a2a0a5309dd-0a2a4502963a-14 for ; Tue, 12 May 2026 19:57:46 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a19-af86-0a2a45020019-d98c6eacd7ce-1 for ; Tue, 12 May 2026 19:57:46 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6CC51684; Tue, 12 May 2026 10:57:39 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A60AE3F85F; Tue, 12 May 2026 10:57:43 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608665; bh=pUlihSCtoluRvHSQDgApxcwFy6+3MCxnxU+k0Ku8GtY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TBbSArrt/uJJn0ZPk8KH0Uc5HoDBRzJdPOfk8dunk+ud0bHsMl8NKbiZWoZgLAzT7 H1utUjad+9BZPz3jIv7WhTjgsdbkydUJkoqCHDyRc05g/kAu3vjp9V2ISgAS/aBdci WYTxFgBrnxLIPkUxhHhiVBRnDADroFY1jgRm7rGk= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v6 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Tue, 12 May 2026 18:57:28 +0100 Message-Id: <20260512175729.1915120-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608666-A9B70161-2DB769CA/0/0 X-purgate-type: clean X-purgate-size: 12627 From: Harry Ramsey Add a new device tree property `v8r_el1_msa` to select the MSA (memory system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the former is the default if the property is not passed. Implement the dom0less path to parse the new device tree property, add a new domctl hypercall input parameter `v8r_el1_msa` for arm and add the sanitisation in arch_sanitise_domain_config(), the parameter is intended to be used on CONFIG_MPU systems and returns an error if selected for MMU. While there, add explicit padding and check that it's zero during arch domain config sanitisation, given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v6: - Add explicit padding to `struct xen_arch_domainconfig` and check it - Provide common v8r_el1_msa_domain_sanitise_config() for MMU/MPU - During domu_dt_v8r_el1_msa_parse() set PMSA when property not present - constify *node in domu_dt_v8r_el1_msa_parse() - Print full path of the node in domu_dt_v8r_el1_msa_parse() error msgs - typo fixing v5: - follow the way domu_dt_sci_parse and ARM_SCI is doing, but return error if property is present in MMU systems. - Align the commit message on the new changes - fix documentation - fix multiline comment - drop the explicit padding from struct xen_arch_domainconfig v4: - Rework the patch to have the v8r_el1_msa input parameter more enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. v3: - Improve commit message and device tree property description - Remove macro protection - Remove unused function is_mpu_domain - Code formatting --- docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++++ xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 ++++ xen/arch/arm/mpu/arm32/mm.c | 7 +++ xen/arch/arm/mpu/arm64/mm.c | 7 +++ xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 9 files changed, 162 insertions(+), 2 deletions(-) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b4286082f..f73839df090b 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R systems at EL1, a domain + should use PMSAv8 (MPU) or VMSAv8 (MMU). + + - "mmu" + Enables VMSAv8 at EL1. This requires hardware support and is only + optionally available on AArch64. Not supported on AArch32. + + - "mpu" + Enables PMSAv8 at EL1. This is the default behavior when the property is + not passed. This configuration requires static allocation (xen,static-mem) + and direct mapping (direct-map). + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 52cf788a45ea..fecdb33d3e3a 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -302,6 +302,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, return 0; } +static int __init +domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, + struct xen_domctl_createdomain *d_cfg, + unsigned int flags) +{ + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); + + if ( !IS_ENABLED(CONFIG_MPU) ) + { + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + + if ( !property_present ) + return 0; + + printk(XENLOG_ERR + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", + dt_node_full_name(node)); + return -EINVAL; + } + + if ( !property_present ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else + { + const char *v8r_el1_msa; + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); + + if ( ret ) + return ret; + + if ( !strcmp(v8r_el1_msa, "mpu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else if ( !strcmp(v8r_el1_msa, "mmu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; + else + { + printk(XENLOG_ERR + "v8r_el1_msa value (%s) not valid for domain %s\n", + v8r_el1_msa, dt_node_full_name(node)); + return -EINVAL; + } + } + + switch ( d_cfg->arch.v8r_el1_msa ) + { + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + { + printk(XENLOG_ERR + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", + dt_node_full_name(node)); + return -EINVAL; + } + break; + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: + if ( !has_v8r_vmsa_support() ) + { + printk(XENLOG_ERR + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); + return -EINVAL; + } + break; + + default: + return -EINVAL; + } + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { @@ -315,6 +386,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) + panic("Error getting v8r_el1_msa configuration\n"); + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..e579c3b1bb3c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -538,6 +539,24 @@ void vcpu_switch_to_aarch64_mode(struct vcpu *v) v->arch.hcr_el2 |= HCR_RW; } +static bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + uint8_t v8r_el1_msa = config->arch.v8r_el1_msa; + + if ( !IS_ENABLED(CONFIG_MPU) ) + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + + if ( IS_ENABLED(CONFIG_ARM_32) ) + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + + if ( IS_ENABLED(CONFIG_ARM_64) ) + return (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA) || + (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA); + + return false; +} + int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { unsigned int max_vcpus; @@ -554,6 +573,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + /* Check config structure padding */ + if ( config->arch.pad ) + { + dprintk(XENLOG_INFO, + "Invalid domain configuration during domain creation\n"); + return -EINVAL; + } + /* Check feature flags */ if ( sve_vl_bits > 0 ) { @@ -630,6 +657,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( !v8r_el1_msa_domain_sanitise_config(config) ) + { + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); + return -EINVAL; + } + return sci_domain_sanitise_config(config); } @@ -722,6 +755,10 @@ int arch_domain_create(struct domain *d, d->arch.sve_vl = config->arch.sve_vl; #endif +#ifdef CONFIG_MPU + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..ac7300e41fcd 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -112,6 +112,10 @@ struct arch_domain #endif struct resume_info resume_ctx; + +#ifdef CONFIG_MPU + uint8_t v8r_el1_msa; +#endif } __cacheline_aligned; struct arch_vcpu diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 6674dac5e2f8..13e88fc0891b 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,16 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#ifdef CONFIG_MPU +/* Utility function to determine if an Armv8-R processor supports VMSA. */ +bool has_v8r_vmsa_support(void); +#else +static inline bool has_v8r_vmsa_support(void) +{ + return false; +} +#endif /* CONFIG_MPU */ + #endif /* diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c index a4673c351141..702bea804acd 100644 --- a/xen/arch/arm/mpu/arm32/mm.c +++ b/xen/arch/arm/mpu/arm32/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ case num: \ @@ -38,6 +40,11 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return false; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c index ed643cad4073..b8abcc6f7bc6 100644 --- a/xen/arch/arm/mpu/arm64/mm.c +++ b/xen/arch/arm/mpu/arm64/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include /* * The following are needed for the cases: GENERATE_WRITE_PR_REG_CASE @@ -32,6 +34,11 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf70684..7d6f87e8b2b1 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 + struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; @@ -355,6 +359,9 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t v8r_el1_msa; + uint16_t pad; }; #endif /* __XEN__ || __XEN_TOOLS__ */ diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..23124547f347 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -30,9 +30,9 @@ * fields) don't require a change of the version. * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! * - * Last version bump: Xen 4.19 + * Last version bump: Xen 4.22 */ -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 /* * NB. xen_domctl.domain is an IN/OUT parameter for this operation. -- 2.34.1