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Fri, 01 May 2026 00:23:10 -0700 (PDT) MIME-Version: 1.0 References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> In-Reply-To: <59548223-99d7-4a11-ac81-39eee6474562@amd.com> From: Mykola Kvach Date: Fri, 1 May 2026 10:22:59 +0300 X-Gm-Features: AVHnY4Jg7wsotp_WVEbJIS2b0dMXEBHMbNKBBcE6O3vHIq4294XeOfKYTvjEgUQ Message-ID: Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777620192-F5403CF5-77CD04DB/0/0 X-purgate-type: clean X-purgate-size: 7812 Hi Michal, On Wed, Apr 29, 2026 at 11:20=E2=80=AFAM Orzel, Michal wrote: > > > > On 28-Apr-26 13:57, Mykola Kvach wrote: > > From: Mykola Kvach > > > > The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. > > > > Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable > > bits selects bypass rather than deasserted interrupt outputs when the > > CPU interface stops driving them. Tables 2-2 and 2-3 show that a zeroed > > GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully > > disabling the interface. > > > > Fix this by reading GICC_CTLR, then setting the bypass-disable bits and > > clearing the group-enable bits that are architecturally defined for the > > current GICC_CTLR view before writing the value back. When Security > > Extensions are implemented Xen accesses the Non-secure copy of > > GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] and > > bits [8:7] are reserved. > > > > Without Security Extensions there is no separate Secure/Non-secure CPU > > interface view, so disabling both group-enable bits affects the shared > > interface state. This is still appropriate for the CPU shutdown path, > > which is expected to stop normal interrupt delivery through the interfa= ce > > and rely only on the architecturally separate wakeup event signaling. > > > > Section 2.3.2 also states that wakeup event signals remain available > > even when both GIC interrupt signaling and interrupt bypass are > > disabled, so disabling bypass does not break the power-management use > > case, i.e. suspend modes. > > > > Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") > > Signed-off-by: Mykola Kvach > > > > --- > > Changes in v2: > > - derive the shutdown masks from the active GICC_CTLR layout > > - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is s= et > > - stop writing reserved bits [8:7] on Security Extensions systems > > --- > > xen/arch/arm/gic-v2.c | 16 +++++++++++++++- > > xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- > > 2 files changed, 38 insertions(+), 3 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > > index 014f955967..241c1ff5c5 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) > > > > static void gicv2_cpu_disable(void) > > { > > - writel_gicc(0x0, GICC_CTLR); > > + uint32_t ctlr =3D readl_gicc(GICC_CTLR); > > + > > + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) > > + { > > + ctlr |=3D GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; > > + ctlr &=3D ~GICC_CTL_ENABLE; > > + } > > + else > > + { > > + ctlr |=3D GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | > > + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; > > + ctlr &=3D ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); > > + } > I don't understand why you want to set both G0 and G1, > Bits 5-6 in the NS view control Group 1, while the same bits in the > Secure/single-security-state view control Group 0. So in the latter case = you > don't need to set G1. Without security extensions all interrupts are G0 a= nd with > security extensions (NS access) all interrupts are G1. The spec guarantee= s the > functional mapping. I agree that this is not about Xen using both interrupt groups during normal operation. There are two separate points here. For the group-enable bits, Xen currently only enables bit 0 in gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be clear already. However, the old shutdown path wrote 0 to GICC_CTLR, which also cleared every group-enable bit visible in the current view. Since this patch changes the shutdown path from a plain zero write to a read/modify/write, I wanted to preserve that part of the old shutdown semantics and avoid leaving any normal interrupt delivery enabled in the common GICC_CTLR view. For the bypass-disable bits, the reason for setting both groups in the single-security-state/common view is the GICv2 bypass logic, not normal interrupt delivery. Once the group-enable bits are clear, the CPU interface is no longer driving the physical IRQ/FIQ outputs through normal GIC delivery. At that point, the bypass-disable bits decide whether those outputs are deasserted or driven by the legacy inputs. For example, with EnableGrp1 =3D=3D 0, EnableGrp0 =3D=3D 0 and FIQEn =3D=3D= 0, Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is why the common-view case disables the bypass paths for both groups. This is also not meant to make FIQ a supported delivery mode for Xen. It is the opposite: when the CPU interface is disabled, the final state should not allow the physical FIQ output to be driven by the legacy bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but Xen does not configure FIQ as its normal GICv2 interrupt delivery mode. So the intent is: * with Security Extensions, touch only the Non-secure view bits visible to Xen; * without Security Extensions, preserve the old "no normal delivery" shutdown behaviour, while changing the bypass-disable bits so that the physical outputs are deasserted rather than falling back to legacy bypass. If you prefer, I can also make v3 more conservative and only clear the group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The bypass-disable bits would still be set for all bypass paths visible in the current GICC_CTLR view, because that part is about the physical IRQ/FIQ outputs after normal delivery has been disabled, not about which interrupt group Xen normally uses. Thanks, Mykola > > ~Michal > > > > + > > + writel_gicc(ctlr, GICC_CTLR); > > } > > > > static void gicv2_hyp_init(void) > > diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/= gic.h > > index 8e713aa477..ff22dea40d 100644 > > --- a/xen/arch/arm/include/asm/gic.h > > +++ b/xen/arch/arm/include/asm/gic.h > > @@ -102,8 +102,29 @@ > > #define GICD_TYPE_SEC 0x400 > > #define GICD_TYPER_DVIS (1U << 18) > > > > -#define GICC_CTL_ENABLE 0x1 > > -#define GICC_CTL_EOI (0x1 << 9) > > +/* > > + * Xen runs in the Non-secure world. When Security Extensions are pres= ent, > > + * Xen accesses the Non-secure GICC_CTLR view, where bit[0] is EnableG= rp1 > > + * and bits[6:5] are the Group 1 bypass-disable bits. Otherwise Xen se= es the > > + * common GICC_CTLR layout, where bit[0] is EnableGrp0, bit[1] is Enab= leGrp1, > > + * bits[6:5] are the Group 0 bypass-disable bits, and bits[8:7] are th= e > > + * Group 1 bypass-disable bits. > > + */ > > +#define GICC_CTL_ENABLE (0x1 << 0) > > +#define GICC_CTL_ENABLE_GRP1 (0x1 << 1) > > +#define GICC_CTL_FIQBypDisGrp0 (0x1 << 5) > > +#define GICC_CTL_IRQBypDisGrp0 (0x1 << 6) > > +#define GICC_CTL_FIQBypDisGrp1 (0x1 << 7) > > +#define GICC_CTL_IRQBypDisGrp1 (0x1 << 8) > > + > > +#define GICC_CTLR_BYPASS_DISABLE_GRP0_MASK \ > > + (GICC_CTL_FIQBypDisGrp0 | GICC_CTL_IRQBypDisGrp0) > > +#define GICC_CTLR_BYPASS_DISABLE_GRP1_MASK \ > > + (GICC_CTL_FIQBypDisGrp1 | GICC_CTL_IRQBypDisGrp1) > > +#define GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK \ > > + GICC_CTLR_BYPASS_DISABLE_GRP0_MASK > > + > > +#define GICC_CTL_EOI (0x1 << 9) > > > > #define GICC_IA_IRQ 0x03ff > > #define GICC_IA_CPU_MASK 0x1c00 > From xen-devel-bounces@lists.xenproject.org Fri May 01 08:40:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 08:40:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298579.1573759 (Exim 4.92) (envelope-from ) id 1wIjQC-0004pS-Q8; Fri, 01 May 2026 08:40:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298579.1573759; Fri, 01 May 2026 08:40:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIjQC-0004pL-Mw; Fri, 01 May 2026 08:40:28 +0000 Received: by outflank-mailman (input) for mailman id 1298579; Fri, 01 May 2026 08:40:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIjQB-0004pD-6a for xen-devel@lists.xenproject.org; Fri, 01 May 2026 08:40:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIjQA-00BT7p-Hd for xen-devel@lists.xenproject.org; Fri, 01 May 2026 10:40:26 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f466f2-2eae-0a2a0a5409dd-0a2a4501e39c-6 for ; Fri, 01 May 2026 10:40:26 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f466fa-c1f2-0a2a45010019-d155dd2bd4ee-3 for ; Fri, 01 May 2026 10:40:26 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso687483f8f.0 for ; Fri, 01 May 2026 01:40:26 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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No functional change. Reported-by: Luca Fancellu Fixes: bd0b3a876d80 ("pdx: allow per-arch optimization of PDX conversion helpers") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie CC: Luca Fancellu --- xen/arch/x86/include/asm/pdx.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/include/asm/pdx.h b/xen/arch/x86/include/asm/pdx.h index 6be7e1185eb1..6c10234ecfa9 100644 --- a/xen/arch/x86/include/asm/pdx.h +++ b/xen/arch/x86/include/asm/pdx.h @@ -57,7 +57,7 @@ static inline paddr_t directmapoff_to_maddr(unsigned long offset) return offset; } -#undef PDX_ASM_GOTO_SKIP +#undef PDX_ASM_GOTO #endif /* X86_PDX_H */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 08:44:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 08:44:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298588.1573768 (Exim 4.92) (envelope-from ) id 1wIjTb-0005Mu-AD; Fri, 01 May 2026 08:43:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298588.1573768; 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>> } >> >> -#undef PDX_ASM_GOTO_SKIP >> +#undef PDX_ASM_GOTO >> >> #endif /* X86_PDX_H */ >> >> -- >> 2.39.5 >> > Reviewed-by: Luca Fancellu Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 01 09:43:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 09:43:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298623.1573785 (Exim 4.92) (envelope-from ) id 1wIkOg-0005ul-Lj; Fri, 01 May 2026 09:42:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298623.1573785; Fri, 01 May 2026 09:42:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIkOg-0005ue-J8; Fri, 01 May 2026 09:42:58 +0000 Received: by outflank-mailman (input) for mailman id 1298623; Fri, 01 May 2026 09:42:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIkOf-0005uY-J9 for xen-devel@lists.xenproject.org; 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Smith" Subject: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() Thread-Topic: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() Thread-Index: AQHc2XU4ZcEAsUoy1EuhfVMBY8DBFw== Date: Fri, 1 May 2026 14:17:19 +0000 Message-ID: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Accept-Language: en-US, uk-UA, ru-RU Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: PAXPR03MB7531:EE_|DU0PR03MB9126:EE_ x-ms-office365-filtering-correlation-id: c57c9c8c-345b-4109-c13d-08dea78c5b4d x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|376014|366016|1800799024|42112799006|38070700021|18002099003|56012099003; x-microsoft-antispam-message-info: pkdQAbRYZyvQBloAaA5o0gRNQTEPg4eozlmOVb4aSuNzD/+/uLDfYoqoIv0vKQCJ1hAGJOAnoGpQTKX6AkrSbRPSWYoktbJEXbhFoY7VnYGMJKZ93sP8CjWr0xDTbeQ1CmpcDprEzSpyvb94XhN1XLBUrnuWKovxCc+b8eSv/64A1PhYz094LoUX8luAcGPitGKGmZJULrhoEyDcDUzNDhfJSNmtm/gCE3J9SA67fjvUzyIVWQ102MCs51tw4jss9z1uSZqSiXbshq9rN03ApxC2/+oln7YuFXG6dubwxoqWx+d1DcsY4xRZavyZ5kp4nLm27iNcSuPVPk9XgnB9i7SjmP5eQGDv77DlS5wemUaEsqdHfUxgJaDqOesO1BAZWv68RZuPzA/pFouXqQ2yvOvFEIcmj3W32AJYOBokSS+Gkt1/JWEmwlBUyd/8YkLt6NlsbC0wOLGj0JvXaYon56eqDz33n85etHSs9f71BTZxFeTMdS7/auQNoL7aStWewmmSBbBEe0+UKbSd3JE0+x/HhJa7VxljgaJ9oam1OXDxc0nJ+r3R6xxajGKP2F4kDcaPoYQjhrcltMk0yCN9N9sJMvzkDV8cFQlHG4JaWlyXDX6uy2WIl6TBGvS2f1EIA/bOZktdTEkDUXvCkxGdZPmwgmDwyo9/3BPfYaGkH+qzRBdT+xdi/HcI/1+IlCtzI3cb4HCRAJc5QKFj+PTtzp+G4uueKIGw81Fg7GSeV42CdwPuMgmPaiHUtyh0EG/r x-forefront-antispam-report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:PAXPR03MB7531.eurprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(42112799006)(38070700021)(18002099003)(56012099003);DIR:OUT;SFP:1102; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAXPR03MB7531.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c57c9c8c-345b-4109-c13d-08dea78c5b4d X-MS-Exchange-CrossTenant-originalarrivaltime: 01 May 2026 14:17:20.2157 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 76zOn3VIGr115XF5xSu33mBdTalXwEsgU4QVZfUS2ROiMXzhB64Nxs8v+txsQLCVRYjeLRKu+tc/M82jw+hPy0zqKBlx5K3FiRmhr6cng9Q= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR03MB9126 X-purgate-ID: tlsNG-c201ff/1777645042-2BD67443-91B88523/0/0 X-purgate-type: clean X-purgate-size: 2127 When booting Xen with CONFIG_USBAN=3Dy and CONFIG_XSM_FLASK=3Dy, UBSAN reports undefined behaviour in avc_dump_av() due to a left shift on a signed int: (XEN) [ 1.104348] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represe= nted in type 'int' (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=3Dy ubsan=3Dy Not tain= ted ]---- (XEN) [ 1.108848] CPU: 0 (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0= xd4 [...] (XEN) [ 1.146320] Xen call trace: (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0x= d4 (PC) (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bo= unds+0x1a0/0x290 (LR) (XEN) [ 1.147868] (XEN) [ 1.148177] =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D This can be solved by making 'perm' an unsigned 32-bit type (u32). Signed-off-by: Dmytro Prokopchuk --- Test CI pipeline: https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 --- xen/xsm/flask/avc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c index 3d39e55cae..9c3ffdc070 100644 --- a/xen/xsm/flask/avc.c +++ b/xen/xsm/flask/avc.c @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) */ static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) { - int i, i2, perm; + int i, i2; + u32 perm; =20 if ( av =3D=3D 0 ) { --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 01 14:27:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 14:27:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298734.1573815 (Exim 4.92) (envelope-from ) id 1wIoq8-0008KR-37; Fri, 01 May 2026 14:27:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298734.1573815; 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Smith" Subject: Re: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" References: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR03MB6346 X-purgate-ID: tlsNG-ebf023/1777645653-316483FF-15C3A693/0/0 X-purgate-type: clean X-purgate-size: 2058 On 01/05/2026 3:17 pm, Dmytro Prokopchuk1 wrote: > When booting Xen with CONFIG_USBAN=y and CONFIG_XSM_FLASK=y, > UBSAN reports undefined behaviour in avc_dump_av() due to a left > shift on a signed int: > > (XEN) [ 1.104348] ================================================================================ > (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 > (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represented in type 'int' > (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 > (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 1.108848] CPU: 0 > (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0xd4 > [...] > (XEN) [ 1.146320] Xen call trace: > (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0xd4 (PC) > (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bounds+0x1a0/0x290 (LR) > (XEN) [ 1.147868] > (XEN) [ 1.148177] ================================================================================ > > This can be solved by making 'perm' an unsigned 32-bit type (u32). > > Signed-off-by: Dmytro Prokopchuk > --- > Test CI pipeline: > https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 > --- > xen/xsm/flask/avc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c > index 3d39e55cae..9c3ffdc070 100644 > --- a/xen/xsm/flask/avc.c > +++ b/xen/xsm/flask/avc.c > @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) > */ > static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) > { > - int i, i2, perm; > + int i, i2; > + u32 perm; > > if ( av == 0 ) > { The fix is fine, but wants to be uint32_t.  (The existing code is already inconsistent, and wants fixing up towards Xen's preferred style.) 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A1E0C419CE; Fri, 1 May 2026 17:08:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 20073C2BCB4; Fri, 1 May 2026 17:08:15 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777655295; bh=XcC+ppb7QWoUQwvJACnJzBK0iM4QcyPixryI8dPC6M0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=iZQqXWfkJ7G/uX0MQD43Cy2mng+g7WQ6MeFXlQkzUb5bXXAxv4lYU5yunWFJMq7YB 8dIcGhNMyig1jlYOtsC0cID+ztrgyj+efmnVQMIlqA8xGCc7fKvByNSQIKnohxPhqp mpQNijy4yT0DGYH4aljQE/W5PuLtsEvLkD4Jy2M+JzOQXKEJsv4kPwkdoEIhrzCRKE lJL04CGQcmLHjM3og8wgP4RTlxs3jeKfoIPe93LijZg3KH3c541wrX8Ud4Q7rJs3BT qPEebeq541mcid6qhU5DLITB8VnVJn1afS9H3M6Av0f3mgXUzOHA542m+AYk8PPz2X L4/7D6CYej7/A== Date: Fri, 1 May 2026 10:08:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx In-Reply-To: <9CEA7814-0ED6-401A-A5E9-2361278D9859@arm.com> Message-ID: References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <9CEA7814-0ED6-401A-A5E9-2361278D9859@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1693967578-1777655295=:512397" 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The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1693967578-1777655295=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Luca Fancellu wrote: > The changes looks good to me, for the Arm and common part: > > Reviewed-by: Luca Fancellu # arm, common > > I’ve also tested on Arm64, Arm32, x86_64 with virtual platforms. Acked-by: Stefano Stabellini --8323329-1693967578-1777655295=:512397-- From xen-devel-bounces@lists.xenproject.org Fri May 01 17:08:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 17:08:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298812.1573843 (Exim 4.92) (envelope-from ) id 1wIrM1-00068a-Hj; Fri, 01 May 2026 17:08:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298812.1573843; Fri, 01 May 2026 17:08:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIrM1-00068T-Eg; Fri, 01 May 2026 17:08:41 +0000 Received: by outflank-mailman (input) for mailman id 1298812; Fri, 01 May 2026 17:08:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIrLz-00065N-Ni for xen-devel@lists.xenproject.org; Fri, 01 May 2026 17:08:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIrLx-009ywS-IG for xen-devel@lists.xenproject.org; Fri, 01 May 2026 19:08:39 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f4ddd7-2eae-0a2a0a5409dd-0a2a450c8d3e-34 for ; Fri, 01 May 2026 19:08:39 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f4de16-62f1-0a2a450c0019-ac6904feb828-3 for ; Fri, 01 May 2026 19:08:38 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 451E36011F; Fri, 1 May 2026 17:08:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BA466C2BCB4; Fri, 1 May 2026 17:08:36 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777655317; bh=ZKvnwmGodYs6HnVjN+oPgadh7nyz/qEnXV9PluO6LT8=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=GgjuUTd8WAeB5/wQ/e4MQnFtEMFztzkxlg6PyS9qCh7wZXAB541Lo05jdMLhczG67 99Yp6I7awijWAdA5KD6XR/7ew6uBmMSHm1Q1SeDYGX5+10zrE2bG8o2e9Xschlk7jv blVpN5KS4WG6CQTZGuVxXUfehnlEouvMzqryTl08Lfym8FrPodc7gJAR3zGnpDSj9L Jb9cPatUY2YVfkhbL/xHNCjACXjjwLvGaFrDZsiPzNoHBUnRr0eBdzEfzJID8aSYA+ aOA3s8xhGFpd9LAcqN2n+Gc+k3GLH24laCntiGRM4sU0r7q5drO997qvmvaYTerI0c 7YB5YFkZyfyzA== Date: Fri, 1 May 2026 10:08:36 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: Re: [PATCH v2 2/2] xen/arm: skip holes in physical address space when setting up frametable In-Reply-To: <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> Message-ID: References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-3-michal.orzel@amd.com> <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-1916185994-1777655317=:512397" X-purgate-ID: tlsNG-d25034/1777655319-F7811CF5-F83D828C/0/0 X-purgate-type: clean X-purgate-size: 985 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-1916185994-1777655317=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Luca Fancellu wrote: > This fixed 32Mb alignment feels a bit more than we need, If for example the > chunk is less than 32Mb? If we had some variable alignment for chunks less > than 32MB we would maybe help alloc_boot_pages job, in the end if the chunk > is less than 32Mb it won’t get the contiguous bit anyway. > > But I’m fine also if you leave it as it is. > > With the above fixed: > > Reviewed-by: Luca Fancellu > Tested-by: Luca Fancellu > > I’ve also tested on Arm64 MMU, Arm32 MMU, Arm64 MPU virtual platforms. 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The bug is years old, making it an incredibly rare occurance: (XEN) *** DOUBLE FAULT *** (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 (XEN) No stack overflow detected. Skipping stack trace. (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) DOUBLE FAULT -- system shutdown (XEN) **************************************** This is on the instruction boundary after enabling CET (writing MSR_S_CET) and prior to establishing SSP. Despite identifying this as a critical window where any fault was deadly (the CPU tries to push a shadow stack frame at 0, hence the CR2 value wrapping around to the top of the address space), I clearly forgot that this meant interrupts too, which are enabled. Along with regular interrupts, NMIs are a problem. Unlike other cases needing NMI safety, we can't use a self NMI and callback, as the stack needs to be empty at the point of enabling Shadow Stacks. Disable interrupts, and turn off the watchdog if it's configured. Note that watchdog_{en,dis}able() do not work here. They cause the watchdog NMI to be ignored; they do not inhibit the generation of NMIs. Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie The only way I can think of doing this in NMI context is to have the NMI LRET off the NMI stack back to the interrupted context. But this is horrible to arrange, not to mention different between IDT and FRED. Also, the {disable,setup}_lapic_nmi_watchdog() API is horrible but I don't have time to make it sane right now, and this needs backporting a long way. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2494069238 --- xen/arch/x86/setup.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d041cbd5f6f1..95ac36beab37 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { + bool watchdog = (nmi_watchdog == NMI_LOCAL_APIC); + + /* + * Between enabling CET and establishing SSP, any fault or interrupt + * is fatal. We must arrange for none to happen. + * + * TODO: Figure out how to perform CET enablement in NMI context, + * given the constraint that the stack must be empty. + */ + if ( watchdog ) + disable_lapic_nmi_watchdog(); + local_irq_disable(); + wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); /* @@ -932,6 +945,13 @@ static void __init noreturn reinit_bsp_stack(void) } else asm volatile ( "setssbsy" ::: "memory" ); + + local_irq_enable(); + if ( watchdog ) + { + nmi_watchdog = NMI_LOCAL_APIC; + setup_apic_nmi_watchdog(); + } } reset_stack_and_jump(init_done); base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 21:38:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 21:38:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298928.1573861 (Exim 4.92) (envelope-from ) id 1wIvZ8-00083j-QX; Fri, 01 May 2026 21:38:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298928.1573861; Fri, 01 May 2026 21:38:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvZ8-00083c-Mk; Fri, 01 May 2026 21:38:30 +0000 Received: by outflank-mailman (input) for mailman id 1298928; Fri, 01 May 2026 21:38:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvZ7-00083W-Gr for xen-devel@lists.xenproject.org; Fri, 01 May 2026 21:38:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIvZ5-00AT3D-AC for xen-devel@lists.xenproject.org; Fri, 01 May 2026 23:38:28 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f51d33-2eae-0a2a0a5409dd-0a2a4502dc1a-16 for ; Fri, 01 May 2026 23:38:28 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f51d54-af86-0a2a45020019-d1558035d46c-3 for ; Fri, 01 May 2026 23:38:28 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4852a9c6309so18648615e9.0 for ; Fri, 01 May 2026 14:38:28 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a822c3422sm137436495e9.8.2026.05.01.14.38.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 01 May 2026 14:38:27 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1777671508; x=1778276308; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=CcrVhPKL924+HX0LUqaF9tbfBrxLJHzpVSLiSNTCUME=; b=WeUPjyZg3muJqydiM/zUlYgvCYOGDx8H9Zr0v0SNUp9MnDX6ZpHwdbHS97ZRVmajTp 9gnugnBr4bJvdW4Um5zCXt0GPtUBsgJfICF0LcxEOQZFMeU1zJL389zGpQ9jwriuyMpR /u4rAJXLE+weFViyY8aJDBadgctruA98QuAJc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777671508; x=1778276308; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=CcrVhPKL924+HX0LUqaF9tbfBrxLJHzpVSLiSNTCUME=; b=aHftFpdk02x0dFGrAWJfNIfdWe8w7JpFX0FX/j8JfXc2fK5zuYZ3WcBgvNrFd0W/Nu FS1UVCGKc4xzBQTWlml+t7KPLtkjSxvqas7Mp1NyeNh6cJWQzkGWnmy6+yJpxMQUhrza vvk8+8f2vmQ73kzpEhUG6lz2dq6u2nrDXTql8xDrUI+MqgNCA/0CjB/KSDBQhaPA5Gl6 BCXUuOB4bPaYFPIEEoFuHu3WdVHIKl73XdBTbvJFCy7+nQjV7lMCnXu/O89q/DPN8JGw xNTKw4pVC9m9cEHBlAmFl26gVlU54fwxlelFHUsqPk0hHjEWlixp5UtLV+My+2UZzsyK YagQ== X-Gm-Message-State: AOJu0YzkHPB1JcG+4bSryRC40/ztzZmj7iglHMBMrMoSB6aEVedX9BaV rHB9j972MHAevAH8JckpCEZXGoycSdfTWqG+wq3UonlfrHPze5urHUyII6DXDHkxck2gPi9N9Bj 2g4RD/yA= X-Gm-Gg: AeBDietmFabkXjZbNLT+8o+fpewcR/H3dM+2mEQLPuvhJQZ/F0bpNp+pCgb8iLBnFPu yieluak7f0LeDo0hNqeszqi8ICEkQl6wdN5R/vTi3bZPIxYKvgHnVnYSPKvaC/aQbOIXdCjqKE8 rq5c9HVymol8/AEvW3RNQATi4Ir+xTPjjoWRmj2s79XAWb85G68eV5hwt44mlyKqXDK0+tk6Y0e Qd4G/9lre+SOAkvw0hvXCPC5WqociGENBn00/IukohFifNoR77iPwSakYBBxTOnaFZPHm1bgGmk U3fVNq22y9Xs3o3Hf7vBZQGwIx2zNu46NyWO8tSUDn8Xe/C/uoxzc9JYi1UegF4Ne3/21CAP/42 /++5SGW8QIscr/G5hMBFPbSmsqXHen5h292r3NfcgJc6egaQSJPijjX/nL3OlXRiKlqJFmR94l+ 86djlRvdws6MwZpYuiH1UF5AaH3Jlla9plr+UCXP5Ur6pBSl4iz6qYXKnhM6I2nL5pbknO1QnRE xcU2HfZY2cV2UQ= X-Received: by 2002:a05:600c:a118:b0:489:ecee:c4ef with SMTP id 5b1f17b1804b1-48a9865daacmr7747625e9.13.1777671507797; Fri, 01 May 2026 14:38:27 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Stefano Stabellini , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH] x86/svm: Always sync guest CR2 on VMExit Date: Fri, 1 May 2026 22:38:26 +0100 Message-Id: <20260501213826.1291860-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777671508-894CD161-47778207/0/0 X-purgate-type: clean X-purgate-size: 1761 Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] and one is in the VMCB. Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware loads and saves the guest CR2 across VMRUN/VMExit. For HAP guests (where #PF is not intercepted, and therefore we don't typically inject #PF either), this causes the guest CR2 value to be lost on migrate. As migration is cooperative and not done from the #PF handler, this also goes unoticed by guests. It also means that an emulated MOV-from-CR2 reads a stale value. Reported-by: Stefano Stabellini Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie CC: Stefano Stabellini It also also works around the QEMU bug that triggered the investigion, where the CR2 intercepts trigger despite Xen requesting CR2 not to be intercepted. --- xen/arch/x86/hvm/svm/svm.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index ced616684732..f49d2ebbfdd5 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) hvm_sanitize_regs_fields( regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs.l)); + v->arch.hvm.guest_cr[2] = vmcb_get_cr2(vmcb); if ( paging_mode_hap(v->domain) ) v->arch.hvm.guest_cr[3] = v->arch.hvm.hw_cr[3] = vmcb_get_cr3(vmcb); base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 01 21:44:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 21:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298936.1573870 (Exim 4.92) (envelope-from ) id 1wIvem-0001AD-Cz; Fri, 01 May 2026 21:44:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298936.1573870; Fri, 01 May 2026 21:44:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvem-0001A6-A6; Fri, 01 May 2026 21:44:20 +0000 Received: by outflank-mailman (input) for mailman id 1298936; Fri, 01 May 2026 21:44:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIvek-00019z-Mt for xen-devel@lists.xenproject.org; Fri, 01 May 2026 21:44:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wIvej-00GKNo-GX for xen-devel@lists.xenproject.org; Fri, 01 May 2026 23:44:17 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f51ea0-bab6-0a2a0a5309dd-0a2a45068022-6 for ; Fri, 01 May 2026 23:44:16 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f51eb0-7371-0a2a45060019-ac6904fea5dc-3 for ; Fri, 01 May 2026 23:44:16 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 57B2C6011F; Fri, 1 May 2026 21:44:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D1944C2BCB4; Fri, 1 May 2026 21:44:14 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1777671855; bh=A+LTyI3f9+3qLvGzTxEcV/j8RwMj7X0W1mRk/y3DSSc=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=fBAC/kDmJh5cjHCnsCdoCU7jq1jyYKJk94Ya6jhstFoSN7iM9KcovMMXggX3czxM6 CznZbEPh/vCEJprzEVtQBziK/xNEX2ltxGNCW3XRxkAFa5q0eZu0+h44eL4GVF1s92 aBTI11hfdWfe+AT8vw6dV4GFvN5b0hsducdeQ1hp8khD4XJRgWiPLVYFNIBwvzLyTk X5RYf7KPtm4+qoG0zCVD0mPgxAl7Q3D5eoqYl2Q/yj2XUlhH7nKSy4jfGSVdWZDyvD zuafWS0YTLO+8/H9K0e/uD/f+3Pw5R/0GfhKUvCUrtmBgHpJYdCWAXC8+7miugC5AH Wqjb2IV+hVSfA== Date: Fri, 1 May 2026 14:44:14 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Andrew Cooper cc: Xen-devel , Stefano Stabellini , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit In-Reply-To: <20260501213826.1291860-1-andrew.cooper3@citrix.com> Message-ID: References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-528818502-1777671855=:512397" X-purgate-ID: tlsNG-16d1c6/1777671856-52974D75-F130C741/0/0 X-purgate-type: clean X-purgate-size: 2268 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-528818502-1777671855=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 1 May 2026, Andrew Cooper wrote: > Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] > and one is in the VMCB. > > Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware > loads and saves the guest CR2 across VMRUN/VMExit. > > For HAP guests (where #PF is not intercepted, and therefore we don't typically > inject #PF either), this causes the guest CR2 value to be lost on migrate. As > migration is cooperative and not done from the #PF handler, this also goes > unoticed by guests. > > It also means that an emulated MOV-from-CR2 reads a stale value. > > Reported-by: Stefano Stabellini > Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") > Signed-off-by: Andrew Cooper Tested-by: Stefano Stabellini > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > CC: Stefano Stabellini > > It also also works around the QEMU bug that triggered the investigion, where > the CR2 intercepts trigger despite Xen requesting CR2 not to be intercepted. > --- > xen/arch/x86/hvm/svm/svm.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index ced616684732..f49d2ebbfdd5 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) > hvm_sanitize_regs_fields( > regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs.l)); > > + v->arch.hvm.guest_cr[2] = vmcb_get_cr2(vmcb); > if ( paging_mode_hap(v->domain) ) > v->arch.hvm.guest_cr[3] = v->arch.hvm.hw_cr[3] = vmcb_get_cr3(vmcb); > > > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e > -- > 2.39.5 > --8323329-528818502-1777671855=:512397-- From xen-devel-bounces@lists.xenproject.org Fri May 01 22:22:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 01 May 2026 22:22:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1298955.1573879 (Exim 4.92) (envelope-from ) id 1wIwF8-0006lC-82; Fri, 01 May 2026 22:21:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1298955.1573879; Fri, 01 May 2026 22:21:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wIwF8-0006l5-5Q; Fri, 01 May 2026 22:21:54 +0000 Received: by outflank-mailman (input) for mailman id 1298955; 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b=icN8GEwyLXhIcaX0GoHxCbyMoVfuroy3QlzV11INr0xGrwnzvvgP2Ej52xU1trR+cG4QiB2fRh695cNSRcM2z9SrKDj0wfcVZe0lK2awKmuXQQNDCdI8K2dRSvRJR6nXatkI5Dadp4FZDg/YfJ6FOt9VwDuUxG4aFb7Usl/PbNM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Date: Fri, 1 May 2026 23:21:44 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Xen-devel , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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One is v->arch.hvm.guest_cr[2] >> and one is in the VMCB. >> >> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >> loads and saves the guest CR2 across VMRUN/VMExit. >> >> For HAP guests (where #PF is not intercepted, and therefore we don't typically >> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >> migration is cooperative and not done from the #PF handler, this also goes >> unoticed by guests. >> >> It also means that an emulated MOV-from-CR2 reads a stale value. >> >> Reported-by: Stefano Stabellini >> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >> Signed-off-by: Andrew Cooper > Tested-by: Stefano Stabellini Thanks, sadly I made the mistake of extending my XTF PoC for this. There are also bugs on the emulated MOV-to-CR2 side, and they're far harder to untangle. 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>> >> + if ( (rc = domain_viommu_init(d, config->arch.viommu_type)) != 0 ) >> + goto fail; >> + > > Here if this fails, we call arch_domain_destroy(), however in that function we don’t call > viommu_relinquish_resources() > Yes, this is missing. I will add it in the updated version. > Cheers, > Luca > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 10:44:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 10:44:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299316.1573919 (Exim 4.92) (envelope-from ) id 1wJUJO-00057C-8s; Sun, 03 May 2026 10:44:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299316.1573919; Sun, 03 May 2026 10:44:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJUJO-000575-4a; Sun, 03 May 2026 10:44:34 +0000 Received: by outflank-mailman (input) for mailman id 1299316; Sun, 03 May 2026 10:44:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJUJM-00056j-6N for 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b=o1V3skWkrJkqBX9SMr9W+o4Lm+wC2wLbqDvg4wlxxkLWBHTx2s6DD0wjilJDZN4gK8F7DkCwysdT2ra6XYkHyx8RqXndp9xPJMwF1e2UiwMKUd6p0yIdYx4BlDSWxaBHXltNNIH9Ude+mvF36mnP6b4+igky3UcWkIEdy97zQbOMRVs02F7V2Mv7RIft9i7KQLoGs0gLGWxZg6gWo8vN7Oag2+1PGO8Pwh0XEEbXqPtH6pLBNtekePI8vfUOlhakqgXm+Avo5pVi+ixjUDb0muC55ol/I3EUnWJ/hsKHYloSkzrN0rPZDNnM6Ifc2eG3lQ+vT/ZzVXmynMKBkl49Pw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; Message-ID: <723292e9-5e2c-4899-ab91-80fc992e4597@epam.com> Date: Sun, 3 May 2026 12:44:28 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 04/23] xen/arm: vIOMMU: add generic vIOMMU framework To: Julien Grall , "xen-devel@lists.xenproject.org" Cc: Rahul Singh , Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <8cb4ca97-e605-4416-b532-a8df4816a0ee@xen.org> Content-Language: en-US From: Milan Djokic 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=?utf-8?B?ZGw3UGJ0YW90SGFBNHQrS2pORCtuSzhtUHoxeW5OQ3AzY0FzeG1aQT09?= X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6d4c0a53-257f-4837-4e3c-08dea900f40f X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB9587.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 May 2026 10:44:29.3760 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vO6ovfMCc3B/9OHulBpC+lck9suCoeJcllU8MAq2o2FTmdvmNUfIo7rmqyHevIbr2U6Eym+kXtn3jUT+BZddhQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR03MB9797 X-purgate-ID: tlsNG-c1860d/1777805071-C3370DB1-D35D668D/0/0 X-purgate-type: clean X-purgate-size: 12167 Hi Julien, On 4/14/26 08:15, Julien Grall wrote: > Hi Milan, > > On 31/03/2026 10:52, Milan Djokic wrote: >> From: Rahul Singh >> >> This patch adds basic framework for vIOMMU. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> xen/arch/arm/dom0less-build.c | 2 + >> xen/arch/arm/domain.c | 33 +++++++++++++ >> xen/arch/arm/domain_build.c | 2 + >> xen/arch/arm/include/asm/viommu.h | 70 ++++++++++++++++++++++++++++ >> xen/drivers/passthrough/Kconfig | 5 ++ >> xen/drivers/passthrough/arm/Makefile | 1 + >> xen/drivers/passthrough/arm/viommu.c | 48 +++++++++++++++++++ >> xen/include/public/arch-arm.h | 5 ++ >> xen/include/public/domctl.h | 4 +- >> 9 files changed, 168 insertions(+), 2 deletions(-) >> create mode 100644 xen/arch/arm/include/asm/viommu.h >> create mode 100644 xen/drivers/passthrough/arm/viommu.c >> >> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c >> index 4181c10538..067835e5d0 100644 >> --- a/xen/arch/arm/dom0less-build.c >> +++ b/xen/arch/arm/dom0less-build.c >> @@ -23,6 +23,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> >> @@ -317,6 +318,7 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, >> uint32_t val; >> >> d_cfg->arch.gic_version = XEN_DOMCTL_CONFIG_GIC_NATIVE; >> + d_cfg->arch.viommu_type = viommu_get_type(); >> d_cfg->flags |= XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap; >> >> if ( domu_dt_sci_parse(node, d_cfg) ) >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 94b9858ad2..241f87386b 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include "vpci.h" >> @@ -550,6 +551,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> + /* Check config structure padding */ >> + if ( config->arch.pad ) >> + { >> + dprintk(XENLOG_INFO, >> + "Invalid input config, padding must be zero\n"); >> + return -EINVAL; >> + } >> + >> /* Check feature flags */ >> if ( sve_vl_bits > 0 ) >> { >> @@ -626,6 +635,21 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> + if ( !(config->flags & XEN_DOMCTL_CDF_iommu) && >> + config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + { >> + dprintk(XENLOG_INFO, >> + "vIOMMU requested while iommu not enabled for domain\n"); >> + return -EINVAL; >> + } >> + >> + if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + { >> + dprintk(XENLOG_INFO, >> + "vIOMMU type requested not supported by the platform or Xen\n"); >> + return -EINVAL; >> + } >> + >> return sci_domain_sanitise_config(config); >> } >> >> @@ -721,6 +745,9 @@ int arch_domain_create(struct domain *d, >> if ( (rc = sci_domain_init(d, config)) != 0 ) >> goto fail; >> >> + if ( (rc = domain_viommu_init(d, config->arch.viommu_type)) != 0 ) >> + goto fail; >> + >> return 0; >> >> fail: >> @@ -965,6 +992,7 @@ enum { >> PROG_pci = 1, >> PROG_sci, >> PROG_tee, >> + PROG_viommu, > > I am not entirely sure about the position. Is the intention to > relinquish the viommu state *after* the devices are detached? If so, it > would be better to move this call just after 'PROG_pci' and add a > comment indicating the dependency. > Yes, viommu cleanup should be performed after the devices are released. After the rebase, it ended up in the wrong place because new components were added in the meantime. I will update this and add a note for dependecy. >> PROG_xen, >> PROG_page, >> PROG_mapping, >> @@ -1021,6 +1049,11 @@ int domain_relinquish_resources(struct domain *d) >> if (ret ) >> return ret; >> >> + PROGRESS(viommu): >> + ret = viommu_relinquish_resources(d); >> + if (ret ) >> + return ret; >> + >> PROGRESS(xen): >> ret = relinquish_memory(d, &d->xenpage_list); >> if ( ret ) >> diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c >> index e8795745dd..a51563ee3d 100644 >> --- a/xen/arch/arm/domain_build.c >> +++ b/xen/arch/arm/domain_build.c >> @@ -35,6 +35,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include >> @@ -1946,6 +1947,7 @@ void __init create_dom0(void) >> dom0_cfg.arch.nr_spis = vgic_def_nr_spis(); >> dom0_cfg.arch.tee_type = tee_get_type(); >> dom0_cfg.max_vcpus = dom0_max_vcpus(); >> + dom0_cfg.arch.viommu_type = viommu_get_type(); >> >> if ( iommu_enabled ) >> dom0_cfg.flags |= XEN_DOMCTL_CDF_iommu; >> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/include/asm/viommu.h >> new file mode 100644 >> index 0000000000..4598f543b8 >> --- /dev/null >> +++ b/xen/arch/arm/include/asm/viommu.h >> @@ -0,0 +1,70 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> +#ifndef __ARCH_ARM_VIOMMU_H__ >> +#define __ARCH_ARM_VIOMMU_H__ >> + >> +#ifdef CONFIG_ARM_VIRTUAL_IOMMU >> + >> +#include >> +#include >> +#include >> + >> +struct viommu_ops { >> + /* >> + * Called during domain construction if toolstack requests to enable >> + * vIOMMU support. >> + */ >> + int (*domain_init)(struct domain *d); >> + >> + /* >> + * Called during domain destruction to free resources used by vIOMMU. >> + */ >> + int (*relinquish_resources)(struct domain *d); >> +}; >> + >> +struct viommu_desc { >> + /* vIOMMU domains init/free operations described above. */ >> + const struct viommu_ops *ops; >> + >> + /* >> + * ID of vIOMMU. Corresponds to xen_arch_domainconfig.viommu_type. >> + * Should be one of XEN_DOMCTL_CONFIG_VIOMMU_xxx >> + */ >> + uint16_t viommu_type; > > Below, you define viommu_type as 'uint8_t'. So shouldn't this also be > 'uint8_t'? > Should be uint8_t, will fix it. >> +}; >> + >> +int domain_viommu_init(struct domain *d, uint16_t viommu_type); >> +int viommu_relinquish_resources(struct domain *d); >> +uint16_t viommu_get_type(void); >> + >> +#else >> + >> +static inline uint8_t viommu_get_type(void) >> +{ >> + return XEN_DOMCTL_CONFIG_VIOMMU_NONE; >> +} >> + >> +static inline int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> +{ >> + if ( likely(viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE) ) >> + return 0; >> + >> + return -ENODEV; >> +} >> + >> +static inline int viommu_relinquish_resources(struct domain *d) >> +{ >> + return 0; >> +} >> + >> +#endif /* CONFIG_ARM_VIRTUAL_IOMMU */ >> + >> +#endif /* __ARCH_ARM_VIOMMU_H__ */ >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kconfig >> index b413c33a4c..3c174bc87b 100644 >> --- a/xen/drivers/passthrough/Kconfig >> +++ b/xen/drivers/passthrough/Kconfig >> @@ -35,6 +35,11 @@ config IPMMU_VMSA >> (H3 ES3.0, M3-W+, etc) or Gen4 SoCs which IPMMU hardware supports stage 2 >> translation table format and is able to use CPU's P2M table as is. >> >> +config ARM_VIRTUAL_IOMMU >> + bool "Virtual IOMMU Support (UNSUPPORTED)" if UNSUPPORTED >> + help >> + Support virtual IOMMU infrastructure to implement vIOMMU. >> + >> endif >> >> config AMD_IOMMU >> diff --git a/xen/drivers/passthrough/arm/Makefile b/xen/drivers/passthrough/arm/Makefile >> index c5fb3b58a5..c3783188e3 100644 >> --- a/xen/drivers/passthrough/arm/Makefile >> +++ b/xen/drivers/passthrough/arm/Makefile >> @@ -2,3 +2,4 @@ obj-y += iommu.o iommu_helpers.o iommu_fwspec.o >> obj-$(CONFIG_ARM_SMMU) += smmu.o >> obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o >> obj-$(CONFIG_ARM_SMMU_V3) += smmu-v3.o >> +obj-$(CONFIG_ARM_VIRTUAL_IOMMU) += viommu.o >> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/passthrough/arm/viommu.c >> new file mode 100644 >> index 0000000000..7ab6061e34 >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/viommu.c >> @@ -0,0 +1,48 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> + >> +#include >> + >> +const struct viommu_desc __read_mostly *cur_viommu; > > You don't seem to define 'cur_viommmu' in the header. So shouldn't this > be 'static'? Also, AFAICT, 'cur_viommu' would be set only once at boot. > So rather than using __read_mostly, you probably want to use > '__ro_after_init'. > I will update the 'cur_viommu' properties and add a set function for it. >> + >> +int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> +{ >> + if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + return 0; >> + >> + if ( !cur_viommu ) >> + return -ENODEV; >> + >> + if ( cur_viommu->viommu_type != viommu_type ) >> + return -EINVAL; >> + >> + return cur_viommu->ops->domain_init(d); >> +} >> + >> +int viommu_relinquish_resources(struct domain *d) >> +{ >> + if ( !cur_viommu ) >> + return 0; >> + >> + return cur_viommu->ops->relinquish_resources(d); >> +} >> + >> +uint16_t viommu_get_type(void) >> +{ >> + if ( !cur_viommu ) >> + return XEN_DOMCTL_CONFIG_VIOMMU_NONE; >> + >> + return cur_viommu->viommu_type; >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >> index cd563cf706..d4953d40fd 100644 >> --- a/xen/include/public/arch-arm.h >> +++ b/xen/include/public/arch-arm.h >> @@ -330,6 +330,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >> >> +#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 >> + >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> uint8_t gic_version; >> @@ -355,6 +357,9 @@ struct xen_arch_domainconfig { >> uint32_t clock_frequency; >> /* IN */ >> uint8_t arm_sci_type; >> + /* IN */ >> + uint8_t viommu_type; >> + uint16_t pad; >> }; >> #endif /* __XEN__ || __XEN_TOOLS__ */ >> >> diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h >> index 8f6708c0a7..23124547f3 100644 >> --- a/xen/include/public/domctl.h >> +++ b/xen/include/public/domctl.h >> @@ -30,9 +30,9 @@ >> * fields) don't require a change of the version. >> * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! >> * >> - * Last version bump: Xen 4.19 >> + * Last version bump: Xen 4.22 >> */ >> -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 >> +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 >> >> /* >> * NB. xen_domctl.domain is an IN/OUT parameter for this operation. > > Cheers, > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 11:05:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 11:05:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299330.1573928 (Exim 4.92) (envelope-from ) id 1wJUdD-00086R-2x; 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>> + >> const struct viommu_desc __read_mostly *cur_viommu; >> >> +/* Common function for adding to host_iommu_list */ >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) >> +{ >> + struct host_iommu *iommu_data; >> + >> + iommu_data = xzalloc(struct host_iommu); >> + if ( !iommu_data ) >> + panic("vIOMMU: Cannot allocate memory for host IOMMU data\n"); >> + >> + iommu_data->addr = addr; >> + iommu_data->size = size; >> + iommu_data->dt_node = node; >> + iommu_data->irq = platform_get_irq(node, 0); >> + if ( iommu_data->irq < 0 ) >> + { >> + gdprintk(XENLOG_ERR, >> + "vIOMMU: Cannot find a valid IOMMU irq\n"); > > We need to free iommu_data here > Yes, will fix this. >> + return; >> + } >> + >> + printk("vIOMMU: Found IOMMU @0x%"PRIx64"\n", addr); >> + >> + list_add_tail(&iommu_data->entry, &host_iommu_list); >> +} >> + >> int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> { >> if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> new file mode 100644 >> index 0000000000..6b4009e5ef >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -0,0 +1,124 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +/* Struct to hold the vIOMMU ops and vIOMMU type */ >> +extern const struct viommu_desc __read_mostly *cur_viommu; >> + >> +struct virt_smmu { >> + struct domain *d; >> + struct list_head viommu_list; >> +}; >> + >> +static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >> + register_t r, void *priv) >> +{ >> + return IO_HANDLED; >> +} >> + >> +static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> + register_t *r, void *priv) >> +{ >> + return IO_HANDLED; > > If this has to be treated for now as RAZ, being a dummy implementation, > I would add *r = 0; > As suggested in later comments, I will insert BUG_ON("unimplemented") for functions which are not complete at this point. >> +} >> + >> +static const struct mmio_handler_ops vsmmuv3_mmio_handler = { >> + .read = vsmmuv3_mmio_read, >> + .write = vsmmuv3_mmio_write, >> +}; >> + >> +static int vsmmuv3_init_single(struct domain *d, paddr_t addr, paddr_t size) >> +{ >> + struct virt_smmu *smmu; >> + >> + smmu = xzalloc(struct virt_smmu); >> + if ( !smmu ) >> + return -ENOMEM; >> + >> + smmu->d = d; >> + >> + register_mmio_handler(d, &vsmmuv3_mmio_handler, addr, size, smmu); >> + >> + /* Register the vIOMMU to be able to clean it up later. */ >> + list_add_tail(&smmu->viommu_list, &d->arch.viommu_list); >> + >> + return 0; >> +} >> + >> +int domain_vsmmuv3_init(struct domain *d) >> +{ >> + int ret; >> + INIT_LIST_HEAD(&d->arch.viommu_list); >> + >> + if ( is_hardware_domain(d) ) >> + { >> + struct host_iommu *hw_iommu; >> + >> + list_for_each_entry(hw_iommu, &host_iommu_list, entry) >> + { >> + ret = vsmmuv3_init_single(d, hw_iommu->addr, hw_iommu->size); >> + if ( ret ) >> + return ret; >> + } >> + } >> + else >> + { >> + ret = vsmmuv3_init_single(d, GUEST_VSMMUV3_BASE, GUEST_VSMMUV3_SIZE); >> + if ( ret ) >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> +int vsmmuv3_relinquish_resources(struct domain *d) >> +{ >> + struct virt_smmu *pos, *temp; >> + >> + /* Cope with unitialized vIOMMU */ > > Typo s/unitialized/uninitialized/ > > > Cheers, > Luca > > BR, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 18:38:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 18:38:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299396.1573936 (Exim 4.92) (envelope-from ) id 1wJbhh-0002sd-76; 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For dom0, 1-1 mapping will be established between vIOMMU in dom0 >> and physical IOMMU. >> >> For domUs, the 1-N mapping will be established between domU and physical >> IOMMUs. A new area has been reserved in the arm guest physical map at >> which the emulated vIOMMU node is created in the device tree. >> >> Also set the vIOMMU type to vSMMUv3 to enable vIOMMU framework to call >> vSMMUv3 domain creation/destroy functions. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> xen/arch/arm/domain.c | 3 +- >> xen/arch/arm/include/asm/domain.h | 4 + >> xen/arch/arm/include/asm/viommu.h | 20 ++++ >> xen/drivers/passthrough/Kconfig | 8 ++ >> xen/drivers/passthrough/arm/Makefile | 1 + >> xen/drivers/passthrough/arm/smmu-v3.c | 7 ++ >> xen/drivers/passthrough/arm/viommu.c | 30 ++++++ >> xen/drivers/passthrough/arm/vsmmu-v3.c | 124 +++++++++++++++++++++++++ >> xen/drivers/passthrough/arm/vsmmu-v3.h | 20 ++++ >> xen/include/public/arch-arm.h | 7 +- >> 10 files changed, 222 insertions(+), 2 deletions(-) >> create mode 100644 xen/drivers/passthrough/arm/vsmmu-v3.c >> create mode 100644 xen/drivers/passthrough/arm/vsmmu-v3.h >> >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 241f87386b..b982d79b3b 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -643,7 +643,8 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >> return -EINVAL; >> } >> >> - if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> + if ( config->arch.viommu_type != XEN_DOMCTL_CONFIG_VIOMMU_NONE && >> + config->arch.viommu_type != viommu_get_type() ) >> { >> dprintk(XENLOG_INFO, >> "vIOMMU type requested not supported by the platform or Xen\n"); >> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h >> index 758ad807e4..61108d0068 100644 >> --- a/xen/arch/arm/include/asm/domain.h >> +++ b/xen/arch/arm/include/asm/domain.h >> @@ -126,6 +126,10 @@ struct arch_domain >> void *sci_data; >> #endif >> >> +#ifdef CONFIG_ARM_VIRTUAL_IOMMU >> + struct list_head viommu_list; /* List of virtual IOMMUs */ >> +#endif >> + >> } __cacheline_aligned; >> >> struct arch_vcpu >> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/include/asm/viommu.h >> index 4598f543b8..2a6742de73 100644 >> --- a/xen/arch/arm/include/asm/viommu.h >> +++ b/xen/arch/arm/include/asm/viommu.h >> @@ -5,9 +5,21 @@ >> #ifdef CONFIG_ARM_VIRTUAL_IOMMU >> >> #include >> +#include >> #include >> #include >> >> +extern struct list_head host_iommu_list; >> + >> +/* data structure for each hardware IOMMU */ >> +struct host_iommu { >> + struct list_head entry; >> + const struct dt_device_node *dt_node; >> + paddr_t addr; >> + paddr_t size; >> + uint32_t irq; > > You don't seem to use ``irq`` in this patch. What is this meant to be > used for? > This field will be used for vIOMMU event queue creation for the hardware domain in a later patch (xen/arm: vsmmuv3: Add support for event queue and global error). The emulated IRQ and MMIO region for the hardware domain vIOMMU will match those of the host IOMMU. >> +}; >> + >> struct viommu_ops { >> /* >> * Called during domain construction if toolstack requests to enable >> @@ -35,6 +47,8 @@ struct viommu_desc { >> int domain_viommu_init(struct domain *d, uint16_t viommu_type); >> int viommu_relinquish_resources(struct domain *d); >> uint16_t viommu_get_type(void); >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node); >> >> #else >> >> @@ -56,6 +70,12 @@ static inline int viommu_relinquish_resources(struct domain *d) >> return 0; >> } >> >> +static inline void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) >> +{ >> + return; >> +} >> + >> #endif /* CONFIG_ARM_VIRTUAL_IOMMU */ >> >> #endif /* __ARCH_ARM_VIOMMU_H__ */ >> diff --git a/xen/drivers/passthrough/Kconfig b/xen/drivers/passthrough/Kconfig >> index 3c174bc87b..9c48e7415e 100644 >> --- a/xen/drivers/passthrough/Kconfig >> +++ b/xen/drivers/passthrough/Kconfig >> @@ -40,6 +40,14 @@ config ARM_VIRTUAL_IOMMU >> help >> Support virtual IOMMU infrastructure to implement vIOMMU. >> >> +config VIRTUAL_ARM_SMMU_V3 >> + bool "ARM Ltd. Virtual SMMUv3 Support (UNSUPPORTED)" >> + depends on ARM_SMMU_V3 && ARM_VIRTUAL_IOMMU >> + help >> + Support for implementations of the virtual ARM System MMU architecture >> + version 3. Virtual SMMUv3 is unsupported feature and should not be used >> + in production. >> + >> endif >> >> config AMD_IOMMU >> diff --git a/xen/drivers/passthrough/arm/Makefile b/xen/drivers/passthrough/arm/Makefile >> index c3783188e3..c8f0a5f802 100644 >> --- a/xen/drivers/passthrough/arm/Makefile >> +++ b/xen/drivers/passthrough/arm/Makefile >> @@ -3,3 +3,4 @@ obj-$(CONFIG_ARM_SMMU) += smmu.o >> obj-$(CONFIG_IPMMU_VMSA) += ipmmu-vmsa.o >> obj-$(CONFIG_ARM_SMMU_V3) += smmu-v3.o >> obj-$(CONFIG_ARM_VIRTUAL_IOMMU) += viommu.o >> +obj-$(CONFIG_VIRTUAL_ARM_SMMU_V3) += vsmmu-v3.o >> diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c >> index 19e55b6c9b..87612df21d 100644 >> --- a/xen/drivers/passthrough/arm/smmu-v3.c >> +++ b/xen/drivers/passthrough/arm/smmu-v3.c >> @@ -93,6 +93,7 @@ >> #include >> >> #include "smmu-v3.h" >> +#include "vsmmu-v3.h" >> >> #define ARM_SMMU_VTCR_SH_IS 3 >> #define ARM_SMMU_VTCR_RGN_WBWA 1 >> @@ -2727,6 +2728,9 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) >> list_add(&smmu->devices, &arm_smmu_devices); >> spin_unlock(&arm_smmu_devices_lock); >> >> + /* Add to host IOMMU list to initialize vIOMMU for dom0 */ > > The indentation looks odd. Is this correctly aligned? > Yes, it's wrong, will fix it. >> + add_to_host_iommu_list(ioaddr, iosize, dev_to_dt(pdev)); >> + >> return 0; >> >> >> @@ -3058,6 +3062,9 @@ static __init int arm_smmu_dt_init(struct dt_device_node *dev, >> >> platform_features &= smmu->features; >> >> + /* Set vIOMMU type to SMMUv3 */ >> + vsmmuv3_set_type(); >> + >> return 0; >> } >> >> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/passthrough/arm/viommu.c >> index 7ab6061e34..53ae46349a 100644 >> --- a/xen/drivers/passthrough/arm/viommu.c >> +++ b/xen/drivers/passthrough/arm/viommu.c >> @@ -2,12 +2,42 @@ >> >> #include >> #include >> +#include >> #include >> >> #include >> >> +/* List of all host IOMMUs */ >> +LIST_HEAD(host_iommu_list); > > I don't quite follow why this is part of the common code. That said, why > do we need to register the host IOMMU? Wouldn't it be simpler to go > through the list of pIOMMU in the vSMMU v3 implementation? > ``host_iommu_list`` is part of the generic code to allow reuse for other IOMMU types in the future. For example, it can be reused for Renesas IPMMU, rather than duplicating it. As for why we need to register IOMMUs, it seems more suitable to create this list at initialization and add IOMMUs with the necessary properties when the pIOMMU is probed. We can't reuse the same list from the SMMU driver because vIOMMU needs raw DT properties (address, size), which I don't think we can extract from the host driver list. >> + >> const struct viommu_desc __read_mostly *cur_viommu; >> >> +/* Common function for adding to host_iommu_list */ >> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> + const struct dt_device_node *node) > > Is this supposed to only be called during __init? If so, this will help > to justify the ... > >> +{ >> + struct host_iommu *iommu_data; >> + >> + iommu_data = xzalloc(struct host_iommu); >> + if ( !iommu_data ) >> + panic("vIOMMU: Cannot allocate memory for host IOMMU data\n"); > > ... panic(). If not, then this function needs to return an error. > Yes, this is called during init, on pIOMMU driver probe (arm_smmu_device_probe()) >> + >> + iommu_data->addr = addr; >> + iommu_data->size = size; >> + iommu_data->dt_node = node; >> + iommu_data->irq = platform_get_irq(node, 0); >> + if ( iommu_data->irq < 0 ) >> + { >> + gdprintk(XENLOG_ERR, >> + "vIOMMU: Cannot find a valid IOMMU irq\n"); > > Shouldn't you free the allocated memory? That said, why is it ok to > ignore the vIOMMU in this case? > Yes, this is missing. We ignore the host IOMMU with an invalid IRQ because event queue emulation won't work in this case. >> + return; >> + } >> + >> + printk("vIOMMU: Found IOMMU @0x%"PRIx64"\n", addr); >> + >> + list_add_tail(&iommu_data->entry, &host_iommu_list); >> +} >> + >> int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> { >> if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> new file mode 100644 >> index 0000000000..6b4009e5ef >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -0,0 +1,124 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +/* Struct to hold the vIOMMU ops and vIOMMU type */ >> +extern const struct viommu_desc __read_mostly *cur_viommu; > > Why is this defined in the C file? Shouldn't this be defined in > ``viomum.h``? That said, looking at the use, I think we want to > introduce a helper to set the cur_viommu and not export ``cur_viommu``. > I will introduce a helper, set function for ``cur_viommu``. After this is done, there's no need to move its definition to ``viommu.h``, since it should remain private to the vIOMMU code. >> + >> +struct virt_smmu { >> + struct domain *d; >> + struct list_head viommu_list; >> +}; >> + >> +static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >> + register_t r, void *priv) >> +{ >> + return IO_HANDLED; >> +} >> + >> +static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> + register_t *r, void *priv) >> +{ >> + return IO_HANDLED; >> +} > > I undertand that both helpers are meant to be updated in a later patch. > However, I think it makes quite difficult to know whether the code is > complete by the end of the series. I would strongly recommend adding > 'BUG_ON("unimplemented");' so we can easily grep whether there is > anything missing by the end. > Sure, I'll add BUG_ON() for the unimplemented functions. >> + >> +static const struct mmio_handler_ops vsmmuv3_mmio_handler = { >> + .read = vsmmuv3_mmio_read, >> + .write = vsmmuv3_mmio_write, >> +}; >> + >> +static int vsmmuv3_init_single(struct domain *d, paddr_t addr, paddr_t size) >> +{ >> + struct virt_smmu *smmu; >> + >> + smmu = xzalloc(struct virt_smmu); >> + if ( !smmu ) >> + return -ENOMEM; >> + >> + smmu->d = d; >> + >> + register_mmio_handler(d, &vsmmuv3_mmio_handler, addr, size, smmu); > > I can't seem to find a place where the number of handler supported is > incremented (see domain_io_init()) for the vIOMMU. Are you sure we > always have enough space today? > I'll fix this. The handler count should be incremented during domain creation if vIOMMU is enabled. >> + >> + /* Register the vIOMMU to be able to clean it up later. */ >> + list_add_tail(&smmu->viommu_list, &d->arch.viommu_list); >> + >> + return 0; >> +} >> + >> +int domain_vsmmuv3_init(struct domain *d) >> +{ >> + int ret; > > Coding style: newline missing. > >> + INIT_LIST_HEAD(&d->arch.viommu_list); >> + >> + if ( is_hardware_domain(d) ) >> + { >> + struct host_iommu *hw_iommu; >> + >> + list_for_each_entry(hw_iommu, &host_iommu_list, entry) >> + { >> + ret = vsmmuv3_init_single(d, hw_iommu->addr, hw_iommu->size); >> + if ( ret ) >> + return ret; >> + } >> + } >> + else >> + { >> + ret = vsmmuv3_init_single(d, GUEST_VSMMUV3_BASE, GUEST_VSMMUV3_SIZE); >> + if ( ret ) >> + return ret; >> + } >> + >> + return 0; >> +} >> + >> +int vsmmuv3_relinquish_resources(struct domain *d) >> +{ >> + struct virt_smmu *pos, *temp; >> + >> + /* Cope with unitialized vIOMMU */ >> + if ( list_head_is_null(&d->arch.viommu_list) ) >> + return 0; >> + >> + list_for_each_entry_safe(pos, temp, &d->arch.viommu_list, viommu_list ) >> + { >> + list_del(&pos->viommu_list); >> + xfree(pos); >> + } >> + >> + return 0; >> +} >> + >> +static const struct viommu_ops vsmmuv3_ops = { >> + .domain_init = domain_vsmmuv3_init, >> + .relinquish_resources = vsmmuv3_relinquish_resources, >> +}; >> + >> +static const struct viommu_desc vsmmuv3_desc = { >> + .ops = &vsmmuv3_ops, >> + .viommu_type = XEN_DOMCTL_CONFIG_VIOMMU_SMMUV3, >> +}; >> + >> +void __init vsmmuv3_set_type(void) >> +{ >> + const struct viommu_desc *desc = &vsmmuv3_desc; >> + >> + if ( cur_viommu && (cur_viommu != desc) ) >> + { >> + printk("WARNING: Cannot set vIOMMU, already set to a different value\n"); >> + return; >> + } >> + >> + cur_viommu = desc; >> +} >> + >> +/* >> + * Local variables: >> + * mode: C >> + * c-file-style: "BSD" >> + * c-basic-offset: 4 >> + * indent-tabs-mode: nil >> + * End: >> + */ >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.h b/xen/drivers/passthrough/arm/vsmmu-v3.h >> new file mode 100644 >> index 0000000000..e11f85b431 >> --- /dev/null >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.h >> @@ -0,0 +1,20 @@ >> +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ >> +#ifndef __ARCH_ARM_VSMMU_V3_H__ >> +#define __ARCH_ARM_VSMMU_V3_H__ >> + >> +#include >> + >> +#ifdef CONFIG_VIRTUAL_ARM_SMMU_V3 >> + >> +void vsmmuv3_set_type(void); >> + >> +#else >> + >> +static inline void vsmmuv3_set_type(void) >> +{ >> + return; >> +} >> + >> +#endif /* CONFIG_VIRTUAL_ARM_SMMU_V3 */ >> + >> +#endif /* __ARCH_ARM_VSMMU_V3_H__ */ >> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >> index d4953d40fd..ebac02ed63 100644 >> --- a/xen/include/public/arch-arm.h >> +++ b/xen/include/public/arch-arm.h >> @@ -330,7 +330,8 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >> >> -#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 >> +#define XEN_DOMCTL_CONFIG_VIOMMU_NONE 0 > > I am generally against trying to align values because this is just > introducing unnecessary churn in the code. > >> +#define XEN_DOMCTL_CONFIG_VIOMMU_SMMUV3 1 >> >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> @@ -456,6 +457,10 @@ typedef uint64_t xen_callback_t; >> #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */ >> #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000) >> >> +/* vsmmuv3 ITS mappings */ > > What is ITS stand for in this context? > This is wrong, should be MMIO mappings instead of ITS. I'll fix this. >> +#define GUEST_VSMMUV3_BASE xen_mk_ullong(0x04040000) >> +#define GUEST_VSMMUV3_SIZE xen_mk_ullong(0x00040000) > > If I am not mistaken, you are reserving 256KiB. However, looking at the > SMMU spec (section 6.1, ARM IHI 0070 H.a), the minimum is 128 KiB. Are > you intending to expose additional features? > You're correct, there are no additional features exposed. The size was chosen during the early implementation, but I don't think we need to reserve more than the architectural minimum at this point. >> + >> /* >> * 256 MB is reserved for VPCI configuration space based on calculation >> * 256 buses x 32 devices x 8 functions x 4 KB = 256 MB > > Cheers, > Best regards, Milan From xen-devel-bounces@lists.xenproject.org Sun May 03 21:21:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 03 May 2026 21:21:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299408.1573945 (Exim 4.92) (envelope-from ) id 1wJeFb-0005r8-DQ; Sun, 03 May 2026 21:21:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299408.1573945; Sun, 03 May 2026 21:21:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJeFb-0005r1-Ab; Sun, 03 May 2026 21:21:19 +0000 Received: by outflank-mailman (input) for mailman id 1299408; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="aTnhuwifSrVovotV" Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-d62444/1777843275-BEE63FF4-44483B73/0/0 X-purgate-type: clean X-purgate-size: 2020 --aTnhuwifSrVovotV Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Sun, 3 May 2026 23:21:10 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?utf-8?B?TW9ubsOp?= Subject: Re: [PATCH test-artifacts v3 02/13] Switch Linux builds to use Alpine 3.22 container On Wed, Apr 01, 2026 at 08:58:04AM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > On Wed, Apr 01, 2026 at 08:46:02AM +0200, Orzel, Michal wrote: > > Why not 3.23 if it's already there? >=20 > Because it wasn't yet when I prepared this patch series :) >=20 > I can update again and see if any other changes are needed with 3.23. > Other patches are independent of this change. So, Linux 6.6.56 fails to build there: https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/jobs/141912= 60643 This is fixed in Linux 6.6.95, but I can't just drop 6.6.56 as stable branches still use it. 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Sun, 03 May 2026 22:14:09 -0700 (PDT) Message-ID: <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Date: Mon, 4 May 2026 07:14:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Andrew Cooper Cc: Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777871650-16E67C48-E2DFA8EB/0/0 X-purgate-type: clean X-purgate-size: 1428 On 02.05.2026 00:21, Andrew Cooper wrote: > On 01/05/2026 10:44 pm, Stefano Stabellini wrote: >> On Fri, 1 May 2026, Andrew Cooper wrote: >>> Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] >>> and one is in the VMCB. >>> >>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>> loads and saves the guest CR2 across VMRUN/VMExit. >>> >>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>> migration is cooperative and not done from the #PF handler, this also goes >>> unoticed by guests. >>> >>> It also means that an emulated MOV-from-CR2 reads a stale value. >>> >>> Reported-by: Stefano Stabellini >>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>> Signed-off-by: Andrew Cooper >> Tested-by: Stefano Stabellini > > Thanks, sadly I made the mistake of extending my XTF PoC for this. > > There are also bugs on the emulated MOV-to-CR2 side, and they're far > harder to untangle. Any slightly closer details as to what? > This patch probably wants to go in in this form, accepting that there > are issues still to be addressed on the other side. I agree: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 05:17:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:17:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299434.1573963 (Exim 4.92) (envelope-from ) id 1wJlgs-0003uc-M3; Mon, 04 May 2026 05:17:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299434.1573963; Mon, 04 May 2026 05:17:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJlgs-0003uV-JN; Mon, 04 May 2026 05:17:58 +0000 Received: by outflank-mailman (input) for mailman id 1299434; Mon, 04 May 2026 05:17:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJlgr-0003uN-2m for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:17:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJlgq-00ETi1-Ez for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:17:56 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f82be6-5cb7-0a2a0a5109dd-0a2a4503b72c-48 for ; Mon, 04 May 2026 07:17:56 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f82c04-672d-0a2a45030019-d1558029b1b2-3 for ; Mon, 04 May 2026 07:17:56 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4893940bb5eso18379465e9.3 for ; Sun, 03 May 2026 22:17:56 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <83b1e26a-cd17-4f64-ae82-dbf56f95b4ad@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777871876-2BD6B938-9EF1472B/0/0 X-purgate-type: clean X-purgate-size: 2095 On 29.04.2026 11:44, Andrew Cooper wrote: > On 28/04/2026 7:19 pm, Dmytro Prokopchuk1 wrote: >> The statement 'return ERR_PTR(-ENOENT);' on the final line of the >> function 'hypfs_get_entry_rel()' is unreachable because the logic within >> the infinite loop 'for (;;)' provides all possible exit paths for the >> function. So there is no execution path to exit the loop and reach the >> final that statement. >> >> This unreachable code violates MISRA C Rule 2.1 which states: "A project >> shall not contain unreachable code". >> >> To fix that and potential compilers "control reaches end of non-void >> function" warning, mark the code path as unreachable using macro >> 'ASSERT_UNREACHABLE()'. >> >> Signed-off-by: Dmytro Prokopchuk >> --- >> Changes in v2: >> - add ASSERT_UNREACHABLE() before the final return statement instead of removing it >> Test CI pipeline: >> https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2485661910 >> Link to v1: >> https://patchew.org/Xen/341811ced2943fb79d0235c27781c564c7bdaf02.1775749146.git.dmytro._5Fprokopchuk1@epam.com/ >> --- >> xen/common/hypfs.c | 1 + >> 1 file changed, 1 insertion(+) >> >> diff --git a/xen/common/hypfs.c b/xen/common/hypfs.c >> index cdf4ee0171..02fb234568 100644 >> --- a/xen/common/hypfs.c >> +++ b/xen/common/hypfs.c >> @@ -348,6 +348,7 @@ static struct hypfs_entry *hypfs_get_entry_rel(struct hypfs_entry_dir *dir, >> dir = container_of(entry, struct hypfs_entry_dir, e); >> } >> >> + ASSERT_UNREACHABLE(); >> return ERR_PTR(-ENOENT); >> } >> > > No.  This is absurd. Why? > Not to mention that you are *definitely* not fixing the stated MISRA rule. Correct. It is instead deviating that rule for this code instance. I'm pretty sure we have a few other similar pieces of code elsewhere. In any event - your reply isn't really actionable. If you want things done differently, then please make a concrete suggestion. Otherwise, in a couple of days, I'll commit this with Jürgen's R-b. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777872452-2BB6B3FF-AC9BD6F0/0/0 X-purgate-type: clean X-purgate-size: 4594 On 29.04.2026 09:22, Bernhard Kaindl wrote: > Code blocks in the RFC rules can be converted as C syntax-highlighted > pretty pieces of code using `.. code:: C` inline elements: > https://docutils.sourceforge.io/docs/ref/rst/directives.html#code > > For reference, the current formatting used are 'Indented Literal Blocks': > https://docutils.sourceforge.io/docs/ref/rst/restructuredtext.html#toc-entry-23 > > In this example, docs/misra/rules.rst, line 128 starts an Indented > Literal Block by ending the paragraph with "violations::" > (note the :: at then end of the paragraph which is enables it): > > - Functions that are no-return due to calls to the `ASSERT_UNREACHABLE()` > macro in debug build configurations are not considered violations:: > > static inline bool > arch_vcpu_ioreq_completion(enum vio_completion completion) > { > ASSERT_UNREACHABLE(); > return false; > } > > Format such code blocks as C code blocks and apply ``function()`` around > functions to make them inline linterals for monospace formatting. Nit: literal > --- a/docs/misra/rules.rst > +++ b/docs/misra/rules.rst > @@ -115,20 +115,29 @@ maintainers if you want to suggest a change. > - Required > - A project shall not contain unreachable code > - The following are allowed: > - - Invariantly constant conditions, e.g. if(IS_ENABLED(CONFIG_HVM)) { S; } > + - Invariantly constant conditions, e.g. > + > + .. code:: C > + > + if ( IS_ENABLED(CONFIG_HVM) ) { > + S; > + } If already you reformat like this, then please fully to proper Xen style. > - Switch with a controlling value statically determined not to > match one or more case statements > - Functions that are intended to be referenced only from > - assembly code (e.g. 'do_trap_fiq') > - - asm-offsets.c, as they are not linked deliberately, because > + assembly code (e.g. ``do_trap_fiq``) > + - ``asm-offsets.c``, as they are not linked deliberately, because This is a file name, not code? > they are used to generate definitions for asm modules > - Declarations without initializer are safe, as they are not > executed > - - Functions that are no-return due to calls to the `ASSERT_UNREACHABLE()` > - macro in debug build configurations are not considered violations:: > + - Functions that are no-return due to calls to the ``ASSERT_UNREACHABLE()`` > + macro in debug build configurations are not considered violations: > + > + .. code:: C > > static inline bool > - arch_vcpu_ioreq_completion(enum vio_completion completion) > + arch_vcpu_ioreq_completion(int c) I don't agree with making a change making an example not match actual code. If you truly want to abstract this (to shorten the line) then please also change the function name. > @@ -207,16 +216,20 @@ maintainers if you want to suggest a change. > > Clashes between bitops functions and macro names are allowed > because they are used for input validation and error handling. > - Example:: > + Example: > > - static inline void set_bit(int nr, volatile void *addr) > + .. code:: C > + > + static inline void set_bit(int nr, volatile void *a) > { > - asm volatile ( "lock btsl %1,%0" > - : "+m" (ADDR) : "Ir" (nr) : "memory"); > + asm volatile ( "lock btsl %1,%0 " Why the new trailing blank in the string literal? > + : "+m" (a) > + : "Ir" (nr) : "memory"); Where you want to add a blank while re-flowing is before the parenthesis here. > } > - #define set_bit(nr, addr) ({ \ > - if ( bitop_bad_size(addr) ) __bitop_bad_size(); \ > - set_bit(nr, addr); \ > + > + #define set_bit(nr, addr) ({ \ > + if ( bitop_bad_size(addr) ) __bitop_bad_size();\ There wants to be a blank before the semicolon. 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Sun, 03 May 2026 22:30:14 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 07:30:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777872615-82F6E161-4F5ADBE9/0/0 X-purgate-type: clean X-purgate-size: 1217 On 29.04.2026 12:08, Luca Fancellu wrote: >> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >> paddr_t gpa, >> void *buf, >> - unsigned int len) >> + unsigned long len) >> { > > Now that we do this, potentially we could have truncation in the places where we store its return value > inside an int: Those would suffer from truncation before and after this change, wouldn't they? Just that where the truncation occurs does move. I.e. if necessary they would want dealing with separately. Jan > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/arch/arm/kernel.c;h=7544fd50a20f08b5ba31cad7b94925112fdee956;hb=refs/heads/staging#l131 > > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/common/device-tree/domain-build.c;h=c51520ebadf9950311f6c071e7e07042c7076a27;hb=refs/heads/staging#l442 > > Could you check and let me know if I’m correct or not? > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Mon May 04 05:38:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:38:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299459.1573991 (Exim 4.92) (envelope-from ) id 1wJm0E-0007vN-RI; Mon, 04 May 2026 05:37:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299459.1573991; Mon, 04 May 2026 05:37:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm0E-0007vG-Ne; Mon, 04 May 2026 05:37:58 +0000 Received: by outflank-mailman (input) for mailman id 1299459; Mon, 04 May 2026 05:37:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm0C-0007vA-WF for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:37:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm0B-000epT-UT for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:37:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f830a9-2eae-0a2a0a5409dd-0a2a4506a0b2-28 for ; Mon, 04 May 2026 07:37:55 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f830b3-7371-0a2a45060019-d155802fbded-3 for ; Mon, 04 May 2026 07:37:55 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488b0046078so28196235e9.1 for ; Sun, 03 May 2026 22:37:55 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1777873075-CFD7AD75-BD6035A0/0/0 X-purgate-type: clean X-purgate-size: 4201 On 23.04.2026 12:12, Mykyta Poturai wrote: > On 4/21/26 17:43, Jan Beulich wrote: >> On 09.04.2026 16:01, Mykyta Poturai wrote: >>> From: Stewart Hildebrand >>> >>> This code is expected to only be used by privileged domains, >>> unprivileged domains should not get access to the SR-IOV capability. >>> >>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>> for possible changes in the system page size register. Also force VFs to >>> always use emulated reads for command register, this is needed to >>> prevent some drivers accidentally unmapping BARs. >> >> This apparently refers to the change to vpci_init_header(). Writes are >> already intercepted. How would a read lead to accidental BAR unmap? Even >> for writes I don't see how a VF driver could accidentally unmap BARs, as >> the memory decode bit there is hardwired to 0. >> >>> Discovery of VFs is >>> done by Dom0, which must register them with Xen. >> >> If we intercept control register writes, why would we still require >> Dom0 to report the VFs that appear? >> > > Sorry, I don't understand this question. You specifically requested this > to be done this way in V2. Quoting your reply from V2 below. > > > Aren't you effectively busy-waiting for these 100ms, by simply > returning "true" > > from vpci_process_pending() until the time has passed? This imo is a > no-go. You > > want to set a timer and put the vCPU to sleep, to wake it up again > when the > > timer has expired. That'll then eliminate the need for the > not-so-nice patch 4. > > > Question is whether we need to actually go this far (right away). I > expect you > > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > > domain, can't we trust it to set things up correctly, just like we > trust it in > > a number of other aspects? How's any of this related to the question I raised here, or your reply thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. Why still demand Dom0 to report them then? >>> +static int map_vfs(const struct pci_dev *pf_pdev, uint16_t cmd) >>> +{ >>> + struct pci_dev *vf_pdev; >>> + int rc; >>> + >>> + ASSERT(rw_is_write_locked(&pf_pdev->domain->pci_lock)); >>> + >>> + list_for_each_entry(vf_pdev, &pf_pdev->vf_list, vf_list) >>> + { >>> + rc = vpci_modify_bars(vf_pdev, cmd, false); >>> + if ( rc ) >>> + { >>> + gprintk(XENLOG_ERR, "failed to %s VF %pp: %d\n", >>> + (cmd & PCI_COMMAND_MEMORY) ? "map" : "unmap", >>> + &vf_pdev->sbdf, rc); >>> + return rc; >>> + } >>> + >>> + vf_pdev->vpci->header.guest_cmd &= ~PCI_COMMAND_MEMORY; >>> + vf_pdev->vpci->header.guest_cmd |= (cmd & PCI_COMMAND_MEMORY); >> >> As mentioned elsewhere as well, this bit is supposed to be 0 for VFs. > > There are some devices that expose VFs with the same VID/DID as in the > PF, causing Linux to use normal driver for them and threat them like > normal devices. At some point, those normal drivers try to do a > read-modify-update of the command register and end up writing 0 to > PCI_COMMAND_MEMORY, causing cmd_write to unmap the BARS of that device. > I am not sure, maybe it would be better to just ignore cmd writes for VFs? No. We should treat r/o bits as r/o (which for this bit implies it not controlling BAR mapping). >>> + sriov_pos = pci_find_ext_capability(pf_pdev, PCI_EXT_CAP_ID_SRIOV); >>> + ctrl = pci_conf_read16(pf_pdev->sbdf, sriov_pos + PCI_SRIOV_CTRL); >>> + >>> + if ( (pf_pdev->domain == vf_pdev->domain) && (ctrl & PCI_SRIOV_CTRL_MSE) ) >>> + { >>> + rc = vpci_modify_bars(vf_pdev, PCI_COMMAND_MEMORY, false); >> >> Doesn't VF enable also need to be set for the BARs to be mapped? > > I don't think so. Enabling memory space logically maps very well to > mapping memory to the guest. I don’t see any benefit of also requiring > VFE bit here. Iirc the spec is quite explicit in this regard. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777873169-4576D8B7-FED8BDD7/10/73395122804 X-purgate-type: spam X-purgate-size: 1127 On 23.04.2026 15:47, Oleksii Kurochko wrote: > On 4/21/26 11:46 AM, Jan Beulich wrote: >> On 10.04.2026 17:54, Oleksii Kurochko wrote: >>> common/device-tree/domain-build.c uses p2m_gpa_bits to determine the >>> upper bound of the GPA space when searching for unused regions, so it >>> must be defined when CONFIG_DOMAIN_BUILD_HELPERS=y. >>> >>> The variable is initialised to PADDR_BITS and narrowed in p2m_init() to >>> the GPA width of the selected G-stage mode, allowing an external entity >>> (e.g. an IOMMU) to restrict it further if needed. >>> >>> p2m_gpa_bits is a global rather than a per-domain value, which is >>> acceptable for now because all domains are required to use the same >>> G-stage MMU mode, as dom0less common code allocates it per all >>> domains. >>> >>> Signed-off-by: Oleksii Kurochko >> >> Pretty hesitantly: > > Could you please clarify what specifically you don't like here? As per earlier comments, this not being per-guest, and implications thereof. Jan >> Acked-by: Jan Beulich > > Thanks. > > ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 04 05:41:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:41:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299475.1574007 (Exim 4.92) (envelope-from ) id 1wJm3N-0001Rc-EM; Mon, 04 May 2026 05:41:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299475.1574007; Mon, 04 May 2026 05:41:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm3N-0001RV-BW; Mon, 04 May 2026 05:41:13 +0000 Received: by outflank-mailman (input) for mailman id 1299475; Mon, 04 May 2026 05:41:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm3L-0001RN-S9 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:41:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm3L-000fVS-87 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:41:11 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f83177-2eae-0a2a0a5409dd-0a2a450cebae-0 for ; Mon, 04 May 2026 07:41:11 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f83177-62f1-0a2a450c0019-d155dd29ed0b-3 for ; Mon, 04 May 2026 07:41:11 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44b330c5cc6so1267469f8f.1 for ; Sun, 03 May 2026 22:41:11 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777873271-6D96DCF5-CAB26606/0/0 X-purgate-type: clean X-purgate-size: 2692 On 22.04.2026 16:35, Bernhard Kaindl wrote: > > Jan Beulich wrote: > >> As to the rename to deduct_global_claims(): With that, wouldn't its 2nd >> parameter then better also change to "deduction"? Furthermore, "global" in >> the name is ambiguous: It may mean "not per-node", but it may also mean >> "not per-domain". The v4 name didn't have such an issue. > > I see the point about 'global'. While the struct domain argument provides > context, the term is indeed too generic. > > In this logic, 'global' was intended to refer to the opposite of > node-specific claims. While the legacy codebase uses 'no-node' or > NUMA_NO_NODE as a sentinel, I find those terms ambiguous for this new > logic; they often imply a "missing" assignment rather than an explicit > "any-node" policy. > > 'Node-agnostic' better describes the architectural intent: that these > claims are valid regardless of node locality. To resolve the ambiguity, > I will replace 'global' with 'node-agnostic' across the board (design > documentation, code, and tests). > > Specifically, I will: > > Rename the function to deduct_node_agnostic_claims(). Or deduct_host_claims() (short for deduct_host_wide_claims())? Jan > Update the second parameter to 'deduction' for consistency. > > Update the function comment to explicitly define the scope. > > /* Deduct from the domain's node-agnostic (non-per-node) claims pool */ > static unsigned long deduct_node_agnostic_claims(struct domain *d, > unsigned long deduction) > > While 'global' was shorter, 'node-agnostic' is much more descriptive of > the actual logic and the node-locality (or lack thereof) being addressed, > avoiding the potential confusion associated with 'no-node'. > > For consistency, the corresponding renames across the series will be: > > +--------------------------------+---------------------------------------+ > | Original Term | New Term | > +--------------------------------+---------------------------------------+ > | "global claims" | "node-agnostic claims" | > | d->global_claims | d->node_agnostic_claims | > | XEN_DOMCTL_CLAIM_MEMORY_GLOBAL | XEN_DOMCTL_CLAIM_MEMORY_NODE_AGNOSTIC | > | deduct_global_claims() | deduct_node_agnostic_claims() | > +--------------------------------+---------------------------------------+ > > I believe these changes result in less ambiguous language universally. > Jan, could you Ack these renames for the next version of the series? > > Bernhard > From xen-devel-bounces@lists.xenproject.org Mon May 04 05:42:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:42:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299484.1574017 (Exim 4.92) (envelope-from ) id 1wJm4R-00020N-QO; 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AFNElJ9N0E4VcAyaVoSdH0UJLfqA033l3/er1LFumulToMGKz/aNFYAbJnDECLIprP9jxk1Zxo4jgA1wtnM=@lists.xenproject.org X-Gm-Message-State: AOJu0YwXC6UuLXj0wMWuEmNRbO2zG5orQRizm3ZaRGsPW/YjUv7l6wgo rZxHvt+uyY2f7eLpUcMoAesirZwqJftuNPmvHltDCD+/wBNZxmJHbTEDAPZ/cKA/DWnsUyBD1n6 yew1kyWoF0ltDa1l2f0ZS4R+gjoTKBkw= X-Gm-Gg: AeBDiet7GAiaAHtZpxhV/IwrYfwb7E2Xnt0LhX4va4RQXCqnzDK/hXMZMcPjIieFLbq zF3pXH1ZuH2HUehWapmgwTpeITGeo74G1S98KaDkw1q1TPOTPSL79ZHcADUUlCgEw57HXW7vxkF bnbrm1HdXVZA+MM74QWvctJBMDH9o7N+q9ywrYjFAn0K0X8CHwQLMi0F/9nW+/Rf5Gb8RZkoCq8 zWGHw/QHWcGZ/wE7YwWdSRaWxxk2TQKvEZlG4dOttskEiULjfts6yfFLXqd9+AT7zQgLD2HIO5N NlXAqPNzqjYIAKPu X-Received: by 2002:a2e:bcc7:0:b0:38c:c36b:8221 with SMTP id 38308e7fff4ca-3937823d9c4mr25437281fa.0.1777873336511; Sun, 03 May 2026 22:42:16 -0700 (PDT) MIME-Version: 1.0 References: <5b68fa0a8403ea60db3047f6505876bc03a41f3f.1774431310.git.mykola_kvach@epam.com> <87bjgcvul6.fsf@epam.com> <20eaa31d-a105-440e-9add-968fc9786180@gmail.com> In-Reply-To: <20eaa31d-a105-440e-9add-968fc9786180@gmail.com> From: Mykola Kvach Date: Mon, 4 May 2026 08:42:05 +0300 X-Gm-Features: AVHnY4LxpGmCNxUVBBFWVnmhQTmaKrIGVIqNzprrjOoi1MwdIOk9eBgmUwzsiAc Message-ID: Subject: Re: [PATCH 1/4] xen/arm: its: collect quirk flags and honor dma-noncoherent To: Oleksandr Tyshchenko Cc: Volodymyr Babchuk , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777873337-AB961161-11339ADA/0/0 X-purgate-type: clean X-purgate-size: 8439 Hi Oleksandr, Thank you for the review. On Tue, Apr 28, 2026 at 9:42=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 3/25/26 17:47, Mykola Kvach wrote: > > Hi Volodymyr, > > Hello Mykola and Volodymyr > > > > > > Thank you for the review. > > > > On Wed, Mar 25, 2026 at 4:42=E2=80=AFPM Volodymyr Babchuk > > wrote: > >> > >> Hi Mykola, > >> > >> Mykola Kvach writes: > >> > >>> From: Mykola Kvach > >>> > >>> Replace the per-quirk init callback with declarative flags in > >>> struct its_quirk, and introduce gicv3_its_collect_quirks() to gather > >>> the effective workaround flags from both the IIDR-matched quirk entry > >>> and the "dma-noncoherent" device-tree property. > >>> > >>> This lets non-coherent platforms force non-cacheable ITS table > >>> attributes even when no IIDR quirk entry matches. > >>> > >>> Signed-off-by: Mykola Kvach > >>> --- > >>> xen/arch/arm/gic-v3-its.c | 70 ++++++++++++++++++++++++------------= --- > >>> 1 file changed, 43 insertions(+), 27 deletions(-) > >>> > >>> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > >>> index 9ba068c46f..00524b43a3 100644 > >>> --- a/xen/arch/arm/gic-v3-its.c > >>> +++ b/xen/arch/arm/gic-v3-its.c > >>> @@ -57,71 +57,87 @@ struct its_device { > >>> */ > >>> struct its_quirk { > >>> const char *desc; > >>> - bool (*init)(struct host_its *hw_its); > >>> uint32_t iidr; > >>> uint32_t mask; > >>> + uint32_t flags; > >>> }; > >>> > >>> static uint32_t __ro_after_init its_quirk_flags; > >>> > >>> -static bool gicv3_its_enable_quirk_gen4(struct host_its *hw_its) > >>> -{ > >>> - its_quirk_flags |=3D HOST_ITS_WORKAROUND_NC_NS | > >>> - HOST_ITS_WORKAROUND_32BIT_ADDR; > >>> - > >>> - return true; > >>> -} > >>> - > >>> static const struct its_quirk its_quirks[] =3D { > >>> { > >>> - .desc =3D "R-Car Gen4", > >>> - .iidr =3D 0x0201743b, > >>> - .mask =3D 0xffffffffU, > >>> - .init =3D gicv3_its_enable_quirk_gen4, > >>> + .desc =3D "R-Car Gen4", > >>> + .iidr =3D 0x0201743b, > >>> + .mask =3D 0xffffffffU, > >>> + .flags =3D HOST_ITS_WORKAROUND_NC_NS | > >>> + HOST_ITS_WORKAROUND_32BIT_ADDR, > >>> }, > >>> { > >>> /* Sentinel. */ > >>> } > >>> }; > >>> > >>> -static struct its_quirk* gicv3_its_find_quirk(uint32_t iidr) > >>> +static const struct its_quirk *gicv3_its_find_quirk(uint32_t iidr) > >>> { > >>> - const struct its_quirk *quirks =3D its_quirks; > >>> + const struct its_quirk *quirk =3D its_quirks; > >>> > >>> - for ( ; quirks->desc; quirks++ ) > >>> + for ( ; quirk->desc; quirk++ ) > >>> { > >>> - if ( quirks->iidr =3D=3D (quirks->mask & iidr) ) > >>> - return (struct its_quirk *)quirks; > >>> + if ( quirk->iidr !=3D (quirk->mask & iidr) ) > >>> + continue; > >>> + > >>> + return quirk; > >>> } > >>> > >>> return NULL; > >>> } > >>> > >>> -static void gicv3_its_enable_quirks(struct host_its *hw_its) > >>> +static uint32_t gicv3_its_collect_quirks(const struct host_its *hw_i= ts, > >>> + const struct its_quirk **ma= tched_quirk) > >>> { > >>> + const struct its_quirk *quirk; > >>> + uint32_t flags =3D 0; > >>> uint32_t iidr =3D readl_relaxed(hw_its->its_base + GITS_IIDR); > >>> - const struct its_quirk *quirk =3D gicv3_its_find_quirk(iidr); > >>> > >>> - if ( quirk && quirk->init(hw_its) ) > >>> + quirk =3D gicv3_its_find_quirk(iidr); > >>> + if ( quirk ) > >>> + flags |=3D quirk->flags; > >>> + > >>> + if ( hw_its->dt_node && > >>> + dt_property_read_bool(hw_its->dt_node, "dma-noncoherent") ) > >>> + flags |=3D HOST_ITS_WORKAROUND_NC_NS; > >>> + > >>> + if ( matched_quirk ) > >>> + *matched_quirk =3D quirk; > >>> + > >>> + return flags; > >>> +} > >>> + > >>> +static void gicv3_its_enable_quirks(struct host_its *hw_its) > >>> +{ > >>> + const struct its_quirk *quirk; > >>> + > >>> + its_quirk_flags =3D gicv3_its_collect_quirks(hw_its, &quirk); > >>> + > >>> + if ( quirk ) > >>> printk("GICv3: enabling workaround for ITS: %s\n", quirk->d= esc); > >>> } > >>> > >>> static void gicv3_its_validate_quirks(void) > >>> { > >>> - const struct its_quirk *quirk =3D NULL, *prev =3D NULL; > >>> + uint32_t quirks, prev_quirks; > >>> const struct host_its *hw_its; > >>> > >>> if ( list_empty(&host_its_list) ) > >>> return; > >>> > >>> hw_its =3D list_first_entry(&host_its_list, struct host_its, en= try); > >>> - prev =3D gicv3_its_find_quirk(readl_relaxed(hw_its->its_base + G= ITS_IIDR)); > >>> + prev_quirks =3D gicv3_its_collect_quirks(hw_its, NULL); > >>> > >>> - list_for_each_entry(hw_its, &host_its_list, entry) > >>> + list_for_each_entry_continue(hw_its, &host_its_list, entry) > >>> { > >>> - quirk =3D gicv3_its_find_quirk(readl_relaxed(hw_its->its_bas= e + GITS_IIDR)); > >>> - BUG_ON(quirk !=3D prev); > >>> - prev =3D quirk; > >>> + quirks =3D gicv3_its_collect_quirks(hw_its, NULL); > >>> + BUG_ON(quirks !=3D prev_quirks); > >> > >> I know it was in the previous version, but as you are already touching > >> this... This is not Xen BUG(). This is a platform problem. So you need > >> to panic here. Something like > >> > >> if (quirks !=3D prev_quirks) > >> panic("Different ITS instances has different quirks") > > > > Ack. > > > > > > I agree that a quirk mismatch is a platform problem. Yes, the current > design uses global flags, making it unable to handle mixed quirks, > leading to the failure on mismatch. > > Please note, I am not saying a panic() is wrong here and I am not > requesting any changes here; I was just wondering why this is handled > differently than the SMMUv3 driver. I am just thinking out loud. > > SMMUv3 driver handles feature mismatches by gracefully degrading. When > it finds an SMMU device that does not support ARM_SMMU_FEAT_COHERENCY, > it disables that feature for the entire platform (so the P2M code has to > clean the cache when updating ptes). It does not panic. How the ITS and > SMMUv3 drivers are different in that regard? Why could not we apply the > same "worst-case" logic here? > For example: > - if any ITS device requires non-cacheable memory, then all ITS memory > allocations should use non-cacheable memory. > - if any ITS device requires 32-bit addresses, then all ITS memory > allocations should be constrained to 32-bits. > > This would be consistent with the SMMU precedent and would allow the > system to boot and function correctly, but with the performance > characteristics of the worst ITS device in the system. > > Or I really missed something? Yes, I think this makes sense. The current series still treats the ITS workaround state as global. Patch 4 only moves the quirk setup earlier, before the LPI tables are allocated. However, the effective flags are still taken from a single ITS instance, and the validation logic still requires all ITS instances to report the same flag set. For the currently supported quirks this is probably too strict. Both HOST_ITS_WORKAROUND_NC_NS and HOST_ITS_WORKAROUND_32BIT_ADDR are conservative restrictions on memory attributes/allocation. Using non-cacheable attributes for all ITS-related allocations, or constraining them to 32-bit addresses, should also be safe for ITS instances that do not require these restrictions. So I agree that the SMMUv3-style worst-case policy is a better fit here. I will rework this in v2 so that Xen aggregates the effective flags from all host ITS instances instead of requiring exact equality. I will also document that this aggregation is only valid for conservative workaround flags. A future non-composable quirk should either remain per-ITS or get explicit validation logic. Thanks for pointing out the SMMUv3 precedent. Best regards, Mykola > > > > > > > > > > > > [snip] From xen-devel-bounces@lists.xenproject.org Mon May 04 05:45:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:45:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299491.1574026 (Exim 4.92) (envelope-from ) id 1wJm7k-0002XU-7y; Mon, 04 May 2026 05:45:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299491.1574026; Mon, 04 May 2026 05:45:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm7k-0002XN-4e; Mon, 04 May 2026 05:45:44 +0000 Received: by outflank-mailman (input) for mailman id 1299491; Mon, 04 May 2026 05:45:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJm7j-0002XH-1f for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:45:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJm7g-00G3qu-No for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:45:42 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8326b-e002-0a2a0a5209dd-0a2a450787fe-36 for ; Mon, 04 May 2026 07:45:42 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f83285-229c-0a2a45070019-d155802cc04b-3 for ; Mon, 04 May 2026 07:45:42 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso31630585e9.2 for ; Sun, 03 May 2026 22:45:41 -0700 (PDT) Received: from ?IPV6:2003:ca:b72b:870a:8d83:125f:d0c4:4383? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260501191028.1250225-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777873542-1625DC48-8DE29D46/0/0 X-purgate-type: clean X-purgate-size: 3177 On 01.05.2026 21:10, Andrew Cooper wrote: > Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Along with regular interrupts, NMIs are a problem. Unlike other cases needing > NMI safety, we can't use a self NMI and callback, as the stack needs to be > empty at the point of enabling Shadow Stacks. > > Disable interrupts, and turn off the watchdog if it's configured. > > Note that watchdog_{en,dis}able() do not work here. They cause the watchdog > NMI to be ignored; they do not inhibit the generation of NMIs. > > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper Reviewed-by: Jan Beulich preferably ... > --- a/xen/arch/x86/setup.c > +++ b/xen/arch/x86/setup.c > @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) > > if ( cpu_has_xen_shstk ) > { > + bool watchdog = (nmi_watchdog == NMI_LOCAL_APIC); > + > + /* > + * Between enabling CET and establishing SSP, any fault or interrupt > + * is fatal. We must arrange for none to happen. ... with a note regarding #MC added here. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 05:49:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 05:49:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299421.1574035 (Exim 4.92) (envelope-from ) id 1wJmBK-0003Ln-Lq; Mon, 04 May 2026 05:49:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299421.1574035; Mon, 04 May 2026 05:49:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmBK-0003Lg-JA; Mon, 04 May 2026 05:49:26 +0000 Received: by outflank-mailman (input) for mailman id 1299421; Mon, 04 May 2026 03:24:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJjvJ-0007UD-0F for xen-devel@lists.xenproject.org; Mon, 04 May 2026 03:24:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJjvH-008I3R-5a for xen-devel@lists.xenproject.org; Mon, 04 May 2026 05:24:43 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f81128-5cb7-0a2a0a5109dd-0a2a4503b54e-44 for ; Mon, 04 May 2026 05:24:42 +0200 Received: from [185.70.43.167] (helo=mail-43167.protonmail.ch) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8117a-672d-0a2a45030019-b9462ba74be5-3 for ; Mon, 04 May 2026 05:24:42 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Subject:Message-ID:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777865082; x=1778124282; bh=n6IY1A1TFjd+nC/H+/Qn+1wFazhEj+IW+F2zlnlaC6A=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=OT0JjJsBw63hd1V8ouI9ocYkxuQIk9ZKyjRFTOxqcMKXwAZpHRxrNILWPQ3l/vxRY iqORFufSNOM+gGuxFXefzt6xNSqBGd2R7TVFmoum1FmKohUOGWgv67upMboM6WUFO+ G0JE+LfpPh1RXO4eEpmJ5t7yQFu99LU/fzWoz32M05GXR+Y/ZZc06sZfNDacaqGswe x6t4L7ZiJK8sqo4EIQuh65qjYzco0ecUMoB14bfy0/0D0LzeIONUsy8MixX0TfF+Rj JyobtkjXUrgsFoD60s3Rka2LVRS7eVMCe96o8XGnEc3fUlQVbMx1QaeM1DLEvzkdke URnYxmyKFqvGg== Date: Mon, 04 May 2026 03:24:40 +0000 To: "xen-devel@lists.xenproject.org" From: "Samuel.Montgomery61" Subject: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 4204f4dcf239f86d163e20ff008378053a34d9f0 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777865082-A2766938-F8C2C498/0/0 X-purgate-type: clean X-purgate-size: 2305 Hello, Xen's boot-time memory scrub is one of the more time-consuming steps during boot, particularly on systems with large amounts of RAM. I'd like to propose skipping it on systems with hardware full-memory encryption (e.g., Intel TME, AMD TSME). These features encrypt all DRAM transparently using an ephemeral key generated by the CPU at each boot. The key is not accessible to software and does not persist across reboots. This means residual data from any previous session where encryption was active is unreadable -- the same property that boot scrubbing exists to provide. The important nuance is that Xen needs to confirm encryption has been continuously active since the last scrub, not just that it is active now. If encryption was only recently enabled in firmware, residual plaintext from prior unencrypted sessions could still be present in pages that were never overwritten. Possible approaches: - Record "encryption active" to an EFI variable each boot; skip the scrub only if the flag is present from the previous boot. - Expose a command-line option for administrators to assert that encryption has been consistently enabled. - Some combination of the two. The optimization would apply only to the cross-reboot case. Runtime scrubbing when domains shut down would be unaffected, since all domains share the same key during a running session. Edge cases worth considering: - Memory written by firmware before encryption activation. - Crash/kexec without a full hardware reset (key may not change). - Suspend/resume (some implementations restore the prior key). - Interaction with existing bootscrub=3D command-line options. As a broader note, multi-key extensions to full-memory encryption (such as those used by AMD SEV and Intel TME-MK) could eventually eliminate the need for runtime scrubbing as well, by giving each domain its own key. This is relevant to the confidential computing work currently underway (Teddy Astie's recent AMD SEV RFC), though the boot-scrub optimization proposed here is independent and much simpler. Feedback welcome on whether the reasoning is sound and whether there are edge cases I've missed. Thanks, Sam ps. I'm not subscribed to the list, so please CC me in replies. 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Sun, 03 May 2026 22:52:32 -0700 (PDT) Message-ID: <48b9dae9-7161-4693-b86b-1448fe79005d@suse.com> Date: Mon, 4 May 2026 07:52:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 4/4] vpci: allow 32-bit BAR writes with memory decoding enabled To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Stewart Hildebrand References: <20260406191203.97662-1-stewart.hildebrand@amd.com> <20260406191203.97662-5-stewart.hildebrand@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777873953-B3762161-8CBFA387/0/0 X-purgate-type: clean X-purgate-size: 2427 On 24.04.2026 10:50, Roger Pau Monné wrote: > On Mon, Apr 06, 2026 at 03:11:58PM -0400, Stewart Hildebrand wrote: >> --- a/xen/drivers/vpci/header.c >> +++ b/xen/drivers/vpci/header.c >> @@ -670,6 +670,7 @@ static void cf_check bar_write( >> { >> struct vpci_bar *bar = data; >> bool hi = false; >> + uint16_t cmd = 0; >> >> ASSERT(is_hardware_domain(pdev->domain)); >> >> @@ -683,19 +684,29 @@ static void cf_check bar_write( >> val &= PCI_BASE_ADDRESS_MEM_MASK; >> >> /* >> - * Xen only cares whether the BAR is mapped into the p2m, so allow BAR >> - * writes as long as the BAR is not mapped into the p2m. >> + * Allow 64-bit BAR writes only when the BAR is not mapped in p2m. Always >> + * allow 32-bit BAR writes. >> */ >> if ( bar->enabled ) >> { >> - /* If the value written is the current one avoid printing a warning. */ >> - if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) >> - gprintk(XENLOG_WARNING, >> - "%pp: ignored BAR %zu write while mapped\n", >> - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); >> - return; >> - } >> + if ( bar->type == VPCI_BAR_MEM32 ) >> + { >> + if ( val == bar->addr ) >> + return; >> >> + cmd = pci_conf_read16(pdev->sbdf, PCI_COMMAND); >> + modify_bars(pdev, cmd, false, false); >> + } >> + else >> + { >> + /* If the value written is the same avoid printing a warning. */ >> + if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) >> + gprintk(XENLOG_WARNING, >> + "%pp: ignored BAR %zu write while mapped\n", >> + &pdev->sbdf, bar - pdev->vpci->header.bars + hi); >> + return; >> + } >> + } >> >> /* >> * Update the cached address, so that when memory decoding is enabled >> @@ -715,6 +726,9 @@ static void cf_check bar_write( >> } >> >> pci_conf_write32(pdev->sbdf, reg, val); > > I don't think it matters a lot, but here we are changing the position > of the BAR in the host memory map while the mappings are still active. It would matter if the original address space could be re-used for another purpose while those mappings are still there? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 06:34:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 06:34:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299517.1574053 (Exim 4.92) (envelope-from ) id 1wJmsF-0001tH-Bo; Mon, 04 May 2026 06:33:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299517.1574053; Mon, 04 May 2026 06:33:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmsF-0001tA-8H; Mon, 04 May 2026 06:33:47 +0000 Received: by outflank-mailman (input) for mailman id 1299517; Mon, 04 May 2026 06:33:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJmsD-0001sl-Sm for xen-devel@lists.xenproject.org; Mon, 04 May 2026 06:33:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJmsC-000pKi-Et for xen-devel@lists.xenproject.org; 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Sun, 03 May 2026 23:33:43 -0700 (PDT) MIME-Version: 1.0 References: <6b78dcf3-7e4c-4568-a0fd-58d5c860e4fa@gmail.com> In-Reply-To: <6b78dcf3-7e4c-4568-a0fd-58d5c860e4fa@gmail.com> From: Mykola Kvach Date: Mon, 4 May 2026 09:33:32 +0300 X-Gm-Features: AVHnY4K0n5-M1EGmt3OlTmRiQa2Or5e4EMXWv7ABjjvb9VOrLd6oBZjuvaFxXlQ Message-ID: Subject: Re: [PATCH 4/4] xen/arm: its: pre-initialize ITS quirks before LPI setup To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1777876424-310493FF-9C9D6481/0/0 X-purgate-type: clean X-purgate-size: 8981 Hi Oleksandr, Thank you for the review. On Tue, Apr 28, 2026 at 7:31=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 3/25/26 12:38, Mykola Kvach wrote: > > Hello Mykola > > > From: Mykola Kvach > > > > In the current initialization flow, gicv3_init() calls gicv3_dist_init(= ) > > before gicv3_its_init(). > > > > When LPIs are supported, gicv3_dist_init() calls > > gicv3_lpi_init_host_lpis(), which initializes host LPI state and alloca= tes > > the boot CPU pending table before ITS quirk flags are computed. Non-boo= t > > CPUs allocate their pending tables later from the CPU_UP_PREPARE notifi= er, > > while redistributor LPI programming happens separately in > > gicv3_lpi_init_rdist(). > > > > This means the boot CPU LPI setup can observe default ITS memory attrib= utes > > before dma-noncoherent and other ITS quirks are applied. > > > > Introduce gicv3_its_preinit() and call it before gicv3_dist_init(). Thi= s > > keeps the actual ITS hardware initialization in gicv3_its_init(), but m= oves > > ITS discovery, quirk validation and quirk flag setup early enough for t= he > > subsequent LPI initialization to use the correct attributes. > > > Have you considered an alternative approach that might be less invasive? > I am thinking of something the other way around: perhaps we could > allocate the LPI pending table for the boot CPU later. > > Would a diff below work? > > > --- > xen/arch/arm/gic-v3-lpi.c | 9 +++++++++ > xen/arch/arm/gic-v3.c | 2 ++ > xen/arch/arm/include/asm/gic_v3_its.h | 6 ++++++ > 3 files changed, 17 insertions(+) > > diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c > index 9ee338edc2..61cc45d347 100644 > --- a/xen/arch/arm/gic-v3-lpi.c > +++ b/xen/arch/arm/gic-v3-lpi.c > @@ -450,6 +450,15 @@ int gicv3_lpi_init_host_lpis(unsigned int > host_lpi_bits) > > printk("GICv3: using at most %lu LPIs on the host.\n", > MAX_NR_HOST_LPIS); > > + return rc; > +} > + > +int gicv3_lpi_post_init_host_lpis(void) > +{ > + int rc; > + > + ASSERT(smp_processor_id() =3D=3D 0); > + > /* Register the CPU notifier and allocate memory for the boot CPU *= / > register_cpu_notifier(&cpu_nfb); > rc =3D gicv3_lpi_allocate_pendtable(smp_processor_id()); > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 7f365cdbe9..8b9059c5c9 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -1981,6 +1981,8 @@ static int __init gicv3_init(void) > res =3D gicv3_its_init(); > if ( res ) > panic("GICv3: ITS: initialization failed: %d\n", res); > + > + gicv3_lpi_post_init_host_lpis(); > } > > res =3D gicv3_cpu_init(); > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h > b/xen/arch/arm/include/asm/gic_v3_its.h > index fc5a84892c..288cc1d42f 100644 > --- a/xen/arch/arm/include/asm/gic_v3_its.h > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > @@ -156,6 +156,7 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base); > > /* Initialize the host structures for LPIs and the host ITSes. */ > int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits); > +int gicv3_lpi_post_init_host_lpis(void); > int gicv3_its_init(void); > > /* Store the physical address and ID for each redistributor as read > from DT. */ > @@ -245,6 +246,11 @@ static inline int gicv3_lpi_init_host_lpis(unsigned > int host_lpi_bits) > return 0; > } > > +static inline int gicv3_lpi_post_init_host_lpis(void) > +{ > + return 0; > +} > + > static inline int gicv3_its_init(void) > { > return 0; Yes, I think this direction is better and less invasive. Thank you for the suggestion. Best regards, Mykola > -- > 2.34.1 > > > > > > Signed-off-by: Mykola Kvach > > --- > > TODO: Think about separating Redistributor/LPI attributes from ITS. > > --- > > xen/arch/arm/gic-v3-its.c | 36 +++++++++++++++++---------= - > > xen/arch/arm/gic-v3.c | 7 ++++++ > > xen/arch/arm/include/asm/gic_v3_its.h | 5 ++++ > > 3 files changed, 35 insertions(+), 13 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index ee432088cd..0251d91630 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -63,6 +63,7 @@ struct its_quirk { > > uint32_t flags; > > }; > > > > +/* TODO: Separate Redistributor/LPI attributes from ITS quirks. */ > > static uint32_t __ro_after_init its_quirk_flags; > > > > static bool gicv3_its_match_quirk_gen4(const struct host_its *hw_its) > > @@ -148,9 +149,15 @@ static uint32_t gicv3_its_collect_quirks(const str= uct host_its *hw_its, > > return flags; > > } > > > > -static void gicv3_its_enable_quirks(struct host_its *hw_its) > > +static void gicv3_its_enable_quirks(void) > > { > > const struct its_quirk *quirk; > > + const struct host_its *hw_its; > > + > > + if ( list_empty(&host_its_list) ) > > + return; > > + > > + hw_its =3D list_first_entry(&host_its_list, struct host_its, entry= ); > > > > its_quirk_flags =3D gicv3_its_collect_quirks(hw_its, &quirk); > > > > @@ -603,16 +610,10 @@ static int gicv3_its_init_single_its(struct host_= its *hw_its) > > uint64_t reg; > > int i, ret; > > > > - hw_its->its_base =3D ioremap_nocache(hw_its->addr, hw_its->size); > > - if ( !hw_its->its_base ) > > - return -ENOMEM; > > - > > ret =3D gicv3_disable_its(hw_its); > > if ( ret ) > > return ret; > > > > - gicv3_its_enable_quirks(hw_its); > > - > > reg =3D readq_relaxed(hw_its->its_base + GITS_TYPER); > > hw_its->devid_bits =3D GITS_TYPER_DEVICE_ID_BITS(reg); > > hw_its->evid_bits =3D GITS_TYPER_EVENT_ID_BITS(reg); > > @@ -1161,6 +1162,11 @@ static void add_to_host_its_list(paddr_t addr, p= addr_t size, > > its_data->size =3D size; > > its_data->dt_node =3D node; > > > > + its_data->its_base =3D ioremap_nocache(its_data->addr, its_data->s= ize); > > + if ( !its_data->its_base ) > > + panic("GICv3: Cannot map ITS frame: 0x%lx, 0x%lx\n", > > + its_data->addr, its_data->size); > > + > > printk("GICv3: Found ITS @0x%lx\n", addr); > > > > list_add_tail(&its_data->entry, &host_its_list); > > @@ -1238,16 +1244,22 @@ static void gicv3_its_acpi_init(void) > > > > #endif > > > > -int gicv3_its_init(void) > > +void __init gicv3_its_preinit(void) > > { > > - struct host_its *hw_its; > > - int ret; > > - > > if ( acpi_disabled ) > > gicv3_its_dt_init(dt_interrupt_controller); > > else > > gicv3_its_acpi_init(); > > > > + gicv3_its_validate_quirks(); > > + gicv3_its_enable_quirks(); > > +} > > + > > +int gicv3_its_init(void) > > +{ > > + struct host_its *hw_its; > > + int ret; > > + > > list_for_each_entry(hw_its, &host_its_list, entry) > > { > > ret =3D gicv3_its_init_single_its(hw_its); > > @@ -1255,8 +1267,6 @@ int gicv3_its_init(void) > > return ret; > > } > > > > - gicv3_its_validate_quirks(); > > - > > return 0; > > } > > > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index bc07f97c16..6e44d23d64 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -1974,6 +1974,13 @@ static int __init gicv3_init(void) > > > > spin_lock(&gicv3.lock); > > > > + if ( gic_dist_supports_lpis() ) > > + /* > > + * Apply ITS quirks before gicv3_dist_init() sets up host LPIs= , > > + * so pending tables use the correct ITS memory attributes. > > + */ > > + gicv3_its_preinit(); > > + > > gicv3_dist_init(); > > > > if ( gic_dist_supports_lpis() ) > > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/inclu= de/asm/gic_v3_its.h > > index fc5a84892c..e1d7522ea5 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_its.h > > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > > @@ -156,6 +156,7 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base)= ; > > > > /* Initialize the host structures for LPIs and the host ITSes. */ > > int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits); > > +void gicv3_its_preinit(void); > > int gicv3_its_init(void); > > > > /* Store the physical address and ID for each redistributor as read f= rom DT. */ > > @@ -219,6 +220,10 @@ static inline int gicv3_its_deny_access(struct dom= ain *d) > > return 0; > > } > > > > +static inline void gicv3_its_preinit(void) > > +{ > > +} > > + > > static inline bool gicv3_its_host_has_its(void) > > { > > return false; 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Sun, 03 May 2026 23:46:26 -0700 (PDT) MIME-Version: 1.0 References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> In-Reply-To: From: Mykola Kvach Date: Mon, 4 May 2026 09:46:15 +0300 X-Gm-Features: AVHnY4Jw3kqRt7TJitevrk3OlcM1c5n1EjC3wDuFDI48sg8R8MMzH8eUCqfFhW4 Message-ID: Subject: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: Bertrand Marquis Cc: Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777877187-83563161-A7876D74/0/0 X-purgate-type: clean X-purgate-size: 8388 Hi all, Gentle ping on this patch. Bertrand has re-confirmed his Reviewed-by, and the previous discussion looks resolved from my side. Could this be picked up if there are no remaining concerns? Best regards, Mykola On Thu, Apr 23, 2026 at 8:13=E2=80=AFAM Mykola Kvach wrote: > > Hi Bertrand, > > On Wed, Apr 15, 2026 at 3:31=E2=80=AFPM Bertrand Marquis > wrote: > > > > Hi Jan and Mykola, > > > > > On 1 Apr 2026, at 14:24, Jan Beulich wrote: > > > > > > On 01.04.2026 11:51, Mykola Kvach wrote: > > >> On Wed, Apr 1, 2026 at 12:22=E2=80=AFPM Jan Beulich wrote: > > >>> On 01.04.2026 10:49, Mykola Kvach wrote: > > >>>> On Wed, Apr 1, 2026 at 11:14=E2=80=AFAM Jan Beulich wrote: > > >>>>> On 01.04.2026 09:13, Mykola Kvach wrote: > > >>>>>> On Wed, Apr 1, 2026 at 9:29=E2=80=AFAM Jan Beulich wrote: > > >>>>>>> On 31.03.2026 20:31, Mykola Kvach wrote: > > >>>>>>>> From: Mykola Kvach > > >>>>>>>> > > >>>>>>>> SMCCC DEN0028G, section 3.1, states that for AArch64 SMC/HVC c= alls > > >>>>>>>> using Wn, only the least significant 32 bits are significant a= nd the > > >>>>>>>> upper 32 bits must be ignored by the implementation. > > >>>>>>>> > > >>>>>>>> So for SMC32 PSCI calls, Xen must not treat non-zero upper bit= s in the > > >>>>>>>> argument registers as an error. Instead, they should be discar= ded when > > >>>>>>>> decoding the arguments. > > >>>>>>>> > > >>>>>>>> Arm ARM DDI 0487J.a (D1-5406) also notes that the upper 32 bit= s may be > > >>>>>>>> implementation defined when entering from AArch32. Xen zeros t= hem on > > >>>>>>>> entry, but that guarantee is only relevant for 32-bit domains. > > >>>>>>>> > > >>>>>>>> Update PSCI v0.2+ CPU_ON, CPU_SUSPEND, AFFINITY_INFO and SYSTE= M_SUSPEND > > >>>>>>>> to read SMC32 arguments via PSCI_ARG32(), while keeping the SM= C64 > > >>>>>>>> handling unchanged. > > >>>>>>>> > > >>>>>>>> No functional change is intended for PSCI 0.1. > > >>>>>>>> > > >>>>>>>> Suggested-by: Julien Grall > > >>>>>>>> Signed-off-by: Mykola Kvach > > >>>>>>>> Reviewed-by: Bertrand Marquis > > >>>>>>> > > >>>>>>> I thought I might as well include this in my next commit sweep,= but isn't > > >>>>>>> this R-b being invalidated by ... > > >>>>>>> > > >>>>>>>> --- > > >>>>>>>> v3: > > >>>>>>>> - use PSCI_ARG_CONV for SYSTEM_SUSPEND > > >>>>>>> > > >>>>>>> ... this change. That's ... > > >>>>>>> > > >>>>>>>> @@ -422,14 +427,8 @@ bool do_vpsci_0_2_call(struct cpu_user_re= gs *regs, uint32_t fid) > > >>>>>>>> case PSCI_1_0_FN32_SYSTEM_SUSPEND: > > >>>>>>>> case PSCI_1_0_FN64_SYSTEM_SUSPEND: > > >>>>>>>> { > > >>>>>>>> - register_t epoint =3D PSCI_ARG(regs, 1); > > >>>>>>>> - register_t cid =3D PSCI_ARG(regs, 2); > > >>>>>>>> - > > >>>>>>>> - if ( fid =3D=3D PSCI_1_0_FN32_SYSTEM_SUSPEND ) > > >>>>>>>> - { > > >>>>>>>> - epoint &=3D GENMASK(31, 0); > > >>>>>>>> - cid &=3D GENMASK(31, 0); > > >>>>>>>> - } > > >>>>>>>> + register_t epoint =3D PSCI_ARG_CONV(regs, 1, is_conv_= 64); > > >>>>>>>> + register_t cid =3D PSCI_ARG_CONV(regs, 2, is_conv_64)= ; > > >>>>>>>> > > >>>>>>>> perfc_incr(vpsci_system_suspend); > > >>>>>>>> PSCI_SET_RESULT(regs, do_psci_1_0_system_suspend(epoin= t, cid)); > > >>>>>>> > > >>>>>>> ... this hunk aiui, which is far from merely cosmetic imo. Whil= e > > >>>>>> > > >>>>>> Nobody said that the change had to be purely cosmetic in order t= o keep > > >>>>>> the tag. I understood it differently from the official Xen > > >>>>>> documentation pages. > > >>>>>> > > >>>>>>> behavior looks to remain the same for PSCI_1_0_FN32_SYSTEM_SUSP= END, it > > >>>>>> > > >>>>>> Exactly. If the changes are not substantial, I do not see a reas= on to > > >>>>>> drop the tag ... > > >>>>>> > > >>>>>>> clearly changes for PSCI_1_0_FN64_SYSTEM_SUSPEND. That may be i= ntended > > >>>>>>> and for the better, but the change clearly wasn't reviewed by B= ertrand, > > >>>>>>> nor - when offering the R-b - did he ask for this extra change. > > >>>>>> > > >>>>>> ... and this is also how I understood the Xen patch submission > > >>>>>> guidelines [1], which say: > > >>>>>> > > >>>>>> "Note that if there are several revisions of a patch, you ought = to > > >>>>>> copy tags that have accumulated during the review. For example, = if > > >>>>>> person A and person B added a Reviewed-by: tag to v1 of your pat= ch, > > >>>>>> include it into v2 of your patch. If you make substantial change= s > > >>>>>> after certain tags were already applied, you will want to consid= er > > >>>>>> which ones are no longer applicable (and may require re-providin= g)." > > >>>>>> > > >>>>>> So my understanding was that tags should normally be kept across > > >>>>>> revisions, unless the changes are substantial enough to make the= m no > > >>>>>> longer applicable. > > >>>>> > > >>>>> Maybe our understanding of "substantial" differs. To me that's an= ything > > >>>>> changing functionality. Style adjustments, typo corrections, and = alike > > >>>>> generally aren't substantial (albeit even then there may be excep= tions). > > >>>> > > >>>> Thanks for clarifying what you consider substantial. > > >>>> > > >>>> Even under that interpretation, I do not see a functionality chang= e > > >>>> here. "Refactoring" seems like the more accurate term in this case= : > > >>>> the internal form changes, but the intended external behavior does > > >>>> not. > > >>>> > > >>>> It may be that we are using "functional change" in slightly differ= ent > > >>>> senses here. > > >>>> > > >>>> For v3, the switch to PSCI_ARG_CONV() in SYSTEM_SUSPEND was meant = to > > >>>> make this case consistent with the helper-based argument decoding = used > > >>>> elsewhere, not to change behavior. > > >>>> > > >>>> In particular, I do not see a functional change for > > >>>> PSCI_1_0_FN64_SYSTEM_SUSPEND: v2 used PSCI_ARG(regs, 1/2), and in = v3 > > >>>> PSCI_ARG_CONV(regs, 1/2, is_conv_64) should resolve to the same th= ing > > >>>> when is_conv_64 is true. > > >>> > > >>> Isn't the whole point of the patch to alter behavior when is_conv_6= 4 is > > >>> false? For that case PSCI_1_0_FN64_SYSTEM_SUSPEND behavior looks to > > >>> change in v3, when it didn't in v2. Whereas for > > >>> PSCI_1_0_FN32_SYSTEM_SUSPEND the v3 change indeed only eliminates o= pen- > > >>> coding, which one may or may not regard as "substantial". > > >> > > >> I think the point I was trying to make is slightly narrower: in this > > >> code path, is_conv_64 is derived directly from fid via > > >> smccc_is_conv_64(fid) before the switch (fid). > > >> > > >> So for PSCI_1_0_FN64_SYSTEM_SUSPEND, I do not see how > > >> is_conv_64 =3D=3D false could arise here: if we are in the FN64 case= , > > >> the function ID already encodes the 64-bit convention. > > >> > > >> Conversely, if is_conv_64 is false here, then this cannot be the > > >> FN64 case. > > > > > > Ah, I see. To figure that out, I would have had to do a proper review= . I > > > was after committing only, which ought to be an entirely mechanical s= tep. > > > > > >> On that basis, I do not see a behavioral change for the FN64 > > >> SYSTEM_SUSPEND case in v3. > > > > > > I agree (now). I'm still not going to pick up that patch, but rather > > > leave it to the Arm maintainers. While not as clear cut as it first > > > seemed to me, I still consider it within the grey area. > > > > Sorry for the delay, this felt through in my filters as it was reviewed= -by already. > > > > I am ok with the changes done which make sense (mask is now done > > directly). > > > > Reviewed-by: Bertrand Marquis > > Thank you for taking another look. > > With your Reviewed-by in place, and since I do not expect any further > changes from my side, I believe this patch should now be ready for the > Arm maintainers to pick up. > > Best regards, > Mykola > > > > > Cheers > > Bertrand > > > > > > > > Jan > > > > From xen-devel-bounces@lists.xenproject.org Mon May 04 06:50:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 06:50:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299532.1574071 (Exim 4.92) (envelope-from ) id 1wJn8R-0005Fo-U8; Mon, 04 May 2026 06:50:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299532.1574071; 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bh=QpqUjFKiK1Aqh68TRvb9+tr1IbfG89bWxVthJX3f/vw=; b=Zt2CVqZDej5B2kEaS7JSH9WTvKYmijBFR0TBxucgBZV+zbShC3ZLDIVwYYF1sLUgqVd9gWQbq2uQk8i5YemqvbBOVdOmoMnDhbRM3IWS7H9DlgCBWx24UUvNyRns2yik1umcjbnKd8FFEDKiz7dc72guySrcoL1xa3n4NLzOaVs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 4 May 2026 08:50:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: Mykola Kvach , Bertrand Marquis CC: Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 9YbTnO57pNUKr9fEwJZkFjQ6xtvlPMjdrE+nHHvIT9uedPa358n6B5suqnaVbBV9ea3WrONUGMD4BCbzVJZQ4+PL5UX8hqSZ2nkr9kN/63CSy5fR3xoxwby/h80AKN/q8LT0TX9B/MhRS056NEZtWlV07YVR3VDKVK2OIw0JbvhHSnEMIWhek8hjgmh7eK4ByMvI8DDn7yZTjRdfUr0SoQXuSXYjKl3MQXa6z6fFIQaAV3eFqYa+owkkFqlckUzvzc7XVAZ7vo3rdjXQWKbjuPF0mEiA0SEoLngetjDifB/CTTuayjeA+gwlQ19OzMdqCtNm4t2sO/ExH4eE10cFVDz6RAzf3KPLJtT1rEg/Sx7uLq5OWU8G3o3k9umowP4CVckCX4kXgWO4K4GpkMle7xfGe73FfHbFIco3WSLswJ6GJ85mp+xCHdvmLBzpWQiO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 06:50:18.5858 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 958da7ae-83f7-4302-13a3-08dea9a967ae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MW1PEPF00016160.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB9018 X-purgate-ID: tlsNG-ef75cf/1777877428-14E57C48-02439D3C/0/0 X-purgate-type: clean X-purgate-size: 306 On 04-May-26 08:46, Mykola Kvach wrote: > Hi all, > > Gentle ping on this patch. > > Bertrand has re-confirmed his Reviewed-by, and the previous discussion > looks resolved from my side. > > Could this be picked up if there are no remaining concerns? Yes, I'll merge it soon. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 07:19:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 07:19:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299539.1574080 (Exim 4.92) (envelope-from ) id 1wJnag-0008OT-4r; Mon, 04 May 2026 07:19:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299539.1574080; Mon, 04 May 2026 07:19:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJnag-0008OM-1W; Mon, 04 May 2026 07:19:42 +0000 Received: by outflank-mailman (input) for mailman id 1299539; Mon, 04 May 2026 07:19:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJnae-0008OG-Vi for xen-devel@lists.xenproject.org; Mon, 04 May 2026 07:19:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJnad-007kx3-Ri for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <50371416-8acf-4204-ae83-469602037e60@amd.com> Date: Mon, 4 May 2026 09:19:30 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: Mykola Kvach CC: , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015CD:EE_|DS4PR12MB9771:EE_ X-MS-Office365-Filtering-Correlation-Id: 59aa99fa-7128-43a9-4aea-08dea9ad7e0d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: kRyGOyf2rERRCssi91P9KbU0RTlPanteEf9TN3gn/ko6zabSWtuneieBkR24uLPGkNwokqlnQkGasC4DVA8hqQqcgRCLop02DoA3i79A4V4ucd2ICslhEbVOlywGDlY4AErJdJuFKv9wFhJ5MHKiZ9p+W72uk2XrA3gPgajran8aFjKeDoFQgHbc/3jtnM9UAF9myxUDZQljve3yOQ0EPw+6SkZS5xZIunlGzvdB3GhYa4rY57lZrRmjhlekzunYwGwqTdgF7haBdEvLynLl7zbz4mrXMO0vCdgw8iPtA3C7DE5M+sWNAKnNNyTlXWvEDg8TuSSy0YxnC4LALhnBHIn5yHNbt39gTK6/nQCWIn/f+GttkEJKMj1SO++2YYvPjwShsmRP29z4jSKBfrM/H18Wi+y4tXxFZFqQjIaqc/FYeaRbtf9gRMeEXYAfpdTf X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 07:19:34.1671 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 59aa99fa-7128-43a9-4aea-08dea9ad7e0d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS4PR12MB9771 X-purgate-ID: tlsNG-ef75cf/1777879179-14856C48-F4DB32A1/0/0 X-purgate-type: clean X-purgate-size: 6351 On 01-May-26 09:22, Mykola Kvach wrote: > Hi Michal, > > On Wed, Apr 29, 2026 at 11:20 AM Orzel, Michal wrote: >> >> >> >> On 28-Apr-26 13:57, Mykola Kvach wrote: >>> From: Mykola Kvach >>> >>> The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. >>> >>> Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable >>> bits selects bypass rather than deasserted interrupt outputs when the >>> CPU interface stops driving them. Tables 2-2 and 2-3 show that a zeroed >>> GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully >>> disabling the interface. >>> >>> Fix this by reading GICC_CTLR, then setting the bypass-disable bits and >>> clearing the group-enable bits that are architecturally defined for the >>> current GICC_CTLR view before writing the value back. When Security >>> Extensions are implemented Xen accesses the Non-secure copy of >>> GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] and >>> bits [8:7] are reserved. >>> >>> Without Security Extensions there is no separate Secure/Non-secure CPU >>> interface view, so disabling both group-enable bits affects the shared >>> interface state. This is still appropriate for the CPU shutdown path, >>> which is expected to stop normal interrupt delivery through the interface >>> and rely only on the architecturally separate wakeup event signaling. >>> >>> Section 2.3.2 also states that wakeup event signals remain available >>> even when both GIC interrupt signaling and interrupt bypass are >>> disabled, so disabling bypass does not break the power-management use >>> case, i.e. suspend modes. >>> >>> Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") >>> Signed-off-by: Mykola Kvach >>> >>> --- >>> Changes in v2: >>> - derive the shutdown masks from the active GICC_CTLR layout >>> - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is set >>> - stop writing reserved bits [8:7] on Security Extensions systems >>> --- >>> xen/arch/arm/gic-v2.c | 16 +++++++++++++++- >>> xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- >>> 2 files changed, 38 insertions(+), 3 deletions(-) >>> >>> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c >>> index 014f955967..241c1ff5c5 100644 >>> --- a/xen/arch/arm/gic-v2.c >>> +++ b/xen/arch/arm/gic-v2.c >>> @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) >>> >>> static void gicv2_cpu_disable(void) >>> { >>> - writel_gicc(0x0, GICC_CTLR); >>> + uint32_t ctlr = readl_gicc(GICC_CTLR); >>> + >>> + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) >>> + { >>> + ctlr |= GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; >>> + ctlr &= ~GICC_CTL_ENABLE; >>> + } >>> + else >>> + { >>> + ctlr |= GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | >>> + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; >>> + ctlr &= ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); >>> + } >> I don't understand why you want to set both G0 and G1, >> Bits 5-6 in the NS view control Group 1, while the same bits in the >> Secure/single-security-state view control Group 0. So in the latter case you >> don't need to set G1. Without security extensions all interrupts are G0 and with >> security extensions (NS access) all interrupts are G1. The spec guarantees the >> functional mapping. > > I agree that this is not about Xen using both interrupt groups during > normal operation. > > There are two separate points here. > > For the group-enable bits, Xen currently only enables bit 0 in > gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be clear > already. However, the old shutdown path wrote 0 to GICC_CTLR, which also > cleared every group-enable bit visible in the current view. Since this > patch changes the shutdown path from a plain zero write to a > read/modify/write, I wanted to preserve that part of the old shutdown > semantics and avoid leaving any normal interrupt delivery enabled in the > common GICC_CTLR view. > > For the bypass-disable bits, the reason for setting both groups in the > single-security-state/common view is the GICv2 bypass logic, not normal > interrupt delivery. Once the group-enable bits are clear, the CPU > interface is no longer driving the physical IRQ/FIQ outputs through > normal GIC delivery. At that point, the bypass-disable bits decide > whether those outputs are deasserted or driven by the legacy inputs. > > For example, with EnableGrp1 == 0, EnableGrp0 == 0 and FIQEn == 0, > Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be > deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and > FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is why > the common-view case disables the bypass paths for both groups. > > This is also not meant to make FIQ a supported delivery mode for Xen. It > is the opposite: when the CPU interface is disabled, the final state > should not allow the physical FIQ output to be driven by the legacy > bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but Xen > does not configure FIQ as its normal GICv2 interrupt delivery mode. > > So the intent is: > > * with Security Extensions, touch only the Non-secure view bits visible > to Xen; > * without Security Extensions, preserve the old "no normal delivery" > shutdown behaviour, while changing the bypass-disable bits so that > the physical outputs are deasserted rather than falling back to > legacy bypass. > > If you prefer, I can also make v3 more conservative and only clear the > group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. > EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The > bypass-disable bits would still be set for all bypass paths visible in > the current GICC_CTLR view, because that part is about the physical > IRQ/FIQ outputs after normal delivery has been disabled, not about which > interrupt group Xen normally uses. The bypass argument is valid according to the tables. However, clearing G1 is unnecessary, so it should be dropped. I can do that on commit if you agree. With that: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 08:08:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:08:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299554.1574089 (Exim 4.92) (envelope-from ) id 1wJoLw-0006lQ-Qc; Mon, 04 May 2026 08:08:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299554.1574089; Mon, 04 May 2026 08:08:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoLw-0006lJ-NI; Mon, 04 May 2026 08:08:32 +0000 Received: by outflank-mailman (input) for mailman id 1299554; Mon, 04 May 2026 08:08:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoLu-0006lD-Vo for xen-devel@lists.xenproject.org; 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Mon, 04 May 2026 01:08:28 -0700 (PDT) MIME-Version: 1.0 References: <5b16e00e-9a4d-4a18-8a5e-dde10b42a043@suse.com> <5fb9b5ee-ee71-49ec-b545-62c8ec27fc15@suse.com> <425cdc68-5e25-4e01-b5d9-6469e2d08abb@suse.com> In-Reply-To: From: Mykola Kvach Date: Mon, 4 May 2026 11:08:16 +0300 X-Gm-Features: AVHnY4LhPAhpglB-N2_E_vD6t5WrzzH982qcwDTAGw6WmvSp3NvoeRqEQ-55FkM Message-ID: Subject: Re: Ping: Re: [PATCH v3] xen/arm: vpsci: ignore upper 32 bits for SMC32 PSCI arguments To: "Orzel, Michal" Cc: Bertrand Marquis , Jan Beulich , Mykola Kvach , Stefano Stabellini , Julien Grall , Volodymyr Babchuk , "xen-devel@lists.xenproject.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777882109-890CF161-736875D4/0/0 X-purgate-type: clean X-purgate-size: 507 Hi Michal, On Mon, May 4, 2026 at 9:50=E2=80=AFAM Orzel, Michal = wrote: > > > > On 04-May-26 08:46, Mykola Kvach wrote: > > Hi all, > > > > Gentle ping on this patch. > > > > Bertrand has re-confirmed his Reviewed-by, and the previous discussion > > looks resolved from my side. > > > > Could this be picked up if there are no remaining concerns? > Yes, I'll merge it soon. Thank you for the update. Much appreciated. Best regards, Mykola > > ~Michal > From xen-devel-bounces@lists.xenproject.org Mon May 04 08:10:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:10:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299563.1574098 (Exim 4.92) (envelope-from ) id 1wJoNi-0008GI-BA; Mon, 04 May 2026 08:10:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299563.1574098; Mon, 04 May 2026 08:10:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoNi-0008GB-7Y; Mon, 04 May 2026 08:10:22 +0000 Received: by outflank-mailman (input) for mailman id 1299563; Mon, 04 May 2026 08:10:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoNh-0008G2-5q for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:10:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoNg-007wsD-HL for xen-devel@lists.xenproject.org; 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Mon, 04 May 2026 01:10:19 -0700 (PDT) MIME-Version: 1.0 References: <18c5532816d852fca073d0552dcb6d497730a6c2.1777377278.git.mykola_kvach@epam.com> <59548223-99d7-4a11-ac81-39eee6474562@amd.com> <50371416-8acf-4204-ae83-469602037e60@amd.com> In-Reply-To: <50371416-8acf-4204-ae83-469602037e60@amd.com> From: Mykola Kvach Date: Mon, 4 May 2026 11:10:08 +0300 X-Gm-Features: AVHnY4Lvp0A6YNCsGb-A6_HyiVqwRT8cWgHeDvY8l6NPOxpz4IfcSc588mOX25k Message-ID: Subject: Re: [PATCH v2] xen/arm: gic-v2: disable interrupt bypass on CPU shutdown To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1777882220-39161DB1-4FD0F04A/0/0 X-purgate-type: clean X-purgate-size: 6971 On Mon, May 4, 2026 at 10:19=E2=80=AFAM Orzel, Michal wrote: > > > > On 01-May-26 09:22, Mykola Kvach wrote: > > Hi Michal, > > > > On Wed, Apr 29, 2026 at 11:20=E2=80=AFAM Orzel, Michal wrote: > >> > >> > >> > >> On 28-Apr-26 13:57, Mykola Kvach wrote: > >>> From: Mykola Kvach > >>> > >>> The GICv2 CPU shutdown path currently writes 0 to GICC_CTLR. > >>> > >>> Per IHI0048B.b section 2.3.1, clearing the architected bypass-disable > >>> bits selects bypass rather than deasserted interrupt outputs when the > >>> CPU interface stops driving them. Tables 2-2 and 2-3 show that a zero= ed > >>> GICC_CTLR can fall back to the legacy IRQ/FIQ inputs instead of fully > >>> disabling the interface. > >>> > >>> Fix this by reading GICC_CTLR, then setting the bypass-disable bits a= nd > >>> clearing the group-enable bits that are architecturally defined for t= he > >>> current GICC_CTLR view before writing the value back. When Security > >>> Extensions are implemented Xen accesses the Non-secure copy of > >>> GICC_CTLR, where IRQBypDisGrp1 and FIQBypDisGrp1 are at bits [6:5] an= d > >>> bits [8:7] are reserved. > >>> > >>> Without Security Extensions there is no separate Secure/Non-secure CP= U > >>> interface view, so disabling both group-enable bits affects the share= d > >>> interface state. This is still appropriate for the CPU shutdown path, > >>> which is expected to stop normal interrupt delivery through the inter= face > >>> and rely only on the architecturally separate wakeup event signaling. > >>> > >>> Section 2.3.2 also states that wakeup event signals remain available > >>> even when both GIC interrupt signaling and interrupt bypass are > >>> disabled, so disabling bypass does not break the power-management use > >>> case, i.e. suspend modes. > >>> > >>> Fixes: 5e40a1b4351e ("arm: SMP CPU shutdown") > >>> Signed-off-by: Mykola Kvach > >>> > >>> --- > >>> Changes in v2: > >>> - derive the shutdown masks from the active GICC_CTLR layout > >>> - use the Non-secure GICC_CTLR layout when GICD_TYPER.SecurityExtn is= set > >>> - stop writing reserved bits [8:7] on Security Extensions systems > >>> --- > >>> xen/arch/arm/gic-v2.c | 16 +++++++++++++++- > >>> xen/arch/arm/include/asm/gic.h | 25 +++++++++++++++++++++++-- > >>> 2 files changed, 38 insertions(+), 3 deletions(-) > >>> > >>> diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > >>> index 014f955967..241c1ff5c5 100644 > >>> --- a/xen/arch/arm/gic-v2.c > >>> +++ b/xen/arch/arm/gic-v2.c > >>> @@ -408,7 +408,21 @@ static void gicv2_cpu_init(void) > >>> > >>> static void gicv2_cpu_disable(void) > >>> { > >>> - writel_gicc(0x0, GICC_CTLR); > >>> + uint32_t ctlr =3D readl_gicc(GICC_CTLR); > >>> + > >>> + if ( readl_gicd(GICD_TYPER) & GICD_TYPE_SEC ) > >>> + { > >>> + ctlr |=3D GICC_NS_CTLR_BYPASS_DISABLE_GRP1_MASK; > >>> + ctlr &=3D ~GICC_CTL_ENABLE; > >>> + } > >>> + else > >>> + { > >>> + ctlr |=3D GICC_CTLR_BYPASS_DISABLE_GRP0_MASK | > >>> + GICC_CTLR_BYPASS_DISABLE_GRP1_MASK; > >>> + ctlr &=3D ~(GICC_CTL_ENABLE | GICC_CTL_ENABLE_GRP1); > >>> + } > >> I don't understand why you want to set both G0 and G1, > >> Bits 5-6 in the NS view control Group 1, while the same bits in the > >> Secure/single-security-state view control Group 0. So in the latter ca= se you > >> don't need to set G1. Without security extensions all interrupts are G= 0 and with > >> security extensions (NS access) all interrupts are G1. The spec guaran= tees the > >> functional mapping. > > > > I agree that this is not about Xen using both interrupt groups during > > normal operation. > > > > There are two separate points here. > > > > For the group-enable bits, Xen currently only enables bit 0 in > > gicv2_cpu_init(). So, in today's code, EnableGrp1 is expected to be cle= ar > > already. However, the old shutdown path wrote 0 to GICC_CTLR, which als= o > > cleared every group-enable bit visible in the current view. Since this > > patch changes the shutdown path from a plain zero write to a > > read/modify/write, I wanted to preserve that part of the old shutdown > > semantics and avoid leaving any normal interrupt delivery enabled in th= e > > common GICC_CTLR view. > > > > For the bypass-disable bits, the reason for setting both groups in the > > single-security-state/common view is the GICv2 bypass logic, not normal > > interrupt delivery. Once the group-enable bits are clear, the CPU > > interface is no longer driving the physical IRQ/FIQ outputs through > > normal GIC delivery. At that point, the bypass-disable bits decide > > whether those outputs are deasserted or driven by the legacy inputs. > > > > For example, with EnableGrp1 =3D=3D 0, EnableGrp0 =3D=3D 0 and FIQEn = =3D=3D 0, > > Table 2-2 requires IRQBypDisGrp1 to be set for the IRQ output to be > > deasserted. Similarly, Table 2-3 requires both FIQBypDisGrp0 and > > FIQBypDisGrp1 to be set for the FIQ output to be deasserted. This is wh= y > > the common-view case disables the bypass paths for both groups. > > > > This is also not meant to make FIQ a supported delivery mode for Xen. I= t > > is the opposite: when the CPU interface is disabled, the final state > > should not allow the physical FIQ output to be driven by the legacy > > bypass input. Arm32 has some fallback plumbing for FIQ exceptions, but = Xen > > does not configure FIQ as its normal GICv2 interrupt delivery mode. > > > > So the intent is: > > > > * with Security Extensions, touch only the Non-secure view bits visible > > to Xen; > > * without Security Extensions, preserve the old "no normal delivery" > > shutdown behaviour, while changing the bypass-disable bits so that > > the physical outputs are deasserted rather than falling back to > > legacy bypass. > > > > If you prefer, I can also make v3 more conservative and only clear the > > group-enable bit that Xen currently sets in gicv2_cpu_init(), i.e. > > EnableGrp0 in the common view / EnableGrp1 in the Non-secure view. The > > bypass-disable bits would still be set for all bypass paths visible in > > the current GICC_CTLR view, because that part is about the physical > > IRQ/FIQ outputs after normal delivery has been disabled, not about whic= h > > interrupt group Xen normally uses. > The bypass argument is valid according to the tables. However, clearing G= 1 is > unnecessary, so it should be dropped. I can do that on commit if you agre= e. With > that: > Reviewed-by: Michal Orzel Yes, I agree. Dropping the unnecessary clearing of G1 on commit is fine wit= h me. Thank you for the review and for taking care of the commit. Best regards, Mykola > > ~Michal > From xen-devel-bounces@lists.xenproject.org Mon May 04 08:21:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:21:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299573.1574106 (Exim 4.92) (envelope-from ) id 1wJoY9-0001XI-4I; Mon, 04 May 2026 08:21:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299573.1574106; Mon, 04 May 2026 08:21:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoY9-0001XB-1W; Mon, 04 May 2026 08:21:09 +0000 Received: by outflank-mailman (input) for mailman id 1299573; Mon, 04 May 2026 08:21:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoY8-0001X5-B9 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:21:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoY7-001Oxm-2T for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:21:07 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f856e7-bab6-0a2a0a5309dd-0a2a4503e41c-44 for ; Mon, 04 May 2026 10:21:06 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f856f2-672d-0a2a45030019-d155802ba43c-3 for ; Mon, 04 May 2026 10:21:06 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4891f625344so39270975e9.0 for ; Mon, 04 May 2026 01:21:06 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:21:06 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 10:21:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/3] x86/shadow: unlock P2M slightly earlier in shadow_track_dirty_vram() To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777882866-2A965938-2BE86944/0/0 X-purgate-type: clean X-purgate-size: 1501 On 27.04.2026 10:47, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 05:49:35PM +0100, Jan Beulich wrote: >> There's no need to call vfree() with the lock still held. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- >> In fact for the purposes of the function the P2M lock could really be >> obtained merely in read mode, and it could be dropped immediately in both >> the main "if()" and its "else if()". If only there wasn't the error >> handling after copy_to_guest(): Dropping the paging lock ahead of that >> call, we rely solely on the P2M lock to also guard the changing of >> d->arch.hvm.dirty_vram.sh and what it points to. Question is why dropping >> the paging lock (but continuing to hold the P2M lock) is necessary there >> in the first place. > > I wouldn't spend a lot of time trying to optimize this, we already > know HVM shadow is ATM not very optimized, and generally recommend > HAP. > > If we could turn the p2m lock into read-mode, maybe at the expense of > expanding the paging locked region that would likely be slightly better? I fear holding the paging lock across copy_to_guest() is a no-go, as a pagefault there could invoke shadow code. Thinking about it, that lock is a recursive one, so it may be possible to leverage that. Would require making sure that all code paths potentially involved in #PF handling would also use the recursive locking form. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 08:39:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:39:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299584.1574124 (Exim 4.92) (envelope-from ) id 1wJoqA-0003Xq-Kp; Mon, 04 May 2026 08:39:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299584.1574124; Mon, 04 May 2026 08:39:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoqA-0003Xj-IE; Mon, 04 May 2026 08:39:46 +0000 Received: by outflank-mailman (input) for mailman id 1299584; Mon, 04 May 2026 08:39:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoq9-0003Xd-BX for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:39:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoq7-00Gi8z-5z for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:39:44 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f85b4c-bab6-0a2a0a5309dd-0a2a4501b3c4-20 for ; Mon, 04 May 2026 10:39:44 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f85b50-c1f2-0a2a45010019-d1558034a5c7-3 for ; Mon, 04 May 2026 10:39:44 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so24459525e9.1 for ; Mon, 04 May 2026 01:39:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:39:44 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 10:39:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/shadow: VRAM last_dirty tagging To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> <8559db88-5f1d-4ced-980c-e71c4e229c7c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777883984-BEA61FF4-11056CE2/0/0 X-purgate-type: clean X-purgate-size: 2888 On 27.04.2026 11:28, Roger Pau Monné wrote: > On Tue, Feb 03, 2026 at 05:49:55PM +0100, Jan Beulich wrote: >> --- a/xen/arch/x86/mm/shadow/hvm.c >> +++ b/xen/arch/x86/mm/shadow/hvm.c >> @@ -1087,18 +1087,18 @@ int shadow_track_dirty_vram(struct domai >> if ( (dirty_vram->dirty_bitmap = xzalloc_array(uint8_t, dirty_size)) == NULL ) >> goto out_sl1ma; >> >> - dirty_vram->last_dirty = NOW(); >> + dirty_vram->last_dirty = -1; >> >> /* Tell the caller that this time we could not track dirty bits. */ >> rc = -ENODATA; >> } >> - else if ( dirty_vram->last_dirty == -1 ) >> - /* still completely clean, just copy our empty bitmap */ >> - memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >> - else >> + /* Nothing to do when the bitmap is still completely clean. */ >> + else if ( dirty_vram->last_dirty != -1 ) >> { >> mfn_t map_mfn = INVALID_MFN; >> void *map_sl1p = NULL; >> + bool any_dirty = false; >> + s_time_t now; >> >> /* Iterate over VRAM to track dirty bits. */ >> for ( i = 0; i < nr_frames; i++ ) >> @@ -1174,16 +1174,20 @@ int shadow_track_dirty_vram(struct domai >> if ( dirty ) >> { >> dirty_vram->dirty_bitmap[i / 8] |= 1 << (i % 8); >> - dirty_vram->last_dirty = NOW(); >> + any_dirty = true; >> } >> } >> >> + now = NOW(); >> + if ( any_dirty ) >> + dirty_vram->last_dirty = now; > > I'm a bit confused with the setting of ->last_dirty here ... > >> + >> if ( map_sl1p ) >> unmap_domain_page(map_sl1p); >> >> memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >> memset(dirty_vram->dirty_bitmap, 0, dirty_size); > > ... as here the bitmap is zeroed, and hence ->last_dirty should be set > to -1? That's not how I understand the field is used. Aiui it identifies "was clean for more than 2 seconds". That's not the case here. Hence the setting to -1 only conditionally a few lines down from here. >> @@ -1216,6 +1220,7 @@ int shadow_track_dirty_vram(struct domai >> paging_lock(d); >> for ( i = 0; i < dirty_size; i++ ) >> dirty_vram->dirty_bitmap[i] |= dirty_bitmap[i]; >> + dirty_vram->last_dirty = NOW(); > > I think this is doesn't deserve a 'Fixes:' tag because the setting of > ->last_dirty unconditionally to NOW() regardless of whether the bitmap > is zeroed? There was (and is) no unconditional setting of ->last_dirty. Technically maybe a Fixes: tag might be appropriate, but this is an error path which should never be taken (assuming a well behaved DM). Do you think I should dig out the offending commit? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 08:48:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 08:48:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299593.1574133 (Exim 4.92) (envelope-from ) id 1wJoys-0005HP-HC; Mon, 04 May 2026 08:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299593.1574133; Mon, 04 May 2026 08:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoys-0005HI-Dt; Mon, 04 May 2026 08:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1299593; Mon, 04 May 2026 08:48:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJoyq-0005HC-Po for xen-devel@lists.xenproject.org; Mon, 04 May 2026 08:48:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJoyp-0051Ij-MK for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:48:43 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f85d54-e002-0a2a0a5209dd-0a2a4505aafc-42 for ; Mon, 04 May 2026 10:48:43 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f85d6b-aaa8-0a2a45050019-d1558030a411-3 for ; Mon, 04 May 2026 10:48:43 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891f625344so39629025e9.0 for ; Mon, 04 May 2026 01:48:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 01:48:42 -0700 (PDT) Message-ID: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Date: Mon, 4 May 2026 10:48:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption To: "Samuel.Montgomery61" References: Content-Language: en-US Cc: "xen-devel@lists.xenproject.org" From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1777884523-E3B60443-6D2E7520/0/0 X-purgate-type: clean X-purgate-size: 2787 On 04.05.2026 05:24, Samuel.Montgomery61 wrote: > Hello, > > Xen's boot-time memory scrub is one of the more time-consuming steps > during boot, particularly on systems with large amounts of RAM. I'd > like to propose skipping it on systems with hardware full-memory > encryption (e.g., Intel TME, AMD TSME). > > These features encrypt all DRAM transparently using an ephemeral key > generated by the CPU at each boot. The key is not accessible to > software and does not persist across reboots. This means residual data > from any previous session where encryption was active is unreadable -- > the same property that boot scrubbing exists to provide. > > The important nuance is that Xen needs to confirm encryption has been > continuously active since the last scrub, not just that it is active > now. If encryption was only recently enabled in firmware, residual > plaintext from prior unencrypted sessions could still be present in > pages that were never overwritten. Possible approaches: > > - Record "encryption active" to an EFI variable each boot; skip the > scrub only if the flag is present from the previous boot. > - Expose a command-line option for administrators to assert that > encryption has been consistently enabled. As you point out, there are issues with default-disabling. We already have the "bootscrub=" command line option. Is there a reason this can't be used here as well? I.e. is there a strong reason to put in (perhaps significant) effort to identify and cover all the corner cases associated with default-disabling? Jan > - Some combination of the two. > > The optimization would apply only to the cross-reboot case. Runtime > scrubbing when domains shut down would be unaffected, since all domains > share the same key during a running session. > > Edge cases worth considering: > > - Memory written by firmware before encryption activation. > - Crash/kexec without a full hardware reset (key may not change). > - Suspend/resume (some implementations restore the prior key). > - Interaction with existing bootscrub= command-line options. > > As a broader note, multi-key extensions to full-memory encryption (such > as those used by AMD SEV and Intel TME-MK) could eventually eliminate > the need for runtime scrubbing as well, by giving each domain its own > key. This is relevant to the confidential computing work currently > underway (Teddy Astie's recent AMD SEV RFC), though the boot-scrub > optimization proposed here is independent and much simpler. > > Feedback welcome on whether the reasoning is sound and whether there > are edge cases I've missed. > > Thanks, > > Sam > > ps. I'm not subscribed to the list, so please CC me in replies. > From xen-devel-bounces@lists.xenproject.org Mon May 04 09:02:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:02:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299602.1574141 (Exim 4.92) (envelope-from ) id 1wJpBg-000818-Hu; Mon, 04 May 2026 09:02:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299602.1574141; Mon, 04 May 2026 09:02:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpBg-000811-FL; Mon, 04 May 2026 09:02:00 +0000 Received: by outflank-mailman (input) for mailman id 1299602; Mon, 04 May 2026 09:01:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpBf-00080t-4f for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:01:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpBd-001aH3-9a for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:01:57 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f86079-5cb7-0a2a0a5109dd-0a2a450ad4a6-38 for ; Mon, 04 May 2026 11:01:57 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f86085-56b3-0a2a450a0019-d155802ff067-3 for ; Mon, 04 May 2026 11:01:57 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488d2079582so41666985e9.2 for ; Mon, 04 May 2026 02:01:57 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:01:56 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 11:02:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/9] x86/mwait-idle: arrange for BSP MSR adjustments during S3 resume To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777885317-CDD688B7-9C43BF84/0/0 X-purgate-type: clean X-purgate-size: 3198 On 24.04.2026 16:34, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:54:30PM +0100, Jan Beulich wrote: >> mwait_idle_cpu_init() is only called for APs, yet MSR writes will >> typically need re-doing post-S3 even for the BSP. When multiple cores / >> threads are present (and to come back online) in a package, for package >> scope MSRs this may be covered by APs doing the writes, but we can't rely >> on that. >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/arch/x86/acpi/power.c >> +++ b/xen/arch/x86/acpi/power.c >> @@ -28,6 +28,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -299,6 +300,7 @@ static int enter_state(u32 state) >> acpi_sleep_post(state); >> if ( hvm_cpu_up() ) >> BUG(); >> + mwait_idle_resume(); >> cpufreq_add_cpu(0); >> >> enable_cpu: >> --- a/xen/arch/x86/cpu/mwait-idle.c >> +++ b/xen/arch/x86/cpu/mwait-idle.c >> @@ -1680,6 +1680,28 @@ static int __init mwait_idle_probe(void) >> return 0; >> } >> >> +static void mwait_idle_cpu_tweak(unsigned int cpu) >> +{ >> + if (icpu->auto_demotion_disable_flags) >> + on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); >> + >> + if (icpu->byt_auto_demotion_disable_flag) >> + on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); >> + >> + switch (icpu->c1e_promotion) { >> + case C1E_PROMOTION_DISABLE: >> + on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); >> + break; >> + >> + case C1E_PROMOTION_ENABLE: >> + on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); >> + break; >> + >> + case C1E_PROMOTION_PRESERVE: >> + break; >> + } >> +} >> + >> static int cf_check mwait_idle_cpu_init( >> struct notifier_block *nfb, unsigned long action, void *hcpu) >> { >> @@ -1762,24 +1784,7 @@ static int cf_check mwait_idle_cpu_init( >> dev->count++; >> } >> >> - if (icpu->auto_demotion_disable_flags) >> - on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); >> - >> - if (icpu->byt_auto_demotion_disable_flag) >> - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); >> - >> - switch (icpu->c1e_promotion) { >> - case C1E_PROMOTION_DISABLE: >> - on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); >> - break; >> - >> - case C1E_PROMOTION_ENABLE: >> - on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); >> - break; > > I'm possibly missing some context here, but why do we use > on_selected_cpus and the CPU_ONLINE hook? Won't it be easier to use > CPU_STARTING and avoid the use of on_selected_cpus(), as CPU_STARTING > runs in the context of the CPU being onlined. CPU_STARTING happens pretty early, e.g. before IRQs are first enabled. I consider use of that notifier to generally be restricted to pretty special purposes. But yes, technically switching over may be possible. However, in any event what you're suggesting is imo an entirely separate change. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 09:07:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:07:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299609.1574150 (Exim 4.92) (envelope-from ) id 1wJpGc-00007a-33; Mon, 04 May 2026 09:07:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299609.1574150; Mon, 04 May 2026 09:07:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpGb-00007T-WE; Mon, 04 May 2026 09:07:06 +0000 Received: by outflank-mailman (input) for mailman id 1299609; Mon, 04 May 2026 09:07:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpGa-00007N-3d for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:07:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpGZ-0056Pn-BI for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:07:03 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f861b5-e002-0a2a0a5209dd-0a2a4508a590-8 for ; Mon, 04 May 2026 11:07:03 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f861b7-63b5-0a2a45080019-d155802dc17f-3 for ; Mon, 04 May 2026 11:07:03 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4838c15e3cbso29743715e9.3 for ; Mon, 04 May 2026 02:07:03 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:07:02 -0700 (PDT) Message-ID: <64d45064-de32-47f3-b4b8-809b3cc4cc16@suse.com> Date: Mon, 4 May 2026 11:07:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/9] x86/mwait-idle: clean up BYT/CHT auto demotion disable To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777885623-C3171DB1-EA58A83C/0/0 X-purgate-type: clean X-purgate-size: 914 On 24.04.2026 16:47, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:54:56PM +0100, Jan Beulich wrote: >> @@ -1700,12 +1694,24 @@ static void mwait_idle_cpu_tweak(unsigne >> case C1E_PROMOTION_PRESERVE: >> break; >> } >> + >> + /* Pkg-scope MSRs on 1-socket-only systems need writing only once. */ >> + if (!bsp) >> + return; >> + >> + switch (boot_cpu_data.vfm) { >> + case INTEL_ATOM_SILVERMONT: >> + case INTEL_ATOM_AIRMONT: >> + byt_cht_auto_demotion_disable(); >> + break; >> + } >> } >> >> static int cf_check mwait_idle_cpu_init( >> struct notifier_block *nfb, unsigned long action, void *hcpu) >> { >> unsigned int cpu = (unsigned long)hcpu, cstate; >> + static bool first; > > I think you want to init first = true here, so that after the first > call to mwait_idle_cpu_tweak() it gets set to false for future calls? Ouch, yes, definitely. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 09:14:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:14:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299618.1574159 (Exim 4.92) (envelope-from ) id 1wJpNa-0001nF-O6; Mon, 04 May 2026 09:14:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299618.1574159; Mon, 04 May 2026 09:14:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpNa-0001n8-LU; Mon, 04 May 2026 09:14:18 +0000 Received: by outflank-mailman (input) for mailman id 1299618; Mon, 04 May 2026 09:14:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpNZ-0001n2-Jr for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:14:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpNY-0058hn-Ha for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:14:16 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f86367-e002-0a2a0a5209dd-0a2a4508e3dc-6 for ; Mon, 04 May 2026 11:14:16 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f86368-63b5-0a2a45080019-d155dd2bc8b3-3 for ; Mon, 04 May 2026 11:14:16 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d77f6092eso2244818f8f.2 for ; Mon, 04 May 2026 02:14:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:14:15 -0700 (PDT) Message-ID: <98c6c506-59eb-4b5d-bfae-6d92d9bb777d@suse.com> Date: Mon, 4 May 2026 11:14:25 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 7/9] x86/mwait-idle: drop const from struct cpuidle_state arrays To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> <5516d0a1-8fac-48ff-bbe1-85726b730e94@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777886056-3B370DB1-5F4B2BCE/0/0 X-purgate-type: clean X-purgate-size: 787 On 24.04.2026 19:57, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:57:18PM +0100, Jan Beulich wrote: >> A subsequent change will want to be able to alter them based on a new >> command line option. (Note that some were __ro_after_init already.) >> >> Signed-off-by: Jan Beulich > > I wonder if we could also move all the cstate tables to .init section, > as after boot we would only use one of those. I think we could, at the price of introducing a compile-time upper bound to the size of those arrays. We'd need to copy the one we want to use at runtime, and hence we'd need to reserve enough space (or use a runtime allocation). > Anyway, for the change > here: > > Acked-by: Roger Pau Monné Thanks. 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However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a Ctype value of 0b000 while reading from Ctype1 upwards, no caches manageable by the architected set/way maintenance instructions exist at further-out levels, and the higher Ctype fields must be ignored. The current reverse scan can therefore select a unified cache level from a Ctype field above the first no-cache level. Such a field is not part of the architecturally described CLIDR/CCSIDR cache hierarchy and should not be used for selecting the CCSIDR level. Scan Ctype fields from L1 upwards, stop at the first no-cache level, and keep the outermost unified cache observed before that point. This preserves the result for regular cache hierarchies, while avoiding selection of an architecturally ignored Ctype field. Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on arm64") Signed-off-by: Mykola Kvach --- This patch follows the xen-devel discussion: https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.html In that thread, Michal noted that the reverse scan was a simplification rather than an intentional requirement, and that changing the implementation would be fine. Testing performed: - standalone synthetic CLIDR tests covered both regular and pathological Ctype sequences and showed that the forward scan ignores unified cache levels above the first Ctype == 0b000 while the reverse scan can pick them - Renesas H3ULCB booted with llc-coloring=on --- xen/arch/arm/llc-coloring.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c index 6f78817c57..3783f4c824 100644 --- a/xen/arch/arm/llc-coloring.c +++ b/xen/arch/arm/llc-coloring.c @@ -22,21 +22,33 @@ unsigned int __init get_llc_way_size(void) register_t id_aa64mmfr2_el1 = READ_SYSREG(ID_AA64MMFR2_EL1); uint32_t ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT; uint32_t ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK; - unsigned int n, line_size, num_sets; - - for ( n = CLIDR_CTYPEn_LEVELS; n != 0; n-- ) + unsigned int n, line_size, num_sets, llc_level = 0; + + /* + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Once a + * no-cache level is seen, higher Ctype fields are architecturally ignored + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. + * + * Keep the outermost unified cache before that point. + */ + for ( n = 1; n <= CLIDR_CTYPEn_LEVELS; n++ ) { uint8_t ctype_n = (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & CLIDR_CTYPEn_MASK; + if ( ctype_n == 0b000 ) + break; + /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ if ( ctype_n == 0b100 ) - break; + llc_level = n; } - if ( n == 0 ) + if ( !llc_level ) return 0; + n = llc_level; + WRITE_SYSREG((n - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); isb(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 04 09:29:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 09:29:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299634.1574178 (Exim 4.92) (envelope-from ) id 1wJpcK-0004Gv-A4; Mon, 04 May 2026 09:29:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299634.1574178; Mon, 04 May 2026 09:29:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpcK-0004Go-6R; Mon, 04 May 2026 09:29:32 +0000 Received: by outflank-mailman (input) for mailman id 1299634; Mon, 04 May 2026 09:29:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJpcJ-0004Gi-3I for xen-devel@lists.xenproject.org; Mon, 04 May 2026 09:29:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJpcI-008Egl-0V for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:29:30 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f866f3-e002-0a2a0a5209dd-0a2a4504e994-32 for ; Mon, 04 May 2026 11:29:29 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f866f9-1dec-0a2a45040019-d1558029d133-3 for ; Mon, 04 May 2026 11:29:29 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891cd41959so30884935e9.3 for ; Mon, 04 May 2026 02:29:29 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 02:29:29 -0700 (PDT) Message-ID: <45103b7e-301f-4769-bfdb-1b8b5a4a4fb3@suse.com> Date: Mon, 4 May 2026 11:29:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 8/9] x86/mwait-idle: Add cmdline option to adjust C-states table To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777886969-2AF653FF-B74C191C/0/0 X-purgate-type: clean X-purgate-size: 4464 On 24.04.2026 21:10, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:57:53PM +0100, Jan Beulich wrote: >> --- a/docs/misc/xen-command-line.pandoc >> +++ b/docs/misc/xen-command-line.pandoc >> @@ -1928,6 +1928,23 @@ Print boot time MTRR state. >> Use the MWAIT idle driver (with model specific C-state knowledge) instead >> of the ACPI based one. >> >> +### mwait-idle.table (x86) > > The .table suffix is kind of weird, as we don't use it elsewhere. It > might feel more natural given the naming of the existing command line > options to use mwait-idle-table? I thought it might be better to follow the Linux way of naming per-module sub-options, when we "inherit" them. See also "mtrr.show". >> +static void __init cmdline_table_adjust(void) >> +{ >> + char *args = cmdline_table_str; >> + struct cpuidle_state *state; >> + unsigned int i, state_count; >> + >> + if (args[0] == '\0') >> + /* The 'mwait-idle.table' module parameter was not specified */ >> + return; >> + >> + /* Create a copy of the C-states table */ >> + for (i = 0; >> + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; >> + i++) >> + cmdline_states[i] = icpu.state_table[i]; >> + >> + state_count = i; >> + >> + /* >> + * Adjust the C-states table copy with data from the 'mwait-idle.table' >> + * module parameter. >> + */ >> + while (args) { >> + char *fields, *name, *val; >> + >> + /* >> + * Get the next C-state definition, which is expected to be >> + * '::'. Treat "empty" >> + * fields as unchanged. For example, >> + * '::' leaves the latency unchanged. >> + */ >> + args = get_cmdline_field(args, &fields, ','); >> + >> + /* name */ >> + fields = get_cmdline_field(fields, &name, ':'); >> + if (!fields) >> + goto error; >> + >> + /* Find the C-state by its name */ >> + state = NULL; >> + for (i = 0; i < state_count; i++) { >> + if (!strcmp(name, cmdline_states[i].name)) { >> + state = &cmdline_states[i]; >> + break; >> + } >> + } >> + >> + if (!state) { >> + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", >> + name); >> + continue; >> + } >> + >> + /* Latency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + goto error; >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->exit_latency = n; >> + if (*end || state->exit_latency != n) >> + goto error; >> + } >> + >> + /* Target residency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->target_residency = n; >> + if (*end || state->target_residency != n) >> + goto error; >> + } >> + >> + /* >> + * Allow for 3 more fields, but ignore them. Helps to make >> + * possible future extensions of the cmdline format backward >> + * compatible. >> + */ >> + for (i = 0; fields && i < 3; i++) { >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + break; >> + } > > This seems a bit arbitrary for my taste. I would rather ignore the > extra fields (and print a message about it), and proceed with the next > state. I think we want to stick to the original Linux behavior here. If you think that wants adjustment, imo doing so would call for going through Linux first. >> + >> + if (fields) { >> + printk(XENLOG_ERR PREFIX >> + "Too many fields for C-state '%s'\n", >> + state->name); >> + goto error; >> + } >> + >> + printk(XENLOG_INFO PREFIX >> + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", >> + state->name, state->exit_latency, state->target_residency); >> + } >> + >> + /* Copy the adjusted C-states table back */ >> + for (i = 0; i < state_count; i++) >> + icpu.state_table[i] = cmdline_states[i]; >> + >> + printk(XENLOG_INFO PREFIX >> + "Adjusted C-states with data from 'mwait-idle.table'\n"); >> + return; >> + >> + error: >> + printk(PREFIX > > XENLOG_ERR maybe? It's pr_info() in the Linux original, so ERR would feel like going too far. And WARNING is the default anyway. I can switch to XENLOG_WARNING if you think we want to make this explicit. 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Mon, 04 May 2026 02:34:30 -0700 (PDT) Message-ID: <57233a5d-3944-433c-a7c5-a1a491a2c1dd@suse.com> Date: Mon, 4 May 2026 11:34:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 9/9] x86/mwait-idle: Add C-states validation To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777887271-45F698B7-55AD6BBB/0/0 X-purgate-type: clean X-purgate-size: 1886 On 24.04.2026 21:15, Roger Pau Monné wrote: > On Thu, Mar 12, 2026 at 05:58:21PM +0100, Jan Beulich wrote: >> @@ -1589,6 +1594,41 @@ static char *__init get_cmdline_field(ch >> } >> >> /** >> + * validate_cmdline_cstate - Validate a C-state from cmdline. >> + * @state: The C-state to validate. >> + * @prev_state: The previous C-state in the table or NULL. >> + * >> + * Return: 0 if the C-state is valid or -EINVAL otherwise. > > Hm, I know we picked this up from upstream, but this function would > better return a boolean, rather than 0 or -EINVAL. I agree, but I didn't want to deviate from their code purely for cosmetic reasons. >> +static int __init validate_cmdline_cstate(struct cpuidle_state *state, >> + struct cpuidle_state *prev_state) >> +{ >> + if (state->exit_latency == 0) >> + /* Exit latency 0 can only be used for the POLL state */ >> + return -EINVAL; >> + >> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) >> + return -EINVAL; >> + >> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) >> + return -EINVAL; >> + >> + if (state->target_residency < state->exit_latency) >> + return -EINVAL; >> + >> + if (!prev_state) >> + return 0; >> + >> + if (state->exit_latency <= prev_state->exit_latency) >> + return -EINVAL; >> + >> + if (state->target_residency <= prev_state->target_residency) >> + return -EINVAL; > > I'm not an expert on C-states, but isn't this checking against the > previous value kind of defeating part of the purpose of the command > line? I don't know. The question would need raising to the author. > Also, it might help to also write down those limits in the command > line documentation. What do you mean there? Some of the values are universal, but some checks are against model-specific values. I don't think you mean to enumerate them all? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 10:35:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 10:35:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299655.1574204 (Exim 4.92) (envelope-from ) id 1wJqe5-0005KT-0r; Mon, 04 May 2026 10:35:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299655.1574204; Mon, 04 May 2026 10:35:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqe4-0005KM-US; Mon, 04 May 2026 10:35:24 +0000 Received: by outflank-mailman (input) for mailman id 1299655; Mon, 04 May 2026 10:35:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqe3-0005KG-O7 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:35:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJqe3-00FhK1-3w for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:35:23 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87661-2eae-0a2a0a5409dd-0a2a4504b17c-16 for ; Mon, 04 May 2026 12:35:22 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8766a-1dec-0a2a45040019-d155802ee9e5-3 for ; Mon, 04 May 2026 12:35:22 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4891d7164ddso19443815e9.3 for ; Mon, 04 May 2026 03:35:22 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <60c94a2c-a414-4ba5-b22e-54beae3c25f3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777890922-28B733FF-6534CF25/0/0 X-purgate-type: clean X-purgate-size: 1987 On 24.04.2026 11:18, Andrew Cooper wrote: > On 22/04/2026 5:58 pm, Teddy Astie wrote: >> XSA-9 mitigations prevents Xen from properly running if a affected CPU >> is detected. While the vulnerability has no mitigations (aside not running >> 64-bits PV guests), it's only outcome is a DoS. >> >> There is no real point in preventing Xen from working here and it would >> be preferable to just log the vulnerability to the user so it can act >> appropriately. >> >> Also reword the errata message regarding that it only affects PV64 guests. >> >> Signed-off-by: Teddy Astie >> --- >> It's hard to tell whether or not we would want to drop allow_unsafe, but >> currently, Xen is allowed to boot with XSA-304 mitigations disabled >> (intentionnaly) which has a similar outcome than this one. >> >> From a user standpoint, preventing the system to boot or starting guests is >> too extreme and would be in practice seen as a bug, even if it's justified >> policy which can be overriden. > > There is a lot of history here, including for why the panic() is > actually completely unreachable. Deliberately so, as described in 0c7a69665110: The change done allows for a trivial 1-line change restoring prior default behavior (in distros which may want this). > I actually have a very similar patch, from almost certainly more than a > decade ago.  The difference is that now I'm a maintainer and in a better > position to say that this logic really shouldn't have been taken; > certainly not in this form. > > Perhaps an easier justification is that there have been issues like AMD > erratum #121 prior (e.g. Pentium LOCK CMPXCHG) and post (Zen1 has a > related errata, can't remember it off the top of my head) that went > unaddressed. I agree it would be better if we were consistent in treatment of errata (somewhat) similar in effect. I'm less sure which direction we should go in order to achieve consistency. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1776877188.8631fc262581453bbf619ec5b2062170.19db6223737000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777891053-7ED77F3B-DB7FA3D0/0/0 X-purgate-type: clean X-purgate-size: 1244 On 22.04.2026 18:58, Teddy Astie wrote: > @@ -1205,19 +1201,12 @@ static void cf_check init_amd(struct cpuinfo_x86 *c) > if (c->family == 0x10) > __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); > > - if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) > - opt_allow_unsafe = 1; > - else if (opt_allow_unsafe < 0) > - panic("Xen will not boot on this CPU for security reasons" > - "Pass \"allow_unsafe\" if you're trusting all your" > - " (PV) guest kernels.\n"); > - else if (!opt_allow_unsafe && c == &boot_cpu_data) > + if (cpu_has_amd_erratum(c, AMD_ERRATUM_121)) > + { Nit: Misplaced brace (it's Linux style here). But really I don't see why braces are added in the first place. > printk(KERN_WARNING > - "*** Xen will not allow creation of DomU-s on" > - " this CPU for security reasons. ***\n" > - KERN_WARNING > - "*** Pass \"allow_unsafe\" if you're trusting" > - " all your (PV) guest kernels. ***\n"); > + "*** This CPU is affected with erratum 121" > + " 64-bits PV guests are able to cause a DoS (XSA-9) ***\n"); Why the change in indentation? There's also punctuation missing between both parts of the log message. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 10:45:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 10:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299672.1574222 (Exim 4.92) (envelope-from ) id 1wJqnd-0007Uz-4m; Mon, 04 May 2026 10:45:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299672.1574222; Mon, 04 May 2026 10:45:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqnd-0007Us-1B; Mon, 04 May 2026 10:45:17 +0000 Received: by outflank-mailman (input) for mailman id 1299672; Mon, 04 May 2026 10:45:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJqnc-0007Ul-2Z for xen-devel@lists.xenproject.org; Mon, 04 May 2026 10:45:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJqnb-005Qt3-0T for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:45:15 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f878b4-5cb7-0a2a0a5109dd-0a2a450487b0-12 for ; Mon, 04 May 2026 12:45:14 +0200 Received: from [209.85.221.48] (helo=mail-wr1-f48.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f878ba-1dec-0a2a45040019-d155dd30dc50-3 for ; Mon, 04 May 2026 12:45:14 +0200 Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-44a044cb827so2550517f8f.0 for ; Mon, 04 May 2026 03:45:14 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 03:45:14 -0700 (PDT) Message-ID: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Date: Mon, 4 May 2026 12:45:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777891514-2B96A3FF-1F20E47F/0/0 X-purgate-type: clean X-purgate-size: 1038 On 28.04.2026 09:48, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> This series introduces initial Q35 chipset support for HVM guests, based on the >> patchset at [1] by Alexey Gerasimenko. >> >> Basic support means that this patchset allows to start an HVM guest that >> emulates a Q35 chipset via Qemu and implements access to PCIe extended >> configuration space for such devices emulated by Qemu. >> >> Support for PCIe device passthrough is not implemented yet. This is planned but >> implies modifications in the hypervisor and the firmwares, mainly for the >> support of multiple PCI buses. > > Why do you need multi bus support to expose PCIe capabilities? I'm > not seeing the relation between those two. You could still expose a > single bus on the MCFG table. Can a valid PCIe topology be expressed with just bus 0? If an endpoint to be handed to a guest isn't root complex integrated, would it be valid to make it appear so by putting it on bus 0? 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Mon, 04 May 2026 03:58:06 -0700 (PDT) Message-ID: <40c2ea90-e3ab-4d4d-b8a9-8d8efb2869ff@suse.com> Date: Mon, 4 May 2026 12:58:15 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 03/17] hvmloader: add function to set the emulated machine type (i440/Q35) To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-4-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777892287-16C64C48-961970F4/0/0 X-purgate-type: clean X-purgate-size: 2888 On 28.04.2026 12:39, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/pci_regs.h >> +++ b/tools/firmware/hvmloader/pci_regs.h >> @@ -107,6 +107,10 @@ >> >> #define PCI_INTEL_OPREGION 0xfc /* 4 bits */ >> >> +#define PCI_VENDOR_ID_INTEL 0x8086 >> +#define PCI_DEVICE_ID_INTEL_82441 0x1237 >> +#define PCI_DEVICE_ID_INTEL_Q35_MCH 0x29c0 > > In Xen we have a separate file for vendor and device IDs, called > pci_ids.h. Maybe it would be better to use a similar approach in > hvmloader, and keep pci_regs.h only containing PCI register offsets. Can't hvmloader simply re-use Xen's header(s)? >> --- a/tools/firmware/hvmloader/util.c >> +++ b/tools/firmware/hvmloader/util.c >> @@ -22,6 +22,7 @@ >> #include "hypercall.h" >> #include "ctype.h" >> #include "vnuma.h" >> +#include "pci_regs.h" >> #include >> #include >> #include >> @@ -648,6 +649,47 @@ void __bug(const char *file, int line) >> crash(); >> } >> >> +machine_type_t machine_type; >> + >> +void init_pc_machine_type(void) > > Since detection is done based on PCI device IDs, it might be better > placed in pci.c, and so you don't need to include pci_regs.h in > util.c. > >> +{ >> + uint16_t vendor_id; >> + uint16_t device_id; >> + >> + if ( machine_type != MACHINE_TYPE_UNDEFINED ) >> + return; >> + >> + vendor_id = pci_readw(0, PCI_VENDOR_ID); >> + device_id = pci_readw(0, PCI_DEVICE_ID); >> + >> + /* only Intel platforms are emulated currently */ >> + if ( vendor_id != PCI_VENDOR_ID_INTEL ) >> + goto error; >> + >> + switch ( device_id ) >> + { >> + case PCI_DEVICE_ID_INTEL_82441: >> + machine_type = MACHINE_TYPE_I440; >> + printf("Detected i440 chipset\n"); >> + break; >> + >> + case PCI_DEVICE_ID_INTEL_Q35_MCH: >> + machine_type = MACHINE_TYPE_Q35; >> + printf("Detected Q35 chipset\n"); >> + break; >> + >> + default: >> + goto error; >> + } >> + >> + return; >> + >> +error: >> + printf("Unknown emulated chipset encountered, VID=%04Xh, DID=%04Xh\n", > > We don't usually use the h suffix in hex numbers in hvmloader, it's > more common to prefix them with 0x, so I would recommend to use the %#06x > formatter instead. I'd generally advise against use of # with a width specifier, as that ends up awkward for 0. That is, %#x is fine and generally to be preferred, but for a specific with it might better be 0x%0x (with n=4 here). Arguably here we don't really expect either of the values to be 0, so the suggested use may indeed be okay in this case (while still introducing an example which later may be copied elsewhere without much thought). Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 11:09:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 11:09:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299692.1574242 (Exim 4.92) (envelope-from ) id 1wJrBC-0002im-71; Mon, 04 May 2026 11:09:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299692.1574242; Mon, 04 May 2026 11:09:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrBC-0002if-40; Mon, 04 May 2026 11:09:38 +0000 Received: by outflank-mailman (input) for mailman id 1299692; Mon, 04 May 2026 11:09:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrBA-0002iZ-Ml for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:09:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJrB9-005XRw-JW for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:09:35 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87e6e-e002-0a2a0a5209dd-0a2a450adfcc-4 for ; Mon, 04 May 2026 13:09:35 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f87e6f-56b3-0a2a450a0019-d155802ee4e2-3 for ; Mon, 04 May 2026 13:09:35 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488ad135063so35221425e9.0 for ; Mon, 04 May 2026 04:09:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 04:09:34 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 13:09:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 09/17] xev/hvm: Add HVMOP_get|set_ecam_space hypercalls To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-10-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777892975-453638B7-FCB79E61/0/0 X-purgate-type: clean X-purgate-size: 2590 On 28.04.2026 15:59, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:03PM +0000, Thierry Escande wrote: >> --- a/xen/arch/x86/hvm/hvm.c >> +++ b/xen/arch/x86/hvm/hvm.c >> @@ -5195,6 +5195,58 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg) >> rc = current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_op(arg); >> break; >> >> + case HVMOP_set_ecam_space: { >> + xen_hvm_ecam_space_t ecam; >> + struct domain *d; >> + >> + if ( copy_from_guest( &ecam, guest_handle_cast(arg, xen_hvm_ecam_space_t), 1 ) ) > ^ extra space, here and at the > closing parenthesis. > > Line length is also past the 80 character limit, same below in > HVMOP_get_ecam_space. > >> + return -EFAULT; > > This operation (and the matching get variant) needs an XSM check. > >> + >> + d = rcu_lock_domain_by_any_id(ecam.domid); >> + if ( d == NULL ) >> + return -ESRCH; >> + >> + if ( d->arch.ecam_addr ) { > > Coding style, opening braces should be on a new line. > >> + rcu_unlock_domain(d); >> + return -EFAULT; > > This would better return -EBUSY I agree, yet I'd like to suggest that this may want changing further: If one can "set" the address, shouldn't one also be able to "clear" it? That could (pretty) naturally be expressed by ecam.addr being 0 in the request. Which would then require permitting non-0 .ecam_addr in that specific case. >> + if ( (ecam.size >> 28) || (!ecam.addr) ) { > ^ the parenthesis here are > unneeded. > >> + rcu_unlock_domain(d); >> + return -EINVAL; >> + } >> + >> + d->arch.ecam_addr = ecam.addr; >> + d->arch.ecam_size = ecam.size; > > I'm a bit worried about a domain being able to set it's own ECAM hole, > assessing all the side-effects of this might be complex. > > Won't the code here better check the region passed in the hypercall is > indeed not mapped in the p2m, so that trapping of ECAM accesses works > as expected? > > Also, how does the ECAM hole get setup on native? I assume there are > some magic registers in the PCI config space of a platform device that > the firmware uses to position the ECAM space? That may even be outside of any device's config space, e.g. custom MMIO. I didn't check, but I guess that may also be the case for Q35. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 11:11:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 11:11:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299702.1574252 (Exim 4.92) (envelope-from ) id 1wJrD7-0004Ej-O5; Mon, 04 May 2026 11:11:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299702.1574252; Mon, 04 May 2026 11:11:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrD7-0004Ec-Jh; Mon, 04 May 2026 11:11:37 +0000 Received: by outflank-mailman (input) for mailman id 1299702; Mon, 04 May 2026 11:11:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJrD6-0004EU-Py for xen-devel@lists.xenproject.org; Mon, 04 May 2026 11:11:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJrD6-008du0-5K for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:11:36 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f87edb-e002-0a2a0a5209dd-0a2a45019314-18 for ; Mon, 04 May 2026 13:11:36 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f87ee7-c1f2-0a2a45010019-d1558030c577-3 for ; Mon, 04 May 2026 13:11:36 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so19585905e9.1 for ; Mon, 04 May 2026 04:11:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 04:11:35 -0700 (PDT) Message-ID: Date: Mon, 4 May 2026 13:11:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-12-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777893096-AFF50FF4-589AEF2C/0/0 X-purgate-type: clean X-purgate-size: 2387 On 29.04.2026 11:29, Roger Pau Monné wrote: > On Fri, Mar 13, 2026 at 04:35:04PM +0000, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/pci.c >> +++ b/tools/firmware/hvmloader/pci.c >> @@ -413,6 +413,58 @@ void pci_setup(void) >> pci_devfn_decode_type[devfn] |= PCI_COMMAND_MASTER; >> } >> >> + /* >> + * Calculate MMCONFIG area size and squeeze it into the bars array >> + * for assigning a slot in the MMIO hole >> + */ >> + if ( is_running_on_q35 ) >> + { >> + /* disable PCIEXBAR decoding for now */ >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); >> + >> + switch ( PCI_MAX_MCFG_BUSES ) >> + { >> + case 64: >> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(64); >> + break; >> + >> + case 128: >> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(128); >> + break; >> + >> + case 256: >> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; >> + bar_sz = MB(256); >> + break; >> + >> + default: >> + /* unsupported number of buses specified */ >> + BUG(); >> + } >> + >> + addr_mask = ~(bar_sz - 1); >> + >> + for ( i = 0; i < nr_bars; i++ ) >> + if ( bars[i].bar_sz < bar_sz ) >> + break; >> + >> + if ( i != nr_bars ) >> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); >> + >> + bars[i].is_mem = 1; >> + bars[i].devfn = PCI_MCH_DEVFN; >> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; >> + bars[i].bar_sz = bar_sz; >> + bars[i].addr_mask = addr_mask; >> + bars[i].bar_data = bar_data; >> + >> + mmio_total += bar_sz; >> + nr_bars++; >> + } > > I think it might be best if the ECAM fake BAR is the first element in > the bars array, so we ensure it's the first item to consume memory > from the low MMIO hole. Not sure how that will work with the current > sorting of the resources based on their size, but it's imperative for > hvmloader to attempt to position ECAM ahead of the other device > resources IMO. Why would this be? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260430114647.94526-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777894286-E2969443-43CF1002/0/0 X-purgate-type: clean X-purgate-size: 1562 On 30.04.2026 13:46, Roger Pau Monne wrote: > Uninitialized cpu_data[] entries have the apicid field set to BAD_APICID, > not boot_cpu_data.apicid. Fix the check in cpu_smpboot_free() to use the > correct condition. > > Fixes: 7126b7f806d5 ("x86/CPU: re-work populating of cpu_data[]") I think this isn't correct, and the issue here is me having overlooked a dependency between that commit and the one introducing the line which you change: 8c15d3d18725 ("x86/SMP: guard socket_cpumask[] access in cpu_smpboot_free()"). Both changes were committed close together, but they were entirely separate submissions (well over a year apart). Hence as an individual patch that latter commit was correct, but on top of 7126b7f806d5 it would have needed adjustment. Since 7126b7f806d5 wasn't backported (while 8c15d3d18725 was), the fix here also shouldn't be backported to anything earlier than 4.21 (which indeed the Fixes: tag better expresses). Jan > --- a/xen/arch/x86/smpboot.c > +++ b/xen/arch/x86/smpboot.c > @@ -961,8 +961,7 @@ static void cpu_smpboot_free(unsigned int cpu, bool remove) > * In that case the socket number cannot be relied upon, but the respective > * socket_cpumask[] slot also wouldn't have been set. > */ > - if ( c[cpu].apicid != boot_cpu_data.apicid && > - cpumask_empty(socket_cpumask[socket]) ) > + if ( c[cpu].apicid != BAD_APICID && cpumask_empty(socket_cpumask[socket]) ) > { > xfree(socket_cpumask[socket]); > socket_cpumask[socket] = NULL; From xen-devel-bounces@lists.xenproject.org Mon May 04 12:22:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:22:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299725.1574268 (Exim 4.92) (envelope-from ) id 1wJsJ5-00054f-Q5; Mon, 04 May 2026 12:21:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299725.1574268; Mon, 04 May 2026 12:21:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsJ5-00054Y-NN; Mon, 04 May 2026 12:21:51 +0000 Received: by outflank-mailman (input) for mailman id 1299725; Mon, 04 May 2026 12:21:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wJsJ4-00054S-7H for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:21:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJsJ3-00AA5l-JJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:21:49 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f88f5b-bab6-0a2a0a5309dd-0a2a4504d154-14 for ; Mon, 04 May 2026 14:21:49 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f88f5d-1dec-0a2a45040019-d1558034c0ad-3 for ; Mon, 04 May 2026 14:21:49 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso35344395e9.2 for ; Mon, 04 May 2026 05:21:49 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7c91e1a705e1046be4af1c5671a8d91cf3557013.1777296786.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777897309-291763FF-8F5BC056/10/73395122804 X-purgate-type: spam X-purgate-size: 2577 On 27.04.2026 17:34, Oleksii Kurochko wrote: > As domain type is part of common code now there is no any reason > to have architecture-specific set_domain_type() functions so > it is dropped. > > Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE > for consistency. Also, drop and add some parentheses to be aligned > with the similar if() below. > > x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as > x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no > longer builds, the fallback is currently only relevant for arm32. > > Signed-off-by: Oleksii Kurochko > Reviewed-by: Michal Orzel In principle: Acked-by: Jan Beulich However, still a few remarks: > --- a/xen/include/xen/domain.h > +++ b/xen/include/xen/domain.h > @@ -13,6 +13,19 @@ struct guest_area { > void *map; > }; > > +#ifdef CONFIG_HAS_DOMAIN_TYPE > +enum __packed domain_type { > + DOMAIN_32BIT, > + DOMAIN_64BIT, > +}; > +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) > +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) > +#elif !defined(CONFIG_64BIT) > +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ > +#define is_32bit_domain(d) (true) > +#define is_64bit_domain(d) (false) I think it would be nice if the excess parentheses were dropped from here. > --- a/xen/include/xen/fdt-domain-build.h > +++ b/xen/include/xen/fdt-domain-build.h > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > #include > > struct domain; > @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) > return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; > } > > +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) Pointer-to-const for the 2nd parameter? > +{ > +#ifdef CONFIG_HAS_DOMAIN_TYPE > + /* Type must be set before allocate memory */ This comment would be more prominent if it lived outside of the #ifdef, perhaps (read on) ahead of the function. I wonder though why it's only a comment, and not e.g. an assertion. If an assertion was possible to add, the comment would want to live next to it. Without an assertion putting it ahead of the function may be better. Depending on how far to go, changes could be made while committing, or a proper v5 may want submitting. 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> >> } > >> > >> + /* > >> + * Calculate MMCONFIG area size and squeeze it into the bars array > >> + * for assigning a slot in the MMIO hole > >> + */ > >> + if ( is_running_on_q35 ) > >> + { > >> + /* disable PCIEXBAR decoding for now */ > >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); > >> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); > >> + > >> + switch ( PCI_MAX_MCFG_BUSES ) > >> + { > >> + case 64: > >> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(64); > >> + break; > >> + > >> + case 128: > >> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(128); > >> + break; > >> + > >> + case 256: > >> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; > >> + bar_sz = MB(256); > >> + break; > >> + > >> + default: > >> + /* unsupported number of buses specified */ > >> + BUG(); > >> + } > >> + > >> + addr_mask = ~(bar_sz - 1); > >> + > >> + for ( i = 0; i < nr_bars; i++ ) > >> + if ( bars[i].bar_sz < bar_sz ) > >> + break; > >> + > >> + if ( i != nr_bars ) > >> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); > >> + > >> + bars[i].is_mem = 1; > >> + bars[i].devfn = PCI_MCH_DEVFN; > >> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; > >> + bars[i].bar_sz = bar_sz; > >> + bars[i].addr_mask = addr_mask; > >> + bars[i].bar_data = bar_data; > >> + > >> + mmio_total += bar_sz; > >> + nr_bars++; > >> + } > > > > I think it might be best if the ECAM fake BAR is the first element in > > the bars array, so we ensure it's the first item to consume memory > > from the low MMIO hole. Not sure how that will work with the current > > sorting of the resources based on their size, but it's imperative for > > hvmloader to attempt to position ECAM ahead of the other device > > resources IMO. > > Why would this be? I would assume it's best to have ECAM access in the low 4G (for 32bit OSes) at the expense of some 32bit BARs possibly not fitting in the 32bit space. But the ECAM space could be placed above 4G, and 32bit OSes might not care much about extended address space capabilities. Should is_64bar be set for the MCFG "fake" BAR? Thanks, Roger. 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boundary="-=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777897867307 X-purgate-ID: tlsNG-ef75cf/1777897873-AEB70C48-375E36DA/0/0 X-purgate-type: clean X-purgate-size: 2387 ---=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 01/05/2026 =C3=A0 23:43, Andrew Cooper a =C3=A9crit=C2=A0: > Under SVM, there are two copies of guest CR2=2E One is v->arch=2Ehvm=2E= guest_cr[2] > and one is in the VMCB=2E >=20 > Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardw= are > loads and saves the guest CR2 across VMRUN/VMExit=2E >=20 > For HAP guests (where #PF is not intercepted, and therefore we don't typ= ically > inject #PF either), this causes the guest CR2 value to be lost on migrat= e=2E As > migration is cooperative and not done from the #PF handler, this also go= es > unoticed by guests=2E >=20 > It also means that an emulated MOV-from-CR2 reads a stale value=2E >=20 > Reported-by: Stefano Stabellini > Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions= =2E") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monn=C3=A9 > CC: Teddy Astie > CC: Stefano Stabellini >=20 > It also also works around the QEMU bug that triggered the investigion, w= here > the CR2 intercepts trigger despite Xen requesting CR2 not to be intercep= ted=2E > --- > xen/arch/x86/hvm/svm/svm=2Ec | 1 + > 1 file changed, 1 insertion(+) >=20 > diff --git a/xen/arch/x86/hvm/svm/svm=2Ec b/xen/arch/x86/hvm/svm/svm=2Ec > index ced616684732=2E=2Ef49d2ebbfdd5 100644 > --- a/xen/arch/x86/hvm/svm/svm=2Ec > +++ b/xen/arch/x86/hvm/svm/svm=2Ec > @@ -2505,6 +2505,7 @@ void asmlinkage svm_vmexit_handler(void) > hvm_sanitize_regs_fields( > regs, !(vmcb_get_efer(vmcb) & EFER_LMA) || !(vmcb->cs=2El)); > =20 > + v->arch=2Ehvm=2Eguest_cr[2] =3D vmcb_get_cr2(vmcb); > if ( paging_mode_hap(v->domain) ) > v->arch=2Ehvm=2Eguest_cr[3] =3D v->arch=2Ehvm=2Ehw_cr[3] =3D v= mcb_get_cr3(vmcb); > =20 >=20 > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e Reviewed-by: Teddy Astie -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vate= s=2Etech ---=Part.d6.93e06ccba025c343.19df2f88826.86241822aa36c9ae=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:33:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:33:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299749.1574295 (Exim 4.92) (envelope-from ) id 1wJsUJ-0007jn-3x; Mon, 04 May 2026 12:33:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299749.1574295; Mon, 04 May 2026 12:33:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsUJ-0007jg-12; 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Mon, 04 May 2026 12:33:21 +0000 Received: from [192.168.1.18] (88-175-170-134.subs.proxad.net [88.175.170.134]) (Authenticated sender: teddy.astie) by mail2.vates.fr (Postfix) with ESMTPSA id 3F1E682C7B; Mon, 4 May 2026 14:33:21 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=z1SahcxJS9PEhd9nLCjwMi74YvkGkujJc5tcAM5h/cg=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=DgyM5Ng4Ps72VGAYzzpWoq3QdzlPPY6t02VsQgfXkBE2vb4bTTeI41awOP/dQIB06OKoZmzsy x260i7Cj0Ccgawp75DmlJzENlv/+Xa0/pol2f2pgiUXb+5B8hYAj7vXM6aBuoflzWo2QKXj4LQU HWwE8EvgJv8Pw/v4Ujloui4h8RWhas4JowGP9jUhG7VjRbgZOYiisn9eJVDJ1ITMsdgVfjWhPI5 yByY9w5dYZ9JnwsaHmOq4bPoPIGf1X4UNwxeIJ5d2DxcvFqXmuWRE3HFROXCYEEpQRhMJz4x846 y7FKObK2hUvg8+a6XQYcuiaG+WZCSpzHQLgkyxFKFyPQ== X-Zone-Loop: 639d19f8d8251d1d763f59e389c23f386502cb7888a1 x-campaign-type: default x-transaction-id: 72b9757b-341d-472b-a8cd-f38d541b56d4 x-swg-uid: 01-6f80c560-cf2f-424d-aeca-d5d275a3f892 X-Mailer: Sweego Message-ID: <1777898001.8631fc262581453bbf619ec5b2062170.19df2fa95a7000f373@vates.tech> x-swg-bid: 1777898001.8631fc262581453bbf619ec5b2062170.19df2fa95a7000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Mon, 4 May 2026 14:33:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/boot: Disable interrupts when establishing SSP To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260501191028.1250225-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie In-Reply-To: <20260501191028.1250225-1-andrew.cooper3@citrix.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777898001343 X-purgate-ID: tlsNG-bad1c0/1777898004-496B0A53-1C87D334/0/0 X-purgate-type: clean X-purgate-size: 5340 ---=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 01/05/2026 =C3=A0 21:14, Andrew Cooper a =C3=A9crit=C2=A0: > Gitlab CI reported a crash on boot on Alder Lake hardware=2E The bug is= years > old, making it an incredibly rare occurance: >=20 > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4=2E22-unstable x86_64 debug=3Dy ubsan=3Dy Not tai= nted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup=2Ec#reinit_bsp= _stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 0000000000= 0006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000= 000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497= e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a= 392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000= 000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000= f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000= 000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup=2Ec#reinit_b= sp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 = f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=3Dffff= 83049a4b7ef8, tss=2Ersp0=3Dffff83049a4b7fb0 > (XEN) No stack overflow detected=2E Skipping stack trace=2E > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** >=20 > This is on the instruction boundary after enabling CET (writing MSR_S_CE= T) and > prior to establishing SSP=2E Despite identifying this as a critical win= dow > where any fault was deadly (the CPU tries to push a shadow stack frame a= t 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled=2E >=20 > Along with regular interrupts, NMIs are a problem=2E Unlike other cases= needing > NMI safety, we can't use a self NMI and callback, as the stack needs to = be > empty at the point of enabling Shadow Stacks=2E >=20 > Disable interrupts, and turn off the watchdog if it's configured=2E >=20 > Note that watchdog_{en,dis}able() do not work here=2E They cause the wa= tchdog > NMI to be ignored; they do not inhibit the generation of NMIs=2E >=20 > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monn=C3=A9 > CC: Teddy Astie >=20 > The only way I can think of doing this in NMI context is to have the NMI= LRET > off the NMI stack back to the interrupted context=2E But this is horrib= le to > arrange, not to mention different between IDT and FRED=2E >=20 > Also, the {disable,setup}_lapic_nmi_watchdog() API is horrible but I don= 't > have time to make it sane right now, and this needs backporting a long w= ay=2E >=20 > https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/pipelines/249406= 9238 > --- > xen/arch/x86/setup=2Ec | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) >=20 > diff --git a/xen/arch/x86/setup=2Ec b/xen/arch/x86/setup=2Ec > index d041cbd5f6f1=2E=2E95ac36beab37 100644 > --- a/xen/arch/x86/setup=2Ec > +++ b/xen/arch/x86/setup=2Ec > @@ -908,6 +908,19 @@ static void __init noreturn reinit_bsp_stack(void) > =20 > if ( cpu_has_xen_shstk ) > { > + bool watchdog =3D (nmi_watchdog =3D=3D NMI_LOCAL_APIC); > + > + /* > + * Between enabling CET and establishing SSP, any fault or inte= rrupt > + * is fatal=2E We must arrange for none to happen=2E > + * > + * TODO: Figure out how to perform CET enablement in NMI contex= t, > + * given the constraint that the stack must be empty=2E > + */ > + if ( watchdog ) > + disable_lapic_nmi_watchdog(); > + local_irq_disable(); > + > wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); > =20 > /* > @@ -932,6 +945,13 @@ static void __init noreturn reinit_bsp_stack(void) > } > else > asm volatile ( "setssbsy" ::: "memory" ); > + > + local_irq_enable(); > + if ( watchdog ) > + { > + nmi_watchdog =3D NMI_LOCAL_APIC; > + setup_apic_nmi_watchdog(); > + } > } > =20 > reset_stack_and_jump(init_done); >=20 > base-commit: 61f957d48c78df6c5254b6f54d6170d3bd3d717e Reviewed-by: Teddy Astie -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.d8.e997219826f44562.19df2fa93bf.8d0c5c40427badda=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:36:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:36:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299759.1574305 (Exim 4.92) (envelope-from ) id 1wJsXO-0008JL-LG; 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Mon, 04 May 2026 05:36:36 -0700 (PDT) Message-ID: <2945a61e-dcf8-40eb-a3e4-3c8e977f9ebf@suse.com> Date: Mon, 4 May 2026 14:36:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 11/17] hvmloader: allocate MMCONFIG area in the MMIO hole To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Alexey Gerasimenko , Thierry Escande References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-12-thierry.escande@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898196-1565BC48-A22DFFBF/0/0 X-purgate-type: clean X-purgate-size: 3591 On 04.05.2026 14:23, Roger Pau Monné wrote: > On Mon, May 04, 2026 at 01:11:44PM +0200, Jan Beulich wrote: >> On 29.04.2026 11:29, Roger Pau Monné wrote: >>> On Fri, Mar 13, 2026 at 04:35:04PM +0000, Thierry Escande wrote: >>>> --- a/tools/firmware/hvmloader/pci.c >>>> +++ b/tools/firmware/hvmloader/pci.c >>>> @@ -413,6 +413,58 @@ void pci_setup(void) >>>> pci_devfn_decode_type[devfn] |= PCI_COMMAND_MASTER; >>>> } >>>> >>>> + /* >>>> + * Calculate MMCONFIG area size and squeeze it into the bars array >>>> + * for assigning a slot in the MMIO hole >>>> + */ >>>> + if ( is_running_on_q35 ) >>>> + { >>>> + /* disable PCIEXBAR decoding for now */ >>>> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR, 0); >>>> + pci_writel(PCI_MCH_DEVFN, PCI_MCH_PCIEXBAR + 4, 0); >>>> + >>>> + switch ( PCI_MAX_MCFG_BUSES ) >>>> + { >>>> + case 64: >>>> + bar_data = PCIEXBAR_64_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(64); >>>> + break; >>>> + >>>> + case 128: >>>> + bar_data = PCIEXBAR_128_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(128); >>>> + break; >>>> + >>>> + case 256: >>>> + bar_data = PCIEXBAR_256_BUSES | PCIEXBAR_ENABLE; >>>> + bar_sz = MB(256); >>>> + break; >>>> + >>>> + default: >>>> + /* unsupported number of buses specified */ >>>> + BUG(); >>>> + } >>>> + >>>> + addr_mask = ~(bar_sz - 1); >>>> + >>>> + for ( i = 0; i < nr_bars; i++ ) >>>> + if ( bars[i].bar_sz < bar_sz ) >>>> + break; >>>> + >>>> + if ( i != nr_bars ) >>>> + memmove(&bars[i+1], &bars[i], (nr_bars-i) * sizeof(*bars)); >>>> + >>>> + bars[i].is_mem = 1; >>>> + bars[i].devfn = PCI_MCH_DEVFN; >>>> + bars[i].bar_reg = PCI_MCH_PCIEXBAR; >>>> + bars[i].bar_sz = bar_sz; >>>> + bars[i].addr_mask = addr_mask; >>>> + bars[i].bar_data = bar_data; >>>> + >>>> + mmio_total += bar_sz; >>>> + nr_bars++; >>>> + } >>> >>> I think it might be best if the ECAM fake BAR is the first element in >>> the bars array, so we ensure it's the first item to consume memory >>> from the low MMIO hole. Not sure how that will work with the current >>> sorting of the resources based on their size, but it's imperative for >>> hvmloader to attempt to position ECAM ahead of the other device >>> resources IMO. >> >> Why would this be? > > I would assume it's best to have ECAM access in the low 4G (for 32bit > OSes) at the expense of some 32bit BARs possibly not fitting in the > 32bit space. But the ECAM space could be placed above 4G, and 32bit > OSes might not care much about extended address space capabilities. This doesn't require it to be 1st, though? Ideally we would try to put it below 4G if possible (i.e. if all other BARs which aren't 64-bit capable still fit), but fall back to putting it above 4G otherwise. In all of this it would still be put in the slot that its size demands. If we put it first, a significant gap could result between it and the first "real" BAR. (Then again a significant gap could also result if the number of buses to cover wasn't a power of 2.) Properly making use of such a gap would further complicate the code, I expect. > Should is_64bar be set for the MCFG "fake" BAR? As per above, maybe when making a 2nd (retry) pass. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299767.1574313 (Exim 4.92) (envelope-from ) id 1wJsgE-0001Ye-FF; Mon, 04 May 2026 12:45:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299767.1574313; Mon, 04 May 2026 12:45:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgE-0001YX-C0; Mon, 04 May 2026 12:45:46 +0000 Received: by outflank-mailman (input) for mailman id 1299767; Mon, 04 May 2026 12:45:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgC-0001YK-GY for xen-devel@lists.xenproject.org; Mon, 04 May 2026 12:45:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJsgB-002Q5C-Dt for xen-devel@lists.xenproject.org; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1777898743-52D72D75-2D626FAF/0/0 X-purgate-type: clean X-purgate-size: 4887 - Alpine update - Debian trixie - test arbitrary linux branch - Linux stubdom - enable SSH access Green pipeline: https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/pipelines/2498055947 Example Linux test: Linux-next (20260504): https://gitlab.com/xen-project/people/marmarek/test-artifacts/-/pipelines/2496653697 A few genuine failures there: - kbl-pci-pv-x86_64-gcc-debug: domU gets: (domU) [ 0.449203] pcifront pci-0: xenbus: state reset occurred, reconnecting (domU) [ 0.449426] pcifront pci-0: 22 freeing event channel 8 and no PCI device ever appears - zen3p-pvshim-x86-64-gcc-debug [ 1.133364] ------------[ cut here ]------------ [ 1.133398] WARNING: arch/x86/xen/multicalls.c:190 at xen_mc_flush+0x198/0x240, CPU#0: swapper/0/1 [ 1.133457] Modules linked in: [ 1.133488] CPU: 0 UID: 0 PID: 1 Comm: swapper/0 Not tainted 7.1.0-rc1-next-20260430-gb9303e6bff70 #1 PREEMPT(lazy) [ 1.133552] RIP: e030:xen_mc_flush+0x198/0x240 [ 1.133588] Code: 48 8b 43 10 48 8b 7b 20 4c 8b 53 38 4c 8b 43 40 e8 9d 85 14 01 48 89 43 18 48 85 c0 0f 89 1b ff ff ff 8b 3b be 01 00 00 00 90 <0f> 0b 90 65 8b 0d 02 9a 94 02 89 fa 48 c7 c7 78 b5 c1 82 e8 10 6e [ 1.133693] RSP: e02b:ffffc9004000bcc0 EFLAGS: 00010086 [ 1.133730] RAX: ffffffffffffffff RBX: ffff88801da16c40 RCX: ffff88801da17450 [ 1.133778] RDX: 0000000000000000 RSI: 0000000000000001 RDI: 0000000000000001 [ 1.133826] RBP: ffff88801da16c40 R08: 0000000000000000 R09: 0000000000000001 [ 1.133874] R10: 0000000000007ff0 R11: ffffc90040015fff R12: ffff888006570280 [ 1.133936] R13: 0000000000000000 R14: ffffc90040016000 R15: 8000000000000073 [ 1.133992] FS: 0000000000000000(0000) GS:ffff888099e14000(0000) knlGS:0000000000000000 [ 1.134040] CS: e030 DS: 0000 ES: 0000 CR0: 0000000080050033 [ 1.134045] CR2: ffffc9000083f000 CR3: 0000000003034000 CR4: 0000000000050660 [ 1.134045] Call Trace: [ 1.134045] [ 1.134045] ? xen_mc_issue+0x24/0x90 [ 1.134045] xen_leave_lazy_mmu+0x10/0x50 [ 1.134045] vmap_range_noflush+0x54d/0x7b0 [ 1.134045] __ioremap_caller.isra.0+0x174/0x290 [ 1.134045] ? print_s5_reset_status_mmio+0x1c/0x90 [ 1.134045] ? __pfx_print_s5_reset_status_mmio+0x10/0x10 [ 1.134045] print_s5_reset_status_mmio+0x1c/0x90 [ 1.134045] do_one_initcall+0x58/0x240 [ 1.134045] kernel_init_freeable+0x1e2/0x240 [ 1.134045] ? __pfx_kernel_init+0x10/0x10 [ 1.134045] kernel_init+0x15/0x130 [ 1.134045] ret_from_fork+0x17e/0x240 [ 1.134045] ? __pfx_kernel_init+0x10/0x10 [ 1.134045] ret_from_fork_asm+0x1a/0x30 [ 1.134045] [ 1.134045] ---[ end trace 0000000000000000 ]--- Kinda similar to https://lore.kernel.org/xen-devel/aaBH3EAchUwKhrUA@mail-itl/ (which is still not solved) - zen3p-smoke-x86-64-dom0pvh-gcc-debug and few other PVH dom0 - dom0 crash without printing panic message Marek Marczykowski-Górecki (13): Add Alpine 3.23 containers Switch Linux builds to use Alpine 3.23 container Add debian rootfs artifact Enable CONFIG_USB_RTL8152 in kernel for hw12 runner Include git in the ARM64 build container too Support building arbitrary Linux branch/tag/commit Add linux-6.12.79-x86_64 Save Linux config to artifacts too Add trigger-test job, to run test on a Linux built from a branch/tag Add linux-stubdom dependencies Prepare grub for booting x86_64 HVM domU from a disk Prepare grub for booting x86_64 HVM domU from a cdrom Setup ssh access to test systems .gitlab-ci.yml | 82 ++++++++++++++++-- containerize | 6 +- images/alpine/3.18-arm64-build.dockerfile | 1 +- images/alpine/3.23-arm64-base.dockerfile | 6 +- images/alpine/3.23-arm64-build.dockerfile | 31 +++++++- images/alpine/3.23-x86_64-base.dockerfile | 6 +- images/alpine/3.23-x86_64-build.dockerfile | 43 +++++++++- images/debian/13-x86_64-base.dockerfile | 4 +- scripts/alpine-rootfs.sh | 24 +++++- scripts/build-linux.sh | 26 ++++-- scripts/debian-rootfs.sh | 100 ++++++++++++++++++++++- 11 files changed, 316 insertions(+), 13 deletions(-) create mode 100644 images/alpine/3.23-arm64-base.dockerfile create mode 100644 images/alpine/3.23-arm64-build.dockerfile create mode 100644 images/alpine/3.23-x86_64-base.dockerfile create mode 100644 images/alpine/3.23-x86_64-build.dockerfile create mode 100644 images/debian/13-x86_64-base.dockerfile create mode 100755 scripts/debian-rootfs.sh base-commit: 76894a5929bc604fb5bdb4aff2f94a6a9df68cdb -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299769.1574332 (Exim 4.92) (envelope-from ) id 1wJsgG-0001yj-1z; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777898746-32E743FF-0F06FFE7/0/0 X-purgate-type: clean X-purgate-size: 1350 Slowly phase out 3.18 one. But keep Linux 6.6 on Alpine 3.18 containers - it fails to build on Alpine 3.23 (due to GCC 15 defaulting to -std=c23). Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Alpine 3.23 - Keep Linux 6.6 on Alpine 3.18 --- .gitlab-ci.yml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index b86d9aa..5281c1f 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -21,14 +21,14 @@ stages: tags: - arm64 variables: - CONTAINER: alpine:3.18-arm64-build + CONTAINER: alpine:3.23-arm64-build .x86_64-artifacts: extends: .artifacts tags: - x86_64 variables: - CONTAINER: alpine:3.18-x86_64-build + CONTAINER: alpine:3.23-x86_64-build # # ARM64 artifacts @@ -52,6 +52,7 @@ linux-6.6.86-arm64: script: ./scripts/build-linux.sh variables: LINUX_VERSION: 6.6.86 + CONTAINER: alpine:3.18-arm64-build # # x86_64 artifacts @@ -77,6 +78,7 @@ linux-6.6.56-x86_64: LINUX_VERSION: 6.6.56 ARGO_SHA: "cf73819cacc945baca1a7421e5836d1bd481739b" ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" + CONTAINER: alpine:3.18-x86_64-build microcode-x86: extends: .x86_64-artifacts -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299768.1574320 (Exim 4.92) (envelope-from ) id 1wJsgE-0001be-PH; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777898744-82374161-B98F688F/10/63158204843 X-purgate-type: spam X-purgate-size: 6307 Add it in all variants: - base container - build container - initramfs archive libdw used to be part of libelf in Alpine 3.18, but it's a separate package in 3.23. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Update to Alpine 3.23 - Fix alpine-3.22-arm64-rootfs - Adjust default in containerize script Changes in v3: - add comment about libdw --- .gitlab-ci.yml | 14 +++++++- containerize | 6 ++- images/alpine/3.23-arm64-base.dockerfile | 6 +++- images/alpine/3.23-arm64-build.dockerfile | 31 +++++++++++++++++- images/alpine/3.23-x86_64-base.dockerfile | 6 +++- images/alpine/3.23-x86_64-build.dockerfile | 43 +++++++++++++++++++++++- scripts/alpine-rootfs.sh | 6 +++- 7 files changed, 111 insertions(+), 1 deletion(-) create mode 100644 images/alpine/3.23-arm64-base.dockerfile create mode 100644 images/alpine/3.23-arm64-build.dockerfile create mode 100644 images/alpine/3.23-x86_64-base.dockerfile create mode 100644 images/alpine/3.23-x86_64-build.dockerfile diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index c698612..b86d9aa 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -40,6 +40,13 @@ alpine-3.18-arm64-rootfs: variables: CONTAINER: alpine:3.18-arm64-base +alpine-3.23-arm64-rootfs: + extends: .arm64-artifacts + script: + - ./scripts/alpine-rootfs.sh + variables: + CONTAINER: alpine:3.23-arm64-base + linux-6.6.86-arm64: extends: .arm64-artifacts script: ./scripts/build-linux.sh @@ -56,6 +63,13 @@ alpine-3.18-x86_64-rootfs: variables: CONTAINER: alpine:3.18-x86_64-base +alpine-3.23-x86_64-rootfs: + extends: .x86_64-artifacts + script: + - ./scripts/alpine-rootfs.sh + variables: + CONTAINER: alpine:3.23-x86_64-base + linux-6.6.56-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh diff --git a/containerize b/containerize index 38a434a..a74ef45 100755 --- a/containerize +++ b/containerize @@ -27,7 +27,11 @@ case "_${CONTAINER}" in _alpine-3.18-arm64-base) CONTAINER="${BASE}/alpine:3.18-arm64-base" ;; _alpine-3.18-arm64-build) CONTAINER="${BASE}/alpine:3.18-arm64-build" ;; _alpine-3.18-x86_64-base) CONTAINER="${BASE}/alpine:3.18-x86_64-base" ;; - _alpine-3.18-x86_64-build|_) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;; + _alpine-3.18-x86_64-build) CONTAINER="${BASE}/alpine:3.18-x86_64-build" ;; + _alpine-3.23-arm64-base) CONTAINER="${BASE}/alpine:3.23-arm64-base" ;; + _alpine-3.23-arm64-build) CONTAINER="${BASE}/alpine:3.23-arm64-build" ;; + _alpine-3.23-x86_64-base) CONTAINER="${BASE}/alpine:3.23-x86_64-base" ;; + _alpine-3.23-x86_64-build|_) CONTAINER="${BASE}/alpine:3.23-x86_64-build" ;; esac # Use this variable to control whether root should be used diff --git a/images/alpine/3.23-arm64-base.dockerfile b/images/alpine/3.23-arm64-base.dockerfile new file mode 100644 index 0000000..5899803 --- /dev/null +++ b/images/alpine/3.23-arm64-base.dockerfile @@ -0,0 +1,6 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 alpine:3.23 +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +RUN apk --no-cache add bash diff --git a/images/alpine/3.23-arm64-build.dockerfile b/images/alpine/3.23-arm64-build.dockerfile new file mode 100644 index 0000000..1e04b3a --- /dev/null +++ b/images/alpine/3.23-arm64-build.dockerfile @@ -0,0 +1,31 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 alpine:3.23 +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +RUN apk --no-cache add bash + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299771.1574341 (Exim 4.92) (envelope-from ) id 1wJsgI-0002Dc-9u; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777898748-BC617FF4-CE8D8A4F/10/63158204843 X-purgate-type: spam X-purgate-size: 4332 Will be used as dom0/domU in some tests. Install systemd, but set it up to start scripts in /etc/local.d/ too, so tests don't need different paths for Alpine and Debian. Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Anthony PERARD --- Changes in v4: - disable persistent journal via config Changes in v3: - fix typo and missing dropbear args Changes in v2: - Use systemd - update to trixie - disable systemd-journal-catalog-update.service, systemd-modules-load.service and persistent journal to save boot time --- --- .gitlab-ci.yml | 7 ++- images/debian/13-x86_64-base.dockerfile | 4 +- scripts/debian-rootfs.sh | 100 +++++++++++++++++++++++++- 3 files changed, 111 insertions(+) create mode 100644 images/debian/13-x86_64-base.dockerfile create mode 100755 scripts/debian-rootfs.sh diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 5281c1f..4147be5 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -71,6 +71,13 @@ alpine-3.23-x86_64-rootfs: variables: CONTAINER: alpine:3.23-x86_64-base +debian-13-x86_64-rootfs: + extends: .x86_64-artifacts + script: + - ./scripts/debian-rootfs.sh + variables: + CONTAINER: debian:13-x86_64-base + linux-6.6.56-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh diff --git a/images/debian/13-x86_64-base.dockerfile b/images/debian/13-x86_64-base.dockerfile new file mode 100644 index 0000000..f98355f --- /dev/null +++ b/images/debian/13-x86_64-base.dockerfile @@ -0,0 +1,4 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/amd64 debian:trixie-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" diff --git a/scripts/debian-rootfs.sh b/scripts/debian-rootfs.sh new file mode 100755 index 0000000..1da54a5 --- /dev/null +++ b/scripts/debian-rootfs.sh @@ -0,0 +1,100 @@ +#!/bin/bash + +set -eu + +WORKDIR="${PWD}" +COPYDIR="${WORKDIR}/binaries" +UNAME=$(uname -m) + +apt-get update + +PKGS=( + # System + bridge-utils + dropbear + udev + systemd-sysv + iproute2 + inetutils-ping + util-linux + cpio + + # Xen toolstack runtime deps + libbz2-1.0 + libuuid1 + liblzo2-2 + liblzma5 + libyajl2 + + # Xen Test Framework + python3 + + # QEMU + libglib2.0-0 + libaio1t64 + libpixman-1-0 + ) + +case $UNAME in + x86_64) + PKGS+=( + # System + pciutils + + # QEMU + libelf1 + ) + ;; + + aarch64) + PKGS+=( + # Xen + libfdt + ) + ;; +esac + +apt-get -y install "${PKGS[@]}" + +# Xen +cd / +# Minimal ramdisk environment in case of cpio output +echo "ttyS0" >> /etc/securetty +echo "hvc0" >> /etc/securetty +echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab +echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab +echo "rc_verbose=yes" >> /etc/rc.conf +echo "DROPBEAR_EXTRA_ARGS=\"-R\"" >> /etc/default/dropbear +echo > /etc/modules +# disable unneded services +rm -f etc/systemd/system/timers.target.wants/apt-daily*.timer +rm -f etc/systemd/system/sysinit.target.wants/systemd-timesyncd.service +rm -f usr/lib/systemd/system/sysinit.target.wants/systemd-journal-catalog-update.service +rm -f usr/lib/systemd/system/sysinit.target.wants/systemd-modules-load.service +# don't need persistent logging, avoid journal flush service +mkdir -p etc/systemd/journald.conf.d +cat >> etc/systemd/journald.conf.d/storage.conf < /etc/rc.local << EOF +#!/bin/sh + +for f in /etc/local.d/*.start; do + \$f +done +EOF +chmod +x /etc/rc.local +passwd -d root + +# Create rootfs +cd / +{ + PATHS="bin etc home init lib lib64 mnt opt root sbin srv tmp usr var" + find $PATHS -print0 + echo -ne "dev\0proc\0run\0sys\0" +} | cpio -0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz" + +# Print the contents for the build log +zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299772.1574350 (Exim 4.92) (envelope-from ) id 1wJsgJ-0002SS-Ga; Mon, 04 May 2026 12:45:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299772.1574350; Mon, 04 May 2026 12:45:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgJ-0002SE-Cm; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777898749-E3563443-53F9635C/0/0 X-purgate-type: clean X-purgate-size: 808 It uses this USB network interface. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini Acked-by: Andrew Cooper --- This was posted before at https://lore.kernel.org/xen-devel/20250411203336.585215-1-marmarek@invisiblethingslab.com/ --- scripts/build-linux.sh | 1 + 1 file changed, 1 insertion(+) diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index 441b872..cf0e744 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -32,6 +32,7 @@ case $UNAME in | grep 'XEN' \ | grep '=m' \ | sed 's/=m/=y/g' >> .config + ./scripts/config --enable USB_RTL8152 ;; aarch64) -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299773.1574360 (Exim 4.92) (envelope-from ) id 1wJsgL-0002jY-RD; Mon, 04 May 2026 12:45:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299773.1574360; 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Signed-off-by: Marek Marczykowski-Górecki Acked-by: Andrew Cooper Acked-by: Stefano Stabellini --- images/alpine/3.18-arm64-build.dockerfile | 1 + 1 file changed, 1 insertion(+) diff --git a/images/alpine/3.18-arm64-build.dockerfile b/images/alpine/3.18-arm64-build.dockerfile index 25a8dbd..38464c9 100644 --- a/images/alpine/3.18-arm64-build.dockerfile +++ b/images/alpine/3.18-arm64-build.dockerfile @@ -14,6 +14,7 @@ RUN < Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299774.1574368 (Exim 4.92) (envelope-from ) id 1wJsgN-00030O-D0; Mon, 04 May 2026 12:45:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299774.1574368; Mon, 04 May 2026 12:45:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJsgN-000309-75; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898753-15C5CC48-FB090AA6/0/0 X-purgate-type: clean X-purgate-size: 4305 Change how kernel version is given to the script - use arguments, to avoid confusion between pipeline level variables and job level ones. The build-linux.sh now can take either just the kernel version (used to be LINUX_VERSION variable), or git branch/tag/commit name + git URL (new feature). Go with "git init" + "git fetch" instead of "git clone" to support any of branch/tag/commit. This also defines optional linux-git-* jobs which will build the thing if LINUX_GIT_VERSION and LINUX_GIT_URL variables are provided for the pipeline. The idea is to define separate CI schedules for the test-artifacts repo with LINUX_GIT_URL/LINUX_GIT_VERSION pointing at Linux trees to be tested (for example linux-next), and then trigger matching pipelines in the xen repo for testing with that version. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - Adjust error message on missing version - Extract kernel version from job name Changes in v3: - pass kernel version via script arguments, not variables --- .gitlab-ci.yml | 29 +++++++++++++++++++++++++---- scripts/build-linux.sh | 23 +++++++++++++++++------ 2 files changed, 42 insertions(+), 10 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 4147be5..45006d4 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -1,5 +1,9 @@ variables: REGISTRY: registry.gitlab.com/xen-project/hardware/test-artifacts + LINUX_GIT_VERSION: + description: "branch/tag/commit for the linux-git jobs" + LINUX_GIT_URL: + description: "git url for the linux-git jobs" stages: - build @@ -30,6 +34,13 @@ stages: variables: CONTAINER: alpine:3.23-x86_64-build +.linux-tpl: + script: &linux-script + - linux_version="${CI_JOB_NAME}" + - linux_version="${linux_version#linux-}" + - linux_version="${linux_version%%-*}" + - ./scripts/build-linux.sh "${linux_version}" + # # ARM64 artifacts # @@ -49,11 +60,16 @@ alpine-3.23-arm64-rootfs: linux-6.6.86-arm64: extends: .arm64-artifacts - script: ./scripts/build-linux.sh + script: *linux-script variables: - LINUX_VERSION: 6.6.86 CONTAINER: alpine:3.18-arm64-build +linux-git-arm64: + extends: .arm64-artifacts + script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" + rules: + - if: $LINUX_GIT_VERSION && $LINUX_GIT_URL + # # x86_64 artifacts # @@ -80,13 +96,18 @@ debian-13-x86_64-rootfs: linux-6.6.56-x86_64: extends: .x86_64-artifacts - script: ./scripts/build-linux.sh + script: *linux-script variables: - LINUX_VERSION: 6.6.56 ARGO_SHA: "cf73819cacc945baca1a7421e5836d1bd481739b" ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" CONTAINER: alpine:3.18-x86_64-build +linux-git-x86_64: + extends: .x86_64-artifacts + script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" + rules: + - if: $LINUX_GIT_VERSION && $LINUX_GIT_URL + microcode-x86: extends: .x86_64-artifacts script: ./scripts/x86-microcode.sh diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index cf0e744..e01b517 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -1,8 +1,11 @@ #!/usr/bin/env bash +LINUX_VERSION="$1" +LINUX_GIT_URL="$2" + if test -z "${LINUX_VERSION}" then - >&2 echo "LINUX_VERSION must be set"; exit 1 + >&2 echo "Version argument missing"; exit 1 fi set -ex -o pipefail @@ -12,11 +15,19 @@ COPYDIR="${WORKDIR}/binaries" UNAME=$(uname -m) # Build Linux -MAJOR=${LINUX_VERSION%%.*} -curl -fsSLO \ - https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz -tar xf linux-"${LINUX_VERSION}".tar.xz -cd linux-"${LINUX_VERSION}" +if [[ -n "${LINUX_GIT_URL}" ]]; then + mkdir linux + cd linux + git init + git fetch --depth=1 "${LINUX_GIT_URL}" "${LINUX_VERSION}" + git checkout FETCH_HEAD +else + MAJOR=${LINUX_VERSION%%.*} + curl -fsSLO \ + https://cdn.kernel.org/pub/linux/kernel/v"${MAJOR}".x/linux-"${LINUX_VERSION}".tar.xz + tar xf linux-"${LINUX_VERSION}".tar.xz + cd linux-"${LINUX_VERSION}" +fi make defconfig ./scripts/config --enable BRIDGE -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299775.1574377 (Exim 4.92) (envelope-from ) id 1wJsgO-0003FL-Mw; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777898754-E0DA3443-225C71AA/0/0 X-purgate-type: clean X-purgate-size: 1009 This is necessary for new Zen4 runner. Do not include Argo module in this build, as it isn't compatible with 6.12 yet. Signed-off-by: Marek Marczykowski-Górecki Acked-by: Stefano Stabellini Acked-by: Andrew Cooper --- Changes in v2: - update 6.12.34 to 6.12.60, retaining acks Changes in v3: - update 6.12.60 to 6.12.79, retaining acks --- .gitlab-ci.yml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 45006d4..3ba8a31 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -102,6 +102,10 @@ linux-6.6.56-x86_64: ARGOEXEC_SHA: "d900429f6640acc6f68a3d3a4c945d7da60625d8" CONTAINER: alpine:3.18-x86_64-build +linux-6.12.79-x86_64: + extends: .x86_64-artifacts + script: *linux-script + linux-git-x86_64: extends: .x86_64-artifacts script: ./scripts/build-linux.sh "$LINUX_GIT_VERSION" "$LINUX_GIT_URL" -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:45:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:45:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299778.1574386 (Exim 4.92) (envelope-from ) id 1wJsgQ-0003WJ-3n; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777898756-43D6C3FF-29F885DB/0/0 X-purgate-type: clean X-purgate-size: 542 Signed-off-by: Marek Marczykowski-Górecki Reviewed-by: Stefano Stabellini --- scripts/build-linux.sh | 2 ++ 1 file changed, 2 insertions(+) diff --git a/scripts/build-linux.sh b/scripts/build-linux.sh index e01b517..c51e45d 100755 --- a/scripts/build-linux.sh +++ b/scripts/build-linux.sh @@ -53,6 +53,8 @@ esac make olddefconfig +cp .config "${COPYDIR}/linux.config" + case $UNAME in x86_64) make -j$(nproc) bzImage -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299779.1574395 (Exim 4.92) (envelope-from ) id 1wJsgT-0003wf-Cq; Mon, 04 May 2026 12:46:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299779.1574395; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777898757-F7015CF5-4F876756/0/0 X-purgate-type: clean X-purgate-size: 2195 When scheduling pipeline in test-artifacts repo, it can get also TEST_TRIGGER_REPO and TEST_TRIGGER_BRANCH variables, to trigger relevant pipeline to test just built artifacts. Pass ARTIFACTS_REPO+ARTIFACTS_BRANCH to the child pipeline to ensure it fetches artifacts from the right job, but avoid xen test pipeline inheriting other variables, as they might have unintended consequences (for example REGISTRY one). For example, to build linux-next and test Xen staging on it, the pipeline could be triggered with: LINUX_GIT_URL=https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git LINUX_GIT_VERSION=master TEST_TRIGGER_REPO=xen-project/hardware/xen TEST_TRIGGER_BRANCH=staging The triggered xen test pipeline will skip most build jobs. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - add inherit:variables:false --- .gitlab-ci.yml | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 3ba8a31..b3c2b65 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -4,9 +4,14 @@ variables: description: "branch/tag/commit for the linux-git jobs" LINUX_GIT_URL: description: "git url for the linux-git jobs" + TEST_TRIGGER_REPO: + description: "gitlab repo on which test just built linux, for example 'xen-project/hardware/xen'" + TEST_TRIGGER_BRANCH: + description: "branch in TEST_TRIGGER_REPO to test on, for example 'staging'" stages: - build + - deploy .artifacts: stage: build @@ -115,3 +120,20 @@ linux-git-x86_64: microcode-x86: extends: .x86_64-artifacts script: ./scripts/x86-microcode.sh + +trigger-test: + stage: deploy + trigger: + project: $TEST_TRIGGER_REPO + branch: $TEST_TRIGGER_BRANCH + strategy: mirror + inherit: + variables: false + variables: + ARTIFACTS_REPO: $CI_PROJECT_PATH + ARTIFACTS_BRANCH: $CI_COMMIT_REF_NAME + LINUX_JOB_X86_64: linux-git-x86_64 + LINUX_JOB_ARM64: linux-git-arm64 + BUILD_FOR_TESTS_ONLY: 1 + rules: + - if: $TEST_TRIGGER_REPO && $TEST_TRIGGER_BRANCH -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299780.1574399 (Exim 4.92) (envelope-from ) id 1wJsgT-00040D-Pj; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777898760-C176EDB1-B29018E4/0/0 X-purgate-type: clean X-purgate-size: 849 The stubdomain test will use it Signed-off-by: Marek Marczykowski-Górecki --- scripts/alpine-rootfs.sh | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index 2671ab5..18f43e6 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -96,5 +96,12 @@ cd / echo -ne "dev\0proc\0run\0sys\0" } | cpio -0 -R 0:0 -H newc -o | gzip > "${COPYDIR}/rootfs.cpio.gz" +if [ "$UNAME" = "x86_64" ]; then + # Prepare boot sector for HVM disk + grub-mkimage -o ${COPYDIR}/grub-core.img \ + -O i386-pc -p '(hd0,msdos1)/boot/grub2' \ + boot part_msdos ext2 linux biosdisk configfile normal +fi + # Print the contents for the build log zcat "${COPYDIR}/rootfs.cpio.gz" | cpio -tv -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299785.1574422 (Exim 4.92) (envelope-from ) id 1wJsgX-0004qA-5L; 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Signed-off-by: Marek Marczykowski-Górecki --- scripts/alpine-rootfs.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index 18f43e6..f649550 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -101,6 +101,9 @@ if [ "$UNAME" = "x86_64" ]; then grub-mkimage -o ${COPYDIR}/grub-core.img \ -O i386-pc -p '(hd0,msdos1)/boot/grub2' \ boot part_msdos ext2 linux biosdisk configfile normal + grub-mkimage -o ${COPYDIR}/grub-core-eltorito.img \ + -O i386-pc-eltorito -p '(cd)/boot/grub2' \ + boot part_msdos ext2 linux biosdisk configfile normal iso9660 fi # Print the contents for the build log -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299789.1574430 (Exim 4.92) (envelope-from ) id 1wJsgY-00059N-MN; Mon, 04 May 2026 12:46:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299789.1574430; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1777898763-1505AC48-0BB3A418/0/0 X-purgate-type: clean X-purgate-size: 1527 For this add also bridge package, so xenbr0 can be configured with /etc/network/interfaces. This allows extracting more logs out of the test system. Create empty /etc/network/interfaces, so the 'networking' service starts cleanly even if no interfaces are configured this way. This is necessary, as dropbear service depends on networking. Signed-off-by: Marek Marczykowski-Górecki --- Changes in v4: - adjust commit message - drop DROPBEAR_OPTS=\"-R\" Changes in v2: - do not allow passwordless login --- scripts/alpine-rootfs.sh | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/alpine-rootfs.sh b/scripts/alpine-rootfs.sh index f649550..c7fee4b 100755 --- a/scripts/alpine-rootfs.sh +++ b/scripts/alpine-rootfs.sh @@ -10,6 +10,8 @@ apk --no-cache upgrade PKGS=( # System + bridge + dropbear libgcc openrc udev @@ -72,6 +74,7 @@ rc-update add loopback sysinit rc-update add bootmisc boot rc-update add devfs sysinit rc-update add dmesg sysinit +rc-update add dropbear boot rc-update add hostname boot rc-update add hwclock boot rc-update add hwdrivers sysinit @@ -85,6 +88,7 @@ echo "hvc0" >> /etc/securetty echo "ttyS0::respawn:/sbin/getty -L ttyS0 115200 vt100" >> /etc/inittab echo "hvc0::respawn:/sbin/getty -L hvc0 115200 vt100" >> /etc/inittab echo "rc_verbose=yes" >> /etc/rc.conf +touch /etc/network/interfaces echo > /etc/modules passwd -d "root" root -- git-series 0.9.1 From xen-devel-bounces@lists.xenproject.org Mon May 04 12:46:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:46:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299850.1574441 (Exim 4.92) (envelope-from ) id 1wJsgp-0007K2-AG; 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boundary="-=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777898775627 X-purgate-ID: tlsNG-4011c0/1777898780-44F618B7-10128DD2/0/0 X-purgate-type: clean X-purgate-size: 1939 ---=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Le 04/05/2026 =C3=A0 12:39, Jan Beulich a =C3=A9crit=C2=A0: > On 22=2E04=2E2026 18:58, Teddy Astie wrote: >> @@ -1205,19 +1201,12 @@ static void cf_check init_amd(struct cpuinfo_x8= 6 *c) >> if (c->family =3D=3D 0x10) >> __clear_bit(X86_FEATURE_MONITOR, c->x86_capability); >> =20 >> - if (!cpu_has_amd_erratum(c, AMD_ERRATUM_121)) >> - opt_allow_unsafe =3D 1; >> - else if (opt_allow_unsafe < 0) >> - panic("Xen will not boot on this CPU for security reasons" >> - "Pass \"allow_unsafe\" if you're trusting all your" >> - " (PV) guest kernels=2E\n"); >> - else if (!opt_allow_unsafe && c =3D=3D &boot_cpu_data) >> + if (cpu_has_amd_erratum(c, AMD_ERRATUM_121)) >> + { >=20 > Nit: Misplaced brace (it's Linux style here)=2E But really I don't see w= hy > braces are added in the first place=2E >=20 Yes, they can be removed here=2E >> printk(KERN_WARNING >> - "*** Xen will not allow creation of DomU-s on" >> - " this CPU for security reasons=2E ***\n" >> - KERN_WARNING >> - "*** Pass \"allow_unsafe\" if you're trusting" >> - " all your (PV) guest kernels=2E ***\n"); >> + "*** This CPU is affected with erratum 121" >> + " 64-bits PV guests are able to cause a DoS (XSA-9) ***\n"); >=20 > Why the change in indentation? >=20 Looks like my editor got confused with the mixed indentation of the=20 file=2E I can fix this case for the next version of the patch=2E > There's also punctuation missing between both parts of the log message= =2E >=20 ok > Jan >=20 Teddy -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.110.5812edc7bc0bfa36.19df306644a.2fcdf0beede501cf=--- From xen-devel-bounces@lists.xenproject.org Mon May 04 12:50:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 12:50:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299887.1574449 (Exim 4.92) (envelope-from ) id 1wJskV-0002U8-O4; Mon, 04 May 2026 12:50:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299887.1574449; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777899009-2B56F938-CA744A03/0/0 X-purgate-type: clean X-purgate-size: 1788 On 22.04.2026 17:33, Bernhard Kaindl wrote: > The current use of long for total_avail_pages and outstanding_claims > creates an unnecessary mix of signed and unsigned types during page > allocation calculations. This necessitates awkward constructs > like '+ 0UL' to satisfy type matching in macros such as min(). > > Address this by normalizing `total_avail_pages` and `outstanding_claims` > from `long` to `unsigned long`. > > As a direct consequence of making `total_avail_pages` unsigned, the > post-decrement assertions checking for `>= 0` are no longer logically > sound. Adjust those assertions to pre-decrement checks. > > No functional change intended. > > Suggested-by: Jan Beulich Just to mention - my original comment was quite a bit wider. It was specifically made in context of a use of d->outstanding_pages. Yet of course I don't mind this as a 1st step. > Signed-off-by: Bernhard Kaindl Reviewed-by: Jan Beulich > --- a/xen/common/page_alloc.c > +++ b/xen/common/page_alloc.c > @@ -484,10 +484,11 @@ static heap_by_zone_and_order_t *_heap[MAX_NUMNODES]; > static unsigned long node_need_scrub[MAX_NUMNODES]; > > static unsigned long *avail[MAX_NUMNODES]; > -static long total_avail_pages; > +static unsigned long total_avail_pages; > > static DEFINE_SPINLOCK(heap_lock); > -static long outstanding_claims; /* total outstanding claims by all domains */ > +/* total outstanding claims by all domains */ > +static unsigned long outstanding_claims; Moving the comment is certainly fine, yet while doing so would you mind also correcting style? (I'll make the adjustment while committing, but going forward please remember doing so yourself.) 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2577e757d32f85fb8b3308863e6d7a53d70636dc.1777303844.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777899550-42F76A53-C00D81B2/10/73395122804 X-purgate-type: spam X-purgate-size: 1701 On 28.04.2026 16:33, Oleksii Kurochko wrote: > domain_use_host_layout() is not architecture-specific and may be needed > on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common > static inline in a new dedicated header, xen/domain-layout.h. > > xen/domain.h would be the natural home, but placing it there would > require including xen/paging.h (for paging_mode_translate()) and > xen/sched.h (for is_hardware_domain()), which would introduce circular > dependencies. A separate header that callers opt into avoids this. > > Adjust the implementation to take paging_mode_translate() into account > so it works correctly for all architectures, including x86. Some extra > details about implementation [2] and [3]. > > [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ > [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ > [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ > > Suggested-by: Stefano Stabellini > Signed-off-by: Oleksii Kurochko With the SPDX tag added as indicated by Luca: Acked-by: Jan Beulich One further minor remark: > --- /dev/null > +++ b/xen/include/xen/domain-layout.h > @@ -0,0 +1,27 @@ > +#ifndef __XEN_DOMAIN_LAYOUT_H__ > +#define __XEN_DOMAIN_LAYOUT_H__ > + > +#include This isn't really needed. It is ... > +#include > +#include ... included by this one anyway (pretty much unavoidably right now, I guess). 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While we haven't encountered this problem in practice yet, >>>>> it could occur >>>>> in the future, so I believe it should be addressed proactively. >>>> >>>> For being able to occur in future, the handling of removing a cpu >>>> from a >>>> cpupool would need to be changed. Considering the refusal to remove >>>> the >>>> last cpu from a populated cpupool is on purpose (this avoids leaving a >>>> domain without any cpu to run on), adding the code as you suggest >>>> would >>>> just be an addition without any benefit. >>>> >>>> It isn't doing any harm (other than adding code without purpose), so I >>>> won't explicitly NAK the patch, but I won't Ack it either. >>> >>> One further remark: I would ack the addition of an >>> ASSERT(list_empty(replq)) >>> instead of the conditional set_timer() call. >>> >> You're right: with the current cpupool semantics, when the timer is >> re- initialized in this path, replq is expected to be empty. In that >> case there is nothing to re-arm, and the timer can be programmed >> later when a new replenishment event is queued. >> >> Now I see that it would probably be better to update the cpupool >> logic to prohibit removing the last pCPU from a cpupool. In that >> case, this fix — even with the ASSERT — seems to be no longer relevant. >> >> I think I'd rather post an update for the cpupool semantics and drop >> this patch. Or I can send a v3 with the ASSERT if you think that is >> still reasonable. > > The cpupool semantics are already existing. I have written it this way > when I > introduced cpupools. > > > Juergen Hi Juergen, You're right, thanks for the pointer. I went back and re-checked cpupool_unassign_cpu_start() in xen/common/sched/cpupool.c and the guard is indeed already there: when n_dom > 0 and the cpu being removed is the last one in c->cpu_valid, all domains are moved to cpupool0 first, and the call returns -EBUSY if any domain is still alive while the system is active. So by the time the last RTDS pCPU is actually unassigned, no units remain in the pool and replq is guaranteed empty when rt_switch_sched() later re-initializes repl_timer. That makes the conditional set_timer() in v2 unreachable under the current (and intended) cpupool semantics, so there is no need to touch cpupool either. I'll send a v3 that replaces the conditional set_timer() with ASSERT(list_empty(replq)) -- Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 04 13:30:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:30:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299920.1574476 (Exim 4.92) (envelope-from ) id 1wJtNf-0002Hq-4Y; Mon, 04 May 2026 13:30:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299920.1574476; Mon, 04 May 2026 13:30:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtNf-0002Hj-1d; Mon, 04 May 2026 13:30:39 +0000 Received: by outflank-mailman (input) for mailman id 1299920; Mon, 04 May 2026 13:30:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtNe-0002Hd-77 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:30:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJtNd-002Zyk-JK for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:30:37 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f89f79-2eae-0a2a0a5409dd-0a2a450a806e-36 for ; Mon, 04 May 2026 15:30:37 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f89f7d-56b3-0a2a450a0019-d155dd31ad5e-3 for ; Mon, 04 May 2026 15:30:37 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44da2de25f3so714429f8f.1 for ; Mon, 04 May 2026 06:30:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777901437-4556C8B7-25AD20AB/0/0 X-purgate-type: clean X-purgate-size: 2641 On 22.04.2026 13:51, Jan Beulich wrote: > The boot services FreePages() needs passing the size. Since we allocated > one more byte to put a trailing nul there, we also need to bump the size > passed there. Make a small helper function to centralize this. > > Note that there's no permanent memory leak because of the oversight: The > allocation is done using EfiLoaderData, and all memory of that type is > later reclaimed anyway. > > Fixes: df75f77092c1 ("EFI: avoid OOB config file reads") > Reported-by: Bernhard Kaindl > Signed-off-by: Jan Beulich Marek, Daniel? Thanks, Jan > --- > This is an alternative proposal to > https://lists.xen.org/archives/html/xen-devel/2026-04/msg01044.html. > > --- a/xen/common/efi/boot.c > +++ b/xen/common/efi/boot.c > @@ -778,6 +778,16 @@ static void __init efi_relocate_esrt(EFI > */ > #include "efi-boot.h" > > +static void __init free_cfg(void) > +{ > + if ( !cfg.need_to_free ) > + return; > + > + /* One extra byte was allocated to put a nul character there. */ > + efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size + 1)); > + cfg.need_to_free = false; > +} > + > void __init noreturn blexit(const CHAR16 *str) > { > if ( str ) > @@ -787,8 +797,7 @@ void __init noreturn blexit(const CHAR16 > if ( !efi_bs ) > efi_arch_halt(); > > - if ( cfg.need_to_free ) > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > + free_cfg(); > if ( kernel.need_to_free ) > efi_bs->FreePages(kernel.addr, PFN_UP(kernel.size)); > if ( ramdisk.need_to_free ) > @@ -1557,11 +1566,7 @@ void EFIAPI __init noreturn efi_start(EF > name.s = get_value(&cfg, "global", "chain"); > if ( !name.s ) > break; > - if ( cfg.need_to_free ) > - { > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > - cfg.need_to_free = false; > - } > + free_cfg(); > if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) > { > PrintStr(L"Chained configuration file '"); > @@ -1631,11 +1636,7 @@ void EFIAPI __init noreturn efi_start(EF > > efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); > > - if ( cfg.need_to_free ) > - { > - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); > - cfg.need_to_free = false; > - } > + free_cfg(); > > if ( dir_handle ) > dir_handle->Close(dir_handle); From xen-devel-bounces@lists.xenproject.org Mon May 04 13:35:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:35:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299927.1574485 (Exim 4.92) (envelope-from ) id 1wJtSD-0002qW-Lf; Mon, 04 May 2026 13:35:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299927.1574485; Mon, 04 May 2026 13:35:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtSD-0002qP-Hx; Mon, 04 May 2026 13:35:21 +0000 Received: by outflank-mailman (input) for mailman id 1299927; Mon, 04 May 2026 13:35:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJtSC-0002qJ-NM for xen-devel@lists.xenproject.org; Mon, 04 May 2026 13:35:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJtSB-00993s-Ro for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:35:19 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8a090-2eae-0a2a0a5409dd-0a2a450b9c14-46 for ; Mon, 04 May 2026 15:35:19 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8a097-212f-0a2a450b0019-d155dd31c069-3 for ; Mon, 04 May 2026 15:35:19 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-43d7badbd7dso1844507f8f.2 for ; Mon, 04 May 2026 06:35:19 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1777394145.8631fc262581453bbf619ec5b2062170.19dd4f256ec000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1777901719-246B7F3B-6C0DFED6/0/0 X-purgate-type: clean X-purgate-size: 3236 On 28.04.2026 18:35, Teddy Astie wrote: > Le 27/04/2026 à 15:57, Julian Vetter a écrit : >> Add a per-server capability flag in XEN_DMOP_create_ioreq_server to >> signal extended destination ID support. Repurpose the first byte of the >> existing pad[3] as a flags field, and define >> XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID (bit 0) for a server to signal it will >> use XEN_DMOP_bind_pt_msi_irq for all passthrough MSI bindings. >> >> Track the flag in struct ioreq_server ext_dest_id. >> hvm_ext_dest_id_enabled() returns true only if all registered ioreq >> servers have opted in and at least one server is present. A single >> server without the flag is sufficient to suppress the feature. >> >> Lock the feature at domain creation time: >> arch_domain_creation_finished() computes the levelled result into struct >> hvm_domain.ext_dest_id using OR to preserve any value previously >> restored from an HVM save record. After creation_finished, >> arch_ioreq_server_create_check() rejects new servers that lack >> XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID if the feature was already advertised >> to the guest. >> >> Persist the locked state in a new HVM_SAVE_TYPE(EXT_DEST_ID) record so >> that migration preserves the guest-visible CPUID bit independently of >> when the device model re-registers its ioreq servers on the destination >> host. >> >> On restore, ioapic_check() uses d->arch.hvm.ext_dest_id (restored from >> the EXT_DEST_ID record) rather than the per-server dynamic check, since >> the DM has not yet re-registered its servers at that point. >> >> Update xendevicemodel_create_ioreq_server() in libxendevicemodel to >> accept the new flags parameter, remove >> xendevicemodel_enable_ext_dest_id(), and fix the >> xc_hvm_create_ioreq_server() compat wrapper to pass zero flags. >> >> Signed-off-by: Julian Vetter > > That has somewhat already being discussed previously, but AFAIU, > extended destination ID is only meaningful when guest APIC IDs cannot be > represented with the "non-extended" model which can only happen in > practice when having more than 128 vCPUs in the guest. As Andrew has been pointing out many times, we need to stop thinking in terms of 128 vCPU-s being the limit because of the vCPU ID times 2 calculation for the APIC IDs. With a non-HT topology, more than 128 vCPU-s would already be possible from an APIC ID perspective. Hence tying "extended dest ID" to the vCPU count is unlikely to be viable. Jan > I don't think we need to check for device model support unless the guest > can have more than 128 vCPUs, where in such case it becomes mandatory > (unless some form of interrupt remapping is implemented). > > So I would rather check if domain->max_vcpus is more than 128 and > require device models to implement support for extended destination ID > in these cases. > > In some way, that would imply that extended destination ID is only > exposed to guests with domain->max_vcpus > 128. > > Overall, what I propose would be to keep the new > XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID flag, and if d->max_vcpus > 128, we > require the device model to support XEN_DMOP_IOREQ_SERVER_EXT_DEST_ID. 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When a pCPU is later re-added, rt_switch_sched() reinitializes the timer object. cpupool_unassign_cpu_start() refuses to remove the last pCPU from a populated cpupool: if any domain is still alive while the system is active it returns -EBUSY, otherwise all domains are first moved to cpupool0. Consequently, by the time the killed-timer branch runs, no units remain in the pool and replq is guaranteed to be empty. Document this invariant by asserting list_empty(replq) right after init_timer(). This catches any future regression in cpupool semantics that would leave pending replenishment events behind across a TIMER_STATUS_killed -> init_timer() transition, where the timer would otherwise stay disarmed until an unrelated event reprogrammed it. Signed-off-by: Oleksii Moisieiev --- Changes in v3: - rework patch according to the comments. Since cpupools functionality rejects last pCPU from removing so re-arm functionality doesn't make sence. So patch was reworked to check that replq is empty after timer init. Changes in v2: - update commit description, remove unneeded paragraph xen/common/sched/rt.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/common/sched/rt.c b/xen/common/sched/rt.c index 7b1f64a779..4b643eda30 100644 --- a/xen/common/sched/rt.c +++ b/xen/common/sched/rt.c @@ -743,6 +743,14 @@ rt_switch_sched(struct scheduler *new_ops, unsigned in= t cpu, { init_timer(&prv->repl_timer, repl_timer_handler, (void *)new_ops, = cpu); dprintk(XENLOG_DEBUG, "RTDS: timer initialized on cpu %u\n", cpu); + + /* + * cpupool_unassign_cpu_start() refuses to remove the last pCPU fr= om + * a populated cpupool, so by the time this path runs (timer was + * killed because all RTDS pCPUs were removed) the pool must have + * been empty of domains, which implies replq is empty too. + */ + ASSERT(list_empty(rt_replq(new_ops))); } =20 sched_idle_unit(cpu)->priv =3D vdata; --=20 2.43.0 base-commit: 680da952ac1ddfc94f9d1cd4dfa1815badae5302 branch: amoi_rtds_rearmv3= From xen-devel-bounces@lists.xenproject.org Mon May 04 13:40:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 13:40:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299936.1574503 (Exim 4.92) (envelope-from ) id 1wJtXe-0004uM-Ej; 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Fix the check in cpu_smpboot_free() to use the > > correct condition. > > > > Fixes: 7126b7f806d5 ("x86/CPU: re-work populating of cpu_data[]") > > I think this isn't correct, and the issue here is me having overlooked a > dependency between that commit and the one introducing the line which > you change: 8c15d3d18725 ("x86/SMP: guard socket_cpumask[] access in > cpu_smpboot_free()"). Both changes were committed close together, but > they were entirely separate submissions (well over a year apart). Hence > as an individual patch that latter commit was correct, but on top of > 7126b7f806d5 it would have needed adjustment. Since 7126b7f806d5 wasn't > backported (while 8c15d3d18725 was), the fix here also shouldn't be > backported to anything earlier than 4.21 (which indeed the Fixes: tag > better expresses). I see, right, in the git history 8c15d3d18725 is indeed later than 7126b7f806d5, and hence 7126b7f806d5 was correct when introduced. The bug in cpu_smpboot_free() was there, but 7126b7f806d5 made it no worse. It was 8c15d3d18725 that would indeed need to be adjusted to pick up the new initialization value. Thanks, Roger. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777903537-C2975DB1-C3FDBB87/0/0 X-purgate-type: clean X-purgate-size: 7653 On 28.04.2026 16:33, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/kernel.c > @@ -0,0 +1,242 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#include > + > +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ > + > +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, > + paddr_t kernend) > +{ > + const struct boot_module *mod = info->bd.initrd; > + const struct membanks *banks = kernel_info_get_mem_const(info); > + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, > + KERNEL_LOAD_ADDR_ALIGNMENT); > + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), > + KERNEL_LOAD_ADDR_ALIGNMENT); Why would modules need to be this strongly aligned? > + const paddr_t modsize = initrd_len + dtb_len; > + unsigned int bi = banks->nr_banks; > + > + BUG_ON(modsize < initrd_len); Where's the earlier check that allows this to be BUG_ON()? > + /* > + * Place modules as high in RAM as possible, scanning banks from > + * last to first so that the end of the last bank is preferred. > + */ > + while ( bi-- > 0 ) > + { > + const struct membank *bank = &banks->bank[bi]; > + const paddr_t bank_end = bank->start + bank->size; > + paddr_t modbase; > + > + if ( modsize > bank->size ) > + continue; > + > + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); Same question here. > + if ( modbase < bank->start ) > + continue; > + > + /* > + * If modules would overlap the kernel, try placing them below it. > + */ With how kernel_image_place() works, and with the heavy alignment applied above, is this even possible to succeed? Oh, wait, yes - for the not- position-independent case. > + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && > + (modbase + modsize > kernbase) ) > + { > + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); What prevents this subtraction from underflowing? > +static paddr_t __init kernel_image_place(struct kernel_info *info) > +{ > + paddr_t load_addr = INVALID_PADDR; > + uint64_t image_size = info->image.image_size ?: info->image.len; > + const struct membanks *banks = kernel_info_get_mem_const(info); > + unsigned int nr_banks = banks->nr_banks; > + unsigned int bi; > + > + dprintk(XENLOG_DEBUG, "nr_banks(%u)\n", nr_banks); Did you mean to drop this before submitting? > + /* > + * At the moment, RISC-V's Linux kernel should be always position > + * independent based on "Per-MMU execution" of boot.rst: > + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution > + * > + * But just for the case when RISC-V's Linux kernel isn't position > + * independent it is needed to take load address from > + * info->image.start. > + * > + * If `start` is zero, the Image is position independent. > + */ > + if ( likely(!info->image.start) ) > + { > + for ( bi = 0; bi != nr_banks; bi++ ) > + { > + const struct membank *bank = &banks->bank[bi]; > + paddr_t bank_start = bank->start; > + /* > + * According to boot.rst kernel load address should be properly > + * aligned: > + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location > + * > + * As Image in this case is PIC we can ignore > + * info->image.text_offset. > + */ > + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); > + paddr_t bank_end = bank_start + bank->size; > + paddr_t bank_size; > + > + if ( aligned_start > bank_end ) > + continue; > + > + bank_size = bank_end - aligned_start; > + > + dprintk(XENLOG_DEBUG, "bank[%u].start=%"PRIpaddr"\n", bi, bank->start); And this one? (I also find it puzzling that ->start would be of (primary) interest here, when ... > + if ( image_size <= bank_size ) ... bank_size is what's relevant. > +/* Check if the image is a 64-bit Image */ > +static int __init kernel_image64_probe(struct kernel_info *info, > + paddr_t addr, paddr_t size) > +{ > + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ > + struct { > + uint32_t code0; /* Executable code */ > + uint32_t code1; /* Executable code */ > + uint64_t text_offset; /* Image load offset, little endian */ > + uint64_t image_size; /* Effective Image size, little endian */ > + uint64_t flags; /* kernel flags, little endian */ > + uint32_t version; /* Version of this header */ > + uint32_t res1; /* Reserved */ > + uint64_t res2; /* Reserved */ > + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ > + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ > + uint32_t res3; /* Reserved for PE COFF offset */ > + } image; > + uint64_t effective_size; > + > + if ( size < sizeof(image) ) > + return -EINVAL; > + > + copy_from_paddr(&image, addr, sizeof(image)); > + > + /* Magic v1 is deprecated and may be removed. Only use v2 */ > + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) > + return -EINVAL; > + > + effective_size = le64_to_cpu(image.image_size); > + > + if ( effective_size && size > effective_size ) > + return -EINVAL; Is the rhs of the && the wrong way round? If effective_size > size, aren't you in trouble? Question of course is what "effective" really means. Yet in any event it seems dubious to me that effective_size < size would really be a problem. IOW this will want commenting upon if the check is to stay. Actually ... > + info->image.kernel_addr = addr; > + /* Actual size in the binary file */ > + info->image.len = size; > + /* Total memory the kernel occupies at runtime */ > + info->image.image_size = effective_size; ... this looks to suggest something .bss-like. > --- a/xen/include/xen/fdt-kernel.h > +++ b/xen/include/xen/fdt-kernel.h > @@ -59,8 +59,15 @@ struct kernel_info { > struct { > paddr_t kernel_addr; > paddr_t len; > -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) > - paddr_t text_offset; /* 64-bit Image only */ > +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) > + /* > + * ARM: 64-bit Image only. > + * RISC-V: both 32-bit and 64-bit Images. > + */ > + paddr_t text_offset; > +#endif > +#if defined(CONFIG_RISCV) > + uint64_t image_size; /* Effective size of Image */ As this (apparently) is for both RV64 and RV32 - can the latter really have wider than 32-bit image sizes? If not - use size_t or unsigned long here? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <865ed71ece75e850cdcb47ce9157a668a46a4c4d.1777303844.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777904604-A1F7A938-A8522B78/0/0 X-purgate-type: clean X-purgate-size: 6013 On 28.04.2026 16:33, Oleksii Kurochko wrote: > --- /dev/null > +++ b/xen/arch/riscv/dom0less-build.c > @@ -0,0 +1,70 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > + > +#include > + > +int __init arch_parse_dom0less_node(struct dt_device_node *node, > + struct boot_domain *bd) > +{ > + const char *mmu_type; > + unsigned long bits; > + const char *end; > + > + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) > + { > + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " > + "node. %s will be used as fallback\n", max_gstage_mode->name); > + > + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); > + > + goto out; > + } > + > + if ( !strcasecmp(mmu_type, "riscv,none") ) > + { > + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); > + > + return -EOPNOTSUPP; > + } > + > + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) > + { > + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); > + > + return -EINVAL; > + } > + > + bits = simple_strtoul(mmu_type + 8, &end, 10); > + if ( (*end != '\0') || (end == mmu_type + 8) ) > + { > + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); > + > + return -EINVAL; > + } > + > + out: > + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) > + { > + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); > + > + return -EINVAL; > + } > + /* > + * The correct value of bits will be checked in p2m_init() by call of > + * find_gstage_mode_by_bits(). > + * > + * As mmu-type property contains one of string: > + * - riscv,sv32 > + * - riscv,sv39 > + * - riscv,sv48 > + * - riscv,sv57 Or about any other riscv,sv with N up to somewhere around 250. I see that ... > + * it is needed to add '+P2M_ROOT_EXTRA_BITS' as for G-stage mode GPAs > + * are extended by P2M_ROOT_EXTRA_BITS. > + */ > + bd->create_cfg.arch.gstage_addr_bits = bits + P2M_ROOT_EXTRA_BITS; ... the value calculated here is later checked for validity, so it's really only the comment which may want clarifying a little. > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -45,12 +45,27 @@ struct p2m_pte_ctx { > unsigned int level; /* Paging level at which the PTE resides. */ > }; > > -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { > - .mode = HGATP_MODE_OFF, > - .paging_levels = 0, > - .name = "Bare", > +/* Values should be sorted by ->mode in this array */ > +static const struct gstage_mode_desc gstage_modes[] = { > + /* > + * Based on the RISC-V spec: > + * Bare mode is always supported, regardless of SXLEN. > + * When SXLEN=32, the only other valid setting for MODE is Sv32. > + * When SXLEN=64, three paged virtual-memory schemes are defined: > + * Sv39, Sv48, and Sv57. > + */ > + { HGATP_MODE_OFF, 0, "none" }, > +#ifdef CONFIG_RISCV_32 > + { HGATP_MODE_SV32X4, 1, "sv32" }, > +#else > + { HGATP_MODE_SV39X4, 2, "sv39" }, > + { HGATP_MODE_SV48X4, 3, "sv48" }, > + { HGATP_MODE_SV57X4, 4, "sv57" }, > +#endif > }; > > +const struct gstage_mode_desc * __ro_after_init max_gstage_mode = &gstage_modes[0]; Nit: Overlong line (and, strictly speaking, a stray blank after *). > @@ -331,8 +324,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) > return 0; > } > > -int p2m_init(struct domain *d) > +static const struct gstage_mode_desc *find_gstage_mode_by_bits( Is "_by_bits" adding much value to the function name? Especially ... > + unsigned char gpa_bits) ... seeing that the parameter name is making things pretty clear? > +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) > { > + /* > + * TODO: This static is a temporary constraint: all guests must use the > + * same MMU mode because p2m_gpa_bits is not yet per-domain. > + * Drop this once per-domain p2m_gpa_bits is introduced. > + */ > + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; > struct p2m_domain *p2m = p2m_get_hostp2m(d); > > /* > @@ -341,6 +361,33 @@ int p2m_init(struct domain *d) > */ > p2m->domain = d; > > + if ( !config ) > + { > + dprintk(XENLOG_ERR, "NULL config is passed\n"); > + return -EINVAL; > + } > + > + p2m->mode = find_gstage_mode_by_bits(config->arch.gstage_addr_bits); > + > + if ( !p2m->mode ) > + { > + dprintk(XENLOG_ERR, > + "Unsupported or unavailable gstage addr bits: %u\n", > + config->arch.gstage_addr_bits); > + > + return -EINVAL; > + } > + > + if ( m->mode == HGATP_MODE_OFF ) > + m = p2m->mode; > + > + if ( m->mode != p2m->mode->mode ) Since m always points into gstage_modes[], do you really need the extra indirection to compare the two ->mode fields? You could simply compare the pointers, couldn't you? > --- a/xen/include/public/arch-riscv.h > +++ b/xen/include/public/arch-riscv.h > @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; > DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); > > struct xen_arch_domainconfig { > + /* > + * G-stage GPA address width in bits. > + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). > + */ > + unsigned char gstage_addr_bits; Fixed-width types only in the public interface please. Also, isn't the field effectively describing the maximum width of a guest (physical) address? In which case - simply gaddr_bits? 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1777905272-53F7BD75-1D312A2C/0/0 X-purgate-type: clean X-purgate-size: 509 On 13.03.2026 17:35, Thierry Escande wrote: > --- a/tools/firmware/hvmloader/Makefile > +++ b/tools/firmware/hvmloader/Makefile > @@ -78,7 +78,7 @@ rombios.o: roms.inc > smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\"" > > ACPI_PATH = ../../libacpi > -DSDT_FILES += dsdt_anycpu_qemu_xen.c > +DSDT_FILES += dsdt_i440_anycpu_qemu_xen.c Instead of merely adding the i440 infix, could we perhaps replace the anycpu one (which doesn't serve any purpose here anymore, afaics)? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:35:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:35:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299984.1574538 (Exim 4.92) (envelope-from ) id 1wJuOg-0005ah-Ud; Mon, 04 May 2026 14:35:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299984.1574538; Mon, 04 May 2026 14:35:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuOg-0005aa-S3; Mon, 04 May 2026 14:35:46 +0000 Received: by outflank-mailman (input) for mailman id 1299984; Mon, 04 May 2026 14:35:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuOf-0005aQ-8J for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:35:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuOe-002kNW-KN for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:35:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8aeb0-2eae-0a2a0a5409dd-0a2a450aa908-26 for ; Mon, 04 May 2026 16:35:44 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8aec0-56b3-0a2a450a0019-d1558036d05b-3 for ; Mon, 04 May 2026 16:35:44 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so40224405e9.2 for ; Mon, 04 May 2026 07:35:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1777905344-CF77D8B7-5443444C/0/0 X-purgate-type: clean X-purgate-size: 674 On 04.05.2026 16:34, Jan Beulich wrote: > On 13.03.2026 17:35, Thierry Escande wrote: >> --- a/tools/firmware/hvmloader/Makefile >> +++ b/tools/firmware/hvmloader/Makefile >> @@ -78,7 +78,7 @@ rombios.o: roms.inc >> smbios.o: CFLAGS += -D__SMBIOS_DATE__="\"$(SMBIOS_REL_DATE)\"" >> >> ACPI_PATH = ../../libacpi >> -DSDT_FILES += dsdt_anycpu_qemu_xen.c >> +DSDT_FILES += dsdt_i440_anycpu_qemu_xen.c > > Instead of merely adding the i440 infix, could we perhaps replace the anycpu > one (which doesn't serve any purpose here anymore, afaics)? Thinking about it, qemu and xen perhaps fall into the same category, and could perhaps also be dropped. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:39:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:39:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1299991.1574549 (Exim 4.92) (envelope-from ) id 1wJuS1-0006OA-DU; Mon, 04 May 2026 14:39:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1299991.1574549; Mon, 04 May 2026 14:39:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuS1-0006O3-9X; Mon, 04 May 2026 14:39:13 +0000 Received: by outflank-mailman (input) for mailman id 1299991; Mon, 04 May 2026 14:39:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuS0-0006Nx-5l for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:39:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuRz-009Nj6-9t for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:39:11 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8af84-bab6-0a2a0a5309dd-0a2a4504ea02-46 for ; Mon, 04 May 2026 16:39:11 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8af8e-1dec-0a2a45040019-d1558029ed20-3 for ; Mon, 04 May 2026 16:39:11 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891e86fabeso52215195e9.1 for ; Mon, 04 May 2026 07:39:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-3-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1777905551-297793FF-E87A1700/0/0 X-purgate-type: clean X-purgate-size: 603 On 13.03.2026 17:35, Thierry Escande wrote: > --- a/tools/libacpi/Makefile > +++ b/tools/libacpi/Makefile > @@ -11,7 +11,7 @@ endif > > MK_DSDT = $(ACPI_BUILD_DIR)/mk_dsdt > > -C_SRC-$(CONFIG_X86) = dsdt_anycpu.c dsdt_15cpu.c dsdt_i440_anycpu_qemu_xen.c dsdt_pvh.c > +C_SRC-$(CONFIG_X86) = dsdt_anycpu.c dsdt_15cpu.c dsdt_i440_anycpu_qemu_xen.c dsdt_q35_anycpu_qemu_xen.c dsdt_pvh.c This line's now definitely getting too long. Maybe with the suggested name change (see patch 1, to be extended to here) it would remain tolerable as a single line. Otherwise it wants splitting. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-4-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777905805-29370938-4D88B0C0/0/0 X-purgate-type: clean X-purgate-size: 1348 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -648,6 +649,47 @@ void __bug(const char *file, int line) > crash(); > } > > +machine_type_t machine_type; > + > +void init_pc_machine_type(void) > +{ > + uint16_t vendor_id; > + uint16_t device_id; > + > + if ( machine_type != MACHINE_TYPE_UNDEFINED ) > + return; > + > + vendor_id = pci_readw(0, PCI_VENDOR_ID); > + device_id = pci_readw(0, PCI_DEVICE_ID); > + > + /* only Intel platforms are emulated currently */ Nit: Comment style. > + if ( vendor_id != PCI_VENDOR_ID_INTEL ) > + goto error; > + > + switch ( device_id ) > + { > + case PCI_DEVICE_ID_INTEL_82441: > + machine_type = MACHINE_TYPE_I440; > + printf("Detected i440 chipset\n"); > + break; > + > + case PCI_DEVICE_ID_INTEL_Q35_MCH: > + machine_type = MACHINE_TYPE_Q35; > + printf("Detected Q35 chipset\n"); > + break; > + > + default: > + goto error; > + } > + > + return; > + > +error: Nit: Labels indented by at least one blank please. > + printf("Unknown emulated chipset encountered, VID=%04Xh, DID=%04Xh\n", > + vendor_id, device_id); > + BUG(); Can't this be moved up into the default case, thus avoiding "goto" and label altogether? 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pr=C Message-ID: <934afe1f-a55f-4335-ad2e-98346ea8b19a@amd.com> Date: Mon, 4 May 2026 16:46:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 2/2] xen/arm: skip holes in physical address space when setting up frametable To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , "Stefano Stabellini" , Julien Grall , "Bertrand Marquis" , Volodymyr Babchuk References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-3-michal.orzel@amd.com> <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <42E57541-C0A9-4E19-A8F1-825E83A856DB@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468D:EE_|DS0PR12MB6437:EE_ X-MS-Office365-Filtering-Correlation-Id: 9a4f9662-684e-4f04-d367-08dea9ebe0f6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iG+SeXs4jwddpmtMADlwJgEVHHv6YdgtE2PfDpsUlaEowPlaqMDibq7/ju6RNqN/W1DO86oW3UirSogBl3dik0NyuObOeexg1TrxjuZOjJhDHhobp3S5VZT0udl+bQD7lpfr6e64M4dF/XGJeT1pqdeoxNdF0VuJ4DengxlQCL5bVWwMyHm+C0DKO3CCmtOoBEgplLavXYvM8NUJdWqwXASeG07xbTOPLNKUTkjtnxXJKW0B7SeWoyCAbccKNDmUIO3pr3afXsdqXmF6r4zoNnDkcwpEOsWgnqf9N0f4iRIeY+LFW9HO5dFPAYrk9+bjFTajGQHM13oY6+h3DTRwDUYeYGxA5N1X/fJA4knwf0XRYcAlSMBD3pSZmTHe7Xp/+wzdlG/Lb86EoASu4lH8K7BMNJPzXGMwNSu9jI5+AN3aH3atJBSi8g1P8HEdE2rA X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 May 2026 14:46:08.9427 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9a4f9662-684e-4f04-d367-08dea9ebe0f6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468D.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6437 X-purgate-ID: tlsNG-16d1c6/1777905974-CE777D75-99A1D41D/0/0 X-purgate-type: clean X-purgate-size: 3004 On 01-May-26 17:00, Luca Fancellu wrote: > Hi Michal, > >> diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c >> index faef0efb327c..7297cca01551 100644 >> --- a/xen/arch/arm/mm.c >> +++ b/xen/arch/arm/mm.c >> @@ -63,7 +63,7 @@ void __init setup_mm(void) >> >> setup_mm_helper(); >> >> - setup_frametable_mappings(ram_start, ram_end); >> + init_frametable(ram_start); > > I think that now ram_end and bank_end can be removed Right, will do. > >> >> init_staticmem_pages(); >> init_sharedmem_pages(); >> diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c >> index 6604f3bf4e6a..dfc888c8ee0e 100644 >> --- a/xen/arch/arm/mmu/mm.c >> +++ b/xen/arch/arm/mmu/mm.c >> @@ -6,18 +6,45 @@ >> #include >> #include >> #include >> +#include >> #include >> >> -/* Map a frame table to cover physical addresses ps through pe */ >> -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) >> +static void __init init_frametable_chunk(unsigned long pdx_s, >> + unsigned long pdx_e) >> { >> - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - >> - mfn_to_pdx(maddr_to_mfn(ps)) + 1; >> - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); >> - mfn_t base_mfn; >> - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) >> - : MB(32); >> + unsigned long nr_pdxs = pdx_e - pdx_s; >> + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); >> + unsigned long virt; >> int rc; >> + mfn_t base_mfn; >> + >> + /* >> + * In-loop chunks span whole PDX groups, which are always page-size >> + * aligned. The last chunk ending at max_pdx may not be, so round up. >> + */ >> + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); >> + >> + /* >> + * Align the allocation to the contiguous mapping size so that >> + * map_pages_to_xen() can use the contiguous bit. >> + */ >> + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, >> + MB(32) >> PAGE_SHIFT); > > This fixed 32Mb alignment feels a bit more than we need, If for example the > chunk is less than 32Mb? If we had some variable alignment for chunks less > than 32MB we would maybe help alloc_boot_pages job, in the end if the chunk > is less than 32Mb it won’t get the contiguous bit anyway. Good point. On Arm64 this affects any chunk spanning fewer than 3 valid PDX groups (~14MB per group). I'll use 32MB if chunk size >= 32MB, 2MB otherwise. > > But I’m fine also if you leave it as it is. > > With the above fixed: > > Reviewed-by: Luca Fancellu I can take this one but ... > Tested-by: Luca Fancellu not this one given the change. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 04 14:49:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:49:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300015.1574574 (Exim 4.92) (envelope-from ) id 1wJubZ-0000qD-Qq; Mon, 04 May 2026 14:49:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300015.1574574; Mon, 04 May 2026 14:49:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJubZ-0000q6-O0; Mon, 04 May 2026 14:49:05 +0000 Received: by outflank-mailman (input) for mailman id 1300015; Mon, 04 May 2026 14:49:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJubY-0000q0-Ik for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:49:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJubX-006OqB-NR for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:49:03 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b1de-2eae-0a2a0a5409dd-0a2a450bba4e-6 for ; Mon, 04 May 2026 16:49:03 +0200 Received: from [209.85.208.47] (helo=mail-ed1-f47.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b1de-212f-0a2a450b0019-d155d02fb939-3 for ; Mon, 04 May 2026 16:49:02 +0200 Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-67c2d57a5ceso2730628a12.3 for ; Mon, 04 May 2026 07:49:02 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-7-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1777906323-E2B68443-B36544AE/0/0 X-purgate-type: clean X-purgate-size: 451 On 13.03.2026 17:35, Thierry Escande wrote: > void pci_setup(void) > { > uint8_t is_64bar, using_64bar, bar64_relocate = 0; > uint32_t devfn, bar_reg, cmd, bar_data, bar_data_upper; > uint64_t base, bar_sz, bar_sz_upper, mmio_total = 0; > - uint32_t vga_devfn = 256; > + uint8_t vga_devfn = 0xff; This change (and the related ones elsewhere) looks bogus to me: 0xff is a valid devfn value, whereas 256 isn't. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 14:55:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 14:55:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300033.1574592 (Exim 4.92) (envelope-from ) id 1wJuhH-0002w2-Nz; Mon, 04 May 2026 14:54:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300033.1574592; Mon, 04 May 2026 14:54:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuhH-0002vv-KQ; Mon, 04 May 2026 14:54:59 +0000 Received: by outflank-mailman (input) for mailman id 1300033; Mon, 04 May 2026 14:54:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuhF-0002vp-SJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 14:54:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuhF-001nhN-3B for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:54:57 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b33c-2eae-0a2a0a5409dd-0a2a45068c94-12 for ; Mon, 04 May 2026 16:54:56 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b340-7371-0a2a45060019-d1558035e037-3 for ; Mon, 04 May 2026 16:54:56 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so67872985e9.2 for ; Mon, 04 May 2026 07:54:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-8-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1777906496-CFF7BD75-392FDA4A/0/0 X-purgate-type: clean X-purgate-size: 582 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -209,7 +225,16 @@ void pci_setup(void) > { > do { isa_irq = (isa_irq + 1) & 15; > } while ( !(PCI_ISA_IRQ_MASK & (1U << isa_irq)) ); > - pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq); > + > + if ( is_running_on_q35 ) > + { > + pci_writeb(PCI_ICH9_LPC_DEVFN, 0x60 + link, isa_irq); > + } > + else > + { > + pci_writeb(PCI_ISA_DEVFN, 0x60 + link, isa_irq); > + } Nit: Easier to read imo without the figure braces. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260313163455.790692-9-thierry.escande@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777906899-6D360CF5-14B01F25/0/0 X-purgate-type: clean X-purgate-size: 1269 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -176,10 +177,13 @@ void pci_setup(void) > > /* Create a list of device BARs in descending order of size. */ > struct bars { > - uint32_t is_64bar; > uint32_t devfn; > uint32_t bar_reg; > uint64_t bar_sz; > + uint64_t addr_mask; /* which bits of the base address can be written */ > + uint32_t bar_data; /* initial value - BAR flags here */ Nit: Comment style again (also elsewhere). > @@ -278,13 +282,21 @@ void pci_setup(void) > bar_reg = PCI_ROM_ADDRESS; > > bar_data = pci_readl(devfn, bar_reg); > + > + is_mem = !!(((bar_data & PCI_BASE_ADDRESS_SPACE) == > + PCI_BASE_ADDRESS_SPACE_MEMORY) || > + (bar_reg == PCI_ROM_ADDRESS)); Nit: Indentation (pending open parentheses want to be reflected by extra indenting blanks). With, as requested by Roger, is_mem switched to bool, the !! also can go away, and with it perhaps one pair of parentheses. (I realize pre-existing code further down has similar issues, yet when such code is touched - and even more so when new code is added - this wants getting right, to aid readability.) Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:12:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:12:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300050.1574612 (Exim 4.92) (envelope-from ) id 1wJuy5-0006im-8k; Mon, 04 May 2026 15:12:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300050.1574612; Mon, 04 May 2026 15:12:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuy5-0006if-5I; Mon, 04 May 2026 15:12:21 +0000 Received: by outflank-mailman (input) for mailman id 1300050; Mon, 04 May 2026 15:12:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJuy4-0006iZ-0o for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:12:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJuy2-002tva-Sb for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:12:18 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8b742-bab6-0a2a0a5309dd-0a2a4507b148-24 for ; Mon, 04 May 2026 17:12:18 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8b752-229c-0a2a45070019-d1558030b51c-3 for ; Mon, 04 May 2026 17:12:18 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b150559bso28646155e9.1 for ; Mon, 04 May 2026 08:12:18 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1777907538-AC563C48-ECD8A3C7/0/0 X-purgate-type: clean X-purgate-size: 2640 On 13.03.2026 17:35, Thierry Escande wrote: > This patch adds 2 HVMOP hypercalls, HVMOP_get|set_ecam_space, used to > set and get the base address and size of the PCIe ECAM space as > configured by hvmloader. > > Signed-off-by: Thierry Escande Just in case we want to stick to these (see Roger's earlier comments throughout the series), a few remarks here: > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -5195,6 +5195,58 @@ long do_hvm_op(unsigned long op, XEN_GUEST_HANDLE_PARAM(void) arg) > rc = current->hcall_compat ? compat_altp2m_op(arg) : do_altp2m_op(arg); > break; > > + case HVMOP_set_ecam_space: { > + xen_hvm_ecam_space_t ecam; > + struct domain *d; > + > + if ( copy_from_guest( &ecam, guest_handle_cast(arg, xen_hvm_ecam_space_t), 1 ) ) > + return -EFAULT; > + > + d = rcu_lock_domain_by_any_id(ecam.domid); > + if ( d == NULL ) > + return -ESRCH; > + > + if ( d->arch.ecam_addr ) { > + rcu_unlock_domain(d); > + return -EFAULT; > + } > + > + if ( (ecam.size >> 28) || (!ecam.addr) ) { > + rcu_unlock_domain(d); > + return -EINVAL; > + } > + > + d->arch.ecam_addr = ecam.addr; > + d->arch.ecam_size = ecam.size; Shorter (and easier to follow as well as less error prone as to the rcu_unlock_domain()) if ( d->arch.ecam_addr ) rc = -E...; else if ( (ecam.size >> 28) || !ecam.addr ) rc = -EINVAL; else { d->arch.ecam_addr = ecam.addr; d->arch.ecam_size = ecam.size; } all utilizing ... > + rcu_unlock_domain(d); ... this. The magic 28 also needs (a) explaining and/or (b) abstracting (a suitably named #define might address both). > --- a/xen/include/public/hvm/hvm_op.h > +++ b/xen/include/public/hvm/hvm_op.h > @@ -166,6 +166,17 @@ struct xen_hvm_get_mem_type { > typedef struct xen_hvm_get_mem_type xen_hvm_get_mem_type_t; > DEFINE_XEN_GUEST_HANDLE(xen_hvm_get_mem_type_t); > > +#define HVMOP_set_ecam_space 16 > +#define HVMOP_get_ecam_space 17 > +struct xen_hvm_ecam_space { > + domid_t domid; > + uint16_t pad[3]; /* align next field on 8-byte boundary */ The comment, as is, is wrong for 32-bit HVM guests: There ... > + uint64_t addr; ... this is only 4-byte aligned, and hence the entire structure only has 4-byte alignment, and hence the padding also only guarantees 4- byte alignment. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777908164-C0159DB1-D871B689/0/0 X-purgate-type: clean X-purgate-size: 869 On 13.03.2026 17:35, Thierry Escande wrote: > @@ -298,6 +300,19 @@ bool arch_ioreq_server_get_type_addr(const struct domain *d, > *addr |= CF8_ADDR_HI(cf8); > } > } > + else if ( p->type == IOREQ_TYPE_COPY && > + (mmio_start >= d->arch.ecam_addr && > + mmio_start < (d->arch.ecam_addr + d->arch.ecam_size)) ) > + { > + pci_sbdf_t sbdf; > + unsigned int reg = mmio_start & ~PAGE_MASK; If you use PAGE_MASK here, ... > + sbdf.bdf = (((mmio_start - d->arch.ecam_addr) & 0x0ffff000) >> 12); ... why not PAGE_SHIFT here? And why the masking by 0x0ffff000? Doesn't the earlier range check make this unnecessary (as long as .ecam_size is plausible)? Finally, nit: There's a stray blank after the =, and one pair of parentheses could perhaps also be dropped. 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ARM > uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > defines it). > > Fix the generic macros to subtract/add frametable_base_pdx, defaulting > to 0 when the arch does not define it. This makes the generic macros > correct for all architectures, even though they are only used on x86 > today. Hm, I assume this offset was added because the original mask PDX compression won't (usually) compress the gap between 0 and the start of RAM. However the newish offset PDX compression should be able to compress from 0 to start of RAM, and hence you don't need to apply an extra PDX offset there? If that's indeed the case it might be better to integrate frametable_base_pdx into the mask compression algorithm itself, so that on some arches it's a mask plus a decrease. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <50c96e2306538eb7cd28ddfcb21163c628fae0a4.1776259594.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777909310-4236CA53-5356D623/0/0 X-purgate-type: clean X-purgate-size: 1725 On 15.04.2026 15:32, Teddy Astie wrote: > Introduce vpid_sync_vcpu_context to do a single-context invalidation > on the vpid attached to the vcpu as a alternative to per-gva and all-context > invlidations. > > Signed-off-by: Teddy Astie > --- > xen/arch/x86/include/asm/hvm/vmx/vmx.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/xen/arch/x86/include/asm/hvm/vmx/vmx.h b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > index da04752e17..3524cb3536 100644 > --- a/xen/arch/x86/include/asm/hvm/vmx/vmx.h > +++ b/xen/arch/x86/include/asm/hvm/vmx/vmx.h > @@ -452,6 +452,27 @@ static inline void ept_sync_all(void) > > void ept_sync_domain(struct p2m_domain *p2m); > > +static inline void vpid_sync_vcpu_context(const struct vcpu *v) > +{ > + int type = INVVPID_SINGLE_CONTEXT; > + > + /* > + * If single context invalidation is not supported, we escalate to > + * use all context invalidation. > + */ > + if ( likely(cpu_has_vmx_vpid_invvpid_single_context) ) > + goto execute_invvpid; > + > + /* > + * If single context invalidation is not supported, we escalate to > + * use all context invalidation. > + */ > + type = INVVPID_ALL_CONTEXT; > + > +execute_invvpid: > + __invvpid(type, v->arch.hvm.n1asid.asid, 0); > +} I think this (such) better would be introduced with a user (else the description wants to say what it's going to be needed for). I further think that this (such) would better be done without goto (else at the very least the label wants to conform to ./CODING_STYLE). And finally I think that the local variable would better be of an unsigned type. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:49:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:49:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300082.1574646 (Exim 4.92) (envelope-from ) id 1wJvYF-0004bO-Jf; Mon, 04 May 2026 15:49:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300082.1574646; Mon, 04 May 2026 15:49:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvYF-0004bH-GL; Mon, 04 May 2026 15:49:43 +0000 Received: by outflank-mailman (input) for mailman id 1300082; Mon, 04 May 2026 15:49:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvYD-0004bB-KJ for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:49:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJvYA-000Vuo-K5 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:49:40 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c013-5cb7-0a2a0a5109dd-0a2a450ca604-8 for ; Mon, 04 May 2026 17:49:40 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c013-62f1-0a2a450c0019-d155802ab8cf-3 for ; Mon, 04 May 2026 17:49:39 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so48079985e9.2 for ; Mon, 04 May 2026 08:49:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1777909779-6C567CF5-B1E9A1A7/0/0 X-purgate-type: clean X-purgate-size: 1521 On 15.04.2026 15:32, Teddy Astie wrote: > Track on which pCPU each vCPU of a domain ran. This will > be used to know whether a TLB flush is required or not > when the vCPU is migrated on another pCPU. Somewhat related tracking already exists - see the dirty_cpumask field. But what title and description say doesn't match ... > @@ -977,6 +978,8 @@ void asmlinkage svm_vmenter_helper(void) > > svm_sync_vmcb(curr, vmcb_needs_vmsave); > > + curr->domain->latest_vcpu[cpu] = curr->vcpu_id; ... the implementation anyway: You track which vCPU last ran on a given pCPU. Since the same pCPU may have run multiple vCPU-s which then weren't scheduled again, you lose data afaict. > @@ -992,6 +993,13 @@ struct domain *domain_create(domid_t domid, > if ( !zalloc_cpumask_var(&d->dirty_cpumask) ) > goto fail; > > + err = -ENOMEM; > + d->latest_vcpu = xmalloc_array(int, nr_cpu_ids); xvmalloc_array() please, as this can be huge. It possibly being huge is also of concern. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -567,6 +567,10 @@ struct domain > /* Bitmask of CPUs which are holding onto this domain's state. */ > cpumask_var_t dirty_cpumask; > > + /* Mapping of the latest vCPU that ran on a specific CPU > + * (-1 if the vCPU hasn't ran yet) */ > + int *latest_vcpu; Why plain int? You don't really leverage -1 as a sentinel, and any unsigned value >= nr_cpu_ids would do in its stead. Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 15:54:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 15:54:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300091.1574655 (Exim 4.92) (envelope-from ) id 1wJvdB-00067h-3o; Mon, 04 May 2026 15:54:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300091.1574655; Mon, 04 May 2026 15:54:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvdB-00067a-18; Mon, 04 May 2026 15:54:49 +0000 Received: by outflank-mailman (input) for mailman id 1300091; Mon, 04 May 2026 15:54:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJvd9-00067U-Lo for xen-devel@lists.xenproject.org; Mon, 04 May 2026 15:54:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJvd8-009cXr-TH for xen-devel@lists.xenproject.org; Mon, 04 May 2026 17:54:46 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c13e-2eae-0a2a0a5409dd-0a2a450bc4e2-6 for ; Mon, 04 May 2026 17:54:46 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c146-212f-0a2a450b0019-d155802ddcd9-3 for ; Mon, 04 May 2026 17:54:46 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48909558b3aso45771245e9.0 for ; Mon, 04 May 2026 08:54:46 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <76d570a1b444a0bf2308389d9ed8bef8878b0c96.1776259594.git.teddy.astie@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777910086-07979F3B-BC976202/0/0 X-purgate-type: clean X-purgate-size: 1562 On 15.04.2026 15:32, Teddy Astie wrote: > This field is meant to be used to schedule a TLB flush on the vCPU > before waking it up. This field can be set from another vCPU at any > time. > > Schedule a TLB flush when the vCPU is migrated to another CPU. > This is needed as the vCPU-related TLB entries may be out of sync > with what happened on another core. While not an issue with ... > --- a/xen/common/sched/core.c > +++ b/xen/common/sched/core.c > @@ -1188,7 +1188,12 @@ static void sched_unit_migrate_finish(struct sched_unit *unit) > > /* Wake on new CPU. */ > for_each_sched_unit_vcpu ( unit, v ) > + { > + if ( old_cpu != new_cpu ) > + /* Migrating to another CPU needs TLB flush */ > + v->needs_tlb_flush = true; ... this setting of the flag, for almost any other place (which apparently the next patch is going to introduce, judging by its title) the immediate question is: What if the vCPU is presently running? The flag is meant to only take effect on migration to another pCPU. IOW the overall purpose doesn't become quite clear. > --- a/xen/include/xen/sched.h > +++ b/xen/include/xen/sched.h > @@ -224,6 +224,8 @@ struct vcpu > bool defer_shutdown; > /* VCPU is paused following shutdown request (d->is_shutting_down)? */ > bool paused_for_shutdown; > + /* VCPU needs its TLB flushed before waking. */ > + bool needs_tlb_flush; If only x86 is going to use the field, why is it being put here? Jan From xen-devel-bounces@lists.xenproject.org Mon May 04 16:18:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:18:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300101.1574665 (Exim 4.92) (envelope-from ) id 1wJw04-0001VL-VT; Mon, 04 May 2026 16:18:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300101.1574665; Mon, 04 May 2026 16:18:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw04-0001VD-SV; Mon, 04 May 2026 16:18:28 +0000 Received: by outflank-mailman (input) for mailman id 1300101; Mon, 04 May 2026 16:18:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw03-0001V7-MC for xen-devel@lists.xenproject.org; Mon, 04 May 2026 16:18:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJw02-0032bR-B4 for xen-devel@lists.xenproject.org; Mon, 04 May 2026 18:18:26 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8c6c1-bab6-0a2a0a5309dd-0a2a450383d6-12 for ; Mon, 04 May 2026 18:18:26 +0200 Received: from [79.135.106.104] (helo=mail-106104.protonmail.ch) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8c6d1-672d-0a2a45030019-4f876a688269-3 for ; Mon, 04 May 2026 18:18:26 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777911504; x=1778170704; bh=V7sg3EXKpe3ODgXm7r8fn96NbeRoTXzy0BmXoYu5iro=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=Ye0W3KCa++iIUGUF3iIpcsiNqkRul8sSVVRzUwbTh4fbbNz89zM7aGxi1PkC3yjoG d/4zplRy3SZktObsP4VaF30a3spGQFinrF3MG7yZ1mvCyijvnwxcG+OqSvVCHKsEHk 0o10G5l7LPQn9wWm82KVtypmIj98ceVh024aJOpkq67e2jPqJ9Us7uPConfkgWO9BM SQ3NE11wuDN3Lan2IPnGYP6a2c9qcLbvpKqiIBsrO/Vwnhn6R9eQu804K1ybQTxyGS VL0B2RNzbEpIAxE70f7EIKgMSSKfH7/9q1+m3+e2xrPCZStZiBOCdJXLNyZRSFegd1 zKDX+wGu0dY5A== Date: Mon, 04 May 2026 16:18:19 +0000 To: Jan Beulich From: "Samuel.Montgomery61" Cc: "xen-devel@lists.xenproject.org" Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: In-Reply-To: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> References: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 4d95ca6219795bd954c22c823b5a6cdcc807f4d1 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777911506-2AD63938-A42898DC/0/0 X-purgate-type: clean X-purgate-size: 1624 On 04.05.2026 XX:XX, Jan Beulich wrote: > As you point out, there are issues with default-disabling. We already > have the "bootscrub=3D" command line option. Is there a reason this can't > be used here as well? I.e. is there a strong reason to put in (perhaps > significant) effort to identify and cover all the corner cases > associated with default-disabling? =20 A skilled admin could certainly use bootscrub=3Doff today. But I come at this from the Qubes OS project, where most users expect the system to work out of the box. Your average Qubes user won't know how or when to pass a Xen command line option. Having Xen detect encryption and do the right thing automatically would substantially benefit the project. =20 I also forgot to mention in my previous email that there's a broader opportunity with multi-key encryption (SEV, TME-MK). In this case, Xen could skip runtime scrubbing as well, since a domain's pages become unreadable the moment its key is destroyed. That's a separate feature, but I think it makes the case for Xen understanding and acting on the encryption capabilities of the platform rather than leaving it to users to set the right combination of options. =20 I believe the edge cases actually support the case for automatic configuration, since any user manually disabling the scrub would need to reason about kexec without a full hardware reset, suspend/resume restoring the previous key, and firmware writing to memory before encryption is activated, at very least. Auto-detection could handle these transparently rather than leaving them to the user. =20 Sam From xen-devel-bounces@lists.xenproject.org Mon May 04 16:25:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:25:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300111.1574673 (Exim 4.92) (envelope-from ) id 1wJw6K-00034d-LP; Mon, 04 May 2026 16:24:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300111.1574673; Mon, 04 May 2026 16:24:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw6K-00034W-Io; Mon, 04 May 2026 16:24:56 +0000 Received: by outflank-mailman (input) for mailman id 1300111; Mon, 04 May 2026 16:24:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJw6J-00034Q-7L for xen-devel@lists.xenproject.org; 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Message-ID: Date: Mon, 4 May 2026 17:24:47 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Jan Beulich References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Type: text/plain; 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One is v->arch.hvm.guest_cr[2] >>>> and one is in the VMCB. >>>> >>>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>>> loads and saves the guest CR2 across VMRUN/VMExit. >>>> >>>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>>> migration is cooperative and not done from the #PF handler, this also goes >>>> unoticed by guests. >>>> >>>> It also means that an emulated MOV-from-CR2 reads a stale value. >>>> >>>> Reported-by: Stefano Stabellini >>>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>>> Signed-off-by: Andrew Cooper >>> Tested-by: Stefano Stabellini >> Thanks, sadly I made the mistake of extending my XTF PoC for this. >> >> There are also bugs on the emulated MOV-to-CR2 side, and they're far >> harder to untangle. > Any slightly closer details as to what? hvmemul_write_cr() updates guest_cr[2] but doesn't sync it into the VMCB.  This doesn't show up on Intel because CR2 is switched explicitly in RAX across VMEntry/exit. But, it's not the only problem path. svm_vmexit_do_cr_access() is the fasthpath exit for CR intercepts when decode assists are available.  hvm_mov_to_cr() and hvm_mov_from_cr() are asymmetric in their handling of CR2.  mov_from will read from guest_cr[2] but mov_to will domain crash. However, case 2 ought to be unreachable in hvm_mov_from_cr() because of how we program the intercepts, yet the QEMU bug which caused this to get noticed will trigger an ASSERT() if I were to put one in. So, do I fix up both to account for the fact we know QEMU is buggy with intercepts? > >> This patch probably wants to go in in this form, accepting that there >> are issues still to be addressed on the other side. > I agree: > Reviewed-by: Jan Beulich Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 04 16:42:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 16:42:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300119.1574682 (Exim 4.92) (envelope-from ) id 1wJwNM-00062a-2D; Mon, 04 May 2026 16:42:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300119.1574682; Mon, 04 May 2026 16:42:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJwNL-00062T-VN; Mon, 04 May 2026 16:42:31 +0000 Received: by outflank-mailman (input) for mailman id 1300119; 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We already >> have the "bootscrub=" command line option. Is there a reason this can't >> be used here as well? I.e. is there a strong reason to put in (perhaps >> significant) effort to identify and cover all the corner cases >> associated with default-disabling? > > A skilled admin could certainly use bootscrub=off today. But I come at > this from the Qubes OS project, where most users expect the system to > work out of the box. Your average Qubes user won't know how or when to > pass a Xen command line option. Having Xen detect encryption and do the > right thing automatically would substantially benefit the project. > > I also forgot to mention in my previous email that there's a broader > opportunity with multi-key encryption (SEV, TME-MK). In this case, Xen > could skip runtime scrubbing as well, since a domain's pages become > unreadable the moment its key is destroyed. That's a separate feature, > but I think it makes the case for Xen understanding and acting on the > encryption capabilities of the platform rather than leaving it to users > to set the right combination of options. > > I believe the edge cases actually support the case for automatic > configuration, since any user manually disabling the scrub would need > to reason about kexec without a full hardware reset, suspend/resume > restoring the previous key, and firmware writing to memory before > encryption is activated, at very least. Auto-detection could handle > these transparently rather than leaving them to the user. What exists in Xen right now is a mess. Scrubbing is ill-defined.  One part of it says "make sure after a crash we don't have old guest data around in memory", and encryption is specifically irrelevant for this case; the ephemeral key doesn't change on warm reset. Something relevant to QubeOS is that for DRTM (Anti Evil Maid), it is required (by the TXT spec at least) that Xen scrub memory between receiving a shutdown request and actioning it.  Failure to do so causes firmware to zero everything on the way back up.  Fixing this is an open TODO. Another aspect is to populate Xen's free memory pool with ready-to-go memory.  Here we have a weird split, because when scrubbing in Xen's idle loop as introduced, the boot time scrub was not disabled.  Except that doing this in the idle loop during boot is bad because it interferes with microcode loading during AP boot, which is why it's delayed until the machine is mostly up. There probably is room to tweak a little, but "RAM being encrypted" has no baring on the other safety justifications. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 04 18:50:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 18:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300138.1574691 (Exim 4.92) (envelope-from ) id 1wJyN3-0005Cn-4g; Mon, 04 May 2026 18:50:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300138.1574691; Mon, 04 May 2026 18:50:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJyN3-0005Cf-15; Mon, 04 May 2026 18:50:21 +0000 Received: by outflank-mailman (input) for mailman id 1300138; Mon, 04 May 2026 18:50:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJyN1-0005CZ-Tc for xen-devel@lists.xenproject.org; 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Date: Mon, 4 May 2026 20:50:10 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: xen-devel@lists.xenproject.org Cc: Bertrand Marquis , Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH] automation/gitlab: introduce macOS build jobs Message-ID: References: <20260423190459.93299-1-roger.pau@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260423190459.93299-1-roger.pau@citrix.com> X-ClientProxiedBy: MR2P264CA0168.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:1::31) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SJ0PR03MB5648:EE_ X-MS-Office365-Filtering-Correlation-Id: 7e0bec7d-62e5-4687-7815-08deaa0dfa38 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: D2K1DYlZBPLQAoZeHm7dfesdxM2JRIrzS6TDDu7Ko70BJ+BhP8EjCOOkAfFjLz9/r5JLbyYfdfmZd7T2VPpzuWTn/vvZm5FfDykGajUTXuMKtgbLe3yNZeAKi3J1EV+KZkhT8AVCUlURoBdVSraO/WIfbJ3pQT336UQAGOtBBtb/JZE14hmKoQiRP1B17E+89DsRdtee2B6q9pNEiShuasKgQ3VFTgVUbeI6+46nXmA4VmzXwhAxIX+UnhjaHyKweqe0fNb+Nmbmo9q3/ub6wxPOCAgL8P7r/hQo/N+8Vpro08S2lPIjJCotpkji3VbymFZioEImO5I1/D/y/+sEAI9A/0a2RVaAt5CDSHpqn4vzsuAcmP3ACIM9/gKQ/faYQ4zMml8ZceVqCbhlUuRuV3Q1JwH8C6vHOi4h8qZt2MA1BVDVjsRZWNQBSBdoNJQULU82fCmHSRgJC8ur0YxLzTH/eEjorfKlsDyJBFeSLby/Ge3JItD5UeNKJTBhTzeuKuRrC5zAX0vMXEZny8Gfq9s59/RWfWbMbh0tkLYNw0dsgevCBS5HgMHX34lCRK3/AP/tpyDkI94Yq/krFvikqbuHsWYw2+XCM98T2aF17HwxyZPQ2ERuJ3GKbA24n/m9geZi58XVqAye2NtjhyCC3rGWQ08AUeDy3GEGBc+NTU+rtJJZ4a6iQwTl4RkCDLqPjlciSfUx5EtRhXlaQ0uibA== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; 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Introduce two Gitlab macOS build jobs that > reproduce the ones present on CirrusCI. > > According to the "Community programs" Gitlab documentation [0] we get > 50,000 compute minutes per month. The arm64 job takes ~1m 15s, and the > x86_64 one ~2m. I think it's likely enough given the amount of minutes we > have available. We might need to reconsider if we add more tasks that > consume compute minutes. > > [0] https://docs.gitlab.com/subscriptions/community_programs/#gitlab-for-open-source Ping? Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Mon May 04 19:51:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 04 May 2026 19:51:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300152.1574700 (Exim 4.92) (envelope-from ) id 1wJzJy-0004Ok-CY; Mon, 04 May 2026 19:51:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300152.1574700; Mon, 04 May 2026 19:51:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJzJy-0004Od-9x; Mon, 04 May 2026 19:51:14 +0000 Received: by outflank-mailman (input) for mailman id 1300152; Mon, 04 May 2026 19:51:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wJzJw-0004OX-SP for xen-devel@lists.xenproject.org; Mon, 04 May 2026 19:51:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wJzJu-00HGra-Np for xen-devel@lists.xenproject.org; Mon, 04 May 2026 21:51:10 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f8f890-bab6-0a2a0a5309dd-0a2a450a8fc8-42 for ; Mon, 04 May 2026 21:51:10 +0200 Received: from [79.135.106.103] (helo=mail-106103.protonmail.ch) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f8f8ae-56b3-0a2a450a0019-4f876a67b98f-3 for ; Mon, 04 May 2026 21:51:10 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=protonmail3 header.d=protonmail.com header.i="@protonmail.com" header.h="Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1777924268; x=1778183468; bh=2cNEIrg6yvrC6l7wVPRLypp8fTO1uZhpKDrUZobMLno=; h=Date:To:From:Cc:Subject:Message-ID:In-Reply-To:References: Feedback-ID:From:To:Cc:Date:Subject:Reply-To:Feedback-ID: Message-ID:BIMI-Selector; b=je26RxX8WUbwpdqO4benbbu3niagzNZxdal6hZUfoNbf2QqxO+it9fe6mLE2LQpeg XEGS00Knl0otLtrx2TpBhMVxr3S88H+EPNzpSoxaL+Hnl8EMMZNeahhFgpcWBmBNAF DkxQsQ/penOwSNE+q7qjYje4DmR4C+hMMdXuY8yDhQtxw1n1wxMhoKChmlPex7MVDE UNQaA4mNSTtyTyT9cGuMMkZyGpkIJcFLrFU4l+vTO8UpTdNs9MwMAf2FdzFqneJBUc zyfaOj7uUTX9jh27/4PcHCvdxpnC92PWkMT7OjxZBP2O+bYGNu7fqc4ClHNGNz90VW IBCPT8JmnzmJA== Date: Mon, 04 May 2026 19:51:02 +0000 To: Andrew Cooper From: "Samuel.Montgomery61" Cc: Jan Beulich , "xen-devel@lists.xenproject.org" Subject: Re: [RFC] Skip boot memory scrub on platforms with full-memory encryption Message-ID: In-Reply-To: References: <8c619af2-0dbd-468f-aa17-c1224d315304@suse.com> Feedback-ID: 16446063:user:proton X-Pm-Message-ID: 75318f11224ff374b7543e77aabf6c69a2df8c65 MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1777924270-4757C8B7-531F4C19/0/0 X-purgate-type: clean X-purgate-size: 1220 On XX.05.2026 XX:XX, Andrew Cooper wrote: > One part of it says "make sure after a crash > we don't have old guest data around in memory", and encryption is > specifically irrelevant for this case; the ephemeral key doesn't change > on warm reset. =20 Could you clarify this? My understanding is that firmware re-runs on a warm reset and re-initializes TME with a new key. The key would only persist across kexec, where the CPU is never reset and firmware doesn't re-run. Am I wrong about that? =20 > Something relevant to QubeOS is that for DRTM (Anti Evil Maid), it is > required (by the TXT spec at least) that Xen scrub memory between > receiving a shutdown request and actioning it. =20 Agreed, but that's shutdown scrubbing, not boot scrubbing. A separate problem. =20 > Another aspect is to populate Xen's free memory pool with ready-to-go > memory. =20 I don't think "ready-to-go" requires zeroed pages. bootscrub=3Doff already hands out unscrubbed pages, and the debug build specifically poisons pages with a non-zero pattern to catch code that relies on them being zeroed. So the functional requirement is that pages are safe to hand out, which encryption satisfies, right? =20 Sam From xen-devel-bounces@lists.xenproject.org Tue May 05 05:48:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 05:48:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300176.1574710 (Exim 4.92) (envelope-from ) id 1wK8dv-0007et-IS; Tue, 05 May 2026 05:48:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300176.1574710; Tue, 05 May 2026 05:48:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8dv-0007eg-DW; Tue, 05 May 2026 05:48:27 +0000 Received: by outflank-mailman (input) for mailman id 1300176; Tue, 05 May 2026 05:48:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8dt-0007ea-LS for xen-devel@lists.xenproject.org; Tue, 05 May 2026 05:48:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wK8ds-003UP4-QM for xen-devel@lists.xenproject.org; Tue, 05 May 2026 07:48:24 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f984a7-e002-0a2a0a5209dd-0a2a4509d070-2 for ; Tue, 05 May 2026 07:48:24 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f984a8-2497-0a2a45090019-d1558035f1fd-3 for ; Tue, 05 May 2026 07:48:24 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso57761085e9.3 for ; Mon, 04 May 2026 22:48:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 22:48:23 -0700 (PDT) Message-ID: <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Date: Tue, 5 May 2026 07:48:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests From: Jan Beulich To: Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1777960104-4216DA53-2EC43815/0/0 X-purgate-type: clean X-purgate-size: 1379 On 04.05.2026 12:45, Jan Beulich wrote: > On 28.04.2026 09:48, Roger Pau Monné wrote: >> On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >>> This series introduces initial Q35 chipset support for HVM guests, based on the >>> patchset at [1] by Alexey Gerasimenko. >>> >>> Basic support means that this patchset allows to start an HVM guest that >>> emulates a Q35 chipset via Qemu and implements access to PCIe extended >>> configuration space for such devices emulated by Qemu. >>> >>> Support for PCIe device passthrough is not implemented yet. This is planned but >>> implies modifications in the hypervisor and the firmwares, mainly for the >>> support of multiple PCI buses. >> >> Why do you need multi bus support to expose PCIe capabilities? I'm >> not seeing the relation between those two. You could still expose a >> single bus on the MCFG table. > > Can a valid PCIe topology be expressed with just bus 0? If an endpoint > to be handed to a guest isn't root complex integrated, would it be valid > to make it appear so by putting it on bus 0? We discussed this with Roger on our x86 call, and we came to the agreement that for the time being putting everything on bus 0 may be good enough. Introducing of bridge(s) and anything else that's required for multi-bus support will want to be a separate piece of work. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 05:50:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 05:50:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300183.1574719 (Exim 4.92) (envelope-from ) id 1wK8fQ-000879-QS; Tue, 05 May 2026 05:50:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300183.1574719; Tue, 05 May 2026 05:50:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8fQ-000872-N9; Tue, 05 May 2026 05:50:00 +0000 Received: by outflank-mailman (input) for mailman id 1300183; Tue, 05 May 2026 05:49:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK8fP-00086w-In for xen-devel@lists.xenproject.org; Tue, 05 May 2026 05:49:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wK8fO-004V5v-VA for xen-devel@lists.xenproject.org; Tue, 05 May 2026 07:49:58 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f984fb-bab6-0a2a0a5309dd-0a2a45039e54-28 for ; Tue, 05 May 2026 07:49:58 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f98506-672d-0a2a45030019-d1558029a4cb-3 for ; Tue, 05 May 2026 07:49:58 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4891f625344so51185705e9.0 for ; Mon, 04 May 2026 22:49:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 04 May 2026 22:49:58 -0700 (PDT) Message-ID: Date: Tue, 5 May 2026 07:49:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests From: Jan Beulich To: Thierry Escande Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <89ac0d3b-d155-4916-a943-156b1f7c7e2f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777960198-A3161938-70672F11/0/0 X-purgate-type: clean X-purgate-size: 1583 On 05.05.2026 07:48, Jan Beulich wrote: > On 04.05.2026 12:45, Jan Beulich wrote: >> On 28.04.2026 09:48, Roger Pau Monné wrote: >>> On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >>>> This series introduces initial Q35 chipset support for HVM guests, based on the >>>> patchset at [1] by Alexey Gerasimenko. >>>> >>>> Basic support means that this patchset allows to start an HVM guest that >>>> emulates a Q35 chipset via Qemu and implements access to PCIe extended >>>> configuration space for such devices emulated by Qemu. >>>> >>>> Support for PCIe device passthrough is not implemented yet. This is planned but >>>> implies modifications in the hypervisor and the firmwares, mainly for the >>>> support of multiple PCI buses. >>> >>> Why do you need multi bus support to expose PCIe capabilities? I'm >>> not seeing the relation between those two. You could still expose a >>> single bus on the MCFG table. >> >> Can a valid PCIe topology be expressed with just bus 0? If an endpoint >> to be handed to a guest isn't root complex integrated, would it be valid >> to make it appear so by putting it on bus 0? > > We discussed this with Roger on our x86 call, and we came to the agreement > that for the time being putting everything on bus 0 may be good enough. > Introducing of bridge(s) and anything else that's required for multi-bus > support will want to be a separate piece of work. Oh, and: Where applicable this (deliberate) restriction (or should I say mistreatment) will want calling out in description(s). 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Mon, 04 May 2026 23:00:55 -0700 (PDT) Message-ID: Date: Tue, 5 May 2026 08:00:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/svm: Always sync guest CR2 on VMExit To: Andrew Cooper Cc: Xen-devel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini References: <20260501213826.1291860-1-andrew.cooper3@citrix.com> <981a0dad-dcbb-42c8-a840-6f228eb89be1@citrix.com> <53c4fb20-8cb9-440a-b37a-d829ec940e1b@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777960855-F5204CF5-BA79FEE4/0/0 X-purgate-type: clean X-purgate-size: 2233 On 04.05.2026 18:24, Andrew Cooper wrote: > On 04/05/2026 6:14 am, Jan Beulich wrote: >> On 02.05.2026 00:21, Andrew Cooper wrote: >>> On 01/05/2026 10:44 pm, Stefano Stabellini wrote: >>>> On Fri, 1 May 2026, Andrew Cooper wrote: >>>>> Under SVM, there are two copies of guest CR2. One is v->arch.hvm.guest_cr[2] >>>>> and one is in the VMCB. >>>>> >>>>> Xen doesn't intercept CR2 accesses, so this mostly goes unnoticed; hardware >>>>> loads and saves the guest CR2 across VMRUN/VMExit. >>>>> >>>>> For HAP guests (where #PF is not intercepted, and therefore we don't typically >>>>> inject #PF either), this causes the guest CR2 value to be lost on migrate. As >>>>> migration is cooperative and not done from the #PF handler, this also goes >>>>> unoticed by guests. >>>>> >>>>> It also means that an emulated MOV-from-CR2 reads a stale value. >>>>> >>>>> Reported-by: Stefano Stabellini >>>>> Fixes: d1bd157fbc9b ("Big merge the HVM full-virtualisation abstractions.") >>>>> Signed-off-by: Andrew Cooper >>>> Tested-by: Stefano Stabellini >>> Thanks, sadly I made the mistake of extending my XTF PoC for this. >>> >>> There are also bugs on the emulated MOV-to-CR2 side, and they're far >>> harder to untangle. >> Any slightly closer details as to what? > > hvmemul_write_cr() updates guest_cr[2] but doesn't sync it into the > VMCB.  This doesn't show up on Intel because CR2 is switched explicitly > in RAX across VMEntry/exit. > > But, it's not the only problem path. > > svm_vmexit_do_cr_access() is the fasthpath exit for CR intercepts when > decode assists are available.  hvm_mov_to_cr() and hvm_mov_from_cr() are > asymmetric in their handling of CR2.  mov_from will read from > guest_cr[2] but mov_to will domain crash. > > However, case 2 ought to be unreachable in hvm_mov_from_cr() because of > how we program the intercepts, yet the QEMU bug which caused this to get > noticed will trigger an ASSERT() if I were to put one in. > > So, do I fix up both to account for the fact we know QEMU is buggy with > intercepts? I think that's going to be (about) the best we can do. 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Mon, 04 May 2026 23:06:26 -0700 (PDT) MIME-Version: 1.0 References: <3235FD35-5EF1-4E77-B30E-AABEABCC081C@arm.com> In-Reply-To: <3235FD35-5EF1-4E77-B30E-AABEABCC081C@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 09:06:15 +0300 X-Gm-Features: AVHnY4KGuXuIJPXZ56mqKw7xhaX19h8vIRKNSJ_Ys9-_ZZRDHVjaIz2EsfxTdIA Message-ID: Subject: Re: [PATCH v8 03/13] xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777961187-F620CCF5-ECEF7BE5/0/0 X-purgate-type: clean X-purgate-size: 5250 Hi Luca, Thank you for the review. On Wed, Apr 22, 2026 at 6:57=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > + > > +static int gicv3_lpi_disable_lpis(void __iomem *rdist_base) > > +{ > > + uint32_t reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > + int ret; > > + > > + if ( !(reg & GICR_CTLR_ENABLE_LPIS) ) > > + return 0; > > + > > + writel_relaxed(reg & ~GICR_CTLR_ENABLE_LPIS, rdist_base + GICR_CTL= R); > > + > > + /* > > + * The spec only guarantees programmability when we have observed = the bit > > + * cleared. Where clearing is supported, RWP must reach 0 before t= ouching > > + * PROPBASER/PENDBASER again. > > + */ > > + wmb(); > > + > > + ret =3D gicv3_do_wait_for_rwp(rdist_base); > > I=E2=80=99m looking into the implementation of gicv3_do_wait_for_rwp() an= d I see > it=E2=80=99s polling on bit 31 (UWP) instead of bit 3 (RWP)? > > Not related to this patch but I feel we need to raise this. Good catch, thanks. UWP does have SGI-related semantics, but it is not the same as redistributo= r RWP. The existing helper is used as an RWP wait helper after redistributor register writes, so the redistributor path should poll GICR_CTLR.RWP rather than GICR_CTLR.UWP. I will send a separate prerequisite patch to make the redistributor path use GICR_CTLR_RWP. > > > + if ( ret ) > > + return ret; > > + > > + reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > + if ( reg & GICR_CTLR_ENABLE_LPIS ) > > + return -EBUSY; > > + > > + return 0; > > +} > > + > > /* > > * Tell a redistributor about the (shared) property table, allocating o= ne > > * if not already done. > > @@ -373,7 +434,21 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base= ) > > /* Make sure LPIs are disabled before setting up the tables. */ > > reg =3D readl_relaxed(rdist_base + GICR_CTLR); > > if ( reg & GICR_CTLR_ENABLE_LPIS ) > > - return -EBUSY; > > + { > > + if ( gicv3_lpi_tables_match(rdist_base) ) > > + return -EBUSY; > > + > > + ret =3D gicv3_lpi_disable_lpis(rdist_base); > > + if ( ret =3D=3D -EBUSY ) > > + { > > + printk(XENLOG_ERR > > + "GICv3: CPU%d: LPIs still enabled with unexpected r= edistributor tables\n", > > + smp_processor_id()); > > + return -EINVAL; > > + } > > + if ( ret ) > > + return ret; > > + } > > > > ret =3D gicv3_lpi_set_pendtable(rdist_base); > > if ( ret ) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index bc07f97c16..34fb065afc 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -274,8 +274,8 @@ static void gicv3_enable_sre(void) > > isb(); > > } > > > > -/* Wait for completion of a distributor change */ > > -static void gicv3_do_wait_for_rwp(void __iomem *base) > > +/* Wait for completion of a distributor/redistributor write-pending ch= ange. */ > > +int gicv3_do_wait_for_rwp(void __iomem *base) > > { > > uint32_t val; > > bool timeout =3D false; > > @@ -295,17 +295,22 @@ static void gicv3_do_wait_for_rwp(void __iomem *b= ase) > > } while ( 1 ); > > > > if ( timeout ) > > + { > > dprintk(XENLOG_ERR, "RWP timeout\n"); > > + return -ETIMEDOUT; > > + } > > + > > + return 0; > > } > > > > static void gicv3_dist_wait_for_rwp(void) > > { > > - gicv3_do_wait_for_rwp(GICD); > > + (void)gicv3_do_wait_for_rwp(GICD); > > } > > > > static void gicv3_redist_wait_for_rwp(void) > > { > > - gicv3_do_wait_for_rwp(GICD_RDIST_BASE); > > + (void)gicv3_do_wait_for_rwp(GICD_RDIST_BASE); > > } > > > > static void gicv3_wait_for_rwp(int irq) > > @@ -925,7 +930,7 @@ static int __init gicv3_populate_rdist(void) > > gicv3_set_redist_address(rdist_addr, procnum); > > > > ret =3D gicv3_lpi_init_rdist(ptr); > > - if ( ret && ret !=3D -ENODEV ) > > + if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > { > > printk("GICv3: CPU%d: Cannot initialize LPIs: %= u\n=E2=80=9D, > > This should be the other way around? %u for smp_processor_id() and %d for= ret? You're right, thanks. I will fix the format string. > > > smp_processor_id(), ret); > > diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/inclu= de/asm/gic_v3_its.h > > index fc5a84892c..081bd19180 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_its.h > > +++ b/xen/arch/arm/include/asm/gic_v3_its.h > > Why this header and not gic.h? You're right, this prototype is not ITS-specific. I will move it to gic.h. Best regards, Mykola > > > @@ -133,6 +133,7 @@ struct host_its { > > > > /* Map a collection for this host CPU to each host ITS. */ > > int gicv3_its_setup_collection(unsigned int cpu); > > +int gicv3_do_wait_for_rwp(void __iomem *base); > > > > #ifdef CONFIG_HAS_ITS > > > > > > The rest looks ok to me! > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 06:48:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 06:48:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300218.1574746 (Exim 4.92) (envelope-from ) id 1wK9a9-0000E1-EY; Tue, 05 May 2026 06:48:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300218.1574746; Tue, 05 May 2026 06:48:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK9a9-0000Do-B6; Tue, 05 May 2026 06:48:37 +0000 Received: by outflank-mailman (input) for mailman id 1300218; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 0/sFvgQfzg7e+mtzbxdwkEpQLW0wyPUyCO3YAW5FMz7cxcfmiDU1iSYkXNw6lAKUI+VrBoHQ2zwMHc7QN6eirZRM4C2F/XV4s3/9MRzpraj81HcGpF0EHbxE85RvqE3w5NkHRc4ah3fcjqBIoeA5Qu1mXKp6CEfMF7Z1paxtXh+9iBzp452MNoUaV5tcsXiHxpO8SKUncEpLl/Sl40x6lXuKGVaigI90ib7Kx9wdQSseTkGSHZcW15lQpIEmAVNoee/NBbo/54RrV0eF43OHLssT5kK8RbWAf/KG9Mu9kv2cOiYlPM3tPQmtnlwr0tDkxSajMubVZYKd1Lkw+PKZgzaXtcpDqdnaQwwSYnzeivpUk69HkOPIOZJnwlbhsz+6RLVBv1ztra+l+9bKPl8U2IHaP9KeppZWcYlGmIXiGclRWDpIzAisNZBo3P9Mjqh6 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 06:48:23.7740 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4337b790-5199-4aaa-8f73-08deaa724da8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6184.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB8451 X-purgate-ID: tlsNG-42698a/1777963710-7D165F3B-908CECB4/0/0 X-purgate-type: clean X-purgate-size: 1570 On 04-May-26 17:28, Roger Pau Monné wrote: > On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >> the frame table starts at PDX 0, which is only true on x86. ARM >> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >> defines it). >> >> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >> to 0 when the arch does not define it. This makes the generic macros >> correct for all architectures, even though they are only used on x86 >> today. > > Hm, I assume this offset was added because the original mask PDX > compression won't (usually) compress the gap between 0 and the start > of RAM. However the newish offset PDX compression should be able to > compress from 0 to start of RAM, and hence you don't need to apply > an extra PDX offset there? > > If that's indeed the case it might be better to integrate > frametable_base_pdx into the mask compression algorithm itself, so > that on some arches it's a mask plus a decrease. The offset is needed regardless of whether compression is used. With CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. 0x80000000, the first valid PDX is 0x80000. Without frametable_base_pdx the frame table would have to be indexed from 0, wasting 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. So frametable_base_pdx is really a frame table indexing offset, not something tied to the compression algorithm. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 07:13:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 07:13:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300230.1574755 (Exim 4.92) (envelope-from ) id 1wK9xx-0004K4-EH; Tue, 05 May 2026 07:13:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300230.1574755; Tue, 05 May 2026 07:13:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wK9xx-0004Jx-Bd; Tue, 05 May 2026 07:13:13 +0000 Received: by outflank-mailman (input) for mailman id 1300230; Tue, 05 May 2026 07:13:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 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=?utf-8?B?TTNXVGovcVV1czIra2I5cTFFWGhHWEhhTWsxWmptQzdvQnpWSmxPdz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 112036f2-ac58-4d03-395e-08deaa75c191 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 07:13:07.0933 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: h87a38DH2uw52hpMTX7I67I2fvgTric9mRzCLdQ0BUHQSw3mGwYG40vNChTipRjc6KYtGKBQ1Q5eufeK1Bst3A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR03MB5752 X-purgate-ID: tlsNG-720697/1777965191-B3563161-C92E432A/0/0 X-purgate-type: clean X-purgate-size: 2527 On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: > > > On 04-May-26 17:28, Roger Pau Monné wrote: > > On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: > >> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume > >> the frame table starts at PDX 0, which is only true on x86. ARM > >> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >> defines it). > >> > >> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >> to 0 when the arch does not define it. This makes the generic macros > >> correct for all architectures, even though they are only used on x86 > >> today. > > > > Hm, I assume this offset was added because the original mask PDX > > compression won't (usually) compress the gap between 0 and the start > > of RAM. However the newish offset PDX compression should be able to > > compress from 0 to start of RAM, and hence you don't need to apply > > an extra PDX offset there? > > > > If that's indeed the case it might be better to integrate > > frametable_base_pdx into the mask compression algorithm itself, so > > that on some arches it's a mask plus a decrease. > The offset is needed regardless of whether compression is used. With > CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > 0x80000000, the first valid PDX is 0x80000. OK, so you are doing some (kind of) address space compression (removing the leading empty range to the first RAM region) even when PDX is disabled. > Without frametable_base_pdx > the frame table would have to be indexed from 0, wasting > 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. But you don't really "waste" memory, just address space? Oh, maybe not on ARM as it doesn't use pdx_group_valid? And so you unconditionally populate the frametable from PDX 0 to max PDX. > So frametable_base_pdx is really a frame table indexing offset, not > something tied to the compression algorithm. Right, it just seems odd to do that extra subtraction when using offset compression, as in that case the compression logic itself should remove that leading gap when RAM doesn't start at 0. Instead of generalizing and expanding the usage of frametable_base_pdx it might be better to implement support for pdx_group_valid when populating the frame table, and switch by default to the offset compression method that will already remove any leading unpopulated spaces? Thanks, Roger. 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Tue, 05 May 2026 00:26:43 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 10:26:31 +0300 X-Gm-Features: AVHnY4Ky8uJFLCBFZxjqUatpRvUbmjeQYVNb3WJbGYVqkHisl24pBjVF68cIxuo Message-ID: Subject: Re: [PATCH v8 04/13] xen/arm: gic-v3: Implement GICv3 suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-42698a/1777966004-7F57BF3B-15AC97D2/0/0 X-purgate-type: clean X-purgate-size: 16123 Hi Luca, Thank you for the review. On Thu, Apr 23, 2026 at 2:29=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index 34fb065afc..d182a71478 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -1072,12 +1072,12 @@ out: > > return res; > > } > > > > -static void gicv3_hyp_disable(void) > > +static void gicv3_hyp_enable(bool enable) > > { > > register_t hcr; > > > > hcr =3D READ_SYSREG(ICH_HCR_EL2); > > - hcr &=3D ~GICH_HCR_EN; > > + hcr =3D enable ? (hcr | GICH_HCR_EN) : (hcr & ~GICH_HCR_EN); > > WRITE_SYSREG(hcr, ICH_HCR_EL2); > > isb(); > > } > > @@ -1184,7 +1184,7 @@ static void gicv3_disable_interface(void) > > spin_lock(&gicv3.lock); > > > > gicv3_cpu_disable(); > > - gicv3_hyp_disable(); > > + gicv3_hyp_enable(false); > > > > spin_unlock(&gicv3.lock); > > } > > @@ -1920,6 +1920,313 @@ static bool gic_dist_supports_lpis(void) > > return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +/* This struct represent block of 32 IRQs */ > > NIT: s/represent/represents Ack. > > > +struct dist_irq_block { > > + uint32_t icfgr[2]; > > + uint32_t ipriorityr[8]; > > + uint64_t irouter[32]; > > + uint32_t isactiver; > > + uint32_t isenabler; > > +}; > > + > > +struct redist_ctx { > > + uint32_t ctlr; > > + uint32_t icfgr; /* only PPIs stored */ > > + uint32_t igroupr; > > I think Xen writes also GICD_IGROUPRE, we are not saving it so in case= of a reset > we would have GICD_IGROUPRE containing the reset value which is zero. > Or we could decide to re-initialise it in the same way Xen does (all 1s). Yes, good point. For the normal SPI range I re-initialise GICD_IGROUPR to all 1s during resu= me, but I missed doing the same for the eSPI range. I will add the correspondin= g GICD_IGROUPRE re-initialisation, matching the normal Xen initialisation = path. > > > + uint32_t ipriorityr[8]; > > + uint32_t isactiver; > > + uint32_t isenabler; > > + > > + uint64_t pendbase; > > + uint64_t propbase; > > +}; > > + > > +/* GICv3 registers to be saved/restored on system suspend/resume */ > > +struct gicv3_ctx { > > + struct dist_ctx { > > + uint32_t ctlr; > > + struct dist_irq_block *irqs, *espi_irqs; > > NIT: I would declare them one after the other and not in the same line, b= ut this is a matter of taste > maybe so I will leave the decision to the maintainers. Ack. > > > + } dist; > > + > > + /* have only one rdist structure for last running CPU during suspe= nd */ > > + struct redist_ctx rdist; > > + > > + struct cpu_ctx { > > + uint32_t ctlr; > > + uint32_t pmr; > > + uint32_t bpr; > > + uint32_t sre_el2; > > + uint32_t grpen; > > + } cpu; > > +}; > > + > > +static struct gicv3_ctx gicv3_ctx; > > + > > +static void __init gicv3_alloc_context(void) > > +{ > > + uint32_t blocks =3D DIV_ROUND_UP(gicv3_info.nr_lines, 32); > > + > > + /* The spec allows for systems without any SPIs */ > > + if ( blocks > 1 ) > > + { > > + gicv3_ctx.dist.irqs =3D xzalloc_array(struct dist_irq_block, b= locks - 1); > > + if ( !gicv3_ctx.dist.irqs ) > > + panic("Failed to allocate memory for GICv3 suspend context= \n"); > > + } > > + > > +#ifdef CONFIG_GICV3_ESPI > > + if ( !gic_number_espis() ) > > + return; > > + > > + blocks =3D gic_number_espis() / 32; > > + gicv3_ctx.dist.espi_irqs =3D xzalloc_array(struct dist_irq_block, = blocks); > > + if ( !gicv3_ctx.dist.espi_irqs ) > > + panic("Failed to allocate memory for GICv3 eSPI suspend contex= t\n"); > > +#endif > > +} > > + > > +static int gicv3_disable_redist(void) > > +{ > > + void __iomem *waker =3D GICD_RDIST_BASE + GICR_WAKER; > > + s_time_t deadline; > > + > > + /* > > + * Avoid infinite loop if Non-secure does not have access to GICR_= WAKER. > > + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: > > + * When GICD_CTLR.DS =3D=3D 0 and an access is Non-secure acce= sses to this > > + * register are RAZ/WI. > > + */ > > + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) > > + return 0; > > + > > + deadline =3D NOW() + MILLISECS(1000); > > + > > + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, w= aker); > > + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) =3D=3D = 0 ) > > + { > > + if ( NOW() > deadline ) > > + { > > + printk("GICv3: Timeout waiting for redistributor to sleep\= n"); > > + return -ETIMEDOUT; > > + } > > + cpu_relax(); > > + udelay(10); > > + } > > + > > + return 0; > > +} > > + > > +#define GET_SPI_REG_OFFSET(name, is_espi) \ > > + ((is_espi) ? GICD_##name##nE : GICD_##name) > > + > > +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + irqs->icfgr[0] =3D readl_relaxed(base); > > + irqs->icfgr[1] =3D readl_relaxed(base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + irqs->ipriorityr[irq] =3D readl_relaxed(base + 4 * irq); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + irqs->irouter[irq] =3D readq_relaxed_non_atomic(base + 8 * irq= ); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + irqs->isactiver =3D readl_relaxed(base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + irqs->isenabler =3D readl_relaxed(base); > > +} > > + > > +static void gicv3_restore_spi_irq_block(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + writel_relaxed(irqs->icfgr[0], base); > > + writel_relaxed(irqs->icfgr[1], base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); > > > The [1] 12.9.22 GICD_IROUTER says "these registers are used only when = affinity routing is enabled. > When affinity routing is not enabled: These registers are RES0. An implem= entation is permitted to make > the register RAZ/WI in this case=E2=80=9D > > So I think these needs to be written after we set GICD_CTLR or we are goi= ng to loose anything written there > and also the configuration won=E2=80=99t be restored. You are right. Restoring IROUTER before restoring the affinity-routing stat= e is not safe, because these registers are only meaningful when affinity routing= is enabled. I will fix the restore ordering in the next version. > > > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + writel_relaxed(irqs->isenabler, base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + writel_relaxed(irqs->isactiver, base); > > +} > > + > > +static int gicv3_suspend(void) > > +{ > > + unsigned int i; > > + void __iomem *base; > > + int ret; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + /* Save GICC configuration */ > > + gicv3_ctx.cpu.ctlr =3D READ_SYSREG(ICC_CTLR_EL1); > > + gicv3_ctx.cpu.pmr =3D READ_SYSREG(ICC_PMR_EL1); > > + gicv3_ctx.cpu.bpr =3D READ_SYSREG(ICC_BPR1_EL1); > > + gicv3_ctx.cpu.sre_el2 =3D READ_SYSREG(ICC_SRE_EL2); > > + gicv3_ctx.cpu.grpen =3D READ_SYSREG(ICC_IGRPEN1_EL1); > > + > > + gicv3_disable_interface(); > > this one is calling also gicv3_cpu_disable() that will zero ICC_IGRPEN1_E= L1 ... > > > + > > + ret =3D gicv3_disable_redist(); > > + if ( ret ) > > + goto out_enable_iface; > > =E2=80=A6 but when we fail here ... > > > + > > + /* Save GICR configuration */ > > + gicv3_redist_wait_for_rwp(); > > + > > + base =3D GICD_RDIST_BASE; > > + > > + rdist->ctlr =3D readl_relaxed(base + GICR_CTLR); > > + > > + rdist->propbase =3D readq_relaxed(base + GICR_PROPBASER); > > + rdist->pendbase =3D readq_relaxed(base + GICR_PENDBASER); > > + > > + base =3D GICD_RDIST_SGI_BASE; > > + > > + /* Save priority on PPI and SGI interrupts */ > > + for ( i =3D 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) > > + rdist->ipriorityr[i] =3D readl_relaxed(base + GICR_IPRIORITYR0= + 4 * i); > > + > > + rdist->isactiver =3D readl_relaxed(base + GICR_ISACTIVER0); > > + rdist->isenabler =3D readl_relaxed(base + GICR_ISENABLER0); > > + rdist->igroupr =3D readl_relaxed(base + GICR_IGROUPR0); > > + rdist->icfgr =3D readl_relaxed(base + GICR_ICFGR1); > > + > > + /* Save GICD configuration */ > > + gicv3_dist_wait_for_rwp(); > > + gicv3_ctx.dist.ctlr =3D readl_relaxed(GICD + GICD_CTLR); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, fals= e); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, tru= e); > > +#endif > > + > > + return 0; > > + > > + out_enable_iface: > > + gicv3_hyp_enable(true); > > + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); > > we don=E2=80=99t recover ICC_IGRPEN1_EL1 Yes, you are right. This series missed the change introduced by commit 18b718b6af3d ("xen/arm: gic-v3: disable Group 1 before CPU power-down"). Since gicv3_cpu_disable() = now disables ICC_IGRPEN1_EL1, the error path needs to restore it before returni= ng. I will fix this in the next version. Best regards, Mykola > > > + isb(); > > + > > + return ret; > > +} > > + > > +static void gicv3_resume(void) > > +{ > > + int ret; > > + unsigned int i; > > + void __iomem *base; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + writel_relaxed(0, GICD + GICD_CTLR); > > + > > + for ( i =3D NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i +=3D 32 = ) > > + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) = * 4); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_restore_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, fa= lse); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + gicv3_restore_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, t= rue); > > +#endif > > + > > + writel_relaxed(gicv3_ctx.dist.ctlr, GICD + GICD_CTLR); > > + gicv3_dist_wait_for_rwp(); > > + > > + ret =3D gicv3_lpi_init_rdist(GICD_RDIST_BASE); > > + /* > > + * If LPIs are already enabled, assume firmware or the still-power= ed > > + * redistributor has valid PROPBASER/PENDBASER and skip reprogramm= ing. > > + * Return -EBUSY so callers can ignore this case. > > + */ > > + if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > + panic("GICv3: Failed to re-initialize LPIs during resume\n"); > > + else if ( ret =3D=3D -EBUSY ) /* extra checks, just to be sure */ > > + { > > + base =3D GICD_RDIST_BASE; > > + if ( readq_relaxed(base + GICR_PROPBASER) !=3D rdist->propbase= || > > + readq_relaxed(base + GICR_PENDBASER) !=3D rdist->pendbase= ) > > + { > > + panic("GICv3: LPIs already enabled with unexpected PROPBAS= ER/PENDBASER during resume\n"); > > + } > > + } > > + > > + /* Restore GICR (Redistributor) configuration */ > > + if ( gicv3_enable_redist() ) > > + panic("GICv3: Failed to re-enable redistributor during resume\= n"); > > + > > + base =3D GICD_RDIST_SGI_BASE; > > + > > + writel_relaxed(GENMASK(31, 0), base + GICR_ICENABLER0); > > + gicv3_redist_wait_for_rwp(); > > + > > + for ( i =3D 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) > > + writel_relaxed(rdist->ipriorityr[i], base + GICR_IPRIORITYR0 += i * 4); > > + > > + writel_relaxed(rdist->isactiver, base + GICR_ISACTIVER0); > > + writel_relaxed(rdist->igroupr, base + GICR_IGROUPR0); > > + writel_relaxed(rdist->icfgr, base + GICR_ICFGR1); > > + > > + gicv3_redist_wait_for_rwp(); > > + > > + writel_relaxed(rdist->isenabler, base + GICR_ISENABLER0); > > + writel_relaxed(rdist->ctlr, GICD_RDIST_BASE + GICR_CTLR); > > + > > + gicv3_redist_wait_for_rwp(); > > + > > + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); > > + isb(); > > + > > + /* Restore CPU interface (System registers) */ > > + WRITE_SYSREG(gicv3_ctx.cpu.pmr, ICC_PMR_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.bpr, ICC_BPR1_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); > > + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); > > + isb(); > > + > > + gicv3_hyp_init(); > > +} > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* Set up the GIC */ > > static int __init gicv3_init(void) > > { > > @@ -1994,6 +2301,10 @@ static int __init gicv3_init(void) > > > > gicv3_hyp_init(); > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + gicv3_alloc_context(); > > +#endif > > + > > out: > > spin_unlock(&gicv3.lock); > > > > @@ -2033,6 +2344,10 @@ static const struct gic_hw_operations gicv3_ops = =3D { > > #endif > > .iomem_deny_access =3D gicv3_iomem_deny_access, > > .do_LPI =3D gicv3_do_LPI, > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + .suspend =3D gicv3_suspend, > > + .resume =3D gicv3_resume, > > +#endif > > }; > > > > static int __init gicv3_dt_preinit(struct dt_device_node *node, const v= oid *data) > > diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/incl= ude/asm/gic_v3_defs.h > > index c373b94d19..992c8f9c2f 100644 > > --- a/xen/arch/arm/include/asm/gic_v3_defs.h > > +++ b/xen/arch/arm/include/asm/gic_v3_defs.h > > @@ -94,6 +94,7 @@ > > #define GICD_TYPE_LPIS (1U << 17) > > > > #define GICD_CTLR_RWP (1UL << 31) > > +#define GICD_CTLR_DS (1U << 6) > > #define GICD_CTLR_ARE_NS (1U << 4) > > #define GICD_CTLR_ENABLE_G1A (1U << 1) > > #define GICD_CTLR_ENABLE_G1 (1U << 0) > > > > Cheers, > Luca > > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 07:35:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 07:35:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300253.1574773 (Exim 4.92) (envelope-from ) id 1wKAJO-0007q8-E4; Tue, 05 May 2026 07:35:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300253.1574773; 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bh=bIQ6B5QXxPXvMZAEqD+pNtNTZG1nBhilZB1wzodtdWQ=; b=vw8uMB/QxiHbyK+iNor5i5aZT/jTv9neGt01MDedjzPP0hUm5iwFWOLMwpdfObURQQ74wVp8+udP7qCbZLhbJEpKMvorsN7LKBYZUyNhWdCxktWzE3YknBLENke1YUCGqKlNLd9sS7ORHCM8CQTKnNATRHO6LUrv2LcecrXShn0= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Date: Tue, 5 May 2026 09:35:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , Timothy Pearson , Teddy Astie References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UCC6pGxMKUHVU6s3G5rEyrJx77K8Phxhkit3D8xfKHkzNkBu81ZZzMfx3qLV2EoL+JpPuWdpdaI4lCgHoyoNqUyUeqlonPFDYQv4IZNwx7Bl9eYDKmEp21lN4n739Rkz0Lj4lzD9tp8oJFRHj18+Ixxa01pSFveTP7Z6oKYPHYCR2ks7vPdqIK93/nsHpR73AiHFyWtaFsrQGrfKZxJMtFfQVc/6Qawraqh484fHWwyYIRGmnjcp0W8NifWVizIEZNYYsf2BhOq88GIoQX1TWs6aJtb8ZbBOfNwrjO7MDzd/dye8sMdtVxVVliGVyLGRfkrJ+qUDYstHuNgjIgxsQ+hp5pJHbFtBwR8eNYiOuFqOW6yv4buuL8hBrBZehNMuVJaabPHqDoegwWNunRzC7+4AZLITN3YOBj3rmp+zxJVmremZlbP4l5l7wS9xtKVr X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 07:35:13.9109 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e4444458-816b-42d3-e7f2-08deaa78d8a3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9492 X-purgate-ID: tlsNG-bad1c0/1777966518-486A8A53-D82A06C7/0/0 X-purgate-type: clean X-purgate-size: 3533 On 05-May-26 09:13, Roger Pau Monné wrote: > On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >> >> >> On 04-May-26 17:28, Roger Pau Monné wrote: >>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>> defines it). >>>> >>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>> to 0 when the arch does not define it. This makes the generic macros >>>> correct for all architectures, even though they are only used on x86 >>>> today. >>> >>> Hm, I assume this offset was added because the original mask PDX >>> compression won't (usually) compress the gap between 0 and the start >>> of RAM. However the newish offset PDX compression should be able to >>> compress from 0 to start of RAM, and hence you don't need to apply >>> an extra PDX offset there? >>> >>> If that's indeed the case it might be better to integrate >>> frametable_base_pdx into the mask compression algorithm itself, so >>> that on some arches it's a mask plus a decrease. >> The offset is needed regardless of whether compression is used. With >> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >> 0x80000000, the first valid PDX is 0x80000. > > OK, so you are doing some (kind of) address space compression (removing > the leading empty range to the first RAM region) even when PDX is > disabled. > >> Without frametable_base_pdx >> the frame table would have to be indexed from 0, wasting >> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > > But you don't really "waste" memory, just address space? Oh, maybe > not on ARM as it doesn't use pdx_group_valid? And so you > unconditionally populate the frametable from PDX 0 to max PDX. With pdx_group_valid (which this series adds) we wouldn't waste physical memory for the leading gap. But we'd still waste virtual address space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter because the full range from PDX 0 must fit. For example with RAM starting at 5TB the virtual offset before the first usable entry would be ~70GB — more than the entire 32GB FRAMETABLE_SIZE on ARM64. > >> So frametable_base_pdx is really a frame table indexing offset, not >> something tied to the compression algorithm. > > Right, it just seems odd to do that extra subtraction when using > offset compression, as in that case the compression logic itself > should remove that leading gap when RAM doesn't start at 0. > > Instead of generalizing and expanding the usage of frametable_base_pdx > it might be better to implement support for pdx_group_valid when > populating the frame table, and switch by default to the offset > compression method that will already remove any leading unpopulated > spaces? Switching the compression method would be a bigger change, and with feature freeze on Friday I'd prefer not to get into that now. The current approach is minimal and self-contained and works with mask and no-pdx which is what we use nowadays: frametable_base_pdx already existed on ARM and PPC, we're just making the generic macros aware of it as Julien requested (in v1 I just overwrote the macro in local file). We can revisit the compression strategy as a follow-up next release. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 08:07:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:07:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300293.1574814 (Exim 4.92) (envelope-from ) id 1wKAo0-0004bF-EH; Tue, 05 May 2026 08:07:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300293.1574814; Tue, 05 May 2026 08:07:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKAo0-0004b8-BL; Tue, 05 May 2026 08:07:00 +0000 Received: by outflank-mailman (input) for mailman id 1300293; Tue, 05 May 2026 08:06:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKAny-0004b2-TK for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:06:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKAny-0054uZ-4y for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:06:58 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9a513-e002-0a2a0a5209dd-0a2a450792aa-48 for ; Tue, 05 May 2026 10:06:57 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9a521-229c-0a2a45070019-c387df83ce10-3 for ; Tue, 05 May 2026 10:06:57 +0200 Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 97BE35C57E; Tue, 5 May 2026 08:06:57 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 5A644593A3; Tue, 5 May 2026 08:06:57 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 7q3WFCGl+WkYaAAAD6G6ig (envelope-from ); Tue, 05 May 2026 08:06:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777968417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=NTn/SLA/xstL2gHJnsf3LMIqdLycLGiM0cMPirzKlrc=; b=DZjtO7swahR8wcnvYPbdAIc3QHLc9AGM6GYBUE0ygarRoXh7hSXzpmahMLZRT0L7bANpBw 45IADU8KPyAWRFmKEJekPKRXSP20PQimNUgMvPBmtLvGGIf3JjDbUUFzpHe1E4CKL+CQOq 5pjSCEuwOCndNzYzzzzIfsntqY+vyB4= Authentication-Results: smtp-out2.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=DZjtO7sw DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777968417; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=NTn/SLA/xstL2gHJnsf3LMIqdLycLGiM0cMPirzKlrc=; b=DZjtO7swahR8wcnvYPbdAIc3QHLc9AGM6GYBUE0ygarRoXh7hSXzpmahMLZRT0L7bANpBw 45IADU8KPyAWRFmKEJekPKRXSP20PQimNUgMvPBmtLvGGIf3JjDbUUFzpHe1E4CKL+CQOq 5pjSCEuwOCndNzYzzzzIfsntqY+vyB4= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() Date: Tue, 5 May 2026 10:06:53 +0200 Message-ID: <20260505080653.197775-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_SEVEN(0.00)[10]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; RCVD_TLS_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:dkim,suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Queue-Id: 97BE35C57E X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Score: -3.01 X-purgate-ID: tlsNG-ef75cf/1777968417-AFF7EC48-8D82EF96/0/0 X-purgate-type: clean X-purgate-size: 1311 When fixing a conflict in xen_e820_resolve_conflicts(), the loop over the E820 map entries needs to be restarted, as the E820 map will have been modified by the fix. Otherwise entries might be skipped by accident. Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") Signed-off-by: Juergen Gross --- arch/x86/xen/setup.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index ac8021c3a997..bb95a05259b8 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr_t start, return; end = start + size; - entry = xen_e820_table.entries; + mapcnt = 0; - for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + while (mapcnt < xen_e820_table.nr_entries) { + entry = xen_e820_table.entries + mapcnt; if (entry->addr >= end) return; if (entry->addr + entry->size > start && - entry->type == E820_TYPE_NVS) + entry->type == E820_TYPE_NVS) { xen_e820_swap_entry_with_ram(entry); + /* E820 map has been changed, restart loop! */ + mapcnt = 0; + continue; + } - entry++; + mapcnt++; } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:16:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:16:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300301.1574823 (Exim 4.92) (envelope-from ) id 1wKAx1-0006JL-7h; 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The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Along with regular interrupts, NMIs are a problem. No they're not. NMI (and #MC for that matter) are IST and will operate just fine like the #DF handler did. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 08:22:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300312.1574833 (Exim 4.92) (envelope-from ) id 1wKB34-00087F-0Q; Tue, 05 May 2026 08:22:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300312.1574833; Tue, 05 May 2026 08:22:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB33-000878-Sg; Tue, 05 May 2026 08:22:33 +0000 Received: by outflank-mailman (input) for mailman id 1300312; Tue, 05 May 2026 08:22:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB32-000872-2P for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:22:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKB31-00Bd9G-9s for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:22:31 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9a8c1-2eae-0a2a0a5409dd-0a2a4508a534-16 for ; Tue, 05 May 2026 10:22:31 +0200 Received: from [193.142.43.55] (helo=galois.linutronix.de) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9a8c6-63b5-0a2a45080019-c18e2b379026-3 for ; Tue, 05 May 2026 10:22:30 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=2020 header.d=linutronix.de header.i="@linutronix.de" header.h="From:Sender:Reply-to:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References"; dkim=permerror header.s=2020e header.d=linutronix.de header.i="@linutronix.de" Date: Tue, 05 May 2026 08:22:28 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1777969350; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfJ1YduhltV+uaN4L6tWu1N+7FQbIUL59Zqc4X2ZkGQ=; b=BLC5MlbLbTtsTdDUzIrgvGle47013JfO2P/gEVbfxVRGNqTkmkoWfpuFBPyo8A2zvRwx3V pemz6g+A+NPc5JyB1R8Bjwqi6yzFBzlJHw84q5SxCgDxKOjZIfJSQbcIQct+T6VyvElDww HHlPE6rIYYWt8VzlQNE8unryG5ndPjS0HOivgYPoJq/fK4UdIsAcNPJ5NdQvx8l74M2Lxv KOWINWXnEYKVQSJtb7ytgRyZdIK+mB2t6SfsOanNI0UErzijCu1/1s/+DH2EOPJ25AnbS4 AfRCnZXsR0Myknv/jI3vs5u5CG1I8o5KF8I63OcWtFnbiX48GuTdaCpmNu9vlA== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1777969350; h=from:from:sender:sender:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NfJ1YduhltV+uaN4L6tWu1N+7FQbIUL59Zqc4X2ZkGQ=; b=S/w43rLBt5Tlyfy2AJR2F2D4w9Nnj9xNeQTvWXi6LzsE3IlB0iWK0QJRapaesXJcLpCvzi HeHF3ogJfKcy7ZBA== From: "tip-bot2 for Juergen Gross" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() Cc: Juergen Gross , Ingo Molnar , xen-devel@lists.xenproject.org, x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20260505080653.197775-1-jgross@suse.com> References: <20260505080653.197775-1-jgross@suse.com> MIME-Version: 1.0 Message-ID: <177796934897.424702.11107616066849971102.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1777969351-C2975DB1-57E2DF78/0/0 X-purgate-type: clean X-purgate-size: 1961 The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 5f8719945244dd65b5fa06195f4600db62581610 Gitweb: https://git.kernel.org/tip/5f8719945244dd65b5fa06195f4600db625= 81610 Author: Juergen Gross AuthorDate: Tue, 05 May 2026 10:06:53 +02:00 Committer: Ingo Molnar CommitterDate: Tue, 05 May 2026 10:17:00 +02:00 x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() When fixing a conflict in xen_e820_resolve_conflicts(), the loop over the E820 map entries needs to be restarted, as the E820 map will have been modified by the fix. Otherwise entries might be skipped by accident. Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allo= cated memory") Signed-off-by: Juergen Gross Signed-off-by: Ingo Molnar Cc: xen-devel@lists.xenproject.org Link: https://patch.msgid.link/20260505080653.197775-1-jgross@suse.com --- arch/x86/xen/setup.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index ac8021c..bb95a05 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr= _t start, return; =20 end =3D start + size; - entry =3D xen_e820_table.entries; + mapcnt =3D 0; =20 - for (mapcnt =3D 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { + while (mapcnt < xen_e820_table.nr_entries) { + entry =3D xen_e820_table.entries + mapcnt; if (entry->addr >=3D end) return; =20 if (entry->addr + entry->size > start && - entry->type =3D=3D E820_TYPE_NVS) + entry->type =3D=3D E820_TYPE_NVS) { xen_e820_swap_entry_with_ram(entry); + /* E820 map has been changed, restart loop! */ + mapcnt =3D 0; + continue; + } =20 - entry++; + mapcnt++; } } =20 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:29:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:29:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300320.1574841 (Exim 4.92) (envelope-from ) id 1wKB9O-0000RA-Kj; Tue, 05 May 2026 08:29:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300320.1574841; Tue, 05 May 2026 08:29:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB9O-0000R3-Hj; Tue, 05 May 2026 08:29:06 +0000 Received: by outflank-mailman (input) for mailman id 1300320; Tue, 05 May 2026 08:29:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKB9M-0000Qx-MV for xen-devel@lists.xenproject.org; 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ARM > >>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>> defines it). > >>>> > >>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>> to 0 when the arch does not define it. This makes the generic macros > >>>> correct for all architectures, even though they are only used on x86 > >>>> today. > >>> > >>> Hm, I assume this offset was added because the original mask PDX > >>> compression won't (usually) compress the gap between 0 and the start > >>> of RAM. However the newish offset PDX compression should be able to > >>> compress from 0 to start of RAM, and hence you don't need to apply > >>> an extra PDX offset there? > >>> > >>> If that's indeed the case it might be better to integrate > >>> frametable_base_pdx into the mask compression algorithm itself, so > >>> that on some arches it's a mask plus a decrease. > >> The offset is needed regardless of whether compression is used. With > >> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >> 0x80000000, the first valid PDX is 0x80000. > > > > OK, so you are doing some (kind of) address space compression (removing > > the leading empty range to the first RAM region) even when PDX is > > disabled. > > > >> Without frametable_base_pdx > >> the frame table would have to be indexed from 0, wasting > >> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > > > > But you don't really "waste" memory, just address space? Oh, maybe > > not on ARM as it doesn't use pdx_group_valid? And so you > > unconditionally populate the frametable from PDX 0 to max PDX. > With pdx_group_valid (which this series adds) we wouldn't waste > physical memory for the leading gap. But we'd still waste virtual address > space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > because the full range from PDX 0 must fit. For example with RAM starting at 5TB > the virtual offset before the first usable entry would be ~70GB — more than the > entire 32GB FRAMETABLE_SIZE on ARM64. Right, you need to use a PDX compression to fit. My preference IMO would be to add the leading offset into the PDX mask compression algorithm if that's what ARM uses by default now. The generic case really means no compression, and that's a 1:1 map between physical addresses and PDX. Anything that's not an identity mapping between those two address spaces implies some kind of compression. > > > >> So frametable_base_pdx is really a frame table indexing offset, not > >> something tied to the compression algorithm. > > > > Right, it just seems odd to do that extra subtraction when using > > offset compression, as in that case the compression logic itself > > should remove that leading gap when RAM doesn't start at 0. > > > > Instead of generalizing and expanding the usage of frametable_base_pdx > > it might be better to implement support for pdx_group_valid when > > populating the frame table, and switch by default to the offset > > compression method that will already remove any leading unpopulated > > spaces? > Switching the compression method would be a bigger change, and with feature > freeze on Friday I'd prefer not to get into that now. The current approach > is minimal and self-contained and works with mask and no-pdx which is what we > use nowadays: frametable_base_pdx already existed on ARM and PPC, we're just > making the generic macros aware of it as Julien requested (in v1 I just > overwrote the macro in local file). We can revisit the compression strategy as a > follow-up next release. Right, I'm not going to oppose to this, but I also don't think it's the right way to go. This seems like a bodge on the side of PDX compression, when it should have instead been integrated into it. The more that the offset compression logic will already do that removal of the leading empty space up to the first RAM region, and hence such adjustment of PDX values in that case is redundant at best. Also, you only do this PDX adjustment for the frametable, but not the direct map? Thanks, Roger. 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45055f2203csm3129448f8f.37.2026.05.05.01.43.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 01:43:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1777970603; x=1778575403; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=ZCEstcyqOgvtQBuu40Qq5pjD4taxfu2oU876lLvB0OE=; b=O7MuPv5ywFaS6KH9WSESkFehRLWy6B9+gIpsaydnGbbTojURYTp9596W6SETPnHHDz oyLL8vqEW0k2gSZx0gKLEhhnxfiwfMsWARCQPdxm+/8T8JA7DD57jAD9UOeNpM/dndbP e6AicyysjRqMfwEQwkaGTKgUbhfB4jiYMtqcE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1777970603; x=1778575403; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=ZCEstcyqOgvtQBuu40Qq5pjD4taxfu2oU876lLvB0OE=; b=WDEvq4/XLd3Fl/7NJV+g6kNq/q7CAK9SH0swDKiCJwjgsjeRLnNOGxL8xyajej+JAs U9XyDmofqzjfw502znTDx+YRS7v9aasLEfL4G64jEdXR41ZIFbzjbrllHV7pNbnnAIyy v3h9roAd87M8yfV5U7AFrUrVPrbWNAj/8e2CfBwM/pg9gup710a5aHr+cR328yMmxL1+ aYzQnsfWCHw4S5lQepWSdEN4TPCL2iATXNNoqQP+wb643Fuk7ZeToVCJK/03i3j0emyi jo42ySDczSLHgI6svY9g4hHGmzl7jkMokl1kCSwjf8VZL6feUL3nfzQSgtfm4GuNW9Jm zICQ== X-Gm-Message-State: AOJu0YxLOY/JV/raBEoYSADQ7iTlxUWUvwFtbgRB7EkSqOnKlnlC4m8q 5oE4WQUcH4RDaFMUEFtKQRbid+9ShvPXdYjCfRmEkhCW/uCJFkbxCd3XoG5gw08YRlnswvHJ53m 7S2Qp X-Gm-Gg: AeBDieuxBWcX4250x5Ed+HG0sIP0EJ+I21wMCo/UwXK03lugmcJcYSGwKc++4SuWP/n 7pwkrG7+AZa08jZqWyD1zX4zwbAgR4s3oDxRxmDmpB+rl8lyGgRB93fqsVKuM68Em221X8J4hJH M0HEJSn/U73mQ/irw3s/PoyIFdNZyryaxxA0VgctEsNrQvRPkpLKq7Nri+ilyXdnTB22We16Z2t jIM+vjXTIAiXZc6gfOwwB0EYl9y9NeezKpjjPonHqiFD0JcSZEoay2Ji6IdBNxMw5MM4oM5WffY mCLCoEpYanuecnyYaAPpjqkmO4uv/YO4ofrZOq6A/cGQLS9zkv9alurB152LvX5820hL/99yBa1 oNvn9HAcuymjHtm36OvcGJQosQXqQo27UDG7t14prkcJaUAmccfP2goyBq0Xv+kRsLB7W7XjNo3 cswCjZmHFjov117uMpN9Mnapc7zhbKLOCUZYJB1qK74EvazVPtlNsuiTTbmSMbIhbjRVEP2yA2q SHQjuLhNbLsL1poDIjXsywJJw== X-Received: by 2002:a05:600d:8496:20b0:48a:592c:e632 with SMTP id 5b1f17b1804b1-48d18be5b3emr19816295e9.16.1777970602835; Tue, 05 May 2026 01:43:22 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v2] x86/boot: Disable interrupts when establishing SSP Date: Tue, 5 May 2026 09:43:15 +0100 Message-Id: <20260505084315.1350002-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1777970603-C86D4DB1-ECDD6CBA/0/0 X-purgate-type: clean X-purgate-size: 3366 Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years old, making it an incredibly rare occurance: (XEN) *** DOUBLE FAULT *** (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- (XEN) CPU: 0 (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 (XEN) No stack overflow detected. Skipping stack trace. (XEN) (XEN) **************************************** (XEN) Panic on CPU 0: (XEN) DOUBLE FAULT -- system shutdown (XEN) **************************************** This is on the instruction boundary after enabling CET (writing MSR_S_CET) and prior to establishing SSP. Despite identifying this as a critical window where any fault was deadly (the CPU tries to push a shadow stack frame at 0, hence the CR2 value wrapping around to the top of the address space), I clearly forgot that this meant interrupts too, which are enabled. Disable interrupts during the critical period. Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie v2: * Only disable regular interrupts. NMIs are fine. --- xen/arch/x86/setup.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/arch/x86/setup.c b/xen/arch/x86/setup.c index d041cbd5f6f1..19ee857abfb8 100644 --- a/xen/arch/x86/setup.c +++ b/xen/arch/x86/setup.c @@ -908,6 +908,13 @@ static void __init noreturn reinit_bsp_stack(void) if ( cpu_has_xen_shstk ) { + /* + * Immediately after enabling CET, SSP is 0 and most interrupts and + * exceptions are fatal. Like the SYSCALL/SYSENTER gaps, IST vectors + * (including NMI and #MC) are safe owing to IST switching the shstk. + */ + local_irq_disable(); + wrmsrl(MSR_S_CET, xen_msr_s_cet_value()); /* @@ -932,6 +939,8 @@ static void __init noreturn reinit_bsp_stack(void) } else asm volatile ( "setssbsy" ::: "memory" ); + + local_irq_enable(); } reset_stack_and_jump(init_done); base-commit: f4af571dd70bea97d8de82d7aa39c62c530db897 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 08:43:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 08:43:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300341.1574868 (Exim 4.92) (envelope-from ) id 1wKBNV-0004Bx-Aw; Tue, 05 May 2026 08:43:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300341.1574868; Tue, 05 May 2026 08:43:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBNV-0004Bq-7w; Tue, 05 May 2026 08:43:41 +0000 Received: by outflank-mailman (input) for mailman id 1300341; Tue, 05 May 2026 08:43:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBNT-0004BE-Tc for xen-devel@lists.xenproject.org; Tue, 05 May 2026 08:43:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBNT-008p5B-9P for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:43:39 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9adb2-bab6-0a2a0a5309dd-0a2a450b8962-36 for ; Tue, 05 May 2026 10:43:39 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9adba-212f-0a2a450b0019-d155802dcdd9-3 for ; Tue, 05 May 2026 10:43:39 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48896199cbaso43995265e9.1 for ; Tue, 05 May 2026 01:43:38 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505080653.197775-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1777970619-7DB68F3B-5902DA93/0/0 X-purgate-type: clean X-purgate-size: 2539 On 05.05.2026 10:06, Juergen Gross wrote: > When fixing a conflict in xen_e820_resolve_conflicts(), the loop over > the E820 map entries needs to be restarted, as the E820 map will have > been modified by the fix. Otherwise entries might be skipped by > accident. > > Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") > Signed-off-by: Juergen Gross First, while trying to review this, isn't there another issue in xen_e820_swap_entry_with_ram(), in that entry->addr = entry_end - swap_size + swap_addr - swap_entry->addr; really means to be entry->addr = entry_end - swap_size + swap_entry->addr - swap_addr; (affecting non-page-aligned E820 entries)? Further, that function converts swap_entry to the page-aligned superset of the passed in range. How is it guaranteed that this new range won't overlap with the predecessor and/or successor one? Wouldn't that need to be conversion to the page-aligned subset instead? And then, is passing the page-aligned superset to xen_add_remap_nonram() really appropriate? Why would any leading or trailing space there be subject to remapping? > --- a/arch/x86/xen/setup.c > +++ b/arch/x86/xen/setup.c > @@ -695,17 +695,22 @@ static void __init xen_e820_resolve_conflicts(phys_addr_t start, > return; > > end = start + size; > - entry = xen_e820_table.entries; > + mapcnt = 0; > > - for (mapcnt = 0; mapcnt < xen_e820_table.nr_entries; mapcnt++) { > + while (mapcnt < xen_e820_table.nr_entries) { > + entry = xen_e820_table.entries + mapcnt; > if (entry->addr >= end) > return; > > if (entry->addr + entry->size > start && > - entry->type == E820_TYPE_NVS) > + entry->type == E820_TYPE_NVS) { > xen_e820_swap_entry_with_ram(entry); > + /* E820 map has been changed, restart loop! */ > + mapcnt = 0; > + continue; > + } > > - entry++; > + mapcnt++; > } > } Given what exactly xen_e820_swap_entry_with_ram() does, restarting from entry 0 looks to be needed only if the non-RAM entry ended up moving down (strictly speaking even there it wouldn't need to be entry 0). If it moved up, simply not incrementing mapcnt would look to suffice. Since the extra overhead is likely tolerable here (with simplicity of the code being more important), this may want mentioning in a code comment (or at least the description). Preferably with that: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 09:00:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:00:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300375.1574909 (Exim 4.92) (envelope-from ) id 1wKBdw-0007w4-1S; Tue, 05 May 2026 09:00:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300375.1574909; Tue, 05 May 2026 09:00:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBdv-0007vx-UF; Tue, 05 May 2026 09:00:39 +0000 Received: by outflank-mailman (input) for mailman id 1300375; Tue, 05 May 2026 09:00:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBdu-0007vr-Ch for xen-devel@lists.xenproject.org; Tue, 05 May 2026 09:00:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBdt-00DBYk-Cp for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:00:37 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9b1b1-5cb7-0a2a0a5109dd-0a2a45058ccc-26 for ; Tue, 05 May 2026 11:00:37 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9b1b4-aaa8-0a2a45050019-d155dd2ba938-3 for ; Tue, 05 May 2026 11:00:36 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d75312379so3383430f8f.1 for ; Tue, 05 May 2026 02:00:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1777971636-E93A0443-12747E49/0/0 X-purgate-type: clean X-purgate-size: 2559 On 05.05.2026 10:43, Andrew Cooper wrote: > Gitlab CI reported a crash on boot on Alder Lake hardware. The bug is years > old, making it an incredibly rare occurance: > > (XEN) *** DOUBLE FAULT *** > (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- > (XEN) CPU: 0 > (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 > (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor > (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 > (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 > (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 > (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 > (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 > (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 > (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc > (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 > (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 > (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): > (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 > (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 > (XEN) No stack overflow detected. Skipping stack trace. > (XEN) > (XEN) **************************************** > (XEN) Panic on CPU 0: > (XEN) DOUBLE FAULT -- system shutdown > (XEN) **************************************** > > This is on the instruction boundary after enabling CET (writing MSR_S_CET) and > prior to establishing SSP. Despite identifying this as a critical window > where any fault was deadly (the CPU tries to push a shadow stack frame at 0, > hence the CR2 value wrapping around to the top of the address space), I > clearly forgot that this meant interrupts too, which are enabled. > > Disable interrupts during the critical period. > > Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > > v2: > * Only disable regular interrupts. NMIs are fine. Much neater a fix as a result: Reviewed-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 09:05:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:05:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300384.1574918 (Exim 4.92) (envelope-from ) id 1wKBiZ-0008W6-Is; Tue, 05 May 2026 09:05:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300384.1574918; Tue, 05 May 2026 09:05:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBiZ-0008Vz-FJ; Tue, 05 May 2026 09:05:27 +0000 Received: by outflank-mailman (input) for mailman id 1300384; Tue, 05 May 2026 09:05:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKBiY-0008Vt-WC for xen-devel@lists.xenproject.org; Tue, 05 May 2026 09:05:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKBiW-005GRI-M1 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:05:24 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9b2d4-bab6-0a2a0a5309dd-0a2a4502dace-0 for ; Tue, 05 May 2026 11:05:24 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9b2d3-af86-0a2a45020019-d1558035e024-3 for ; Tue, 05 May 2026 11:05:24 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so79238275e9.2 for ; Tue, 05 May 2026 02:05:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 02:05:23 -0700 (PDT) Message-ID: <32eddac5-73c7-46c4-8944-99cfe970c803@suse.com> Date: Tue, 5 May 2026 11:05:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777971924-890CF161-5E0D81A8/0/0 X-purgate-type: clean X-purgate-size: 1169 On 05.05.2026 10:27, Luca Fancellu wrote: >> On 4 May 2026, at 06:30, Jan Beulich wrote: >> On 29.04.2026 12:08, Luca Fancellu wrote: >>>> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >>>> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >>>> paddr_t gpa, >>>> void *buf, >>>> - unsigned int len) >>>> + unsigned long len) >>>> { >>> >>> Now that we do this, potentially we could have truncation in the places where we store its return value >>> inside an int: >> >> Those would suffer from truncation before and after this change, wouldn't they? >> Just that where the truncation occurs does move. I.e. if necessary they would >> want dealing with separately. > > yes that’s true, truncation was already there in different places, do you want to deal with it separately so that > we have a Fixes tag for it? I already said I'd like that to be dealt with separately, didn't I? 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------dAewGUNv0qm8HdmceafrUiMz" X-purgate-ID: tlsNG-c1860d/1777972414-C2368DB1-54DE0D6E/0/0 X-purgate-type: clean X-purgate-size: 12396 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------dAewGUNv0qm8HdmceafrUiMz Content-Type: multipart/mixed; boundary="------------JiQauVkPK1gsx2X8jgppe5kb"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org Message-ID: <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Subject: Re: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> In-Reply-To: <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------JiQauVkPK1gsx2X8jgppe5kb Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn5tL0FAwAAAAAACgkQsN6d1ii/Ey+M 2wf/ZdhzFiiteUpSVRo4BGyVpMhKkPv+7/ZtOcLSumpAkSxzB9o0lDMjYKiyjx5AMDcBwlcv3Age f5P+Tia+jdtE59+BQA0AWHqJ1Xy6APU2iFuMeUI3E45ovcdGOAHMWG3eF7McO3iid9Kc9rmO3o4e 17ElN8RZVrS7WjMiIyDlXSQ8KCN5GVJgNAFnu/Mn8l6ktQ4NuOlGtdJJdVB6mSSWNotx+f/xxQX4 hzKf7MPRAhlTvuOvjbf49wd/HSSE+n+6dXmJyv9zvkfMkjqf6UKN/mRB2DlzhqP0RPu9jQNL1Mps 9slfyg/v0cKI8Gs+xp/xX06PA7uY/61YU+5SF/qoIw== =XkA8 -----END PGP SIGNATURE----- --------------dAewGUNv0qm8HdmceafrUiMz-- From xen-devel-bounces@lists.xenproject.org Tue May 05 09:22:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:22:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300404.1574937 (Exim 4.92) (envelope-from ) id 1wKByo-0003wJ-74; Tue, 05 May 2026 09:22:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300404.1574937; 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Tue, 05 May 2026 02:22:10 -0700 (PDT) MIME-Version: 1.0 References: <1ead2af7182a0501f16e7b4e9ad3e58ccd8f538c.1776955622.git.bertrand.marquis@arm.com> In-Reply-To: <1ead2af7182a0501f16e7b4e9ad3e58ccd8f538c.1776955622.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Tue, 5 May 2026 11:21:57 +0200 X-Gm-Features: AVHnY4IxbheL-Y6kED6xjiouZiMz263rlg7LJlyow8jkhaTaKdqkJ3po73KqXvQ Message-ID: Subject: Re: [PATCH v2 6/6] xen/arm: ffa: Deliver VM-to-VM notifications locally To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1777972932-16062C48-9F58A8FB/0/0 X-purgate-type: clean X-purgate-size: 10679 Hi Bertrand, On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis wrote: > > VM notification binding and pending tracking exist for non-secure > endpoints, but FFA_NOTIFICATION_SET still only forwards secure > destinations to the SPMC. Non-secure VMs therefore cannot receive > notifications from other VMs. Local NPI delivery also needs explicit > re-arm tracking so repeated raises are not lost while the interrupt is > already pending. > > Add a local VM notification delivery path for non-secure destinations. > notification_set_vm() resolves the destination endpoint, verifies that > every requested bit is bound to the sender, sets the receiver's > vm_pending bitmap under notif_lock, and raises an NPI only when local > pending state is not already armed. > > Track whether a local NPI is already armed with notif_irq_raised, > clear that state once both VM and hypervisor pending bitmaps are > drained, and keep notif_lock held across the VM notification injection > attempt. If no destination vCPU is online, leave the pending bits set > and keep notif_irq_raised clear so delivery can be retried later. > Also expose firmware notification availability so FFA_FEATURES only > advertises notification support when it is actually provided by the > firmware or by CONFIG_FFA_VM_TO_VM. > > Functional impact: when CONFIG_FFA_VM_TO_VM is enabled, non-secure > FFA_NOTIFICATION_SET delivers VM-to-VM notifications locally and keeps > NPI delivery reliable across repeated raises. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - serialize notification_set_vm() state updates with the NPI attempt > - keep pending VM notifications set when local injection fails > --- > xen/arch/arm/tee/ffa.c | 24 ++++++++-- > xen/arch/arm/tee/ffa_notif.c | 82 ++++++++++++++++++++++++++++++++-- > xen/arch/arm/tee/ffa_private.h | 17 ++++--- > 3 files changed, 107 insertions(+), 16 deletions(-) > > diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > index 1fe33f26454a..7fe021049cba 100644 > --- a/xen/arch/arm/tee/ffa.c > +++ b/xen/arch/arm/tee/ffa.c > @@ -39,8 +39,13 @@ > * o FFA_MSG_SEND_DIRECT_REQ: > * - only supported from a VM to an SP > * o FFA_NOTIFICATION_*: > + * - only supported when firmware notifications are enabled or VM-to-V= M > + * support is built in > * - only supports global notifications, that is, per vCPU notificatio= ns > - * are not supported > + * are not supported and secure per-vCPU notification information is > + * not forwarded > + * - the source endpoint ID reported for a notification may no longer > + * exist by the time the receiver consumes it > * - doesn't support signalling the secondary scheduler of pending > * notification for secure partitions > * - doesn't support notifications for Xen itself > @@ -245,6 +250,8 @@ static void handle_features(struct cpu_user_regs *reg= s) > uint32_t a1 =3D get_user_reg(regs, 1); > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > + bool notif_supported =3D IS_ENABLED(CONFIG_FFA_VM_TO_VM) || > + ffa_notif_fw_enabled(); > > /* > * FFA_FEATURES defines w2 as input properties only for specific > @@ -343,10 +350,16 @@ static void handle_features(struct cpu_user_regs *r= egs) > > break; > case FFA_FEATURE_NOTIF_PEND_INTR: > - ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_FEATURE_SCHEDULE_RECV_INTR: > - ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, = 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > case FFA_PARTITION_INFO_GET_REGS: > if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > @@ -361,7 +374,10 @@ static void handle_features(struct cpu_user_regs *re= gs) > case FFA_NOTIFICATION_SET: > case FFA_NOTIFICATION_INFO_GET_32: > case FFA_NOTIFICATION_INFO_GET_64: > - ffa_set_regs_success(regs, 0, 0); > + if ( notif_supported ) > + ffa_set_regs_success(regs, 0, 0); > + else > + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > break; > default: > ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index a841c8f8d747..b29d948a7110 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -21,6 +21,11 @@ static bool __ro_after_init fw_notif_enabled; > static unsigned int __ro_after_init notif_sri_irq; > static DEFINE_SPINLOCK(notif_info_lock); > > +bool ffa_notif_fw_enabled(void) > +{ > + return fw_notif_enabled; > +} > + > static bool inject_notif_pending(struct domain *d) > { > struct vcpu *v; > @@ -107,6 +112,55 @@ out_unlock: > return ret; > } > > +/* > + * Deliver a VM-to-VM notification. ctx->notif.notif_lock protects > + * vm_bind/vm_pending so callers must not hold it already. > + */ > +static int32_t notification_set_vm(uint16_t dst_id, uint16_t src_id, > + uint32_t flags, uint64_t bitmap) > +{ > + struct domain *dst_d; > + struct ffa_ctx *dst_ctx; > + unsigned int id; > + int32_t ret; > + > + if ( flags ) > + return FFA_RET_INVALID_PARAMETERS; > + > + ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > + if ( ret ) > + return ret; > + > + ret =3D FFA_RET_OK; > + > + spin_lock(&dst_ctx->notif.notif_lock); > + > + for ( id =3D 0; id < FFA_NUM_VM_NOTIF; id++ ) > + { > + if ( !(bitmap & BIT(id, ULL)) ) > + continue; > + > + if ( dst_ctx->notif.vm_bind[id] !=3D src_id ) > + { > + ret =3D FFA_RET_DENIED; > + goto out_unlock; > + } > + } > + > + dst_ctx->notif.vm_pending |=3D bitmap; > + if ( !dst_ctx->notif.notif_irq_raised && > + (dst_ctx->notif.vm_pending || dst_ctx->notif.hyp_pending) && > + inject_notif_pending(dst_d) ) > + dst_ctx->notif.notif_irq_raised =3D true; > + > +out_unlock: > + spin_unlock(&dst_ctx->notif.notif_lock); > + > + rcu_unlock_domain(dst_d); > + > + return ret; > +} > + > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs) > { > struct domain *d =3D current->domain; > @@ -288,6 +342,8 @@ void ffa_handle_notification_get(struct cpu_user_regs= *regs) > > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > + bool pending; > + > spin_lock(&ctx->notif.notif_lock); > > if ( (flags & FFA_NOTIF_FLAG_BITMAP_HYP) && ctx->notif.hyp_pendi= ng ) > @@ -298,6 +354,18 @@ void ffa_handle_notification_get(struct cpu_user_reg= s *regs) > ctx->notif.notif_irq_raised =3D false; > } > > + if ( (flags & FFA_NOTIF_FLAG_BITMAP_VM) && ctx->notif.vm_pending= ) > + { > + w4 =3D (uint32_t)(ctx->notif.vm_pending & GENMASK(31, 0)); > + w5 =3D (uint32_t)((ctx->notif.vm_pending >> 32) & GENMASK(31= , 0)); > + ctx->notif.vm_pending =3D 0; > + } > + > + pending =3D (ctx->notif.hyp_pending !=3D 0) || > + (ctx->notif.vm_pending !=3D 0); > + if ( !pending ) > + ctx->notif.notif_irq_raised =3D false; This seems to take care of clearing notif_irq_raised for all cases. Do we still need the one just above this block (copied here): if ( !ctx->notif.vm_pending ) ctx->notif.notif_irq_raised =3D false; ? Cheers, Jens > + > spin_unlock(&ctx->notif.notif_lock); > } > > @@ -323,9 +391,17 @@ int32_t ffa_handle_notification_set(struct cpu_user_= regs *regs) > if ( flags ) > return FFA_RET_INVALID_PARAMETERS; > > - if ( FFA_ID_IS_SECURE(dest_id) && fw_notif_enabled ) > - return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, bit= map_lo, > - bitmap_hi); > + if ( FFA_ID_IS_SECURE(dest_id) ) > + { > + if ( fw_notif_enabled ) > + return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, > + bitmap_lo, bitmap_hi); > + } > + else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + { > + return notification_set_vm(dest_id, caller_id, flags, > + ((uint64_t)bitmap_hi << 32) | bitmap_= lo); > + } > > return FFA_RET_NOT_SUPPORTED; > } > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 78a0a9815d56..923a071a9d7c 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -340,20 +340,18 @@ struct ffa_ctx_notif { > uint64_t vm_pending; > > /* > - * Source endpoint bound to each VM notification ID (0 means unbound= ). > + * Tracks whether an NPI has been raised for local pending notificat= ions. > + * Protected by notif_lock. > */ > - uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > + bool notif_irq_raised; > > /* > - * Lock protecting the hypervisor-managed notification state. > + * Source endpoint bound to each VM notification ID (0 means unbound= ). > */ > - spinlock_t notif_lock; > + uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > > - /* > - * Tracks whether a local notification pending interrupt was raised. > - * Protected by notif_lock. > - */ > - bool notif_irq_raised; > + /* Lock protecting local notification state. */ > + spinlock_t notif_lock; > > /* > * Bitmap of pending hypervisor notifications (for HYP bitmap querie= s). > @@ -495,6 +493,7 @@ void ffa_notif_init(void); > void ffa_notif_init_interrupt(void); > int ffa_notif_domain_init(struct domain *d); > void ffa_notif_domain_destroy(struct domain *d); > +bool ffa_notif_fw_enabled(void); > > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs); > int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs); > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Tue May 05 09:52:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 09:52:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300420.1574946 (Exim 4.92) (envelope-from ) id 1wKCRc-0000BX-JD; Tue, 05 May 2026 09:52:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300420.1574946; Tue, 05 May 2026 09:52:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCRc-0000BO-EW; Tue, 05 May 2026 09:52:00 +0000 Received: by outflank-mailman (input) for mailman id 1300420; Tue, 05 May 2026 09:51:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCRa-0000BH-Ud for xen-devel@lists.xenproject.org; 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Message-ID: <97213bec-14f0-45e0-ac22-c01b4db5df6e@citrix.com> Date: Tue, 5 May 2026 10:51:51 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Xen-devel Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP To: Jan Beulich References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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The bug is years >> old, making it an incredibly rare occurance: >> >> (XEN) *** DOUBLE FAULT *** >> (XEN) ----[ Xen-4.22-unstable x86_64 debug=y ubsan=y Not tainted ]---- >> (XEN) CPU: 0 >> (XEN) RIP: e008:[] arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160 >> (XEN) RFLAGS: 0000000000010202 CONTEXT: hypervisor >> (XEN) rax: 0000000000000007 rbx: ffff83049a4b0000 rcx: 00000000000006a2 >> (XEN) rdx: 0000000000000000 rsi: 0000000000000000 rdi: 0000000000000000 >> (XEN) rbp: ffff83049a4b7f00 rsp: ffff83049a4b7ef8 r8: ffff830497e47000 >> (XEN) r9: 00000000ffffffff r10: 00000000900c2121 r11: 000000009a392956 >> (XEN) r12: ffff830497e47000 r13: ffff830497e49f40 r14: 0000000000000000 >> (XEN) r15: ffff82d0407dad10 cr0: 0000000080050033 cr4: 0000000000f526e0 >> (XEN) cr3: 0000000043c16000 cr2: fffffffffffffffc >> (XEN) fsb: 0000000000000000 gsb: 0000000000000000 gss: 0000000000000000 >> (XEN) ds: 0000 es: 0000 fs: 0000 gs: 0000 ss: 0000 cs: e008 >> (XEN) Xen code around (arch/x86/setup.c#reinit_bsp_stack+0xfa/0x160): >> (XEN) 00 b9 a2 06 00 00 0f 30 <80> 3d 71 26 f1 ff 00 74 3e 48 8d 93 f8 5f 00 00 >> (XEN) Valid stack range: ffff83049a4b6000-ffff83049a4b8000, sp=ffff83049a4b7ef8, tss.rsp0=ffff83049a4b7fb0 >> (XEN) No stack overflow detected. Skipping stack trace. >> (XEN) >> (XEN) **************************************** >> (XEN) Panic on CPU 0: >> (XEN) DOUBLE FAULT -- system shutdown >> (XEN) **************************************** >> >> This is on the instruction boundary after enabling CET (writing MSR_S_CET) and >> prior to establishing SSP. Despite identifying this as a critical window >> where any fault was deadly (the CPU tries to push a shadow stack frame at 0, >> hence the CR2 value wrapping around to the top of the address space), I >> clearly forgot that this meant interrupts too, which are enabled. >> >> Disable interrupts during the critical period. >> >> Fixes: b60ab42db2f0 ("x86/shstk: Activate Supervisor Shadow Stacks") >> Signed-off-by: Andrew Cooper >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> CC: Teddy Astie >> >> v2: >> * Only disable regular interrupts. NMIs are fine. > Much neater a fix as a result: > Reviewed-by: Jan Beulich Thanks, and yes; I'm rather embarrassed at how long it took to realise it was exactly the same as the SYSCALL gap, and therefore the same safety reasoning applied. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 10:02:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:02:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300428.1574954 (Exim 4.92) (envelope-from ) id 1wKCbS-00023H-EK; Tue, 05 May 2026 10:02:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300428.1574954; Tue, 05 May 2026 10:02:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCbS-00023A-BT; Tue, 05 May 2026 10:02:10 +0000 Received: by outflank-mailman (input) for mailman id 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2026 12:02:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz 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boundary="------------d5LENjm7gWSBOfIrz7H8vIUy" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777975324915 X-purgate-ID: tlsNG-c201ff/1777975327-E81A9443-EE0A9D78/0/0 X-purgate-type: clean X-purgate-size: 9913 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------d5LENjm7gWSBOfIrz7H8vIUy Content-Type: multipart/mixed; boundary="------------RPqqEVBnck7zQ25taWQJJjep"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: Subject: Re: [PATCH v2] x86/boot: Disable interrupts when establishing SSP References: <20260505084315.1350002-1-andrew.cooper3@citrix.com> In-Reply-To: <20260505084315.1350002-1-andrew.cooper3@citrix.com> --------------RPqqEVBnck7zQ25taWQJJjep Content-Type: multipart/mixed; boundary="------------GSm3FYIZ18c0K6XG6dIKNTig" --------------GSm3FYIZ18c0K6XG6dIKNTig Content-Type: text/plain; charset=UTF-8; format=flowed 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AeBDiet/95bIhiQUhvcmBtKsHRoWULJlzswY9eJsSt6WjqjVQZRc60mOne3K6vhnEbt WkWzyyy7CzAl5CxGgddfuFqTzSaaoaSW1Gk/p+cXOnAc/q3Ud8WqlA97l8wqhv6uaKghM3ncDj+ dzMQwjUnjlfEjwDg2V2Y6Ikw9RF2op6QkGPfayERzq+RXWOn3M8uGefmKHWujwFs933/YUMZ6o+ Mh8UjBXyV2J08jUCmQzGsp3U1Ti2TsdEYt5Wk+ZLqCHYoZZqNbnctEJ6j9pCwBhC8anEbRsrSKz VQFWeFH5iXUVghrN X-Received: by 2002:a2e:a802:0:b0:393:7987:5862 with SMTP id 38308e7fff4ca-39379875e33mr45872251fa.19.1777975782305; Tue, 05 May 2026 03:09:42 -0700 (PDT) MIME-Version: 1.0 References: <5a42b7c32fadf21262b8342f27e685916d0e5812.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 13:09:30 +0300 X-Gm-Features: AVHnY4JhWkbLY0_2SqeXFrOSTkFxupjeVNP9Dy0mDpQdrzGqbniy_ZLQ99nMdsI Message-ID: Subject: Re: [PATCH v8 05/13] xen/arm: gic-v3: add ITS suspend/resume support To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1777975783-6ED73CF5-1C07ADAC/0/0 X-purgate-type: clean X-purgate-size: 9123 Hi Luca, Thank you for the review. On Fri, Apr 24, 2026 at 1:54=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > Handle system suspend/resume for GICv3 with an ITS present so LPIs keep > > working after firmware powers the GIC down. Snapshot the CPU interface, > > distributor and last-CPU redistributor state, disable the ITS to cache = its > > CTLR/CBASER/BASER registers, then restore everything and re-arm the > > collection on resume. > > > > Add list_for_each_entry_continue_reverse() in list.h for the ITS suspen= d > > error path that needs to roll back partially saved state. > > > > Based on Linux commit dba0bc7b76dc ("irqchip/gic-v3-its: Add ability to= save/restore ITS state") > > Signed-off-by: Mykola Kvach > > --- > > Changes in V8: > > - Reword the CBASER/CWRITER comment to match Xen and drop the stale Lin= ux > > cmd_write reference. > > - Clarify the list_for_each_entry_continue_reverse() comment. > > - Factor out per-ITS helpers for collection setup and resume. > > - Restore each ITS and re-establish its collection mapping in the same > > loop, so a failed ITS resume is not followed by MAPC/SYNC on that > > un-restored instance. > > - panic in case when resume of an ITS failed > > - cleanup baser cache during suspend > > --- > > xen/arch/arm/gic-v3-its.c | 126 ++++++++++++++++++++++++-- > > xen/arch/arm/gic-v3.c | 15 ++- > > xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++ > > xen/include/xen/list.h | 14 +++ > > 4 files changed, 166 insertions(+), 12 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index 9ba068c46f..fe2865eac9 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, > > return its_send_command(its, cmd); > > } > > > > +static int gicv3_its_setup_collection_single(struct host_its *its, > > + unsigned int cpu) > > +{ > > + int ret; > > + > > + ret =3D its_send_cmd_mapc(its, cpu, cpu); > > + if ( ret ) > > + return ret; > > + > > + ret =3D its_send_cmd_sync(its, cpu); > > + if ( ret ) > > + return ret; > > + > > + return gicv3_its_wait_commands(its); > > +} > > + > > /* Set up the (1:1) collection mapping for the given host CPU. */ > > int gicv3_its_setup_collection(unsigned int cpu) > > { > > @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) > > > > list_for_each_entry(its, &host_its_list, entry) > > { > > - ret =3D its_send_cmd_mapc(its, cpu, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D its_send_cmd_sync(its, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D gicv3_its_wait_commands(its); > > + ret =3D gicv3_its_setup_collection_single(its, cpu); > > if ( ret ) > > return ret; > > } > > @@ -1209,6 +1217,106 @@ int gicv3_its_init(void) > > return 0; > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +int gicv3_its_suspend(void) > > +{ > > + struct host_its *its; > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > NIT: codestyle, spaces after and before the parenthesis Ack, I will fix the coding style. > > > + { > > + unsigned int i; > > + void __iomem *base =3D its->its_base; > > + > > + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR); > > + ret =3D gicv3_disable_its(its); > > This is called from system_suspend(), along the path iommu_suspend and > console_suspend() are called, finally reaching gic_suspend() and this one= . > > In the IHI 0069H.b, 5.6.2 Disabling an ITS, it says: > =E2=80=9CEnsure that all interrupts that target the ITS that is being pow= ered down are > either redirected or disabled=E2=80=9D, is it correct to assume all the I= TS targeting source > at this point are disabled because domains should be already suspended? Yes, that is the assumption here. Before Xen reaches this path, each domain must already have entered SHUTDOWN_suspend. In other words, the guest OS has already requested SYSTEM_SUSPEND only after completing its own suspend flow, so the ITS-targeting interrupt sources owned by that OS are expected to be quiesced at this point. So this code relies on the owning OS having disabled or otherwise quiesced those sources before issuing SYSTEM_SUSPEND, rather than Xen explicitly doing that in gicv3_its_suspend(). > > > > + if ( ret ) > > + { > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > here and in the other places we write GITS_CTLR, this reg has Quiescent a= s RO, > maybe we should mask the write to only the other bits that are writable? Yes, this was inherited from the Linux ITS suspend/resume code, which resto= res the saved GITS_CTLR value directly. That said, masking the write to the writable bits is cleaner, and I will do that in the next version. > > > + goto err; > > + } > > + > > + its->suspend_ctx.cbaser =3D readq_relaxed(base + GITS_CBASER); > > + > > + for (i =3D 0; i < GITS_BASER_NR_REGS; i++) > > NIT: codestyle on the spaces and parenthesis > > > + { > > + uint64_t baser =3D readq_relaxed(base + GITS_BASER0 + i * = 8); > > + > > + its->suspend_ctx.baser[i] =3D 0; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + its->suspend_ctx.baser[i] =3D baser; > > + } > > + } > > + > > + return 0; > > + > > + err: > > + list_for_each_entry_continue_reverse(its, &host_its_list, entry) > > + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTL= R); > > + > > + return ret; > > +} > > + > > +static int gicv3_its_resume_single(struct host_its *its, unsigned int = cpu) > > +{ > > + void __iomem *base =3D its->its_base; > > + unsigned int i; > > + int ret; > > + > > + /* > > + * Make sure that the ITS is disabled. If it fails to quiesce, > > + * don't restore it since writing to CBASER or BASER > > + * registers is undefined according to the GIC v3 ITS > > + * Specification. > > + */ > > + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + return ret; > > + > > + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); > > + > > + /* > > + * Writing CBASER resets CREADR to 0, so reset CWRITER to > > + * keep the command queue pointers aligned. > > + */ > > + writeq_relaxed(0, base + GITS_CWRITER); > > + > > + /* Restore GITS_BASER from the value cache. */ > > + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > > + { > > + uint64_t baser =3D its->suspend_ctx.baser[i]; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); > > + } > > + > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + > > + return gicv3_its_setup_collection_single(its, cpu); > > +} > > + > > +void gicv3_its_resume(void) > > +{ > > + struct host_its *its; > > + unsigned int cpu =3D smp_processor_id(); > > + int ret; > > + > > + list_for_each_entry(its, &host_its_list, entry) > > + { > > + ret =3D gicv3_its_resume_single(its, cpu); > > + if ( ret ) > > + panic("GICv3: ITS@%"PRIpaddr": failed to restore during re= sume: %d\n", > > + its->addr, ret); > > + } > > +} > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > > > /* > > * Local variables: > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index d182a71478..ef8318dd50 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -862,7 +862,7 @@ static bool gicv3_enable_lpis(void) > > return true; > > } > > > > -static int __init gicv3_populate_rdist(void) > > +static int gicv3_populate_rdist(void) > > { > > int i; > > uint32_t aff; > > @@ -932,7 +932,7 @@ static int __init gicv3_populate_rdist(void) > > ret =3D gicv3_lpi_init_rdist(ptr); > > if ( ret && ret !=3D -ENODEV && ret !=3D -EBUSY ) > > { > > - printk("GICv3: CPU%d: Cannot initialize LPIs: = %u\n", > > + printk("GICv3: CPU%d: Cannot initialize LPIs: = %d\n", > > this is to fix the mistake of a patch before, Yes, I will fold this into the previous patch. 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Tue, 05 May 2026 03:13:46 -0700 (PDT) Message-ID: <3953265a-2bfc-4853-bda5-3450c096ebb2@suse.com> Date: Tue, 5 May 2026 12:13:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 01/11] xen: arm: fix len type for guest copy functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <53BD54C0-E493-4D04-9CB1-D16B148CA3A9@arm.com> <32eddac5-73c7-46c4-8944-99cfe970c803@suse.com> <5B084D26-4FE9-4C1A-8C3A-298FB73F34CB@arm.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5B084D26-4FE9-4C1A-8C3A-298FB73F34CB@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777976027-6EB74CF5-A400962C/0/0 X-purgate-type: clean X-purgate-size: 1708 On 05.05.2026 12:07, Luca Fancellu wrote: > > >> On 5 May 2026, at 10:05, Jan Beulich wrote: >> >> On 05.05.2026 10:27, Luca Fancellu wrote: >>>> On 4 May 2026, at 06:30, Jan Beulich wrote: >>>> On 29.04.2026 12:08, Luca Fancellu wrote: >>>>>> @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, >>>>>> unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, >>>>>> paddr_t gpa, >>>>>> void *buf, >>>>>> - unsigned int len) >>>>>> + unsigned long len) >>>>>> { >>>>> >>>>> Now that we do this, potentially we could have truncation in the places where we store its return value >>>>> inside an int: >>>> >>>> Those would suffer from truncation before and after this change, wouldn't they? >>>> Just that where the truncation occurs does move. I.e. if necessary they would >>>> want dealing with separately. >>> >>> yes that’s true, truncation was already there in different places, do you want to deal with it separately so that >>> we have a Fixes tag for it? >> >> I already said I'd like that to be dealt with separately, didn't I? > > I understood the “separately” part. > > What I was asking is whether the reason is that this should be its own fix, with its own Fixes tag, since the truncation predates this patch. The reason isn't so much the Fixes: tag, but independent issues generally wanting independent fixes. This also helps with backporting (in general; maybe not so much here). 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------WxsKrHIy2P2sQMdeKd48j1Af" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1777976229876 X-purgate-ID: tlsNG-c201ff/1777976235-E81A9443-39341F1D/0/0 X-purgate-type: clean X-purgate-size: 8052 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------WxsKrHIy2P2sQMdeKd48j1Af Content-Type: multipart/mixed; boundary="------------nm7svcn9d4CJ82sy0tb5BVHD"; protected-headers="v1" From: Teddy Astie To: Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , xen-devel@lists.xenproject.org Message-ID: Subject: Re: [RFC PATCH 2/7] common: Track latest pCPU that ran the vCPU References: In-Reply-To: --------------nm7svcn9d4CJ82sy0tb5BVHD Content-Type: multipart/mixed; boundary="------------aAoJrQUmbXy0LM6Dvf0W0hOB" --------------aAoJrQUmbXy0LM6Dvf0W0hOB Content-Type: text/plain; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsD4BAABCAAjFiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmn5w6UFAwAAAAAACgkQZg+p0QLLz9B1 wwv3UfjQJgAX0OlB7EtcmUGHeKztJQPy8ah5dhGUFJkQlUIBrTO1P6bHo6PdcXyGbsNt7HNAO5tx ZQIns0gVV0g3H5M5ICFr1nw86/DKGm+eSbeEQGG8FL2x69A7hLtm2yFtbtyEFUiYUsvzRk3OdF+m YMVPaf4M74vJCUlRobh7BKToOsas+u4UlEJMgmKT1OvAOekmHqkHL/EBRUa6xmYYLzaIEtmiJUyr 7ydA/dkLc17nH6H6POd5X5geVJxZUgN4jrfzXWuvhEPMrJJ9Q0GnGRyfrvw+aqa1epyu5Uyz9qzK IlGhsO07aiGHS2k35hVsefzqf2G9OMILOXUvTbxobgsUzYyzjC8Mh8q7S90lUnLqKADTez57Z4ph +ipdpS1ZYWM5XYXbMlnWtBV11TIhheNa6+Se91X8l/qP/QdOlsdMjGZNJ7oQ3xIsguNU42DPy0BG 2QncxRU5KY99tGm66D1dsraAzHLrJHkiAjcduKJj6YWvdVXN+UhN364UYWc= =F0pZ -----END PGP SIGNATURE----- --------------WxsKrHIy2P2sQMdeKd48j1Af-- From xen-devel-bounces@lists.xenproject.org Tue May 05 10:17:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:17:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300470.1575000 (Exim 4.92) (envelope-from ) id 1wKCqU-000686-Np; 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Tue, 05 May 2026 03:18:51 -0700 (PDT) MIME-Version: 1.0 References: <8B067451-681E-45CA-843A-1F0FD34ABF3C@arm.com> In-Reply-To: <8B067451-681E-45CA-843A-1F0FD34ABF3C@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 13:18:40 +0300 X-Gm-Features: AVHnY4Lh2TgfsJXmLLfDTHnZO4AfN0LJzrVBjJSiTtfqzJH9HElEdrL1QbaUmU4 Message-ID: Subject: Re: [PATCH v8 07/13] xen/arm: ffa: fix notification SRI across CPU hotplug/suspend To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Volodymyr Babchuk , Jens Wiklander , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1777976332-2B96A3FF-C99E03BA/0/0 X-purgate-type: clean X-purgate-size: 4711 Hi Bertrand, Thank you for the review. On Mon, Apr 27, 2026 at 11:22=E2=80=AFAM Bertrand Marquis wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 12:45, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > The FF-A notification SRI interrupt handler was not correctly tied to > > CPU hotplug and suspend/resume. As a result, CPUs going offline and > > back online could end up with stale or missing handlers, breaking > > delivery of FF-A notifications. > > > > Signed-off-by: Mykola Kvach > > This will probably need a rebase if the harden notification and VM to VM = notification > serie in FF-A is merged first. I will rebase this patch if the FF-A notification series lands first. > > Anyway, changes look good so: > > Reviewed-by: Bertrand Marquis Thank you, I will add your Reviewed-by. Best regards, Mykola > > Cheers > Bertrand > > > --- > > xen/arch/arm/tee/ffa_notif.c | 63 ++++++++++++++++++++++++++++-------- > > 1 file changed, 50 insertions(+), 13 deletions(-) > > > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.= c > > index 186e726412..513c399594 100644 > > --- a/xen/arch/arm/tee/ffa_notif.c > > +++ b/xen/arch/arm/tee/ffa_notif.c > > @@ -360,10 +360,28 @@ static int32_t ffa_notification_bitmap_destroy(ui= nt16_t vm_id) > > return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0= , 0); > > } > > > > -void ffa_notif_init_interrupt(void) > > +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, sri_irq); > > + > > +static int request_sri_irq(void) > > { > > int ret; > > + struct irqaction *sri_action =3D &this_cpu(sri_irq); > > + > > + sri_action->name =3D "FF-A notif"; > > + sri_action->handler =3D notif_irq_handler; > > + sri_action->dev_id =3D NULL; > > + sri_action->free_on_release =3D 0; > > + > > + ret =3D setup_irq(notif_sri_irq, 0, sri_action); > > + if ( ret ) > > + printk(XENLOG_ERR "ffa: setup_irq irq %u failed: error %d\n", > > + notif_sri_irq, ret); > > > > + return ret; > > +} > > + > > +void ffa_notif_init_interrupt(void) > > +{ > > if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) > > { > > /* > > @@ -376,14 +394,36 @@ void ffa_notif_init_interrupt(void) > > * pending, while the SPMC in the secure world will not notice = that > > * the interrupt was lost. > > */ > > - ret =3D request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A= notif", > > - NULL); > > - if ( ret ) > > - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %= d\n", > > - notif_sri_irq, ret); > > + request_sri_irq(); > > } > > } > > > > +static void deinit_ffa_notif_interrupt(void) > > +{ > > + if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) > > + release_irq(notif_sri_irq, NULL); > > +} > > + > > +static int cpu_ffa_notif_callback(struct notifier_block *nfb, > > + unsigned long action, > > + void *hcpu) > > +{ > > + switch ( action ) > > + { > > + case CPU_DYING: > > + deinit_ffa_notif_interrupt(); > > + break; > > + default: > > + break; > > + } > > + > > + return NOTIFY_DONE; > > +} > > + > > +static struct notifier_block cpu_ffa_notif_nfb =3D { > > + .notifier_call =3D cpu_ffa_notif_callback, > > +}; > > + > > void ffa_notif_init(void) > > { > > const struct arm_smccc_1_2_regs arg =3D { > > @@ -392,7 +432,6 @@ void ffa_notif_init(void) > > }; > > struct arm_smccc_1_2_regs resp; > > unsigned int irq; > > - int ret; > > > > /* Only enable fw notification if all ABIs we need are supported */ > > if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) && > > @@ -408,13 +447,11 @@ void ffa_notif_init(void) > > notif_sri_irq =3D irq; > > if ( irq >=3D NR_GIC_SGI ) > > irq_set_type(irq, IRQ_TYPE_EDGE_RISING); > > - ret =3D request_irq(irq, 0, notif_irq_handler, "FF-A notif", N= ULL); > > - if ( ret ) > > - { > > - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %= d\n", > > - irq, ret); > > + > > + if ( request_sri_irq() ) > > return; > > - } > > + > > + register_cpu_notifier(&cpu_ffa_notif_nfb); > > fw_notif_enabled =3D true; > > } > > } > > -- > > 2.43.0 > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 10:25:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:25:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300489.1575017 (Exim 4.92) (envelope-from ) id 1wKCxJ-0008J4-NF; Tue, 05 May 2026 10:24:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300489.1575017; Tue, 05 May 2026 10:24:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCxJ-0008Ix-KY; Tue, 05 May 2026 10:24:45 +0000 Received: by outflank-mailman (input) for mailman id 1300489; Tue, 05 May 2026 10:24:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKCxI-0008Ir-Eq for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:24:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKCxH-005YTf-E6 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:24:43 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c557-2eae-0a2a0a5409dd-0a2a450cc57e-28 for ; Tue, 05 May 2026 12:24:43 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c56b-62f1-0a2a450c0019-d1558031c951-3 for ; Tue, 05 May 2026 12:24:43 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-488b8bc6bc9so31882635e9.3 for ; Tue, 05 May 2026 03:24:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1777976683-6E169CF5-DEEE9B63/0/0 X-purgate-type: clean X-purgate-size: 2990 On 05.05.2026 11:13, Jürgen Groß wrote: > On 05.05.26 10:43, Jan Beulich wrote: >> On 05.05.2026 10:06, Juergen Gross wrote: >>> When fixing a conflict in xen_e820_resolve_conflicts(), the loop over >>> the E820 map entries needs to be restarted, as the E820 map will have >>> been modified by the fix. Otherwise entries might be skipped by >>> accident. >>> >>> Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") >>> Signed-off-by: Juergen Gross >> >> First, while trying to review this, isn't there another issue in >> xen_e820_swap_entry_with_ram(), in that >> >> entry->addr = entry_end - swap_size + >> swap_addr - swap_entry->addr; >> >> >> really means to be >> >> entry->addr = entry_end - swap_size + >> swap_entry->addr - swap_addr; >> >> (affecting non-page-aligned E820 entries)? > > Yes, you are right. > >> >> Further, that function converts swap_entry to the page-aligned superset >> of the passed in range. How is it guaranteed that this new range won't >> overlap with the predecessor and/or successor one? Wouldn't that need >> to be conversion to the page-aligned subset instead? > > This is subtle. :-) > > We are converting to RAM (usable), so the type value is 1. e820__update_table() > will handle overlaps just fine, with higher type values "winning" against lower > ones. So any other region overlapping with the new RAM region will result in > another conflict in the next loop iteration. Oh, wow, and this is a property of the function that one can rely upon? > Using the page-aligned subset would result in possible memory holes, which would > be problematic (the kernel or page tables shouldn't have holes, after all). Aren't such holes normal to occur, e.g. on misaligned RAM/UNUSABLE boundaries? >> And then, is passing the page-aligned superset to xen_add_remap_nonram() >> really appropriate? Why would any leading or trailing space there be >> subject to remapping? > > How would you want to remap a sub-page physical memory area to another location > without affecting the rest of the page? We are reworking the final p2m map here. Well, first and foremost: xen_add_remap_nonram() takes and stores byte- granular addresses / sizes, with the sole requirement being that the offset-into-page be identical between both addresses. That check alone already indicates that non-page-aligned addresses are expected to be passed into here. Further, xen_acpi_os_ioremap() uses the resulting remap table, and is byte granular. With the physical address adjustment there, both mappings could (theoretically) coexist. But the problem I'm trying to point out is that by passing the page-aligned superset into xen_add_remap_nonram() you misguide xen_acpi_os_ioremap() (while at the same time xen_do_remap_nonram() will do suitable rounding to page boundaries even if exact addresses were passed). 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505102417.208138-1-jgross@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260505102417.208138-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1777976747-496B0A53-D04F70B1/0/0 X-purgate-type: clean X-purgate-size: 502 On 05.05.2026 12:24, Juergen Gross wrote: > When swapping a not page-aligned E820 map entry with RAM, the start > address of the modified entry is calculated wrong (the offset into the > page is subtracted instead of being added to the page address). > > Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") > Reported-by: Jan Beulich > Signed-off-by: Juergen Gross Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue May 05 10:30:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:30:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300506.1575034 (Exim 4.92) (envelope-from ) id 1wKD2W-0002FP-Gj; Tue, 05 May 2026 10:30:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300506.1575034; Tue, 05 May 2026 10:30:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKD2W-0002FI-E3; Tue, 05 May 2026 10:30:08 +0000 Received: by outflank-mailman (input) for mailman id 1300506; Tue, 05 May 2026 10:30:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKD2V-0002FC-19 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:30:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKD2U-00DY4H-DL for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:30:06 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c6ac-2eae-0a2a0a5409dd-0a2a45038164-10 for ; Tue, 05 May 2026 12:30:06 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c6ae-672d-0a2a45030019-d1558030e0fd-3 for ; Tue, 05 May 2026 12:30:06 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so80549635e9.2 for ; Tue, 05 May 2026 03:30:06 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1777976230.8631fc262581453bbf619ec5b2062170.19df7a441f3000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1777977006-A1370938-D556029C/0/0 X-purgate-type: clean X-purgate-size: 1511 On 05.05.2026 12:17, Teddy Astie wrote: > Le 04/05/2026 à 17:51, Jan Beulich a écrit : >> On 15.04.2026 15:32, Teddy Astie wrote: >>> Track on which pCPU each vCPU of a domain ran. This will >>> be used to know whether a TLB flush is required or not >>> when the vCPU is migrated on another pCPU. >> >> Somewhat related tracking already exists - see the dirty_cpumask field. > > I've seen it, but I'm not sure how it can be leveraged here. > > I will try to take a closer look if that could be used instead. > >> But what title and description say doesn't match ... >> >>> @@ -977,6 +978,8 @@ void asmlinkage svm_vmenter_helper(void) >>> >>> svm_sync_vmcb(curr, vmcb_needs_vmsave); >>> >>> + curr->domain->latest_vcpu[cpu] = curr->vcpu_id; >> >> ... the implementation anyway: You track which vCPU last ran on a given >> pCPU. Since the same pCPU may have run multiple vCPU-s which then weren't >> scheduled again, you lose data afaict. >> > > I mixed up the wording. But the implementation is the proper intent. > > It's more > > Track which vCPU of the domain each pCPU ran. Okay, yet then (as already pointed out) how do you know vCPU0 ran last on a given pCPU if after its de-scheduling vCPU1 (of the same domain) was put there. Your track record (after de-scheduling vCPU1) will say only vCPU1; information on vCPU0 will be lost. Yet then, as also indicated, it's not quite clear to me how exactly you mean to leverage this tracking. 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pr=C Message-ID: <18280bdb-e33a-4aba-aa1d-8f42675717e8@amd.com> Date: Tue, 5 May 2026 12:34:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , "Harry Ramsey" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , "Jan Beulich" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260420142224.1802911-1-luca.fancellu@arm.com> <20260420142224.1802911-3-luca.fancellu@arm.com> <6ba6db51-3ff0-4ecd-9f86-03735e7dfc05@amd.com> <55B3CCAD-8EF6-4949-BC87-D7EE3A348FEC@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <55B3CCAD-8EF6-4949-BC87-D7EE3A348FEC@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE4:EE_|IA1PR12MB7592:EE_ X-MS-Office365-Filtering-Correlation-Id: 67c982b6-ba31-4605-e546-08deaa91f320 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|7416014|36860700016|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dL6OQSdMGI5t11t03IS0kfN4f8dzdsQYhhbFzctQH1KZr+F8l0Qh/P7Kkyp5fJ5sycyrXKLCB54fEAZuwVuPwhiCerdiVa2Si7DQEfhzLicm2VOJ1bKqYpQIFO7Zc+knZ3R+oCjVGLPlz64Ree7+IkmQHpHT/H+5pAWW/5t+WfyDN/kYsZr35fQzenjbV28OTuo6Y9FTsSvWzym1cYQTI7A/bYRlhrlbx3enZJqlQUZ65TozcsfbEKSNfafGgPsqE8xBzefHNrzoPH1rP9lDa+Wly3svseXBVtLqqCnzxJdy7immP3cD9Bhg+ZneUR7/7PxED0yiCZvSKjgEY3GWPZFLJYDc1qWee8qoJnMJ2ZrUqRgTL8tdjkxzXtkAJdJXXZRcDLzqxw6tJ4eVHmaBjQwFBlOIAwQj7GNF6dpU+ha+/ZgWq94S2dSXSDRcRxZM X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 10:34:55.7827 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 67c982b6-ba31-4605-e546-08deaa91f320 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB7592 X-purgate-ID: tlsNG-c1860d/1777977304-C156FDB1-64F97BA0/0/0 X-purgate-type: clean X-purgate-size: 12848 On 29-Apr-26 14:46, Luca Fancellu wrote: > Hi Michal, > > thanks for your review, > >>> >>> diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt >>> index 977b4286082f..c3f484a3b01a 100644 >>> --- a/docs/misc/arm/device-tree/booting.txt >>> +++ b/docs/misc/arm/device-tree/booting.txt >>> @@ -322,6 +322,20 @@ with the following properties: >>> Should be used together with scmi-smc-passthrough Xen command line >>> option. >>> >>> +- v8r_el1_msa >>> + >>> + A string property specifying whether, on Armv8-R systems, a domain >>> + should use PMSAv8 (MPU) at EL1 or VMSAv8 (MMU) at EL1. >> Instead of repeating at EL1 you could move it next to "on Armv8R systems" > > ok > >> >>> + >>> + - "mmu" >>> + Enables VMSAv8 at EL1. This requires hardware support and is only >>> + optionally available on AArch64. >> Maybe it's due to the combination of words but it does not immediately tell that >> it's not present on AArch32. I would add: "Not supported on AArch32". > > Ok > >> >>> + >>> + - "mpu" >>> + Enables PMSAv8 at EL1. This is the default behaviour when the property is >>> + not passed. This configuration requires static allocation (xen,static-mem) >>> + and direct mapping (direct-map). >>> + >>> Under the "xen,domain" compatible node, one or more sub-nodes are present >>> for the DomU kernel and ramdisk. >>> >>> diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c >>> index 4181c105389a..6f0256f9d825 100644 >>> --- a/xen/arch/arm/dom0less-build.c >>> +++ b/xen/arch/arm/dom0less-build.c >>> @@ -24,6 +24,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> #ifdef CONFIG_VGICV2 >>> @@ -322,6 +323,8 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, >>> if ( domu_dt_sci_parse(node, d_cfg) ) >>> panic("Error getting SCI configuration\n"); >>> >>> + arch_dt_v8r_el1_msa_parse(node, d_cfg); >> "arch" prefix should be used by functions called from the common code that have >> arch-specific implementation. This is not the case for functions you're >> introducing here, so please drop this prefix. >> >> Also, I would continue using the SCI approach e.g. call it domu_dt_msa_parse() >> and decide to panic at the call site rather than making this decision in the >> function itself. > > sounds good > >> >>> + >>> if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) >>> { >>> int vpl011_virq = GUEST_VPL011_SPI; >>> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >>> index 26380a807cad..dfa7ace1141b 100644 >>> --- a/xen/arch/arm/domain.c >>> +++ b/xen/arch/arm/domain.c >>> @@ -18,6 +18,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> #include >>> #include >>> @@ -725,6 +726,9 @@ int arch_domain_create(struct domain *d, >>> if ( (rc = sci_domain_init(d, config)) != 0 ) >>> goto fail; >>> >>> + if ( (rc = arch_set_v8r_el1_msa(d, config, flags)) != 0 ) >>> + goto fail; >>> + >>> return 0; >>> >>> fail: >>> diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h >>> index ffe5d0d9f0a6..4a3fb825962b 100644 >>> --- a/xen/arch/arm/include/asm/domain.h >>> +++ b/xen/arch/arm/include/asm/domain.h >>> @@ -128,6 +128,10 @@ struct arch_domain >>> #endif >>> >>> struct resume_info resume_ctx; >>> + >>> +#ifdef CONFIG_MPU >>> + uint8_t v8r_el1_msa; >>> +#endif >>> } __cacheline_aligned; >>> >>> struct arch_vcpu >>> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h >>> index 6674dac5e2f8..921d6f98f4f4 100644 >>> --- a/xen/arch/arm/include/asm/domain_build.h >>> +++ b/xen/arch/arm/include/asm/domain_build.h >>> @@ -4,6 +4,14 @@ >>> #include >>> #include >>> >>> +#if defined(CONFIG_MMU) >>> +#include >>> +#elif defined(CONFIG_MPU) >>> +#include >>> +#else >>> +# error "Unknown memory management layout" >> I don't think that this error msg is correct for domain build. > > are you suggesting dropping the error or modifying the message? modifying the message > >>> >>> diff --git a/xen/arch/arm/include/asm/mpu.h b/xen/arch/arm/include/asm/mpu.h >>> index 72fa5b00b861..8a8c01086206 100644 >>> --- a/xen/arch/arm/include/asm/mpu.h >>> +++ b/xen/arch/arm/include/asm/mpu.h >>> @@ -27,6 +27,11 @@ >>> >>> #ifndef __ASSEMBLER__ >>> >>> +/* >>> + * Utility function to determine if an Armv8-R processor supports VMSA. >>> + */ >> NIT: No need for multi-line comment for a single sentence that can fit in one line. > > ok > >> >>> +bool has_v8r_vmsa_support(void); >>> + >>> /* >>> * Set base address of MPU protection region. >>> * >>> diff --git a/xen/arch/arm/include/asm/mpu/domain-build.h b/xen/arch/arm/include/asm/mpu/domain-build.h >>> new file mode 100644 >>> index 000000000000..463cd85b5b7e >>> --- /dev/null >>> +++ b/xen/arch/arm/include/asm/mpu/domain-build.h >>> @@ -0,0 +1,27 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#ifndef __ARM_MPU_DOMAIN_BUILD_H__ >>> +#define __ARM_MPU_DOMAIN_BUILD_H__ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +void arch_dt_v8r_el1_msa_parse(struct dt_device_node *node, >>> + struct xen_domctl_createdomain *d_cfg); >>> + >>> +int arch_set_v8r_el1_msa(struct domain *d, >>> + const struct xen_domctl_createdomain *config, >>> + unsigned int flags); >>> + >>> +#endif /* __ARM_MPU_DOMAIN_BUILD_H__ */ >>> + >>> +/* >>> + * Local variables: >>> + * mode: C >>> + * c-file-style: "BSD" >>> + * c-basic-offset: 4 >>> + * indent-tabs-mode: nil >>> + * End: >>> + */ >>> diff --git a/xen/arch/arm/mpu/Makefile b/xen/arch/arm/mpu/Makefile >>> index 3327fadd5d0e..e3997e41b81b 100644 >>> --- a/xen/arch/arm/mpu/Makefile >>> +++ b/xen/arch/arm/mpu/Makefile >>> @@ -1,5 +1,6 @@ >>> obj-$(CONFIG_ARM_32) += arm32/ >>> obj-$(CONFIG_ARM_64) += arm64/ >>> +obj-y += domain-build.o >>> obj-y += domain-page.o >>> obj-y += mm.o >>> obj-y += p2m.o >>> diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c >>> index a4673c351141..5eaeb3400e6c 100644 >>> --- a/xen/arch/arm/mpu/arm32/mm.c >>> +++ b/xen/arch/arm/mpu/arm32/mm.c >>> @@ -38,6 +38,11 @@ >>> break; \ >>> } >>> >>> +bool has_v8r_vmsa_support(void) >>> +{ >>> + return false; >>> +} >>> + >>> /* >>> * Armv8-R supports direct access and indirect access to the MPU regions through >>> * registers: >>> diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c >>> index ed643cad4073..b07e729a7d05 100644 >>> --- a/xen/arch/arm/mpu/arm64/mm.c >>> +++ b/xen/arch/arm/mpu/arm64/mm.c >>> @@ -32,6 +32,11 @@ >>> break; \ >>> } >>> >>> +bool has_v8r_vmsa_support(void) >>> +{ >>> + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; >>> +} >>> + >>> /* >>> * Armv8-R supports direct access and indirect access to the MPU regions through >>> * registers: >>> diff --git a/xen/arch/arm/mpu/domain-build.c b/xen/arch/arm/mpu/domain-build.c >>> new file mode 100644 >>> index 000000000000..1bdd0ffedebb >>> --- /dev/null >>> +++ b/xen/arch/arm/mpu/domain-build.c >>> @@ -0,0 +1,76 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +void __init arch_dt_v8r_el1_msa_parse(struct dt_device_node *node, >>> + struct xen_domctl_createdomain *d_cfg) >>> +{ >>> + const char *v8r_el1_msa; >>> + >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; >>> + >>> + if ( !dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa) ) >>> + { >>> + if ( !strcmp(v8r_el1_msa, "mmu") ) >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; >>> + else if ( !strcmp(v8r_el1_msa, "mpu") ) >>> + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; >>> + else >>> + panic("Invalid device tree option for v8r_el1_msa\n"); >>> + } >>> +} >>> + >>> +int arch_set_v8r_el1_msa(struct domain *d, >>> + const struct xen_domctl_createdomain *config, >>> + unsigned int flags) >>> +{ >>> + switch ( config->arch.v8r_el1_msa ) >>> + { >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: >>> + fallthrough; >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: >>> + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) >>> + { >>> + dprintk(XENLOG_INFO, >>> + "PMSA is not valid for domain without static allocation and direct map (v8r_el1_msa)\n"); >>> + return -EINVAL; >>> + } >>> + break; >>> + >>> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: >>> + if ( !has_v8r_vmsa_support() ) >>> + { >>> + dprintk(XENLOG_INFO, >>> + "Platform does not support VMSA at EL1 (v8r_el1_msa)\n"); >>> + return -EINVAL; >>> + } >>> + break; >>> + >>> + default: >>> + dprintk(XENLOG_INFO, "Unsupported arch.v8r_el1_msa value (%u)\n", >>> + config->arch.v8r_el1_msa); >>> + return -EINVAL; >>> + } >> Why do we even need this split. It seems like all the above checks could be done >> in arch_dt_v8r_el1_msa_parse given that it is called after static-mem,direct-map >> are set. This would simplify this file and we would not even need to introduce >> new domain-build split for one function. > > Please correct me if I’m wrong, if I move the checks in arch_dt_v8r_el1_msa_parse() they will > be handled only on dom0less domain creation only. > If I have it in the current way it will be handled by dom0less and XL toolstack creation. > I understand that for now the toolstack path is not implemented, but it felt better to do this now > rather than change it later. > > Let me know what you think. MPU == everything static, so I'm not sure how dynamic domain creation via libxl would come into play here. > >> >>> + >>> + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; >>> + >>> + return 0; >>> +} >>> + >>> +/* >>> + * Local variables: >>> + * mode: C >>> + * c-file-style: "BSD" >>> + * c-basic-offset: 4 >>> + * indent-tabs-mode: nil >>> + * End: >>> + */ >>> diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h >>> index cd563cf70684..7d6f87e8b2b1 100644 >>> --- a/xen/include/public/arch-arm.h >>> +++ b/xen/include/public/arch-arm.h >>> @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >>> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >>> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >>> >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 >>> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 >>> + >>> struct xen_arch_domainconfig { >>> /* IN/OUT */ >>> uint8_t gic_version; >>> @@ -355,6 +359,9 @@ struct xen_arch_domainconfig { >>> uint32_t clock_frequency; >>> /* IN */ >>> uint8_t arm_sci_type; >>> + /* IN */ >>> + uint8_t v8r_el1_msa; >>> + uint16_t pad; >> Before this change there were 3B of implicit padding. Now you added 1B of data >> and 2B of explicit padding. The struct size is the same, so why bumping the >> interface version? I don't see it necessary here. Also, why explicit padding? >> With explicit padding I do think you need to now check that it's 0. > > I’ve bumped because if an older toolstack is passing something that is not zero > in the v8r_el1_msa we would return an error and stop the domain creation by the > above: I guess we won't have this issue if we drop arch_set_v8r_el1_msa as suggested above. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 10:39:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:39:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300526.1575052 (Exim 4.92) (envelope-from ) id 1wKDBI-0003lL-MA; Tue, 05 May 2026 10:39:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300526.1575052; Tue, 05 May 2026 10:39:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDBI-0003lE-JQ; Tue, 05 May 2026 10:39:12 +0000 Received: by outflank-mailman (input) for mailman id 1300526; Tue, 05 May 2026 10:39:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDBH-0003l8-VY for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:39:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDBH-00C3Op-BA for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:39:11 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c8c8-bab6-0a2a0a5309dd-0a2a4504c33e-20 for ; Tue, 05 May 2026 12:39:11 +0200 Received: from [195.135.223.130] (helo=smtp-out1.suse.de) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c8cf-1dec-0a2a45040019-c387df82d0a0-3 for ; Tue, 05 May 2026 12:39:11 +0200 Received: from imap1.dmz-prg2.suse.org (imap1.dmz-prg2.suse.org [IPv6:2a07:de40:b281:104:10:150:64:97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id CE9C26A832; Tue, 5 May 2026 10:24:22 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 7F039593A3; Tue, 5 May 2026 10:24:22 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id 7nuaHVbF+WmlDwAAD6G6ig (envelope-from ); Tue, 05 May 2026 10:24:22 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777976663; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=1kPsih4iTQHzWl89ILt0g95YzXtWS3e4GyMfMv2igR4=; b=tn3PzYfCPZtySioGtvMgAlbygEOaU/FEtpO2jEf1J6SkLQahFS/xM70sMFDvfyToaLH7XH sQPTPpGQhfV91XLB/47t7gJ/GZ1T6HSiPmn5NL5XPAj1c9Psc488L1swhhACnvsHZaHwcC EgGhEE8Tn/yGA+L2wWg9uSqTkGmt9MU= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=PiLjwjp+ DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1777976662; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=1kPsih4iTQHzWl89ILt0g95YzXtWS3e4GyMfMv2igR4=; b=PiLjwjp+GPhSNZPJ8LnSJD3yciFyfyaOd7w2dDeG76KVifcwgNTKNaIC+kLSGSLUPcolOD phK/Icdkl3jYRR8OhlEMTLwnNVJu5xCbvEhf0ag2w0WjZNVW06jrRj0ypeVu/O75D0Ty60 1tgoDdAEwiJmIOr58lYJ5hpc0TDJNBQ= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, Jan Beulich Subject: [PATCH] x86/xen: Fix xen_e820_swap_entry_with_ram() Date: Tue, 5 May 2026 12:24:17 +0200 Message-ID: <20260505102417.208138-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Flag: NO X-Spam-Score: -3.01 X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:dkim,suse.com:mid]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCPT_COUNT_SEVEN(0.00)[11]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCVD_TLS_ALL(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Queue-Id: CE9C26A832 X-Spam-Level: X-purgate-ID: tlsNG-ebf023/1777977551-4B5683FF-70C5D1EB/0/0 X-purgate-type: clean X-purgate-size: 1062 When swapping a not page-aligned E820 map entry with RAM, the start address of the modified entry is calculated wrong (the offset into the page is subtracted instead of being added to the page address). Fixes: be35d91c8880 ("xen: tolerate ACPI NVS memory overlapping with Xen allocated memory") Reported-by: Jan Beulich Signed-off-by: Juergen Gross --- arch/x86/xen/setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/setup.c b/arch/x86/xen/setup.c index bb95a05259b8..41251d4cf953 100644 --- a/arch/x86/xen/setup.c +++ b/arch/x86/xen/setup.c @@ -655,7 +655,7 @@ static void __init xen_e820_swap_entry_with_ram(struct e820_entry *swap_entry) /* Fill new entry (keep size and page offset). */ entry->type = swap_entry->type; entry->addr = entry_end - swap_size + - swap_addr - swap_entry->addr; + swap_entry->addr - swap_addr; entry->size = swap_entry->size; /* Convert old entry to RAM, align to pages. */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 05 10:41:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:41:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300534.1575061 (Exim 4.92) (envelope-from ) id 1wKDD3-0005Dw-0G; Tue, 05 May 2026 10:41:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300534.1575061; Tue, 05 May 2026 10:41:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDD2-0005Dp-Ti; Tue, 05 May 2026 10:41:00 +0000 Received: by outflank-mailman (input) for mailman id 1300534; Tue, 05 May 2026 10:40:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDD1-0005Dh-LP for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:40:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDD1-001j5O-1V for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:40:59 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9c92d-2eae-0a2a0a5409dd-0a2a4504eaf2-44 for ; Tue, 05 May 2026 12:40:58 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9c93a-1dec-0a2a45040019-d1558035b83a-3 for ; Tue, 05 May 2026 12:40:58 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so57383955e9.2 for ; Tue, 05 May 2026 03:40:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 03:40:58 -0700 (PDT) Message-ID: <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Date: Tue, 5 May 2026 12:40:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1777977658-300413FF-42E4224F/0/0 X-purgate-type: clean X-purgate-size: 2711 On 05.05.2026 09:35, Orzel, Michal wrote: > On 05-May-26 09:13, Roger Pau Monné wrote: >> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>> defines it). >>>>> >>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>> to 0 when the arch does not define it. This makes the generic macros >>>>> correct for all architectures, even though they are only used on x86 >>>>> today. >>>> >>>> Hm, I assume this offset was added because the original mask PDX >>>> compression won't (usually) compress the gap between 0 and the start >>>> of RAM. However the newish offset PDX compression should be able to >>>> compress from 0 to start of RAM, and hence you don't need to apply >>>> an extra PDX offset there? >>>> >>>> If that's indeed the case it might be better to integrate >>>> frametable_base_pdx into the mask compression algorithm itself, so >>>> that on some arches it's a mask plus a decrease. >>> The offset is needed regardless of whether compression is used. With >>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>> 0x80000000, the first valid PDX is 0x80000. >> >> OK, so you are doing some (kind of) address space compression (removing >> the leading empty range to the first RAM region) even when PDX is >> disabled. >> >>> Without frametable_base_pdx >>> the frame table would have to be indexed from 0, wasting >>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >> >> But you don't really "waste" memory, just address space? Oh, maybe >> not on ARM as it doesn't use pdx_group_valid? And so you >> unconditionally populate the frametable from PDX 0 to max PDX. > With pdx_group_valid (which this series adds) we wouldn't waste > physical memory for the leading gap. But we'd still waste virtual address > space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > because the full range from PDX 0 must fit. For example with RAM starting at 5TB > the virtual offset before the first usable entry would be ~70GB — more than the > entire 32GB FRAMETABLE_SIZE on ARM64. Yet still - this is exactly one of the situations offset compression means to cover. I'm entirely with Roger as to it being undesirable to build a special case variant of "offset compression" into "no compression". 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pr=C Message-ID: Date: Tue, 5 May 2026 12:46:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529E:EE_|DS7PR12MB6238:EE_ X-MS-Office365-Filtering-Correlation-Id: 3042a70b-ba4e-4bb7-e46e-08deaa9381ee X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|1800799024|82310400026|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RhTEiKnVDsApT20JFC+2ZEXbxn84lWwNRZzJcHXq6rsdfqU/hn8aMP/GRyi3xxHZvLkrsMY+x+Ff88hTQM980cVlpBOxYhs+Xz1is3M+qgXrYc3ZvdAK+iT2GCakd7DN8GOou/gp7FLgbuCyTIYW7RtGvDEK+aQhWuECWV2qxWzobxKh7JzOaYVbHr3yft36yKDRsE/mIWu3eUExw1vLoF8lM8geDAHt0Of8OAplA26/WkDiXudHevum3X0qpIwQl0mOrv8PLFgaQEr/My1imDXw4lhn30ieatpsLcxz2hSZF/tX6EXz+Y0JVizDPF7nIceWmnFPQxNFK6rePU5bH7v8dSo8RUzVRWcF7vnBFbpRaa59ijLi9Qd/6a2/oXh0jvp52q5kH1evfRHTWT5l2/Y6dsbgE5rLghUwAKGyukux2GBpXJMhCyuZm/X5C4mC X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 10:46:04.9379 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3042a70b-ba4e-4bb7-e46e-08deaa9381ee X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529E.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6238 X-purgate-ID: tlsNG-ebf023/1777977971-4BD6C3FF-DD965C9B/0/0 X-purgate-type: clean X-purgate-size: 3221 On 05-May-26 12:40, Jan Beulich wrote: > On 05.05.2026 09:35, Orzel, Michal wrote: >> On 05-May-26 09:13, Roger Pau Monné wrote: >>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>> defines it). >>>>>> >>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>> correct for all architectures, even though they are only used on x86 >>>>>> today. >>>>> >>>>> Hm, I assume this offset was added because the original mask PDX >>>>> compression won't (usually) compress the gap between 0 and the start >>>>> of RAM. However the newish offset PDX compression should be able to >>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>> an extra PDX offset there? >>>>> >>>>> If that's indeed the case it might be better to integrate >>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>> that on some arches it's a mask plus a decrease. >>>> The offset is needed regardless of whether compression is used. With >>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>> 0x80000000, the first valid PDX is 0x80000. >>> >>> OK, so you are doing some (kind of) address space compression (removing >>> the leading empty range to the first RAM region) even when PDX is >>> disabled. >>> >>>> Without frametable_base_pdx >>>> the frame table would have to be indexed from 0, wasting >>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>> >>> But you don't really "waste" memory, just address space? Oh, maybe >>> not on ARM as it doesn't use pdx_group_valid? And so you >>> unconditionally populate the frametable from PDX 0 to max PDX. >> With pdx_group_valid (which this series adds) we wouldn't waste >> physical memory for the leading gap. But we'd still waste virtual address >> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >> the virtual offset before the first usable entry would be ~70GB — more than the >> entire 32GB FRAMETABLE_SIZE on ARM64. > > Yet still - this is exactly one of the situations offset compression means > to cover. I'm entirely with Roger as to it being undesirable to build a > special case variant of "offset compression" into "no compression". In this case, if you don't want to generalize the macros, how should we proceed on Arm if we still need the offset to cover the PDX_NONE variant that we also use? In v1 I just created a local override but Julien wanted to generalize the macros instead. The discussion about switching the default on Arm from mask to offset that is not even selectable on Arm needs to wait for the new release cycle. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 10:49:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 10:49:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300552.1575081 (Exim 4.92) (envelope-from ) id 1wKDKx-0006lq-1Z; Tue, 05 May 2026 10:49:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300552.1575081; Tue, 05 May 2026 10:49:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDKw-0006lj-UK; Tue, 05 May 2026 10:49:10 +0000 Received: by outflank-mailman (input) for mailman id 1300552; Tue, 05 May 2026 10:49:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKDKv-0006ld-JX for xen-devel@lists.xenproject.org; Tue, 05 May 2026 10:49:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKDKu-00DbwM-VS for xen-devel@lists.xenproject.org; Tue, 05 May 2026 12:49:08 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9cb23-5cb7-0a2a0a5109dd-0a2a450ad7fc-8 for ; Tue, 05 May 2026 12:49:08 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9cb24-56b3-0a2a450a0019-d155802cb89c-3 for ; Tue, 05 May 2026 12:49:08 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so57496285e9.2 for ; Tue, 05 May 2026 03:49:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 05 May 2026 03:49:08 -0700 (PDT) Message-ID: <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Date: Tue, 5 May 2026 12:49:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1777978148-4616A8B7-D89741BE/0/0 X-purgate-type: clean X-purgate-size: 3492 On 05.05.2026 12:46, Orzel, Michal wrote: > On 05-May-26 12:40, Jan Beulich wrote: >> On 05.05.2026 09:35, Orzel, Michal wrote: >>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>> defines it). >>>>>>> >>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>> today. >>>>>> >>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>> an extra PDX offset there? >>>>>> >>>>>> If that's indeed the case it might be better to integrate >>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>> that on some arches it's a mask plus a decrease. >>>>> The offset is needed regardless of whether compression is used. With >>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>> 0x80000000, the first valid PDX is 0x80000. >>>> >>>> OK, so you are doing some (kind of) address space compression (removing >>>> the leading empty range to the first RAM region) even when PDX is >>>> disabled. >>>> >>>>> Without frametable_base_pdx >>>>> the frame table would have to be indexed from 0, wasting >>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>> >>>> But you don't really "waste" memory, just address space? Oh, maybe >>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>> unconditionally populate the frametable from PDX 0 to max PDX. >>> With pdx_group_valid (which this series adds) we wouldn't waste >>> physical memory for the leading gap. But we'd still waste virtual address >>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>> the virtual offset before the first usable entry would be ~70GB — more than the >>> entire 32GB FRAMETABLE_SIZE on ARM64. >> >> Yet still - this is exactly one of the situations offset compression means >> to cover. I'm entirely with Roger as to it being undesirable to build a >> special case variant of "offset compression" into "no compression". > In this case, if you don't want to generalize the macros, how should we proceed > on Arm if we still need the offset to cover the PDX_NONE variant that we also > use? In v1 I just created a local override but Julien wanted to generalize the > macros instead. The discussion about switching the default on Arm from mask to > offset that is not even selectable on Arm needs to wait for the new release cycle. I'm not convinced of that. If you need offset by default, why not enable it by default (right now, and potentially even as a backport if there's any bug that is being fixed)? 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This doesn't introduce any changes to the compiled result of the array. Signed-off-by: Uwe Kleine-König (The Capable Hub) --- Hello, this is a preparing change for making struct pci_device_id::driver_data an anonymous union (similar to https://lore.kernel.org/all/cover.1776579304.git.u.kleine-koenig@baylibre.com/). This requires named initializers for .driver_data. Dropping the unused assignment is still better. Best regards Uwe drivers/xen/platform-pci.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/drivers/xen/platform-pci.c b/drivers/xen/platform-pci.c index 1db82da56db6..f2438232518c 100644 --- a/drivers/xen/platform-pci.c +++ b/drivers/xen/platform-pci.c @@ -174,11 +174,9 @@ static int platform_pci_probe(struct pci_dev *pdev, } static const struct pci_device_id platform_pci_tbl[] = { - {PCI_VENDOR_ID_XEN, PCI_DEVICE_ID_XEN_PLATFORM, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {PCI_VENDOR_ID_XEN, PCI_DEVICE_ID_XEN_PLATFORM_XS61, - PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, - {0,} + { PCI_VDEVICE(XEN, PCI_DEVICE_ID_XEN_PLATFORM) }, + { PCI_VDEVICE(XEN, PCI_DEVICE_ID_XEN_PLATFORM_XS61) }, + { } }; static const struct dev_pm_ops platform_pm_ops = { base-commit: 254f49634ee16a731174d2ae34bc50bd5f45e731 -- 2.47.3 From xen-devel-bounces@lists.xenproject.org Tue May 05 11:45:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 11:45:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300583.1575120 (Exim 4.92) (envelope-from ) id 1wKEDM-0007aZ-Lm; Tue, 05 May 2026 11:45:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300583.1575120; Tue, 05 May 2026 11:45:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEDM-0007aS-HX; Tue, 05 May 2026 11:45:24 +0000 Received: by outflank-mailman (input) for mailman id 1300583; Tue, 05 May 2026 11:45:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEDK-0007Zt-M5 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 11:45:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKEDK-00GG6A-2s for xen-devel@lists.xenproject.org; Tue, 05 May 2026 13:45:22 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9d851-5cb7-0a2a0a5109dd-0a2a4508e4ca-2 for ; Tue, 05 May 2026 13:45:21 +0200 Received: from [209.85.208.44] (helo=mail-ed1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9d851-63b5-0a2a45080019-d155d02cc468-3 for ; Tue, 05 May 2026 13:45:21 +0200 Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-67bc8609a9bso2330088a12.0 for ; Tue, 05 May 2026 04:45:21 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------aQ9DkZhYp2ID3woTprv8iofE" X-purgate-ID: tlsNG-c1860d/1777981521-38D63DB1-33AD83C8/0/0 X-purgate-type: clean X-purgate-size: 13676 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------aQ9DkZhYp2ID3woTprv8iofE Content-Type: multipart/mixed; boundary="------------l00BF6gHWOEUiAPRiNCkiIfR"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Jan Beulich Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, x86@kernel.org Message-ID: <598d6dfd-da1b-4b10-9c42-2bb1242b700d@suse.com> Subject: Re: [PATCH] x86/xen: Fix a potential problem in xen_e820_resolve_conflicts() References: <20260505080653.197775-1-jgross@suse.com> <6b241236-ed6d-4ada-beac-8f660bd55185@suse.com> <59b953ce-4b51-4a47-8dba-9895dea33d41@suse.com> <29422b34-b33f-4a25-838f-de6078151e46@suse.com> In-Reply-To: <29422b34-b33f-4a25-838f-de6078151e46@suse.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP 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<63b219c3cae5201c5db804f69c3b88ac41c9bdf6.1775125380.git.mykola_kvach@epam.com> <55B2462D-41E5-42CB-9525-39CF4843E95E@arm.com> In-Reply-To: <55B2462D-41E5-42CB-9525-39CF4843E95E@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 14:45:03 +0300 X-Gm-Features: AVHnY4Iiroi7TYFgBdAn9YTSTkXYar6w48U2NFr6DOYwy4ITjdNgysHBdDQJoHw Message-ID: Subject: Re: [PATCH v8 08/13] iommu/ipmmu-vmsa: Implement suspend/resume callbacks To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1777981515-28776938-3E2D35FC/0/0 X-purgate-type: clean X-purgate-size: 2991 Hi Luca, Thank you for the review. On Fri, Apr 24, 2026 at 4:36=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Oleksandr Tyshchenko > > > > Store and restore active context and micro-TLB registers. > > > > Tested on R-Car H3 Starter Kit. > > > > Signed-off-by: Oleksandr Tyshchenko > > Signed-off-by: Mykola Kvach > > --- > > Changes in V7: > > - moved suspend context allocation before pci stuff > > --- > > xen/drivers/passthrough/arm/ipmmu-vmsa.c | 305 ++++++++++++++++++++++- > > 1 file changed, 298 insertions(+), 7 deletions(-) > > > > diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/pas= sthrough/arm/ipmmu-vmsa.c > > index ea9fa9ddf3..6765bd3083 100644 > > --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > @@ -71,6 +71,8 @@ > > }) > > #endif > > > > +#define dev_dbg(dev, fmt, ...) \ > > + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) > > #define dev_info(dev, fmt, ...) \ > > dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) > > #define dev_warn(dev, fmt, ...) \ > > @@ -130,6 +132,24 @@ struct ipmmu_features { > > unsigned int imuctr_ttsel_mask; > > }; > > > > > > [=E2=80=A6] > > > > > > @@ -1340,10 +1608,11 @@ static int ipmmu_add_device(u8 devfn, struct de= vice *dev) > > struct iommu_fwspec *fwspec; > > > > #ifdef CONFIG_HAS_PCI > > + int ret; > > + > > if ( dev_is_pci(dev) ) > > { > > struct pci_dev *pdev =3D dev_to_pci(dev); > > - int ret; > > > > if ( devfn !=3D pdev->devfn ) > > return 0; > > @@ -1371,6 +1640,15 @@ static int ipmmu_add_device(u8 devfn, struct dev= ice *dev) > > /* Let Xen know that the master device is protected by an IOMMU= . */ > > dt_device_set_protected(dev_to_dt(dev)); > > } > > + > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + if ( ipmmu_alloc_ctx_suspend(dev) ) > > + { > > + dev_err(dev, "Failed to allocate context for suspend\n"); > > + return -ENOMEM; > > + } > > +#endif > > If this fails the device will remain protected, I suggest we move this on= e before `if ( !dev_is_pci(dev) ) { =E2=80=A6 }` > block Good point, thanks. Yes, this should be fixed. In the original ordering, a failure in ipmmu_alloc_ctx_suspend() could leave a non-PCI DT device marked as protected even though ipmmu_add_device() returned an error. I'll reorder the code so dt_device_set_protected() is done only after ipmmu_alloc_ctx_suspend() succeeds. This keeps the successful path unchanged and avoids leaving stale protected state on failure. Best regards, Mykola > > The rest looks ok to me, but I=E2=80=99m not an expert of this part. > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Tue May 05 11:47:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 11:47:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300598.1575128 (Exim 4.92) (envelope-from ) id 1wKEEy-0008Jh-VA; Tue, 05 May 2026 11:47:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300598.1575128; Tue, 05 May 2026 11:47:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEEy-0008Ja-SL; Tue, 05 May 2026 11:47:04 +0000 Received: by outflank-mailman (input) for mailman id 1300598; Tue, 05 May 2026 11:47:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEEw-0008JS-QK for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Tue, 5 May 2026 13:46:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB58:EE_|IA0PR12MB8351:EE_ X-MS-Office365-Filtering-Correlation-Id: 0759fbfa-dd39-44f9-da28-08deaa9c011f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|82310400026|376014|36860700016|1800799024|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NEADBj4SswHw2YTu9cF1Rr6N9dOQttO7UALkr0vvLNuPv5R0MCrtOk8nmoXgY166U6CTSdo4bnyyDD7pFi8oAedrYyTNAn13ejyuN80nqx2t7ZmMxgdbIBkgxHTPzzOMu6qBzN8/+e9v7B1HFishBgEDYUYghIlkKzzHCXZaCx1jVVAgV4EsFic3PJeR9A088IbSGgbXcm0qw6rLj+H4E+pZeX7ghJttGbFpvbicWCW/Mbc4sPZ4lOPUt+afwNc2ac5BimYf5dvj/ZbPegIOITMHdqNZQqtkp0G9HsPASLowXA9zDWS6sU34YQgtgX120FY2cIhqBKqkEBtoaHhKFO10vLFivTckeGUJg6W0ntsFRgnjl9BUXL77HaDqU5DSi2bUeMHbI2LxnHPD9+GR34W6cZD96MqG1GDt7k4wWawJdhoEH/QtyN2zEh/+l8iL X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 11:46:54.3320 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0759fbfa-dd39-44f9-da28-08deaa9c011f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB58.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8351 X-purgate-ID: tlsNG-d25034/1777981621-F5A00CF5-AAFF3C35/0/0 X-purgate-type: clean X-purgate-size: 3693 On 05-May-26 12:49, Jan Beulich wrote: > On 05.05.2026 12:46, Orzel, Michal wrote: >> On 05-May-26 12:40, Jan Beulich wrote: >>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>> defines it). >>>>>>>> >>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>> today. >>>>>>> >>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>> an extra PDX offset there? >>>>>>> >>>>>>> If that's indeed the case it might be better to integrate >>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>> that on some arches it's a mask plus a decrease. >>>>>> The offset is needed regardless of whether compression is used. With >>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>> >>>>> OK, so you are doing some (kind of) address space compression (removing >>>>> the leading empty range to the first RAM region) even when PDX is >>>>> disabled. >>>>> >>>>>> Without frametable_base_pdx >>>>>> the frame table would have to be indexed from 0, wasting >>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>> >>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>> physical memory for the leading gap. But we'd still waste virtual address >>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>> >>> Yet still - this is exactly one of the situations offset compression means >>> to cover. I'm entirely with Roger as to it being undesirable to build a >>> special case variant of "offset compression" into "no compression". >> In this case, if you don't want to generalize the macros, how should we proceed >> on Arm if we still need the offset to cover the PDX_NONE variant that we also >> use? In v1 I just created a local override but Julien wanted to generalize the >> macros instead. The discussion about switching the default on Arm from mask to >> offset that is not even selectable on Arm needs to wait for the new release cycle. > > I'm not convinced of that. If you need offset by default, why not enable it by > default (right now, and potentially even as a backport if there's any bug that > is being fixed)? As said before, we also need offset when using just PDX grouping and no compression. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 12:05:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 12:05:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300616.1575150 (Exim 4.92) (envelope-from ) id 1wKEWz-0003Bq-O7; Tue, 05 May 2026 12:05:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300616.1575150; Tue, 05 May 2026 12:05:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEWz-0003Bj-Jc; Tue, 05 May 2026 12:05:41 +0000 Received: by outflank-mailman (input) for mailman id 1300616; Tue, 05 May 2026 12:05:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKEWy-0003Bd-QU for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <177a399e-b5f3-4f5e-9011-c77978bc6acc@amd.com> Date: Tue, 5 May 2026 14:05:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260420142224.1802911-1-luca.fancellu@arm.com> <20260420142224.1802911-4-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260420142224.1802911-4-luca.fancellu@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B0:EE_|MN0PR12MB6031:EE_ X-MS-Office365-Filtering-Correlation-Id: 8db6145c-ae75-4e2e-8c91-08deaa9e9b41 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LUeI3dNZApWS6lTqw1D1VT5Wd00E428VKhvgcQMaC440uu1ClqhfiusAsu4J3Ks39qkHzwXiHIfiI8CXRAcTZA/LABVRa1SU5sB3L3u5Y/5ZdugsdM4gZZSCY//J57T+F9fQ6gWKo/Yy8ze9nDkmRhdKBR2vRvdr40e7USB+QW2e6MZDVZKmarqFnoisRuFIZqHzeMJrubnxzrr0xL+wkEDDsLHzZEDY+Q7TyOeHPjCKLk+rux9poaM757D14xUsNXhbClP5HtCQ43U+6Oe+UA3pBJ+UfMamKCll6Dv9qy/PbdNcsaEZxXF42ICAJurq+yOQ+SjVtttSAI61px3rs6TOg0jOLOapAqyC+90eskCBDB/4lKnJS1ccrOZr3R8A4VTSa54R1pEkgVbKNyyBHk06cZ27x60cc/j9tU/LnP+vS1G22Kj+BFqu05bNzQSv X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 12:05:31.8854 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8db6145c-ae75-4e2e-8c91-08deaa9e9b41 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6031 X-purgate-ID: tlsNG-d25034/1777982739-F600DCF5-1DA359C9/0/0 X-purgate-type: clean X-purgate-size: 6652 On 20-Apr-26 16:22, Luca Fancellu wrote: > From: Harry Ramsey > > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v4: > - no changes > v3: > - Check for alloc_xenheap_pages allocation > - Clear additional page allocated for ARM64 > - Add check for INVALID_VCPU_ID > - Remove unnecessary function generate_vsctlr > - Code formatting fixes > --- > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu/p2m.h | 12 +++++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/mpu/p2m.c | 78 ++++++++++++++++++++++++++-- > 5 files changed, 96 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 2cf0f8cbacae..d565230f84ee 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -11,6 +11,8 @@ > */ > #define MPU_REGION_RES0 0x0 > > +#define VSCTLR_VMID_SHIFT 16 > + > /* Hypervisor Protection Region Base Address Register */ > typedef union { > struct { > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index 4f694190a8a3..8b86a03fee44 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -7,6 +7,8 @@ > > #define MPU_REGION_RES0 (0xFFFFULL << 48) > > +#define VSCTLR_VMID_SHIFT 48 > + > /* Protection Region Base Address Register */ > typedef union { > struct __packed { > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a1d..39fc0c944916 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -3,8 +3,20 @@ > #ifndef __ARM_MPU_P2M_H__ > #define __ARM_MPU_P2M_H__ > > +#include > +#include > +#include > + > struct p2m_domain; > > +/* > + * The architecture allows at most 255 EL2 MPU memory regions. The size of the > + * MPU structure entry (pr_t) is 32 Bytes on AArch64 (requiring two 4KB pages) > + * and 16 bytes on AArch32 (requiring one 4KB page). This comment may go stale if we add something to pr_t. I don't think it's super useful. > + */ > +#define P2M_ROOT_PAGES DIV_ROUND_UP(255 * sizeof(pr_t), PAGE_SIZE) Please don't opencode max number of regions. Instead use MAX_MPU_REGION_NR > +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) > + > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9ebbd..ed1b6dd40f40 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c > index f7fb58ab6aa8..ec8f630acd90 100644 > --- a/xen/arch/arm/mpu/p2m.c > +++ b/xen/arch/arm/mpu/p2m.c > @@ -28,10 +28,69 @@ void p2m_dump_info(struct domain *d) > BUG_ON("unimplemented"); > } > > +static int p2m_alloc_table(struct domain *d) > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + void *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); > + > + if ( !table ) > + { > + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", > + d); > + return -ENOMEM; > + } > + > + p2m->root = virt_to_page(table); > + > + for (int i = 0; i < P2M_ROOT_PAGES; i++) unsigned int and we usually declare it at the top Also, missing spaces around brackets > + clear_page(page_to_virt(p2m->root + i)); Instead of the conversion, you should use table here which is already a VA. > + > + return 0; > +} > + > int p2m_init(struct domain *d) > { > - BUG_ON("unimplemented"); > - return -EINVAL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + int rc = 0; > + unsigned int cpu; > + > + rwlock_init(&p2m->lock); > + > + p2m->vmid = INVALID_VMID; > + p2m->max_mapped_gfn = _gfn(0); > + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); > + > + p2m->default_access = p2m_access_rwx; > + /* mem_access is NOT supported in MPU system. */ > + p2m->mem_access_enabled = false; > + > + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ > + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); > + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); > + > + for_each_possible_cpu(cpu) > + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; > + > + /* > + * "Trivial" initialization is now complete. Set the backpointer so that > + * p2m_teardown() and related functions know to do something. > + */ > + p2m->domain = d; > + > + rc = p2m_alloc_vmid(d); > + if ( rc ) > + return rc; > + > + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); > + > + rc = p2m_alloc_table(d); > + if ( rc ) > + { > + p2m_free_vmid(d); You should not free it because you risk double free given that it is also freed in p2m_final_teardown. That's why on MMU we don't do it. > + return rc; > + } > + > + return 0; > } > > void p2m_save_state(struct vcpu *p) > @@ -46,7 +105,20 @@ void p2m_restore_state(struct vcpu *n) > > void p2m_final_teardown(struct domain *d) > { > - BUG_ON("unimplemented"); > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + > + /* p2m not actually initialized */ > + if ( !p2m->domain ) > + return; > + > + if ( p2m->root ) > + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); > + > + p2m->root = NULL; > + > + p2m_free_vmid(d); > + > + p2m->domain = NULL; > } > > bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 12:16:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 12:16:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300625.1575158 (Exim 4.92) (envelope-from ) id 1wKEh1-0004zy-KX; Tue, 05 May 2026 12:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300625.1575158; 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ARM > >>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>>>>>> defines it). > >>>>>>>> > >>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>>>>>> to 0 when the arch does not define it. This makes the generic macros > >>>>>>>> correct for all architectures, even though they are only used on x86 > >>>>>>>> today. > >>>>>>> > >>>>>>> Hm, I assume this offset was added because the original mask PDX > >>>>>>> compression won't (usually) compress the gap between 0 and the start > >>>>>>> of RAM. However the newish offset PDX compression should be able to > >>>>>>> compress from 0 to start of RAM, and hence you don't need to apply > >>>>>>> an extra PDX offset there? > >>>>>>> > >>>>>>> If that's indeed the case it might be better to integrate > >>>>>>> frametable_base_pdx into the mask compression algorithm itself, so > >>>>>>> that on some arches it's a mask plus a decrease. > >>>>>> The offset is needed regardless of whether compression is used. With > >>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >>>>>> 0x80000000, the first valid PDX is 0x80000. > >>>>> > >>>>> OK, so you are doing some (kind of) address space compression (removing > >>>>> the leading empty range to the first RAM region) even when PDX is > >>>>> disabled. > >>>>> > >>>>>> Without frametable_base_pdx > >>>>>> the frame table would have to be indexed from 0, wasting > >>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > >>>>> > >>>>> But you don't really "waste" memory, just address space? Oh, maybe > >>>>> not on ARM as it doesn't use pdx_group_valid? And so you > >>>>> unconditionally populate the frametable from PDX 0 to max PDX. > >>>> With pdx_group_valid (which this series adds) we wouldn't waste > >>>> physical memory for the leading gap. But we'd still waste virtual address > >>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > >>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB > >>>> the virtual offset before the first usable entry would be ~70GB — more than the > >>>> entire 32GB FRAMETABLE_SIZE on ARM64. > >>> > >>> Yet still - this is exactly one of the situations offset compression means > >>> to cover. I'm entirely with Roger as to it being undesirable to build a > >>> special case variant of "offset compression" into "no compression". > >> In this case, if you don't want to generalize the macros, how should we proceed > >> on Arm if we still need the offset to cover the PDX_NONE variant that we also > >> use? In v1 I just created a local override but Julien wanted to generalize the > >> macros instead. The discussion about switching the default on Arm from mask to > >> offset that is not even selectable on Arm needs to wait for the new release cycle. > > > > I'm not convinced of that. If you need offset by default, why not enable it by > > default (right now, and potentially even as a backport if there's any bug that > > is being fixed)? > As said before, we also need offset when using just PDX grouping and no compression. But you don't really mean no compression? The offset itself that you subtract is a transformation, and hence a compression, as the physical and PDX address spaces are no longer identity mapped? Maybe those systems should have never worked with PDX_NONE, and instead required a PDX compression in place (one that would remove the offset from 0 to the first RAM range). It's an incomplete conversion IMO, as ARM applies it to the frametable, but not the direct map. Thanks, Roger. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------cU4QwkJWUVquCuDHH88AiecH" X-purgate-ID: tlsNG-42698a/1777983828-7D969F3B-D2434FEF/0/0 X-purgate-type: clean X-purgate-size: 6732 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------cU4QwkJWUVquCuDHH88AiecH Content-Type: multipart/mixed; boundary="------------e3rh6cYQup5xsVq0HPerxhtd"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig_=28The_Capable_Hub=29?= , Stefano Stabellini Cc: Oleksandr Tyshchenko , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org, Markus Schneider-Pargmann Message-ID: <23f5e833-b5af-40f2-8c1c-8ba56c715825@suse.com> Subject: Re: [PATCH] xen/platform-pci: Simplify initialization of pci_device_id array References: <20260505102909.2380470-2-u.kleine-koenig@baylibre.com> In-Reply-To: <20260505102909.2380470-2-u.kleine-koenig@baylibre.com> --------------e3rh6cYQup5xsVq0HPerxhtd Content-Type: multipart/mixed; boundary="------------s1q5pXTF5M78e6LkpixJ1h0a" --------------s1q5pXTF5M78e6LkpixJ1h0a Content-Type: text/plain; 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Tue, 05 May 2026 06:00:45 -0700 (PDT) Message-ID: <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> Date: Tue, 5 May 2026 15:00:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1777986045-BDE6BFF4-21D89D02/0/0 X-purgate-type: clean X-purgate-size: 4263 On 05.05.2026 13:46, Orzel, Michal wrote: > On 05-May-26 12:49, Jan Beulich wrote: >> On 05.05.2026 12:46, Orzel, Michal wrote: >>> On 05-May-26 12:40, Jan Beulich wrote: >>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>> defines it). >>>>>>>>> >>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>> today. >>>>>>>> >>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>> an extra PDX offset there? >>>>>>>> >>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>> >>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>> disabled. >>>>>> >>>>>>> Without frametable_base_pdx >>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>> >>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>> >>>> Yet still - this is exactly one of the situations offset compression means >>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>> special case variant of "offset compression" into "no compression". >>> In this case, if you don't want to generalize the macros, how should we proceed >>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>> use? In v1 I just created a local override but Julien wanted to generalize the >>> macros instead. The discussion about switching the default on Arm from mask to >>> offset that is not even selectable on Arm needs to wait for the new release cycle. >> >> I'm not convinced of that. If you need offset by default, why not enable it by >> default (right now, and potentially even as a backport if there's any bug that >> is being fixed)? > As said before, we also need offset when using just PDX grouping and no compression. And as also said before, this really is poor man's offset compression then. That may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit that offset to just the "no compression" case. It's redundant with offset compression, and it may be (possible to make) redundant with mask compression. If the latter can't be arranged for, an offset may want introducing there as well. But it shouldn't exist independent of the compression scheme used. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 13:05:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 13:05:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300666.1575185 (Exim 4.92) (envelope-from ) id 1wKFT9-0004p7-Og; Tue, 05 May 2026 13:05:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300666.1575185; Tue, 05 May 2026 13:05:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKFT9-0004p0-Lp; Tue, 05 May 2026 13:05:47 +0000 Received: by outflank-mailman (input) for mailman id 1300666; Tue, 05 May 2026 13:05:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKFT8-0004ou-Rb for xen-devel@lists.xenproject.org; Tue, 05 May 2026 13:05:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKFT7-0067Fn-QL for xen-devel@lists.xenproject.org; Tue, 05 May 2026 15:05:45 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69f9eb27-e002-0a2a0a5209dd-0a2a4503e2ba-6 for ; Tue, 05 May 2026 15:05:45 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69f9eb29-672d-0a2a45030019-d1558036e476-3 for ; Tue, 05 May 2026 15:05:45 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488ad135063so49646005e9.0 for ; Tue, 05 May 2026 06:05:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260430125103.401811-2-michal.orzel@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1777986345-A3161938-C8F2CBB9/0/0 X-purgate-type: clean X-purgate-size: 974 On 30.04.2026 14:51, Michal Orzel wrote: > --- a/xen/include/xen/pdx.h > +++ b/xen/include/xen/pdx.h > @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); > */ > bool __mfn_valid(unsigned long mfn); > > -#define page_to_pdx(pg) ((pg) - frame_table) > -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) > +#define page_to_pdx(pg) \ > + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) > +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) If you alter these, ... > #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) > #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) ... how come these can remain unaltered? Maybe you have some special arrangements in Arm code, but surely in generic code transformations done should be uniform. After all ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); (and alike) ought to be universally true for valid inputs. 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Tue, 05 May 2026 06:07:40 -0700 (PDT) Date: Tue, 5 May 2026 15:07:36 +0200 From: Alexey G To: Roger Pau =?UTF-8?B?TW9ubsOp?= Cc: Thierry Escande , xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Juergen Gross Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests Message-ID: <20260505150736.5419a55f@LinuxLaptop> In-Reply-To: References: <20260313163455.790692-1-thierry.escande@vates.tech> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1777986461-4415A8B7-F19A85BB/0/0 X-purgate-type: clean X-purgate-size: 3799 On Tue, 28 Apr 2026 09:48:41 +0200 Roger Pau Monn=C3=A9 wrote: >On Fri, Mar 13, 2026 at 04:35:01PM +0000, Thierry Escande wrote: >> This series introduces initial Q35 chipset support for HVM guests, >> based on the patchset at [1] by Alexey Gerasimenko. >>=20 >> Basic support means that this patchset allows to start an HVM guest >> that emulates a Q35 chipset via Qemu and implements access to PCIe >> extended configuration space for such devices emulated by Qemu. >>=20 >> Support for PCIe device passthrough is not implemented yet. This is >> planned but implies modifications in the hypervisor and the >> firmwares, mainly for the support of multiple PCI buses. > >Why do you need multi bus support to expose PCIe capabilities? I'm >not seeing the relation between those two. You could still expose a >single bus on the MCFG table. The problem with the PCIe bus is that it's very "topological" by design - and it always wants a valid hierarchy. Each PCIe device manifests itself (via its PCIe Capabilities entry) as either a chipset-integrated device or a regular PCIe endpoint device, which is the most common case. There are more types IIRC but these are what we deal with mostly - both for PT devices and QEMU-emulated ones. But, being a PCIe endpoint means that the device must have some parent device. It can be located below a PCIe switch or, in the simplest and the most common case, below a PCIe Root Port device. In both cases the 'parent' is a PCI-PCI bridge technically, with the PCIe endpoint device being located on its secondary bus. As the Q35 patch series was done with mostly PCIe device passthrough in mind, this brings the main complication - in order to properly place a passed through device on the PCIe bus, we need an emulated/real/hybrid Root Port device. A much lengthier description is in this patch message: https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01197.html To summarize, we need this 'valid PCIe topology' nonsense just to make Windows kernel (pci.sys driver specifically) not to discard our PT device due to checking PCIe bus hierarchy above it. This limitation was found/confirmed via debugging - luckily, pci.sys had symbols and the main bad function which was failing had a very speaking name - something like pcieCheckTopology or similar. Emulating the "chipset-integrated device" in PT device's PCIe Capabilities was a simple hack which allowed to bypass the requirement to have a valid PCIe hierarchy with multiple buses. But the proper future direction is implementing emulation of Root Ports or PCIe switches I guess. >> The PCIe MMCONFIG area is configured by hvmloader and its base >> address and size are set in Xen using a new pair of hypercalls >> HVMOP_get|set_ecam_space. > >I guess I will see how that looks like in the series, but the setting >of the ECAM region would better be done by the toolstack. Setting it >in hvmloader is possibly not the best placement, because it doesn't >run for PVH guests (and we will want ECAM support for PVH at some >point), and there's also a vague plan/intention to get rid of >hvmloader even for HVM guests eventually. This is the situation where the difference between HVM and PVH might be very problematic I'm afraid. HVM guests assume full freedom over the IO/MMIO resources setup inside their sandboxed environment. It's not just Windows reallocating PCI BARs to its liking, but also spans to the emulated chipset's resources. In worst case we could have MMCONFIG reinitialization implemented even in Intel's Q35 drivers installed inside an HVM guest. Fortunately, this is not what I remember was the case, but in theory Q35 driver could have done things like this. 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Tue, 05 May 2026 06:29:17 -0700 (PDT) Date: Tue, 5 May 2026 15:29:12 +0200 From: Alexey G To: Jan Beulich , Juergen Gross Cc: Roger Pau =?UTF-8?B?TW9ubsOp?= , xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Thierry Escande Subject: Re: [PATCH 00/17] Q35 initial support for HVM guests Message-ID: <20260505152912.6b73c551@LinuxLaptop> In-Reply-To: <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> References: <20260313163455.790692-1-thierry.escande@vates.tech> <99756799-27be-45ae-99be-eae5b0c41a11@suse.com> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1777987758-C3171DB1-9830AEBB/0/0 X-purgate-type: clean X-purgate-size: 891 On Mon, 4 May 2026 12:45:23 +0200 Jan Beulich wrote: >> Why do you need multi bus support to expose PCIe capabilities? I'm >> not seeing the relation between those two. You could still expose a >> single bus on the MCFG table. > >Can a valid PCIe topology be expressed with just bus 0? If an endpoint >to be handed to a guest isn't root complex integrated, would it be >valid to make it appear so by putting it on bus 0? No, unfortunately, it will fail at least under Windows' pci.sys driver. Unless they changed something in the past years. To place an endpoint device to bus 0, we need to emulate that it's a chipset-integrated device by trapping its PCIe Capabilities reads. I found an old pci.sys + .pdb symbols which I used for debugging back in 2017 and, if I remember correctly, the failing function was `ExpressValidateFabricTopology()`. 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Tue, 05 May 2026 06:58:21 -0700 (PDT) Date: Tue, 5 May 2026 15:58:16 +0200 From: Alexey G To: Roger Pau =?UTF-8?B?TW9ubsOp?= Cc: Thierry Escande , xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Anthony PERARD Subject: Re: [PATCH 04/17] hvmloader: add ACPI enabling for Q35 Message-ID: <20260505155816.0f8ad76d@LinuxLaptop> In-Reply-To: References: <20260313163455.790692-1-thierry.escande@vates.tech> <20260313163455.790692-5-thierry.escande@vates.tech> Organization: none X-Mailer: Claws Mail 4.3.1 (GTK 3.24.38; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1777989501-B526DFF4-2B8134B1/0/0 X-purgate-type: clean X-purgate-size: 2336 On Tue, 28 Apr 2026 12:48:23 +0200 Roger Pau Monn=C3=A9 wrote: >On Fri, Mar 13, 2026 at 04:35:05PM +0000, Thierry Escande wrote: >> In order to turn on ACPI for OS, we need to write a chipset-specific >> value to SMI_CMD register (sort of imitation of the APM->ACPI switch >> on real systems). Modify acpi_enable_sci() function to support both >> i440 and Q35 emulation. >>=20 >> Signed-off-by: Alexey Gerasimenko >> Signed-off-by: Thierry Escande > >Reviewed-by: Roger Pau Monn=C3=A9 > >It's not great to add more stuff into hvmloader when we want to move >out of it, but it's also not helpful to tie the Q35 addition to the >removal of hvmloader. I'm afraid the only option to get rid of hvmloader is to move its responsibilities back into the firmware (SeaBIOS/OVMF). But if I understand it right, the whole idea of introducing hvmloader originally was to delegate Xen-specific parts of HVM guest initialization from firmware to a component managed by Xen itself. So, to some extent hvmloader can be considered as a part of the firmware itself as it does things like PCI BAR allocation etc which are normally done by the guest firmware, but with more knowledge of Xen specifics. I guess this hvmloader/firmware split model was introduced to have more freedom/maintainability/control - I suppose it's much faster and easier to integrate Xen-specific changes to hvmloader directly then to upstream them to SeaBIOS/OVMF codebases. But other than moving hvmloader's responsibilities to the firmware we can't do much I think - HVM guests expect to have full freedom over the emulated platform. Among problems are non-standard (chipset-specific) devices which also need to have assigned resources like MMIO ranges - and Xen doesn't know anything about these devices and their resource requirements (left alone how to configure them), yet they still need to have correct BARs assigned with no conflicts with other PCI devices and to contribute to MMIO hole sizing. This is something which cannot be solved on the toolstack level unless Xen emulates the whole chipset and knows about all emulated chipset devices - we limit ourselves to MMCONFIG now but there are more configurable ranges like this. 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This is > >> planned but implies modifications in the hypervisor and the > >> firmwares, mainly for the support of multiple PCI buses. > > > >Why do you need multi bus support to expose PCIe capabilities? I'm > >not seeing the relation between those two. You could still expose a > >single bus on the MCFG table. > > The problem with the PCIe bus is that it's very "topological" by design > - and it always wants a valid hierarchy. > > Each PCIe device manifests itself (via its PCIe Capabilities entry) > as either a chipset-integrated device or a regular PCIe endpoint > device, which is the most common case. There are more types IIRC but > these are what we deal with mostly - both for PT devices and > QEMU-emulated ones. > > But, being a PCIe endpoint means that the device must have some parent > device. It can be located below a PCIe switch or, in the simplest and > the most common case, below a PCIe Root Port device. > > In both cases the 'parent' is a PCI-PCI bridge technically, with the > PCIe endpoint device being located on its secondary bus. > > As the Q35 patch series was done with mostly PCIe device passthrough in > mind, this brings the main complication - in order to properly place a > passed through device on the PCIe bus, we need an emulated/real/hybrid > Root Port device. > > A much lengthier description is in this patch message: > https://lists.xenproject.org/archives/html/xen-devel/2018-03/msg01197.html > > To summarize, we need this 'valid PCIe topology' nonsense just to make > Windows kernel (pci.sys driver specifically) not to discard our PT > device due to checking PCIe bus hierarchy above it. > > This limitation was found/confirmed via debugging - luckily, pci.sys > had symbols and the main bad function which was failing had a very > speaking name - something like pcieCheckTopology or similar. > > Emulating the "chipset-integrated device" in PT device's PCIe > Capabilities was a simple hack which allowed to bypass the requirement > to have a valid PCIe hierarchy with multiple buses. But the proper > future direction is implementing emulation of Root Ports or PCIe > switches I guess. Oh, I see. We discussed this with Jan, it wasn't clear whether it would be a strict requirement or not. We have our answer now, it is a strict requirement for pass-through to Windows guests. > >> The PCIe MMCONFIG area is configured by hvmloader and its base > >> address and size are set in Xen using a new pair of hypercalls > >> HVMOP_get|set_ecam_space. > > > >I guess I will see how that looks like in the series, but the setting > >of the ECAM region would better be done by the toolstack. Setting it > >in hvmloader is possibly not the best placement, because it doesn't > >run for PVH guests (and we will want ECAM support for PVH at some > >point), and there's also a vague plan/intention to get rid of > >hvmloader even for HVM guests eventually. > > This is the situation where the difference between HVM and PVH might be > very problematic I'm afraid. HVM guests assume full freedom over the > IO/MMIO resources setup inside their sandboxed environment. > > It's not just Windows reallocating PCI BARs to its liking, but also > spans to the emulated chipset's resources. In worst case we could have > MMCONFIG reinitialization implemented even in Intel's Q35 drivers > installed inside an HVM guest. Fortunately, this is not what I remember > was the case, but in theory Q35 driver could have done things like this. Indeed. In later patches my recommendation was to trap accesses to the root complex registers that control the position and size of the ECAM region, and forward those to the hypervisor, instead of hvmloader using a side-band hypercall to set the position and size of the ECAM region. I've also discussed this with Jan, alternatively we could trap the registers directly in Xen itself, but the Xen would need to know the domain has an emulated q35, which we might need to do at some point, but we are likely not there yet. Thanks, Roger. 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Modify acpi_enable_sci() function to support both > >> i440 and Q35 emulation. > >> > >> Signed-off-by: Alexey Gerasimenko > >> Signed-off-by: Thierry Escande > > > >Reviewed-by: Roger Pau Monné > > > >It's not great to add more stuff into hvmloader when we want to move > >out of it, but it's also not helpful to tie the Q35 addition to the > >removal of hvmloader. > > I'm afraid the only option to get rid of hvmloader is to move its > responsibilities back into the firmware (SeaBIOS/OVMF). But if I > understand it right, the whole idea of introducing hvmloader originally > was to delegate Xen-specific parts of HVM guest initialization from > firmware to a component managed by Xen itself. Maybe originally? We then ended up having to add all sorts of Xen specific logic into both SeaBIOS and OVMF, so much to OVMF that there's a Xen-specific target/platform in OVMF. > So, to some extent hvmloader can be considered as a part of the firmware > itself as it does things like PCI BAR allocation etc which are normally > done by the guest firmware, but with more knowledge of Xen specifics. > > I guess this hvmloader/firmware split model was introduced to have more > freedom/maintainability/control - I suppose it's much faster and easier > to integrate Xen-specific changes to hvmloader directly then to > upstream them to SeaBIOS/OVMF codebases. Faster to integrate possibly, but then we end up with IMO a lot of duplication between what hvmloader does vs what we could offload to OVMF. > But other than moving hvmloader's responsibilities to the firmware we > can't do much I think - HVM guests expect to have full freedom over the > emulated platform. Among problems are non-standard (chipset-specific) > devices which also need to have assigned resources like MMIO ranges - > and Xen doesn't know anything about these devices and their resource > requirements (left alone how to configure them), yet they still need to > have correct BARs assigned with no conflicts with other PCI devices and > to contribute to MMIO hole sizing. This is something which cannot be > solved on the toolstack level unless Xen emulates the whole chipset and > knows about all emulated chipset devices - we limit ourselves to > MMCONFIG now but there are more configurable ranges like this. I think we do want to move a lot of hvmloader responsibilities into OVMF (maybe SeaBIOS if possible also, albeit that's a legacy firmware by today standards anyway). Whether we would need to partially offload some of what hvmloader does into the toolstack remains to be seen. Chipset initialization would possibly need to be done by OVMF, at which point we might require PVH guests that want to use PCI passthrough to also rely on OVMF instead of direct kernel boot. Anyway, this is quite distant future. Thanks, Roger. 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pr=C Message-ID: <7f209655-a9a4-4174-ad05-825b175fb90c@amd.com> Date: Tue, 5 May 2026 16:38:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= CC: Jan Beulich , , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9DA:EE_|DM3PR12MB9389:EE_ X-MS-Office365-Filtering-Correlation-Id: f9c4814e-ac15-49c3-c6f0-08deaab3fff4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|22082099003|18002099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fokmwBWDBAOSmDGC3mpja+Hz2zz7ovHzR8a8ZAiOa2/ylN7UBkj6Y/peJKpFux/kH8MfTkoXt1zdAOkqQYOAXztisW/Ftpeoh4V1CI6Jdxd4wZ2X7BEp0r4p4rFce/KEZ/oG6gVeSwD1KDqPv6CeEShgMX5pl66hBrFRP1k61Jd9J+xyMOvyEmcoo/xJkfb2sG82cEgtNZIeFNWlbDY9lhs8a79etcYb1a4cK1HwUKBAf1fNg2Q7svqFc+OWdLgmtFsJ7j8JQwwH7FWW4lFnBJNhcE3Bxs+cpGp3N7I+op8EsSHa6IzvS/HF3l29d0tKZ2vvU3lPASMj31wNAwnYkhrQZB8aOQq5FxrUw8G7og+rsAjUfkylA6htBVIGWeP9gMKTrvSJ3j1fMeY0kCevXSRzuN4TUjr9OAWiPP7OVZhQrNadDXEIixc44/lbAiGh X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:38:40.0776 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9c4814e-ac15-49c3-c6f0-08deaab3fff4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9DA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9389 X-purgate-ID: tlsNG-bad1c0/1777991930-93D7FA53-B14C4AF8/0/0 X-purgate-type: clean X-purgate-size: 5187 On 05-May-26 14:15, Roger Pau Monné wrote: > On Tue, May 05, 2026 at 01:46:51PM +0200, Orzel, Michal wrote: >> >> >> On 05-May-26 12:49, Jan Beulich wrote: >>> On 05.05.2026 12:46, Orzel, Michal wrote: >>>> On 05-May-26 12:40, Jan Beulich wrote: >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>>> defines it). >>>>>>>>>> >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>>> today. >>>>>>>>> >>>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>>> an extra PDX offset there? >>>>>>>>> >>>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>>> >>>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>>> disabled. >>>>>>> >>>>>>>> Without frametable_base_pdx >>>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>>> >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>>> >>>>> Yet still - this is exactly one of the situations offset compression means >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>>> special case variant of "offset compression" into "no compression". >>>> In this case, if you don't want to generalize the macros, how should we proceed >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>>> use? In v1 I just created a local override but Julien wanted to generalize the >>>> macros instead. The discussion about switching the default on Arm from mask to >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. >>> >>> I'm not convinced of that. If you need offset by default, why not enable it by >>> default (right now, and potentially even as a backport if there's any bug that >>> is being fixed)? >> As said before, we also need offset when using just PDX grouping and no compression. > > But you don't really mean no compression? The offset itself that you > subtract is a transformation, and hence a compression, as the physical > and PDX address spaces are no longer identity mapped? Maybe those > systems should have never worked with PDX_NONE, and instead required > a PDX compression in place (one that would remove the offset from 0 to > the first RAM range). I'd argue the PDX <-> PFN mapping itself is still identity here — with PDX_NONE, pfn_to_pdx(x) == x and pdx_to_pfn(x) == x. frametable_base_pdx is not a PDX-space transformation; it's an offset that's only applied when *indexing into the frame table* Conceptually it's closer to "skip the leading hole in the lookup arrays" than to a compression of the PFN/PDX number space. It also sits on top of (and is orthogonal to) whatever PDX scheme is selected. > > It's an incomplete conversion IMO, as ARM applies it to the > frametable, but not the direct map. It is applied to the directmap on arm64 — see directmap_base_pdx. So both the frametable and (on arm64) the directmap apply the equivalent offset. They use separate variables (frametable_base_pdx vs. directmap_base_pdx) but the principle is the same. > > Thanks, Roger. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 14:44:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 14:44:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300760.1575248 (Exim 4.92) (envelope-from ) id 1wKH0r-0004eV-3W; Tue, 05 May 2026 14:44:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300760.1575248; Tue, 05 May 2026 14:44:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH0q-0004eO-WC; Tue, 05 May 2026 14:44:41 +0000 Received: by outflank-mailman (input) for mailman id 1300760; Tue, 05 May 2026 14:44:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH0p-0004eI-Db for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <323e36d0-63e1-4331-87ad-d84f948feef7@amd.com> Date: Tue, 5 May 2026 16:44:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Timothy Pearson , Teddy Astie , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <65ecf1c0-0844-4ba9-a250-a94aeaf4d251@amd.com> <309b2ff6-c200-47d0-be3f-ec289df641c6@amd.com> <0a3583df-2682-426e-a704-aa8711caec0d@suse.com> <0267eb6f-1161-45b7-8905-d7aecb78e74c@suse.com> <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <94f1f29c-0430-421a-8b48-398fa0495966@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF00000206:EE_|DM4PR12MB6182:EE_ X-MS-Office365-Filtering-Correlation-Id: 9978e949-f8d3-4a27-822f-08deaab4d01f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|1800799024|82310400026|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: iKCQmHXs7g6+nbwYBf9PQfi7lWDnftpnpUyHuznX0xRTSwEW3HdIKhS71DH+tKyYxJcHBF/v0A90DA+nxetx9ZFI/S4ILiXOlR53S2UvnIkc2EkHN9uAL4L4hM4v+ySrKzrRg9nEJPNke/q2vS5Bg1TdpkTBATOTX+9yrO701/2FvQ4b6pAnk0T97XiVRyzCrFpdBBuA1Y6E3YOZqkPUfPTDVRQu9NJ0swfUJyBUVapl6z4kf9vfv63eokoq/QZPXi6Futa2nWbnUdowO0deYJfezeUnnW/tmrn4xxvJVQt8UzIobuuhDvpR59PK1UaD8KuqY2wU2mGC5PWUUmwV3pFLTx7KbRftbnkaICwJLwOVslJp5VCGx7zCrboTdXcyIdw8kqH9iTdxatm3eRbUcn5JvvoiOEabn66W73ZIrQHYsxGkEkUd0xp2iv3stRm7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:44:29.4762 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9978e949-f8d3-4a27-822f-08deaab4d01f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF00000206.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6182 X-purgate-ID: tlsNG-c201ff/1777992277-E8DA3443-F5CC4783/0/0 X-purgate-type: clean X-purgate-size: 5955 On 05-May-26 15:00, Jan Beulich wrote: > On 05.05.2026 13:46, Orzel, Michal wrote: >> On 05-May-26 12:49, Jan Beulich wrote: >>> On 05.05.2026 12:46, Orzel, Michal wrote: >>>> On 05-May-26 12:40, Jan Beulich wrote: >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also >>>>>>>>>> defines it). >>>>>>>>>> >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros >>>>>>>>>> correct for all architectures, even though they are only used on x86 >>>>>>>>>> today. >>>>>>>>> >>>>>>>>> Hm, I assume this offset was added because the original mask PDX >>>>>>>>> compression won't (usually) compress the gap between 0 and the start >>>>>>>>> of RAM. However the newish offset PDX compression should be able to >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply >>>>>>>>> an extra PDX offset there? >>>>>>>>> >>>>>>>>> If that's indeed the case it might be better to integrate >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so >>>>>>>>> that on some arches it's a mask plus a decrease. >>>>>>>> The offset is needed regardless of whether compression is used. With >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. >>>>>>>> 0x80000000, the first valid PDX is 0x80000. >>>>>>> >>>>>>> OK, so you are doing some (kind of) address space compression (removing >>>>>>> the leading empty range to the first RAM region) even when PDX is >>>>>>> disabled. >>>>>>> >>>>>>>> Without frametable_base_pdx >>>>>>>> the frame table would have to be indexed from 0, wasting >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. >>>>>>> >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste >>>>>> physical memory for the leading gap. But we'd still waste virtual address >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. >>>>> >>>>> Yet still - this is exactly one of the situations offset compression means >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a >>>>> special case variant of "offset compression" into "no compression". >>>> In this case, if you don't want to generalize the macros, how should we proceed >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also >>>> use? In v1 I just created a local override but Julien wanted to generalize the >>>> macros instead. The discussion about switching the default on Arm from mask to >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. >>> >>> I'm not convinced of that. If you need offset by default, why not enable it by >>> default (right now, and potentially even as a backport if there's any bug that >>> is being fixed)? >> As said before, we also need offset when using just PDX grouping and no compression. > > And as also said before, this really is poor man's offset compression then. That > may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit > that offset to just the "no compression" case. It's redundant with offset > compression, and it may be (possible to make) redundant with mask compression. > If the latter can't be arranged for, an offset may want introducing there as well. > But it shouldn't exist independent of the compression scheme used. Having a single per-scheme mechanism rather than an extra independent offset is cleaner. But I don't think we can limit frametable_base_pdx to PDX_NONE today: - Mask compression doesn't fold a leading [0, first_ram_pdx) zero prefix into anything. So the PDX of the first RAM frame stays at first_ram_pdx, and without the offset the frame table virtual extent is max_pdx * sizeof(page_info) rather than (max_pdx - first_ram_pdx) * sizeof(page_info). For systems with a high RAM base (the 5TB example I gave earlier needs ~70GB just to skip the leading hole, vs. 32GB FRAMETABLE_SIZE on arm64) the (max_pdx > FRAMETABLE_NR) check then fails and we panic before mapping anything. pdx_group_valid (which patch 2/2 adds) avoids backing those leading groups with physical memory, but it doesn't shrink the virtual extent — only the offset does. - With offset compression you're right that the leading hole could be absorbed into the lookup table, making the extra offset redundant. But Arm doesn't currently select offset compression, it's non-selectable, untested and switching the default is a separate (and bigger) discussion that I don't think should block this fix given the state of the release. So as it stands, the offset is needed on Arm for both PDX_NONE and PDX_MASK_COMPRESSION. Folding it into the mask scheme (and dropping it for offset compression) is a reasonable cleanup, but it's a refactor of the compression layer itself, not something I'd like to mix into this series. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 14:53:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 14:53:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300777.1575257 (Exim 4.92) (envelope-from ) id 1wKH8w-0006WU-VV; Tue, 05 May 2026 14:53:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300777.1575257; Tue, 05 May 2026 14:53:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH8w-0006WN-SX; Tue, 05 May 2026 14:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1300777; Tue, 05 May 2026 14:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKH8v-0006WH-V0 for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Tue, 5 May 2026 16:52:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie , References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|CH3PR12MB8546:EE_ X-MS-Office365-Filtering-Correlation-Id: dd6fbcaf-648b-45a3-66e3-08deaab5fa9a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|82310400026|7416014|1800799024|18002099003|56012099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XJM9fQ1EduezxB2GcU1Ij8C06n7nQUYoAzU+C9/9U9hymyMxnoTInri4eRVck64AA2KonXGSAbi9qbd0/hGtY3NmbYfOf1bh5szKn8YiE90cA0j+iCYTqrMJtGHHekokcus1Y4d7pSFSQPIUU3zMIZYEJ1nPnBojPFaKGicH4Czl+ygIyPAMDfJmuw/kUxdEWBa3D3RmVmzWMe40CPBz6IH1vU6wF0PFFUQ+wjbJdY0MgfsWINkGcgBBO1Sb32+4UicNGTNrrNaRaPWWmHViALCNK7qUNRK6Bs9qlXHRHOTZ06GW1H3bs+idUvIpWy0imN6T+3383biOLBJMIHoJZcMO1F6wEZlW4KvJ7fa9oIg/75nbmVEZuMdu3DIb53y8vnXn6z2/BO2i7TYrp81NQIDcnzmZ/Rk7V7NyHzZm+pVXhOiAaH1ImHjL8n+7mXfZ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 14:52:50.2973 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dd6fbcaf-648b-45a3-66e3-08deaab5fa9a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8546 X-purgate-ID: tlsNG-4011c0/1777992780-465748B7-D5448F01/0/0 X-purgate-type: clean X-purgate-size: 1647 On 05-May-26 15:05, Jan Beulich wrote: > On 30.04.2026 14:51, Michal Orzel wrote: >> --- a/xen/include/xen/pdx.h >> +++ b/xen/include/xen/pdx.h >> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >> */ >> bool __mfn_valid(unsigned long mfn); >> >> -#define page_to_pdx(pg) ((pg) - frame_table) >> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >> +#define page_to_pdx(pg) \ >> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) > > If you alter these, ... > >> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) > > ... how come these can remain unaltered? Maybe you have some special > arrangements in Arm code, but surely in generic code transformations done > should be uniform. After all > > ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); > > (and alike) ought to be universally true for valid inputs. The invariant holds. There are two transformations on different boundaries: - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / pdx_to_mfn. - PDX <-> frame-table index: +/- frametable_base_pdx — lives in page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). On x86 the second is the identity (frametable_base_pdx == 0), so it's invisible. On Arm it isn't, so it has to appear in the macros that cross that boundary. Pushing it into mfn_to_pdx as well would mix the two boundaries and double-apply on Arm (page_to_mfn already adds it). ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 05 15:20:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:20:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300801.1575266 (Exim 4.92) (envelope-from ) id 1wKHZT-0002i3-1K; Tue, 05 May 2026 15:20:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300801.1575266; Tue, 05 May 2026 15:20:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKHZS-0002hw-Uq; Tue, 05 May 2026 15:20:26 +0000 Received: by outflank-mailman (input) for mailman id 1300801; Tue, 05 May 2026 15:20:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp 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=?utf-8?B?eXFqTlk0YlMxbE9KVXIyazV1cmw2MkxrcjZEK3RMK3pMcDdMUlVXZz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 84ba5677-2f7a-48d9-8ae2-08deaab9d095 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 15:20:18.1465 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: n14dwXWYmrJI5+1x3pBW25kf7ThXh0OdPB4V1jvt3zyrTMDvXWVJgE4M6EvFPIPSMhnTk7bRVcRCmiKMmi8n+g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR03MB7076 X-purgate-ID: tlsNG-ebf023/1777994424-43D6C3FF-122A9B51/0/0 X-purgate-type: clean X-purgate-size: 6418 On Tue, May 05, 2026 at 04:44:16PM +0200, Orzel, Michal wrote: > > > On 05-May-26 15:00, Jan Beulich wrote: > > On 05.05.2026 13:46, Orzel, Michal wrote: > >> On 05-May-26 12:49, Jan Beulich wrote: > >>> On 05.05.2026 12:46, Orzel, Michal wrote: > >>>> On 05-May-26 12:40, Jan Beulich wrote: > >>>>> On 05.05.2026 09:35, Orzel, Michal wrote: > >>>>>> On 05-May-26 09:13, Roger Pau Monné wrote: > >>>>>>> On Tue, May 05, 2026 at 08:48:15AM +0200, Orzel, Michal wrote: > >>>>>>>> On 04-May-26 17:28, Roger Pau Monné wrote: > >>>>>>>>> On Thu, Apr 30, 2026 at 02:51:02PM +0200, Michal Orzel wrote: > >>>>>>>>>> The generic pdx_to_page() and page_to_pdx() macros in xen/pdx.h assume > >>>>>>>>>> the frame table starts at PDX 0, which is only true on x86. ARM > >>>>>>>>>> uses a non-zero frametable_base_pdx to offset into the frame table (PPC also > >>>>>>>>>> defines it). > >>>>>>>>>> > >>>>>>>>>> Fix the generic macros to subtract/add frametable_base_pdx, defaulting > >>>>>>>>>> to 0 when the arch does not define it. This makes the generic macros > >>>>>>>>>> correct for all architectures, even though they are only used on x86 > >>>>>>>>>> today. > >>>>>>>>> > >>>>>>>>> Hm, I assume this offset was added because the original mask PDX > >>>>>>>>> compression won't (usually) compress the gap between 0 and the start > >>>>>>>>> of RAM. However the newish offset PDX compression should be able to > >>>>>>>>> compress from 0 to start of RAM, and hence you don't need to apply > >>>>>>>>> an extra PDX offset there? > >>>>>>>>> > >>>>>>>>> If that's indeed the case it might be better to integrate > >>>>>>>>> frametable_base_pdx into the mask compression algorithm itself, so > >>>>>>>>> that on some arches it's a mask plus a decrease. > >>>>>>>> The offset is needed regardless of whether compression is used. With > >>>>>>>> CONFIG_PDX_NONE (no compression, PDX == MFN), if RAM starts at e.g. > >>>>>>>> 0x80000000, the first valid PDX is 0x80000. > >>>>>>> > >>>>>>> OK, so you are doing some (kind of) address space compression (removing > >>>>>>> the leading empty range to the first RAM region) even when PDX is > >>>>>>> disabled. > >>>>>>> > >>>>>>>> Without frametable_base_pdx > >>>>>>>> the frame table would have to be indexed from 0, wasting > >>>>>>>> 0x80000 * sizeof(page_info) of memory just to cover the hole before RAM. > >>>>>>> > >>>>>>> But you don't really "waste" memory, just address space? Oh, maybe > >>>>>>> not on ARM as it doesn't use pdx_group_valid? And so you > >>>>>>> unconditionally populate the frametable from PDX 0 to max PDX. > >>>>>> With pdx_group_valid (which this series adds) we wouldn't waste > >>>>>> physical memory for the leading gap. But we'd still waste virtual address > >>>>>> space and the FRAMETABLE_NR check (max_pdx > FRAMETABLE_NR) becomes tighter > >>>>>> because the full range from PDX 0 must fit. For example with RAM starting at 5TB > >>>>>> the virtual offset before the first usable entry would be ~70GB — more than the > >>>>>> entire 32GB FRAMETABLE_SIZE on ARM64. > >>>>> > >>>>> Yet still - this is exactly one of the situations offset compression means > >>>>> to cover. I'm entirely with Roger as to it being undesirable to build a > >>>>> special case variant of "offset compression" into "no compression". > >>>> In this case, if you don't want to generalize the macros, how should we proceed > >>>> on Arm if we still need the offset to cover the PDX_NONE variant that we also > >>>> use? In v1 I just created a local override but Julien wanted to generalize the > >>>> macros instead. The discussion about switching the default on Arm from mask to > >>>> offset that is not even selectable on Arm needs to wait for the new release cycle. > >>> > >>> I'm not convinced of that. If you need offset by default, why not enable it by > >>> default (right now, and potentially even as a backport if there's any bug that > >>> is being fixed)? > >> As said before, we also need offset when using just PDX grouping and no compression. > > > > And as also said before, this really is poor man's offset compression then. That > > may be tolerable if you insist that's best for Arm, yet then I'd suggest to limit > > that offset to just the "no compression" case. It's redundant with offset > > compression, and it may be (possible to make) redundant with mask compression. > > If the latter can't be arranged for, an offset may want introducing there as well. > > But it shouldn't exist independent of the compression scheme used. > Having a single per-scheme mechanism rather than an extra independent offset is > cleaner. But I don't think we can limit frametable_base_pdx to PDX_NONE today: > > - Mask compression doesn't fold a leading [0, first_ram_pdx) zero > prefix into anything. So the PDX of > the first RAM frame stays at first_ram_pdx, and without the offset > the frame table virtual extent is max_pdx * sizeof(page_info) > rather than (max_pdx - first_ram_pdx) * sizeof(page_info). > > For systems with a high RAM base (the 5TB example I gave earlier > needs ~70GB just to skip the leading hole, vs. 32GB FRAMETABLE_SIZE > on arm64) the (max_pdx > FRAMETABLE_NR) check then fails and we > panic before mapping anything. pdx_group_valid (which patch 2/2 > adds) avoids backing those leading groups with physical memory, but > it doesn't shrink the virtual extent — only the offset does. > > - With offset compression you're right that the leading hole could be > absorbed into the lookup table, making the extra offset redundant. > But Arm doesn't currently select offset compression, it's non-selectable, > untested and switching > the default is a separate (and bigger) discussion that I don't think > should block this fix given the state of the release. > > So as it stands, the offset is needed on Arm for both PDX_NONE and > PDX_MASK_COMPRESSION. Folding it into the mask scheme (and dropping it > for offset compression) is a reasonable cleanup, but it's a refactor > of the compression layer itself, not something I'd like to mix into > this series. Right, then it's likely best to avoid generalizing frametable_base_pdx and instead focus on integrating it with the PDX mask compression algorithm at a possibly later time (after release)? Thanks, Roger. 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Tue, 05 May 2026 08:23:41 -0700 (PDT) MIME-Version: 1.0 References: <038337ec0e3f1474c6cc6a92090e28c6972e4dc6.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 18:23:28 +0300 X-Gm-Features: AVHnY4Lp8PLNiPSH_rXiXH9DXGfRY9OSOlaX6QNN69iV-sQmD-KYv1xHa12HpPs Message-ID: Subject: Re: [PATCH v8 09/13] arm/smmu-v3: add suspend/resume handlers To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1777994622-53B7DD75-BCDF7250/0/0 X-purgate-type: clean X-purgate-size: 9432 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 5:03=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passth= rough/arm/smmu-v3.c > > index bf153227db..7607ffc9ca 100644 > > --- a/xen/drivers/passthrough/arm/smmu-v3.c > > +++ b/xen/drivers/passthrough/arm/smmu-v3.c > > @@ -1814,8 +1814,7 @@ static int arm_smmu_write_reg_sync(struct arm_smm= u_device *smmu, u32 val, > > } > > > > /* GBPA is "special" */ > > -static int __init arm_smmu_update_gbpa(struct arm_smmu_device *smmu, > > - u32 set, u32 clr) > > +static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set,= u32 clr) > > { > > int ret; > > u32 reg, __iomem *gbpa =3D smmu->base + ARM_SMMU_GBPA; > > @@ -1995,10 +1994,29 @@ err_free_evtq_irq: > > return ret; > > } > > > > +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) > > +{ > > + int ret; > > + u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > + > > + if ( smmu->features & ARM_SMMU_FEAT_PRI ) > > + irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > + > > + /* Enable interrupt generation on the SMMU */ > > + ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > + if ( ret ) > > + { > > + dev_warn(smmu->dev, "failed to enable irqs\n"); > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) > > { > > int ret, irq; > > - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > > > /* Disable IRQs first */ > > ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, > > @@ -2028,22 +2046,7 @@ static int __init arm_smmu_setup_irqs(struct arm= _smmu_device *smmu) > > } > > } > > > > - if (smmu->features & ARM_SMMU_FEAT_PRI) > > - irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > - > > - /* Enable interrupt generation on the SMMU */ > > - ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > - if (ret) { > > - dev_warn(smmu->dev, "failed to enable irqs\n"); > > - goto err_free_irqs; > > - } > > - > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_disable(struct arm_smmu_device *smmu) > > @@ -2057,7 +2060,7 @@ static int arm_smmu_device_disable(struct arm_smm= u_device *smmu) > > return ret; > > } > > > > -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) > > +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > > { > > int ret; > > u32 reg, enables; > > @@ -2163,17 +2166,9 @@ static int __init arm_smmu_device_reset(struct a= rm_smmu_device *smmu) > > } > > } > > > > - ret =3D arm_smmu_setup_irqs(smmu); > > - if (ret) { > > - dev_err(smmu->dev, "failed to setup irqs\n"); > > We are moving this one to the probe and .. > > > + ret =3D arm_smmu_enable_irqs(smmu); > > + if ( ret ) > > changing with this one, but arm_smmu_setup_irqs() also calls arm_smmu_set= up_unique_irqs() which > calls arm_smmu_setup_msis(), are we sure that on resume we will get the s= ame state? This follows the split introduced in the Linux arm-smmu-v3 runtime/system s= leep series: https://lore.kernel.org/linux-iommu/20260414194702.1229094-1-praan@google.c= om/ The intent is to keep IRQ handler registration as one-time probe state, whi= le reset/resume only restores the SMMU hardware state and re-enables interrupt generation. You are right that the MSI case needs extra care. In the Linux series this = is handled by arm_smmu_resume_msis(), which restores the SMMU-side MSI configuration. I did not port that part in this patch because Xen SMMUv3 MS= I support is currently documented as unsupported and is not part of the supported/tested path, so this patch only covers the wired IRQ path used by= Xen today. If Xen SMMUv3 MSI support becomes usable in the future, the resume path wil= l need an equivalent MSI restore step before IRQ_CTRL is re-enabled. I will add a code comment and update the commit message to make this scope explicit. I also noticed that I accidentally dropped the reference to Pranj= al's Linux series while reworking the patch; I will restore the Link/attribution= in the next version. > > > return ret; > > - } > > - > > - /* Initialize tasklets for threaded IRQs*/ > > - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > - smmu); > > > > /* Enable the SMMU interface, or ensure bypass */ > > if (disable_bypass) { > > @@ -2181,20 +2176,16 @@ static int __init arm_smmu_device_reset(struct = arm_smmu_device *smmu) > > } else { > > ret =3D arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); > > if (ret) > > - goto err_free_irqs; > > + return ret; > > } > > ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, > > ARM_SMMU_CR0ACK); > > if (ret) { > > dev_err(smmu->dev, "failed to enable SMMU interface\n"); > > - goto err_free_irqs; > > + return ret; > > } > > > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > > @@ -2558,10 +2549,23 @@ static int __init arm_smmu_device_probe(struct = platform_device *pdev) > > if (ret) > > goto out_free; > > > > + ret =3D arm_smmu_setup_irqs(smmu); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "failed to setup irqs\n"); > > + goto out_free; > > + } > > + > > + /* Initialize tasklets for threaded IRQs*/ > > + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > + smmu); > > + > > /* Reset the device */ > > ret =3D arm_smmu_device_reset(smmu); > > if (ret) > > - goto out_free; > > + goto out_free_irqs; > > > > /* > > * Keep a list of all probed devices. This will be used to query > > @@ -2575,6 +2579,8 @@ static int __init arm_smmu_device_probe(struct pl= atform_device *pdev) > > > > return 0; > > > > +out_free_irqs: > > + arm_smmu_free_irqs(smmu); > > > > out_free: > > arm_smmu_free_structures(smmu); > > @@ -2855,6 +2861,96 @@ static void arm_smmu_iommu_xen_domain_teardown(s= truct domain *d) > > xfree(xen_domain); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device= *smmu) > > +{ > > + int ret =3D arm_smmu_device_reset(smmu); > > + > > + if ( ret ) > > + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", > > + ret); > > +} > > + > > +static int arm_smmu_suspend(void) > > +{ > > + struct arm_smmu_device *smmu; > > + int ret =3D 0; > > + > > + list_for_each_entry(smmu, &arm_smmu_devices, devices) > > + { > > + bool wfe =3D !!(smmu->features & ARM_SMMU_FEAT_SEV); > > + > > + /* Abort all transactions before disable to avoid spurious bypass */ > > + ret =3D arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); > > + if ( ret ) > > + goto fail; > > + > > + /* Disable the SMMU via CR0.EN and all queues except CMDQ */ > > + ret =3D arm_smmu_write_reg_sync(smmu, CR0_CMDQEN, ARM_SMMU_CR0, > > + ARM_SMMU_CR0ACK); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "Timed-out while disabling smmu\n"); > > + goto fail; > > + } > > + > > + /* > > + * At this point the SMMU is completely disabled and won't access > > + * any translation/config structures, even speculative accesses > > + * aren't performed as per the IHI0070 spec (section 6.3.9.6). > > + */ > > + > > + /* Wait for the CMDQs to be drained to flush any pending commands */ > > + ret =3D queue_poll_cons(&smmu->cmdq.q, true, wfe); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "Draining queues timed-out\n"); > > + goto fail; > > + } > > polling the queue doesn=E2=80=99t give you the assurance that all prior c= ommands are complete, > I would use arm_smmu_cmdq_issue_sync for that instead of the above. > > ret =3D arm_smmu_cmdq_issue_sync(smmu); > if ( ret ) > goto fail; Yes, I agree. Polling CONS only shows that the SMMU has consumed the CMDQ entries; it doe= s not provide the completion semantics we want here. I will replace the direc= t queue_poll_cons() in the suspend path with arm_smmu_cmdq_issue_sync(), whil= e CMDQ is still enabled, and update the comment/commit message accordingly. Best regards, Mykola > > > + > > + /* Disable everything */ > > + ret =3D arm_smmu_device_disable(smmu); > > + if ( ret ) > > + goto fail; > > + > > + dev_dbg(smmu->dev, "Suspended smmu\n"); > > + } > > + > > + return 0; > > + > > + fail: > > + /* Reset the device that failed as well as any already-suspended ones= . */ > > + arm_smmu_reset_for_suspend_rollback(smmu); > > + > > + list_for_each_entry_continue_reverse(smmu, &arm_smmu_devices, devices= ) > > + arm_smmu_reset_for_suspend_rollback(smmu); > > + > > + return ret; > > +} > > + > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Tue May 05 15:27:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:27:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300821.1575284 (Exim 4.92) (envelope-from ) id 1wKHgO-0003zv-0q; Tue, 05 May 2026 15:27:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300821.1575284; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260423190459.93299-1-roger.pau@citrix.com> Content-Type: text/plain; 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Introduce two Gitlab macOS build jobs that > reproduce the ones present on CirrusCI. > > According to the "Community programs" Gitlab documentation [0] we get > 50,000 compute minutes per month. The arm64 job takes ~1m 15s, and the > x86_64 one ~2m. I think it's likely enough given the amount of minutes we > have available. We might need to reconsider if we add more tasks that > consume compute minutes. > > [0] https://docs.gitlab.com/subscriptions/community_programs/#gitlab-for-open-source > > Signed-off-by: Roger Pau Monné Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue May 05 15:53:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 15:53:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300840.1575292 (Exim 4.92) (envelope-from ) id 1wKI5Y-0000BG-V7; Tue, 05 May 2026 15:53:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300840.1575292; Tue, 05 May 2026 15:53:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKI5Y-0000B8-SH; Tue, 05 May 2026 15:53:36 +0000 Received: by outflank-mailman (input) for mailman id 1300840; Tue, 05 May 2026 15:53:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKI5W-0000B2-MK for xen-devel@lists.xenproject.org; Tue, 05 May 2026 15:53:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKI5V-005haT-06 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 17:53:33 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa125d-2eae-0a2a0a5409dd-0a2a4501988a-34 for ; Tue, 05 May 2026 17:53:32 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa127c-c1f2-0a2a45010019-d155d036c13f-3 for ; Tue, 05 May 2026 17:53:32 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-66b2d49ffb0so7366310a12.3 for ; Tue, 05 May 2026 08:53:32 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Message-ID: <04c8ed4e-4e99-46ae-b83d-af9031f5b622@suse.com> Date: Tue, 5 May 2026 17:53:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Subject: Problem with PCI-passthrough to PV guest Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH 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"xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1777996567-81971161-B33E1FDD/0/0 X-purgate-type: clean X-purgate-size: 4117 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 5:51=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mirela Simonovic > > > > The MMU must be enabled during the resume path before restoring context= , > > as virtual addresses are used to access the saved context data. > > > > This patch adds MMU setup during resume by reusing the existing > > enable_secondary_cpu_mm function, which enables data cache and the MMU. > > I don=E2=80=99t understand where this last part happen in this commit: This is a leftover from before the commits were reorganized. I will update = the commit message in v9 so that it only describes what this patch actually doe= s. > > > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > > to init_ttbr (page tables used at runtime). > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no functional changes, just moved commit > > --- > > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > > 1 file changed, 24 insertions(+) > > > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 72c7b24498..596e960152 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -561,6 +561,30 @@ END(efi_xen_start) > > > > #endif /* CONFIG_ARM_EFI */ > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +FUNC(hyp_resume) > > I think we should mask all exceptions here: > msr DAIFSet, 0xf > > until we resume correctly the status (VBAR_EL2, etc). This was discussed in an earlier version: https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef15cb= 605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com/#CA= GeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In particular, section 5.20.2 says that the caller must observe all the rules described for CPU_SUSPEND, and section 6.4 explicitly says that the initial state rules also apply to SYSTEM_SUSPEND. For the return Exception level on AArch64, section 6.4.3.3 requires SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to ente= r this resume path with DAIF already masked by PSCI-compliant firmware. I agree this assumption is not obvious from the code, so I will add a comme= nt at the resume entry point to document that this path relies on the PSCI ini= tial core configuration requirements. > > > + /* Initialize the UART if earlyprintk has been enabled. */ > > +#ifdef CONFIG_EARLY_PRINTK > > + bl init_uart > > +#endif > > + PRINT_ID("- Xen resuming -\r\n") > > + > > + bl check_cpu_mode > > + bl cpu_init > > + > > + ldr x0, =3Dstart > > + adr x20, start /* x20 :=3D paddr (start) */ > > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > > + ldr lr, =3Dmmu_resumed > > + b enable_secondary_cpu_mm > > + > > +mmu_resumed: > > + b . > > +END(hyp_resume) > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* > > * Local variables: > > * mode: ASM > > > > This is more a trampoline for the core resuming, not sure if it could be = better to squash this > into the following patch, the maintainer could provide their preference. Yes, this patch is only the low-level resume trampoline before the context restore code is added by the following patch. I do not have a strong prefer= ence between keeping it separate and squashing it into the next patch. I can squ= ash them in v9 unless the maintainers prefer to keep the trampoline separate. Best regards, Mykola > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 16:11:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:11:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300863.1575312 (Exim 4.92) (envelope-from ) id 1wKIMw-0004dz-O1; Tue, 05 May 2026 16:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300863.1575312; Tue, 05 May 2026 16:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIMw-0004ds-Jj; Tue, 05 May 2026 16:11:34 +0000 Received: by outflank-mailman (input) for mailman id 1300863; Tue, 05 May 2026 16:11:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIMv-0004dm-7Z for xen-devel@lists.xenproject.org; Tue, 05 May 2026 16:11:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKIMu-00Ei4m-Fw for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:11:32 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa169a-e002-0a2a0a5209dd-0a2a4502e76a-44 for ; Tue, 05 May 2026 18:11:32 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa16b4-af86-0a2a45020019-d1558032cdef-3 for ; Tue, 05 May 2026 18:11:32 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48896199cbaso47867505e9.1 for ; Tue, 05 May 2026 09:11:32 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1777997492-80B78161-DA39FB0A/0/0 X-purgate-type: clean X-purgate-size: 2329 On 05.05.2026 16:52, Orzel, Michal wrote: > > > On 05-May-26 15:05, Jan Beulich wrote: >> On 30.04.2026 14:51, Michal Orzel wrote: >>> --- a/xen/include/xen/pdx.h >>> +++ b/xen/include/xen/pdx.h >>> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >>> */ >>> bool __mfn_valid(unsigned long mfn); >>> >>> -#define page_to_pdx(pg) ((pg) - frame_table) >>> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >>> +#define page_to_pdx(pg) \ >>> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >>> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) >> >> If you alter these, ... >> >>> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >>> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) >> >> ... how come these can remain unaltered? Maybe you have some special >> arrangements in Arm code, but surely in generic code transformations done >> should be uniform. After all >> >> ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); >> >> (and alike) ought to be universally true for valid inputs. > The invariant holds. There are two transformations on different > boundaries: > > - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / > pdx_to_mfn. > - PDX <-> frame-table index: +/- frametable_base_pdx — lives in > page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). > > On x86 the second is the identity (frametable_base_pdx == 0), so it's > invisible. On Arm it isn't, so it has to appear in the macros that > cross that boundary. Pushing it into mfn_to_pdx as well would mix the > two boundaries and double-apply on Arm (page_to_mfn already adds it). That's yet more odd. These transformations should equally apply to MFN <-> page (i.e. frame table index) and MFN <-> PDX translations. PDX really is meant to be the frame table index, and at the same time (scaled by PAGE_SHIFT) the direct map index. Both (generally huge) tables equally benefit from whatever compression is in use, and hence also ought to equally benefit from that frametable_base_pdx-only sub-form of offset compression. The anomaly of shrinking only one of the two pretty clearly shouldn't be extended past Arm, and ideally would be addressed there at some point. Jan From xen-devel-bounces@lists.xenproject.org Tue May 05 16:15:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:15:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300869.1575320 (Exim 4.92) (envelope-from ) id 1wKIR8-0005CP-7w; Tue, 05 May 2026 16:15:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300869.1575320; Tue, 05 May 2026 16:15:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIR8-0005CI-3o; Tue, 05 May 2026 16:15:54 +0000 Received: by outflank-mailman (input) for mailman id 1300869; Tue, 05 May 2026 16:15:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIR6-0005CC-Bd for xen-devel@lists.xenproject.org; Tue, 05 May 2026 16:15:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKIR5-006d4c-Ah for xen-devel@lists.xenproject.org; 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Tue, 05 May 2026 09:15:50 -0700 (PDT) MIME-Version: 1.0 References: <8767d4129cd5bc56086172e58320539be7da4059.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Tue, 5 May 2026 19:15:37 +0300 X-Gm-Features: AVHnY4IrysOt3S6uyhp6FbQHVX_-258ZZw4hlASPj3k8tlvTgm7ehqX6AKde12E Message-ID: Subject: Re: [PATCH v8 12/13] xen/arm: Implement PSCI SYSTEM_SUSPEND call (host interface) To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1777997751-E3961443-578406B7/0/0 X-purgate-type: clean X-purgate-size: 3885 Hi Luca, Thank you for the review. On Mon, Apr 27, 2026 at 7:23=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > > > > From: Mirela Simonovic > > > > Invoke PSCI SYSTEM_SUSPEND to finalize Xen's suspend sequence on ARM64 = platforms. > > Pass the resume entry point (hyp_resume) as the first argument to EL3. = The resume > > handler is currently a stub and will be implemented later in assembly. = Ignore the > > context ID argument, as is done in Linux. > > > > Only enable this path when CONFIG_SYSTEM_SUSPEND is set and > > PSCI version is >=3D 1.0. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/include/asm/psci.h | 1 + > > xen/arch/arm/psci.c | 23 ++++++++++++++++++++++- > > 2 files changed, 23 insertions(+), 1 deletion(-) > > > > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm= /psci.h > > index 48a93e6b79..bb3c73496e 100644 > > --- a/xen/arch/arm/include/asm/psci.h > > +++ b/xen/arch/arm/include/asm/psci.h > > @@ -23,6 +23,7 @@ int call_psci_cpu_on(int cpu); > > void call_psci_cpu_off(void); > > void call_psci_system_off(void); > > void call_psci_system_reset(void); > > +int call_psci_system_suspend(void); > > > > /* Range of allocated PSCI function numbers */ > > #define PSCI_FNUM_MIN_VALUE _AC(0,U) > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > > index b6860a7760..c9d126b195 100644 > > --- a/xen/arch/arm/psci.c > > +++ b/xen/arch/arm/psci.c > > @@ -17,17 +17,20 @@ > > #include > > #include > > #include > > +#include > > > > /* > > * While a 64-bit OS can make calls with SMC32 calling conventions, for > > * some calls it is necessary to use SMC64 to pass or return 64-bit val= ues. > > - * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate > > + * For such calls PSCI_*_FN_NATIVE(x) will choose the appropriate > > * (native-width) function ID. > > */ > > #ifdef CONFIG_ARM_64 > > #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name > > +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN64_##name > > #else > > #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name > > +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN32_##name > > #endif > > > > uint32_t psci_ver; > > @@ -60,6 +63,24 @@ void call_psci_cpu_off(void) > > } > > } > > > > +int call_psci_system_suspend(void) > > +{ > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + struct arm_smccc_res res; > > + > > + if ( psci_ver < PSCI_VERSION(1, 0) ) > > + return PSCI_NOT_SUPPORTED; > > + > > + /* 2nd argument (context ID) is not used */ > > + arm_smccc_smc(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND), __pa(hyp_resume)= , &res); > > I think Linux is passing 0 as context ID, probably to mark that it=E2=80= =99s not used, I think we should do the > same Yes, agreed. SYSTEM_SUSPEND takes context_id as the second PSCI argument, and Xen does not use it. I will pass it explicitly as 0 instead of relying on the SMCCC wrapper/default register state. Best regards, Mykola > > > + return PSCI_RET(res); > > +#else > > + dprintk(XENLOG_WARNING, > > + "SYSTEM_SUSPEND not supported (CONFIG_SYSTEM_SUSPEND disab= led)\n"); > > + return PSCI_NOT_SUPPORTED; > > +#endif > > +} > > + > > void call_psci_system_off(void) > > { > > if ( psci_ver > PSCI_VERSION(0, 1) ) > > > > Cheers, > Luca > > > From xen-devel-bounces@lists.xenproject.org Tue May 05 16:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 16:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300884.1575329 (Exim 4.92) (envelope-from ) id 1wKIfx-0008Ud-Jc; Tue, 05 May 2026 16:31:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300884.1575329; Tue, 05 May 2026 16:31:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKIfx-0008UW-Ge; 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Tue, 05 May 2026 20:04:30 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa312d-af86-0a2a45020019-a065830883d0-3 for ; Tue, 05 May 2026 20:04:30 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id A564342A8FEC; Tue, 5 May 2026 14:03:36 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/3] Sphinx docs: Design Document for NUMA node-affine claim sets Date: Tue, 5 May 2026 19:03:09 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778004270-B3B60161-4CC5D9D5/0/0 X-purgate-type: clean X-purgate-size: 5350 Dear reviewers, This updated design document forms the basis of the NUMA claims v7 series and is intended to serve as a reference during review. It extends Xen's memory claim design to support installing claim sets spanning multiple NUMA nodes atomically. As Roger Pau Monné suggested: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. This design documents that model in detail and is integrated into the Sphinx site below Hypervisor Guide -> Design Documents -> NUMA Claims. The rendered design document is available here for review: https://xen.kaindl.dev/claims-v7-design-master/designs/claims/ The Sphinx site can be built and viewed locally as follows: git pull git@gitlab.com:bernhardkaindl/xen.git claims-v7-design-master make -C docs sphinx-env-build # xdg-open docs/sphinx/html/index.html or start a minimal HTTP server: (cd docs/sphinx/html; python -m http.server) Changes since v6 ---------------- The review comments from v6 have been incorporated. In particular, Jan noted that "global" is ambiguous in this context, and following his suggestion, this series adopts the term host claims (short for host-wide claims) found here: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00026.html The helper names have also been adjusted to make domain scope explicit and to keep the release/set/get operations named consistently: - deduct_global_claims() -> domain_release_host_claims() - deduct_node_claims() -> domain_release_node_claims() - domain_set_outstanding_pages() -> domain_set_claim_entries() - new: domain_get_claim_entries() This version also keeps the new code minimal for review and avoids functional duplication. domain_set_claim_entries() now also handles the legacy XENMEM_claim_pages interface for backwards compatibility, replacing domain_set_outstanding_pages(). Best regards, Bernhard Bernhard Kaindl (3): Sphinx docs: Rearrange the design docs into a new dedicated design index Sphinx docs: Enable autosectionlabels and Mermaid support Sphinx docs: Design Document for NUMA node affine claim sets .readthedocs.yaml | 2 +- docs/conf.py | 21 + docs/{misc => designs}/cache-coloring.rst | 4 +- docs/designs/claims/accounting.rst | 331 +++++++++++++++ docs/designs/claims/design.rst | 243 +++++++++++ docs/designs/claims/development.rst | 197 +++++++++ docs/designs/claims/implementation.rst | 393 ++++++++++++++++++ docs/designs/claims/index.rst | 48 +++ docs/designs/claims/installation.rst | 70 ++++ docs/designs/claims/invariants.mmd | 35 ++ docs/designs/claims/performance.rst | 33 ++ docs/designs/claims/protection.rst | 200 +++++++++ docs/designs/claims/redeeming.rst | 71 ++++ docs/designs/claims/terminology.rst | 138 ++++++ docs/designs/claims/use-cases.rst | 39 ++ docs/designs/index.rst | 17 + docs/designs/launch/hyperlaunch.rst | 4 +- docs/designs/launch/index.rst | 10 + docs/glossary.rst | 12 +- .../dom/DOMCTL_claim_memory-data.mmd | 43 ++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 + .../dom/DOMCTL_claim_memory-workflow.mmd | 23 + docs/guest-guide/dom/DOMCTL_claim_memory.rst | 221 ++++++++++ docs/guest-guide/dom/index.rst | 14 + docs/guest-guide/index.rst | 23 + docs/guest-guide/mem/XENMEM_claim_pages.rst | 102 +++++ docs/guest-guide/mem/index.rst | 12 + docs/hypervisor-guide/index.rst | 12 +- docs/index.rst | 2 - 29 files changed, 2331 insertions(+), 12 deletions(-) rename docs/{misc => designs}/cache-coloring.rst (99%) create mode 100644 docs/designs/claims/accounting.rst create mode 100644 docs/designs/claims/design.rst create mode 100644 docs/designs/claims/development.rst create mode 100644 docs/designs/claims/implementation.rst create mode 100644 docs/designs/claims/index.rst create mode 100644 docs/designs/claims/installation.rst create mode 100644 docs/designs/claims/invariants.mmd create mode 100644 docs/designs/claims/performance.rst create mode 100644 docs/designs/claims/protection.rst create mode 100644 docs/designs/claims/redeeming.rst create mode 100644 docs/designs/claims/terminology.rst create mode 100644 docs/designs/claims/use-cases.rst create mode 100644 docs/designs/index.rst create mode 100644 docs/designs/launch/index.rst create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:06:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:06:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300943.1575356 (Exim 4.92) (envelope-from ) id 1wKK9o-0005fg-LO; Tue, 05 May 2026 18:06:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300943.1575356; Tue, 05 May 2026 18:06:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKK9o-0005fZ-IT; Tue, 05 May 2026 18:06:08 +0000 Received: by outflank-mailman (input) for mailman id 1300943; Tue, 05 May 2026 18:06:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKK9n-0005fT-Dm for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:06:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKK9m-00Aeli-Qh for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:06:06 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa318a-5cb7-0a2a0a5109dd-0a2a45098098-8 for ; Tue, 05 May 2026 20:06:06 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa318d-2497-0a2a45090019-a0658308bdd4-3 for ; Tue, 05 May 2026 20:06:06 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 82D9942A9297; Tue, 5 May 2026 14:05:11 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 1/3] Sphinx docs: Rearrange the design docs into a new dedicated design index Date: Tue, 5 May 2026 19:03:10 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778004366-42573A53-90EB120A/0/0 X-purgate-type: clean X-purgate-size: 4434 The Hyperlaunch Design Documents were stated as needing rearranging. Rearrange them inside the Hypervisor Guide and fix the bug where one got the title "1 Hypervisor Design Document". This also serves as first small step to clean up the main menu of the Sphinx documentation. Signed-off-by: Bernhard Kaindl --- Preview of the improved menu structure for design documents: https://xen.kaindl.dev/arrange-hyperlaunch-design/ --- docs/{misc => designs}/cache-coloring.rst | 4 ++-- docs/designs/index.rst | 16 ++++++++++++++++ docs/designs/launch/hyperlaunch.rst | 4 ++-- docs/designs/launch/index.rst | 10 ++++++++++ docs/hypervisor-guide/index.rst | 12 ++++++++++-- docs/index.rst | 2 -- 6 files changed, 40 insertions(+), 8 deletions(-) rename docs/{misc => designs}/cache-coloring.rst (99%) create mode 100644 docs/designs/index.rst create mode 100644 docs/designs/launch/index.rst diff --git a/docs/misc/cache-coloring.rst b/docs/designs/cache-coloring.rst similarity index 99% rename from docs/misc/cache-coloring.rst rename to docs/designs/cache-coloring.rst index e156062aa207..0c078e29463e 100644 --- a/docs/misc/cache-coloring.rst +++ b/docs/designs/cache-coloring.rst @@ -1,7 +1,7 @@ .. SPDX-License-Identifier: CC-BY-4.0 -Xen cache coloring user guide -============================= +Cache Coloring +============== The cache coloring support in Xen allows to reserve Last Level Cache (LLC) partitions for Dom0, DomUs and Xen itself. Currently only ARM64 is supported. diff --git a/docs/designs/index.rst b/docs/designs/index.rst new file mode 100644 index 000000000000..54d45c2bc321 --- /dev/null +++ b/docs/designs/index.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Design documents +================ + +Design documents and implementation details for the Xen hypervisor. + +These are intended for developers working on the Xen hypervisor, +and for those interested in the internal workings of Xen. + +.. toctree:: + :maxdepth: 2 + :numbered: 4 + + launch/index + cache-coloring diff --git a/docs/designs/launch/hyperlaunch.rst b/docs/designs/launch/hyperlaunch.rst index 3bed36f97637..aa7c2798a380 100644 --- a/docs/designs/launch/hyperlaunch.rst +++ b/docs/designs/launch/hyperlaunch.rst @@ -2,8 +2,6 @@ Hyperlaunch Design Document ########################### -.. sectnum:: :depth: 4 - This post is a Request for Comment on the included v4 of a design document that describes Hyperlaunch: a new method of launching the Xen hypervisor, relating to dom0less and work from the Hyperlaunch project. We invite discussion of this @@ -13,6 +11,8 @@ Xen Development mailing list. .. contents:: :depth: 3 + :backlinks: entry + :local: Introduction diff --git a/docs/designs/launch/index.rst b/docs/designs/launch/index.rst new file mode 100644 index 000000000000..afd845296d30 --- /dev/null +++ b/docs/designs/launch/index.rst @@ -0,0 +1,10 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Hyperlaunch +=========== + +.. toctree:: + :maxdepth: 2 + + hyperlaunch + hyperlaunch-devicetree diff --git a/docs/hypervisor-guide/index.rst b/docs/hypervisor-guide/index.rst index 520fe01554ab..9c8033305549 100644 --- a/docs/hypervisor-guide/index.rst +++ b/docs/hypervisor-guide/index.rst @@ -1,11 +1,19 @@ .. SPDX-License-Identifier: CC-BY-4.0 -Hypervisor documentation -======================== +Hypervisor Guide +================ + +The Hypervisor Guide provides an overview of the Xen hypervisor's +architecture and design, covering its core components, features, +and how it manages resources for :term:`guest` domains. + +It serves as a comprehensive reference for developers and users interested +in understanding the inner workings of the Xen hypervisor. .. toctree:: :maxdepth: 2 + ../designs/index code-coverage x86/index diff --git a/docs/index.rst b/docs/index.rst index bd87d736b9c3..6b04a077cebd 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -62,8 +62,6 @@ Documents in need of some rearranging. .. toctree:: :maxdepth: 2 - designs/launch/hyperlaunch - designs/launch/hyperlaunch-devicetree misc/xen-makefiles/makefiles misra/index fusa/index -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:06:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:06:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300955.1575365 (Exim 4.92) (envelope-from ) id 1wKKAS-00069O-SI; Tue, 05 May 2026 18:06:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300955.1575365; Tue, 05 May 2026 18:06:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKAS-00069H-PL; Tue, 05 May 2026 18:06:48 +0000 Received: by outflank-mailman (input) for mailman id 1300955; Tue, 05 May 2026 18:06:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKAQ-00068o-To for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:06:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKKAQ-00HQem-Ah for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:06:46 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa31ad-5cb7-0a2a0a5109dd-0a2a4503b9ba-20 for ; Tue, 05 May 2026 20:06:46 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa31b5-672d-0a2a45030019-a06583098e58-3 for ; Tue, 05 May 2026 20:06:46 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 27A5081E0C2D; Tue, 5 May 2026 14:05:41 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/3] Sphinx docs: Enable autosectionlabels and Mermaid support Date: Tue, 5 May 2026 19:03:11 +0100 Message-Id: <1d0e98b9002dcb12765a51ae43a55d00e7cc1691.1778004073.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778004406-A2378938-B9FDAE60/0/0 X-purgate-type: clean X-purgate-size: 2055 Enable sphinx.ext.autosectionlabel which allows referencing sections using their title, without needing to add explicit labels to each section and enable support for Mermaid diagrams for design documents. Signed-off-by: Bernhard Kaindl --- .readthedocs.yaml | 2 +- docs/conf.py | 21 +++++++++++++++++++++ 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/.readthedocs.yaml b/.readthedocs.yaml index d3aff7662ebf..c61d5eb74107 100644 --- a/.readthedocs.yaml +++ b/.readthedocs.yaml @@ -12,7 +12,7 @@ build: jobs: post_install: # Instead of needing a separate requirements.txt - - python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme + - python -m pip install --upgrade --no-cache-dir sphinx-rtd-theme sphinxcontrib-mermaid sphinx: configuration: docs/conf.py diff --git a/docs/conf.py b/docs/conf.py index 2fb8bafe6589..8aeab17a1a83 100644 --- a/docs/conf.py +++ b/docs/conf.py @@ -63,6 +63,27 @@ needs_sphinx = '1.4' # ones. extensions = [] + +# autosectionlabel allows referencing sections using their title, without +# needing to add explicit labels to each section. Used by design documents. +extensions.append("sphinx.ext.autosectionlabel") +# Setting autosectionlabel_prefix_document to True allows disambiguating +# between sections with the same title in different documents by prefixing +# the label with the document path. +autosectionlabel_prefix_document = True + + +# Mermaid diagrams are used in the design documents, so we try to +# load the extension if it's available, but don't fail if it's not: +try: + import sphinxcontrib.mermaid + + extensions.append("sphinxcontrib.mermaid") + # For included Mermaid diagram files, init the extension explicitly. + mermaid_init_js = "mermaid.initialize({ startOnLoad: true });" +except ImportError: + pass + # Add any paths that contain templates here, relative to this directory. templates_path = ['_templates'] -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:07:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:07:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1300975.1575373 (Exim 4.92) (envelope-from ) id 1wKKBK-0006ht-4K; Tue, 05 May 2026 18:07:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1300975.1575373; Tue, 05 May 2026 18:07:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKBK-0006hm-1W; Tue, 05 May 2026 18:07:42 +0000 Received: by outflank-mailman (input) for mailman id 1300975; Tue, 05 May 2026 18:07:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKKBI-0006hQ-3C for xen-devel@lists.xenproject.org; Tue, 05 May 2026 18:07:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKKBH-00AewW-GX for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:07:39 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa31b2-2eae-0a2a0a5409dd-0a2a45099292-38 for ; Tue, 05 May 2026 20:07:39 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa31ea-2497-0a2a45090019-a06583098070-3 for ; Tue, 05 May 2026 20:07:38 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 1741C81E0C37; Tue, 5 May 2026 14:06:34 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 3/3] Sphinx docs: Design Document for NUMA node affine claim sets Date: Tue, 5 May 2026 19:03:12 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778004459-400AB9F3-9B7EB872/3/8697954094 X-purgate-type: clean.bounce X-purgate-size: 107997 This design extends Xen's memory claim handling to support claim sets spanning multiple NUMA nodes. Roger Pau Monné described it as: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. This design documents this model in detail and is integrated into the Sphinx site below Hypervisor Guide -> Design Documents -> NUMA Claims. Signed-off-by: Bernhard Kaindl --- docs/designs/claims/accounting.rst | 331 +++++++++++++++ docs/designs/claims/design.rst | 243 +++++++++++ docs/designs/claims/development.rst | 197 +++++++++ docs/designs/claims/implementation.rst | 393 ++++++++++++++++++ docs/designs/claims/index.rst | 48 +++ docs/designs/claims/installation.rst | 70 ++++ docs/designs/claims/invariants.mmd | 35 ++ docs/designs/claims/performance.rst | 33 ++ docs/designs/claims/protection.rst | 200 +++++++++ docs/designs/claims/redeeming.rst | 71 ++++ docs/designs/claims/terminology.rst | 138 ++++++ docs/designs/claims/use-cases.rst | 39 ++ docs/designs/index.rst | 1 + docs/glossary.rst | 12 +- .../dom/DOMCTL_claim_memory-data.mmd | 43 ++ .../dom/DOMCTL_claim_memory-seqdia.mmd | 23 + .../dom/DOMCTL_claim_memory-workflow.mmd | 23 + docs/guest-guide/dom/DOMCTL_claim_memory.rst | 221 ++++++++++ docs/guest-guide/dom/index.rst | 14 + docs/guest-guide/index.rst | 23 + docs/guest-guide/mem/XENMEM_claim_pages.rst | 102 +++++ docs/guest-guide/mem/index.rst | 12 + 22 files changed, 2269 insertions(+), 3 deletions(-) create mode 100644 docs/designs/claims/accounting.rst create mode 100644 docs/designs/claims/design.rst create mode 100644 docs/designs/claims/development.rst create mode 100644 docs/designs/claims/implementation.rst create mode 100644 docs/designs/claims/index.rst create mode 100644 docs/designs/claims/installation.rst create mode 100644 docs/designs/claims/invariants.mmd create mode 100644 docs/designs/claims/performance.rst create mode 100644 docs/designs/claims/protection.rst create mode 100644 docs/designs/claims/redeeming.rst create mode 100644 docs/designs/claims/terminology.rst create mode 100644 docs/designs/claims/use-cases.rst create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd create mode 100644 docs/guest-guide/dom/DOMCTL_claim_memory.rst create mode 100644 docs/guest-guide/dom/index.rst create mode 100644 docs/guest-guide/mem/XENMEM_claim_pages.rst create mode 100644 docs/guest-guide/mem/index.rst diff --git a/docs/designs/claims/accounting.rst b/docs/designs/claims/accounting.rst new file mode 100644 index 000000000000..cf0aad56a0a8 --- /dev/null +++ b/docs/designs/claims/accounting.rst @@ -0,0 +1,331 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Accounting +########## + +.. contents:: Table of Contents + :local: + +.. note:: + Claims accounting state is only updated while holding the :c:var:`heap_lock`. + See :ref:`designs/claims/accounting:Locking of the claims state` for details + on the locks used to protect the claims accounting state. + +This section formalises the internal state and invariants that Xen must +maintain to ensure correctness. + + +For readers following the design in order, the preceding sections are: + +1. :doc:`/designs/claims/design` introduces the overall model and goals. +2. :doc:`/designs/claims/installation` explains how claim sets are installed. +3. :doc:`/designs/claims/protection` describes how claimed memory is protected + during allocation. +4. :doc:`/designs/claims/redeeming` explains how claims are redeemed when + allocations succeed. + +Overview +^^^^^^^^ + +.. table:: Table 1: Claims accounting: All accesses, Aggregate state, + and invariants protected by :c:var:`heap_lock`. + :widths: auto + + ============ =========================================== ======================= + Level Claims must be lower or equal to the available memory + ============ =========================================== ======================= + Total :c:var:`outstanding_claims` = :c:var:`total_avail_pages` = + + = Aggregate state: + SUM() over all domains: Aggregate state: + SUM(:c:member:`domain.outstanding_pages`) SUM(:c:var:`node_avail_pages`) + + Also, it is the sum of claims + over all nodes: + + = Aggregate state: + SUM(:c:expr:`node_outstanding_claims[*]`) + Node :c:expr:`node_outstanding_claims[node]` :c:expr:`node_avail_pages[node]` + + Aggregate state over all domains: Aggregate of the free + SUM(:c:expr:`domain.claims[node]`) lists of all zones on node + Dom per-node :c:member:`domain.node_claims` = + SUM(:c:expr:`domain.claims[node]`) :c:expr:`node_avail_pages[node]` + Total claims :c:member:`domain.outstanding_pages` :c:var:`total_avail_pages` + Memory limit :c:member:`domain.outstanding_pages` Invariant: must be + + :c:func:`domain_tot_pages` lower or equal to + :c:member:`domain.max_pages` + ============ =========================================== ======================= + + +Total claims and available memory +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + These variables tracking the total claims and available memory in the system + are aggregates of the actual per-node and per-domain values. + + + They are only maintained for efficient checks in the allocator hot paths, to + quickly determine if an allocation can be satisfied from unclaimed memory or + if further checks are needed to determine if the claims of the domain can be + used to free up memory for the allocation. This also ensures that the sum of + all claims never exceeds the total free memory in the system. + + + The number of unclaimed pages across all nodes in the system is derived as + :c:var:`total_avail_pages` minus :c:var:`outstanding_claims`. + This number is then used to: + + - Permit allocation requests if they can be satisfied from unclaimed pages. + - Ensure that the sum of all claims never exceeds the total free memory. + + .. c:var:: unsigned long total_avail_pages + + Total available pages in the system across all NUMA nodes. + It is the aggregate of the per-node available pages: + :c:var:`total_avail_pages` = SUM(:c:expr:`node_avail_pages[MAX_NUMNODES]`) + + .. c:var:: unsigned long outstanding_claims + + The total sum of all claims across all domains. + :c:var:`outstanding_claims` = + SUM(:c:var:`domain.outstanding_pages`) + +Per-node claims and available memory +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. c:var:: unsigned long node_avail_pages[MAX_NUMNODES] + + Available pages for each NUMA node, including both free and claimed pages. + This is used for validating that node claims do not exceed the available + memory on the respective NUMA node. + + .. c:var:: unsigned long node_outstanding_claims[MAX_NUMNODES] + + The total claims across all domains for each NUMA node, indexed by node + ID. This is maintained for efficient checks in the allocator hot paths. + +This diagram illustrates the claims accounting state and the invariants: + +Accounting diagram +^^^^^^^^^^^^^^^^^^ + + .. mermaid:: invariants.mmd + :caption: Diagram: Claims accounting state and invariants + +Claims accounting state for each domain +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. c:struct:: domain + + The main structure representing a domain in Xen. It includes the + claims accounting state for the domain, including both host-wide + and node-specific claims, as well as the maximum page limits for the + domain and the lock protecting the domain's page allocation counts. + + While the domain's page counts are currently `unsigned int`, work is + underway to change them to `unsigned long` to support larger page counts + beyond 16 TB. The code is already designed to anticipate this change and + work with either `unsigned int` or `unsigned long` page counts equally well. + + .. c:member:: unsigned int outstanding_pages + + The domain's total claim, representing the number of pages claimed + for the domain. + + .. c:member:: unsigned int node_claims + + The total of the domain's node-affine claims, maintained for efficient + checks in the allocator hot paths without needing to sum over the + per-node claims each time. It is equal to the sum of + :c:expr:`claims[MAX_NUMNODES]` for all nodes. + + .. c:member:: unsigned int claims[MAX_NUMNODES] + + The domain's claims for each :term:`NUMA node`, indexed by node ID. + + As the storage for ``struct`` :c:struct:`domain` is allocated using a + dedicated page for each domain, this array allows for efficient and + fast storage with direct indexing, without consuming any additional + memory for an extra allocation. + + + The claims for each node are used for NUMA-affine domains to specify + the amount of memory claimed for each node, to ensure that the domain's + claims for each node do not exceed the available memory on that node, + and to allow the allocator to redeem claims from the appropriate nodes + when allocating memory for the domain. + + .. literalinclude:: ../../../xen/common/domain.c + :language: C + :caption: Allocation of the domain structure in ``xen/common/domain.c`` + :start-at: alloc_domain_struct + :end-at: } + :emphasize-lines: 7, 12, 14 + :linenos: + :lineno-match: + + The page allocated for ``struct`` :c:struct:`domain` is large enough + to accommodate this array several times, even beyond the current + :c:macro:`MAX_NUMNODES` limit of 64. It should be sufficient even for + future expansion of the maximum number of supported NUMA nodes if + needed. The allocation has a build-time assertion for safety to ensure + that ``struct`` :c:struct:`domain` fits within the allocated page. + + + The sum of these claims is stored in :c:member:`domain.node_claims` + for efficient checks in the allocator hot paths which need to know + the total number of node claims for the :term:`domain`. + + .. c:member:: unsigned int max_pages + + The maximum number of pages the domain is allowed to claim, set at + domain creation time. + + .. c:member:: rspinlock_t page_alloc_lock + + Lock for checking :c:func:`domain_tot_pages` on top of new claims + against :c:member:`domain.max_pages` when installing these new claims. + This is a recursive spinlock to allow for nested calls into the allocator + while holding it, such as when redeeming claims during page allocation. + It is taken before :c:var:`heap_lock` when installing claims to ensure a + consistent locking order and must not be taken while holding + :c:var:`heap_lock` to avoid deadlocks. + + .. c:member:: nodemask_t node_affinity + + A :c:type:`nodemask_t` representing the set of NUMA nodes the domain + is affine to. This is used for efficient checks in the allocator hot + paths to quickly get the set of nodes a domain is affine to for + memory allocation decisions. + +Claims accounting invariants +^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + Xen must maintain the following invariants at all times to ensure correctness + of claims accounting: + + - For all claims, including node-affine and host-wide claims: + :c:var:`outstanding_claims` :math:`\le` :c:var:`total_avail_pages` + + - For node-specific claims: + :c:expr:`node_outstanding_claims[alloc_node]` :math:`\le` + :c:expr:`node_avail_pages[alloc_node]` + + - For a domain's overall claims: + :c:var:`domain.outstanding_pages` + + :c:var:`domain_tot_pages` :math:`\le` :c:var:`domain.max_pages` + + See :doc:`redeeming` for more information on this invariant. + +Constants +^^^^^^^^^ + + .. c:macro:: MAX_NUMNODES + + The maximum number of NUMA nodes supported by Xen. Used for validating + node IDs in the :c:type:`memory_claim_t` entries of claim sets. + When Xen is built without NUMA support, it is 1. + + The default on x86_64 is 64 which is sufficient for current hardware and + allows for efficient storage of e.g. the :c:var:`node_online_map` for + online nodes and :c:member:`domain.node_affinity` in a single 64-bit value, + and in the :c:expr:`domain.claims[MAX_NUMNODES]` array. + + ``xen/arch/Kconfig`` limits the maximum number of NUMA nodes to 64. While + Xen can be compiled for up to 254 nodes, configuring machines to split + the installed memory into more than 64 nodes would be unusual. + For example, dual-socket servers, even when using multiple chips per CPU + package should typically be configured for 2 NUMA nodes by default. + + .. c:var:: nodemask_t node_online_map + + A bitmap representing which NUMA nodes are currently online in the system. + This is used for validating that claims are only made for online nodes and + for efficient checks in the allocator hot paths to quickly determine which + nodes are online. Currently, Xen does not support hotplug of NUMA nodes, + so this is set at boot time based on the platform firmware configuration + and does not change at runtime. + +Types +^^^^^ + + .. c:type:: uint8_t nodeid_t + + Type for :term:`NUMA node` IDs. It is passed to Xenctrl using the + :c:var:`mem_flags` argument of :c:func:`xc_domain_populate_physmap()` + and passed to Xen in this form. + + It allocates 8 bits in the flags for the node ID, which limits the + theoretical maximum value of :c:macro:`CONFIG_NR_NUMA_NODES` at 254 + (255 is :c:macro:`NUMA_NO_NODE`), which is far beyond the current + maximum of 64 supported by Xen and should be sufficient for all + practical purposes. This also allows for efficient storage of NUMA + nodes in arrays indexed by node ID and in :c:type:`nodemask_t` bitmaps + :c:var:`node_online_map` and :c:member:`domain.node_affinity` for + efficient checks in the allocator hot paths. + + .. c:type:: nodemask_t + + A bitmap representing a set of NUMA nodes, used for status information + like :c:var:`node_online_map` and the :c:member:`domain.node_affinity`, + and to track which nodes are online and which nodes are in a domain's + node affinity. + +Memflags +^^^^^^^^ + + .. c:type:: memflags + + Flags for memory allocation requests that can affect the allocation + behaviour, such as node preference and whether the request is for an + exact node. + + .. c:macro:: MEMF_no_owner + + Flag for memory allocation requests to indicate that the allocation + shall not be owned by a domain, and as part of that, + :c:macro:`MEMF_no_refcount` is also set. + + .. c:macro:: MEMF_no_refcount + + Flag for memory allocation requests to indicate that the request is not + reference-counted to a domain's memory allocation state, and as part of + that, claims of a domain cannot be used to protect and redeem the + allocation using claims. This is used for requests which are not for + domains or which explicitly bypass reference-counting for other reasons. + + .. c:macro:: MEMF_no_scrub + + Flag for memory allocation requests to indicate that the allocated memory + should not be scrubbed (zeroed) before being used. This is used for + performance reasons for certain types of allocations where the caller + guarantees that the memory will be properly initialized before use. + +Locking of the claims state +^^^^^^^^^^^^^^^^^^^^^^^^^^^ + + .. :c:member:: domain.page_alloc_lock + + If :c:var:`domain.page_alloc_lock` is needed, e.g. to check + :c:func:`domain_tot_pages` on top of new claims against + :c:var:`domain.max_pages` for the domain, it needs to be taken before + :c:var:`heap_lock` for consistent locking order to avoid deadlocks. + + .. c:var:: spinlock_t heap_lock + + Lock for all heap operations including claims. It protects the claims + state and invariants from concurrent updates and ensures that checks + in the allocator hot paths see a consistent view of the claims state. + +Helper functions +^^^^^^^^^^^^^^^^ + + .. c:function:: inline unsigned int domain_tot_pages(struct domain *d) + + :param d: The domain for which to calculate the total pages. + :type d: struct domain * + :returns: The total pages allocated to the domain. + + This function is used for validating that an allocation and the domain's + claims do not exceed :c:member:`domain.max_pages`. diff --git a/docs/designs/claims/design.rst b/docs/designs/claims/design.rst new file mode 100644 index 000000000000..882dc3c5c1f1 --- /dev/null +++ b/docs/designs/claims/design.rst @@ -0,0 +1,243 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +############# +Claims Design +############# + +.. contents:: Table of Contents + :backlinks: entry + :local: + +************ +Introduction +************ + +Xen's page allocator supports a :term:`claims` API that allows privileged +:term:`domain builders` to reserve a quantity of available memory before +:term:`populating` the :term:`guest physical memory` of new :term:`domains` +they are creating, configuring, and building. + +These reservations are called :term:`claims`. They ensure that the claimed +memory remains available for the :term:`domains` when allocating it, even if +other :term:`domains` are allocating memory at the same time. + +:term:`Installing claims` is a privileged operation performed by +:term:`domain builders` before they populate the :term:`guest physical memory`. +This prevents other :term:`domains` from allocating memory earmarked for +:term:`domains` under construction. Xen maintains the per-domain claim state +for pages that are claimed but not yet allocated. + +When claim installation succeeds, Xen updates the claim state to reflect the +new targets and protects the claimed memory until it is allocated or the claim +is released. As Xen allocates pages for the domain, claims are redeemed by +reducing the claim state by the size of each allocation. + +************ +Design Goals +************ + +The design's primary goals are: + +1. Allow :term:`domain builders` to claim memory + on multiple :term:`NUMA nodes` using a :term:`claim set` atomically. + +2. Preserve the existing :c:macro:`XENMEM_claim_pages` hypercall command + for compatibility with existing :term:`domain builders` and its legacy + semantics, while introducing a new, unrestricted hypercall command for + new use cases such as NUMA-aware claim sets. + +3. Host-wide claims are supported for compatibility with existing + :term:`domain builders` and for use cases where a flexible claim that + can exists in the level of the host is desirable. + + It means the global outstanding claims count of the host is not obsolete + and needs to be maintained as it needs to account for such host-wide claims. + +4. Use fast allocation-time claims protection in the allocator's hot paths + to protect claimed memory from parallel allocations by other domain + builders in case of parallel domain builds, and to protect claimed + memory from all other allocations as well. + +*************** +Design Overview +*************** + +The legacy :c:macro:`XENMEM_claim_pages` hypercall is superseded by +:c:macro:`XEN_DOMCTL_claim_memory`. This hypercall installs a :term:`claim set`. +It is an array of :c:type:`memory_claim_t` entries, where each entry specifies +a page count and a target: either a specific NUMA node ID or a selector. + +Like legacy claims, claim sets are validated and installed under +:c:member:`domain.page_alloc_lock` and :c:var:`heap_lock`: Either the entire +set is accepted, or the request fails with no side effects. Repeated calls +to install claims replace any existing claims for the domain rather than +accumulating. + +As installing claim sets after allocations is not a supported use case, +the legacy behaviour of subtracting existing allocations from installed +claims is somewhat surprising and counterintuitive, and page exchanges +make incremental per-node tracking of already-allocated pages on a per-node +basis difficult. Therefore, claim sets do not retain the legacy behaviour of +subtracting existing allocations, optionally on a per-node basis, from the +installed claims across the individual claim set entries. + +Summary: + +- Legacy domain builders can continue to use the previous (now deprecated) + :c:expr:`XENMEM_claim_pages` hypercall command to install legacy claims. + +- Updated domain builders can take advantage of claim sets to install + NUMA-aware :term:`claims` on multiple :term:`NUMA nodes` and/or claims + that are not bound to specific nodes. It has more intuitive semantics + that do not subtract existing allocations from the installed claims. + Such semantics are also simpler to understand and maintain, and are not + affected by the complexity of tracking existing allocations on a per-node + basis across page exchanges happening concurrently with claim installation + for new domains under construction. + +For readers following the design in order, the next sections cover the +following topics: + +1. :doc:`/designs/claims/installation` explains how claim sets are installed. +2. :doc:`/designs/claims/protection` describes how claimed memory is + protected during allocation. +3. :doc:`/designs/claims/redeeming` explains how claims are redeemed as + allocations succeed. +4. :doc:`/designs/claims/accounting` describes the accounting model that + underpins those steps. + +******************** +Key design decisions +******************** + +.. glossary:: + + :c:expr:`node_outstanding_claims[MAX_NUMNODES]` + Tracks the sum of all claims on a node. :c:func:`get_free_buddy()` checks + it before scanning zones on a node, so claimed memory is protected from + other allocations. + + :c:expr:`redeem_claims_for_allocation()` + When allocating memory for a domain, the page allocator redeems the matching + claims for this allocation, ensuring the domain's total memory allocation as + :c:func:`domain_tot_pages` plus :c:member:`domain.outstanding_pages` remain + within the domain's limits, defined by :c:member:`domain.max_pages`. + See :doc:`redeeming` for details on redeeming claims. + + :c:expr:`domain.outstanding_pages` + It remains the authoritative source for the total outstanding claims of a + domain, and is updated on claim installation and redemption. It includes + both host-wide claims and node-specific claims. + Support for :term:`host-wide claims` is maintained for two reasons: first, + for compatibility with existing domain builders, and second, for use cases + where a flexible claim that can be satisfied from any node is desirable. + + When the preferred NUMA node(s) for a domain do not have sufficient free + memory to satisfy the domain's memory requirements, host-wide claims provide + a flexible fallback for the memory shortfall from the preferred node(s) that + can be satisfied from any available node. + + In this case, :term:`domain builders` can use a combination of passing + the preferred node to :c:func:`xc_domain_populate_physmap()` and + :term:`NUMA node affinity` to steer allocations towards the preferred + NUMA node(s), while letting host-wide claims ensure that the shortfall + is available. + + This allows the domain builder to define a set of desired NUMA nodes to + allocate from and even specify which nodes to prefer for an allocation, + but the claim for the shortfall is flexible, not specific to any node. + +********* +Non-goals +********* + +Using per-node allocator data +============================= + +Some data structures could be moved into the per-node allocator data +allocated by `init_node_heap()` to avoid bouncing those data structures +between nodes. Those can be moved to the per-node allocator data in the +future, but that is not a priority. While that would reduce this bouncing, +it would not eliminate the need to take the global :c:var:`heap_lock`, +which is still needed to protect the allocator's state during allocation +and freeing of pages. + +The synchronisation point for taking the global :c:var:`heap_lock` is +the main point of contention during allocation, freeing and scrubbing +pages. The overhead of accessing the per-node claims accounting data +is expected to be minimal. + +Avoiding the :c:var:`heap_lock` would be difficult to achieve as it +would require updating the page allocator to maintain atomic updates +of a new ``total_unclaimed_pages`` counter, which would be decremented +on allocation and claims installation and incremented on freeing of +pages and claims, and to check that counter in the hot path of the +allocator to protect claimed memory from other allocations. + +However, we aim to move that data into the per-node allocator data in the +future to reduce the need to bounce those data structures between nodes. + +Legacy behaviours +================= + +Installing claims is a privileged operation performed by domain builders +before they populate guest memory. As such, tracking previous allocations +is not in scope for claims. + +For the following reasons, claim sets do not retain the legacy behaviour +of subtracting existing allocations from installed claims: + +- Xen does not currently maintain a ``d->node_tot_pages[node]`` count, + and the hypercall to exchange extents of memory with new memory makes + such accounting relatively complicated. + +- The legacy behaviour is somewhat surprising and counterintuitive. + Because installing claims after allocations is not a supported use case, + subtracting existing allocations at installation time is unnecessary. + +- Claim sets are a new API and can provide more intuitive semantics + without subtracting existing allocations from installed claims. This + also simplifies the implementation and makes it easier to maintain. + +Versioned hypercall +=================== + +The :term:`domain builders` using the :c:macro:`XEN_DOMCTL_claim_memory` +hypercall also need to use other version-controlled hypercalls which +are wrapped through the :term:`libxenctrl` library. + +Wrapping this call in :term:`libxenctrl` is therefore a practical approach; +otherwise, we would have a mix of version-controlled and unversioned +:term:`hypercalls`, which could be confusing for API users and for future +maintenance. + +From the domain builders' viewpoint, it is more consistent to expose +the claims :term:`hypercalls` in the same way as the other calls they use. + +Stable interfaces also have drawbacks: with stable syscalls, Linux needs +to maintain the old interface indefinitely, which can be a maintenance burden +and can limit the ability to make improvements or changes to the interface +in the future. Linux carries many system call successor families, e.g., +``oldstat``, ``stat``, ``newstat``, ``stat64``, ``fstatat``, ``statx``, +with similar examples including ``openat``, ``openat2``, ``clone3``, ``dup3``, +``waitid``, ``mmap2``, ``epoll_create1``, ``pselect6`` and many more. +Glibc hides that complexity from users by providing a consistent API, but it +still needs to maintain the old system calls for compatibility. + +In contrast, versioned :term:`hypercalls` allow for more flexibility and +evolution of the API while still providing a clear path to adopt new features. +The reserved fields and reserved bits in the structures of this hypercall +allow for many future extensions without breaking existing callers. + +***************** +Future extensions +***************** + +The reserved fields and bits in the structures of this +hypercall allow for many future extensions without breaking existing callers. + +Future extensions could include support for claims on superpages, claims for +requests with :c:macro:`MEMF_no_refcount`, which allocate P2M, HAP and so on. + +See :ref:`designs/claims/protection:Callers using MEMF_no_refcount` +for more information. diff --git a/docs/designs/claims/development.rst b/docs/designs/claims/development.rst new file mode 100644 index 000000000000..c4805b2e080d --- /dev/null +++ b/docs/designs/claims/development.rst @@ -0,0 +1,197 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Development +########### + +.. note:: + + This section provides historical context on the development + of NUMA-aware claims, including previous implementations and + feedback received, to give a better understanding of the + design decisions made in the current implementation. + +Version history +--------------- + +The initial `implementation of single-node claims `_ by Alejandro Vallejo +used the legacy claims hypercall :c:macro:`XENMEM_claim_pages` and passed a +NUMA node in the existing NUMA node bits of +:c:expr:`xen_memory_reservation.mem_flags`. This added the flag +``d->claim_node`` to ``struct`` :c:struct:`domain`, which defined the target +node for the domain's claims. + +.. epigraph:: + + Roger Pau Monné reviewed it and proposed an `initial multi-node claim-sets + specification `_ that inspired this design: + + The interface here seems to be focused on domains only being allowed to + allocate from a single node, or otherwise you must first allocate memory + from a node before moving to the next one (which defeats the purpose of + claims?). + + I think we want to instead convert ``d->outstanding_pages`` + into a per-node array, so that a domain can have outstanding + claims for multiple NUMA nodes? + + The hypercall interface becomes a bit awkward then, as the toolstack has + to perform a different hypercall for each memory claim from a different + node (and rollback in case of failure). Ideally we would need to introduce + a new hypercall that allows making claims from multiple nodes in a single + locked region, as to ensure success or failure in an atomic way. + + -- Roger Pau Monné + + This led to the `v2 `_ and `v3 `_ series, adding a new hypercall + API which designated passing an array of claims. This allowed for a more + flexible claim set design targeting multiple NUMA nodes and host-wide claims, + but only supported a single claim per domain at that time. + +.. sidebar:: Feedback and suggestions for multi-node claim sets + + The initial implementations of single-node claims received + feedback from the community, with multiple suggestions to + extend the API to support `multi-node claim sets `_. + This feedback highlighted the need for a more flexible + design that could accommodate claims on multiple NUMA nodes. + +Between v3 and v4, `Roger Pau Monné and Andrew Cooper developed and merged +several critical fixes `_ for Xen's overall claims implementation. +These fixes also allowed Roger to improve the implementation for redeeming +claims during domain memory allocation. With a further suggestion by +Bernhard Kaindl, this enabled a fully working implementation that protected +claimed memory against parallel allocations by other domain builders. + +.. glossary: + +v4 series + With the `v4 series `_, we submitted the combined work that completed the + fixes for protecting claimed memory on NUMA nodes. The review process indicated + that supporting multiple claim sets would require a `redesign `_ of + claim installation and management, which led to this design document. + +v5 series + The `v5 series `_ implemented the `Claim Sets Design Version 1 `_ + with support for multiple claim records per domain, and with a terminology + of "consuming claims" for the process of redeeming claims during domain memory + allocation and "retiring claims" for releasing claims for the low-level + action of reducing the number of claimed pages for redeeming claims for an + allocation, when destroying a domain or when claims must be recalled if all + memory is claimed and then memory is offlined, which is needed to maintain + the invariant that claimed memory can never be larger than free memory. + +v6 series + The `v6 series `_ implemented the `Claim Sets Design Version 2 `_. + The only difference between the two versions is that with design version 2, + the initial term `"consuming claims"` was changed to `"redeeming claims"` + and the term `"retiring claims"` was changed to `"deducting claims"`. + +v7 series +--------- + + The v7 series will implement the `Claim Sets Design Version 3 `_ or newer + with further improvements to the design and implementation: + + 1. As the code often needs the total sum of claims of a domain, this update + keeps :c:member:`domain.outstanding_pages` as the total sum of outstanding + claims of a domain. This obsoletes the former ``d->global_claims`` which + only tracked the unbound claims which were not affine to a NUMA node. + + 2. Avoid code duplication: Replace :c:func:`domain_set_outstanding_pages()`, + which handled the legacy claims hypercall :c:macro:`XENMEM_claim_pages`. + The new claim sets hypercall handler :c:func:`domain_install_claim_set()`, + integrates installing legacy claims for backwards compatibility. + The former :c:func:`domain_set_outstanding_pages()` is removed to + avoid duplicating the logic of installing claims in both places. + + 3. Improve the clarity of function and variable names. For example, the new + hypercall handler :c:func:`domain_install_claim_set()` is more descriptive + of its purpose than the former :c:func:`domain_set_outstanding_pages()`: + + ================================== ======================================= + Former function name New function name + ================================== ======================================= + ``domain_set_outstanding_pages()`` :func:`domain_set_claim_entries()` + :func:`domain_get_claim_entries()` + ``deduct_global_claims()`` :func:`domain_release_host_claims()` + ``deduct_node_claims()`` :func:`domain_release_node_claims()` + ================================== ======================================= + +Testing +------- + +The basis of the `v4 series `_ is included in the XenServer XS9 preview +release, and besides functional product testing, it has been tested to +meet the performance expectation of customers from improved NUMA placement. + +With the `v6 series `_, a comprehensive set of functional system tests +was added to the submission. Also, `a separate host-side integration test +suite `_ for validating the `v6 series `_ was posted. + +Further development +------------------- + +Based on review feedback, there is the wish to normalise the page counts of +the page allocator to ``unsigned long``. A `first patch `_ in this direction +was posted to normalise the types of :c:var:`total_avail_pages` and +:c:var:`outstanding_claims` to ``unsigned long`` in the page allocator. + +Acknowledgements +---------------- + +The claim sets design builds on the single-node claims implementation +described above and the feedback it generated. The following people +should be acknowledged for their contributions: + +- *Edwin Török* for developing the `initial best-effort NUMA placement + feature in the XAPI toolstack `_, which inspired the initial + implementation of NUMA-aware claims, and his work in productizing and + validating the integration of NUMA claims with the XAPI toolstack. + +- *Alejandro Vallejo* for starting the development of the NUMA claims series. + +- *Jan Beulich* for providing review suggestions that led to many improvements. + +- *Roger Pau Monné* for reviewing the initial implementation, `proposing + the initial multi-node claim-sets specification <_v1>`_, developing and + merging `critical fixes `_ upstream that enabled product-quality + support for single-node claims which is the basis of the multi-node + claim sets implementation. + +- *Andrew Cooper* for integrating and validating the work internally, + helping to stabilise and productise the single-node implementation. + +- *Bernhard Kaindl* for collaborating on the single-node implementation, + developing the claim sets hypercall since version 2, designing and + implementing the multi-node claim sets design, the functional system-level + test suite and the host-side integration test suite for validating the + claim sets implementation. + +- *Marcus Granado* for leading the development effort inside XenServer for + productising the single-node claims implementation, for providing feedback + and suggestions for improving the design and implementation. This included + coordinating the work of multiple contributors and stakeholders, integrating + the work into XenServer products and ensuring it meets customer requirements. + +.. _xapi: https://xapi-project.github.io/new-docs/toolstack/features/NUMA +.. _fix1: + https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00164.html +.. _v1: + https://patchew.org/Xen/20250314172502.53498-1-alejandro.vallejo@cloud.com/ +.. _v1m: + https://lists.xenproject.org/archives/html/xen-devel/2025-06/msg00484.html +.. _v2: https://lists.xen.org/archives/html/xen-devel/2025-08/msg01076.html +.. _v3: https://patchew.org/Xen/cover.1757261045.git.bernhard.kaindl@cloud.com/ +.. _v4: + https://lists.xenproject.org/archives/html/xen-devel/2026-02/msg01387.html +.. _v4-03: https://patchwork.kernel.org/project/xen-devel/ + patch/6927e45bf7c2ce56b8849c16a2024edb86034358.1772098423 + .git.bernhard.kaindl@citrix.com/ +.. _d1: + https://bernhard-xen.readthedocs.io/en/claim-sets-v1-design/designs/claims +.. _d2: + https://bernhard-xen.readthedocs.io/en/claim-sets-v2-design/designs/claims +.. _v5: https://patchwork.kernel.org/project/xen-devel/list/?series=1078053 +.. _v6: https://patchwork.kernel.org/project/xen-devel/list/?series=1081139 +.. _tv2: https://patchwork.kernel.org/project/xen-devel/list/?series=1083329 +.. _u1: https://patchwork.kernel.org/project/xen-devel/list/?series=1084344 diff --git a/docs/designs/claims/implementation.rst b/docs/designs/claims/implementation.rst new file mode 100644 index 000000000000..ed8ed82877af --- /dev/null +++ b/docs/designs/claims/implementation.rst @@ -0,0 +1,393 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Implementation +############## + +.. contents:: Table of Contents + :backlinks: entry + :local: + +.. note:: This part describes implementation details of claims and their + interaction with memory allocation in Xen. It covers the functions and + data structures involved in :term:`installing claims` and allocating memory + with :term:`claims`. + +Functions related to the implementation of claims and their interaction +with memory allocation. + +********************** +Installation of claims +********************** + +This section describes the functions and data structures involved in +:term:`installing claims` for domains, and the internal functions for +validating and installing claim sets. + + .. c:function:: int domain_set_outstanding_pages(domain, pages) + + This function is replaced by :c:func:`domain_set_claim_entries()`. + + .. c:function:: int domain_set_claim_entries(domain, nr_entries, claim_set) + + :param domain: The domain for which to set the node claims + :param nr_entries: The number of claims in the claim set + :param claim_set: The claim set to install for the domain + :type domain: struct domain * + :type nr_entries: unsigned int + :type claim_set: memory_claim_t * + :returns: 0 on success, or a negative error code on failure. + + Handles :term:`installing claim sets`. It performs validation of the + :term:`claim set` and updates the domain's claims accordingly. + + The function works in four phases: + + 1. Validate claim entries and check node-specific claims availability + 2. Validate the host-wide request against the remaining availability + 3. Reset any current claims of the domain + 4. Install the claim set as the domain's claiming state + + Phase 1 checks claim entries for validity and memory availability: + + 5. Target must be :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_TOTAL` or a node. + 6. Each target node may only appear once in the claim set. + 7. For node-specific claims, requested pages must not exceed the + available memory on that node after accounting for existing claims. + 8. The explicit padding field must be zero for forward compatibility. + + Phase 2 checks: + + 9. The total sum of the requested pages must not exceed the total + unclaimed memory of the host after accounting for existing claims. + 10. The claims must not exceed the :c:member:`domain.max_pages` limit. + See :doc:`accounting` and :doc:`redeeming` for the accounting + checks that enforce the domain's :c:member:`domain.max_pages` limit. + + .. versionadded:: claims-v5 + + .. c:function:: int domain_get_claim_entries(domain, nr_entries, claim_set) + + :param domain: The domain for which to retrieve a claim set + :param nr_entries: The number of claims in the claim set + :param claim_set: The preallocated buffer for up to nr_entries claim entries + :type domain: struct domain * + :type nr_entries: unsigned int * + :type claim_set: memory_claim_t * + :returns: 0 on success with nr_entries updated to the number of claims + written to the buffer, or a negative error code on failure. + + Retrieves a claim set for the current claims of the domain and writes + it to the provided buffer. The number of claims written to the buffer + is stored in the variable pointed to by ``nr_entries``. + + ``nr_entries`` specifies the size of the provided buffer for claim + entries, and the function writes up to that many claim entries to + the buffer. If the buffer is too small to hold all claim entries, + the function returns -:c:macro:`ERANGE` and updates ``nr_entries`` + to the number of entries needed to hold all claim entries. + + .. versionadded:: claims-v7 + +************************************ +Helper functions for managing claims +************************************ + + .. c:function:: unsigned long domain_release_host_claims(domain, release) + + :param domain: The domain for which to release host-wide claims + :param release: The number of pages to release + :type domain: struct domain * + :type release: unsigned long + :returns: The number of host-wide pages actually deducted from the domain. + + This function releases the specified number of host-wide claims. + It limits the release to the number of host-wide claims actually held by + the domain and updates the overall claim state accordingly. + + .. versionadded:: claims-v4 + + .. c:function:: unsigned long domain_release_node_claims(domain, node, release) + + :param domain: The domain for which to release the node claims + :param node: The node for which to release the claim + :param release: The number of pages to release from the claim + :type domain: struct domain * + :type node: nodeid_t + :type release: unsigned long + :returns: The number of pages actually deducted from the domain's claim. + + This function deducts a specified number of pages from a domain's + claim on a specific node. It limits the release to the number of + pages actually claimed by the domain on that node and updates the + node-local claims currently held by the domain on that node, + and it updates the host-wide and node-specific claim state accordingly. + + .. versionadded:: claims-v5 + + .. c:function:: void domain_recall_node_claims(domain, recall) + + :param domain: The domain for which to recall node claims + :param recall: The number of node-specific pages to recall + :type domain: struct domain * + :type recall: unsigned long + + This function recalls the specified number of node-specific claims + from the domain and updates the overall claim state accordingly. + + It iterates over the domain's node-specific claims, calls + :c:func:`domain_release_node_claims()` to up to the given pages from + the node claims until the specified number of pages has been recalled, + or all node-specific claims have been exhausted. + + This function is used to recall node-specific claims from a domain when + offlining memory or when pages for a domain are allocated on other + nodes than the claimed node. + + .. versionadded:: claims-v5 + +********************** +Allocation with claims +********************** + +The functions below play a key role in allocating memory for domains. + + .. c:function:: int xc_domain_populate_physmap(xch, domid, extents, order, \ + mem_flags, extent_start) + + :param xch: The :term:`libxenctrl` interface + :param domid: The ID of the domain + :param extents: Number of extents + :param order: Order of the extents + :param mem_flags: Allocation flags + :param extent_start: Starting PFN + :type xch: xc_interface * + :type domid: uint32_t + :type extents: unsigned long + :type order: unsigned int + :type mem_flags: unsigned int + :type extent_start: xen_pfn_t * + :returns: 0 on success, or a negative error code on failure. + + This function is a wrapper for the ``XENMEM_populate_physmap`` hypercall, + which is handled by the :c:func:`populate_physmap()` function in the + hypervisor. It is used by :term:`libxenguest` for populating the + :term:`guest physical memory` of a domain. :term:`domain builders` can + set the :term:`NUMA node affinity` and pass the preferred node to this + function to steer allocations towards the preferred NUMA node(s) and let + :term:`claims` ensure that the memory will be available even in cases + of :term:`parallel domain builds` where multiple domains are being built + at the same time. + +The :term:`meminit` API calls :c:func:`xc_domain_populate_physmap()` +for populating the :term:`guest physical memory`. It invokes the restartable +``XENMEM_populate_physmap`` hypercall implemented by +:c:func:`populate_physmap()`. + +.. c:function:: void populate_physmap(struct memop_args *a) + + :param a: Provides status and hypercall restart info + :type a: struct memop_args * + + Allocates memory for building a domain and uses it for populating the + :term:`physmap`. For allocation, it uses + :c:func:`alloc_domheap_pages()`, which forwards the request to + :c:func:`alloc_heap_pages()`. + + During domain creation, it adds the :c:macro:`MEMF_no_scrub` flag to the request + for populating the :term:`physmap` to optimise domain startup by allowing + the use of unscrubbed pages. + + When that happens, it scrubs the pages as needed using hypercall + continuation to avoid long hypercall latency and watchdog timeouts. + + Domain builders can optimise on-demand scrubbing by running + :term:`physmap` population pinned to the domain's NUMA node, + keeping scrubbing local and avoiding cross-node traffic. + +.. c:function:: struct page_info *alloc_heap_pages(unsigned int zone_lo, \ + unsigned int zone_hi, \ + unsigned int order, \ + unsigned int memflags, \ + struct domain *d) + + :param zone_lo: The lowest zone index to consider for allocation + :param zone_hi: The highest zone index to consider for allocation + :param order: The order of the pages to allocate (2^order pages) + :param memflags: Memory allocation flags that may affect the allocation + :param d: The domain for which to allocate memory or NULL + :type zone_lo: unsigned int + :type zone_hi: unsigned int + :type order: unsigned int + :type memflags: unsigned int + :type d: struct domain * + :returns: The allocated page_info structure, or NULL on failure + + This function allocates a contiguous block of pages from the heap. + It checks claims and available memory before attempting the + allocation. On success, it updates relevant counters and redeems + claims as necessary. + + It first checks whether the request can be satisfied given the domain's + claims and available memory using :c:func:`claims_permit_request()`. + If claims and availability permit the request, it calls + :c:func:`get_free_buddy()` to find a suitable block of free pages + while respecting node and zone constraints. + + Simplified pseudocode of its logic: + +.. code:: C + + struct page_info *alloc_heap_pages(unsigned int zone_lo, + unsigned int zone_hi, + unsigned int order, + unsigned int memflags, + struct domain *d) { + /* D's claims and available memory need to permit the request. */ + if (!claims_permit_request(1UL << order, total_avail_pages, memflags, + NUMA_NO_NODE, d, outstanding_claims)) + return NULL; + + /* Find a suitable buddy block. Pass the zone range, order and + * memflags so the helper can apply node and zone selection. */ + pg = get_free_buddy(zone_lo, zone_hi, order, memflags, d); + if (!pg) + return NULL; + + redeem_claims_for_allocation(d, 1UL << order, node_of(pg)); + update_counters_and_stats(d, order); + if (pg_has_dirty_pages(pg)) + scrub_dirty_pages(pg); + return pg; + } + +.. c:function:: struct page_info *get_free_buddy(zone_lo, zone_hi, order, \ + memflags, domain) + + :param zone_lo: The lowest zone index to consider for allocation + :param zone_hi: The highest zone index to consider for allocation + :param order: The order of the pages to allocate (2^order pages) + :param memflags: Flags for conducting the allocation + :param domain: domain to allocate memory for or NULL + :type zone_lo: unsigned int + :type zone_hi: unsigned int + :type order: unsigned int + :type memflags: unsigned int + :type domain: struct domain * + :returns: The allocated page_info structure, or NULL on failure + + This function finds a suitable block of free pages in the buddy + allocator while respecting claims and node-level available memory. + + Called by :c:func:`alloc_heap_pages()` after verifying the request is + permissible, it iterates over nodes and zones to find a buddy block + that satisfies the request. It checks node-local claims before + attempting allocation from a node. + + Using :c:func:`claims_permit_request()`, it checks whether the node + has enough unclaimed memory to satisfy the request or whether the + domain's claims can permit the request on that node after accounting + for outstanding claims. + + If the node can satisfy the request, it searches for a suitable block + in the specified zones. If found, it returns the block; otherwise it + tries the next node until all online nodes are exhausted. + + Simplified pseudocode of its logic: + +.. code:: C + + /* + * preferred_node_or_next_node() represents the policy to first try the + * preferred/requested node then fall back to other online nodes. + */ + struct page_info *get_free_buddy(unsigned int zone_lo, + unsigned int zone_hi, + unsigned int order, + unsigned int memflags, + const struct domain *d) { + nodeid_t request_node = MEMF_get_node(memflags); + + /* + * Iterate over candidate nodes: start with preferred node (if any), + * then try other online nodes according to the normal placement policy. + */ + while (there are more nodes to try) { + nodeid_t node = preferred_node_or_next_node(request_node); + unsigned long avail_pages = node_avail_pages[node] - + node_outstanding_claims[node] + + ((d && !(memflags & MEMF_no_refcount)) + ? d->claims[node] : 0); + + /* Ensure the target node and the claims permit can this allocation */ + if ( avail_pages < (1UL << order) ) + goto next_node; + + /* Find a zone on this node with a suitable buddy */ + for (int zone = highest_zone; zone >= lowest_zone; zone--) + for (int j = order; j <= MAX_ORDER; j++) + if ((pg = remove_head(&heap(node, zone, j))) != NULL) + return pg; + next_node: + if (request_node != NUMA_NO_NODE && (memflags & MEMF_exact_node)) + return NULL; + /* Fall back to the next node and repeat. */ + } + return NULL; + } + +.. note:: The actual implementation includes additional details + but the pseudocode captures the core logic of checking claims + and available memory while searching for a suitable buddy. + +************************************** +Offlining memory in presence of claims +************************************** + +When offlining pages, Xen must ensure that available memory on a node +and the total number of free pages does not fall below their respective +outstanding claims. If it does, Xen recalls claims from domains until +accounting is valid again. + +This is triggered by privileged domains via the +``XEN_SYSCTL_page_offline_op`` sysctl or by machine-check memory errors. + +Offlining currently allocated pages cannot remove those in-use pages from +circulation. They are marked for offlining and are offlined when freed back +to the allocator. However, when already free pages are directly offlined, +free memory the outstanding claims may need to be adjusted directly too. + +:c:func:`reserve_offlined_page()` needs to check whether offlining the page +causes :c:var:`total_avail_pages` to fall below :c:var:`outstanding_claims` or +:c:expr:`node_avail_pages[page->node]` to fall below +:c:expr:`node_outstanding_claims[page->node]`. If so, +:c:func:`reserve_offlined_page()` must look for domains with relevant claims +and recall those claims until the claim accounting is valid again. + +- When + :c:expr:`node_outstanding_claims[page->node]` exceeds + :c:expr:`node_avail_pages[page->node]` for the offlined page, + :c:func:`reserve_offlined_page()` should call + :c:func:`domain_release_node_claims()` + to recall claims on that node from domains with claims on the node of the + offlined buddy until the claim accounting of the node is valid again. + +- When total :c:var:`outstanding_claims` exceeds :c:var:`total_avail_pages`, + :c:func:`reserve_offlined_page()` calls + :c:func:`domain_release_host_claims()` to recall host-wide claims + from domains until the overall claims accounting is valid again. + +This can violate claim guarantees, but it is necessary to maintain system +stability when memory must be offlined. + +.. c:function:: int reserve_offlined_page(struct page_info *head) + + :param head: The page being offlined + :type head: struct page_info * + :returns: 0 on success, or a negative error code on failure. + + This function is called during the offlining process to offline pages. + + If offlining a page causes available memory to fall below outstanding + claims, it checks the node-specific and host-wide claim accounting + and recalls claims from domains as necessary to ensure accounting + invariants hold after a buddy is offlined. diff --git a/docs/designs/claims/index.rst b/docs/designs/claims/index.rst new file mode 100644 index 000000000000..218632c6e22f --- /dev/null +++ b/docs/designs/claims/index.rst @@ -0,0 +1,48 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +NUMA Claims +=========== + +Design and implementation of NUMA-aware claim sets. + +Status: Draft for review + +This design first introduces the external behaviour of claim sets: how claims +are installed, how they protect allocations, and how they are redeemed. +It then covers the underlying accounting model and implementation details. + +For readers following the design in order, the next sections cover these +topics: + +1. :doc:`/designs/claims/use-cases` describes the use cases for claim sets. +2. :doc:`/designs/claims/performance` describes the performance test results. +3. :doc:`/designs/claims/development` provides the development history and future work. +4. :doc:`/designs/claims/design` introduces the overall model and goals. +5. :doc:`/designs/claims/installation` describes how claim sets are installed. +6. :doc:`/designs/claims/protection` describes how claimed memory is + protected during allocation. +7. :doc:`/designs/claims/redeeming` explains how claims are redeemed when + allocations succeed. +8. :doc:`/designs/claims/accounting` describes the accounting model that + underpins those steps. +9. :doc:`/designs/claims/implementation` documents the functions used for the + implementation. +10. :doc:`/designs/claims/terminology` defines the terms used in this design. + +.. toctree:: :caption: Contents + :maxdepth: 2 + + use-cases + performance + development + design + installation + protection + redeeming + accounting + implementation + terminology + +.. contents:: + :backlinks: entry + :local: diff --git a/docs/designs/claims/installation.rst b/docs/designs/claims/installation.rst new file mode 100644 index 000000000000..2073da2c33ee --- /dev/null +++ b/docs/designs/claims/installation.rst @@ -0,0 +1,70 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Installation +############ + +********** +Claim sets +********** + +A claim set is an array of :c:type:`memory_claim_t` entries. + +.. c:type:: memory_claim_t + + The ``typedef`` for :c:type:`xen_memory_claim`, used for + passing an array of claim set entries to the hypervisor. + +.. c:struct:: xen_memory_claim + + Underlying structure for passing claim sets to the hypervisor. + + This structure represents an individual claim entry in a claim set. + It specifies the number of pages claimed and the target of the claim, + which can be a specific NUMA node or a special value for host-wide claims. + + The structure includes padding for future expansion. It is important to + zero-initialise it or use designated initialisers to ensure forward + compatibility. Members are as follows: + + .. c:member:: uint64_aligned_t pages + + Number of pages for this claim entry. + + .. c:member:: uint32_t cmd + + Command field reserved for future use. It must be initialised to 0 + for forward compatibility. + + .. c:member:: uint32_t target + + + The target of the claim entry. It can be a special selector, which could + in the future include flags and additional information, or simply a NUMA + node ID. + + See :ref:`guest-guide/dom/DOMCTL_claim_memory:Hypercall API` + for the defined special selectors and their semantics. + +.. c:type:: uint64_aligned_t + + 64-bit unsigned integer type with alignment requirements suitable for + representing page counts in the claim structure. + +********************** +Claim set installation +********************** + + +Claim set installation is invoked via :c:macro:`XEN_DOMCTL_claim_memory`, and +:c:func:`domain_install_claim_set()` implements the claim set installation logic. + +See :doc:`accounting` for details on the claims accounting state. + +************************* +Legacy claim installation +************************* + +Legacy claims are set via the :c:macro:`XENMEM_claim_pages` hypercall command. + +.. note:: The legacy path is deprecated. + Use :c:macro:`XEN_DOMCTL_claim_memory` for new code. diff --git a/docs/designs/claims/invariants.mmd b/docs/designs/claims/invariants.mmd new file mode 100644 index 000000000000..317c51536ed3 --- /dev/null +++ b/docs/designs/claims/invariants.mmd @@ -0,0 +1,35 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +%% Claim variables and their Invariants +flowchart TD + +subgraph "Access under the heap_lock only:" + direction TB + Memory_of_Nodes --"  Contribute to  "--> Overall_Memory + Overall_Memory --"  Available to  "--> Memory_of_Domains +end + +subgraph Memory_of_Nodes["Per-node claims and available memory"] + direction LR + per_node_claims -->|"  less or equal to  "| node_avail_pages + per_node_claims["Claims on the node: + node_outstanding_claims[n]"] + node_avail_pages["Available pages on the node: + node_avail_pages[n]"] +end + +subgraph Overall_Memory["Overall claims and available memory"] + direction LR + outstanding -->|"  less or equal to  "| avail_pages + outstanding["Total claims on the host: + outstanding_claims"] + avail_pages["Available pages on the host: + total_avail_pages"] +end + +subgraph Memory_of_Domains["Per-domain claims and available memory"] + direction LR + claims -->|"  less or equal to  "| available_memory_for_domains + claims["Claims of the domain:
d->outstanding_pages"] + available_memory_for_domains["Available pages:
node_avail_pages[n] + total_avail_pages"] +end diff --git a/docs/designs/claims/performance.rst b/docs/designs/claims/performance.rst new file mode 100644 index 000000000000..694c97ca3321 --- /dev/null +++ b/docs/designs/claims/performance.rst @@ -0,0 +1,33 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Performance +*********** + +The single-node claims implementation which is the basis of the +NUMA claims v4 series and the multi-node claim sets design forms +the groundwork for the NUMA design and implementation in XenServer 9. + +An early version of it is available as the XenServer XS9 preview +release: https://www.xenserver.com/downloads/xs9-preview. +The performance of this release has been tested in real +customer environments with customer workloads. + +On dual-socket Intel servers, the **average aggregate CPU usage across +all VMs at peak times** (peak user load) was **~16% less** than with +`XenServer 8.4` (overall average at all times **~8.5% less**) compared +to the previous release, which is a significant improvement in CPU +efficiency for memory-intensive workloads, attributed to the +improved NUMA placement enabled by `NUMA-aware claims`. + +The customer's response time metric from their application, which is the +key measure the customer uses for end user observed performance, showed +an ~8% improvement, matching the improvement in average CPU usage. + +These numbers were observed using `Intel dual-socket servers`. +The performance benefits with AMD servers (judging by preliminary tests) are +expected to be considerably higher than the results with dual-socket Intel +servers. + +The multi-node claim sets design is expected to extend these benefits +to configurations that require claiming memory from multiple NUMA nodes +adjacent to each other for optimal performance. diff --git a/docs/designs/claims/protection.rst b/docs/designs/claims/protection.rst new file mode 100644 index 000000000000..c7eec95b99e4 --- /dev/null +++ b/docs/designs/claims/protection.rst @@ -0,0 +1,200 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Protection +########## + +.. contents:: Table of Contents + :backlinks: entry + :local: + +Claimed memory must be protected from allocations without applicable claims +while remaining available to allocations with applicable claims. + +Claims exist as long as they are outstanding, which is from the moment they +are installed until they are redeemed by allocations. + +During this time, they are a commitment of memory to a domain, and the +hypervisor must ensure that this commitment is respected by protecting +claimed memory from being allocated without redeeming applicable claims. + +Redeeming claims is the process of applying a portion of the claims of +a domain to an allocation to allow the allocation to proceed by exchanging +the claim for the allocated memory, so that the allocation can use the +claimed memory and the portion of the claim used for the allocation is +no longer outstanding. + +For example, if a domain has an outstanding claim of 100 pages on a node, +and it redeems 20 pages of that claim for an allocation, the domain would +have 80 pages of that claim still outstanding, and the allocation would be +satisfied using the claimed memory, so the domain can use that allocated +memory and the claim would be reduced by the redeemed amount. + +For the protection of claims, the allocator performs checks to ensure that +claimed memory is not allocated without redeeming applicable claims, while +still allowing the claiming domain to allocate claimed memory by redeeming +claims. + +When the system is not under heavy memory pressure and not fully-claimed, +the allocator can satisfy allocation requests using unclaimed memory. + +However, when the system is under heavy memory pressure or nearly fully-claimed, +the checks for protecting claims become critical to ensure that claimed memory +is not allocated without redeeming applicable claims. + +********************************* +Reference-counting of allocations +********************************* + +Claims protection distinguishes between two kinds of allocation requests. + +Reference-counted requests +========================== + +This means that the request comes for a domain and the :c:expr:`memflags` +of the request do not include :c:expr:`MEMF_no_refcount`. + +In this case, the request is reference-counted to the domain's +total memory allocation, and the domain's claims can be used +to protect and redeem the allocation using claims. + +For example, the allocation requests by :term:`domain builders` for the +:term:`guest physical memory` of domains are always reference-counted, +and as such, can be protected and redeemed by claims to the extent +the claims are applicable and sufficient for the allocation. + +Not reference-counted requests +============================== + +This means that the request is not for a domain, or the :c:type:`memflags` +of the request includes :c:macro:`MEMF_no_refcount`. + +In this case, the request is not reference-counted to a domain's +memory allocation state, and as part of that, claims of a domain +cannot be used to protect and redeem the allocation using claims. + +As such, the allocation request is not protected and redeemed by claims and +the allocator does not consider claims to check whether the request can +be satisfied, so the request can only be satisfied using unclaimed memory. + +Therefore, such requests can only be satisfied using unclaimed memory. + +Callers using MEMF_no_refcount +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Example callers which use :c:macro:`MEMF_no_refcount` when allocating memory +or use :c:macro:`MEMF_no_owner` which also sets :c:macro:`MEMF_no_refcount` +in the context of domains include: + +- ``p2m_alloc_page()`` for allocating pages for the page-to-machine mapping. +- ``hap_set_allocation()`` for allocating memory for hardware-assisted paging. +- ``vmx_alloc_vlapic_mapping()`` for allocating the vLAPIC page for a HVM guest. +- ``vmtrace_alloc_buffer()`` for allocating the buffer for VM tracing. +- ``ioreq_server_alloc_mfn()`` for allocating memory for I/O requests. + +Example actions happening at runtime on the request of running domains +which use :c:macro:`MEMF_no_refcount` or :c:macro:`MEMF_no_owner` to +bypass reference-counting include: + +- ``memory_exchange()`` for exchanging memory pages of a domain. +- ``gnttab_transfer()`` for transferring pages between domains. + +*********************** +Claim protection checks +*********************** + +Unless the request is an exact-node request for a node-specific claim, +the allocator performs two protective checks to protect claimed memory +from being allocated to other domains while still allowing the claiming +domain to allocate it. + +Before starting, the allocator takes the global :c:var:`heap_lock`. +This ensures that any previous changes to the state of the system's +unclaimed memory and the domain's total outstanding claims are complete +and visible, and no concurrent changes to those values can happen. + +Protection of host-wide claims +============================== + +The first check [1]_ the allocator performs is a check protecting host-wide +claims which are part of the total pool of the claims on the entire host. + +1. Get the total amount of unclaimed memory available in the system. + It is the sum of the free pages on all NUMA nodes + (:c:var:`total_avail_pages`) minus the total amount of claimed + memory across all domains (:c:var:`outstanding_claims`). This + includes all host-wide claims and all node-specific claims. + +2. Check whether the request can be satisfied by the unclaimed memory itself. + + If so, the allocation calls :c:func:`get_free_buddy()` to perform the + node-specific checks and find free pages on the appropriate node(s) + to satisfy the request. + + This is the common case, especially for smaller allocations and when the + host is not under heavy memory pressure and not fully-claimed. + +If the request cannot proceed based on the unclaimed memory, it is under +heavy memory pressure as the unclaimed memory is very low, which is where +the protection of claims becomes critical. + +In these situations, the allocator needs to ensure that the domain has +enough claims to redeem the claimed memory to satisfy this request, +otherwise the request has to fail: + +1. If the request is not for a domain or the request is disabling reference + counting, the request fails. + +2. If the total claims of the domain (:c:member:`domain.outstanding_claims`) + cover the amount of claims needed to satisfy the request, + the allocation can proceed further. Else, the request fails. + +Protection of node-specific claims +================================== + +This check protects claimed memory on the specific node from being allocated +without sufficient claims. + +After passing the host-wide claims protection check, the allocator calls +:c:expr:`get_free_buddy()` to pick nodes for allocation and check the +node's suitability [2]_ for this request: + +1. Get the number of unclaimed memory available on that node using the + free pages on that NUMA node (``node_avail_pages[node]``) minus the + total amount of claimed memory across all domains for that node + (``node_outstanding_claims[node]``). + +2. If the request can be satisfied by the sum of the unclaimed memory + on that node and the claims of the domain for that node, the allocation + can proceed on that node, else this node cannot satisfy this request. + +3. If the allocation is an exact-node request, or the allocator + has no further nodes to consider, the allocation fails. + +4. Else, if the allocator has to consider further nodes for this request, + the allocator continues to repeat the same process for the next node. + +.. rubric:: Footnotes + +.. [1] In principle, the host-wide check for the protection of host-wide claims + could be skipped for node-exact requests that are reference-counted and + covered by the claims of the domain for that node. The added code for + This additional check would add complexity to the code, and as long as + Xen must track global memory counters, those counters would still need + to be accessed for all requests, so the added code could only delay the + access to those global counters while adding more checks to all other + requests. Therefore, that's not considered beneficial for now. + + However, if we want to replace the global :c:var:`heap_lock` serving + as a global synchronisation point for all memory allocations with + finer-grained (per-node) locks in the future, then this check could be + added to allow more concurrency for node-exact allocations (and all + free_page() calls) while still protecting claims, but that would be a + future project, requiring significant changes to the code. + +.. [2] If the request is reference-counted and the request is covered by + the claims of the domain for that node, the request could proceed. + But that would add complexity to the code, and as long as Xen must track + per-node memory counters, those counters would still need to be updated + for all allocations from this node, so the added code could only delay + the access to those per-node counters while adding more checks to all + other requests. Therefore, that's not considered beneficial for now. diff --git a/docs/designs/claims/redeeming.rst b/docs/designs/claims/redeeming.rst new file mode 100644 index 000000000000..a5eb045c1bce --- /dev/null +++ b/docs/designs/claims/redeeming.rst @@ -0,0 +1,71 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Redeeming +######### + +.. contents:: Table of Contents + :backlinks: entry + :local: + +After the buddy allocator returned the pages for the allocation, +:c:func:`redeem_claims_for_allocation()` redeems claims up to the size of +the allocation in the same critical region that updates the free-page counters. + +The function performs the following steps to redeem the matching +claims for this allocation. It ensures that the domain's total memory +allocation as :c:func:`domain_tot_pages` plus its outstanding +claims as :c:member:`domain.outstanding_pages` remain within the +domain's limits, defined by :c:member:`domain.max_pages`: + +Steps to redeem claims for an allocation +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Step 1: + Redeem claims from :c:expr:`domain.claims[alloc_node]` on the allocation + node, up to the size of that claim. +Step 2: + If the allocation exceeds :c:expr:`domain.claims[alloc_node]`, redeem the + remaining pages from the host-wide claims + (:c:member:`domain.outstanding_pages` - :c:member:`domain.node_claims`), + up to the size of the host-wide claims. +Step 3: + If the allocation exceeds the combination of those claims, redeem the + remaining pages from other per-node claims so that the domain's total + allocation plus claims remain within the domain's :c:member:`domain.max_pages` + limit. + +Enforcing the domain's max_pages limit +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:c:func:`domain_tot_pages` + :c:member:`domain.outstanding_pages` +must not exceed the :c:member:`domain.max_pages` limit, otherwise +the domain could exceed its memory entitlement. + +At claim installation time, :c:func:`domain_install_claim_set()` performs +this check. + +.. :sidebar:: + See :ref:`designs/claims/accounting:Locking of claims accounting` + for the locks used to protect claims accounting state and invariants. + +At memory allocation time + If (unexpectedly) a domain builder ends up allocating memory from + different nodes than it claimed from, the domain's total allocation + plus claims could exceed the domain's :c:member:`domain.max_pages` + limit, unless the page allocator redeems claims from other nodes + to ensure the sum of the domain's claims and populated pages + remains within the :c:member:`domain.max_pages` limit. + + :c:func:`redeem_claims_for_allocation()` + cannot reliably check :c:member:`domain.max_pages` race-free because + :c:member:`domain.max_pages` is not protected by the :c:var:`heap_lock` + taken by the page allocator during allocation. + + To check the domain's limits, it would have to take the + :c:member:`domain.page_alloc_lock` to inspect the domain's + limits and its current allocation. However, taking that lock + while holding the :c:var:`heap_lock` would invert the locking + order and could lead to deadlocks. + + Therefore, :c:func:`redeem_claims_for_allocation()` + redeems the remaining allocation from other-node claims in Step 3. diff --git a/docs/designs/claims/terminology.rst b/docs/designs/claims/terminology.rst new file mode 100644 index 000000000000..62bc32ae93b5 --- /dev/null +++ b/docs/designs/claims/terminology.rst @@ -0,0 +1,138 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Terminology +########### + +.. Terms should appear in alphabetical order by their initial synonym. + +.. glossary:: + + claims + Reservations of memory for :term:`domains` that are installed by + :term:`domain builders` before :term:`populating` the domain's memory. + Claims ensure that the reserved memory remains available for the + :term:`domains` when allocating it, even if other :term:`domains` are + allocating memory at the same time. + + claim set + An array of :c:type:`memory_claim_t` entries, each specifying a page count + and a target (either a NUMA node ID or a special value for host-wide claims), + that can be installed atomically for a domain to reserve memory on multiple + NUMA nodes. The chapter on :ref:`designs/claims/installation:claim sets` + provides further information on the structure and semantics of claim sets. + + claim set installation + installing claim sets + installing claims + The process of validating and installing a claim set for a domain under + :c:member:`domain.page_alloc_lock` and :c:var:`heap_lock`, ensuring that + either the entire set is accepted and installed, or the request fails with + no side effects. + The chapter on :ref:`designs/claims/installation:claim set installation` + provides further information on the structure and semantics of claim sets. + + domain builders + Privileged entities (such as :term:`toolstacks` in management :term:`domains`) + responsible for constructing and configuring :term:`domains`, including + installing :term:`claims`, :term:`populating` memory, and setting up other + resources before the :term:`domains` are started. + + host-wide claims + :term:`claims` that can be satisfied from any NUMA node, required for + compatibility with existing domain builders and for use cases where + strict node-local placement is not required or not possible, such as on + UMA machines or as a fallback for memory that comes available on any node. + + libxenctrl + A low-level C API library to interact with the Xen hypervisor, to make + :term:`hypercalls`. If hypercalls are to Xen what system calls are to the + Linux kernel, then :term:`libxenctrl` is the universal, low-level system C + runtime library that provides the interface for making those hypercalls. + + libxenguest + A higher-level library, layered on top of :term:`libxenctrl`, + specifically designed for :term:`domain builders` to build and + configure :term:`domains`, including installing :term:`claims` + and :term:`populating` :term:`guest physical memory`. It provides + a more convenient and domain-builder-friendly interface for these + operations, abstracting away details of creating the architecture-specific + memory map expected by guest operating systems which were initially + written to run on the bare metal (on full hardware) and not in a + virtualized environment. + + meminit + The phase of a domain build where the guest's physical memory is populated, + which involves allocating and mapping physical memory for the domain's guest + :term:`physmap`. This should be performed after installing :term:`claims` + to protect the process against parallel allocations of other domain builder + processes in case of parallel domain builds. + + It is implemented in :term:`libxenguest` and optionally installs + :term:`claims` to ensure the claimed memory is reserved before populating + the :term:`physmap` using calls to :c:func:`xc_domain_populate_physmap()`. + + nodemask + A bitmap representing a set of NUMA nodes, used for status information + like :c:var:`node_online_map` and the :c:member:`domain.node_affinity`. + + node + NUMA node + NUMA nodes + A grouping of CPUs and memory in a NUMA architecture. NUMA nodes have + varying access latencies to memory, and NUMA-aware claims allow + :term:`domain builders` to reserve memory on specific NUMA nodes + for performance reasons. Platform firmware configures what constitutes + a NUMA node, and Xen relies on that configuration for NUMA-related features. + + When this design refers to NUMA nodes, it is referring to the NUMA nodes + as defined by the platform firmware and exposed to Xen, initialized at boot + time and not changing at runtime (so far). + + The NUMA node ID is a numeric identifier for a NUMA node, used whenever code + specifies a NUMA node, such as the target of a claim or indexing into arrays + related to NUMA nodes. + + NUMA node IDs start at 0 and are less than :c:macro:`MAX_NUMNODES`. + + Some NUMA nodes may be offline, and the :c:var:`node_online_map` is used + to track which nodes are online. Currently, Xen does not support hotplug + of NUMA nodes, so the set of online NUMA nodes is determined at boot time + based on the platform firmware configuration and does not change at runtime. + + NUMA node affinity + The preference of a :term:`domain` for a set of NUMA nodes, which can + be set up by :term:`domain builders` to make :c:func:`get_free_buddy` + (which selects the NUMA node to allocate from) prefer specific NUMA nodes for + performance reasons. + + It is represented by the :c:member:`domain.node_affinity`, which is a + bitmap of NUMA nodes indicating the preferred NUMA nodes for the domain. + By default, domains have NUMA node auto-affinity, which means their NUMA + node affinity is determined automatically by the hypervisor based on the + CPU affinity of their vCPUs, but it can be disabled and configured manually + by domain builders. + + guest physical memory + physmap + The mapping of a domain's guest physical memory to the host's + machine address space. The :term:`physmap` defines how the guest's + physical memory corresponds to the actual memory locations on the host. + + populating + The process of allocating and mapping physical memory for a domain's guest + :term:`physmap`, performed by the :term:`domain builders`, preferably after + installing :term:`claims` to protect the process against parallel allocations + of other domain builder processes in case of parallel domain builds. + + toolstacks + Privileged entities (running in privileged :term:`domains`) responsible for + managing :term:`domains`, including building, configuring, and controlling + their lifecycle using :term:`domain builders`. One toolstack may run + multiple :term:`domain builders` in parallel to build multiple :term:`domains` + at the same time. + + Xenctrl + An OCaml library provided by Xen for :term:`domain builders` running + in privileged :term:`domains` to interact with the hypervisor, including + making hypercalls to install claims and :term:`populating` + :term:`guest physical memory`. \ No newline at end of file diff --git a/docs/designs/claims/use-cases.rst b/docs/designs/claims/use-cases.rst new file mode 100644 index 000000000000..5a618f0d0280 --- /dev/null +++ b/docs/designs/claims/use-cases.rst @@ -0,0 +1,39 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +######### +Use Cases +######### + +.. glossary:: + + Parallel :term:`domain builds` + + When many domains need to be created and built, many :term:`domain builders` + compete for the same pools of memory, which can lead to inefficient NUMA + placement of :term:`guest physical memory` and thus suboptimal performance + for the domains. + + NUMA-aware claims can help solve this problem and ensure that memory + is available on the appropriate NUMA nodes. + + Domain builds + + The process of constructing and configuring :term:`domains` by + :term:`domain builders`, which includes installing :term:`claims`, + :term:`populating` memory, and setting up other resources before the + :term:`domains` are started. When multiple :term:`domain builders` can + run in parallel, this is referred to as parallel domain builds, which can + benefit from NUMA-aware claims because the domain builders are competing for + the same pools of memory on the NUMA nodes. + + Boot storms + + It is common for many domains to be booted at the same time, such as during + system startup or when large numbers of domains need to be started. + + Parallel migrations + + Similar to :term:`boot storms`, except that the domains are being migrated + instead of booted, which can happen when other hosts are being drained + for maintenance (host evacuation) or when workloads are being rebalanced + across hosts. diff --git a/docs/designs/index.rst b/docs/designs/index.rst index 54d45c2bc321..1f4537957827 100644 --- a/docs/designs/index.rst +++ b/docs/designs/index.rst @@ -14,3 +14,4 @@ and for those interested in the internal workings of Xen. launch/index cache-coloring + claims/index diff --git a/docs/glossary.rst b/docs/glossary.rst index 5c3229a8c4fd..f73de9b85cf6 100644 --- a/docs/glossary.rst +++ b/docs/glossary.rst @@ -12,6 +12,7 @@ Glossary to create and manage other domains on the system. domain + domains A domain is Xen's unit of resource ownership, and generally has at the minimum some RAM and virtual CPUs. @@ -58,13 +59,18 @@ Glossary In the code, "guest context" and "guest state" is considered in terms of the CPU architecture, and contrasted against hypervisor context/state. - In this case, it refers to all code running lower privilege privilege - level the hypervisor. As such, it covers all domains, including ones + In this case, it refers to all code running lower privilege level than + the hypervisor. As such, it covers all domains, including ones providing system services. hardware domain A :term:`domain`, commonly dom0, which shares responsibility with Xen about the system as a whole. - By default it gets all devices, including all disks and network cards, so + By default, it gets all devices, including all disks and network cards, and is responsible for multiplexing guest I/O. + + hypercall + hypercalls + A mechanism for a :term:`guest` to request services from the hypervisor. + Hypercalls are analogous to system calls in a traditional operating system. diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd new file mode 100644 index 000000000000..8d45322ba939 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-data.mmd @@ -0,0 +1,43 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +classDiagram +class do_domctl["Args passed to do_domctl()"] { + +uint32_t cmd: XEN_DOMCTL_claim_memory + +uint32_t domain: Domain ID + +xen_domctl_claim_memory: Claim set +} +class xen_domctl_claim_memory["Claim set passed to do_domctl()"] { + +memory_claim_t* claims: Claim entries + +uint32_t nr_claims: Number of claim entries + +uint32_t pad: always 0 for future use +} +class memory_claim_t["Claim set: Array of claim entries"] { + +pages: Pages to claim + +node: Claim selector or node + +pad: always 0 for future use +} +class xc_domain_claim_memory["xc_domain_claim_memory()"] { + +xc_interface* xch + +uint32_t domid + +uint32_t nr_claims + +memory_claim_t* claims +} +class outstanding_pages["Total claims of domains"] { + global free = total_avail_pages - outstanding_claims + node free = node_avail_pages[node] - node_outstanding_claims[node] +} +class claim["XEN_DOMCTL_claim_memory"] { + +domain_set_outstanding_pages() + +domain_set_node_claims() +} +class domain["Claim fields in struct domain"] { + +outstanding_pages - Total outstanding claims of the domain + +node_claims - Sum of claims on all nodes of the domain + +claims[] - Array of claims on specific nodes +} +xen_domctl_claim_memory o--> memory_claim_t +do_domctl o--> xen_domctl_claim_memory +xc_domain_claim_memory ..> do_domctl: passes
Claim set +xc_domain_claim_memory ..> claim : calls do_domctl() +claim ..> xen_domctl_claim_memory : reads +claim ..> domain : sets +domain ..> outstanding_pages : updates outstanding claims diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd new file mode 100644 index 000000000000..10ed8f4aa094 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-seqdia.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +actor DomainBuilder +participant OcamlStub as OCaml stub for
xc_domain
claim_memory +participant Libxc as xc_domain
claim_memory +participant Domctl as XEN_DOMCTL
claim_memory +#participant DomainLogic as claim_memory +participant Alloc as domain
set
outstanding_pages + +DomainBuilder->>OcamlStub: claims +OcamlStub->>OcamlStub: marshall claims -----> OCaml to C +OcamlStub->>Libxc: claims + +Libxc->>Domctl: do_domctl + +Domctl->>Domctl: copy_from_guest(claim) +Domctl->>Domctl: validate claim +Domctl->>Alloc: set
outstanding_pages +Alloc-->>Domctl: result +Domctl-->>Libxc: rc +Libxc-->>OcamlStub: rc +OcamlStub-->>DomainBuilder: claim_result diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd new file mode 100644 index 000000000000..372f2bb7a616 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory-workflow.mmd @@ -0,0 +1,23 @@ +%% SPDX-License-Identifier: CC-BY-4.0 +sequenceDiagram + +participant Toolstack +participant Xen +participant NUMA Node memory + +Toolstack->>Xen: XEN_DOMCTL_createdomain +Toolstack->>Xen: XEN_DOMCTL_max_mem(max_pages) + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(pages, node) +Xen->>NUMA Node memory: Claim pages on node +Xen-->>Toolstack: Claim granted + +Toolstack->>Xen: XEN_DOMCTL_set_nodeaffinity(node) + +loop Populate domain memory + Toolstack->>Xen: XENMEM_populate_physmap(memflags:node) + Xen->>NUMA Node memory: alloc from claimed node +end + +Toolstack->>Xen: XEN_DOMCTL_claim_memory(0, NO_NODE) +Xen-->>Toolstack: Remaining claims released diff --git a/docs/guest-guide/dom/DOMCTL_claim_memory.rst b/docs/guest-guide/dom/DOMCTL_claim_memory.rst new file mode 100644 index 000000000000..c0d0070a0c58 --- /dev/null +++ b/docs/guest-guide/dom/DOMCTL_claim_memory.rst @@ -0,0 +1,221 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +claim_memory +************ + + .. c:macro:: XEN_DOMCTL_claim_memory + + Hypercall command for installing claim sets for a domain. + + This command allows :term:`domain builders` to install a :term:`claim set` + for a domain, which the Xen hypervisor tracks and enforces during memory + allocation. + + The claimed memory is protected from other allocations and the domain's + memory requirements can be met even when other parallel domain builders + are also allocating memory for other domains in parallel. + + :ref:`designs/claims/installation:Claim set installation` describes how the + hypervisor processes the claim sets installed via this hypercall command. + +Hypercall API +------------- + +See :ref:`designs/claims/installation:Claim sets` +for more details on the claim sets data structure. + +Definitions +^^^^^^^^^^^ + +Mode +~~~~ + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_SET + + Install the given claim set for the domain. + + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_GET + + Retrieve the claim set for the current claims of the domain. + +Target selectors +~~~~~~~~~~~~~~~~ + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_HOST + + Special target selector for host-wide claims, + which can be satisfied from any NUMA node. + + .. c:macro:: XEN_DOMCTL_CLAIM_MEMORY_LEGACY + + Special target selector for legacy claims, which is interpreted as the + total memory target for the domain, with existing allocations subtracted + from it to determine the domain's new total host-wide outstanding claim. + It is provided for compatibility with existing :term:`domain builders` + and can only be used in a single-entry claim set. + +domctl.h structure +^^^^^^^^^^^^^^^^^^ + + .. code-block:: C + + struct xen_memory_claim { + uint64_aligned_t pages; /* Number of pages to claim */ + uint32_t target; /* NUMA node or claim type like legacy or host-wide */ + uint32_t cmd; /* Command reserved for future use, initialize to 0 */ + }; + typedef struct xen_memory_claim memory_claim_t; + DEFINE_XEN_GUEST_HANDLE(memory_claim_t); + + /* Special claim targets for the target field of memory_claim_t */ + #define XEN_DOMCTL_CLAIM_MEMORY_HOST 0x80000000U /* Host-wide claims */ + #define XEN_DOMCTL_CLAIM_MEMORY_LEGACY 0x40000000U /* Legacy semantics */ + + /* + * XEN_DOMCTL_claim_memory + * + * Install a claim set to claim memory for a guest domain. Claims work like + * tickets in exchange for allocating memory for a domain later. + */ + struct xen_domctl_claim_memory { + /* IN/OUT: Array of struct xen_memory_claim */ + XEN_GUEST_HANDLE_64(memory_claim_t) claim_set; + /* IN/OUT: Number of records in the claim_set array handle. */ + uint32_t nr_entries; + uint32_t mode; + #define XEN_DOMCTL_CLAIM_MEMORY_GET 0U /* Get a claim set for the domain. */ + #define XEN_DOMCTL_CLAIM_MEMORY_SET 1U /* Set a claim set for the domain. */ + }; + + +C API by libxenctrl +------------------- + + .. c:function:: int xc_domain_claim_memory(xch, domid, mode, nr_entries, \ + claim_set) + + :param xch: The :term:`libxenctrl` interface to use for the hypercall + :param domid: The ID of the domain for which to install the claim set + :param mode: The mode for the claim set installation + :param nr_entries: The number of entries in the claim set + :param claim_set: The claim set to install for the domain + :type xch: xc_interface * + :type domid: uint32_t + :type mode: uint32_t + :type nr_entries: uint32_t * + :type claim_set: memory_claim_t * + :returns: 0 on success, or a negative error code on failure. + + C API function for installing or retrieving claim sets for a domain + using the :expr:`XEN_DOMCTL_claim_memory` hypercall command. + + This function allows :term:`domain builders` to install a + :term:`claim set` for a domain, which the Xen hypervisor + tracks and enforces during memory allocation and can also + be used to retrieve the current claim set for a domain. + + When mode is :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_SET`, the former mode + is used, where the function validates and installs the given claim set. + ``nr_entries`` specifies the number of entries in the ``claim_set`` array, + and ``claim_set`` points to the array of :c:type:`memory_claim_t` entries. + + When mode is :c:macro:`XEN_DOMCTL_CLAIM_MEMORY_GET`, the function + retrieves the current claim set into the memory pointed to by ``claim_set``. + The number of claims retrieved is stored in the variable pointed to by + ``nr_entries``. + + This function is part of the :term:`libxenctrl` library. + + Corresponding OCaml bindings are also available for this function in the + :term:`Xenctrl` OCaml library, providing a convenient interface for OCaml + :term:`domain builders` to install claim sets for a domain. + +C API Usage example +^^^^^^^^^^^^^^^^^^^ + + The example below shows how a domain builder can install a claim set and + later replace or clear it. :c:expr:`memory_claim_t` contains an additional + field for future expansion; zero-initialise the structure or use designated + initializers to ensure forward compatibility. + + .. code-block:: C + + #include + + void install_example_claims(xc_interface *xch, uint32_t domid) + { + /* + * Claim 1024 pages on node 0, 1024 pages on node 1, and by setting + * the total claim target to 3072 pages, an additional host-wide claim of + * 1024 pages which is never bound to any specific node is also installed. + */ + memory_claim_t claims[] = { + {.pages = 1024, .target = 0}, + {.pages = 1024, .target = 1}, + {.pages = 1024, .target = XEN_DOMCTL_CLAIM_MEMORY_HOST}, + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(claims), claims); + + /* Replace the claim set with claims on nodes 1, 2, and 3 */ + memory_claim_t claims2[] = { + {.pages = 1024, .target = 1}, + {.pages = 1024, .target = 2}, + {.pages = 1024, .target = 3}, + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(claims2), claims2); + + /* Release all remaining claims once the domain is built */ + memory_claim_t clear[] = { + {.pages = 0, .target = XEN_DOMCTL_CLAIM_MEMORY_HOST} + }; + xc_domain_claim_memory(xch, domid, ARRAY_SIZE(clear), clear); + } + +Using the Xenctrl OCaml bindings +-------------------------------- + + The OCaml bindings for libxenctrl also provide an interface for installing + claim sets using the :c:expr:`XEN_DOMCTL_claim_memory` hypercall command. + + The example below shows how to install a claim set and later release it + using the OCaml bindings. + + .. code-block:: OCaml + + let install_example_claims xch domid = + let claims = [| + { Xenctrl.pages = 1024L; node = 0l }; + { Xenctrl.pages = 1024L; node = 1l }; + { Xenctrl.pages = 3072L; node = XEN_DOMCTL_CLAIM_MEMORY_TOTAL }; + |] in + Xenctrl.domain_claim_memory xch domid claims; + + let release_all_claims xch domid = + let clear = [| + { Xenctrl.pages = 0L; node = XEN_DOMCTL_CLAIM_MEMORY_TOTAL }; + |] in + Xenctrl.domain_claim_memory xch domid clear + +Call sequence diagram +--------------------- + + The following sequence diagram illustrates the call flow for claiming memory + for a domain using this hypercall command from an OCaml domain builder: + + .. mermaid:: DOMCTL_claim_memory-seqdia.mmd + :caption: Sequence diagram: Call flow for claiming memory for a domain + +Claim workflow +-------------- + + This diagram illustrates a workflow for claiming and populating memory: + + .. mermaid:: DOMCTL_claim_memory-workflow.mmd + :caption: Workflow diagram: Claiming and populating memory for a domain + +Used functions & data structures +-------------------------------- + + This diagram illustrates the key functions and data structures involved in + installing claims via the :c:expr:`XEN_DOMCTL_claim_memory` hypercall command: + + .. mermaid:: DOMCTL_claim_memory-data.mmd + :caption: Diagram: Function and data relationships for installing claims diff --git a/docs/guest-guide/dom/index.rst b/docs/guest-guide/dom/index.rst new file mode 100644 index 000000000000..cb33a230eb5d --- /dev/null +++ b/docs/guest-guide/dom/index.rst @@ -0,0 +1,14 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +`DOMCTL Hypercalls` +=================== + +Through `DOMCTL` `hypercalls`, `toolstacks` in privileged domains can perform +operations related to domain management. This includes operations such as +creating, destroying, and modifying domains, as well as querying domain +information. + +.. toctree:: + :maxdepth: 2 + + DOMCTL_claim_memory diff --git a/docs/guest-guide/index.rst b/docs/guest-guide/index.rst index 5455c67479cf..d9611cd7504d 100644 --- a/docs/guest-guide/index.rst +++ b/docs/guest-guide/index.rst @@ -3,6 +3,29 @@ Guest documentation =================== +Xen exposes a set of hypercalls that allow domains and toolstacks in +privileged contexts (such as Dom0) to request services from the hypervisor. + +Through these hypercalls, privileged domains can perform privileged operations +such as querying system information, memory and domain management, +and enabling inter-domain communication via shared memory and event channels. + +These hypercalls are documented in the following sections, grouped by their +functionality. Each section provides an overview of the hypercalls, their +parameters, and examples of how to use them. + +Hypercall API documentation +--------------------------- + +.. toctree:: + :maxdepth: 2 + + dom/index + mem/index + +Hypercall ABI documentation +--------------------------- + .. toctree:: :maxdepth: 2 diff --git a/docs/guest-guide/mem/XENMEM_claim_pages.rst b/docs/guest-guide/mem/XENMEM_claim_pages.rst new file mode 100644 index 000000000000..5128317cb821 --- /dev/null +++ b/docs/guest-guide/mem/XENMEM_claim_pages.rst @@ -0,0 +1,102 @@ +.. SPDX-License-Identifier: CC-BY-4.0 +.. _XENMEM_claim_pages: + +claim_pages +*********** + + .. note:: This API is deprecated; + Use :c:expr:`XEN_DOMCTL_claim_memory` for new code. + + .. c:macro:: XENMEM_claim_pages + + Hypercall command for installing legacy claims. + + :ref:`designs/claims/installation:Legacy claim installation` describes + the API for installing legacy claims via this hypercall command. + + It passes a single claim entry to the hypervisor via a + :c:struct:`xen_memory_reservation` structure with the page count in the + :c:member:`xen_memory_reservation.nr_extents` field and the domain ID + :c:member:`xen_memory_reservation.domid` field. The claim entry's target is + implicitly global, and the legacy claim path is invoked in the hypervisor + to process the claim: + +Data structure for the hypercall command for installing legacy claims: + + .. c:struct:: xen_memory_reservation + + Structure for passing claim requests to the hypervisor via + :c:macro:`XENMEM_claim_pages` and other memory :term:`hypercalls`. + + .. code-block:: C + + struct xen_memory_reservation { + xen_pfn_t * extent_start; // not used for XENMEM_claim_pages + xen_ulong_t nr_extents; // pass page counts to claim + unsigned int extent_order; // must be 0 + unsigned int mem_flags; // XENMEMF flags. + domid_t domid; // domain to apply the claim to + }; + typedef struct xen_memory_reservation xen_memory_reservation_t; + + .. c:member:: xen_ulong_t nr_extents + + For :c:macro:`XENMEM_claim_pages`, the page count to claim. + + .. c:member:: domid_t domid + + Domain ID for the claim. + + .. c:member:: unsigned int mem_flags + + Not used for :c:macro:`XENMEM_claim_pages` (must be 0) + + In principle, it supports all the :c:expr:`XENMEMF_*` flags, including + the possibility of passing a single NUMA node ID, but using it to pass + a NUMA node ID is not currently supported by the legacy claim path. + + During review of the NUMA extension of the legacy claim path, it + was used, but the request was made to instead create a new hypercall + which is now :c:macro:`XEN_DOMCTL_claim_memory` with support for claim sets. + + .. c:member:: unsigned int extent_order + .. c:member:: xen_pfn_t *extent_start + + Both are not used for :c:macro:`XENMEM_claim_pages`, but are used for other + memory :term:`hypercalls`. + +See :ref:`designs/claims/installation:Legacy claim installation` for details. + +API example using libxenctrl +---------------------------- + + The example below claims pages, populates the domain, + and then clears the claim. + + .. code-block:: C + + #include + + int build_with_claims(xc_interface *xch, uint32_t domid, + unsigned long nr_pages) + { + int ret; + + /* Claim pages for the domain build. */ + ret = xc_domain_claim_pages(xch, domid, nr_pages); + if ( ret < 0 ) + return ret; + + /* Populate the domain's physmap. */ + ret = xc_domain_populate_physmap(xch, domid, /* ... */); + if ( ret < 0 ) + return ret; + + /* Release any remaining claim after populating the domain memory. */ + ret = xc_domain_claim_pages(xch, domid, 0); + if ( ret < 0 ) + return ret; + + /* Unpause the domain to allow it to run. */ + return xc_unpause_domain(xch, domid); + } diff --git a/docs/guest-guide/mem/index.rst b/docs/guest-guide/mem/index.rst new file mode 100644 index 000000000000..042fb88bfbeb --- /dev/null +++ b/docs/guest-guide/mem/index.rst @@ -0,0 +1,12 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +`MEMCTL Hypercalls` +------------------- + +The XENMEM hypercall interface allows guests to perform various control +operations related to memory management. + +.. toctree:: + :maxdepth: 2 + + XENMEM_claim_pages -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 05 18:47:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 18:47:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301040.1575383 (Exim 4.92) (envelope-from ) id 1wKKnp-0003xO-5d; Tue, 05 May 2026 18:47:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301040.1575383; Tue, 05 May 2026 18:47:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKKnp-0003wu-1T; Tue, 05 May 2026 18:47:29 +0000 Received: by outflank-mailman (input) for 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=?utf-8?B?TktyTnl2NmZSUWVCd01PTXkzQWZpOHd6Z2U0OThObTd3bERmNDQzdz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: b278bc9d-caef-4c0d-3a76-08deaad6be63 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 18:47:23.0095 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: F1KM3l7GfWkqbHoc0P1RFFPVFFNOEWuNnhIl9xYuucwMiAA5czgUM7K4HLJnxmG8orhglTQuq/V9Ss3lD1aQ0Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR03MB8194 X-purgate-ID: tlsNG-ebf023/1778006846-2AD643FF-2B68D117/0/0 X-purgate-type: clean X-purgate-size: 3902 On Tue, May 05, 2026 at 05:53:31PM +0200, Jürgen Groß wrote: > SUSE QA is seeing a problem with PCI-passthrough of a SR-IOV to a PV guest > running a 6.4 based kernel, but I can reproduce the problem with upstream > kernel, too. > > The guest is configured with "e820_host=1", but the PCI region on the host > isn't marked as "reserved" in the memory map, so it won't be reserved in > the either. But that's how it should be, device BARs shouldn't be in reserved regions on the memory map (albeit we have seen this fairly often). > As the guest doesn't have the ACPI table available describing the PCI regions, > /proc/iomem in the guest won't include those regions as used, resulting in > the kernel's resource management to use those areas for potential memory: > > resource: avoiding allocation from e820 entry [mem 0x78edc000-0x79868fff] > resource: avoiding allocation from e820 entry [mem 0x79d2a000-0x8fffffff] > resource: remaining [mem 0x0000000090000000-0x00000000ffdfffff] available > resource: avoiding allocation from e820 entry [mem 0xc7ffc000-0xc7ffcfff] > resource: remaining [mem 0x0000000090000000-0x00000000c7ffbfff] available > > dom0 /proc/iomem: > ... > 80000000-8fffffff : PCI MMCONFIG 0000 [bus 00-ff] > 90000000-c7ffbfff : PCI Bus 0000:00 ← PCI MMIO window begins here > 90000000-900fffff : PCI Bus 0000:01 ← I350 VFs assigned in this range > c6000000-c70fffff : PCI Bus 0000:04 > > dom0 e820 map: > ... > Xen: [mem 0x0000000079869000-0x0000000079d29fff] ACPI NVS > Xen: [mem 0x0000000079d2a000-0x000000008fffffff] reserved > Xen: [mem 0x00000000c7ffc000-0x00000000c7ffcfff] reserved > Xen: [mem 0x00000000fbffc000-0x00000000fbffcfff] reserved > ... > > domU /proc/iomem: > ... > 00100000-78f06fff : System RAM > 01000000-01ffffff : Kernel code > ... > 90000000-97ffffff : System RAM But that's not in the mfn address space, it's just RAM in the pfn space of the guest? > fee00000-fee00fff : Local APIC > > domU e820 map: > ... > Xen: [mem 0x0000000079869000-0x0000000079d29fff] ACPI NVS > Xen: [mem 0x0000000079d2a000-0x000000008fffffff] reserved > Xen: [mem 0x00000000c7ffc000-0x00000000c7ffcfff] reserved > Xen: [mem 0x00000000fbffc000-0x00000000fbffcfff] reserved > ... > > The VF is showing up near 0x90000 > pci 0000:00:00.4: [8086:1520] type 00 class 0x020000 > pci 0000:00:00.4: reg 0x10: [mem 0x90004000-0x90007fff 64bit pref] > pci 0000:00:00.4: reg 0x1c: [mem 0x90024000-0x90027fff 64bit pref] While the above addresses are in the mfn address space? I assume this causes issues because MMIO is identity mapped in the pfn space. > pcifront pci-0: New device on 0000:00:00.4 found. > pcifront pci-0: claiming resource 0000:00:00.4/0 > pci 0000:00:00.4: can't claim BAR 0 [mem 0x90004000-0x90007fff 64bit pref]: > address conflict with System RAM [mem 0x90000000-0x97ffffff] > pcifront pci-0: Could not claim resource 0000:00:00.4/0! Device offline. > Try using e820_host=1 in the guest config. > pcifront pci-0: claiming resource 0000:00:00.4/3 > pci 0000:00:00.4: can't claim BAR 3 [mem 0x90024000-0x90027fff 64bit pref]: > address conflict with System RAM [mem 0x90000000-0x97ffffff] > pcifront pci-0: Could not claim resource 0000:00:00.4/3! Device offline. > Try using e820_host=1 in the guest config. > > My first idea for solving this was to add the PCI regions from dom0's > /proc/iomem to the e820 map of the guest, but this is more a hack than a sane > solution. > > Thoughts? I think the issue is that the guest has created a pfn RAM range when there is none in the provided e820. When using "e820_host=1" the guest should be limited to creating pfns only in the ranges marked as RAM on the host e820 memory map. Creating a pfn range over a hole in the e820 shouldn't happen. Regards, Roger. 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48a81ed6b89sm418085185e9.1.2026.05.05.12.17.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 May 2026 12:17:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778008630; x=1778613430; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=siQWjo0zkKVV3Ea+j1v/5KOUec3pF3WyM2cdpzEDjsg=; b=I8AZ4G4JVDT3tsZaHFjjbfV0wjdG2wgz+ij8r03p4aTAXbD86DIl2CjQIjJpUETzvy uyhKuC0kbqm6COJh2fWIxXtkezrzUiiDALOrxCk8nme4J0Jw1FCtXACDRUDeY75pSKbf jOkCOLFYuozIqTkbdYTR3PsGoDqNI7BSuGXLQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778008630; x=1778613430; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=siQWjo0zkKVV3Ea+j1v/5KOUec3pF3WyM2cdpzEDjsg=; b=Ztg/a7wa6WixLuR8tLjkDY7RGiEnrVxJBw4Zs8z9XmqeZ+j+4FN60W6rReCyJyDnsd yO1yBlromxAByuPdD0x5iAtlbMN6M5y6xcs6iKmYyAc7Hm0grEZFogkDA6BO4QVlowyN WjmAwZzQ5HzujQLonQ7a/mxnom8A3hO5OQx1lLgNiExQYP1cH4eiFLJAHnw0F7f4Rtvb oeLrHTiiF4KzVzcYFEvMnuDDZ+ZBHkOyb91vHKW6CEpCi3V66h/0ryaOMdJGTqppefS4 Dp9Yn2s/GCGw6Nkpn4AhJTntqMyhbqqfUnDl52v5gw+d7HGeed6ESiGRybLKn31Ei5Zd ueug== X-Gm-Message-State: AOJu0YzusoRB77Uc16JSnB+qEn67AFWO+VT4uc7Dyikn1TPp+ZlqLzRx YCgBU7ncz7Gwbv9ZUUf2y+XC8YRIeBmWuG3/NgGeLOT1s0hzr02WcXocf3gAZMbZ8CrULGWl3a6 6JTB+zMM= X-Gm-Gg: AeBDieuzmFDJDlZPUfBuBRgaXgp9X9xaQ+cq3mUbAFdxjLezWOjEMBHb0sGIWeUMHn+ LvfcCWsaXtjiUdroQ/HBDMv0NniaeQIWwz8sJnRYvMb7DzdC9JWXTZ7CzOwxfGUezoDpNPivKQU HsY6DnYzeDXiqtCw8+XaG7XsL7cs9acwpCwoCqAC5a8u3M7WcoDrXrTuIzdU2N1KNrpGOD6BoFl cnNIqz3FM14tyXd1kOi3WXWM8CdufgcylhhGH91Hzqe9xZYjG0ozAdpTdVJ0DAWl+bNQ6X6OlV5 TrtUIzi5xTjN0Wgv1DU4VwvKlfYS1or07h2vDNds6gSNNBlwHZD989x8ZzmaEEZAGucF8KV2wuB B/9xjF+dUgeuRbWX0uCbSBkhHbwJ3nApIGGHyjj1uuzdvxT7mdebUY4tW7rgnT0iUX3PI+eorjA LWJmlhNMipdfGF6f4DYoLJCW016e31t3kkroFelOfAgs6/GsrqyzpLmML9r7wEdcT/uEDWCgdQv SLaXe5ChvYm9go= X-Received: by 2002:a05:600c:c107:b0:48a:52d4:888c with SMTP id 5b1f17b1804b1-48e51e0bb23mr7842215e9.3.1778008629597; Tue, 05 May 2026 12:17:09 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH v2] CI: Refresh the Debian 12 cppcheck container Date: Tue, 5 May 2026 20:17:08 +0100 Message-Id: <20260505191708.1432070-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778008630-6CF62CF5-CDC01EEC/10/63158204843 X-purgate-type: spam X-purgate-size: 7755 From: Javi Merino Rework the container to derive from bookworm-slim, and to build and run cppcheck as a normal user. User heredocs for readability and use apt-get --no-install-recommends to keep the size down. Changed the libpcre3-dev dependency to libpcre3, as the -dev package is only needed for building, not for running. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein v2: * Switch to bookworm-slim * Perform a SHA check on downloaded content I've deployed this container already. The new size is 233.47 MiB, as opposed to 307.40 MiB before (as given by Gitlab). https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2502273068 --- .../debian/12-arm64v8-cppcheck.dockerfile | 86 +++++++++++++++++++ .../build/debian/bookworm-cppcheck.dockerfile | 54 ------------ automation/gitlab-ci/build.yaml | 12 +-- automation/scripts/containerize | 2 +- 4 files changed, 93 insertions(+), 61 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-cppcheck.dockerfile delete mode 100644 automation/build/debian/bookworm-cppcheck.dockerfile diff --git a/automation/build/debian/12-arm64v8-cppcheck.dockerfile b/automation/build/debian/12-arm64v8-cppcheck.dockerfile new file mode 100644 index 000000000000..50d2614453de --- /dev/null +++ b/automation/build/debian/12-arm64v8-cppcheck.dockerfile @@ -0,0 +1,86 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim AS builder + +ENV DEBIAN_FRONTEND=noninteractive +ENV CPPCHECK_VERSION=2.7 + +# dependencies for cppcheck build +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:02:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301069.1575405 (Exim 4.92) (envelope-from ) id 1wKLyQ-0008Pv-Jd; Tue, 05 May 2026 20:02:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301069.1575405; Tue, 05 May 2026 20:02:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKLyQ-0008Po-G6; Tue, 05 May 2026 20:02:30 +0000 Received: by outflank-mailman (input) for mailman id 1301069; Tue, 05 May 2026 20:02:28 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKLyO-0008Pi-Qt for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wKLyO-0015nh-2M for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: from mail-lj1-f180.google.com ([209.85.208.180]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wKLyO-00GDfj-27 for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:02:28 +0000 Received: by mail-lj1-f180.google.com with SMTP id 38308e7fff4ca-38e97e73234so54819981fa.1 for ; Tue, 05 May 2026 13:02:28 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:To:Subject:Message-ID:Date: From:MIME-Version; bh=rqePkcOqKKSlWKJFzPSR0bkrn6hbfy2LL5DYY7SBum8=; b=zT2fRlw phrMkxd2zV6e2R0fRg5kzxMXBXM2+CLQ70TeEtlBuKesJvqHCuPC/NEIGM4wSDUGVcOIcOKpVJbPd OjgbnnLwBbmkFrXYziAy1yGH9k9ZarffgCSYa61+DRnzWAreH8/HCCSwhD3nc9r7lt2pNxeV7Qwp3 vTLy+fyFMg=; X-Gm-Message-State: AOJu0YwzAMB5wNUiJhjyd+F0A4HF+Tx4BTG2YO5TxXOIoDIqluKmhVC9 zwDmrMPrsJqcGaT64EMc282MB6Kr1DoJoFEjkdDXoGZ+XRdewniMrwNZJJFADaArEttKZRNUh2P m8MSNzJ+7w40NAOztxdJTJ6QWb1QzRSQ= X-Received: by 2002:a2e:a588:0:b0:38e:a12c:418c with SMTP id 38308e7fff4ca-393c410af2dmr2819051fa.11.1778011347480; Tue, 05 May 2026 13:02:27 -0700 (PDT) MIME-Version: 1.0 From: Cody Zuschlag Date: Tue, 5 May 2026 22:02:16 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AVHnY4I0i28I8kZ_YWlqHZ5EDkxbkE2r30nYyvs7aHGvWHBLz6ipyX2TNDHTSGM Message-ID: Subject: [ANNOUNCE] - Call for agenda items for May 7 Xen Community Call @ 15:00 UTC To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="000000000000c5f5990651178608" --000000000000c5f5990651178608 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi everyone, It=E2=80=99s time for the May Xen Project Community Call, happening this Th= ursday at 4 pm UK time. We=E2=80=99d love to have you join. You=E2=80=99re welcome to participate o= r just listen in. It=E2=80=99s a great way to stay aligned, hear what others are working = on, and help move a few ongoing topics forward. *Preparation*: Please take a moment to review and update the agenda ahead of the call: =F0=9F=91=89 Agenda Feel free to: - Add topics or updates - Suggest anything we can drop or defer - Include links to patches, threads, or docs where helpful *Call Details: * Date: Thursday, 7 May 2026 Time: 15:00 UTC (agenda starts at 15:05 UTC) Find your local timezone here Join: https://meet.jit.si/XenProjectCommunityCall We=E2=80=99ll open the room at 15:00 UTC and start the agenda at 15:05 UTC = to give everyone a few minutes to join. Want to be CC=E2=80=99d on future calls? Add or remove yourself from our Sign-up Sheet See you there! Cody Zuschlag Xen Project - Community Manager --000000000000c5f5990651178608 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi ever= yone,

It=E2= =80=99s time for the May Xen Project Community Call, happening this Thursda= y at 4 pm UK time.

We=E2=80=99d love to have you join. You=E2=80=99re welcome to partic= ipate or just listen in. It=E2=80=99s a great way to stay aligned, hear wha= t others are working on, and help move a few ongoing topics forward.

Preparation= :
Please take a moment to review and updat= e the agenda ahead of the call:
=F0=9F=91= =89 Agenda

Feel free to:
- Add topics or updates
- Suggest anything we can drop or defer
= - Include links to patches, threads, or docs where helpful

Call Details:
Date: Thursday, 7 May 2026
Time: 15:00 UTC (agenda starts at 15:05 UTC)
Find your local timezone here

Join: https:/= /meet.jit.si/XenProjectCommunityCall
<= br style=3D"font-size:inherit">We=E2=80=99ll open the room at 15:00 UTC and= start the agenda at 15:05 UTC to give everyone a few minutes to join.

Want to be CC=E2= =80=99d on future calls?
Add or remove you= rself from our Sign-up Sheet

See you there!

<= div dir=3D"ltr">

= Cody Zuschlag
Xen Project - Community Manager
--000000000000c5f5990651178608-- From xen-devel-bounces@lists.xenproject.org Tue May 05 20:33:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:33:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301081.1575418 (Exim 4.92) (envelope-from ) id 1wKMSN-0004TX-Vj; Tue, 05 May 2026 20:33:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301081.1575418; Tue, 05 May 2026 20:33:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMSN-0004TQ-Sm; Tue, 05 May 2026 20:33:27 +0000 Received: by outflank-mailman (input) for mailman id 1301081; Tue, 05 May 2026 20:33:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMSL-0004TK-Ot for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:33:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKMSK-0078Ld-1Y for xen-devel@lists.xenproject.org; Tue, 05 May 2026 22:33:24 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa5403-e002-0a2a0a5209dd-0a2a45039108-8 for ; Tue, 05 May 2026 22:33:23 +0200 Received: from [136.143.188.51] (helo=sender4-of-o51.zoho.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa5411-672d-0a2a45030019-888fbc335283-3 for ; Tue, 05 May 2026 22:33:23 +0200 Received: by mx.zohomail.com with SMTPS id 1778013197458240.2115813323103; Tue, 5 May 2026 13:33:17 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=zoho header.d=apertussolutions.com header.i="dpsmith@apertussolutions.com" header.h="Message-ID:Date:MIME-Version:Subject:To:References:From:In-Reply-To:Content-Type:Content-Transfer-Encoding" ARC-Seal: i=1; a=rsa-sha256; t=1778013200; cv=none; d=zohomail.com; s=zohoarc; b=MolC+U6dDRgKzEgEsYoJgtFaUaV8n+ElOL9dZY0AGCRi3X8aFbO6qkA50UR/1PTlnkAuXJ0/dPka9x1CDye0dx2fF/HjMTkPEjQs9CPtTijAyzvtN11iYszSys5zdGcRI/Ojhs9D2CTsQ8LnQgFBMWxADBSdQtaDhi9udbZeXME= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778013200; h=Content-Type:Content-Transfer-Encoding:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To:Cc; bh=1ymrRuK40LDWL4DAPkTL6UWbQmdGYGFd2FHyD/hl/RU=; b=HPJqjcch0PtOeNrg69GG4pK+3TConFsd0zmxbSfNFk56qp/EpTovy2zcmoaak+FjG1zigKwOQlrdK3KAdIny4ARj9Yq+6+h5ziVpufA07BRSzM62dfFDz+SaunSB9E2Eb2yhQiFYabBB+ZxW2h7Z9jwkzW/qhzZ7UMO0jWveefA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1778013200; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To:Cc; bh=1ymrRuK40LDWL4DAPkTL6UWbQmdGYGFd2FHyD/hl/RU=; b=Bo8gWvoWSLR8+7vtSvOPFzq+ULBWxX4pSiho0Rx5dTwnGYdGq/tcg0T2MwSucW0G RE6U7JabUEHHDMC6fc//Udutgxb1sBXB3nz0yv+m/nwQgkOaXUNgOeb/hNkO49N7D8D VhmdHVysNy30NOQpYNsMz4zRs4pJrzM7sD9Mw/V8= Message-ID: <800d7a78-6125-4bf5-9e5d-5f3befcaa9bf@apertussolutions.com> Date: Tue, 5 May 2026 16:33:16 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xsm/flask: Fix undefined behaviour in avc_dump_av() To: Dmytro Prokopchuk1 , "xen-devel@lists.xenproject.org" References: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Language: en-US From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: <43fc4b4ed45858b2cebbc37bbbf3b70e664a0661.1777642449.git.dmytro_prokopchuk1@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External X-purgate-ID: tlsNG-33051d/1778013203-2997D938-DD9FF2D5/0/0 X-purgate-type: clean X-purgate-size: 1941 On 5/1/26 10:17, Dmytro Prokopchuk1 wrote: > When booting Xen with CONFIG_USBAN=y and CONFIG_XSM_FLASK=y, > UBSAN reports undefined behaviour in avc_dump_av() due to a left > shift on a signed int: > > (XEN) [ 1.104348] ================================================================================ > (XEN) [ 1.105096] UBSAN: Undefined behaviour in xsm/flask/avc.c:184:14 > (XEN) [ 1.106052] left shift of 1073741824 by 1 places cannot be represented in type 'int' > (XEN) [ 1.107546] Xen WARN at common/ubsan/ubsan.c:176 > (XEN) [ 1.108295] ----[ Xen-4.21.1 arm64 debug=y ubsan=y Not tainted ]---- > (XEN) [ 1.108848] CPU: 0 > (XEN) [ 1.109147] PC: 00000a00002f64fc ubsan.c#ubsan_epilogue+0x10/0xd4 > [...] > (XEN) [ 1.146320] Xen call trace: > (XEN) [ 1.146663] [<00000a00002f64fc>] ubsan.c#ubsan_epilogue+0x10/0xd4 (PC) > (XEN) [ 1.147227] [<00000a00002f7bc4>] __ubsan_handle_shift_out_of_bounds+0x1a0/0x290 (LR) > (XEN) [ 1.147868] > (XEN) [ 1.148177] ================================================================================ > > This can be solved by making 'perm' an unsigned 32-bit type (u32). > > Signed-off-by: Dmytro Prokopchuk > --- > Test CI pipeline: > https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2493649109 > --- > xen/xsm/flask/avc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/xsm/flask/avc.c b/xen/xsm/flask/avc.c > index 3d39e55cae..9c3ffdc070 100644 > --- a/xen/xsm/flask/avc.c > +++ b/xen/xsm/flask/avc.c > @@ -152,7 +152,8 @@ static void __attribute__ ((format (printf, 2, 3))) > */ > static void avc_dump_av(struct avc_dump_buf *buf, u16 tclass, u32 av) > { > - int i, i2, perm; > + int i, i2; > + u32 perm; > > if ( av == 0 ) > { Acked-by: Daniel P. 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Tue, 05 May 2026 13:34:31 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> In-Reply-To: <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> From: Mykola Kvach Date: Tue, 5 May 2026 23:34:18 +0300 X-Gm-Features: AVHnY4K3UZk2RzYUFWDotoJb9uIiNxdTcGP2Cj4IhABczaSfQaf-V__RkQSzYVA Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778013272-A2B64938-1ED61C94/0/0 X-purgate-type: clean X-purgate-size: 15558 Hi Luca, Thanks for the feedback. On Wed, Apr 29, 2026 at 11:06=E2=80=AFAM Luca Fancellu wrote: > > Hi Mykola, > > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > index e38566b0b7..4d1289776b 100644 > > --- a/xen/arch/arm/suspend.c > > +++ b/xen/arch/arm/suspend.c > > @@ -1,9 +1,190 @@ > > /* SPDX-License-Identifier: GPL-2.0-only */ > > > > +#include > > #include > > > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > +#include > > + > > struct cpu_context cpu_context =3D {}; > > > > +static int can_system_suspend(void) > > +{ > > + int ret =3D 0; > > + struct domain *d; > > + > > + rcu_read_lock(&domlist_read_lock); > > + > > + for_each_domain ( d ) > > + { > > + bool domain_suspended; > > + > > + spin_lock(&d->shutdown_lock); > > + domain_suspended =3D d->is_shut_down && > > + d->shutdown_code =3D=3D SHUTDOWN_suspend; > > + spin_unlock(&d->shutdown_lock); > > + > > + if ( domain_suspended ) > > + continue; > > + > > + printk(XENLOG_ERR > > + "System suspend requires all domains to be shut down fo= r suspend (dom%d: isn't in suspend state)\n", > > d->domain_id is unsigned if I=E2=80=99m not mistaken, it wants %u (typede= f uint16_t domid_t;) Ack, I will fix it in v9. > > > + d->domain_id); > > + > > + ret =3D -EBUSY; > > + break; > > + } > > + > > + rcu_read_unlock(&domlist_read_lock); > > + > > + return ret; > > +} > > + > > +/* Xen suspend. data identifies the domain that initiated suspend. */ > > +static void system_suspend(void *data) > > +{ > > + int status; > > + unsigned long flags; > > + struct domain *d =3D (struct domain *)data; > > + > > + BUG_ON(system_state !=3D SYS_STATE_active); > > + > > + system_state =3D SYS_STATE_suspend; > > + > > + printk("Xen suspending...\n"); > > + > > + freeze_domains(); > > + scheduler_disable(); > > + > > + status =3D can_system_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_scheduler; > > When we have an error and we get the resume_scheduler path, we apply back= the > context of the guest saved previously in do_psci_1_0_system_suspend(), so= am I > correct saying the guest won=E2=80=99t get any PSCI error back and we res= ume the guest > from the guest resume entrypoint? > > In case, should we have a different path that returns a PSCI error (PSCI_= *) into the guest > x0, and skips the context restore? You are right about the current control flow: once the virtual SYSTEM_SUSPEND request has been accepted and the domain has been parked, a later failure in the Xen-wide suspend path resumes the domain through the n= ormal domain resume path, rather than returning a PSCI error from the original ca= ll. This is intentional in the current design. The virtual PSCI SYSTEM_SUSPEND path parks the domain and saves its resume context. The actual Xen-wide hos= t suspend is a separate step that is attempted only after all domains are suspended. So a failure in the later Xen-wide suspend step is treated as an abort of t= he host suspend attempt after the domain suspend was already accepted. The dom= ain is then resumed through the existing domain resume path, similarly to the toolstack/xl suspend-resume flow, rather than by re-entering the guest PSCI call path and modifying the saved vCPU context again. I agree this design is not obvious from the patch. I will clarify the commi= t message and comments. If you or the maintainers think that failures before = the physical SYSTEM_SUSPEND call succeeds should be reported back through the original virtual PSCI call, then this would require a different flow. I was trying to avoid that extra complexity in this series. > > > + } > > + > > + /* > > + * Non-boot CPUs have to be disabled on suspend and enabled on res= ume > > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to= PSCI > > + * CPU_OFF to be called by each non-boot CPU. Depending on the und= erlying > > + * platform capabilities, this may lead to the physical powering d= own of > > + * CPUs. > > + */ > > + status =3D disable_nonboot_cpus(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_nonboot_cpus; > > + } > > + > > + time_suspend(); > > + > > + status =3D iommu_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_time; > > + } > > + > > + console_start_sync(); > > + status =3D console_suspend(); > > + if ( status ) > > + { > > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=3D%d\n= ", status); > > + system_state =3D SYS_STATE_resume; > > + goto resume_end_sync; > > + } > > + > > + local_irq_save(flags); > > + status =3D gic_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_irqs; > > + } > > + > > + set_init_ttbr(xen_pgtable); > > + > > + /* > > + * Enable identity mapping before entering suspend to simplify > > + * the resume path > > + */ > > + update_boot_mapping(true); > > + > > + if ( prepare_resume_ctx(&cpu_context) ) > > + { > > + status =3D call_psci_system_suspend(); > > + /* > > + * If suspend is finalized properly by above system suspend PS= CI call, > > + * the code below in this 'if' branch will never execute. Exec= ution > > + * will continue from hyp_resume which is the hypervisor's res= ume point. > > + * In hyp_resume CPU context will be restored and since link-r= egister is > > + * restored as well, it will appear to return from prepare_res= ume_ctx. > > + * The difference in returning from prepare_resume_ctx on syst= em suspend > > + * versus resume is in function's return value: on suspend, th= e return > > + * value is a non-zero value, on resume it is zero. That is wh= y the > > + * control flow will not re-enter this 'if' branch on resume. > > + */ > > + if ( status ) > > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err= =3D%d\n", > > + status); > > + } > > + > > + system_state =3D SYS_STATE_resume; > > + update_boot_mapping(false); > > + > > + gic_resume(); > > + > > + resume_irqs: > > + local_irq_restore(flags); > > + > > + console_resume(); > > + resume_end_sync: > > + console_end_sync(); > > + > > + iommu_resume(); > > + > > + resume_time: > > + time_resume(); > > + > > + resume_nonboot_cpus: > > + /* > > + * The rcu_barrier() has to be added to ensure that the per cpu ar= ea is > > + * freed before a non-boot CPU tries to initialize it (_free_percp= u_area() > > + * has to be called before the init_percpu_area()). This scenario = occurs > > + * when non-boot CPUs are hot-unplugged on suspend and hotplugged = on resume. > > + */ > > + rcu_barrier(); > > + enable_nonboot_cpus(); > > + > > + resume_scheduler: > > + scheduler_enable(); > > + thaw_domains(); > > + > > + system_state =3D SYS_STATE_active; > > + > > + printk("Resume (status %d)\n", status); > > + > > + domain_resume(d); > > +} > > + > > +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL); > > + > > +void host_system_suspend(struct domain *d) > > +{ > > + system_suspend_tasklet.data =3D (void *)d; > > + /* > > + * The suspend procedure has to be finalized by the pCPU#0 (non-bo= ot pCPUs > > + * will be disabled during the suspend). > > + */ > > + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); > > +} > > + > > /* > > * Local variables: > > * mode: C > > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > > index bd87ec430d..8fb9172186 100644 > > --- a/xen/arch/arm/vpsci.c > > +++ b/xen/arch/arm/vpsci.c > > @@ -5,6 +5,7 @@ > > > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(register_= t epoint, register_t cid) > > if ( is_64bit_domain(d) && is_thumb ) > > return PSCI_INVALID_ADDRESS; > > > > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ > > - if ( is_hardware_domain(d) ) > > + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d) ) > > return PSCI_NOT_SUPPORTED; > > > > /* Ensure that all CPUs other than the calling one are offline */ > > @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(register_= t epoint, register_t cid) > > "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid=3D= %#"PRIregister"\n", > > epoint, cid); > > > > + if ( is_control_domain(d) ) > > Why is_control_domain() here and not is_hardware_domain() ? The use of is_control_domain() is intentional. The intended model is that Xen-wide host suspend is orchestrated by the privileged management/control domain. The control domain coordinates the toolstack side, asks other domains to enter suspend, and then issues the fi= nal SYSTEM_SUSPEND request to Xen. This does not have to be the same entity as the hardware domain. If the hardware domain is separate, it is one of the domains that the control doma= in parks before the final host suspend step. The hwdom-specific checks in this patch have a different purpose: they avoi= d the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardware domain to be parked as part of the suspend sequence. They do not define the policy for who is allowed to trigger Xen-wide host suspend. That said, this policy may not be optimal for all configurations, especiall= y when the control and hardware domain roles are split. I would appreciate yo= ur view, as well as the maintainers' views, on whether the trigger should rema= in control-domain based, be tied to the hardware domain instead, or be express= ed through a separate host-suspend capability/helper. > > > + host_system_suspend(d); > > + > > return rc; > > } > > > > @@ -290,7 +293,10 @@ static int32_t do_psci_1_0_features(uint32_t psci_= func_id) > > return 0; > > case PSCI_1_0_FN32_SYSTEM_SUSPEND: > > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > > - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTE= D : 0; > > + if ( IS_ENABLED(CONFIG_SYSTEM_SUSPEND) || > > + !is_hardware_domain(current->domain) ) > > Should this have also the condition that =E2=80=9Cis hardware domain and = psci_ver >=3D PSCI_VERSION(1, 0)=E2=80=9D? > Otherwise if the host machine doestn=E2=80=99t support PSCI 1.0 we would = return OK here but the call would > fail later in call_psci_system_suspend()? Good point. I agree that, for the domain allowed to trigger Xen-wide suspend, Xen shoul= d not advertise SYSTEM_SUSPEND if the host suspend path cannot be used. I think this should be checked as an explicit host SYSTEM_SUSPEND capabilit= y, rather than only as psci_ver >=3D PSCI_VERSION(1, 0). The same capability c= heck also needs to be enforced in the actual SYSTEM_SUSPEND handler before parki= ng the domain, because a caller may invoke SYSTEM_SUSPEND directly without fir= st querying PSCI_FEATURES. For ordinary guests, the physical PSCI version is not relevant because they cannot trigger host suspend; their SYSTEM_SUSPEND path is virtual. I will make this consistent in v9: PSCI_FEATURES will advertise SYSTEM_SUSP= END for the host-suspend-triggering domain only when the host SYSTEM_SUSPEND ba= ckend is available, and the actual SYSTEM_SUSPEND path will enforce the same chec= k. > > > + return 0; > > + fallthrough; > > default: > > return PSCI_NOT_SUPPORTED; > > } > > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > > index 0a20aa0a12..feb1336f46 100644 > > --- a/xen/common/Kconfig > > +++ b/xen/common/Kconfig > > @@ -137,6 +137,9 @@ config HAS_EX_TABLE > > config HAS_FAST_MULTIPLY > > bool > > > > +config HAS_HWDOM_SYSTEM_SUSPEND > > + bool > > + > > config HAS_IOPORTS > > bool > > > > diff --git a/xen/common/domain.c b/xen/common/domain.c > > index bb9e210c28..d3edfb2a13 100644 > > --- a/xen/common/domain.c > > +++ b/xen/common/domain.c > > @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) > > domain_shutdown(d, SHUTDOWN_crash); > > } > > > > +static inline bool want_hwdom_shutdown(uint8_t reason) > > +{ > > + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || > > + reason !=3D SHUTDOWN_suspend; > > +} > > > > int domain_shutdown(struct domain *d, u8 reason) > > { > > @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) > > d->shutdown_code =3D reason; > > reason =3D d->shutdown_code; > > > > - if ( is_hardware_domain(d) ) > > + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) > > hwdom_shutdown(reason); > > > > if ( d->is_shutting_down ) > > diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthrou= gh/arm/smmu.c > > index 22d306d0cb..45f29ef8ec 100644 > > --- a/xen/drivers/passthrough/arm/smmu.c > > +++ b/xen/drivers/passthrough/arm/smmu.c > > @@ -2947,6 +2947,13 @@ static void arm_smmu_iommu_domain_teardown(struc= t domain *d) > > xfree(xen_domain); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +static int arm_smmu_suspend(void) > > +{ > > + return -ENOSYS; > > +} > > +#endif > > Maybe we want to gate the feature also to !CONFIG_ARM_SMMU ? I would wait= for the maintainers > view on this. I feel that gating this strictly on !CONFIG_ARM_SMMU might not be the most optimal approach here. CONFIG_ARM_SMMU is a build-time option and does not mean that an old SMMUv1= /v2 device is actually present. Using it would disable system suspend even on platforms where only SMMUv3 is used, because CONFIG_ARM_SMMU is enabled by default for Arm. The condition should be runtime-based: whether the active/probed IOMMU devi= ces have system suspend/resume support. For the old ARM SMMU driver this is not implemented today, so a platform with an SMMUv1/v2 instance should not expo= se or attempt host suspend. I think we should handle this by tracking whether any old ARM SMMUv1/v2 dev= ice was actually probed, or by adding a generic IOMMU suspend capability check.= Then the host suspend availability check can reject system suspend only when suc= h an unsupported IOMMU is present, instead of disabling the feature for all Arm builds with CONFIG_ARM_SMMU enabled. I would be interested to hear if you or the maintainers see a better way to express this capability. Best regards, Mykola > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Tue May 05 20:39:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 20:39:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301098.1575435 (Exim 4.92) (envelope-from ) id 1wKMYM-0005mV-Pj; Tue, 05 May 2026 20:39:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301098.1575435; Tue, 05 May 2026 20:39:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMYM-0005mO-N7; Tue, 05 May 2026 20:39:38 +0000 Received: by outflank-mailman (input) for mailman id 1301098; Tue, 05 May 2026 20:39:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKMYL-0005mI-Np for xen-devel@lists.xenproject.org; Tue, 05 May 2026 20:39:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKMYL-006JzV-4k for xen-devel@lists.xenproject.org; Tue, 05 May 2026 22:39:37 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa5589-2eae-0a2a0a5409dd-0a2a4507df40-0 for ; Tue, 05 May 2026 22:39:37 +0200 Received: from [136.143.188.51] (helo=sender4-of-o51.zoho.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa5587-229c-0a2a45070019-888fbc3352be-3 for ; Tue, 05 May 2026 22:39:36 +0200 Received: by mx.zohomail.com with SMTPS id 1778013565284692.9140756033918; Tue, 5 May 2026 13:39:25 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=zoho header.d=apertussolutions.com header.i="dpsmith@apertussolutions.com" header.h="Message-ID:Date:MIME-Version:Subject:To:Cc:References:From:In-Reply-To:Content-Type:Content-Transfer-Encoding" ARC-Seal: i=1; a=rsa-sha256; t=1778013568; cv=none; d=zohomail.com; s=zohoarc; b=fdvo+7ThLN5jMZJStd9qYcScfM3HotMoTGfOsksKBK57IamhYTHwIU+JJB7od9l84jV1jIJdeDS+3LYoDiGgWQc3/UaIuSMVuwZLgX+pOpIcEImCcbOigakt87KCUqalnhlefeWiOR7rFOKp4WxukwivKkj73Rhecuq5ZjwOMFI= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1778013568; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=KOuaFhoFvTlT5kNzqoeorQp/xZ922AkKTe5UI5FSTls=; b=Wp6VG+dGY5y7YDr8fs31QaSzxoxv0B7+8hcG7KhdG3yjiJXTxhDt4tSiUJs0WvlYhK7yrIkfW2PzKDOx8w+bVeQ1iJuYam3zywX2i087td8Ux8+ljrobpJeY0IniCbvgVRpbmPXlQTjs0FmNhge0VspnjiQEgYxRDMd+epnF9Rw= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=apertussolutions.com; spf=pass smtp.mailfrom=dpsmith@apertussolutions.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1778013568; s=zoho; d=apertussolutions.com; i=dpsmith@apertussolutions.com; h=Message-ID:Date:Date:MIME-Version:Subject:Subject:To:To:Cc:Cc:References:From:From:In-Reply-To:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To; bh=KOuaFhoFvTlT5kNzqoeorQp/xZ922AkKTe5UI5FSTls=; b=PHdMvxcFd+qsfbCCh3I6+GKiwIt83u9XtP3cobgiEXahILK+YEo8xQ8IIm9wLTxH wAwo8RGnA3qR8LM7FijMMEC7xLanILOLkQr/m6LzaDPN8/Q08mpqFMJHigmVCuSyXZn FGQGeTSOmwItGMbGcBKU+bcZOisf5JF4EVMHecp8= Message-ID: <2c747296-5f18-406f-9a78-4deabdc27ac1@apertussolutions.com> Date: Tue, 5 May 2026 16:39:23 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Ping: [PATCH] EFI: adjust cfg file buffer freeing Content-Language: en-US To: Jan Beulich , Marek Marczykowski Cc: Bernhard Kaindl , "xen-devel@lists.xenproject.org" References: From: "Daniel P. Smith" Autocrypt: addr=dpsmith@apertussolutions.com; keydata= xsJuBFYrueARCACPWL3r2bCSI6TrkIE/aRzj4ksFYPzLkJbWLZGBRlv7HQLvs6i/K4y/b4fs JDq5eL4e9BdfdnZm/b+K+Gweyc0Px2poDWwKVTFFRgxKWq9R7McwNnvuZ4nyXJBVn7PTEn/Z G7D08iZg94ZsnUdeXfgYdJrqmdiWA6iX9u84ARHUtb0K4r5WpLUMcQ8PVmnv1vVrs/3Wy/Rb foxebZNWxgUiSx+d02e3Ad0aEIur1SYXXv71mqKwyi/40CBSHq2jk9eF6zmEhaoFi5+MMMgX X0i+fcBkvmT0N88W4yCtHhHQds+RDbTPLGm8NBVJb7R5zbJmuQX7ADBVuNYIU8hx3dF3AQCm 601w0oZJ0jGOV1vXQgHqZYJGHg5wuImhzhZJCRESIwf+PJxik7TJOgBicko1hUVOxJBZxoe0 x+/SO6tn+s8wKlR1Yxy8gYN9ZRqV2I83JsWZbBXMG1kLzV0SAfk/wq0PAppA1VzrQ3JqXg7T MZ3tFgxvxkYqUP11tO2vrgys+InkZAfjBVMjqXWHokyQPpihUaW0a8mr40w9Qui6DoJj7+Gg DtDWDZ7Zcn2hoyrypuht88rUuh1JuGYD434Q6qwQjUDlY+4lgrUxKdMD8R7JJWt38MNlTWvy rMVscvZUNc7gxcmnFUn41NPSKqzp4DDRbmf37Iz/fL7i01y7IGFTXaYaF3nEACyIUTr/xxi+ MD1FVtEtJncZNkRn7WBcVFGKMAf+NEeaeQdGYQ6mGgk++i/vJZxkrC/a9ZXme7BhWRP485U5 sXpFoGjdpMn4VlC7TFk2qsnJi3yF0pXCKVRy1ukEls8o+4PF2JiKrtkCrWCimB6jxGPIG3lk 3SuKVS/din3RHz+7Sr1lXWFcGYDENmPd/jTwr1A1FiHrSj+u21hnJEHi8eTa9029F1KRfocp ig+k0zUEKmFPDabpanI323O5Tahsy7hwf2WOQwTDLvQ+eqQu40wbb6NocmCNFjtRhNZWGKJS b5GrGDGu/No5U6w73adighEuNcCSNBsLyUe48CE0uTO7eAL6Vd+2k28ezi6XY4Y0mgASJslb NwW54LzSSM0uRGFuaWVsIFAuIFNtaXRoIDxkcHNtaXRoQGFwZXJ0dXNzb2x1dGlvbnMuY29t PsJ6BBMRCAAiBQJWK7ngAhsjBgsJCAcDAgYVCAIJCgsEFgIDAQIeAQIXgAAKCRBTc6WbYpR8 KrQ9AP94+xjtFfJ8gj5c7PVx06Zv9rcmFUqQspZ5wSEkvxOuQQEAg6qEsPYegI7iByLVzNEg 7B7fUG7pqWIfMqFwFghYhQzOwU0EViu54BAIAL6MXXNlrJ5tRUf+KMBtVz1LJQZRt/uxWrCb T06nZjnbp2UcceuYNbISOVHGXTzu38r55YzpkEA8eURQf+5hjtvlrOiHxvpD+Z6WcpV6rrMB kcAKWiZTQihW2HoGgVB3gwG9dCh+n0X5OzliAMiGK2a5iqnIZi3o0SeW6aME94bSkTkuj6/7 OmH9KAzK8UnlhfkoMg3tXW8L6/5CGn2VyrjbB/rcrbIR4mCQ+yCUlocuOjFCJhBd10AG1IcX OXUa/ux+/OAV9S5mkr5Fh3kQxYCTcTRt8RY7+of9RGBk10txi94dXiU2SjPbassvagvu/hEi twNHms8rpkSJIeeq0/cAAwUH/jV3tXpaYubwcL2tkk5ggL9Do+/Yo2WPzXmbp8vDiJPCvSJW rz2NrYkd/RoX+42DGqjfu8Y04F9XehN1zZAFmCDUqBMa4tEJ7kOT1FKJTqzNVcgeKNBGcT7q 27+wsqbAerM4A0X/F/ctjYcKwNtXck1Bmd/T8kiw2IgyeOC+cjyTOSwKJr2gCwZXGi5g+2V8 NhJ8n72ISPnOh5KCMoAJXmCF+SYaJ6hIIFARmnuessCIGw4ylCRIU/TiXK94soilx5aCqb1z ke943EIUts9CmFAHt8cNPYOPRd20pPu4VFNBuT4fv9Ys0iv0XGCEP+sos7/pgJ3gV3pCOric p15jV4PCYQQYEQgACQUCViu54AIbDAAKCRBTc6WbYpR8Khu7AP9NJrBUn94C/3PeNbtQlEGZ NV46Mx5HF0P27lH3sFpNrwD/dVdZ5PCnHQYBZ287ZxVfVr4Zuxjo5yJbRjT93Hl0vMY= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ZohoMailClient: External X-purgate-ID: tlsNG-ef75cf/1778013577-2B175C48-0E11125E/0/0 X-purgate-type: clean X-purgate-size: 2843 On 5/4/26 09:30, Jan Beulich wrote: > On 22.04.2026 13:51, Jan Beulich wrote: >> The boot services FreePages() needs passing the size. Since we allocated >> one more byte to put a trailing nul there, we also need to bump the size >> passed there. Make a small helper function to centralize this. >> >> Note that there's no permanent memory leak because of the oversight: The >> allocation is done using EfiLoaderData, and all memory of that type is >> later reclaimed anyway. >> >> Fixes: df75f77092c1 ("EFI: avoid OOB config file reads") >> Reported-by: Bernhard Kaindl >> Signed-off-by: Jan Beulich > > Marek, Daniel? > > Thanks, Jan > >> --- >> This is an alternative proposal to >> https://lists.xen.org/archives/html/xen-devel/2026-04/msg01044.html. >> >> --- a/xen/common/efi/boot.c >> +++ b/xen/common/efi/boot.c >> @@ -778,6 +778,16 @@ static void __init efi_relocate_esrt(EFI >> */ >> #include "efi-boot.h" >> >> +static void __init free_cfg(void) >> +{ >> + if ( !cfg.need_to_free ) >> + return; >> + >> + /* One extra byte was allocated to put a nul character there. */ >> + efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size + 1)); >> + cfg.need_to_free = false; >> +} >> + >> void __init noreturn blexit(const CHAR16 *str) >> { >> if ( str ) >> @@ -787,8 +797,7 @@ void __init noreturn blexit(const CHAR16 >> if ( !efi_bs ) >> efi_arch_halt(); >> >> - if ( cfg.need_to_free ) >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> + free_cfg(); >> if ( kernel.need_to_free ) >> efi_bs->FreePages(kernel.addr, PFN_UP(kernel.size)); >> if ( ramdisk.need_to_free ) >> @@ -1557,11 +1566,7 @@ void EFIAPI __init noreturn efi_start(EF >> name.s = get_value(&cfg, "global", "chain"); >> if ( !name.s ) >> break; >> - if ( cfg.need_to_free ) >> - { >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> - cfg.need_to_free = false; >> - } >> + free_cfg(); >> if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) >> { >> PrintStr(L"Chained configuration file '"); >> @@ -1631,11 +1636,7 @@ void EFIAPI __init noreturn efi_start(EF >> >> efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); >> >> - if ( cfg.need_to_free ) >> - { >> - efi_bs->FreePages(cfg.addr, PFN_UP(cfg.size)); >> - cfg.need_to_free = false; >> - } >> + free_cfg(); >> >> if ( dir_handle ) >> dir_handle->Close(dir_handle); > Acked-by: Daniel P. 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pr=C Message-ID: <089b9287-addb-4736-8174-f8a297de877f@amd.com> Date: Tue, 5 May 2026 17:10:22 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jason Andryuk Subject: Re: [PATCH v10 2/2] xen: Strip xen.efi by default To: Frediano Ziglio , CC: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , "Julien Grall" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Frediano Ziglio" , Demi Marie Obenour , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Stewart Hildebrand , Oleksii Kurochko References: <20251208133945.61375-1-frediano.ziglio@citrix.com> <20251208133945.61375-3-frediano.ziglio@citrix.com> Content-Language: en-US In-Reply-To: <20251208133945.61375-3-frediano.ziglio@citrix.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B3:EE_|SA1PR12MB9472:EE_ X-MS-Office365-Filtering-Correlation-Id: 44152470-33cb-4ff9-afbc-08deaaeab9b8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|7416014|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: TLFFy0clTYwzbss+yz02rb3wmjcQiJffNHv6iQAsr5axiQW/Np7+VznloPjV1Nv27sO8Z26AtzY19Wqn3+L+wOVbfy9PiXD3dSe8aNHeLFwjSvReUNF9FHGFNjnM6BVlsRicCTMXu8un0mXeZRU/f0UNYC2ZpnT1dYrRkFTMdC9j7XIPNqzVSZ+KqNL2i1qtynpV/9sUGASd4FHsk5CXSstX6FZsr/svjw9hfGZAlod9e5VoHNLDK25w0JmhAmMD8lCGHGqLde5bX9uHs9vCp35EurXqWNpWSlthVgX/TnCERmfu17XBl9NKg6mz3B1vV+XlHUeIb0T619Vl/fXT4KHgA622t7xIlmECd9lvfErNGEPZY5wf86EVH99m4bXQlJ6FhUK6K1aWlGZVwrDZUECU+muL+OS6RuXChuXjMxPB8NpgaaU68LqgJeTS+FFt X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 May 2026 21:10:24.7781 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 44152470-33cb-4ff9-afbc-08deaaeab9b8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9472 X-purgate-ID: tlsNG-d62444/1778015430-BF07EFF4-044A71D2/10/73395122804 X-purgate-type: spam X-purgate-size: 672 On 2025-12-08 08:39, Frediano Ziglio wrote: > From: Frediano Ziglio > > For xen.gz file we strip all symbols and have an additional > xen-syms.efi file version with all symbols. > Make xen.efi more coherent stripping all symbols too. > xen-syms.efi can be used for debugging. > > Signed-off-by: Frediano Ziglio > Acked-by: Andrew Cooper > Acked-by: Oleksii Kurochko Reviewed-by: Jason Andryuk While there is some discussion about patch 1, it seems like this patch can do in independently of it? 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No.  One of the containers in CI has a buggy binutils. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 05 23:45:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 05 May 2026 23:45:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301140.1575464 (Exim 4.92) (envelope-from ) id 1wKPRa-0006Vr-Sd; Tue, 05 May 2026 23:44:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301140.1575464; Tue, 05 May 2026 23:44:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKPRa-0006Vk-Nj; Tue, 05 May 2026 23:44:50 +0000 Received: by outflank-mailman (input) for mailman id 1301140; Tue, 05 May 2026 23:44:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKPRZ-0006Vb-9U for xen-devel@lists.xenproject.org; Tue, 05 May 2026 23:44:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKPRY-006eM6-CN for xen-devel@lists.xenproject.org; Wed, 06 May 2026 01:44:48 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fa80c1-5cb7-0a2a0a5109dd-0a2a4501adb2-10 for ; Wed, 06 May 2026 01:44:48 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fa80ef-c1f2-0a2a45010019-ac6904feb116-3 for ; Wed, 06 May 2026 01:44:48 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id B71886132B; Tue, 5 May 2026 23:44:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3F9CDC2BCB4; Tue, 5 May 2026 23:44:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778024686; bh=b8j1sHpjkVrIyErITFXadqJdjC4rkucTFOGDYG9cubk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=p7fWhtDUJAH9gqVJbuN752kRyZ76ePntis6fNOYwoZLg8g/qMt01rjU0RndH+mYFu cvV9ZeQOpKeSAE4mKJdKbVIB44KiAQFgea6UNQFJpExpgCfkb9EhYteYi3aQwo/XHy Z8h79KNMow/J9YOcrfuxiuPizgpz2QFHyYy0OpHOXn9SHoJOimGyQd0/6OHRzUMunB 7qa879iKj9F9iLs1Br3HJpkCtZ1YGMncRXDCk6IutrRoJcVG71jRnjlAdBtHjJOpDw n/z/1pcTKHM+p0sMaLa4iTTdDlosACv+PvXVgR0T01eUkafOZ/FbtrHQxvKXg0V+xd rgZhF6uU5uFDg== Date: Tue, 5 May 2026 16:44:45 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Andrew Cooper cc: Xen-devel , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: Re: [PATCH v2] CI: Refresh the Debian 12 cppcheck container In-Reply-To: <20260505191708.1432070-1-andrew.cooper3@citrix.com> Message-ID: References: <20260505191708.1432070-1-andrew.cooper3@citrix.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d62444/1778024688-B727DFF4-71B108DF/0/0 X-purgate-type: clean X-purgate-size: 598 On Tue, 5 May 2026, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to derive from bookworm-slim, and to build and run > cppcheck as a normal user. User heredocs for readability and use apt-get > --no-install-recommends to keep the size down. > > Changed the libpcre3-dev dependency to libpcre3, as the -dev package > is only needed for building, not for running. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Wed May 06 05:56:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 05:56:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301155.1575475 (Exim 4.92) (envelope-from ) id 1wKVFJ-0006aj-Vk; Wed, 06 May 2026 05:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301155.1575475; Wed, 06 May 2026 05:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKVFJ-0006Zv-RA; Wed, 06 May 2026 05:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1301155; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 2/2] x86/amd_node: reject SMN access when amd_smn_init() did not complete Date: Wed, 6 May 2026 13:55:19 +0800 Message-ID: <20260506055528.476493-3-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260506055528.476493-1-penny.zheng@amd.com> References: <20260506055528.476493-1-penny.zheng@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|DS0PR12MB7947:EE_ X-MS-Office365-Filtering-Correlation-Id: 4b19c043-6684-4e11-fa26-08deab3434d1 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|22082099003|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: rRckkP3aBlyKpJ0JzlJhaH7wsLTuUgan2bBVLQb/lIlh3jq9TbXEC/maTaqXnA3p+KOFPB2WnVdE0JVR7LHvjfDK0KKdC4M+YYNbtKUN8O3B3mIvpL/0YQViEV8BkcizmGwKEnVsOdxXYfo3JnTwuTl9sOFL0/t+MkbZhz1fXkJoMWDqkSSYv+pNl2s4epDEt+uvUY9k2KHvj1Av0H1tv/J35mj8Z1bd1utvg5zVUoePREBNDYNMPgQNEb7mrq+/DtaEhP46N7NcUnpLy2QT86ylBYkUvgP75xqHNZcbM2B45jMhHtr5IfiYIQ28Vx7wrGJOY1hHJyxiLBm2bBJxQPkAfU23qtxUevy75TbwUsfUSdJmN+43fXTFp70mg/lpLCwXo9q9VpoNapX2LyhuAYfj5HJm3APs6XBh65MBu0B3Wr339DfA+LckWdwV5vs4RECUAnB4aOZeCiJ+L7+qOT74mB1AbyDQQCtN3eBsAJrTp++mRxY/KgbcnGr3yfwGNQ/7D2paE202UltBTEgRAtrsTGizokittgKyfP8sFgzdZQw5PrpvRZ58ldRVQJs0XmQptp9BpDHrmAx7Xy6EJvelLI1sFu4xXnhyNTkyhIOOc9vU2MhJP7J1bt0qB2tLSR+SbHL09sYSaeZfmyiUrhZk21QeR7e60/wxAqMHb6x50NOQLlGUNTA5WMFbDdx5hj2WGnsBsb0p4Lv8zwjOsmoR0Lh4uvd534RHAQbv6Mc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(22082099003)(56012099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mXlVNtNoo1kzNJh+imVuy1XCt55xpUiuUDxjjkMAl8pFT9/CRKPgt1GQRf/r9cBPnpteeU83OnlPkexoYYHuoyoXhpCSA1GVDnt9A3oiMtwz35sRv1XOlAdkLXTGZOH0b42+qZuSpy77jjNRbJ6kYRl4sW+ht86bNLSYR0WdAjeTLZeE2Ppr/axbgyxZQ0jRfvoN3AkIKyNeIROrCvqmp0nfTV8BjGcuzvTVW7jmHWENvOjcPvILp32Ugs9sLim4E8WlTOebbQchJddVJD9c7rKKg0Le3aIkstFutYHxDBfrja/VcZeofuF02gjI5bRxL1CCQMifEBdrFbv2NcP8ObmmFL+WdxF/YHnkaCUT8BSNqWufN4FeRbwMY1a3wqXP5kZQuhS9+7Mx04hBQcJRdGiVL7/EAY63PtI5steD0dMCSvTalNSdig/3tugytaRL X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:24.5348 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4b19c043-6684-4e11-fa26-08deab3434d1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7947 X-purgate-ID: tlsNG-d62444/1778046991-B5E6BFF4-2BC44A69/0/0 X-purgate-type: clean X-purgate-size: 1820 amd_smn_init() can fail early (e.g. -ENODEV when num_roots < num_nodes, -ENOMEM from kcalloc) without setting smn_exclusive. In that case amd_roots stays NULL, but the existing __amd_smn_rw() ordering dereferenced amd_roots[node] before the smn_exclusive guard. The first SMN consumer (e.g. amd_pmc_probe -> amd_smn_read) then hit a NULL pointer dereference instead of getting -ENODEV. Move the smn_exclusive check to the very beginning of __amd_smn_rw() so a failed init is rejected before any deref. Also zero *value in amd_smn_read() on the error path so callers never read uninitialized data via the subsequent PCI_POSSIBLE_ERROR() check. Signed-off-by: Penny Zheng --- arch/x86/kernel/amd_node.c | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/amd_node.c b/arch/x86/kernel/amd_node.c index c896060fe0df..cb9ed022c53c 100644 --- a/arch/x86/kernel/amd_node.c +++ b/arch/x86/kernel/amd_node.c @@ -88,6 +88,9 @@ static int __amd_smn_rw(u8 i_off, u8 d_off, u16 node, u32 address, u32 *value, b struct pci_dev *root; int err = -ENODEV; + if (!smn_exclusive) + return err; + if (node >= amd_num_nodes()) return err; @@ -95,9 +98,6 @@ static int __amd_smn_rw(u8 i_off, u8 d_off, u16 node, u32 address, u32 *value, b if (!root) return err; - if (!smn_exclusive) - return err; - guard(mutex)(&smn_mutex); err = pci_write_config_dword(root, i_off, address); @@ -116,6 +116,11 @@ int __must_check amd_smn_read(u16 node, u32 address, u32 *value) { int err = __amd_smn_rw(SMN_INDEX_OFFSET, SMN_DATA_OFFSET, node, address, value, false); + if (err) { + *value = 0; + return err; + } + if (PCI_POSSIBLE_ERROR(*value)) { err = -ENODEV; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 0/2] x86/amd_node: harden amd_smn_init() against Xen dom0 topology Date: Wed, 6 May 2026 13:55:17 +0800 Message-ID: <20260506055528.476493-1-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|SN7PR12MB7177:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e8aa03c-bfff-4236-e045-08deab3433fb X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|1800799024|376014|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: 1NVEyBkMl3LqMEGt3NC80/SzFN0Hpg6xvKTMYGPUfbUj+o3m43e3P/GFMl7j8LgTmd0cEyjE0W+LysZM1VytePiUkHviB8EAzKcwVu0EHtPWD5aZKrGpVWDTlMrJQ8ngXg18qI3TEamqGggEjBPY2OunV8flVlCYimLTLEstjWxbUpsxbLJKyNkOhlYYhlVgNgALKsImOrTsw12n2tKTfg84koAlywp+NeqiEdnIViQG9Qmlpmi16qbZemWEYaIpOthItOFH61Ut2l5pG/nfbzcmXef8YbAlOzFMTvM4jDIxHjxcVsSd3PopNc8hmiJnNCraND5uMiFCpAVdU4DP4p/mP7K2KCHzKUTIxS8/VE5EPTGZwFjPXFMmY5boz9+DJBgNjzKLvQB4r8Rn4z8hrLttWi8PsZo2y+oEyFGfa/6v2qg6Uvyezb5PpxpDPpHoWGRv8qrZ7KJWC0937/uhX7JbWQH0hoUjVhKBlfCbzQoCfAlIky3ut9vzQmaNcRVW8Tn68QhTqR6B8+ahXItUsIif120DoNvg/Sgg3W8o14DGguxRl9FAx0JGlMBFL4kFQHiHtXUWWEs+JzstBnRbhkbFVDMaDVlck7J55+x8uVL4vTuJjbde+alI1RENN85yKQJiY0cxTstwu1Y2jD+oe1vc/km3nNpdWvWL8OYEQu+edm7cl/isd25bYM0vvksiJeTTluaQb5lwzsUN92IKsdcJPpEvRKjEKEUxm5wv2Yc= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(1800799024)(376014)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XYJrrHJ4b4FCGJ9KDdD1K1CPGDtG7/qztUH2o+cpSMg3ux0VNL6RooTSTIJIjJxSA3Xo3Y9uisdahDYebfT3F2qXaAXlVWNjVkn1m1CNmKMHUOluzyI3VLwffFiWNWokh6F7wuh6DnLuxdtgo+C14+yDWuTtYGXwsyoR3bhvnv/sExlPskZRmnVCu4Z/J9kL0fsjkTT5oBtQg8tFQny9WoKRm3S1/xaId4/gbCmWNiOguO92d+wV6uqq+ETxsqkdT3mAe3AvsbYeD4Y2mjZx7EdnVpuXm1mloSJJKL6AAplOwRd7M6aRiLJPCCS0gEYk4A0n3sm78JLwEb68X955cb0imcrlDPWfQ9vo2sYZooivw1TFLwS1Vo5ME/edHnDKwsskejCXNuTB6Q9uTK4LDaBqM+oGCcAP9xngdp1yEDH7p6diOoH0xVWiKg8JMoS+ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:23.1329 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e8aa03c-bfff-4236-e045-08deab3433fb X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB7177 X-purgate-ID: tlsNG-4011c0/1778046991-4797E8B7-CA23AB72/0/0 X-purgate-type: clean X-purgate-size: 1221 While booting a recent linux-next kernel as a Xen PVH dom0 on x86, the kernel oopses very early during fs_initcall: Oops: divide error: 0000 [#1] SMP NOPTI RIP: 0010:amd_smn_init+0x188/0x2e0 Followed: on a kernel that survives the divide, it will fail by a NULL pointer dereference from the first SMN consumer (amd_pmc_probe -> amd_smn_read). Root cause ========== To prevent each dom0 vCPU from looking like an SMT sibling of another vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every vCPU's APIC ID by 2 can push the synthesized IDs past the package-field boundary. Linux then infers more "packages" and therefore more AMD nodes via amd_num_nodes() than the platform actually has, while the PCI-side host-bridge scan correctly reports the number of root complex. The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of linux-next/master (next-20260505). Penny Zheng (2): x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 x86/amd_node: reject SMN access when amd_smn_init() did not complete arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- 1 file changed, 20 insertions(+), 3 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 05:56:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 05:56:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301154.1575472 (Exim 4.92) (envelope-from ) id 1wKVFJ-0006Yg-OX; Wed, 06 May 2026 05:56:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301154.1575472; Wed, 06 May 2026 05:56:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKVFJ-0006YY-Jn; Wed, 06 May 2026 05:56:33 +0000 Received: by outflank-mailman (input) for mailman id 1301154; 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pr=C From: Penny Zheng To: CC: , , , Penny Zheng , "Mario Limonciello" , Yazen Ghannam , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , , Subject: [PATCH v1 1/2] x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 Date: Wed, 6 May 2026 13:55:18 +0800 Message-ID: <20260506055528.476493-2-penny.zheng@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260506055528.476493-1-penny.zheng@amd.com> References: <20260506055528.476493-1-penny.zheng@amd.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF00036F3F:EE_|SA5PPFD911547FB:EE_ X-MS-Office365-Filtering-Correlation-Id: 8b51d57d-91d4-4d7f-2040-08deab343453 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700016|82310400026|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: cy+qAi7I4xJtTYFwg/Xv7Tf5ht5MGr4cHFOe3vAYX6IGgQHjPpYRnQsWan9wkuai6Jj+offQtYO1a1DZ3DFKZOBJ5o/noynfsAfbgt2A4U8d5cTei0ixs27v7xMT+2yojuHuNqM+hGf06B6nIbCwUFZKWiJ/cZI1475bzWKqlCoejTdvRZbL3UpWw6SMh2MVKYA9rtT860nQ0zuwKV2iWxqjasmZXtM/lD3hVrYCyFM1FT3Im9Y9whYUOAeLwWycJHhYp6vQtzZU4GicFEkLe+NI09m+z73+PTru7C9xHVc8XIwEZYMNiI7DXmHTXyhjMpdPF9n8jn7uoQqPM9fqKYinEot94XLBVeHhkpFrxy+lN3qCs7aIKnsX4xwZFWHcHy/oYvJHrrXY8AIspkxkFKCFmn5uOFnjOPKKqblVe6kDqznl65NqqhDHsIyikKOZq4MP4M6EIe8uvqxw0ES8leypt+1rolay4rEIxbTUrJUeHkTZVsJx/qCyadgF3ph7Yl3nfJrwg23rWAlcWq6eTFvBsZu3P3b1UEKk3h8kMglSpJweo+d2thA8o+8Zb2Us8uzl3/faQMGRdim3S4+VSdUYXA1BSoSeDkUWCA9kGO+7qxKwMgcZZEErYgtpMLkjQYCaQFn8avXeon9FTFo1V1bkz6gO6FuWUYNF/6mCeE79ycMdQ/b/p1iqYTlXuk1WeF5TsMx9HsnBbQNy35P6z1y4ywiXQ3wAsNZEKmTwx5Y= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(376014)(36860700016)(82310400026)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ++9QBZu2qMm3vsjUnSr6e/ceM3c0R7gkHyjkPA3d39jAg4M4Pa7Qsqf233LskQMdMpJ55jhPitso3p9oVCLA3rOg68QI2Z/75Cps89DZL2FwE053LrUHxaQ4OiZZS0Gqv1rgtktWwkjn3uDLEcenMs5Z3jaGjEAQYaB/Qi392OueHGbE0JmpXmLAg4U21UNd/9Y2EKwUR5EHYaBG7fCPGDXFN04TwyoWlGyrZhj7vr1akeJOnni2JY6NqugsvmZNnKCfgomEU0QwTyess8jlgJvD+mWXIIVlhDBpPPMznA8qkIe7xIQ6tJM+MRt7cxHt0MpuC2y4lrAXtpwo74IggP4eyEr33IYWUVry2Gsxmqf2lt36dIIhebhGF6z7HlYbDiNNV+Xo4W+G+HMypvfagZGULW14DH5D+Yeza3FzAB+08/8fbqLqoXC+wStUWgQa X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 05:56:23.7040 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8b51d57d-91d4-4d7f-2040-08deab343453 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F3F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA5PPFD911547FB X-purgate-ID: tlsNG-720697/1778046989-83961161-0B5678D3/0/0 X-purgate-type: clean X-purgate-size: 1563 To prevent each dom0 vCPU from looking like an SMT sibling of another vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. While the spacing every vCPU's APIC ID by 2 can therefore push the IDs past the package-field boundary, making Linux see more packages than the platform actually has. amd_num_nodes() inherits that inflated count, so num_nodes can exceed num_roots (the number of AMD root complexes discovered on the PCI bus). The subsequent roots_per_node = num_roots / num_nodes; ... count % roots_per_node ... then divides by zero in amd_smn_init(). Reject num_roots < num_nodes explicitly and bail out with -ENODEV. Signed-off-by: Penny Zheng --- arch/x86/kernel/amd_node.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/x86/kernel/amd_node.c b/arch/x86/kernel/amd_node.c index 0be01725a2a4..c896060fe0df 100644 --- a/arch/x86/kernel/amd_node.c +++ b/arch/x86/kernel/amd_node.c @@ -282,6 +282,18 @@ static int __init amd_smn_init(void) return -ENODEV; num_nodes = amd_num_nodes(); + + /* + * Xen dom0's synthetic APIC IDs may imply more nodes than host + * bridges visible in PCI config space. Bail out to avoid a + * divide-by-zero when later computing roots_per_node. + */ + if (num_roots < num_nodes) { + pr_debug("AMD root count (%u) < node count (%u); skipping SMN init\n", + num_roots, num_nodes); + return -ENODEV; + } + amd_roots = kzalloc_objs(*amd_roots, num_nodes); if (!amd_roots) return -ENOMEM; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:04:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:04:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301193.1575499 (Exim 4.92) (envelope-from ) id 1wKWIh-0000Ec-4L; Wed, 06 May 2026 07:04:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301193.1575499; Wed, 06 May 2026 07:04:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWIh-0000EV-0q; Wed, 06 May 2026 07:04:07 +0000 Received: by outflank-mailman (input) for mailman id 1301193; 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bh=Fg+lytjX2eC7vk4fU66yjnfexhWiq5rgVoT1c2N5wDg=; b=zojqloKswAjeR2nh53EBWtLKs2w5lrn6JJuduH+DcPB36l7A1Bpyqc2XfUYrpoKe9q2BSIOjpTZ7s8Xtq9PnHz2+nB2/xQnX299APs0PEdlQmK7md9uV2ch8ZviMXXLtQ2crtaGlF1t+g/kWodQ9vmAa+1S37WsE7dOQW+Zc/ZU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb07.amd.com; pr=C Message-ID: Date: Wed, 6 May 2026 09:01:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 1/2] xen/pdx: account for frametable_base_pdx in generic pdx_to_page/page_to_pdx To: Jan Beulich CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , "Volodymyr Babchuk" , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Timothy Pearson , Teddy Astie , References: <20260430125103.401811-1-michal.orzel@amd.com> <20260430125103.401811-2-michal.orzel@amd.com> <661c18d9-eceb-4a4e-ac2e-37a6931e06b2@suse.com> <8c5424c1-113a-4f5e-96bf-2613f28b8bac@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <8c5424c1-113a-4f5e-96bf-2613f28b8bac@suse.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: o0qT/yoEs3ABHz4tj8yem7OkVtr8v745S1GYmPIL4vWYhLCCWEdsaCFmAhPHOS73Q9ehJ67j0yq2A5DVMaaFoG7h5BNTAUFdjm/p5sleASq54MsplHhFXJkTODNMXZuX5kqgUJzCB69ogoRzIbf6oWLvtQqXcJhOQGQeGd6CulJMaphDubZmH9p+rAI34Ryc4CZLVqcWCZSk6ltOM1PcO4Yzt1c0eUNoTOzSgp/1l+XptDzZG27TwusDCmdQ0CA8vkbvgIz+1AVJzgYYl2BDX7LhRlsWHfKjzc7/PkQ1Mrco1lDZmpQvq+HKjxOxF7Mpv+8cyiwreVkcpFCJ1wFwQETPr84rETbt4MbMQP60Fl35XAzhh1OTRQrj4kdFmNhDc/1fX1hWchrNHD/exfXlicgdcer2C0vE9o8jN9wQUl9/8z9q62pkxkaGqL5JtMJN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 07:01:48.0559 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0e8820b-f4e9-491a-fbf6-08deab3d576a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CD.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8740 X-purgate-ID: tlsNG-33051d/1778051043-2A567938-9167F4E0/0/0 X-purgate-type: clean X-purgate-size: 2662 On 05-May-26 18:11, Jan Beulich wrote: > On 05.05.2026 16:52, Orzel, Michal wrote: >> >> >> On 05-May-26 15:05, Jan Beulich wrote: >>> On 30.04.2026 14:51, Michal Orzel wrote: >>>> --- a/xen/include/xen/pdx.h >>>> +++ b/xen/include/xen/pdx.h >>>> @@ -132,8 +132,9 @@ void set_pdx_range(unsigned long smfn, unsigned long emfn); >>>> */ >>>> bool __mfn_valid(unsigned long mfn); >>>> >>>> -#define page_to_pdx(pg) ((pg) - frame_table) >>>> -#define pdx_to_page(pdx) gcc11_wrap(frame_table + (pdx)) >>>> +#define page_to_pdx(pg) \ >>>> + ((unsigned long)((pg) - frame_table) + frametable_base_pdx) >>>> +#define pdx_to_page(pdx) gcc11_wrap(frame_table + ((pdx) - frametable_base_pdx)) >>> >>> If you alter these, ... >>> >>>> #define mfn_to_pdx(mfn) pfn_to_pdx(mfn_x(mfn)) >>>> #define pdx_to_mfn(pdx) _mfn(pdx_to_pfn(pdx)) >>> >>> ... how come these can remain unaltered? Maybe you have some special >>> arrangements in Arm code, but surely in generic code transformations done >>> should be uniform. After all >>> >>> ASSERT(page_to_pdx(pg) == mfn_to_pdx(page_to_mfn(pg))); >>> >>> (and alike) ought to be universally true for valid inputs. >> The invariant holds. There are two transformations on different >> boundaries: >> >> - PFN <-> PDX: the compression scheme — lives in mfn_to_pdx / >> pdx_to_mfn. >> - PDX <-> frame-table index: +/- frametable_base_pdx — lives in >> page_to_pdx / pdx_to_page (and Arm's page_to_mfn / mfn_to_page). >> >> On x86 the second is the identity (frametable_base_pdx == 0), so it's >> invisible. On Arm it isn't, so it has to appear in the macros that >> cross that boundary. Pushing it into mfn_to_pdx as well would mix the >> two boundaries and double-apply on Arm (page_to_mfn already adds it). > > That's yet more odd. These transformations should equally apply to > MFN <-> page (i.e. frame table index) and MFN <-> PDX translations. > PDX really is meant to be the frame table index, and at the same > time (scaled by PAGE_SHIFT) the direct map index. Both (generally > huge) tables equally benefit from whatever compression is in use, > and hence also ought to equally benefit from that > frametable_base_pdx-only sub-form of offset compression. The > anomaly of shrinking only one of the two pretty clearly shouldn't > be extended past Arm, and ideally would be addressed there at some > point. Fair enough. I'll drop this patch and update the second with a local change (as in v1 but this time with a comment explaining why) not to extend this behavior past Arm and we can try to make things generic next release. ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 06 07:37:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:37:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301210.1575517 (Exim 4.92) (envelope-from ) id 1wKWpD-00055L-Sp; Wed, 06 May 2026 07:37:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301210.1575517; Wed, 06 May 2026 07:37:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpD-00055E-Pm; Wed, 06 May 2026 07:37:43 +0000 Received: by outflank-mailman (input) for mailman id 1301210; Wed, 06 May 2026 07:37:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpC-00054i-Hd for xen-devel@lists.xenproject.org; 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While there remove the unlikely(), this is not a hot path anyway. No functional change, as there are no current callers that pass force == true. Signed-off-by: Roger Pau Monné --- xen/drivers/passthrough/amd/iommu_init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..76ae78e5ea53 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -929,13 +929,13 @@ static void enable_iommu(struct amd_iommu *iommu) amd_iommu_flush_all_caches(iommu); } -static void disable_iommu(struct amd_iommu *iommu) +static void disable_iommu(struct amd_iommu *iommu, bool force) { unsigned long flags; spin_lock_irqsave(&iommu->lock, flags); - if ( unlikely(!iommu->enabled) ) + if ( !iommu->enabled && !force ) goto out; if ( !iommu->ctrl.int_cap_xt_en ) @@ -1139,7 +1139,7 @@ static void __init amd_iommu_init_cleanup(void) iommu->ctrl.int_cap_xt_en = 0; if ( iommu->enabled ) - disable_iommu(iommu); + disable_iommu(iommu, false); else if ( iommu->mmio_base ) writeq(iommu->ctrl.raw, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); @@ -1584,7 +1584,7 @@ void cf_check amd_iommu_crash_shutdown(void) struct amd_iommu *iommu; for_each_amd_iommu ( iommu ) - disable_iommu(iommu); + disable_iommu(iommu, false); } void cf_check amd_iommu_resume(void) @@ -1598,7 +1598,7 @@ void cf_check amd_iommu_resume(void) * To make sure that iommus have not been touched * before re-enablement */ - disable_iommu(iommu); + disable_iommu(iommu, false); enable_iommu(iommu); if ( !iommu->features.flds.ia_sup ) invalidate_all = false; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:37:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:37:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301209.1575508 (Exim 4.92) (envelope-from ) id 1wKWp9-0004rs-Ku; Wed, 06 May 2026 07:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301209.1575508; Wed, 06 May 2026 07:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWp9-0004rl-I2; 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Get rid of the zeroing, and instead attempt to disable the IOMMU ahead of enabling it. Thanks, Roger. Roger Pau Monne (2): iommu/amd-vi: allow disable_iommu() against non-initialized IOMMUs iommu/amd-vi: do not zero IOMMU MMIO region xen/drivers/passthrough/amd/iommu_init.c | 34 +++++++++++------------- 1 file changed, 15 insertions(+), 19 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:38:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:38:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301223.1575525 (Exim 4.92) (envelope-from ) id 1wKWpn-0005kD-4H; Wed, 06 May 2026 07:38:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301223.1575525; Wed, 06 May 2026 07:38:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWpn-0005k6-1b; Wed, 06 May 2026 07:38:19 +0000 Received: by outflank-mailman (input) for mailman id 1301223; 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b=Xl7w26QzyeIMXs9DoJH1eDpCF6QLbQH6Fw+3CvxOmG4hsECShroLleJlxE+Sja8nig9i6yrU6BgtBx0kZ+574xbj3DHvIcebIid9F5Tfkdnu9QPAitXPIObC5FicLoBq+4glftGcCH+bakc+NfPSycIKEbpRD4qoTYLKEg9yedg= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region Date: Wed, 6 May 2026 09:37:19 +0200 Message-ID: <20260506073719.40075-3-roger.pau@citrix.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260506073719.40075-1-roger.pau@citrix.com> References: <20260506073719.40075-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MR1P264CA0217.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:56::16) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|DS7PR03MB5397:EE_ X-MS-Office365-Filtering-Correlation-Id: 69905622-d2ca-495e-dbcf-08deab426e01 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|22082099003|18002099003|56012099003; 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We don't know what registers might be there, neither what values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region can put the IOMMU in a broken state, which is not recovered by the IOMMU initialization procedure in Xen. Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold map_iommu_mmio_region() into it's only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- xen/drivers/passthrough/amd/iommu_init.c | 24 ++++++++++-------------- 1 file changed, 10 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 76ae78e5ea53..8bf5ca4de18f 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* Read current control register and forcefully disable the IOMMU. */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + disable_iommu(iommu, true); + iommu->ctrl.raw = 0; + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 07:45:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 07:45:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301233.1575534 (Exim 4.92) (envelope-from ) id 1wKWwA-0007Qk-Rt; Wed, 06 May 2026 07:44:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301233.1575534; Wed, 06 May 2026 07:44:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKWwA-0007Qd-PG; Wed, 06 May 2026 07:44:54 +0000 Received: by outflank-mailman (input) for mailman id 1301233; Wed, 06 May 2026 07:44:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKWw8-0007QX-WE for xen-devel@lists.xenproject.org; Wed, 06 May 2026 07:44:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKWw7-008Xqc-S1 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:44:51 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf173-2eae-0a2a0a5409dd-0a2a4502b3fc-0 for ; Wed, 06 May 2026 09:44:51 +0200 Received: from [209.85.218.46] (helo=mail-ej1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf173-af86-0a2a45020019-d155da2ec48a-3 for ; Wed, 06 May 2026 09:44:51 +0200 Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-b8f9568e074so917106266b.0 for ; Wed, 06 May 2026 00:44:51 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Also, drop and add some parentheses to be aligned >> with the similar if() below. >> >> x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as >> x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no >> longer builds, the fallback is currently only relevant for arm32. >> >> Signed-off-by: Oleksii Kurochko >> Reviewed-by: Michal Orzel > > In principle: > Acked-by: Jan Beulich Thanks. > > However, still a few remarks: > >> --- a/xen/include/xen/domain.h >> +++ b/xen/include/xen/domain.h >> @@ -13,6 +13,19 @@ struct guest_area { >> void *map; >> }; >> >> +#ifdef CONFIG_HAS_DOMAIN_TYPE >> +enum __packed domain_type { >> + DOMAIN_32BIT, >> + DOMAIN_64BIT, >> +}; >> +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) >> +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) >> +#elif !defined(CONFIG_64BIT) >> +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ >> +#define is_32bit_domain(d) (true) >> +#define is_64bit_domain(d) (false) > > I think it would be nice if the excess parentheses were dropped from here. > >> --- a/xen/include/xen/fdt-domain-build.h >> +++ b/xen/include/xen/fdt-domain-build.h >> @@ -7,6 +7,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> struct domain; >> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >> } >> >> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) > > Pointer-to-const for the 2nd parameter? I will apply this comment and comment above. > >> +{ >> +#ifdef CONFIG_HAS_DOMAIN_TYPE >> + /* Type must be set before allocate memory */ > > This comment would be more prominent if it lived outside of the #ifdef, > perhaps (read on) ahead of the function. I wonder though why it's only > a comment, and not e.g. an assertion. If an assertion was possible to > add, the comment would want to live next to it. Without an assertion > putting it ahead of the function may be better. > > Depending on how far to go, changes could be made while committing, or a > proper v5 may want submitting. I think that instead of comment or just after comment the following could be added: ASSERT(!domain_tot_pages(d)); Jan, Michal, do you see any concern with that ASSERT() or I could add it and keep your Ack-by and R-by. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 08:10:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:10:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301256.1575543 (Exim 4.92) (envelope-from ) id 1wKXL4-00043Z-5I; Wed, 06 May 2026 08:10:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301256.1575543; Wed, 06 May 2026 08:10:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXL4-00043S-2A; Wed, 06 May 2026 08:10:38 +0000 Received: by outflank-mailman (input) for mailman id 1301256; Wed, 06 May 2026 08:10:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXL2-00043J-NH for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:10:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXL1-008psN-Vq for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:10:36 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf77a-e002-0a2a0a5209dd-0a2a450ba0e2-16 for ; Wed, 06 May 2026 10:10:35 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf77b-212f-0a2a450b0019-d1558036a962-3 for ; Wed, 06 May 2026 10:10:35 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488b3f8fa2bso5781685e9.1 for ; Wed, 06 May 2026 01:10:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778055035-7FF7EF3B-F6077B4E/0/0 X-purgate-type: clean X-purgate-size: 1649 On 06.05.2026 09:44, Oleksii Kurochko wrote: > On 5/4/26 2:21 PM, Jan Beulich wrote: >> On 27.04.2026 17:34, Oleksii Kurochko wrote: >>> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >>> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >>> } >>> >>> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) >> >> Pointer-to-const for the 2nd parameter? > > I will apply this comment and comment above. > >> >>> +{ >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> + /* Type must be set before allocate memory */ >> >> This comment would be more prominent if it lived outside of the #ifdef, >> perhaps (read on) ahead of the function. I wonder though why it's only >> a comment, and not e.g. an assertion. If an assertion was possible to >> add, the comment would want to live next to it. Without an assertion >> putting it ahead of the function may be better. >> >> Depending on how far to go, changes could be made while committing, or a >> proper v5 may want submitting. > > I think that instead of comment or just after comment the following > could be added: > ASSERT(!domain_tot_pages(d)); > > Jan, Michal, do you see any concern with that ASSERT() or I could add it > and keep your Ack-by and R-by. I'm okay with it being added, as long as you have made sure that it is legitimate to have. IOW (as pointed out numerous times before) you may not assert on state that's user/admin controlled, and that isn't covered by another, earlier check. In such a case an error would need returning instead. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 08:19:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:19:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301264.1575552 (Exim 4.92) (envelope-from ) id 1wKXTk-0004r8-UC; Wed, 06 May 2026 08:19:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301264.1575552; Wed, 06 May 2026 08:19:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXTk-0004r1-RX; Wed, 06 May 2026 08:19:36 +0000 Received: by outflank-mailman (input) for mailman id 1301264; Wed, 06 May 2026 08:19:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXTj-0004qv-VI for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:19:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXTi-001jOe-TU for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:19:34 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69faf990-e002-0a2a0a5209dd-0a2a45039f9a-4 for ; Wed, 06 May 2026 10:19:34 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69faf996-672d-0a2a45030019-d155dd2be8f4-3 for ; Wed, 06 May 2026 10:19:34 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-44e5624c053so1784738f8f.2 for ; Wed, 06 May 2026 01:19:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506073719.40075-2-roger.pau@citrix.com> Content-Type: text/plain; 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While there remove the unlikely(), > this is not a hot path anyway. > > No functional change, as there are no current callers that pass force == > true. > > Signed-off-by: Roger Pau Monné Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Wed May 06 08:20:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:20:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301272.1575561 (Exim 4.92) (envelope-from ) id 1wKXUQ-0006GS-5l; Wed, 06 May 2026 08:20:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301272.1575561; Wed, 06 May 2026 08:20:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXUQ-0006GL-37; Wed, 06 May 2026 08:20:18 +0000 Received: by outflank-mailman (input) for mailman id 1301272; Wed, 06 May 2026 08:20:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXUO-0006GC-PL for xen-devel@lists.xenproject.org; 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Message-ID: <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> Date: Wed, 6 May 2026 09:20:07 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506073719.40075-1-roger.pau@citrix.com> <20260506073719.40075-3-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506073719.40075-3-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, neither what > values might be safe for those registers. Minor grammar.  "there, nor which values". > On a forthcoming platform doing > the zeroing of the MMIO region can put the IOMMU in a broken state, "does put" > which is not recovered by the IOMMU initialization procedure in Xen. "recoverable". > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > index 76ae78e5ea53..8bf5ca4de18f 100644 > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > { > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > - if ( !rc ) > - rc = map_iommu_mmio_region(iommu); > if ( rc ) > return rc; > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > + IOMMU_MMIO_REGION_LENGTH); > + if ( !iommu->mmio_base ) > + return -ENOMEM; > + > get_iommu_features(iommu); > > /* > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + disable_iommu(iommu, true); > + iommu->ctrl.raw = 0; > + > return 0; > } These two things are unrelated at want splitting into separate patches at a minimum.  The removal of memset() critically needs backporting. As for disabling the IOMMU, I'm not certain it's wise. Linux can already "bring up" an already-live IOMMU and Xen needs to gain this ability in due course.  This is mainly for supporting PreBoot DMA Protection, but also for things like the kexec environment. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 08:29:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:29:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301283.1575570 (Exim 4.92) (envelope-from ) id 1wKXco-0007C5-2T; Wed, 06 May 2026 08:28:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301283.1575570; Wed, 06 May 2026 08:28:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXcn-0007By-Vv; Wed, 06 May 2026 08:28:57 +0000 Received: by outflank-mailman (input) for mailman id 1301283; Wed, 06 May 2026 08:28:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXcm-0007Br-77 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:28:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXcl-008tlS-JQ for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:28:55 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fafbc0-2eae-0a2a0a5409dd-0a2a450b8a6c-32 for ; Wed, 06 May 2026 10:28:55 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fafbc6-212f-0a2a450b0019-d155dd29e916-3 for ; Wed, 06 May 2026 10:28:54 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44509921fbcso3137171f8f.3 for ; Wed, 06 May 2026 01:28:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506073719.40075-3-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778056134-7E16DF3B-D0636BED/0/0 X-purgate-type: clean X-purgate-size: 1067 On 06.05.2026 09:37, Roger Pau Monne wrote: > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + disable_iommu(iommu, true); Don't you also need to pre-fill iommu->features? And with that field's use in disable_iommu(), won't we be at risk of leaving stuff enabled which we are entirely unaware of? Even if we fully cleared the control register (which would eliminate the need to fetch features), down the road a 2nd control register could appear. Has it become clear which register(s) or bit(s) it really is that are causing the observed issue? IOW is there truly something we may not clear? Or is it maybe that memset() really isn't suitable for use against MMIO, especially after having switched to use of REP MOVSB when ERMS is available? Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 08:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301290.1575580 (Exim 4.92) (envelope-from ) id 1wKXhl-0000HD-JE; Wed, 06 May 2026 08:34:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301290.1575580; Wed, 06 May 2026 08:34:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXhl-0000H6-Gc; Wed, 06 May 2026 08:34:05 +0000 Received: by outflank-mailman (input) for mailman id 1301290; Wed, 06 May 2026 08:34:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXhk-0000H0-UH for xen-devel@lists.xenproject.org; Wed, 06 May 2026 08:34:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKXhj-00GuST-Pi for xen-devel@lists.xenproject.org; Wed, 06 May 2026 10:34:03 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fafcee-2eae-0a2a0a5409dd-0a2a4506dcc6-42 for ; Wed, 06 May 2026 10:34:03 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fafc83-7371-0a2a45060019-d155dd2de40e-3 for ; Wed, 06 May 2026 10:32:03 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44c4cc7c1cfso2830886f8f.0 for ; Wed, 06 May 2026 01:32:03 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778056323-CE777D75-FC790A96/13/0 X-purgate-type: clean X-purgate-size: 1745 On 06.05.2026 10:20, Andrew Cooper wrote: > On 06/05/2026 8:37 am, Roger Pau Monne wrote: >> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> { >> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >> >> - if ( !rc ) >> - rc = map_iommu_mmio_region(iommu); >> if ( rc ) >> return rc; >> >> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> + IOMMU_MMIO_REGION_LENGTH); >> + if ( !iommu->mmio_base ) >> + return -ENOMEM; >> + >> get_iommu_features(iommu); >> >> /* >> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >> return -ERANGE; >> >> + /* Read current control register and forcefully disable the IOMMU. */ >> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + disable_iommu(iommu, true); >> + iommu->ctrl.raw = 0; >> + >> return 0; >> } > > These two things are unrelated at want splitting into separate patches > at a minimum.  The removal of memset() critically needs backporting. > > As for disabling the IOMMU, I'm not certain it's wise. > > Linux can already "bring up" an already-live IOMMU and Xen needs to gain > this ability in due course.  This is mainly for supporting PreBoot DMA > Protection, but also for things like the kexec environment. While I agree we would better support this, as per my reply to Roger: How is that going to work if the IOMMU has features enabled we may not even be aware of? We'd still need to blindly clear everything we can't drive ourselves. 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pr=C From: Michal Orzel To: CC: Michal Orzel , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v3] xen/arm: skip holes in physical address space when setting up frametable Date: Wed, 6 May 2026 10:41:37 +0200 Message-ID: <20260506084137.40913-1-michal.orzel@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E2:EE_|PH7PR12MB8105:EE_ X-MS-Office365-Filtering-Correlation-Id: 276a9620-9f95-44d2-451e-08deab4b4f33 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|36860700016|1800799024|82310400026|13003099007|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: XbeBhU5nw00yHQabv266JeQlfzoVEdv3P0Ypa2Cdr2pw2CfbVLxiM8mb3vkZKE60UfOXKv7g5Nk2RjjRuacy0Yt9+l/JlvgjrLjxQ8ghCPq9ac8xidXVI9I41n+We8VxHN/8EYDh7nl+2kTwtJsWNxAIkCImkutpTHHfAWI0TZ7yxRL9NcidttHCYgoa+IecpaY/EcUTShUqA6tYvPh+XxItBwXxIHtB5gMG8iFSN/1RnP8WRhK8s1c/ysWnSOxU9h58GHoglNLuR20g5EfxbcdGywmcg+I2Yqp8uflptrbqFCBrwFYOAjAD0DJwb4X55l0MBiCb9kRnU+3AVUPUBvhnL1GDeVMYFdVpxFPJqDwE/BzvKsNMuT8dnbZLzjgzKPJFhFUhOMujEAeb4aTo/GeBZWDRgPWAGBY48l7rMtPUFt2iguZzWlT4Oo9Y67BV3RNUsgAFdvgUn2Wb7UvdaLQ2tsT2Lhy7kUNKdaGalIdwycqYJIOEPKpineG5etUGG/IOVtIpbeBQRBxHa4LScGKCHmVqKzSPrGfUaQyFjB3LQ7T4ki14O2C5q6byOIO9MISvW+oS8fRCENZz7DkwLhIVcCFAVayqtQ7Lj+vpggWEtfHhBIpyrnoiK4JRdqn4kr7yQwyEbiAwk9ByLunA5PiKbJHZeYooNskOCXnIQzZF9eoO+zpRiPDB9tZsQlcM1cLYFf+mwza4LfLJJYBAt7QAtkETyaQEma9aEsuLordl8H1MF7SE+LwbtMlHfOOr X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(36860700016)(1800799024)(82310400026)(13003099007)(18002099003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: G5FAaZ736o6YnnhI35F6Pp65fVzkCQ2Oh+YS0OAEXHuOYZLdQANpj79iyBRH4DRWkQOjJWn8SMhGE/gprlX5RswyHiXkNsjz4HtW55da4NJBlmTaTP7QosS0cRQHbttbrfSGnnLyDJWqik24AiK0GiPxRR3lMgAOMPta+BIgY/Q97DLKQfuCzWn0+OlKsm6T0VPM9UXiVaUXAzwqVuaKFvHqiFaW0OmHmSMnZ8y35Hts5HPqxhdGrh+og08sZYDQY86E1T3qKQ2TVVVDk+JXSAvWbGVVZtObWzP5BjvUV3DSyp6V4hGVarQfhklnX0p+ovh5zvGrCaHOtAJRT1cXPQnPbNpwEv9k5YCIltR61S7YE46jURcwriargzoNsJ6OvbMMoyMkmQZhtWQLHAMuoR95r9vwou/yT7xD+WTj93B6A+ao6l6IXM6Av+XB/f0w X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 08:41:47.2495 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 276a9620-9f95-44d2-451e-08deab4b4f33 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000F0E2.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB8105 X-purgate-ID: tlsNG-ebf023/1778056916-2B1663FF-7239EC51/0/0 X-purgate-type: clean X-purgate-size: 11641 Refactor setup_frametable_mappings() into init_frametable(), modeled after x86's implementation. Instead of mapping one contiguous frametable covering ram_start to ram_end (including holes), iterate the pdx_group_valid bitmap to allocate and map frametable memory only for valid PDX groups, skipping gaps in the physical address space. This reduces memory consumption on systems with sparse RAM layouts by not allocating frametable entries for non-existent memory regions. The chunk allocator rounds chunk_size up to PAGE_SIZE only, rather than to a larger mapping granularity, to avoid overshooting past chunk boundaries into subsequent gaps or valid regions. This rounding has no impact for in-loop chunks given that chunk size is a multiple of 14MB on Arm64 and 2MB on Arm32. The rounding matters only for the last out-of-loop chunk. Physical allocations prefer 32MB alignment so that map_pages_to_xen() can use the contiguous bit for larger TLB entries where virtual alignment also permits. Fall back to 2MB if the chunk is smaller than 32MB. Add a comment explaining why we don't use pdx_to_page(). For complete discussion see [1]. As ram_end is no longer needed by init_frametable(), drop the now-dead ram_end/bank_end computation from setup_mm(). Update the MPU implementation to match the new init_frametable() signature. Since MPU has no virtual address translation (ma == va), hole-skipping is not possible and the frametable remains a single contiguous allocation. [1] https://lore.kernel.org/xen-devel/20260430125103.401811-1-michal.orzel@amd.com/T/#m803025eb6720a1425443dd0f8e72be93ef02f344 Signed-off-by: Michal Orzel --- Changes in v3: - don't generalize pdx_to_page with frametable_base_pdx - use different alignment depending on chunk size - drop tags due to the above changes Changes in v2: - fix overshoot problem with 32MB rounding --- xen/arch/arm/arm32/mmu/mm.c | 3 +- xen/arch/arm/include/asm/mm.h | 4 +- xen/arch/arm/mm.c | 5 +- xen/arch/arm/mmu/mm.c | 99 +++++++++++++++++++++++++++-------- xen/arch/arm/mpu/mm.c | 23 ++++---- 5 files changed, 92 insertions(+), 42 deletions(-) diff --git a/xen/arch/arm/arm32/mmu/mm.c b/xen/arch/arm/arm32/mmu/mm.c index 5e4766ddcf65..0b595baa11b3 100644 --- a/xen/arch/arm/arm32/mmu/mm.c +++ b/xen/arch/arm/arm32/mmu/mm.c @@ -178,8 +178,7 @@ void __init setup_mm(void) setup_directmap_mappings(mfn_x(directmap_mfn_start), xenheap_pages); - /* Frame table covers all of RAM region, including holes */ - setup_frametable_mappings(ram_start, ram_end); + init_frametable(ram_start); /* * The allocators may need to use map_domain_page() (such as for diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 72a692862420..2eb8465aa904 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -196,8 +196,8 @@ extern void *early_fdt_map(paddr_t fdt_paddr); extern void remove_early_mappings(void); /* Prepare the memory subystem to bring-up the given secondary CPU */ extern int prepare_secondary_mm(int cpu); -/* Map a frame table to cover physical addresses ps through pe */ -extern void setup_frametable_mappings(paddr_t ps, paddr_t pe); +/* Map a frame table */ +void init_frametable(paddr_t ram_start); /* Helper function to setup memory management */ void setup_mm_helper(void); /* map a physical range in virtual memory */ diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 6eddbcf912ee..65aea71c4351 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -33,7 +33,6 @@ void __init setup_mm(void) { const struct membanks *banks = bootinfo_get_mem(); paddr_t ram_start = INVALID_PADDR; - paddr_t ram_end = 0; paddr_t ram_size = 0; unsigned int i; @@ -42,11 +41,9 @@ void __init setup_mm(void) for ( i = 0; i < banks->nr_banks; i++ ) { const struct membank *bank = &banks->bank[i]; - paddr_t bank_end = bank->start + bank->size; ram_size = ram_size + bank->size; ram_start = min(ram_start, bank->start); - ram_end = max(ram_end, bank_end); } total_pages = ram_size >> PAGE_SHIFT; @@ -62,7 +59,7 @@ void __init setup_mm(void) setup_mm_helper(); - setup_frametable_mappings(ram_start, ram_end); + init_frametable(ram_start); init_staticmem_pages(); init_sharedmem_pages(); diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c index 6604f3bf4e6a..c4018a61aa01 100644 --- a/xen/arch/arm/mmu/mm.c +++ b/xen/arch/arm/mmu/mm.c @@ -6,18 +6,55 @@ #include #include #include +#include #include -/* Map a frame table to cover physical addresses ps through pe */ -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) +static void __init init_frametable_chunk(unsigned long pdx_s, + unsigned long pdx_e) { - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - - mfn_to_pdx(maddr_to_mfn(ps)) + 1; - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); - mfn_t base_mfn; - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) - : MB(32); + unsigned long nr_pdxs = pdx_e - pdx_s; + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); + unsigned long pfn_align; + struct page_info *pg; int rc; + mfn_t base_mfn; + + /* + * In-loop chunks span whole PDX groups, which are always page-size + * aligned. The last chunk ending at max_pdx may not be, so round up. + */ + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); + + /* + * Try to align the allocation to the contiguous mapping size so that + * map_pages_to_xen() can use the contiguous bit. + */ + pfn_align = ((chunk_size >= MB(32)) ? MB(32) : MB(2)) >> PAGE_SHIFT; + + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, pfn_align); + + /* + * Resolve the frametable VA via mfn_to_page(pdx_to_mfn(...)) rather + * than pdx_to_page() because the generic pdx_to_page() does not subtract + * frametable_base_pdx. There's more work to be done to make it generic, so + * for now route through mfn_to_page(), which on Arm applies the + * frametable_base_pdx offset and yields the correct VA. + */ + pg = mfn_to_page(pdx_to_mfn(pdx_s)); + rc = map_pages_to_xen((unsigned long)pg, base_mfn, + chunk_size >> PAGE_SHIFT, + PAGE_HYPERVISOR_RW | _PAGE_BLOCK); + if ( rc ) + panic("Unable to setup the frametable mappings\n"); + + memset(pg, 0, nr_pdxs * sizeof(struct page_info)); + memset(pg + nr_pdxs, -1, + chunk_size - nr_pdxs * sizeof(struct page_info)); +} + +void __init init_frametable(paddr_t ram_start) +{ + unsigned int sidx, nidx, max_idx; /* * The size of paddr_t should be sufficient for the complete range of @@ -26,24 +63,40 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); - if ( frametable_size > FRAMETABLE_SIZE ) - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", - ps, pe); + /* init_frametable_chunk() allocation alignment assumes 4KB granule */ + BUILD_BUG_ON(PAGE_SIZE != SZ_4K); - frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps)); - /* Round up to 2M or 32M boundary, as appropriate. */ - frametable_size = ROUNDUP(frametable_size, mapping_size); - base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12)); + /* In-loop chunks must produce page-aligned frametable regions */ + BUILD_BUG_ON((PDX_GROUP_COUNT * sizeof(struct page_info)) % PAGE_SIZE); - rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn, - frametable_size >> PAGE_SHIFT, - PAGE_HYPERVISOR_RW | _PAGE_BLOCK); - if ( rc ) - panic("Unable to setup the frametable mappings.\n"); + max_idx = DIV_ROUND_UP(max_pdx, PDX_GROUP_COUNT); + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); + + /* + * Mapping address in init_frametable_chunk must be page-aligned + * for map_pages_to_xen(). Aligning to PDX_GROUP_COUNT guarantees this + * because PDX_GROUP_COUNT * sizeof(page_info) is always a multiple of + * PAGE_SIZE by construction. + */ + frametable_base_pdx = ROUNDDOWN(frametable_base_pdx, PDX_GROUP_COUNT); + + if ( (max_pdx - frametable_base_pdx) > FRAMETABLE_NR ) + panic("Frametable too small\n"); + + for ( sidx = (frametable_base_pdx / PDX_GROUP_COUNT); ; sidx = nidx ) + { + unsigned int eidx; + + eidx = find_next_zero_bit(pdx_group_valid, max_idx, sidx); + nidx = find_next_bit(pdx_group_valid, max_idx, eidx); + + if ( nidx >= max_idx ) + break; + + init_frametable_chunk(sidx * PDX_GROUP_COUNT, eidx * PDX_GROUP_COUNT); + } - memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info)); - memset(&frame_table[nr_pdxs], -1, - frametable_size - (nr_pdxs * sizeof(struct page_info))); + init_frametable_chunk(sidx * PDX_GROUP_COUNT, max_pdx); } /* diff --git a/xen/arch/arm/mpu/mm.c b/xen/arch/arm/mpu/mm.c index aff88bd3a9c1..9c568831c128 100644 --- a/xen/arch/arm/mpu/mm.c +++ b/xen/arch/arm/mpu/mm.c @@ -186,16 +186,15 @@ static int is_mm_attr_match(pr_t *region, unsigned int attributes) return 0; } -/* Map a frame table to cover physical addresses ps through pe */ -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) +/* + * Allocate a contiguous frame table covering ram_start through max_pdx. + * Unlike the MMU version, MPU cannot skip holes because there is no virtual + * address translation (ma == va). + */ +void __init init_frametable(paddr_t ram_start) { + unsigned long nr_pdxs, frametable_size; mfn_t base_mfn; - paddr_t aligned_ps = ROUNDUP(ps, PAGE_SIZE); - paddr_t aligned_pe = ROUNDDOWN(pe, PAGE_SIZE); - - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(aligned_pe), -1)) - - mfn_to_pdx(maddr_to_mfn(aligned_ps)) + 1; - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); /* * The size of paddr_t should be sufficient for the complete range of @@ -204,11 +203,13 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); + nr_pdxs = max_pdx - frametable_base_pdx; + frametable_size = nr_pdxs * sizeof(struct page_info); + if ( frametable_size > FRAMETABLE_SIZE ) - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", - ps, pe); + panic("Frametable too small\n"); - frametable_base_pdx = paddr_to_pdx(aligned_ps); frametable_size = ROUNDUP(frametable_size, PAGE_SIZE); base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 1); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 08:43:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 08:43:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301310.1575599 (Exim 4.92) (envelope-from ) id 1wKXrJ-0002id-RQ; Wed, 06 May 2026 08:43:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301310.1575599; Wed, 06 May 2026 08:43:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKXrJ-0002iW-Nk; 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> > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + disable_iommu(iommu, true); > > Don't you also need to pre-fill iommu->features? Indeed, that's done just ahead of this chunk, in the get_iommu_features() call. > And with that field's use in > disable_iommu(), won't we be at risk of leaving stuff enabled which we are > entirely unaware of? Possibly, yes, that's always a risk. > Even if we fully cleared the control register (which > would eliminate the need to fetch features), down the road a 2nd control > register could appear. We do clear the control register, it's indirectly done by us setting iommu->ctrl.raw = 0 after the disable_iommu() call. I did wonder about just doing a write of 0 to the control register, but I think it's best if we try to gracefully disable the features (as done in disable_iommu()), and then reset the cached control state to 0. Future writes to the control register will clear any bits not directly set by Xen. > Has it become clear which register(s) or bit(s) it > really is that are causing the observed issue? IOW is there truly something > we may not clear? It's not so much as not clearing something, but rather the clearing itself putting the IOMMU in a broken state which we then can't recover from using the initialization procedure in Xen. Thanks, Roger. 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Wed, 06 May 2026 01:45:50 -0700 (PDT) Message-ID: <4ca0f24d-2526-4e49-a4e0-f8497aa8f4b0@suse.com> Date: Wed, 6 May 2026 10:45:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Problem with PCI-passthrough to PV guest To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" References: <04c8ed4e-4e99-46ae-b83d-af9031f5b622@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; 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We don't know what registers might be there, neither what > > values might be safe for those registers. > > Minor grammar.  "there, nor which values". > > > On a forthcoming platform doing > > the zeroing of the MMIO region can put the IOMMU in a broken state, > > "does put" > > > which is not recovered by the IOMMU initialization procedure in Xen. > > "recoverable". > > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > > index 76ae78e5ea53..8bf5ca4de18f 100644 > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > { > > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > > > - if ( !rc ) > > - rc = map_iommu_mmio_region(iommu); > > if ( rc ) > > return rc; > > > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > + IOMMU_MMIO_REGION_LENGTH); > > + if ( !iommu->mmio_base ) > > + return -ENOMEM; > > + > > get_iommu_features(iommu); > > > > /* > > @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > > return -ERANGE; > > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + disable_iommu(iommu, true); > > + iommu->ctrl.raw = 0; > > + > > return 0; > > } > > These two things are unrelated at want splitting into separate patches > at a minimum.  The removal of memset() critically needs backporting. But is it safe to backport the memset without also backporting the disabling side? We might then be dealing with an enabled IOMMU which could lead to all sorts of fun. > As for disabling the IOMMU, I'm not certain it's wise. > > Linux can already "bring up" an already-live IOMMU and Xen needs to gain > this ability in due course.  This is mainly for supporting PreBoot DMA > Protection, but also for things like the kexec environment. Note that Linux (when not booted from kdump) will do a similar sequence of what I'm attempting to do here for Xen and will call iommu_disable() ahead of attempting to enable the IOMMU. I understand that when Xen supports kdump or preboot DMA protection we would need to be more careful there, but going from zeroing the whole MMIO area (which disables everything) to not doing any kind of disabling is IMO a dangerous approach, and I would rather backport a change that at least attempts to make sure the IOMMU is disabled. Thanks, Roger. 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I wonder though why it's only >>> a comment, and not e.g. an assertion. If an assertion was possible to >>> add, the comment would want to live next to it. Without an assertion >>> putting it ahead of the function may be better. >>> >>> Depending on how far to go, changes could be made while committing, or a >>> proper v5 may want submitting. >> >> I think that instead of comment or just after comment the following >> could be added: >> ASSERT(!domain_tot_pages(d)); >> >> Jan, Michal, do you see any concern with that ASSERT() or I could add it >> and keep your Ack-by and R-by. > > I'm okay with it being added, as long as you have made sure that it is > legitimate to have. IOW (as pointed out numerous times before) you may > not assert on state that's user/admin controlled, and that isn't covered > by another, earlier check. In such a case an error would need returning > instead. All callers of set_domain_type() are in the domain build path, before any memory allocation, so domain_tot_pages(d) being zero at this point is an internal code invariant, not user-controlled. Also, I checked CI and it looks okay except ARM64 randcondig I mentioned in xen-devel matrix channel: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2503536959 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 09:02:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:02:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301359.1575642 (Exim 4.92) (envelope-from ) id 1wKY9L-00088B-6g; Wed, 06 May 2026 09:02:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301359.1575642; Wed, 06 May 2026 09:02:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKY9L-000884-3v; Wed, 06 May 2026 09:02:35 +0000 Received: by outflank-mailman (input) for mailman id 1301359; Wed, 06 May 2026 09:02:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKY9J-00087y-AW for xen-devel@lists.xenproject.org; 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Message-ID: Date: Wed, 6 May 2026 10:02:24 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jason Andryuk , Teddy Astie , Roger Pau Monne , xen-devel@lists.xenproject.org Subject: Re: [PATCH 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Jan Beulich References: <20260506073719.40075-1-roger.pau@citrix.com> <20260506073719.40075-3-roger.pau@citrix.com> <41ec5134-b117-47ee-8e59-682ac1e4a69f@citrix.com> <1d771706-35b1-4d6c-bcd8-a3bccfa825f3@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1d771706-35b1-4d6c-bcd8-a3bccfa825f3@suse.com> Content-Type: text/plain; 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>>> >>> - if ( !rc ) >>> - rc = map_iommu_mmio_region(iommu); >>> if ( rc ) >>> return rc; >>> >>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> + IOMMU_MMIO_REGION_LENGTH); >>> + if ( !iommu->mmio_base ) >>> + return -ENOMEM; >>> + >>> get_iommu_features(iommu); >>> >>> /* >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >>> + iommu->ctrl.raw = 0; >>> + >>> return 0; >>> } >> These two things are unrelated at want splitting into separate patches >> at a minimum.  The removal of memset() critically needs backporting. >> >> As for disabling the IOMMU, I'm not certain it's wise. >> >> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >> this ability in due course.  This is mainly for supporting PreBoot DMA >> Protection, but also for things like the kexec environment. > While I agree we would better support this, as per my reply to Roger: How > is that going to work if the IOMMU has features enabled we may not even > be aware of? We'd still need to blindly clear everything we can't drive > ourselves. Zeroing 16k of unknown MMIO is completely unreasonable.  It is not RAM, and 0 is not a safe thing to write into an unknown register. But to the AMD IOMMU specifically, the spec makes it clear that there are registers configured by firmware that we are expected to leave alone. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:18:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:18:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301373.1575651 (Exim 4.92) (envelope-from ) id 1wKYOs-0001xf-Iu; Wed, 06 May 2026 09:18:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301373.1575651; Wed, 06 May 2026 09:18:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYOs-0001xY-GI; Wed, 06 May 2026 09:18:38 +0000 Received: by outflank-mailman (input) for mailman id 1301373; Wed, 06 May 2026 09:18:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYOr-0001xS-6R for xen-devel@lists.xenproject.org; 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It was missing commit 0949c646d646, which makes the difference. > > So for now this issue will only show up for cases where a PV-guest is > setup for PCI passthrough and it gets memory hotplugged before the PCI > device is added to it. Hm, yes, this is yet more fallout from the unpopulated-alloc changes. For PV guests that have the e820 host available we could try to create the hotplug regions over what are host RAM region in the memory map, as then we know we won't be overlapping with MMIO areas. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778059047-87F7BD75-ED28DE7F/0/0 X-purgate-type: clean X-purgate-size: 1615 On 06.05.2026 10:43, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 10:28:52AM +0200, Jan Beulich wrote: >> On 06.05.2026 09:37, Roger Pau Monne wrote: >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >> >> Don't you also need to pre-fill iommu->features? > > Indeed, that's done just ahead of this chunk, in the > get_iommu_features() call. > >> And with that field's use in >> disable_iommu(), won't we be at risk of leaving stuff enabled which we are >> entirely unaware of? > > Possibly, yes, that's always a risk. > >> Even if we fully cleared the control register (which >> would eliminate the need to fetch features), down the road a 2nd control >> register could appear. > > We do clear the control register, it's indirectly done by us setting > iommu->ctrl.raw = 0 after the disable_iommu() call. > > I did wonder about just doing a write of 0 to the control register, > but I think it's best if we try to gracefully disable the features (as > done in disable_iommu()), and then reset the cached control state to > 0. Future writes to the control register will clear any bits not > directly set by Xen. Maybe better to explicitly write out that 0 right away, even if you want to keep using disable_iommu()? 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> >>> > >>> + /* Read current control register and forcefully disable the IOMMU. */ > >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > >>> + disable_iommu(iommu, true); > >> > >> Don't you also need to pre-fill iommu->features? > > > > Indeed, that's done just ahead of this chunk, in the > > get_iommu_features() call. > > > >> And with that field's use in > >> disable_iommu(), won't we be at risk of leaving stuff enabled which we are > >> entirely unaware of? > > > > Possibly, yes, that's always a risk. > > > >> Even if we fully cleared the control register (which > >> would eliminate the need to fetch features), down the road a 2nd control > >> register could appear. > > > > We do clear the control register, it's indirectly done by us setting > > iommu->ctrl.raw = 0 after the disable_iommu() call. > > > > I did wonder about just doing a write of 0 to the control register, > > but I think it's best if we try to gracefully disable the features (as > > done in disable_iommu()), and then reset the cached control state to > > 0. Future writes to the control register will clear any bits not > > directly set by Xen. > > Maybe better to explicitly write out that 0 right away, even if you want > to keep using disable_iommu()? Yeah, I also considered that. So after disable_iommu() set the cached control state to 0 and also zero the control register right there. Can do in the next version, unless there are further objections. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778059637-41B68A53-A2277708/0/0 X-purgate-type: clean X-purgate-size: 3029 On 06.05.2026 11:02, Andrew Cooper wrote: > On 06/05/2026 9:32 am, Jan Beulich wrote: >> On 06.05.2026 10:20, Andrew Cooper wrote: >>> On 06/05/2026 8:37 am, Roger Pau Monne wrote: >>>> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>> { >>>> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >>>> >>>> - if ( !rc ) >>>> - rc = map_iommu_mmio_region(iommu); >>>> if ( rc ) >>>> return rc; >>>> >>>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>>> + IOMMU_MMIO_REGION_LENGTH); >>>> + if ( !iommu->mmio_base ) >>>> + return -ENOMEM; >>>> + >>>> get_iommu_features(iommu); >>>> >>>> /* >>>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>>> return -ERANGE; >>>> >>>> + /* Read current control register and forcefully disable the IOMMU. */ >>>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>>> + disable_iommu(iommu, true); >>>> + iommu->ctrl.raw = 0; >>>> + >>>> return 0; >>>> } >>> These two things are unrelated at want splitting into separate patches >>> at a minimum.  The removal of memset() critically needs backporting. >>> >>> As for disabling the IOMMU, I'm not certain it's wise. >>> >>> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >>> this ability in due course.  This is mainly for supporting PreBoot DMA >>> Protection, but also for things like the kexec environment. >> While I agree we would better support this, as per my reply to Roger: How >> is that going to work if the IOMMU has features enabled we may not even >> be aware of? We'd still need to blindly clear everything we can't drive >> ourselves. > > Zeroing 16k of unknown MMIO is completely unreasonable.  It is not RAM, > and 0 is not a safe thing to write into an unknown register. >From a very general perspective I agree. However, when adding new registers (or new bits in existing ones), having them default to 0 (and hence making 0 be a valid value) is common practice. > But to the AMD IOMMU specifically, the spec makes it clear that there > are registers configured by firmware that we are expected to leave alone. Well, okay. For firmware settings I think we can assume these would indeed be settings, not enables of any features which would typically require driving by an OS. Yet that still leaves the question (along the lines of what I had raised before) of how we'd deal with being invoked with unknown to us features enabled. We need to disable them, yet how do you suggest doing that without blindly clearing most (if not all) registers? The only clean way of doing that would look to be a "soft reset" command to the IOMMU (of course not to be issued via the command queue). I'm unaware of anything like this, though. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 09:28:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:28:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301407.1575687 (Exim 4.92) (envelope-from ) id 1wKYYl-0005Ig-7w; Wed, 06 May 2026 09:28:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301407.1575687; Wed, 06 May 2026 09:28:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYYl-0005IZ-5K; Wed, 06 May 2026 09:28:51 +0000 Received: by outflank-mailman (input) for mailman id 1301407; Wed, 06 May 2026 09:28:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYYj-0005IR-KI for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:28:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYYi-00H8Pc-Te for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:28:48 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb09cf-2eae-0a2a0a5409dd-0a2a4504d74e-2 for ; Wed, 06 May 2026 11:28:48 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb09d0-1dec-0a2a45040019-d155802abdd2-3 for ; Wed, 06 May 2026 11:28:48 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488b0046078so54061365e9.1 for ; Wed, 06 May 2026 02:28:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778059728-2A9623FF-4246A0B2/0/0 X-purgate-type: clean X-purgate-size: 2130 On 06.05.2026 11:20, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:17:25AM +0200, Jan Beulich wrote: >> On 06.05.2026 10:43, Roger Pau Monné wrote: >>> On Wed, May 06, 2026 at 10:28:52AM +0200, Jan Beulich wrote: >>>> On 06.05.2026 09:37, Roger Pau Monne wrote: >>>>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>>>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>>>> return -ERANGE; >>>>> >>>>> + /* Read current control register and forcefully disable the IOMMU. */ >>>>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>>>> + disable_iommu(iommu, true); >>>> >>>> Don't you also need to pre-fill iommu->features? >>> >>> Indeed, that's done just ahead of this chunk, in the >>> get_iommu_features() call. >>> >>>> And with that field's use in >>>> disable_iommu(), won't we be at risk of leaving stuff enabled which we are >>>> entirely unaware of? >>> >>> Possibly, yes, that's always a risk. >>> >>>> Even if we fully cleared the control register (which >>>> would eliminate the need to fetch features), down the road a 2nd control >>>> register could appear. >>> >>> We do clear the control register, it's indirectly done by us setting >>> iommu->ctrl.raw = 0 after the disable_iommu() call. >>> >>> I did wonder about just doing a write of 0 to the control register, >>> but I think it's best if we try to gracefully disable the features (as >>> done in disable_iommu()), and then reset the cached control state to >>> 0. Future writes to the control register will clear any bits not >>> directly set by Xen. >> >> Maybe better to explicitly write out that 0 right away, even if you want >> to keep using disable_iommu()? > > Yeah, I also considered that. So after disable_iommu() set the cached > control state to 0 and also zero the control register right there. > Can do in the next version, unless there are further objections. Well, as said - I'm wary of fully dropping the memset(). It may help now, but it could easily cause issues later. Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 09:34:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:34:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301415.1575697 (Exim 4.92) (envelope-from ) id 1wKYdl-0006pG-Qd; Wed, 06 May 2026 09:34:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301415.1575697; Wed, 06 May 2026 09:34:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYdl-0006p9-Mv; Wed, 06 May 2026 09:34:01 +0000 Received: by outflank-mailman (input) for mailman id 1301415; Wed, 06 May 2026 09:34:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYdk-0006p3-3Y for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:34:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYdh-006gnA-BA for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:33:58 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0b00-e002-0a2a0a5209dd-0a2a4502a5d4-20 for ; Wed, 06 May 2026 11:33:58 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0b06-af86-0a2a45020019-d1558036f09f-3 for ; Wed, 06 May 2026 11:33:58 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-488d2079582so64398205e9.2 for ; Wed, 06 May 2026 02:33:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:33:57 -0700 (PDT) Message-ID: <95a2bc5d-c551-42f1-8f65-9f8db4100fe6@suse.com> Date: Wed, 6 May 2026 11:33:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86/time: make early NOW() uses slightly more precise Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778060038-82F6E161-CD531B69/0/0 X-purgate-type: clean X-purgate-size: 1437 For early NOW() uses to yield sufficiently precise results (scaling incurs some error, which grows with the delta being scaled), init_percpu_time() wants to have run as early as possible. With 93340297802b ("x86/time: calibrate TSC against platform timer") having moved the invocation of init_platform_timer() from init_xen_time() to early_time_init(), this other call could be moved as well. Moving, however, has the unwanted effect of then growing the gap until time calibration runs for the 1st time. Therefore keep the present invocation, and add another from early_time_init(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2597,6 +2597,11 @@ int __init init_xen_time(void) /* Finish platform timer initialization. */ try_platform_timer_tail(); + /* + * While early_time_init() called this already, call it again here to + * reduce the gap until local_time_calibration() gets to run for the + * first time. + */ init_percpu_time(); init_timer(&calibration_timer, time_calibration, NULL, 0); @@ -2642,6 +2647,8 @@ void __init early_time_init(void) set_time_scale(&t->tsc_scale, tmp); t->stamp.local_tsc = boot_tsc_stamp; + init_percpu_time(); + cpu_khz = DIV_ROUND(tmp, 1000); printk("Detected %lu.%03lu MHz processor.\n", cpu_khz / 1000, cpu_khz % 1000); From xen-devel-bounces@lists.xenproject.org Wed May 06 09:35:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:35:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301424.1575706 (Exim 4.92) (envelope-from ) id 1wKYfV-0007Jo-3m; Wed, 06 May 2026 09:35:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301424.1575706; Wed, 06 May 2026 09:35:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYfV-0007Jh-0m; Wed, 06 May 2026 09:35:49 +0000 Received: by outflank-mailman (input) for mailman id 1301424; Wed, 06 May 2026 09:35:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYfU-0007JZ-1A for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:35:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYfT-008DZC-Cn for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:35:47 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0b64-2eae-0a2a0a5409dd-0a2a450badd6-38 for ; Wed, 06 May 2026 11:35:47 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0b73-212f-0a2a450b0019-d155dd29c5a2-3 for ; Wed, 06 May 2026 11:35:47 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-445795cf6f1so3825595f8f.1 for ; Wed, 06 May 2026 02:35:47 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:35:46 -0700 (PDT) Message-ID: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Date: Wed, 6 May 2026 11:35:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini From: Jan Beulich Subject: [PATCH] x86/time: make do_settime() uses more accurate Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778060147-19F6EF3B-ACEBE957/0/0 X-purgate-type: clean X-purgate-size: 2801 As a comment next to one of the invocations states, get_wallclock_time() can take over a second. The order of evaluation of function arguments is in principle unspecified; in practice at least gcc looks to be evaluating them from last to first. Hence with NOW() invoked first, the respective value passed to do_settime() can be off by over a second (which is in contrast to __get_cmos_time() attempting to get the time exactly after an update, i.e. [pretty] precisely at a seconds boundary). This also addresses a Misra C:2012 rule 13.2 ("The value of an expression and its persistent side-effects shall be the same under all permitted evaluation orders") violation each. Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") Signed-off-by: Jan Beulich --- Of course the time it takes to do all the CMOS reads (or whichever else wallclock time source is in use) also results in an inaccuracy. For __get_cmos_time() this might be solvable by having it latch NOW() before doing the 6 reads, but in particular for efi_get_time() there's hardly anything we can do. As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't find any deviation for the two instances fixed here. What am I missing? For __get_cmos_time(), tangentially: Wouldn't we better use the century byte if available? As it stands, things will break in 2070. Which is a long way out, yes, but still. (Of course this would mean a 7th slow I/O port write/read pair.) --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2575,6 +2575,8 @@ __initcall(verify_tsc_reliability); /* Late init function (after interrupts are enabled). */ int __init init_xen_time(void) { + unsigned long wc; + tsc_check_writability(); open_softirq(TIME_CALIBRATE_SOFTIRQ, local_time_calibration); @@ -2592,7 +2594,8 @@ int __init init_xen_time(void) printk(XENLOG_INFO "Wallclock source: %s\n", wallclock_type_to_string()); /* NB. get_wallclock_time() can take over one second to execute. */ - do_settime(get_wallclock_time(), 0, NOW()); + wc = get_wallclock_time(); + do_settime(wc, 0, NOW()); /* Finish platform timer initialization. */ try_platform_timer_tail(); @@ -2745,6 +2748,8 @@ int time_suspend(void) int time_resume(void) { + unsigned long wc; + preinit_pit(); resume_platform_timer(); @@ -2756,7 +2761,8 @@ int time_resume(void) set_timer(&calibration_timer, NOW() + EPOCH); - do_settime(get_wallclock_time() + cmos_utc_offset, 0, NOW()); + wc = get_wallclock_time(); + do_settime(wc + cmos_utc_offset, 0, NOW()); update_vcpu_system_time(current); From xen-devel-bounces@lists.xenproject.org Wed May 06 09:37:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:37:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301433.1575714 (Exim 4.92) (envelope-from ) id 1wKYhO-00089u-Hl; Wed, 06 May 2026 09:37:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301433.1575714; Wed, 06 May 2026 09:37:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYhO-00089n-F9; Wed, 06 May 2026 09:37:46 +0000 Received: by outflank-mailman (input) for mailman id 1301433; Wed, 06 May 2026 09:37:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYhM-00089f-RS for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:37:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYhM-00FTsG-7u for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:37:44 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0be1-e002-0a2a0a5209dd-0a2a4506eae8-22 for ; Wed, 06 May 2026 11:37:44 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0be7-7371-0a2a45060019-d155802ae136-3 for ; Wed, 06 May 2026 11:37:44 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso65292125e9.3 for ; Wed, 06 May 2026 02:37:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:37:43 -0700 (PDT) Message-ID: <746ce9af-156b-4c16-8cc0-6e8d929107a0@suse.com> Date: Wed, 6 May 2026 11:37:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH RFC] x86/time: avoid early uses of NOW() to return zero Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778060264-84566D75-AC2B156B/0/0 X-purgate-type: clean X-purgate-size: 2361 Waiting loops like the one in flush_command_buffer() will degenerate to infinite ones when used early enough for NOW() to still return constant zero. Make sure the returned value at least monotonically increases. Do this only in get_s_time(), as producing a sane value in get_s_time_fixed() for non-zero inputs won't be reasonably possible. Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which checks for NOW() returning 0 (falling back to TSM_RAW in this case). For now I have no idea how to avoid this, except that when CPUID leaf 0x15 is available we could leverage that to put in place at least an approximate scale value. Doing so could, however, lead to a discontinuity (returned value moving backwards) once the final scale value was put in place. (Note, however, that such a discontinuity can also result from init_percpu_time() using the BSP's scale value as initial estimate for APs. Then again local_time_calibration() at least makes an attempt at avoiding such.) RFC: While generally the mentioned waiting loops will take longer to time out, on a very fast CPU tight loops may time out too early. RFC: In get_s_time_fixed(), should we perhaps assert that the scale was set? I don't think Fixes: tags should be put here. If we did, we'd have to enumerate all introductions of early uses of NOW() (or get_s_time()), with the exception of those dealing with getting back 0 (which I expect is only printk_start_of_line()). --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1668,6 +1668,20 @@ s_time_t get_s_time_fixed(u64 at_tsc) s_time_t get_s_time(void) { + /* + * Before the TSC scale is set, avoid returning constant 0 (or whatever + * this_cpu(cpu_time).stamp.local_stime is set to). While the returned + * value is in no way representing time, it at least increases + * monotonically, thus avoiding e.g. waiting loops to degenerate to + * entirely infinite ones. + */ + if ( unlikely(!this_cpu(cpu_time).tsc_scale.mul_frac) ) + { + static s_time_t counter; + + return arch_fetch_and_add(&counter, 1); + } + return get_s_time_fixed(0); } From xen-devel-bounces@lists.xenproject.org Wed May 06 09:39:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:39:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301442.1575725 (Exim 4.92) (envelope-from ) id 1wKYis-0000HN-Sn; Wed, 06 May 2026 09:39:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301442.1575725; Wed, 06 May 2026 09:39:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYis-0000HF-Om; Wed, 06 May 2026 09:39:18 +0000 Received: by outflank-mailman (input) for mailman id 1301442; Wed, 06 May 2026 09:39:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYir-0000H7-GX for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:39:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYip-006i3W-89 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:39:16 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0c3d-e002-0a2a0a5209dd-0a2a4503b96a-30 for ; Wed, 06 May 2026 11:39:16 +0200 Received: from [209.85.221.44] (helo=mail-wr1-f44.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0c44-672d-0a2a45030019-d155dd2ccc04-3 for ; Wed, 06 May 2026 11:39:16 +0200 Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-44ce78ab5feso3208057f8f.0 for ; Wed, 06 May 2026 02:39:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 02:39:15 -0700 (PDT) Message-ID: <1e23dd78-b246-4fc7-9e18-de8b0cd57721@suse.com> Date: Wed, 6 May 2026 11:39:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH RFC] x86/time: set AP's TSC scale estimate earlier Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778060356-3AB64938-CCE377A3/0/0 X-purgate-type: clean X-purgate-size: 1998 NOW() (in particular) can be used ahead of init_percpu_time(). As the initial scale value set is merely the BSP's, we can as well set it before actually launching the AP. Don't introduce yet another notifier function though; do this from smpboot.c's. Setting the scale alone, however, doesn't work, so the entire struct cpu_time is copied. Signed-off-by: Jan Beulich --- RFC: Copying the entire struct won't work very well when tsc_adjust[] is in use (and values there differ between sockets). This in particular eliminates an anomaly with log messages issued early while APs are coming up, when "boot" console timestamps are in use. --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preinit_percpu_time(unsigned int cpu); void init_percpu_time(void); void time_latch_stamps(void); --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -1139,6 +1139,7 @@ static int cf_check cpu_smpboot_callback { case CPU_UP_PREPARE: rc = cpu_smpboot_alloc(cpu); + preinit_percpu_time(cpu); break; case CPU_UP_CANCELED: case CPU_DEAD: --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); } +void preinit_percpu_time(unsigned int cpu) +{ + /* Initial estimate for TSC rate etc. */ + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); +} + void init_percpu_time(void) { struct cpu_time *t = &this_cpu(cpu_time); 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citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0808c1ab-0190-4653-4ea1-08deab53b75f X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 May 2026 09:41:58.1238 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: cS+mlVzY11glrkdWmWvIQHLAJS+MgqA0E7GpSWObIrROJzkqnrjjRWg4/0ZjiODjyay3B0QCeEu4qP/Svx09rMam98Yjj1cwfOrW8sVGlwg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR03MB7196 X-purgate-ID: tlsNG-ebf023/1778060523-4014E3FF-254269E4/0/0 X-purgate-type: clean X-purgate-size: 3773 On 06/05/2026 9:58 am, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 09:20:07AM +0100, Andrew Cooper wrote: >> On 06/05/2026 8:37 am, Roger Pau Monne wrote: >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>> say the least. We don't know what registers might be there, neither what >>> values might be safe for those registers. >> Minor grammar.  "there, nor which values". >> >>> On a forthcoming platform doing >>> the zeroing of the MMIO region can put the IOMMU in a broken state, >> "does put" >> >>> which is not recovered by the IOMMU initialization procedure in Xen. >> "recoverable". >> >>> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c >>> index 76ae78e5ea53..8bf5ca4de18f 100644 >>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> { >>> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >>> >>> - if ( !rc ) >>> - rc = map_iommu_mmio_region(iommu); >>> if ( rc ) >>> return rc; >>> >>> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> + IOMMU_MMIO_REGION_LENGTH); >>> + if ( !iommu->mmio_base ) >>> + return -ENOMEM; >>> + >>> get_iommu_features(iommu); >>> >>> /* >>> @@ -1381,6 +1372,11 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >>> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >>> return -ERANGE; >>> >>> + /* Read current control register and forcefully disable the IOMMU. */ >>> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >>> + disable_iommu(iommu, true); >>> + iommu->ctrl.raw = 0; >>> + >>> return 0; >>> } >> These two things are unrelated at want splitting into separate patches >> at a minimum.  The removal of memset() critically needs backporting. > But is it safe to backport the memset without also backporting the > disabling side? We might then be dealing with an enabled IOMMU which > could lead to all sorts of fun. I would absolutely take working with a potentially active IOMMU over zeroing the registers which don't appear in the public documentation. This is where BIOS norms save us.  The IOMMU can't be enabled without active OS negotiation, or DoS wouldn't be able to boot.  It is only in the past couple of years where this has not been the base compatibility case on all systems. But I see your point.  Given that we were clearing the main enable bit, we ought to continue to do so for backport purposes. It would be nice to have a printk_once() in there so we can spot when the IOMMU is enabled.  I expect it not to trigger but if it does trigger, we've got more investigation to do. >> As for disabling the IOMMU, I'm not certain it's wise. >> >> Linux can already "bring up" an already-live IOMMU and Xen needs to gain >> this ability in due course.  This is mainly for supporting PreBoot DMA >> Protection, but also for things like the kexec environment. > Note that Linux (when not booted from kdump) will do a similar sequence of > what I'm attempting to do here for Xen and will call iommu_disable() > ahead of attempting to enable the IOMMU. Lovely...  That's broken. The AMD IOMMU makes this especially easy to do.  Each of the ring buffers have enable bits separate to the general IOMMU enable, so you can temporary disable, move the buffer and clear the ring pointers, then re-enable. What is critical for Preboot DMA protection is that DMA translation doesn't get turned off. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:47:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:47:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301470.1575751 (Exim 4.92) (envelope-from ) id 1wKYr7-0003AL-74; Wed, 06 May 2026 09:47:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301470.1575751; Wed, 06 May 2026 09:47:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYr7-0003AE-3I; Wed, 06 May 2026 09:47:49 +0000 Received: by outflank-mailman (input) for mailman id 1301470; Wed, 06 May 2026 09:47:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYr6-0003A8-CN for xen-devel@lists.xenproject.org; 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Message-ID: Date: Wed, 6 May 2026 10:47:38 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Type: text/plain; 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich > --- > Of course the time it takes to do all the CMOS reads (or whichever else > wallclock time source is in use) also results in an inaccuracy. For > __get_cmos_time() this might be solvable by having it latch NOW() before > doing the 6 reads, but in particular for efi_get_time() there's hardly > anything we can do. > > As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > find any deviation for the two instances fixed here. What am I missing? >From deviations.ecl: -doc_begin="The following file is imported from Linux: ignore for now." -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} I've said before and it bears repeating.  This claim is false and should never have been put in to start with, and time.c is not impacted file. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:48:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:48:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301478.1575760 (Exim 4.92) (envelope-from ) id 1wKYri-0003iF-IE; Wed, 06 May 2026 09:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301478.1575760; Wed, 06 May 2026 09:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYri-0003i8-Ei; Wed, 06 May 2026 09:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1301478; Wed, 06 May 2026 09:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKYrg-0003hx-NV for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYrg-00HCqb-48 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:48:24 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb0e67-5cb7-0a2a0a5109dd-0a2a4502875e-4 for ; Wed, 06 May 2026 11:48:24 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0e67-af86-0a2a45020019-d155da32d4ed-3 for ; Wed, 06 May 2026 11:48:24 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-b9382e59c0eso981838166b.0 for ; Wed, 06 May 2026 02:48:23 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc55f30a2cfsm61872266b.57.2026.05.06.02.48.22 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 06 May 2026 02:48:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778060903; x=1778665703; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=zoE8x6AZyFV8b4Hk8uB8r7cxZqKnUgwsB6f57Kd4bDY=; b=PSXuSEhqdo9mS2z3fCo4o66dQ04w4zznKnVR1gJfBCpFSm17wJm3stmBqGExYFP1rq XwSVPofVgWlXcz9ss219d5u50a/R9V81nbKz8JRM+N/Jd89wNJ3yFXhGHDNuXwrqQ04G RG8/spK8YK23uAiDN/+fJQfwSgFH1xbsuKHuOgMuxlRVgD9h8fIR+gj/s/RB/f+yhirh TWo3luOpvApBMQxOzLH29hS9jACeRdvR3d3+z9nqKlZL9N3Gw4yq/ySCqFeIjOg/l8Od 2KZHFoMHgRMgwLNT5e1y8keY40KRItlixidZL3qWd7tuSSirhxHIvbBZwbBFqToYu1j2 aEeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778060903; x=1778665703; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=zoE8x6AZyFV8b4Hk8uB8r7cxZqKnUgwsB6f57Kd4bDY=; b=Jxtau/hE/r/zjlSCo8GxdSjvrsjy+ltHl07lEnwZ0uAAhnH3Jk0pujI1n4PixsDhJU lcVtWXJ/UxkzP5FXwnZyPTdOjB+UcwS2Pshwk/f+ZigiFj5mxiuqXcbih0sVtkaWfBPh 0o7dQmo5F2ogSOsZheBVaszpgevyIrBLXToH4Z0jlA98fHWHXs/lUGRlRoRue9jQ/Ugo shqMWSyYZXEourhseno8oGhPSPZ4Xo8Zr9z+4LC+M9yl2P5v5MZFRpr8szpuz6clO/pC yX8aUUXlbdLkEKunT0empBGo536a8V0sSpYcaMYdAsYQz2U7J+s8bpmZwSwW24z6COD8 kwPg== X-Gm-Message-State: AOJu0YxAiq6uIg32FNiUA3DadV7DKP8NAaaTMIk9rBDFIKhPmymCICTL qBQOV5LNDY6YQlq83yJ+PcvG8QpVKclNcGtrP8QxQw0JHPGy3oB9xugo X-Gm-Gg: AeBDievSZtuAtnoCffoOPow+O2hq41vBS2SfDT/xU6QRlLmN1J9Xda0vZR/sEkywKkT mbdurhPG2ozWmfLQV1Ehc/InE0XFW/xPjfoU1AqOuWaVVVbgJ0aqjkSwvFdM+MJeTzX3yS7WXqJ 9/IZkz+RZzjP32nXqXHHMGPVmT3yAbLa7DxsYJ5JRs1Rpmo3PfzFfe1J0A7DIZ5DoWV4ThPKFB9 AhT7sgkcMHkD0Eh2DOLwbPDNI3ygiQw0Fzve2wf5Psmk1w6hKWqIm6y3R0CTMTyVSxZ7Ad066Jq WbMNqlS4iMnZLxzHR+za5NYuuiKSHciF0wRwQ0QdO831AlP+nRb+s8mDaxL3y2tFCxg5queBo6t Kkuljwd9Ioo1T8H3iho+eq2ITC2P9qzWrNGVXKhveE4NDVvhvfP4WK6EZmR1WpU0GDknpZdTkAX cI3hbII4KOrIv1CVdaIekv9lgS38DO6O67vpC0JDyaNAHQcCfvxxZo/0jIpNOhY7EgLgvBmhPXr iGcSlPM+YunUg== X-Received: by 2002:a17:906:fe42:b0:b9d:2fce:308b with SMTP id a640c23a62f3a-bc56d80c34fmr115713166b.30.1778060903344; Wed, 06 May 2026 02:48:23 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 11:48:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778060904-83D67161-83155A11/10/73395122804 X-purgate-type: spam X-purgate-size: 4561 On 4/29/26 12:59 PM, Luca Fancellu wrote: > Hi Oleksii, > >> >> diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c >> index 9395b5af8745..a5554714cd7b 100644 >> --- a/xen/arch/arm/kernel.c >> +++ b/xen/arch/arm/kernel.c >> @@ -101,8 +101,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> paddr_t load_addr; >> >> #ifdef CONFIG_HAS_DOMAIN_TYPE >> - if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) >> - return mem->bank[0].start + info->zimage.text_offset; >> + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) >> + return mem->bank[0].start + info->image.text_offset; >> #endif >> >> /* >> @@ -111,19 +111,19 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> * and above 32MiB. Load it as high as possible within these >> * constraints, while also avoiding the DTB. >> */ >> - if ( info->zimage.start == 0 ) >> + if ( info->image.start == 0 ) >> { >> paddr_t load_end; >> >> load_end = mem->bank[0].start + mem->bank[0].size; >> load_end = MIN(mem->bank[0].start + MB(128), load_end); >> >> - load_addr = load_end - info->zimage.len; >> + load_addr = load_end - info->image.len; >> /* Align to 2MB */ >> load_addr &= ~((2 << 20) - 1); >> } >> else >> - load_addr = info->zimage.start; >> + load_addr = info->image.start; >> >> return load_addr; >> } >> @@ -131,8 +131,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) >> static void __init kernel_zimage_load(struct kernel_info *info) >> { >> paddr_t load_addr = kernel_zimage_place(info); >> - paddr_t paddr = info->zimage.kernel_addr; >> - paddr_t len = info->zimage.len; >> + paddr_t paddr = info->image.kernel_addr; >> + paddr_t len = info->image.len; >> void *kernel; >> int rc; >> >> @@ -215,7 +215,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> return -EOPNOTSUPP; >> } >> >> - info->zimage.start = be32_to_cpu(uimage.load); >> + info->image.start = be32_to_cpu(uimage.load); >> info->entry = be32_to_cpu(uimage.ep); >> >> /* >> @@ -224,20 +224,20 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> * independent image. That means Xen is free to load such an image at >> * any valid address. >> */ >> - if ( info->zimage.start == 0 ) >> + if ( info->image.start == 0 ) >> printk(XENLOG_INFO >> "No load address provided. Xen will decide where to load it.\n"); >> else >> printk(XENLOG_INFO >> "Provided load address: %"PRIpaddr" and entry address: %"PRIpaddr"\n", >> - info->zimage.start, info->entry); >> + info->image.start, info->entry); >> >> /* >> * If the image supports position independent execution, then user cannot >> * provide an entry point as Xen will load such an image at any appropriate >> * memory address. Thus, we need to return error. >> */ >> - if ( (info->zimage.start == 0) && (info->entry != 0) ) >> + if ( (info->image.start == 0) && (info->entry != 0) ) >> { >> printk(XENLOG_ERR >> "Entry point cannot be non zero for PIE image.\n"); >> @@ -257,13 +257,13 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> if ( rc ) >> return rc; >> >> - info->zimage.kernel_addr = mod->start; >> - info->zimage.len = mod->size; >> + info->image.kernel_addr = mod->start; >> + info->image.len = mod->size; >> } >> else >> { >> - info->zimage.kernel_addr = addr + sizeof(uimage); >> - info->zimage.len = len; >> + info->image.kernel_addr = addr + sizeof(uimage); >> + info->image.len = len; >> } >> >> info->load = kernel_zimage_load; >> @@ -289,7 +289,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, >> * Thus, Xen uses uimage.load attribute to determine the load address and >> * zimage.text_offset is ignored. > > Should we update the comment as well? > > Also in here: > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=xen/include/xen/fdt-kernel.h;h=4d0467bb396a9cf317954fd511469e7f56d67844;hb=refs/heads/staging#l111 Agree, it should be updated. I'll do that in the next version. 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The order of evaluation of function arguments is >> in principle unspecified; in practice at least gcc looks to be evaluating >> them from last to first. Hence with NOW() invoked first, the respective >> value passed to do_settime() can be off by over a second (which is in >> contrast to __get_cmos_time() attempting to get the time exactly after an >> update, i.e. [pretty] precisely at a seconds boundary). >> >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression >> and its persistent side-effects shall be the same under all permitted >> evaluation orders") violation each. >> >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >> Signed-off-by: Jan Beulich >> --- >> Of course the time it takes to do all the CMOS reads (or whichever else >> wallclock time source is in use) also results in an inaccuracy. For >> __get_cmos_time() this might be solvable by having it latch NOW() before >> doing the 6 reads, but in particular for efi_get_time() there's hardly >> anything we can do. >> >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't >> find any deviation for the two instances fixed here. What am I missing? > From deviations.ecl: > > -doc_begin="The following file is imported from Linux: ignore for now." > -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} > > I've said before and it bears repeating.  This claim is false and should > never have been put in to start with, and time.c is not impacted file. is not the only* ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 09:55:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 09:55:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301496.1575778 (Exim 4.92) (envelope-from ) id 1wKYye-0005mr-F3; Wed, 06 May 2026 09:55:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301496.1575778; Wed, 06 May 2026 09:55:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYye-0005mk-Bd; Wed, 06 May 2026 09:55:36 +0000 Received: by outflank-mailman (input) for mailman id 1301496; Wed, 06 May 2026 09:55:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKYyd-0005me-4M for xen-devel@lists.xenproject.org; Wed, 06 May 2026 09:55:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKYyc-00FYJY-BV for xen-devel@lists.xenproject.org; Wed, 06 May 2026 11:55:34 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb100e-bab6-0a2a0a5309dd-0a2a450ac94c-26 for ; Wed, 06 May 2026 11:55:34 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb0f9d-56b3-0a2a450a0019-a237832fa2ae-3 for ; Wed, 06 May 2026 11:53:34 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id BCFCE4EE3CD2; Wed, 6 May 2026 11:53:33 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778061213; b=px8G2yXEIN9aQ0VKbJeoLEXkn3Pqgo1XmG1bO7jb80ujXnvEGjXCtRJg+M2EdiIULwGi 5c4yziMexQoRlWyC5CZCPjwIkJdtIh+ik2ZDR2fJKhyc/HyOnu5+DBZvi5WR5HbyJK2xp f5ef142YxTojay6wZLwuxKqZT8JEL6LpjdutwfX7z/9H/zNfHMU1l29WDI1/RyBkNzDaf OUu8vot3hsunXEW0UY3QdCi+37MKUckLSDJ9asIRjyo40MuWBy6oEzwGYrjqGl1jx6tLL i2PmKxPfraiMTw77nk7+pQQI0MsuSLqRBjc7ZuoLGO4SXK0e3BzNtO2ONHl/QjohlUfxU eUWpKAbiiCJBdNOZv8xWBOLTtkAYLN7YaPIM6Y67ODll6IYfaspZWWWZokouy5TEFlOwt uZZFUyDTQlrJlVViUiBrucemanQcKF8wMzaLDCriO1OZ8d2OPpdscK+P4nfm0NNpwOmIn Y3lXMRR8tsaJAS92uzoapDAVJJZFSu+a7Ezo8BNxLwrfYiWavOXd4XWHXKHUBSU9BBWHa 8iX6OjnMIlGjoDMmE85Vq/PdpSeQ5b+vskFz17KKnHKPZrADEheS4xgG0oYPlWjSqYbSc FYPqbqXg3NpGI0plxACm/bOTkk59JG5QiMvY4DQr0ohh9kTslDdTSRWVcb+bfiA= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778061213; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=t0TU+owBELoRIKHKbCVQjRfjhvioRegLSxOHOhzdJbI=; b=hBnQ3hx3j+Y/H/erJ9e1T8U/b55iL3twIELe5OZSCqxM/q0UU8kq0jNqZaa0D9HsNkbH 3EdvCgCto5skC7XYNVDPIezf1PExGR8R9wuWXF31i6ywIk2B2SbLkx7i+J8uFzBtuOQsI fjn9/7DoJtc5qRW8eJ7cIee9LQlXKmykjbLV/wWjQV95x5x/6Tb94rvZ7C7OrGxTl4Ghg /IWI7O7ugWAaMRtaquXAIzl1FyKhId8C+vFv56qHuZyIMvQihjyG8ymAo3SS57HJiTiev 4kzeHbSJ8LvHMSReHidSWB7y58xMIdk5xz5BEgswB9HUD4TZzJA9BC35pS3Z4fL1AFMDH LVouKHdtFLAXt04GsnBLh2MWqfoo7o6bSJLfqje7Ld+8o7sDlKsXPAlsn0r2yDKslt3eO Fa5JogGliHzcMW2Smw55BglDbnoFjEMK8O91z5uzh1+QH1nZsutpIeVOvBDwiCw6NZrf9 dC/DHWXNDkAsrdAAkzifm+94yDVq4N3NHUrZLeSdnq5fgDB5hU8CCW+A2rZBhZlaoAaIS rCJ4/AGLiYkgFCY2cTsiB8kFI3hxjtahv4CsGiHgKvTBl7Dh8VvTxFoanguquAMpiDK19 +dfHnuxY09Bj89wPRGMVnifBYVrC/9auEhrBJL7LnNBKfoex8+/23tRK2az9B54= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 06 May 2026 11:53:33 +0200 From: Nicola Vetrini To: Andrew Cooper Cc: Jan Beulich , xen-devel@lists.xenproject.org, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate In-Reply-To: References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Message-ID: <8d96673827e5d38f2e665ba3a1126fbb@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778061214-70D608B7-759A420C/13/0 X-purgate-type: clean X-purgate-size: 2180 On 2026-05-06 11:48, Andrew Cooper wrote: > On 06/05/2026 10:47 am, Andrew Cooper wrote: >> On 06/05/2026 10:35 am, Jan Beulich wrote: >>> As a comment next to one of the invocations states, >>> get_wallclock_time() >>> can take over a second. The order of evaluation of function arguments >>> is >>> in principle unspecified; in practice at least gcc looks to be >>> evaluating >>> them from last to first. Hence with NOW() invoked first, the >>> respective >>> value passed to do_settime() can be off by over a second (which is in >>> contrast to __get_cmos_time() attempting to get the time exactly >>> after an >>> update, i.e. [pretty] precisely at a seconds boundary). >>> >>> This also addresses a Misra C:2012 rule 13.2 ("The value of an >>> expression >>> and its persistent side-effects shall be the same under all permitted >>> evaluation orders") violation each. >>> >>> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of >>> wallclock change") >>> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >>> Signed-off-by: Jan Beulich >>> --- >>> Of course the time it takes to do all the CMOS reads (or whichever >>> else >>> wallclock time source is in use) also results in an inaccuracy. For >>> __get_cmos_time() this might be solvable by having it latch NOW() >>> before >>> doing the 6 reads, but in particular for efi_get_time() there's >>> hardly >>> anything we can do. >>> >>> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also >>> can't >>> find any deviation for the two instances fixed here. What am I >>> missing? >> From deviations.ecl: >> >> -doc_begin="The following file is imported from Linux: ignore for >> now." >> -file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} >> >> I've said before and it bears repeating.  This claim is false and >> should >> never have been put in to start with, and time.c is not impacted file. > > is not the only* > Patches welcome :) -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 06 10:12:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:12:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301510.1575786 (Exim 4.92) (envelope-from ) id 1wKZES-0000kv-Qf; Wed, 06 May 2026 10:11:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301510.1575786; Wed, 06 May 2026 10:11:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKZES-0000ko-O6; Wed, 06 May 2026 10:11:56 +0000 Received: by outflank-mailman (input) for mailman id 1301510; Wed, 06 May 2026 10:11:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKZER-0000ki-Ef for xen-devel@lists.xenproject.org; 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Make sure the returned value at least monotonically increases. > > Do this only in get_s_time(), as producing a sane value in > get_s_time_fixed() for non-zero inputs won't be reasonably possible. > > Reported-by: Roger Pau Monné > Signed-off-by: Jan Beulich > --- > RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which > checks for NOW() returning 0 (falling back to TSM_RAW in this case). > For now I have no idea how to avoid this, except that when CPUID leaf > 0x15 is available we could leverage that to put in place at least an > approximate scale value. Doing so could, however, lead to a > discontinuity (returned value moving backwards) once the final scale > value was put in place. (Note, however, that such a discontinuity can > also result from init_percpu_time() using the BSP's scale value as > initial estimate for APs. Then again local_time_calibration() at > least makes an attempt at avoiding such.) For the purposes of printk_start_of_line() we could unconditionally use get_cycles() when system_state < SYS_STATE_smp_boot IMO. Using the frequency value from CPUID seems like a good approach also on boxes that expose this information. I wonder, we seem to unconditionally perform the TSC calibration against a known frequency time source, wouldn't it be more reliable to use the information from leaf 0x15 when available? > > RFC: While generally the mentioned waiting loops will take longer to time > out, on a very fast CPU tight loops may time out too early. I was wondering about that, increasing just a nano-second for each call seems like it's going to make progress fairly slow? Obviously depends on how tights the calls to NOW() are in the outside loop. Maybe when lacking frequency information from CPUID we could assume something like 8GHz and scale the TSC based on that? AFAICT it's advisable to use a frequency greater than any CPU, as then we don't risk NOW() running too fast. > RFC: In get_s_time_fixed(), should we perhaps assert that the scale was > set? Might be good, but I would like to see what explodes when doing that... > I don't think Fixes: tags should be put here. If we did, we'd have to > enumerate all introductions of early uses of NOW() (or get_s_time()), with > the exception of those dealing with getting back 0 (which I expect is only > printk_start_of_line()). I'm fine with no fixes tag, but we need to remember to backport this one. Thanks, Roger. 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With 93340297802b ("x86/time: > calibrate TSC against platform timer") having moved the invocation of > init_platform_timer() from init_xen_time() to early_time_init(), this > other call could be moved as well. > > Moving, however, has the unwanted effect of then growing the gap until > time calibration runs for the 1st time. Therefore keep the present > invocation, and add another from early_time_init(). Yeah, keeping the second init_xen_time() will make sure the BSP doesn't diverge too much from the platform timer during boot. WE migth as well skip it and wait for the first rendezvous, but this is likely more accurate at the cost of doing the extra init_xen_time() in the BSP. > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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Wed, 06 May 2026 03:27:01 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:26:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <2577e757d32f85fb8b3308863e6d7a53d70636dc.1777303844.git.oleksii.kurochko@gmail.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778063222-BF171DB1-E829D69D/10/73395122804 X-purgate-type: spam X-purgate-size: 1302 Hello Luca, On 4/29/26 5:10 PM, Luca Fancellu wrote: >> diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c >> index c51520ebadf9..6949203dacdc 100644 >> --- a/xen/common/device-tree/domain-build.c >> +++ b/xen/common/device-tree/domain-build.c >> @@ -1,6 +1,7 @@ >> /* SPDX-License-Identifier: GPL-2.0-only */ >> >> #include >> +#include >> #include >> #include >> #include >> diff --git a/xen/include/xen/domain-layout.h b/xen/include/xen/domain-layout.h >> new file mode 100644 >> index 000000000000..0532a27b44ce >> --- /dev/null >> +++ b/xen/include/xen/domain-layout.h > > New files should have SPDX tag I will add: /* SPDX-License-Identifier: GPL-2.0-only */ > >> @@ -0,0 +1,27 @@ >> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >> +#define __XEN_DOMAIN_LAYOUT_H__ > > I think this include guard doesn’t satisfy the coding style: > https://xenbits.xen.org/gitweb/?p=xen.git;a=blob;f=CODING_STYLE;h=aae5a47ac20345978b3c465b9d85f1d5f6774731;hb=refs/heads/staging#l167 Will rename to XEN_DOMAIN_LAYOUT_H. > > Apart from this, the rest looks ok to me, after fixing the above I will leave my R-by Thanks for review. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 10:32:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:32:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301543.1575814 (Exim 4.92) (envelope-from ) id 1wKZYW-0004yJ-09; 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Make sense. I will rephrase commit message according to your suggestion. > >> On 28 Apr 2026, at 15:33, Oleksii Kurochko wrote: >> >> The IPA terminology is Arm-specific, so rename p2m_ipa_bits to >> p2m_gpa_bits to use architecture-neutral naming in >> xen/common/device-tree/ code. >> >> No functional changes. >> >> Reported-by: Jan Beulich >> Signed-off-by: Oleksii Kurochko >> --- >> Changes in v4: >> - Nothing changed only rebase. >> --- >> Changes in v3: >> - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of >> renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of >> changes clearer and keep using Arm-specific terminolgy inside >> Arm code. >> --- >> Changes in v2: >> - New patch. >> --- >> --- > > If the maintainer agrees and the title is fixed: > > Reviewed-by: Luca Fancellu Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 10:33:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 10:33:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301551.1575823 (Exim 4.92) (envelope-from ) id 1wKZZG-0005Qt-99; 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As the > initial scale value set is merely the BSP's, we can as well set it before > actually launching the AP. Don't introduce yet another notifier function > though; do this from smpboot.c's. > > Setting the scale alone, however, doesn't work, so the entire struct > cpu_time is copied. > > Signed-off-by: Jan Beulich > --- > RFC: Copying the entire struct won't work very well when tsc_adjust[] is > in use (and values there differ between sockets). > > This in particular eliminates an anomaly with log messages issued early > while APs are coming up, when "boot" console timestamps are in use. Could we consider moving init_percpu_time() earlier in start_secondary()? I think it's main dependency is on set_cpu_sibling_map(), which we could also move earlier? Looking further, seems like it depends on smp_callin() having parsed the CPUID features, plus the socket_cpumask[] also being set. > --- a/xen/arch/x86/include/asm/time.h > +++ b/xen/arch/x86/include/asm/time.h > @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int > int time_suspend(void); > int time_resume(void); > > +void preinit_percpu_time(unsigned int cpu); > void init_percpu_time(void); > void time_latch_stamps(void); > > --- a/xen/arch/x86/smpboot.c > +++ b/xen/arch/x86/smpboot.c > @@ -1139,6 +1139,7 @@ static int cf_check cpu_smpboot_callback > { > case CPU_UP_PREPARE: > rc = cpu_smpboot_alloc(cpu); > + preinit_percpu_time(cpu); > break; > case CPU_UP_CANCELED: > case CPU_DEAD: > --- a/xen/arch/x86/time.c > +++ b/xen/arch/x86/time.c > @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) > ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); > } > > +void preinit_percpu_time(unsigned int cpu) > +{ > + /* Initial estimate for TSC rate etc. */ > + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); > +} > + > void init_percpu_time(void) > { > struct cpu_time *t = &this_cpu(cpu_time); > @@ -2353,9 +2359,6 @@ void init_percpu_time(void) > u64 tsc; > s_time_t now; > > - /* Initial estimate for TSC rate. */ > - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; Wouldn't it be simpler to pull this out of init_percpu_time() and do it at the start of start_secondary()? Thanks, Roger. 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Wed, 06 May 2026 03:38:13 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:38:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/time: avoid early uses of NOW() to return zero To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <746ce9af-156b-4c16-8cc0-6e8d929107a0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778063894-A857B161-6FDD20FA/0/0 X-purgate-type: clean X-purgate-size: 3601 On 06.05.2026 12:11, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:37:41AM +0200, Jan Beulich wrote: >> RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which >> checks for NOW() returning 0 (falling back to TSM_RAW in this case). >> For now I have no idea how to avoid this, except that when CPUID leaf >> 0x15 is available we could leverage that to put in place at least an >> approximate scale value. Doing so could, however, lead to a >> discontinuity (returned value moving backwards) once the final scale >> value was put in place. (Note, however, that such a discontinuity can >> also result from init_percpu_time() using the BSP's scale value as >> initial estimate for APs. Then again local_time_calibration() at >> least makes an attempt at avoiding such.) > > For the purposes of printk_start_of_line() we could unconditionally > use get_cycles() when system_state < SYS_STATE_smp_boot IMO. Hmm, "raw" console timestamps are quite a bit uglier to deal with as a human. Also, while init_xen_time() is pretty close to us setting SYS_STATE_smp_boot, early_time_init() occurs earlier (and with init_percpu_time() also called from there that's enough for "good" timestamps). > Using > the frequency value from CPUID seems like a good approach also on > boxes that expose this information. As per what you suggest below, we may then need to increase that value by some margin, to have NOW() rather move a little to slow than too fast. Plus of course it won't help for AMD at all. > I wonder, we seem to unconditionally perform the TSC calibration > against a known frequency time source, wouldn't it be more reliable to > use the information from leaf 0x15 when available? Andrew has been suggesting this, but I can only keep saying that what CPUID reports are nominal values aiui, not actual ones. From what I know, there's always some (small) variation as to the frequency of actual crystals. And it's unclear whether our calibration is more precise than what CPUID tells us. (If we knew at least average errors, we could maybe calculate the value to use from both the calculated and the nominal value.) >> RFC: While generally the mentioned waiting loops will take longer to time >> out, on a very fast CPU tight loops may time out too early. > > I was wondering about that, increasing just a nano-second for each > call seems like it's going to make progress fairly slow? Obviously > depends on how tights the calls to NOW() are in the outside loop. > > Maybe when lacking frequency information from CPUID we could assume > something like 8GHz and scale the TSC based on that? AFAICT it's > advisable to use a frequency greater than any CPU, as then we don't > risk NOW() running too fast. Whatever value we pick, something faster may later appear. And too high a value isn't good either. >> RFC: In get_s_time_fixed(), should we perhaps assert that the scale was >> set? > > Might be good, but I would like to see what explodes when doing > that... Of course that would need checking first. I've audited the callers, and all looked safe to me. Will do for v2. >> I don't think Fixes: tags should be put here. If we did, we'd have to >> enumerate all introductions of early uses of NOW() (or get_s_time()), with >> the exception of those dealing with getting back 0 (which I expect is only >> printk_start_of_line()). > > I'm fine with no fixes tag, but we need to remember to backport this > one. Definitely. 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Wed, 06 May 2026 03:46:11 -0700 (PDT) Message-ID: Date: Wed, 6 May 2026 12:46:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH RFC] x86/time: set AP's TSC scale estimate earlier To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <1e23dd78-b246-4fc7-9e18-de8b0cd57721@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778064372-23F7EC48-12E38768/0/0 X-purgate-type: clean X-purgate-size: 2332 On 06.05.2026 12:33, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:39:14AM +0200, Jan Beulich wrote: >> NOW() (in particular) can be used ahead of init_percpu_time(). As the >> initial scale value set is merely the BSP's, we can as well set it before >> actually launching the AP. Don't introduce yet another notifier function >> though; do this from smpboot.c's. >> >> Setting the scale alone, however, doesn't work, so the entire struct >> cpu_time is copied. >> >> Signed-off-by: Jan Beulich >> --- >> RFC: Copying the entire struct won't work very well when tsc_adjust[] is >> in use (and values there differ between sockets). >> >> This in particular eliminates an anomaly with log messages issued early >> while APs are coming up, when "boot" console timestamps are in use. > > Could we consider moving init_percpu_time() earlier in > start_secondary()? I think it's main dependency is on > set_cpu_sibling_map(), which we could also move earlier? > > Looking further, seems like it depends on smp_callin() having parsed > the CPUID features, plus the socket_cpumask[] also being set. Right, and CPUID retrieving in turn wants to be after ucode loading. Ucode loading, however, is the primary source of AP boot log messages that I'm aware of. >> --- a/xen/arch/x86/time.c >> +++ b/xen/arch/x86/time.c >> @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) >> ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); >> } >> >> +void preinit_percpu_time(unsigned int cpu) >> +{ >> + /* Initial estimate for TSC rate etc. */ >> + per_cpu(cpu_time, cpu) = this_cpu(cpu_time); >> +} >> + >> void init_percpu_time(void) >> { >> struct cpu_time *t = &this_cpu(cpu_time); >> @@ -2353,9 +2359,6 @@ void init_percpu_time(void) >> u64 tsc; >> s_time_t now; >> >> - /* Initial estimate for TSC rate. */ >> - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; > > Wouldn't it be simpler to pull this out of init_percpu_time() and do > it at the start of start_secondary()? As long as it's only copying memory, that may work fine. Plus, yes, it would allow accessing actual registers of the CPU being brought up, if need be. I'm slightly wary, but I guess I'll follow this suggestion. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="BPtx1NF9RdXMA+6z" Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-33051d/1778066127-41B92938-64094735/0/0 X-purgate-type: clean X-purgate-size: 2720 --BPtx1NF9RdXMA+6z Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Wed, 6 May 2026 13:15:22 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau =?utf-8?B?TW9ubsOp?= Cc: =?utf-8?B?SsO8cmdlbiBHcm/Dnw==?= , "xen-devel@lists.xenproject.org" Subject: Re: Problem with PCI-passthrough to PV guest On Wed, May 06, 2026 at 11:18:28AM +0200, Roger Pau Monn=C3=A9 wrote: > On Wed, May 06, 2026 at 10:45:49AM +0200, J=C3=BCrgen Gro=C3=9F wrote: > > On 05.05.26 20:47, Roger Pau Monn=C3=A9 wrote: > > > On Tue, May 05, 2026 at 05:53:31PM +0200, J=C3=BCrgen Gro=C3=9F wrote: > > > > SUSE QA is seeing a problem with PCI-passthrough of a SR-IOV to a P= V guest > > > > running a 6.4 based kernel, but I can reproduce the problem with up= stream > > > > kernel, too. > >=20 > > Uh, seems my tested kernel was only "nearly upstream" (it was an early > > 7.0 kernel). It was missing commit 0949c646d646, which makes the differ= ence. > >=20 > > So for now this issue will only show up for cases where a PV-guest is > > setup for PCI passthrough and it gets memory hotplugged before the PCI > > device is added to it. >=20 > Hm, yes, this is yet more fallout from the unpopulated-alloc changes. > For PV guests that have the e820 host available we could try to create > the hotplug regions over what are host RAM region in the memory map, > as then we know we won't be overlapping with MMIO areas. FWIW, my Linux testing series also(?) found a PV PCI-passthrough issue in recent Linux (linux-next from a few days ago there). While it looks to be a different issue, it would help a lot to have that series in, to at least detect regressions early. See https://lore.kernel.org/xen-devel/cover.30e6171ddf1c6a72eadf4af0a77c892d4f1= 8d811.1777898148.git-series.marmarek@invisiblethingslab.com/ --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --BPtx1NF9RdXMA+6z Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmn7IsoACgkQ24/THMrX 1yzPYAgAgL0huzKRxGal0fySxl+meBobKw0S0jiS74w24B6k4KQkl8hmw/CwNhYq zSK17H8yOFaIVTI1rZoyHn7ZYP2siwn65wkB7wo5FWzp7ArZo4l9olERLrj+m29n XZyKUdjsvakSpF7jcl66SVi6tHpVR1Gkn2+Ve+LXlmn1deUmsfdxaAZpdkxjlxpM pvIEo83m8DEdN8kjdbRXiU/IhiUT/wI8r12pItFoO7VyxSNs1gd4vWvCZHYG1aXf Z8ABTE7E54GUKyibvWXmK+ZK/vUoxpsbaz1DqMOh7N+u2J+BoSvYJdCzoWnzz2fU pajl8R+7UzBQYuETMHZ3nZx67v2nWw== =+GUB -----END PGP SIGNATURE----- --BPtx1NF9RdXMA+6z-- From xen-devel-bounces@lists.xenproject.org Wed May 06 11:15:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 11:15:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301600.1575859 (Exim 4.92) (envelope-from ) id 1wKaEG-0004Ik-Tv; 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich > --- > Of course the time it takes to do all the CMOS reads (or whichever else > wallclock time source is in use) also results in an inaccuracy. For > __get_cmos_time() this might be solvable by having it latch NOW() before > doing the 6 reads, but in particular for efi_get_time() there's hardly > anything we can do. > > As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > find any deviation for the two instances fixed here. What am I missing? > > For __get_cmos_time(), tangentially: Wouldn't we better use the > century byte if available? As it stands, things will break in 2070. Which > is a long way out, yes, but still. (Of course this would mean a 7th slow > I/O port write/read pair.) Seems fine to me. One further note: in __get_cmos_time() I think we want to read backwards, so start with century then year and so on, so the last read is seconds, as to avoid extra skew. Thanks, Roger. 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Wed, 06 May 2026 04:45:38 -0700 (PDT) Message-ID: <8bd8e079-f3af-404e-adc5-1542422f39b5@suse.com> Date: Wed, 6 May 2026 13:45:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/time: make do_settime() uses more accurate To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Nicola Vetrini References: <99a4a514-3ed5-43f7-823c-54771f3bd03d@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778067938-AE143FF4-30D2E27C/0/0 X-purgate-type: clean X-purgate-size: 2456 On 06.05.2026 13:15, Roger Pau Monné wrote: > On Wed, May 06, 2026 at 11:35:45AM +0200, Jan Beulich wrote: >> As a comment next to one of the invocations states, get_wallclock_time() >> can take over a second. The order of evaluation of function arguments is >> in principle unspecified; in practice at least gcc looks to be evaluating >> them from last to first. Hence with NOW() invoked first, the respective >> value passed to do_settime() can be off by over a second (which is in >> contrast to __get_cmos_time() attempting to get the time exactly after an >> update, i.e. [pretty] precisely at a seconds boundary). >> >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression >> and its persistent side-effects shall be the same under all permitted >> evaluation orders") violation each. >> >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") >> Signed-off-by: Jan Beulich >> --- >> Of course the time it takes to do all the CMOS reads (or whichever else >> wallclock time source is in use) also results in an inaccuracy. For >> __get_cmos_time() this might be solvable by having it latch NOW() before >> doing the 6 reads, but in particular for efi_get_time() there's hardly >> anything we can do. >> >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't >> find any deviation for the two instances fixed here. What am I missing? >> >> For __get_cmos_time(), tangentially: Wouldn't we better use the >> century byte if available? As it stands, things will break in 2070. Which >> is a long way out, yes, but still. (Of course this would mean a 7th slow >> I/O port write/read pair.) > > Seems fine to me. I'll make a patch, provided I can figure out under what conditions the byte is present / valid (hopefully that won't involve ACPI AML). > One further note: in __get_cmos_time() I think we want to read > backwards, so start with century then year and so on, so the last read > is seconds, as to avoid extra skew. I don't think this matters. It would be awkward if those reads took over a second. Plus if it did, the UIP flag would transiently be set, in which case doing the reads wouldn't be valid in the first place. Arguably this can in principle happen if a SMI hits in the middle, and its handling takes excessively long. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778068451-09B68C48-499F5830/0/0 X-purgate-type: clean X-purgate-size: 3165 On 06.05.2026 11:39, Mykyta Poturai wrote: > On 5/4/26 08:37, Jan Beulich wrote: >> On 23.04.2026 12:12, Mykyta Poturai wrote: >>> On 4/21/26 17:43, Jan Beulich wrote: >>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>> From: Stewart Hildebrand >>>>> >>>>> This code is expected to only be used by privileged domains, >>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>> >>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>> for possible changes in the system page size register. Also force VFs to >>>>> always use emulated reads for command register, this is needed to >>>>> prevent some drivers accidentally unmapping BARs. >>>> >>>> This apparently refers to the change to vpci_init_header(). Writes are >>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>> the memory decode bit there is hardwired to 0. >>>> >>>>> Discovery of VFs is >>>>> done by Dom0, which must register them with Xen. >>>> >>>> If we intercept control register writes, why would we still require >>>> Dom0 to report the VFs that appear? >>>> >>> >>> Sorry, I don't understand this question. You specifically requested this >>> to be done this way in V2. Quoting your reply from V2 below. >>> >>> > Aren't you effectively busy-waiting for these 100ms, by simply >>> returning "true" >>> > from vpci_process_pending() until the time has passed? This imo is a >>> no-go. You >>> > want to set a timer and put the vCPU to sleep, to wake it up again >>> when the >>> > timer has expired. That'll then eliminate the need for the >>> not-so-nice patch 4. >>> >>> > Question is whether we need to actually go this far (right away). I >>> expect you >>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>> > domain, can't we trust it to set things up correctly, just like we >>> trust it in >>> > a number of other aspects? >> >> How's any of this related to the question I raised here, or your reply >> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >> Why still demand Dom0 to report them then? >> > > The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > set to become alive. We discussed in the V2 that it is not acceptable to > do a required 100ms wait in Xen while blocking a domain. And not doing > that blocking would require some mechanism to only allow a domain to run > for precisely 99(or more?)ms. You yourself suggested that we can trust > the hardware domain with registering VFs if we already trust it with > other PCI-related stuff. Did you change your mind, or am I completely > misunderstanding this question? No, I still think that we can trust hwdom enough. Nevertheless we should aim at being independent of it where possible. And I seem to recall that I had also outlined an approach how to avoid spin-waiting for 100ms in the hypervisor. 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No specific reason except to be aligned with similar alignment below, it could be lesser (PAGE_SIZE or even just unsigned long aligned) or even dropped, I think. It was just easier then to calculate aligned addresses. But I don't see any big issue to have such alignments except maybe that it will waste some memory. > >> + const paddr_t modsize = initrd_len + dtb_len; >> + unsigned int bi = banks->nr_banks; >> + >> + BUG_ON(modsize < initrd_len); > > Where's the earlier check that allows this to be BUG_ON()? There isn't one. I will replace that with: if ( modsize < initrd_len ) panic("Module size overflow: initrd + dtb size wraps paddr_t\n"); > >> + /* >> + * Place modules as high in RAM as possible, scanning banks from >> + * last to first so that the end of the last bank is preferred. >> + */ >> + while ( bi-- > 0 ) >> + { >> + const struct membank *bank = &banks->bank[bi]; >> + const paddr_t bank_end = bank->start + bank->size; >> + paddr_t modbase; >> + >> + if ( modsize > bank->size ) >> + continue; >> + >> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); > > Same question here. I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be potentially used in page table. > >> + if ( modbase < bank->start ) >> + continue; >> + >> + /* >> + * If modules would overlap the kernel, try placing them below it. >> + */ > > With how kernel_image_place() works, and with the heavy alignment applied > above, is this even possible to succeed? Oh, wait, yes - for the not- > position-independent case. I don't understand what is wrong with putting initrd and dtb to basically any place except where kernel is expected to be placed (as in case of position dependent case I assume it is pretty crucial). > >> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >> + (modbase + modsize > kernbase) ) >> + { >> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); > > What prevents this subtraction from underflowing? I will put the following check at the start of the place_modules() function: if ( kernbase < modsize ) panic("Underflow could happen between kernbase and modsize\n"); > >> +static paddr_t __init kernel_image_place(struct kernel_info *info) >> +{ >> + paddr_t load_addr = INVALID_PADDR; >> + uint64_t image_size = info->image.image_size ?: info->image.len; >> + const struct membanks *banks = kernel_info_get_mem_const(info); >> + unsigned int nr_banks = banks->nr_banks; >> + unsigned int bi; >> + >> + dprintk(XENLOG_DEBUG, "nr_banks(%u)\n", nr_banks); > > Did you mean to drop this before submitting? Sure, it should be dropped. > >> + /* >> + * At the moment, RISC-V's Linux kernel should be always position >> + * independent based on "Per-MMU execution" of boot.rst: >> + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution >> + * >> + * But just for the case when RISC-V's Linux kernel isn't position >> + * independent it is needed to take load address from >> + * info->image.start. >> + * >> + * If `start` is zero, the Image is position independent. >> + */ >> + if ( likely(!info->image.start) ) >> + { >> + for ( bi = 0; bi != nr_banks; bi++ ) >> + { >> + const struct membank *bank = &banks->bank[bi]; >> + paddr_t bank_start = bank->start; >> + /* >> + * According to boot.rst kernel load address should be properly >> + * aligned: >> + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location >> + * >> + * As Image in this case is PIC we can ignore >> + * info->image.text_offset. >> + */ >> + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); >> + paddr_t bank_end = bank_start + bank->size; >> + paddr_t bank_size; >> + >> + if ( aligned_start > bank_end ) >> + continue; >> + >> + bank_size = bank_end - aligned_start; >> + >> + dprintk(XENLOG_DEBUG, "bank[%u].start=%"PRIpaddr"\n", bi, bank->start); > > And this one? (I also find it puzzling that ->start would be of (primary) interest > here, when ... > >> + if ( image_size <= bank_size ) > > ... bank_size is what's relevant. This one should be dropped too. > >> +/* Check if the image is a 64-bit Image */ >> +static int __init kernel_image64_probe(struct kernel_info *info, >> + paddr_t addr, paddr_t size) >> +{ >> + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ >> + struct { >> + uint32_t code0; /* Executable code */ >> + uint32_t code1; /* Executable code */ >> + uint64_t text_offset; /* Image load offset, little endian */ >> + uint64_t image_size; /* Effective Image size, little endian */ >> + uint64_t flags; /* kernel flags, little endian */ >> + uint32_t version; /* Version of this header */ >> + uint32_t res1; /* Reserved */ >> + uint64_t res2; /* Reserved */ >> + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ >> + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ >> + uint32_t res3; /* Reserved for PE COFF offset */ >> + } image; >> + uint64_t effective_size; >> + >> + if ( size < sizeof(image) ) >> + return -EINVAL; >> + >> + copy_from_paddr(&image, addr, sizeof(image)); >> + >> + /* Magic v1 is deprecated and may be removed. Only use v2 */ >> + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) >> + return -EINVAL; >> + >> + effective_size = le64_to_cpu(image.image_size); >> + >> + if ( effective_size && size > effective_size ) >> + return -EINVAL; > > Is the rhs of the && the wrong way round? If effective_size > size, > aren't you in trouble? Question of course is what "effective" really > means. Yet in any event it seems dubious to me that effective_size < > size would really be a problem. IOW this will want commenting upon > if the check is to stay. > > Actually ... > >> + info->image.kernel_addr = addr; >> + /* Actual size in the binary file */ >> + info->image.len = size; >> + /* Total memory the kernel occupies at runtime */ >> + info->image.image_size = effective_size; > > ... this looks to suggest something .bss-like. Yes, effective_size it is size which included .bss. size it of LK after decompression of Image.gz and it doesn't include .bss so it should be lesser then effective_size. I don't think that I am in trouble that effective_size is bigger then size if we allocate enough space in memory effective_size is fine to be bigger. It is a good question if effective_size < size is a problem. I think it isn't but could it be really happen? I think that I am okay to drop that part of if(). > >> --- a/xen/include/xen/fdt-kernel.h >> +++ b/xen/include/xen/fdt-kernel.h >> @@ -59,8 +59,15 @@ struct kernel_info { >> struct { >> paddr_t kernel_addr; >> paddr_t len; >> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) >> - paddr_t text_offset; /* 64-bit Image only */ >> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) >> + /* >> + * ARM: 64-bit Image only. >> + * RISC-V: both 32-bit and 64-bit Images. >> + */ >> + paddr_t text_offset; >> +#endif >> +#if defined(CONFIG_RISCV) >> + uint64_t image_size; /* Effective size of Image */ > > As this (apparently) is for both RV64 and RV32 - can the latter really have > wider than 32-bit image sizes? If not - use size_t or unsigned long here? Agree, unsigned long should be enough. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 12:05:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 12:05:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301663.1575895 (Exim 4.92) (envelope-from ) id 1wKb0A-0004oR-4i; Wed, 06 May 2026 12:05:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301663.1575895; Wed, 06 May 2026 12:05:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKb0A-0004oK-1m; Wed, 06 May 2026 12:05:18 +0000 Received: by outflank-mailman (input) for mailman id 1301663; Wed, 06 May 2026 12:05:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKb09-0004oD-3V for xen-devel@lists.xenproject.org; Wed, 06 May 2026 12:05:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKb08-00DLT7-Cp for xen-devel@lists.xenproject.org; Wed, 06 May 2026 14:05:16 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb2e73-bab6-0a2a0a5309dd-0a2a4505ad8a-30 for ; Wed, 06 May 2026 14:05:16 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb2e7c-aaa8-0a2a45050019-d1558035d8ca-3 for ; Wed, 06 May 2026 14:05:16 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4891c00e7aeso54011925e9.2 for ; Wed, 06 May 2026 05:05:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 06 May 2026 05:05:15 -0700 (PDT) Message-ID: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Date: Wed, 6 May 2026 14:05:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper From: Jan Beulich Subject: [PATCH] CI: collect certain intermediate files as artifacts Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778069116-DAF6E443-656ED7D2/0/0 X-purgate-type: clean X-purgate-size: 1624 When one of the linking passes fails, additional intermediate files are still in place. Having them available for analysis of the underlying problem can be pretty helpful. Collect some into a new intermediates/ directory. (Nothing new will be collected if linking succeeds.) While there also make sure xen-syms is collected (into binaries/). This is rather more useful for analysis of possible problems than its stripped counterpart. Signed-off-by: Jan Beulich --- As the issue this is meant to help with didn't re-occur with this in place, the new logic wasn't really tested yet. --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -6,6 +6,7 @@ artifacts: paths: - binaries/ + - intermediates/ - xen-config - xen-cppcheck.txt - '*.log' --- a/automation/scripts/build +++ b/automation/scripts/build @@ -41,18 +41,24 @@ fi # to exit early -- bash is invoked with -e. cp xen/.config xen-config -# Directory for the artefacts to be dumped into -mkdir -p binaries +# Directories for the artefacts to be dumped into +mkdir -p binaries intermediates collect_xen_artefacts() { local f - for f in xen/xen xen/xen.efi; do + for f in xen/xen xen/xen-syms xen/xen.efi; do if [[ -f $f ]]; then cp $f binaries/ fi done + + for f in xen/.xen-syms.* xen/.xen.efi.*; do + if [[ -f $f ]]; then + cp $f intermediates/ + fi + done } if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then From xen-devel-bounces@lists.xenproject.org Wed May 06 12:45:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 12:45:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301692.1575908 (Exim 4.92) (envelope-from ) id 1wKbcv-0002JB-2m; Wed, 06 May 2026 12:45:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301692.1575908; Wed, 06 May 2026 12:45:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKbcu-0002J3-Vr; Wed, 06 May 2026 12:45:20 +0000 Received: by outflank-mailman (input) for mailman id 1301692; Wed, 06 May 2026 12:45:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKbcs-0002Ix-Sz for xen-devel@lists.xenproject.org; Wed, 06 May 2026 12:45:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKbcr-002h4o-U4 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 14:45:17 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb37d0-bab6-0a2a0a5309dd-0a2a4508be68-38 for ; Wed, 06 May 2026 14:45:17 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb37dd-63b5-0a2a45080019-d1558035a5a5-3 for ; Wed, 06 May 2026 14:45:17 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so6463875e9.1 for ; Wed, 06 May 2026 05:45:17 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778071517-BEF72DB1-CF07FBC7/0/0 X-purgate-type: clean X-purgate-size: 6045 On 06.05.2026 13:57, Oleksii Kurochko wrote: > On 5/4/26 4:05 PM, Jan Beulich wrote: >> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>> --- /dev/null >>> +++ b/xen/arch/riscv/kernel.c >>> @@ -0,0 +1,242 @@ >>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>> + >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> +#include >>> + >>> +#include >>> + >>> +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ >>> + >>> +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, >>> + paddr_t kernend) >>> +{ >>> + const struct boot_module *mod = info->bd.initrd; >>> + const struct membanks *banks = kernel_info_get_mem_const(info); >>> + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, >>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>> + KERNEL_LOAD_ADDR_ALIGNMENT); >> > >> Why would modules need to be this strongly aligned? > No specific reason except to be aligned with similar alignment below, it > could be lesser (PAGE_SIZE or even just unsigned long aligned) or even > dropped, I think. It was just easier then to calculate aligned > addresses. But I don't see any big issue to have such alignments except > maybe that it will waste some memory. Or result in there not being enough memory to hold everything. >>> + /* >>> + * Place modules as high in RAM as possible, scanning banks from >>> + * last to first so that the end of the last bank is preferred. >>> + */ >>> + while ( bi-- > 0 ) >>> + { >>> + const struct membank *bank = &banks->bank[bi]; >>> + const paddr_t bank_end = bank->start + bank->size; >>> + paddr_t modbase; >>> + >>> + if ( modsize > bank->size ) >>> + continue; >>> + >>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >> >> Same question here. > > I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be > potentially used in page table. I fear I'm lost. All the modules are temporary entities, aren't they? >>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>> + (modbase + modsize > kernbase) ) >>> + { >>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >> >> What prevents this subtraction from underflowing? > > I will put the following check at the start of the place_modules() function: > if ( kernbase < modsize ) > panic("Underflow could happen between kernbase and modsize\n"); Wait - why would this be a legitimate condition to panic? >>> +/* Check if the image is a 64-bit Image */ >>> +static int __init kernel_image64_probe(struct kernel_info *info, >>> + paddr_t addr, paddr_t size) >>> +{ >>> + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ >>> + struct { >>> + uint32_t code0; /* Executable code */ >>> + uint32_t code1; /* Executable code */ >>> + uint64_t text_offset; /* Image load offset, little endian */ >>> + uint64_t image_size; /* Effective Image size, little endian */ >>> + uint64_t flags; /* kernel flags, little endian */ >>> + uint32_t version; /* Version of this header */ >>> + uint32_t res1; /* Reserved */ >>> + uint64_t res2; /* Reserved */ >>> + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ >>> + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ >>> + uint32_t res3; /* Reserved for PE COFF offset */ >>> + } image; >>> + uint64_t effective_size; >>> + >>> + if ( size < sizeof(image) ) >>> + return -EINVAL; >>> + >>> + copy_from_paddr(&image, addr, sizeof(image)); >>> + >>> + /* Magic v1 is deprecated and may be removed. Only use v2 */ >>> + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) >>> + return -EINVAL; >>> + >>> + effective_size = le64_to_cpu(image.image_size); >>> + >>> + if ( effective_size && size > effective_size ) >>> + return -EINVAL; >> >> Is the rhs of the && the wrong way round? If effective_size > size, >> aren't you in trouble? Question of course is what "effective" really >> means. Yet in any event it seems dubious to me that effective_size < >> size would really be a problem. IOW this will want commenting upon >> if the check is to stay. >> >> Actually ... >> >>> + info->image.kernel_addr = addr; >>> + /* Actual size in the binary file */ >>> + info->image.len = size; >>> + /* Total memory the kernel occupies at runtime */ >>> + info->image.image_size = effective_size; >> >> ... this looks to suggest something .bss-like. > > Yes, effective_size it is size which included .bss. > > size it of LK after decompression of Image.gz and it doesn't include > .bss so it should be lesser then effective_size. > > I don't think that I am in trouble that effective_size is bigger then > size if we allocate enough space in memory effective_size is fine to be > bigger. > > It is a good question if effective_size < size is a problem. I think it > isn't but could it be really happen? A kernel image (file) could have data appended to it, e.g. a certificate. With only small .bss that certificate could end up larger than the .bss size, and hence effective_size < size. > I think that I am okay to drop that part of if(). Please do, unless there is a(nother) reason to have it. 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The order of evaluation of function arguments is > >> in principle unspecified; in practice at least gcc looks to be evaluating > >> them from last to first. Hence with NOW() invoked first, the respective > >> value passed to do_settime() can be off by over a second (which is in > >> contrast to __get_cmos_time() attempting to get the time exactly after an > >> update, i.e. [pretty] precisely at a seconds boundary). > >> > >> This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > >> and its persistent side-effects shall be the same under all permitted > >> evaluation orders") violation each. > >> > >> Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > >> Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > >> Signed-off-by: Jan Beulich > >> --- > >> Of course the time it takes to do all the CMOS reads (or whichever else > >> wallclock time source is in use) also results in an inaccuracy. For > >> __get_cmos_time() this might be solvable by having it latch NOW() before > >> doing the 6 reads, but in particular for efi_get_time() there's hardly > >> anything we can do. > >> > >> As to Misra rule 13.2: tagging.ecl lists the rule as clean. I also can't > >> find any deviation for the two instances fixed here. What am I missing? > >> > >> For __get_cmos_time(), tangentially: Wouldn't we better use the > >> century byte if available? As it stands, things will break in 2070. Which > >> is a long way out, yes, but still. (Of course this would mean a 7th slow > >> I/O port write/read pair.) > > > > Seems fine to me. > > I'll make a patch, provided I can figure out under what conditions the byte > is present / valid (hopefully that won't involve ACPI AML). It's in the ACPI FADT table AFAIK. > > One further note: in __get_cmos_time() I think we want to read > > backwards, so start with century then year and so on, so the last read > > is seconds, as to avoid extra skew. > > I don't think this matters. It would be awkward if those reads took over a > second. Plus if it did, the UIP flag would transiently be set, in which > case doing the reads wouldn't be valid in the first place. Arguably this > can in principle happen if a SMI hits in the middle, and its handling > takes excessively long. Oh, I see, indeed. Thanks, Roger. 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mod->size : 0, >>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>> >> >>> Why would modules need to be this strongly aligned? >> No specific reason except to be aligned with similar alignment below, it >> could be lesser (PAGE_SIZE or even just unsigned long aligned) or even >> dropped, I think. It was just easier then to calculate aligned >> addresses. But I don't see any big issue to have such alignments except >> maybe that it will waste some memory. > > Or result in there not being enough memory to hold everything. Do you prefer than not to have alignment at all? > >>>> + /* >>>> + * Place modules as high in RAM as possible, scanning banks from >>>> + * last to first so that the end of the last bank is preferred. >>>> + */ >>>> + while ( bi-- > 0 ) >>>> + { >>>> + const struct membank *bank = &banks->bank[bi]; >>>> + const paddr_t bank_end = bank->start + bank->size; >>>> + paddr_t modbase; >>>> + >>>> + if ( modsize > bank->size ) >>>> + continue; >>>> + >>>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>> >>> Same question here. >> >> I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be >> potentially used in page table. > > I fear I'm lost. All the modules are temporary entities, aren't they? They are temporary entities but they should be copied to guest memory, right? So ioremap() should be called for paddr where module is located and so at least less cycles will be needed to add entries to Xen page tables. I don't know if it makes sense to have such type of optimizations. If not then probably we don't need alignment here too. I don't see at the moment any alignment requirements for initrd and dtb. The only theoretical reason why at least for dtb we need requirement is that what Arm mentioned in its booting.rst: The device tree blob (dtb) must be placed on an 8-byte boundary and must not exceed 2 megabytes in size. Since the dtb will be mapped cacheable using blocks of up to 2 megabytes in size, it must not be placed within any 2M region which must be mapped with any specific attributes. It likely should be true for RISC-V as I assume this part was copied from Arm port. On other side it doesn't mentioned explicitly in boot.rst of RISC-V in LK. > >>>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>>> + (modbase + modsize > kernbase) ) >>>> + { >>>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>> >>> What prevents this subtraction from underflowing? >> >> I will put the following check at the start of the place_modules() function: >> if ( kernbase < modsize ) >> panic("Underflow could happen between kernbase and modsize\n"); > > Wait - why would this be a legitimate condition to panic? It is legitimate to panic() as common API which leads to place_module() has void in its return type (what should be changed in future, I have this in TODO) and so if something is going wrong in place_module() there is not better option except panic() for now. But generally i think it was too much to panic and it would be just better to put: if ( kernbase < modsize ) continue; above modbase = ROUNDDOWN(...) so it will just put modules in different bank. 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While there remove the unlikely(), this is not a hot path anyway. No functional change, as there are no current callers that pass force == true. Signed-off-by: Roger Pau Monné Acked-by: Jan Beulich --- xen/drivers/passthrough/amd/iommu_init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..76ae78e5ea53 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -929,13 +929,13 @@ static void enable_iommu(struct amd_iommu *iommu) amd_iommu_flush_all_caches(iommu); } -static void disable_iommu(struct amd_iommu *iommu) +static void disable_iommu(struct amd_iommu *iommu, bool force) { unsigned long flags; spin_lock_irqsave(&iommu->lock, flags); - if ( unlikely(!iommu->enabled) ) + if ( !iommu->enabled && !force ) goto out; if ( !iommu->ctrl.int_cap_xt_en ) @@ -1139,7 +1139,7 @@ static void __init amd_iommu_init_cleanup(void) iommu->ctrl.int_cap_xt_en = 0; if ( iommu->enabled ) - disable_iommu(iommu); + disable_iommu(iommu, false); else if ( iommu->mmio_base ) writeq(iommu->ctrl.raw, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); @@ -1584,7 +1584,7 @@ void cf_check amd_iommu_crash_shutdown(void) struct amd_iommu *iommu; for_each_amd_iommu ( iommu ) - disable_iommu(iommu); + disable_iommu(iommu, false); } void cf_check amd_iommu_resume(void) @@ -1598,7 +1598,7 @@ void cf_check amd_iommu_resume(void) * To make sure that iommus have not been touched * before re-enablement */ - disable_iommu(iommu); + disable_iommu(iommu, false); enable_iommu(iommu); if ( !iommu->features.flds.ia_sup ) invalidate_all = false; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 13:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 13:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301764.1575965 (Exim 4.92) (envelope-from ) id 1wKcjd-0004tB-5n; Wed, 06 May 2026 13:56:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301764.1575965; Wed, 06 May 2026 13:56:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjd-0004t2-1L; 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We don't know what registers might be there, nor which values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region does put the IOMMU in a broken state, which is not recoverable by the IOMMU initialization procedure in Xen. Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold map_iommu_mmio_region() into it's only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- Changes since v1: - Zero the control register after calling disable_iommu(). - Print a warning message if the IOMMU is handed enabled to Xen from firmware. - Fix commit log grammar issues. --- xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- 1 file changed, 17 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index 76ae78e5ea53..ffc041211fb5 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* Read current control register and forcefully disable the IOMMU. */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + if ( iommu->ctrl.iommu_en ) + printk(XENLOG_WARNING + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", + &iommu->sbdf, iommu->ctrl.raw); + disable_iommu(iommu, true); + + /* With the IOMMU disabled zero the control register. */ + iommu->ctrl.raw = 0; + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 13:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 13:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301761.1575947 (Exim 4.92) (envelope-from ) id 1wKcjV-0004QM-JK; Wed, 06 May 2026 13:56:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301761.1575947; Wed, 06 May 2026 13:56:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjV-0004QF-Fc; Wed, 06 May 2026 13:56:13 +0000 Received: by outflank-mailman (input) for mailman id 1301761; Wed, 06 May 2026 13:56:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcjT-0004Q9-Fo for xen-devel@lists.xenproject.org; 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From: Roger Pau Monne To: xen-devel@lists.xenproject.org Cc: Roger Pau Monne , Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: [PATCH v2 0/2] iommu/amd-vi: remove zeroing of MMIO region Date: Wed, 6 May 2026 15:55:12 +0200 Message-ID: <20260506135514.47310-1-roger.pau@citrix.com> X-Mailer: git-send-email 2.53.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: MR1P264CA0164.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:55::15) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|BY5PR03MB5064:EE_ X-MS-Office365-Filtering-Correlation-Id: b4a54b7c-be1e-4ff5-8781-08deab773825 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|366016|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: l1Rb7onEzjtHT2uObgiM7/OI8aGg5ZGcJUQr1UOa72S4xpegeBNZEs0SncbwaHY7ao+p1BzqQ5Fxw2RZk/TTrQZgv6Ng8KNRoTpe1Ynphq5hZx2tCMOUNF93VcCWKZK09yJtEK3Bi2E3BhYIQAArWWH2KOl2ChmuZJDim9gQBL7GKwvJM1LiCRxQcIwYdTVdTF3SY+Rbj1HyhOYqBHxYMi3avva10oY+9CnHDSeu4AK+IDzRtYlzfPeC3Ul0xbwY7GZ3jJIBisyqh62m58+clXBiINpICF/iWTUxNETbRjDRcXwqzd8tyn540D5acCPbx2m8OYfrxHN5MilOUBlgJX2pIWoRbCzFaXDk1YPVSpWRTcjuFuTVjFJzS+NeTJ4ivMefvammkrqtvmfeODW8tIaCZqLW7PfAGcmLJmiC/KIfliYbVzNnqpBjj1p+VR6/XUZR+5NoccC9UHrFmPYq6HJp9KsbU5gWeXcpRscTrVfF8hLUT8DiBWQ4hKWb3VIf9mRZMbdEyEGpIuHu0Iqyr8VysrEOAVqSjEe/Pa9cwN5pZ2dLBtzk0RiReAL+NLMflW/IRnnVKZhJt5IaKlHUQX30n2Yt4ET67pDNMTyuEOnA58FVFph6n0dmxRNHhfVhKrxS59csCK+OLDtMNQGQgYos+7aNPalB258JFcQBTSq18uYMqwSxotekgz2xmFZm X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(1800799024)(366016)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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Get rid of the zeroing, and instead attempt to disable the IOMMU ahead of enabling it. Thanks, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778076178-3A378938-60E46E77/0/0 X-purgate-type: clean X-purgate-size: 4953 On 06.05.2026 15:43, Oleksii Kurochko wrote: > On 5/6/26 2:45 PM, Jan Beulich wrote: >> On 06.05.2026 13:57, Oleksii Kurochko wrote: >>> On 5/4/26 4:05 PM, Jan Beulich wrote: >>>> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>>>> --- /dev/null >>>>> +++ b/xen/arch/riscv/kernel.c >>>>> @@ -0,0 +1,242 @@ >>>>> +/* SPDX-License-Identifier: GPL-2.0-only */ >>>>> + >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> +#include >>>>> + >>>>> +#include >>>>> + >>>>> +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ >>>>> + >>>>> +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, >>>>> + paddr_t kernend) >>>>> +{ >>>>> + const struct boot_module *mod = info->bd.initrd; >>>>> + const struct membanks *banks = kernel_info_get_mem_const(info); >>>>> + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, >>>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>>> + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), >>>>> + KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>> >>>> Why would modules need to be this strongly aligned? >>> No specific reason except to be aligned with similar alignment below, it >>> could be lesser (PAGE_SIZE or even just unsigned long aligned) or even >>> dropped, I think. It was just easier then to calculate aligned >>> addresses. But I don't see any big issue to have such alignments except >>> maybe that it will waste some memory. >> >> Or result in there not being enough memory to hold everything. > > Do you prefer than not to have alignment at all? Some minimal alignment (like to machine word size) may be helpful, for copying to be more efficient. There may also be reasons to use page alignment (e.g. if the pages were to be assigned directly to the domains, without any copying, as we do for PV Dom0 under certain conditions on x86). That in turn may even justify super-page alignment. >>>>> + /* >>>>> + * Place modules as high in RAM as possible, scanning banks from >>>>> + * last to first so that the end of the last bank is preferred. >>>>> + */ >>>>> + while ( bi-- > 0 ) >>>>> + { >>>>> + const struct membank *bank = &banks->bank[bi]; >>>>> + const paddr_t bank_end = bank->start + bank->size; >>>>> + paddr_t modbase; >>>>> + >>>>> + if ( modsize > bank->size ) >>>>> + continue; >>>>> + >>>>> + modbase = ROUNDDOWN(bank_end - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>>> Same question here. >>> >>> I used KERNEL_LOAD_ADDR_ALIGNMENT to be sure that big page tables be >>> potentially used in page table. >> >> I fear I'm lost. All the modules are temporary entities, aren't they? > > They are temporary entities but they should be copied to guest memory, > right? > > So ioremap() should be called for paddr where module is located and so > at least less cycles will be needed to add entries to Xen page tables. Okay, that would be a small win in time for perhaps a boot failure when the modules would fit in memory if they weren't this heavily aligned. You're judgement, but please whatever higher-than-expected alignment you decide to use, please comment upon this. >>>>> + if ( (modbase < ROUNDUP(kernend, KERNEL_LOAD_ADDR_ALIGNMENT)) && >>>>> + (modbase + modsize > kernbase) ) >>>>> + { >>>>> + modbase = ROUNDDOWN(kernbase - modsize, KERNEL_LOAD_ADDR_ALIGNMENT); >>>> >>>> What prevents this subtraction from underflowing? >>> >>> I will put the following check at the start of the place_modules() function: >>> if ( kernbase < modsize ) >>> panic("Underflow could happen between kernbase and modsize\n"); >> >> Wait - why would this be a legitimate condition to panic? > > It is legitimate to panic() as common API which leads to place_module() > has void in its return type (what should be changed in future, I have > this in TODO) and so if something is going wrong in place_module() there > is not better option except panic() for now. Feels like you're mixing two things here. I didn't ask whether panic() was appropriate to use here, but whether the condition is one upon which panic()ing is the only option (right now). And voila, ... > But generally i think it was too much to panic and it would be just > better to put: > if ( kernbase < modsize ) > continue; > above modbase = ROUNDDOWN(...) so it will just put modules in different > bank. ... looks like the situation can be handled without panic(). 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778076215-23B78C48-880476FE/10/73395122804 X-purgate-type: spam X-purgate-size: 6933 On 5/4/26 4:23 PM, Jan Beulich wrote: > On 28.04.2026 16:33, Oleksii Kurochko wrote: >> --- /dev/null >> +++ b/xen/arch/riscv/dom0less-build.c >> @@ -0,0 +1,70 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only */ >> + >> +#include >> +#include >> +#include >> + >> +#include >> + >> +int __init arch_parse_dom0less_node(struct dt_device_node *node, >> + struct boot_domain *bd) >> +{ >> + const char *mmu_type; >> + unsigned long bits; >> + const char *end; >> + >> + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) >> + { >> + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " >> + "node. %s will be used as fallback\n", max_gstage_mode->name); >> + >> + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); >> + >> + goto out; >> + } >> + >> + if ( !strcasecmp(mmu_type, "riscv,none") ) >> + { >> + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); >> + >> + return -EOPNOTSUPP; >> + } >> + >> + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) >> + { >> + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); >> + >> + return -EINVAL; >> + } >> + >> + bits = simple_strtoul(mmu_type + 8, &end, 10); >> + if ( (*end != '\0') || (end == mmu_type + 8) ) >> + { >> + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); >> + >> + return -EINVAL; >> + } >> + >> + out: >> + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) >> + { >> + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); >> + >> + return -EINVAL; >> + } >> + /* >> + * The correct value of bits will be checked in p2m_init() by call of >> + * find_gstage_mode_by_bits(). >> + * >> + * As mmu-type property contains one of string: >> + * - riscv,sv32 >> + * - riscv,sv39 >> + * - riscv,sv48 >> + * - riscv,sv57 > > Or about any other riscv,sv with N up to somewhere around 250. I see > that ... > >> + * it is needed to add '+P2M_ROOT_EXTRA_BITS' as for G-stage mode GPAs >> + * are extended by P2M_ROOT_EXTRA_BITS. >> + */ >> + bd->create_cfg.arch.gstage_addr_bits = bits + P2M_ROOT_EXTRA_BITS; > > ... the value calculated here is later checked for validity, so it's > really only the comment which may want clarifying a little. I will update the comment to: /* * The mmu-type property may specify any riscv,sv string, but only the * following are currently supported: * - riscv,sv32 * - riscv,sv39 * - riscv,sv48 * - riscv,sv57 * Any other value will be rejected by find_gstage_mode_by_bits(). * * P2M_ROOT_EXTRA_BITS is added because for G-stage mode, GPAs are * extended by that many bits. */ > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -45,12 +45,27 @@ struct p2m_pte_ctx { >> unsigned int level; /* Paging level at which the PTE resides. */ >> }; >> >> -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { >> - .mode = HGATP_MODE_OFF, >> - .paging_levels = 0, >> - .name = "Bare", >> +/* Values should be sorted by ->mode in this array */ >> +static const struct gstage_mode_desc gstage_modes[] = { >> + /* >> + * Based on the RISC-V spec: >> + * Bare mode is always supported, regardless of SXLEN. >> + * When SXLEN=32, the only other valid setting for MODE is Sv32. >> + * When SXLEN=64, three paged virtual-memory schemes are defined: >> + * Sv39, Sv48, and Sv57. >> + */ >> + { HGATP_MODE_OFF, 0, "none" }, >> +#ifdef CONFIG_RISCV_32 >> + { HGATP_MODE_SV32X4, 1, "sv32" }, >> +#else >> + { HGATP_MODE_SV39X4, 2, "sv39" }, >> + { HGATP_MODE_SV48X4, 3, "sv48" }, >> + { HGATP_MODE_SV57X4, 4, "sv57" }, >> +#endif >> }; >> >> +const struct gstage_mode_desc * __ro_after_init max_gstage_mode = &gstage_modes[0]; > > Nit: Overlong line (and, strictly speaking, a stray blank after *). I will put "&gstage_modes[0];" on next line. > >> @@ -331,8 +324,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) >> return 0; >> } >> >> -int p2m_init(struct domain *d) >> +static const struct gstage_mode_desc *find_gstage_mode_by_bits( > > Is "_by_bits" adding much value to the function name? Especially ... > >> + unsigned char gpa_bits) > > ... seeing that the parameter name is making things pretty clear? Maybe not too much, I will drop that. > >> +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) >> { >> + /* >> + * TODO: This static is a temporary constraint: all guests must use the >> + * same MMU mode because p2m_gpa_bits is not yet per-domain. >> + * Drop this once per-domain p2m_gpa_bits is introduced. >> + */ >> + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; >> struct p2m_domain *p2m = p2m_get_hostp2m(d); >> >> /* >> @@ -341,6 +361,33 @@ int p2m_init(struct domain *d) >> */ >> p2m->domain = d; >> >> + if ( !config ) >> + { >> + dprintk(XENLOG_ERR, "NULL config is passed\n"); >> + return -EINVAL; >> + } >> + >> + p2m->mode = find_gstage_mode_by_bits(config->arch.gstage_addr_bits); >> + >> + if ( !p2m->mode ) >> + { >> + dprintk(XENLOG_ERR, >> + "Unsupported or unavailable gstage addr bits: %u\n", >> + config->arch.gstage_addr_bits); >> + >> + return -EINVAL; >> + } >> + >> + if ( m->mode == HGATP_MODE_OFF ) >> + m = p2m->mode; >> + >> + if ( m->mode != p2m->mode->mode ) > > Since m always points into gstage_modes[], do you really need the extra > indirection to compare the two ->mode fields? You could simply compare > the pointers, couldn't you? Agree, just "if ( m != p2m->mode )" will work. > >> --- a/xen/include/public/arch-riscv.h >> +++ b/xen/include/public/arch-riscv.h >> @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; >> DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); >> >> struct xen_arch_domainconfig { >> + /* >> + * G-stage GPA address width in bits. >> + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). >> + */ >> + unsigned char gstage_addr_bits; > > Fixed-width types only in the public interface please. I will use uint8_t then. > > Also, isn't the field effectively describing the maximum width of a > guest (physical) address? In which case - simply gaddr_bits? gaddr_bits would be okay in this case. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 14:07:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 14:07:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301807.1575992 (Exim 4.92) (envelope-from ) id 1wKcuC-0008TP-JV; Wed, 06 May 2026 14:07:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301807.1575992; Wed, 06 May 2026 14:07:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcuC-0008TI-GL; Wed, 06 May 2026 14:07:16 +0000 Received: by outflank-mailman (input) for mailman id 1301807; Wed, 06 May 2026 14:07:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKcuA-0008Rf-Aa for xen-devel@lists.xenproject.org; Wed, 06 May 2026 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If not - use size_t or unsigned long here? It seems like we want to have uint64_t as it is explicitly mentioned in image header: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57 and also it is used .dword here: https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 06 15:00:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 15:00:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301852.1576009 (Exim 4.92) (envelope-from ) id 1wKdje-0000oP-Ew; Wed, 06 May 2026 15:00:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301852.1576009; Wed, 06 May 2026 15:00:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKdje-0000oI-Bk; Wed, 06 May 2026 15:00:26 +0000 Received: by outflank-mailman (input) for mailman id 1301852; Wed, 06 May 2026 15:00:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKdjd-0000oA-D6 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 15:00:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKdjc-00GYbg-Oz for xen-devel@lists.xenproject.org; Wed, 06 May 2026 17:00:24 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fb5788-e002-0a2a0a5209dd-0a2a450197f0-6 for ; Wed, 06 May 2026 17:00:24 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fb5788-c1f2-0a2a45010019-d155dd35b926-3 for ; Wed, 06 May 2026 17:00:24 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-44a786a9a35so3662401f8f.3 for ; Wed, 06 May 2026 08:00:24 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <082f5c79-0cf9-4eef-b80c-e5e9b594576d@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778079624-B6342FF4-290BCCCC/0/0 X-purgate-type: clean X-purgate-size: 1640 On 06.05.2026 16:53, Oleksii Kurochko wrote: > > > On 5/4/26 4:05 PM, Jan Beulich wrote: >>> --- a/xen/include/xen/fdt-kernel.h >>> +++ b/xen/include/xen/fdt-kernel.h >>> @@ -59,8 +59,15 @@ struct kernel_info { >>> struct { >>> paddr_t kernel_addr; >>> paddr_t len; >>> -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) >>> - paddr_t text_offset; /* 64-bit Image only */ >>> +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) >>> + /* >>> + * ARM: 64-bit Image only. >>> + * RISC-V: both 32-bit and 64-bit Images. >>> + */ >>> + paddr_t text_offset; >>> +#endif >>> +#if defined(CONFIG_RISCV) >>> + uint64_t image_size; /* Effective size of Image */ >> As this (apparently) is for both RV64 and RV32 - can the latter really have >> wider than 32-bit image sizes? If not - use size_t or unsigned long here? > > It seems like we want to have uint64_t as it is explicitly mentioned in > image header: > > https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/include/asm/image.h#L57 > > and also it is used .dword here: > > https://elixir.bootlin.com/linux/v7.0.1/source/arch/riscv/kernel/head.S#L55 Well. The image header having a 64-bit wide field still raises the question how the value being wider than 32 bits would work on RV32. IOW for Xen internal purposes I expect unsigned long or size_t would be more appropriate. When that value is taken from the image header and copied into the internal struct, it would need checking for absence of truncation. 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Replace the ARM-specific macro in asm/domain.h with a common >> static inline in a new dedicated header, xen/domain-layout.h. >> >> xen/domain.h would be the natural home, but placing it there would >> require including xen/paging.h (for paging_mode_translate()) and >> xen/sched.h (for is_hardware_domain()), which would introduce circular >> dependencies. A separate header that callers opt into avoids this. >> >> Adjust the implementation to take paging_mode_translate() into account >> so it works correctly for all architectures, including x86. Some extra >> details about implementation [2] and [3]. >> >> [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ >> [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ >> [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ >> >> Suggested-by: Stefano Stabellini >> Signed-off-by: Oleksii Kurochko > > With the SPDX tag added as indicated by Luca: > Acked-by: Jan Beulich Thanks. > > One further minor remark: > >> --- /dev/null >> +++ b/xen/include/xen/domain-layout.h >> @@ -0,0 +1,27 @@ >> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >> +#define __XEN_DOMAIN_LAYOUT_H__ >> + >> +#include > > This isn't really needed. It is ... > >> +#include >> +#include > > ... included by this one anyway (pretty much unavoidably right now, I > guess). Then it will be needed to re-order them. Do you want to put the comment above xen/sched.h: /* * Ensure xen/sched.h is included before xen/paging.h, since paging.h depends * on xen/domain.h, which is pulled in via sched.h. */ #include #include or just add this to commit message instead? ~ Oleksii > > Jan From xen-devel-bounces@lists.xenproject.org Wed May 06 16:19:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:19:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301913.1576031 (Exim 4.92) (envelope-from ) id 1wKexX-0003a7-AC; Wed, 06 May 2026 16:18:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301913.1576031; Wed, 06 May 2026 16:18:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKexX-0003a0-7V; Wed, 06 May 2026 16:18:51 +0000 Received: by outflank-mailman (input) for mailman id 1301913; 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b=cPWDANbQhwnKfNsG/LgP03iAOONmWzKZ9e/jbariFsxeD1PwDVF8vnuiqPGJv5SyPsz2wzIrNzd55L1yca4oEF1yxPB9rUVq1ykrB0M2WEDn9aEoPCNExD5u+JjmtC4ZRmobHiNIKvoWFHl+hxq6eOFcbBo7SDW8VHA6KPS8pDo= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Date: Wed, 6 May 2026 17:18:40 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506135514.47310-1-roger.pau@citrix.com> <20260506135514.47310-3-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506135514.47310-3-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, nor which Sorry, one more.  "We don't know which registers might". > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold > map_iommu_mmio_region() into it's only caller, as the function body is just > an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné > --- > Changes since v1: > - Zero the control register after calling disable_iommu(). > - Print a warning message if the IOMMU is handed enabled to Xen from > firmware. > - Fix commit log grammar issues. > --- > xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- > 1 file changed, 17 insertions(+), 14 deletions(-) > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > index 76ae78e5ea53..ffc041211fb5 100644 > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > return iommu->ht_flags & mask; > } > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > -{ > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > - IOMMU_MMIO_REGION_LENGTH); > - if ( !iommu->mmio_base ) > - return -ENOMEM; > - > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > - > - return 0; > -} > - > static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) > { > if ( iommu->mmio_base ) > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > { > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > - if ( !rc ) > - rc = map_iommu_mmio_region(iommu); > if ( rc ) > return rc; > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > + IOMMU_MMIO_REGION_LENGTH); > + if ( !iommu->mmio_base ) > + return -ENOMEM; > + > get_iommu_features(iommu); > > /* > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > return -ERANGE; > > + /* Read current control register and forcefully disable the IOMMU. */ > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + if ( iommu->ctrl.iommu_en ) > + printk(XENLOG_WARNING > + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", > + &iommu->sbdf, iommu->ctrl.raw); > + disable_iommu(iommu, true); > + > + /* With the IOMMU disabled zero the control register. */ > + iommu->ctrl.raw = 0; > + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > + > return 0; > } > I don't think calling disable_iommu() is a good thing here. It's just a cascade of clearing one/few bits in ctrl at a time, but is is added unconditionally so that's 5 UC stores writing 0's to the same register in the common case. I think this logic wants to be: @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu)      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode )          return -ERANGE;   +    /* Check if the IOMMU is active, and disable. */ +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); +    if ( iommu->ctrl.iommu_en ) +    { +        printk(XENLOG_WARNING +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", +               &iommu->sbdf, iommu->ctrl.raw); + +        iommu->ctrl.raw = 0; +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); +    } +      return 0;  }   which has the advantage that it's closer to the current behaviour, and therefore arguably a safer backport. The only thing that disable_iommu() does which isn't editing the control register is playing with the PCI MSI enable bit, but that really doesn't matter when we clear ctrl.int_cap_xt_en.  (And in fact, that path is buggy because it clears MSI enable without inhibiting interrupt generation, which architecturally will turn into legacy line interrupt to deal with.) We're just about to re-set everything up, so everything's going to get re-enabled. In the commit message, I think it's worth highlighting that zeroing the control register is the current behaviour, and this will need revisiting in order to support Preboot DMA Protection. Or alternatively, would you like me to submit a patch?  (Happy either way.) ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 06 16:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301939.1576053 (Exim 4.92) (envelope-from ) id 1wKf9g-0006R9-Fp; Wed, 06 May 2026 16:31:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301939.1576053; Wed, 06 May 2026 16:31:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKf9g-0006R2-Bw; Wed, 06 May 2026 16:31:24 +0000 Received: by outflank-mailman (input) for mailman id 1301939; Wed, 06 May 2026 16:31:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKf9e-0006Qe-HV for xen-devel@lists.xenproject.org; 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Date: Wed, 6 May 2026 18:31:15 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Andrew Cooper Cc: xen-devel@lists.xenproject.org, Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] iommu/amd-vi: do not zero IOMMU MMIO region Message-ID: References: <20260506135514.47310-1-roger.pau@citrix.com> <20260506135514.47310-3-roger.pau@citrix.com> <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> X-ClientProxiedBy: MA3P292CA0052.ESPP292.PROD.OUTLOOK.COM (2603:10a6:250:48::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SAWPR03MB989156:EE_ X-MS-Office365-Filtering-Correlation-Id: a0d96647-ae0e-4eb9-27be-08deab8ce6a8 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|56012099003|18002099003|22082099003; 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We don't know what registers might be there, nor which > > Sorry, one more.  "We don't know which registers might". > > > values might be safe for those registers. On a forthcoming platform doing > > the zeroing of the MMIO region does put the IOMMU in a broken state, which > > is not recoverable by the IOMMU initialization procedure in Xen. > > > > Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold > > map_iommu_mmio_region() into it's only caller, as the function body is just > > an ioremap() call after the removal of the memset(). > > > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > > Signed-off-by: Roger Pau Monné > > --- > > Changes since v1: > > - Zero the control register after calling disable_iommu(). > > - Print a warning message if the IOMMU is handed enabled to Xen from > > firmware. > > - Fix commit log grammar issues. > > --- > > xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- > > 1 file changed, 17 insertions(+), 14 deletions(-) > > > > diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c > > index 76ae78e5ea53..ffc041211fb5 100644 > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > > return iommu->ht_flags & mask; > > } > > > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > > -{ > > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > - IOMMU_MMIO_REGION_LENGTH); > > - if ( !iommu->mmio_base ) > > - return -ENOMEM; > > - > > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > > - > > - return 0; > > -} > > - > > static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) > > { > > if ( iommu->mmio_base ) > > @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > { > > int rc = alloc_ivrs_mappings(iommu->sbdf.seg); > > > > - if ( !rc ) > > - rc = map_iommu_mmio_region(iommu); > > if ( rc ) > > return rc; > > > > + iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > + IOMMU_MMIO_REGION_LENGTH); > > + if ( !iommu->mmio_base ) > > + return -ENOMEM; > > + > > get_iommu_features(iommu); > > > > /* > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) > > if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) > > return -ERANGE; > > > > + /* Read current control register and forcefully disable the IOMMU. */ > > + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + if ( iommu->ctrl.iommu_en ) > > + printk(XENLOG_WARNING > > + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", > > + &iommu->sbdf, iommu->ctrl.raw); > > + disable_iommu(iommu, true); > > + > > + /* With the IOMMU disabled zero the control register. */ > > + iommu->ctrl.raw = 0; > > + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > > + > > return 0; > > } > > > > I don't think calling disable_iommu() is a good thing here. > > It's just a cascade of clearing one/few bits in ctrl at a time, but is > is added unconditionally so that's 5 UC stores writing 0's to the same > register in the common case. The approach to use disable_iommu() is because that's closer to what Linux does in iommu_disable(), which seems to explicitly disable one feature at a time instead of writing zero to the command register in one go. I've been cautious in taking the same approach on Xen. I don't mind doing a plain write of 0, let me test to ensure this is OK. > I think this logic wants to be: > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >          return -ERANGE; >   > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +    { > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +        iommu->ctrl.raw = 0; > +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    } In your snippet above, I think we want to unconditionally set iommu->ctrl.raw = 0, and also propagate that 0 to the register, otherwise we will inherit set bits from whatever is currently in the control register: > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +    iommu->ctrl.raw = 0; > +    writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); Thanks, Roger. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="j8Y+pyk47lYf6y1a" Content-Disposition: inline In-Reply-To: <20260506135514.47310-1-roger.pau@citrix.com> X-purgate-ID: tlsNG-d62444/1778086194-AD5AFFF4-42852402/0/0 X-purgate-type: clean X-purgate-size: 1949 --j8Y+pyk47lYf6y1a Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Wed, 6 May 2026 18:49:47 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Roger Pau Monne Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 0/2] iommu/amd-vi: remove zeroing of MMIO region On Wed, May 06, 2026 at 03:55:12PM +0200, Roger Pau Monne wrote: > Hello, >=20 > Unconditionally zeroing the whole IOMMU MMIO region is dangerous, at > least on an upcoming platform this does put the IOMMU in a broken state > that's not recoverable by the init procedure in Xen. >=20 > Get rid of the zeroing, and instead attempt to disable the IOMMU ahead > of enabling it. Just to mention it here, while this looks like a step in the right direction, even better would be to not disable IOMMU at boot, but reconfigure it - to preserve uninterrupted protection when boot time DMA protection is enabled in firmware. But that's definitely more work... --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --j8Y+pyk47lYf6y1a Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmn7cSwACgkQ24/THMrX 1yyZxQf8CUJvMP7I1sv1PMxXjTsfAkxSupuMPirems1yZ7ya/Qq6eUBU5MSAVO6E 1INLuyh3xsdiXHkVWZEN58ugv/G7S00FrBcjQs0qjZlYRgLdkZJGtBsDEyszbHzW x3y8STslRt7A6091KHjQwfbUK2ft0tOJVcxQRGipIhQYyDyQh1CRE4FWFgHEGiDc P6+jF3guzNBskqtnt2dUQL2YxGH7wh4Os6oDEIwqDMlozH1eQP2SPSTU1w3sgi+r QOlGHAjrMwLtKR/+YzagBuImky9XAmkbWRX4thHiWIDNSp/h4qq8JanlUdATBgd4 ul18mLA1eUVeYh6JrAO8x2KqY5Hz6w== =6TDJ -----END PGP SIGNATURE----- --j8Y+pyk47lYf6y1a-- From xen-devel-bounces@lists.xenproject.org Wed May 06 16:52:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:52:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301967.1576071 (Exim 4.92) (envelope-from ) id 1wKfTv-0001iX-AW; Wed, 06 May 2026 16:52:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301967.1576071; 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We don't know what registers might be there, nor which values might be safe for those registers. On a forthcoming platform doing the zeroing of the MMIO region does put the IOMMU in a broken state, which is not recoverable by the IOMMU initialization procedure in Xen. Instead just zero the control register, which mimics the current behavior with regards to how the control register is handled, and ensures the IOMU setup is done with the unit disabled. This approach will need revisiting in order to support Preboot DMA Protection. Fold map_iommu_mmio_region() into its only caller, as the function body is just an ioremap() call after the removal of the memset(). Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") Signed-off-by: Roger Pau Monné --- Changes since v2: - Avoid the disable_iommu() dance. - Expand commit message a bit. Changes since v1: - Zero the control register after calling disable_iommu(). - Print a warning message if the IOMMU is handed enabled to Xen from firmware. - Fix commit log grammar issues. --- xen/drivers/passthrough/amd/iommu_init.c | 33 ++++++++++++++---------- 1 file changed, 19 insertions(+), 14 deletions(-) diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c index d77dd8511288..e0c8925c33f7 100644 --- a/xen/drivers/passthrough/amd/iommu_init.c +++ b/xen/drivers/passthrough/amd/iommu_init.c @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) return iommu->ht_flags & mask; } -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) -{ - iommu->mmio_base = ioremap(iommu->mmio_base_phys, - IOMMU_MMIO_REGION_LENGTH); - if ( !iommu->mmio_base ) - return -ENOMEM; - - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); - - return 0; -} - static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) { if ( iommu->mmio_base ) @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) { int rc = alloc_ivrs_mappings(iommu->sbdf.seg); - if ( !rc ) - rc = map_iommu_mmio_region(iommu); if ( rc ) return rc; + iommu->mmio_base = ioremap(iommu->mmio_base_phys, + IOMMU_MMIO_REGION_LENGTH); + if ( !iommu->mmio_base ) + return -ENOMEM; + get_iommu_features(iommu); /* @@ -1381,6 +1372,20 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) return -ERANGE; + /* + * Check whether the IOMMU is already enabled and unconditionally disable + * it (zero the control register) ahead of Xen setup. Needs to be + * revisited to support Preboot DMA Protection. + */ + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + if ( iommu->ctrl.iommu_en ) + printk(XENLOG_WARNING + "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", + &iommu->sbdf, iommu->ctrl.raw); + + iommu->ctrl.raw = 0; + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); + return 0; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 06 16:54:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 16:54:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1301975.1576081 (Exim 4.92) (envelope-from ) id 1wKfVh-0002Dt-Lo; Wed, 06 May 2026 16:54:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1301975.1576081; Wed, 06 May 2026 16:54:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKfVh-0002Dm-Hw; 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b=YWbs2Y2eW2/rR3VMej3GeilvLNQcKyAzZkXpzsDHXgtBu00iEdEfD0vajTkaFn/ZeP9Jvlz0OnXWSzym8WyZqKn3MxeRKaRk8VxqJZDGeaVl52cD5hGG3PfFbj6CyZuOSwpXLT9b/56fgaZhcbOuCzZuA5SGAjdjznG+NgzZfXQ= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: Date: Wed, 6 May 2026 17:53:57 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v3] iommu/amd-vi: do not zero IOMMU MMIO region To: Roger Pau Monne , xen-devel@lists.xenproject.org References: <20260506165157.68567-1-roger.pau@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260506165157.68567-1-roger.pau@citrix.com> Content-Type: text/plain; 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We don't know what registers might be there, nor which what->which > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead just zero the control register, which mimics the current behavior > with regards to how the control register is handled, and ensures the IOMU > setup is done with the unit disabled. This approach will need revisiting > in order to support Preboot DMA Protection. > > Fold map_iommu_mmio_region() into its only caller, as the function body is > just an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné Reviewed-by: Andrew Cooper Thanks. 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But that's definitely more work... Yes, we are aware of this. But IMO booting with the IOMMU enabled will be a new feature, this is strictly a fix that we can "safely" backport to stable branches to deal with broken hardware. Thanks, Roger. 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So to confirm - does amd_pmc_probe work properly with this series now? > > Root cause > ========== > > To prevent each dom0 vCPU from looking like an SMT sibling of another > vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every > vCPU's APIC ID by 2 can push the synthesized IDs past the package-field > boundary. Linux then infers more "packages" and therefore more AMD > nodes via amd_num_nodes() than the platform actually has, while the > PCI-side host-bridge scan correctly reports the number of root complex. > > The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of > linux-next/master (next-20260505). > > Penny Zheng (2): > x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 > x86/amd_node: reject SMN access when amd_smn_init() did not complete > > arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- > 1 file changed, 20 insertions(+), 3 deletions(-) > From xen-devel-bounces@lists.xenproject.org Wed May 06 20:59:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 20:59:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302065.1576115 (Exim 4.92) (envelope-from ) id 1wKjKc-0001V9-PE; Wed, 06 May 2026 20:58:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302065.1576115; Wed, 06 May 2026 20:58:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKjKc-0001V1-KX; Wed, 06 May 2026 20:58:58 +0000 Received: by outflank-mailman (input) for mailman id 1302065; Wed, 06 May 2026 20:58:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKjKb-0001Uv-GR for xen-devel@lists.xenproject.org; Wed, 06 May 2026 20:58:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKjKa-00EinO-FX for xen-devel@lists.xenproject.org; Wed, 06 May 2026 22:58:56 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbab8d-2eae-0a2a0a5409dd-0a2a4504af5e-8 for ; Wed, 06 May 2026 22:58:56 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbab8e-1dec-0a2a45040019-aceafc1feafa-3 for ; Wed, 06 May 2026 22:58:55 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id E8FFE432DE; Wed, 6 May 2026 20:58:53 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 93889C2BCB0; Wed, 6 May 2026 20:58:53 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778101133; bh=ygxCrxTmtdcv24MTN9N1JC/G1qLohRd86Aj4uEoj9T0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=nFQtCTj8ZS7lgsOVZDHIWOc6O0JOvqyXujLxzkeg2Ma1NvSukyFY7DIwSm6zhrm2Z XCgeaIHhdd1AfF17aXtS7H83p0QM/CogJzykqUhZUrn5y+rqjEQHDnvr3FhbRPJnkX etz8gpN4csyG832+Ek0qfFWiVycVgspV1oSqynJ8a9XdsV7aGI0XYlgqa7DU+WegWk t2iFFCwq3m9M+kxbAfse0KMYRoxpCG/QnguCh9XeKnoyXDlkPpTSdgzjKYwJG5zN7v bhaOc71bziYjb6heDwA9xMjAwSHxIwIOq5xO06NnR33tRnycz6wQrS8OBUTTUj7G/l 0RmMCuMP2IzJA== Date: Wed, 6 May 2026 13:58:53 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Michal Orzel , "xen-devel@lists.xenproject.org" , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Subject: Re: [PATCH v3] xen/arm: skip holes in physical address space when setting up frametable In-Reply-To: <1EAB6ED4-3D64-4074-830B-EB9F8AD88547@arm.com> Message-ID: References: <20260506084137.40913-1-michal.orzel@amd.com> <1EAB6ED4-3D64-4074-830B-EB9F8AD88547@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-515320797-1778101133=:512397" X-purgate-ID: tlsNG-ebf023/1778101136-42B633FF-1C15BF66/0/0 X-purgate-type: clean X-purgate-size: 6386 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-515320797-1778101133=:512397 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Wed, 6 May 2026, Luca Fancellu wrote: > Hi Michal, > > > diff --git a/xen/arch/arm/mmu/mm.c b/xen/arch/arm/mmu/mm.c > > index 6604f3bf4e6a..c4018a61aa01 100644 > > --- a/xen/arch/arm/mmu/mm.c > > +++ b/xen/arch/arm/mmu/mm.c > > @@ -6,18 +6,55 @@ > > Should we have also #include because we use > find_next_*? Apologies I missed this in previous reviews. > > > #include > > #include > > #include > > +#include > > #include > > > > -/* Map a frame table to cover physical addresses ps through pe */ > > -void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) > > +static void __init init_frametable_chunk(unsigned long pdx_s, > > + unsigned long pdx_e) > > { > > - unsigned long nr_pdxs = mfn_to_pdx(mfn_add(maddr_to_mfn(pe), -1)) - > > - mfn_to_pdx(maddr_to_mfn(ps)) + 1; > > - unsigned long frametable_size = nr_pdxs * sizeof(struct page_info); > > - mfn_t base_mfn; > > - const unsigned long mapping_size = frametable_size < MB(32) ? MB(2) > > - : MB(32); > > + unsigned long nr_pdxs = pdx_e - pdx_s; > > + unsigned long chunk_size = nr_pdxs * sizeof(struct page_info); > > + unsigned long pfn_align; > > + struct page_info *pg; > > int rc; > > + mfn_t base_mfn; > > + > > + /* > > + * In-loop chunks span whole PDX groups, which are always page-size > > + * aligned. The last chunk ending at max_pdx may not be, so round up. > > + */ > > + chunk_size = ROUNDUP(chunk_size, PAGE_SIZE); > > + > > + /* > > + * Try to align the allocation to the contiguous mapping size so that > > + * map_pages_to_xen() can use the contiguous bit. > > + */ > > + pfn_align = ((chunk_size >= MB(32)) ? MB(32) : MB(2)) >> PAGE_SHIFT; > > + > > + base_mfn = alloc_boot_pages(chunk_size >> PAGE_SHIFT, pfn_align); > > + > > + /* > > + * Resolve the frametable VA via mfn_to_page(pdx_to_mfn(...)) rather > > + * than pdx_to_page() because the generic pdx_to_page() does not subtract > > + * frametable_base_pdx. There's more work to be done to make it generic, so > > + * for now route through mfn_to_page(), which on Arm applies the > > + * frametable_base_pdx offset and yields the correct VA. > > + */ > > + pg = mfn_to_page(pdx_to_mfn(pdx_s)); > > + rc = map_pages_to_xen((unsigned long)pg, base_mfn, > > + chunk_size >> PAGE_SHIFT, > > + PAGE_HYPERVISOR_RW | _PAGE_BLOCK); > > + if ( rc ) > > + panic("Unable to setup the frametable mappings\n"); > > + > > + memset(pg, 0, nr_pdxs * sizeof(struct page_info)); > > + memset(pg + nr_pdxs, -1, > > + chunk_size - nr_pdxs * sizeof(struct page_info)); > > +} > > + > > +void __init init_frametable(paddr_t ram_start) > > +{ > > + unsigned int sidx, nidx, max_idx; > > > > /* > > * The size of paddr_t should be sufficient for the complete range of > > @@ -26,24 +63,40 @@ void __init setup_frametable_mappings(paddr_t ps, paddr_t pe) > > BUILD_BUG_ON((sizeof(paddr_t) * BITS_PER_BYTE) < PADDR_BITS); > > BUILD_BUG_ON(sizeof(struct page_info) != PAGE_INFO_SIZE); > > > > - if ( frametable_size > FRAMETABLE_SIZE ) > > - panic("The frametable cannot cover the physical region %#"PRIpaddr" - %#"PRIpaddr"\n", > > - ps, pe); > > + /* init_frametable_chunk() allocation alignment assumes 4KB granule */ > > + BUILD_BUG_ON(PAGE_SIZE != SZ_4K); > > > > - frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ps)); > > - /* Round up to 2M or 32M boundary, as appropriate. */ > > - frametable_size = ROUNDUP(frametable_size, mapping_size); > > - base_mfn = alloc_boot_pages(frametable_size >> PAGE_SHIFT, 32<<(20-12)); > > + /* In-loop chunks must produce page-aligned frametable regions */ > > + BUILD_BUG_ON((PDX_GROUP_COUNT * sizeof(struct page_info)) % PAGE_SIZE); > > > > - rc = map_pages_to_xen(FRAMETABLE_VIRT_START, base_mfn, > > - frametable_size >> PAGE_SHIFT, > > - PAGE_HYPERVISOR_RW | _PAGE_BLOCK); > > - if ( rc ) > > - panic("Unable to setup the frametable mappings.\n"); > > + max_idx = DIV_ROUND_UP(max_pdx, PDX_GROUP_COUNT); > > + frametable_base_pdx = mfn_to_pdx(maddr_to_mfn(ram_start)); > > + > > + /* > > + * Mapping address in init_frametable_chunk must be page-aligned > > + * for map_pages_to_xen(). Aligning to PDX_GROUP_COUNT guarantees this > > + * because PDX_GROUP_COUNT * sizeof(page_info) is always a multiple of > > + * PAGE_SIZE by construction. > > + */ > > + frametable_base_pdx = ROUNDDOWN(frametable_base_pdx, PDX_GROUP_COUNT); > > + > > + if ( (max_pdx - frametable_base_pdx) > FRAMETABLE_NR ) > > + panic("Frametable too small\n"); > > + > > + for ( sidx = (frametable_base_pdx / PDX_GROUP_COUNT); ; sidx = nidx ) > > + { > > + unsigned int eidx; > > + > > + eidx = find_next_zero_bit(pdx_group_valid, max_idx, sidx); > > + nidx = find_next_bit(pdx_group_valid, max_idx, eidx); > > + > > + if ( nidx >= max_idx ) > > + break; > > + > > + init_frametable_chunk(sidx * PDX_GROUP_COUNT, eidx * PDX_GROUP_COUNT); > > + } > > > > - memset(&frame_table[0], 0, nr_pdxs * sizeof(struct page_info)); > > - memset(&frame_table[nr_pdxs], -1, > > - frametable_size - (nr_pdxs * sizeof(struct page_info))); > > + init_frametable_chunk(sidx * PDX_GROUP_COUNT, max_pdx); > > } > > > Apart from that the rest looks ok to me. I’ve also tested for Arm64 MMU/MPU and Arm32 MMU. > > Reviewed-by: Luca Fancellu > Tested-by: Luca Fancellu Acked-by: Stefano Stabellini --8323329-515320797-1778101133=:512397-- From xen-devel-bounces@lists.xenproject.org Wed May 06 22:19:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 06 May 2026 22:19:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302086.1576124 (Exim 4.92) (envelope-from ) id 1wKkaQ-0003Tp-8Q; Wed, 06 May 2026 22:19:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302086.1576124; Wed, 06 May 2026 22:19:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKkaQ-0003Ti-4z; Wed, 06 May 2026 22:19:22 +0000 Received: by outflank-mailman (input) for mailman id 1302086; Wed, 06 May 2026 22:19:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKkaO-0003Tc-G9 for xen-devel@lists.xenproject.org; Wed, 06 May 2026 22:19:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKkaN-00B1ni-DC for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:19:19 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbbe41-e002-0a2a0a5209dd-0a2a450b8132-12 for ; Thu, 07 May 2026 00:19:19 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbbe66-212f-0a2a450b0019-ac6904fed12c-3 for ; Thu, 07 May 2026 00:19:19 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 8C9096013B; Wed, 6 May 2026 22:19:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0F5ECC2BCB0; Wed, 6 May 2026 22:19:17 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778105957; bh=gysC/lx1i73eA4zP8jwgbWYpicdKVkkAq/If5SfmOvk=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=UF/aj9HS2SYPYHTIXkOa8lL3owagoxJHzGMhyRFSAxj+GJL8gP8yC5+XoLLz6s1x5 X9cL5R+VcjnFIjQexqIW2yM4i2kvMQEHMnTIu0Lb82lcqBkA1Hg3vvTFnYScS91BuS 2N40C7auuO3CTglHzgoaPeo24WGlW/+zx0190iYZVTD6bGYt2OnLQxGXS+Zi31QbCo BSVOloj3oH2LafE2j6H0SnRWGMGyru24IxEPo4APpEHqlKdF+7EKoOV6XhFqOa+f3G bqbSLPeKNIjTZdxVJ1+2t3TbHL1Z+PbeCe39zAx2EWiABfykEikLE4KgvyrMiahx6n +1VGvBd4tB8Jw== Date: Wed, 6 May 2026 17:19:15 -0500 From: Rob Herring To: Vijayanand Jitta Cc: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Charan Teja Kalla Subject: Re: [PATCH v14 0/3] of: parsing of multi #{iommu,msi}-cells in maps Message-ID: <20260506221915.GA3290640-robh@kernel.org> References: <20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com> X-purgate-ID: tlsNG-42698a/1778105959-18F66F3B-070AFEBA/0/0 X-purgate-type: clean X-purgate-size: 1480 On Fri, Apr 24, 2026 at 11:26:07AM +0530, Vijayanand Jitta wrote: > So far our parsing of {iommu,msi}-map properties has always blindly > assumed that the output specifiers will always have exactly 1 cell. > This typically does happen to be the case, but is not actually enforced > (and the PCI msi-map binding even explicitly states support for 0 or 1 > cells) - as a result we've now ended up with dodgy DTs out in the field > which depend on this behaviour to map a 1-cell specifier for a 2-cell > provider, despite that being bogus per the bindings themselves. > > Since there is some potential use[1] in being able to map at least > single input IDs to multi-cell output specifiers (and properly support > 0-cell outputs as well), add support for properly parsing and using the > target nodes' #cells values, albeit with the unfortunate complication of > still having to work around expectations of the old behaviour too. > -- Robin. > > Unlike single #{}-cell, it is complex to establish a linear relation > between input 'id' and output specifier for multi-cell properties, thus > it is always expected that len never going to be > 1. > > These changes have been tested on QEMU for the arm64 architecture. > > Since, this would also need update in dt-schema, raised PR[2] for the > same. Sashiko has some thoughts on the series: https://sashiko.dev/#/patchset/20260424-parse_iommu_cells-v14-0-fd02f11b6c38%40oss.qualcomm.com Rob From xen-devel-bounces@lists.xenproject.org Thu May 07 00:49:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 00:49:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302116.1576133 (Exim 4.92) (envelope-from ) id 1wKmv5-0006HY-Iq; Thu, 07 May 2026 00:48:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302116.1576133; Thu, 07 May 2026 00:48:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKmv5-0006HQ-Fj; Thu, 07 May 2026 00:48:51 +0000 Received: by outflank-mailman (input) for mailman id 1302116; Thu, 07 May 2026 00:48:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKmv4-0006HK-EV for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:48:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKmv3-001jGE-QQ for xen-devel@lists.xenproject.org; Thu, 07 May 2026 02:48:49 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbe0ea-bab6-0a2a0a5309dd-0a2a4509aa8c-30 for ; Thu, 07 May 2026 02:48:49 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbe170-2497-0a2a45090019-ac6904fed2c4-3 for ; Thu, 07 May 2026 02:48:49 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 2F0276015B; Thu, 7 May 2026 00:48:48 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A5984C2BCB0; Thu, 7 May 2026 00:48:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778114927; bh=VFTRKlWlr18PXmxokwVZ1cjbCqrjaeYTuYsJxa0Mp28=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=K4I2/r2FHQYBhsi6RgISDx0SWkyzoAMpMGQj63ULvbbVz8UvRTEuVtJhwk2icyqiQ CP4wPMQeb1qc0HnkN9EZZqFwruyWFU0qTuqng0HHyF22wP+I89lvnQj/62/+/fOnz8 p2xR/ANWcCJF6RsK/mZvIFCXN/Uo6918Xa3o7Jf9nM40WqaTEVBQKziXDhy9Q3LMnc cjQ1dLINhDiKIfq20pBaIa29tIcZ1E+qENjGV1WrfwrzzOa+qN2mZ39LJd6X1CiTko YESdryHbp2wK+TPSFt7G6Km83bcbFSGqNwjAjvUrpLId5q/2RCMCKVFTAifbLMsiYP iKUlVKoVLX17Q== Date: Wed, 6 May 2026 17:48:44 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-bad1c0/1778114929-40F66A53-FB37C0E6/0/0 X-purgate-type: clean X-purgate-size: 1902 On Wed, 6 May 2026, Jan Beulich wrote: > When one of the linking passes fails, additional intermediate files are > still in place. Having them available for analysis of the underlying > problem can be pretty helpful. Collect some into a new intermediates/ > directory. (Nothing new will be collected if linking succeeds.) > > While there also make sure xen-syms is collected (into binaries/). This > is rather more useful for analysis of possible problems than its stripped > counterpart. > > Signed-off-by: Jan Beulich > --- > As the issue this is meant to help with didn't re-occur with this in > place, the new logic wasn't really tested yet. It looks OK but please provide a link to a successful pipeline Reviewed-by: Stefano Stabellini > --- a/automation/gitlab-ci/build.yaml > +++ b/automation/gitlab-ci/build.yaml > @@ -6,6 +6,7 @@ > artifacts: > paths: > - binaries/ > + - intermediates/ > - xen-config > - xen-cppcheck.txt > - '*.log' > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -41,18 +41,24 @@ fi > # to exit early -- bash is invoked with -e. > cp xen/.config xen-config > > -# Directory for the artefacts to be dumped into > -mkdir -p binaries > +# Directories for the artefacts to be dumped into > +mkdir -p binaries intermediates > > collect_xen_artefacts() > { > local f > > - for f in xen/xen xen/xen.efi; do > + for f in xen/xen xen/xen-syms xen/xen.efi; do > if [[ -f $f ]]; then > cp $f binaries/ > fi > done > + > + for f in xen/.xen-syms.* xen/.xen.efi.*; do > + if [[ -f $f ]]; then > + cp $f intermediates/ > + fi > + done > } > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > From xen-devel-bounces@lists.xenproject.org Thu May 07 00:54:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 00:54:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302123.1576142 (Exim 4.92) (envelope-from ) id 1wKn0s-0007n5-5g; Thu, 07 May 2026 00:54:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302123.1576142; Thu, 07 May 2026 00:54:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKn0s-0007my-2K; Thu, 07 May 2026 00:54:50 +0000 Received: by outflank-mailman (input) for mailman id 1302123; Thu, 07 May 2026 00:54:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKn0r-0007mp-7v for xen-devel@lists.xenproject.org; Thu, 07 May 2026 00:54:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKn0q-0007Jm-5b for xen-devel@lists.xenproject.org; Thu, 07 May 2026 02:54:48 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fbe21c-5cb7-0a2a0a5109dd-0a2a4503b7a2-38 for ; Thu, 07 May 2026 02:54:48 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fbe2d7-672d-0a2a45030019-ac6904fed348-3 for ; Thu, 07 May 2026 02:54:48 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id B19356015B; Thu, 7 May 2026 00:54:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 472D7C2BCB0; Thu, 7 May 2026 00:54:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778115286; bh=Ek9bTwceeuiXv/WjhJvVjjRg1bG1EaP6Qb0v8Nf8Pyk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=J3aCLhxPyF3J2dzgx6oGACMc+1Fwtxm+TPhkmZic7491Rhyk+39pfpUO9BPCyQUEt h7JzaxjhI0eFbs3q39hKF8kSDTS3ncdetI21UFDTzFy9f6EXy/sOGWTumk9I2PTJ6P c+uKWTbb1FyOqz2MiCHGvOST+tdotsA2irfABDGM4iYmXBGEn/qZ9AeTEY/2G5EJSO oqQCpYw8dJ27osvfgjTcVnZ6ERHSyokADzHVEiP54sI7MGDMOLOb6ocdBIGwRhsNLE zgkPyPwA4tKQpR23dztRwUjSXGABYmj4Wbh6T3yLr6p1rCRb4fENv6vLwZMh8iiYYG EMe1bbqpBwv4g== Date: Wed, 6 May 2026 17:54:45 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Stefano Stabellini cc: Jan Beulich , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-33051d/1778115288-3B96D938-4AB74556/0/0 X-purgate-type: clean X-purgate-size: 2254 On Wed, 6 May 2026, Stefano Stabellini wrote: > On Wed, 6 May 2026, Jan Beulich wrote: > > When one of the linking passes fails, additional intermediate files are > > still in place. Having them available for analysis of the underlying > > problem can be pretty helpful. Collect some into a new intermediates/ > > directory. (Nothing new will be collected if linking succeeds.) > > > > While there also make sure xen-syms is collected (into binaries/). This > > is rather more useful for analysis of possible problems than its stripped > > counterpart. > > > > Signed-off-by: Jan Beulich > > --- > > As the issue this is meant to help with didn't re-occur with this in > > place, the new logic wasn't really tested yet. > > It looks OK but please provide a link to a successful pipeline > > Reviewed-by: Stefano Stabellini Actually, I see that the build script is run with bash -ex so I wonder if collect_xen_artefacts would even run if make fails. I think we need: trap collect_xen_artefacts EXIT > > --- a/automation/gitlab-ci/build.yaml > > +++ b/automation/gitlab-ci/build.yaml > > @@ -6,6 +6,7 @@ > > artifacts: > > paths: > > - binaries/ > > + - intermediates/ > > - xen-config > > - xen-cppcheck.txt > > - '*.log' > > --- a/automation/scripts/build > > +++ b/automation/scripts/build > > @@ -41,18 +41,24 @@ fi > > # to exit early -- bash is invoked with -e. > > cp xen/.config xen-config > > > > -# Directory for the artefacts to be dumped into > > -mkdir -p binaries > > +# Directories for the artefacts to be dumped into > > +mkdir -p binaries intermediates > > > > collect_xen_artefacts() > > { > > local f > > > > - for f in xen/xen xen/xen.efi; do > > + for f in xen/xen xen/xen-syms xen/xen.efi; do > > if [[ -f $f ]]; then > > cp $f binaries/ > > fi > > done > > + > > + for f in xen/.xen-syms.* xen/.xen.efi.*; do > > + if [[ -f $f ]]; then > > + cp $f intermediates/ > > + fi > > + done > > } > > > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > > > From xen-devel-bounces@lists.xenproject.org Thu May 07 06:49:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 06:49:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302169.1576151 (Exim 4.92) (envelope-from ) id 1wKsXX-0002Lo-Hu; Thu, 07 May 2026 06:48:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302169.1576151; Thu, 07 May 2026 06:48:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKsXX-0002Le-Cf; Thu, 07 May 2026 06:48:55 +0000 Received: by outflank-mailman (input) for mailman id 1302169; Thu, 07 May 2026 06:48:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKsXW-0002LY-8C for xen-devel@lists.xenproject.org; Thu, 07 May 2026 06:48:54 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKsXV-00BrPz-5s for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <8375cb34-9e95-4ca7-9d72-4dcf9fbe27c7@amd.com> Date: Thu, 7 May 2026 08:48:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 3/3] xen: introduce CONFIG_HAS_DOMAIN_TYPE To: Oleksii Kurochko , Jan Beulich CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , References: <7c91e1a705e1046be4af1c5671a8d91cf3557013.1777296786.git.oleksii.kurochko@gmail.com> <5daeb8f7-cf0f-4ea7-a686-93df36b43a30@suse.com> <2ec5eec1-0a7d-445f-9d96-99b3070afeb1@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <2ec5eec1-0a7d-445f-9d96-99b3070afeb1@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023D8:EE_|LV8PR12MB9619:EE_ X-MS-Office365-Filtering-Correlation-Id: 88fbf7d7-2051-43d6-0a69-08deac04adae X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|82310400026|7416014|376014|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: X2n/tAOOld4fwwL8Tao3u/NYN/Y2+q5DOce4SfuaLq/JTq4RMDWQq8O0hlyFsU1kmN8+PMo99V3+D1MX3wosomepzcw4gGcQIErZgsqCAiSPUn80RnlFPVVm8VZ6ktQom2OKuJRZXAzk/D6d++9+M0zS11i6ci5GGFIRvSkypr4t1igKay/IYz2vUiBD3wFAILFfIobmGK54gV7+EHtqHjVD2M/ph/Owmt3QXLc/MCLa+aY3gdcmRhGIETEyWENgrOxX4VsN83YtRWtBS5/tL3xPKZMeb4I/sghsb5bQBiZyNQ20vA+utDMpX35ptkvNkI21+IWAEqpqI+FBcx1uG1hEbBL5F4IH/jXX6fP+uzjNgEVKvESj3ilRRkzLRqEr0wbi+fe1YO0kGQJVM92zAB36WOqxNSZPFw/F/yZCjaSxuLfWzPUDQSMvY8jh806Q X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 06:48:42.5812 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 88fbf7d7-2051-43d6-0a69-08deac04adae X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF000023D8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9619 X-purgate-ID: tlsNG-bad1c0/1778136532-88970A53-BD0BDF50/10/73395122804 X-purgate-type: spam X-purgate-size: 3246 On 06-May-26 09:44, Oleksii Kurochko wrote: > > > On 5/4/26 2:21 PM, Jan Beulich wrote: >> On 27.04.2026 17:34, Oleksii Kurochko wrote: >>> As domain type is part of common code now there is no any reason >>> to have architecture-specific set_domain_type() functions so >>> it is dropped. >>> >>> Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE >>> for consistency. Also, drop and add some parentheses to be aligned >>> with the similar if() below. >>> >>> x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as >>> x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no >>> longer builds, the fallback is currently only relevant for arm32. >>> >>> Signed-off-by: Oleksii Kurochko >>> Reviewed-by: Michal Orzel >> >> In principle: >> Acked-by: Jan Beulich > > Thanks. > >> >> However, still a few remarks: >> >>> --- a/xen/include/xen/domain.h >>> +++ b/xen/include/xen/domain.h >>> @@ -13,6 +13,19 @@ struct guest_area { >>> void *map; >>> }; >>> >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> +enum __packed domain_type { >>> + DOMAIN_32BIT, >>> + DOMAIN_64BIT, >>> +}; >>> +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) >>> +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) >>> +#elif !defined(CONFIG_64BIT) >>> +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ >>> +#define is_32bit_domain(d) (true) >>> +#define is_64bit_domain(d) (false) >> >> I think it would be nice if the excess parentheses were dropped from here. >> >>> --- a/xen/include/xen/fdt-domain-build.h >>> +++ b/xen/include/xen/fdt-domain-build.h >>> @@ -7,6 +7,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> >>> struct domain; >>> @@ -69,6 +70,14 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) >>> return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; >>> } >>> >>> +static inline void set_domain_type(struct domain *d, struct kernel_info *kinfo) >> >> Pointer-to-const for the 2nd parameter? > > I will apply this comment and comment above. > >> >>> +{ >>> +#ifdef CONFIG_HAS_DOMAIN_TYPE >>> + /* Type must be set before allocate memory */ >> >> This comment would be more prominent if it lived outside of the #ifdef, >> perhaps (read on) ahead of the function. I wonder though why it's only >> a comment, and not e.g. an assertion. If an assertion was possible to >> add, the comment would want to live next to it. Without an assertion >> putting it ahead of the function may be better. >> >> Depending on how far to go, changes could be made while committing, or a >> proper v5 may want submitting. > > I think that instead of comment or just after comment the following > could be added: > ASSERT(!domain_tot_pages(d)); > > Jan, Michal, do you see any concern with that ASSERT() or I could add it > and keep your Ack-by and R-by. I don't see any issues with it. You can send a v5 and I'll commit it later on. ~Michal From xen-devel-bounces@lists.xenproject.org Thu May 07 07:25:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:25:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302184.1576159 (Exim 4.92) (envelope-from ) id 1wKt6v-0007kT-6L; Thu, 07 May 2026 07:25:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302184.1576159; Thu, 07 May 2026 07:25:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKt6v-0007kM-2y; Thu, 07 May 2026 07:25:29 +0000 Received: by outflank-mailman (input) for mailman id 1302184; Thu, 07 May 2026 07:25:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKt6t-0007kE-7H for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:25:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKt6s-00C5hR-1r for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:25:26 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc3e63-2eae-0a2a0a5409dd-0a2a4507c6dc-14 for ; Thu, 07 May 2026 09:25:25 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc3e65-229c-0a2a45070019-d155dd2ba9e6-3 for ; Thu, 07 May 2026 09:25:25 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d75312379so1110829f8f.1 for ; Thu, 07 May 2026 00:25:25 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778138725-2176AC48-F8C6D1BC/0/0 X-purgate-type: clean X-purgate-size: 1253 On 06.05.2026 17:47, Oleksii Kurochko wrote: > On 5/4/26 2:59 PM, Jan Beulich wrote: >> On 28.04.2026 16:33, Oleksii Kurochko wrote: >>> --- /dev/null >>> +++ b/xen/include/xen/domain-layout.h >>> @@ -0,0 +1,27 @@ >>> +#ifndef __XEN_DOMAIN_LAYOUT_H__ >>> +#define __XEN_DOMAIN_LAYOUT_H__ >>> + >>> +#include >> >> This isn't really needed. It is ... >> >>> +#include >>> +#include >> >> ... included by this one anyway (pretty much unavoidably right now, I >> guess). > > Then it will be needed to re-order them. > > Do you want to put the comment above xen/sched.h: > > /* > * Ensure xen/sched.h is included before xen/paging.h, since paging.h > depends > * on xen/domain.h, which is pulled in via sched.h. > */ > #include > #include > > or just add this to commit message instead? No. xen/paging.h only includes two asm/*.h, so doesn't itself require anything. If there's anything missing for that header to be included first, I would assume it's then RISC-V's asm/paging.h or asm/p2m.h which lack a necessary #include? Yet without you indicating what exactly the missing piece is, this is somewhat guesswork on my part. Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 07:37:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:37:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302196.1576169 (Exim 4.92) (envelope-from ) id 1wKtIc-0001Gx-9W; Thu, 07 May 2026 07:37:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302196.1576169; Thu, 07 May 2026 07:37:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtIc-0001Gq-6R; Thu, 07 May 2026 07:37:34 +0000 Received: by outflank-mailman (input) for mailman id 1302196; Thu, 07 May 2026 07:37:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKtIa-0001GU-M5 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:37:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtIY-009y4d-HD for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:37:32 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc413b-e002-0a2a0a5209dd-0a2a4505cf8a-10 for ; Thu, 07 May 2026 09:37:31 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc413b-aaa8-0a2a45050019-d155da29f1a2-3 for ; Thu, 07 May 2026 09:37:31 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bc47a96d3bbso70571266b.3 for ; Thu, 07 May 2026 00:37:31 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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It is ... >>> >>>> +#include >>>> +#include >>> >>> ... included by this one anyway (pretty much unavoidably right now, I >>> guess). >> >> Then it will be needed to re-order them. >> >> Do you want to put the comment above xen/sched.h: >> >> /* >> * Ensure xen/sched.h is included before xen/paging.h, since paging.h >> depends >> * on xen/domain.h, which is pulled in via sched.h. >> */ >> #include >> #include >> >> or just add this to commit message instead? > > No. xen/paging.h only includes two asm/*.h, so doesn't itself require anything. > If there's anything missing for that header to be included first, I would assume > it's then RISC-V's asm/paging.h or asm/p2m.h which lack a necessary #include? > Yet without you indicating what exactly the missing piece is, this is somewhat > guesswork on my part. The first time I read compiler error inattentively. The following compilation error occurs after xen/domain.h is dropped from xen/domain-layout.h: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); So the correct fix is to add forward declaration of struct page_info to RISC-V's asm/paging.h. I will add the following to commit message: " To avoid the following compilation issue: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); add the forward declaration of struct page_info to RISC-V's asm/paging.h. " ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu May 07 07:41:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:41:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302204.1576177 (Exim 4.92) (envelope-from ) id 1wKtMr-0002ps-PD; Thu, 07 May 2026 07:41:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302204.1576177; Thu, 07 May 2026 07:41:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtMr-0002pl-MN; Thu, 07 May 2026 07:41:57 +0000 Received: by outflank-mailman (input) for mailman id 1302204; Thu, 07 May 2026 07:41:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtMp-0002pf-F0 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:41:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtMn-009ymz-AB for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:41:54 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc423a-bab6-0a2a0a5309dd-0a2a4507e11c-28 for ; Thu, 07 May 2026 09:41:54 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc4242-229c-0a2a45070019-d155802dd1fd-3 for ; Thu, 07 May 2026 09:41:54 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48d146705b4so6103425e9.3 for ; Thu, 07 May 2026 00:41:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 07 May 2026 00:41:53 -0700 (PDT) Message-ID: <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Date: Thu, 7 May 2026 09:41:52 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts To: Stefano Stabellini Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778139714-0BD7FC48-25DE0715/0/0 X-purgate-type: clean X-purgate-size: 2090 On 07.05.2026 02:54, Stefano Stabellini wrote: > On Wed, 6 May 2026, Stefano Stabellini wrote: >> On Wed, 6 May 2026, Jan Beulich wrote: >>> When one of the linking passes fails, additional intermediate files are >>> still in place. Having them available for analysis of the underlying >>> problem can be pretty helpful. Collect some into a new intermediates/ >>> directory. (Nothing new will be collected if linking succeeds.) >>> >>> While there also make sure xen-syms is collected (into binaries/). This >>> is rather more useful for analysis of possible problems than its stripped >>> counterpart. >>> >>> Signed-off-by: Jan Beulich >>> --- >>> As the issue this is meant to help with didn't re-occur with this in >>> place, the new logic wasn't really tested yet. >> >> It looks OK but please provide a link to a successful pipeline Well, I had it in use in https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 but does that count, when the issue the change is for didn't really occur? For now I can't test the additions without having a way to trigger that symbol table issue (or any other problem at one of the linking stages). Short of artificially breaking things, that is. >> Reviewed-by: Stefano Stabellini Thanks, but the above wants clarifying first, and the below suggests you actually meant to take back the R-b. > Actually, I see that the build script is run with bash -ex so I wonder > if collect_xen_artefacts would even run if make fails. I think we need: > > trap collect_xen_artefacts EXIT I don't feel comfortable making such a change. Furthermore it's unrelated, as it would mean that on other build failures successfully created final binaries wouldn't be collected either (after all on x86 it may be only one of the two links that failed). Plus then it would likely want doing differently, by making the EXIT hook invoke a new collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered (except for the xen-syms addition there)? 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Thu, 07 May 2026 00:49:04 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Thu, 7 May 2026 10:48:52 +0300 X-Gm-Features: AVHnY4JyCMWnh7af7YUMRsqcpCkfcPjyqh0VRnG7JWBC1lK6NFUYwK6bEhIz_PY Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778140145-8336C161-E189388F/0/0 X-purgate-type: clean X-purgate-size: 6948 Hi Luca, Thank you for the feedback. On Tue, Apr 21, 2026 at 4:26=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c > > index b23e72a3d0..dbff470962 100644 > > --- a/xen/arch/arm/gic-v2.c > > +++ b/xen/arch/arm/gic-v2.c > > @@ -1098,6 +1098,129 @@ static int gicv2_iomem_deny_access(struct domai= n *d) > > return iomem_deny_access(d, mfn, mfn + nr); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +/* This struct represents block of 32 IRQs */ > > +struct irq_block { > > + uint32_t icfgr[2]; /* 2 registers of 16 IRQs each */ > > + uint32_t ipriorityr[8]; > > + uint32_t isenabler; > > + uint32_t isactiver; > > + uint32_t itargetsr[8]; > > +}; > > + > > +/* GICv2 registers to be saved/restored on system suspend/resume */ > > +struct gicv2_context { > > + /* GICC context */ > > + struct cpu_ctx { > > + uint32_t ctlr; > > + uint32_t pmr; > > + uint32_t bpr; > > + } cpu; > > + > > + /* GICD context */ > > + struct dist_ctx { > > + uint32_t ctlr; > > + /* Includes banked SGI/PPI state for the boot CPU. */ > > + struct irq_block *irqs; > > + } dist; > > +}; > > + > > +static struct gicv2_context gic_ctx; > > + > > +static int gicv2_suspend(void) > > +{ > > + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32); > > + > > + /* Save GICC_CTLR configuration. */ > > + gic_ctx.cpu.ctlr =3D readl_gicc(GICC_CTLR); > > + > > + /* Quiesce the GIC CPU interface before suspend. */ > > + gicv2_cpu_disable(); > > + > > + /* Save GICD configuration */ > > + gic_ctx.dist.ctlr =3D readl_gicd(GICD_CTLR); > > + writel_gicd(0, GICD_CTLR); > > + > > + gic_ctx.cpu.pmr =3D readl_gicc(GICC_PMR); > > + gic_ctx.cpu.bpr =3D readl_gicc(GICC_BPR); > > + > > + for ( i =3D 0; i < blocks; i++ ) > > + { > > + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > > + size_t j, off =3D i * sizeof(irqs->isenabler); > > + > > + irqs->isenabler =3D readl_gicd(GICD_ISENABLER + off); > > + irqs->isactiver =3D readl_gicd(GICD_ISACTIVER + off); > > + > > + off =3D i * sizeof(irqs->ipriorityr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > > + { > > + irqs->ipriorityr[j] =3D readl_gicd(GICD_IPRIORITYR + off += j * 4); > > + irqs->itargetsr[j] =3D readl_gicd(GICD_ITARGETSR + off + j= * 4); > > regarding GICD_ITARGETSR ... > > > + } > > + > > + off =3D i * sizeof(irqs->icfgr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > > + irqs->icfgr[j] =3D readl_gicd(GICD_ICFGR + off + j * 4); > > + } > > + > > + return 0; > > +} > > + > > +static void gicv2_resume(void) > > +{ > > + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32); > > + > > + gicv2_cpu_disable(); > > + /* Disable distributor */ > > + writel_gicd(0, GICD_CTLR); > > + > > + for ( i =3D 0; i < blocks; i++ ) > > + { > > + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > > + size_t j, off =3D i * sizeof(irqs->isenabler); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); > > + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); > > + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); > > + > > + off =3D i * sizeof(irqs->ipriorityr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > > + { > > + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j= * 4); > > + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j *= 4); > > =E2=80=A6 please let me know if I read correctly this loop, but here GICD= _ITARGETSR0 =E2=80=A6 7 > are restored when i=3D0, but the specificaitons says that this block is r= ead only on > multiprocessor, so we should skip the restore part. > Also saving it could be skipped because each field returns a value that c= orresponds > only to the processor reading the register. > > 4.3.12 User constraints [1] You are right, thanks for pointing this out. I will skip saving/restoring the read-only GICD_ITARGETSR0..7 block in v9. > > > + } > > + > > + off =3D i * sizeof(irqs->icfgr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > > + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > > + } > > + > > + /* Make sure all registers are restored and enable distributor */ > > + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); > > + > > + /* Restore GIC CPU interface configuration */ > > + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); > > + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); > > + > > + /* Enable GIC CPU interface */ > > + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); > > +} > > + > > I also see that we don=E2=80=99t save pending SGIs state (by GICD_CPENDSG= IRn/GICD_SPENDSGIRn) or Active Priorities registers > state (GICC_APRn/GICC_NSAPRn [latter if security extension are there]) as= written in [1] =E2=80=9C4.5 Preserving and restoring GIC state=E2=80=9D, > was it intentional? Yes, this was intentional. The GICv2 suspend callback is called at a quiescent point in the SYSTEM_SUSPEND path: all domains are already shut down for suspend, guest execution is quiesced, the scheduler is disabled, non-boot CPUs have been offlined, and CPU0 enters gic_suspend() with local interrupts disabled. For SGIs, I don't consider GICD_CPENDSGIRn/GICD_SPENDSGIRn part of the save= d host GIC context. Xen uses physical SGIs as IPIs, and IPI delivery is an internal synchronization mechanism, not architectural state that should be replayed after SYSTEM_SUSPEND. Guest SGI state is virtual GIC state and is = not represented by these physical GICD SGI pending registers. For GICC_APRn/GICC_NSAPRn, those registers describe active priority state f= or interrupts already acknowledged by the CPU interface. The final suspend pat= h is not expected to run with an active physical interrupt context. If those registers were non-zero there, restoring only APR/NSAPR would not make the corresponding interrupt handling context valid after resume, and could inst= ead leave the CPU interface with stale active priority state. So I did not add save/restore for GICD_CPENDSGIRn/GICD_SPENDSGIRn or GICC_APRn/GICC_NSAPRn in this patch. I can add a short comment in v9 to mak= e this scope explicit. Please let me know if you think there is a suspend/resume path where this state still needs to be preserved. Best regards, Mykola > > [1] https://developer.arm.com/documentation/ihi0048/bb/?lang=3Den > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Thu May 07 07:53:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:53:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302230.1576206 (Exim 4.92) (envelope-from ) id 1wKtYT-0005m3-BD; Thu, 07 May 2026 07:53:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302230.1576206; Thu, 07 May 2026 07:53:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtYT-0005lw-6f; Thu, 07 May 2026 07:53:57 +0000 Received: by outflank-mailman (input) for mailman id 1302230; Thu, 07 May 2026 07:53:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtYS-0005lq-7R for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:53:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtYR-00C5dA-KV for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:53:55 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc4503-2eae-0a2a0a5409dd-0a2a4509884c-40 for ; Thu, 07 May 2026 09:53:55 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc4513-2497-0a2a45090019-d1558034d92d-3 for ; Thu, 07 May 2026 09:53:55 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4852b81c73aso4473525e9.3 for ; Thu, 07 May 2026 00:53:55 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <199b54b5-8571-4a18-bba6-226a5a94ecc9@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778140435-88970A53-30E5C3FF/0/0 X-purgate-type: clean X-purgate-size: 935 On 07.05.2026 09:43, Jürgen Groß wrote: > On 29.04.26 18:41, Jason Andryuk wrote: >> On 2026-04-29 08:06, Juergen Gross wrote: >>> Wit unprivileged domains now capable to use the @releaseDomain watch, >> >> s/Wit/With/ again. >> >> Regards, >> Jason >> >>> there is no reason not to remove any node permissions which relate to >>> a domain which has been removed. >>> >>> This resolves a complex scenario where a new domain could inherit the >>> permissions of an old one with the same domid. >>> >>> Signed-off-by: Juergen Gross >>> Reviewed-by: Jason Andryuk > > Can this simple fix be done while committing, or should I send V3? Afaic - of course it can be. Aiui the series wasn't committed (and can't be) because patch 1 still needs a REST maintainer ack. As per earlier comments throughout the history of the DOMID_ANY patch, I'm hesitant to offer it. Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 07:57:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 07:57:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302237.1576214 (Exim 4.92) (envelope-from ) id 1wKtbi-0006JA-NP; Thu, 07 May 2026 07:57:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302237.1576214; Thu, 07 May 2026 07:57:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtbi-0006J3-KB; Thu, 07 May 2026 07:57:18 +0000 Received: by outflank-mailman (input) for mailman id 1302237; Thu, 07 May 2026 07:57:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKtbg-0006Ix-Vl for xen-devel@lists.xenproject.org; Thu, 07 May 2026 07:57:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKtbg-005Fn6-8u for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:57:16 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc45d7-2eae-0a2a0a5409dd-0a2a45088ab0-20 for ; Thu, 07 May 2026 09:57:16 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc45dc-63b5-0a2a45080019-d155dd34c424-3 for ; Thu, 07 May 2026 09:57:16 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-43fe3e22e33so313332f8f.0 for ; Thu, 07 May 2026 00:57:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5531fe94-6200-4f7c-9c22-e09189438e9c@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778140636-BC766DB1-A4744FC5/0/0 X-purgate-type: clean X-purgate-size: 5053 On 06.05.2026 18:18, Andrew Cooper wrote: > On 06/05/2026 2:55 pm, Roger Pau Monne wrote: >> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >> say the least. We don't know what registers might be there, nor which > > Sorry, one more.  "We don't know which registers might". > >> values might be safe for those registers. On a forthcoming platform doing >> the zeroing of the MMIO region does put the IOMMU in a broken state, which >> is not recoverable by the IOMMU initialization procedure in Xen. >> >> Instead attempt to forcefully disable the IOMMU ahead of enabling it. Fold >> map_iommu_mmio_region() into it's only caller, as the function body is just >> an ioremap() call after the removal of the memset(). >> >> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >> Signed-off-by: Roger Pau Monné >> --- >> Changes since v1: >> - Zero the control register after calling disable_iommu(). >> - Print a warning message if the IOMMU is handed enabled to Xen from >> firmware. >> - Fix commit log grammar issues. >> --- >> xen/drivers/passthrough/amd/iommu_init.c | 31 +++++++++++++----------- >> 1 file changed, 17 insertions(+), 14 deletions(-) >> >> diff --git a/xen/drivers/passthrough/amd/iommu_init.c b/xen/drivers/passthrough/amd/iommu_init.c >> index 76ae78e5ea53..ffc041211fb5 100644 >> --- a/xen/drivers/passthrough/amd/iommu_init.c >> +++ b/xen/drivers/passthrough/amd/iommu_init.c >> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >> return iommu->ht_flags & mask; >> } >> >> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >> -{ >> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> - IOMMU_MMIO_REGION_LENGTH); >> - if ( !iommu->mmio_base ) >> - return -ENOMEM; >> - >> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >> - >> - return 0; >> -} >> - >> static void __init unmap_iommu_mmio_region(struct amd_iommu *iommu) >> { >> if ( iommu->mmio_base ) >> @@ -1367,11 +1355,14 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> { >> int rc = alloc_ivrs_mappings(iommu->sbdf.seg); >> >> - if ( !rc ) >> - rc = map_iommu_mmio_region(iommu); >> if ( rc ) >> return rc; >> >> + iommu->mmio_base = ioremap(iommu->mmio_base_phys, >> + IOMMU_MMIO_REGION_LENGTH); >> + if ( !iommu->mmio_base ) >> + return -ENOMEM; >> + >> get_iommu_features(iommu); >> >> /* >> @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >> if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >> return -ERANGE; >> >> + /* Read current control register and forcefully disable the IOMMU. */ >> + iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + if ( iommu->ctrl.iommu_en ) >> + printk(XENLOG_WARNING >> + "AMD-Vi: IOMMU %pp enabled by firmware (%016lx)\n", >> + &iommu->sbdf, iommu->ctrl.raw); >> + disable_iommu(iommu, true); >> + >> + /* With the IOMMU disabled zero the control register. */ >> + iommu->ctrl.raw = 0; >> + writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); >> + >> return 0; >> } >> > > I don't think calling disable_iommu() is a good thing here. > > It's just a cascade of clearing one/few bits in ctrl at a time, but is > is added unconditionally so that's 5 UC stores writing 0's to the same > register in the common case. > > I think this logic wants to be: > > @@ -1381,6 +1372,18 @@ static int __init amd_iommu_prepare_one(struct amd_iommu *iommu) >      if ( amd_iommu_max_paging_mode < amd_iommu_min_paging_mode ) >          return -ERANGE; >   > +    /* Check if the IOMMU is active, and disable. */ > +    iommu->ctrl.raw = readq(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    if ( iommu->ctrl.iommu_en ) > +    { > +        printk(XENLOG_WARNING > +               "AMD-Vi: IOMMU %pp enabled by firmware (ctrl %016lx)\n", > +               &iommu->sbdf, iommu->ctrl.raw); > + > +        iommu->ctrl.raw = 0; > +        writeq(0, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET); > +    } > + >      return 0; >  } > >   > > which has the advantage that it's closer to the current behaviour, and > therefore arguably a safer backport. > > The only thing that disable_iommu() does which isn't editing the control > register is playing with the PCI MSI enable bit, but that really doesn't > matter when we clear ctrl.int_cap_xt_en.  (And in fact, that path is > buggy because it clears MSI enable without inhibiting interrupt > generation, which architecturally will turn into legacy line interrupt > to deal with.) Except there's no line interrupt associated with this? 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mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none From: "Tian, Kevin" To: Jason Gunthorpe CC: Teddy Astie , "iommu@lists.linux.dev" , "linux-kernel@vger.kernel.org" , Xen-devel Subject: RE: How to express "externally managed" IOMMU domains for VFIO/IOMMUFD ? Thread-Topic: How to express "externally managed" IOMMU domains for VFIO/IOMMUFD ? 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charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-Exchange-RoutingPolicyChecked: VSfCeairwr+tBnZUwy90Y9fH5KsyFjF+1tIfs1/ecuba/9l+N3WijyakW4xUQadnNgyL7wp+YR5wOrY7+XrGJUpH3pA9zz8AQwlECvi0OlvrKb/SbQQv9u+tugQh9qa0hq1WfzMdpKIoxlPAM1BZFEmln2uNlTFTXNjDaUdscjXZKth24drbhaFIlk8XO5DLCoQQEgcO83i8o2EIjhD724gxoyCCuLvvEvln8NAoEzLZL5WKqx3lB3mI7cI8y05n78X3mKtRTgRE8292TW/nnXjPrQOovfhhnGIQAiPXW1NJZcfbpMcZZTzypblhEtNTpBWIMsaRHvsAXadY+LLRGQ== X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: BN9PR11MB5276.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: db3d8b33-1b3c-4739-46b1-08deac0f02d5 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 08:02:40.4075 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: N7Ss62VstNWPi7tykbszPu81JGV3Yl9Mq8W9yQ+bBt98CXAYDUeAGOZIRFCss8lkhvl1PwNQUJeJF5qaZdChBg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR11MB5915 X-OriginatorOrg: intel.com X-purgate-ID: tlsNG-720697/1778140967-ABB60161-48381AA4/0/0 X-purgate-type: clean X-purgate-size: 1551 > From: Jason Gunthorpe > Sent: Sunday, April 26, 2026 9:30 PM >=20 > On Thu, Apr 23, 2026 at 08:01:50AM +0000, Tian, Kevin wrote: > > > On Xen, we have a dedicated hypercalls for moving a device into anoth= er > > > guest (so it no longer belongs in Dom0, at far as DMA is concerned). > > > > > > But it looks like there are no way to describe that idea of "attach t= hat > > > device to this VM" nor "the device is in a VM"; which makes that > > > impracticable. > > > > > > There may be things that could be done with the vIOMMU objects, but > > > there would be no "parent domain" in such case, as said earlier it > > > doesn't exist in the IOMMU subsystem. > > > > > > What is expected to be done instead ? > > > > > > Teddy > > > > > > [1] https://www.youtube.com/watch?v=3DpLMGRgEJ-Eg > > > > > > > It'd be much easier to collect comments if you can put plain words > > to explain the problem rather than expecting other folks to watch > > the video first... >=20 > It sounds like CC and pkvm to me so I think it should re-use those > mechanisms.. >=20 for CC and pkvm the guest memory is still allocated from host. for Xen the guest memory is allocated from hypervisor and invisible to Dom0. iirc its device assignment is implemented by the toolstack issuing hypercall to hypervisor, bypassing the Dom0 kernel. I don't know the latest status in Xen side. Seems it's still the case and Astie is trying to find a way to orchestrate it via VFIO. But it's unclear what his proposal is... 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260506165157.68567-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778140987-E2193443-DA7567B0/0/0 X-purgate-type: clean X-purgate-size: 2141 On 06.05.2026 18:51, Roger Pau Monne wrote: > Attempting to memset the whole IOMMU MMIO region to zero is dangerous to > say the least. We don't know what registers might be there, nor which > values might be safe for those registers. On a forthcoming platform doing > the zeroing of the MMIO region does put the IOMMU in a broken state, which > is not recoverable by the IOMMU initialization procedure in Xen. > > Instead just zero the control register, which mimics the current behavior > with regards to how the control register is handled, and ensures the IOMU > setup is done with the unit disabled. This approach will need revisiting > in order to support Preboot DMA Protection. > > Fold map_iommu_mmio_region() into its only caller, as the function body is > just an ioremap() call after the removal of the memset(). > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > Signed-off-by: Roger Pau Monné While you got Andrew's R-b, I don't view that as enough to commit it. My prior concern towards ... > --- a/xen/drivers/passthrough/amd/iommu_init.c > +++ b/xen/drivers/passthrough/amd/iommu_init.c > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > return iommu->ht_flags & mask; > } > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > -{ > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > - IOMMU_MMIO_REGION_LENGTH); > - if ( !iommu->mmio_base ) > - return -ENOMEM; > - > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > - > - return 0; > -} ... this part of the change wasn't addressed, neither verbally nor by an adjustment to the description of what was committed. As previously stated, blindly memset()-ing the entire area may not be the best of all options, but the downsides of not doing this need to somehow be addressed. As indicated, once they run out of bits in the main control register, they likely will add a 2nd one. That'll then also need clearing, yet we have no code to do so anymore. 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Thu, 07 May 2026 01:07:33 -0700 (PDT) Message-ID: <579169d1-8903-4056-b997-b8681f1452a6@suse.com> Date: Thu, 7 May 2026 10:07:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [ANNOUNCE] - Call for agenda items for May 7 Xen Community Call @ 15:00 UTC To: Cody Zuschlag References: Content-Language: en-US Cc: xen-devel@lists.xenproject.org From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778141253-7D1848B7-645D0950/0/0 X-purgate-type: clean X-purgate-size: 765 On 05.05.2026 22:02, Cody Zuschlag wrote: > It’s time for the May Xen Project Community Call, happening this Thursday > at 4 pm UK time. > > We’d love to have you join. You’re welcome to participate or just listen > in. It’s a great way to stay aligned, hear what others are working on, and > help move a few ongoing topics forward. > > *Preparation*: > Please take a moment to review and update the agenda ahead of the call: > 👉 Agenda Back to cryptpad? > Feel free to: > - Add topics or updates > - Suggest anything we can drop or defer > - Include links to patches, threads, or docs where helpful Mind me asking what the difference is between D) and E)? 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We don't know what registers might be there, nor which > > values might be safe for those registers. On a forthcoming platform doing > > the zeroing of the MMIO region does put the IOMMU in a broken state, which > > is not recoverable by the IOMMU initialization procedure in Xen. > > > > Instead just zero the control register, which mimics the current behavior > > with regards to how the control register is handled, and ensures the IOMU > > setup is done with the unit disabled. This approach will need revisiting > > in order to support Preboot DMA Protection. > > > > Fold map_iommu_mmio_region() into its only caller, as the function body is > > just an ioremap() call after the removal of the memset(). > > > > Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > > Signed-off-by: Roger Pau Monné > > While you got Andrew's R-b, I don't view that as enough to commit it. My > prior concern towards ... > > > --- a/xen/drivers/passthrough/amd/iommu_init.c > > +++ b/xen/drivers/passthrough/amd/iommu_init.c > > @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > > return iommu->ht_flags & mask; > > } > > > > -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > > -{ > > - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > > - IOMMU_MMIO_REGION_LENGTH); > > - if ( !iommu->mmio_base ) > > - return -ENOMEM; > > - > > - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > > - > > - return 0; > > -} > > ... this part of the change wasn't addressed, neither verbally nor by an > adjustment to the description of what was committed. As previously stated, > blindly memset()-ing the entire area may not be the best of all options, > but the downsides of not doing this need to somehow be addressed. As > indicated, once they run out of bits in the main control register, they > likely will add a 2nd one. That'll then also need clearing, yet we have > no code to do so anymore. I could introduce an opt-in command line option that forces the zeroing of the MMIO region (to have the option to resort to the previous behavior), but I was (wrongly) under the impression that we have agreement the proposed approach was the least bad of the ones available, sorry. Note how VT-d also doesn't zero the IOMMU registers MMIO page either, neither does it seems to zero the Global Command Register either, which I'm not saying it's correct, but is at least a (possibly wrong) precedent. I don't think there's much we can do with the handling of enabled bits in possibly registers not know/handled by Xen. Like on VT-d, we possibly need to rely on the firmware to handle the IOMMU in a half-sane configuration, with no enabled features on registers Xen doesn't know about. Regards, Roger. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778143880-B7370DB1-A52AA58B/0/0 X-purgate-type: clean X-purgate-size: 3546 On 07.05.2026 10:46, Roger Pau Monné wrote: > On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: >> On 06.05.2026 18:51, Roger Pau Monne wrote: >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>> say the least. We don't know what registers might be there, nor which >>> values might be safe for those registers. On a forthcoming platform doing >>> the zeroing of the MMIO region does put the IOMMU in a broken state, which >>> is not recoverable by the IOMMU initialization procedure in Xen. >>> >>> Instead just zero the control register, which mimics the current behavior >>> with regards to how the control register is handled, and ensures the IOMU >>> setup is done with the unit disabled. This approach will need revisiting >>> in order to support Preboot DMA Protection. >>> >>> Fold map_iommu_mmio_region() into its only caller, as the function body is >>> just an ioremap() call after the removal of the memset(). >>> >>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >>> Signed-off-by: Roger Pau Monné >> >> While you got Andrew's R-b, I don't view that as enough to commit it. My >> prior concern towards ... >> >>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >>> return iommu->ht_flags & mask; >>> } >>> >>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >>> -{ >>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>> - IOMMU_MMIO_REGION_LENGTH); >>> - if ( !iommu->mmio_base ) >>> - return -ENOMEM; >>> - >>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >>> - >>> - return 0; >>> -} >> >> ... this part of the change wasn't addressed, neither verbally nor by an >> adjustment to the description of what was committed. As previously stated, >> blindly memset()-ing the entire area may not be the best of all options, >> but the downsides of not doing this need to somehow be addressed. As >> indicated, once they run out of bits in the main control register, they >> likely will add a 2nd one. That'll then also need clearing, yet we have >> no code to do so anymore. > > I could introduce an opt-in command line option that forces the > zeroing of the MMIO region (to have the option to resort to the > previous behavior), But we don't want to fully go back to this. We'd need a form that zeroes what may be zeroed, without causing the issue you're trying to address. > but I was (wrongly) under the impression that we > have agreement the proposed approach was the least bad of the ones > available, sorry. > > Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > neither does it seems to zero the Global Command Register either, > which I'm not saying it's correct, but is at least a (possibly wrong) > precedent. I don't think there's much we can do with the handling of > enabled bits in possibly registers not know/handled by Xen. Like on > VT-d, we possibly need to rely on the firmware to handle the IOMMU in > a half-sane configuration, with no enabled features on registers Xen > doesn't know about. As indicated before, for firmware we can likely rely on that. Pre-boot non-firmware environments and especially Xen being kexec-ed (or being run past something which was kexec-ed) may be of more concern. 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Change the guard around access of kinfo->type to CONFIG_HAS_DOMAIN_TYPE for consistency. Also, drop and add some parentheses to be aligned with the similar if() below. x86 with CONFIG_64BIT=y shouldn't use is_{32,64}bit_domain() as x86 doesn't have support of CONFIG_HAS_DOMAIN_TYPE. Since x86_32 Xen no longer builds, the fallback is currently only relevant for arm32. Signed-off-by: Oleksii Kurochko Reviewed-by: Michal Orzel Acked-by: Jan Beulich --- CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2506583130 --- Changes in v5: - Drop excess parentheses from definion of is_{32,64}bit_domain for 32-bit case. - Add const for 2-nd argument of set_domain_type(). - Add ASSERT(!domain_tot_pages(d)); inside set_domain_type() to guarantee what is written in the comment above it. - Add Acked-by: Jan Beulich . --- Changes in v4: - Drop enum domain_type type; from Arm's struct arch_domain. - Add Reviewed-by: Michal Orzel . --- Changes in v3: - Sort properly HAS_DOMAIN_TYPE in xen/common/Kconfig. - Update the comment above is_*bit_domain() macros. --- Changes in v2: - Update the commit message. - Move HAS_DOMAIN_TYPE to xen/common/Kconfig. - Return set_domain_type(), move it to xen/fdt-domain-build.h and make it static inline. - s/CONFIG_ARM_64/CONFIG_HAS_DOMAIN for the places where kinfo->type is used. - Drop parantethes around cpu_has_el1_32 in if() and add around (kinfo->type == DOMAIN_32BIT) to be consistent with the similar check below. - Fix comment code style. - Add __packed to definition of enum domain_type --- --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/arm64/domctl.c | 4 ++-- xen/arch/arm/dom0less-build.c | 14 -------------- xen/arch/arm/domain_build.c | 12 +++++------- xen/arch/arm/include/asm/domain.h | 16 ---------------- xen/arch/arm/include/asm/kernel.h | 4 ---- xen/arch/arm/kernel.c | 16 ++++++++-------- xen/common/Kconfig | 3 +++ xen/include/xen/dom0less-build.h | 2 -- xen/include/xen/domain.h | 13 +++++++++++++ xen/include/xen/fdt-domain-build.h | 10 ++++++++++ xen/include/xen/fdt-kernel.h | 5 +++++ xen/include/xen/sched.h | 4 ++++ 13 files changed, 51 insertions(+), 53 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 2f2b501fdac4..79622b46a10d 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -7,6 +7,7 @@ config ARM_64 def_bool y depends on !ARM_32 select 64BIT + select HAS_DOMAIN_TYPE select HAS_FAST_MULTIPLY select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH diff --git a/xen/arch/arm/arm64/domctl.c b/xen/arch/arm/arm64/domctl.c index 8720d126c97d..9e9a29eb1e78 100644 --- a/xen/arch/arm/arm64/domctl.c +++ b/xen/arch/arm/arm64/domctl.c @@ -21,10 +21,10 @@ static long switch_mode(struct domain *d, enum domain_type type) return -EINVAL; if ( domain_tot_pages(d) != 0 ) return -EBUSY; - if ( d->arch.type == type ) + if ( d->type == type ) return 0; - d->arch.type = type; + d->type = type; if ( is_64bit_domain(d) ) for_each_vcpu(d, v) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 4181c105389a..6f73c65e5151 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -237,20 +237,6 @@ int __init make_arch_nodes(struct kernel_info *kinfo) return 0; } -/* TODO: make arch.type generic ? */ -#ifdef CONFIG_ARM_64 -void __init set_domain_type(struct domain *d, struct kernel_info *kinfo) -{ - /* type must be set before allocate memory */ - d->arch.type = kinfo->arch.type; -} -#else -void __init set_domain_type(struct domain *d, struct kernel_info *kinfo) -{ - /* Nothing to do */ -} -#endif - int __init init_vuart(struct domain *d, struct kernel_info *kinfo, const struct dt_device_node *node) { diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index a3ff70102376..ad665cd3c045 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1771,15 +1771,15 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) BUG_ON(d->vcpu[0] == NULL); BUG_ON(v->is_initialised); -#ifdef CONFIG_ARM_64 +#ifdef CONFIG_HAS_DOMAIN_TYPE /* if aarch32 mode is not supported at EL1 do not allow 32-bit domain */ - if ( !(cpu_has_el1_32) && kinfo->arch.type == DOMAIN_32BIT ) + if ( !cpu_has_el1_32 && (kinfo->type == DOMAIN_32BIT) ) { printk("Platform does not support 32-bit domain\n"); return -EINVAL; } - if ( is_sve_domain(d) && (kinfo->arch.type == DOMAIN_32BIT) ) + if ( is_sve_domain(d) && (kinfo->type == DOMAIN_32BIT) ) { printk("SVE is not available for 32-bit domain\n"); return -EINVAL; @@ -1893,10 +1893,8 @@ int __init construct_hwdom(struct kernel_info *kinfo, iommu_hwdom_init(d); -#ifdef CONFIG_ARM_64 - /* type must be set before allocate_memory */ - d->arch.type = kinfo->arch.type; -#endif + set_domain_type(d, kinfo); + find_gnttab_region(d, kinfo); if ( is_domain_direct_mapped(d) ) allocate_memory_11(d, kinfo); diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index ffe5d0d9f0a6..b24f02d269be 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -18,18 +18,6 @@ struct hvm_domain uint64_t params[HVM_NR_PARAMS]; }; -#ifdef CONFIG_ARM_64 -enum domain_type { - DOMAIN_32BIT, - DOMAIN_64BIT, -}; -#define is_32bit_domain(d) ((d)->arch.type == DOMAIN_32BIT) -#define is_64bit_domain(d) ((d)->arch.type == DOMAIN_64BIT) -#else -#define is_32bit_domain(d) (1) -#define is_64bit_domain(d) (0) -#endif - /* * Is the domain using the host memory layout? * @@ -62,10 +50,6 @@ struct paging_domain { struct arch_domain { -#ifdef CONFIG_ARM_64 - enum domain_type type; -#endif - #ifdef CONFIG_ARM64_SVE /* max SVE encoded vector length */ uint8_t sve_vl; diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h index 7c3b7fde5b64..21f4273fa1b5 100644 --- a/xen/arch/arm/include/asm/kernel.h +++ b/xen/arch/arm/include/asm/kernel.h @@ -10,10 +10,6 @@ struct arch_kernel_info { -#ifdef CONFIG_ARM_64 - enum domain_type type; -#endif - /* Enable pl011 emulation */ bool vpl011; }; diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 7544fd50a20f..9395b5af8745 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -100,8 +100,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) const struct membanks *mem = kernel_info_get_mem(info); paddr_t load_addr; -#ifdef CONFIG_ARM_64 - if ( (info->arch.type == DOMAIN_64BIT) && (info->zimage.start == 0) ) +#ifdef CONFIG_HAS_DOMAIN_TYPE + if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) return mem->bank[0].start + info->zimage.text_offset; #endif @@ -268,14 +268,14 @@ int __init kernel_uimage_probe(struct kernel_info *info, info->load = kernel_zimage_load; -#ifdef CONFIG_ARM_64 +#ifdef CONFIG_HAS_DOMAIN_TYPE switch ( uimage.arch ) { case IH_ARCH_ARM: - info->arch.type = DOMAIN_32BIT; + info->type = DOMAIN_32BIT; break; case IH_ARCH_ARM64: - info->arch.type = DOMAIN_64BIT; + info->type = DOMAIN_64BIT; break; default: printk(XENLOG_ERR "Unsupported uImage arch type %d\n", uimage.arch); @@ -345,7 +345,7 @@ static int __init kernel_zimage64_probe(struct kernel_info *info, info->load = kernel_zimage_load; - info->arch.type = DOMAIN_64BIT; + info->type = DOMAIN_64BIT; return 0; } @@ -396,8 +396,8 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, info->load = kernel_zimage_load; -#ifdef CONFIG_ARM_64 - info->arch.type = DOMAIN_32BIT; +#ifdef CONFIG_HAS_DOMAIN_TYPE + info->type = DOMAIN_32BIT; #endif return 0; diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 0a20aa0a1249..5ff71480eebe 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -128,6 +128,9 @@ config HAS_DEVICE_TREE_DISCOVERY config HAS_DOM0LESS bool +config HAS_DOMAIN_TYPE + bool + config HAS_DIT # Data Independent Timing bool diff --git a/xen/include/xen/dom0less-build.h b/xen/include/xen/dom0less-build.h index faaf660424b2..4118dec76c0a 100644 --- a/xen/include/xen/dom0less-build.h +++ b/xen/include/xen/dom0less-build.h @@ -57,8 +57,6 @@ int init_vuart(struct domain *d, struct kernel_info *kinfo, int make_intc_domU_node(struct kernel_info *kinfo); int make_arch_nodes(struct kernel_info *kinfo); -void set_domain_type(struct domain *d, struct kernel_info *kinfo); - int init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt); diff --git a/xen/include/xen/domain.h b/xen/include/xen/domain.h index 93c0fd00c1d7..a095190fc71a 100644 --- a/xen/include/xen/domain.h +++ b/xen/include/xen/domain.h @@ -13,6 +13,19 @@ struct guest_area { void *map; }; +#ifdef CONFIG_HAS_DOMAIN_TYPE +enum __packed domain_type { + DOMAIN_32BIT, + DOMAIN_64BIT, +}; +#define is_32bit_domain(d) ((d)->type == DOMAIN_32BIT) +#define is_64bit_domain(d) ((d)->type == DOMAIN_64BIT) +#elif !defined(CONFIG_64BIT) +/* At the moment on 32-bit-only platforms all domains are 32-bit. */ +#define is_32bit_domain(d) true +#define is_64bit_domain(d) false +#endif + #include typedef union { diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 0d40d8cfa105..9465a1021fe3 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -7,6 +7,7 @@ #include #include #include +#include #include struct domain; @@ -69,6 +70,15 @@ static inline uint32_t alloc_phandle(struct kernel_info *kinfo) return kinfo->next_phandle >= GUEST_PHANDLE_GIC ? 0 : kinfo->next_phandle++; } +static inline void set_domain_type(struct domain *d, const struct kernel_info *kinfo) +{ +#ifdef CONFIG_HAS_DOMAIN_TYPE + /* Type must be set before allocating memory. */ + ASSERT(!domain_tot_pages(d)); + d->type = kinfo->type; +#endif +} + #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */ /* diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 4d0467bb396a..86a37a13048b 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -9,6 +9,7 @@ #include #include +#include #include #if __has_include() @@ -65,6 +66,10 @@ struct kernel_info { } zimage; }; +#ifdef CONFIG_HAS_DOMAIN_TYPE + enum domain_type type; +#endif + #if __has_include() struct arch_kernel_info arch; #endif diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 212c7d765c3e..00db1da12f21 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -386,6 +386,10 @@ struct domain { domid_t domain_id; +#ifdef CONFIG_HAS_DOMAIN_TYPE + enum domain_type type; +#endif + unsigned int max_vcpus; uint64_t unique_id; /* Unique domain identifier */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302326.1576276 (Exim 4.92) (envelope-from ) id 1wKuZV-00028G-OH; Thu, 07 May 2026 08:59:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302326.1576276; Thu, 07 May 2026 08:59:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZV-000289-LR; Thu, 07 May 2026 08:59:05 +0000 Received: by outflank-mailman (input) for mailman id 1302326; Thu, 07 May 2026 08:59:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZU-00027t-Bm for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZT-002y5h-Da for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:03 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc544c-2eae-0a2a0a5409dd-0a2a450c9c00-48 for ; Thu, 07 May 2026 10:59:03 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5457-62f1-0a2a450c0019-d155da30a85d-3 for ; Thu, 07 May 2026 10:59:03 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc1f0830f44so329020366b.0 for ; Thu, 07 May 2026 01:59:03 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This patch series is rebased on top of patch "xen: introduce CONFIG_HAS_DOMAIN_TYPE" but there is no any technical dependency. CI: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2506574229 --- Changes in v5: - Merged to upstream staging: xen/riscv: implement get_page_from_gfn() - Address other comments from ML. --- Changes in v4: - Move patch up, closer to other common/Arm related patches: - xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() - xen: move declaration of fw_unreserved_regions() to common header - xen: move domain_use_host_layout() to common header - xen: rename p2m_ipa_bits to p2m_gpa_bits - Merged to upstream/staging: xen/riscv: implement get_page_from_gfn() - Rebase this patch series on top of [PATCH v3 0/3] dom0less: various updates. - Address the comments from ML. --- Changes in v3: - Address the comments from ML. --- Changes in v2: - Address the comments from ML. - Introduce some new patches to make dom0less solution more architecture indepenent from terminology point of view. - Minor fixes. --- Oleksii Kurochko (11): xen: arm: fix len type for guest copy functions xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() xen: move declaration of fw_unreserved_regions() to common header xen: introduce domain-layout.h with common domain_use_host_layout() xen/device-tree: use p2m_gpa_bits in common code xen/riscv: implement copy_to_guest_phys() xen/riscv: add Linux kernel loading support xen/riscv: rework G-stage mode handling xen/riscv: introduce p2m_gpa_bits xen/riscv: add definition of guest RAM banks xen/riscv: enable DOMAIN_BUILD_HELPERS xen/arch/arm/domain_build.c | 1 + xen/arch/arm/guestcopy.c | 6 +- xen/arch/arm/include/asm/domain.h | 14 -- xen/arch/arm/include/asm/guest_access.h | 2 +- xen/arch/arm/include/asm/p2m.h | 2 + xen/arch/arm/include/asm/setup.h | 3 - xen/arch/arm/kernel.c | 50 ++--- xen/arch/arm/vgic-v3.c | 1 + xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/Makefile | 3 + xen/arch/riscv/dom0less-build.c | 71 ++++++ xen/arch/riscv/guestcopy.c | 116 ++++++++++ xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/guest-layout.h | 23 ++ xen/arch/riscv/include/asm/guest_access.h | 7 + xen/arch/riscv/include/asm/p2m.h | 21 +- xen/arch/riscv/include/asm/paging.h | 1 + xen/arch/riscv/kernel.c | 249 ++++++++++++++++++++++ xen/arch/riscv/p2m.c | 134 ++++++++---- xen/arch/riscv/vmid.c | 2 +- xen/common/device-tree/domain-build.c | 3 +- xen/common/device-tree/kernel.c | 2 +- xen/include/public/arch-riscv.h | 5 + xen/include/xen/bootinfo.h | 4 + xen/include/xen/domain-layout.h | 28 +++ xen/include/xen/fdt-domain-build.h | 2 +- xen/include/xen/fdt-kernel.h | 17 +- 28 files changed, 683 insertions(+), 99 deletions(-) create mode 100644 xen/arch/riscv/dom0less-build.c create mode 100644 xen/arch/riscv/guestcopy.c create mode 100644 xen/arch/riscv/include/asm/guest-layout.h create mode 100644 xen/arch/riscv/kernel.c create mode 100644 xen/include/xen/domain-layout.h -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302327.1576286 (Exim 4.92) (envelope-from ) id 1wKuZX-0002Md-3O; Thu, 07 May 2026 08:59:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302327.1576286; Thu, 07 May 2026 08:59:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZW-0002MO-Vx; Thu, 07 May 2026 08:59:06 +0000 Received: by outflank-mailman (input) for mailman id 1302327; Thu, 07 May 2026 08:59:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZV-000288-Ov for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZV-00CM1g-5g for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:05 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-5cb7-0a2a0a5109dd-0a2a45019b40-14 for ; Thu, 07 May 2026 10:59:05 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5458-c1f2-0a2a45010019-d155da35dd29-3 for ; Thu, 07 May 2026 10:59:05 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-b9358bc9c50so97041766b.1 for ; Thu, 07 May 2026 01:59:04 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:03 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144344; x=1778749144; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XAueRDBVOniME+t2o7j9YqeJvqQdzKajUlr2rc4WITOfbKzQCQ5p66mrwjyVSYhpCv ACPvdWAr41sqPunhIh5IAoSyIpbM3DqKa4eAKgPUd9v09I1s8gOd74m+ejbOh7EPQ5v9 saMKo2GENGJOa3QRWVAQI+Sd1bNzTV+i11/BJNwdfN+eZMu5HKmqob6IBjg+T/CTfdtm dsVK/IdQytQFScY00oORXkXRfZbIQ3xIqT1o8XCMbs1oq6Z1MJNwkQ2J3XuR7Fhsuk0t cikfbxxoMcekpUueCTNcLkFM9bg2UB+ScI9pZ2Yeyh5LkYtHaB1aVpzbU1mhFCcTpdPA H2ZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144344; x=1778749144; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=ElKZ0H6u/sSoXuky68q5cjnp17vaVqQmV7qTVsC1O8w=; b=XU1hoNUieTgwu+d52eT1/uhZBEI1bjjvll13z0ZTBj4iHWMilrP+VDjLYT2s/+MtvU bD82QNnNZaWLssM0Wu1OtUCG84B2wu7vjVW1DF/RUK9pVDWtJvd2gGiJ/BXOF9m2F7HT 4Zdnjom2/pFpIsSE6wuS+mGE/DDq2FquQxjXIqHTw+vYfrMGJ+GjENFd0u1hWAWbWEyM NfvLlKyi5yLjRyeXAjTIPETOIViAXPhLdoW8/NWbMRQB9gDaARvBtB72Swz1Vd+0/5e1 OH2znqrUR801XaCcxt0PbZ+WkzfJKjT50r1V2A5Rc5z5zNLHD4e7yCWJ566mHSYZFOxw t8HQ== X-Gm-Message-State: AOJu0YwM1aVZkzPmyS/fPsWAhBLNMHJcY0XiPQlv3Zu4/i1W8xRm++7w mZjEZjD6gjbntnBZVOJn3wXGFxngaKAvdoGLwLltMUeliLSCFoM846+0c20V/Q== X-Gm-Gg: AeBDietYABACMO+/w+OfP0G3kH5KwPOXdtSMjMoVkvW+bmh+Cj02ANynOEd3uT0I6Qw HjVI+9GSAnixurztPKzpWcB9xF+F8p2A31dSGomt9jfwh/z9lTubVdfD6dM/ydZuqkI+QOsIpiQ mgp4LgBVaRHedO/Gr/KNAMAkl8/NkFh4koAiFcSSucZr7O4noljX5j98kQIciOWpqORWRwzsHIU JQSuJ1JIMWYyl+DRMf+v0JzI2dyyd58cXIU27JrqJmK3q6HNA3Eom037Me+/j5TO7N7eAdCsRDf 6fnL3cXYps1dOePH3/J62IfJF8+T5pTVsmFlh3XbXdPk7ojXNZeQeE//3dzyfC6rJS2H/UVHw9y 5gYCNxHguFAygyC/jmMKDHAYQgBE2NU5fbLZOCSuBGwR6/W1aokiNZ4aGoSID7mk2Q2hFgyNgk4 zlL9iAfB2GAor78Ecne5NgcgDnjZbfBi3xtxVE4gBRIzlik8E5wV9fr2va7W/jqnJlM2jRnYdP0 frmw4oOv6nMpXpbKkG71XWAyg== X-Received: by 2002:a17:907:3cc7:b0:bc4:aafa:65cf with SMTP id a640c23a62f3a-bc56c92bfc1mr415473166b.16.1778144343898; Thu, 07 May 2026 01:59:03 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 01/11] xen: arm: fix len type for guest copy functions Date: Thu, 7 May 2026 10:58:40 +0200 Message-ID: <6f629fe2e194382534d3b1e2400b753c43ccb04b.1778140240.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778144345-AEF58FF4-33AE15F9/10/73395122804 X-purgate-type: spam X-purgate-size: 5531 Widen the len argument of copy_to_guest_phys_flush_dcache() and the copy_to_guest_phys_cb typedef from unsigned int to unsigned long, as the function can be used to copy large blobs such as the initrd which may exceed 4GB. Update the internal copy_guest() len argument to unsigned long accordingly. Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. raw_* wrappers above copy_guest() keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe and there is no raw_* users who are using a value bigger than what can fit into 'unsigned int'. Fixes: 2986481b3d9e6 ("xen/arm: guest_copy: Extend the prototype to pass the vCPU") Fixes: 5302bd490bea7 ("xen/arm: Introduce copy_to_guest_phys_flush_dcache") Fixes: d07b7369aa65b ("xen/common: dom0less: introduce common domain-build.c") Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich Reviewed-by: Luca Fancellu --- Changes in v5: - Add Review-by: Reviewed-by: Luca Fancellu --- Changes in v4: - Add Fixes: tags. - Add "arm:" prefix to commit subject. - Add Reviewed-by: Jan Beulich . - Avoid using of min_t. --- Changes in v3: - Correct the declaration of copy_to_guest_phys_cb() instead of return 'unsigned int' to be in sync with len argument, the type of len argument is changed on 'unsigned long' as initrd could be pretty big and also its size is stroed in 'paddr_t' which is 'unsigned long'. - Update copy_guest() prototype to avoid trancation bug for len argument. - Revert prototype changes for raw_* wrappers above copy_guest() as they should keep returning unsigned long to avoid type narrowing; it is not an issue for raw_*'s len argument to remain 'unsigned int' since the assignment to copy_guest()'s wider unsigned long parameter is safe. - Change the type for local variable size in copy_guest() to avoid compilation error because of type mismatch. - Add Reported-by: Jan Beulich --- Changes in v2: - New patch. --- --- xen/arch/arm/guestcopy.c | 6 +++--- xen/arch/arm/include/asm/guest_access.h | 2 +- xen/include/xen/fdt-domain-build.h | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/guestcopy.c b/xen/arch/arm/guestcopy.c index fdb06422b8e9..86f1c9d0e318 100644 --- a/xen/arch/arm/guestcopy.c +++ b/xen/arch/arm/guestcopy.c @@ -53,7 +53,7 @@ static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, return page; } -static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long len, copy_info_t info, unsigned int flags) { /* XXX needs to handle faults */ @@ -65,7 +65,7 @@ static unsigned long copy_guest(void *buf, uint64_t addr, unsigned int len, while ( len ) { void *p; - unsigned int size = min(len, (unsigned int)PAGE_SIZE - offset); + unsigned long size = min(len, PAGE_SIZE + 0UL - offset); struct page_info *page; page = translate_get_page(info, addr, flags & COPY_linear, @@ -136,7 +136,7 @@ unsigned long raw_copy_from_guest(void *to, const void __user *from, unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len) + unsigned long len) { return copy_guest(buf, gpa, len, GPA_INFO(d), COPY_to_guest | COPY_ipa | COPY_flush_dcache); diff --git a/xen/arch/arm/include/asm/guest_access.h b/xen/arch/arm/include/asm/guest_access.h index 18c88b70d7ec..c13cbec55b65 100644 --- a/xen/arch/arm/include/asm/guest_access.h +++ b/xen/arch/arm/include/asm/guest_access.h @@ -14,7 +14,7 @@ unsigned long raw_clear_guest(void *to, unsigned int len); unsigned long copy_to_guest_phys_flush_dcache(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); int access_guest_memory_by_gpa(struct domain *d, paddr_t gpa, void *buf, uint32_t size, bool is_write); diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 9465a1021fe3..671486c1c837 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -48,7 +48,7 @@ static inline int get_allocation_size(paddr_t size) typedef unsigned long (*copy_to_guest_phys_cb)(struct domain *d, paddr_t gpa, void *buf, - unsigned int len); + unsigned long len); void initrd_load(struct kernel_info *kinfo, copy_to_guest_phys_cb cb); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302328.1576295 (Exim 4.92) (envelope-from ) id 1wKuZZ-0002bh-AA; Thu, 07 May 2026 08:59:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302328.1576295; Thu, 07 May 2026 08:59:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZZ-0002ba-6b; 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144346; x=1778749146; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=CC8UBS6Zy2QL7cIqe6RcQJfEPkAYFSy+Fv6UxgljNiHPOhhCJNK4T0vmxMF1l+X8xX 51wgz9qCpj2WOwxlBvrlflDS3O9dObR46KUU/d7mnM4se/uLQ0T4JUhG6JU+Kukry+d3 AuYPKugzTGdIIx678ZstFSXTQn0NF4o7SZs6rfIhqvUFl86W7T5/GlgMFzDZEG2yqG8N /MsBtjn6Xb8VL4PAuJhyzOCRzTflz6Aj4fxnL5iZFEl26WwlUIZEbmCq48l7c6KnXvZU LBYescws0h1vhoySPVZaIR7Shdb9PpYk8Ad5/FhIs0pbzVL+I0l8c17pjX3/5jTvK+xd rRIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144346; x=1778749146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=zc+/+WleWFSSpgrbZyRd8P0UB3Xb83BOo+6OlRzrn70=; b=hnTDetYd3KowvrYeV5HQiQAyx3oEPIybVB9BacPbiuqpNcH0ZOp85jcvtBOnLtL8vc HZMaqzSRJzUGjvMcnILfz47PZJtTb/ut7e0by82E3Pk+8ygDHMUMLeT2NKEgIPyJHFEY N7soqYcy2QHsmgajrKYmy/vQQrZwma3LmOQjSuWRFQhZIgi5H/owigdVDUD2wKYEFFWI ptEM5JQsf4tlITNEWfrOCDXqrr2wFnDlohjpDSo/IAJ/latB1arFpAJG49e80Y0oqHgS +5mhfkF02Gp5w14omL6Pjyb1xWtNDSlkAyXbTAvwu5nyvml8rgAvF0LYfNcyjEY8GWtH Od8A== X-Gm-Message-State: AOJu0Yxxg0CJb1c4k6HbXBs8DD7fLzfUk6WFiG7S87b8DJbcFp0vk9RB 08ZP5nMZ59Yts+AGeZ3+CH1f+EBNQ5dCujkAkZ02kuHsepymNXJ9TioqhSKalQ== X-Gm-Gg: AeBDietuIs20j1if5GSAcribvIpTRDssi/MUvP6mRDoXSbvAgttv/3hynMTJ9cx87bG lPaUAxNTd2S+mSei0DleJ5neKjf63qK6bbce4ZHXZuA7U4z3gnMHFdUzQukxUGOz0XgCVJLpz/M 6oCwjXzjKyZkuxdxw0FaZR7cBsxdQ07LxcARYW2xptXOeOba7Im/dKFMBcMTc2KkJPGnJbgBles UpQuQ1Zm/eAUb8FwS2MxCY8EDSQl4529nKSQojHbB4EQ1jJvyIgJgMtPc0Gb2PkHT4+KryB8tl9 0vzPvTD5MhBKXr7ww7htBQd9zMXhrkZOP3U6VGkJcRmH88379g1F9I8VhPv+ZLu/J0X1TStr70d 1QSR7d86G6KEA7V0m63x9LTeR2ghX5LlgQ3R1F4xWylJV9bdirsgj1PPxOddRFDQRxlw4HFAEOx 1qcO6M/lIdr2PHbS+ZRO9x3bt+Lb2x5cAV8SwyMnq4kIht3xze4qUV3x6gtbQ3nxGjS9ji68lMa BZs X-Received: by 2002:a17:907:c18:b0:bb8:b536:55dd with SMTP id a640c23a62f3a-bc56d713f3bmr418780266b.41.1778144345375; Thu, 07 May 2026 01:59:05 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Luca Fancellu Subject: [PATCH v5 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() Date: Thu, 7 May 2026 10:58:41 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778144346-72B778B7-8E0966E5/10/73395122804 X-purgate-type: spam X-purgate-size: 8345 The helper kernel_zimage_probe() is referenced from common code (xen/common/device-tree/kernel.c), but its name is tied to the zImage format which is specific to Arm (from architectures supported by Xen). Other architectures supported by Xen, such as RISC-V, do not use the zImage format and instead rely on other kernel image types (e.g. Image or compressed Image variants: Image.gz, etc). Using "zimage" in the name is therefore misleading in architecture-independent code. Rename kernel_zimage_probe() to kernel_image_probe() and update the associated structure field from "zimage" to "image" to reflect that the code handles generic kernel images rather than the zImage format specifically. No functional change intended. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in v5: - s/zimage/image in some comments. --- Changes in v3-4: - Nothing changed. Only rebase. --- Changes in v2: - new patch. --- --- xen/arch/arm/kernel.c | 50 ++++++++++++++++----------------- xen/common/device-tree/kernel.c | 2 +- xen/include/xen/fdt-kernel.h | 6 ++-- 3 files changed, 29 insertions(+), 29 deletions(-) diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index 9395b5af8745..b72585b7fed3 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -101,8 +101,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) paddr_t load_addr; #ifdef CONFIG_HAS_DOMAIN_TYPE - if ( (info->type == DOMAIN_64BIT) && (info->zimage.start == 0) ) - return mem->bank[0].start + info->zimage.text_offset; + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) + return mem->bank[0].start + info->image.text_offset; #endif /* @@ -111,19 +111,19 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) * and above 32MiB. Load it as high as possible within these * constraints, while also avoiding the DTB. */ - if ( info->zimage.start == 0 ) + if ( info->image.start == 0 ) { paddr_t load_end; load_end = mem->bank[0].start + mem->bank[0].size; load_end = MIN(mem->bank[0].start + MB(128), load_end); - load_addr = load_end - info->zimage.len; + load_addr = load_end - info->image.len; /* Align to 2MB */ load_addr &= ~((2 << 20) - 1); } else - load_addr = info->zimage.start; + load_addr = info->image.start; return load_addr; } @@ -131,8 +131,8 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) static void __init kernel_zimage_load(struct kernel_info *info) { paddr_t load_addr = kernel_zimage_place(info); - paddr_t paddr = info->zimage.kernel_addr; - paddr_t len = info->zimage.len; + paddr_t paddr = info->image.kernel_addr; + paddr_t len = info->image.len; void *kernel; int rc; @@ -215,7 +215,7 @@ int __init kernel_uimage_probe(struct kernel_info *info, return -EOPNOTSUPP; } - info->zimage.start = be32_to_cpu(uimage.load); + info->image.start = be32_to_cpu(uimage.load); info->entry = be32_to_cpu(uimage.ep); /* @@ -224,20 +224,20 @@ int __init kernel_uimage_probe(struct kernel_info *info, * independent image. That means Xen is free to load such an image at * any valid address. */ - if ( info->zimage.start == 0 ) + if ( info->image.start == 0 ) printk(XENLOG_INFO "No load address provided. Xen will decide where to load it.\n"); else printk(XENLOG_INFO "Provided load address: %"PRIpaddr" and entry address: %"PRIpaddr"\n", - info->zimage.start, info->entry); + info->image.start, info->entry); /* * If the image supports position independent execution, then user cannot * provide an entry point as Xen will load such an image at any appropriate * memory address. Thus, we need to return error. */ - if ( (info->zimage.start == 0) && (info->entry != 0) ) + if ( (info->image.start == 0) && (info->entry != 0) ) { printk(XENLOG_ERR "Entry point cannot be non zero for PIE image.\n"); @@ -257,13 +257,13 @@ int __init kernel_uimage_probe(struct kernel_info *info, if ( rc ) return rc; - info->zimage.kernel_addr = mod->start; - info->zimage.len = mod->size; + info->image.kernel_addr = mod->start; + info->image.len = mod->size; } else { - info->zimage.kernel_addr = addr + sizeof(uimage); - info->zimage.len = len; + info->image.kernel_addr = addr + sizeof(uimage); + info->image.len = len; } info->load = kernel_zimage_load; @@ -287,9 +287,9 @@ int __init kernel_uimage_probe(struct kernel_info *info, * header. In other words if the user provides a uImage header on top of * zImage or zImage64 header, Xen uses the attributes of uImage header only. * Thus, Xen uses uimage.load attribute to determine the load address and - * zimage.text_offset is ignored. + * image.text_offset is ignored. */ - info->zimage.text_offset = 0; + info->image.text_offset = 0; #endif return 0; @@ -338,10 +338,10 @@ static int __init kernel_zimage64_probe(struct kernel_info *info, if ( (end - start) > size ) return -EINVAL; - info->zimage.kernel_addr = addr; - info->zimage.len = end - start; - info->zimage.text_offset = zimage.text_offset; - info->zimage.start = 0; + info->image.kernel_addr = addr; + info->image.len = end - start; + info->image.text_offset = zimage.text_offset; + info->image.start = 0; info->load = kernel_zimage_load; @@ -389,10 +389,10 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, } } - info->zimage.kernel_addr = addr; + info->image.kernel_addr = addr; - info->zimage.start = start; - info->zimage.len = end - start; + info->image.start = start; + info->image.len = end - start; info->load = kernel_zimage_load; @@ -403,7 +403,7 @@ static int __init kernel_zimage32_probe(struct kernel_info *info, return 0; } -int __init kernel_zimage_probe(struct kernel_info *info, paddr_t addr, +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t size) { int rc; diff --git a/xen/common/device-tree/kernel.c b/xen/common/device-tree/kernel.c index 28096121a52d..cfa27464f0fc 100644 --- a/xen/common/device-tree/kernel.c +++ b/xen/common/device-tree/kernel.c @@ -235,7 +235,7 @@ int __init kernel_probe(struct kernel_info *info, if ( rc && rc != -EINVAL ) return rc; - rc = kernel_zimage_probe(info, mod->start, mod->size); + rc = kernel_image_probe(info, mod->start, mod->size); return rc; } diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 86a37a13048b..8cd1670c2c6f 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -63,7 +63,7 @@ struct kernel_info { paddr_t text_offset; /* 64-bit Image only */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ - } zimage; + } image; }; #ifdef CONFIG_HAS_DOMAIN_TYPE @@ -113,7 +113,7 @@ kernel_info_get_mem_const(const struct kernel_info *kinfo) * Probe the kernel to detemine its type and select a loader. * * Sets in info: - * ->load hook, and sets loader specific variables ->zimage + * ->load hook, and sets loader specific variables ->image */ int kernel_probe(struct kernel_info *info, const struct dt_device_node *domain); @@ -133,7 +133,7 @@ void kernel_load(struct kernel_info *info); int kernel_decompress(struct boot_module *mod, uint32_t offset); -int kernel_zimage_probe(struct kernel_info *info, paddr_t addr, paddr_t size); +int kernel_image_probe(struct kernel_info *info, paddr_t addr, paddr_t size); /* * uImage isn't really used nowadays thereby leave kernel_uimage_probe() -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302330.1576304 (Exim 4.92) (envelope-from ) id 1wKuZb-0002t6-I0; Thu, 07 May 2026 08:59:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302330.1576304; Thu, 07 May 2026 08:59:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZb-0002sx-EO; Thu, 07 May 2026 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 1302330; Thu, 07 May 2026 08:59:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZZ-0002c8-Gl for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZY-002y66-Ta for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:08 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-bab6-0a2a0a5309dd-0a2a450ced94-18 for ; Thu, 07 May 2026 10:59:08 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545c-62f1-0a2a450c0019-d155da30b921-3 for ; Thu, 07 May 2026 10:59:08 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-b936331786dso67215866b.3 for ; Thu, 07 May 2026 01:59:08 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu --- Changes in v5: - Add Reviewed-by: Luca Fancellu . --- Changes in v2-v4: - Nothing changed. Only rebase. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/bootinfo.h | 4 ++++ 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index 899e33925ca4..0d29b46ea52b 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -43,9 +43,6 @@ int acpi_make_efi_nodes(void *fdt, struct membank tbl_add[]); void create_dom0(void); void discard_initial_modules(void); -void fw_unreserved_regions(paddr_t s, paddr_t e, - void (*cb)(paddr_t ps, paddr_t pe), - unsigned int first); void init_pdx(void); void setup_mm(void); diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index f834f1957155..dbf492c2e36e 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -210,4 +210,8 @@ static inline struct membanks *membanks_xzalloc(unsigned int nr, return banks; } +void fw_unreserved_regions(paddr_t s, paddr_t e, + void (*cb)(paddr_t ps, paddr_t pe), + unsigned int first); + #endif /* XEN_BOOTINFO_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302332.1576310 (Exim 4.92) (envelope-from ) id 1wKuZc-00030T-4o; Thu, 07 May 2026 08:59:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302332.1576310; Thu, 07 May 2026 08:59:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZb-0002zR-Vn; Thu, 07 May 2026 08:59:11 +0000 Received: by outflank-mailman (input) for mailman id 1302332; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZa-0002q9-Jj for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZa-00CM1g-0R for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:10 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5457-5cb7-0a2a0a5109dd-0a2a45019b40-36 for ; Thu, 07 May 2026 10:59:09 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc545d-c1f2-0a2a45010019-d155da31a8e7-3 for ; Thu, 07 May 2026 10:59:09 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-bc1f0830f44so329054066b.0 for ; Thu, 07 May 2026 01:59:09 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bc81d5e9583sm57549966b.17.2026.05.07.01.59.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 May 2026 01:59:08 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778144349; x=1778749149; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yM+vLILbE6Jc00UTwsrRi/KBPqAZVlEYVO70OjvNObQ=; b=rf55Qbtn8FqUcg0DvITB5nEH3I0tTdTzQre1pTWb4hTfnnvl4xnuJCVcjoT8CcIRxr Wp1lJvl8ff9wA7TsC2vIDHmhiTo7pefqMm372iIE+WwW3bqhcFZS9zdf5b55sUOUkLHR bjOUkahdLZFpSDRkyk133MFRFX3hsUE0yzID6MWnTDNxKz7Bq+ElV9ZOXTPjnpgtc/o7 Yl5ASPx4nuxbrgGo7GEFfZJah/cUhg5Xc5b4AjDnd+OeTNUYMCwrFTxt2bWCa1l2W47Q CUP2NY9QXizhoeNIOYMg931ikggKygwJ7U98b7IGOtnT/Gls6M6I5ealm6rks9N+sO2R WXBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778144349; x=1778749149; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=yM+vLILbE6Jc00UTwsrRi/KBPqAZVlEYVO70OjvNObQ=; b=Yu4okDBODMv33xzWBLtLf6qWP6tRq9No0SsII+QqP1nkTkSb6Lnen3qJ6c9UTfojbz /cKPPz52tcjqDZqe9+r8t5YTwezsGjyOH8T+bNgJw2OGMYZ55VBAqU6N4iYo9IWtIedM ywEwoZWjUp877JR1QMuO8ElVdz/ikBVeSaKBfyJsmBFF644UWdx3gXNzvXrDy16VGsNx hFrNcRMWobCkunCTa9R9QyHAGC8LQDBDXSTnk4ya6BwnJXgyVzqI2fY+HShZrLSp/XYU G8PFCYl2KP0yf5NHFka0pZBsFsnL2BYiKRym1WK7qZuNOJduv/SO+1+j8UO87wY7beXf 7Vlw== X-Gm-Message-State: AOJu0Yz0Ue1yKkvgAzLEaeo7Pg50Cl0UCeQqUacXfQ1z7oAHviR7BWfJ bzcvKVitdUx3uULpVxZhGU6g4KbcWurhKOimmNx2VS3Zyu9eWF3NmOmezGnBlg== X-Gm-Gg: AeBDievw9t5gcD2WoGvI7B+amy+4x7uIvl0DdlUUbZwTh3J9fg0XIT2Nk7zGaMRCZAr rrsZCa4np66TsZD+VGrYNVja4/YgKsasp/8avPb35hiOC2Fhwr8kgpOIjLUaz7tovq9j3gcbQcx HVDbO2X4XUDJF4DGxW+Gd0x4qLbVPSlchd9WAZBK1QZPy+bp7gU0RstTtemmHa0ca8t+R3z83WZ 8bccRpJtlE0z1hz/SzxejvuoSNS1kWxwpOH+cSt5elH7axrRFY/qJ57NUqI3qLDbloQbE31/m7V 8F5FO0Kw7VBwO/Llpezxt+4fhuG1KFIdwBTrXetgy1IWXdURC99DG5pDKulUAEv4tyCcbWMtm0o QPMehxIyky++Ap/EVoyS42YdgCPpSQWnEbMh1TDqU7aea1wTbviCeBr9fHC1sXu1S0Urzpnq44G eYDxCwxpiFdWkS/PyKxB76ykUfUyRup7g2byVY2Woqm+t2Ffawmdh1OE8FmkWGttEBAc9QQbQuF x8p X-Received: by 2002:a17:907:6d1e:b0:ba3:7d65:c373 with SMTP id a640c23a62f3a-bc85c2b36demr103325966b.10.1778144348790; Thu, 07 May 2026 01:59:08 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Alistair Francis , Connor Davis , Luca Fancellu Subject: [PATCH v5 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() Date: Thu, 7 May 2026 10:58:43 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778144349-AD545FF4-EF64164F/10/73395122804 X-purgate-type: spam X-purgate-size: 6850 domain_use_host_layout() is not architecture-specific and may be needed on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common static inline in a new dedicated header, xen/domain-layout.h. xen/domain.h would be the natural home, but placing it there would require including xen/paging.h (for paging_mode_translate()) and xen/sched.h (for is_hardware_domain()), which would introduce circular dependencies. A separate header that callers opt into avoids this. Adjust the implementation to take paging_mode_translate() into account so it works correctly for all architectures, including x86. Some extra details about implementation [2] and [3]. To avoid the following compilation issue: In file included from ./include/xen/paging.h:4, from ./include/xen/domain-layout.h:6, from common/device-tree/domain-build.c:4: ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' declared inside parameter list will not be visible outside of this definition or declaration [-Werror] 17 | void paging_free_page(struct domain *d, struct page_info *pg); add the forward declaration of struct page_info to RISC-V's asm/paging.h. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ Suggested-by: Stefano Stabellini Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Add /* SPDX-License-Identifier: GPL-2.0-only */ to xen/domain-layout.h. - s/__XEN_DOMAIN_LAYOUT_H__/XEN_DOMAIN_LAYOUT_H. - Drop inclusion of xen/domain.h as it is included in xen/sched.h. - Add forward declaration of page_info in asm/paging.h to fix compilation issue occured after drop inclusion of xen/domain.h. - Add Acked-by: Jan Beulich . --- Changes in v4: - Update the comment above domain_use_host_layout(). --- Changes in v3: - Make argument of domain_use_host_layout() const. - Create a separate header to avoid circular heder dependecy and making domain_use_host_layour() as static inline. - Rework domain_use_host_layout() to be protected by paging_mode_translate(). - Update the commit message. --- Changes in v2: - Drop ifdef around defintion of domain_use_host_layout() as it was suggested generic version. It could be returned back when the real use case for it will appear. - Add Suggested-by: and update the commit message. - Make domain_use_host_layout() function instead of macros to avoid ciclular header dependecies. Look at more details in the commit message. --- xen/arch/arm/domain_build.c | 1 + xen/arch/arm/include/asm/domain.h | 14 -------------- xen/arch/arm/vgic-v3.c | 1 + xen/arch/riscv/include/asm/paging.h | 1 + xen/common/device-tree/domain-build.c | 1 + xen/include/xen/domain-layout.h | 28 +++++++++++++++++++++++++++ 6 files changed, 32 insertions(+), 14 deletions(-) create mode 100644 xen/include/xen/domain-layout.h diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index ad665cd3c045..1efddc60ef0a 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2,6 +2,7 @@ #include #include #include +#include #include #include #include diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..46a5cdc0c800 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -18,20 +18,6 @@ struct hvm_domain uint64_t params[HVM_NR_PARAMS]; }; -/* - * Is the domain using the host memory layout? - * - * Direct-mapped domain will always have the RAM mapped with GFN == MFN. - * To avoid any trouble finding space, it is easier to force using the - * host memory layout. - * - * The hardware domain will use the host layout regardless of - * direct-mapped because some OS may rely on a specific address ranges - * for the devices. - */ -#define domain_use_host_layout(d) (is_domain_direct_mapped(d) || \ - is_hardware_domain(d)) - struct vtimer { struct vcpu *v; int irq; diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77aab5c3c293..77517c303061 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index c1d225d02b50..e487c89a4ccd 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -4,6 +4,7 @@ #include struct domain; +struct page_info; int paging_domain_init(struct domain *d); diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index c51520ebadf9..6949203dacdc 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include +#include #include #include #include diff --git a/xen/include/xen/domain-layout.h b/xen/include/xen/domain-layout.h new file mode 100644 index 000000000000..cc5e56c9da47 --- /dev/null +++ b/xen/include/xen/domain-layout.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_DOMAIN_LAYOUT_H +#define XEN_DOMAIN_LAYOUT_H + +#include +#include + +/* + * Is a domain using the host memory layout? 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No functional changes. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko Reviewed-by: Luca Fancellu --- Changes in v5: - Rephraze commit subject. - Reviewed-by: Luca Fancellu . --- Changes in v4: - Nothing changed only rebase. --- Changes in v3: - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of changes clearer and keep using Arm-specific terminolgy inside Arm code. --- Changes in v2: - New patch. --- --- xen/arch/arm/include/asm/p2m.h | 2 ++ xen/common/device-tree/domain-build.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..7957dbd96e57 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -14,6 +14,8 @@ /* Holds the bit size of IPAs in p2m tables. */ extern unsigned int p2m_ipa_bits; +#define p2m_gpa_bits p2m_ipa_bits + #define MAX_VMID_8_BIT (1UL << 8) #define MAX_VMID_16_BIT (1UL << 16) diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 6949203dacdc..2a760b007b57 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -221,7 +221,7 @@ int __init find_unallocated_memory(const struct kernel_info *kinfo, } start = 0; - end = (1ULL << p2m_ipa_bits) - 1; + end = (1ULL << p2m_gpa_bits) - 1; res = rangeset_report_ranges(unalloc_mem, PFN_DOWN(start), PFN_DOWN(end), cb, free_regions); if ( res ) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302336.1576330 (Exim 4.92) (envelope-from ) id 1wKuZf-0003ft-K4; Thu, 07 May 2026 08:59:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302336.1576330; Thu, 07 May 2026 08:59:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZf-0003fe-H9; Thu, 07 May 2026 08:59:15 +0000 Received: by outflank-mailman (input) for mailman id 1302336; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZd-0003LL-Gs for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZc-002yCt-Sp for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:12 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545c-2eae-0a2a0a5409dd-0a2a4508d59a-10 for ; Thu, 07 May 2026 10:59:12 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5460-63b5-0a2a45080019-d155da2bcd56-3 for ; Thu, 07 May 2026 10:59:12 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bb962ce4dcfso87521966b.1 for ; Thu, 07 May 2026 01:59:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add a generic copy_guest() helper for copying to and from guest physical (and potentially virtual addresses in the future), and implement translate_get_page() to translate a guest physical address into a struct page_info via the domain p2m. Compared to the Arm code: - Drop COPY_flush_dcache(), as no such use cases exist on RISC-V. - Do not implement the linear mapping case, which is currently unused. - Use PAGE_OFFSET() to initialize the local offset variable in copy_guest(). Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Avoid using of min_t. (sync with Arm) - Add Acked-by: Jan Beulich . --- Changes in v3: - s/if (page == NULL)/if ( !page ). - Drop " - offset" for unmap_domain_page() inside copy_guest() function. unmap_domain_page() is expected to mask (or something similar) the page offset bits. - Change some types for functions as copy_to_guest_phys_cb function pointer prototype was changed too in the prev. commit. --- Changes in v2: - Use BIT() instead of open-coding. - Rename COPY_ipa to COPY_gpa. - Rename COPY_linear to COPY_gva. - Use BUG_ON(linear) instead if (lineer) + BUG_ON. - Rename arg liner to gva for translate_get_page(). - Update translate_get_page() to properly handling write argument. - Return unsigned int for copy_guest() and copy_to_guest_phys() as len function parameter is only 'unsigned int'. - Reformat function arguments for alignment --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/guestcopy.c | 116 ++++++++++++++++++++++ xen/arch/riscv/include/asm/guest_access.h | 7 ++ 3 files changed, 124 insertions(+) create mode 100644 xen/arch/riscv/guestcopy.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 04f02ad89cba..cfc3fdf7d208 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -4,6 +4,7 @@ obj-y += domain.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += extable.o +obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o diff --git a/xen/arch/riscv/guestcopy.c b/xen/arch/riscv/guestcopy.c new file mode 100644 index 000000000000..8a89212e0bea --- /dev/null +++ b/xen/arch/riscv/guestcopy.c @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#define COPY_from_guest 0U +#define COPY_to_guest BIT(0, U) +#define COPY_gpa 0U +#define COPY_gva BIT(1, U) + +typedef union +{ + struct + { + struct vcpu *v; + } gva; + + struct + { + struct domain *d; + } gpa; +} copy_info_t; + +#define GVA_INFO(vcpu) ((copy_info_t) { .gva = { vcpu } }) +#define GPA_INFO(domain) ((copy_info_t) { .gpa = { domain } }) + +static struct page_info *translate_get_page(copy_info_t info, uint64_t addr, + bool gva, bool write) +{ + p2m_type_t p2mt; + struct page_info *page; + + /* + * Not implemented yet. + * + * If gva == true, the operation will likely require a struct vcpu + * rather than just a struct domain. For this reason copy_info_t is + * already passed here instead of only struct domain. + */ + BUG_ON(gva); + + page = get_page_from_gfn(info.gpa.d, paddr_to_pfn(addr), &p2mt, P2M_ALLOC); + + if ( !page ) + return NULL; + + if ( write ? p2mt != p2m_ram_rw : !p2m_is_ram(p2mt) ) + { + put_page(page); + return NULL; + } + + return page; +} + +static unsigned long copy_guest(void *buf, uint64_t addr, unsigned long len, + copy_info_t info, unsigned int flags) +{ + unsigned int offset = PAGE_OFFSET(addr); + + BUILD_BUG_ON((sizeof(addr)) < sizeof(vaddr_t)); + BUILD_BUG_ON((sizeof(addr)) < sizeof(paddr_t)); + + while ( len ) + { + void *p; + unsigned long size = min(len, PAGE_SIZE + 0UL - offset); + struct page_info *page; + + page = translate_get_page(info, addr, flags & COPY_gva, + flags & COPY_to_guest); + if ( !page ) + return len; + + p = __map_domain_page(page); + p += offset; + if ( flags & COPY_to_guest ) + { + /* + * buf will be NULL when the caller request to zero the + * guest memory. + */ + if ( buf ) + memcpy(p, buf, size); + else + memset(p, 0, size); + } + else + memcpy(buf, p, size); + + unmap_domain_page(p); + put_page(page); + len -= size; + buf += size; + addr += size; + + /* + * After the first iteration, guest virtual address is correctly + * aligned to PAGE_SIZE. + */ + offset = 0; + } + + return 0; +} + +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len) +{ + return copy_guest(buf, gpa, len, GPA_INFO(d), + COPY_to_guest | COPY_gpa); +} diff --git a/xen/arch/riscv/include/asm/guest_access.h b/xen/arch/riscv/include/asm/guest_access.h index 7cd51fbbdead..8d679319ded0 100644 --- a/xen/arch/riscv/include/asm/guest_access.h +++ b/xen/arch/riscv/include/asm/guest_access.h @@ -2,6 +2,10 @@ #ifndef ASM__RISCV__GUEST_ACCESS_H #define ASM__RISCV__GUEST_ACCESS_H +#include + +struct domain; + unsigned long raw_copy_to_guest(void *to, const void *from, unsigned len); unsigned long raw_copy_from_guest(void *to, const void *from, unsigned len); unsigned long raw_clear_guest(void *to, unsigned int len); @@ -18,6 +22,9 @@ unsigned long raw_clear_guest(void *to, unsigned int len); #define guest_handle_okay(hnd, nr) (1) #define guest_handle_subrange_okay(hnd, first, last) (1) +unsigned long copy_to_guest_phys(struct domain *d, paddr_t gpa, void *buf, + unsigned long len); + #endif /* ASM__RISCV__GUEST_ACCESS_H */ /* * Local variables: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302338.1576340 (Exim 4.92) (envelope-from ) id 1wKuZi-00040a-8h; Thu, 07 May 2026 08:59:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302338.1576340; Thu, 07 May 2026 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZi-000401-1H; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 1302338; Thu, 07 May 2026 08:59:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZg-0003sK-OG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZg-005UsV-4q for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:16 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545f-e002-0a2a0a5209dd-0a2a4501ca64-28 for ; Thu, 07 May 2026 10:59:15 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5463-c1f2-0a2a45010019-d155da2fb86f-3 for ; Thu, 07 May 2026 10:59:15 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bc2a455fd55so84106666b.2 for ; Thu, 07 May 2026 01:59:15 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This is because the common kernel_load() in common/device-tree/kernel.c does not expect a return code. Handling errors gracefully would require a separate refactor. The implementation is based on the Xen Arm kernel loading code. text_offset is available for both 32-bit and 64-bit Image, so fix that. Signed-off-by: Oleksii Kurochko --- Changes in v5: - Introduce MODULES_ALIGNMENT and use it inside place_modules(). - Add if() to avoid underflow when modbase is calculated in the case when modules would overlap the kernel. - Drop unnessary dprintk()s. - "&& size > effective_size" in kernel_image64_probe(). - Use 'size_t' for image_size in struct kernel_info to fit both RV32 and RV64. --- Changes in v4: - Update the patch subject: add "... Linux kernel ...". - Make bi variable unsigned. And use while() instead of for(). - Update the condition which calculates overlapping of kernel with modules. - Reject a malformed image before the loop to avoid wrapping load_addr + image_size in the per-bankcheck below. - Use mathematical representation to print ranges. - Use #error instead of just returning unsupported. - Update the comment above stuct image in kernel_image64_probe(). --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/include/asm/config.h | 13 ++ xen/arch/riscv/kernel.c | 249 ++++++++++++++++++++++++++++ xen/include/xen/fdt-kernel.h | 11 +- 4 files changed, 272 insertions(+), 2 deletions(-) create mode 100644 xen/arch/riscv/kernel.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index cfc3fdf7d208..eecdcbc76867 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -8,6 +8,7 @@ obj-y += guestcopy.o obj-y += imsic.o obj-y += intc.o obj-y += irq.o +obj-y += kernel.init.o obj-y += mm.o obj-y += p2m.o obj-y += paging.o diff --git a/xen/arch/riscv/include/asm/config.h b/xen/arch/riscv/include/asm/config.h index 0613de008b13..fd69057826e1 100644 --- a/xen/arch/riscv/include/asm/config.h +++ b/xen/arch/riscv/include/asm/config.h @@ -151,6 +151,19 @@ extern unsigned long phys_offset; /* = load_start - XEN_VIRT_START */ #endif +/* + * KERNEL_LOAD_ADDR_ALIGNMENT is defined based on paragraph of + * "Kernel location" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + */ +#if defined(CONFIG_RISCV_32) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(4) +#elif defined(CONFIG_RISCV_64) +#define KERNEL_LOAD_ADDR_ALIGNMENT MB(2) +#else +#error "Define KERNEL_LOAD_ADDR_ALIGNMENT" +#endif + #endif /* ASM__RISCV__CONFIG_H */ /* * Local variables: diff --git a/xen/arch/riscv/kernel.c b/xen/arch/riscv/kernel.c new file mode 100644 index 000000000000..8580cdb32d7a --- /dev/null +++ b/xen/arch/riscv/kernel.c @@ -0,0 +1,249 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#define IMAGE64_MAGIC_V2 0x05435352 /* Magic number 2, le, "RSC\x05" */ + +/* + * Machine word alignment could be useful for copying to be more efficient. + * There is no reason for now to have bigger module alignment. + */ +#define MODULES_ALIGNMENT sizeof(unsigned long) + +static void __init place_modules(struct kernel_info *info, paddr_t kernbase, + paddr_t kernend) +{ + const struct boot_module *mod = info->bd.initrd; + const struct membanks *banks = kernel_info_get_mem_const(info); + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, + MODULES_ALIGNMENT); + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), + MODULES_ALIGNMENT); + const paddr_t modsize = initrd_len + dtb_len; + unsigned int bi = banks->nr_banks; + + if ( modsize < initrd_len ) + panic("Module size overflow: initrd + dtb size wraps paddr_t\n"); + + /* + * Place modules as high in RAM as possible, scanning banks from + * last to first so that the end of the last bank is preferred. + */ + while ( bi-- > 0 ) + { + const struct membank *bank = &banks->bank[bi]; + const paddr_t bank_end = bank->start + bank->size; + paddr_t modbase; + + if ( modsize > bank->size ) + continue; + + modbase = ROUNDDOWN(bank_end - modsize, MODULES_ALIGNMENT); + + if ( modbase < bank->start ) + continue; + + /* + * If modules would overlap the kernel, try placing them below it. + */ + if ( (modbase < ROUNDUP(kernend, MODULES_ALIGNMENT)) && + (modbase + modsize > kernbase) ) + { + /* Avoid underflow below */ + if ( kernbase < modsize ) + continue; + + modbase = ROUNDDOWN(kernbase - modsize, MODULES_ALIGNMENT); + if ( modbase < bank->start ) + continue; + } + + info->dtb_paddr = modbase; + info->initrd_paddr = modbase + dtb_len; + + return; + } + + panic("Unable to find suitable location for dtb+initrd\n"); +} + +static paddr_t __init kernel_image_place(struct kernel_info *info) +{ + paddr_t load_addr = INVALID_PADDR; + uint64_t image_size = info->image.image_size ?: info->image.len; + const struct membanks *banks = kernel_info_get_mem_const(info); + unsigned int nr_banks = banks->nr_banks; + unsigned int bi; + + /* + * At the moment, RISC-V's Linux kernel should be always position + * independent based on "Per-MMU execution" of boot.rst: + * https://docs.kernel.org/arch/riscv/boot.html#pre-mmu-execution + * + * But just for the case when RISC-V's Linux kernel isn't position + * independent it is needed to take load address from + * info->image.start. + * + * If `start` is zero, the Image is position independent. + */ + if ( likely(!info->image.start) ) + { + for ( bi = 0; bi != nr_banks; bi++ ) + { + const struct membank *bank = &banks->bank[bi]; + paddr_t bank_start = bank->start; + /* + * According to boot.rst kernel load address should be properly + * aligned: + * https://docs.kernel.org/arch/riscv/boot.html#kernel-location + * + * As Image in this case is PIC we can ignore + * info->image.text_offset. + */ + paddr_t aligned_start = ROUNDUP(bank_start, KERNEL_LOAD_ADDR_ALIGNMENT); + paddr_t bank_end = bank_start + bank->size; + paddr_t bank_size; + + if ( aligned_start > bank_end ) + continue; + + bank_size = bank_end - aligned_start; + + if ( image_size <= bank_size ) + { + load_addr = aligned_start; + break; + } + } + } + else + { + load_addr = info->image.start + info->image.text_offset; + + WARN_ON(!IS_ALIGNED(load_addr, KERNEL_LOAD_ADDR_ALIGNMENT)); + + /* + * Reject a malformed image before the loop to avoid wrapping + * load_addr + image_size in the per-bank check below by setting + * bi = nr_banks. + * + * image_size covers the kernel from _start (placed at load_addr = + * start + text_offset) through _end. The alignment gap + * [start, load_addr) is padding and need not lie within a bank. + */ + bi = image_size <= (paddr_t)-1 - load_addr ? 0 : nr_banks; + for ( ; bi != nr_banks; bi++ ) + { + const struct membank *bank = &banks->bank[bi]; + paddr_t bank_start = bank->start; + paddr_t bank_end = bank_start + bank->size; + + if ( (load_addr >= bank_start) && + (load_addr + image_size <= bank_end) ) + break; + } + } + + if ( bi == nr_banks ) + panic("Failed to place kernel image in any memory bank\n"); + + info->entry = load_addr; + + return load_addr; +} + +static void __init kernel_image_load(struct kernel_info *info) +{ + int rc; + paddr_t load_addr = kernel_image_place(info); + paddr_t paddr = info->image.kernel_addr; + paddr_t len = info->image.len; + paddr_t effective_size = info->image.image_size ?: len; + void *kernel; + + place_modules(info, load_addr, load_addr + effective_size); + + printk("Loading Image from %"PRIpaddr" to [%"PRIpaddr",%"PRIpaddr")\n", + paddr, load_addr, load_addr + effective_size); + + kernel = ioremap_cache(paddr, len); + + if ( !kernel ) + panic("Unable to map kernel\n"); + + /* Move kernel to proper location in guest phys map */ + rc = copy_to_guest_phys(info->bd.d, load_addr, kernel, len); + + if ( rc ) + panic("Unable to copy kernel to proper guest location\n"); + + iounmap(kernel); +} + +/* Check if the image is a 64-bit Image */ +static int __init kernel_image64_probe(struct kernel_info *info, + paddr_t addr, paddr_t size) +{ + /* https://www.kernel.org/doc/Documentation/riscv/boot-image-header.rst */ + struct { + uint32_t code0; /* Executable code */ + uint32_t code1; /* Executable code */ + uint64_t text_offset; /* Image load offset, little endian */ + uint64_t image_size; /* Effective Image size, little endian */ + uint64_t flags; /* kernel flags, little endian */ + uint32_t version; /* Version of this header */ + uint32_t res1; /* Reserved */ + uint64_t res2; /* Reserved */ + uint64_t magic; /* Deprecated: Magic number, little endian, "RISCV" */ + uint32_t magic2; /* Magic number 2, little endian, "RSC\x05" */ + uint32_t res3; /* Reserved for PE COFF offset */ + } image; + uint64_t effective_size; + + if ( size < sizeof(image) ) + return -EINVAL; + + copy_from_paddr(&image, addr, sizeof(image)); + + /* Magic v1 is deprecated and may be removed. Only use v2 */ + if ( le32_to_cpu(image.magic2) != IMAGE64_MAGIC_V2 ) + return -EINVAL; + + effective_size = le64_to_cpu(image.image_size); + + if ( !effective_size ) + return -EINVAL; + + info->image.kernel_addr = addr; + /* Actual size in the binary file */ + info->image.len = size; + /* Total memory the kernel occupies at runtime */ + info->image.image_size = effective_size; + info->image.text_offset = le64_to_cpu(image.text_offset); + info->image.start = 0; + + info->load = kernel_image_load; + + return 0; +} + +int __init kernel_image_probe(struct kernel_info *info, paddr_t addr, + paddr_t size) +{ +#ifdef CONFIG_RISCV_64 + return kernel_image64_probe(info, addr, size); +#else +# error "Only 64-bit RISC-V is supported" +#endif +} diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 8cd1670c2c6f..00c37be101bf 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -59,8 +59,15 @@ struct kernel_info { struct { paddr_t kernel_addr; paddr_t len; -#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV_64) - paddr_t text_offset; /* 64-bit Image only */ +#if defined(CONFIG_ARM_64) || defined(CONFIG_RISCV) + /* + * ARM: 64-bit Image only. + * RISC-V: both 32-bit and 64-bit Images. + */ + paddr_t text_offset; +#endif +#if defined(CONFIG_RISCV) + size_t image_size; /* Effective size of Image */ #endif paddr_t start; /* Must be 0 for 64-bit Image */ } image; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302339.1576346 (Exim 4.92) (envelope-from ) id 1wKuZi-00043V-U7; Thu, 07 May 2026 08:59:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302339.1576346; Thu, 07 May 2026 08:59:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZi-00042c-G5; Thu, 07 May 2026 08:59:18 +0000 Received: by outflank-mailman (input) for mailman id 1302339; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZh-0003up-04 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZg-005UsV-DG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:16 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545b-e002-0a2a0a5209dd-0a2a450a89e4-20 for ; Thu, 07 May 2026 10:59:16 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5464-56b3-0a2a450a0019-d155da29dc61-3 for ; Thu, 07 May 2026 10:59:16 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bc64ad08bf9so94019066b.0 for ; Thu, 07 May 2026 01:59:16 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Promote gstage_modes[] from a local __initconst variable inside gstage_mode_detect() to a file-scope static const array, and convert max_gstage_mode from an embedded struct (assigned by value) to a global const pointer into gstage_modes[]. This allows referencing both the mode identifier and the mode name after init without copying the descriptor. Remove get_max_supported_mode(); its callers now dereference max_gstage_mode->mode directly. Change struct p2m_domain::mode from an embedded gstage_mode_desc to a const pointer into gstage_modes[], so each domain shares the descriptor rather than carrying its own copy. Adjust the gstage_modes[] entries in three ways: - Use lowercase names without the "x4" suffix (e.g. "sv39" instead of "Sv39x4"). The DT mmu-type binding [1] does not include the suffix, so the name can now be passed directly to the guest without transformation. The suffix is appended only in the diagnostic printk, where it remains informative. - Use "none" for Bare mode (HGATP_MODE_OFF) to match the DT binding. - Change paging_levels to represent the root page-table level index (i.e. total paging levels minus one) rather than the total count. P2M_ROOT_LEVEL() now returns the correct VPN index directly, without requiring callers to subtract one or use hardcoded offsets. Add gstage_mode to xen_arch_domainconfig so the toolstack can request a specific G-stage mode at domain creation time. Introduce find_gstage_mode() to resolve a mode descriptor by HGATP_MODE_*, capping the result at max_gstage_mode to prevent requesting a mode the hardware does not support. Update p2m_init() to accept a xen_domctl_createdomain pointer and call find_gstage_mode() instead of hardcoding Sv39x4. Add arch_parse_dom0less_node() in a new dom0less-build.c to read the "mmu-type" DT property from a guest domain node and store it in boot_domain::create_cfg.arch.gstage_mode, falling back to maximum supported mode when the property is absent. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/riscv/cpus.yaml?h=v6.19-rc3#n82 Signed-off-by: Oleksii Kurochko --- Changes in v5: - update the comment inside arch_parse_dom0less_node() before return 0; - Code style fixes. - Compare pointers instead of fields in p2m_init() as they should point to the same. - s/find_gstage_mode_by_bits/find_gstage_mode. --- --- Changes in v4: - Stray blank after * in declaration of find_gstage_mode(). - Refactor find_gstage_mode(). Now it is find_gstage_mode_by_bits(). - Add __ro_after_init for static local variable m in p2m_init. - s/ char gstage_mode[8];/unsigned char gstage_mode; in struct vcpu_guest_context. - s/modes/gstage_modes in p2m.c. - Introduce P2M_EXTRA_BITS_AT_LEVEL and re-use P2M_ROOT_EXTRA_BITS to encode magic constant 2. --- Changes in v3: - New patch. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/dom0less-build.c | 71 ++++++++++++++++++ xen/arch/riscv/include/asm/p2m.h | 18 +++-- xen/arch/riscv/p2m.c | 121 +++++++++++++++++++++---------- xen/arch/riscv/vmid.c | 2 +- xen/include/public/arch-riscv.h | 5 ++ 6 files changed, 172 insertions(+), 46 deletions(-) create mode 100644 xen/arch/riscv/dom0less-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index eecdcbc76867..8f7fd625dddd 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o +obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o obj-y += extable.o diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c new file mode 100644 index 000000000000..a683972e9235 --- /dev/null +++ b/xen/arch/riscv/dom0less-build.c @@ -0,0 +1,71 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include + +int __init arch_parse_dom0less_node(struct dt_device_node *node, + struct boot_domain *bd) +{ + const char *mmu_type; + unsigned long bits; + const char *end; + + if ( dt_property_read_string(node, "mmu-type", &mmu_type) ) + { + dprintk(XENLOG_WARNING, "mmu-type property is missing in guest domain " + "node. %s will be used as fallback\n", max_gstage_mode->name); + + bits = P2M_GFN_LEVEL_SHIFT(max_gstage_mode->paging_levels + 1); + + goto out; + } + + if ( !strcasecmp(mmu_type, "riscv,none") ) + { + dprintk(XENLOG_ERR, "Bare mode isn't supported by Xen\n"); + + return -EOPNOTSUPP; + } + + if ( strncasecmp(mmu_type, "riscv,sv", 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); + + return -EINVAL; + } + + bits = simple_strtoul(mmu_type + 8, &end, 10); + if ( (*end != '\0') || (end == mmu_type + 8) ) + { + dprintk(XENLOG_ERR, "mmu-type value \"%s\" is incorrect\n", mmu_type); + + return -EINVAL; + } + + out: + if ( bits > (UINT8_MAX - P2M_ROOT_EXTRA_BITS) ) + { + dprintk(XENLOG_ERR, "gstage addr bits value overflows uint8\n"); + + return -EINVAL; + } + + /* + * The mmu-type property may specify any riscv,sv string, but only the + * following are currently supported: + * - riscv,sv32 + * - riscv,sv39 + * - riscv,sv48 + * - riscv,sv57 + * Any other value will be rejected by find_gstage_mode(). + * + * P2M_ROOT_EXTRA_BITS is added because for G-stage mode, GPAs are + * extended by that many bits. + */ + bd->create_cfg.arch.gaddr_bits = bits + P2M_ROOT_EXTRA_BITS; + + return 0; +} diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 54ea67990f06..638c60ddc2f7 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -13,7 +13,7 @@ #define P2M_ROOT_ORDER (ilog2(GSTAGE_ROOT_PAGE_TABLE_SIZE) - PAGE_SHIFT) #define P2M_ROOT_PAGES BIT(P2M_ROOT_ORDER, U) -#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode.paging_levels) +#define P2M_ROOT_LEVEL(p2m) ((p2m)->mode->paging_levels) /* * According to the RISC-V spec: @@ -32,10 +32,13 @@ */ #define P2M_LEVEL_ORDER(lvl) XEN_PT_LEVEL_ORDER(lvl) -#define P2M_ROOT_EXTRA_BITS(p2m, lvl) (2 * ((lvl) == P2M_ROOT_LEVEL(p2m))) +#define P2M_ROOT_EXTRA_BITS 2 + +#define P2M_LEVEL_EXTRA_BITS(p2m, lvl) \ + (P2M_ROOT_EXTRA_BITS * ((lvl) == P2M_ROOT_LEVEL(p2m))) #define P2M_PAGETABLE_ENTRIES(p2m, lvl) \ - (BIT(PAGETABLE_ORDER + P2M_ROOT_EXTRA_BITS(p2m, lvl), UL)) + (BIT(PAGETABLE_ORDER + P2M_LEVEL_EXTRA_BITS(p2m, lvl), UL)) #define P2M_TABLE_OFFSET(p2m, lvl) (P2M_PAGETABLE_ENTRIES(p2m, lvl) - 1UL) @@ -55,6 +58,8 @@ struct gstage_mode_desc { char name[8]; }; +extern const struct gstage_mode_desc *max_gstage_mode; + /* Per-p2m-table state */ struct p2m_domain { /* @@ -68,7 +73,7 @@ struct p2m_domain { /* The root of the p2m tree. May be concatenated */ struct page_info *root; - struct gstage_mode_desc mode; + const struct gstage_mode_desc *mode; /* Back pointer to domain */ struct domain *domain; @@ -215,9 +220,10 @@ static inline bool arch_acquire_resource_check(struct domain *d) } void guest_mm_init(void); -unsigned char get_max_supported_mode(void); -int p2m_init(struct domain *d); +struct xen_domctl_createdomain; + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config); static inline void p2m_write_lock(struct p2m_domain *p2m) { diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index adcf292a7092..f889978cf754 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -45,12 +45,28 @@ struct p2m_pte_ctx { unsigned int level; /* Paging level at which the PTE resides. */ }; -static struct gstage_mode_desc __ro_after_init max_gstage_mode = { - .mode = HGATP_MODE_OFF, - .paging_levels = 0, - .name = "Bare", +/* Values should be sorted by ->mode in this array */ +static const struct gstage_mode_desc gstage_modes[] = { + /* + * Based on the RISC-V spec: + * Bare mode is always supported, regardless of SXLEN. + * When SXLEN=32, the only other valid setting for MODE is Sv32. + * When SXLEN=64, three paged virtual-memory schemes are defined: + * Sv39, Sv48, and Sv57. + */ + { HGATP_MODE_OFF, 0, "none" }, +#ifdef CONFIG_RISCV_32 + { HGATP_MODE_SV32X4, 1, "sv32" }, +#else + { HGATP_MODE_SV39X4, 2, "sv39" }, + { HGATP_MODE_SV48X4, 3, "sv48" }, + { HGATP_MODE_SV57X4, 4, "sv57" }, +#endif }; +const struct gstage_mode_desc *__ro_after_init max_gstage_mode = + &gstage_modes[0]; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -63,11 +79,6 @@ static inline void p2m_free_metadata_page(struct p2m_domain *p2m, } } -unsigned char get_max_supported_mode(void) -{ - return max_gstage_mode.mode; -} - /* * If anything is changed here, it may also require updates to * p2m_{get,set}_type(). @@ -148,41 +159,24 @@ static pte_t *p2m_get_root_pointer(struct p2m_domain *p2m, gfn_t gfn) static void __init gstage_mode_detect(void) { - static const struct gstage_mode_desc modes[] __initconst = { - /* - * Based on the RISC-V spec: - * Bare mode is always supported, regardless of SXLEN. - * When SXLEN=32, the only other valid setting for MODE is Sv32. - * When SXLEN=64, three paged virtual-memory schemes are defined: - * Sv39, Sv48, and Sv57. - */ -#ifdef CONFIG_RISCV_32 - { HGATP_MODE_SV32X4, 2, "Sv32x4" } -#else - { HGATP_MODE_SV39X4, 3, "Sv39x4" }, - { HGATP_MODE_SV48X4, 4, "Sv48x4" }, - { HGATP_MODE_SV57X4, 5, "Sv57x4" }, -#endif - }; - - for ( unsigned int mode_idx = ARRAY_SIZE(modes); mode_idx-- > 0; ) + for ( unsigned int mode_idx = ARRAY_SIZE(gstage_modes); mode_idx-- > 0; ) { - unsigned long mode = modes[mode_idx].mode; + unsigned long mode = gstage_modes[mode_idx].mode; csr_write(CSR_HGATP, MASK_INSR(mode, HGATP_MODE_MASK)); if ( MASK_EXTR(csr_read(CSR_HGATP), HGATP_MODE_MASK) == mode ) { - max_gstage_mode = modes[mode_idx]; + max_gstage_mode = &gstage_modes[mode_idx]; break; } } - if ( max_gstage_mode.mode == HGATP_MODE_OFF ) + if ( max_gstage_mode->mode == HGATP_MODE_OFF ) panic("Xen expects that G-stage won't be Bare mode\n"); - printk("Max supported G-stage mode is %s\n", max_gstage_mode.name); + printk("Max supported G-stage mode is %sx4\n", max_gstage_mode->name); csr_write(CSR_HGATP, 0); @@ -283,7 +277,7 @@ static void clear_and_clean_page(struct page_info *page, bool clean_dcache) unsigned long construct_hgatp(const struct p2m_domain *p2m, uint16_t vmid) { return MASK_INSR(mfn_x(page_to_mfn(p2m->root)), HGATP_PPN_MASK) | - MASK_INSR(p2m->mode.mode, HGATP_MODE_MASK) | + MASK_INSR(p2m->mode->mode, HGATP_MODE_MASK) | MASK_INSR(vmid, HGATP_VMID_MASK); } @@ -331,8 +325,35 @@ static int p2m_alloc_root_table(struct p2m_domain *p2m) return 0; } -int p2m_init(struct domain *d) +static const struct gstage_mode_desc *find_gstage_mode( + unsigned char gpa_bits) +{ + ASSERT(gstage_modes[0].mode == HGATP_MODE_OFF); + + for ( unsigned int i = 1; i < ARRAY_SIZE(gstage_modes); i++ ) + { + unsigned int lvl = gstage_modes[i].paging_levels + 1; + unsigned int bits = P2M_GFN_LEVEL_SHIFT(lvl) + P2M_ROOT_EXTRA_BITS; + + if ( gpa_bits == bits ) + { + if ( gstage_modes[i].mode > max_gstage_mode->mode ) + return NULL; + return &gstage_modes[i]; + } + } + + return NULL; +} + +int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) { + /* + * TODO: This static is a temporary constraint: all guests must use the + * same MMU mode because p2m_gpa_bits is not yet per-domain. + * Drop this once per-domain p2m_gpa_bits is introduced. + */ + static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; struct p2m_domain *p2m = p2m_get_hostp2m(d); /* @@ -341,6 +362,33 @@ int p2m_init(struct domain *d) */ p2m->domain = d; + if ( !config ) + { + dprintk(XENLOG_ERR, "NULL config is passed\n"); + return -EINVAL; + } + + p2m->mode = find_gstage_mode(config->arch.gaddr_bits); + + if ( !p2m->mode ) + { + dprintk(XENLOG_ERR, + "Unsupported or unavailable gstage addr bits: %u\n", + config->arch.gaddr_bits); + + return -EINVAL; + } + + if ( m->mode == HGATP_MODE_OFF ) + m = p2m->mode; + + if ( m != p2m->mode ) + { + dprintk(XENLOG_ERR, + "Mode should be the same for all guests at the moment\n"); + return -EINVAL; + } + paging_domain_init(d); rwlock_init(&p2m->lock); @@ -362,11 +410,6 @@ int p2m_init(struct domain *d) # error "Add init of p2m->clean_dcache" #endif - /* TODO: don't hardcode used for a domain g-stage mode. */ - p2m->mode.mode = HGATP_MODE_SV39X4; - p2m->mode.paging_levels = 2; - safe_strcpy(p2m->mode.name, "Sv39x4"); - return 0; } @@ -1304,7 +1347,7 @@ static mfn_t p2m_get_entry(struct p2m_domain *p2m, gfn_t gfn, { unsigned int level = P2M_ROOT_LEVEL(p2m); unsigned int gfn_limit_bits = - P2M_LEVEL_ORDER(level + 1) + P2M_ROOT_EXTRA_BITS(p2m, level); + P2M_LEVEL_ORDER(level + 1) + P2M_LEVEL_EXTRA_BITS(p2m, level); pte_t entry, *table; int rc; mfn_t mfn = INVALID_MFN; diff --git a/xen/arch/riscv/vmid.c b/xen/arch/riscv/vmid.c index 8fbcd500f24d..11c7e9d6d6c8 100644 --- a/xen/arch/riscv/vmid.c +++ b/xen/arch/riscv/vmid.c @@ -52,7 +52,7 @@ static DEFINE_PER_CPU(struct vmid_data, vmid_data); static unsigned int vmidlen_detect(void) { unsigned int vmid_bits; - unsigned char gstage_mode = get_max_supported_mode(); + unsigned char gstage_mode = max_gstage_mode->mode; /* * According to the RISC-V Privileged Architecture Spec: diff --git a/xen/include/public/arch-riscv.h b/xen/include/public/arch-riscv.h index 360d8e6871ba..1990a1eb748c 100644 --- a/xen/include/public/arch-riscv.h +++ b/xen/include/public/arch-riscv.h @@ -56,6 +56,11 @@ typedef struct vcpu_guest_context vcpu_guest_context_t; DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); struct xen_arch_domainconfig { + /* + * G-stage GPA address width in bits. + * Valid values: 34 (sv32x4), 41 (sv39x4), 50 (sv48x4), 59 (sv57x4). + */ + uint8_t gaddr_bits; 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The variable is initialised to PADDR_BITS and narrowed in p2m_init() to the GPA width of the selected G-stage mode, allowing an external entity (e.g. an IOMMU) to restrict it further if needed. p2m_gpa_bits is a global rather than a per-domain value, which is acceptable for now because all domains are required to use the same G-stage MMU mode, as dom0less common code allocates it per all domains. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Update initialization of p2m_gpa_bits and the comment above. - Rework how p2m_gpa_bits is limited. - Update the commit message. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/p2m.h | 3 +++ xen/arch/riscv/p2m.c | 15 +++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/xen/arch/riscv/include/asm/p2m.h b/xen/arch/riscv/include/asm/p2m.h index 638c60ddc2f7..0d1dace1a0d8 100644 --- a/xen/arch/riscv/include/asm/p2m.h +++ b/xen/arch/riscv/include/asm/p2m.h @@ -47,6 +47,9 @@ #define P2M_LEVEL_MASK(p2m, lvl) \ (P2M_TABLE_OFFSET(p2m, lvl) << P2M_GFN_LEVEL_SHIFT(lvl)) +/* Holds the bit size of GPAs in p2m tables */ +extern unsigned int p2m_gpa_bits; + #define paddr_bits PADDR_BITS /* Get host p2m table */ diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index f889978cf754..703b9f4d2540 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -11,6 +11,8 @@ #include #include +#include + #include #include #include @@ -67,6 +69,12 @@ static const struct gstage_mode_desc gstage_modes[] = { const struct gstage_mode_desc *__ro_after_init max_gstage_mode = &gstage_modes[0]; +/* + * Set to the maximum configured support for GPA bits, so the number of GPA + * bits can be restricted by an external entity (e.g. IOMMU). + */ +unsigned int __ro_after_init p2m_gpa_bits = PADDR_BITS; + static void p2m_free_page(struct p2m_domain *p2m, struct page_info *pg); static inline void p2m_free_metadata_page(struct p2m_domain *p2m, @@ -355,6 +363,7 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) */ static const struct gstage_mode_desc __ro_after_init *m = &gstage_modes[0]; struct p2m_domain *p2m = p2m_get_hostp2m(d); + unsigned int gpa_bits; /* * "Trivial" initialisation is now complete. Set the backpointer so the @@ -410,6 +419,12 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) # error "Add init of p2m->clean_dcache" #endif + gpa_bits = P2M_GFN_LEVEL_SHIFT(p2m->mode->paging_levels + 1) + + P2M_ROOT_EXTRA_BITS; + + if ( gpa_bits < p2m_gpa_bits ) + p2m_gpa_bits = gpa_bits; + return 0; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302344.1576367 (Exim 4.92) (envelope-from ) id 1wKuZl-0004qn-V0; Thu, 07 May 2026 08:59:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302344.1576367; Thu, 07 May 2026 08:59:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZl-0004q1-Ka; Thu, 07 May 2026 08:59:21 +0000 Received: by outflank-mailman (input) for mailman id 1302344; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZj-0004BH-EO for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZi-005UsV-RG for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:18 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545f-e002-0a2a0a5209dd-0a2a4501ca64-46 for ; Thu, 07 May 2026 10:59:18 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5466-c1f2-0a2a45010019-d155d02ecdcd-3 for ; Thu, 07 May 2026 10:59:18 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67c1e0229acso818406a12.1 for ; Thu, 07 May 2026 01:59:18 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The reason for 2 banks is that there is typically always a use case for low memory under 4 GB, but the bank under 4 GB ends up being small because there are other things under 4 GB it can conflict with (interrupt controller, PCI BARs, etc.). So a second bank is added above that MMIO region (starting at 8 GiB) to provide the remaining RAM; the gap between the two banks also exercises code paths handling discontiguous memory. For Sv32 guests (34-bit GPA, 16 GiB addressable), bank0 provides 2 GB (2–4 GB) and the first 8 GB of bank1 (8–16 GB) is accessible. Extended regions are useful for RISC-V: they could be used to provide a "space" for Linux to map grant mappings. Despite the fact that for every guest MMU mode the GPA could be up to 56 bits wide (except Sv32 whose GPA is 34 bits), the combined size of both banks is limited to 1018 GB as it is more than enough for most use cases. Add inclusion of asm/guest-layout.h to asm/domain.h to make dom0less common code build happy. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v5: - Nothing changed. Only rebase. --- Changes in v4: - Add Acked-by: Jan Beulich . --- Changes in v3: - Move GUEST_RAM*-related defines to asm/p2m.h instead of public header. --- Changes in v2: - New patch. --- --- xen/arch/riscv/include/asm/domain.h | 1 + xen/arch/riscv/include/asm/guest-layout.h | 23 +++++++++++++++++++++++ 2 files changed, 24 insertions(+) create mode 100644 xen/arch/riscv/include/asm/guest-layout.h diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6c48bf13111d..6044ce0feee0 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include +#include #include #include diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h new file mode 100644 index 000000000000..68d95a09394c --- /dev/null +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -0,0 +1,23 @@ +#ifndef ASM_RISCV_GUEST_LAYOUT_H +#define ASM_RISCV_GUEST_LAYOUT_H + +#include + +#define GUEST_RAM_BANKS 2 + +/* + * The way to find the extended regions (to be exposed to the guest as unused + * address space) relies on the fact that the regions reserved for the RAM + * below are big enough to also accommodate such regions. + */ +#define GUEST_RAM0_BASE xen_mk_ullong(0x80000000) /* 2GB of low RAM @ 2GB */ +#define GUEST_RAM0_SIZE xen_mk_ullong(0x80000000) + +#define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016 GB of RAM @ 8GB */ +#define GUEST_RAM1_SIZE xen_mk_ullong(0xFE00000000) + +/* TODO: allocate these all dynamically */ +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } + +#endif /* ASM_RISCV_GUEST_LAYOUT_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302347.1576373 (Exim 4.92) (envelope-from ) id 1wKuZm-0004w9-MA; Thu, 07 May 2026 08:59:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302347.1576373; Thu, 07 May 2026 08:59:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKuZm-0004tg-3Y; Thu, 07 May 2026 08:59:22 +0000 Received: by outflank-mailman (input) for mailman id 1302347; Thu, 07 May 2026 08:59:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKuZk-0004Yz-NS for xen-devel@lists.xenproject.org; Thu, 07 May 2026 08:59:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKuZk-00CM51-3n for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:59:20 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc545c-5cb7-0a2a0a5109dd-0a2a4507c4c0-32 for ; Thu, 07 May 2026 10:59:20 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5467-229c-0a2a45070019-d155da2bac29-3 for ; Thu, 07 May 2026 10:59:20 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bc264a50e7fso115628866b.0 for ; Thu, 07 May 2026 01:59:19 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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So enable it. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v4-v5: - Nothing changed. Only rebase. --- Changes in v3: - Add Acked-by: Jan Beulich . --- Changes in v2: - Move introduction of p2m_ipa_bits to separate patch. - Move to separate patch introduction of guest banks constansts. --- --- xen/arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index a5e87c1757f7..41426c205292 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME select GENERIC_UART_INIT -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 08:59:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 08:59:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302296.1576385 (Exim 4.92) (envelope-from ) id 1wKua3-0007JD-PR; Thu, 07 May 2026 08:59:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302296.1576385; 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Given that 6.18 is LTS, suggesting `Cc: stable@vger.kernel.org` to get it backported. Thanks, Jiaqing On 2026-05-06 13:55, Penny Zheng wrote: > While booting a recent linux-next kernel as a Xen PVH dom0 on x86, the kernel > oopses very early during fs_initcall: > > Oops: divide error: 0000 [#1] SMP NOPTI > RIP: 0010:amd_smn_init+0x188/0x2e0 > > Followed: on a kernel that survives the divide, it will fail by a NULL pointer > dereference from the first SMN consumer (amd_pmc_probe -> amd_smn_read). > > Root cause > ========== > > To prevent each dom0 vCPU from looking like an SMT sibling of another > vCPU, Xen synthesizes guest x2APIC IDs as vcpu_index * 2. This spacing every > vCPU's APIC ID by 2 can push the synthesized IDs past the package-field > boundary. Linux then infers more "packages" and therefore more AMD > nodes via amd_num_nodes() than the platform actually has, while the > PCI-side host-bridge scan correctly reports the number of root complex. > > The fixes are tested on Xen 4.20 PVH dom0 on AMD Zen (16 vCPUs) on top of > linux-next/master (next-20260505). > > Penny Zheng (2): > x86/amd_node: avoid divide-by-zero in amd_smn_init() under Xen dom0 > x86/amd_node: reject SMN access when amd_smn_init() did not complete > > arch/x86/kernel/amd_node.c | 23 ++++++++++++++++++++--- > 1 file changed, 20 insertions(+), 3 deletions(-) > From xen-devel-bounces@lists.xenproject.org Thu May 07 09:30:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:30:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302465.1576394 (Exim 4.92) (envelope-from ) id 1wKv3z-0006Mw-4G; Thu, 07 May 2026 09:30:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302465.1576394; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3mP58v/x9/4otTsX7GEm8aO6Qaubcs5BG9GagnzkvROPmu0cOfTgpTmjtQkAMwlraIHJArUdtmz7VNGAqklq3YF8o+hpyScUTPvjKw2Q/wfejzGVjjPEP64XcRipezQ6SGbUtQseB/RBeoZTl3F0r1h4HHy3yDhV8FqmufOor2ITm0h6ocSk+AD8Q+Q4wCTcb605wijhqHatI6Qa8mu4yfFSJrbIdD+0rym0pb8qSPDWk9rLRRUCwYanNy5ZgVGi1QNUygUrlmGavB1RqI1fKDrFmxqzvKWxe/Ii8VflIUBbGwMcyHZJGXx322tK/CkxSYT2o0gYviG2vdVSAz2yv7ccM6DEOGqRQVVgJiY66IeoOFx9EdYsUujDd2QrVedc7az/Xq52sHDHdzsPeWaBAq87PCUpOrw9fwBK3n0j9Mat9c+0zGJCEx+k0otIROA4 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 09:30:27.7630 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e288167-6570-4db3-fe81-08deac1b4669 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9F.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR08MB6371 X-purgate-ID: tlsNG-c1860d/1778146231-C5784DB1-EBDD28A6/10/73395122804 X-purgate-type: spam X-purgate-size: 1972 Hi Oleksii, > On 7 May 2026, at 09:58, Oleksii Kurochko wr= ote: >=20 > domain_use_host_layout() is not architecture-specific and may be needed > on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common > static inline in a new dedicated header, xen/domain-layout.h. >=20 > xen/domain.h would be the natural home, but placing it there would > require including xen/paging.h (for paging_mode_translate()) and > xen/sched.h (for is_hardware_domain()), which would introduce circular > dependencies. A separate header that callers opt into avoids this. >=20 > Adjust the implementation to take paging_mode_translate() into account > so it works correctly for all architectures, including x86. Some extra > details about implementation [2] and [3]. >=20 > To avoid the following compilation issue: >=20 > In file included from ./include/xen/paging.h:4, > from ./include/xen/domain-layout.h:6, > from common/device-tree/domain-build.c:4: > ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' > declared inside parameter list will not be visible outside of this > definition or declaration [-Werror] > 17 | void paging_free_page(struct domain *d, struct page_info *pg); >=20 > add the forward declaration of struct page_info to RISC-V's asm/paging.h. >=20 > [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.3= 59097@ubuntu-linux-20-04-desktop/ > [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3= 148344@ubuntu-linux-20-04-desktop/ > [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3= 148344@ubuntu-linux-20-04-desktop/ >=20 > Suggested-by: Stefano Stabellini > Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 07 09:31:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:31:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302469.1576404 (Exim 4.92) (envelope-from ) id 1wKv4O-0006iD-Eh; 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Using "zimage" in the > name is therefore misleading in architecture-independent code. >=20 > Rename kernel_zimage_probe() to kernel_image_probe() and update the > associated structure field from "zimage" to "image" to reflect that the > code handles generic kernel images rather than the zImage format > specifically. >=20 > No functional change intended. >=20 > Reported-by: Jan Beulich > Signed-off-by: Oleksii Kurochko > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 07 09:32:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 09:32:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302484.1576411 (Exim 4.92) (envelope-from ) id 1wKv5W-0007K2-LC; Thu, 07 May 2026 09:32:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302484.1576411; Thu, 07 May 2026 09:32:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKv5W-0007Jv-ID; Thu, 07 May 2026 09:32:10 +0000 Received: by outflank-mailman (input) for mailman id 1302484; Thu, 07 May 2026 09:32:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKv5V-0007Jp-SN for xen-devel@lists.xenproject.org; Thu, 07 May 2026 09:32:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKv5V-00Bwl5-8v for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:32:09 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc5c13-5cb7-0a2a0a5109dd-0a2a450ca10a-48 for ; Thu, 07 May 2026 11:32:09 +0200 Received: from [209.85.208.53] (helo=mail-ed1-f53.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc5c19-62f1-0a2a450c0019-d155d035f12d-3 for ; Thu, 07 May 2026 11:32:09 +0200 Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-67c4aaf76ecso916894a12.3 for ; Thu, 07 May 2026 02:32:09 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The loop index should be used instead. Otherwise, the alignment check may be performed on the wrong MMIO address. Fix the index used in the alignment check and corresponding printk. Fixes: c9bd8b322ecbb ("xen/riscv: imsic_init() implementation") Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/imsic.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..f7b70a8da09e 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -451,11 +451,11 @@ int __init imsic_init(const struct dt_device_node *node) continue; } - if ( !IS_ALIGNED(mmios[cpu].base_addr + reloff, - IMSIC_MMIO_PAGE_SZ) ) + if ( !IS_ALIGNED(mmios[index].base_addr + reloff, IMSIC_MMIO_PAGE_SZ) ) { printk(XENLOG_WARNING "%s: MMIO address %#lx is not aligned on a page\n", - node->name, msi[cpu].base_addr + reloff); + node->name, mmios[index].base_addr + reloff); + continue; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:09:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:09:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302513.1576421 (Exim 4.92) (envelope-from ) id 1wKvfH-00043v-Dt; Thu, 07 May 2026 10:09:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302513.1576421; Thu, 07 May 2026 10:09:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKvfH-00043o-AU; Thu, 07 May 2026 10:09:07 +0000 Received: by outflank-mailman (input) for mailman id 1302513; Thu, 07 May 2026 10:09:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wKvfF-00043d-UI for xen-devel@lists.xenproject.org; Thu, 07 May 2026 10:09:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKvfF-005jZ7-BD for xen-devel@lists.xenproject.org; Thu, 07 May 2026 12:09:05 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc64b6-e002-0a2a0a5209dd-0a2a450ab3e6-16 for ; Thu, 07 May 2026 12:09:05 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc64bd-56b3-0a2a450a0019-d1558030bcdd-3 for ; Thu, 07 May 2026 12:09:02 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso6518515e9.0 for ; Thu, 07 May 2026 03:09:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778148542-7397E8B7-A98FF364/10/73395122804 X-purgate-type: spam X-purgate-size: 521 On 07.05.2026 11:31, Oleksii Kurochko wrote: > The MMIO alignment check in imsic_init() incorrectly uses cpu as > the index into mmios[]. The loop index should be used instead. > Otherwise, the alignment check may be performed on the wrong MMIO > address. > > Fix the index used in the alignment check and corresponding printk. > > Fixes: c9bd8b322ecbb ("xen/riscv: imsic_init() implementation") > Signed-off-by: Oleksii Kurochko Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu May 07 10:21:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:21:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302532.1576430 (Exim 4.92) (envelope-from ) id 1wKvrR-0006rv-EW; Thu, 07 May 2026 10:21:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302532.1576430; Thu, 07 May 2026 10:21:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKvrR-0006ro-B8; Thu, 07 May 2026 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X-MS-Exchange-CrossTenant-Network-Message-Id: 6df7f1d4-c4ed-4024-f965-08deac226a26 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 10:21:34.5588 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: /v23ACBqk4eAYg/p9uOHfHVwXfuYmXUugi8CtLx66JGiBXTv0WVz4JCqHlJs9jOg9NKGzLIc5F0C6BHaspIIhg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR03MB6146 X-purgate-ID: tlsNG-720697/1778149299-82175161-8D3A2ADC/0/0 X-purgate-type: clean X-purgate-size: 4403 On Thu, May 07, 2026 at 10:51:18AM +0200, Jan Beulich wrote: > On 07.05.2026 10:46, Roger Pau Monné wrote: > > On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: > >> On 06.05.2026 18:51, Roger Pau Monne wrote: > >>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to > >>> say the least. We don't know what registers might be there, nor which > >>> values might be safe for those registers. On a forthcoming platform doing > >>> the zeroing of the MMIO region does put the IOMMU in a broken state, which > >>> is not recoverable by the IOMMU initialization procedure in Xen. > >>> > >>> Instead just zero the control register, which mimics the current behavior > >>> with regards to how the control register is handled, and ensures the IOMU > >>> setup is done with the unit disabled. This approach will need revisiting > >>> in order to support Preboot DMA Protection. > >>> > >>> Fold map_iommu_mmio_region() into its only caller, as the function body is > >>> just an ioremap() call after the removal of the memset(). > >>> > >>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > >>> Signed-off-by: Roger Pau Monné > >> > >> While you got Andrew's R-b, I don't view that as enough to commit it. My > >> prior concern towards ... > >> > >>> --- a/xen/drivers/passthrough/amd/iommu_init.c > >>> +++ b/xen/drivers/passthrough/amd/iommu_init.c > >>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > >>> return iommu->ht_flags & mask; > >>> } > >>> > >>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > >>> -{ > >>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > >>> - IOMMU_MMIO_REGION_LENGTH); > >>> - if ( !iommu->mmio_base ) > >>> - return -ENOMEM; > >>> - > >>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > >>> - > >>> - return 0; > >>> -} > >> > >> ... this part of the change wasn't addressed, neither verbally nor by an > >> adjustment to the description of what was committed. As previously stated, > >> blindly memset()-ing the entire area may not be the best of all options, > >> but the downsides of not doing this need to somehow be addressed. As > >> indicated, once they run out of bits in the main control register, they > >> likely will add a 2nd one. That'll then also need clearing, yet we have > >> no code to do so anymore. > > > > I could introduce an opt-in command line option that forces the > > zeroing of the MMIO region (to have the option to resort to the > > previous behavior), > > But we don't want to fully go back to this. We'd need a form that zeroes > what may be zeroed, without causing the issue you're trying to address. But how do we know what needs to be zeroed? We are then in the same position where the introduction of a new control register would cause the zeroing to no longer be accurate. > > but I was (wrongly) under the impression that we > > have agreement the proposed approach was the least bad of the ones > > available, sorry. > > > > Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > > neither does it seems to zero the Global Command Register either, > > which I'm not saying it's correct, but is at least a (possibly wrong) > > precedent. I don't think there's much we can do with the handling of > > enabled bits in possibly registers not know/handled by Xen. Like on > > VT-d, we possibly need to rely on the firmware to handle the IOMMU in > > a half-sane configuration, with no enabled features on registers Xen > > doesn't know about. > > As indicated before, for firmware we can likely rely on that. Pre-boot > non-firmware environments and especially Xen being kexec-ed (or being > run past something which was kexec-ed) may be of more concern. Do we really support booting from such environments? We would need much more careful handling of enabled features IMO, as blindly zeroing the whole MMIO register area is likely to not make the IOMMU happy if it was in an enabled state. Note for example how Xen was zeroing the command and log buffer pointers ahead of disabling the features in the control register, just because those register are ahead of the control register in the MMIO space. Thanks, Roger. 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The order of evaluation of function arguments is > in principle unspecified; in practice at least gcc looks to be evaluating > them from last to first. Hence with NOW() invoked first, the respective > value passed to do_settime() can be off by over a second (which is in > contrast to __get_cmos_time() attempting to get the time exactly after an > update, i.e. [pretty] precisely at a seconds boundary). > > This also addresses a Misra C:2012 rule 13.2 ("The value of an expression > and its persistent side-effects shall be the same under all permitted > evaluation orders") violation each. > > Fixes: f64134cdb81c ("x86: Fix time_resume() to notify all domains of wallclock change") > Fixes: 0bfcf984b727 ("x86: Reintroduce clocksource=tsc") > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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I confirmed this by writing an XTF test that checks interrupt and event delivery behaviour with various combinations of IF and GIF set. The second patch fixes L1 hitting an assertion error in Xen. I confirmed the fix by writing an XTF test that calls VMRUN on a VMCB without the VMRUN intercept set. Thanks, Ross Ross Lagerwall (2): x86/svm: Don't toggle local event delivery on stgi/clgi nestedsvm: Clear GIF when injecting VMEXIT xen/arch/x86/hvm/svm/nestedsvm.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:55:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:55:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302573.1576457 (Exim 4.92) (envelope-from ) id 1wKwO7-0003jw-EX; Thu, 07 May 2026 10:55:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302573.1576457; Thu, 07 May 2026 10:55:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwO7-0003jp-At; Thu, 07 May 2026 10:55:27 +0000 Received: by outflank-mailman (input) for mailman id 1302573; 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This ensures the behaviour is consistent regardless of whether vGIF is used. Fold the functions into the callers since they are now only a single assignment. Signed-off-by: Ross Lagerwall --- New in v2. xen/arch/x86/hvm/svm/nestedsvm.c | 26 +++++--------------------- 1 file changed, 5 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index ef6fa5d23b67..64fbfe8fa71f 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -19,22 +19,6 @@ #define NSVM_ERROR_VVMCB 1 #define NSVM_ERROR_VMENTRY 2 -static void -nestedsvm_vcpu_clgi(struct vcpu *v) -{ - /* clear gif flag */ - vcpu_nestedsvm(v).ns_gif = 0; - local_event_delivery_disable(); /* mask events for PV drivers */ -} - -static void -nestedsvm_vcpu_stgi(struct vcpu *v) -{ - /* enable gif flag */ - vcpu_nestedsvm(v).ns_gif = 1; - local_event_delivery_enable(); /* unmask events for PV drivers */ -} - int nestedsvm_vmcb_map(struct vcpu *v, uint64_t vmcbaddr) { struct nestedvcpu *nv = &vcpu_nestedhvm(v); @@ -161,7 +145,7 @@ int cf_check nsvm_vcpu_reset(struct vcpu *v) svm->ns_iomap = NULL; - nestedsvm_vcpu_stgi(v); + svm->ns_gif = 1; return 0; } @@ -667,7 +651,7 @@ nsvm_vcpu_vmentry(struct vcpu *v, struct cpu_user_regs *regs, return ret; } - nestedsvm_vcpu_stgi(v); + svm->ns_gif = 1; return 0; } @@ -1214,7 +1198,7 @@ nestedsvm_vmexit_defer(struct vcpu *v, if ( vmcb->_vintr.fields.vgif_enable ) vmcb->_vintr.fields.vgif = 0; else - nestedsvm_vcpu_clgi(v); + svm->ns_gif = 0; svm->ns_vmexit.exitcode = exitcode; svm->ns_vmexit.exitinfo1 = exitinfo1; @@ -1502,7 +1486,7 @@ void svm_vmexit_do_stgi(struct cpu_user_regs *regs, struct vcpu *v) if ( (inst_len = svm_get_insn_len(v, INSTR_STGI)) == 0 ) return; - nestedsvm_vcpu_stgi(v); + vcpu_nestedsvm(v).ns_gif = 1; __update_guest_eip(regs, inst_len); } @@ -1523,7 +1507,7 @@ void svm_vmexit_do_clgi(struct cpu_user_regs *regs, struct vcpu *v) if ( (inst_len = svm_get_insn_len(v, INSTR_CLGI)) == 0 ) return; - nestedsvm_vcpu_clgi(v); + vcpu_nestedsvm(v).ns_gif = 0; /* After a CLGI no interrupts should come */ intr = vmcb_get_vintr(vmcb); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 10:55:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 10:55:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302575.1576465 (Exim 4.92) (envelope-from ) id 1wKwOE-00041Z-Ll; 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Instead, clear the GIF when injecting a VMEXIT to match what hardware does. Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") Signed-off-by: Ross Lagerwall --- In v2: Adjusted for the preceding cleanup patch. xen/arch/x86/hvm/svm/nestedsvm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 64fbfe8fa71f..9899cb2147b1 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -717,9 +717,9 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; if ( vmcb->_vintr.fields.vgif_enable ) - ASSERT(vmcb->_vintr.fields.vgif == 0); + vmcb->_vintr.fields.vgif = 0; else - ASSERT(svm->ns_gif == 0); + svm->ns_gif = 0; ns_vmcb = nv->nv_vvmcx; -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 11:20:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:20:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302608.1576474 (Exim 4.92) (envelope-from ) id 1wKwmM-0000d3-MA; Thu, 07 May 2026 11:20:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302608.1576474; Thu, 07 May 2026 11:20:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwmM-0000cw-JU; Thu, 07 May 2026 11:20:30 +0000 Received: by outflank-mailman (input) for mailman id 1302608; Thu, 07 May 2026 11:20:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwmK-0000cq-Hc for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:20:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKwmJ-00CJLn-U8 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 13:20:27 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fc7578-bab6-0a2a0a5309dd-0a2a4509ae02-12 for ; Thu, 07 May 2026 13:20:27 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fc757b-2497-0a2a45090019-d155802ebccf-3 for ; Thu, 07 May 2026 13:20:27 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso7246265e9.0 for ; Thu, 07 May 2026 04:20:27 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778152827-41969A53-C27FD102/0/0 X-purgate-type: clean X-purgate-size: 4901 On 07.05.2026 12:21, Roger Pau Monné wrote: > On Thu, May 07, 2026 at 10:51:18AM +0200, Jan Beulich wrote: >> On 07.05.2026 10:46, Roger Pau Monné wrote: >>> On Thu, May 07, 2026 at 10:03:05AM +0200, Jan Beulich wrote: >>>> On 06.05.2026 18:51, Roger Pau Monne wrote: >>>>> Attempting to memset the whole IOMMU MMIO region to zero is dangerous to >>>>> say the least. We don't know what registers might be there, nor which >>>>> values might be safe for those registers. On a forthcoming platform doing >>>>> the zeroing of the MMIO region does put the IOMMU in a broken state, which >>>>> is not recoverable by the IOMMU initialization procedure in Xen. >>>>> >>>>> Instead just zero the control register, which mimics the current behavior >>>>> with regards to how the control register is handled, and ensures the IOMU >>>>> setup is done with the unit disabled. This approach will need revisiting >>>>> in order to support Preboot DMA Protection. >>>>> >>>>> Fold map_iommu_mmio_region() into its only caller, as the function body is >>>>> just an ioremap() call after the removal of the memset(). >>>>> >>>>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") >>>>> Signed-off-by: Roger Pau Monné >>>> >>>> While you got Andrew's R-b, I don't view that as enough to commit it. My >>>> prior concern towards ... >>>> >>>>> --- a/xen/drivers/passthrough/amd/iommu_init.c >>>>> +++ b/xen/drivers/passthrough/amd/iommu_init.c >>>>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) >>>>> return iommu->ht_flags & mask; >>>>> } >>>>> >>>>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) >>>>> -{ >>>>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, >>>>> - IOMMU_MMIO_REGION_LENGTH); >>>>> - if ( !iommu->mmio_base ) >>>>> - return -ENOMEM; >>>>> - >>>>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); >>>>> - >>>>> - return 0; >>>>> -} >>>> >>>> ... this part of the change wasn't addressed, neither verbally nor by an >>>> adjustment to the description of what was committed. As previously stated, >>>> blindly memset()-ing the entire area may not be the best of all options, >>>> but the downsides of not doing this need to somehow be addressed. As >>>> indicated, once they run out of bits in the main control register, they >>>> likely will add a 2nd one. That'll then also need clearing, yet we have >>>> no code to do so anymore. >>> >>> I could introduce an opt-in command line option that forces the >>> zeroing of the MMIO region (to have the option to resort to the >>> previous behavior), >> >> But we don't want to fully go back to this. We'd need a form that zeroes >> what may be zeroed, without causing the issue you're trying to address. > > But how do we know what needs to be zeroed? We are then in the same > position where the introduction of a new control register would cause > the zeroing to no longer be accurate. An option may be to zero everything we don't know about (plus perhaps everything we know about, but don't otherwise use), on the assumption that new (writable) registers added are okay to zero. >>> but I was (wrongly) under the impression that we >>> have agreement the proposed approach was the least bad of the ones >>> available, sorry. >>> >>> Note how VT-d also doesn't zero the IOMMU registers MMIO page either, >>> neither does it seems to zero the Global Command Register either, >>> which I'm not saying it's correct, but is at least a (possibly wrong) >>> precedent. I don't think there's much we can do with the handling of >>> enabled bits in possibly registers not know/handled by Xen. Like on >>> VT-d, we possibly need to rely on the firmware to handle the IOMMU in >>> a half-sane configuration, with no enabled features on registers Xen >>> doesn't know about. >> >> As indicated before, for firmware we can likely rely on that. Pre-boot >> non-firmware environments and especially Xen being kexec-ed (or being >> run past something which was kexec-ed) may be of more concern. > > Do we really support booting from such environments? We would need > much more careful handling of enabled features IMO, as blindly zeroing > the whole MMIO register area is likely to not make the IOMMU happy if > it was in an enabled state. > > Note for example how Xen was zeroing the command and log buffer > pointers ahead of disabling the features in the control register, just > because those register are ahead of the control register in the MMIO > space. Hmm, yes, such ordering issues could also appear with new registers. Then again, with the IOMMU as a whole disabled (which we would still want to do up front), perhaps the order of other stores can be assumed to not matter? Jan From xen-devel-bounces@lists.xenproject.org Thu May 07 11:28:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:28:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302619.1576484 (Exim 4.92) (envelope-from ) id 1wKwu6-0001Rn-Ds; Thu, 07 May 2026 11:28:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302619.1576484; Thu, 07 May 2026 11:28:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwu6-0001Rg-B6; Thu, 07 May 2026 11:28:30 +0000 Received: by outflank-mailman (input) for mailman id 1302619; Thu, 07 May 2026 11:28:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwu4-0001RZ-W8 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 11:28:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKwu2-00AnK1-RB for xen-devel@lists.xenproject.org; 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Personally, I'd phrase it more sternly.  The masking (or not) of evtchn has nothing to do with GIF/IF. > stgi/clgi since HVM event delivery already takes into account the state STGI/CLGI. > of the GIF (and IF). This ensures the behaviour is consistent regardless > of whether vGIF is used. > > Fold the functions into the callers since they are now only a single > assignment. > > Signed-off-by: Ross Lagerwall For the patch itself, Reviewed-by: Andrew Cooper However there's another can of worms. This patch deletes the only user of local_event_delivery_disable(). It does not delete the only user of local_event_delivery_enable() and pulling that thread shows up a mess.  The other caller is vcpu_block_enable_events() which comes from SCHEDOP_block (probably legitimate; enabling events is at least documented for this hypercall) and hvm_hlt() which is definitely bogus. It needs deleting, but we may want to instrument that path to see if we ever clear the evtchn mask in practice, then run as many distros as we can find. Furthermore, while RISC-V and PPC have BUG() stubs for these functions, ARM implements it as clearing regs->cpsr.irq_mask which is equally bogus mixing virtualised evtchns with architectural interrupt handling. That, equally, needs deleting but I'll have to defer to the ARM maintainers (CC'd) on how to do it safely. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 07 11:29:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 11:29:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302624.1576493 (Exim 4.92) (envelope-from ) id 1wKwud-0001sl-MX; Thu, 07 May 2026 11:29:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302624.1576493; Thu, 07 May 2026 11:29:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwud-0001se-IK; Thu, 07 May 2026 11:29:03 +0000 Received: by outflank-mailman (input) for mailman id 1302624; Thu, 07 May 2026 11:29:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKwuc-0001sW-Lr for xen-devel@lists.xenproject.org; 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Message-ID: Date: Thu, 7 May 2026 12:28:54 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Teddy Astie Subject: Re: [PATCH v2 2/2] nestedsvm: Clear GIF when injecting VMEXIT To: Ross Lagerwall , xen-devel@lists.xenproject.org References: <20260507105507.2078971-1-ross.lagerwall@citrix.com> <20260507105507.2078971-3-ross.lagerwall@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260507105507.2078971-3-ross.lagerwall@citrix.com> Content-Type: text/plain; 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Thu, 07 May 2026 04:41:04 -0700 (PDT) Message-ID: Date: Thu, 7 May 2026 13:41:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Rafal Wojtczuk From: Jan Beulich Subject: [PATCH] gnttab: simplify (replace) gnttab_set_frame_gfn() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778154065-E3B8E443-7C6D85E7/0/0 X-purgate-type: clean X-purgate-size: 3448 It's not really doing anything for valid GFNs, which renders its one use site pretty pointless. The other isn't so much about setting anything, but rather about clearing. Rename the macro accordingly. The main point here, however, is about Rafal spotting the double fetching of the GFN (first in gnttab_unpopulate_status_frames(), then again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass in the already fetched GFN, while dropping the no longer used parameters. Suggested-by: Rafal Wojtczuk Signed-off-by: Jan Beulich --- Do we even need the hook anymore? It has been expanding the same for Arm and x86. --- a/xen/arch/arm/include/asm/grant_table.h +++ b/xen/arch/arm/include/asm/grant_table.h @@ -50,12 +50,8 @@ int replace_grant_host_mapping(uint64_t #define gnttab_dom0_frames() \ min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0) +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ (st) ? gnttab_status_gfn(NULL, gt, idx) \ --- a/xen/arch/x86/include/asm/grant_table.h +++ b/xen/arch/x86/include/asm/grant_table.h @@ -32,12 +32,8 @@ static inline int replace_grant_host_map return replace_grant_pv_mapping(addr, frame, new_addr, flags); } -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0 /* Handled in add_to_physmap_one(). */) +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ : gnttab_shared_mfn(gt, idx); \ --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d { int rc = gfn_eq(gfn, INVALID_GFN) ? 0 - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, - page_to_mfn(pg)); + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); if ( rc ) { @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( */ if ( !get_page(pg, d) ) rc = -EBUSY; - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) - put_page(pg); } if ( rc ) From xen-devel-bounces@lists.xenproject.org Thu May 07 12:59:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 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citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: f892d064-6cc6-4614-53c7-08deac386668 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8274.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 May 2026 12:58:57.1683 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: qnmcPDaL3yVrdR8AX+3zSHwp7tio/S9AClWqDivBVf3vUEkGw4h+5y5Iunf+JUtV7N11/YjXL7J0YSR9kQxwpPIRA06qcC4fnqPiAv0Zar8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR03MB7278 X-purgate-ID: tlsNG-ef75cf/1778158741-08F66C48-27139D7D/0/0 X-purgate-type: clean X-purgate-size: 1911 On 4/29/26 5:54 PM, Teddy Astie wrote: > Le 23/04/2026 à 18:13, Ross Lagerwall a écrit : >> If L1 executes VMRUN with the GIF set and it fails consistency checks, >> Xen will inject a VMEXIT and fail the assert checking the GIF is cleared. >> >> Instead, clear the GIF when injecting a VMEXIT to match what hardware >> does. >> >> Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") >> Signed-off-by: Ross Lagerwall >> --- >> xen/arch/x86/hvm/svm/nestedsvm.c | 4 ++-- >> 1 file changed, 2 insertions(+), 2 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c >> index ef6fa5d23b67..f89b087a1155 100644 >> --- a/xen/arch/x86/hvm/svm/nestedsvm.c >> +++ b/xen/arch/x86/hvm/svm/nestedsvm.c >> @@ -733,9 +733,9 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, >> struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; >> >> if ( vmcb->_vintr.fields.vgif_enable ) >> - ASSERT(vmcb->_vintr.fields.vgif == 0); >> + vmcb->_vintr.fields.vgif = 0; >> else >> - ASSERT(svm->ns_gif == 0); >> + nestedsvm_vcpu_clgi(v); >> >> ns_vmcb = nv->nv_vvmcx; >> > > Looks good to me, though I think we are here looking to make a "guest > CLGI" (clear GIF), so the vGIF specific logic should be collapsed into > nestedsvm_vcpu_clgi() instead of having it as the non-vgif-support case. > (as IIUC, vGIF is a hardware accelration for nested GIF handling ?) Not 100% sure I follow your point here but v2 of this series removes nestedsvm_vcpu_clgi() entirely. Does that address your concern? > > (also making me notice that svm_vmexit_do_{stgi,clgi}() seems to lack > vGIF specific logic) > Isn't that by design? If vGIF is enabled the hardware should handle STGI/CLGI without a VMEXIT. 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How about this instead? x86/svm: Don't mask/unmask evtchns on CLGI/STGI Whether or not evtchns are masked or unmasked has nothing to do with the state of the GIF/IF. Therefore, do not toggle the evtchn mask on STGI/CLGI - HVM event delivery already takes into account the state of the GIF/IF. This ensures the behaviour is consistent regardless of whether vGIF is used. Fold the functions into the callers since they are now only a single assignment. Signed-off-by: Ross Lagerwall From xen-devel-bounces@lists.xenproject.org Thu May 07 14:29:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 14:29:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302802.1576546 (Exim 4.92) (envelope-from ) id 1wKzjJ-00028h-1U; Thu, 07 May 2026 14:29:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302802.1576546; Thu, 07 May 2026 14:29:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKzjI-00028a-Tb; Thu, 07 May 2026 14:29:32 +0000 Received: by outflank-mailman (input) for mailman id 1302802; Thu, 07 May 2026 14:29:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wKzjG-00028U-V7 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 14:29:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wKzjE-00BS8G-Nj for xen-devel@lists.xenproject.org; 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We don't know what registers might be there, nor which > >>>>> values might be safe for those registers. On a forthcoming platform doing > >>>>> the zeroing of the MMIO region does put the IOMMU in a broken state, which > >>>>> is not recoverable by the IOMMU initialization procedure in Xen. > >>>>> > >>>>> Instead just zero the control register, which mimics the current behavior > >>>>> with regards to how the control register is handled, and ensures the IOMU > >>>>> setup is done with the unit disabled. This approach will need revisiting > >>>>> in order to support Preboot DMA Protection. > >>>>> > >>>>> Fold map_iommu_mmio_region() into its only caller, as the function body is > >>>>> just an ioremap() call after the removal of the memset(). > >>>>> > >>>>> Fixes: 0700c962ac2d ("Add AMD IOMMU support into hypervisor") > >>>>> Signed-off-by: Roger Pau Monné > >>>> > >>>> While you got Andrew's R-b, I don't view that as enough to commit it. My > >>>> prior concern towards ... > >>>> > >>>>> --- a/xen/drivers/passthrough/amd/iommu_init.c > >>>>> +++ b/xen/drivers/passthrough/amd/iommu_init.c > >>>>> @@ -42,18 +42,6 @@ static bool iommu_has_ht_flag(struct amd_iommu *iommu, u8 mask) > >>>>> return iommu->ht_flags & mask; > >>>>> } > >>>>> > >>>>> -static int __init map_iommu_mmio_region(struct amd_iommu *iommu) > >>>>> -{ > >>>>> - iommu->mmio_base = ioremap(iommu->mmio_base_phys, > >>>>> - IOMMU_MMIO_REGION_LENGTH); > >>>>> - if ( !iommu->mmio_base ) > >>>>> - return -ENOMEM; > >>>>> - > >>>>> - memset(iommu->mmio_base, 0, IOMMU_MMIO_REGION_LENGTH); > >>>>> - > >>>>> - return 0; > >>>>> -} > >>>> > >>>> ... this part of the change wasn't addressed, neither verbally nor by an > >>>> adjustment to the description of what was committed. As previously stated, > >>>> blindly memset()-ing the entire area may not be the best of all options, > >>>> but the downsides of not doing this need to somehow be addressed. As > >>>> indicated, once they run out of bits in the main control register, they > >>>> likely will add a 2nd one. That'll then also need clearing, yet we have > >>>> no code to do so anymore. > >>> > >>> I could introduce an opt-in command line option that forces the > >>> zeroing of the MMIO region (to have the option to resort to the > >>> previous behavior), > >> > >> But we don't want to fully go back to this. We'd need a form that zeroes > >> what may be zeroed, without causing the issue you're trying to address. > > > > But how do we know what needs to be zeroed? We are then in the same > > position where the introduction of a new control register would cause > > the zeroing to no longer be accurate. > > An option may be to zero everything we don't know about (plus perhaps > everything we know about, but don't otherwise use), on the assumption > that new (writable) registers added are okay to zero. I don't know, I wouldn't feel very comfortable in zeroing everything we don't know about - there's a risk of zeroing hidden registers set up by the firmware. > >>> but I was (wrongly) under the impression that we > >>> have agreement the proposed approach was the least bad of the ones > >>> available, sorry. > >>> > >>> Note how VT-d also doesn't zero the IOMMU registers MMIO page either, > >>> neither does it seems to zero the Global Command Register either, > >>> which I'm not saying it's correct, but is at least a (possibly wrong) > >>> precedent. I don't think there's much we can do with the handling of > >>> enabled bits in possibly registers not know/handled by Xen. Like on > >>> VT-d, we possibly need to rely on the firmware to handle the IOMMU in > >>> a half-sane configuration, with no enabled features on registers Xen > >>> doesn't know about. > >> > >> As indicated before, for firmware we can likely rely on that. Pre-boot > >> non-firmware environments and especially Xen being kexec-ed (or being > >> run past something which was kexec-ed) may be of more concern. > > > > Do we really support booting from such environments? We would need > > much more careful handling of enabled features IMO, as blindly zeroing > > the whole MMIO register area is likely to not make the IOMMU happy if > > it was in an enabled state. > > > > Note for example how Xen was zeroing the command and log buffer > > pointers ahead of disabling the features in the control register, just > > because those register are ahead of the control register in the MMIO > > space. > > Hmm, yes, such ordering issues could also appear with new registers. > Then again, with the IOMMU as a whole disabled (which we would still > want to do up front), perhaps the order of other stores can be assumed > to not matter? I would assume so, yes, but for the issue here the order of the writes did matter, even when the IOMMU was fully disabled. I've inquired to see if there's a recommended way to clear any previous state from an IOMMU. Thanks, Roger. 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Smith" , Oleksii Kurochko Subject: [PATCH] Drop xenpaging Date: Thu, 7 May 2026 18:19:33 +0100 Message-Id: <20260507171933.1573983-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778174396-BDD6BE11-C7921207/10/73395122804 X-purgate-type: spam X-purgate-size: 130750 This capability is experimental, has seen no development since 2011, and these days only gets edited to fix the build. While it can be compiled out (of Xen at least), it is a maintenance burden on surrounding code that we'd prefer to stop paying. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Juergen Gross CC: Tamas K Lengyel CC: Daniel P. Smith CC: Oleksii Kurochko Slightly RFC. I'm suspect I might be asked to split this up a bit, but if so, suggestions on where to draw the lines please. The diffstat speaks for itself, including the invasiveness on surrounding code. PFEC_page_paged and HVMTRANS_gfn_paged_out weren't even able to be elimiated by the compiler in !CONFIG_MEM_PAGING configurations. --- .gitignore | 1 - CHANGELOG.md | 3 + MAINTAINERS | 4 - automation/gitlab-ci/analyze.yaml | 1 - config/Paths.mk.in | 1 - configure | 4 - docs/INDEX | 1 - docs/configure | 4 - docs/misc/xenpaging.txt | 45 - m4/paths.m4 | 3 - tools/Makefile | 1 - tools/configure | 4 - tools/hotplug/common/hotplugpath.sh.in | 1 - tools/include/xenctrl.h | 20 +- tools/libs/ctrl/Makefile.common | 1 - tools/libs/ctrl/xc_mem_paging.c | 130 --- tools/xenpaging/Makefile | 43 - tools/xenpaging/file_ops.c | 71 -- tools/xenpaging/file_ops.h | 41 - tools/xenpaging/pagein.c | 79 -- tools/xenpaging/policy.h | 48 -- tools/xenpaging/policy_default.c | 186 ---- tools/xenpaging/xenpaging.c | 1084 ------------------------ tools/xenpaging/xenpaging.h | 152 ---- xen/arch/x86/hvm/Kconfig | 4 - xen/arch/x86/hvm/dm.c | 6 - xen/arch/x86/hvm/emulate.c | 9 +- xen/arch/x86/hvm/hvm.c | 21 +- xen/arch/x86/hvm/intercept.c | 2 - xen/arch/x86/hvm/vmx/vvmx.c | 2 - xen/arch/x86/include/asm/hvm/support.h | 1 - xen/arch/x86/include/asm/mem_paging.h | 24 - xen/arch/x86/include/asm/p2m.h | 39 +- xen/arch/x86/include/asm/processor.h | 1 - xen/arch/x86/livepatch.c | 4 - xen/arch/x86/mm.c | 21 +- xen/arch/x86/mm/Makefile | 1 - xen/arch/x86/mm/altp2m.c | 2 +- xen/arch/x86/mm/guest_walk.c | 9 - xen/arch/x86/mm/hap/guest_walk.c | 16 - xen/arch/x86/mm/hap/nested_ept.c | 5 - xen/arch/x86/mm/hap/nested_hap.c | 2 +- xen/arch/x86/mm/mem_paging.c | 487 ----------- xen/arch/x86/mm/mem_sharing.c | 30 - xen/arch/x86/mm/p2m-ept.c | 3 - xen/arch/x86/mm/p2m-pt.c | 7 +- xen/arch/x86/mm/p2m.c | 15 +- xen/arch/x86/mm/shadow/hvm.c | 1 - xen/arch/x86/msr.c | 6 - xen/arch/x86/x86_64/compat/mm.c | 6 - xen/arch/x86/x86_64/mm.c | 6 - xen/common/domain.c | 3 - xen/common/domctl.c | 3 - xen/common/keyhandler.c | 6 - xen/common/memory.c | 37 +- xen/common/page_alloc.c | 3 +- xen/common/vm_event.c | 83 -- xen/drivers/passthrough/x86/iommu.c | 2 - xen/include/public/memory.h | 2 +- xen/include/public/vm_event.h | 2 +- xen/include/xen/sched.h | 18 +- xen/include/xsm/dummy.h | 8 - xen/include/xsm/xsm.h | 11 - xen/xsm/dummy.c | 4 - xen/xsm/flask/hooks.c | 11 - xen/xsm/flask/policy/access_vectors | 2 - 66 files changed, 27 insertions(+), 2826 deletions(-) delete mode 100644 docs/misc/xenpaging.txt delete mode 100644 tools/libs/ctrl/xc_mem_paging.c delete mode 100644 tools/xenpaging/Makefile delete mode 100644 tools/xenpaging/file_ops.c delete mode 100644 tools/xenpaging/file_ops.h delete mode 100644 tools/xenpaging/pagein.c delete mode 100644 tools/xenpaging/policy.h delete mode 100644 tools/xenpaging/policy_default.c delete mode 100644 tools/xenpaging/xenpaging.c delete mode 100644 tools/xenpaging/xenpaging.h delete mode 100644 xen/arch/x86/include/asm/mem_paging.h delete mode 100644 xen/arch/x86/mm/mem_paging.c diff --git a/.gitignore b/.gitignore index bfc7bdf043c3..043e7b166ecc 100644 --- a/.gitignore +++ b/.gitignore @@ -161,7 +161,6 @@ tools/xcutils/lsevtchn tools/xcutils/readnotes tools/xenmon/xentrace_setmask tools/xenmon/xenbaked -tools/xenpaging/xenpaging tools/xenpmd/xenpmd tools/xentop/xentop tools/xentrace/xentrace_setsize diff --git a/CHANGELOG.md b/CHANGELOG.md index ce46020dbdb4..56ea17275b8e 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -41,6 +41,9 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) a guest, but the vendors have been diverging since then in ways that Xen cannot compensate for, and the advent of speculative security issues has put to rest any possibility of this being a viable option. + - The xenpaging userspace daemon, and MEM_PAGING hypervisor infrastructure. + This never got beyond an experimental feature and hasn't seen any real + work since 2011. - Removed xenpm tool on non-x86 platforms as it doesn't actually provide anything useful outside of x86. diff --git a/MAINTAINERS b/MAINTAINERS index 77f72e52f46d..8df2700dd40b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -633,10 +633,6 @@ F: tools/misc/xen-cpuid.c F: tools/tests/cpu-policy/ F: tools/tests/x86_emulator/ -X86 MEMORY PAGING -S: Orphaned -F: xen/arch/x86/mm/mem_paging.c - X86 MEMORY SHARING M: Tamas K Lengyel S: Odd Fixes diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index b3f99f472d9e..f94f1be0aa89 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -52,7 +52,6 @@ eclair-x86_64-allcode: CONFIG_EXPERT=y CONFIG_HYPERV_GUEST=y CONFIG_LATE_HWDOM=y - CONFIG_MEM_PAGING=y CONFIG_MEM_SHARING=y CONFIG_PERF_ARRAYS=y CONFIG_PERF_COUNTERS=y diff --git a/config/Paths.mk.in b/config/Paths.mk.in index 6aa392b9f299..0cf6bb574a0a 100644 --- a/config/Paths.mk.in +++ b/config/Paths.mk.in @@ -40,7 +40,6 @@ INITD_DIR := @INITD_DIR@ CONFIG_LEAF_DIR := @CONFIG_LEAF_DIR@ BASH_COMPLETION_DIR := $(CONFIG_DIR)/bash_completion.d XEN_LOCK_DIR := @XEN_LOCK_DIR@ -XEN_PAGING_DIR := @XEN_PAGING_DIR@ XEN_DUMP_DIR := @XEN_DUMP_DIR@ DEBUG_DIR := @DEBUG_DIR@ diff --git a/configure b/configure index 1dbaeb3c5cfa..152c478abfd3 100755 --- a/configure +++ b/configure @@ -627,7 +627,6 @@ xen subdirs DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -2215,9 +2214,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/docs/INDEX b/docs/INDEX index e673edd75c31..6eec23f5cbc2 100644 --- a/docs/INDEX +++ b/docs/INDEX @@ -18,7 +18,6 @@ misc/distro_mapping Distro Directory Layouts misc/dump-core-format Xen Core Dump Format misc/vtd VT-d HOWTO misc/xen-error-handling Xen Error Handling -misc/xenpaging Xen Paging misc/xsm-flask XSM/FLASK Configuration misc/arm/booting How to boot Xen on ARM misc/arm/early-printk Enabling early printk on ARM diff --git a/docs/configure b/docs/configure index 8871914dcbe1..c8ef084e7ee3 100755 --- a/docs/configure +++ b/docs/configure @@ -626,7 +626,6 @@ POD2MAN FIG2DEV DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -2020,9 +2019,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/docs/misc/xenpaging.txt b/docs/misc/xenpaging.txt deleted file mode 100644 index 742523e145bc..000000000000 --- a/docs/misc/xenpaging.txt +++ /dev/null @@ -1,45 +0,0 @@ -Warning: - -The xenpaging code is new and not fully debugged. -Usage of xenpaging can crash Xen or cause severe data corruption in the -guest memory and its filesystems! - -Description: - -xenpaging writes memory pages of a given guest to a file and moves the -pages back to the pool of available memory. Once the guests wants to -access the paged-out memory, the page is read from disk and placed into -memory. This allows the sum of all running guests to use more memory -than physically available on the host. - -Requirements: - -xenpaging relies on Intel EPT or AMD RVI, other hardware is not -supported. Only HVM guests are supported. The dom0 kernel needs -paging-aware backend drivers to handle paged granttable entries. -Currently only dom0 kernels based on classic Xen Linux support this -functionality. - -Usage: - -Up to now xenpaging is not integrated into libxl/xend, so it has to be -started manually for each guest. - -Once the guest is running, run xenpaging with the guest_id and the path -to the pagefile: - - /usr/lib/xen/bin/xenpaging -f /path/to/page_file -d dom_id & - -Once xenpaging runs it needs a memory target, which is the memory -footprint of the guest. This value (in KiB) must be written manually to -xenstore. The following example sets the target to 512MB: - - xenstore-write /local/domain//memory/target-tot_pages $((1024*512)) - -Now xenpaging tries to page-out as many pages to keep the overall memory -footprint of the guest at 512MB. - -Todo: -- integrate xenpaging into libxl - -# vim: tw=72 diff --git a/m4/paths.m4 b/m4/paths.m4 index 3f94c62efb99..e9382fd6534b 100644 --- a/m4/paths.m4 +++ b/m4/paths.m4 @@ -158,9 +158,6 @@ esac AC_SUBST(XEN_LOCK_DIR) AC_DEFINE_UNQUOTED([XEN_LOCK_DIR], ["$XEN_LOCK_DIR"], [Xen's lock dir]) -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging -AC_SUBST(XEN_PAGING_DIR) - XEN_DUMP_DIR=$xen_dumpdir_path AC_SUBST(XEN_DUMP_DIR) AC_DEFINE_UNQUOTED([XEN_DUMP_DIR], ["$XEN_DUMP_DIR"], [Xen's dump directory]) diff --git a/tools/Makefile b/tools/Makefile index 6ecf7c0da821..8752c9369688 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -32,7 +32,6 @@ SUBDIRS-$(CONFIG_GOLANG) += golang SUBDIRS-y += xl SUBDIRS-y += helpers SUBDIRS-y += 9pfsd -SUBDIRS-$(CONFIG_X86) += xenpaging SUBDIRS-$(CONFIG_X86) += debugger SUBDIRS-$(CONFIG_TESTS) += tests diff --git a/tools/configure b/tools/configure index 6f69b0b52634..9e8790d90a8a 100755 --- a/tools/configure +++ b/tools/configure @@ -742,7 +742,6 @@ rpath werror DEBUG_DIR XEN_DUMP_DIR -XEN_PAGING_DIR XEN_LOCK_DIR INITD_DIR SHAREDIR @@ -4558,9 +4557,6 @@ esac printf "%s\n" "#define XEN_LOCK_DIR \"$XEN_LOCK_DIR\"" >>confdefs.h -XEN_PAGING_DIR=$localstatedir/lib/xen/xenpaging - - XEN_DUMP_DIR=$xen_dumpdir_path diff --git a/tools/hotplug/common/hotplugpath.sh.in b/tools/hotplug/common/hotplugpath.sh.in index 1036b884b804..d8e257170605 100644 --- a/tools/hotplug/common/hotplugpath.sh.in +++ b/tools/hotplug/common/hotplugpath.sh.in @@ -9,7 +9,6 @@ XEN_CONFIG_DIR="@XEN_CONFIG_DIR@" XEN_SCRIPT_DIR="@XEN_SCRIPT_DIR@" XEN_LOCK_DIR="@XEN_LOCK_DIR@" XEN_RUN_DIR="@XEN_RUN_DIR@" -XEN_PAGING_DIR="@XEN_PAGING_DIR@" XEN_DUMP_DIR="@XEN_DUMP_DIR@" XEN_LOG_DIR="@XEN_LOG_DIR@" XEN_LIB_DIR="@XEN_LIB_DIR@" diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..a46a6cfd42ac 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2012,22 +2012,6 @@ int xc_altp2m_get_vcpu_p2m_idx(xc_interface *handle, uint32_t domid, int xc_altp2m_set_visibility(xc_interface *handle, uint32_t domid, uint16_t view_id, bool visible); -/** - * Mem paging operations. - * Paging is supported only on the x86 architecture in 64 bit mode, with - * Hardware-Assisted Paging (i.e. Intel EPT, AMD NPT). Moreover, AMD NPT - * support is considered experimental. - */ -int xc_mem_paging_enable(xc_interface *xch, uint32_t domain_id, uint32_t *port); -int xc_mem_paging_disable(xc_interface *xch, uint32_t domain_id); -int xc_mem_paging_resume(xc_interface *xch, uint32_t domain_id); -int xc_mem_paging_nominate(xc_interface *xch, uint32_t domain_id, - uint64_t gfn); -int xc_mem_paging_evict(xc_interface *xch, uint32_t domain_id, uint64_t gfn); -int xc_mem_paging_prep(xc_interface *xch, uint32_t domain_id, uint64_t gfn); -int xc_mem_paging_load(xc_interface *xch, uint32_t domain_id, - uint64_t gfn, void *buffer); - /** * Access tracking operations. * Supported only on Intel EPT 64 bit processors. @@ -2160,8 +2144,8 @@ int xc_memshr_control(xc_interface *xch, * ENOMEM happens when unsharing pages: a Copy-on-Write duplicate needs to be * allocated, and thus the out-of-memory error occurr. * - * For complete examples on how to plumb a notification ring, look into - * xenpaging or xen-access. + * For complete examples on how to plumb a notification ring, look at + * xen-access. * * On receipt of a notification, the helper should ensure there is memory * available to the domain before retrying. diff --git a/tools/libs/ctrl/Makefile.common b/tools/libs/ctrl/Makefile.common index 68137d42f2b5..c955f54743da 100644 --- a/tools/libs/ctrl/Makefile.common +++ b/tools/libs/ctrl/Makefile.common @@ -18,7 +18,6 @@ OBJS-y += xc_vm_event.o OBJS-y += xc_vmtrace.o OBJS-y += xc_version.o OBJS-y += xc_monitor.o -OBJS-y += xc_mem_paging.o OBJS-y += xc_mem_access.o OBJS-y += xc_memshr.o OBJS-y += xc_hcall_buf.o diff --git a/tools/libs/ctrl/xc_mem_paging.c b/tools/libs/ctrl/xc_mem_paging.c deleted file mode 100644 index 999a572cefdc..000000000000 --- a/tools/libs/ctrl/xc_mem_paging.c +++ /dev/null @@ -1,130 +0,0 @@ -/****************************************************************************** - * - * tools/libxc/xc_mem_paging.c - * - * Interface to low-level memory paging functionality. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This library is free software; you can redistribute it and/or - * modify it under the terms of the GNU Lesser General Public - * License as published by the Free Software Foundation; either - * version 2.1 of the License, or (at your option) any later version. - * - * This library is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Lesser General Public License for more details. - * - * You should have received a copy of the GNU Lesser General Public - * License along with this library; If not, see . - */ - -#include "xc_private.h" - -static int xc_mem_paging_memop(xc_interface *xch, uint32_t domain_id, - unsigned int op, uint64_t gfn, void *buffer) -{ - xen_mem_paging_op_t mpo; - DECLARE_HYPERCALL_BOUNCE(buffer, XC_PAGE_SIZE, - XC_HYPERCALL_BUFFER_BOUNCE_IN); - int rc; - - memset(&mpo, 0, sizeof(mpo)); - - mpo.op = op; - mpo.domain = domain_id; - mpo.gfn = gfn; - - if ( buffer ) - { - if ( xc_hypercall_bounce_pre(xch, buffer) ) - { - PERROR("Could not bounce memory for XENMEM_paging_op %u", op); - return -1; - } - - set_xen_guest_handle(mpo.buffer, buffer); - } - - rc = xc_memory_op(xch, XENMEM_paging_op, &mpo, sizeof(mpo)); - - if ( buffer ) - xc_hypercall_bounce_post(xch, buffer); - - return rc; -} - -int xc_mem_paging_enable(xc_interface *xch, uint32_t domain_id, - uint32_t *port) -{ - if ( !port ) - { - errno = EINVAL; - return -1; - } - - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_ENABLE, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - port); -} - -int xc_mem_paging_disable(xc_interface *xch, uint32_t domain_id) -{ - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_DISABLE, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - NULL); -} - -int xc_mem_paging_resume(xc_interface *xch, uint32_t domain_id) -{ - return xc_vm_event_control(xch, domain_id, - XEN_VM_EVENT_RESUME, - XEN_DOMCTL_VM_EVENT_OP_PAGING, - NULL); -} - -int xc_mem_paging_nominate(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_nominate, - gfn, NULL); -} - -int xc_mem_paging_evict(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_evict, - gfn, NULL); -} - -int xc_mem_paging_prep(xc_interface *xch, uint32_t domain_id, uint64_t gfn) -{ - return xc_mem_paging_memop(xch, domain_id, - XENMEM_paging_op_prep, - gfn, NULL); -} - -int xc_mem_paging_load(xc_interface *xch, uint32_t domain_id, - uint64_t gfn, void *buffer) -{ - errno = EINVAL; - - if ( !buffer ) - return -1; - - return xc_mem_paging_memop(xch, domain_id, XENMEM_paging_op_prep, - gfn, buffer); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/Makefile b/tools/xenpaging/Makefile deleted file mode 100644 index 835cf2b96553..000000000000 --- a/tools/xenpaging/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -XEN_ROOT=$(CURDIR)/../.. -include $(XEN_ROOT)/tools/Rules.mk - -CFLAGS += $(CFLAGS_libxentoollog) $(CFLAGS_libxenevtchn) $(CFLAGS_libxenctrl) $(CFLAGS_libxenstore) $(PTHREAD_CFLAGS) $(CFLAGS_libxencall) -LDLIBS += $(LDLIBS_libxentoollog) $(LDLIBS_libxenevtchn) $(LDLIBS_libxenctrl) $(LDLIBS_libxenstore) $(PTHREAD_LIBS) -LDFLAGS += $(PTHREAD_LDFLAGS) - -POLICY := default - -OBJS-y := file_ops.o -OBJS-y += xenpaging.o -OBJS-y += policy_$(POLICY).o -OBJS-y += pagein.o - -CFLAGS += -Wno-unused - -TARGETS := xenpaging - -all: $(TARGETS) - -xenpaging: $(OBJS-y) - $(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS) $(APPEND_LDFLAGS) - -install: all - $(INSTALL_DIR) -m 0700 $(DESTDIR)$(XEN_PAGING_DIR) - $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC_BIN) - $(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC_BIN) - -uninstall: - rm -f $(addprefix $(DESTDIR)$(LIBEXEC_BIN)/, $(TARGETS)) - -clean: - rm -f *.o *~ $(DEPS_RM) TAGS $(TARGETS) - -distclean: clean - -.PHONY: clean install distclean uninstall - -.PHONY: TAGS -TAGS: - etags -t *.c *.h - --include $(DEPS_INCLUDE) diff --git a/tools/xenpaging/file_ops.c b/tools/xenpaging/file_ops.c deleted file mode 100644 index 301fb3427cc5..000000000000 --- a/tools/xenpaging/file_ops.c +++ /dev/null @@ -1,71 +0,0 @@ -/****************************************************************************** - * - * Common file operations. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#include -#include - -static int file_op(int fd, void *page, int i, - ssize_t (*fn)(int, void *, size_t)) -{ - off_t offset = i; - int total = 0; - int bytes; - - offset = lseek(fd, offset << XC_PAGE_SHIFT, SEEK_SET); - if ( offset == (off_t)-1 ) - return -1; - - while ( total < XC_PAGE_SIZE ) - { - bytes = fn(fd, page + total, XC_PAGE_SIZE - total); - if ( bytes <= 0 ) - return -1; - - total += bytes; - } - - return 0; -} - -static ssize_t my_write(int fd, void *buf, size_t count) -{ - return write(fd, buf, count); -} - -int read_page(int fd, void *page, int i) -{ - return file_op(fd, page, i, &read); -} - -int write_page(int fd, void *page, int i) -{ - return file_op(fd, page, i, &my_write); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/file_ops.h b/tools/xenpaging/file_ops.h deleted file mode 100644 index ee3fd7d8b86c..000000000000 --- a/tools/xenpaging/file_ops.h +++ /dev/null @@ -1,41 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/file_ops.h - * - * Common file operations. - * - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __FILE_OPS_H__ -#define __FILE_OPS_H__ - - -int read_page(int fd, void *page, int i); -int write_page(int fd, void *page, int i); - - -#endif - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/pagein.c b/tools/xenpaging/pagein.c deleted file mode 100644 index 1c8a7d983dc2..000000000000 --- a/tools/xenpaging/pagein.c +++ /dev/null @@ -1,79 +0,0 @@ -/* Trigger a page-in in a separate thread-of-execution to avoid deadlock */ -#include -#include "xenpaging.h" - -struct page_in_args { - domid_t dom; - unsigned long *pagein_queue; - xc_interface *xch; -}; - -static struct page_in_args page_in_args; -static unsigned long page_in_request; -static unsigned int page_in_possible; - -static pthread_t page_in_thread; -static pthread_cond_t page_in_cond = PTHREAD_COND_INITIALIZER; -static pthread_mutex_t page_in_mutex = PTHREAD_MUTEX_INITIALIZER; - -static void *page_in(void *arg) -{ - struct page_in_args *pia = arg; - void *page; - int i, num; - xen_pfn_t gfns[XENPAGING_PAGEIN_QUEUE_SIZE]; - - while (1) - { - pthread_mutex_lock(&page_in_mutex); - while (!page_in_request) - pthread_cond_wait(&page_in_cond, &page_in_mutex); - num = 0; - for (i = 0; i < XENPAGING_PAGEIN_QUEUE_SIZE; i++) - { - if (!pia->pagein_queue[i]) - continue; - gfns[num] = pia->pagein_queue[i]; - pia->pagein_queue[i] = 0; - num++; - } - page_in_request = 0; - pthread_mutex_unlock(&page_in_mutex); - - /* Ignore errors */ - page = xc_map_foreign_pages(pia->xch, pia->dom, PROT_READ, gfns, num); - if (page) - munmap(page, XC_PAGE_SIZE * num); - } - page_in_possible = 0; - pthread_exit(NULL); -} - -void page_in_trigger(void) -{ - if (!page_in_possible) - return; - - pthread_mutex_lock(&page_in_mutex); - page_in_request = 1; - pthread_mutex_unlock(&page_in_mutex); - pthread_cond_signal(&page_in_cond); -} - -void create_page_in_thread(struct xenpaging *paging) -{ - page_in_args.dom = paging->vm_event.domain_id; - page_in_args.pagein_queue = paging->pagein_queue; - page_in_args.xch = paging->xc_handle; - if (pthread_create(&page_in_thread, NULL, page_in, &page_in_args) == 0) - page_in_possible = 1; -} - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/policy.h b/tools/xenpaging/policy.h deleted file mode 100644 index b1425a90ef6d..000000000000 --- a/tools/xenpaging/policy.h +++ /dev/null @@ -1,48 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/policy.h - * - * Xen domain paging policy hooks. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __XEN_PAGING_POLICY_H__ -#define __XEN_PAGING_POLICY_H__ - - -#include "xenpaging.h" - - -int policy_init(struct xenpaging *paging); -unsigned long policy_choose_victim(struct xenpaging *paging); -void policy_notify_paged_out(unsigned long gfn); -void policy_notify_paged_in(unsigned long gfn); -void policy_notify_paged_in_nomru(unsigned long gfn); -void policy_notify_dropped(unsigned long gfn); - -#endif // __XEN_PAGING_POLICY_H__ - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/policy_default.c b/tools/xenpaging/policy_default.c deleted file mode 100644 index 979d25123045..000000000000 --- a/tools/xenpaging/policy_default.c +++ /dev/null @@ -1,186 +0,0 @@ -/****************************************************************************** - * - * Xen domain paging default policy. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - -#include - -#include "policy.h" - - -#define DEFAULT_MRU_SIZE (1024 * 16) - - -static unsigned long *mru; -static unsigned int i_mru; -static unsigned int mru_size; -static unsigned long *bitmap; -static unsigned long *unconsumed; -static unsigned int unconsumed_cleared; -static unsigned long current_gfn; -static unsigned long max_pages; - - -int policy_init(struct xenpaging *paging) -{ - int i; - int rc = -ENOMEM; - - max_pages = paging->max_pages; - - /* Allocate bitmap for pages not to page out */ - bitmap = bitmap_alloc(max_pages); - if ( !bitmap ) - goto out; - /* Allocate bitmap to track unusable pages */ - unconsumed = bitmap_alloc(max_pages); - if ( !unconsumed ) - goto out; - - /* Initialise MRU list of paged in pages */ - if ( paging->policy_mru_size > 0 ) - mru_size = paging->policy_mru_size; - else - mru_size = paging->policy_mru_size = DEFAULT_MRU_SIZE; - - mru = malloc(sizeof(*mru) * mru_size); - if ( mru == NULL ) - goto out; - - for ( i = 0; i < mru_size; i++ ) - mru[i] = INVALID_MFN; - - /* Don't page out page 0 */ - set_bit(0, bitmap); - - /* Start in the middle to avoid paging during BIOS startup */ - current_gfn = max_pages / 2; - - rc = 0; - out: - return rc; -} - -unsigned long policy_choose_victim(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - unsigned long i; - - /* One iteration over all possible gfns */ - for ( i = 0; i < max_pages; i++ ) - { - /* Try next gfn */ - current_gfn++; - - /* Restart on wrap */ - if ( current_gfn >= max_pages ) - current_gfn = 0; - - if ( (current_gfn & (BITS_PER_LONG - 1)) == 0 ) - { - /* All gfns busy */ - if ( ~bitmap[current_gfn >> ORDER_LONG] == 0 || ~unconsumed[current_gfn >> ORDER_LONG] == 0 ) - { - current_gfn += BITS_PER_LONG; - i += BITS_PER_LONG; - continue; - } - } - - /* gfn busy */ - if ( test_bit(current_gfn, bitmap) ) - continue; - - /* gfn already tested */ - if ( test_bit(current_gfn, unconsumed) ) - continue; - - /* gfn found */ - break; - } - - /* Could not nominate any gfn */ - if ( i >= max_pages ) - { - /* No more pages, wait in poll */ - paging->use_poll_timeout = 1; - /* Count wrap arounds */ - unconsumed_cleared++; - /* Force retry every few seconds (depends on poll() timeout) */ - if ( unconsumed_cleared > 123) - { - /* Force retry of unconsumed gfns on next call */ - bitmap_clear(unconsumed, max_pages); - unconsumed_cleared = 0; - DPRINTF("clearing unconsumed, current_gfn %lx", current_gfn); - } - return INVALID_MFN; - } - - set_bit(current_gfn, unconsumed); - return current_gfn; -} - -void policy_notify_paged_out(unsigned long gfn) -{ - set_bit(gfn, bitmap); - clear_bit(gfn, unconsumed); -} - -static void policy_handle_paged_in(unsigned long gfn, int do_mru) -{ - unsigned long old_gfn = mru[i_mru & (mru_size - 1)]; - - if ( old_gfn != INVALID_MFN ) - clear_bit(old_gfn, bitmap); - - if (do_mru) { - mru[i_mru & (mru_size - 1)] = gfn; - } else { - clear_bit(gfn, bitmap); - mru[i_mru & (mru_size - 1)] = INVALID_MFN; - } - - i_mru++; -} - -void policy_notify_paged_in(unsigned long gfn) -{ - policy_handle_paged_in(gfn, 1); -} - -void policy_notify_paged_in_nomru(unsigned long gfn) -{ - policy_handle_paged_in(gfn, 0); -} - -void policy_notify_dropped(unsigned long gfn) -{ - clear_bit(gfn, bitmap); -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/xenpaging.c b/tools/xenpaging/xenpaging.c deleted file mode 100644 index c7a9a8247766..000000000000 --- a/tools/xenpaging/xenpaging.c +++ /dev/null @@ -1,1084 +0,0 @@ -/****************************************************************************** - * - * Domain paging. - * Copyright (c) 2009 by Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - -#define _GNU_SOURCE - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include "file_ops.h" -#include "policy.h" -#include "xenpaging.h" - -/* Defines number of mfns a guest should use at a time, in KiB */ -#define WATCH_TARGETPAGES "memory/target-tot_pages" -static char *watch_target_tot_pages; -static char *dom_path; -static char watch_token[16]; -static char *filename; -static int interrupted; - -static void unlink_pagefile(void) -{ - if ( filename && filename[0] ) - { - unlink(filename); - filename[0] = '\0'; - } -} - -static void close_handler(int sig) -{ - interrupted = sig; - unlink_pagefile(); -} - -static void xenpaging_mem_paging_flush_ioemu_cache(struct xenpaging *paging) -{ - struct xs_handle *xsh = paging->xs_handle; - domid_t domain_id = paging->vm_event.domain_id; - char path[80]; - - sprintf(path, "/local/domain/0/device-model/%u/command", domain_id); - - xs_write(xsh, XBT_NULL, path, "flush-cache", strlen("flush-cache")); -} - -static int xenpaging_wait_for_event_or_timeout(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - xenevtchn_handle *xce = paging->vm_event.xce_handle; - char **vec, *val; - unsigned int num; - struct pollfd fd[2]; - int port; - int rc; - int timeout; - - /* Wait for event channel and xenstore */ - fd[0].fd = xenevtchn_fd(xce); - fd[0].events = POLLIN | POLLERR; - fd[1].fd = xs_fileno(paging->xs_handle); - fd[1].events = POLLIN | POLLERR; - - /* No timeout while page-out is still in progress */ - timeout = paging->use_poll_timeout ? 100 : 0; - rc = poll(fd, 2, timeout); - if ( rc < 0 ) - { - if (errno == EINTR) - return 0; - - PERROR("Poll exited with an error"); - return -1; - } - - /* First check for guest shutdown */ - if ( rc && fd[1].revents & POLLIN ) - { - DPRINTF("Got event from xenstore\n"); - vec = xs_read_watch(paging->xs_handle, &num); - if ( vec ) - { - DPRINTF("path '%s' token '%s'\n", vec[XS_WATCH_PATH], vec[XS_WATCH_TOKEN]); - if ( strcmp(vec[XS_WATCH_TOKEN], watch_token) == 0 ) - { - /* If our guest disappeared, set interrupt flag and fall through */ - if ( xs_is_domain_introduced(paging->xs_handle, paging->vm_event.domain_id) == false ) - { - xs_unwatch(paging->xs_handle, "@releaseDomain", watch_token); - interrupted = SIGQUIT; - /* No further poll result processing */ - rc = 0; - } - } - else if ( strcmp(vec[XS_WATCH_PATH], watch_target_tot_pages) == 0 ) - { - int ret, target_tot_pages; - val = xs_read(paging->xs_handle, XBT_NULL, vec[XS_WATCH_PATH], NULL); - if ( val ) - { - ret = sscanf(val, "%d", &target_tot_pages); - if ( ret > 0 ) - { - /* KiB to pages */ - target_tot_pages >>= 2; - if ( target_tot_pages < 0 || target_tot_pages > paging->max_pages ) - target_tot_pages = paging->max_pages; - paging->target_tot_pages = target_tot_pages; - /* Disable poll() delay while new target is not yet reached */ - paging->use_poll_timeout = 0; - DPRINTF("new target_tot_pages %d\n", target_tot_pages); - } - free(val); - } - } - free(vec); - } - } - - if ( rc && fd[0].revents & POLLIN ) - { - DPRINTF("Got event from evtchn\n"); - port = xenevtchn_pending(xce); - if ( port == -1 ) - { - PERROR("Failed to read port from event channel"); - rc = -1; - goto err; - } - - rc = xenevtchn_unmask(xce, port); - if ( rc < 0 ) - { - PERROR("Failed to unmask event channel port"); - } - } -err: - return rc; -} - -static int xenpaging_get_tot_pages(struct xenpaging *paging) -{ - xc_interface *xch = paging->xc_handle; - xc_domaininfo_t domain_info; - int rc; - - rc = xc_domain_getinfo_single(xch, paging->vm_event.domain_id, &domain_info); - if ( rc < 0 ) - { - PERROR("Error getting domain info"); - return -1; - } - return domain_info.tot_pages; -} - -static void *init_page(void) -{ - void *buffer; - - /* Allocated page memory */ - errno = posix_memalign(&buffer, XC_PAGE_SIZE, XC_PAGE_SIZE); - if ( errno != 0 ) - return NULL; - - /* Lock buffer in memory so it can't be paged out */ - if ( mlock(buffer, XC_PAGE_SIZE) < 0 ) - { - free(buffer); - buffer = NULL; - } - - return buffer; -} - -static void usage(void) -{ - printf("usage:\n\n"); - - printf(" xenpaging [options] -f -d \n\n"); - - printf("options:\n"); - printf(" -d --domain= numerical domain_id of guest. This option is required.\n"); - printf(" -f --pagefile= pagefile to use. This option is required.\n"); - printf(" -m --max_memkb= maximum amount of memory to handle.\n"); - printf(" -r --mru_size= number of paged-in pages to keep in memory.\n"); - printf(" -v --verbose enable debug output.\n"); - printf(" -h --help this output.\n"); -} - -static int xenpaging_getopts(struct xenpaging *paging, int argc, char *argv[]) -{ - int ch; - static const char sopts[] = "hvd:f:m:r:"; - static const struct option lopts[] = { - {"help", 0, NULL, 'h'}, - {"verbose", 0, NULL, 'v'}, - {"domain", 1, NULL, 'd'}, - {"pagefile", 1, NULL, 'f'}, - {"mru_size", 1, NULL, 'm'}, - { } - }; - - while ((ch = getopt_long(argc, argv, sopts, lopts, NULL)) != -1) - { - switch(ch) { - case 'd': - paging->vm_event.domain_id = atoi(optarg); - break; - case 'f': - free(filename); - filename = strdup(optarg); - break; - case 'm': - /* KiB to pages */ - paging->max_pages = atoi(optarg) >> 2; - break; - case 'r': - paging->policy_mru_size = atoi(optarg); - break; - case 'v': - paging->debug = 1; - break; - case 'h': - case '?': - usage(); - return 1; - } - } - - argv += optind; argc -= optind; - - /* Path to pagefile is required */ - if ( !filename ) - { - printf("Filename for pagefile missing!\n"); - usage(); - return 1; - } - - /* Set domain id */ - if ( !paging->vm_event.domain_id ) - { - printf("Numerical missing!\n"); - return 1; - } - - return 0; -} - -static struct xenpaging *xenpaging_init(int argc, char *argv[]) -{ - struct xenpaging *paging; - xc_domaininfo_t domain_info; - xc_interface *xch = NULL; - char *p; - int rc; - unsigned long ring_pfn, mmap_pfn; - - /* Allocate memory */ - paging = calloc(1, sizeof(struct xenpaging)); - if ( !paging ) - goto err; - - /* Get cmdline options and domain_id */ - if ( xenpaging_getopts(paging, argc, argv) ) - goto err; - - paging->logger = (xentoollog_logger *)xtl_createlogger_stdiostream(stderr, - paging->debug ? XTL_DEBUG : XTL_PROGRESS, 0); - - /* Open connection to xen */ - paging->xc_handle = xch = xc_interface_open(paging->logger, NULL, 0); - if ( !xch ) - goto err; - - DPRINTF("xenpaging init\n"); - - /* Open connection to xenstore */ - paging->xs_handle = xs_open(0); - if ( paging->xs_handle == NULL ) - { - PERROR("Error initialising xenstore connection"); - goto err; - } - - /* write domain ID to watch so we can ignore other domain shutdowns */ - snprintf(watch_token, sizeof(watch_token), "%u", paging->vm_event.domain_id); - if ( xs_watch(paging->xs_handle, "@releaseDomain", watch_token) == false ) - { - PERROR("Could not bind to shutdown watch\n"); - goto err; - } - - /* Watch xenpagings working target */ - dom_path = xs_get_domain_path(paging->xs_handle, paging->vm_event.domain_id); - if ( !dom_path ) - { - PERROR("Could not find domain path\n"); - goto err; - } - if ( asprintf(&watch_target_tot_pages, "%s/%s", dom_path, WATCH_TARGETPAGES) < 0 ) - { - PERROR("Could not alloc watch path\n"); - goto err; - } - DPRINTF("watching '%s'\n", watch_target_tot_pages); - if ( xs_watch(paging->xs_handle, watch_target_tot_pages, "") == false ) - { - PERROR("Could not bind to xenpaging watch\n"); - goto err; - } - - /* Map the ring page */ - xc_get_hvm_param(xch, paging->vm_event.domain_id, - HVM_PARAM_PAGING_RING_PFN, &ring_pfn); - mmap_pfn = ring_pfn; - paging->vm_event.ring_page = - xc_map_foreign_pages(xch, paging->vm_event.domain_id, - PROT_READ | PROT_WRITE, &mmap_pfn, 1); - if ( !paging->vm_event.ring_page ) - { - /* Map failed, populate ring page */ - rc = xc_domain_populate_physmap_exact(paging->xc_handle, - paging->vm_event.domain_id, - 1, 0, 0, &ring_pfn); - if ( rc != 0 ) - { - PERROR("Failed to populate ring gfn\n"); - goto err; - } - - paging->vm_event.ring_page = - xc_map_foreign_pages(xch, paging->vm_event.domain_id, - PROT_READ | PROT_WRITE, - &mmap_pfn, 1); - if ( !paging->vm_event.ring_page ) - { - PERROR("Could not map the ring page\n"); - goto err; - } - } - - /* Initialise Xen */ - rc = xc_mem_paging_enable(xch, paging->vm_event.domain_id, - &paging->vm_event.evtchn_port); - if ( rc != 0 ) - { - switch ( errno ) { - case EBUSY: - ERROR("xenpaging is (or was) active on this domain"); - break; - case ENODEV: - ERROR("xenpaging requires Hardware Assisted Paging"); - break; - case EMLINK: - ERROR("xenpaging not supported while iommu passthrough is enabled"); - break; - case EXDEV: - ERROR("xenpaging not supported in a PoD guest"); - break; - default: - PERROR("Error initialising shared page"); - break; - } - goto err; - } - - /* Open event channel */ - paging->vm_event.xce_handle = xenevtchn_open(NULL, 0); - if ( paging->vm_event.xce_handle == NULL ) - { - PERROR("Failed to open event channel"); - goto err; - } - - /* Bind event notification */ - rc = xenevtchn_bind_interdomain(paging->vm_event.xce_handle, - paging->vm_event.domain_id, - paging->vm_event.evtchn_port); - if ( rc < 0 ) - { - PERROR("Failed to bind event channel"); - goto err; - } - - paging->vm_event.port = rc; - - /* Initialise ring */ - SHARED_RING_INIT((vm_event_sring_t *)paging->vm_event.ring_page); - BACK_RING_INIT(&paging->vm_event.back_ring, - (vm_event_sring_t *)paging->vm_event.ring_page, - XC_PAGE_SIZE); - - /* Now that the ring is set, remove it from the guest's physmap */ - if ( xc_domain_decrease_reservation_exact(xch, - paging->vm_event.domain_id, 1, 0, &ring_pfn) ) - PERROR("Failed to remove ring from guest physmap"); - - /* Get max_pages from guest if not provided via cmdline */ - if ( !paging->max_pages ) - { - rc = xc_domain_getinfo_single(xch, paging->vm_event.domain_id, - &domain_info); - if ( rc < 0 ) - { - PERROR("Error getting domain info"); - goto err; - } - - /* Record number of max_pages */ - paging->max_pages = domain_info.max_pages; - } - - /* Allocate bitmap for tracking pages that have been paged out */ - paging->bitmap = bitmap_alloc(paging->max_pages); - if ( !paging->bitmap ) - { - PERROR("Error allocating bitmap"); - goto err; - } - DPRINTF("max_pages = %d\n", paging->max_pages); - - /* Allocate indicies for pagefile slots */ - paging->slot_to_gfn = calloc(paging->max_pages, sizeof(*paging->slot_to_gfn)); - paging->gfn_to_slot = calloc(paging->max_pages, sizeof(*paging->gfn_to_slot)); - if ( !paging->slot_to_gfn || !paging->gfn_to_slot ) - goto err; - - /* Allocate stack for known free slots in pagefile */ - paging->free_slot_stack = calloc(paging->max_pages, sizeof(*paging->free_slot_stack)); - if ( !paging->free_slot_stack ) - goto err; - - /* Initialise policy */ - rc = policy_init(paging); - if ( rc != 0 ) - { - PERROR("Error initialising policy"); - goto err; - } - - paging->paging_buffer = init_page(); - if ( !paging->paging_buffer ) - { - PERROR("Creating page aligned load buffer"); - goto err; - } - - /* Open file */ - paging->fd = open(filename, O_CREAT | O_TRUNC | O_RDWR, S_IRUSR | S_IWUSR); - if ( paging->fd < 0 ) - { - PERROR("failed to open file"); - goto err; - } - - return paging; - - err: - if ( paging ) - { - if ( paging->xs_handle ) - xs_close(paging->xs_handle); - if ( xch ) - xc_interface_close(xch); - if ( paging->logger ) - xtl_logger_destroy(paging->logger); - if ( paging->paging_buffer ) - { - munlock(paging->paging_buffer, XC_PAGE_SIZE); - free(paging->paging_buffer); - } - - if ( paging->vm_event.ring_page ) - { - munmap(paging->vm_event.ring_page, XC_PAGE_SIZE); - } - - free(dom_path); - free(watch_target_tot_pages); - free(paging->free_slot_stack); - free(paging->slot_to_gfn); - free(paging->gfn_to_slot); - free(paging->bitmap); - free(paging); - } - - return NULL; -} - -static void xenpaging_teardown(struct xenpaging *paging) -{ - int rc; - xc_interface *xch = paging->xc_handle; - - xs_unwatch(paging->xs_handle, watch_target_tot_pages, ""); - xs_unwatch(paging->xs_handle, "@releaseDomain", watch_token); - - paging->xc_handle = NULL; - /* Tear down domain paging in Xen */ - munmap(paging->vm_event.ring_page, XC_PAGE_SIZE); - rc = xc_mem_paging_disable(xch, paging->vm_event.domain_id); - if ( rc != 0 ) - { - PERROR("Error tearing down domain paging in xen"); - } - - /* Unbind VIRQ */ - rc = xenevtchn_unbind(paging->vm_event.xce_handle, paging->vm_event.port); - if ( rc != 0 ) - { - PERROR("Error unbinding event port"); - } - paging->vm_event.port = -1; - - /* Close event channel */ - rc = xenevtchn_close(paging->vm_event.xce_handle); - if ( rc != 0 ) - { - PERROR("Error closing event channel"); - } - paging->vm_event.xce_handle = NULL; - - /* Close connection to xenstore */ - xs_close(paging->xs_handle); - - /* Close connection to Xen */ - xc_interface_close(xch); - - xtl_logger_destroy(paging->logger); -} - -static void get_request(struct vm_event *vm_event, vm_event_request_t *req) -{ - vm_event_back_ring_t *back_ring; - RING_IDX req_cons; - - back_ring = &vm_event->back_ring; - req_cons = back_ring->req_cons; - - /* Copy request */ - memcpy(req, RING_GET_REQUEST(back_ring, req_cons), sizeof(*req)); - req_cons++; - - /* Update ring */ - back_ring->req_cons = req_cons; - back_ring->sring->req_event = req_cons + 1; -} - -static void put_response(struct vm_event *vm_event, vm_event_response_t *rsp) -{ - vm_event_back_ring_t *back_ring; - RING_IDX rsp_prod; - - back_ring = &vm_event->back_ring; - rsp_prod = back_ring->rsp_prod_pvt; - - /* Copy response */ - memcpy(RING_GET_RESPONSE(back_ring, rsp_prod), rsp, sizeof(*rsp)); - rsp_prod++; - - /* Update ring */ - back_ring->rsp_prod_pvt = rsp_prod; - RING_PUSH_RESPONSES(back_ring); -} - -/* Evict a given gfn - * Returns < 0 on fatal error - * Returns 0 on successful evict - * Returns > 0 if gfn can not be evicted - */ -static int xenpaging_evict_page(struct xenpaging *paging, unsigned long gfn, int slot) -{ - xc_interface *xch = paging->xc_handle; - void *page; - xen_pfn_t victim = gfn; - int ret; - struct xen_domctl domctl; - - /* Nominate page */ - ret = xc_mem_paging_nominate(xch, paging->vm_event.domain_id, gfn); - if ( ret < 0 ) - { - /* unpageable gfn is indicated by EBUSY */ - if ( errno == EBUSY ) - ret = 1; - else - PERROR("Error nominating page %lx", gfn); - goto out; - } - - /* Map page */ - page = xc_map_foreign_pages(xch, paging->vm_event.domain_id, PROT_READ, &victim, 1); - if ( page == NULL ) - { - PERROR("Error mapping page %lx", gfn); - ret = -1; - goto out; - } - - /* Copy page */ - ret = write_page(paging->fd, page, slot); - if ( ret < 0 ) - { - PERROR("Error copying page %lx", gfn); - munmap(page, XC_PAGE_SIZE); - ret = -1; - goto out; - } - - /* Release page */ - munmap(page, XC_PAGE_SIZE); - - /* Tell Xen to evict page */ - ret = xc_mem_paging_evict(xch, paging->vm_event.domain_id, gfn); - if ( ret < 0 ) - { - /* A gfn in use is indicated by EBUSY */ - if ( errno == EBUSY ) - { - ret = 1; - DPRINTF("Nominated page %lx busy", gfn); - } else - PERROR("Error evicting page %lx", gfn); - goto out; - } - - DPRINTF("evict_page > gfn %lx pageslot %d\n", gfn, slot); - /* Notify policy of page being paged out */ - policy_notify_paged_out(gfn); - - /* Update index */ - paging->slot_to_gfn[slot] = gfn; - paging->gfn_to_slot[gfn] = slot; - - /* Record number of evicted pages */ - paging->num_paged_out++; - - ret = 0; - - out: - return ret; -} - -static int xenpaging_resume_page(struct xenpaging *paging, vm_event_response_t *rsp, int notify_policy) -{ - /* Put the page info on the ring */ - put_response(&paging->vm_event, rsp); - - /* Notify policy of page being paged in */ - if ( notify_policy ) - { - /* - * Do not add gfn to mru list if the target is lower than mru size. - * This allows page-out of these gfns if the target grows again. - */ - if (paging->num_paged_out > paging->policy_mru_size) - policy_notify_paged_in(rsp->u.mem_paging.gfn); - else - policy_notify_paged_in_nomru(rsp->u.mem_paging.gfn); - - /* Record number of resumed pages */ - paging->num_paged_out--; - } - - /* Tell Xen page is ready */ - return xenevtchn_notify(paging->vm_event.xce_handle, paging->vm_event.port); -} - -static int xenpaging_populate_page(struct xenpaging *paging, unsigned long gfn, int i) -{ - xc_interface *xch = paging->xc_handle; - int ret; - unsigned char oom = 0; - - DPRINTF("populate_page < gfn %lx pageslot %d\n", gfn, i); - - /* Read page */ - ret = read_page(paging->fd, paging->paging_buffer, i); - if ( ret != 0 ) - { - PERROR("Error reading page"); - goto out; - } - - do - { - /* Tell Xen to allocate a page for the domain */ - ret = xc_mem_paging_load(xch, paging->vm_event.domain_id, gfn, paging->paging_buffer); - if ( ret < 0 ) - { - if ( errno == ENOMEM ) - { - if ( oom++ == 0 ) - DPRINTF("ENOMEM while preparing gfn %lx\n", gfn); - sleep(1); - continue; - } - PERROR("Error loading %lx during page-in", gfn); - ret = -1; - break; - } - } - while ( ret && !interrupted ); - - - out: - return ret; -} - -/* Trigger a page-in for a batch of pages */ -static void resume_pages(struct xenpaging *paging, int num_pages) -{ - xc_interface *xch = paging->xc_handle; - int i, num = 0; - - for ( i = 0; i < paging->max_pages && num < num_pages; i++ ) - { - if ( test_bit(i, paging->bitmap) ) - { - paging->pagein_queue[num] = i; - num++; - if ( num == XENPAGING_PAGEIN_QUEUE_SIZE ) - break; - } - } - /* num may be less than num_pages, caller has to try again */ - if ( num ) - page_in_trigger(); -} - -/* Evict one gfn and write it to the given slot - * Returns < 0 on fatal error - * Returns 0 on successful evict - * Returns > 0 if no gfn can be evicted - */ -static int evict_victim(struct xenpaging *paging, int slot) -{ - xc_interface *xch = paging->xc_handle; - unsigned long gfn; - static int num_paged_out; - int ret; - - do - { - gfn = policy_choose_victim(paging); - if ( gfn == INVALID_MFN ) - { - /* If the number did not change after last flush command then - * the command did not reach qemu yet, or qemu still processes - * the command, or qemu has nothing to release. - * Right now there is no need to issue the command again. - */ - if ( num_paged_out != paging->num_paged_out ) - { - DPRINTF("Flushing qemu cache\n"); - xenpaging_mem_paging_flush_ioemu_cache(paging); - num_paged_out = paging->num_paged_out; - } - ret = ENOSPC; - goto out; - } - - if ( interrupted ) - { - ret = EINTR; - goto out; - } - - ret = xenpaging_evict_page(paging, gfn, slot); - if ( ret < 0 ) - goto out; - } - while ( ret ); - - if ( test_and_set_bit(gfn, paging->bitmap) ) - ERROR("Page %lx has been evicted before", gfn); - - ret = 0; - - out: - return ret; -} - -/* Evict a batch of pages and write them to a free slot in the paging file - * Returns < 0 on fatal error - * Returns 0 if no gfn can be evicted - * Returns > 0 on successful evict - */ -static int evict_pages(struct xenpaging *paging, int num_pages) -{ - xc_interface *xch = paging->xc_handle; - int rc, slot, num = 0; - - /* Reuse known free slots */ - while ( paging->stack_count > 0 && num < num_pages ) - { - slot = paging->free_slot_stack[--paging->stack_count]; - rc = evict_victim(paging, slot); - if ( rc ) - { - num = rc < 0 ? -1 : num; - return num; - } - num++; - } - - /* Scan all slots slots for remainders */ - for ( slot = 0; slot < paging->max_pages && num < num_pages; slot++ ) - { - /* Slot is allocated */ - if ( paging->slot_to_gfn[slot] ) - continue; - - rc = evict_victim(paging, slot); - if ( rc ) - { - num = rc < 0 ? -1 : num; - break; - } - - num++; - } - return num; -} - -int main(int argc, char *argv[]) -{ - struct sigaction act; - struct xenpaging *paging; - vm_event_request_t req; - vm_event_response_t rsp; - int num, prev_num = 0; - int slot; - int tot_pages; - int rc; - xc_interface *xch; - - /* Initialise domain paging */ - paging = xenpaging_init(argc, argv); - if ( paging == NULL ) - { - fprintf(stderr, "Error initialising paging\n"); - return 1; - } - xch = paging->xc_handle; - - DPRINTF("starting %s for domain_id %u with pagefile %s\n", - argv[0], paging->vm_event.domain_id, filename); - - /* ensure that if we get a signal, we'll do cleanup, then exit */ - act.sa_handler = close_handler; - act.sa_flags = 0; - sigemptyset(&act.sa_mask); - sigaction(SIGHUP, &act, NULL); - sigaction(SIGTERM, &act, NULL); - sigaction(SIGINT, &act, NULL); - sigaction(SIGALRM, &act, NULL); - - /* listen for page-in events to stop pager */ - create_page_in_thread(paging); - - /* Swap pages in and out */ - while ( 1 ) - { - /* Wait for Xen to signal that a page needs paged in */ - rc = xenpaging_wait_for_event_or_timeout(paging); - if ( rc < 0 ) - { - ERROR("Error getting event"); - goto out; - } - else if ( rc != 0 ) - { - DPRINTF("Got event from Xen\n"); - } - - while ( RING_HAS_UNCONSUMED_REQUESTS(&paging->vm_event.back_ring) ) - { - /* Indicate possible error */ - rc = 1; - - get_request(&paging->vm_event, &req); - - if ( req.u.mem_paging.gfn > paging->max_pages ) - { - ERROR("Requested gfn %"PRIx64" higher than max_pages %x\n", - req.u.mem_paging.gfn, paging->max_pages); - goto out; - } - - /* Check if the page has already been paged in */ - if ( test_and_clear_bit(req.u.mem_paging.gfn, paging->bitmap) ) - { - /* Find where in the paging file to read from */ - slot = paging->gfn_to_slot[req.u.mem_paging.gfn]; - - /* Sanity check */ - if ( paging->slot_to_gfn[slot] != req.u.mem_paging.gfn ) - { - ERROR("Expected gfn %"PRIx64" in slot %d, but found gfn %lx\n", - req.u.mem_paging.gfn, slot, paging->slot_to_gfn[slot]); - goto out; - } - - if ( req.u.mem_paging.flags & MEM_PAGING_DROP_PAGE ) - { - DPRINTF("drop_page ^ gfn %"PRIx64" pageslot %d\n", - req.u.mem_paging.gfn, slot); - /* Notify policy of page being dropped */ - policy_notify_dropped(req.u.mem_paging.gfn); - } - else - { - /* Populate the page */ - if ( xenpaging_populate_page(paging, req.u.mem_paging.gfn, slot) < 0 ) - { - ERROR("Error populating page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - } - - /* Prepare the response */ - rsp.u.mem_paging.gfn = req.u.mem_paging.gfn; - rsp.vcpu_id = req.vcpu_id; - rsp.flags = req.flags; - - if ( xenpaging_resume_page(paging, &rsp, 1) < 0 ) - { - PERROR("Error resuming page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - - /* Clear this pagefile slot */ - paging->slot_to_gfn[slot] = 0; - - /* Record this free slot */ - paging->free_slot_stack[paging->stack_count++] = slot; - } - else - { - DPRINTF("page %s populated (domain = %d; vcpu = %d;" - " gfn = %"PRIx64"; paused = %d; evict_fail = %d)\n", - req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL ? "not" : "already", - paging->vm_event.domain_id, req.vcpu_id, req.u.mem_paging.gfn, - !!(req.flags & VM_EVENT_FLAG_VCPU_PAUSED) , - !!(req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL) ); - - /* Tell Xen to resume the vcpu */ - if (( req.flags & VM_EVENT_FLAG_VCPU_PAUSED ) || - ( req.u.mem_paging.flags & MEM_PAGING_EVICT_FAIL )) - { - /* Prepare the response */ - rsp.u.mem_paging.gfn = req.u.mem_paging.gfn; - rsp.vcpu_id = req.vcpu_id; - rsp.flags = req.flags; - - if ( xenpaging_resume_page(paging, &rsp, 0) < 0 ) - { - PERROR("Error resuming page %"PRIx64"", req.u.mem_paging.gfn); - goto out; - } - } - } - } - - /* If interrupted, write all pages back into the guest */ - if ( interrupted == SIGTERM || interrupted == SIGINT ) - { - /* If no more pages to process, exit loop. */ - if ( !paging->num_paged_out ) - break; - - /* One more round if there are still pages to process. */ - resume_pages(paging, paging->num_paged_out); - - /* Resume main loop */ - continue; - } - - /* Exit main loop on any other signal */ - if ( interrupted ) - break; - - /* Indicate possible error */ - rc = 1; - - /* Check if the target has been reached already */ - tot_pages = xenpaging_get_tot_pages(paging); - if ( tot_pages < 0 ) - goto out; - - /* Resume all pages if paging is disabled or no target was set */ - if ( paging->target_tot_pages == 0 ) - { - if ( paging->num_paged_out ) - resume_pages(paging, paging->num_paged_out); - } - /* Evict more pages if target not reached */ - else if ( tot_pages > paging->target_tot_pages ) - { - num = tot_pages - paging->target_tot_pages; - if ( num != prev_num ) - { - DPRINTF("Need to evict %d pages to reach %d target_tot_pages\n", num, paging->target_tot_pages); - prev_num = num; - } - /* Limit the number of evicts to be able to process page-in requests */ - if ( num > 42 ) - { - paging->use_poll_timeout = 0; - num = 42; - } - if ( evict_pages(paging, num) < 0 ) - goto out; - } - /* Resume some pages if target not reached */ - else if ( tot_pages < paging->target_tot_pages && paging->num_paged_out ) - { - num = paging->target_tot_pages - tot_pages; - if ( num != prev_num ) - { - DPRINTF("Need to resume %d pages to reach %d target_tot_pages\n", num, paging->target_tot_pages); - prev_num = num; - } - resume_pages(paging, num); - } - /* Now target was reached, enable poll() timeout */ - else - { - paging->use_poll_timeout = 1; - } - - } - - /* No error */ - rc = 0; - - DPRINTF("xenpaging got signal %d\n", interrupted); - - out: - close(paging->fd); - unlink_pagefile(); - - /* Tear down domain paging */ - xenpaging_teardown(paging); - - return rc ? 2 : 0; -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/tools/xenpaging/xenpaging.h b/tools/xenpaging/xenpaging.h deleted file mode 100644 index e0fc7b31b863..000000000000 --- a/tools/xenpaging/xenpaging.h +++ /dev/null @@ -1,152 +0,0 @@ -/****************************************************************************** - * tools/xenpaging/xenpaging.h - * - * Xen domain paging. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; If not, see . - */ - - -#ifndef __XEN_PAGING2_H__ -#define __XEN_PAGING2_H__ - -#include -#include -#include -#include -#include -#include - -#include -#define XC_WANT_COMPAT_MAP_FOREIGN_API -#include -// #include -#include -#include - -#define XENPAGING_PAGEIN_QUEUE_SIZE 64 - -struct vm_event { - domid_t domain_id; - xenevtchn_handle *xce_handle; - int port; - vm_event_back_ring_t back_ring; - uint32_t evtchn_port; - void *ring_page; -}; - -struct xenpaging { - xc_interface *xc_handle; - xentoollog_logger *logger; - struct xs_handle *xs_handle; - - unsigned long *bitmap; - - unsigned long *slot_to_gfn; - int *gfn_to_slot; - - void *paging_buffer; - - struct vm_event vm_event; - int fd; - /* number of pages for which data structures were allocated */ - int max_pages; - int num_paged_out; - int target_tot_pages; - int policy_mru_size; - int use_poll_timeout; - int debug; - int stack_count; - int *free_slot_stack; - unsigned long pagein_queue[XENPAGING_PAGEIN_QUEUE_SIZE]; -}; - -#define DPRINTF(msg, args...) xtl_log(paging->logger, XTL_DETAIL, 0, \ - "paging", msg, ## args) -#define ERROR(msg, args...) xtl_log(paging->logger, XTL_ERROR, -1, \ - "paging", msg, ## args) -#define PERROR(msg, args...) xtl_log(paging->logger, XTL_ERROR, -1, \ - "paging", msg "(%d = %s)", ## args, \ - errno, strerror(errno)) - -extern void create_page_in_thread(struct xenpaging *paging); -extern void page_in_trigger(void); - -#define BITS_PER_LONG (sizeof(unsigned long) * 8) -#define ORDER_LONG (sizeof(unsigned long) == 4 ? 5 : 6) - -#define BITMAP_ENTRY(_nr,_bmap) ((_bmap))[(_nr) / 8] -#define BITMAP_SHIFT(_nr) ((_nr) % 8) - -static inline int bitmap_size(int nr_bits) -{ - return (nr_bits + 7) / 8; -} - -static inline void *bitmap_alloc(int nr_bits) -{ - return calloc(1, bitmap_size(nr_bits)); -} - -static inline void bitmap_clear(void *addr, int nr_bits) -{ - memset(addr, 0, bitmap_size(nr_bits)); -} - -static inline int test_bit(int nr, const void *_addr) -{ - const char *addr = _addr; - return (BITMAP_ENTRY(nr, addr) >> BITMAP_SHIFT(nr)) & 1; -} - -static inline void clear_bit(int nr, void *_addr) -{ - char *addr = _addr; - BITMAP_ENTRY(nr, addr) &= ~(1UL << BITMAP_SHIFT(nr)); -} - -static inline void set_bit(int nr, void *_addr) -{ - char *addr = _addr; - BITMAP_ENTRY(nr, addr) |= (1UL << BITMAP_SHIFT(nr)); -} - -static inline int test_and_clear_bit(int nr, void *addr) -{ - int oldbit = test_bit(nr, addr); - clear_bit(nr, addr); - return oldbit; -} - -static inline int test_and_set_bit(int nr, void *addr) -{ - int oldbit = test_bit(nr, addr); - set_bit(nr, addr); - return oldbit; -} - -#endif // __XEN_PAGING_H__ - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * tab-width: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/hvm/Kconfig b/xen/arch/x86/hvm/Kconfig index f32bf5cbb73a..b02639d84964 100644 --- a/xen/arch/x86/hvm/Kconfig +++ b/xen/arch/x86/hvm/Kconfig @@ -84,10 +84,6 @@ config VIRIDIAN If unsure, say Y. -config MEM_PAGING - bool "Xen memory paging support (UNSUPPORTED)" if UNSUPPORTED - depends on VM_EVENT - config MEM_SHARING bool "Xen memory sharing support (UNSUPPORTED)" if UNSUPPORTED depends on INTEL_VMX diff --git a/xen/arch/x86/hvm/dm.c b/xen/arch/x86/hvm/dm.c index 3b53471af0d9..1758f37ed5b0 100644 --- a/xen/arch/x86/hvm/dm.c +++ b/xen/arch/x86/hvm/dm.c @@ -260,12 +260,6 @@ static int set_mem_type(struct domain *d, p2m_type_t ot; get_gfn_unshare(d, pfn, &ot); - if ( p2m_is_paging(ot) ) - { - put_gfn(d, pfn); - p2m_mem_paging_populate(d, _gfn(pfn)); - return -EAGAIN; - } if ( p2m_is_shared(ot) ) rc = -EAGAIN; diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..1abff57d2c32 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -743,7 +743,6 @@ static void *hvmemul_map_linear_addr( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: err = ERR_PTR(~X86EMUL_RETRY); goto out; @@ -896,7 +895,7 @@ static int hvmemul_linear_to_phys( } else if ( (pfn = paging_gva_to_gfn(curr, addr, &pfec)) == gfn_x(INVALID_GFN) ) { - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) return X86EMUL_RETRY; *reps = 0; x86_emul_pagefault(pfec, addr, &hvmemul_ctxt->ctxt); @@ -915,7 +914,7 @@ static int hvmemul_linear_to_phys( if ( (npfn == gfn_x(INVALID_GFN)) || (npfn != (pfn + (reverse ? -i : i))) ) { - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) return X86EMUL_RETRY; done /= bytes_per_rep; if ( done == 0 ) @@ -1316,7 +1315,6 @@ static int linear_read(unsigned long addr, unsigned int bytes, void *p_data, hvmemul_ctxt, start, known_gla(addr, bytes, pfec)); - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; @@ -1373,7 +1371,6 @@ static int linear_write(unsigned long addr, unsigned int bytes, void *p_data, hvmemul_ctxt, start, known_gla(addr, bytes, pfec)); - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; @@ -2098,7 +2095,6 @@ static int cf_check hvmemul_rep_movs( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: return X86EMUL_RETRY; case HVMTRANS_okay: @@ -2218,7 +2214,6 @@ static int cf_check hvmemul_rep_stos( */ ASSERT_UNREACHABLE(); /* fall through */ - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: return X86EMUL_RETRY; case HVMTRANS_okay: diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index f759a397c557..ef8f7936d68e 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -1813,7 +1813,7 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, struct vcpu *curr = current; struct domain *currd = curr->domain; struct p2m_domain *p2m, *hostp2m; - int rc, fall_through = 0, paged = 0; + int rc, fall_through = 0; bool sharing_enomem = false; vm_event_request_t *req_ptr = NULL; bool sync = false; @@ -2004,12 +2004,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, goto out_put_gfn; } -#ifdef CONFIG_MEM_PAGING - /* Check if the page has been paged out */ - if ( p2m_is_paged(p2mt) || (p2mt == p2m_ram_paging_out) ) - paged = 1; -#endif - #ifdef CONFIG_MEM_SHARING /* Mem sharing: if still shared on write access then its enomem */ if ( npfec.write_access && p2m_is_shared(p2mt) ) @@ -2063,8 +2057,6 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned long gla, * sleep on event ring wait queues, and we must not hold * locks in such circumstance. */ - if ( paged ) - p2m_mem_paging_populate(currd, _gfn(gfn)); if ( sharing_enomem ) { @@ -2823,7 +2815,7 @@ static void *hvm_map_entry(unsigned long va, bool *writable) */ pfec = PFEC_page_present; gfn = paging_gva_to_gfn(current, va, &pfec); - if ( pfec & (PFEC_page_paged | PFEC_page_shared) ) + if ( pfec & PFEC_page_shared ) goto fail; v = hvm_map_guest_frame_rw(gfn, 0, writable); @@ -3258,9 +3250,6 @@ enum hvm_translation_result hvm_translate_get_page( if ( gfn_eq(gfn, INVALID_GFN) ) { - if ( pfec & PFEC_page_paged ) - return HVMTRANS_gfn_paged_out; - if ( pfec & PFEC_page_shared ) return HVMTRANS_gfn_shared; @@ -3294,12 +3283,6 @@ enum hvm_translation_result hvm_translate_get_page( if ( !page ) return HVMTRANS_bad_gfn_to_mfn; - if ( p2m_is_paging(p2mt) ) - { - put_page(page); - p2m_mem_paging_populate(v->domain, gfn); - return HVMTRANS_gfn_paged_out; - } if ( p2m_is_shared(p2mt) ) { put_page(page); diff --git a/xen/arch/x86/hvm/intercept.c b/xen/arch/x86/hvm/intercept.c index da22c386763e..639dee7f5c96 100644 --- a/xen/arch/x86/hvm/intercept.c +++ b/xen/arch/x86/hvm/intercept.c @@ -137,7 +137,6 @@ int hvm_process_io_intercept(const struct hvm_io_handler *handler, /* Drop the write as real hardware would. */ continue; case HVMTRANS_bad_linear_to_gfn: - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: ASSERT_UNREACHABLE(); @@ -170,7 +169,6 @@ int hvm_process_io_intercept(const struct hvm_io_handler *handler, data = ~0; break; case HVMTRANS_bad_linear_to_gfn: - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: ASSERT_UNREACHABLE(); diff --git a/xen/arch/x86/hvm/vmx/vvmx.c b/xen/arch/x86/hvm/vmx/vvmx.c index e4cdfe55c18e..1d6a1f5ed258 100644 --- a/xen/arch/x86/hvm/vmx/vvmx.c +++ b/xen/arch/x86/hvm/vmx/vvmx.c @@ -715,7 +715,6 @@ static void nvmx_update_apic_access_address(struct vcpu *v) apic_gpfn = get_vvmcs(v, APIC_ACCESS_ADDR) >> PAGE_SHIFT; apic_pg = get_page_from_gfn(v->domain, apic_gpfn, &p2mt, P2M_ALLOC); - ASSERT(apic_pg && !p2m_is_paging(p2mt)); __vmwrite(APIC_ACCESS_ADDR, page_to_maddr(apic_pg)); put_page(apic_pg); } @@ -736,7 +735,6 @@ static void nvmx_update_virtual_apic_address(struct vcpu *v) vapic_gpfn = get_vvmcs(v, VIRTUAL_APIC_PAGE_ADDR) >> PAGE_SHIFT; vapic_pg = get_page_from_gfn(v->domain, vapic_gpfn, &p2mt, P2M_ALLOC); - ASSERT(vapic_pg && !p2m_is_paging(p2mt)); __vmwrite(VIRTUAL_APIC_PAGE_ADDR, page_to_maddr(vapic_pg)); put_page(vapic_pg); } diff --git a/xen/arch/x86/include/asm/hvm/support.h b/xen/arch/x86/include/asm/hvm/support.h index 9e9fa6295567..0728d19ada38 100644 --- a/xen/arch/x86/include/asm/hvm/support.h +++ b/xen/arch/x86/include/asm/hvm/support.h @@ -48,7 +48,6 @@ enum hvm_translation_result { HVMTRANS_bad_linear_to_gfn, HVMTRANS_bad_gfn_to_mfn, HVMTRANS_unhandleable, - HVMTRANS_gfn_paged_out, HVMTRANS_gfn_shared, HVMTRANS_need_retry, }; diff --git a/xen/arch/x86/include/asm/mem_paging.h b/xen/arch/x86/include/asm/mem_paging.h deleted file mode 100644 index 2c618925d01d..000000000000 --- a/xen/arch/x86/include/asm/mem_paging.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/****************************************************************************** - * include/asm-x86/mem_paging.h - * - * Memory paging support. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - */ - -#ifndef __ASM_X86_MEM_PAGING_H__ -#define __ASM_X86_MEM_PAGING_H__ - -int mem_paging_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_paging_op_t) arg); - -#endif /*__ASM_X86_MEM_PAGING_H__ */ - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/include/asm/p2m.h b/xen/arch/x86/include/asm/p2m.h index 3a5a5fd43c2a..2d2cd5f5e9e1 100644 --- a/xen/arch/x86/include/asm/p2m.h +++ b/xen/arch/x86/include/asm/p2m.h @@ -60,9 +60,6 @@ typedef enum { * be used in 64-bit builds */ p2m_grant_map_rw = 7, /* Read/write grant mapping */ p2m_grant_map_ro = 8, /* Read-only grant mapping */ - p2m_ram_paging_out = 9, /* Memory that is being paged out */ - p2m_ram_paged = 10, /* Memory that has been paged out */ - p2m_ram_paging_in = 11, /* Memory that is being paged in */ p2m_ram_shared = 12, /* Shared or sharable memory */ p2m_ram_broken = 13, /* Broken page, access cause domain crash */ p2m_map_foreign = 14, /* ram pages from foreign domain */ @@ -81,18 +78,13 @@ typedef unsigned int p2m_query_t; #define P2M_RAM_TYPES (p2m_to_mask(p2m_ram_rw) \ | p2m_to_mask(p2m_ram_logdirty) \ | p2m_to_mask(p2m_ram_ro) \ - | p2m_to_mask(p2m_ram_paging_out) \ - | p2m_to_mask(p2m_ram_paged) \ - | p2m_to_mask(p2m_ram_paging_in) \ | p2m_to_mask(p2m_ram_shared) \ | p2m_to_mask(p2m_ioreq_server)) /* Types that represent a physmap hole that is ok to replace with a shared * entry */ #define P2M_HOLE_TYPES (p2m_to_mask(p2m_mmio_dm) \ - | p2m_to_mask(p2m_invalid) \ - | p2m_to_mask(p2m_ram_paging_in) \ - | p2m_to_mask(p2m_ram_paged)) + | p2m_to_mask(p2m_invalid)) /* Grant mapping types, which map to a real machine frame in another * VM */ @@ -120,21 +112,6 @@ typedef unsigned int p2m_query_t; #define P2M_POD_TYPES (p2m_to_mask(p2m_populate_on_demand)) -/* Pageable types */ -#define P2M_PAGEABLE_TYPES (p2m_to_mask(p2m_ram_rw) \ - | p2m_to_mask(p2m_ram_logdirty) ) - -#ifdef CONFIG_MEM_PAGING -#define P2M_PAGING_TYPES (p2m_to_mask(p2m_ram_paging_out) \ - | p2m_to_mask(p2m_ram_paged) \ - | p2m_to_mask(p2m_ram_paging_in)) - -#define P2M_PAGED_TYPES (p2m_to_mask(p2m_ram_paged)) -#else -#define P2M_PAGING_TYPES 0 -#define P2M_PAGED_TYPES 0 -#endif - /* Shared types */ #ifdef CONFIG_MEM_SHARING /* XXX: Sharable types could include p2m_ram_ro too, but we would need to @@ -154,8 +131,7 @@ typedef unsigned int p2m_query_t; /* Valid types not necessarily associated with a (valid) MFN. */ #define P2M_INVALID_MFN_TYPES (P2M_POD_TYPES \ - | p2m_to_mask(p2m_mmio_direct) \ - | P2M_PAGING_TYPES) + | p2m_to_mask(p2m_mmio_direct)) /* Broken type: the frame backing this pfn has failed in hardware * and must not be touched. */ @@ -175,9 +151,6 @@ typedef unsigned int p2m_query_t; implementations, there's no way of synchronising against that. */ #define p2m_is_valid(_t) (p2m_to_mask(_t) & \ (P2M_RAM_TYPES | p2m_to_mask(p2m_mmio_direct))) -#define p2m_is_pageable(_t) (p2m_to_mask(_t) & P2M_PAGEABLE_TYPES) -#define p2m_is_paging(_t) (p2m_to_mask(_t) & P2M_PAGING_TYPES) -#define p2m_is_paged(_t) (p2m_to_mask(_t) & P2M_PAGED_TYPES) #define p2m_is_sharable(_t) (p2m_to_mask(_t) & P2M_SHARABLE_TYPES) #define p2m_is_shared(_t) (p2m_to_mask(_t) & P2M_SHARED_TYPES) #define p2m_is_special(_t) (p2m_to_mask(_t) & P2M_SPECIAL_TYPES) @@ -775,14 +748,6 @@ static inline int relinquish_p2m_mapping(struct domain *d) /* Modify p2m table for shared gfn */ int set_shared_p2m_entry(struct domain *d, unsigned long gfn_l, mfn_t mfn); -/* Tell xenpaging to drop a paged out frame */ -void p2m_mem_paging_drop_page(struct domain *d, gfn_t gfn, p2m_type_t p2mt); -/* Start populating a paged out frame */ -void p2m_mem_paging_populate(struct domain *d, gfn_t gfn); -/* Resume normal operation (in case a domain was paused) */ -struct vm_event_st; -void p2m_mem_paging_resume(struct domain *d, struct vm_event_st *rsp); - /* * Internal functions, only called by other p2m code */ diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c37bd7a17658..ca401604d0d9 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -41,7 +41,6 @@ #define PFEC_shstk (_AC(1,U) << 6) #define PFEC_arch_mask (_AC(0xffff,U)) /* Architectural PFEC values. */ /* Internally used only flags. */ -#define PFEC_page_paged (1U<<16) #define PFEC_page_shared (1U<<17) #define PFEC_implicit (1U<<18) /* Pagewalk input for ldt/gdt/idt/tr accesses. */ #define PFEC_synth_mask (~PFEC_arch_mask) /* Synthetic PFEC values. */ diff --git a/xen/arch/x86/livepatch.c b/xen/arch/x86/livepatch.c index be40f625d206..01062dde7c03 100644 --- a/xen/arch/x86/livepatch.c +++ b/xen/arch/x86/livepatch.c @@ -43,10 +43,6 @@ int arch_livepatch_safety_check(void) #ifdef CONFIG_MEM_SHARING if ( has_active_waitqueue(d->vm_event_share) ) goto fail; -#endif -#ifdef CONFIG_MEM_PAGING - if ( has_active_waitqueue(d->vm_event_paging) ) - goto fail; #endif if ( has_active_waitqueue(d->vm_event_monitor) ) goto fail; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index b2b03da52b85..cbf955ee973b 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -2183,17 +2183,6 @@ static int mod_l1_entry(l1_pgentry_t *pl1e, l1_pgentry_t nl1e, page = get_page_from_gfn(pg_dom, gfn_x(gfn), &p2mt, q); - if ( p2m_is_paged(p2mt) ) - { - if ( page ) - put_page(page); - p2m_mem_paging_populate(pg_dom, gfn); - return -ENOENT; - } - - if ( p2mt == p2m_ram_paging_in && !page ) - return -ENOENT; - /* Did our attempt to unshare fail? */ if ( (q & P2M_UNSHARE) && p2m_is_shared(p2mt) ) { @@ -4110,14 +4099,8 @@ long do_mmu_update( { if ( page ) put_page(page); - if ( p2m_is_paged(p2mt) ) - { - p2m_mem_paging_populate(pt_owner, _gfn(gmfn)); - rc = -ENOENT; - } - else - gdprintk(XENLOG_WARNING, - "Could not get page for normal update\n"); + gdprintk(XENLOG_WARNING, + "Could not get page for normal update\n"); break; } diff --git a/xen/arch/x86/mm/Makefile b/xen/arch/x86/mm/Makefile index 960f6e840945..3fb2e53aeb4d 100644 --- a/xen/arch/x86/mm/Makefile +++ b/xen/arch/x86/mm/Makefile @@ -5,7 +5,6 @@ obj-$(CONFIG_ALTP2M) += altp2m.o obj-$(CONFIG_HVM) += guest_walk_2.o guest_walk_3.o guest_walk_4.o obj-$(CONFIG_SHADOW_PAGING) += guest_walk_4.o obj-$(CONFIG_VM_EVENT) += mem_access.o -obj-$(CONFIG_MEM_PAGING) += mem_paging.o obj-$(CONFIG_MEM_SHARING) += mem_sharing.o obj-$(CONFIG_HVM) += nested.o obj-$(CONFIG_HVM) += p2m.o diff --git a/xen/arch/x86/mm/altp2m.c b/xen/arch/x86/mm/altp2m.c index 0bc9b9ad2f52..ac9f7437843b 100644 --- a/xen/arch/x86/mm/altp2m.c +++ b/xen/arch/x86/mm/altp2m.c @@ -76,7 +76,7 @@ int altp2m_vcpu_enable_ve(struct vcpu *v, gfn_t gfn) * pageable() predicate for this, due to it having the same properties * that we want. */ - if ( !p2m_is_pageable(p2mt) || is_special_page(pg) ) + if ( is_special_page(pg) ) { rc = -EINVAL; goto err; diff --git a/xen/arch/x86/mm/guest_walk.c b/xen/arch/x86/mm/guest_walk.c index f48c3ef75f48..4ab1896fda28 100644 --- a/xen/arch/x86/mm/guest_walk.c +++ b/xen/arch/x86/mm/guest_walk.c @@ -547,15 +547,6 @@ void *map_domain_gfn(struct p2m_domain *p2m, gfn_t gfn, mfn_t *mfn, page = paging_mode_translate(p2m->domain) ? p2m_get_page_from_gfn(p2m, gfn, &p2mt, NULL, q) : get_page_from_gfn(p2m->domain, gfn_x(gfn), &p2mt, q); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - if ( page ) - put_page(page); - p2m_mem_paging_populate(p2m->domain, gfn); - *pfec = PFEC_page_paged; - return NULL; - } if ( p2m_is_shared(p2mt) ) { if ( page ) diff --git a/xen/arch/x86/mm/hap/guest_walk.c b/xen/arch/x86/mm/hap/guest_walk.c index d1b7c5762c9e..5d85c97b0605 100644 --- a/xen/arch/x86/mm/hap/guest_walk.c +++ b/xen/arch/x86/mm/hap/guest_walk.c @@ -48,15 +48,6 @@ unsigned long cf_check hap_p2m_ga_to_gfn(GUEST_PAGING_LEVELS)( top_gfn = _gfn(cr3 >> PAGE_SHIFT); top_page = p2m_get_page_from_gfn(p2m, top_gfn, &p2mt, NULL, P2M_ALLOC | P2M_UNSHARE); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - *pfec = PFEC_page_paged; - if ( top_page ) - put_page(top_page); - p2m_mem_paging_populate(p2m->domain, gaddr_to_gfn(cr3)); - return gfn_x(INVALID_GFN); - } if ( p2m_is_shared(p2mt) ) { *pfec = PFEC_page_shared; @@ -92,13 +83,6 @@ unsigned long cf_check hap_p2m_ga_to_gfn(GUEST_PAGING_LEVELS)( P2M_ALLOC | P2M_UNSHARE); if ( page ) put_page(page); - if ( p2m_is_paging(p2mt) ) - { - ASSERT(p2m_is_hostp2m(p2m)); - *pfec = PFEC_page_paged; - p2m_mem_paging_populate(p2m->domain, gfn); - return gfn_x(INVALID_GFN); - } if ( p2m_is_shared(p2mt) ) { *pfec = PFEC_page_shared; diff --git a/xen/arch/x86/mm/hap/nested_ept.c b/xen/arch/x86/mm/hap/nested_ept.c index d88d677825f1..f1d021725b09 100644 --- a/xen/arch/x86/mm/hap/nested_ept.c +++ b/xen/arch/x86/mm/hap/nested_ept.c @@ -190,11 +190,6 @@ nept_walk_tables(struct vcpu *v, unsigned long l2ga, ept_walk_t *gw) goto out; map_err: - if ( rc == PFEC_page_paged ) - { - ret = EPT_TRANSLATE_RETRY; - goto out; - } /* fall through to misconfig error */ misconfig_err: ret = EPT_TRANSLATE_MISCONFIG; diff --git a/xen/arch/x86/mm/hap/nested_hap.c b/xen/arch/x86/mm/hap/nested_hap.c index 255fba7e1cac..681dc238156f 100644 --- a/xen/arch/x86/mm/hap/nested_hap.c +++ b/xen/arch/x86/mm/hap/nested_hap.c @@ -126,7 +126,7 @@ static int nestedhap_walk_L0_p2m( if ( npfec.write_access && p2m_is_readonly(*p2mt) ) goto out; - if ( p2m_is_paging(*p2mt) || p2m_is_shared(*p2mt) || !p2m_is_ram(*p2mt) ) + if ( p2m_is_shared(*p2mt) || !p2m_is_ram(*p2mt) ) goto out; if ( !mfn_valid(mfn) ) diff --git a/xen/arch/x86/mm/mem_paging.c b/xen/arch/x86/mm/mem_paging.c deleted file mode 100644 index 33929b526ab9..000000000000 --- a/xen/arch/x86/mm/mem_paging.c +++ /dev/null @@ -1,487 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/****************************************************************************** - * arch/x86/mm/mem_paging.c - * - * Memory paging support. - * - * Copyright (c) 2009 Citrix Systems, Inc. (Patrick Colp) - */ - -#include -#include - -#include -#include - -#include - -#include "mm-locks.h" - -/* - * p2m_mem_paging_drop_page - Tell pager to drop its reference to a paged page - * @d: guest domain - * @gfn: guest page to drop - * - * p2m_mem_paging_drop_page() will notify the pager that a paged-out gfn was - * released by the guest. The pager is supposed to drop its reference of the - * gfn. - */ -void p2m_mem_paging_drop_page(struct domain *d, gfn_t gfn, p2m_type_t p2mt) -{ - vm_event_request_t req = { - .reason = VM_EVENT_REASON_MEM_PAGING, - .u.mem_paging.gfn = gfn_x(gfn) - }; - - /* - * We allow no ring in this unique case, because it won't affect - * correctness of the guest execution at this point. If this is the only - * page that happens to be paged-out, we'll be okay.. but it's likely the - * guest will crash shortly anyways. - */ - int rc = vm_event_claim_slot(d, d->vm_event_paging); - - if ( rc < 0 ) - return; - - /* Send release notification to pager */ - req.u.mem_paging.flags = MEM_PAGING_DROP_PAGE; - - /* Update stats unless the page hasn't yet been evicted */ - if ( p2mt != p2m_ram_paging_out ) - atomic_dec(&d->paged_pages); - else - /* Evict will fail now, tag this request for pager */ - req.u.mem_paging.flags |= MEM_PAGING_EVICT_FAIL; - - vm_event_put_request(d, d->vm_event_paging, &req); -} - -/* - * p2m_mem_paging_populate - Tell pager to populate a paged page - * @d: guest domain - * @gfn: guest page in paging state - * - * p2m_mem_paging_populate() will notify the pager that a page in any of the - * paging states needs to be written back into the guest. - * This function needs to be called whenever gfn_to_mfn() returns any of the p2m - * paging types because the gfn may not be backed by a mfn. - * - * The gfn can be in any of the paging states, but the pager needs only be - * notified when the gfn is in the paging-out path (paging_out or paged). This - * function may be called more than once from several vcpus. If the vcpu belongs - * to the guest, the vcpu must be stopped and the pager notified that the vcpu - * was stopped. The pager needs to handle several requests for the same gfn. - * - * If the gfn is not in the paging-out path and the vcpu does not belong to the - * guest, nothing needs to be done and the function assumes that a request was - * already sent to the pager. In this case the caller has to try again until the - * gfn is fully paged in again. - */ -void p2m_mem_paging_populate(struct domain *d, gfn_t gfn) -{ - struct vcpu *v = current; - vm_event_request_t req = { - .reason = VM_EVENT_REASON_MEM_PAGING, - .u.mem_paging.gfn = gfn_x(gfn) - }; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int rc = vm_event_claim_slot(d, d->vm_event_paging); - - /* We're paging. There should be a ring. */ - if ( rc == -EOPNOTSUPP ) - { - gdprintk(XENLOG_ERR, "%pd paging gfn %"PRI_gfn" yet no ring in place\n", - d, gfn_x(gfn)); - /* Prevent the vcpu from faulting repeatedly on the same gfn */ - if ( v->domain == d ) - vcpu_pause_nosync(v); - domain_crash(d); - return; - } - else if ( rc < 0 ) - return; - - /* Fix p2m mapping */ - gfn_lock(p2m, gfn, 0); - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - /* Allow only nominated or evicted pages to enter page-in path */ - if ( p2mt == p2m_ram_paging_out || p2mt == p2m_ram_paged ) - { - /* Evict will fail now, tag this request for pager */ - if ( p2mt == p2m_ram_paging_out ) - req.u.mem_paging.flags |= MEM_PAGING_EVICT_FAIL; - - rc = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, p2m_ram_paging_in, a); - } - gfn_unlock(p2m, gfn, 0); - if ( rc < 0 ) - goto out_cancel; - - /* Pause domain if request came from guest and gfn has paging type */ - if ( p2m_is_paging(p2mt) && v->domain == d ) - { - vm_event_vcpu_pause(v); - req.flags |= VM_EVENT_FLAG_VCPU_PAUSED; - } - /* No need to inform pager if the gfn is not in the page-out path */ - else if ( p2mt != p2m_ram_paging_out && p2mt != p2m_ram_paged ) - { - /* gfn is already on its way back and vcpu is not paused */ - out_cancel: - vm_event_cancel_slot(d, d->vm_event_paging); - return; - } - - /* Send request to pager */ - req.u.mem_paging.p2mt = p2mt; - req.vcpu_id = v->vcpu_id; - - vm_event_put_request(d, d->vm_event_paging, &req); -} - -/* - * p2m_mem_paging_resume - Resume guest gfn - * @d: guest domain - * @rsp: vm_event response received - * - * p2m_mem_paging_resume() will forward the p2mt of a gfn to ram_rw. It is - * called by the pager. - * - * The gfn was previously either evicted and populated, or nominated and - * populated. If the page was evicted the p2mt will be p2m_ram_paging_in. If - * the page was just nominated the p2mt will be p2m_ram_paging_in_start because - * the pager did not call prepare(). - * - * If the gfn was dropped the vcpu needs to be unpaused. - */ -void p2m_mem_paging_resume(struct domain *d, struct vm_event_st *rsp) -{ - struct p2m_domain *p2m = p2m_get_hostp2m(d); - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - - /* Fix p2m entry if the page was not dropped */ - if ( !(rsp->u.mem_paging.flags & MEM_PAGING_DROP_PAGE) ) - { - gfn_t gfn = _gfn(rsp->u.mem_access.gfn); - - gfn_lock(p2m, gfn, 0); - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - /* - * Allow only pages which were prepared properly, or pages which - * were nominated but not evicted. - */ - if ( mfn_valid(mfn) && (p2mt == p2m_ram_paging_in) ) - { - int rc = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, - paging_mode_log_dirty(d) ? p2m_ram_logdirty - : p2m_ram_rw, a); - - if ( !rc ) - set_gpfn_from_mfn(mfn_x(mfn), gfn_x(gfn)); - } - gfn_unlock(p2m, gfn, 0); - } -} - -/* - * nominate - Mark a guest page as to-be-paged-out - * @d: guest domain - * @gfn: guest page to nominate - * - * Returns 0 for success or negative errno values if gfn is not pageable. - * - * nominate() is called by the pager and checks if a guest page can be paged - * out. If the following conditions are met the p2mt will be changed: - * - the gfn is backed by a mfn - * - the p2mt of the gfn is pageable - * - the mfn is not used for IO - * - the mfn has exactly one user and has no special meaning - * - * Once the p2mt is changed the page is readonly for the guest. On success the - * pager can write the page contents to disk and later evict the page. - */ -static int nominate(struct domain *d, gfn_t gfn) -{ - struct page_info *page; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - int ret = -EBUSY; - - gfn_lock(p2m, gfn, 0); - - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - - /* Check if mfn is valid */ - if ( !mfn_valid(mfn) ) - goto out; - - /* Check p2m type */ - if ( !p2m_is_pageable(p2mt) ) - goto out; - - /* Check for io memory page */ - if ( is_iomem_page(mfn) ) - goto out; - - /* Check page count and type */ - page = mfn_to_page(mfn); - if ( (page->count_info & (PGC_count_mask | PGC_allocated)) != - (1 | PGC_allocated) ) - goto out; - - if ( (page->u.inuse.type_info & PGT_count_mask) != 0 ) - goto out; - - /* Fix p2m entry */ - ret = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, p2m_ram_paging_out, a); - - out: - gfn_unlock(p2m, gfn, 0); - return ret; -} - -/* - * evict - Mark a guest page as paged-out - * @d: guest domain - * @gfn: guest page to evict - * - * Returns 0 for success or negative errno values if eviction is not possible. - * - * evict() is called by the pager and will free a guest page and release it - * back to Xen. If the following conditions are met the page can be freed: - * - the gfn is backed by a mfn - * - the gfn was nominated - * - the mfn has still exactly one user and has no special meaning - * - * After successful nomination some other process could have mapped the page. In - * this case eviction can not be done. If the gfn was populated before the pager - * could evict it, eviction can not be done either. In this case the gfn is - * still backed by a mfn. - */ -static int evict(struct domain *d, gfn_t gfn) -{ - struct page_info *page; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int ret = -EBUSY; - - gfn_lock(p2m, gfn, 0); - - /* Get mfn */ - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - if ( unlikely(!mfn_valid(mfn)) ) - goto out; - - /* Allow only nominated pages */ - if ( p2mt != p2m_ram_paging_out ) - goto out; - - /* Get the page so it doesn't get modified under Xen's feet */ - page = mfn_to_page(mfn); - if ( unlikely(!get_page(page, d)) ) - goto out; - - /* Check page count and type once more */ - if ( (page->count_info & (PGC_count_mask | PGC_allocated)) != - (2 | PGC_allocated) ) - goto out_put; - - if ( (page->u.inuse.type_info & PGT_count_mask) != 0 ) - goto out_put; - - /* Decrement guest domain's ref count of the page */ - put_page_alloc_ref(page); - - /* Remove mapping from p2m table */ - ret = p2m_set_entry(p2m, gfn, INVALID_MFN, PAGE_ORDER_4K, - p2m_ram_paged, a); - - /* Track number of paged gfns */ - atomic_inc(&d->paged_pages); - - out_put: - /* Put the page back so it gets freed */ - put_page(page); - - out: - gfn_unlock(p2m, gfn, 0); - return ret; -} - -/* - * prepare - Allocate a new page for the guest - * @d: guest domain - * @gfn: guest page in paging state - * - * prepare() will allocate a new page for the guest if the gfn is not backed - * by a mfn. It is called by the pager. - * It is required that the gfn was already populated. The gfn may already have a - * mfn if populate was called for gfn which was nominated but not evicted. In - * this case only the p2mt needs to be forwarded. - */ -static int prepare(struct domain *d, gfn_t gfn, - XEN_GUEST_HANDLE_64(const_uint8) buffer) -{ - struct page_info *page = NULL; - p2m_type_t p2mt; - p2m_access_t a; - mfn_t mfn; - struct p2m_domain *p2m = p2m_get_hostp2m(d); - int ret, page_extant = 1; - - if ( !guest_handle_okay(buffer, PAGE_SIZE) ) - return -EINVAL; - - gfn_lock(p2m, gfn, 0); - - mfn = p2m->get_entry(p2m, gfn, &p2mt, &a, 0, NULL, NULL); - - ret = -ENOENT; - /* Allow missing pages */ - if ( (p2mt != p2m_ram_paging_in) && (p2mt != p2m_ram_paged) ) - goto out; - - /* Allocate a page if the gfn does not have one yet */ - if ( !mfn_valid(mfn) ) - { - void *guest_map; - - /* If the user did not provide a buffer, we disallow */ - ret = -EINVAL; - if ( unlikely(guest_handle_is_null(buffer)) ) - goto out; - /* Get a free page */ - ret = -ENOMEM; - page_alloc_mm_pre_lock(d); - page = alloc_domheap_page(d, 0); - if ( unlikely(page == NULL) ) - goto out; - if ( unlikely(!get_page(page, d)) ) - { - /* - * The domain can't possibly know about this page yet, so failure - * here is a clear indication of something fishy going on. - */ - gprintk(XENLOG_ERR, - "%pd: fresh page for GFN %"PRI_gfn" in unexpected state\n", - d, gfn_x(gfn)); - domain_crash(d); - page = NULL; - goto out; - } - mfn = page_to_mfn(page); - page_extant = 0; - - guest_map = map_domain_page(mfn); - ret = copy_from_guest(guest_map, buffer, PAGE_SIZE); - unmap_domain_page(guest_map); - if ( ret ) - { - ret = -EFAULT; - goto out; - } - } - - /* - * Make the page already guest-accessible. If the pager still has a - * pending resume operation, it will be idempotent p2m entry-wise, but - * will unpause the vcpu. - */ - ret = p2m_set_entry(p2m, gfn, mfn, PAGE_ORDER_4K, - paging_mode_log_dirty(d) ? p2m_ram_logdirty - : p2m_ram_rw, a); - if ( !ret ) - { - set_gpfn_from_mfn(mfn_x(mfn), gfn_x(gfn)); - - if ( !page_extant ) - atomic_dec(&d->paged_pages); - } - - out: - gfn_unlock(p2m, gfn, 0); - - if ( page ) - { - /* - * Free the page on error. Drop our temporary reference in all - * cases. - */ - if ( ret ) - put_page_alloc_ref(page); - put_page(page); - } - - return ret; -} - -int mem_paging_memop(XEN_GUEST_HANDLE_PARAM(xen_mem_paging_op_t) arg) -{ - int rc; - xen_mem_paging_op_t mpo; - struct domain *d; - bool copyback = false; - - if ( copy_from_guest(&mpo, arg, 1) ) - return -EFAULT; - - rc = rcu_lock_live_remote_domain_by_id(mpo.domain, &d); - if ( rc ) - return rc; - - rc = xsm_mem_paging(XSM_DM_PRIV, d); - if ( rc ) - goto out; - - rc = -ENODEV; - if ( unlikely(!vm_event_check_ring(d->vm_event_paging)) ) - goto out; - - switch( mpo.op ) - { - case XENMEM_paging_op_nominate: - rc = nominate(d, _gfn(mpo.gfn)); - break; - - case XENMEM_paging_op_evict: - rc = evict(d, _gfn(mpo.gfn)); - break; - - case XENMEM_paging_op_prep: - rc = prepare(d, _gfn(mpo.gfn), mpo.buffer); - if ( !rc ) - copyback = 1; - break; - - default: - rc = -ENOSYS; - break; - } - - if ( copyback && __copy_to_guest(arg, &mpo, 1) ) - rc = -EFAULT; - -out: - rcu_unlock_domain(d); - return rc; -} - - -/* - * Local variables: - * mode: C - * c-file-style: "BSD" - * c-basic-offset: 4 - * indent-tabs-mode: nil - * End: - */ diff --git a/xen/arch/x86/mm/mem_sharing.c b/xen/arch/x86/mm/mem_sharing.c index 5c7a0ff30e8b..d66027eeeb0f 100644 --- a/xen/arch/x86/mm/mem_sharing.c +++ b/xen/arch/x86/mm/mem_sharing.c @@ -1198,36 +1198,6 @@ int add_to_physmap(struct domain *sd, unsigned long sgfn, shr_handle_t sh, mem_sharing_gfn_destroy(spage, cd, gfn_info); put_page_and_type(spage); } - else - { -#ifdef CONFIG_MEM_PAGING - /* - * There is a chance we're plugging a hole where a paged out - * page was. - */ - if ( p2m_is_paging(cmfn_type) && (cmfn_type != p2m_ram_paging_out) ) - { - atomic_dec(&cd->paged_pages); - /* - * Further, there is a chance this was a valid page. - * Don't leak it. - */ - if ( mfn_valid(cmfn) ) - { - struct page_info *cpage = mfn_to_page(cmfn); - - if ( !get_page(cpage, cd) ) - { - domain_crash(cd); - ret = -EOVERFLOW; - goto err_unlock; - } - put_page_alloc_ref(cpage); - put_page(cpage); - } - } -#endif - } atomic_inc(&nr_saved_mfns); diff --git a/xen/arch/x86/mm/p2m-ept.c b/xen/arch/x86/mm/p2m-ept.c index dfdbfa0afec8..ea4c5729bcf2 100644 --- a/xen/arch/x86/mm/p2m-ept.c +++ b/xen/arch/x86/mm/p2m-ept.c @@ -85,9 +85,6 @@ static void ept_p2m_type_to_flags(const struct p2m_domain *p2m, case p2m_invalid: case p2m_mmio_dm: case p2m_populate_on_demand: - case p2m_ram_paging_out: - case p2m_ram_paged: - case p2m_ram_paging_in: default: entry->r = entry->w = entry->x = 0; break; diff --git a/xen/arch/x86/mm/p2m-pt.c b/xen/arch/x86/mm/p2m-pt.c index 5a6ce2f8bc2e..515ee9780e34 100644 --- a/xen/arch/x86/mm/p2m-pt.c +++ b/xen/arch/x86/mm/p2m-pt.c @@ -64,9 +64,6 @@ static unsigned long p2m_type_to_flags(const struct p2m_domain *p2m, case p2m_invalid: case p2m_mmio_dm: case p2m_populate_on_demand: - case p2m_ram_paging_out: - case p2m_ram_paged: - case p2m_ram_paging_in: default: return flags | _PAGE_NX_BIT; case p2m_grant_map_ro: @@ -910,7 +907,7 @@ p2m_pt_get_entry(struct p2m_domain *p2m, gfn_t gfn_, pod_retry_l1: flags = l1e_get_flags(*l1e); l1t = p2m_flags_to_type(flags); - if ( !(flags & _PAGE_PRESENT) && !p2m_is_paging(l1t) ) + if ( !(flags & _PAGE_PRESENT) ) { /* PoD: Try to populate */ if ( p2m_is_pod(l1t) ) @@ -929,7 +926,7 @@ p2m_pt_get_entry(struct p2m_domain *p2m, gfn_t gfn_, *t = p2m_recalc_type(recalc || _needs_recalc(flags), l1t, p2m, gfn); unmap_domain_page(l1e); - ASSERT(mfn_valid(mfn) || !p2m_is_any_ram(*t) || p2m_is_paging(*t)); + ASSERT(mfn_valid(mfn) || !p2m_is_any_ram(*t)); return (p2m_is_valid(*t) || p2m_is_any_ram(*t)) ? mfn : INVALID_MFN; } diff --git a/xen/arch/x86/mm/p2m.c b/xen/arch/x86/mm/p2m.c index f5f9c0ac4513..c2804d39f9b1 100644 --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -405,7 +405,7 @@ struct page_info *p2m_get_page_from_gfn( return page; /* Error path: not a suitable GFN at all */ - if ( !p2m_is_ram(*t) && !p2m_is_paging(*t) && !p2m_is_pod(*t) && + if ( !p2m_is_ram(*t) && !p2m_is_pod(*t) && !mem_sharing_is_fork(p2m->domain) ) return NULL; } @@ -697,7 +697,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, return -EPERM; } - else if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + else if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); set_gpfn_from_mfn(mfn_x(omfn), INVALID_M2P_ENTRY); @@ -707,13 +707,6 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, /* Count how man PoD entries we'll be replacing if successful */ pod_count++; } -#ifdef CONFIG_MEM_PAGING - else if ( p2m_is_paging(ot) && (ot != p2m_ram_paging_out) ) - { - /* We're plugging a hole in the physmap where a paged out page was */ - atomic_dec(&d->paged_pages); - } -#endif } /* Then, look for m->p mappings for this range and deal with them */ @@ -742,7 +735,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, mfn_x(mfn_add(mfn, i)), gfn_x(ogfn), gfn_x(gfn_add(gfn, i))); omfn = p2m->get_entry(p2m, ogfn, &ot, &a, 0, NULL, NULL); - if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); P2M_DEBUG("old gfn=%#lx -> mfn %#lx\n", @@ -789,7 +782,7 @@ p2m_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, set_gpfn_from_mfn(mfn_x(omfn), gfn_x(gfn) + i); paging_mark_pfn_dirty(d, _pfn(gfn_x(gfn) + i)); } - else if ( p2m_is_ram(ot) && !p2m_is_paged(ot) ) + else if ( p2m_is_ram(ot) ) { ASSERT(mfn_valid(omfn)); set_gpfn_from_mfn(mfn_x(omfn), gfn_x(gfn) + i); diff --git a/xen/arch/x86/mm/shadow/hvm.c b/xen/arch/x86/mm/shadow/hvm.c index cf4862cbc9c2..9c46abffb7ba 100644 --- a/xen/arch/x86/mm/shadow/hvm.c +++ b/xen/arch/x86/mm/shadow/hvm.c @@ -126,7 +126,6 @@ hvm_read(enum x86_segment seg, case HVMTRANS_bad_gfn_to_mfn: case HVMTRANS_unhandleable: return X86EMUL_UNHANDLEABLE; - case HVMTRANS_gfn_paged_out: case HVMTRANS_gfn_shared: case HVMTRANS_need_retry: return X86EMUL_RETRY; diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c index d10891dcfc86..7b62269f7839 100644 --- a/xen/arch/x86/msr.c +++ b/xen/arch/x86/msr.c @@ -89,12 +89,6 @@ static int guest_wrmsr_xen(struct vcpu *v, uint32_t idx, uint64_t val) if ( page ) put_page(page); - if ( p2m_is_paging(t) ) - { - p2m_mem_paging_populate(d, _gfn(gmfn)); - return X86EMUL_RETRY; - } - gdprintk(XENLOG_WARNING, "Bad GMFN %lx (MFN %#"PRI_mfn") to MSR %08x\n", gmfn, mfn_x(page ? page_to_mfn(page) : INVALID_MFN), base); diff --git a/xen/arch/x86/x86_64/compat/mm.c b/xen/arch/x86/x86_64/compat/mm.c index d54efaad21cd..fda4760989c7 100644 --- a/xen/arch/x86/x86_64/compat/mm.c +++ b/xen/arch/x86/x86_64/compat/mm.c @@ -4,7 +4,6 @@ #include #include #include -#include #include #include @@ -156,11 +155,6 @@ int compat_arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case XENMEM_get_sharing_shared_pages: return mem_sharing_get_nr_shared_mfns(); -#ifdef CONFIG_MEM_PAGING - case XENMEM_paging_op: - return mem_paging_memop(guest_handle_cast(arg, xen_mem_paging_op_t)); -#endif - #ifdef CONFIG_MEM_SHARING case XENMEM_sharing_op: return mem_sharing_memop(guest_handle_cast(arg, xen_mem_sharing_op_t)); diff --git a/xen/arch/x86/x86_64/mm.c b/xen/arch/x86/x86_64/mm.c index 8eadab7933d0..282f35dcbd48 100644 --- a/xen/arch/x86/x86_64/mm.c +++ b/xen/arch/x86/x86_64/mm.c @@ -35,7 +35,6 @@ EMIT_FILE; #include #include #include -#include #include #include @@ -1023,11 +1022,6 @@ long subarch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case XENMEM_get_sharing_shared_pages: return mem_sharing_get_nr_shared_mfns(); -#ifdef CONFIG_MEM_PAGING - case XENMEM_paging_op: - return mem_paging_memop(guest_handle_cast(arg, xen_mem_paging_op_t)); -#endif - #ifdef CONFIG_MEM_SHARING case XENMEM_sharing_op: return mem_sharing_memop(guest_handle_cast(arg, xen_mem_sharing_op_t)); diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..3c62672445ea 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1511,9 +1511,6 @@ static void cf_check complete_domain_destroy(struct rcu_head *head) sched_destroy_domain(d); -#ifdef CONFIG_MEM_PAGING - xfree(d->vm_event_paging); -#endif xfree(d->vm_event_monitor); #ifdef CONFIG_MEM_SHARING xfree(d->vm_event_share); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..3296d981f462 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -100,9 +100,6 @@ void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) info->outstanding_pages = d->outstanding_pages; #ifdef CONFIG_MEM_SHARING info->shr_pages = atomic_read(&d->shr_pages); -#endif -#ifdef CONFIG_MEM_PAGING - info->paged_pages = atomic_read(&d->paged_pages); #endif info->shared_info_frame = gfn_x(mfn_to_gfn(d, _mfn(virt_to_mfn(d->shared_info)))); diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c index cb6df2823b00..7f2e72f0dda3 100644 --- a/xen/common/keyhandler.c +++ b/xen/common/keyhandler.c @@ -281,17 +281,11 @@ static void cf_check dump_domains(unsigned char key) printk(" nr_pages=%u xenheap_pages=%u" #ifdef CONFIG_MEM_SHARING " shared_pages=%u" -#endif -#ifdef CONFIG_MEM_PAGING - " paged_pages=%u" #endif " dirty_cpus={%*pbl} max_pages=%u\n", domain_tot_pages(d), d->xenheap_pages, #ifdef CONFIG_MEM_SHARING atomic_read(&d->shr_pages), -#endif -#ifdef CONFIG_MEM_PAGING - atomic_read(&d->paged_pages), #endif CPUMASK_PR(d->dirty_cpumask), d->max_pages); printk(" handle=%02x%02x%02x%02x-%02x%02x-%02x%02x-" diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..b7dade262602 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -447,28 +447,6 @@ int guest_remove_page(struct domain *d, unsigned long gmfn) return -ENOENT; } - if ( unlikely(p2m_is_paging(p2mt)) ) - { - /* - * If the page hasn't yet been paged out, there is an - * actual page that needs to be released. - */ - if ( p2mt == p2m_ram_paging_out ) - { - ASSERT(mfn_valid(mfn)); - goto obtain_page; - } - - rc = guest_physmap_remove_page(d, _gfn(gmfn), mfn, 0); - if ( rc ) - goto out_put_gfn; - - put_gfn(d, gmfn); - - p2m_mem_paging_drop_page(d, _gfn(gmfn), p2mt); - - return 0; - } if ( p2mt == p2m_mmio_direct ) { rc = -EPERM; @@ -514,10 +492,9 @@ int guest_remove_page(struct domain *d, unsigned long gmfn) { #ifdef CONFIG_X86 put_gfn(d, gmfn); - if ( !p2m_is_paging(p2mt) ) #endif - gdprintk(XENLOG_INFO, "Bad page free for Dom%u GFN %lx\n", - d->domain_id, gmfn); + gdprintk(XENLOG_INFO, "Bad page free for Dom%u GFN %lx\n", + d->domain_id, gmfn); return -ENXIO; } @@ -2037,16 +2014,6 @@ int check_get_page_from_gfn(struct domain *d, gfn_t gfn, bool readonly, page = get_page_from_gfn(d, gfn_x(gfn), &p2mt, q); -#ifdef CONFIG_MEM_PAGING - if ( p2m_is_paging(p2mt) ) - { - if ( page ) - put_page(page); - - p2m_mem_paging_populate(d, gfn); - return -EAGAIN; - } -#endif #ifdef CONFIG_MEM_SHARING if ( (q & P2M_UNSHARE) && p2m_is_shared(p2mt) ) { diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 2c4ff2c34c70..d74fc2aa9a30 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2791,8 +2791,7 @@ void free_domheap_pages(struct page_info *pg, unsigned int order) * responsibility for erasure. We do scrub regardless if option * scrub_domheap is set. */ - scrub = d->is_dying || mem_paging_enabled(d) || - scrub_debug || opt_scrub_domheap; + scrub = d->is_dying || scrub_debug || opt_scrub_domheap; } else { diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c index cf0258223f50..e92a4fc1c409 100644 --- a/xen/common/vm_event.c +++ b/xen/common/vm_event.c @@ -395,10 +395,6 @@ static int vm_event_resume(struct domain *d, struct vm_event_domain *ved) /* Check flags which apply only when the vCPU is paused */ if ( atomic_read(&v->vm_event_pause_count) ) { -#ifdef CONFIG_MEM_PAGING - if ( rsp.reason == VM_EVENT_REASON_MEM_PAGING ) - p2m_mem_paging_resume(d, &rsp); -#endif #ifdef CONFIG_MEM_SHARING if ( mem_sharing_is_fork(d) ) { @@ -539,14 +535,6 @@ int __vm_event_claim_slot(struct domain *d, struct vm_event_domain *ved, return vm_event_grab_slot(ved, current->domain != d); } -#ifdef CONFIG_MEM_PAGING -/* Registered with Xen-bound event channel for incoming notifications. */ -static void cf_check mem_paging_notification(struct vcpu *v, unsigned int port) -{ - vm_event_resume(v->domain, v->domain->vm_event_paging); -} -#endif - /* Registered with Xen-bound event channel for incoming notifications. */ static void cf_check monitor_notification(struct vcpu *v, unsigned int port) { @@ -564,20 +552,6 @@ static void cf_check mem_sharing_notification(struct vcpu *v, unsigned int port) /* Clean up on domain destruction */ void vm_event_cleanup(struct domain *d) { -#ifdef CONFIG_MEM_PAGING - if ( vm_event_check_ring(d->vm_event_paging) ) - { - /* Destroying the wait queue head means waking up all - * queued vcpus. This will drain the list, allowing - * the disable routine to complete. It will also drop - * all domain refs the wait-queued vcpus are holding. - * Finally, because this code path involves previously - * pausing the domain (domain_kill), unpausing the - * vcpus causes no harm. */ - destroy_waitqueue_head(&d->vm_event_paging->wq); - (void)vm_event_disable(d, &d->vm_event_paging); - } -#endif if ( vm_event_check_ring(d->vm_event_monitor) ) { destroy_waitqueue_head(&d->vm_event_monitor->wq); @@ -635,63 +609,6 @@ int vm_event_domctl(struct domain *d, struct xen_domctl_vm_event_op *vec) switch ( vec->mode ) { -#ifdef CONFIG_MEM_PAGING - case XEN_DOMCTL_VM_EVENT_OP_PAGING: - { - rc = -EINVAL; - - switch( vec->op ) - { - case XEN_VM_EVENT_ENABLE: - { - rc = -EOPNOTSUPP; - /* hvm fixme: p2m_is_foreign types need addressing */ - if ( is_hvm_domain(hardware_domain) ) - break; - - rc = -ENODEV; - /* Only HAP is supported */ - if ( !hap_enabled(d) ) - break; - - /* No paging if iommu is used */ - rc = -EMLINK; - if ( unlikely(is_iommu_enabled(d)) ) - break; - - rc = -EXDEV; - /* Disallow paging in a PoD guest */ - if ( p2m_pod_active(d) ) - break; - - /* domain_pause() not required here, see XSA-99 */ - rc = vm_event_enable(d, vec, &d->vm_event_paging, _VPF_mem_paging, - HVM_PARAM_PAGING_RING_PFN, - mem_paging_notification); - } - break; - - case XEN_VM_EVENT_DISABLE: - if ( vm_event_check_ring(d->vm_event_paging) ) - { - domain_pause(d); - rc = vm_event_disable(d, &d->vm_event_paging); - domain_unpause(d); - } - break; - - case XEN_VM_EVENT_RESUME: - rc = vm_event_resume(d, d->vm_event_paging); - break; - - default: - rc = -ENOSYS; - break; - } - } - break; -#endif - case XEN_DOMCTL_VM_EVENT_OP_MONITOR: { rc = -EINVAL; diff --git a/xen/drivers/passthrough/x86/iommu.c b/xen/drivers/passthrough/x86/iommu.c index 951f1f30b7ad..d9b1f5768393 100644 --- a/xen/drivers/passthrough/x86/iommu.c +++ b/xen/drivers/passthrough/x86/iommu.c @@ -26,7 +26,6 @@ #include #include -#include #include #include @@ -777,7 +776,6 @@ bool arch_iommu_use_permitted(const struct domain *d) */ return d == dom_io || (likely(!mem_sharing_enabled(d)) && - likely(!mem_paging_enabled(d)) && likely(!p2m_pod_active(d)) && likely(!p2m_is_global_logdirty(d))); } diff --git a/xen/include/public/memory.h b/xen/include/public/memory.h index bd9fc37b5297..65ff524016d7 100644 --- a/xen/include/public/memory.h +++ b/xen/include/public/memory.h @@ -377,7 +377,7 @@ typedef struct xen_pod_target xen_pod_target_t; #define XENMEM_get_sharing_freed_pages 18 #define XENMEM_get_sharing_shared_pages 19 -#define XENMEM_paging_op 20 +#define XENMEM_paging_op 20 /* Removed in Xen 4.22 */ #define XENMEM_paging_op_nominate 0 #define XENMEM_paging_op_evict 1 #define XENMEM_paging_op_prep 2 diff --git a/xen/include/public/vm_event.h b/xen/include/public/vm_event.h index 3a86f0e208f1..51581f96a76f 100644 --- a/xen/include/public/vm_event.h +++ b/xen/include/public/vm_event.h @@ -130,7 +130,7 @@ /* Memory sharing event */ #define VM_EVENT_REASON_MEM_SHARING 2 /* Memory paging event */ -#define VM_EVENT_REASON_MEM_PAGING 3 +#define VM_EVENT_REASON_MEM_PAGING 3 /* Removed in 4.22 */ /* A control register was updated */ #define VM_EVENT_REASON_WRITE_CTRLREG 4 /* An MSR was updated. */ diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 00db1da12f21..ef60d4438b0c 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -426,10 +426,6 @@ struct domain atomic_t shr_pages; /* shared pages */ #endif -#ifdef CONFIG_MEM_PAGING - atomic_t paged_pages; /* paged-out pages */ -#endif - /* Scheduling. */ void *sched_priv; /* scheduler-specific data */ struct sched_unit *sched_unit_list; @@ -600,10 +596,6 @@ struct domain #ifdef CONFIG_MEM_SHARING struct vm_event_domain *vm_event_share; struct domain *parent; /* VM fork parent */ -#endif - /* Memory paging support */ -#ifdef CONFIG_MEM_PAGING - struct vm_event_domain *vm_event_paging; #endif /* VM event monitor support */ struct vm_event_domain *vm_event_monitor; @@ -1011,9 +1003,7 @@ static inline struct domain *next_domain_in_cpupool( /* VCPU affinity has changed: migrating to a new CPU. */ #define _VPF_migrating 3 #define VPF_migrating (1UL<<_VPF_migrating) - /* VCPU is blocked due to missing mem_paging ring. */ -#define _VPF_mem_paging 4 -#define VPF_mem_paging (1UL<<_VPF_mem_paging) +/* Bit 4 unused */ /* VCPU is blocked due to missing mem_access ring. */ #define _VPF_mem_access 5 #define VPF_mem_access (1UL<<_VPF_mem_access) @@ -1248,12 +1238,6 @@ static always_inline bool is_iommu_enabled(const struct domain *d) return evaluate_nospec(d->options & XEN_DOMCTL_CDF_iommu); } -#ifdef CONFIG_MEM_PAGING -# define mem_paging_enabled(d) vm_event_check_ring((d)->vm_event_paging) -#else -# define mem_paging_enabled(d) false -#endif - extern bool sched_smt_power_savings; extern bool sched_disable_smt_switching; diff --git a/xen/include/xsm/dummy.h b/xen/include/xsm/dummy.h index b8fd7aeedd9e..68c6e81b70a8 100644 --- a/xen/include/xsm/dummy.h +++ b/xen/include/xsm/dummy.h @@ -648,14 +648,6 @@ static XSM_INLINE int cf_check xsm_mem_access(XSM_DEFAULT_ARG struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static XSM_INLINE int cf_check xsm_mem_paging(XSM_DEFAULT_ARG struct domain *d) -{ - XSM_ASSERT_ACTION(XSM_DM_PRIV); - return xsm_default_action(action, current->domain, d); -} -#endif - #ifdef CONFIG_MEM_SHARING static XSM_INLINE int cf_check xsm_mem_sharing(XSM_DEFAULT_ARG struct domain *d) { diff --git a/xen/include/xsm/xsm.h b/xen/include/xsm/xsm.h index cc32a6c09104..e9cfa0ada5fb 100644 --- a/xen/include/xsm/xsm.h +++ b/xen/include/xsm/xsm.h @@ -159,10 +159,6 @@ struct xsm_ops { int (*mem_access)(struct domain *d); #endif -#ifdef CONFIG_MEM_PAGING - int (*mem_paging)(struct domain *d); -#endif - #ifdef CONFIG_MEM_SHARING int (*mem_sharing)(struct domain *d); #endif @@ -655,13 +651,6 @@ static inline int xsm_mem_access(xsm_default_t def, struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static inline int xsm_mem_paging(xsm_default_t def, struct domain *d) -{ - return alternative_call(xsm_ops.mem_paging, d); -} -#endif - #ifdef CONFIG_MEM_SHARING static inline int xsm_mem_sharing(xsm_default_t def, struct domain *d) { diff --git a/xen/xsm/dummy.c b/xen/xsm/dummy.c index 244ef557528b..e35b6ae3dc33 100644 --- a/xen/xsm/dummy.c +++ b/xen/xsm/dummy.c @@ -119,10 +119,6 @@ static const struct xsm_ops __initconst_cf_clobber dummy_ops = { .mem_access = xsm_mem_access, #endif -#ifdef CONFIG_MEM_PAGING - .mem_paging = xsm_mem_paging, -#endif - #ifdef CONFIG_MEM_SHARING .mem_sharing = xsm_mem_sharing, #endif diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd271..b0026f91c045 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -1340,13 +1340,6 @@ static int cf_check flask_mem_access(struct domain *d) } #endif -#ifdef CONFIG_MEM_PAGING -static int cf_check flask_mem_paging(struct domain *d) -{ - return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__MEM_PAGING); -} -#endif - #ifdef CONFIG_MEM_SHARING static int cf_check flask_mem_sharing(struct domain *d) { @@ -1934,10 +1927,6 @@ static const struct xsm_ops __initconst_cf_clobber flask_ops = { .mem_access = flask_mem_access, #endif -#ifdef CONFIG_MEM_PAGING - .mem_paging = flask_mem_paging, -#endif - #ifdef CONFIG_MEM_SHARING .mem_sharing = flask_mem_sharing, #endif diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index bbb9c117ec4a..9d51a1d4f74b 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -235,8 +235,6 @@ class domain2 soft_reset # XENMEM_access_op mem_access -# XENMEM_paging_op - mem_paging # XENMEM_sharing_op mem_sharing # XEN_DOMCTL_psr_alloc base-commit: 2611377cf9c92b43b04a33810f03fa07bf8ba954 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 07 17:49:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 17:49:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302952.1576588 (Exim 4.92) (envelope-from ) id 1wL2qW-0004lQ-CA; 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The other isn't so much about setting anything, but > rather about clearing. Rename the macro accordingly. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich > --- > Do we even need the hook anymore? It has been expanding the same for Arm > and x86. At this point, I'd say no. The macro has changed contents several times since it's introduction.  The grant table macros especially demonstrate how poor the common/arch interfaces are. > > --- a/xen/arch/arm/include/asm/grant_table.h > +++ b/xen/arch/arm/include/asm/grant_table.h > @@ -50,12 +50,8 @@ int replace_grant_host_mapping(uint64_t > #define gnttab_dom0_frames() \ > min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0) > +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ > + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) > > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > (st) ? gnttab_status_gfn(NULL, gt, idx) \ > --- a/xen/arch/x86/include/asm/grant_table.h > +++ b/xen/arch/x86/include/asm/grant_table.h > @@ -32,12 +32,8 @@ static inline int replace_grant_host_map > return replace_grant_pv_mapping(addr, frame, new_addr, flags); > } > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0 /* Handled in add_to_physmap_one(). */) > +#define gnttab_clear_frame_gfn(gt, gfn, mfn) \ > + guest_physmap_remove_page((gt)->domain, gfn, mfn, 0) > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ > : gnttab_shared_mfn(gt, idx); \ > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d > { > int rc = gfn_eq(gfn, INVALID_GFN) > ? 0 > - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, > - page_to_mfn(pg)); > + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); > This is just a more complex way of writing     if ( !gfn_eq(gfn, INVALID_GFN) )         rc = gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); ~Andrew > if ( rc ) > { > @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( > */ > if ( !get_page(pg, d) ) > rc = -EBUSY; > - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) > - put_page(pg); > } > > if ( rc ) From xen-devel-bounces@lists.xenproject.org Thu May 07 18:49:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 18:49:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1302998.1576596 (Exim 4.92) (envelope-from ) id 1wL3mw-0004XS-Lb; Thu, 07 May 2026 18:49:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1302998.1576596; Thu, 07 May 2026 18:49:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL3mw-0004XL-Iw; Thu, 07 May 2026 18:49:34 +0000 Received: by outflank-mailman (input) for mailman id 1302998; Thu, 07 May 2026 18:49:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL3mt-0004XF-KD for xen-devel@lists.xenproject.org; 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Update all relevant domid_alloc() call sites and harden the domid_alloc() input value check. Also, fix problem with passing invalid domain IDs in XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) uses 0xffff as domain ID. Fix failing tools tests too. Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") Signed-off-by: Denis Mukhin --- Changes since v7: - aligned the DOMID_ANY comment with another patch sent separately to unblock xenstore series: https://lore.kernel.org/xen-devel/20260429120619.1013440-2-jgross@suse.com/ - added fixups to mem-claim, paging-mempool, resource and tsx tests. - Link to v7: https://lore.kernel.org/xen-devel/20260408234046.1314021-1-dmukhin@ford.com/ - Link to full CI: https://gitlab.com/xen-project/people/sstabellini/xen/-/pipelines/2508345752 --- tools/libs/light/libxl_create.c | 4 +++- tools/tests/domid/harness.h | 1 + tools/tests/domid/test-domid.c | 12 ++++++------ tools/tests/mem-claim/test-mem-claim.c | 6 +++--- tools/tests/paging-mempool/test-paging-mempool.c | 2 +- tools/tests/resource/test-resource.c | 2 +- tools/tests/tsx/test-tsx.c | 2 +- xen/common/device-tree/dom0less-build.c | 2 +- xen/common/domctl.c | 3 +-- xen/common/domid.c | 5 ++++- xen/include/public/xen.h | 7 +++++++ 11 files changed, 29 insertions(+), 17 deletions(-) diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c index bfc9149096a3..6fd62d140389 100644 --- a/tools/libs/light/libxl_create.c +++ b/tools/libs/light/libxl_create.c @@ -681,8 +681,10 @@ int libxl__domain_make(libxl__gc *gc, libxl_domain_config *d_config, continue; local_domid = v; + } else if (libxl_domid_valid_guest(info->domid)) { + local_domid = info->domid; } else { - local_domid = info->domid; /* May not be valid */ + local_domid = DOMID_ANY; } ret = xc_domain_create(ctx->xch, &local_domid, &create); diff --git a/tools/tests/domid/harness.h b/tools/tests/domid/harness.h index 17eb22a9a854..65da0d075a2b 100644 --- a/tools/tests/domid/harness.h +++ b/tools/tests/domid/harness.h @@ -41,6 +41,7 @@ extern unsigned long find_next_zero_bit(const unsigned long *addr, #define DOMID_FIRST_RESERVED (100) #define DOMID_INVALID (101) +#define DOMID_ANY (102) #endif /* _TEST_HARNESS_ */ diff --git a/tools/tests/domid/test-domid.c b/tools/tests/domid/test-domid.c index 5915c4699a5c..71cc4e7fd86d 100644 --- a/tools/tests/domid/test-domid.c +++ b/tools/tests/domid/test-domid.c @@ -41,20 +41,20 @@ int main(int argc, char **argv) domid_free(expected); /* - * Test that that two consecutive calls of domid_alloc(DOMID_INVALID) + * Test that that two consecutive calls of domid_alloc(DOMID_ANY) * will never return the same ID. * NB: ID#0 is reserved and shall not be allocated by - * domid_alloc(DOMID_INVALID). + * domid_alloc(DOMID_ANY). */ for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 3: expected %u allocated %u\n", expected, allocated); } for ( expected = 1; expected < DOMID_FIRST_RESERVED; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == DOMID_INVALID, "TEST 4: expected %u allocated %u\n", DOMID_INVALID, allocated); } @@ -64,7 +64,7 @@ int main(int argc, char **argv) domid_free(expected); for ( expected = 1; expected < DOMID_FIRST_RESERVED / 2; expected++ ) { - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 5: expected %u allocated %u\n", expected, allocated); } @@ -72,7 +72,7 @@ int main(int argc, char **argv) /* Re-allocate last ID from [1..DOMID_FIRST_RESERVED - 1]. */ expected = DOMID_FIRST_RESERVED - 1; domid_free(DOMID_FIRST_RESERVED - 1); - allocated = domid_alloc(DOMID_INVALID); + allocated = domid_alloc(DOMID_ANY); verify(allocated == expected, "TEST 6: expected %u allocated %u\n", expected, allocated); diff --git a/tools/tests/mem-claim/test-mem-claim.c b/tools/tests/mem-claim/test-mem-claim.c index ad038e45d188..69dc99cfdd51 100644 --- a/tools/tests/mem-claim/test-mem-claim.c +++ b/tools/tests/mem-claim/test-mem-claim.c @@ -21,7 +21,7 @@ static unsigned int nr_failures; #define MB_PAGES(x) (MB(x) / XC_PAGE_SIZE) static xc_interface *xch; -static uint32_t domid = DOMID_INVALID; +static uint32_t domid = DOMID_ANY; static xc_physinfo_t physinfo; @@ -142,7 +142,7 @@ static void run_tests(void) rc = xc_domain_destroy(xch, domid); /* Cancel the cleanup path, even in the case of an error. */ - domid = DOMID_INVALID; + domid = DOMID_ANY; if ( rc ) return fail(" Failed to destroy domain: %d - %s\n", @@ -171,7 +171,7 @@ int main(int argc, char **argv) run_tests(); - if ( domid != DOMID_INVALID ) + if ( domid != DOMID_ANY ) { rc = xc_domain_destroy(xch, domid); if ( rc ) diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 1ebc13455ac2..7e417d9798ac 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -18,7 +18,7 @@ static unsigned int nr_failures; }) static xc_interface *xch; -static uint32_t domid; +static uint32_t domid = DOMID_ANY; static struct xen_domctl_createdomain create = { .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, diff --git a/tools/tests/resource/test-resource.c b/tools/tests/resource/test-resource.c index a7f2d0464326..236da0dcd45e 100644 --- a/tools/tests/resource/test-resource.c +++ b/tools/tests/resource/test-resource.c @@ -178,7 +178,7 @@ static void test_domain_configurations(void) for ( unsigned int i = 0; i < ARRAY_SIZE(tests); ++i ) { struct test *t = &tests[i]; - uint32_t domid = 0; + uint32_t domid = DOMID_ANY; int rc; xen_pfn_t ram[1] = { 0 }; diff --git a/tools/tests/tsx/test-tsx.c b/tools/tests/tsx/test-tsx.c index 5af04953f340..ea7c03ad302e 100644 --- a/tools/tests/tsx/test-tsx.c +++ b/tools/tests/tsx/test-tsx.c @@ -362,7 +362,7 @@ static void test_def_max_policies(void) static void test_guest(struct xen_domctl_createdomain *c) { - uint32_t domid = 0; + uint32_t domid = DOMID_ANY; int rc; rc = xc_domain_create(xch, &domid, c); diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 6d6882a34b5a..eacfd93087ae 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -871,7 +871,7 @@ void __init create_domUs(void) if ( (max_init_domid + 1) >= DOMID_FIRST_RESERVED ) panic("No more domain IDs available\n"); - domid = domid_alloc(DOMID_INVALID); + domid = domid_alloc(DOMID_ANY); if ( domid == DOMID_INVALID ) panic("Error allocating ID for domain %s\n", dt_node_name(node)); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..b969f5ada6cc 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -409,8 +409,7 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) case XEN_DOMCTL_createdomain: { - /* NB: ID#0 is reserved, find the first suitable ID instead. */ - domid_t domid = domid_alloc(op->domain ?: DOMID_INVALID); + domid_t domid = domid_alloc(op->domain); if ( domid == DOMID_INVALID ) { diff --git a/xen/common/domid.c b/xen/common/domid.c index 2387ddb08300..b0258e477c1a 100644 --- a/xen/common/domid.c +++ b/xen/common/domid.c @@ -19,7 +19,7 @@ static DECLARE_BITMAP(domid_bitmap, DOMID_FIRST_RESERVED); * @param domid Domain ID hint: * - If an explicit domain ID is provided, verify its availability and use it * if ID is not used; - * - If DOMID_INVALID is provided, search [1..DOMID_FIRST_RESERVED-1] range, + * - If DOMID_ANY is provided, search [1..DOMID_FIRST_RESERVED-1] range, * starting from the last used ID. Implementation guarantees that two * consecutive calls will never return the same ID. ID#0 is reserved for * the first boot domain (currently, dom0) and excluded from the allocation @@ -31,6 +31,9 @@ domid_t domid_alloc(domid_t domid) { static domid_t domid_last; + if ( domid >= DOMID_FIRST_RESERVED && domid != DOMID_ANY ) + return DOMID_INVALID; + spin_lock(&domid_lock); /* Exact match. */ diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index b12fd10e6315..2149b8dd3808 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -608,6 +608,13 @@ DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); /* DOMID_INVALID is used to identify pages with unknown owner. */ #define DOMID_INVALID xen_mk_uint(0x7FF4) +/* + * DOMID_ANY is used to signal no specific domain ID requested. + * Handler should pick a valid ID, or handle it as a wildcard value + * depending on the context. + */ +#define DOMID_ANY xen_mk_uint(0x7FF5) + /* Idle domain. */ #define DOMID_IDLE xen_mk_uint(0x7FFF) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 07 20:40:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 20:40:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303058.1576614 (Exim 4.92) (envelope-from ) id 1wL5WN-0003YG-L1; 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand Subject: Re: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Topic: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Thread-Index: AQHcyClfuk/Yqk/9/E2oGahG1JP+sg== Date: Thu, 7 May 2026 20:40:29 +0000 Message-ID: <878q9vt0lg.fsf@epam.com> References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> In-Reply-To: (Jan Beulich's message of "Wed, 6 May 2026 13:54:09 +0200") Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; x-ms-publictraffictype: Email x-ms-traffictypediagnostic: GV1PR03MB10456:EE_|VI0PR03MB10807:EE_ x-ms-office365-filtering-correlation-id: d13e1864-94a6-4abd-4157-08deac78e044 x-ms-exchange-senderadcheck: 1 x-ms-exchange-antispam-relay: 0 x-microsoft-antispam: BCL:0;ARA:13230040|366016|376014|42112799006|1800799024|56012099003|38070700021|18002099003|22082099003; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: d13e1864-94a6-4abd-4157-08deac78e044 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 20:40:29.1444 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: sfgaUE+5LNbvPjiPcaOhKm1hTtnwtGT7MPe0HcxPPHo8qlKUynDC4d7O8oCCIGOq5ZU/bp6AYFaWjnG/v1g/RVsQ/Cks9w26O47YrhiMRgc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR03MB10807 X-purgate-ID: tlsNG-c201ff/1778186433-DA56B443-AF38747C/0/0 X-purgate-type: clean X-purgate-size: 3500 Hi Jan, Jan Beulich writes: > On 06.05.2026 11:39, Mykyta Poturai wrote: >> On 5/4/26 08:37, Jan Beulich wrote: >>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>> From: Stewart Hildebrand >>>>>> >>>>>> This code is expected to only be used by privileged domains, >>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>> >>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to accou= nt >>>>>> for possible changes in the system page size register. Also force VF= s to >>>>>> always use emulated reads for command register, this is needed to >>>>>> prevent some drivers accidentally unmapping BARs. >>>>> >>>>> This apparently refers to the change to vpci_init_header(). Writes ar= e >>>>> already intercepted. How would a read lead to accidental BAR unmap? E= ven >>>>> for writes I don't see how a VF driver could accidentally unmap BARs,= as >>>>> the memory decode bit there is hardwired to 0. >>>>> >>>>>> Discovery of VFs is >>>>>> done by Dom0, which must register them with Xen. >>>>> >>>>> If we intercept control register writes, why would we still require >>>>> Dom0 to report the VFs that appear? >>>>> >>>> >>>> Sorry, I don't understand this question. You specifically requested th= is >>>> to be done this way in V2. Quoting your reply from V2 below. >>>> >>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>> returning "true" >>>> > from vpci_process_pending() until the time has passed? This imo is= a >>>> no-go. You >>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>> when the >>>> > timer has expired. That'll then eliminate the need for the >>>> not-so-nice patch 4. >>>> >>>> > Question is whether we need to actually go this far (right away). = I >>>> expect you >>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the h= ardware >>>> > domain, can't we trust it to set things up correctly, just like we >>>> trust it in >>>> > a number of other aspects? >>> >>> How's any of this related to the question I raised here, or your reply >>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>> Why still demand Dom0 to report them then? >>> >>=20 >> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is= =20 >> set to become alive. We discussed in the V2 that it is not acceptable to= =20 >> do a required 100ms wait in Xen while blocking a domain. And not doing=20 >> that blocking would require some mechanism to only allow a domain to run= =20 >> for precisely 99(or more?)ms. You yourself suggested that we can trust=20 >> the hardware domain with registering VFs if we already trust it with=20 >> other PCI-related stuff. Did you change your mind, or am I completely=20 >> misunderstanding this question? > > No, I still think that we can trust hwdom enough. Nevertheless we should > aim at being independent of it where possible. And I seem to recall that > I had also outlined an approach how to avoid spin-waiting for 100ms in > the hypervisor. I want to clarify: you are telling that Xen should not wait for hwdom to report VFs and instead create them by itself. Is this correct? --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 20:49:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 20:49:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303068.1576624 (Exim 4.92) (envelope-from ) id 1wL5eS-0004OP-HT; Thu, 07 May 2026 20:48:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303068.1576624; Thu, 07 May 2026 20:48:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL5eS-0004OI-Ej; Thu, 07 May 2026 20:48:56 +0000 Received: by outflank-mailman (input) for mailman id 1303068; Thu, 07 May 2026 20:48:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL5eQ-0004OC-MM for xen-devel@lists.xenproject.org; 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cv=UM7t2ify c=1 sm=1 tr=0 ts=69fcfab2 cx=c_pps a=Pnh5LeqhM4XIZ/aCP1A8uQ==:117 a=lOEMawUel/sSvQipkIvNbg==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=kj9zAlcOel0A:10 a=NGcC8JguVDcA:10 a=3PXLN80vpJUA:10 a=6NUGLSImWEsA:10 a=w9pew1qAHqMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=P_n1zlmtWsCQbjROFjcg:22 a=0GA0A_IKJoUHBEAzNTkD:22 a=VwQbUJbxAAAA:8 a=cbNQJ9GKAAAA:8 a=p0WdMEafAAAA:8 a=-RI0ju8yAAAA:8 a=J0Q-xWDkcNhgyuBBokcA:9 a=CjuIK1q_8ugA:10 a=G69WFyCBNqGPyalROSdv:22 a=UsJdYLK5l2RqpxBViBoK:22 X-Proofpoint-ORIG-GUID: c-pWQBHyHQEV7oY36qSPldj9NfsKBxpq X-Proofpoint-GUID: c-pWQBHyHQEV7oY36qSPldj9NfsKBxpq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-07_02,2026-05-06_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 impostorscore=0 adultscore=0 phishscore=0 bulkscore=0 priorityscore=1501 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000 definitions=main-2605070209 X-purgate-ID: tlsNG-d62444/1778186932-AE342FF4-6844BB99/0/0 X-purgate-type: clean X-purgate-size: 3408 On Wed, Apr 22, 2026 at 04:07:55PM +0200, Anthony PERARD wrote: > On Wed, Apr 08, 2026 at 04:40:46PM -0700, dmukhin@ford.com wrote: > > From: Denis Mukhin > > > > Add a new symbol DOMID_ANY to improve the readability of the code. > > > > Update all relevant domid_alloc() call sites and harden the domid_alloc() > > input value check. > > > > Also, fix problem with passing invalid domain IDs in > > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > > uses 0xffff as domain ID. > > > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > > Signed-off-by: Denis Mukhin > > --- > > Changes since v6: > > - fixed libxl_domid_valid_guest() check in libxl_create.c > > - Link to v6: https://lore.kernel.org/xen-devel/20260307025451.3148078-2-dmukhin@ford.com/ > > - CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2438790748 > > Unfortunattly, this patch breaks tests in tools/tests, see > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2471684142 > > The tests produces this: > > Running /usr/lib/xen/tests/test-mem-claim > Memory claims tests > Free pages: 3059012, Oustanding claims: 0 > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-mem-claim > > Running /usr/lib/xen/tests/test-paging-mempool > Paging mempool tests > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-paging-mempool > > Running /usr/lib/xen/tests/test-resource > XENMEM_acquire_resource tests > Test x86 PV > Domain create failure: 17 - File exists > Test x86 PVH > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-resource > > Running /usr/lib/xen/tests/test-tsx > TSX tests > Host: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Got 16 CPUs > Testing MSR_TSX_FORCE_ABORT consistency > Testing MSR_TSX_CTRL consistency > Testing MSR_MCU_OPT_CTRL consistency > Testing RTM behaviour > Got #UD > Testing PV default/max policies > Max: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Def: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Testing HVM default/max policies > Max: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Def: RTM 0, HLE 0, TSX_FORCE_ABORT 0, RTM_ALWAYS_ABORT 0, TSX_CTRL 0 > Testing PV guest > Domain create failure: 17 - File exists > Testing HVM guest > Domain create failure: 17 - File exists > FAILED: /usr/lib/xen/tests/test-tsx Yeah, I did not run those tests locally and the failing tests are not part of "basic" CI, certain gitlab privileges are required to execute the full CI test suite (as it turns out). Perhaps tools tests should be part of a CI runs available to all users, at least on demand? Sent v8 with a fixups for the tests: https://lore.kernel.org/xen-devel/20260507202840.293269-1-dmukhin@ford.com/ (Thanks to Stefano with help on running a full CI cycle). > > At least, the domid test passes :-) > Running /usr/lib/xen/tests/test-domid > PASSED :-) > > > -- > | Vates > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Thu May 07 21:44:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 21:44:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303079.1576633 (Exim 4.92) (envelope-from ) id 1wL6WJ-0003ti-Eh; Thu, 07 May 2026 21:44:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303079.1576633; Thu, 07 May 2026 21:44:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6WJ-0003tb-Be; Thu, 07 May 2026 21:44:35 +0000 Received: by outflank-mailman (input) for mailman id 1303079; Thu, 07 May 2026 21:44:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6WI-0003tV-Q1 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 21:44:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wL6WI-007a6x-71 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 23:44:34 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd078c-2eae-0a2a0a5409dd-0a2a450cebe8-28 for ; Thu, 07 May 2026 23:44:34 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd07c1-62f1-0a2a450c0019-ac6904feca48-3 for ; Thu, 07 May 2026 23:44:33 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 8AACC60181; Thu, 7 May 2026 21:44:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1C3A4C2BCB8; Thu, 7 May 2026 21:44:32 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778190272; bh=g9gkwhBzLCLWdEpETe7NYqO10AySs39ht2qN9qx5eE4=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=uBebvsDcjmQy5AczypFheKEURmWdeT2cU/+k4wO2rnahqfErIcI5UibBlnSkEBftQ StvtbxZ21Z3wFfKlHSjYE9E0+4S2y6U5pS75WvoEi+PrOkTHeRzmVOT8fGNZ8w+GP3 TPDSMvgU6L/pq/OuSpOWyv/0JdytcKWGXE0XOp7vJNEF8ECKW3ZgIu5t4ltQafFdx4 xbP8snXv0/Oc+OESZqO2FMlvVYY6QTWQ8FAUqPAOPkA+bK1fU98U+UqtXtB9jbeRcy kpmUOHwF90+IJ3rgAG+J+O2V/RohgJn+8wt/HJw5imEb1O380THUzd+DVhvO/0Uej+ T3LV/YMwpelLA== Date: Thu, 7 May 2026 14:44:27 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d25034/1778190274-DBB7CCF5-6B46791F/0/0 X-purgate-type: clean X-purgate-size: 2612 On Thu, 7 May 2026, Jan Beulich wrote: > On 07.05.2026 02:54, Stefano Stabellini wrote: > > On Wed, 6 May 2026, Stefano Stabellini wrote: > >> On Wed, 6 May 2026, Jan Beulich wrote: > >>> When one of the linking passes fails, additional intermediate files are > >>> still in place. Having them available for analysis of the underlying > >>> problem can be pretty helpful. Collect some into a new intermediates/ > >>> directory. (Nothing new will be collected if linking succeeds.) > >>> > >>> While there also make sure xen-syms is collected (into binaries/). This > >>> is rather more useful for analysis of possible problems than its stripped > >>> counterpart. > >>> > >>> Signed-off-by: Jan Beulich > >>> --- > >>> As the issue this is meant to help with didn't re-occur with this in > >>> place, the new logic wasn't really tested yet. > >> > >> It looks OK but please provide a link to a successful pipeline > > Well, I had it in use in > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 > but does that count, when the issue the change is for didn't really occur? > For now I can't test the additions without having a way to trigger that > symbol table issue (or any other problem at one of the linking stages). > Short of artificially breaking things, that is. Please break it on purpose. Just push to a temporary branch. > >> Reviewed-by: Stefano Stabellini > > Thanks, but the above wants clarifying first, and the below suggests you > actually meant to take back the R-b. > > > Actually, I see that the build script is run with bash -ex so I wonder > > if collect_xen_artefacts would even run if make fails. I think we need: > > > > trap collect_xen_artefacts EXIT > > I don't feel comfortable making such a change. Furthermore it's unrelated, > as it would mean that on other build failures successfully created final > binaries wouldn't be collected either (after all on x86 it may be only one > of the two links that failed). Plus then it would likely want doing > differently, by making the EXIT hook invoke a new > collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered > (except for the xen-syms addition there)? "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain the type of change that would be needed to make this work, because as I understand it, it does not work now. >From your comment I don't understand if you think that the patch as is would work as intended or you agree with my comment that it would not work. From xen-devel-bounces@lists.xenproject.org Thu May 07 22:06:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 22:06:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303098.1576642 (Exim 4.92) (envelope-from ) id 1wL6rq-00071O-5P; Thu, 07 May 2026 22:06:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303098.1576642; Thu, 07 May 2026 22:06:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6rq-00071H-1w; Thu, 07 May 2026 22:06:50 +0000 Received: by outflank-mailman (input) for mailman id 1303098; Thu, 07 May 2026 22:06:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wL6ro-00071B-O1 for xen-devel@lists.xenproject.org; Thu, 07 May 2026 22:06:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wL6ro-00544V-4z for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1dac22a1-1244-4094-8641-08deac84edeb X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:06:45.9904 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: zrP1uSZM1bqsUBMlzfQ0E7RF4OqZmLXW+8nwJoPdFVNHAfngPOaB7B4eWxQJbz+ww82E5oEDHgWqpTw7Zo6GJ/cCcOjP1SvkGgVn8XymVxI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11797 X-purgate-ID: tlsNG-42698a/1778191608-13979F3B-22283C5B/0/0 X-purgate-type: clean X-purgate-size: 2134 Hi Mykola, Mykola Kvach writes: > From: Mirela Simonovic > > The MMU must be enabled during the resume path before restoring context, > as virtual addresses are used to access the saved context data. > I agree with Luca, this patch does not makes sense as is. I don't see why it should be separated from the rest of the resume path that is added in the next patch > This patch adds MMU setup during resume by reusing the existing > enable_secondary_cpu_mm function, which enables data cache and the MMU. > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > to init_ttbr (page tables used at runtime). > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v7: > - no functional changes, just moved commit > --- > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 72c7b24498..596e960152 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -561,6 +561,30 @@ END(efi_xen_start) > =20 > #endif /* CONFIG_ARM_EFI */ > =20 > +#ifdef CONFIG_SYSTEM_SUSPEND > + > +FUNC(hyp_resume) > + /* Initialize the UART if earlyprintk has been enabled. */ > +#ifdef CONFIG_EARLY_PRINTK > + bl init_uart > +#endif > + PRINT_ID("- Xen resuming -\r\n") > + > + bl check_cpu_mode > + bl cpu_init > + > + ldr x0, =3Dstart > + adr x20, start /* x20 :=3D paddr (start) */ > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > + ldr lr, =3Dmmu_resumed > + b enable_secondary_cpu_mm > + > +mmu_resumed: > + b . > +END(hyp_resume) > + > +#endif /* CONFIG_SYSTEM_SUSPEND */ > + > /* > * Local variables: > * mode: ASM --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 22:17:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 07 May 2026 22:17:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303107.1576651 (Exim 4.92) (envelope-from ) id 1wL725-0000Tg-7t; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: GV1PR03MB10456.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 913b6b2c-ba50-4cc1-0074-08deac866745 X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:17:19.1191 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: kc52ypWEbkIKpFphQE4GU0MeY2jv9vx0iYAZsHWt7o+rap5GkYXX9Aegw/aR2khML10P3eFnU6MJh8jbfYhGNSutRNQ8s7/dwqUt9EKTJTc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR03MB6212 X-purgate-ID: tlsNG-bad1c0/1778192241-37175A53-66E71E72/0/0 X-purgate-type: clean X-purgate-size: 8203 Hi Mikola, Mykola Kvach writes: > From: Mirela Simonovic > > The context of CPU general purpose and system control registers must be > saved on suspend and restored on resume. This is implemented in > prepare_resume_ctx and before the return from the hyp_resume function. > The prepare_resume_ctx must be invoked just before the PSCI system suspen= d > call is issued to the ATF. The prepare_resume_ctx must return a non-zero > value so that the calling 'if' statement evaluates to true, causing the > system suspend to be invoked. Upon resume, the context saved on suspend > will be restored, including the link register. Therefore, after > restoring the context, the control flow will return to the address > pointed to by the saved link register, which is the place from which > prepare_resume_ctx was called. To ensure that the calling 'if' statement > does not again evaluate to true and initiate system suspend, hyp_resume > must return a zero value after restoring the context. > > Note that the order of saving register context into cpu_context structure > must match the order of restoring. > > Support for ARM32 is not implemented. Instead, compilation fails with a > build-time error if suspend is enabled for ARM32. > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v8: > - fix alignments in code > > Changes in v7: > - no changes > --- > xen/arch/arm/Makefile | 1 + > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > xen/arch/arm/suspend.c | 14 +++++ > 4 files changed, 130 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/suspend.c > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 69200b2728..c36158271a 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > obj-y +=3D shutdown.o > obj-y +=3D smp.o > obj-y +=3D smpboot.o > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > obj-y +=3D time.o > obj-y +=3D traps.o > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 596e960152..2cb02ee314 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -562,6 +562,52 @@ END(efi_xen_start) > #endif /* CONFIG_ARM_EFI */ > =20 > #ifdef CONFIG_SYSTEM_SUSPEND > +/* > + * int prepare_resume_ctx(struct cpu_context *ptr) "cpu_context" is very generic name, especially taking into account that you are introducing a global variable with the same name. How about "resume_cpu_context"? > + * > + * x0 - pointer to the storage where callee's context will be saved > + * > + * CPU context saved here will be restored on resume in hyp_resume funct= ion. > + * prepare_resume_ctx shall return a non-zero value. Upon restoring cont= ext > + * hyp_resume shall return value zero instead. From C code that invokes > + * prepare_resume_ctx, the return value is interpreted to determine whet= her > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > + */ > +FUNC(prepare_resume_ctx) > + /* Store callee-saved registers */ How are planning to synchronise this code with actual cpu_context? I am pretty sure it is better to use offsets generated by asm-offset.c > + stp x19, x20, [x0], #16 > + stp x21, x22, [x0], #16 > + stp x23, x24, [x0], #16 > + stp x25, x26, [x0], #16 > + stp x27, x28, [x0], #16 > + stp x29, lr, [x0], #16 > + > + /* Store stack-pointer */ > + mov x2, sp > + str x2, [x0], #8 > + > + /* Store system control registers */ > + mrs x2, VBAR_EL2 > + str x2, [x0], #8 > + mrs x2, VTCR_EL2 > + str x2, [x0], #8 > + mrs x2, VTTBR_EL2 > + str x2, [x0], #8 > + mrs x2, TPIDR_EL2 > + str x2, [x0], #8 > + mrs x2, MDCR_EL2 > + str x2, [x0], #8 > + mrs x2, HSTR_EL2 > + str x2, [x0], #8 > + mrs x2, CPTR_EL2 > + str x2, [x0], #8 > + mrs x2, HCR_EL2 > + str x2, [x0], #8 > + > + /* prepare_resume_ctx must return a non-zero value */ > + mov x0, #1 > + ret > +END(prepare_resume_ctx) > =20 > FUNC(hyp_resume) > /* Initialize the UART if earlyprintk has been enabled. */ > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > b enable_secondary_cpu_mm > =20 > mmu_resumed: > - b . > + /* Now we can access the cpu_context, so restore the context her= e */ > + ldr x0, =3Dcpu_context > + > + /* Restore callee-saved registers */ > + ldp x19, x20, [x0], #16 > + ldp x21, x22, [x0], #16 > + ldp x23, x24, [x0], #16 > + ldp x25, x26, [x0], #16 > + ldp x27, x28, [x0], #16 > + ldp x29, lr, [x0], #16 > + > + /* Restore stack pointer */ > + ldr x2, [x0], #8 > + mov sp, x2 > + > + /* Restore system control registers */ > + ldr x2, [x0], #8 > + msr VBAR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTCR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTTBR_EL2, x2 > + ldr x2, [x0], #8 > + msr TPIDR_EL2, x2 > + ldr x2, [x0], #8 > + msr MDCR_EL2, x2 > + ldr x2, [x0], #8 > + msr HSTR_EL2, x2 > + ldr x2, [x0], #8 > + msr CPTR_EL2, x2 > + ldr x2, [x0], #8 > + msr HCR_EL2, x2 > + isb > + > + /* > + * Since context is restored return from this function will appe= ar > + * as return from prepare_resume_ctx. To distinguish a return fr= om > + * prepare_resume_ctx which is called upon finalizing the suspen= d, > + * as opposed to return from this function which executes on res= ume, > + * we need to return zero value here. > + */ > + mov x0, #0 > + ret > END(hyp_resume) > =20 > #endif /* CONFIG_SYSTEM_SUSPEND */ > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/as= m/suspend.h > index 31a98a1f1b..c127fa3d78 100644 > --- a/xen/arch/arm/include/asm/suspend.h > +++ b/xen/arch/arm/include/asm/suspend.h > @@ -3,6 +3,8 @@ > #ifndef ARM_SUSPEND_H > #define ARM_SUSPEND_H > =20 > +#include > + > struct domain; > struct vcpu; > struct vcpu_guest_context; > @@ -14,6 +16,30 @@ struct resume_info { > =20 > void arch_domain_resume(struct domain *d); > =20 > +#ifdef CONFIG_SYSTEM_SUSPEND > +#ifdef CONFIG_ARM_64 > +struct cpu_context { > + register_t callee_regs[12]; > + register_t sp; > + register_t vbar_el2; > + register_t vtcr_el2; > + register_t vttbr_el2; > + register_t tpidr_el2; > + register_t mdcr_el2; > + register_t hstr_el2; > + register_t cptr_el2; > + register_t hcr_el2; > +} __aligned(16); > +#else > +#error "Define cpu_context structure for arm32" > +#endif > + > +extern struct cpu_context cpu_context; > + > +int prepare_resume_ctx(struct cpu_context *ptr); > +void hyp_resume(void); > +#endif /* CONFIG_SYSTEM_SUSPEND */ > + > #endif /* ARM_SUSPEND_H */ > =20 > /* > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > new file mode 100644 > index 0000000000..e38566b0b7 > --- /dev/null > +++ b/xen/arch/arm/suspend.c > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > + > +struct cpu_context cpu_context =3D {}; Don't need to zero-initialize a global variable. > + > +/* > + * Local variables: > + * mode: C > + * c-file-style: "BSD" > + * c-basic-offset: 4 > + * indent-tabs-mode: nil > + * End: > + */ --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Thu May 07 22:25:58 2026 Return-path: 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X-MS-Exchange-CrossTenant-Network-Message-Id: ec5d068e-a077-408a-a1e8-08deac87c07e X-MS-Exchange-CrossTenant-originalarrivaltime: 07 May 2026 22:26:58.2667 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pT4ZwsCute9rKFT3XwiLDAg1Mr/W1eRhTzBzZwJoqBmQVqsvxjbP2mJGW+8zYounWMHR54Xk//oJu2gzofZKt7v/YKWvHWkGtjv+rWNyPO4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AMBPR03MB11798 X-purgate-ID: tlsNG-ef75cf/1778192819-09F6EC48-280A6FEE/0/0 X-purgate-type: clean X-purgate-size: 1082 Hi Mykola, Mykola Kvach writes: > From: Mykola Kvach > > init_tee_secondary() was marked __init and freed after boot. Calling it > from the CPU hotplug/resume path then executed discarded code, which > could crash Xen. Drop __init so the TEE mediator secondary init can run > safely on hotplugged and resumed CPUs. > > Signed-off-by: Mykola Kvach Reviewed-by: Volodymyr Babchuk > --- > xen/arch/arm/tee/tee.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c > index 8501443c8e..00e561fc78 100644 > --- a/xen/arch/arm/tee/tee.c > +++ b/xen/arch/arm/tee/tee.c > @@ -128,7 +128,7 @@ static int __init tee_init(void) > =20 > presmp_initcall(tee_init); > =20 > -void __init init_tee_secondary(void) > +void init_tee_secondary(void) > { > if ( cur_mediator && cur_mediator->ops->init_secondary ) > cur_mediator->ops->init_secondary(); --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Fri May 08 05:52:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 05:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303188.1576682 (Exim 4.92) (envelope-from ) id 1wLE8A-0001rs-7E; Fri, 08 May 2026 05:52:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303188.1576682; Fri, 08 May 2026 05:52:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE8A-0001r0-0m; Fri, 08 May 2026 05:52:10 +0000 Received: by outflank-mailman (input) for mailman id 1303188; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE89-0001qP-C3 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLE88-0045ao-PF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 07:52:08 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd79ff-5cb7-0a2a0a5109dd-0a2a450cb8f4-8 for ; Fri, 08 May 2026 07:52:08 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7a08-62f1-0a2a450c0019-d1558032d55a-3 for ; Fri, 08 May 2026 07:52:08 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488ba840146so14027085e9.1 for ; Thu, 07 May 2026 22:52:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <878q9vt0lg.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778219528-E3B7CCF5-C0C7345E/0/0 X-purgate-type: clean X-purgate-size: 3575 On 07.05.2026 22:40, Volodymyr Babchuk wrote: > Jan Beulich writes: >> On 06.05.2026 11:39, Mykyta Poturai wrote: >>> On 5/4/26 08:37, Jan Beulich wrote: >>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>> From: Stewart Hildebrand >>>>>>> >>>>>>> This code is expected to only be used by privileged domains, >>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>> >>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>> always use emulated reads for command register, this is needed to >>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>> >>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>> the memory decode bit there is hardwired to 0. >>>>>> >>>>>>> Discovery of VFs is >>>>>>> done by Dom0, which must register them with Xen. >>>>>> >>>>>> If we intercept control register writes, why would we still require >>>>>> Dom0 to report the VFs that appear? >>>>>> >>>>> >>>>> Sorry, I don't understand this question. You specifically requested this >>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>> >>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>> returning "true" >>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>> no-go. You >>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>> when the >>>>> > timer has expired. That'll then eliminate the need for the >>>>> not-so-nice patch 4. >>>>> >>>>> > Question is whether we need to actually go this far (right away). I >>>>> expect you >>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>> > domain, can't we trust it to set things up correctly, just like we >>>>> trust it in >>>>> > a number of other aspects? >>>> >>>> How's any of this related to the question I raised here, or your reply >>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>> Why still demand Dom0 to report them then? >>>> >>> >>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>> set to become alive. We discussed in the V2 that it is not acceptable to >>> do a required 100ms wait in Xen while blocking a domain. And not doing >>> that blocking would require some mechanism to only allow a domain to run >>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>> the hardware domain with registering VFs if we already trust it with >>> other PCI-related stuff. Did you change your mind, or am I completely >>> misunderstanding this question? >> >> No, I still think that we can trust hwdom enough. Nevertheless we should >> aim at being independent of it where possible. And I seem to recall that >> I had also outlined an approach how to avoid spin-waiting for 100ms in >> the hypervisor. > > I want to clarify: you are telling that Xen should not wait for hwdom to > report VFs and instead create them by itself. Is this correct? If that's technically possible, yes. Jan From xen-devel-bounces@lists.xenproject.org Fri May 08 05:52:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 05:52:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303187.1576678 (Exim 4.92) (envelope-from ) id 1wLE8A-0001qi-00; Fri, 08 May 2026 05:52:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303187.1576678; Fri, 08 May 2026 05:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE89-0001qa-QW; Fri, 08 May 2026 05:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1303187; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLE88-0001qO-Vp for xen-devel@lists.xenproject.org; Fri, 08 May 2026 05:52:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLE87-005pz7-Sk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 07:52:07 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd79fe-e002-0a2a0a5209dd-0a2a4506ba88-12 for ; Fri, 08 May 2026 07:52:07 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7a07-7371-0a2a45060019-d1558035e5aa-3 for ; Fri, 08 May 2026 07:52:07 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48334ee0aeaso11698255e9.1 for ; Thu, 07 May 2026 22:52:07 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <878q9vt0lg.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778219527-85B6DD75-5E4E99F6/0/0 X-purgate-type: clean X-purgate-size: 3575 On 07.05.2026 22:40, Volodymyr Babchuk wrote: > Jan Beulich writes: >> On 06.05.2026 11:39, Mykyta Poturai wrote: >>> On 5/4/26 08:37, Jan Beulich wrote: >>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>> From: Stewart Hildebrand >>>>>>> >>>>>>> This code is expected to only be used by privileged domains, >>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>> >>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>> always use emulated reads for command register, this is needed to >>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>> >>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>> the memory decode bit there is hardwired to 0. >>>>>> >>>>>>> Discovery of VFs is >>>>>>> done by Dom0, which must register them with Xen. >>>>>> >>>>>> If we intercept control register writes, why would we still require >>>>>> Dom0 to report the VFs that appear? >>>>>> >>>>> >>>>> Sorry, I don't understand this question. You specifically requested this >>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>> >>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>> returning "true" >>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>> no-go. You >>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>> when the >>>>> > timer has expired. That'll then eliminate the need for the >>>>> not-so-nice patch 4. >>>>> >>>>> > Question is whether we need to actually go this far (right away). I >>>>> expect you >>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>> > domain, can't we trust it to set things up correctly, just like we >>>>> trust it in >>>>> > a number of other aspects? >>>> >>>> How's any of this related to the question I raised here, or your reply >>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>> Why still demand Dom0 to report them then? >>>> >>> >>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>> set to become alive. We discussed in the V2 that it is not acceptable to >>> do a required 100ms wait in Xen while blocking a domain. And not doing >>> that blocking would require some mechanism to only allow a domain to run >>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>> the hardware domain with registering VFs if we already trust it with >>> other PCI-related stuff. Did you change your mind, or am I completely >>> misunderstanding this question? >> >> No, I still think that we can trust hwdom enough. Nevertheless we should >> aim at being independent of it where possible. And I seem to recall that >> I had also outlined an approach how to avoid spin-waiting for 100ms in >> the hypervisor. > > I want to clarify: you are telling that Xen should not wait for hwdom to > report VFs and instead create them by itself. Is this correct? If that's technically possible, yes. Jan From xen-devel-bounces@lists.xenproject.org Fri May 08 06:11:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 06:11:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303206.1576696 (Exim 4.92) (envelope-from ) id 1wLEQc-0005Z0-N4; Fri, 08 May 2026 06:11:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303206.1576696; Fri, 08 May 2026 06:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLEQc-0005Yt-KI; Fri, 08 May 2026 06:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1303206; Fri, 08 May 2026 06:11:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLEQb-0005Yn-IJ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 06:11:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLEQa-001eul-GG for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:11:12 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd7e72-bab6-0a2a0a5309dd-0a2a450399de-42 for ; Fri, 08 May 2026 08:11:12 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd7e7f-672d-0a2a45030019-d155dd2da5bc-3 for ; Fri, 08 May 2026 08:11:11 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-441209fb77eso990530f8f.1 for ; Thu, 07 May 2026 23:11:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 07 May 2026 23:11:11 -0700 (PDT) Message-ID: <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> Date: Fri, 8 May 2026 08:11:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts To: Stefano Stabellini Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778220671-3A965938-79FB9B79/0/0 X-purgate-type: clean X-purgate-size: 3429 On 07.05.2026 23:44, Stefano Stabellini wrote: > On Thu, 7 May 2026, Jan Beulich wrote: >> On 07.05.2026 02:54, Stefano Stabellini wrote: >>> On Wed, 6 May 2026, Stefano Stabellini wrote: >>>> On Wed, 6 May 2026, Jan Beulich wrote: >>>>> When one of the linking passes fails, additional intermediate files are >>>>> still in place. Having them available for analysis of the underlying >>>>> problem can be pretty helpful. Collect some into a new intermediates/ >>>>> directory. (Nothing new will be collected if linking succeeds.) >>>>> >>>>> While there also make sure xen-syms is collected (into binaries/). This >>>>> is rather more useful for analysis of possible problems than its stripped >>>>> counterpart. >>>>> >>>>> Signed-off-by: Jan Beulich >>>>> --- >>>>> As the issue this is meant to help with didn't re-occur with this in >>>>> place, the new logic wasn't really tested yet. >>>> >>>> It looks OK but please provide a link to a successful pipeline >> >> Well, I had it in use in >> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 >> but does that count, when the issue the change is for didn't really occur? >> For now I can't test the additions without having a way to trigger that >> symbol table issue (or any other problem at one of the linking stages). >> Short of artificially breaking things, that is. > > Please break it on purpose. Just push to a temporary branch. > > >>>> Reviewed-by: Stefano Stabellini >> >> Thanks, but the above wants clarifying first, and the below suggests you >> actually meant to take back the R-b. >> >>> Actually, I see that the build script is run with bash -ex so I wonder >>> if collect_xen_artefacts would even run if make fails. I think we need: >>> >>> trap collect_xen_artefacts EXIT >> >> I don't feel comfortable making such a change. Furthermore it's unrelated, >> as it would mean that on other build failures successfully created final >> binaries wouldn't be collected either (after all on x86 it may be only one >> of the two links that failed). Plus then it would likely want doing >> differently, by making the EXIT hook invoke a new >> collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered >> (except for the xen-syms addition there)? > > "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain > the type of change that would be needed to make this work, because as I > understand it, it does not work now. > > From your comment I don't understand if you think that the patch as is > would work as intended or you agree with my comment that it would not > work. Given the -e passed to bash, I don't expect it to work as is. However, I question this behavior. Exiting on error may be okay for any of the preparatory commands, but exiting on failure of make feels dubious [1]. Hence I'm unsure which way to deal with that aspect (i.e. I'd prefer to latch the main make's status, collect artifacts, and then exit the script with make's status). Somewhat related: Why is it that collect_xen_artefacts is invoked three times, rather than just once at the very bottom of the script? At which point it wouldn't even need to be a function. Jan [1] E.g. a failed tools build may also be easier to analyze if the already built components (libraries in particular) were collected. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778221027-8C47CD75-8A5280A1/0/0 X-purgate-type: clean X-purgate-size: 2023 On 07.05.2026 19:49, Andrew Cooper wrote: > On 07/05/2026 12:41 pm, Jan Beulich wrote: >> It's not really doing anything for valid GFNs, which renders its one use >> site pretty pointless. The other isn't so much about setting anything, but >> rather about clearing. Rename the macro accordingly. >> >> The main point here, however, is about Rafal spotting the double >> fetching of the GFN (first in gnttab_unpopulate_status_frames(), then >> again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass >> in the already fetched GFN, while dropping the no longer used parameters. >> >> Suggested-by: Rafal Wojtczuk >> Signed-off-by: Jan Beulich >> --- >> Do we even need the hook anymore? It has been expanding the same for Arm >> and x86. > > At this point, I'd say no. > > The macro has changed contents several times since it's introduction.  > The grant table macros especially demonstrate how poor the common/arch > interfaces are. Okay, unless I hear otherwise (pretty soon) I'll drop it altogether in v2. >> --- a/xen/common/grant_table.c >> +++ b/xen/common/grant_table.c >> @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d >> { >> int rc = gfn_eq(gfn, INVALID_GFN) >> ? 0 >> - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, >> - page_to_mfn(pg)); >> + : gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); >> > > This is just a more complex way of writing > >     if ( !gfn_eq(gfn, INVALID_GFN) ) >         rc = gnttab_clear_frame_gfn(gt, gfn, page_to_mfn(pg)); With up-front int rc = 0; yes. As in many other cases I'm trying to keep churn low when there's no pretty much objectively better way of writing things. Personally I prefer the "just an initializer" form (iirc it was also me who introduced the above code in that shape). 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Smith" , Oleksii Kurochko , Xen-devel References: <20260507171933.1573983-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260507171933.1573983-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778221859-7216A8B7-32E0CAAD/10/73395122804 X-purgate-type: spam X-purgate-size: 1102 On 07.05.2026 19:19, Andrew Cooper wrote: > This capability is experimental, has seen no development since 2011, and these > days only gets edited to fix the build. > > While it can be compiled out (of Xen at least), it is a maintenance burden on > surrounding code that we'd prefer to stop paying. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Michal Orzel > CC: Jan Beulich > CC: Julien Grall > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Juergen Gross > CC: Tamas K Lengyel > CC: Daniel P. Smith > CC: Oleksii Kurochko > > Slightly RFC. I'm suspect I might be asked to split this up a bit, but if so, > suggestions on where to draw the lines please. tools, common, x86, xsm in (perhaps) this order? That would then also pretty much isolate who each one needs acks from. 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> >> + > >> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) > >> + return -EINVAL; > >> + > >> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) > >> + return -EINVAL; > >> + > >> + if (state->target_residency < state->exit_latency) > >> + return -EINVAL; > >> + > >> + if (!prev_state) > >> + return 0; > >> + > >> + if (state->exit_latency <= prev_state->exit_latency) > >> + return -EINVAL; > >> + > >> + if (state->target_residency <= prev_state->target_residency) > >> + return -EINVAL; > > > > I'm not an expert on C-states, but isn't this checking against the > > previous value kind of defeating part of the purpose of the command > > line? > > I don't know. The question would need raising to the author. > > > Also, it might help to also write down those limits in the command > > line documentation. > > What do you mean there? Some of the values are universal, but some > checks are against model-specific values. I don't think you mean to > enumerate them all? Maybe it's indeed not very useful. What I referring to was something along the lines of: "the command line provided residency and latency values must be smaller than the default ones". As noted above it seems weird to me than higher than current values cannot be set, albeit I have no idea what's the expected usage of this interface. Thanks, Roger. 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Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Fix lazy mmu handling across context switch Date: Fri, 8 May 2026 10:05:14 +0200 Message-ID: <20260508080514.454607-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[21]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:dkim,suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; TO_DN_SOME(0.00)[]; DKIM_TRACE(0.00)[suse.com:+] X-Rspamd-Queue-Id: A41BF5C480 X-Rspamd-Server: rspamd2.dmz-prg2.suse.org X-Spam-Flag: NO X-Spam-Score: -3.01 X-purgate-ID: tlsNG-bad1c0/1778227518-37175A53-532E17D9/0/0 X-purgate-type: clean X-purgate-size: 3371 The recent rework of mmu lazy mode has resulted in problems when running as a Xen PV guest. Enabling lazy mmu mode for the new context during context switch is done from the arch_end_context_switch() hook, but when calling this hook current hasn't been changed yet, so the lazy mmu mode state of the wrong task is modified. Additionally it is much cleaner to use lazy_mmu_mode_pause() and lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids conditionals in those hooks. In order not having to add another hook to be called after switching current, modify lazy_mmu_mode_resume() to use a new sub-function which takes a task pointer as parameter. This new sub-function can then be used in the xen_end_context_switch() hook. Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") Signed-off-by: Juergen Gross --- arch/x86/xen/enlighten_pv.c | 7 ++----- include/linux/pgtable.h | 33 ++++++++++++++++++++++++--------- 2 files changed, 26 insertions(+), 14 deletions(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index ed2d7a3756ce..67bb6bf6d240 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct task_struct *prev) { BUG_ON(preemptible()); - if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { - arch_leave_lazy_mmu_mode(); - } + lazy_mmu_mode_pause(); enter_lazy(XEN_LAZY_CPU); } @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct task_struct *next) xen_mc_flush(); leave_lazy(XEN_LAZY_CPU); - if (__task_lazy_mmu_mode_active(next)) - arch_enter_lazy_mmu_mode(); + lazy_mmu_mode_resume_task(next); } static unsigned long xen_store_tr(void) diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h index cdd68ed3ae1a..83a099bf2038 100644 --- a/include/linux/pgtable.h +++ b/include/linux/pgtable.h @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) arch_leave_lazy_mmu_mode(); } +/** + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a specific task. + * + * Like lazy_mmu_mode_resume() below, but with a task specified. + * Must be called only by lazy_mmu_mode_resume() or during context switch. + * Must never be called in interrupt context. + * + * Must match a call to lazy_mmu_mode_pause(). + * + * Has no effect if called: + * - While paused (inside another pause()/resume() pair) + */ +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) +{ + struct lazy_mmu_state *state = &task->lazy_mmu_state; + + VM_WARN_ON_ONCE(state->pause_count == 0); + + if (--state->pause_count == 0 && state->enable_count > 0) + arch_enter_lazy_mmu_mode(); +} + /** * lazy_mmu_mode_resume() - Resume the lazy MMU mode. * @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) */ static inline void lazy_mmu_mode_resume(void) { - struct lazy_mmu_state *state = ¤t->lazy_mmu_state; - - if (in_interrupt()) - return; - - VM_WARN_ON_ONCE(state->pause_count == 0); - - if (--state->pause_count == 0 && state->enable_count > 0) - arch_enter_lazy_mmu_mode(); + if (!in_interrupt()) + lazy_mmu_mode_resume_task(current); } #else static inline void lazy_mmu_mode_enable(void) {} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 08:34:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 08:34:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303288.1576745 (Exim 4.92) (envelope-from ) id 1wLGej-0001bV-IX; Fri, 08 May 2026 08:33:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303288.1576745; Fri, 08 May 2026 08:33:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGej-0001bO-Fq; Fri, 08 May 2026 08:33:57 +0000 Received: by outflank-mailman (input) for mailman id 1303288; Fri, 08 May 2026 08:33:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGeh-0001bI-Ri for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:33:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLGeh-00FZCC-3Y for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:33:55 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fd9fe4-bab6-0a2a0a5309dd-0a2a4508e796-40 for ; Fri, 08 May 2026 10:33:54 +0200 Received: from [209.85.208.44] (helo=mail-ed1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fd9ff2-63b5-0a2a45080019-d155d02cb05c-3 for ; Fri, 08 May 2026 10:33:54 +0200 Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-67389cf78b0so3174707a12.2 for ; Fri, 08 May 2026 01:33:54 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org References: <20260508080514.454607-1-jgross@suse.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260508080514.454607-1-jgross@suse.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------3Jq2hVC2vaJmzLdycTi38fj0" X-purgate-ID: tlsNG-c1860d/1778229234-B6B74DB1-1846446D/0/0 X-purgate-type: clean X-purgate-size: 11414 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------3Jq2hVC2vaJmzLdycTi38fj0 Content-Type: multipart/mixed; boundary="------------Vt7oWIJw8gIt0eyJaT1vcDAe"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: kevin.brodsky@arm.com, mmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. 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Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org Message-ID: <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch References: <20260508080514.454607-1-jgross@suse.com> In-Reply-To: <20260508080514.454607-1-jgross@suse.com> --------------Vt7oWIJw8gIt0eyJaT1vcDAe Content-Type: multipart/mixed; boundary="------------oDEGK9VJWMWYbdXgkX7jaAvL" --------------oDEGK9VJWMWYbdXgkX7jaAvL Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 UGxlYXNlIGRpc3JlZ2FyZCB0aGlzIHBhdGNoLiBJdCBpc24ndCBmaXhpbmcgdGhlIHJlYWwg cHJvYmxlbS4NCg0KT24gMDguMDUuMjYgMTA6MDUsIEp1ZXJnZW4gR3Jvc3Mgd3JvdGU6DQo+ IFRoZSByZWNlbnQgcmV3b3JrIG9mIG1tdSBsYXp5IG1vZGUgaGFzIHJlc3VsdGVkIGluIHBy b2JsZW1zIHdoZW4NCj4gcnVubmluZyBhcyBhIFhlbiBQViBndWVzdC4gRW5hYmxpbmcgbGF6 eSBtbXUgbW9kZSBmb3IgdGhlIG5ldyBjb250ZXh0DQo+IGR1cmluZyBjb250ZXh0IHN3aXRj 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gti/xheIWO80kNehWnxxjKsz7R5uFqaXoTsH58hXx0ZJSH816ryhr84MGJdXsUSFqll4xOMqiOT C1dH1Qka3zuaIQJBpRmHQkQ/p1uzIpO7H5S0xSmXPbrLXG0tLk180HKKuFZf4oZYcaTriaOpt0z 2KG8wKgwwsCGKCFMgHWHx2BbGypjj+F7YBvyrvsrclOSc5JjbCGN0exGhSRnqqakhb2QWIQBIzz MQCn7w== X-Received: by 2002:a05:6512:33ca:b0:5a8:8222:7fd2 with SMTP id 2adb3069b0e04-5a887add1f1mr3528722e87.2.1778229434408; Fri, 08 May 2026 01:37:14 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> <87lddusvpy.fsf@epam.com> In-Reply-To: <87lddusvpy.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 11:37:02 +0300 X-Gm-Features: AVHnY4JYt4-0UmJ7JSJaWoyZcgjN2R8NDLx-IG2Pt8MeXk4pyFfoI5_ZvDR8HQg Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Volodymyr Babchuk Cc: Luca Fancellu , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778229435-09B68C48-A14C093E/0/0 X-purgate-type: clean X-purgate-size: 11142 Hi Volodymyr, Thank you for the feedback. On Fri, May 8, 2026 at 1:25=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mykola, > > Mykola Kvach writes: > > [...] > > >> > + status =3D can_system_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_scheduler; > >> > >> When we have an error and we get the resume_scheduler path, we apply b= ack the > >> context of the guest saved previously in do_psci_1_0_system_suspend(),= so am I > >> correct saying the guest won=E2=80=99t get any PSCI error back and we = resume the guest > >> from the guest resume entrypoint? > >> > >> In case, should we have a different path that returns a PSCI error (PS= CI_*) into the guest > >> x0, and skips the context restore? > > > > You are right about the current control flow: once the virtual > > SYSTEM_SUSPEND request has been accepted and the domain has been parked= , a > > later failure in the Xen-wide suspend path resumes the domain through t= he normal > > domain resume path, rather than returning a PSCI error from the origina= l call. > > > > This is intentional in the current design. The virtual PSCI SYSTEM_SUSP= END > > path parks the domain and saves its resume context. The actual Xen-wide= host > > suspend is a separate step that is attempted only after all domains are > > suspended. > > > > So a failure in the later Xen-wide suspend step is treated as an abort = of the > > host suspend attempt after the domain suspend was already accepted. The= domain > > is then resumed through the existing domain resume path, similarly to t= he > > toolstack/xl suspend-resume flow, rather than by re-entering the guest = PSCI > > call path and modifying the saved vCPU context again. > > > > I agree this design is not obvious from the patch. I will clarify the c= ommit > > message and comments. If you or the maintainers think that failures bef= ore the > > physical SYSTEM_SUSPEND call succeeds should be reported back through t= he > > original virtual PSCI call, then this would require a different flow. I= was > > trying to avoid that extra complexity in this series. > > I think that there is no sense to reporting an error back to guest. PSCI > allows resume at any stage, so it is acceptable to have such brief "suspe= nd" > > > > >> > >> > + } > >> > + > >> > + /* > >> > + * Non-boot CPUs have to be disabled on suspend and enabled on = resume > >> > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead= to PSCI > >> > + * CPU_OFF to be called by each non-boot CPU. Depending on the = underlying > >> > + * platform capabilities, this may lead to the physical powerin= g down of > >> > + * CPUs. > >> > + */ > >> > + status =3D disable_nonboot_cpus(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_nonboot_cpus; > >> > + } > >> > + > >> > + time_suspend(); > >> > + > >> > + status =3D iommu_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_time; > >> > + } > >> > + > >> > + console_start_sync(); > >> > + status =3D console_suspend(); > >> > + if ( status ) > >> > + { > >> > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=3D%= d\n", status); > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_end_sync; > >> > + } > >> > + > >> > + local_irq_save(flags); > >> > + status =3D gic_suspend(); > >> > + if ( status ) > >> > + { > >> > + system_state =3D SYS_STATE_resume; > >> > + goto resume_irqs; > >> > + } > >> > + > >> > + set_init_ttbr(xen_pgtable); > >> > + > >> > + /* > >> > + * Enable identity mapping before entering suspend to simplify > >> > + * the resume path > >> > + */ > >> > + update_boot_mapping(true); > >> > + > >> > + if ( prepare_resume_ctx(&cpu_context) ) > >> > + { > >> > + status =3D call_psci_system_suspend(); > >> > + /* > >> > + * If suspend is finalized properly by above system suspend= PSCI call, > >> > + * the code below in this 'if' branch will never execute. E= xecution > >> > + * will continue from hyp_resume which is the hypervisor's = resume point. > >> > + * In hyp_resume CPU context will be restored and since lin= k-register is > >> > + * restored as well, it will appear to return from prepare_= resume_ctx. > >> > + * The difference in returning from prepare_resume_ctx on s= ystem suspend > >> > + * versus resume is in function's return value: on suspend,= the return > >> > + * value is a non-zero value, on resume it is zero. That is= why the > >> > + * control flow will not re-enter this 'if' branch on resum= e. > >> > + */ > >> > + if ( status ) > >> > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, er= r=3D%d\n", > >> > + status); > >> > + } > >> > + > >> > + system_state =3D SYS_STATE_resume; > >> > + update_boot_mapping(false); > >> > + > >> > + gic_resume(); > >> > + > >> > + resume_irqs: > >> > + local_irq_restore(flags); > >> > + > >> > + console_resume(); > >> > + resume_end_sync: > >> > + console_end_sync(); > >> > + > >> > + iommu_resume(); > >> > + > >> > + resume_time: > >> > + time_resume(); > >> > + > >> > + resume_nonboot_cpus: > >> > + /* > >> > + * The rcu_barrier() has to be added to ensure that the per cpu= area is > >> > + * freed before a non-boot CPU tries to initialize it (_free_pe= rcpu_area() > >> > + * has to be called before the init_percpu_area()). This scenar= io occurs > >> > + * when non-boot CPUs are hot-unplugged on suspend and hotplugg= ed on resume. > >> > + */ > >> > + rcu_barrier(); > >> > + enable_nonboot_cpus(); > >> > + > >> > + resume_scheduler: > >> > + scheduler_enable(); > >> > + thaw_domains(); > >> > + > >> > + system_state =3D SYS_STATE_active; > >> > + > >> > + printk("Resume (status %d)\n", status); > >> > + > >> > + domain_resume(d); > >> > +} > >> > + > >> > +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL= ); > >> > + > >> > +void host_system_suspend(struct domain *d) > >> > +{ > >> > + system_suspend_tasklet.data =3D (void *)d; > >> > + /* > >> > + * The suspend procedure has to be finalized by the pCPU#0 (non= -boot pCPUs > >> > + * will be disabled during the suspend). > >> > + */ > >> > + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); > >> > +} > >> > + > >> > /* > >> > * Local variables: > >> > * mode: C > >> > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > >> > index bd87ec430d..8fb9172186 100644 > >> > --- a/xen/arch/arm/vpsci.c > >> > +++ b/xen/arch/arm/vpsci.c > >> > @@ -5,6 +5,7 @@ > >> > > >> > #include > >> > #include > >> > +#include > >> > #include > >> > #include > >> > #include > >> > @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(regist= er_t epoint, register_t cid) > >> > if ( is_64bit_domain(d) && is_thumb ) > >> > return PSCI_INVALID_ADDRESS; > >> > > >> > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet = */ > >> > - if ( is_hardware_domain(d) ) > >> > + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d= ) ) > >> > return PSCI_NOT_SUPPORTED; > >> > > >> > /* Ensure that all CPUs other than the calling one are offline *= / > >> > @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(regist= er_t epoint, register_t cid) > >> > "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid= =3D%#"PRIregister"\n", > >> > epoint, cid); > >> > > >> > + if ( is_control_domain(d) ) > >> > >> Why is_control_domain() here and not is_hardware_domain() ? > > > > The use of is_control_domain() is intentional. > > > > The intended model is that Xen-wide host suspend is orchestrated by the > > privileged management/control domain. The control domain coordinates th= e > > toolstack side, asks other domains to enter suspend, and then issues th= e final > > SYSTEM_SUSPEND request to Xen. > > > > This does not have to be the same entity as the hardware domain. If the > > hardware domain is separate, it is one of the domains that the control = domain > > parks before the final host suspend step. > > > > The hwdom-specific checks in this patch have a different purpose: they = avoid > > the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardwa= re > > domain to be parked as part of the suspend sequence. They do not define= the > > policy for who is allowed to trigger Xen-wide host suspend. > > > > That said, this policy may not be optimal for all configurations, espec= ially > > when the control and hardware domain roles are split. I would appreciat= e your > > view, as well as the maintainers' views, on whether the trigger should = remain > > control-domain based, be tied to the hardware domain instead, or be exp= ressed > > through a separate host-suspend capability/helper. > > > Hardware domain owns all the hardware. Hardware shall be put to > power-down/suspended state before suspending the SoC, so it can be > resumed afterwards. You can't just pause hardware domain in the same way > as pausing all other domains. > > (Of course, we'll have the same issues with domain that have > passed-through hardware, but in this case Dom0 shall orchestrate proper > suspend sequence for these) Yes, I agree that the hardware domain must not be externally paused as a replacement for its own suspend path. What I meant to describe is a guest-driven suspend sequence. The control domain/toolstack may orchestrate the sequence, but each domain that needs to quiesce hardware, including the hardware domain and any domain with passed-through devices, is expected to enter its own suspend path first and quiesce its devices before issuing the virtual PSCI SYSTEM_SUSPEND call. Xen only treats other domains as ready for host suspend after they have voluntarily reached SHUTDOWN_suspend. In the split control/hardware-domain case, the final host-wide suspend request from the control domain is accepted only after the other domains, including the hardware domain, are already in SHUTDOWN_suspend. So my wording saying that the control domain "parks" the hardware domain was imprecise. The control domain orchestrates the sequence; it does not externally pause the hardware domain as a substitute for its own suspend path. Best regards, Mykola > > [...] > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 08:53:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 08:53:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303308.1576763 (Exim 4.92) (envelope-from ) id 1wLGxE-0005FZ-C3; Fri, 08 May 2026 08:53:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303308.1576763; Fri, 08 May 2026 08:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGxE-0005FS-9F; Fri, 08 May 2026 08:53:04 +0000 Received: by outflank-mailman (input) for mailman id 1303308; Fri, 08 May 2026 08:53:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLGxD-0005FM-Iu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 08:53:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLGxC-004f2F-Vo for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:53:02 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fda46d-e002-0a2a0a5209dd-0a2a4509a580-10 for ; Fri, 08 May 2026 10:53:02 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fda46e-2497-0a2a45090019-d155da30eda8-3 for ; Fri, 08 May 2026 10:53:02 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc56c52a0d1so283622366b.1 for ; Fri, 08 May 2026 01:53:02 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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xen-devel , Boris Ostrovsky Message-ID: <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> In-Reply-To: --------------t3vC8SoGTWdPdMkfSJf5PH1L Content-Type: multipart/mixed; boundary="------------dgfJz710yWfdu8L0Ewpd6czF" --------------dgfJz710yWfdu8L0Ewpd6czF Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMDcuMDUuMjYgMTg6MzEsIErDvHJnZW4gR3Jvw58gd3JvdGU6DQo+IE9uIDA3LjA0LjI2 IDExOjIzLCBLZXZpbiBCcm9kc2t5IHdyb3RlOg0KPj4gT24gMDUvMDQvMjAyNiAxMTo0MSwg TWFyZWsgTWFyY3p5a293c2tpLUfDs3JlY2tpIHdyb3RlOg0KPj4+IE9uIFRodSwgRmViIDI2 LCAyMDI2IGF0IDAyOjQxOjEyUE0gKzAxMDAsIErDvHJnZW4gR3Jvw58gd3JvdGU6DQo+Pj4+ IE9uIDI2LjAyLjI2IDE0OjI3LCBBbmRyZXcgQ29vcGVyIHdyb3RlOg0KPj4+Pj4gT24gMjYv MDIvMjAyNiAxOjE3IHBtLCBNYXJlayBNYXJjenlrb3dza2ktR8OzcmVja2kgd3JvdGU6DQo+ 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wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn9pG0FAwAAAAAACgkQsN6d1ii/Ey9g qQgAk/1AEkTxbbY4W50dkPyk4rO4Znz1egQzLRfGWf8MdwqKG/p312vFx8ejSP+fYLf1o/I4ext/ NHUP4eT9eaxAZZeqrmgassxCGweu+QeT2fPVOdnPco8csi5bPjrscsWxfrjXEGpaVUwz4ud3nFYO Nf3AtCv7puSfPftcS8XWr9EZpNBKXGeeDd5oLXrf5sEblW9XSjo4jKItIdSVVcCDB93lOzLQY/wz fOAvLi6QPJRKpUhmZDpmkOLwU8fE2qVuVygPLXW7QGcZ38VX5IfhF8rU3DDa+f/BB/Mr0GhzxVaW lFJOFBpBRuEdWU7E9/Qf3Wqyi1tODIhvmYzF0efwvQ== =kqXH -----END PGP SIGNATURE----- --------------RdDmWq5l0sPpSc0J9FZxrZu8-- From xen-devel-bounces@lists.xenproject.org Fri May 08 09:08:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:08:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303324.1576771 (Exim 4.92) (envelope-from ) id 1wLHCE-0007Qi-OR; Fri, 08 May 2026 09:08:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303324.1576771; Fri, 08 May 2026 09:08:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHCE-0007Qb-Lo; Fri, 08 May 2026 09:08:34 +0000 Received: by outflank-mailman (input) for mailman id 1303324; Fri, 08 May 2026 09:08:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHCD-0007QV-GS for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:08:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHCA-00DoEb-SK for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:08:32 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fda80b-5cb7-0a2a0a5109dd-0a2a450c8db8-10 for ; Fri, 08 May 2026 11:08:31 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fda80f-62f1-0a2a450c0019-d98c6eacc134-1 for ; Fri, 08 May 2026 11:08:31 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 56CD51AC1; Fri, 8 May 2026 02:08:25 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id F04523F7B4; Fri, 8 May 2026 02:08:25 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778231310; bh=998AzUHkBd2MHjoPernwnRkOgC5TCEI3RLAhgvrlDps=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=WPh3yUoFMFj8+b6NrCFhAXEvHu9aundhUOnMwNWD2QHqLVB/wfS7QiwL+0BDpm4RF NSMUNZAiTkWs+ukXKE7RyPNfyloPQoejZ2iApXnQrGF7MghSNxsyc0kXZ3cJwCG8wd Yjtv0h4b+w7/JhHBBOSnR+TQIO25g+ipSooZj9r0= Message-ID: <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Date: Fri, 8 May 2026 11:08:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: mmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org References: <20260508080514.454607-1-jgross@suse.com> <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778231311-DA577CF5-7D136E2F/0/0 X-purgate-type: clean X-purgate-size: 5656 On 08/05/2026 10:33, Jürgen Groß wrote: > Please disregard this patch. It isn't fixing the real problem. That's what I would expect, see below. > > On 08.05.26 10:05, Juergen Gross wrote: >> The recent rework of mmu lazy mode has resulted in problems when >> running as a Xen PV guest. Enabling lazy mmu mode for the new context >> during context switch is done from the arch_end_context_switch() hook, >> but when calling this hook current hasn't been changed yet, so the >> lazy mmu mode state of the wrong task is modified. Currently xen_end_context_switch() checks if next has lazy MMU mode enabled and if so calls arch_enter_lazy_mmu_mode(), i.e. enter_lazy(XEN_LAZY_MMU). This does *not* modify any task state, rather it writes to the xen_lazy_mode percpu variable. I've thought about this from various angles when reworking lazy MMU, and the conclusion I made is that arch_{start,end}_context_switch() have no reason to change any task state. On arm64, for instance, we do nothing at all on context switching, since everything lazy MMU-related is tracked in task_struct and therefore already switched. Xen is trickier because it tracks lazy MMU/CPU state in a percpu variable, so these hooks do need to do something about it. This is entirely Xen-internal though, and there's no reason to be calling generic functions like lazy_mmu_mode_pause() that modify task state. The idea behind commit 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") is that TIF_LAZY_MMU_UPDATES now duplicates lazy_mmu_state in task_struct and we can therefore replace the former with the latter. More specifically, the assumption is that TIF_LAZY_MMU_UPDATES is set if and only if the task has been scheduled out and __task_lazy_mmu_mode_active(task) is true. Clearly there is something wrong with this assumption, but I still can't put my finger on it. For now I would suggest reverting this commit if that solves the issue Marek reported; the intention was not to introduce any functional change, but only a (minor) optimisation. - Kevin >> >> Additionally it is much cleaner to use lazy_mmu_mode_pause() and >> lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids >> conditionals in those hooks. >> >> In order not having to add another hook to be called after switching >> current, modify lazy_mmu_mode_resume() to use a new sub-function which >> takes a task pointer as parameter. This new sub-function can then be >> used in the xen_end_context_switch() hook. >> >> Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when >> context-switching") >> Signed-off-by: Juergen Gross >> --- >>   arch/x86/xen/enlighten_pv.c |  7 ++----- >>   include/linux/pgtable.h     | 33 ++++++++++++++++++++++++--------- >>   2 files changed, 26 insertions(+), 14 deletions(-) >> >> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c >> index ed2d7a3756ce..67bb6bf6d240 100644 >> --- a/arch/x86/xen/enlighten_pv.c >> +++ b/arch/x86/xen/enlighten_pv.c >> @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct >> task_struct *prev) >>   { >>       BUG_ON(preemptible()); >>   -    if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { >> -        arch_leave_lazy_mmu_mode(); >> -    } >> +    lazy_mmu_mode_pause(); >>       enter_lazy(XEN_LAZY_CPU); >>   } >>   @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct >> task_struct *next) >>         xen_mc_flush(); >>       leave_lazy(XEN_LAZY_CPU); >> -    if (__task_lazy_mmu_mode_active(next)) >> -        arch_enter_lazy_mmu_mode(); >> +    lazy_mmu_mode_resume_task(next); >>   } >>     static unsigned long xen_store_tr(void) >> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >> index cdd68ed3ae1a..83a099bf2038 100644 >> --- a/include/linux/pgtable.h >> +++ b/include/linux/pgtable.h >> @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) >>           arch_leave_lazy_mmu_mode(); >>   } >>   +/** >> + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a >> specific task. >> + * >> + * Like lazy_mmu_mode_resume() below, but with a task specified. >> + * Must be called only by lazy_mmu_mode_resume() or during context >> switch. >> + * Must never be called in interrupt context. >> + * >> + * Must match a call to lazy_mmu_mode_pause(). >> + * >> + * Has no effect if called: >> + * - While paused (inside another pause()/resume() pair) >> + */ >> +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) >> +{ >> +    struct lazy_mmu_state *state = &task->lazy_mmu_state; >> + >> +    VM_WARN_ON_ONCE(state->pause_count == 0); >> + >> +    if (--state->pause_count == 0 && state->enable_count > 0) >> +        arch_enter_lazy_mmu_mode(); >> +} >> + >>   /** >>    * lazy_mmu_mode_resume() - Resume the lazy MMU mode. >>    * >> @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) >>    */ >>   static inline void lazy_mmu_mode_resume(void) >>   { >> -    struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >> - >> -    if (in_interrupt()) >> -        return; >> - >> -    VM_WARN_ON_ONCE(state->pause_count == 0); >> - >> -    if (--state->pause_count == 0 && state->enable_count > 0) >> -        arch_enter_lazy_mmu_mode(); >> +    if (!in_interrupt()) >> +        lazy_mmu_mode_resume_task(current); >>   } >>   #else >>   static inline void lazy_mmu_mode_enable(void) {} > From xen-devel-bounces@lists.xenproject.org Fri May 08 09:09:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:09:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303330.1576781 (Exim 4.92) (envelope-from ) id 1wLHDA-0007sz-1s; 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Enable the option by default to make PVH dom0 more robust in its default configuration. Signed-off-by: Roger Pau Monné --- docs/misc/xen-command-line.pandoc | 2 +- xen/arch/x86/hvm/emulate.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..0cbac1093928 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. * The `pf-fixup` boolean is only applicable when using a PVH dom0 and - defaults to false. + defaults to true. When running dom0 in PVH mode the dom0 kernel has no way to map MMIO regions into its physical memory map, such mode relies on Xen dom0 builder diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..bb1bb03ac4e9 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -165,7 +165,7 @@ void hvmemul_cancel(struct vcpu *v) hvmemul_cache_disable(v); } -bool __ro_after_init opt_dom0_pf_fixup; +bool __ro_after_init opt_dom0_pf_fixup = true; static int hwdom_fixup_p2m(paddr_t addr) { unsigned long gfn = paddr_to_pfn(addr); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 09:24:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:24:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303348.1576789 (Exim 4.92) (envelope-from ) id 1wLHRu-0002Op-7U; Fri, 08 May 2026 09:24:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303348.1576789; Fri, 08 May 2026 09:24:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHRu-0002Oi-4s; Fri, 08 May 2026 09:24:46 +0000 Received: by outflank-mailman (input) for mailman id 1303348; Fri, 08 May 2026 09:24:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHRs-0002Oc-Sh for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:24:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHRs-00Fj5r-6F for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:24:44 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdabcd-bab6-0a2a0a5309dd-0a2a4507b618-40 for ; Fri, 08 May 2026 11:24:44 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdabdb-229c-0a2a45070019-d155802ded17-3 for ; Fri, 08 May 2026 11:24:44 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-4891e86fabeso21621865e9.1 for ; Fri, 08 May 2026 02:24:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260508090911.51941-1-roger.pau@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778232284-23F7EC48-252E3F46/0/0 X-purgate-type: clean X-purgate-size: 894 On 08.05.2026 11:09, Roger Pau Monne wrote: > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. > If using this option is necessary to fix an issue, please report a bug. > > * The `pf-fixup` boolean is only applicable when using a PVH dom0 and > - defaults to false. > + defaults to true. > > When running dom0 in PVH mode the dom0 kernel has no way to map MMIO > regions into its physical memory map, such mode relies on Xen dom0 builder While this paragraph is okay to keep as is, imo the last paragraph concerning this option would want re-wording to reflect the changed default. Plus, as indicated on Matrix, add a hint that people needing to use this option (in its negative form) should report that fact (and relevant details). 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pr=C From: Jiaqing Zhao To: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano Stabellini" CC: Jiaqing Zhao , Subject: [PATCH] ns16550: add support for WCH CH382 serial adapters Date: Fri, 8 May 2026 17:28:13 +0800 Message-ID: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb08.amd.com (10.181.42.217) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL02EPF00029929:EE_|SJ0PR12MB6757:EE_ X-MS-Office365-Filtering-Correlation-Id: c84d6a3e-0779-4277-607e-08deace42e52 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700016|82310400026|13003099007|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: oz+zLRIPFVH5nvdoNTMbXpxLhYvxw1hy+Z1Z08wqCPrGxnMnfTffSgdGpJ0WHykVBep4gVMM6pgSPXtbHJLP1h5nGDddckAjkR3U7DVhS21m1SOmI6sNYc9QAn/zhRoQ4v7XP7AYjuycojAapX6ZC3qdiXued3cHCdUKiphCP7q5NH8oiSHqjQqDnNWK/RHY9DNliapu0Nk9aB5I8YH9y5+nIVHukVJPHp7ENCUp2o6DmSuvt4Ik9KJYWunm9qTJ+rt5ClgQDeGz6n0FInTB4hPaxUktMG1uMO0HVQjhvgLhhmi5a9bwqF5E3BY3vAjzfjAIX0jjUdx43lcvAjbG8W9m+evNzz6rZX3tGPwau3aXAEqTvW/98zqjJJ+3oqx6/eS5TIFftpa2xKera8qC7OgjKGu8vLNeEJeBdJ/KDXFxfxSEBgz0QdjLniX4rncRn3MNC6Exgx6x7lXQo0ho2nr3zVdRxYWHm1hAi1qxZHAYcrrgNyCyN+rNAWH+jiSAXAupYKecAQ6hghFNrHqASqFBAFyHg+ocgFqdBmVdUVrKL070hCIh2qFEORPinDCvBCMX2LOn7wHozeKdxWcyQZ4vc1h8TpvhQpdHyFCAf7bhsSBGzxwWjBTK3rsxQm4/I4MxsAwzAjGRX4NDtS62e2+Twq0aRzCRhEPrUfMWPmZ0LAQiIR3DW5iCmc7rlzPK X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700016)(82310400026)(13003099007)(18002099003)(56012099003);DIR:OUT;SFP:1101; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao --- xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..106ef56316 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCH, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCH, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, }; static int __init diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h index 5884a20b8f..b8316d464c 100644 --- a/xen/include/xen/pci_ids.h +++ b/xen/include/xen/pci_ids.h @@ -13,6 +13,8 @@ #define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_VENDOR_ID_WCH 0x1c00 + #define PCI_VENDOR_ID_INTEL 0x8086 #endif /* XEN_PCI_IDS_H */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 09:30:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:30:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303368.1576809 (Exim 4.92) (envelope-from ) id 1wLHXL-0004fb-4w; Fri, 08 May 2026 09:30:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303368.1576809; Fri, 08 May 2026 09:30:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHXL-0004fU-19; Fri, 08 May 2026 09:30:23 +0000 Received: by outflank-mailman (input) for mailman id 1303368; Fri, 08 May 2026 09:30:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLHXJ-0004fM-GG for xen-devel@lists.xenproject.org; Fri, 08 May 2026 09:30:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLHXI-00FGeQ-Ia for xen-devel@lists.xenproject.org; Fri, 08 May 2026 11:30:20 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdad28-bab6-0a2a0a5309dd-0a2a450ae118-24 for ; Fri, 08 May 2026 11:30:20 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdad2b-56b3-0a2a450a0019-d98c6eacea1a-1 for ; Fri, 08 May 2026 11:30:19 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9BF1E1BCA; Fri, 8 May 2026 02:30:13 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 74F673F7B4; Fri, 8 May 2026 02:30:14 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:From:To:Cc:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778232618; bh=s8DdICLhnj/DfQCudkc982W5x6Y5k2ODjetxBBj7jzQ=; h=Date:Subject:From:To:Cc:References:In-Reply-To:From; b=pGosNmLKXsFDpqHZ2v4awPO7R4BJLnRLDFG6QTRmbEy3znEuuSjWSCNr806Eg77XW R4Pa91NJ76pjBXYmMgu74Gf4TW14vrW4noSoTnyMABnH9Ok6XcDP2lWnraI7HJAZZR 0y//lSeZUixyJS7TWw3LdVRkiS9PDk3gQcxwKXMg= Message-ID: Date: Fri, 8 May 2026 11:30:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Fix lazy mmu handling across context switch From: Kevin Brodsky To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , linux-kernel@vger.kernel.org, x86@kernel.org, linux-mm@kvack.org Cc: Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , xen-devel@lists.xenproject.org, =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= References: <20260508080514.454607-1-jgross@suse.com> <5cb54bd1-5981-4a46-9083-f7b527ca342f@suse.com> <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Content-Language: en-GB In-Reply-To: <775a5fd2-394d-4409-81d3-4dc6ef8209f0@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778232620-7E38D8B7-8099C4C2/0/0 X-purgate-type: clean X-purgate-size: 5884 + Marek (the wrong address was in Cc) On 08/05/2026 11:08, Kevin Brodsky wrote: > On 08/05/2026 10:33, Jürgen Groß wrote: >> Please disregard this patch. It isn't fixing the real problem. > That's what I would expect, see below. > >> On 08.05.26 10:05, Juergen Gross wrote: >>> The recent rework of mmu lazy mode has resulted in problems when >>> running as a Xen PV guest. Enabling lazy mmu mode for the new context >>> during context switch is done from the arch_end_context_switch() hook, >>> but when calling this hook current hasn't been changed yet, so the >>> lazy mmu mode state of the wrong task is modified. > Currently xen_end_context_switch() checks if next has lazy MMU mode > enabled and if so calls arch_enter_lazy_mmu_mode(), i.e. > enter_lazy(XEN_LAZY_MMU). This does *not* modify any task state, rather > it writes to the xen_lazy_mode percpu variable. > > I've thought about this from various angles when reworking lazy MMU, and > the conclusion I made is that arch_{start,end}_context_switch() have no > reason to change any task state. On arm64, for instance, we do nothing > at all on context switching, since everything lazy MMU-related is > tracked in task_struct and therefore already switched. > > Xen is trickier because it tracks lazy MMU/CPU state in a percpu > variable, so these hooks do need to do something about it. This is > entirely Xen-internal though, and there's no reason to be calling > generic functions like lazy_mmu_mode_pause() that modify task state. > > The idea behind commit 291b3abed657 ("x86/xen: use lazy_mmu_state when > context-switching") is that TIF_LAZY_MMU_UPDATES now duplicates > lazy_mmu_state in task_struct and we can therefore replace the former > with the latter. More specifically, the assumption is that > TIF_LAZY_MMU_UPDATES is set if and only if the task has been scheduled > out and __task_lazy_mmu_mode_active(task) is true. > > Clearly there is something wrong with this assumption, but I still can't > put my finger on it. For now I would suggest reverting this commit if > that solves the issue Marek reported; the intention was not to introduce > any functional change, but only a (minor) optimisation. > > - Kevin > >>> Additionally it is much cleaner to use lazy_mmu_mode_pause() and >>> lazy_mmu_mode_resume() in the Xen context switch hooks, as it avoids >>> conditionals in those hooks. >>> >>> In order not having to add another hook to be called after switching >>> current, modify lazy_mmu_mode_resume() to use a new sub-function which >>> takes a task pointer as parameter. This new sub-function can then be >>> used in the xen_end_context_switch() hook. >>> >>> Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when >>> context-switching") >>> Signed-off-by: Juergen Gross >>> --- >>>   arch/x86/xen/enlighten_pv.c |  7 ++----- >>>   include/linux/pgtable.h     | 33 ++++++++++++++++++++++++--------- >>>   2 files changed, 26 insertions(+), 14 deletions(-) >>> >>> diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c >>> index ed2d7a3756ce..67bb6bf6d240 100644 >>> --- a/arch/x86/xen/enlighten_pv.c >>> +++ b/arch/x86/xen/enlighten_pv.c >>> @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct >>> task_struct *prev) >>>   { >>>       BUG_ON(preemptible()); >>>   -    if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { >>> -        arch_leave_lazy_mmu_mode(); >>> -    } >>> +    lazy_mmu_mode_pause(); >>>       enter_lazy(XEN_LAZY_CPU); >>>   } >>>   @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct >>> task_struct *next) >>>         xen_mc_flush(); >>>       leave_lazy(XEN_LAZY_CPU); >>> -    if (__task_lazy_mmu_mode_active(next)) >>> -        arch_enter_lazy_mmu_mode(); >>> +    lazy_mmu_mode_resume_task(next); >>>   } >>>     static unsigned long xen_store_tr(void) >>> diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h >>> index cdd68ed3ae1a..83a099bf2038 100644 >>> --- a/include/linux/pgtable.h >>> +++ b/include/linux/pgtable.h >>> @@ -326,6 +326,28 @@ static inline void lazy_mmu_mode_pause(void) >>>           arch_leave_lazy_mmu_mode(); >>>   } >>>   +/** >>> + * lazy_mmu_mode_resume_task() - Resume the lazy MMU mode for a >>> specific task. >>> + * >>> + * Like lazy_mmu_mode_resume() below, but with a task specified. >>> + * Must be called only by lazy_mmu_mode_resume() or during context >>> switch. >>> + * Must never be called in interrupt context. >>> + * >>> + * Must match a call to lazy_mmu_mode_pause(). >>> + * >>> + * Has no effect if called: >>> + * - While paused (inside another pause()/resume() pair) >>> + */ >>> +static inline void lazy_mmu_mode_resume_task(struct task_struct *task) >>> +{ >>> +    struct lazy_mmu_state *state = &task->lazy_mmu_state; >>> + >>> +    VM_WARN_ON_ONCE(state->pause_count == 0); >>> + >>> +    if (--state->pause_count == 0 && state->enable_count > 0) >>> +        arch_enter_lazy_mmu_mode(); >>> +} >>> + >>>   /** >>>    * lazy_mmu_mode_resume() - Resume the lazy MMU mode. >>>    * >>> @@ -341,15 +363,8 @@ static inline void lazy_mmu_mode_pause(void) >>>    */ >>>   static inline void lazy_mmu_mode_resume(void) >>>   { >>> -    struct lazy_mmu_state *state = ¤t->lazy_mmu_state; >>> - >>> -    if (in_interrupt()) >>> -        return; >>> - >>> -    VM_WARN_ON_ONCE(state->pause_count == 0); >>> - >>> -    if (--state->pause_count == 0 && state->enable_count > 0) >>> -        arch_enter_lazy_mmu_mode(); >>> +    if (!in_interrupt()) >>> +        lazy_mmu_mode_resume_task(current); >>>   } >>>   #else >>>   static inline void lazy_mmu_mode_enable(void) {} From xen-devel-bounces@lists.xenproject.org Fri May 08 09:54:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 09:54:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303391.1576817 (Exim 4.92) (envelope-from ) id 1wLHua-0007rf-VP; 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Fri, 08 May 2026 11:54:22 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdb2ce-62f1-0a2a450c0019-d98c6eacc006-1 for ; Fri, 08 May 2026 11:54:22 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 53F741BCA; Fri, 8 May 2026 02:54:16 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 6A97A3F836; Fri, 8 May 2026 02:54:20 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778234061; bh=UKXz8qe6CYYl8KXHQkBSeLcEXveBk25zWF0FLtT+yKE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=Ut8+a+EPP3X/dGPsnJmH2XWvwOLX3QKyFPxb/dXyfTZ15exwUseKgJi4fk74OstOH MTTVJGJv2XIha/tcFrEOG6KBdbcohMz6tRbsgYxppTIqOXj65xlm7yD4toUkI5IznK dFuDW1ZHsf/TF0D6F/GH2OqG/w7Bu4yxSVWkVolQ= Message-ID: <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> Date: Fri, 8 May 2026 11:54:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 To: Juergen Gross , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778234062-E0D63CF5-133CD4DB/0/0 X-purgate-type: clean X-purgate-size: 2334 On 08/05/2026 10:53, Juergen Gross wrote: > [...] > > But now I think I have found the real culprit in lazy_mmu_mode_enable(): > > static inline void lazy_mmu_mode_enable(void) > { >         struct lazy_mmu_state *state = ¤t->lazy_mmu_state; > >         if (in_interrupt() || state->pause_count > 0) >                 return; > >         VM_WARN_ON_ONCE(state->enable_count == U8_MAX); > >         if (state->enable_count++ == 0) >                 arch_enter_lazy_mmu_mode(); > } > > Consider a preemption just before calling arch_enter_lazy_mmu_mode(). The > enable_count will be 1 now, but there was no switch to lazy mode yet. > > When the task becomes active again, context switch handling will see lazy > mode enabled (enable_count > 0), so it will call > arch_enter_lazy_mmu_mode(). > And then the task resumes and is calling arch_enter_lazy_mmu_mode() > another > time. Agreed, this must be the problem. I did wonder whether the lack of atomicity would cause trouble... arm64 isn't impacted because it tracks related state in task_struct only. powerpc and sparc do use percpu variables but that shouldn't matter as they disable preemption in the entire lazy MMU section. > > The only chance I'm seeing to avoid that would be to disable preemption > around all instances of testing a condition and then enabling or > disabling > lazy mmu mode. I don't immediately see why we would need such a big hammer. If we revert commit 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching"), then arch_{start,end}_context_switch() should once again do the right thing for Xen since the TIF_LAZY_MMU_UPDATES flag is separate from lazy_mmu_state. I think it looks like this: lazy_mmu_mode_enable()     state->enable_count++             arch_start_context_switch()              xen_lazy_mode == XEN_LAZY_NONE -> do nothing                          arch_end_context_switch()              TIF_LAZY_MMU_UPDATES not set -> do nothing             enter_lazy(XEN_LAZY_MMU) Nothing else should be checking lazy MMU state during the context switch. Does that make sense? - Kevin From xen-devel-bounces@lists.xenproject.org Fri May 08 10:09:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:09:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303408.1576826 (Exim 4.92) (envelope-from ) id 1wLI9Y-0001bM-7V; Fri, 08 May 2026 10:09:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303408.1576826; Fri, 08 May 2026 10:09:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLI9Y-0001bF-4C; Fri, 08 May 2026 10:09:52 +0000 Received: by outflank-mailman (input) for mailman id 1303408; Fri, 08 May 2026 10:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLI9W-0001as-BF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 10:09:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLI9V-00Frqh-HL for xen-devel@lists.xenproject.org; Fri, 08 May 2026 12:09:49 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdb66b-bab6-0a2a0a5309dd-0a2a4507a360-14 for ; Fri, 08 May 2026 12:09:49 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdb66d-229c-0a2a45070019-d155802ee0ee-3 for ; Fri, 08 May 2026 12:09:49 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so28688905e9.2 for ; Fri, 08 May 2026 03:09:49 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------NxeXpDUtU1CVH5wQvtQoY0qb" X-purgate-ID: tlsNG-ef75cf/1778234989-0A772C48-0C341B5A/0/0 X-purgate-type: clean X-purgate-size: 10243 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------NxeXpDUtU1CVH5wQvtQoY0qb Content-Type: multipart/mixed; boundary="------------344B6733Ezlm0YXXLj6S7075"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Kevin Brodsky , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky Message-ID: Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> In-Reply-To: <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> --------------344B6733Ezlm0YXXLj6S7075 Content-Type: multipart/mixed; boundary="------------9gc1VbDJpspadR0eY8H0pg21" --------------9gc1VbDJpspadR0eY8H0pg21 Content-Type: text/plain; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmn9tmsFAwAAAAAACgkQsN6d1ii/Ey/P qgf9H8zBdSqCtTtRHMDzl02ActywwJ78jYULAg7+WwI7uGTjUqeVe4f9mlZcj5+z7F9bbP3tRjKu lf5Zp9LLtWdgAQw961hDhJdgg7hOzYxqIFDuMaH4Bb5i0tMFBbW11AGKTBy6elvrFT+BWVLwALuj akr7Em8rmM7KGBLsQtUywRaVyaWSQ6AbGW/6BJRs0v40xUAtFIsAyiadIJwKld0DtiP+5nrMJPrn zVWaBcvKK2dHhRPc4jFIRWlHZSc9x+f8JFHP2V1bRzVJP/5LhVwLg5uP4wv2KLoTJd4eWZ9tambs 6nsCkSPiEi8KDg/6oneUPpRlXzpKFkrtfiOgDT4nQg== =8Epf -----END PGP SIGNATURE----- --------------NxeXpDUtU1CVH5wQvtQoY0qb-- From xen-devel-bounces@lists.xenproject.org Fri May 08 10:28:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:28:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303428.1576835 (Exim 4.92) (envelope-from ) id 1wLIRb-0004hl-Oi; Fri, 08 May 2026 10:28:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303428.1576835; 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>>> >>>          if (in_interrupt() || state->pause_count > 0) >>>                  return; >>> >>>          VM_WARN_ON_ONCE(state->enable_count == U8_MAX); >>> >>>          if (state->enable_count++ == 0) >>>                  arch_enter_lazy_mmu_mode(); >>> } >>> >>> Consider a preemption just before calling >>> arch_enter_lazy_mmu_mode(). The >>> enable_count will be 1 now, but there was no switch to lazy mode yet. >>> >>> When the task becomes active again, context switch handling will see >>> lazy >>> mode enabled (enable_count > 0), so it will call >>> arch_enter_lazy_mmu_mode(). >>> And then the task resumes and is calling arch_enter_lazy_mmu_mode() >>> another >>> time. >> >> Agreed, this must be the problem. I did wonder whether the lack of >> atomicity would cause trouble... >> >> arm64 isn't impacted because it tracks related state in task_struct >> only. powerpc and sparc do use percpu variables but that shouldn't >> matter as they disable preemption in the entire lazy MMU section. >> >>> >>> The only chance I'm seeing to avoid that would be to disable preemption >>> around all instances of testing a condition and then enabling or >>> disabling >>> lazy mmu mode. >> >> I don't immediately see why we would need such a big hammer. If we >> revert commit 291b3abed657 ("x86/xen: use lazy_mmu_state when >> context-switching"), then arch_{start,end}_context_switch() should once >> again do the right thing for Xen since the TIF_LAZY_MMU_UPDATES flag is >> separate from lazy_mmu_state. I think it looks like this: >> >> lazy_mmu_mode_enable() >>      state->enable_count++ >>      >>          arch_start_context_switch() >>              xen_lazy_mode == XEN_LAZY_NONE -> do nothing >>                   >> >>          arch_end_context_switch() >>              TIF_LAZY_MMU_UPDATES not set -> do nothing >> >>          >>      enter_lazy(XEN_LAZY_MMU) >> >> Nothing else should be checking lazy MMU state during the context >> switch. >> >> Does that make sense? > > This would work, yes. > > OTOH I don't like the multiple conditions used for testing > (state->enable_count, > TIF_LAZY_MMU_UPDATES, xen_lazy_mode). > > Another variant would be to just let the Xen specific code tolerate > the double > calls by disabling preemption in the Xen code and checking via > __task_lazy_mmu_mode_active() if anything needs to be done. > > I'd really like to get rid of xen_lazy_mode completely. Without wishing to interrupt the flow too much. In XenServer, work on migration performance[1] has demonstrated that a very large number of multicalls issued by Linux are single-op multicalls. (I blindly assert) these must be coming from the lazy_mode logic, and they're even less efficient than making the hypercall normally, owing to the need to marshal it through the multicall ABI. There's a possibility that you can simply delete lazy mode and stuff gets faster.  (Although it's far more likely that the difference is in the noise). ~Andrew [1] The dominating perf problem for migration is ptwr emulation and Linux not using a hypercall, which IIRC accounts for 40% of wallclock time during live migration. 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Fri, 08 May 2026 03:38:35 -0700 (PDT) MIME-Version: 1.0 References: <87tssisw41.fsf@epam.com> In-Reply-To: <87tssisw41.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 13:38:24 +0300 X-Gm-Features: AVHnY4JlozUSNvhy8wXCtlMYC7rK6agBwsWomgaChMHdZYvMJ539aO9EpDsPkJw Message-ID: Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Volodymyr Babchuk Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1778236716-B6F72DB1-924C254B/0/0 X-purgate-type: clean X-purgate-size: 8864 Hi Volodymyr, Thanks for taking a look at this. On Fri, May 8, 2026 at 1:17=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mikola, > > Mykola Kvach writes: > > > From: Mirela Simonovic > > > > The context of CPU general purpose and system control registers must be > > saved on suspend and restored on resume. This is implemented in > > prepare_resume_ctx and before the return from the hyp_resume function. > > The prepare_resume_ctx must be invoked just before the PSCI system susp= end > > call is issued to the ATF. The prepare_resume_ctx must return a non-zer= o > > value so that the calling 'if' statement evaluates to true, causing the > > system suspend to be invoked. Upon resume, the context saved on suspend > > will be restored, including the link register. Therefore, after > > restoring the context, the control flow will return to the address > > pointed to by the saved link register, which is the place from which > > prepare_resume_ctx was called. To ensure that the calling 'if' statemen= t > > does not again evaluate to true and initiate system suspend, hyp_resume > > must return a zero value after restoring the context. > > > > Note that the order of saving register context into cpu_context structu= re > > must match the order of restoring. > > > > Support for ARM32 is not implemented. Instead, compilation fails with a > > build-time error if suspend is enabled for ARM32. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v8: > > - fix alignments in code > > > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/Makefile | 1 + > > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > > xen/arch/arm/suspend.c | 14 +++++ > > 4 files changed, 130 insertions(+), 1 deletion(-) > > create mode 100644 xen/arch/arm/suspend.c > > > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > > index 69200b2728..c36158271a 100644 > > --- a/xen/arch/arm/Makefile > > +++ b/xen/arch/arm/Makefile > > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > > obj-y +=3D shutdown.o > > obj-y +=3D smp.o > > obj-y +=3D smpboot.o > > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > > obj-y +=3D time.o > > obj-y +=3D traps.o > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 596e960152..2cb02ee314 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -562,6 +562,52 @@ END(efi_xen_start) > > #endif /* CONFIG_ARM_EFI */ > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > +/* > > + * int prepare_resume_ctx(struct cpu_context *ptr) > > "cpu_context" is very generic name, especially taking into account that > you are introducing a global variable with the same name. How about > "resume_cpu_context"? Ack. > > > + * > > + * x0 - pointer to the storage where callee's context will be saved > > + * > > + * CPU context saved here will be restored on resume in hyp_resume fun= ction. > > + * prepare_resume_ctx shall return a non-zero value. Upon restoring co= ntext > > + * hyp_resume shall return value zero instead. From C code that invoke= s > > + * prepare_resume_ctx, the return value is interpreted to determine wh= ether > > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > > + */ > > +FUNC(prepare_resume_ctx) > > + /* Store callee-saved registers */ > > How are planning to synchronise this code with actual cpu_context? > > I am pretty sure it is better to use offsets generated by asm-offset.c Ack. > > > + stp x19, x20, [x0], #16 > > + stp x21, x22, [x0], #16 > > + stp x23, x24, [x0], #16 > > + stp x25, x26, [x0], #16 > > + stp x27, x28, [x0], #16 > > + stp x29, lr, [x0], #16 > > + > > + /* Store stack-pointer */ > > + mov x2, sp > > + str x2, [x0], #8 > > + > > + /* Store system control registers */ > > + mrs x2, VBAR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTTBR_EL2 > > + str x2, [x0], #8 > > + mrs x2, TPIDR_EL2 > > + str x2, [x0], #8 > > + mrs x2, MDCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HSTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, CPTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HCR_EL2 > > + str x2, [x0], #8 > > + > > + /* prepare_resume_ctx must return a non-zero value */ > > + mov x0, #1 > > + ret > > +END(prepare_resume_ctx) > > > > FUNC(hyp_resume) > > /* Initialize the UART if earlyprintk has been enabled. */ > > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > > b enable_secondary_cpu_mm > > > > mmu_resumed: > > - b . > > + /* Now we can access the cpu_context, so restore the context h= ere */ > > + ldr x0, =3Dcpu_context > > + > > + /* Restore callee-saved registers */ > > + ldp x19, x20, [x0], #16 > > + ldp x21, x22, [x0], #16 > > + ldp x23, x24, [x0], #16 > > + ldp x25, x26, [x0], #16 > > + ldp x27, x28, [x0], #16 > > + ldp x29, lr, [x0], #16 > > + > > + /* Restore stack pointer */ > > + ldr x2, [x0], #8 > > + mov sp, x2 > > + > > + /* Restore system control registers */ > > + ldr x2, [x0], #8 > > + msr VBAR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTTBR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr TPIDR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr MDCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HSTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr CPTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HCR_EL2, x2 > > + isb > > + > > + /* > > + * Since context is restored return from this function will ap= pear > > + * as return from prepare_resume_ctx. To distinguish a return = from > > + * prepare_resume_ctx which is called upon finalizing the susp= end, > > + * as opposed to return from this function which executes on r= esume, > > + * we need to return zero value here. > > + */ > > + mov x0, #0 > > + ret > > END(hyp_resume) > > > > #endif /* CONFIG_SYSTEM_SUSPEND */ > > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/= asm/suspend.h > > index 31a98a1f1b..c127fa3d78 100644 > > --- a/xen/arch/arm/include/asm/suspend.h > > +++ b/xen/arch/arm/include/asm/suspend.h > > @@ -3,6 +3,8 @@ > > #ifndef ARM_SUSPEND_H > > #define ARM_SUSPEND_H > > > > +#include > > + > > struct domain; > > struct vcpu; > > struct vcpu_guest_context; > > @@ -14,6 +16,30 @@ struct resume_info { > > > > void arch_domain_resume(struct domain *d); > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +#ifdef CONFIG_ARM_64 > > +struct cpu_context { > > + register_t callee_regs[12]; > > + register_t sp; > > + register_t vbar_el2; > > + register_t vtcr_el2; > > + register_t vttbr_el2; > > + register_t tpidr_el2; > > + register_t mdcr_el2; > > + register_t hstr_el2; > > + register_t cptr_el2; > > + register_t hcr_el2; > > +} __aligned(16); > > +#else > > +#error "Define cpu_context structure for arm32" > > +#endif > > + > > +extern struct cpu_context cpu_context; > > + > > +int prepare_resume_ctx(struct cpu_context *ptr); > > +void hyp_resume(void); > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > #endif /* ARM_SUSPEND_H */ > > > > /* > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > new file mode 100644 > > index 0000000000..e38566b0b7 > > --- /dev/null > > +++ b/xen/arch/arm/suspend.c > > @@ -0,0 +1,14 @@ > > +/* SPDX-License-Identifier: GPL-2.0-only */ > > + > > +#include > > + > > +struct cpu_context cpu_context =3D {}; > > Don't need to zero-initialize a global variable. Ack. Best regards, Mykola > > > + > > +/* > > + * Local variables: > > + * mode: C > > + * c-file-style: "BSD" > > + * c-basic-offset: 4 > > + * indent-tabs-mode: nil > > + * End: > > + */ > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 10:57:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 10:57:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303471.1576853 (Exim 4.92) (envelope-from ) id 1wLItj-0001C4-6I; Fri, 08 May 2026 10:57:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303471.1576853; Fri, 08 May 2026 10:57:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLItj-0001Bx-3E; Fri, 08 May 2026 10:57:35 +0000 Received: by outflank-mailman (input) for mailman id 1303471; Fri, 08 May 2026 10:57:34 +0000 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May 2026 13:34:38 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdca4d-c1f2-0a2a45010019-d98c6eacba5e-1 for ; Fri, 08 May 2026 13:34:38 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D79FB1BCA; Fri, 8 May 2026 04:34:31 -0700 (PDT) Received: from [10.57.35.71] (unknown [10.57.35.71]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 03E453F836; Fri, 8 May 2026 04:34:35 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778240077; bh=jpZIElX28Dxn2BuY+beEs3GW5syLtcYHN+XpcMGjiFY=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=qWY/h57NvsKI49wz5DLKCCIr5xt/2ZZ45prTKDk+k2p1b/f0g3KzD2HptIGsv57/7 Cn8Q+/nIpPWjY6vPElWyfJxqykz/kSw45oYJP1XQ+5x5kNRCq3/CshZUowk9OAEXpt jz9cOa/8qtz+tVpsMrRjfOVZKv2x0bUlnB7OZt4Y= Message-ID: <265c0534-b480-4ab8-8f8a-2b5b8e7ca591@arm.com> Date: Fri, 8 May 2026 13:34:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: kernel BUG around vmap/vfree - xen_enter_lazy_mmu()/xen_leave_lazy_mmu() - Linux 7.0-rc1 To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= Cc: Andrew Cooper , xen-devel , Boris Ostrovsky References: <5d068304-837d-4aef-b8a7-87c91ccf96b4@arm.com> <15645d19-f19d-4955-8315-0188aa834eb6@suse.com> <7f123733-2ec2-436e-bb0c-67b3e9f80735@arm.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778240078-AF555FF4-16C3EFE4/0/0 X-purgate-type: clean X-purgate-size: 1025 On 08/05/2026 12:09, Jürgen Groß wrote: > > OTOH I don't like the multiple conditions used for testing > (state->enable_count, > TIF_LAZY_MMU_UPDATES, xen_lazy_mode). > > Another variant would be to just let the Xen specific code tolerate > the double > calls by disabling preemption in the Xen code and checking via > __task_lazy_mmu_mode_active() if anything needs to be done. > > I'd really like to get rid of xen_lazy_mode completely. That certainly crossed my mind, but I didn't feel qualified to perform that kind of surgery, especially considering XEN_LAZY_CPU. There is presumably a good reason to track this one via a percpu variable, but for the MMU side it feels like this creates more problems than it solves. Maybe it is possible to keep XEN_LAZY_CPU untouched while removing XEN_LAZY_MMU and using is_lazy_mmu_mode_active() instead? If we do that, I don't think preemption is a concern - the lazy MMU mode is only relevant for current and cannot be used in interrupt context. - Kevin From xen-devel-bounces@lists.xenproject.org Fri May 08 12:22:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 12:22:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303561.1576884 (Exim 4.92) (envelope-from ) id 1wLKDh-0005vu-N9; Fri, 08 May 2026 12:22:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303561.1576884; Fri, 08 May 2026 12:22:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLKDh-0005vn-KF; Fri, 08 May 2026 12:22:17 +0000 Received: by outflank-mailman (input) for mailman id 1303561; Fri, 08 May 2026 12:22:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLKDg-0005uv-2S for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vPx0C38LbWoxxzsXJgZ+93nPzCnrrfcnJjxdTeIhFKFSai1EUEM0p/M0cEgR/ZyS6p6eo8ZMtGeTAHfXTXELYqZ8+I+slI9ZYZ3fo8s3f2jiyHB0FsPy5Xpo4wadwVIk9udOy2LLie66eAvtDXgkkTmifjjnDCvKXGDQOMImST1R6kphqplz6NvNES2z3NoEVQuEFTd/MMiXJyM4GJmhszUXWy+z78kENbsPmubOEIidTIwD5ojwai3igjKhndzx/jNCMwyyc1gOudb9aCleosSIQTDAAlMOZEnh5y6mZDNvXGgWhtQujYBXnSJpKFQxaAtHMbL/mlYdYTESVd9QqD65YWMgw8Gdu2v9RCss3JhCEuyrDCi0+sS9J6BxK0i033G5hjajdzcJG2ZwAEBrgsjMdKfReGlMjtHh+hAR1txDtKT5doZQ7Jay/ylwpoSV X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 May 2026 13:28:00.4865 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c04522f5-c09f-4eb6-3159-08dead05a01b X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF00000091.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB7857 X-purgate-ID: tlsNG-16d1c6/1778246886-87D7AD75-602AFC03/0/0 X-purgate-type: clean X-purgate-size: 1872 Hi Mykola, >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>>=20 >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S >>> index 72c7b24498..596e960152 100644 >>> --- a/xen/arch/arm/arm64/head.S >>> +++ b/xen/arch/arm/arm64/head.S >>> @@ -561,6 +561,30 @@ END(efi_xen_start) >>>=20 >>> #endif /* CONFIG_ARM_EFI */ >>>=20 >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + >>> +FUNC(hyp_resume) >>=20 >> I think we should mask all exceptions here: >> msr DAIFSet, 0xf >>=20 >> until we resume correctly the status (VBAR_EL2, etc). >=20 > This was discussed in an earlier version: >=20 > https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef15= cb605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com/#= CAGeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com >=20 > For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In > particular, section 5.20.2 says that the caller must observe all the rule= s > described for CPU_SUSPEND, and section 6.4 explicitly says that the initi= al > state rules also apply to SYSTEM_SUSPEND. >=20 > For the return Exception level on AArch64, section 6.4.3.3 requires > SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to en= ter > this resume path with DAIF already masked by PSCI-compliant firmware. >=20 > I agree this assumption is not obvious from the code, so I will add a com= ment > at the resume entry point to document that this path relies on the PSCI i= nitial > core configuration requirements. Yes please, something along the line of /* * PSCI SYSTEM_SUSPEND follows CPU_SUSPEND initial-state rules. * On AArch64, firmware must return with SPSR_ELx.DAIF set, so * PSTATE.DAIF is already masked on entry here. */ Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 08 13:31:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 13:31:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303639.1576912 (Exim 4.92) (envelope-from ) id 1wLLIu-00080H-1q; Fri, 08 May 2026 13:31:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303639.1576912; Fri, 08 May 2026 13:31:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLLIt-00080A-V3; Fri, 08 May 2026 13:31:43 +0000 Received: by outflank-mailman (input) for mailman id 1303639; Fri, 08 May 2026 13:31:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLLIs-000804-BP for xen-devel@lists.xenproject.org; Fri, 08 May 2026 13:31:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLLIr-00GPEE-Ok for xen-devel@lists.xenproject.org; Fri, 08 May 2026 15:31:41 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fde5af-2eae-0a2a0a5409dd-0a2a45049a14-40 for ; Fri, 08 May 2026 15:31:41 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fde5bd-1dec-0a2a45040019-d155802ab012-3 for ; Fri, 08 May 2026 15:31:41 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48d102471a4so20242535e9.2 for ; Fri, 08 May 2026 06:31:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 08 May 2026 06:31:41 -0700 (PDT) Message-ID: <20642e09-5dce-4979-b126-b24a78db698e@suse.com> Date: Fri, 8 May 2026 15:31:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: [PATCH] time: drop dead code from gmtime() Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778247101-28F753FF-0CC86827/0/0 X-purgate-type: clean X-purgate-size: 1298 "days", as calculated, can't be negative. Drop the respective loop and change its type. Similarly "rem" can't be negative and doesn't require more than 32 bits. Change its type, too. As a consequence, the tm_wday calculation also can't yield negative values, so the respective conditional can be dropped as well. Signed-off-by: Jan Beulich --- unstable.orig/xen/common/time.c 2025-07-22 16:21:18.000000000 +0200 +++ unstable/xen/common/time.c 2026-05-07 12:22:11.687769995 +0200 @@ -45,7 +45,8 @@ static DEFINE_SPINLOCK(wc_lock); struct tm gmtime(unsigned long t) { struct tm tbuf; - long days, rem; + unsigned long days; + unsigned int rem; int y; const unsigned short int *ip; @@ -70,18 +71,11 @@ struct tm gmtime(unsigned long t) tbuf.tm_sec = rem % 60; /* January 1, 1970 was a Thursday. */ tbuf.tm_wday = (4 + days) % 7; - if ( tbuf.tm_wday < 0 ) - tbuf.tm_wday += 7; while ( days >= (rem = __isleap(y) ? 366 : 365) ) { ++y; days -= rem; } - while ( days < 0 ) - { - --y; - days += __isleap(y) ? 366 : 365; - } tbuf.tm_year = y - 1900; tbuf.tm_yday = days; /* SAF-14-safe use boolean as an array index */ From xen-devel-bounces@lists.xenproject.org Fri May 08 13:36:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 13:36:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303649.1576921 (Exim 4.92) (envelope-from ) id 1wLLNT-000074-IW; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20642e09-5dce-4979-b126-b24a78db698e@suse.com> Content-Type: text/plain; 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Drop the respective loop and > change its type. Similarly "rem" can't be negative and doesn't require > more than 32 bits. Change its type, too. > > As a consequence, the tm_wday calculation also can't yield negative > values, so the respective conditional can be dropped as well. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper But, I really would prefer to rip this out entirely. This is used by exactly 2 things.  One is a console timestamp mode that isn't synchronised with dom0 updates to the RTC so of dubious utility in reality, and the other is for an intermediate representation of some of the emulation logic ported from QEMU, which I think we can remove entirely by swapping to s_time_t instead. This will fix a whole raft of MISRA violations about use of unsafe library functions.  We're safe because we are not C-compatible (return by value not by pointer), but a better option would be to remove it entirely. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 08 14:31:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:31:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303675.1576930 (Exim 4.92) (envelope-from ) id 1wLMEi-000062-DN; Fri, 08 May 2026 14:31:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303675.1576930; Fri, 08 May 2026 14:31:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMEi-00005v-AM; Fri, 08 May 2026 14:31:28 +0000 Received: by outflank-mailman (input) for mailman id 1303675; Fri, 08 May 2026 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IGV4cG9zZQ0KPiBvciBhdHRlbXB0IGhvc3Qgc3VzcGVuZC4NCj4gDQo+IEkgdGhpbmsgd2Ugc2hv dWxkIGhhbmRsZSB0aGlzIGJ5IHRyYWNraW5nIHdoZXRoZXIgYW55IG9sZCBBUk0gU01NVXYxL3Yy IGRldmljZQ0KPiB3YXMgYWN0dWFsbHkgcHJvYmVkLCBvciBieSBhZGRpbmcgYSBnZW5lcmljIElP TU1VIHN1c3BlbmQgY2FwYWJpbGl0eSBjaGVjay4gVGhlbg0KPiB0aGUgaG9zdCBzdXNwZW5kIGF2 YWlsYWJpbGl0eSBjaGVjayBjYW4gcmVqZWN0IHN5c3RlbSBzdXNwZW5kIG9ubHkgd2hlbiBzdWNo IGFuDQo+IHVuc3VwcG9ydGVkIElPTU1VIGlzIHByZXNlbnQsIGluc3RlYWQgb2YgZGlzYWJsaW5n IHRoZSBmZWF0dXJlIGZvciBhbGwNCj4gQXJtIGJ1aWxkcw0KPiB3aXRoIENPTkZJR19BUk1fU01N VSBlbmFibGVkLg0KPiANCj4gSSB3b3VsZCBiZSBpbnRlcmVzdGVkIHRvIGhlYXIgaWYgeW91IG9y IHRoZSBtYWludGFpbmVycyBzZWUgYSBiZXR0ZXIgd2F5IHRvDQo+IGV4cHJlc3MgdGhpcyBjYXBh YmlsaXR5Lg0KDQpvaywgbGV04oCZcyBhZGRyZXNzIEphbiBjb21tZW50IG5vdyBhbmQgd2UgY2Fu IHNlZSB3aGF0IHRoZSBtYWludGFpbmVycyB0aGluayBhYm91dCB0aGlzLg0KDQpDaGVlcnMsDQpM dWNhDQoNCg0K From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303687.1576939 (Exim 4.92) (envelope-from ) id 1wLMHF-0000hl-TV; Fri, 08 May 2026 14:34:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303687.1576939; Fri, 08 May 2026 14:34:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHF-0000he-QM; Fri, 08 May 2026 14:34:05 +0000 Received: by outflank-mailman (input) for mailman id 1303687; Fri, 08 May 2026 14:34:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHE-0000hU-Mb for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHE-00A7Or-3q for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:04 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf443-e002-0a2a0a5209dd-0a2a450290cc-46 for ; Fri, 08 May 2026 16:34:04 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45a-af86-0a2a45020019-d98c6eace33e-1 for ; Fri, 08 May 2026 16:34:03 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 384F51D34; Fri, 8 May 2026 07:33:57 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0CF9C3F763; Fri, 8 May 2026 07:34:00 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250842; bh=zq3DhQH4sl+9uv2VKEwOOwkj7NuXi59OI/wXqdtf3Pw=; h=From:To:Cc:Subject:Date:From; b=PF+FVPhbQG7HcoMKXQxp8e4yU+r+X/SaVca58YM4DmXRhB3Mo6Y8PgtrNiabyit72 HKxf7eoDnYW2k1ESfpi+WhEcyuyiOt4r0KKrRkjvcpdmose1njskqM9mMRqUjO6m4h S6Zsjh/Dq1wCpvouNP/Vgzu1eyFHrKDpVvGcimSA= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v5 0/3] Fifth MPU Series Date: Fri, 8 May 2026 15:33:50 +0100 Message-Id: <20260508143353.3512004-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778250844-AB36C161-ED15C89A/0/0 X-purgate-type: clean X-purgate-size: 1518 This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU systems docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ xen/arch/arm/domain.c | 11 ++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 21 +++++++ xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 8 +++ xen/arch/arm/mpu/arm32/mm.c | 17 +++++ xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- xen/include/public/arch-arm.h | 6 ++ xen/include/public/domctl.h | 4 +- 18 files changed, 353 insertions(+), 9 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303688.1576948 (Exim 4.92) (envelope-from ) id 1wLMHI-0000vV-2w; Fri, 08 May 2026 14:34:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303688.1576948; Fri, 08 May 2026 14:34:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHH-0000vO-WE; Fri, 08 May 2026 14:34:08 +0000 Received: by outflank-mailman (input) for mailman id 1303688; Fri, 08 May 2026 14:34:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHG-0000kf-7f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHF-00DAHk-Kv for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:05 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf44f-5cb7-0a2a0a5109dd-0a2a450a9812-32 for ; Fri, 08 May 2026 16:34:05 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45c-56b3-0a2a450a0019-d98c6eaceb08-1 for ; Fri, 08 May 2026 16:34:05 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2CD643591; Fri, 8 May 2026 07:33:59 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D62373F763; Fri, 8 May 2026 07:34:02 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250844; bh=3OwJmJ83fF7wYUwwajm97vdwH/PiBu+huX5oR7YFd8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GtkHKE7eaEuqzyAEc+28pZDGbOT7oHXCt0WMgxCsQqSWXGwxAbYLMt0apfFw+sy97 VS0dr5OxqufzNH2YDBnrmc2ceWqaY1rn4JZDxQUUpFhkkSrFnk7wJgNNBJo76ytoAq koqbbcb5PHK8FtzsXURapvm1tBchwM+2Axh5yKKo= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Hari Limaye , Harry Ramsey Subject: [PATCH v5 1/3] arm/mpu: implement setup_virt_paging for MPU systems Date: Fri, 8 May 2026 15:33:51 +0100 Message-Id: <20260508143353.3512004-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778250845-7E58E8B7-07AC936A/0/0 X-purgate-type: clean X-purgate-size: 7761 From: Penny Zheng Implement setup_virt_paging for AArch64 MPU systems, taking care of stage 2 address translation regime, IPA bits, supported VMID length configuration and VTCR_EL2/VSTCR_EL2 register programming. Implement also the Armv8-R specific changes to ID_AA64MMFR0_EL1, related to the supported memory system architecture (PMSA/VMSA) and check that when MPU is built, the underlying HW is compatible with PMSA. By default MPU at EL2 and EL1 is required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey Reviewed-by: Michal Orzel --- v5: - removed spaces in inline if condition - Add Michal R-by v4: - Fixed typo in the comments - Fixed typo in the commit title and message - moved p2m_vmid_allocator_init() after write of VTCR_EL2 - Fixed printf format specifier %d -> %u v3: - Refactor unused code to more relevant commits. - Add P2M print information - Formatting issues - Update commit message v2: - Separate commit into multiple commits --- xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/processor.h | 8 +++ 4 files changed, 101 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b58..4547417df97e 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,89 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + register_t vtcr_el2 = READ_SYSREG(VTCR_EL2); + register_t vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against PA size. + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_PMSA_SUPPORT) && + (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT) ) + goto fault; + + /* Stage 1 EL1&0 translation regime uses PMSAv8 by default */ + vtcr_el2 &= ~VTCR_MSA; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8-R only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * cpuinfo sanitization makes sure we support 16-bits VMID only if all cores + * are supporting it. + * + * Set the VS bit only if 16 bit VMID is supported. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + { + vtcr_el2 |= VTCR_VS; + max_vmid = MAX_VMID_16_BIT; + } + else + vtcr_el2 &= ~VTCR_VS; + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + p2m_vmid_allocator_init(); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + printk("P2M: %u-bit IPA with %u-bit PA and %u-bit VMID\n", + p2m_ipa_bits, + pa_range_info[system_cpuinfo.mm64.pa_range], + (MAX_VMID == MAX_VMID_16_BIT) ? 16 : 8); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb5a..f3c11d871e86 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,U) << 30) +#define VSTCR_EL2_SC (_AC(0x1,U) << 20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1ad1..bf902a397068 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b39..895d7cd50244 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,9 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#define VTCR_MSA (_AC(0x1,UL)<<31) +#define VTCR_NSA (_AC(0x1,UL)<<30) + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +467,11 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303689.1576957 (Exim 4.92) (envelope-from ) id 1wLMHK-0001A3-Aj; Fri, 08 May 2026 14:34:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303689.1576957; Fri, 08 May 2026 14:34:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHK-00019u-7W; Fri, 08 May 2026 14:34:10 +0000 Received: by outflank-mailman (input) for mailman id 1303689; Fri, 08 May 2026 14:34:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMHI-0000yn-FV for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:34:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMHH-007WJL-SE for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:34:07 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf446-2eae-0a2a0a5409dd-0a2a4509829e-42 for ; Fri, 08 May 2026 16:34:07 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fdf45e-2497-0a2a45090019-d98c6eaca344-1 for ; Fri, 08 May 2026 16:34:07 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3DE3D1D34; Fri, 8 May 2026 07:34:01 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C97093F763; Fri, 8 May 2026 07:34:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250846; bh=uOx6o3Ma3CDEZYD8HLSisMuej2xnQvxCr5Ghf1MGQ4g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YfNVCBFMoqLbWa8T0NU2W5xPSWLGjnjVlwGeUxqZ8CEdh5pBw3Czhs9o15L1x92Kp N5LvsV2jEKfW53O758lizcPXFPqV2GOhNIgAg+Mvt+Xdlk2op94Z5dFc/hkEVzquF3 +xGXytZaFPXOmyln83DBdYQkyTChbFbi+yRfEA/g= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Fri, 8 May 2026 15:33:52 +0100 Message-Id: <20260508143353.3512004-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778250847-8AF8CA53-284254DA/0/0 X-purgate-type: clean X-purgate-size: 11918 From: Harry Ramsey Add a new device tree property `v8r_el1_msa` to select the MSA (memory system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the former is the default if the property is not passed. Implement the dom0less path to parse the new device tree property, add a new domctl hypercall input parameter `v8r_el1_msa` for arm and add the sanitisation in arch_sanitise_domain_config(), the parameter is intended to be used on CONFIG_MPU systems and returns an error if selected for MMU. Given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v5: - follow the way domu_dt_sci_parse and ARM_SCI is doing, but return error if property is present in MMU systems. - Align the commit message on the new changes - fix documentation - fix multiline comment - drop the explicit padding from struct xen_arch_domainconfig v4: - Rework the patch to have the v8r_el1_msa input parameter more enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. v3: - Improve commit message and device tree property description - Remove macro protection - Remove unused function is_mpu_domain - Code formatting --- docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 11 ++++ xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 21 +++++++ xen/arch/arm/mpu/arm32/mm.c | 17 ++++++ xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ xen/include/public/arch-arm.h | 6 ++ xen/include/public/domctl.h | 4 +- 9 files changed, 167 insertions(+), 2 deletions(-) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b4286082f..2389ae610963 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R systems at EL1, a domain + should use PMSAv8 (MPU) or VMSAv8 (MMU). + + - "mmu" + Enables VMSAv8 at EL1. This requires hardware support and is only + optionally available on AArch64. Not supported on AArch32. + + - "mpu" + Enables PMSAv8 at EL1. This is the default behaviour when the property is + not passed. This configuration requires static allocation (xen,static-mem) + and direct mapping (direct-map). + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 6f73c65e5151..2a0671bd0e8e 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -295,6 +295,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, return 0; } +static int __init +domu_dt_v8r_el1_msa_parse(struct dt_device_node *node, + struct xen_domctl_createdomain *d_cfg, + unsigned int flags) +{ + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); + + if ( !property_present ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + else + { + const char *v8r_el1_msa; + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); + + if ( ret ) + return ret; + + if ( !strcmp(v8r_el1_msa, "mpu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else if ( !strcmp(v8r_el1_msa, "mmu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; + else + { + printk(XENLOG_ERR + "v8r_el1_msa value (%s) not valid for domain %s\n", + v8r_el1_msa, dt_node_name(node)); + return -EINVAL; + } + } + + if ( !IS_ENABLED(CONFIG_MPU) ) + { + if ( !property_present ) + return 0; + + printk(XENLOG_ERR + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", + dt_node_name(node)); + return -EINVAL; + } + + switch ( d_cfg->arch.v8r_el1_msa ) + { + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: + fallthrough; + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + { + printk(XENLOG_ERR + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", + dt_node_name(node)); + return -EINVAL; + } + break; + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: + if ( !has_v8r_vmsa_support() ) + { + printk(XENLOG_ERR + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); + return -EINVAL; + } + break; + + default: + return -EINVAL; + } + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { @@ -308,6 +379,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) + panic("Error getting v8r_el1_msa configuration\n"); + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..ac7d1abd9c7c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -630,6 +631,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( !v8r_el1_msa_domain_sanitise_config(config) ) + { + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); + return -EINVAL; + } + return sci_domain_sanitise_config(config); } @@ -722,6 +729,10 @@ int arch_domain_create(struct domain *d, d->arch.sve_vl = config->arch.sve_vl; #endif +#ifdef CONFIG_MPU + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..ac7300e41fcd 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -112,6 +112,10 @@ struct arch_domain #endif struct resume_info resume_ctx; + +#ifdef CONFIG_MPU + uint8_t v8r_el1_msa; +#endif } __cacheline_aligned; struct arch_vcpu diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 6674dac5e2f8..50ddc0511e7e 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#ifdef CONFIG_MPU +/* Utility function to determine if an Armv8-R processor supports VMSA. */ +bool has_v8r_vmsa_support(void); +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config); +#else +static inline bool has_v8r_vmsa_support(void) +{ + return false; +} + +static inline bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE ) + return false; + + return true; +} +#endif /* CONFIG_MPU */ + #endif /* diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c index a4673c351141..a759ebdfc124 100644 --- a/xen/arch/arm/mpu/arm32/mm.c +++ b/xen/arch/arm/mpu/arm32/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ case num: \ @@ -38,6 +40,21 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return false; +} + +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA ) + return false; + + return true; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c index ed643cad4073..441d209601c1 100644 --- a/xen/arch/arm/mpu/arm64/mm.c +++ b/xen/arch/arm/mpu/arm64/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include /* * The following are needed for the cases: GENERATE_WRITE_PR_REG_CASE @@ -32,6 +34,22 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; +} + +bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA && + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA ) + return false; + + return true; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf70684..6d222f15f6d5 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 + struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t v8r_el1_msa; }; #endif /* __XEN__ || __XEN_TOOLS__ */ diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..23124547f347 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -30,9 +30,9 @@ * fields) don't require a change of the version. * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! * - * Last version bump: Xen 4.19 + * Last version bump: Xen 4.22 */ -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 /* * NB. xen_domctl.domain is an IN/OUT parameter for this operation. -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:34:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:34:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303690.1576962 (Exim 4.92) (envelope-from ) id 1wLMHK-0001GQ-NO; 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a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778250848; bh=+4j7r30qXJ3aM1HfODFFXXITIfg6L1ltdhkKBsZq2Gw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ud4MLurcDiQ/Ou5vERRTxiUlb0uetXgD4hULtOJqqP7m8pOB7jFwk9WbNn/d08t// PNKW7qSvQ/ZiDNaWmR0o/GT2TKWidfh0k6EqFBFgdrGFYx1BhVugWaNRNxTGyvvC/2 S+2MiC1kEB/TzU+KUGFhUPxxS8xp3bB5xnKJJjWk= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v5 3/3] arm/mpu: Implement p2m tables Date: Fri, 8 May 2026 15:33:53 +0100 Message-Id: <20260508143353.3512004-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260508143353.3512004-1-luca.fancellu@arm.com> References: <20260508143353.3512004-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1778250849-19B68F3B-C370D5E2/0/0 X-purgate-type: clean X-purgate-size: 5702 From: Harry Ramsey Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v5: - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER - used MAX_MPU_REGION_NR instead of opencoding 255 - use 'table' in p2m_alloc_table to clear pages - remove p2m_free_vmid() from error path in p2m_init() which is already handled outside v4: - no changes v3: - Check for alloc_xenheap_pages allocation - Clear additional page allocated for ARM64 - Add check for INVALID_VCPU_ID - Remove unnecessary function generate_vsctlr - Code formatting fixes --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- 5 files changed, 85 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbacae..d565230f84ee 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8a3..8b86a03fee44 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a1d..0d4149c71987 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -3,8 +3,15 @@ #ifndef __ARM_MPU_P2M_H__ #define __ARM_MPU_P2M_H__ +#include +#include +#include + struct p2m_domain; +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) + static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..ed1b6dd40f40 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6aa8..8d5c65b1003f 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + unsigned int i; + + if ( !table ) + { + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", + d); + return -ENOMEM; + } + + p2m->root = virt_to_page(table); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_page(table + (i * PAGE_SIZE)); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported in MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); + + return p2m_alloc_table(d); } void p2m_save_state(struct vcpu *p) @@ -46,7 +99,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:39:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:39:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303726.1576975 (Exim 4.92) (envelope-from ) id 1wLMMd-00033F-Bc; Fri, 08 May 2026 14:39:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303726.1576975; Fri, 08 May 2026 14:39:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMMd-000338-8N; Fri, 08 May 2026 14:39:39 +0000 Received: by outflank-mailman (input) for mailman id 1303726; Fri, 08 May 2026 14:39:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMMc-000332-1q for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:39:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMMb-003Ice-15 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:39:37 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf59b-e002-0a2a0a5209dd-0a2a450acde4-20 for ; Fri, 08 May 2026 16:39:36 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf5a8-56b3-0a2a450a0019-c387df83eda0-3 for ; Fri, 08 May 2026 16:39:36 +0200 Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id 6A1DC5C115; Fri, 8 May 2026 14:39:36 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 215A5593A7; Fri, 8 May 2026 14:39:36 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id GKQGB6j1/WlcVgAAD6G6ig (envelope-from ); Fri, 08 May 2026 14:39:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778251176; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=qcH0oyDgGShFY8obpKeBe1gSWCv27CYVU+nGbBQx6uk=; b=eIuw8rpP3+bLN054/2BzceWEYq44u78XjU+o/Hk63wuCt6dDM53cF6B9HfXABaLBH2U1xQ p6ltDFfK8+KEsrmabJzOTwdyfB5/COMiL9/p378+C/sLW+lOaj3LjigyBTFzadJe0Vq06w 0tPe7/qqbqbmOgDTAWLKAuhLF6d+zvE= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778251176; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=qcH0oyDgGShFY8obpKeBe1gSWCv27CYVU+nGbBQx6uk=; b=eIuw8rpP3+bLN054/2BzceWEYq44u78XjU+o/Hk63wuCt6dDM53cF6B9HfXABaLBH2U1xQ p6ltDFfK8+KEsrmabJzOTwdyfB5/COMiL9/p378+C/sLW+lOaj3LjigyBTFzadJe0Vq06w 0tPe7/qqbqbmOgDTAWLKAuhLF6d+zvE= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: kevin.brodsky@arm.com, marmarek@invisiblethingslab.com, Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving Date: Fri, 8 May 2026 16:39:33 +0200 Message-ID: <20260508143933.493013-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCVD_COUNT_TWO(0.00)[2]; RCPT_COUNT_TWELVE(0.00)[12]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_TLS_ALL(0.00)[]; TO_DN_SOME(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid,suse.com:email,imap1.dmz-prg2.suse.org:helo] X-Spam-Flag: NO X-Spam-Score: -2.80 X-purgate-ID: tlsNG-4011c0/1778251176-70F618B7-A88E1767/0/0 X-purgate-type: clean X-purgate-size: 1487 With the support of nested lazy mmu sections it can happen that arch_enter_lazy_mmu_mode() is being called twice without a call of arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers are not disabling preemption when checking for nested lazy mmu sections. This is a problem when running as a Xen PV guest, as xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this case. Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order not to hurt all other lazy mmu mode users. Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") Signed-off-by: Juergen Gross --- arch/x86/xen/mmu_pv.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index c80d0058efd1..3eee5f84f8a7 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) static void xen_enter_lazy_mmu(void) { - enter_lazy(XEN_LAZY_MMU); + preempt_disable(); + if (xen_get_lazy_mode() != XEN_LAZY_MMU) + enter_lazy(XEN_LAZY_MMU); + preempt_enable(); } static void xen_flush_lazy_mmu(void) @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) { preempt_disable(); xen_mc_flush(); - leave_lazy(XEN_LAZY_MMU); + if (xen_get_lazy_mode() != XEN_LAZY_NONE) + leave_lazy(XEN_LAZY_MMU); preempt_enable(); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303735.1576999 (Exim 4.92) (envelope-from ) id 1wLMQZ-0004xI-HD; Fri, 08 May 2026 14:43:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303735.1576999; Fri, 08 May 2026 14:43:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQZ-0004vn-Ak; Fri, 08 May 2026 14:43:43 +0000 Received: by outflank-mailman (input) for mailman id 1303735; Fri, 08 May 2026 14:43:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQY-0004oR-Hu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQW-00Epe9-Cr for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:41 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-5cb7-0a2a0a5109dd-0a2a4506c6fc-20 for ; Fri, 08 May 2026 16:43:41 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf69d-7371-0a2a45060019-d155da32a9cc-3 for ; Fri, 08 May 2026 16:43:41 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-ba3115fe0d5so575680866b.1 for ; Fri, 08 May 2026 07:43:41 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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To initialize this list, domain_p2m_set_allocation() may be called from construct_domU() in the common Dom0less code, so RISC-V provides an implementation and enables CONFIG_ARCH_PAGING_MEMPOOL unconditionally. Additionally, implement arch_{set,get}_paging_mempool_size(). They are not directly used yet, but are required to support the XEN_DOMCTL_{get,set}_paging_mempool_size hypercalls. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Turn on CONFIG_ARCH_PAGING_MEMPOOL=y unconditionally and drop all ifdef-s related to this config. - Optimize check inside arch_set_paging_mempool_size which verify size argument. - Use pfn_to_paddr() inside arch_get_paging_mempool_size() instead of open coding the stuff. - Drop ASSERT() from arch_set_paging_mempool_size() as it is impossible to have here preempted = true and rc != -ERESTART. --- --- xen/arch/riscv/Kconfig | 1 + xen/arch/riscv/p2m.c | 24 ++++++++++++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 41426c205292..48520588fe40 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -1,5 +1,6 @@ config RISCV def_bool y + select ARCH_PAGING_MEMPOOL select DOMAIN_BUILD_HELPERS select FUNCTION_ALIGNMENT_16B select GENERIC_BUG_FRAME diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 41d6d3d5e699..bed997bd9d5a 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -1606,3 +1606,27 @@ struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); } + +int arch_set_paging_mempool_size(struct domain *d, uint64_t size) +{ + unsigned long pages = PFN_DOWN(size); + int rc; + + /* Non page-sized request or 32-bit overflow? */ + if ( pfn_to_paddr(pages) != size ) + return -EINVAL; + + spin_lock(&d->arch.paging.lock); + rc = p2m_set_allocation(d, pages, true); + spin_unlock(&d->arch.paging.lock); + + return rc; +} + +/* Return the size of the pool, in bytes. */ +int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) +{ + *size = pfn_to_paddr(ACCESS_ONCE(d->arch.paging.total_pages)); + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303733.1576984 (Exim 4.92) (envelope-from ) id 1wLMQX-0004ez-Qk; Fri, 08 May 2026 14:43:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303733.1576984; Fri, 08 May 2026 14:43:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQX-0004es-NQ; Fri, 08 May 2026 14:43:41 +0000 Received: by outflank-mailman (input) for mailman id 1303733; Fri, 08 May 2026 14:43:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQV-0004ea-OY for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQV-007XVC-5E for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:39 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-2eae-0a2a0a5409dd-0a2a45028638-32 for ; Fri, 08 May 2026 16:43:39 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf69b-af86-0a2a45020019-d155d02ea9a7-3 for ; Fri, 08 May 2026 16:43:39 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67b32c695efso5000726a12.1 for ; Fri, 08 May 2026 07:43:39 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The stuff necessary to start/launch domains will be introduced separately. This patch series is based on [1], but a lot of patch could go even without it. [1] https://lore.kernel.org/xen-devel/cover.1778140240.git.oleksii.kurochko@gmail.com/T/#t CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2510638764 --- Changes in v2: - Move patch "[PATCH v1 04/27] xen/riscv: rework G-stage mode handling" to patch series [1] - Address the comments from ML. - The following patches were folded into one: # xen/riscv: implement init_intc_phandle() # xen/riscv: call do_initcalls() in start_xen() # xen/riscv: setup system domains - The following patch were folded into one: # xen/riscv: add vaplic access check # xen/riscv: emulate guest writes to virtual APLIC MMIO # xen/riscv: emulate guest reads from virtual APLIC MMIO - Add new bug fix, not really necessary to this patch series: xen/riscv: manage IRQ_DISABLED flag in APLIC irq enable/disable callbacks --- Oleksii Kurochko (26): xen: arm: update p2m_set_allocation() prototype xen/riscv: Implement ARCH_PAGING_MEMPOOL xen/riscv: Implement construct_domain() xen/riscv: implement prerequisites for domain_create() xen/riscv: introduce guest riscv,isa string xen/riscv: implement make_cpus_node() xen/riscv: implement make_timer_node() xen/riscv: implement make_arch_nodes() xen/riscv: introduce init interrupt controller operations xen/riscv: implement make_intc_domU_node() xen/riscv: introduce aia_init() and aia_usable() xen/riscv: add basic VGEIN management for AIA guests xen/riscv: introduce per-vCPU IMSIC state xen/riscv: add very early virtual APLIC (vAPLIC) initialization support xen/riscv: introduce (de)initialization helpers for vINTC xen/riscv: create APLIC DT node for guest domains xen/riscv: generate IMSIC DT node for guest domains xen: move declaration of map_device_irqs_to_domain() to common header xen/riscv: implement IRQ routing for device passthrough xen/riscv: add missing APLIC register offsets, masks to asm/aplic.h. xen/riscv: implement virtual APLIC MMIO emulation xen/riscv: implement init_intc_phandle() xen/riscv: initialize RCU, scheduler, and system domains in start_xen() xen/riscv: provide init_vuart() xen/riscv: add initial dom0less infrastructure support xen/riscv: manage IRQ_DISABLED flag in APLIC irq enable/disable callbacks automation/gitlab-ci/build.yaml | 1 + xen/arch/arm/include/asm/p2m.h | 1 - xen/arch/arm/include/asm/setup.h | 3 - xen/arch/arm/mmu/p2m.c | 22 +- xen/arch/riscv/Kconfig | 3 + xen/arch/riscv/Makefile | 4 + xen/arch/riscv/aia.c | 167 +++++++++ xen/arch/riscv/aplic.c | 49 ++- xen/arch/riscv/cpufeature.c | 59 ++- xen/arch/riscv/device.c | 108 ++++++ xen/arch/riscv/dom0less-build.c | 39 ++ xen/arch/riscv/domain-build.c | 179 +++++++++ xen/arch/riscv/domain.c | 44 ++- xen/arch/riscv/imsic.c | 167 +++++++++ xen/arch/riscv/include/asm/aia.h | 18 + xen/arch/riscv/include/asm/aplic.h | 53 +++ xen/arch/riscv/include/asm/cpufeature.h | 5 + xen/arch/riscv/include/asm/domain.h | 8 + xen/arch/riscv/include/asm/guest-layout.h | 7 + xen/arch/riscv/include/asm/imsic.h | 26 ++ xen/arch/riscv/include/asm/intc.h | 58 ++- xen/arch/riscv/include/asm/irq.h | 3 + xen/arch/riscv/include/asm/paging.h | 2 +- xen/arch/riscv/include/asm/setup.h | 8 +- xen/arch/riscv/include/asm/vaplic.h | 37 ++ xen/arch/riscv/intc.c | 103 ++++- xen/arch/riscv/irq.c | 178 ++++++++- xen/arch/riscv/p2m.c | 31 +- xen/arch/riscv/paging.c | 7 +- xen/arch/riscv/setup.c | 14 + xen/arch/riscv/stubs.c | 12 - xen/arch/riscv/vaplic.c | 436 ++++++++++++++++++++++ xen/common/device-tree/dom0less-build.c | 2 +- xen/include/xen/fdt-domain-build.h | 13 + xen/include/xen/p2m-common.h | 2 + 35 files changed, 1807 insertions(+), 62 deletions(-) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/device.c create mode 100644 xen/arch/riscv/domain-build.c create mode 100644 xen/arch/riscv/include/asm/aia.h create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303734.1576993 (Exim 4.92) (envelope-from ) id 1wLMQZ-0004rz-1E; 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This led to the caller-side ASSERT(preempted == (rc == -ERESTART)) added solely to document their agreement. Drop the out-argument entirely. The return code alone is sufficient to distinguish preemption (-ERESTART) from success (0) or other failures. Replace the pointer with a plain bool can_preempt that controls whether the preemption check is performed at all, making the previous NULL-to-suppress-preemption calling convention explicit and type-safe. Since p2m_set_allocation() is called by the common dom0less build code, move its declaration from the ARM-specific asm/p2m.h to xen/p2m-common.h. Reported-by: Jan Beulich Signed-off-by: Oleksii Kurochko --- Changes in v2: - new patch --- xen/arch/arm/include/asm/p2m.h | 1 - xen/arch/arm/mmu/p2m.c | 22 ++++++++-------------- xen/arch/riscv/include/asm/paging.h | 2 +- xen/arch/riscv/p2m.c | 7 ++++--- xen/arch/riscv/paging.c | 7 ++----- xen/common/device-tree/dom0less-build.c | 2 +- xen/include/xen/p2m-common.h | 2 ++ 7 files changed, 18 insertions(+), 25 deletions(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 7957dbd96e57..62b37a05f79e 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -232,7 +232,6 @@ void p2m_restore_state(struct vcpu *n); /* Print debugging/statistial info about a domain's p2m */ void p2m_dump_info(struct domain *d); -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted); int p2m_teardown_allocation(struct domain *d); static inline void p2m_write_lock(struct p2m_domain *p2m) diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c index 51abf3504fcf..e5c6be7c0890 100644 --- a/xen/arch/arm/mmu/p2m.c +++ b/xen/arch/arm/mmu/p2m.c @@ -67,10 +67,11 @@ int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_preempt) { struct page_info *pg; @@ -112,11 +113,8 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) break; /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted = true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } return 0; @@ -125,7 +123,6 @@ int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) int arch_set_paging_mempool_size(struct domain *d, uint64_t size) { unsigned long pages = size >> PAGE_SHIFT; - bool preempted = false; int rc; if ( (size & ~PAGE_MASK) || /* Non page-sized request? */ @@ -133,27 +130,24 @@ int arch_set_paging_mempool_size(struct domain *d, uint64_t size) return -EINVAL; spin_lock(&d->arch.paging.lock); - rc = p2m_set_allocation(d, pages, &preempted); + rc = p2m_set_allocation(d, pages, true); spin_unlock(&d->arch.paging.lock); - ASSERT(preempted == (rc == -ERESTART)); - return rc; } int p2m_teardown_allocation(struct domain *d) { int ret = 0; - bool preempted = false; spin_lock(&d->arch.paging.lock); if ( d->arch.paging.p2m_total_pages != 0 ) { - ret = p2m_set_allocation(d, 0, &preempted); - if ( preempted ) + ret = p2m_set_allocation(d, 0, true); + if ( ret == -ERESTART ) { spin_unlock(&d->arch.paging.lock); - return -ERESTART; + return ret; } ASSERT(d->arch.paging.p2m_total_pages == 0); } diff --git a/xen/arch/riscv/include/asm/paging.h b/xen/arch/riscv/include/asm/paging.h index e487c89a4ccd..103384723dc5 100644 --- a/xen/arch/riscv/include/asm/paging.h +++ b/xen/arch/riscv/include/asm/paging.h @@ -9,7 +9,7 @@ struct page_info; int paging_domain_init(struct domain *d); int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted); + bool can_preempt); int paging_ret_to_domheap(struct domain *d, unsigned int nr_pages); int paging_refill_from_domheap(struct domain *d, unsigned int nr_pages); diff --git a/xen/arch/riscv/p2m.c b/xen/arch/riscv/p2m.c index 703b9f4d2540..41d6d3d5e699 100644 --- a/xen/arch/riscv/p2m.c +++ b/xen/arch/riscv/p2m.c @@ -430,15 +430,16 @@ int p2m_init(struct domain *d, const struct xen_domctl_createdomain *config) /* * Set the pool of pages to the required number of pages. - * Returns 0 for success, non-zero for failure. + * Returns 0 for success, -ERESTART if preempted, or a negative error code on + * failure. * Call with d->arch.paging.lock held. */ -int p2m_set_allocation(struct domain *d, unsigned long pages, bool *preempted) +int p2m_set_allocation(struct domain *d, unsigned long pages, bool can_preempt) { struct p2m_domain *p2m = p2m_get_hostp2m(d); int rc; - if ( (rc = paging_freelist_adjust(d, pages, preempted)) ) + if ( (rc = paging_freelist_adjust(d, pages, can_preempt)) ) return rc; /* diff --git a/xen/arch/riscv/paging.c b/xen/arch/riscv/paging.c index 76a203edbb0c..35f572689a7c 100644 --- a/xen/arch/riscv/paging.c +++ b/xen/arch/riscv/paging.c @@ -47,7 +47,7 @@ static int _paging_add_to_freelist(struct domain *d) } int paging_freelist_adjust(struct domain *d, unsigned long pages, - bool *preempted) + bool can_preempt) { ASSERT(spin_is_locked(&d->arch.paging.lock)); @@ -66,11 +66,8 @@ int paging_freelist_adjust(struct domain *d, unsigned long pages, return rc; /* Check to see if we need to yield and try again */ - if ( preempted && general_preempt_check() ) - { - *preempted = true; + if ( can_preempt && general_preempt_check() ) return -ERESTART; - } } return 0; diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index 6d6882a34b5a..1058699ab25b 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -747,7 +747,7 @@ static int __init domain_p2m_set_allocation(struct domain *d, uint64_t mem, domain_p2m_pages(mem, d->max_vcpus); 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It also creates additional vCPUs up to max_vcpus and assigns the device tree address and boot cpuid in registers. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rework construct_domain() to print that vCPU1...n are created using %pv. - Use true instead of 1 for initialization of v->is_initialised. - Drop unnessary BUG_ON() in construct_domain(). - Add TODO comment above *_load() functions. --- --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/domain-build.c | 52 +++++++++++++++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 xen/arch/riscv/domain-build.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 8f7fd625dddd..fd5e499eb4b9 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o +obj-y += domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += entry.o diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c new file mode 100644 index 000000000000..492327631e33 --- /dev/null +++ b/xen/arch/riscv/domain-build.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include + +#include +#include + +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) +{ + struct vcpu *v = d->vcpu[0]; + struct cpu_user_regs *regs = vcpu_guest_cpu_user_regs(v); + + BUG_ON(v->is_initialised); + + /* + * At the moment *_load() don't return value and will just panic() + * inside. + * TODO: it will be good to change that. + */ + kernel_load(kinfo); + initrd_load(kinfo, copy_to_guest_phys); + dtb_load(kinfo, copy_to_guest_phys); + + regs->sepc = kinfo->entry; + + /* Guest boot cpuid = 0 */ + regs->a0 = 0; + regs->a1 = kinfo->dtb_paddr; + + for ( unsigned int i = 1; i < d->max_vcpus; i++ ) + { + const struct vcpu *tmp_v = vcpu_create(d, i); + + if ( !tmp_v ) + { + printk("Failed to allocate %pd v%d\n", d, i); + break; + } + + dprintk(XENLOG_INFO, "Created vcpu %pv\n", tmp_v); + } + + domain_update_node_affinity(d); + + v->is_initialised = true; + clear_bit(_VPF_down, &v->pause_flags); + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303738.1577021 (Exim 4.92) (envelope-from ) id 1wLMQc-0005Zw-Vr; Fri, 08 May 2026 14:43:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303738.1577021; Fri, 08 May 2026 14:43:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQc-0005Zn-Qp; Fri, 08 May 2026 14:43:46 +0000 Received: by outflank-mailman (input) for mailman id 1303738; Fri, 08 May 2026 14:43:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQb-0005KE-72 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQa-00A8wX-KC for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:44 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf692-bab6-0a2a0a5309dd-0a2a4503938a-12 for ; Fri, 08 May 2026 16:43:44 +0200 Received: from [209.85.208.46] (helo=mail-ed1-f46.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a0-672d-0a2a45030019-d155d02ef00b-3 for ; Fri, 08 May 2026 16:43:44 +0200 Received: by mail-ed1-f46.google.com with SMTP id 4fb4d7f45d1cf-67929ff6dbfso3147676a12.2 for ; Fri, 08 May 2026 07:43:44 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - update the commit message. - Drop vcpu_switch_to_aarch64_mode() from riscv/stubs. It shouldn't be under riscv/ at all. - Drop next_phandle as it is now in common code. --- xen/arch/riscv/domain.c | 25 +++++++++++++++++++++++++ xen/arch/riscv/stubs.c | 12 ------------ 2 files changed, 25 insertions(+), 12 deletions(-) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index c77be3b827eb..669dd27d79a3 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -289,6 +289,31 @@ void sync_vcpu_execstate(struct vcpu *v) /* Nothing to do -- no lazy switching */ } +int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) +{ + return 0; +} + +int arch_domain_create(struct domain *d, + struct xen_domctl_createdomain *config, + unsigned int flags) +{ + int rc = 0; + + if ( is_idle_domain(d) ) + return 0; + + if ( (rc = p2m_init(d, config)) != 0) + goto fail; + + return rc; + + fail: + d->is_dying = DOMDYING_dead; + arch_domain_destroy(d); + return rc; +} + static void __init __maybe_unused build_assertions(void) { /* diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbb5b9123ea..cfb12d51d00b 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -101,18 +101,6 @@ void dump_pageframe_info(struct domain *d) BUG_ON("unimplemented"); } -int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) -{ - BUG_ON("unimplemented"); -} - -int arch_domain_create(struct domain *d, - struct xen_domctl_createdomain *config, - unsigned int flags) -{ - BUG_ON("unimplemented"); -} - int arch_domain_teardown(struct domain *d) { BUG_ON("unimplemented"); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303739.1577028 (Exim 4.92) (envelope-from ) id 1wLMQe-0005ps-58; Fri, 08 May 2026 14:43:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303739.1577028; Fri, 08 May 2026 14:43:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQe-0005od-1f; Fri, 08 May 2026 14:43:48 +0000 Received: by outflank-mailman (input) for mailman id 1303739; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQc-0005Xa-OM for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQc-007XVC-50 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-2eae-0a2a0a5409dd-0a2a45028638-42 for ; Fri, 08 May 2026 16:43:46 +0200 Received: from [209.85.218.52] (helo=mail-ej1-f52.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a2-af86-0a2a45020019-d155da34ac9a-3 for ; Fri, 08 May 2026 16:43:46 +0200 Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-bc264a50e7fso393112866b.0 for ; Fri, 08 May 2026 07:43:46 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:43:44 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251425; x=1778856225; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xB7Os2MChM3TR6KXilRQ9GrrVvrhO9KwN/leWcO7waQ=; b=ZTcXv4As0mhUaqbZ/HCiD4KCkNRCRLOq6m8vItlSOxVdh7axaljw69rd4bBoNx9fcX d8nz+qwhshOSN0ssUUnupXbPGxSqbLV5J0slMxfEKMMSRGQDaQ4AQKAsB9YGw48E46tG GLEiC6bkOcgBqHrHZQu3lI97yCVsdZYU8Gp4gT/lNdgsYHr3xGsPxoaqnHZLh5a+cTeJ nc0nh9c37EycI3l9LjVqBq+Ipf2eEJ8F0GG9BZzAixykNcnEhZqXTs4DEcp5gxnLsm2M Qcu0oyeuWCyL8tGCLDJtNZb0xwgMLWv089s+oPzw8rHzYnVibF9abDidlXWX2yPBpkUD +naw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251425; x=1778856225; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=xB7Os2MChM3TR6KXilRQ9GrrVvrhO9KwN/leWcO7waQ=; b=iURBWlcKczyx27XgWhjSqIPN55vKijCCHRrBDYjhqh4dDPgcwEcuihhEXXu2qDeCMp hKyFth5fi7Eb4nMw8O/OrIhE6eWQHVz9Sf9ln8uz0+Pzj5y7AWhq+ntQ+sVkbyerIVz1 94U551Kxu7S/4p7Cj6UTePnJSXF+s6mhPpN/8kIXCdgLmX9vIAqLKoVaBbU1li9WKHvk AuMMNGY1EEuT5VVr8rhDkIJxwDwcYZEVU5GKqIR86/7aTwwWctOeiHWUW4tIZfVTCQdH 6y6NfWzUqtuUe+uofKEUu0BUCfOr0RWaF4KH2DWqv/2Yq9JKGIDekmhyWe8vu+rZ69fR g59g== X-Gm-Message-State: AOJu0YwSnrCnaQ1NBQbNJZdHstZlx7sKk+jFjQHbu5qmxX2lzhAikwyN ZORp352So6bMLBNiJ02Wi9MxVuHCtjj7j10l1sbeEPobkx4KbBI7bo4+awVkJA== X-Gm-Gg: AeBDieuUnjT0pjJB/ronluEqj1QRYZzCl4ksI7wsGInjMob7I5IgQjwxj73zdfUzfX7 QWx0Ek0/3jKQ2h4WKOBxP3y+xyGA/9mVadY69jlyTQsOu3vTYD8msOGVaJStWTv4NRNsDWfgmpM oEOah/Ebe2xGw/5BEEK0TH6egaSyvpggNPm50R+1gu1cyGLuY0FsZM8J+wgI9CJFZXhS0WXOPHh Bs0tiEhnpWshB96OIZRq+pgHQfq5ct47nv6rywxUmAU9wzrAaKNsTkzgry07cLmhMhbfhWmotDL Hfl2n3LMCgRqL0PiQQ3gyNM57m3raEXQsxv1cQnxykuh57N2uqtnM0Ryh/C+HPekzaQQFr0dGv5 D1E5KDQNXxnXZESjP6ibkaWSGDAJLDAwOzm+mAUhfAA2OzYBoiHJCIwji+dLlTfjrZRIgmv3L4f /wIA5aluQMDkDReHP3dehHKAo/6TwVQhVgASe4xHrrPDZS+7xrwRoWnjvwqwErY9CX6Ek0Sd6wW nKn5Y42z4/yReI= X-Received: by 2002:a17:906:f59e:b0:bc6:5f97:8f90 with SMTP id a640c23a62f3a-bcaa9f60b9amr189903266b.3.1778251425147; Fri, 08 May 2026 07:43:45 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 05/26] xen/riscv: introduce guest riscv,isa string Date: Fri, 8 May 2026 16:43:07 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778251426-80D7F161-4FE5235E/10/73395122804 X-purgate-type: spam X-purgate-size: 6692 Introduce generation of the riscv,isa string passed to the guest via the Device Tree riscv,isa property. Introduce the per-domain isa string and guest isa bitmap, populated during domain creation by calling init_guest_isa(). Introduce guest_unsupp to filter out ISA extensions that should not be exposed to guests: - f/d/q/v: FPU and vector context save/restore are not yet implemented for guests. - h: Nested virtualisation is not supported. - sstc: Xen owns the supervisor timer; guests must use SBI. - svade: Xen manages hardware A/D bit updates in stage-2 page tables. - svpbmt: Page-based memory types are not yet wired up in stage-2 code. Drop __initconst for riscv_isa_ext() as it can be used after init stage by init_guest_isa(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/guest_unsupp_bmp/guest_unsupp. - Drop guest_isa_str. - Provide init_guest_isa() instead of polluting match_isa_ext(). - Drop xlen. - Add the comment about guest_unsupp. - Update the way how guest_unsupp is init-ed. - Drop __initconst for riscv_isa_ext[] as it is used in init_guest_isa() which isn't marked as __init as it could be used after init stage. --- --- xen/arch/riscv/cpufeature.c | 59 ++++++++++++++++++++++++- xen/arch/riscv/domain.c | 3 ++ xen/arch/riscv/include/asm/cpufeature.h | 5 +++ xen/arch/riscv/include/asm/domain.h | 4 ++ 4 files changed, 70 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/cpufeature.c b/xen/arch/riscv/cpufeature.c index 92235fdfd5ab..618592e6096a 100644 --- a/xen/arch/riscv/cpufeature.c +++ b/xen/arch/riscv/cpufeature.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -120,7 +121,7 @@ static int __init dt_get_cpuid_from_node(const struct dt_device_node *cpu, * and strncmp() is used in match_isa_ext() to compare extension names instead * of strncasecmp(). */ -const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { +const struct riscv_isa_ext_data riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(i), RISCV_ISA_EXT_DATA(m), RISCV_ISA_EXT_DATA(a), @@ -128,6 +129,7 @@ const struct riscv_isa_ext_data __initconst riscv_isa_ext[] = { RISCV_ISA_EXT_DATA(d), RISCV_ISA_EXT_DATA(q), RISCV_ISA_EXT_DATA(c), + RISCV_ISA_EXT_DATA(v), RISCV_ISA_EXT_DATA(h), RISCV_ISA_EXT_DATA(zicntr), RISCV_ISA_EXT_DATA(zicsr), @@ -160,6 +162,12 @@ static const struct riscv_isa_ext_data __initconst required_extensions[] = { RISCV_ISA_EXT_DATA(svpbmt), }; +/* + * Everything in riscv_isa_ext[] which shouldn't be exposed to guests should + * appear here. + */ +static __ro_after_init DECLARE_BITMAP(guest_unsupp, RISCV_ISA_EXT_MAX); + static bool __init is_lowercase_extension_name(const char *str) { /* @@ -480,6 +488,53 @@ bool riscv_isa_extension_available(const unsigned long *isa_bitmap, return test_bit(id, isa_bitmap); } +int init_guest_isa(struct domain *d) +{ + char *buf = d->arch.guest_isa_str; + size_t len = sizeof(d->arch.guest_isa_str); + + bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, + RISCV_ISA_EXT_MAX); + +#if defined(CONFIG_RISCV_32) + if ( snprintf(buf, len, "rv32") >= len ) + return -ENOBUFS; +#elif defined(CONFIG_RISCV_64) + if ( snprintf(buf, len, "rv64") >= len ) + return -ENOBUFS; +#else +# error "Unsupported RISC-V bitness" +#endif + + for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) + { + const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; + + if ( !riscv_isa_extension_available(d->arch.guest_isa, ext->id) ) + continue; + + if ( ext->id >= RISCV_ISA_EXT_BASE && strlcat(buf, "_", len) >= len ) + return -ENOBUFS; + + if ( strlcat(buf, ext->name, len) >= len ) + return -ENOBUFS; + } + + return 0; +} + +static void __init init_guest_unsupp(void) +{ + set_bit(RISCV_ISA_EXT_f, guest_unsupp); + set_bit(RISCV_ISA_EXT_d, guest_unsupp); + set_bit(RISCV_ISA_EXT_q, guest_unsupp); + set_bit(RISCV_ISA_EXT_v, guest_unsupp); + set_bit(RISCV_ISA_EXT_h, guest_unsupp); + set_bit(RISCV_ISA_EXT_sstc, guest_unsupp); + set_bit(RISCV_ISA_EXT_svade, guest_unsupp); + set_bit(RISCV_ISA_EXT_svpbmt, guest_unsupp); +} + void __init riscv_fill_hwcap(void) { unsigned int i; @@ -527,4 +582,6 @@ void __init riscv_fill_hwcap(void) if ( !all_extns_available ) panic("Look why the extensions above are needed in " "https://xenbits.xenproject.org/docs/unstable/misc/riscv/booting.txt\n"); + + init_guest_unsupp(); } diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 669dd27d79a3..041aed176f32 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -303,6 +303,9 @@ int arch_domain_create(struct domain *d, if ( is_idle_domain(d) ) return 0; + if ( (rc = init_guest_isa(d)) != 0 ) + goto fail; + if ( (rc = p2m_init(d, config)) != 0) goto fail; diff --git a/xen/arch/riscv/include/asm/cpufeature.h b/xen/arch/riscv/include/asm/cpufeature.h index 0c48d57a03bb..42d13d9dbdbe 100644 --- a/xen/arch/riscv/include/asm/cpufeature.h +++ b/xen/arch/riscv/include/asm/cpufeature.h @@ -17,6 +17,8 @@ */ #define RISCV_ISA_EXT_BASE 26 +#define RISCV_GUEST_ISA_STR_MAX 256 + enum riscv_isa_ext_id { RISCV_ISA_EXT_a, RISCV_ISA_EXT_c, @@ -44,7 +46,10 @@ enum riscv_isa_ext_id { RISCV_ISA_EXT_MAX }; +struct domain; + void riscv_fill_hwcap(void); +int init_guest_isa(struct domain *d); bool riscv_isa_extension_available(const unsigned long *isa_bitmap, enum riscv_isa_ext_id id); diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 6044ce0feee0..664b0b9f9129 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -94,6 +95,9 @@ struct arch_domain { struct p2m_domain p2m; struct paging_domain paging; + + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; }; #include -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303741.1577038 (Exim 4.92) (envelope-from ) id 1wLMQf-00066m-PU; Fri, 08 May 2026 14:43:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303741.1577038; Fri, 08 May 2026 14:43:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQf-00066Z-KP; Fri, 08 May 2026 14:43:49 +0000 Received: by outflank-mailman (input) for mailman id 1303741; Fri, 08 May 2026 14:43:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQe-0005ne-3z for xen-devel@lists.xenproject.org; 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This function is going to be use by common dom0less code during construction domain. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/u32/uint32_t for timebase_frequency local variable. - Drop +1 from BUILD_BUG_ON(). - return fdt_end_node(fdt); instead of res at the end of the function. --- --- xen/arch/riscv/domain-build.c | 106 ++++++++++++++++++++++++++++++++++ 1 file changed, 106 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 492327631e33..3063328d96e4 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,8 +3,10 @@ #include #include #include +#include #include +#include #include #include @@ -50,3 +52,107 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) return 0; } +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) +{ + int res; + const struct dt_device_node *cpus = dt_find_node_by_path("/cpus"); + unsigned int cpu; + uint32_t timebase_frequency; + bool frequency_valid; + void *fdt = kinfo->fdt; + + dt_dprintk("Create cpus node\n"); + + if ( !cpus ) + { + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); + return -ENOENT; + } + + frequency_valid = dt_property_read_u32(cpus, "timebase-frequency", + &timebase_frequency); + + res = fdt_begin_node(fdt, "cpus"); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#address-cells", 1); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#size-cells", 0); + if ( res ) + return res; + + if ( frequency_valid ) + res = fdt_property_cell(fdt, "timebase-frequency", timebase_frequency); + + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + uint32_t reg = cpu_to_fdt32(cpu); + + snprintf(buf, sizeof(buf), "cpu@%u", cpu); + res = fdt_begin_node(fdt, buf); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", ®, sizeof(reg)); + if ( res ) + return res; + + res = fdt_property_string(fdt, "status", "okay"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "riscv"); + if ( res ) + return res; + + BUILD_BUG_ON((sizeof("riscv,") + + sizeof_field(struct gstage_mode_desc, name)) >= sizeof(buf)); + snprintf(buf, sizeof(buf), "riscv,%s", max_gstage_mode->name); + res = fdt_property_string(fdt, "mmu-type", buf); + if ( res ) + return res; + + res = fdt_property_string(fdt, "riscv,isa", d->arch.guest_isa_str); + if ( res ) + return res; + + res = fdt_property_string(fdt, "device_type", "cpu"); + if ( res ) + return res; + + res = fdt_begin_node(fdt, "interrupt-controller"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#interrupt-cells", 1); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); + if ( res ) + return res; + + /* end of interrupt-controller */ + res = fdt_end_node(fdt); + if ( res ) + return res; + + res = fdt_end_node(fdt); + if ( res ) + return res; + } + + return fdt_end_node(fdt); +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303742.1577048 (Exim 4.92) (envelope-from ) id 1wLMQh-0006MP-3i; Fri, 08 May 2026 14:43:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303742.1577048; Fri, 08 May 2026 14:43:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQg-0006Ll-T3; Fri, 08 May 2026 14:43:50 +0000 Received: by outflank-mailman (input) for mailman id 1303742; Fri, 08 May 2026 14:43:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQf-00062y-Ev for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQd-00EphB-A5 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a1-e002-0a2a0a5209dd-0a2a4507ac04-2 for ; Fri, 08 May 2026 16:43:48 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a4-229c-0a2a45070019-d155da30a8f9-3 for ; Fri, 08 May 2026 16:43:48 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bc1f0830f44so590070366b.0 for ; Fri, 08 May 2026 07:43:48 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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It matches the CPU node (compatible "riscv"), not the timer node itself. It then calls of_find_compatible_node(NULL, NULL, "riscv,timer") only to read the optional riscv,timer-cannot-wake-cpu property. Since Xen does not care about that property for now, make_timer_node() is implemented to return 0, as no timer node needs to be created for RISC-V guests. Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Acked-by: Jan Beulich - Update the commit message. --- --- xen/arch/riscv/domain-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 3063328d96e4..02b293239142 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include @@ -156,3 +157,10 @@ int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) return fdt_end_node(fdt); } + +int __init make_timer_node(const struct kernel_info *kinfo) +{ + /* There is no need for timer node for RISC-V. */ + + return 0; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303745.1577056 (Exim 4.92) (envelope-from ) id 1wLMQi-0006dm-F6; Fri, 08 May 2026 14:43:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303745.1577056; Fri, 08 May 2026 14:43:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQi-0006dN-7v; Fri, 08 May 2026 14:43:52 +0000 Received: by outflank-mailman (input) for mailman id 1303745; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQg-0006J3-QL for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQg-007XVC-6p for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:50 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-2 for ; Fri, 08 May 2026 16:43:50 +0200 Received: from [209.85.218.51] (helo=mail-ej1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a6-af86-0a2a45020019-d155da33a5c7-3 for ; Fri, 08 May 2026 16:43:50 +0200 Received: by mail-ej1-f51.google.com with SMTP id a640c23a62f3a-bc23bebd345so31302266b.1 for ; Fri, 08 May 2026 07:43:50 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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It is placed in dom0less-build.c as make_arch_nodes() is only used in the dom0less code path. In the future, it will be extended to create an emulated UART node. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Update the commit message. --- --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index a683972e9235..4cc00012aa8d 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -2,10 +2,18 @@ #include #include +#include #include #include +int __init make_arch_nodes(struct kernel_info *kinfo) +{ + /* No RISC-V specific nodes need to be made, at the moment. */ + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303746.1577064 (Exim 4.92) (envelope-from ) id 1wLMQj-0006vi-Uh; Fri, 08 May 2026 14:43:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303746.1577064; Fri, 08 May 2026 14:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQj-0006ux-Lw; Fri, 08 May 2026 14:43:53 +0000 Received: by outflank-mailman (input) for mailman id 1303746; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQi-0006aZ-5O for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQh-00A90j-Id for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:51 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-2 for ; Fri, 08 May 2026 16:43:51 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a7-aaa8-0a2a45050019-d155da31a443-3 for ; Fri, 08 May 2026 16:43:51 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-b93698bb57aso376275666b.0 for ; Fri, 08 May 2026 07:43:51 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 7 +++++-- xen/arch/riscv/include/asm/intc.h | 10 +++++++--- xen/arch/riscv/intc.c | 10 ++++++++-- 3 files changed, 20 insertions(+), 7 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 739e8dab3498..97dc0ef731f0 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -306,12 +306,15 @@ static const hw_irq_controller aplic_xen_irq_type = { static const struct intc_hw_operations aplic_ops = { .info = &aplic_info, - .init = aplic_init, .host_irq_type = &aplic_xen_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, }; +static const struct intc_hw_init_ops __initdata aplic_init_ops = { + .init = aplic_init, +}; + static int cf_check aplic_irq_xlate(const uint32_t *intspec, unsigned int intsize, unsigned int *out_hwirq, @@ -347,7 +350,7 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat) dt_irq_xlate = aplic_irq_xlate; - register_intc_ops(&aplic_ops); + register_intc_ops(&aplic_ops, &aplic_init_ops); /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index ecdc8a5e6577..8b498e43b33f 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -28,8 +28,6 @@ struct intc_info { struct intc_hw_operations { /* Hold intc hw information */ const struct intc_info *info; - /* Initialize the intc and the boot CPU */ - int (*init)(void); /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; @@ -43,9 +41,15 @@ struct intc_hw_operations { void (*handle_interrupt)(struct cpu_user_regs *regs); }; +struct intc_hw_init_ops { + /* Initialize the intc and the boot CPU */ + int (*init)(void); +}; + void intc_preinit(void); -void register_intc_ops(const struct intc_hw_operations *ops); +void register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops); void intc_init(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index ea317aea5ad8..8649160403f7 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -12,9 +12,13 @@ static const struct intc_hw_operations *__ro_after_init intc_hw_ops; -void __init register_intc_ops(const struct intc_hw_operations *ops) +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; + +void __init register_intc_ops(const struct intc_hw_operations *ops, + const struct intc_hw_init_ops *init_ops) { intc_hw_ops = ops; + intc_hw_init_ops = init_ops; } void __init intc_preinit(void) @@ -27,7 +31,9 @@ void __init intc_preinit(void) void __init intc_init(void) { - if ( intc_hw_ops->init() ) + ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303749.1577072 (Exim 4.92) (envelope-from ) id 1wLMQl-0007EP-Ea; Fri, 08 May 2026 14:43:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303749.1577072; Fri, 08 May 2026 14:43:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQl-0007Ds-9K; Fri, 08 May 2026 14:43:55 +0000 Received: by outflank-mailman (input) for mailman id 1303749; Fri, 08 May 2026 14:43:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQj-0006sB-JQ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQj-00A90j-02 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:53 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a1-bab6-0a2a0a5309dd-0a2a450ad498-16 for ; Fri, 08 May 2026 16:43:52 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6a8-56b3-0a2a450a0019-d155da32b892-3 for ; Fri, 08 May 2026 16:43:52 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-bc2a455fd55so299695866b.2 for ; Fri, 08 May 2026 07:43:52 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add make_intc_domU_node() to the dom0less build path and wire it to a new generic helper, intc_make_domu_dt_node(), which delegates DT node creation to the active interrupt controller implementation via vintc_init_ops. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/intc_make_domu_dt_node/make_intc_domU_node. - introduce separate intc_hw_init_ops structure for init operations. - Return -EOPNOTSUPP instead of -ENOSYS. - Drop const for kinfo argument as it could be changed by interrupt controller node creation code. - Refactor make_domu_dt_node(). - Make make_domu_dt_node part of vintc structure as it looks more logical to be there. --- xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/intc.h | 12 ++++++++++-- xen/arch/riscv/intc.c | 11 +++++++++++ 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 664b0b9f9129..136d9e816a44 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -98,6 +98,8 @@ struct arch_domain { DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; + + struct vintc *vintc; }; #include diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 8b498e43b33f..70df461a2a51 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -8,14 +8,13 @@ #ifndef ASM__RISCV__INTERRUPT_CONTOLLER_H #define ASM__RISCV__INTERRUPT_CONTOLLER_H -struct dt_device_node; - enum intc_version { INTC_APLIC, }; struct cpu_user_regs; struct irq_desc; +struct kernel_info; struct intc_info { enum intc_version hw_version; @@ -46,6 +45,15 @@ struct intc_hw_init_ops { int (*init)(void); }; +struct vintc_init_ops { + /* Create interrupt controller node for domain */ + int (*make_domu_dt_node)(struct kernel_info *kinfo); +}; + +struct vintc { + struct vintc_init_ops *init_ops; +}; + void intc_preinit(void); void register_intc_ops(const struct intc_hw_operations *ops, diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 8649160403f7..0994deddcb2c 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -3,6 +3,7 @@ #include #include #include +#include #include #include #include @@ -73,3 +74,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) intc_set_irq_type(desc, desc->arch.type); intc_set_irq_priority(desc, priority); } + +int __init make_intc_domU_node(struct kernel_info *kinfo) +{ + struct vintc *vintc = kinfo->bd.d->arch.vintc; + + if ( intc_hw_ops && vintc->init_ops && vintc->init_ops->make_domu_dt_node ) + return vintc->init_ops->make_domu_dt_node(kinfo); + + return -EOPNOTSUPP; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303751.1577081 (Exim 4.92) (envelope-from ) id 1wLMQn-0007XN-1J; Fri, 08 May 2026 14:43:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303751.1577081; Fri, 08 May 2026 14:43:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQm-0007X3-OJ; Fri, 08 May 2026 14:43:56 +0000 Received: by outflank-mailman (input) for mailman id 1303751; Fri, 08 May 2026 14:43:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQl-0007Cq-8s for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQk-007XVC-Kx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:54 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-14 for ; Fri, 08 May 2026 16:43:54 +0200 Received: from [209.85.218.46] (helo=mail-ej1-f46.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6aa-af86-0a2a45020019-d155da2eb034-3 for ; Fri, 08 May 2026 16:43:54 +0200 Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-b8f97c626aaso358645366b.2 for ; Fri, 08 May 2026 07:43:54 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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At the moment, it only checks whether the SSAIA extension is available, and if so, sets is_aia_usable (which indicates more than just the availability of the extension) to true; it also signifies that the necessary components (to be introduced in follow-up patches) have been initialized. Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/is_aia_available/is_aia_usable. - Drop return value for aia_init(). - s/aia_available()/aia_usable(). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aia.c | 23 +++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 10 ++++++++++ xen/arch/riscv/intc.c | 3 +++ 4 files changed, 37 insertions(+) create mode 100644 xen/arch/riscv/aia.c create mode 100644 xen/arch/riscv/include/asm/aia.h diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index fd5e499eb4b9..9df8b72b5494 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,3 +1,4 @@ +obj-y += aia.o obj-y += aplic.o obj-y += cpufeature.o obj-y += domain.o diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c new file mode 100644 index 000000000000..f67f422c5a45 --- /dev/null +++ b/xen/arch/riscv/aia.c @@ -0,0 +1,23 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +static bool __ro_after_init is_aia_usable; + +bool aia_usable(void) +{ + return is_aia_usable; +} + +void __init aia_init(void) +{ + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + return; + + is_aia_usable = true; +} diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/aia.h new file mode 100644 index 000000000000..ca42c3086126 --- /dev/null +++ b/xen/arch/riscv/include/asm/aia.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef ASM__RISCV__AIA_H +#define ASM__RISCV__AIA_H + +bool aia_usable(void); + +void aia_init(void); + +#endif /* ASM__RISCV__ACPI_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 0994deddcb2c..a611c9dc5f32 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -9,6 +9,7 @@ #include #include +#include #include static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -34,6 +35,8 @@ void __init intc_init(void) { ASSERT(intc_hw_init_ops && intc_hw_init_ops->init); + aia_init(); + if ( intc_hw_init_ops->init() ) panic("Failed to initialize the interrupt controller drivers\n"); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303756.1577089 (Exim 4.92) (envelope-from ) id 1wLMQo-0007uM-Mn; Fri, 08 May 2026 14:43:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303756.1577089; Fri, 08 May 2026 14:43:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQo-0007sk-A4; Fri, 08 May 2026 14:43:58 +0000 Received: by outflank-mailman (input) for mailman id 1303756; Fri, 08 May 2026 14:43:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQm-0007TQ-H3 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:43:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQk-00EpjT-Bx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:43:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf689-5cb7-0a2a0a5109dd-0a2a4506c6fc-34 for ; Fri, 08 May 2026 16:43:55 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6ab-7371-0a2a45060019-d155da2da8ee-3 for ; Fri, 08 May 2026 16:43:55 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-bc1f0830f44so590084566b.0 for ; Fri, 08 May 2026 07:43:55 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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AIA provides a hardware-accelerated mechanism for delivering external interrupts to domains via "guest interrupt files" located in IMSIC. A single physical hart can implement multiple such files (up to GEILEN), allowing several virtual harts to receive interrupts directly from hardware. Introduce per-CPU tracking of guest interrupt file identifiers (VGEIN) for systems implementing AIA specification. Each CPU maintains a bitmap describing which guest interrupt files are currently in use. Add helpers to initialize the bitmap based on the number of available guest interrupt files (GEILEN), assign a VGEIN to a vCPU, and release it when no longer needed. When assigning a VGEIN, the corresponding value is written to the VGEIN field of the guest hstatus register so that VS-level external interrupts are delivered from the selected interrupt file. Signed-off-by: Oleksii Kurochko --- Changes in v2: - add static for defintion of vgein_bmp; - Drop declarartion of vgein_bmp from aia.h. - Move declaration of 'struct vgein_bmp' from aia.h to aia.c as all the management is inside aia.c. - Instead of decrement of vgein->geilen just update the wait how it is initialized. - Return -EOPNOTSUPP in vgein_init() instead of BUG_ON(). - Use %u to print unsigned int. - make bmp field in vgein_bmp not a pointer. - allocate owners dynamically. - Drop unnessary blank lines. - use find_first_zero_bit() instead of bitmap_weight() to find a free slot for vgein number. - Drop the section number for the comment. - Start to search from bitnum 1 for free vgein_id, as bitnum 0 is reserved to tell that no guest extrenal interrupt number is used. Thereby drop vgein_id++ at the end of vgein_assign(). - s/bitmap_set/__set_bit. - s/bitmap_clear/__clear_bit. - as vgein_init() is needed to be invoked once per CPU being brought up, drop __init for it. - Return vgein_id == 0 if vgein_id is higher then maximun supported by h/w VGEIN. - Add check in vgein_relase() that vgein is 0 and if it is there is nothing is needed to do. - Use gdprintk instead of printk() in vgein_{assign,release}. - Add the claryfing comment above geilen field. - Drop ASSERT in vgein_assign() and return just vgein_id = 0 in the case when there is no aviablable h/w VGEINs. - Make vgein_init() static. --- xen/arch/riscv/aia.c | 144 +++++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/aia.h | 8 ++ 2 files changed, 152 insertions(+) diff --git a/xen/arch/riscv/aia.c b/xen/arch/riscv/aia.c index f67f422c5a45..f7f44961e0f5 100644 --- a/xen/arch/riscv/aia.c +++ b/xen/arch/riscv/aia.c @@ -1,11 +1,33 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include #include #include #include +#include +#include #include +#include +#include #include +#include +#include + +struct vgein_ctrl { + unsigned long bmp; + spinlock_t lock; + struct vcpu **owners; + /* The least-significant bits are implemented first, apart from bit 0 */ + unsigned int geilen; +}; + +/* + * Bitmap for each physical cpus to detect which VS (guest) + * interrupt file id was used. + */ +static DEFINE_PER_CPU(struct vgein_ctrl, vgein); static bool __ro_after_init is_aia_usable; @@ -14,10 +36,132 @@ bool aia_usable(void) return is_aia_usable; } +static int vgein_init(unsigned int cpu) +{ + struct vgein_ctrl *vgein = &per_cpu(vgein, cpu); + + csr_write(CSR_HGEIE, -1UL); + vgein->geilen = flsl(csr_read(CSR_HGEIE) >> 1); + csr_write(CSR_HGEIE, 0); + + printk("cpu%d.geilen=%u\n", cpu, vgein->geilen); + + if ( !vgein->geilen ) + return -EOPNOTSUPP; + + vgein->owners = xvzalloc_array(struct vcpu *, vgein->geilen); + if ( !vgein->owners ) + return -ENOMEM; + + spin_lock_init(&vgein->lock); + + return 0; +} + +static int cf_check cpu_callback(struct notifier_block *nfb, unsigned long action, + void *hcpu) +{ + unsigned int cpu = (unsigned long)hcpu; + int rc = 0; + + switch ( action ) + { + case CPU_STARTING: + rc = vgein_init(cpu); + if ( rc ) + printk("AIA: failed to init vgein for CPU%un", cpu); + break; + } + + return notifier_from_errno(rc); +} + +static struct notifier_block cpu_nfb = { + .notifier_call = cpu_callback, +}; + void __init aia_init(void) { + int rc; + if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) + { + dprintk(XENLOG_WARNING, "SSAIA isn't present in riscv,isa\n"); + return; + } + + if ( (rc = vgein_init(0)) ) + { + dprintk(XENLOG_ERR, "vgein_init() failed with rc(%d)\n", rc); return; + } is_aia_usable = true; + + register_cpu_notifier(&cpu_nfb); +} + +unsigned int vgein_assign(struct vcpu *v) +{ + unsigned int vgein_id; + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); + unsigned long *bmp = &vgein->bmp; + unsigned long flags; + + spin_lock_irqsave(&vgein->lock, flags); + /* + * The vgein_id shouldn't be zero, as it will indicate that no guest + * external interrupt source is selected for VS-level external interrupts + * according to RISC-V priviliged spec: + * Hypervisor Status Register (hstatus) in RISC-V priviliged spec: + * + * The VGEIN (Virtual Guest External Interrupt Number) field selects + * a guest external interrupt source for VS-level external interrupts. + * VGEIN is a WLRL field that must be able to hold values between zero + * and the maximum guest external interrupt number (known as GEILEN), + * inclusive. + * When VGEIN=0, no guest external interrupt source is selected for + * VS-level external interrupts. + * + * So start to search from bit number 1. + */ + vgein_id = find_next_zero_bit(bmp, vgein->geilen + 1, 1); + + if ( vgein_id > vgein->geilen ) + vgein_id = 0; + else + __set_bit(vgein_id, bmp); + + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: %pv: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", + __func__, v, vgein_id, v->processor, *bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; + vcpu_guest_cpu_user_regs(v)->hstatus |= + MASK_INSR(vgein_id, HSTATUS_VGEIN); + + return vgein_id; +} + +void vgein_release(struct vcpu *v, unsigned int vgen_id) +{ + unsigned long flags; + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); + + if ( !vgen_id ) + return; + + spin_lock_irqsave(&vgein->lock, flags); + __clear_bit(vgen_id, &vgein->bmp); + spin_unlock_irqrestore(&vgein->lock, flags); + +#ifdef VGEIN_DEBUG + gprintk(XENLOG_DEBUG, "%s: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", + __func__, vgen_id, v->processor, vgein->bmp); +#endif + + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; } diff --git a/xen/arch/riscv/include/asm/aia.h b/xen/arch/riscv/include/asm/aia.h index ca42c3086126..6073c89774bb 100644 --- a/xen/arch/riscv/include/asm/aia.h +++ b/xen/arch/riscv/include/asm/aia.h @@ -3,8 +3,16 @@ #ifndef ASM__RISCV__AIA_H #define ASM__RISCV__AIA_H +#include +#include + +struct vcpu; + bool aia_usable(void); void aia_init(void); +unsigned int vgein_assign(struct vcpu *v); +void vgein_release(struct vcpu *v, unsigned int vgen_id); + #endif /* ASM__RISCV__ACPI_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:43:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:43:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303757.1577096 (Exim 4.92) (envelope-from ) id 1wLMQp-000837-Kq; Fri, 08 May 2026 14:43:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303757.1577096; Fri, 08 May 2026 14:43:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQp-00081x-3W; Fri, 08 May 2026 14:43:59 +0000 Received: by outflank-mailman (input) for mailman id 1303757; Fri, 08 May 2026 14:43:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQo-0007kt-0g for xen-devel@lists.xenproject.org; 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Introduce a per-vCPU structure to hold IMSIC-related state, including the guest interrupt file identifier and the CPU providing the backing VS-file. Access to the guest file identifier is protected by a lock. Initialize this structure during vCPU setup and store it in arch_vcpu. The initial state marks the VS-file as software-backed until it becomes associated with a physical CPU. Add helpers to retrieve and update the guest interrupt file identifier: - imsic_set_guest_file_id() is going to be used during vCPU creation to initialize IMSIC interrupt controller things for this vCPU. - vcpu_guest_file_id() is going to be used during update of APLIC's target register with the pair of information (to have MSI delivery mode work properly) when guest is trying to access vAPLIC's target register. It will be used in the follow up patches. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rename imsic_state to vimsic_state. - Use 'unsigned int' for vsfile_pcpu. - Drop initialzation of ->guest_file_id as it will be by default zero. - Add the comment about ->guest_file_id field. - Drop __init for vcpu_imsic_init() as it could be used during post-boot vCPU creation. - Update the commit message. - Drop locks around ->guest_file_id() in vcpu_guest_file_id() and imsic_set_guest_file_id(). --- xen/arch/riscv/imsic.c | 35 +++++++++++++++++++++++++++++ xen/arch/riscv/include/asm/domain.h | 2 ++ xen/arch/riscv/include/asm/imsic.h | 23 +++++++++++++++++++ 3 files changed, 60 insertions(+) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index a4460576f620..8b46419ca23b 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -56,6 +57,16 @@ do { \ csr_clear(CSR_SIREG, v); \ } while (0) +unsigned int vcpu_guest_file_id(const struct vcpu *v) +{ + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); +} + +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id) +{ + ACCESS_ONCE(v->arch.vimsic_state->guest_file_id) = guest_file_id; +} + void __init imsic_ids_local_delivery(bool enable) { if ( enable ) @@ -312,6 +323,30 @@ static int imsic_parse_node(const struct dt_device_node *node, return 0; } +int vcpu_imsic_init(struct vcpu *v) +{ + struct vimsic_state *imsic_state; + + /* Allocate IMSIC context */ + imsic_state = xvzalloc(struct vimsic_state); + if ( !imsic_state ) + return -ENOMEM; + + v->arch.vimsic_state = imsic_state; + + /* Setup IMSIC context */ + rwlock_init(&imsic_state->vsfile_lock); + + imsic_state->vsfile_pcpu = NR_CPUS; + + return 0; +} + +void vcpu_imsic_deinit(const struct vcpu *v) +{ + xvfree(v->arch.vimsic_state); +} + /* * Initialize the imsic_cfg structure based on the IMSIC DT node. * diff --git a/xen/arch/riscv/include/asm/domain.h b/xen/arch/riscv/include/asm/domain.h index 136d9e816a44..42c1db91bd86 100644 --- a/xen/arch/riscv/include/asm/domain.h +++ b/xen/arch/riscv/include/asm/domain.h @@ -54,6 +54,8 @@ struct arch_vcpu { struct vtimer vtimer; + struct vimsic_state *vimsic_state; + register_t hcounteren; register_t hedeleg; register_t hideleg; diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h index c6c59215df20..2b84824cd377 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -11,6 +11,7 @@ #ifndef ASM_RISCV_IMSIC_H #define ASM_RISCV_IMSIC_H +#include #include #include #include @@ -61,7 +62,24 @@ struct imsic_config { spinlock_t lock; }; +struct vimsic_state { + /* IMSIC VS-file */ + rwlock_t vsfile_lock; + /* + * (guest_file_id == 0) -> s/w IMSIC SW-file + * (guest_file_id > 0) -> h/w IMSIC VS-file + */ + unsigned int guest_file_id; + /* + * (vsfile_pcpu >= 0) => h/w IMSIC VS-file + * (vsfile_pcpu == NR_CPUS) => s/w IMSIC SW-file + */ + unsigned int vsfile_pcpu; +}; + struct dt_device_node; +struct vcpu; + int imsic_init(const struct dt_device_node *node); const struct imsic_config *imsic_get_config(void); @@ -71,4 +89,9 @@ void imsic_irq_disable(unsigned int hwirq); void imsic_ids_local_delivery(bool enable); +int vcpu_imsic_init(struct vcpu *v); +void vcpu_imsic_deinit(const struct vcpu *v); +unsigned int vcpu_guest_file_id(const struct vcpu *v); +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id); + #endif /* ASM_RISCV_IMSIC_H */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303761.1577105 (Exim 4.92) (envelope-from ) id 1wLMQs-00009F-A6; Fri, 08 May 2026 14:44:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303761.1577105; Fri, 08 May 2026 14:44:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQr-00005V-Fo; Fri, 08 May 2026 14:44:01 +0000 Received: by outflank-mailman (input) for mailman id 1303761; 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Initialize vAPLIC's domaincfg to with the interrupt-enable bit set and MSI delivery mode selected as the current solution is exepcted to have always IMSIC, and initialize vintc->ops. Other operations such as emulate_load(), emulate_store(), and is_access() will be needed once guests are running and MMIO accesses to APLIC MMIO range must be handled. These will be introduced separately later. Introduce a structure to describe a virtual interrupt controller (vINTC) and a vintc_ops structure, which provides operations to emulate load and store accesses to interrupt controller MMIOs and to check whether a given address falls within the MMIO range of a specific virtual interrupt controller. The vAPLIC implementation of these operations will be provided later once guests can be run and these operations are actually needed. Introduce these structures here as they are required for the implementation of domain_vaplic_init() and domain_vaplic_alloc(). Also, introduce vcpu_vaplic_init() and init vintc_ops->vcpu_init() with it. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/vcpu/v for function arguments in struct vintc_ops(). - Update the comment above is_access() and drop const for addr argument. - Update to_vaplic() to work with 'struct domain *'. - Drop smsiaddrcfg{h} from vaplic_regs struct as they aren't used for now. - Drop inclusion of xen/schec.h from intc.c. - use result of xvzalloc() as initializer in vpalic_alloc(). - Drop goto in domain_vaplic_init(). - s/XVFREE/xvfree. - s/aplic/vintc. - Drop __init for vcpu_vaplic_init() as it could be called for secondary CPU bring up. - Drop vaplic_alloc(). - Drop vintc_ops struct, embed callbacks iniside struct vintc. - Introduce and init vintc irqs for vAPLIC. - Introduce intc_irq_nums() to properly initialize number of vAPLIC's irqs. --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 6 +++ xen/arch/riscv/domain.c | 13 ++--- xen/arch/riscv/include/asm/intc.h | 17 ++++++- xen/arch/riscv/include/asm/vaplic.h | 34 +++++++++++++ xen/arch/riscv/intc.c | 7 +++ xen/arch/riscv/vaplic.c | 78 +++++++++++++++++++++++++++++ 7 files changed, 147 insertions(+), 9 deletions(-) create mode 100644 xen/arch/riscv/include/asm/vaplic.h create mode 100644 xen/arch/riscv/vaplic.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9df8b72b5494..9d8d21b65188 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -25,6 +25,7 @@ obj-y += smpboot.o obj-y += stubs.o obj-y += time.o obj-y += traps.o +obj-y += vaplic.o obj-y += vmid.o obj-y += vm_event.o obj-y += vsbi/ diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 97dc0ef731f0..aba9f3945236 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -295,6 +295,11 @@ static void cf_check aplic_set_irq_type(struct irq_desc *desc, spin_unlock(&aplic.lock); } +static unsigned int cf_check aplic_irq_num(void) +{ + return aplic_info.num_irqs; +} + static const hw_irq_controller aplic_xen_irq_type = { .typename = "aplic", .startup = aplic_irq_startup, @@ -309,6 +314,7 @@ static const struct intc_hw_operations aplic_ops = { .host_irq_type = &aplic_xen_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, + .irq_nums = aplic_irq_num, }; static const struct intc_hw_init_ops __initdata aplic_init_ops = { diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 041aed176f32..7aa00d6cfd95 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -155,14 +156,10 @@ int arch_vcpu_create(struct vcpu *v) if ( (rc = vcpu_vtimer_init(v)) ) goto fail; - /* - * As interrupt controller (IC) is not yet implemented, - * return an error. - * - * TODO: Drop this once IC is implemented. - */ - rc = -EOPNOTSUPP; - goto fail; + ASSERT(v->domain->arch.vintc->ops->vcpu_init); + + if ( (rc = v->domain->arch.vintc->ops->vcpu_init(v)) ) + goto fail; return rc; diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 70df461a2a51..3b30d000066a 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -15,6 +15,7 @@ enum intc_version { struct cpu_user_regs; struct irq_desc; struct kernel_info; +struct vcpu; struct intc_info { enum intc_version hw_version; @@ -38,6 +39,8 @@ struct intc_hw_operations { /* handle external interrupt */ void (*handle_interrupt)(struct cpu_user_regs *regs); + + unsigned int (*irq_nums)(void); }; struct intc_hw_init_ops { @@ -50,8 +53,18 @@ struct vintc_init_ops { int (*make_domu_dt_node)(struct kernel_info *kinfo); }; +struct vintc_ops { + /* Initialize some vINTC-related stuff for a vCPU */ + int (*vcpu_init)(struct vcpu *v); + + /* Check if a address is virtual interrupt controller MMIO */ + int (*is_access)(const struct vcpu *v, unsigned long addr); +}; + struct vintc { - struct vintc_init_ops *init_ops; + unsigned int irq_nums; + const struct vintc_init_ops *init_ops; + const struct vintc_ops *ops; }; void intc_preinit(void); @@ -65,4 +78,6 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); void intc_handle_external_irqs(struct cpu_user_regs *regs); +unsigned int intc_irq_nums(void); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/asm/vaplic.h new file mode 100644 index 000000000000..630ca14657f2 --- /dev/null +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + */ + +#ifndef ASM__RISCV__VAPLIC_H +#define ASM__RISCV__VAPLIC_H + +#include +#include + +#include + +struct domain; + +#define to_vaplic(d) container_of(d->arch.vintc, struct vaplic, vintc) + +struct vaplic_regs { + uint32_t domaincfg; +}; + +struct vaplic { + struct vintc vintc; + struct vaplic_regs regs; +}; + +int domain_vaplic_init(struct domain *d); +void domain_vaplic_deinit(struct domain *d); + +#endif /* ASM__RISCV__VAPLIC_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index a611c9dc5f32..122adf78a391 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -78,6 +78,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) intc_set_irq_priority(desc, priority); } +unsigned int intc_irq_nums(void) +{ + ASSERT(intc_hw_ops && intc_hw_ops->irq_nums); + + return intc_hw_ops->irq_nums(); +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc = kinfo->bd.d->arch.vintc; diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c new file mode 100644 index 000000000000..d2ec196668bc --- /dev/null +++ b/xen/arch/riscv/vaplic.c @@ -0,0 +1,78 @@ +/* SPDX-License-Identifier: MIT */ +/* + * xen/arch/riscv/vaplic.c + * + * Virtual RISC-V Advanced Platform-Level Interrupt Controller support + * + * Copyright (c) Microchip. + * Copyright (c) Vates + */ + +#include +#include +#include + +#include +#include +#include +#include + +#include "aplic-priv.h" + +#define VAPLIC_NUM_SOURCES 96 + +static int cf_check vcpu_vaplic_init(struct vcpu *v) +{ + int rc = 0; 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - Drop __init for domain_vintc_(de)init(). - Update the commit message. --- xen/arch/riscv/domain.c | 3 +++ xen/arch/riscv/include/asm/intc.h | 3 +++ xen/arch/riscv/intc.c | 36 +++++++++++++++++++++++++++++++ 3 files changed, 42 insertions(+) diff --git a/xen/arch/riscv/domain.c b/xen/arch/riscv/domain.c index 7aa00d6cfd95..6de5b82b3724 100644 --- a/xen/arch/riscv/domain.c +++ b/xen/arch/riscv/domain.c @@ -306,6 +306,9 @@ int arch_domain_create(struct domain *d, if ( (rc = p2m_init(d, config)) != 0) goto fail; + if ( (rc = domain_vintc_init(d)) ) + goto fail; + return rc; fail: diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 3b30d000066a..89a9c6806e55 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -80,4 +80,7 @@ void intc_handle_external_irqs(struct cpu_user_regs *regs); unsigned int intc_irq_nums(void); +int domain_vintc_init(struct domain *d); +void domain_vintc_deinit(struct domain *d); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 122adf78a391..7f9850416bb4 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -11,6 +11,7 @@ #include #include +#include static const struct intc_hw_operations *__ro_after_init intc_hw_ops; @@ -94,3 +95,38 @@ int __init make_intc_domU_node(struct kernel_info *kinfo) return -EOPNOTSUPP; } + +int domain_vintc_init(struct domain *d) +{ + int ret = -EOPNOTSUPP; + const enum intc_version ver = intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + ret = domain_vaplic_init(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); + break; + } + + return ret; +} + +void domain_vintc_deinit(struct domain *d) +{ + const enum intc_version ver = intc_hw_ops->info->hw_version; + + switch ( ver ) + { + case INTC_APLIC: + domain_vaplic_deinit(d); + break; + + default: + printk("vintc (ver:%d) isn't implemented\n", ver); + break; + } +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303771.1577120 (Exim 4.92) (envelope-from ) id 1wLMQv-0000vs-W1; Fri, 08 May 2026 14:44:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303771.1577120; Fri, 08 May 2026 14:44:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQv-0000rx-98; Fri, 08 May 2026 14:44:05 +0000 Received: by outflank-mailman (input) for mailman id 1303771; Fri, 08 May 2026 14:44:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQs-0000CP-8H for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQq-00EpjT-2x for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:01 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6ae-5cb7-0a2a0a5109dd-0a2a45048fc2-6 for ; Fri, 08 May 2026 16:44:01 +0200 Received: from [209.85.218.44] (helo=mail-ej1-f44.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b1-1dec-0a2a45040019-d155da2ca595-3 for ; Fri, 08 May 2026 16:44:01 +0200 Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-bc23bebd345so31342266b.1 for ; Fri, 08 May 2026 07:44:01 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bcac4942068sm90736166b.62.2026.05.08.07.43.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 07:44:00 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778251441; x=1778856241; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sJgcbaZaXFB0dLYekd715MJ/zMchLKXDN0/D0Xu69Sc=; b=q8khQGGcXsdPCPAm5C3SRMtpdqUnoDAq10ucq+AJ4fL23SZ+NR7OwWb8W7XYk4tDlO xigIB0my7Lct5BkORRdrtDEgdTqR8/RlHIbTWP10E3M5ajtnlgvQMMkilwBtW/3s2Si5 rePktaLcgOvX3wK2tISVwY3PfOxcgir25eyiwqn7X2AxKs3LQX/zRIrpv2zS3eDTPgOk J7Ilp0SEwes63C1VlTqcgFFu2/QjuLeNmz/BtGe4vtYg1W0MXCoOlnO0Nm24neQjcaNg 8juiSXdkQNRJcYjFAQDOxvFyaM2ZmPFNgvP979iDoDRTv0ACLZuHZ4Ved/3tYEsGVJIA cQnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778251441; x=1778856241; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sJgcbaZaXFB0dLYekd715MJ/zMchLKXDN0/D0Xu69Sc=; b=V/imjLQNKMgSNXjKpBnk8ByS4E6Zb2vLGj3bi7g2lGrxd5oeIBQ2Add8ynwQVoMTMI L0u55ZLkx+IXJjaaz+ScG+rJt3Zd0axlnMHHnsEkyiY0/TX4aq9tYOxbfbFDzoCnDJJa KPrx+pzC4rvzv1cXXLQcQQHMU9LiO4mpr0St5XMcu/OWHhHdktu9oCF3WzT9en+wWo5s n7+6nnS7hleHCWwAootDpw+qoX9P19ZqGEPs4De8k1xSVr7uFfgDzAZQ8L+AacM7bCqI U6cRX7uThiacJkzhgoV9NCvLwOsjHAkPUxahmesPp06mbo9peJRoliERzhoZ1IA0u7DN Et9g== X-Gm-Message-State: AOJu0YxSzyjOml+7uSIJpCjRuUZfX9CELTJLFSQTGyEyygwjBE3ACOnA RKhE2xkuNP1JOV9UJ+5uWv4X/Aem47jng2zxEbgAStND5yDe2aOJz9jjJt/CYw== X-Gm-Gg: AeBDiesEtacOxV+dkcZasLpemFMMuMbLbh9g/fs1NjSILvPlWY+jS3cEj+R6SMdYnf6 FECP4vA9KRMB0IDivb5kJhX2gdcIMyHWUpPZc5pUcVL0t9LSIskLX2XoIsKjFLaSgqintybLkMj SRgA7FgkdbfZtkmK25wdAyGYYz37iyiKcDKgmqRRawWWKXV4Eid4lxjJsboLJePg08AFL9uMUdX MvYtYmvrbMIIDVB0XkSnVYdGN8IdwVOaiz36EFUW60vM8fdmtcQOx6nd/ZJn1xbYaKZdre2TUCn E66Q7/5hIQlnHksYVr29LGcgv9qMZVCxWlRiOM/lIvgoUOyhZeVUVpfSTk/yfom45uD2vRMUqDZ vLmDc1yhJp27Ek3XYouV6f4zlJwDVEiIcDwxwquGlrpg9ovuhaLhcUm/OiZCic5QizgfnoMJ0UQ 9yF0r/dgDgll85wGwLyNZ+mGYwVO7no3tekv/mX1O1olQozWnVTLsPt4ps5IyuSB9Ahg== X-Received: by 2002:a17:907:26c4:b0:bc2:c99f:fb22 with SMTP id a640c23a62f3a-bc84cc7300emr434513366b.2.1778251440590; Fri, 08 May 2026 07:44:00 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Romain Caritey , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 16/26] xen/riscv: create APLIC DT node for guest domains Date: Fri, 8 May 2026 16:43:18 +0200 Message-ID: X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778251441-2997A3FF-93BDCA80/10/73395122804 X-purgate-type: spam X-purgate-size: 7708 Guests require a Device Tree description of the interrupt controller topology. Add support for creating an APLIC node when building the guest DT. Provide stub for imsic_make_dt_node() it will be introduced properly in follow-up patch. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Avoid as max as possible of host properties inheritance. Only number of APLIC's irqs are checked what leads to an introduction of get_aplic_irqs_num(). - Move this patch earlier what leads to an introduction of vimsic_make_domu_dt_node() stub. - s/vimsic_make_domu_dt_node/imsic_make_domu_dt_node. - Refactor vimsic_make_domu_dt_node() to avoid re-usage of APLIC host properties. - Drop next_phandle as it is now in common code. - Drop const for kinfo argument of vimsic_make_domu_dt_node() is is going to be updated inside vimsic_make_domu_dt_node(). - Use introduced before vintc->num_irqs. --- xen/arch/riscv/aplic.c | 2 + xen/arch/riscv/imsic.c | 7 +++ xen/arch/riscv/include/asm/aplic.h | 9 +++ xen/arch/riscv/include/asm/guest-layout.h | 2 + xen/arch/riscv/include/asm/imsic.h | 3 + xen/arch/riscv/vaplic.c | 77 ++++++++++++++++++++++- 6 files changed, 98 insertions(+), 2 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index aba9f3945236..6ed9118485f3 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -12,8 +12,10 @@ #include #include #include +#include #include #include +#include #include #include #include diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index 8b46419ca23b..ceea6778d9dc 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -522,3 +523,9 @@ int __init imsic_init(const struct dt_device_node *node) return rc; } + +int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, + unsigned int *phandle) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index b0724fe6f360..b42b159496b8 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,7 @@ #include +#define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) @@ -27,6 +28,14 @@ #define APLIC_TARGET_HART_IDX_SHIFT 18 +#define APLIC_IDC_SIZE 32 + +#define APLIC_MIN_SIZE 0x4000 +#define APLIC_SIZE_ALIGN(x) ROUNDUP(x, APLIC_MIN_SIZE) + +#define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ + APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpus))) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index 68d95a09394c..9fc990c057f2 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -3,6 +3,8 @@ #include +#define GUEST_APLIC_S_BASE 0xd000000 + #define GUEST_RAM_BANKS 2 /* diff --git a/xen/arch/riscv/include/asm/imsic.h b/xen/arch/riscv/include/asm/imsic.h index 2b84824cd377..604f88db9322 100644 --- a/xen/arch/riscv/include/asm/imsic.h +++ b/xen/arch/riscv/include/asm/imsic.h @@ -78,6 +78,7 @@ struct vimsic_state { }; struct dt_device_node; +struct kernel_info; struct vcpu; int imsic_init(const struct dt_device_node *node); @@ -94,4 +95,6 @@ void vcpu_imsic_deinit(const struct vcpu *v); unsigned int vcpu_guest_file_id(const struct vcpu *v); void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id); +int vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phandle); + #endif /* ASM_RISCV_IMSIC_H */ diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index d2ec196668bc..3f967464335a 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -9,6 +9,8 @@ */ #include +#include +#include #include #include @@ -19,8 +21,11 @@ #include "aplic-priv.h" +#define VAPLIC_COMPATIBLE "riscv,aplic" #define VAPLIC_NUM_SOURCES 96 +#define FDT_VAPLIC_INT_CELLS 2 + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc = 0; @@ -47,6 +52,73 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) return rc; } +static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *kinfo) +{ + int res = 0; + void *fdt = kinfo->fdt; + unsigned int msi_parent_phandle; + char vaplic_name[128]; + paddr_t aplic_addr = GUEST_APLIC_S_BASE; + paddr_t aplic_size = APLIC_SIZE(kinfo->bd.d->max_vcpus); + const __be32 reg[] = { + cpu_to_be32(aplic_addr >> 32), + cpu_to_be32(aplic_addr), + cpu_to_be32(aplic_size >> 32), + cpu_to_be32(aplic_size), + }; + struct vintc *vintc = kinfo->bd.d->arch.vintc; + + res = snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", + GUEST_APLIC_S_BASE); + if ( res >= sizeof(vaplic_name) ) + { + dprintk(XENLOG_DEBUG, "vaplic name is truncated\n"); + return -ENOBUFS; + } + + res = vimsic_make_domu_dt_node(kinfo, &msi_parent_phandle); + if ( res ) + return res; + + res = fdt_begin_node(fdt, vaplic_name); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "#interrupt-cells", FDT_VAPLIC_INT_CELLS); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", reg, sizeof(reg)); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "riscv,num-sources", vintc->irq_nums); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", VAPLIC_COMPATIBLE); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "msi-parent", msi_parent_phandle); + if ( res ) + return res; + + res = fdt_property_cell(fdt, "phandle", kinfo->phandle_intc); + if ( res ) + return res; + + return fdt_end_node(fdt); +} + +static const struct vintc_init_ops __initdata init_ops = { + .make_domu_dt_node = vaplic_make_domu_dt_node, +}; + static const struct vintc_ops vintc_ops = { .vcpu_init = vcpu_vaplic_init, }; @@ -60,13 +132,14 @@ int __init domain_vaplic_init(struct domain *d) d->arch.vintc = &vaplic->vintc; d->arch.vintc->ops = &vintc_ops; + d->arch.vintc->init_ops = &init_ops; - vaplic->regs.domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM; + vaplic->regs.domaincfg = APLIC_DOMAINCFG_IE | APLIC_DOMAINCFG_DM | + APLIC_DOMAINCFG_RO80; d->arch.vintc->irq_nums = min(intc_irq_nums(), VAPLIC_NUM_SOURCES + 0U); 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Add support for generating an IMSIC node when building the guest DT. This allows guests to discover and use the IMSIC interrupt controller. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - s/imsic_make_reg_property/guest_imsic_make_reg_property. - s/imsic_set_interrupt_extended_prop/guest_imsic_set_interrupt_extended_prop. - Use initalizer for regs[] array in imsic_make_reg_property(). - Move buf[] insde the for() loop. - Correct check of returned phandle. - Drop local variable len. - /s/XVFREE/xvfree in imsic_set_interrupt_extended_prop(). - Drop initializer for local variable data. - s/uint32_t/unsinged int for pos and cpu in imsic_set_interrupt_extended_prop(). - Drop next_phandle as it is now in common code. - Introduce vcpu_imsic_deinit. - Refactor vimsic_make_domu_dt_node() to avoid usage of host IMSIC dt node. --- xen/arch/riscv/imsic.c | 127 +++++++++++++++++++++- xen/arch/riscv/include/asm/guest-layout.h | 2 + 2 files changed, 128 insertions(+), 1 deletion(-) diff --git a/xen/arch/riscv/imsic.c b/xen/arch/riscv/imsic.c index ceea6778d9dc..19cbacdf96e1 100644 --- a/xen/arch/riscv/imsic.c +++ b/xen/arch/riscv/imsic.c @@ -13,9 +13,12 @@ #include #include #include +#include #include +#include #include #include +#include #include #include #include @@ -35,6 +38,11 @@ static struct imsic_config imsic_cfg = { .lock = SPIN_LOCK_UNLOCKED, }; +static unsigned int __ro_after_init guest_num_msis; + +#define GUEST_IMSIC_COMPATIBLE "riscv,imsics" +#define GUEST_IMSIC_NUM_MSIS 255 + #define IMSIC_DISABLE_EIDELIVERY 0 #define IMSIC_ENABLE_EIDELIVERY 1 #define IMSIC_DISABLE_EITHRESHOLD 1 @@ -291,6 +299,11 @@ static int imsic_parse_node(const struct dt_device_node *node, return -ENOENT; } + if ( dt_property_read_u32(node, "riscv,num-guest-ids", &tmp) ) + guest_num_msis = tmp; + else + guest_num_msis = imsic_cfg.nr_ids; + if ( (imsic_cfg.nr_ids < IMSIC_MIN_ID) || (imsic_cfg.nr_ids > IMSIC_MAX_ID) ) { @@ -524,8 +537,120 @@ int __init imsic_init(const struct dt_device_node *node) return rc; } +static int __init guest_imsic_make_reg_property(struct domain *d, void *fdt) +{ + paddr_t base_addr = GUEST_IMSIC_S_BASE; + __be32 regs[4] = { + cpu_to_be32(base_addr >> 32), + cpu_to_be32(base_addr), + cpu_to_be32((IMSIC_MMIO_PAGE_SZ * d->max_vcpus) >> 32), + cpu_to_be32(IMSIC_MMIO_PAGE_SZ * d->max_vcpus), + }; + + return fdt_property(fdt, "reg", regs, sizeof(regs)); +} + +static int __init guest_imsic_set_interrupt_extended_prop(struct domain *d, + void *fdt) +{ + unsigned int cpu, pos = 0; + uint32_t phandle; + uint32_t *irq_ext; + int res; + + irq_ext = xvzalloc_array(uint32_t, d->max_vcpus * 2); + if ( !irq_ext ) + return -ENOMEM; + + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) + { + char buf[64]; + + snprintf(buf, sizeof(buf), "/cpus/cpu@%u/interrupt-controller", cpu); + phandle = fdt_get_phandle(fdt, fdt_path_offset(fdt, buf)); + + if ( !phandle ) + { + res = -ENODEV; + goto out; + } + + irq_ext[pos++] = cpu_to_be32(phandle); + irq_ext[pos++] = cpu_to_be32(IRQ_S_EXT); + } + + res = fdt_property(fdt, "interrupts-extended", irq_ext, + d->max_vcpus * 2 * sizeof(*irq_ext)); + + out: + xvfree(irq_ext); + + return res; +} + int __init vimsic_make_domu_dt_node(struct kernel_info *kinfo, unsigned int *phandle) { - return -EOPNOTSUPP; + int res; + void *fdt = kinfo->fdt; + char vimsic_name[128]; + unsigned int vimsic_phandle; + unsigned int num_msis = min(GUEST_IMSIC_NUM_MSIS + 0U, guest_num_msis); + + res = snprintf(vimsic_name, sizeof(vimsic_name), "/soc/imsic@%x", + GUEST_IMSIC_S_BASE); + if ( res >= sizeof(vimsic_name) ) + { + dprintk(XENLOG_DEBUG, "vimsic name is truncated\n"); + return -ENOBUFS; + } + + res = fdt_begin_node(fdt, vimsic_name); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", GUEST_IMSIC_COMPATIBLE); + if ( res ) + return res; + + res = guest_imsic_make_reg_property(kinfo->bd.d, fdt); + if ( res ) + return res; + + res = guest_imsic_set_interrupt_extended_prop(kinfo->bd.d, fdt); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "riscv,num-ids", num_msis); + if ( res ) + return res; + + res = fdt_property(fdt, "msi-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "#msi-cells", 0); + if ( res ) + return res; + + res = fdt_property(fdt, "interrupt-controller", NULL, 0); + if ( res ) + return res; + + res = fdt_property_u32(fdt, "#interrupt-cells", 0); + if ( res ) + return res; + + vimsic_phandle = alloc_phandle(kinfo); + if ( !vimsic_phandle ) + return -EOVERFLOW; + + res = fdt_property_cell(fdt, "phandle", vimsic_phandle); + if ( res ) + return res; + + if ( phandle ) + *phandle = vimsic_phandle; + + return fdt_end_node(fdt); } diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index 9fc990c057f2..b16ec79c3786 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -5,6 +5,8 @@ #define GUEST_APLIC_S_BASE 0xd000000 +#define GUEST_IMSIC_S_BASE 0x28000000 + #define GUEST_RAM_BANKS 2 /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303781.1577134 (Exim 4.92) (envelope-from ) id 1wLMQz-0001Zs-7v; Fri, 08 May 2026 14:44:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303781.1577134; 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Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/arm/include/asm/setup.h | 3 --- xen/include/xen/fdt-domain-build.h | 13 +++++++++++++ 2 files changed, 13 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/setup.h b/xen/arch/arm/include/asm/setup.h index 0d29b46ea52b..0adfa4993a8f 100644 --- a/xen/arch/arm/include/asm/setup.h +++ b/xen/arch/arm/include/asm/setup.h @@ -53,9 +53,6 @@ void init_traps(void); int handle_device(struct domain *d, struct dt_device_node *dev, p2m_type_t p2mt, struct rangeset *iomem_ranges, struct rangeset *irq_ranges); -int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, - bool need_mapping, struct rangeset *irq_ranges); - int map_irq_to_domain(struct domain *d, unsigned int irq, bool need_mapping, const char *devname); diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 671486c1c837..8612e98dfda5 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -12,6 +12,7 @@ struct domain; struct page_info; +struct rangeset; struct membanks; typedef bool (*alloc_domheap_mem_cb)(struct domain *d, struct page_info *pg, @@ -79,6 +80,18 @@ static inline void set_domain_type(struct domain *d, const struct kernel_info *k #endif } +/* + * Retrieves the interrupts configuration from a device tree node and maps + * those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges); + #endif /* __XEN_FDT_DOMAIN_BUILD_H__ */ /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303790.1577139 (Exim 4.92) (envelope-from ) id 1wLMR0-0001mR-LU; Fri, 08 May 2026 14:44:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303790.1577139; Fri, 08 May 2026 14:44:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMQz-0001ge-Az; Fri, 08 May 2026 14:44:09 +0000 Received: by outflank-mailman (input) for mailman id 1303790; Fri, 08 May 2026 14:44:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQw-00018r-N1 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQw-007XaD-1f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:06 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6b5-2eae-0a2a0a5409dd-0a2a45068ed4-2 for ; Fri, 08 May 2026 16:44:06 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b5-7371-0a2a45060019-d155da2de86b-3 for ; Fri, 08 May 2026 16:44:05 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-b79f8f7ea43so339684666b.2 for ; Fri, 08 May 2026 07:44:05 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Introduce map_device_irqs_to_domain() to enumerate a DT node's interrupt properties, skipping those not owned by the primary interrupt controller (as at the moment I haven't seen usages of it), and map_irq_to_domain() to grant domain access and configure Xen's interrupt descriptor accordingly. Sharing IRQ between domains is rejected. route_irq_to_guest() and release_irq() manage irq_desc ownership for guest-assigned interrupts. Each assignment carries a small irq_guest structure as irqaction::dev_id, recording the owning domain and virtual IRQ number which is 1:1 mapped to physical IRQ number. A per-domain vIRQ allocation bitmap (allocated_irqs in struct vintc), managed by vintc_reserve_virq(), prevents the same vIRQ being claimed twice. With APLIC+IMSIC, guest interrupts are delivered directly by hardware through the IMSIC, bypassing do_IRQ(). The _IRQ_GUEST branch in do_IRQ() is therefore left as BUG() until a platform without direct IMSIC delivery is encountered. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Rework IRQ mapping in more common (similar approach to Arm). --- xen/arch/riscv/Makefile | 1 + xen/arch/riscv/aplic.c | 4 + xen/arch/riscv/device.c | 108 ++++++++++++++++++ xen/arch/riscv/include/asm/intc.h | 10 ++ xen/arch/riscv/include/asm/irq.h | 3 + xen/arch/riscv/include/asm/setup.h | 4 + xen/arch/riscv/intc.c | 36 ++++++ xen/arch/riscv/irq.c | 175 +++++++++++++++++++++++++++++ 8 files changed, 341 insertions(+) create mode 100644 xen/arch/riscv/device.c diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index 9d8d21b65188..fc6b34661111 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -1,6 +1,7 @@ obj-y += aia.o obj-y += aplic.o obj-y += cpufeature.o +obj-y += device.o obj-y += domain.o obj-y += domain-build.init.o obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-build.init.o diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 6ed9118485f3..1c8fd0145eb2 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -311,9 +311,13 @@ static const hw_irq_controller aplic_xen_irq_type = { .set_affinity = aplic_set_irq_affinity, }; +/* At the moment there is no difference between guest and Xen ops */ +#define aplic_guest_irq_type aplic_xen_irq_type + static const struct intc_hw_operations aplic_ops = { .info = &aplic_info, .host_irq_type = &aplic_xen_irq_type, + .guest_irq_type = &aplic_guest_irq_type, .handle_interrupt = aplic_handle_interrupt, .set_irq_type = aplic_set_irq_type, .irq_nums = aplic_irq_num, diff --git a/xen/arch/riscv/device.c b/xen/arch/riscv/device.c new file mode 100644 index 000000000000..ba78032028af --- /dev/null +++ b/xen/arch/riscv/device.c @@ -0,0 +1,108 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include + +#include + +int map_irq_to_domain(struct domain *d, unsigned int irq, + bool need_mapping, const char *devname) +{ + int res; + + res = irq_permit_access(d, irq); + if ( res ) + { + printk(XENLOG_ERR "Unable to permit to %pd access to IRQ %u\n", d, irq); + return res; + } + + if ( need_mapping ) + { + /* + * Checking the return of vintc_reserve_virq is not + * necessary. It should not fail except when we try to map + * the IRQ twice. This can legitimately happen if the IRQ is shared. + */ + vintc_reserve_virq(d, irq); + + res = route_irq_to_guest(d, irq, irq, devname); + if ( res < 0 ) + { + printk(XENLOG_ERR "Unable to map IRQ%u to %pd\n", irq, d); + return res; + } + } + + dt_dprintk(" - IRQ: %u\n", irq); + + return 0; +} + +/* + * map_device_irqs_to_domain retrieves the interrupts configuration from + * a device tree node and maps those interrupts to the target domain. + * + * Returns: + * < 0 error + * 0 success + */ +int map_device_irqs_to_domain(struct domain *d, + struct dt_device_node *dev, + bool need_mapping, + struct rangeset *irq_ranges) +{ + unsigned int i, nirq; + int res, irq; + struct dt_raw_irq rirq; + + nirq = dt_number_of_irq(dev); + + /* Give permission and map IRQs */ + for ( i = 0; i < nirq; i++ ) + { + res = dt_device_get_raw_irq(dev, i, &rirq); + if ( res ) + { + printk(XENLOG_ERR "Unable to retrieve irq %u for %s\n", + i, dt_node_full_name(dev)); + return res; + } + + /* + * Don't map IRQ that have no physical meaning + * ie: IRQ whose controller is not APLIC/IMSIC/PLIC. + */ + if ( rirq.controller != dt_interrupt_controller ) + { + dt_dprintk("irq %u not connected to primary controller." + "Connected to %s\n", i, + dt_node_full_name(rirq.controller)); + continue; + } + + irq = platform_get_irq(dev, i); + if ( irq < 0 ) + { + printk("Unable to get irq %u for %s\n", i, dt_node_full_name(dev)); + return irq; + } + + res = map_irq_to_domain(d, irq, need_mapping, dt_node_name(dev)); + if ( res ) + return res; + + + /* + * At the moment there is only one user of map_device_irqs_to_domain() + * for RISC-V which calls it irq_ranges == NULL. + */ + if ( irq_ranges ) + return -EOPNOTSUPP; + } + + return 0; +} diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 89a9c6806e55..1ff992b6c20b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -13,8 +13,11 @@ enum intc_version { }; struct cpu_user_regs; +struct domain; +struct dt_device_node; struct irq_desc; struct kernel_info; +struct rangeset; struct vcpu; struct intc_info { @@ -32,6 +35,9 @@ struct intc_hw_operations { /* hw_irq_controller to enable/disable/eoi host irq */ const struct hw_interrupt_type *host_irq_type; + /* hw_irq_controller to enable/disable/eoi guest irq */ + const struct hw_interrupt_type *guest_irq_type; + /* Set IRQ type */ void (*set_irq_type)(struct irq_desc *desc, unsigned int type); /* Set IRQ priority */ @@ -63,6 +69,7 @@ struct vintc_ops { struct vintc { unsigned int irq_nums; + unsigned long *allocated_irqs; const struct vintc_init_ops *init_ops; const struct vintc_ops *ops; }; @@ -75,6 +82,7 @@ void register_intc_ops(const struct intc_hw_operations *ops, void intc_init(void); void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority); +int intc_route_irq_to_guest(struct irq_desc *desc, unsigned int priority); void intc_handle_external_irqs(struct cpu_user_regs *regs); @@ -83,4 +91,6 @@ unsigned int intc_irq_nums(void); int domain_vintc_init(struct domain *d); void domain_vintc_deinit(struct domain *d); +bool vintc_reserve_virq(const struct domain *d, unsigned int virq); + #endif /* ASM__RISCV__INTERRUPT_CONTOLLER_H */ diff --git a/xen/arch/riscv/include/asm/irq.h b/xen/arch/riscv/include/asm/irq.h index f633636dc308..98dd536be86e 100644 --- a/xen/arch/riscv/include/asm/irq.h +++ b/xen/arch/riscv/include/asm/irq.h @@ -49,6 +49,9 @@ void init_IRQ(void); void do_IRQ(struct cpu_user_regs *regs, unsigned int irq); +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname); + #endif /* ASM__RISCV__IRQ_H */ /* diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index 2215894cfbb1..9dbd3a8cbef7 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,6 +5,10 @@ #include +struct domain; +struct dt_device_node; +struct rangeset; + #define max_init_domid (0) void setup_mm(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 7f9850416bb4..a24c679c0cf8 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -7,7 +7,9 @@ #include #include #include +#include #include +#include #include #include @@ -86,6 +88,22 @@ unsigned int intc_irq_nums(void) return intc_hw_ops->irq_nums(); } +int intc_route_irq_to_guest(struct irq_desc *desc, + unsigned int priority) +{ + ASSERT(spin_is_locked(&desc->lock)); + + ASSERT(intc_hw_ops->guest_irq_type); + + desc->handler = intc_hw_ops->guest_irq_type; + set_bit(_IRQ_GUEST, &desc->status); + + intc_set_irq_type(desc, desc->arch.type); + intc_set_irq_priority(desc, priority); + + return 0; +} + int __init make_intc_domU_node(struct kernel_info *kinfo) { struct vintc *vintc = kinfo->bd.d->arch.vintc; @@ -112,6 +130,14 @@ int domain_vintc_init(struct domain *d) break; } + if ( !ret ) + { + d->arch.vintc->allocated_irqs = + xvzalloc_array(unsigned long, BITS_TO_LONGS(d->arch.vintc->irq_nums)); + if ( !d->arch.vintc->allocated_irqs ) + ret = -ENOMEM; + } + return ret; } @@ -129,4 +155,14 @@ void domain_vintc_deinit(struct domain *d) printk("vintc (ver:%d) isn't implemented\n", ver); break; } + + xvfree(d->arch.vintc->allocated_irqs); +} + +bool vintc_reserve_virq(const struct domain *d, unsigned int virq) +{ + if ( virq >= d->arch.vintc->irq_nums ) + return false; + + return !test_and_set_bit(virq, d->arch.vintc->allocated_irqs); } diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 25d329500212..4481ae23aa8e 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -12,11 +12,20 @@ #include #include #include +#include #include +#include #include #include +/* Describe an IRQ assigned to a guest */ +struct irq_guest +{ + struct domain *d; + unsigned int virq; +}; + static irq_desc_t irq_desc[NR_IRQS]; static bool irq_validate_new_type(unsigned int curr, unsigned int new) @@ -192,6 +201,15 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq) if ( desc->handler->ack ) desc->handler->ack(desc); + if ( desc->status & IRQ_GUEST ) + /* + * As at the moment APLIC + IMSIC is used for guest interrupts will + * be directly passed to guest. But if/when IMSIC won't be available + * all interrupts will go through Xenand here an irq injection + * will be necessary to do. + */ + panic("unimplemented"); + if ( desc->status & IRQ_DISABLED ) goto out; @@ -221,3 +239,160 @@ void do_IRQ(struct cpu_user_regs *regs, unsigned int irq) spin_unlock(&desc->lock); irq_exit(); } + +static inline struct irq_guest *irq_get_guest_info(struct irq_desc *desc) +{ + ASSERT(spin_is_locked(&desc->lock)); + ASSERT(test_bit(_IRQ_GUEST, &desc->status)); + ASSERT(desc->action != NULL); + + return desc->action->dev_id; +} + +static inline struct domain *irq_get_domain(struct irq_desc *desc) +{ + return irq_get_guest_info(desc)->d; +} + +void release_irq(unsigned int irq, const void *dev_id) +{ + struct irq_desc *desc; + unsigned long flags; + struct irqaction *action, **action_ptr; + + desc = irq_to_desc(irq); + + spin_lock_irqsave(&desc->lock,flags); + + action_ptr = &desc->action; +#ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION + for ( ;; ) + { + action = *action_ptr; + if ( !action ) + { + printk(XENLOG_WARNING "Trying to free already-free IRQ %u\n", irq); + spin_unlock_irqrestore(&desc->lock, flags); + return; + } + + if ( action->dev_id == dev_id ) + break; + + action_ptr = &action->next; + } + + /* Found it - remove it from the action list */ + *action_ptr = action->next; +#else + action = *action_ptr; +#endif + + /* If this was the last action, shut down the IRQ */ + if ( !desc->action ) + { + desc->handler->shutdown(desc); + clear_bit(_IRQ_GUEST, &desc->status); + } + + spin_unlock_irqrestore(&desc->lock,flags); + + /* Wait to make sure it's not being used on another CPU */ + do { smp_mb(); } while ( test_bit(_IRQ_INPROGRESS, &desc->status) ); + + if ( action->free_on_release ) + xvfree(action); +} + +/* Route an IRQ to a specific guest */ +int route_irq_to_guest(struct domain *d, unsigned int virq, + unsigned int irq, const char *devname) +{ + struct irqaction *action; + struct irq_guest *info; + struct irq_desc *desc; + unsigned long flags; + int retval = 0; + + desc = irq_to_desc(irq); + + action = xvmalloc(struct irqaction); + if ( !action ) + return -ENOMEM; + + info = xvmalloc(struct irq_guest); + if ( !info ) + { + xvfree(action); + return -ENOMEM; + } + + info->d = d; + info->virq = virq; + + action->dev_id = info; + action->name = devname; + action->free_on_release = 1; + + spin_lock_irqsave(&desc->lock, flags); + + /* + * If the IRQ is already used by someone + * - If it's the same domain -> Xen doesn't need to update the IRQ desc. + * For safety check if we are not trying to assign the IRQ to a + * different vIRQ. + * - Otherwise -> For now, don't allow the IRQ to be shared between + * Xen and domains. + */ + if ( desc->action != NULL ) + { + if ( test_bit(_IRQ_GUEST, &desc->status) ) + { + struct domain *ad = irq_get_domain(desc); + + if ( d != ad ) + { + printk(XENLOG_G_ERR "IRQ %u is already used by domain %u\n", + irq, ad->domain_id); + retval = -EBUSY; + } + else if ( irq_get_guest_info(desc)->virq != virq ) + { + printk(XENLOG_G_ERR + "d%u: IRQ %u is already assigned to vIRQ %u\n", + d->domain_id, irq, irq_get_guest_info(desc)->virq); + retval = -EBUSY; + } + } + else + { + printk(XENLOG_G_ERR "IRQ %u is already used by Xen\n", irq); + retval = -EBUSY; + } + goto out; + } + + retval = _setup_irq(desc, 0, action); + if ( retval ) + goto out; + + retval = intc_route_irq_to_guest(desc, IRQ_NO_PRIORITY); + + spin_unlock_irqrestore(&desc->lock, flags); + + if ( retval ) + { + release_irq(desc->irq, info); + goto free_info; + } + + return 0; + + out: + spin_unlock_irqrestore(&desc->lock, flags); + xvfree(action); + free_info: + xvfree(info); + + return retval; +} -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303793.1577147 (Exim 4.92) (envelope-from ) id 1wLMR2-0002Ie-NL; Fri, 08 May 2026 14:44:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303793.1577147; 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Date: Fri, 8 May 2026 16:43:22 +0200 Message-ID: <736349477470f316da7020c4c1c7e92e37470d31.1778250616.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778251447-28678C48-FCBD3EF2/10/73395122804 X-purgate-type: spam X-purgate-size: 2205 These definitions are required for correct decoding of APLIC MMIO accesses and target configuration, and will be used by both the physical and virtual APLIC implementations. No functional change is intended by this patch; it only centralises hardware definitions that were previously missing. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- xen/arch/riscv/include/asm/aplic.h | 35 ++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index b42b159496b8..e418fc53433b 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,11 @@ #include +#define APLIC_REG_OFFSET_MASK 0x3fff +#define APLIC_TARGET_IPRIO_MASK 0xff +#define APLIC_TARGET_GUEST_IDX_SHIFT 12 +#define APLIC_TARGET_EIID_MASK 0x7ff + #define APLIC_DOMAINCFG_RO80 (0x80U << 24) #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) @@ -26,6 +31,36 @@ #define APLIC_SOURCECFG_SM_LEVEL_HIGH 0x6 #define APLIC_SOURCECFG_SM_LEVEL_LOW 0x7 +#define APLIC_DOMAINCFG 0x0000 +#define APLIC_SOURCECFG_BASE 0x0004 +#define APLIC_SOURCECFG_LAST 0x0ffc + +#define APLIC_SMSICFGADDR 0x1bc8 +#define APLIC_SMSICFGADDRH 0x1bcc + +#define APLIC_SETIP_BASE 0x1c00 +#define APLIC_SETIP_LAST 0x1c7c +#define APLIC_SETIPNUM 0x1cdc + +#define APLIC_CLRIP_BASE 0x1d00 +#define APLIC_CLRIP_LAST 0x1d7c +#define APLIC_CLRIPNUM 0x1ddc + +#define APLIC_SETIE_BASE 0x1e00 +#define APLIC_SETIE_LAST 0x1e7c +#define APLIC_SETIENUM 0x1edc + +#define APLIC_CLRIE_BASE 0x1f00 +#define APLIC_CLRIE_LAST 0x1f7c +#define APLIC_CLRIENUM 0x1fdc + +#define APLIC_SETIPNUM_LE 0x2000 + +#define APLIC_GENMSI 0x3000 + +#define APLIC_TARGET_BASE 0x3004 +#define APLIC_TARGET_LAST 0x3ffc + #define APLIC_TARGET_HART_IDX_SHIFT 18 #define APLIC_IDC_SIZE 32 -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303805.1577155 (Exim 4.92) (envelope-from ) id 1wLMR4-0002bn-Gb; Fri, 08 May 2026 14:44:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303805.1577155; Fri, 08 May 2026 14:44:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR3-0002Wz-GC; Fri, 08 May 2026 14:44:13 +0000 Received: by outflank-mailman (input) for mailman id 1303805; Fri, 08 May 2026 14:44:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMQz-0001g9-9w for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMQy-007XaD-LF for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:08 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a0-2eae-0a2a0a5409dd-0a2a450197ec-16 for ; Fri, 08 May 2026 16:44:08 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6b8-c1f2-0a2a45010019-d155da35b4a7-3 for ; Fri, 08 May 2026 16:44:08 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bc1f3a393c0so315224166b.0 for ; Fri, 08 May 2026 07:44:08 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Xen must intercept these accesses to enforce interrupt isolation between domains and to translate guest routing intent into the underlying physical MSI topology. Writes are gated by the domain's authorised interrupt bitmap so that a guest cannot affect interrupts it does not own. TARGET register writes additionally require translation of the hart and IMSIC guest-file indices from virtual to physical, as the APLIC uses these fields directly to compute the MSI delivery address. Delegation (APLIC_SOURCECFG_D) is not yet supported. Co-developed-by: Romain Caritey Signed-off-by: Oleksii Kurochko --- Changes in v2: - Merge the following patches into one: xen/riscv: add vaplic access check: - Add check that address is properly aligned. - Check vaplic range intead of APLIC one. - Return bool from vaplic_is_access instead of int. xen/riscv: emulate guest writes to virtual APLIC MMIO - Drop CALC_REG_VALUE. - Use unsigned int instead of uin32_t for offset. - s/.../subtracting in the comment. - start one line comments from the upper case. - Check the value before being written to sourcecfg register. - 'unsigned int' for loop index. - Omit unneessary braces. - s/vaplic_update_target/aplic_msi_target_gen. - Use IMSIC_MMIO_PAGE_SHIFT instead of 12 in aplic_msi_target_gen(). - Drop explicit usage of APLIC register in store function. - Drop APLIC_REG_{GET,SET} macros and introudce APLIC specific funtcions. - Ignore write to SOURCECFG_BASE when value is out-of-range. - Drop ASSERT(!target_vcpu) inside handler of targer register setting, just avoid such writings + debug message. - domain_crash() instead of panic() in the case of default case. - Drop ASSERT() in APLIC_SOURCE_CFG_BASE case and use domain_crash() instead. xen/riscv: emulate guest reads from virtual APLIC MMIO: - s/regval_to_irqn/regindx_to_irqn. - pass to to_vaplic() a domain instead of vintc. - add check that load access is aligned. - instead of panic() just crash a domain(). - use 'unsigned int' for local variable offset. - Return 0 in the case APLIC_CLRIE_BASE ...APLIC_CLRIE_LAST reading to follow AIA spec. - Drop explicit usage of physical APLIC registers. --- xen/arch/riscv/aplic.c | 25 +++ xen/arch/riscv/include/asm/aplic.h | 9 + xen/arch/riscv/include/asm/intc.h | 10 +- xen/arch/riscv/include/asm/vaplic.h | 3 + xen/arch/riscv/vaplic.c | 289 +++++++++++++++++++++++++++- 5 files changed, 333 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1c8fd0145eb2..1976733dfbaa 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -40,6 +40,31 @@ static struct intc_info __ro_after_init aplic_info = { .hw_version = INTC_APLIC, }; +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask) +{ + unsigned long flags; + uint32_t val; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + val = readl((void __iomem *)((uintptr_t)aplic.regs + offset)) & mask; + spin_unlock_irqrestore(&aplic.lock, flags); + + return val; +} + +void aplic_hw_write_reg(unsigned int offset, uint32_t value) +{ + unsigned long flags; + + ASSERT(offset < aplic.size); + + spin_lock_irqsave(&aplic.lock, flags); + writel(value, (void __iomem *)((uintptr_t)aplic.regs + offset)); + spin_unlock_irqrestore(&aplic.lock, flags); +} + static void __init aplic_init_hw_interrupts(void) { unsigned int i; diff --git a/xen/arch/riscv/include/asm/aplic.h b/xen/arch/riscv/include/asm/aplic.h index e418fc53433b..7905db9876d4 100644 --- a/xen/arch/riscv/include/asm/aplic.h +++ b/xen/arch/riscv/include/asm/aplic.h @@ -15,6 +15,8 @@ #include +#define APLIC_NUM_REGS 32 + #define APLIC_REG_OFFSET_MASK 0x3fff #define APLIC_TARGET_IPRIO_MASK 0xff #define APLIC_TARGET_GUEST_IDX_SHIFT 12 @@ -24,6 +26,8 @@ #define APLIC_DOMAINCFG_IE BIT(8, U) #define APLIC_DOMAINCFG_DM BIT(2, U) +#define APLIC_SOURCECFG_D BIT(10, U) + #define APLIC_SOURCECFG_SM_INACTIVE 0x0 #define APLIC_SOURCECFG_SM_DETACH 0x1 #define APLIC_SOURCECFG_SM_EDGE_RISE 0x4 @@ -71,6 +75,8 @@ #define APLIC_SIZE(nr_cpus) (APLIC_MIN_SIZE + \ APLIC_SIZE_ALIGN(APLIC_IDC_SIZE * (nr_cpus))) +#define APLIC_SETCLR_OFFSET_MASK ((32 * sizeof(uint32_t)) - 1) + struct aplic_regs { uint32_t domaincfg; /* 0x0000 */ uint32_t sourcecfg[1023]; /* 0x0004 */ @@ -114,4 +120,7 @@ struct aplic_regs { uint32_t target[1023]; /* 0x3008 */ }; +uint32_t aplic_hw_read_reg(unsigned int offset, uint32_t mask); +void aplic_hw_write_reg(unsigned int offset, uint32_t value); + #endif /* ASM_RISCV_APLIC_H */ diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 1ff992b6c20b..641c83125a5b 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -64,7 +64,15 @@ struct vintc_ops { int (*vcpu_init)(struct vcpu *v); /* Check if a address is virtual interrupt controller MMIO */ - int (*is_access)(const struct vcpu *v, unsigned long addr); + bool (*is_access)(const struct vcpu *v, unsigned long addr); + + /* Emulate load to virtual interrupt controller MMIOs */ + int (*emulate_load)(const struct vcpu *vcpu, unsigned long addr, + uint32_t *out); + + /* Emulate store to virtual interrupt controller MMIOs */ + int (*emulate_store)(const struct vcpu *vcpu, unsigned long addr, + uint32_t in); }; struct vintc { diff --git a/xen/arch/riscv/include/asm/vaplic.h b/xen/arch/riscv/include/asm/vaplic.h index 630ca14657f2..0fa690fcb2d7 100644 --- a/xen/arch/riscv/include/asm/vaplic.h +++ b/xen/arch/riscv/include/asm/vaplic.h @@ -26,6 +26,9 @@ struct vaplic_regs { struct vaplic { struct vintc vintc; struct vaplic_regs regs; + + paddr_t regs_start; + paddr_t regs_size; }; int domain_vaplic_init(struct domain *d); diff --git a/xen/arch/riscv/vaplic.c b/xen/arch/riscv/vaplic.c index 3f967464335a..57c3433ba03b 100644 --- a/xen/arch/riscv/vaplic.c +++ b/xen/arch/riscv/vaplic.c @@ -26,6 +26,283 @@ #define FDT_VAPLIC_INT_CELLS 2 +#define AUTH_IRQ_BIT(d, irqn) ( \ + ((irqn) <= (d)->arch.vintc->irq_nums) && \ + test_bit(irqn, (d)->arch.vintc->allocated_irqs) ) + +#define regindx_to_irqn(reg_val) ((reg_val) / sizeof(uint32_t)) + +static inline uint32_t generate_auth_mask(const struct domain *d, + unsigned int irqsn) +{ + if ( irqsn >= DIV_ROUND_UP(d->arch.vintc->irq_nums, + sizeof(uint32_t) * BITS_PER_BYTE) ) + { + dprintk(XENLOG_DEBUG, "incorrect irqsn(%d) is passed\n", irqsn); + + return 0U; + } + + return *((uint32_t *)d->arch.vintc->allocated_irqs + irqsn); +} + +static int vaplic_emulate_load(const struct vcpu *vcpu, + const unsigned long addr, uint32_t *out) +{ + const struct domain *d = vcpu->domain; + const struct vaplic *vaplic = to_vaplic(d); + const unsigned int offset = addr & APLIC_REG_OFFSET_MASK; + uint32_t auth_mask; + unsigned int i; + + switch ( offset ) + { + case APLIC_DOMAINCFG: + *out = vaplic->regs.domaincfg; + + return 0; + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + /* + * Based on the RISC-V AIA spec a read of these registers + * always returns zero + */ + *out = 0; + + return 0; + + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + i = regindx_to_irqn(offset & APLIC_SETCLR_OFFSET_MASK); + auth_mask = generate_auth_mask(d, i); + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + /* + * As target registers start for 1: + * 0x3000 genmsi + * 0x3004 target[1] + * 0x3008 target[2] + * ... + * 0x3FFC target[1023] + * It is necessary to calculate an interrupt number by substracting + * of APLIC_GENMSI instead of APLIC_TARGET_BASE. + */ + i = regindx_to_irqn(offset - APLIC_GENMSI); + + if ( !AUTH_IRQ_BIT(d, i) ) + { + *out = 0; + + return 0; + } + + auth_mask = ~0U; + + break; + + default: + gdprintk(XENLOG_WARNING, "Unhandled APLIC read at offset %#x\n", + offset); + + domain_crash(vcpu->domain); + + return -EINVAL; + } + + *out = aplic_hw_read_reg(offset, auth_mask); + + return 0; +} + +static uint32_t aplic_msi_target_gen(const struct vcpu *target_vcpu, + uint32_t base_val) +{ + const struct imsic_config *imsic = imsic_get_config(); + unsigned int guest_id = vcpu_guest_file_id(target_vcpu); + unsigned long hart_id = cpuid_to_hartid(target_vcpu->processor); + unsigned long group_index; + unsigned int hhxw = imsic->group_index_bits; + unsigned int lhxw = imsic->hart_index_bits; + unsigned int hhxs = imsic->group_index_shift - IMSIC_MMIO_PAGE_SHIFT * 2; + unsigned long base_ppn = imsic->msi[hart_id].base_addr >> IMSIC_MMIO_PAGE_SHIFT; + + group_index = (base_ppn >> (hhxs + IMSIC_MMIO_PAGE_SHIFT)) & (BIT(hhxw, UL) - 1); + + base_val &= APLIC_TARGET_EIID_MASK; + base_val |= guest_id << APLIC_TARGET_GUEST_IDX_SHIFT; + base_val |= hart_id << APLIC_TARGET_HART_IDX_SHIFT; + base_val |= group_index << (lhxw + APLIC_TARGET_HART_IDX_SHIFT); + + return base_val; +} + +static int cf_check vaplic_emulate_store(const struct vcpu *vcpu, + unsigned long addr, uint32_t value) +{ + int rc = -EINVAL; + const struct domain *d = vcpu->domain; + unsigned int offset = addr & APLIC_REG_OFFSET_MASK; + + switch ( offset ) + { + case APLIC_SETIP_BASE ... APLIC_SETIP_LAST: + case APLIC_CLRIP_BASE ... APLIC_CLRIP_LAST: + case APLIC_SETIE_BASE ... APLIC_SETIE_LAST: + case APLIC_CLRIE_BASE ... APLIC_CLRIE_LAST: + { + unsigned int irqn = regindx_to_irqn(offset & APLIC_SETCLR_OFFSET_MASK); + value &= generate_auth_mask(d, irqn); + + break; + } + + case APLIC_SOURCECFG_BASE ... APLIC_SOURCECFG_LAST: + if ( value & APLIC_SOURCECFG_D ) + { + rc = -EOPNOTSUPP; + + dprintk(XENLOG_ERR, "APLIC_SOURCECFG_D isn't supported\n"); + + goto fail; + } + + /* + * As sourcecfg register starts from 1: + * 0x0000 domaincfg + * 0x0004 sourcecfg[1] + * 0x0008 sourcecfg[2] + * ... + * 0x0FFC sourcecfg[1023] + * It is necessary to calculate an interrupt number by subtracting + * of APLIC_DOMAINCFG instead of APLIC_SOURCECFG_BASE. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_DOMAINCFG)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + if ( value > APLIC_SOURCECFG_SM_LEVEL_LOW ) + { + gdprintk(XENLOG_ERR, + "value(%u) is incorrect for sourcecfg register\n", value); + + return 0; + } + + break; + + case APLIC_TARGET_BASE ... APLIC_TARGET_LAST: + { + struct vcpu *target_vcpu = NULL; + + /* + * Look at vaplic_emulate_load() for explanation why + * APLIC_GENMSI is subtracted. + */ + if ( !AUTH_IRQ_BIT(d, regindx_to_irqn(offset - APLIC_GENMSI)) ) + /* Interrupt not enabled, ignore it */ + return 0; + + for ( unsigned int i = 0; i < vcpu->domain->max_vcpus; i++ ) + { + struct vcpu *v = vcpu->domain->vcpu[i]; + + if ( v->vcpu_id == (value >> APLIC_TARGET_HART_IDX_SHIFT) ) + { + target_vcpu = v; + break; + } + } + + if ( !target_vcpu ) + { + dprintk(XENLOG_ERR, "Invalid vCPU id in target register\n"); + + /* Ignore such writings */ + return 0; + } + + value = aplic_msi_target_gen(target_vcpu, value); + + break; + } + + case APLIC_SETIPNUM: + case APLIC_SETIPNUM_LE: + case APLIC_CLRIPNUM: + case APLIC_SETIENUM: + case APLIC_CLRIENUM: + if ( !value || !AUTH_IRQ_BIT(d, value) ) + return 0; + + break; + + case APLIC_DOMAINCFG: + /* + * TODO: + * The domaincfg register has this format: + * bits 31:24 read-only 0x80 + * bit 8 IE + * bit 7 read-only 0 + * bit 2 DM (WARL) + * bit 0 BE (WARL) + * + * The most interesting bit for us is IE(Interrupt Enable) bit. + * At the moment, at least, Linux doesn't use domaincfg.IE bit to + * disable interrupts globally, but if one day someone will use it + * then extra actions should be done. + */ + + printk_once("%s: Ignore writes to domaincfg as it is set by aplic " + " during initialization in Xen\n", __func__); + + return 0; + + default: + goto fail; + } + + aplic_hw_write_reg(offset, value); + + return 0; + + fail: + domain_crash(vcpu->domain, + "Unhandled APLIC write at offset %#x (value %#x)\n", offset, + value); + + return rc; +} + +static bool cf_check vaplic_is_access(const struct vcpu *vcpu, + unsigned long addr) +{ + const struct vaplic *vaplic = to_vaplic(vcpu->domain); + paddr_t start = vaplic->regs_start; + paddr_t end = vaplic->regs_start + vaplic->regs_size; + + if ( addr & 0x3 ) + { + dprintk(XENLOG_DEBUG, + "APLIC MMIO address should be properly aligned\n"); + + return false; + } + + /* check if it is an APLIC access */ + if ( start <= addr && addr < end ) + return true; + + return false; +} + static int cf_check vcpu_vaplic_init(struct vcpu *v) { int rc = 0; @@ -54,19 +331,24 @@ static int cf_check vcpu_vaplic_init(struct vcpu *v) static int __init cf_check vaplic_make_domu_dt_node(struct kernel_info *kinfo) { + struct domain *d = kinfo->bd.d; int res = 0; void *fdt = kinfo->fdt; unsigned int msi_parent_phandle; char vaplic_name[128]; paddr_t aplic_addr = GUEST_APLIC_S_BASE; - paddr_t aplic_size = APLIC_SIZE(kinfo->bd.d->max_vcpus); + paddr_t aplic_size = APLIC_SIZE(d->max_vcpus); const __be32 reg[] = { cpu_to_be32(aplic_addr >> 32), cpu_to_be32(aplic_addr), cpu_to_be32(aplic_size >> 32), cpu_to_be32(aplic_size), }; - struct vintc *vintc = kinfo->bd.d->arch.vintc; + struct vintc *vintc = d->arch.vintc; + struct vaplic *vaplic = to_vaplic(d); + + vaplic->regs_start = GUEST_APLIC_S_BASE; + vaplic->regs_size = aplic_size; res = snprintf(vaplic_name, sizeof(vaplic_name), "/soc/aplic@%x", GUEST_APLIC_S_BASE); @@ -121,6 +403,9 @@ static const struct vintc_init_ops __initdata init_ops = { static const struct vintc_ops vintc_ops = { .vcpu_init = vcpu_vaplic_init, + .is_access = vaplic_is_access, + .emulate_store = vaplic_emulate_store, + .emulate_load = vaplic_emulate_load, }; int __init domain_vaplic_init(struct domain *d) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303807.1577159 (Exim 4.92) (envelope-from ) id 1wLMR6-0002vE-1f; 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Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- xen/arch/riscv/dom0less-build.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index 4cc00012aa8d..a1fa51b996a7 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -4,9 +4,26 @@ #include #include #include +#include #include +int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, + const int node_next, const void *pfdt) +{ + if ( dt_node_cmp(name, "intc") == 0 ) + { + uint32_t phandle_intc = fdt_get_phandle(pfdt, node_next); + + if ( phandle_intc != 0 ) + kinfo->phandle_intc = phandle_intc; + + return 0; + } + + return 1; +} + int __init make_arch_nodes(struct kernel_info *kinfo) { /* No RISC-V specific nodes need to be made, at the moment. */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303811.1577172 (Exim 4.92) (envelope-from ) id 1wLMR8-0003Up-TA; Fri, 08 May 2026 14:44:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303811.1577172; Fri, 08 May 2026 14:44:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR7-0003Pi-Gw; Fri, 08 May 2026 14:44:17 +0000 Received: by outflank-mailman (input) for mailman id 1303811; Fri, 08 May 2026 14:44:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR1-0002Ba-UH for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR1-007XaD-9g for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:11 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-32 for ; Fri, 08 May 2026 16:44:11 +0200 Received: from [209.85.218.44] (helo=mail-ej1-f44.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bb-af86-0a2a45020019-d155da2cd8c6-3 for ; Fri, 08 May 2026 16:44:11 +0200 Received: by mail-ej1-f44.google.com with SMTP id a640c23a62f3a-bad54961385so338805566b.2 for ; Fri, 08 May 2026 07:44:11 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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The scheduler must be initialized prior to do_initcalls() because cpupool_create_pool() is called during initcalls; without it, BUG_ON(IS_ERR(pool)) is triggered inside cpupool_create_pool(). Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. Several patches were folded into one. --- xen/arch/riscv/setup.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index 56a0907a855f..c3e98733ebc3 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -6,9 +6,12 @@ #include #include #include +#include #include #include #include +#include +#include #include #include #include @@ -156,12 +159,21 @@ void __init noreturn start_xen(unsigned long bootcpu_id, timer_init(); + rcu_init(); + + setup_system_domains(); + local_irq_enable(); console_init_postirq(); guest_mm_init(); + scheduler_init(); + set_current(idle_vcpu[0]); + + do_initcalls(); + printk("All set up\n"); machine_halt(); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303819.1577177 (Exim 4.92) (envelope-from ) id 1wLMRA-0003p6-76; Fri, 08 May 2026 14:44:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303819.1577177; Fri, 08 May 2026 14:44:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMR9-0003jz-5g; Fri, 08 May 2026 14:44:19 +0000 Received: by outflank-mailman (input) for mailman id 1303819; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR3-0002WB-Cl for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR2-005krU-OQ for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:12 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a6-bab6-0a2a0a5309dd-0a2a450581d0-44 for ; Fri, 08 May 2026 16:44:12 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bc-aaa8-0a2a45050019-d155d02dd96c-3 for ; Fri, 08 May 2026 16:44:12 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-67c566cb519so3921629a12.3 for ; Fri, 08 May 2026 07:44:12 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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For full guesst console support it will better to have something similar to [1], thereby there is nothing specific should be done, at least, for now and init_vuart() is provided to make dom0less code buildable. [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602041533440.3175371@ubuntu-linux-20-04-desktop/ Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich --- Changes in v2: - Add Acked-by: Jan Beulich . --- xen/arch/riscv/dom0less-build.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index a1fa51b996a7..d1a51b92936a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -8,6 +8,14 @@ #include +int __init init_vuart(struct domain *d, struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + /* Nothing to do at the moment */ + + return 0; +} + int __init init_intc_phandle(struct kernel_info *kinfo, const char *name, const int node_next, const void *pfdt) { -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303824.1577189 (Exim 4.92) (envelope-from ) id 1wLMRC-0004B3-26; Fri, 08 May 2026 14:44:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303824.1577189; Fri, 08 May 2026 14:44:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMRA-000427-SJ; Fri, 08 May 2026 14:44:20 +0000 Received: by outflank-mailman (input) for mailman id 1303824; Fri, 08 May 2026 14:44:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLMR4-0002gH-As for xen-devel@lists.xenproject.org; Fri, 08 May 2026 14:44:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLMR3-007XaD-M5 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:44:13 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fdf6a5-2eae-0a2a0a5409dd-0a2a4502de26-42 for ; Fri, 08 May 2026 16:44:13 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fdf6bd-af86-0a2a45020019-d155da35e4fd-3 for ; Fri, 08 May 2026 16:44:13 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bb91b426e40so355083466b.0 for ; Fri, 08 May 2026 07:44:13 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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Add stub implementations for architecture-specific helpers used when building domains from the device tree. These currently perform no additional work but allow the generic dom0less code to build and run on RISC-V. Introduce max_init_domid as a runtime variable rather than a constant so that it can be updated during dom0less domain creation. Provide missing helpers and definitions required by the domain construction code, including domain bitness helpers and the p2m_set_allocation() prototype. Additionally define the guest magic memory region in the public RISC-V interface. As HAS_DOM0LESS is selected for RISC-V now it could be a compilation issue if CONFIG_STATIC_MEMORY=y as guest_physmap_add_pages() isn't yet provided. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Move declaration of p2m_set_allocation() to p2m-common.h. - Add __initdata for max_init_domid and drop initalizer for it. - Add CONFIG_STATIC_MEMORY=n to CI's randconfig to avoid compilation error because of guest_physmap_add_pages() isn't provided. - Select HAS_DOMAIN_TYPE for RISC-V and drop things which were introduced when HAS_DOMAIN_TYPE doesn't exist. --- automation/gitlab-ci/build.yaml | 1 + xen/arch/riscv/Kconfig | 2 ++ xen/arch/riscv/dom0less-build.c | 6 ++++++ xen/arch/riscv/domain-build.c | 13 +++++++++++++ xen/arch/riscv/include/asm/guest-layout.h | 3 +++ xen/arch/riscv/include/asm/setup.h | 4 +++- xen/arch/riscv/setup.c | 2 ++ 7 files changed, 30 insertions(+), 1 deletion(-) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index f05895729147..3c3e7cb356a4 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -805,6 +805,7 @@ debian-13-riscv64-gcc: CONFIG_GRANT_TABLE=n CONFIG_LIVEPATCH=n CONFIG_QEMU_PLATFORM=y + CONFIG_STATIC_MEMORY=n CONFIG_VM_EVENT=n CONFIG_XSM=n diff --git a/xen/arch/riscv/Kconfig b/xen/arch/riscv/Kconfig index 48520588fe40..d8a348c0cf07 100644 --- a/xen/arch/riscv/Kconfig +++ b/xen/arch/riscv/Kconfig @@ -6,6 +6,8 @@ config RISCV select GENERIC_BUG_FRAME select GENERIC_UART_INIT select HAS_DEVICE_TREE_DISCOVERY + select HAS_DOM0LESS + select HAS_DOMAIN_TYPE select HAS_EX_TABLE select HAS_PMAP select HAS_UBSAN diff --git a/xen/arch/riscv/dom0less-build.c b/xen/arch/riscv/dom0less-build.c index d1a51b92936a..b5390175538a 100644 --- a/xen/arch/riscv/dom0less-build.c +++ b/xen/arch/riscv/dom0less-build.c @@ -102,3 +102,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, return 0; } + +int __init arch_handle_passthrough_prop(struct kernel_info *kinfo, + struct dt_device_node *node) +{ + return 0; +} diff --git a/xen/arch/riscv/domain-build.c b/xen/arch/riscv/domain-build.c index 02b293239142..a70306434fc9 100644 --- a/xen/arch/riscv/domain-build.c +++ b/xen/arch/riscv/domain-build.c @@ -158,9 +158,22 @@ int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) return fdt_end_node(fdt); } +int __init construct_hwdom(struct kernel_info *kinfo, + const struct dt_device_node *node) +{ + return -EOPNOTSUPP; +} + int __init make_timer_node(const struct kernel_info *kinfo) { /* There is no need for timer node for RISC-V. */ return 0; } + +int __init make_hypervisor_node(struct domain *d, + const struct kernel_info *kinfo, + int addrcells, int sizecells) +{ + return -EOPNOTSUPP; +} diff --git a/xen/arch/riscv/include/asm/guest-layout.h b/xen/arch/riscv/include/asm/guest-layout.h index b16ec79c3786..81cc87545054 100644 --- a/xen/arch/riscv/include/asm/guest-layout.h +++ b/xen/arch/riscv/include/asm/guest-layout.h @@ -24,4 +24,7 @@ #define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } #define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } +#define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000) +#define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000) + #endif /* ASM_RISCV_GUEST_LAYOUT_H */ diff --git a/xen/arch/riscv/include/asm/setup.h b/xen/arch/riscv/include/asm/setup.h index 9dbd3a8cbef7..416d2301dcde 100644 --- a/xen/arch/riscv/include/asm/setup.h +++ b/xen/arch/riscv/include/asm/setup.h @@ -5,11 +5,13 @@ #include +#include + struct domain; struct dt_device_node; struct rangeset; -#define max_init_domid (0) +extern domid_t max_init_domid; void setup_mm(void); diff --git a/xen/arch/riscv/setup.c b/xen/arch/riscv/setup.c index c3e98733ebc3..b8fa004cbf25 100644 --- a/xen/arch/riscv/setup.c +++ b/xen/arch/riscv/setup.c @@ -33,6 +33,8 @@ #include #include +domid_t __initdata max_init_domid; + /* Xen stack for bringing up the first CPU. */ unsigned char __initdata cpu0_boot_stack[STACK_SIZE] __aligned(STACK_SIZE); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 14:44:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 14:44:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1303827.1577194 (Exim 4.92) (envelope-from ) id 1wLMRD-0004S3-IH; Fri, 08 May 2026 14:44:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1303827.1577194; Fri, 08 May 2026 14:44:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLMRC-0004M8-53; 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No rmb() is needed on the do_IRQ() side because desc->status is read under a spinlock, which implies an acquire barrier. No barrier is needed in aplic_irq_disable() because the hardware disables the interrupt before the status is updated, so do_IRQ() cannot fire, and spin_unlock() makes the updated value visible. Fixes: d4676a1398bc5 ("xen/riscv: implementation of aplic and imsic operations") Signed-off-by: Oleksii Kurochko --- Changes in v2: - New patch. --- xen/arch/riscv/aplic.c | 5 +++++ xen/arch/riscv/irq.c | 3 --- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c index 1976733dfbaa..7933a00772a8 100644 --- a/xen/arch/riscv/aplic.c +++ b/xen/arch/riscv/aplic.c @@ -161,6 +161,9 @@ static void cf_check aplic_irq_enable(struct irq_desc *desc) spin_lock(&aplic.lock); + desc->status &= ~IRQ_DISABLED; + wmb(); + /* Enable interrupt in IMSIC */ imsic_irq_enable(desc->irq); @@ -189,6 +192,8 @@ static void cf_check aplic_irq_disable(struct irq_desc *desc) /* Disable interrupt in IMSIC */ imsic_irq_disable(desc->irq); + desc->status |= IRQ_DISABLED; + spin_unlock(&aplic.lock); } diff --git a/xen/arch/riscv/irq.c b/xen/arch/riscv/irq.c index 4481ae23aa8e..f9c10a7c9faf 100644 --- a/xen/arch/riscv/irq.c +++ b/xen/arch/riscv/irq.c @@ -145,9 +145,6 @@ int setup_irq(unsigned int irq, unsigned int irqflags, struct irqaction *new) desc->handler->set_affinity(desc, cpumask_of(smp_processor_id())); desc->handler->startup(desc); - - /* Enable irq */ - desc->status &= ~IRQ_DISABLED; } err: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 08 16:28:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 16:28:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304027.1577226 (Exim 4.92) (envelope-from ) id 1wLO3q-0002Ps-Sc; Fri, 08 May 2026 16:28:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304027.1577226; Fri, 08 May 2026 16:28:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLO3q-0002Pl-Pw; Fri, 08 May 2026 16:28:22 +0000 Received: by outflank-mailman (input) for mailman id 1304027; Fri, 08 May 2026 16:28:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLO3p-0002Nd-9M for xen-devel@lists.xenproject.org; Fri, 08 May 2026 16:28:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLO3o-007knQ-Ma for xen-devel@lists.xenproject.org; Fri, 08 May 2026 18:28:20 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe0eed-e002-0a2a0a5209dd-0a2a45028ab8-32 for ; Fri, 08 May 2026 18:28:20 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe0f24-af86-0a2a45020019-d155802ba5a5-3 for ; Fri, 08 May 2026 18:28:20 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so14953325e9.1 for ; Fri, 08 May 2026 09:28:20 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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This supercedes https://lore.kernel.org/xen-devel/94ffdeb1-6826-4c3a-a9c1-3ccc8b129a61@durham.ac.uk/T/#u using Anthony's suggested approach. Failed run: https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14282279751 Succeeding run (same container): https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14282714527 --- tools/libs/light/libxl_nocpuid.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/tools/libs/light/libxl_nocpuid.c b/tools/libs/light/libxl_nocpuid.c index 0630959e760c..ce334633b376 100644 --- a/tools/libs/light/libxl_nocpuid.c +++ b/tools/libs/light/libxl_nocpuid.c @@ -40,11 +40,21 @@ int libxl__cpuid_legacy(libxl_ctx *ctx, uint32_t domid, bool restore, return 0; } +#ifdef HAVE_LIBJSONC +int libxl_cpuid_policy_list_gen_jso(json_object **jso_r, libxl_cpuid_policy_list *pl) +{ + *jso_r = NULL; + return 0; +} +#endif + +#ifdef HAVE_LIBYAJL yajl_gen_status libxl_cpuid_policy_list_gen_json(yajl_gen hand, libxl_cpuid_policy_list *pcpuid) { return 0; } +#endif int libxl__cpuid_policy_list_parse_json(libxl__gc *gc, const libxl__json_object *o, -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 16:36:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 16:36:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304039.1577236 (Exim 4.92) (envelope-from ) id 1wLOBu-00047d-LH; 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The CH382 is available in two > variants: > - CH382 2S [1c00:3253]: 2 serial ports > - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port > > This chip uses IO BAR0, base baud rate 115200, ports starting at offset > 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] > > [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html > > Signed-off-by: Jiaqing Zhao > --- > xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 878da27f2e..106ef56316 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -95,6 +95,7 @@ struct ns16550_config { > param_exar_xr17v354, > param_exar_xr17v358, > param_intel_lpss, > + param_wch_ch382, > } param; > }; > > @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { > .mmio = 1, > .max_ports = 1, > }, > + [param_wch_ch382] = { > + .base_baud = 115200, > + .first_offset = 0xc0, > + .uart_offset = 8, > + .reg_width = 1, > + .fifo_size = 256, > + .lsr_mask = UART_LSR_THRE, > + .bar0 = 1, > + .max_ports = 2, > + }, > }; > > static const struct ns16550_config __initconst uart_config[] = > @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = > .dev_id = 0x7adc, > .param = param_intel_lpss > }, > + /* WCH CH382 2S */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3253, > + .param = param_wch_ch382 > + }, > + /* WCH CH382 2S1P */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3250, > + .param = param_wch_ch382 > + }, Suggest to keep the records sorted by .dev_id field. With that: Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Fri May 08 20:29:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:29:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304093.1577246 (Exim 4.92) (envelope-from ) id 1wLRoj-0000UX-Ev; Fri, 08 May 2026 20:29:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304093.1577246; Fri, 08 May 2026 20:29:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRoj-0000UQ-9u; Fri, 08 May 2026 20:29:01 +0000 Received: by outflank-mailman (input) for mailman id 1304093; Fri, 08 May 2026 20:29:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRoi-0000UK-Ct for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:29:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRog-00Ap9l-Ao for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:28:58 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe475c-e002-0a2a0a5209dd-0a2a4503ec68-26 for ; Fri, 08 May 2026 22:28:58 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe4789-672d-0a2a45030019-a0658309b772-3 for ; Fri, 08 May 2026 22:28:57 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 4A4448245FD5; Fri, 8 May 2026 16:27:51 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Juergen Gross , "Daniel P. Smith" , Christian Lindig , David Scott Subject: [PATCH v7 0/3] xen/mm: Introduce NUMA-aware memory claim sets Date: Fri, 8 May 2026 21:27:56 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778272138-39D7B938-8ACBBA69/0/0 X-purgate-type: clean X-purgate-size: 4355 Xen's existing memory claim interface can account only for a host-wide amount of memory for a domain. That is not enough for toolstacks that need to claim memory from particular NUMA nodes before building the domain. This series extends Xen's memory claim design to support claim sets with NUMA-node-specific entries. Roger Pau Monné summarized the core design requirement as: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. A claim set can contain multiple node-specific claims and a host-wide claim for memory that may come from any NUMA node. The new domctl installs the full claim set atomically, and the allocator is updated so that claim checks and claim consumption are NUMA-node aware. The components are: 1. installing multi-node claim sets atomically, 2. protecting claimed pages from other claim requests and allocations, and 3. redeeming claims in a NUMA-aware manner when satisfying allocations for domains with claims. Legacy XENMEM_claim_pages behaviour is preserved; the legacy interface is deprecated and superseded by XEN_DOMCTL_claim_memory. This update addresses v6 review comments, refactors claim redemption, and adds a GET operation for inspecting a domain's claim set. Only one preparatory patch remains in this version, followed by the main feature and finally the OCaml bindings. The updated design document for this series was submitted on May 5: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00163.html Rendered version: https://xen.kaindl.dev/claims-v7-design/designs/claims/ The core operational principles have been validated in the following ways: 1. A comprehensive functional system test suite running in Dom0, which will follow this submission. 2. A native integration test environment for the Xen page allocator, providing a configurable synthetic Xen heap for each test case, which will follow this submission as well. 3. A set of high-level functional integration tests and performance tests, executed as part of end-to-end product deployment validation. 4. Validation in a customer's application performance lab to confirm performance expectations. This was done on predecessor code sharing the same design; that earlier code only supported single-node claims. Best regards, Bernhard Changes since v6: - Incorporated v6 review feedback. - Restored claim invariants as needed after offlining pages. - Addressed Jan's point about the ambiguity of the term "global": See https://lists.xen.org/archives/html/xen-devel/2026-05/msg00026.html - Use "host-wide claims", with "host_claims" and "node_claims" as shorthands. In addition, I adjusted helper names to make the domain scope explicit and to keep the "release", "set", and "get" operations named consistently: * deduct_global_claims() -> domain_release_host_claims() * deduct_node_claims() -> domain_release_node_claims() * domain_set_outstanding_pages() -> domain_set_claim_entries() * domain_get_claim_entries() was added. - The new domain_set_claim_entries() helper also handles the legacy XENMEM_claim_pages interface for backward compatibility, replacing domain_set_outstanding_pages(). Bernhard Kaindl (3): xen/mm: Introduce per-node free page counter xen/mm: Introduce NUMA-aware memory claim sets tools/ocaml: Add OCaml binding for NUMA claim sets tools/include/xenctrl.h | 11 + tools/libs/ctrl/xc_domain.c | 28 ++ tools/ocaml/libs/xc/xenctrl.ml | 10 + tools/ocaml/libs/xc/xenctrl.mli | 10 + tools/ocaml/libs/xc/xenctrl_stubs.c | 50 ++++ xen/common/domain.c | 5 +- xen/common/domctl.c | 57 ++++ xen/common/memory.c | 5 +- xen/common/page_alloc.c | 416 +++++++++++++++++++++++----- xen/include/public/domctl.h | 38 +++ xen/include/public/memory.h | 2 + xen/include/xen/mm.h | 6 +- xen/include/xen/sched.h | 4 + xen/xsm/flask/hooks.c | 1 + xen/xsm/flask/policy/access_vectors | 1 + 15 files changed, 570 insertions(+), 74 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:31:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:31:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304115.1577253 (Exim 4.92) (envelope-from ) id 1wLRr6-00020R-Qx; Fri, 08 May 2026 20:31:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304115.1577253; Fri, 08 May 2026 20:31:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRr6-00020K-OR; Fri, 08 May 2026 20:31:28 +0000 Received: by outflank-mailman (input) for mailman id 1304115; Fri, 08 May 2026 20:31:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRr4-00020C-NW for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:31:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRr4-0008Mq-4d for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:31:26 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4817-5cb7-0a2a0a5109dd-0a2a450adec8-8 for ; Fri, 08 May 2026 22:31:26 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe481d-56b3-0a2a450a0019-a0658308cc16-3 for ; Fri, 08 May 2026 22:31:25 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 620124373E19; Fri, 8 May 2026 16:30:30 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Alejandro Vallejo Subject: [PATCH v7 1/3] xen/mm: Introduce per-node free page counter Date: Fri, 8 May 2026 21:27:57 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778272286-7176D8B7-6DC2C879/0/0 X-purgate-type: clean X-purgate-size: 3964 From: Alejandro Vallejo Add node_avail_pages[], updated under heap_lock in sync with avail[node][zone] to cache the per-node sum of free pages. Use it in avail_node_heap_pages() to avoid summing all zones on each call. Guard it with nodeid < MAX_NUMNODES and node_online(nodeid). Signed-off-by: Alejandro Vallejo Signed-off-by: Bernhard Kaindl --- This patch was originally sent by Alejandro Vallejo: https://lists.xenproject.org/archives/html/xen-devel/2025-03/msg01130.html I use node_avail_pages[] in avail_node_heap_pages() as an optimisation. Verification of the changes: 1. node_avail_pages[node] is updated whenever avail[node][zone] changes, so the two remain in sync. 2. avail_node_heap_pages() previously summed all zones of a node and now returns node_avail_pages[node], so the same free buddy pages are counted. 3. avail_node_heap_pages() returns 0 for offline nodes and for nodes >= MAX_NUMNODES as before. 4. avail_node_heap_pages(-1) returned the sum from all nodes, equal to total_avail_pages, but this is not used by current callers. avail_heap_pages(z, z, -1) is used by other callers for that instead. To avoid dead code, a check for -1 to implement this is not added. Update locations: - free_heap_pages() increments node_avail_pages[node] alongside avail[node][zone] when pages are freed, including during heap initialisation. - alloc_heap_pages() decrements node_avail_pages[node] alongside avail[node][zone] when pages are allocated. - reserve_offlined_page() decrements node_avail_pages[node] alongside avail[node][zone] when pages are offlined. Colored pages do not go through the buddy allocator. Since they do not update avail[node][zone], they are not reflected in node_avail_pages[node] either. N.B. Current callers already iterate over online nodes only. Changes since v6: - Preserved the 0 return for offline nodes and nodes >= MAX_NUMNODES. --- xen/common/page_alloc.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 2c4ff2c34c70..7e17bafa1e45 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -485,6 +485,7 @@ static unsigned long node_need_scrub[MAX_NUMNODES]; static unsigned long *avail[MAX_NUMNODES]; static unsigned long total_avail_pages; +static unsigned long node_avail_pages[MAX_NUMNODES]; static DEFINE_SPINLOCK(heap_lock); /* Total outstanding claims by all domains */ @@ -1050,6 +1051,8 @@ static struct page_info *alloc_heap_pages( avail[node][zone] -= request; ASSERT(total_avail_pages >= request); total_avail_pages -= request; + ASSERT(node_avail_pages[node] >= request); + node_avail_pages[node] -= request; if ( d && d->outstanding_pages && !(memflags & MEMF_no_refcount) ) { @@ -1243,6 +1246,8 @@ static int reserve_offlined_page(struct page_info *head) avail[node][zone]--; ASSERT(total_avail_pages > 0); total_avail_pages--; + ASSERT(node_avail_pages[node] > 0); + node_avail_pages[node]--; page_list_add_tail(cur_head, test_bit(_PGC_broken, &cur_head->count_info) ? @@ -1566,6 +1571,7 @@ static void free_heap_pages( avail[node][zone] += 1 << order; total_avail_pages += 1 << order; + node_avail_pages[node] += 1 << order; if ( need_scrub ) { node_need_scrub[node] += 1 << order; @@ -2831,7 +2837,9 @@ unsigned long avail_domheap_pages_region( unsigned long avail_node_heap_pages(unsigned int nodeid) { - return avail_heap_pages(MEMZONE_XEN, NR_ZONES -1, nodeid); + if ( nodeid < MAX_NUMNODES && node_online(nodeid) ) + return node_avail_pages[nodeid]; + return 0; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:37:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:37:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304146.1577263 (Exim 4.92) (envelope-from ) id 1wLRwV-0002cx-DG; Fri, 08 May 2026 20:37:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304146.1577263; Fri, 08 May 2026 20:37:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRwV-0002cq-A7; Fri, 08 May 2026 20:37:03 +0000 Received: by outflank-mailman (input) for mailman id 1304146; Fri, 08 May 2026 20:37:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLRwT-0002ck-4h for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:37:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLRwS-00Aq1l-EX for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:37:00 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4906-2eae-0a2a0a5409dd-0a2a4506dc28-46 for ; Fri, 08 May 2026 22:37:00 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe496b-7371-0a2a45060019-a0658309d4c2-3 for ; Fri, 08 May 2026 22:37:00 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 972C78245F8E; Fri, 8 May 2026 16:35:53 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Juergen Gross , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" Subject: [PATCH v7 2/3] xen/mm: Introduce NUMA-aware memory claim sets Date: Fri, 8 May 2026 21:27:58 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778272620-7F77FD75-8A8972F8/0/0 X-purgate-type: clean X-purgate-size: 31474 This commit extends Xen's memory claim design to support installing claim sets spanning multiple NUMA nodes atomically. As Roger Pau Monné suggested: Ideally, we would need to introduce a new hypercall that allows making claims from multiple nodes in a single locked region, as to ensure success or failure in an atomic way. A claim set can contain multiple node-specific claims and a host-wide claim for memory that may come from any NUMA node. The new domctl installs the full claim set atomically, and the allocator is updated so that claim checks and claim consumption follow the new semantics. This adds: 1. installing multi-node claim sets atomically, 2. protecting claimed pages from other claim requests and allocations, and 3. redeeming held claims when satisfying allocations. Legacy XENMEM_claim_pages behaviour is preserved; the interface is deprecated and superseded by XEN_DOMCTL_claim_memory. Signed-off-by: Roger Pau Monné Signed-off-by: Bernhard Kaindl --- The v7 design document submitted ahead of this series may help with review. It explains the background, design rationale, and implementation details. Rendered version: https://xen.kaindl.dev/claims-v7-design/designs/claims Many thanks to everyone who contributed to the earlier work and review: especially Roger Pau Monné, Alejandro Vallejo, Jan Beulich, Andrew Cooper, Marcus Granado, and Edwin Török. Thanks, Bernhard --- tools/include/xenctrl.h | 11 + tools/libs/ctrl/xc_domain.c | 28 ++ xen/common/domain.c | 5 +- xen/common/domctl.c | 57 ++++ xen/common/memory.c | 5 +- xen/common/page_alloc.c | 410 +++++++++++++++++++++++----- xen/include/public/domctl.h | 38 +++ xen/include/public/memory.h | 2 + xen/include/xen/mm.h | 6 +- xen/include/xen/sched.h | 4 + xen/xsm/flask/hooks.c | 1 + xen/xsm/flask/policy/access_vectors | 1 + 12 files changed, 493 insertions(+), 75 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..fffa4d3b9c09 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -2659,6 +2659,17 @@ int xc_domain_set_llc_colors(xc_interface *xch, uint32_t domid, const uint32_t *llc_colors, uint32_t num_llc_colors); +/* + * Set or get memory claims for a domain. + * + * For XEN_DOMCTL_CLAIM_MEMORY_GET, callers may pass *nr_entries == 0 and + * claim_set == NULL to query the number of records needed. In that case the + * call fails with ERANGE and updates *nr_entries with the required count. + */ +int xc_domain_claim_memory(xc_interface *xch, uint32_t domid, uint32_t mode, + uint32_t *nr_entries, + xen_memory_claim_t *claim_set); + #if defined(__arm__) || defined(__aarch64__) int xc_dt_overlay(xc_interface *xch, void *overlay_fdt, uint32_t overlay_fdt_size, uint8_t overlay_op); diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 01c0669c8863..f78e085dd700 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1070,6 +1070,34 @@ int xc_domain_remove_from_physmap(xc_interface *xch, return xc_memory_op(xch, XENMEM_remove_from_physmap, &xrfp, sizeof(xrfp)); } +/* Set or get memory claims for a domain. */ +int xc_domain_claim_memory(xc_interface *xch, uint32_t domid, uint32_t mode, + uint32_t *nr_entries, xen_memory_claim_t *claim_set) +{ + struct xen_domctl domctl = {}; + DECLARE_HYPERCALL_BOUNCE(claim_set, *nr_entries * sizeof(*claim_set), + XC_HYPERCALL_BUFFER_BOUNCE_BOTH); + int ret; + + if ( xc_hypercall_bounce_pre(xch, claim_set) ) + return -1; + + domctl.cmd = XEN_DOMCTL_claim_memory; + domctl.domain = domid; + domctl.u.claim_memory.mode = mode; + domctl.u.claim_memory.nr_entries = *nr_entries; + set_xen_guest_handle(domctl.u.claim_memory.claim_set, claim_set); + + ret = do_domctl(xch, &domctl); + + *nr_entries = domctl.u.claim_memory.nr_entries; + + xc_hypercall_bounce_post(xch, claim_set); + + return ret; +} + +/* XENMEM_claim_pages is deprecated; use xc_domain_claim_memory() instead. */ int xc_domain_claim_pages(xc_interface *xch, uint32_t domid, unsigned long nr_pages) diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..8cb4241b0511 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1319,7 +1319,10 @@ int domain_kill(struct domain *d) rspin_barrier(&d->domain_lock); argo_destroy(d); vnuma_destroy(d->vnuma); - domain_set_outstanding_pages(d, 0); + /* Release all outstanding claims of the domain. */ + domain_set_claim_entries(d, 1, &(xen_memory_claim_t){ + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 0, + }); /* fallthrough */ case DOMDYING_dying: rc = domain_teardown(d); diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..391f256f013c 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -51,6 +51,57 @@ static int xenctl_bitmap_to_nodemask(nodemask_t *nodemask, MAX_NUMNODES); } +/* Set or get memory claims for a domain. */ +static int claim_memory(struct domain *d, + struct xen_domctl_claim_memory *uinfo, bool *copyback) +{ + xen_memory_claim_t *entries; + int rc = -EFAULT; + + /* Reject LLC coloring; alloc_color_heap_page() does not handle claims. */ + if ( llc_coloring_enabled ) + return -EOPNOTSUPP; + + switch ( uinfo->mode ) + { + case XEN_DOMCTL_CLAIM_MEMORY_SET: + if ( !uinfo->nr_entries ) + return -EINVAL; + if ( uinfo->nr_entries > MAX_NUMNODES + 1 ) + return -E2BIG; + break; + case XEN_DOMCTL_CLAIM_MEMORY_GET: + if ( uinfo->nr_entries > MAX_NUMNODES + 1 ) + uinfo->nr_entries = MAX_NUMNODES + 1; + break; + default: + return -EOPNOTSUPP; + } + if ( d->is_dying ) + return -ESRCH; + + entries = xmalloc_array(xen_memory_claim_t, uinfo->nr_entries); + if ( entries == NULL ) + return -ENOMEM; + + switch ( uinfo->mode ) + { + case XEN_DOMCTL_CLAIM_MEMORY_SET: + if ( !copy_from_guest(entries, uinfo->claim_set, uinfo->nr_entries) ) + rc = domain_set_claim_entries(d, uinfo->nr_entries, entries); + break; + case XEN_DOMCTL_CLAIM_MEMORY_GET: + rc = domain_get_claim_entries(d, &uinfo->nr_entries, entries); + *copyback = true; + if ( !rc && copy_to_guest(uinfo->claim_set, entries, + uinfo->nr_entries) ) + rc = -EFAULT; + break; + } + xfree(entries); + return rc; +} + void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) { struct vcpu *v; @@ -865,6 +916,12 @@ long do_domctl(XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) copyback = true; break; + case XEN_DOMCTL_claim_memory: + ret = xsm_claim_pages(XSM_PRIV, d); + if ( !ret ) + ret = claim_memory(d, &op->u.claim_memory, ©back); + break; + default: ret = arch_do_domctl(op, d, u_domctl); break; diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..d7515da28fe3 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -1805,7 +1805,10 @@ long do_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg) rc = -EINVAL; if ( !rc ) - rc = domain_set_outstanding_pages(d, reservation.nr_extents); + rc = domain_set_claim_entries(d, 1, &(xen_memory_claim_t){ + .target = XEN_DOMCTL_CLAIM_MEMORY_LEGACY, + .pages = reservation.nr_extents, + }); rcu_unlock_domain(d); diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 7e17bafa1e45..46c01a9fca2a 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -477,6 +477,11 @@ mfn_t __init alloc_boot_pages(unsigned long nr_pfns, unsigned long pfn_align) #define page_to_zone(pg) (is_xen_heap_page(pg) ? MEMZONE_XEN : \ (flsl(mfn_x(page_to_mfn(pg))) ? : 1)) +/* + * The heap, page, and claim counters below, and all claim counters + * in struct domain, are protected by heap_lock. The lock order with + * d->page_alloc_lock is d->page_alloc_lock first, then heap_lock. + */ typedef struct page_list_head heap_by_zone_and_order_t[NR_ZONES][MAX_ORDER+1]; static heap_by_zone_and_order_t *_heap[MAX_NUMNODES]; #define heap(node, zone, order) ((*_heap[node])[zone][order]) @@ -491,6 +496,9 @@ static DEFINE_SPINLOCK(heap_lock); /* Total outstanding claims by all domains */ static unsigned long outstanding_claims; +/* Sum of the outstanding claims of all domains per node */ +static unsigned long claimed_pages[MAX_NUMNODES]; + static unsigned long avail_heap_pages( unsigned int zone_lo, unsigned int zone_hi, unsigned int node) { @@ -520,67 +528,6 @@ unsigned long domain_adjust_tot_pages(struct domain *d, long pages) return d->tot_pages; } -int domain_set_outstanding_pages(struct domain *d, unsigned long pages) -{ - int ret = -ENOMEM; - unsigned long claim, avail_pages; - - /* - * Two locks are needed here: - * - d->page_alloc_lock: protects accesses to d->{tot,max,extra}_pages. - * - heap_lock: protects accesses to d->outstanding_pages, total_avail_pages - * and outstanding_claims. - */ - nrspin_lock(&d->page_alloc_lock); - spin_lock(&heap_lock); - - /* pages==0 means "unset" the claim. */ - if ( pages == 0 ) - { - outstanding_claims -= d->outstanding_pages; - d->outstanding_pages = 0; - ret = 0; - goto out; - } - - /* only one active claim per domain please */ - if ( d->outstanding_pages ) - { - ret = -EINVAL; - goto out; - } - - /* disallow a claim not exceeding domain_tot_pages() or above max_pages */ - if ( (pages <= domain_tot_pages(d)) || (pages > d->max_pages) ) - { - ret = -EINVAL; - goto out; - } - - /* how much memory is available? */ - avail_pages = total_avail_pages; - - avail_pages -= outstanding_claims; - - /* - * Note, if domain has already allocated memory before making a claim - * then the claim must take domain_tot_pages() into account - */ - claim = pages - domain_tot_pages(d); - if ( claim > avail_pages ) - goto out; - - /* yay, claim fits in available memory, stake the claim, success! */ - d->outstanding_pages = claim; - outstanding_claims += d->outstanding_pages; - ret = 0; - -out: - spin_unlock(&heap_lock); - nrspin_unlock(&d->page_alloc_lock); - return ret; -} - #ifdef CONFIG_SYSCTL void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages) { @@ -858,6 +805,253 @@ static void check_and_stop_scrub(struct page_info *head) } } +/* Release claims from the host-wide claims pool of the domain. */ +static unsigned long domain_release_host_claims(struct domain *d, + unsigned long release) +{ + unsigned long host_wide_claims; + + ASSERT(d->outstanding_pages >= d->node_claims); + host_wide_claims = d->outstanding_pages - d->node_claims; + + if ( release > host_wide_claims ) + release = host_wide_claims; + + ASSERT(release <= outstanding_claims); + + outstanding_claims -= release; + d->outstanding_pages -= release; + + return release; +} + +/* Release claims from the node-specific claims pool of the domain. */ +static unsigned long domain_release_node_claims( + struct domain *d, nodeid_t node, unsigned long release) +{ + if ( !d->claims[node] ) + return 0; + + if ( release > d->claims[node] ) + release = d->claims[node]; + + ASSERT(claimed_pages[node] >= release); + ASSERT(d->node_claims >= release); + ASSERT(d->outstanding_pages >= release); + ASSERT(outstanding_claims >= release); + + claimed_pages[node] -= release; + d->claims[node] -= release; + d->node_claims -= release; + d->outstanding_pages -= release; + outstanding_claims -= release; + + return release; +} + +/* + * Recall node-specific claims from a domain until either the specified number + * of pages has been recalled, or all node-specific claims have been exhausted. + */ +static void domain_recall_node_claims(struct domain *d, unsigned long recall) +{ + nodeid_t node; + + /* + * When NUMA node offlining is implemented, it will be responsible for + * recalling or moving claims off a node before offlining it. Therefore, + * offline nodes are not iterated here. + */ + for_each_online_node ( node ) + { + if ( !recall || !d->node_claims ) + break; + recall -= domain_release_node_claims(d, node, recall); + } +} + +/* Get claim entries for the outstanding claims of a domain. */ +int domain_get_claim_entries(struct domain *d, uint32_t *nr_entries, + xen_memory_claim_t *entries) +{ + unsigned int needed_entries = 1, max_entries = *nr_entries; + nodeid_t node; + + /* If max_entries is 0, only the number of needed entries is returned. */ + if ( max_entries ) + { + memset(entries, 0, sizeof(*entries) * max_entries); + entries[0].target = XEN_DOMCTL_CLAIM_MEMORY_HOST; + } + + spin_lock(&heap_lock); + if ( max_entries ) + { + ASSERT(d->outstanding_pages >= d->node_claims); + entries[0].pages = d->outstanding_pages - d->node_claims; + } + + for_each_online_node ( node ) + { + if ( !d->claims[node] ) + continue; + + if ( needed_entries < max_entries ) + { + entries[needed_entries].target = node; + entries[needed_entries].pages = d->claims[node]; + } + needed_entries++; + } + spin_unlock(&heap_lock); + *nr_entries = needed_entries; + return needed_entries <= max_entries ? 0 : -ERANGE; +} + +/* Validate a set of claim records and install it if valid. */ +int domain_set_claim_entries(struct domain *d, uint32_t nr_entries, + const xen_memory_claim_t *claim_set) +{ + uint64_t avail_pages, request, node_requests = 0, host_requests = 0; + nodemask_t nodes; + uint32_t node; + int ret = -EINVAL; + bool host_request_seen = false, legacy_semantics = false; + + /* + * Two locks are needed here: + * - d->page_alloc_lock: protects accesses to d->{tot,max,extra}_pages. + * - heap_lock: protects accesses to total_avail_pages, node_avail_pages, + * avail[], scrub state and all total and node-specific claim counters. + */ + nrspin_lock(&d->page_alloc_lock); + spin_lock(&heap_lock); + + /* + * Phase 1: Check and process the individual claim entries. Check + * the node-specific claim requests, and validate them against the + * available memory. Track legacy and host-wide claim requests and + * prepare validation of the combined claims in Phase 2. + */ + nodes_clear(nodes); + for ( uint32_t i = 0; i < nr_entries; i++ ) + { + node = claim_set[i].target; + request = claim_set[i].pages; + + if ( claim_set[i].cmd ) /* Reserved for possible future use. */ + goto out; + + switch ( node ) + { + case XEN_DOMCTL_CLAIM_MEMORY_LEGACY: + legacy_semantics = true; + fallthrough; + case XEN_DOMCTL_CLAIM_MEMORY_HOST: + if ( host_request_seen ) /* Only one host-wide request allowed. */ + goto out; + + host_request_seen = true; + host_requests = request; + continue; + } + + /* Node-specific claim. */ + if ( node >= MAX_NUMNODES || !node_online(node) ) + { + ret = -ENOENT; /* Node not valid or not online. */ + goto out; + } + + if ( nodemask_test(node, &nodes) ) /* Only one request per node. */ + goto out; + node_set(node, nodes); + + ASSERT(node_avail_pages[node] >= claimed_pages[node]); + avail_pages = node_avail_pages[node] - claimed_pages[node]; + + if ( request > avail_pages + d->claims[node] ) + { + ret = -ENOMEM; /* Request exceeds available memory on node. */ + goto out; + } + node_requests += request; /* The combined total is checked below. */ + } + + /* + * Phase 2: Validate the combined claim set. + * Apply legacy semantics if needed, then check that the total fits + * within d->max_pages and within the available unclaimed heap memory. + * A zero new-claim request is a pure release; skip validation entirely. + */ + if ( legacy_semantics ) + { + if ( node_requests ) + goto out; + + if ( !host_requests ) + goto release_existing; + + /* + * Legacy semantics require the request to exceed the current + * allocation; the request is then reduced by the current allocation. + * Existing outstanding claims are not allowed. + */ + if ( d->outstanding_pages || + host_requests <= domain_tot_pages(d) ) + goto out; + + host_requests -= domain_tot_pages(d); + } + else if ( !host_requests && !node_requests ) + goto release_existing; + + /* Ensure new claims plus domain_tot_pages() fit into d->max_pages. */ + if ( host_requests > d->max_pages || + node_requests > d->max_pages - host_requests || + node_requests + host_requests + domain_tot_pages(d) > d->max_pages ) + goto out; + + /* Ensure new claims fit in the total unclaimed heap memory. */ + ASSERT(total_avail_pages >= outstanding_claims); + if ( node_requests + host_requests > + (total_avail_pages - outstanding_claims) + d->outstanding_pages ) + { + /* New claims would exceed available unclaimed memory. */ + ret = -ENOMEM; + goto out; + } + + release_existing: + /* Phase 3: Remove the old claims before installing the new claims. */ + domain_recall_node_claims(d, d->node_claims); + domain_release_host_claims(d, d->outstanding_pages); + ASSERT(!d->node_claims && !d->outstanding_pages); + + /* Phase 4: Install new node-specific and host-wide claims. */ + d->node_claims = node_requests; + d->outstanding_pages = host_requests + node_requests; + outstanding_claims += d->outstanding_pages; + + /* Phase 5: Install the individual node claims. */ + for ( uint32_t i = 0; i < nr_entries; i++ ) + { + node = claim_set[i].target; + request = claim_set[i].pages; + if ( node >= MAX_NUMNODES ) /* Skip non-node claim targets. */ + continue; + + ASSERT(!d->claims[node]); + d->claims[node] = request; + claimed_pages[node] += request; + } + ret = 0; + out: + spin_unlock(&heap_lock); + nrspin_unlock(&d->page_alloc_lock); + return ret; +} + static struct page_info *get_free_buddy(unsigned int zone_lo, unsigned int zone_hi, unsigned int order, unsigned int memflags, @@ -907,6 +1101,18 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, */ for ( ; ; ) { + unsigned long avail_pages; + + ASSERT(node_avail_pages[node] >= claimed_pages[node]); + avail_pages = node_avail_pages[node] - claimed_pages[node]; + + if ( d && !(memflags & MEMF_no_refcount) ) + avail_pages += d->claims[node]; + + /* Skip this node if memory and claims do not permit this request. */ + if ( avail_pages < (1UL << order) ) + goto next_node; + zone = zone_hi; do { /* Check if target node can support the allocation. */ @@ -936,6 +1142,7 @@ static struct page_info *get_free_buddy(unsigned int zone_lo, } } while ( zone-- > zone_lo ); /* careful: unsigned zone may wrap */ + next_node: if ( (memflags & MEMF_exact_node) && req_node != NUMA_NO_NODE ) return NULL; @@ -1047,13 +1254,13 @@ static struct page_info *alloc_heap_pages( } } - ASSERT(avail[node][zone] >= request); - avail[node][zone] -= request; - ASSERT(total_avail_pages >= request); - total_avail_pages -= request; - ASSERT(node_avail_pages[node] >= request); - node_avail_pages[node] -= request; - + /* + * Ensure the domain's claims are fully redeemed before deducting + * the allocation from the page counters, otherwise the host or the + * node might be left with more claims than available pages. This would + * break the invariants claimed_pages[node] <= node_avail_pages[node] + * and outstanding_claims <= total_avail_pages. + */ if ( d && d->outstanding_pages && !(memflags & MEMF_no_refcount) ) { /* @@ -1071,13 +1278,34 @@ static struct page_info *alloc_heap_pages( * the domain being destroyed before creation is finished. Losing part * of the claim makes no difference. */ - unsigned long outstanding = min(d->outstanding_pages + 0UL, request); + unsigned long redeem = min(d->outstanding_pages + 0UL, request); + + BUG_ON(redeem > outstanding_claims); + + /* Maintain invariant: claimed_pages[node] <= node_avail_pages[node] */ + redeem -= domain_release_node_claims(d, node, redeem); - BUG_ON(outstanding > outstanding_claims); - outstanding_claims -= outstanding; - d->outstanding_pages -= outstanding; + if ( redeem ) + { + /* + * Maintain the invariant outstanding_claims <= total_avail_pages: + * Redeem from the host-wide claims pool and if needed from other + * nodes' claims pools to maintain that outstanding_claims do not + * exceed total_avail_pages after deducting the allocation. + */ + redeem -= domain_release_host_claims(d, redeem); + domain_recall_node_claims(d, redeem); + } } + /* Having redeemed claims, deduct the allocation from the page counters. */ + ASSERT(total_avail_pages >= request); + total_avail_pages -= request; + ASSERT(node_avail_pages[node] >= request); + node_avail_pages[node] -= request; + ASSERT(avail[node][zone] >= request); + avail[node][zone] -= request; + check_low_mem_virq(); if ( d != NULL ) @@ -1166,6 +1394,7 @@ static int reserve_offlined_page(struct page_info *head) unsigned int node = page_to_nid(head); int zone = page_to_zone(head), i, head_order = PFN_ORDER(head), count = 0; struct page_info *cur_head; + struct domain *d; unsigned int cur_order, first_dirty; ASSERT(spin_is_locked(&heap_lock)); @@ -1256,6 +1485,43 @@ static int reserve_offlined_page(struct page_info *head) count++; } + /* Offlining pages may violate claim invariants; restore them if needed. */ + if ( claimed_pages[node] > node_avail_pages[node] || + outstanding_claims > total_avail_pages ) + { + rcu_read_lock(&domlist_read_lock); + + if ( claimed_pages[node] > node_avail_pages[node] ) + { + unsigned long overclaim = claimed_pages[node] - + node_avail_pages[node]; + + for_each_domain ( d ) + { + overclaim -= domain_release_node_claims(d, node, overclaim); + if ( !overclaim ) + break; + } + } + + if ( outstanding_claims > total_avail_pages ) + { + unsigned long overclaim = outstanding_claims - total_avail_pages; + + for_each_domain ( d ) + { + overclaim -= domain_release_host_claims(d, overclaim); + if ( !overclaim ) + break; + } + } + + rcu_read_unlock(&domlist_read_lock); + + ASSERT(claimed_pages[node] <= node_avail_pages[node]); + ASSERT(outstanding_claims <= total_avail_pages); + } + return count; } diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..352d7095c944 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1276,6 +1276,42 @@ struct xen_domctl_get_domain_state { uint64_t unique_id; /* Unique domain identifier. */ }; +struct xen_memory_claim { + uint64_aligned_t pages; /* Number of pages to claim. */ + uint32_t target; /* NUMA node or special target constant. */ + uint32_t cmd; /* Reserved, must be zero. */ +}; +typedef struct xen_memory_claim xen_memory_claim_t; +DEFINE_XEN_GUEST_HANDLE(xen_memory_claim_t); + +/* Special claim targets for the target field of xen_memory_claim_t. */ +#define XEN_DOMCTL_CLAIM_MEMORY_HOST 0x80000000U /* Host-wide claims. */ +#define XEN_DOMCTL_CLAIM_MEMORY_LEGACY 0x40000000U /* Legacy semantics. */ + +/* + * XEN_DOMCTL_claim_memory + * + * Install or query a domain memory claim set. A SET operation replaces the + * existing claim set atomically. Claims are redeemed by later allocations to + * the domain. A SET request whose entries all have pages == 0 releases any + * existing claims. + * + * For GET, callers may pass nr_entries == 0 and claim_set == NULL to query the + * number of records needed. Xen returns -ERANGE and updates nr_entries. If the + * supplied array is too small, Xen returns -ERANGE and updates nr_entries + * without copying partial records. + */ +struct xen_domctl_claim_memory { + /* IN/OUT: Array of struct xen_memory_claim. */ + XEN_GUEST_HANDLE_64(xen_memory_claim_t) claim_set; + /* IN/OUT: Number of records in the claim_set array. */ + uint32_t nr_entries; + /* IN: Operation to perform on the claim set (GET or SET). */ + uint32_t mode; +#define XEN_DOMCTL_CLAIM_MEMORY_SET 0U /* Set the claim set for the domain. */ +#define XEN_DOMCTL_CLAIM_MEMORY_GET 1U /* Get the claim set of the domain. */ +}; + struct xen_domctl { /* Stable domctl ops: interface_version is required to be 0. */ uint32_t cmd; @@ -1368,6 +1404,7 @@ struct xen_domctl { #define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_set_llc_colors 89 #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ +#define XEN_DOMCTL_claim_memory 91 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1436,6 +1473,7 @@ struct xen_domctl { #endif struct xen_domctl_set_llc_colors set_llc_colors; struct xen_domctl_get_domain_state get_domain_state; + struct xen_domctl_claim_memory claim_memory; uint8_t pad[128]; } u; }; diff --git a/xen/include/public/memory.h b/xen/include/public/memory.h index bd9fc37b5297..086334af051b 100644 --- a/xen/include/public/memory.h +++ b/xen/include/public/memory.h @@ -569,6 +569,8 @@ DEFINE_XEN_GUEST_HANDLE(xen_mem_sharing_op_t); * for 10, only 7 additional pages are claimed. * * Caller must be privileged or the hypercall fails. + * + * Note: This hypercall is superseded by XEN_DOMCTL_claim_memory. */ #define XENMEM_claim_pages 24 diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b80bec00c124..b3a35c4bc8d6 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -72,6 +72,7 @@ #include struct page_info; +struct xen_memory_claim; extern bool using_static_heap; @@ -131,7 +132,10 @@ int populate_pt_range(unsigned long virt, unsigned long nr_mfns); /* Claim handling */ unsigned long __must_check domain_adjust_tot_pages(struct domain *d, long pages); -int domain_set_outstanding_pages(struct domain *d, unsigned long pages); +int domain_set_claim_entries(struct domain *d, uint32_t nr_entries, + const struct xen_memory_claim *claim_set); +int domain_get_claim_entries(struct domain *d, uint32_t *nr_entries, + struct xen_memory_claim *claim_set); void get_outstanding_claims(uint64_t *free_pages, uint64_t *outstanding_pages); /* Domain suballocator. These functions are *not* interrupt-safe.*/ diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 00db1da12f21..f671e0c4c7b3 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -419,6 +419,10 @@ struct domain unsigned int xenheap_pages; /* pages allocated from Xen heap */ /* Pages claimed but not possessed, protected by global heap_lock. */ unsigned int outstanding_pages; + unsigned int node_claims; /* Sum of per-node claims. */ + /* Domain objects use dedicated pages, leaving room for per-node claims. */ + unsigned int claims[MAX_NUMNODES]; /* Per-NUMA-node claims. */ + unsigned int max_pages; /* maximum value for domain_tot_pages() */ unsigned int extra_pages; /* pages not included in domain_tot_pages() */ diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd271..9e999ac1ba73 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -651,6 +651,7 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd, /* These have individual XSM hooks (common/domctl.c) */ case XEN_DOMCTL_getdomaininfo: + case XEN_DOMCTL_claim_memory: case XEN_DOMCTL_scheduler_op: case XEN_DOMCTL_irq_permission: case XEN_DOMCTL_iomem_permission: diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index bbb9c117ec4a..e7defa117a16 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -216,6 +216,7 @@ class domain2 # XEN_DOMCTL_scheduler_op with XEN_DOMCTL_SCHEDOP_putinfo setscheduler # XENMEM_claim_pages +# XEN_DOMCTL_claim_memory setclaim # XEN_DOMCTL_cacheflush cacheflush -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:42:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:42:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304175.1577271 (Exim 4.92) (envelope-from ) id 1wLS1P-0004NK-0F; Fri, 08 May 2026 20:42:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304175.1577271; Fri, 08 May 2026 20:42:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS1O-0004ND-To; Fri, 08 May 2026 20:42:06 +0000 Received: by outflank-mailman (input) for mailman id 1304175; Fri, 08 May 2026 20:42:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS1O-0004N7-Fu for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:42:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLS1N-003xE7-PW for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:42:05 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4a84-bab6-0a2a0a5309dd-0a2a4509d400-24 for ; Fri, 08 May 2026 22:42:05 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe4a9c-2497-0a2a45090019-a0658309da50-3 for ; Fri, 08 May 2026 22:42:05 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 6A3498245FBA; Fri, 8 May 2026 16:40:59 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Christian Lindig , David Scott , Anthony PERARD , Christian Lindig , Andrew Cooper Subject: [PATCH v7 3/3] tools/ocaml: Add OCaml binding for NUMA claim sets Date: Fri, 8 May 2026 21:27:59 +0100 Message-Id: <10726c7afb43856a1014c6b6e24700442ff8740e.1778272036.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778272925-89775A53-D74062C2/0/0 X-purgate-type: clean X-purgate-size: 4695 Add an OCaml binding for xc_domain_claim_memory(): - tools/ocaml/libs/xc/xenctrl.ml/mli: Add claim record type and domain_claim_memory external. - tools/ocaml/libs/xc/xenctrl_stubs.c: Marshal the OCaml claim array into a xen_memory_claim_t array. Map nodes of -1 to XEN_DOMCTL_CLAIM_MEMORY_HOST for host-wide claims. Acked-by: Christian Lindig Requested-by: Andrew Cooper Signed-off-by: Bernhard Kaindl --- tools/ocaml/libs/xc/xenctrl.ml | 10 ++++++ tools/ocaml/libs/xc/xenctrl.mli | 10 ++++++ tools/ocaml/libs/xc/xenctrl_stubs.c | 50 +++++++++++++++++++++++++++++ 3 files changed, 70 insertions(+) diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index 97108b9d861a..8dd0c932e3ee 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -370,6 +370,16 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory() to claim memory for a domain *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for host-wide claims *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version: handle -> version = "stub_xc_version_version" external version_compile_info: handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl.mli b/tools/ocaml/libs/xc/xenctrl.mli index 9fccb2c2c287..e78ea0dfe6c4 100644 --- a/tools/ocaml/libs/xc/xenctrl.mli +++ b/tools/ocaml/libs/xc/xenctrl.mli @@ -297,6 +297,16 @@ external domain_deassign_device: handle -> domid -> (int * int * int * int) -> u external domain_test_assign_device: handle -> domid -> (int * int * int * int) -> bool = "stub_xc_domain_test_assign_device" +(* OCaml binding for xc_domain_claim_memory() to claim memory for a domain *) + +type claim = + { + pages: int64; (* Number of pages to claim *) + node: int32; (* NUMA node ID, or -1 for host-wide claims *) + } +external domain_claim_memory: handle -> domid -> claim array -> unit + = "stub_xc_domain_claim_memory" + external version : handle -> version = "stub_xc_version_version" external version_compile_info : handle -> compile_info = "stub_xc_version_compile_info" diff --git a/tools/ocaml/libs/xc/xenctrl_stubs.c b/tools/ocaml/libs/xc/xenctrl_stubs.c index c55f73b265b2..e91bebf5a4ed 100644 --- a/tools/ocaml/libs/xc/xenctrl_stubs.c +++ b/tools/ocaml/libs/xc/xenctrl_stubs.c @@ -1435,6 +1435,56 @@ CAMLprim value stub_xc_watchdog(value xch_val, value domid, value timeout) CAMLreturn(Val_int(ret)); } +/* OCaml binding for xc_domain_claim_memory() to claim memory for a domain */ +CAMLprim value stub_xc_domain_claim_memory(value xch_val, value domid, + value claim_set) +{ + CAMLparam3(xch_val, domid, claim_set); + xc_interface *xch = xch_of_val(xch_val); + mlsize_t nr_entries = Wosize_val(claim_set); + uint32_t c_domid = (uint32_t)Int_val(domid); + uint32_t c_nr_entries = (uint32_t)nr_entries; + xen_memory_claim_t *c_claim_set; + + if (!nr_entries) + caml_invalid_argument("domain_claim_memory: claim_set cannot be empty"); + + c_claim_set = calloc(c_nr_entries, sizeof(*c_claim_set)); + if (c_claim_set == NULL) + caml_raise_out_of_memory(); + + /* The entries of the claim_set are claim entries with {pages, node} */ + for (mlsize_t i = 0; i < nr_entries; i++) { + value claim_entry = Field(claim_set, i); + int64_t pages = Int64_val(Field(claim_entry, 0)); + int32_t node = Int32_val(Field(claim_entry, 1)); + + if (pages < 0 || node < -1) { + free(c_claim_set); + caml_invalid_argument("domain_claim_memory: invalid pages or node"); + } + c_claim_set[i] = (xen_memory_claim_t) { + .pages = (uint64_t)pages, + .target = (node == -1) + ? XEN_DOMCTL_CLAIM_MEMORY_HOST + : (uint32_t)node + }; + } + + /* May have to wait for the domctl lock, release the OCaml runtime lock. */ + caml_enter_blocking_section(); + int retval = xc_domain_claim_memory(xch, c_domid, + XEN_DOMCTL_CLAIM_MEMORY_SET, + &c_nr_entries, c_claim_set); + caml_leave_blocking_section(); + + free(c_claim_set); + if (retval < 0) + failwith_xc(xch); + + CAMLreturn(Val_unit); +} + /* * Local variables: * indent-tabs-mode: t -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 20:49:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:49:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304208.1577281 (Exim 4.92) (envelope-from ) id 1wLS8W-0005As-Nv; Fri, 08 May 2026 20:49:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304208.1577281; Fri, 08 May 2026 20:49:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLS8W-0005Al-Kr; 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Fri, 08 May 2026 13:49:24 -0700 (PDT) MIME-Version: 1.0 References: <9b0f8922cd33df2b8e8038d639c1b8d8d73ce401.1775125380.git.mykola_kvach@epam.com> <4977CF18-39CC-4CC0-936A-890BAE5E8615@arm.com> In-Reply-To: From: Mykola Kvach Date: Fri, 8 May 2026 23:49:13 +0300 X-Gm-Features: AVHnY4JUSBzt2DGg28-D9DWL1tOx1SosJsJFoIGEmfYFJ2gyh8R7BFJU-1_31KU Message-ID: Subject: Re: [PATCH v8 13/13] xen/arm: Add support for system suspend triggered by hardware domain To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778273366-4086B938-7669A946/0/0 X-purgate-type: clean X-purgate-size: 11936 On Fri, May 8, 2026 at 5:31=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > >>> +/* Xen suspend. data identifies the domain that initiated suspend. *= / > >>> +static void system_suspend(void *data) > >>> +{ > >>> + int status; > >>> + unsigned long flags; > >>> + struct domain *d =3D (struct domain *)data; > >>> + > >>> + BUG_ON(system_state !=3D SYS_STATE_active); > >>> + > >>> + system_state =3D SYS_STATE_suspend; > >>> + > >>> + printk("Xen suspending...\n"); > >>> + > >>> + freeze_domains(); > >>> + scheduler_disable(); > >>> + > >>> + status =3D can_system_suspend(); > >>> + if ( status ) > >>> + { > >>> + system_state =3D SYS_STATE_resume; > >>> + goto resume_scheduler; > >> > >> When we have an error and we get the resume_scheduler path, we apply b= ack the > >> context of the guest saved previously in do_psci_1_0_system_suspend(),= so am I > >> correct saying the guest won=E2=80=99t get any PSCI error back and we = resume the guest > >> from the guest resume entrypoint? > >> > >> In case, should we have a different path that returns a PSCI error (PS= CI_*) into the guest > >> x0, and skips the context restore? > > > > You are right about the current control flow: once the virtual > > SYSTEM_SUSPEND request has been accepted and the domain has been parked= , a > > later failure in the Xen-wide suspend path resumes the domain through t= he normal > > domain resume path, rather than returning a PSCI error from the origina= l call. > > > > This is intentional in the current design. The virtual PSCI SYSTEM_SUSP= END > > path parks the domain and saves its resume context. The actual Xen-wide= host > > suspend is a separate step that is attempted only after all domains are > > suspended. > > > > So a failure in the later Xen-wide suspend step is treated as an abort = of the > > host suspend attempt after the domain suspend was already accepted. The= domain > > is then resumed through the existing domain resume path, similarly to t= he > > toolstack/xl suspend-resume flow, rather than by re-entering the guest = PSCI > > call path and modifying the saved vCPU context again. > > > > I agree this design is not obvious from the patch. I will clarify the c= ommit > > message and comments. If you or the maintainers think that failures bef= ore the > > physical SYSTEM_SUSPEND call succeeds should be reported back through t= he > > original virtual PSCI call, then this would require a different flow. I= was > > trying to avoid that extra complexity in this series. > > Ok I understand, I=E2=80=99m wondering if inside do_psci_1_0_system_suspe= nd() we could do something > like: > > [=E2=80=A6] > if ( is_control_domain(d) && !other_domains_ready_for_suspend(d) ) > return PSCI_DENIED; Yes. I have reworked this locally and will include it in v9. The control-domain readiness check is now done in the vPSCI SYSTEM_SUSPEND path before building the guest resume context and before calling domain_shutdown(..., SHUTDOWN_suspend), so in that case the call returns PSCI_DENIED early rather than parking the domain first. > > [=E2=80=A6] > > But I=E2=80=99m ok also to only document this behaviour. > > > >>> > >>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > >>> index bd87ec430d..8fb9172186 100644 > >>> --- a/xen/arch/arm/vpsci.c > >>> +++ b/xen/arch/arm/vpsci.c > >>> @@ -5,6 +5,7 @@ > >>> > >>> #include > >>> #include > >>> +#include > >>> #include > >>> #include > >>> #include > >>> @@ -232,8 +233,7 @@ static int32_t do_psci_1_0_system_suspend(registe= r_t epoint, register_t cid) > >>> if ( is_64bit_domain(d) && is_thumb ) > >>> return PSCI_INVALID_ADDRESS; > >>> > >>> - /* SYSTEM_SUSPEND is not supported for the hardware domain yet *= / > >>> - if ( is_hardware_domain(d) ) > >>> + if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d)= ) > >>> return PSCI_NOT_SUPPORTED; > >>> > >>> /* Ensure that all CPUs other than the calling one are offline */ > >>> @@ -266,6 +266,9 @@ static int32_t do_psci_1_0_system_suspend(registe= r_t epoint, register_t cid) > >>> "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid= =3D%#"PRIregister"\n", > >>> epoint, cid); > >>> > >>> + if ( is_control_domain(d) ) > >> > >> Why is_control_domain() here and not is_hardware_domain() ? > > > > The use of is_control_domain() is intentional. > > > > The intended model is that Xen-wide host suspend is orchestrated by the > > privileged management/control domain. The control domain coordinates th= e > > toolstack side, asks other domains to enter suspend, and then issues th= e final > > SYSTEM_SUSPEND request to Xen. > > > > This does not have to be the same entity as the hardware domain. If the > > hardware domain is separate, it is one of the domains that the control = domain > > parks before the final host suspend step. > > > > The hwdom-specific checks in this patch have a different purpose: they = avoid > > the old hwdom_shutdown() path for SHUTDOWN_suspend and allow the hardwa= re > > domain to be parked as part of the suspend sequence. They do not define= the > > policy for who is allowed to trigger Xen-wide host suspend. > > > > That said, this policy may not be optimal for all configurations, espec= ially > > when the control and hardware domain roles are split. I would appreciat= e your > > view, as well as the maintainers' views, on whether the trigger should = remain > > control-domain based, be tied to the hardware domain instead, or be exp= ressed > > through a separate host-suspend capability/helper. > > In the commit message and title I saw HW domain, so maybe the commit shou= ld be updated > to say control domain instead? Yes, that was stale wording from an older version. I have fixed it locally for v9. > > At this point however I=E2=80=99m wondering about this code above: > ``` > if ( !IS_ENABLED(CONFIG_SYSTEM_SUSPEND) && is_hardware_domain(d) ) > return PSCI_NOT_SUPPORTED; > ``` > and in do_psci_1_0_features(), shouldn=E2=80=99t we use consistently is_c= ontrol_domain()? Yes. I have reworked this locally so the policy is now explicit and consistent. The control domain is the only domain whose SYSTEM_SUSPEND request may drive the Xen-wide host suspend path. For that domain, both PSCI_FEATURES(SYSTEM_SUSPEND) and the real SYSTEM_SUSPEND path now consult the same helper, so the advertised capability and the execution path stay consistent. That helper is an explicit host-suspend capability check: it requires firmware support for PSCI SYSTEM_SUSPEND and it also keeps host suspend disabled when Xen detects a missing suspend/resume path in required host-side components. For a non-control hardware domain, SYSTEM_SUSPEND remains a virtual guest suspend operation and does not by itself trigger Xen-wide host suspend. Other guests keep the existing virtual behaviour as well. > > > > >> > >>> + host_system_suspend(d); > >>> + > >>> return rc; > >>> } > >>> > >>> @@ -290,7 +293,10 @@ static int32_t do_psci_1_0_features(uint32_t psc= i_func_id) > >>> return 0; > >>> case PSCI_1_0_FN32_SYSTEM_SUSPEND: > >>> case PSCI_1_0_FN64_SYSTEM_SUSPEND: > >>> - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPOR= TED : 0; > >>> + if ( IS_ENABLED(CONFIG_SYSTEM_SUSPEND) || > >>> + !is_hardware_domain(current->domain) ) > >> > >> Should this have also the condition that =E2=80=9Cis hardware domain a= nd psci_ver >=3D PSCI_VERSION(1, 0)=E2=80=9D? > >> Otherwise if the host machine doestn=E2=80=99t support PSCI 1.0 we wou= ld return OK here but the call would > >> fail later in call_psci_system_suspend()? > > > > Good point. > > > > I agree that, for the domain allowed to trigger Xen-wide suspend, Xen s= hould > > not advertise SYSTEM_SUSPEND if the host suspend path cannot be used. > > > > I think this should be checked as an explicit host SYSTEM_SUSPEND capab= ility, > > rather than only as psci_ver >=3D PSCI_VERSION(1, 0). The same capabili= ty check > > also needs to be enforced in the actual SYSTEM_SUSPEND handler before p= arking > > the domain, because a caller may invoke SYSTEM_SUSPEND directly without= first > > querying PSCI_FEATURES. > > > > For ordinary guests, the physical PSCI version is not relevant because = they > > cannot trigger host suspend; their SYSTEM_SUSPEND path is virtual. > > > > I will make this consistent in v9: PSCI_FEATURES will advertise SYSTEM_= SUSPEND > > for the host-suspend-triggering domain only when the host SYSTEM_SUSPEN= D backend > > is available, and the actual SYSTEM_SUSPEND path will enforce the same = check. > > ok I have reworked this locally accordingly. Rather than open-coding a psci_ver >=3D PSCI_VERSION(1, 0) test, the new code uses an explicit host SYSTEM_SUSPEND capability predicate. For the control domain, PSCI_FEATURES(SYSTEM_SUSPEND) and the actual SYSTEM_SUSPEND handler now share that same check, so they stay consistent even when host suspend is blocked by firmware capability or by Xen-side runtime suspend/resume limitations. > > >>> > >>> diff --git a/xen/drivers/passthrough/arm/smmu.c b/xen/drivers/passthr= ough/arm/smmu.c > >>> index 22d306d0cb..45f29ef8ec 100644 > >>> --- a/xen/drivers/passthrough/arm/smmu.c > >>> +++ b/xen/drivers/passthrough/arm/smmu.c > >>> @@ -2947,6 +2947,13 @@ static void arm_smmu_iommu_domain_teardown(str= uct domain *d) > >>> xfree(xen_domain); > >>> } > >>> > >>> +#ifdef CONFIG_SYSTEM_SUSPEND > >>> +static int arm_smmu_suspend(void) > >>> +{ > >>> + return -ENOSYS; > >>> +} > >>> +#endif > >> > >> Maybe we want to gate the feature also to !CONFIG_ARM_SMMU ? I would w= ait for the maintainers > >> view on this. > > > > I feel that gating this strictly on !CONFIG_ARM_SMMU might not be the m= ost > > optimal approach here. > > > > CONFIG_ARM_SMMU is a build-time option and does not mean that an old SM= MUv1/v2 > > device is actually present. Using it would disable system suspend even = on > > platforms where only SMMUv3 is used, because CONFIG_ARM_SMMU is enabled= by > > default for Arm. > > > > The condition should be runtime-based: whether the active/probed IOMMU = devices > > have system suspend/resume support. For the old ARM SMMU driver this is= not > > implemented today, so a platform with an SMMUv1/v2 instance should not = expose > > or attempt host suspend. > > > > I think we should handle this by tracking whether any old ARM SMMUv1/v2= device > > was actually probed, or by adding a generic IOMMU suspend capability ch= eck. Then > > the host suspend availability check can reject system suspend only when= such an > > unsupported IOMMU is present, instead of disabling the feature for all > > Arm builds > > with CONFIG_ARM_SMMU enabled. > > > > I would be interested to hear if you or the maintainers see a better wa= y to > > express this capability. > > ok, let=E2=80=99s address Jan comment now and we can see what the maintai= ners think about this. Ack, thanks. I have already reworked the Jan-related part locally for v9: the control-domain readiness/capability checks now happen in the vPSCI SYSTEM_SUSPEND path before the domain finishes suspend, and PSCI_FEATURES plus the real call now use the same host-suspend capability predicate. I=E2=80=99ll fold that into the next revision, and then we can see what the maintainers prefer for the remaining runtime-gating details. Best regards, Mykola > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:51:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:51:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304214.1577291 (Exim 4.92) (envelope-from ) id 1wLSAq-0006dq-5y; Fri, 08 May 2026 20:51:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304214.1577291; Fri, 08 May 2026 20:51:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSAq-0006dj-0h; Fri, 08 May 2026 20:51:52 +0000 Received: by outflank-mailman (input) for mailman id 1304214; Fri, 08 May 2026 20:51:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSAo-0006dd-W1 for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 13:51:49 -0700 (PDT) MIME-Version: 1.0 References: <02b55a02f329d09c9f8b15d97ca9176b3c33017a.1775125380.git.mykola_kvach@epam.com> <4BFA8CEE-0168-4C14-8B5F-E19E6FD7D747@arm.com> In-Reply-To: <4BFA8CEE-0168-4C14-8B5F-E19E6FD7D747@arm.com> From: Mykola Kvach Date: Fri, 8 May 2026 23:51:37 +0300 X-Gm-Features: AVHnY4IBHwfA-r4Hx63WBO9W13PGwaDdwuvkxW7WBHq8XbIt1kQISSKl2FDYMmA Message-ID: Subject: Re: [PATCH v8 10/13] xen/arm: Resume memory management on Xen resume To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778273510-295783FF-15B33EA2/0/0 X-purgate-type: clean X-purgate-size: 2063 On Fri, May 8, 2026 at 4:28=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > >>> 1 file changed, 24 insertions(+) > >>> > >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > >>> index 72c7b24498..596e960152 100644 > >>> --- a/xen/arch/arm/arm64/head.S > >>> +++ b/xen/arch/arm/arm64/head.S > >>> @@ -561,6 +561,30 @@ END(efi_xen_start) > >>> > >>> #endif /* CONFIG_ARM_EFI */ > >>> > >>> +#ifdef CONFIG_SYSTEM_SUSPEND > >>> + > >>> +FUNC(hyp_resume) > >> > >> I think we should mask all exceptions here: > >> msr DAIFSet, 0xf > >> > >> until we resume correctly the status (VBAR_EL2, etc). > > > > This was discussed in an earlier version: > > > > https://patchew.org/Xen/cover.1741164138.git.xakep.amatop@gmail.com/2ef= 15cb605f987eb087c5496d123c47c01cc0ae7.1741164138.git.xakep.amatop@gmail.com= /#CAGeoDV97no7mXSKd7auFu5E85wSXAHKWvqGW2=3D-VEAbkrTyU8Q@mail.gmail.com > > > > For SYSTEM_SUSPEND, PSCI ties the call semantics to CPU_SUSPEND. In > > particular, section 5.20.2 says that the caller must observe all the ru= les > > described for CPU_SUSPEND, and section 6.4 explicitly says that the ini= tial > > state rules also apply to SYSTEM_SUSPEND. > > > > For the return Exception level on AArch64, section 6.4.3.3 requires > > SPSR_ELx.{D,A,I,F} to be set to {1, 1, 1, 1}. Therefore Xen expects to = enter > > this resume path with DAIF already masked by PSCI-compliant firmware. > > > > I agree this assumption is not obvious from the code, so I will add a c= omment > > at the resume entry point to document that this path relies on the PSCI= initial > > core configuration requirements. > > Yes please, something along the line of > > /* > * PSCI SYSTEM_SUSPEND follows CPU_SUSPEND initial-state rules. > * On AArch64, firmware must return with SPSR_ELx.DAIF set, so > * PSTATE.DAIF is already masked on entry here. > */ Ack. Best regards, Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:55:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:55:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304225.1577299 (Exim 4.92) (envelope-from ) id 1wLSE3-0007G6-JN; Fri, 08 May 2026 20:55:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304225.1577299; Fri, 08 May 2026 20:55:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSE3-0007Fy-Go; Fri, 08 May 2026 20:55:11 +0000 Received: by outflank-mailman (input) for mailman id 1304225; Fri, 08 May 2026 20:55:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSE1-0007Fr-Qk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 20:55:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSE1-000AXG-0f for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:55:09 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe4d03-2eae-0a2a0a5409dd-0a2a45078d66-40 for ; Fri, 08 May 2026 22:55:08 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 69fe4dac-229c-0a2a45070019-d98c6eacd0de-1 for ; Fri, 08 May 2026 22:55:08 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4A79F1C25; Fri, 8 May 2026 13:55:02 -0700 (PDT) Received: from [10.57.35.132] (unknown [10.57.35.132]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B76E33F836; Fri, 8 May 2026 13:55:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778273707; bh=EYkONMkW0IatpZ5QawspWJ7T/VJZH158OZO7NH03taE=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=oT/QNC9yXHo4z1ugT7/FLiBNGDpaiDMdHzLuLsLDP/RfnuNDn7+RkOx6fUHYck5WY 4JiTtgOh/rHTuurIlP+VjgGp6OdeXiP8hc2bG238RdglsrJ4AC+VD81LgCQr74gaL9 avbGNpzxwH5AeadHWfiYrYy0idGktRIUI2usTaMk= Message-ID: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Date: Fri, 8 May 2026 22:54:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving To: Juergen Gross , linux-kernel@vger.kernel.org, x86@kernel.org Cc: marmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org References: <20260508143933.493013-1-jgross@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <20260508143933.493013-1-jgross@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778273708-23979C48-DAF182A4/0/0 X-purgate-type: clean X-purgate-size: 2086 On 08/05/2026 16:39, Juergen Gross wrote: > With the support of nested lazy mmu sections it can happen that > arch_enter_lazy_mmu_mode() is being called twice without a call of > arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers > are not disabling preemption when checking for nested lazy mmu > sections. I think this is a correct description of the issue, i.e. potentially we have arch_enter_lazy_mmu_mode() called twice *sequentially*. Therefore I don't think that disabling preemption inside arch_enter_lazy_mmu_mode() is enough - we have a problem with preemption occurring inside lazy_mmu_mode_enable() generally, not necessarily inside arch_enter_lazy_mmu_mode(). Preemption shouldn't matter if commit 291b3abed657 is reverted. AFAICT this is the only easy fix. - Kevin > This is a problem when running as a Xen PV guest, as > xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this > case. > > Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order > not to hurt all other lazy mmu mode users. > > Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") > Signed-off-by: Juergen Gross > --- > arch/x86/xen/mmu_pv.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index c80d0058efd1..3eee5f84f8a7 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) > > static void xen_enter_lazy_mmu(void) > { > - enter_lazy(XEN_LAZY_MMU); > + preempt_disable(); > + if (xen_get_lazy_mode() != XEN_LAZY_MMU) > + enter_lazy(XEN_LAZY_MMU); > + preempt_enable(); > } > > static void xen_flush_lazy_mmu(void) > @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) > { > preempt_disable(); > xen_mc_flush(); > - leave_lazy(XEN_LAZY_MMU); > + if (xen_get_lazy_mode() != XEN_LAZY_NONE) > + leave_lazy(XEN_LAZY_MMU); > preempt_enable(); > } > From xen-devel-bounces@lists.xenproject.org Fri May 08 20:59:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 20:59:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304233.1577308 (Exim 4.92) (envelope-from ) id 1wLSII-000864-2F; Fri, 08 May 2026 20:59:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304233.1577308; Fri, 08 May 2026 20:59:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSIH-00085x-Va; Fri, 08 May 2026 20:59:33 +0000 Received: by outflank-mailman (input) for mailman id 1304233; Fri, 08 May 2026 20:59:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSIG-00085r-56 for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 13:59:30 -0700 (PDT) MIME-Version: 1.0 References: <02b55a02f329d09c9f8b15d97ca9176b3c33017a.1775125380.git.mykola_kvach@epam.com> <873402ub63.fsf@epam.com> In-Reply-To: <873402ub63.fsf@epam.com> From: Mykola Kvach Date: Fri, 8 May 2026 23:59:19 +0300 X-Gm-Features: AVHnY4KwmCRNlh-rjvCBDnZlHGwH0fbsH41MPUKe0T4UvNUHB2xg6MnS1t1Edb0 Message-ID: Subject: Re: [PATCH v8 10/13] xen/arm: Resume memory management on Xen resume To: Volodymyr Babchuk Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1778273971-43D7FA53-9522E16B/0/0 X-purgate-type: clean X-purgate-size: 2482 Hi Volodymyr, Thank you for the feedback. On Fri, May 8, 2026 at 1:06=E2=80=AFAM Volodymyr Babchuk wrote: > > Hi Mykola, > > Mykola Kvach writes: > > > From: Mirela Simonovic > > > > The MMU must be enabled during the resume path before restoring context= , > > as virtual addresses are used to access the saved context data. > > > > I agree with Luca, this patch does not makes sense as is. I don't see > why it should be separated from the rest of the resume path that is > added in the next patch Ack. I'll combine this with the next patch in v9. Best regards, Mykola > > > This patch adds MMU setup during resume by reusing the existing > > enable_secondary_cpu_mm function, which enables data cache and the MMU. > > Before the MMU is enabled, the content of TTBR0_EL2 is changed to point > > to init_ttbr (page tables used at runtime). > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v7: > > - no functional changes, just moved commit > > --- > > xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ > > 1 file changed, 24 insertions(+) > > > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 72c7b24498..596e960152 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -561,6 +561,30 @@ END(efi_xen_start) > > > > #endif /* CONFIG_ARM_EFI */ > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +FUNC(hyp_resume) > > + /* Initialize the UART if earlyprintk has been enabled. */ > > +#ifdef CONFIG_EARLY_PRINTK > > + bl init_uart > > +#endif > > + PRINT_ID("- Xen resuming -\r\n") > > + > > + bl check_cpu_mode > > + bl cpu_init > > + > > + ldr x0, =3Dstart > > + adr x20, start /* x20 :=3D paddr (start) */ > > + sub x20, x20, x0 /* x20 :=3D phys-offset */ > > + ldr lr, =3Dmmu_resumed > > + b enable_secondary_cpu_mm > > + > > +mmu_resumed: > > + b . > > +END(hyp_resume) > > + > > +#endif /* CONFIG_SYSTEM_SUSPEND */ > > + > > /* > > * Local variables: > > * mode: ASM > > -- > WBR, Volodymyr From xen-devel-bounces@lists.xenproject.org Fri May 08 21:23:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:23:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304240.1577317 (Exim 4.92) (envelope-from ) id 1wLSfk-0003ve-SK; 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s=k20201202; t=1778275424; bh=NAKnjKkODxWcV+2m2D9TCncmSNBk1eGzdy/HehPI1mI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=UoRMBodVC/DLgpW2vRuqRK2gDSMAI9m4sdZOHmwJMXDsD/heFcqUTqAxDOdQYl8qx u2M/67qQPq961yiGsCC6Ue05Kl8kPMTpU0gMOOCDhkOJMgxJln1PoAZLLaU0LGYKaR /b8XYdki5J738s4BhiXLKB0JOeDG66wCa1qaWRwewze8m8xQ1OzwumrpqtXMfsSEcL Ag8CreR74efjmvht0yTvpnnEkFdFRAa4CZO2PFo2/wVsgckYbyv4D7wCL7NNgozjeQ MOqs5iE77wFiQwuGYZTOizmO0ipHfsCT9gy5ygdweZSox1pF/KuYy3wK5/MMfvbsv4 Yue7bt5W+IHPA== Date: Fri, 8 May 2026 14:23:43 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jiaqing Zhao cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH] ns16550: add support for WCH CH382 serial adapters In-Reply-To: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> Message-ID: References: <20260508092813.12894-1-Zhao.Jiaqing@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-c1860d/1778275426-B6368DB1-4A47739F/0/0 X-purgate-type: clean X-purgate-size: 2850 On Fri, 8 May 2026, Jiaqing Zhao wrote: > Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.) > CH382 PCIe dual port serial adapter. The CH382 is available in two > variants: > - CH382 2S [1c00:3253]: 2 serial ports > - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port > > This chip uses IO BAR0, base baud rate 115200, ports starting at offset > 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] > > [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html > > Signed-off-by: Jiaqing Zhao WCH has a few PCI vendor IDs, including 0x1c00 and also 0x4348. Linux distinguishes them as PCI_VENDOR_ID_WCHIC = 0x1c00 and PCI_VENDOR_ID_WCHCN = 0x4348. It would probably be better to rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC in this patch. Everything else looks good. > --- > xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 2 ++ > 2 files changed, 25 insertions(+) > > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 878da27f2e..106ef56316 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -95,6 +95,7 @@ struct ns16550_config { > param_exar_xr17v354, > param_exar_xr17v358, > param_intel_lpss, > + param_wch_ch382, > } param; > }; > @@ -862,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { > .mmio = 1, > .max_ports = 1, > }, > + [param_wch_ch382] = { > + .base_baud = 115200, > + .first_offset = 0xc0, > + .uart_offset = 8, > + .reg_width = 1, > + .fifo_size = 256, > + .lsr_mask = UART_LSR_THRE, > + .bar0 = 1, > + .max_ports = 2, > + }, > }; > > static const struct ns16550_config __initconst uart_config[] = > @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = > .dev_id = 0x7adc, > .param = param_intel_lpss > }, > + /* WCH CH382 2S */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3253, > + .param = param_wch_ch382 > + }, > + /* WCH CH382 2S1P */ > + { > + .vendor_id = PCI_VENDOR_ID_WCH, > + .dev_id = 0x3250, > + .param = param_wch_ch382 > + }, > }; > > static int __init > diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h > index 5884a20b8f..b8316d464c 100644 > --- a/xen/include/xen/pci_ids.h > +++ b/xen/include/xen/pci_ids.h > @@ -13,6 +13,8 @@ > > #define PCI_VENDOR_ID_BROADCOM 0x14e4 > > +#define PCI_VENDOR_ID_WCH 0x1c00 > + > #define PCI_VENDOR_ID_INTEL 0x8086 > > #endif /* XEN_PCI_IDS_H */ > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304251.1577344 (Exim 4.92) (envelope-from ) id 1wLSl0-0005C8-1b; Fri, 08 May 2026 21:29:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304251.1577344; Fri, 08 May 2026 21:29:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkz-0005C1-Ts; Fri, 08 May 2026 21:29:13 +0000 Received: by outflank-mailman (input) for mailman id 1304251; Fri, 08 May 2026 21:29:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLSky-0004lM-8S for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkx-00E1Ak-Lx for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:11 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5538-bab6-0a2a0a5309dd-0a2a4507b2e6-32 for ; Fri, 08 May 2026 23:29:11 +0200 Received: from [209.85.221.54] (helo=mail-wr1-f54.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a7-229c-0a2a45070019-d155dd36acc1-3 for ; Fri, 08 May 2026 23:29:11 +0200 Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-44e1860558fso1643891f8f.0 for ; Fri, 08 May 2026 14:29:11 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Convert it to being a non-root container. Add checkpolicy as FLASK is an available build option for arm32 under Randconfig testing. Rename the CI jobs to debian-12-arm32-* to follow the naming scheme of all the other CI jobs. No functional change. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein --- .../build/debian/12-arm64v8-arm32.dockerfile | 32 +++++++++++++++++++ .../bookworm-arm64v8-arm32-gcc.dockerfile | 24 -------------- automation/gitlab-ci/build.yaml | 24 +++++++------- automation/gitlab-ci/test.yaml | 14 ++++---- automation/scripts/containerize | 2 +- 5 files changed, 52 insertions(+), 44 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-arm32.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile diff --git a/automation/build/debian/12-arm64v8-arm32.dockerfile b/automation/build/debian/12-arm64v8-arm32.dockerfile new file mode 100644 index 000000000000..a4d70f1111ed --- /dev/null +++ b/automation/build/debian/12-arm64v8-arm32.dockerfile @@ -0,0 +1,32 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive +ENV CROSS_COMPILE=/usr/bin/arm-linux-gnueabihf- + +RUN <&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32 + - debian-12-arm32-gcc qemu-smoke-dom0less-arm32-gcc-debug: extends: .qemu-arm32 @@ -608,7 +608,7 @@ qemu-smoke-dom0less-arm32-gcc-debug: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-debug-staticmem: extends: .qemu-arm32 @@ -616,7 +616,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-staticmem: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh static-mem 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug-staticmem + - debian-12-arm32-gcc-debug-staticmem qemu-smoke-dom0less-arm32-gcc-debug-gzip: extends: .qemu-arm32 @@ -624,7 +624,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-gzip: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh gzip 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-without-dom0: extends: .qemu-arm32 @@ -632,7 +632,7 @@ qemu-smoke-dom0less-arm32-gcc-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32 + - debian-12-arm32-gcc qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: extends: .qemu-arm32 @@ -640,7 +640,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-without-dom0: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh without-dom0 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug + - debian-12-arm32-gcc-debug qemu-smoke-dom0less-arm32-gcc-debug-earlyprintk: extends: .qemu-arm32 @@ -648,7 +648,7 @@ qemu-smoke-dom0less-arm32-gcc-debug-earlyprintk: - ./automation/scripts/qemu-smoke-dom0less-arm32.sh earlyprintk 2>&1 | tee ${LOGFILE} needs: - *arm32-test-needs - - debian-bookworm-gcc-arm32-debug-earlyprintk + - debian-12-arm32-gcc-debug-earlyprintk qemu-alpine-x86_64-gcc: extends: .qemu-x86-64 diff --git a/automation/scripts/containerize b/automation/scripts/containerize index ad3e2372703f..ef3b97b65578 100755 --- a/automation/scripts/containerize +++ b/automation/scripts/containerize @@ -38,7 +38,7 @@ case "_${CONTAINER}" in _bookworm|_bookworm-x86_64) CONTAINER="${BASE}/debian:12-x86_64" ;; _trixie-x86_64|_) CONTAINER="${BASE}/debian:13-x86_64" ;; _bookworm-i386|_bookworm-x86_32) CONTAINER="${BASE}/debian:12-x86_32" ;; - _bookworm-arm64v8-arm32-gcc) CONTAINER="${BASE}/debian:bookworm-arm64v8-arm32-gcc" ;; + _bookworm-arm64v8-arm32) CONTAINER="${BASE}/debian:12-arm64v8-arm32" ;; _bookworm-arm64v8) CONTAINER="${BASE}/debian:bookworm-arm64v8" ;; _bookworm-cppcheck) CONTAINER="${BASE}/debian:12-arm64v8-cppcheck" ;; _opensuse-leap|_leap) CONTAINER="${BASE}/opensuse:leap-15.6-x86_64" ;; -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304253.1577358 (Exim 4.92) (envelope-from ) id 1wLSl1-0005Sh-KD; Fri, 08 May 2026 21:29:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304253.1577358; Fri, 08 May 2026 21:29:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSl1-0005Re-D8; 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These will be used to remove the export jobs. Switch qemu-arm{32,64} jobs to use this container. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein We should probably wire up some build tests too, but it's too late on a Friday for me to be thinking about that for this posting. --- automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ automation/gitlab-ci/test.yaml | 4 +- automation/scripts/containerize | 1 + 3 files changed, 74 insertions(+), 2 deletions(-) create mode 100644 automation/build/debian/13-arm64v8.dockerfile diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile new file mode 100644 index 000000000000..b9062ee8b443 --- /dev/null +++ b/automation/build/debian/13-arm64v8.dockerfile @@ -0,0 +1,71 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:trixie-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304249.1577325 (Exim 4.92) (envelope-from ) id 1wLSky-0004lW-E9; Fri, 08 May 2026 21:29:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304249.1577325; Fri, 08 May 2026 21:29:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSky-0004lN-Ba; Fri, 08 May 2026 21:29:12 +0000 Received: by outflank-mailman (input) for mailman id 1304249; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkx-0004lB-Gp for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkw-00AvHv-Qk for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:10 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5568-e002-0a2a0a5209dd-0a2a45028108-16 for ; Fri, 08 May 2026 23:29:10 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a6-af86-0a2a45020019-d155dd33c191-3 for ; Fri, 08 May 2026 23:29:10 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43eb05b1875so1482956f8f.3 for ; Fri, 08 May 2026 14:29:10 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275749; x=1778880549; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=sVmq4etdovYoJDRMA/BMmOvUPNieQX2pyEDBr8hljoM=; b=TDSltpKa2KHPfHE1NkLympPxuOBRljN/VqLXBfUT861kaBBT1x+9IkKL5ngNDvgHdB SXP6bl9rzOlcN6nqQNHSQvu07hs2XP50ypeOF2AS+NLOyL04F24TDgB1icQ7brBwLgKA VJcJrzm6U4LsNyLqktiqJf3mpojSh000nAesk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275749; x=1778880549; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=sVmq4etdovYoJDRMA/BMmOvUPNieQX2pyEDBr8hljoM=; b=UXm3GfBH6wxWkymUMxq7tMB8FjYVNT4355GqUgKZVD8LWfyHPkTvJzsJlNCCbRZ1BT mWBqomaMJRP2u1rd0CAZh/6Mqf7/QJjnHwak87G6a8YUq7bynMDmkYKE7dUqZrb5Lyov 5sXAleuD07i2PL7sUc4Pm6clip80aml7CtANwtjkf+dMeoFfvQ8tLAwwibdfVgSsp3yl mmwBIUOhRIyMYeAHD4b2Yfy2ZwSUlwShutBjiqx27RjbMakipxvY8Q2vzM0//0i2dTI/ bcm1e2gQlybTMHVOJDl9D+gG7Eq0IWtwunBFyEGaBP1DzAcGmUKDzniUdZLZtguN0W5u tsAA== X-Gm-Message-State: AOJu0YyVpnLh+TiqBPbBGOEA6B6MSbMdc+hCEwUMcimqF2LqFdJepDnR gvwx6tR6k3cJBRtugJXTXaLplhD627EGHtU5szC3OeZvtGxLc8FZzCkbGaJRUYpCAWUixQh5R7G unJDe7vc= X-Gm-Gg: Acq92OHvvL0TbUwhGjzXEN6HbT51YvXNxEwnl2XLK+OISRm+6HaOecMyVcw1CJXOd2V lSkW8CaPxk3qw33odjwjXFayYLIxGj2SdTUvlV+ElnCrcj9tEjsO356QtKThVBdDqA1IqC4Os0y DPnfE+faKalm+afsw8ptYd+k8IaYswXYP6OWysAtxzepTM3UYa4PlhxINqZbGxzUbfkzRH4AZv0 NeaNa2wxvEKAPYWHeqJyJOWsiXXfGLu9Dko+PNNgnv5+4Apeaew4xCsUekdljEyMamF/HqCANmA 1kcTSMD13Aj7GJ4KderYTpRJuePQZZn3YdMJjgM8KWbxyDxecwJwhi2IgrEFK4CYKOJe+0pFmP7 dqlAu/yyb6JBTXhEre9+QsJ+BoBWuLSITrb0RORjmMa0GUq5852GZgmVZ7jfqW9Xrxwe10WUN7/ Oum3clFXLw18U/w3+2hpgH0+nk47sKt10jvbF/EUcUtwoIvt5iWoiGTaAKJ4vPtiWgMwCTYfOYA k8W X-Received: by 2002:a5d:5d85:0:b0:454:86d:b4d2 with SMTP id ffacd0b85a97d-45689baa9b3mr100523f8f.8.1778275749343; Fri, 08 May 2026 14:29:09 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root Date: Fri, 8 May 2026 22:29:03 +0100 Message-Id: <20260508212907.1643761-2-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778275750-AB563161-4DC6A5B8/0/0 X-purgate-type: clean X-purgate-size: 2648 The binaries/ directory is a composition from the artefacts, and also used as a working directory for most of the tests. If the very first artefact is from a root container, then the test must also be a root container to use it as a working directory. For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the microcode-x86 artefact as it's the smallest available. This bodge can be removed when all build containers have become non-root. For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate the *-export dependency. This will allow us to change containers to being non-root one at a time, rather than all in one go. No functional change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein We should also stop using binaries/ as a working directory for the tests, but that gets very complicated very quickly and I don't have time to do it at this juncture. --- automation/gitlab-ci/test.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8770c523e228..517af1732437 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -15,6 +15,12 @@ - qemu-system-aarch64-6.0.0-arm64-export .arm32-test-needs: &arm32-test-needs + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes + # from a non-root container, and microcode-x86 is the smallest. Remove when + # all build containers have become non-root. + - project: $ARTIFACTS_REPO + job: microcode-x86 + ref: $ARTIFACTS_BRANCH - qemu-system-aarch64-6.0.0-arm32-export .x86-64-test-needs: &x86-64-test-needs @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: script: - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} needs: + - *arm64-test-needs - alpine-3.18-gcc-arm64 - - qemu-system-aarch64-6.0.0-arm64-export qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: extends: .qemu-arm64 script: - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} needs: + - *arm64-test-needs - alpine-3.18-gcc-debug-arm64 - - qemu-system-aarch64-6.0.0-arm64-export qemu-smoke-dom0-arm32-gcc: extends: .qemu-arm32 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304254.1577364 (Exim 4.92) (envelope-from ) id 1wLSl2-0005cE-1f; Fri, 08 May 2026 21:29:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304254.1577364; Fri, 08 May 2026 21:29:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSl1-0005ah-T1; Fri, 08 May 2026 21:29:15 +0000 Received: by outflank-mailman (input) for mailman id 1304254; Fri, 08 May 2026 21:29:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wLSl0-0005Gs-GH for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkz-000E8K-Tf for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:13 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5508-5cb7-0a2a0a5109dd-0a2a4508bcd8-36 for ; Fri, 08 May 2026 23:29:13 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a9-63b5-0a2a45080019-d155dd35d1fa-3 for ; Fri, 08 May 2026 23:29:13 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-45297094718so1933598f8f.3 for ; Fri, 08 May 2026 14:29:13 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:12 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275753; x=1778880553; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3pK0KfhDLNVVZ6TWY1JZ97U9wzF5HmGiXTOWuG1PAs8=; b=YW3kIXyVCV8+kHX+dX/5jZATJW7G7uq0dyrX8E73zEn4p2fOeEETk1k4wI8HAIhrPX Rp1GBc4oknSKFIj/fiBOfX0bZhL7yq5tCb0A1/PumjWCN/ABRGG4IocqJkjSyMi+ViZL wKBzeBKiIGeaJbfzPJnBBM+c9oYOGrqzVAwUY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275753; x=1778880553; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=3pK0KfhDLNVVZ6TWY1JZ97U9wzF5HmGiXTOWuG1PAs8=; b=dlNSijxEWSRPDiTLlbYPA5FAwwFpjOSd4clmjm0nngbNWb3AbsD54OwXjIO70bqwQg WT0Deys9lxXwIeq4JH+NuIx2fo/mdUID2llbJF/00qhlqFQyW6Un4H/3cjvROj0PoGqE pwbTZB8PwW4CX/qsKW7x/YbLE2riyoLDDWCgEOmwYalhKconig29/irES0VPUQZiBn8X OQt9/ZWFlPooMDWlufxgFRD8ZIQ66DFKM++qW6F1AJMNDjsCWB5sVt1hmvWTuUHPMqeV 81mSSGPqaH46gHa/gbF5BOF6CSTYfQLd+v60wiCsw79/9/qPXTAfi21567zk6ikh1izC jt6A== X-Gm-Message-State: AOJu0YwqcYkRwTMU9/wQBnIHf0SVNGb1YOvsVxJNbjun9NQAKg3JRom4 4EHAcFRnDT5j5NI78vX5c2kpqJvhwKt1lRFAqbhux2lprZAKbBpZyjEFbnQl4Z2mPCcOq3e8vbi uWY98TNU= X-Gm-Gg: Acq92OFzvjrCyTD7wcmF4A2+qn4i7P6kuLewlqw3flIeTLFxURqiqzEwAWwTyq7Fbyv /TKxUkChP06n3WcGqzP3tyJN4TQ/hQB2FHDdK8JuhPeq7EjKfY7XGIKzmuye/J8hFPBT2pl5coC A1pv4FNmmLobzBXkaK+jZX8fBu06IlUmdjsvWel8ahJxuvcVE+Msu5ZvEzgcSDUN03HGhoqDqHE f2mUDwZGKcDFJbz64bJn75eoy/evfJGeQSJh85yyNJtfCvSZOrk63hkCex5N7Kj9rCwXixm8cZ2 Hw29FJbAjMBHJnYxIBhGxj7MDc58RvjkB5yRq306GEBtlZsocAEkPGClL+ywtwFSZK1KWBp1Qg5 0Wp/ssEpQRBvq/8xIY0t0qa2NmKh/jvm1OItJAn/hfu/yCnvHYbWrNae/qyjaNADiqtMfFnG3M5 hdnfetXo+ysnDhBuHYS9sxUhm8i0L5ka80McQHDrfj7yy9qHC7XPxUJO7/DtuuXkabKGLWgKf3l 495MarUsTTkI3g= X-Received: by 2002:a05:6000:2087:b0:451:b1a:a753 with SMTP id ffacd0b85a97d-4515b0572a7mr22726817f8f.6.1778275752521; Fri, 08 May 2026 14:29:12 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 5/5] CI: Switch qemu-arm* jobs to using the distro provided QEMU Date: Fri, 8 May 2026 22:29:07 +0100 Message-Id: <20260508212907.1643761-6-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778275753-B5F6ADB1-C4C1A11A/10/63158204843 X-purgate-type: spam X-purgate-size: 11153 This removes qemu-system-aarch64-6.0.0-*-export and fixes the outstanding TODOs about efi-virtio.rom, now that the QEMU in use has it's /usr/share/ properly packaged. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein --- automation/gitlab-ci/build.yaml | 33 -------- automation/gitlab-ci/test.yaml | 2 - automation/scripts/include/xtf-arm64 | 7 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 6 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm32.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm64.sh | 6 +- .../6.0.0-arm64v8.dockerfile | 77 ------------------- 8 files changed, 10 insertions(+), 133 deletions(-) delete mode 100644 automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index e50ff6936c5c..be4a038363ac 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -265,39 +265,6 @@ variables: <<: *gcc -## Test artifacts common - -.test-jobs-artifact-common: - stage: build - needs: [] - rules: - - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY - when: on_success - -# Arm test artifacts - -qemu-system-aarch64-6.0.0-arm64-export: - extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8 - script: - - mkdir binaries && cp /qemu-system-aarch64 binaries/qemu-system-aarch64 - artifacts: - paths: - - binaries/qemu-system-aarch64 - tags: - - arm64 - -qemu-system-aarch64-6.0.0-arm32-export: - extends: .test-jobs-artifact-common - image: registry.gitlab.com/xen-project/xen/tests-artifacts/qemu-system-aarch64:6.0.0-arm64v8 - script: - - mkdir binaries && cp /qemu-system-arm binaries/qemu-system-arm - artifacts: - paths: - - binaries/qemu-system-arm - tags: - - arm64 - # Jobs below this line # Build jobs needed for tests diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 008deef98d1e..1722800c1541 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -12,7 +12,6 @@ - project: $ARTIFACTS_REPO job: alpine-3.18-arm64-rootfs ref: $ARTIFACTS_BRANCH - - qemu-system-aarch64-6.0.0-arm64-export .arm32-test-needs: &arm32-test-needs # Bodge to ensure binaries/ is non-root. Can be any artefact which comes @@ -21,7 +20,6 @@ - project: $ARTIFACTS_REPO job: microcode-x86 ref: $ARTIFACTS_BRANCH - - qemu-system-aarch64-6.0.0-arm32-export .x86-64-test-needs: &x86-64-test-needs - project: $ARTIFACTS_REPO diff --git a/automation/scripts/include/xtf-arm64 b/automation/scripts/include/xtf-arm64 index 1a318b7aa0ba..5d851af788a1 100644 --- a/automation/scripts/include/xtf-arm64 +++ b/automation/scripts/include/xtf-arm64 @@ -7,7 +7,7 @@ function xtf_arch_prepare() { export FW_PREFIX="${FW_PREFIX:-/usr/lib/u-boot/qemu_arm64/}" - export QEMU_PREFIX="${QEMU_PREFIX:-${WORKDIR}/}" + export QEMU_PREFIX="${QEMU_PREFIX:-}" export XEN_BINARY="${XEN_BINARY:-${WORKDIR}/xen}" export XEN_CMDLINE="${XEN_CMDLINE:-loglvl=all noreboot console_timestamps=boot console=dtuart}" export XTF_SRC_BRANCH="${XTF_SRC_BRANCH:-xtf-arm}" @@ -18,9 +18,6 @@ function xtf_arch_prepare() # Perform arch-specific XTF environment setup. function xtf_arch_setup() { - # QEMU looks for "efi-virtio.rom" even if it is unneeded - curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom - # Crude check for local testing if [ ! -d imagebuilder ]; then git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git @@ -47,7 +44,7 @@ EOF cp ${XTF_BINARY} ${WORKDIR}/xtf-test # Generate virt-gicv2.dtb - ${WORKDIR}/qemu-system-aarch64 \ + ${QEMU_PREFIX}qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 \ -machine type=virt \ diff --git a/automation/scripts/qemu-smoke-dom0-arm32.sh b/automation/scripts/qemu-smoke-dom0-arm32.sh index 58797f7d30d3..5dc348c71aa9 100755 --- a/automation/scripts/qemu-smoke-dom0-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0-arm32.sh @@ -39,9 +39,7 @@ cp ../zImage ./root find . | cpio -R 0:0 -H newc -o | gzip > ../initrd.gz cd .. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./qemu-system-arm \ +qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ @@ -77,7 +75,7 @@ git clone --depth 1 https://gitlab.com/xen-project/imagebuilder.git bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config rm -f ${serial_log} -export TEST_CMD="./qemu-system-arm \ +export TEST_CMD="qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ diff --git a/automation/scripts/qemu-smoke-dom0-arm64.sh b/automation/scripts/qemu-smoke-dom0-arm64.sh index 05962bdc0203..1d673f184251 100755 --- a/automation/scripts/qemu-smoke-dom0-arm64.sh +++ b/automation/scripts/qemu-smoke-dom0-arm64.sh @@ -57,9 +57,7 @@ chmod +x etc/local.d/xen.start find . | cpio -R 0:0 -H newc -o | gzip >> ../dom0-rootfs.cpio.gz cd ../.. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./binaries/qemu-system-aarch64 \ +qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt \ -m 2048 -smp 2 -display none \ @@ -90,7 +88,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binaries/conf # Run the test rm -f smoke.serial -export TEST_CMD="./binaries/qemu-system-aarch64 \ +export TEST_CMD="qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt \ -m 2048 -monitor none -serial stdio \ diff --git a/automation/scripts/qemu-smoke-dom0less-arm32.sh b/automation/scripts/qemu-smoke-dom0less-arm32.sh index 627d890a3926..20e43b4f049d 100755 --- a/automation/scripts/qemu-smoke-dom0less-arm32.sh +++ b/automation/scripts/qemu-smoke-dom0less-arm32.sh @@ -78,9 +78,7 @@ chmod +x init find . | cpio -R 0:0 -H newc -o | gzip > ../initrd.gz cd .. -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./qemu-system-arm \ +qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ @@ -130,7 +128,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d . -c config # Run the test rm -f ${serial_log} -export TEST_CMD="./qemu-system-arm \ +export TEST_CMD="qemu-system-arm \ -machine virt \ -machine virtualization=true \ -smp 4 \ diff --git a/automation/scripts/qemu-smoke-dom0less-arm64.sh b/automation/scripts/qemu-smoke-dom0less-arm64.sh index 05c4a6acbb59..a9e99f1ae392 100755 --- a/automation/scripts/qemu-smoke-dom0less-arm64.sh +++ b/automation/scripts/qemu-smoke-dom0less-arm64.sh @@ -78,9 +78,7 @@ if [[ "${test_variant}" == "gicv3" ]]; then domU_check="echo \"${passed}\"" fi -# XXX QEMU looks for "efi-virtio.rom" even if it is unneeded -curl -fsSLO https://github.com/qemu/qemu/raw/v5.2.0/pc-bios/efi-virtio.rom -./binaries/qemu-system-aarch64 \ +qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt,gic-version=$gic_version \ -m 2048 -smp 2 -display none \ @@ -203,7 +201,7 @@ bash imagebuilder/scripts/uboot-script-gen -t tftp -d binaries/ -c binaries/conf # Run the test rm -f smoke.serial -export TEST_CMD="./binaries/qemu-system-aarch64 \ +export TEST_CMD="qemu-system-aarch64 \ -machine virtualization=true \ -cpu cortex-a57 -machine type=virt,gic-version=$gic_version \ -m 2048 -monitor none -serial stdio \ diff --git a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile b/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile deleted file mode 100644 index e9f5576be7a6..000000000000 --- a/automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile +++ /dev/null @@ -1,77 +0,0 @@ -# syntax=docker/dockerfile:1 -FROM --platform=linux/arm64/v8 debian:bookworm -LABEL maintainer.name="The Xen Project" \ - maintainer.email="xen-devel@lists.xenproject.org" - -ENV DEBIAN_FRONTEND=noninteractive -ENV QEMU_VERSION=6.0.0 -ENV USER root - -RUN mkdir /build -WORKDIR /build - -# build depends -RUN apt-get update && \ - apt-get --quiet --yes install \ - build-essential \ - curl \ - python3 \ - ninja-build \ - pkg-config \ - libglib2.0-dev \ - libpixman-1-dev \ - && \ - \ - curl -fsSLO https://download.qemu.org/qemu-"$QEMU_VERSION".tar.xz && \ - tar xvJf qemu-"$QEMU_VERSION".tar.xz && \ - cd qemu-"$QEMU_VERSION" && \ - ./configure \ - --target-list=arm-softmmu,aarch64-softmmu \ - --enable-system \ - --disable-blobs \ - --disable-bsd-user \ - --disable-debug-info \ - --disable-glusterfs \ - --disable-gtk \ - --disable-guest-agent \ - --disable-linux-user \ - --disable-sdl \ - --disable-spice \ - --disable-tpm \ - --disable-vhost-net \ - --disable-vhost-scsi \ - --disable-vhost-user \ - --disable-vhost-vsock \ - --disable-virtfs \ - --disable-vnc \ - --disable-werror \ - --disable-xen \ - --disable-safe-stack \ - --disable-libssh \ - --disable-opengl \ - --disable-tools \ - --disable-virglrenderer \ - --disable-stack-protector \ - --disable-containers \ - --disable-replication \ - --disable-cloop \ - --disable-dmg \ - --disable-vvfat \ - --disable-vdi \ - --disable-parallels \ - --disable-qed \ - --disable-bochs \ - --disable-qom-cast-debug \ - --disable-vhost-vdpa \ - --disable-vhost-kernel \ - --disable-qcow1 \ - --disable-live-block-migration \ - && \ - make -j$(nproc) && \ - cp ./build/qemu-system-aarch64 / && \ - cp ./build/qemu-system-arm / && \ - cd /build && \ - rm -rf qemu-"$QEMU_VERSION"* && \ - apt-get autoremove -y && \ - apt-get clean && \ - rm -rf /var/lib/apt/lists* /tmp/* /var/tmp/* -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:29:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304252.1577353 (Exim 4.92) (envelope-from ) id 1wLSl1-0005Q0-8n; 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:10 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275752; x=1778880552; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=UxdUfwcXb8ISQulfHsZ5+IBQxfYeU+5dzOWpCcoWqBo=; b=svfHOJtyRIt6foUhLLrmGzGMUWf7nLYydc6CJd3M2mBAlpVLSejt+xuCPekxhUhbfU sIbtHpmuxzn2TnnlTCpd84YXziOptC9Ip5oz3ZQUC0y3Wtmv+m3D921clGi6GNtwH28K bTkx3/nvreo7cqenRc5ISN/Q/2Z/l+e3a45AY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275752; x=1778880552; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=UxdUfwcXb8ISQulfHsZ5+IBQxfYeU+5dzOWpCcoWqBo=; b=RX4nrYuz05udJdGFfWbVBYKIfKWY5GTxMFCD6U/2x12YA4vTt8aLrCBavy1zC1xVpy 4TOaUBCTMWutTXT4a7yM8zQAsCbmHgsDfK2ZITmGOMm5w5lz0n+wmYCvQauL2AuGqQbi Tv0PKS56KI9UJJNSqt/CLoWsNq+lVPNW830LNAqyxL4UWmCq/nQVZuFEtplJlFsQ8+JU ybBkt4rW6zh5F19kWNsO7hVtKFgkv67iQosH++kLjrPccZVxnWba0nw5GjmlVZCQhIua J1erBXgDG+ne3JNoCJmcbDURM7W/VkG6zKLZZQCYi4YGkhcnmj91QCC+JSv2B05pX/2A 3x8Q== X-Gm-Message-State: AOJu0YxqDW8B3NgMoEFU8SV6KlJ8JGxBh3L8t38sor26NiyFwuw1bFw7 5qburdkioqsESKvb177z2NwYJLx3wU0dqsMSdl1KST5X144SaP+I8EpakYh/NhGBsEo1klQJYbU KYmua/mY= X-Gm-Gg: Acq92OHYFnHkhjLCC16vyUBVUyphuNPwyxGvwSQpwwUDDSi6T9J+5Zc2O1ITwily+n2 ItdWZ4QwGnWcTMQ3A07zRTswrxejqLznRouU4DXSAVArDWNFfIsnLgx7/S0FqGyQVYZBk5lhIFr 15Q78vXMI9pA1+5F8pQRUHZrfgEvZNvKlcKcMGOlLfVXQTH9JLkSBZWxg3zH6TCdn14UIIF0vBd 4BP7PDddxvKxlx2AmSCRJozP9MNGe118+//eoyFT4fsNwnLY17HrNnnRJMi0310zLHA7Oc8CTMl vYIbaezD7MInqbsz4B3NeM98WAkUBqh840avtsfxNZbFMtIXB4EpbhikQv9Cl/pkuy1XVqVGW6W L7bsyGse1XwSqgaxOOtsorzT0/HcMAXszfznGXiB7VtJnMSB+Jw2OKALCT/BXi23wLbkTu7zlMD hZ/7NKER3+G4u+kDmp9ZOLJbzapAz5rT/+o8myyq2xhOcKpvSCWxRB6QVJSk1tdFDKrnhlW5+nf bX0 X-Received: by 2002:a5d:5683:0:b0:452:a5c3:3e4a with SMTP id ffacd0b85a97d-452a5c33e5amr11336261f8f.2.1778275751316; Fri, 08 May 2026 14:29:11 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 3/5] CI: Refresh the Debian 12 arm64 container Date: Fri, 8 May 2026 22:29:05 +0100 Message-Id: <20260508212907.1643761-4-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260508212907.1643761-1-andrew.cooper3@citrix.com> References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778275752-B7754FF4-8CED085D/10/63158204843 X-purgate-type: spam X-purgate-size: 7184 From: Javi Merino Rework the container to user heredocs for readability, derive from bookworm-slim and use apt-get --no-install-recommends to keep the size down. Additionally: * Make it a non-root container. * Drop libext2fs-dev which is an x86-only dependency. * Add libncurses5-dev for xentop and zlib1g-dev which was missing from the libxenguest decompressors. * As there's no ninja, the container can no loger build QEMU so drop libglib2.0-dev and libpixman-1-dev too. * Swap libyajl-dev for libjson-c-dev given the latters deprecation. Rename the job to debian-12-arm64-* to follow the naming scheme of all the other CI jobs. This reduces the size of the debian:12-arm64v8 from 2.25GB down to 1.62GB. Signed-off-by: Javi Merino Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Stefano Stabellini CC: Michal Orzel CC: Doug Goldstein Depends on "[PATCH] tools/libxl: Fix libxl_nocpuid.c build with json-c" submitted separately. --- automation/build/debian/12-arm64v8.dockerfile | 69 +++++++++++++++++++ .../build/debian/bookworm-arm64v8.dockerfile | 55 --------------- automation/gitlab-ci/build.yaml | 8 +-- automation/gitlab-ci/test.yaml | 4 +- automation/scripts/containerize | 2 +- 5 files changed, 76 insertions(+), 62 deletions(-) create mode 100644 automation/build/debian/12-arm64v8.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8.dockerfile diff --git a/automation/build/debian/12-arm64v8.dockerfile b/automation/build/debian/12-arm64v8.dockerfile new file mode 100644 index 000000000000..c0e08a010f6a --- /dev/null +++ b/automation/build/debian/12-arm64v8.dockerfile @@ -0,0 +1,69 @@ +# syntax=docker/dockerfile:1 +FROM --platform=linux/arm64/v8 debian:bookworm-slim +LABEL maintainer.name="The Xen Project" +LABEL maintainer.email="xen-devel@lists.xenproject.org" + +ENV DEBIAN_FRONTEND=noninteractive + +RUN < Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:29:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304250.1577330 (Exim 4.92) (envelope-from ) id 1wLSky-0004oa-Mi; Fri, 08 May 2026 21:29:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304250.1577330; Fri, 08 May 2026 21:29:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSky-0004oJ-Iu; Fri, 08 May 2026 21:29:12 +0000 Received: by outflank-mailman (input) for mailman id 1304250; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLSkx-0004lA-G4 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 21:29:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLSkw-000E8K-Ke for xen-devel@lists.xenproject.org; Fri, 08 May 2026 23:29:10 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5568-5cb7-0a2a0a5109dd-0a2a4504d398-24 for ; Fri, 08 May 2026 23:29:10 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe55a6-1dec-0a2a45040019-d155dd34d4e1-3 for ; Fri, 08 May 2026 23:29:10 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso1423792f8f.0 for ; Fri, 08 May 2026 14:29:10 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45491ca383asm7548608f8f.28.2026.05.08.14.29.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 May 2026 14:29:08 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778275749; x=1778880549; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=N7PhNq5m+H+OFW/x+gihCJ9/fpAKXYUtHMB+rax9vss=; b=FM0OR8FR30opGqMsRAySRLXdL3J383mB8ntp6Aq16juqWua3Lt52+pLRJg75yBiAul 4Hhf6CTbFe90wc58cYfOXgx5Q+bzLg6rffRyDQy3Cd4Zyo+jmmCJJKeW4SttSscND9Zu Bn8swhWr5O63dOp3+e9qcrHd7PnAIAlDc6BzA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778275749; x=1778880549; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=N7PhNq5m+H+OFW/x+gihCJ9/fpAKXYUtHMB+rax9vss=; b=gysg0PU+R75rQ48/Z/xaNYeVxO2VoQr/yKjmXoZioI80kWli0Vb9DMVA/m8RN5gP/L PScY8DTmydyz3d9OhIEK1RLWJeONvUEFcF/7iqz1iHJSOBVynRbEEBa/oNacjrvy3sDM HbaKyLQehgjaYeFIzVmYTl7leITxuIAHwl9+N8yILJGMqCxZCvhRcpq0TCDnmpZ7ocj3 +ds8EMKCeqXatC8fploznl2RsJmjKkezW4EVH7Ih34pfJqBujI520uT9J89f4aH2pyRc PlZTfKcbf4hnGj69m10KQw+LiSzMGa7AncfK9PHNUrk8Pu/6HSo4iJDwjgHDdjFodh11 kKxQ== X-Gm-Message-State: AOJu0YzGc19Od86FQtEGPVIoi41bbj3CnihhmXFw9EZp+mFcLAtsdM8E yRwEQfwAMnb3HnmyEhuR8RjX5Os1iKln0zSyoGysLFpntdjeajapKGcV19N4KGA0GTzBcQzPZSF vFb2pQIk= X-Gm-Gg: Acq92OGz7ww1jEURp4rQ9h92/k5ZeNSX6hAkWwnYNvfNnkfmoe4kGXe6CMBlDxA+6b4 awR1ZM0ddK5HP59Q0rFph5bMJ9XTnNXSSUU3FZKwGiUja4rIgVzG2X7tfTb4lNTvc6A9jpEVLDk rfgz6vUQFhZAuaaNnq4HrHWt7qDs1QbSUATp2sSWbQboWeRewsFhCu/61ALHJub9jD6ayU5IZGI dgIIz9lw/N4js1iRJMsc3Af/wcvBv+s/sLx9D1JCoNA/qMBLx/f9BHKKjrsOLcdCsM4Lqk0vFpA NRg7opeAQWUzh4LVM8/ZLqSW5npp8N68EBrpIcbEN3cgYce+psO94bknihUXdLghxJAsbyxkd3O 4mgyw+R4OyH09SZvnxdz6Wo32NH6f4EZIzWB5kdKJYBRFVFPOcRUJB4aVwvISWh3qyVS+mgRB4M 12SVOBML0/xFtyDX8+YnAIJ9DrZhJ5jatBaF1n3oNTazH5TyfwYxgJrx7qUhdc/n64WWKd6E86P fp5 X-Received: by 2002:a05:6000:24ca:b0:449:a07a:967f with SMTP id ffacd0b85a97d-4515cf127cemr23232077f8f.28.1778275748693; Fri, 08 May 2026 14:29:08 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Michal Orzel , Doug Goldstein Subject: [PATCH 0/5] CI: Refresh ARM Debian testing Date: Fri, 8 May 2026 22:29:02 +0100 Message-Id: <20260508212907.1643761-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1778275750-40B733FF-922BD691/0/0 X-purgate-type: clean X-purgate-size: 2017 Long overdue. Clean up the ARM Debian containers, conforming to the new style and naming schemes, and purge the final *-export jobs. I have already deployed the containers as they're new names and don't collide. I have also checked that the series produces a green pipeline on every commit. Andrew Cooper (3): CI: Adjust test needs[] to ensure binaries/ is non-root CI: Add a Debian 13 (Trixie) arm64 container CI: Switch qemu-arm* jobs to using the distro provided QEMU Javi Merino (2): CI: Refresh the Debian 12 arm32 cross compile container CI: Refresh the Debian 12 arm64 container .../build/debian/12-arm64v8-arm32.dockerfile | 32 ++++++++ automation/build/debian/12-arm64v8.dockerfile | 69 +++++++++++++++++ automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++ .../bookworm-arm64v8-arm32-gcc.dockerfile | 24 ------ .../build/debian/bookworm-arm64v8.dockerfile | 55 ------------- automation/gitlab-ci/build.yaml | 65 ++++------------ automation/gitlab-ci/test.yaml | 30 ++++---- automation/scripts/containerize | 5 +- automation/scripts/include/xtf-arm64 | 7 +- automation/scripts/qemu-smoke-dom0-arm32.sh | 6 +- automation/scripts/qemu-smoke-dom0-arm64.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm32.sh | 6 +- .../scripts/qemu-smoke-dom0less-arm64.sh | 6 +- .../6.0.0-arm64v8.dockerfile | 77 ------------------- 14 files changed, 218 insertions(+), 241 deletions(-) create mode 100644 automation/build/debian/12-arm64v8-arm32.dockerfile create mode 100644 automation/build/debian/12-arm64v8.dockerfile create mode 100644 automation/build/debian/13-arm64v8.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8-arm32-gcc.dockerfile delete mode 100644 automation/build/debian/bookworm-arm64v8.dockerfile delete mode 100644 automation/tests-artifacts/qemu-system-aarch64/6.0.0-arm64v8.dockerfile -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 08 21:44:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:44:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304302.1577379 (Exim 4.92) (envelope-from ) id 1wLT00-00020V-8Q; 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Fri, 08 May 2026 14:44:40 -0700 (PDT) MIME-Version: 1.0 References: <038337ec0e3f1474c6cc6a92090e28c6972e4dc6.1775125380.git.mykola_kvach@epam.com> <6E040BE7-0133-46AE-8B5C-85EA02704285@arm.com> In-Reply-To: <6E040BE7-0133-46AE-8B5C-85EA02704285@arm.com> From: Mykola Kvach Date: Sat, 9 May 2026 00:44:28 +0300 X-Gm-Features: AVHnY4I0Dk2BilN5FXWZwMs1RodiY10g2RcGJNBpEZQCimgeqB7rX_DKU3Xpq9s Message-ID: Subject: Re: [PATCH v8 09/13] arm/smmu-v3: add suspend/resume handlers To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1778276681-09969C48-B36CE70F/0/0 X-purgate-type: clean X-purgate-size: 3043 On Fri, May 8, 2026 at 3:22=E2=80=AFPM Luca Fancellu wrote: > > HI Mykola, > > >>> > >>> -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu= ) > >>> +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > >>> { > >>> int ret; > >>> u32 reg, enables; > >>> @@ -2163,17 +2166,9 @@ static int __init arm_smmu_device_reset(struct= arm_smmu_device *smmu) > >>> } > >>> } > >>> > >>> - ret =3D arm_smmu_setup_irqs(smmu); > >>> - if (ret) { > >>> - dev_err(smmu->dev, "failed to setup irqs\n"); > >> > >> We are moving this one to the probe and .. > >> > >>> + ret =3D arm_smmu_enable_irqs(smmu); > >>> + if ( ret ) > >> > >> changing with this one, but arm_smmu_setup_irqs() also calls arm_smmu_= setup_unique_irqs() which > >> calls arm_smmu_setup_msis(), are we sure that on resume we will get th= e same state? > > > > This follows the split introduced in the Linux arm-smmu-v3 runtime/syst= em sleep > > series: > > > > https://lore.kernel.org/linux-iommu/20260414194702.1229094-1-praan@goog= le.com/ > > > > The intent is to keep IRQ handler registration as one-time probe state,= while > > reset/resume only restores the SMMU hardware state and re-enables inter= rupt > > generation. > > > > You are right that the MSI case needs extra care. In the Linux series t= his is > > handled by arm_smmu_resume_msis(), which restores the SMMU-side MSI > > configuration. I did not port that part in this patch because Xen SMMUv= 3 MSI > > support is currently documented as unsupported and is not part of the > > supported/tested path, so this patch only covers the wired IRQ path use= d by Xen > > today. > > > > If Xen SMMUv3 MSI support becomes usable in the future, the resume path= will > > need an equivalent MSI restore step before IRQ_CTRL is re-enabled. > > In the mean time should we check maybe smmu->features doesn=E2=80=99t hav= e > ARM_SMMU_FEAT_MSI flag and document it in commit message? > > What do you think about it? I=E2=80=99m just worried someone uses CONFIG_= MSI and your > feature and ends up in some trouble, while we know that your feature brea= ks > CONFIG_MSI. Good point. I don't think checking only ARM_SMMU_FEAT_MSI in this patch is the right approach, since that reflects hardware capability rather than whether Xen i= s actually using the SMMUv3 MSI IRQ path. For v9, I plan to keep this SMMUv3 patch limited to documenting the current limitation in the driver and in the commit message: the MSI IRQ path is not host-suspend-safe yet because resume does not restore the SMMU *_IRQ_CFGn registers. The actual runtime block will be added in a later host suspend policy patch= , together with the other runtime blockers. That keeps the policy in one plac= e and ensures PSCI_FEATURES(SYSTEM_SUSPEND) stays consistent with the actual SYSTEM_SUSPEND handling. Best regards, Mykola > > Maybe the maintainers can give their opinion here as well. > > Cheers, > Luca From xen-devel-bounces@lists.xenproject.org Fri May 08 21:46:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:46:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304310.1577389 (Exim 4.92) (envelope-from ) id 1wLT1K-0002Ue-Ht; Fri, 08 May 2026 21:46:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304310.1577389; Fri, 08 May 2026 21:46:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT1K-0002UX-FF; Fri, 08 May 2026 21:46:06 +0000 Received: by outflank-mailman (input) for mailman id 1304310; Fri, 08 May 2026 21:46:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT1H-0002UN-QU for xen-devel@lists.xenproject.org; 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> > - unsigned int start, size, chunk, order, memflags; > > + unsigned int start, size, chunk; > > unsigned long flags; > > > > if ( !opt_conring_size ) > > return; > > > > - order = get_order_from_bytes(max(opt_conring_size, conring_size)); > > - memflags = MEMF_bits(crashinfo_maxaddr_bits); > > - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) > > + opt_conring_size = max(opt_conring_size, conring_size); > > + size = ROUNDDOWN(opt_conring_size, PAGE_SIZE); > > + if ( size != opt_conring_size ) > > { > > - BUG_ON(order == 0); > > - order--; > > + opt_conring_size = size; > > + printk(XENLOG_WARNING "Rounding down console ring size to multiple of %lu KiB.\n", > > + PAGE_SIZE >> 10); > > } > > - opt_conring_size = PAGE_SIZE << order; > > + if ( opt_conring_size >= GB(2) ) > > + { > > + opt_conring_size = GB(2); > > + printk(XENLOG_WARNING "Limiting user-configured console ring size.\n"); > > + } > > + else if ( opt_conring_size < _CONRING_SIZE ) > > + { > > + opt_conring_size = _CONRING_SIZE; > > + printk(XENLOG_WARNING "Using compile-time console ring size.\n"); > > + } > > + > > + /* Contiguous buffer; does not need to be naturally aligned. */ > > + ring = xmalloc_bytes(opt_conring_size); > > I'm sorry, but I'm going to veto any new uses of xmalloc_bytes(). As per the > comment at the top of xvmalloc.h, the family of functions there should be used > in new code. That family deliberately doesn't include a counterpart of > xmalloc_bytes(). You're wanting a multiple of page size anyway, so perhaps it > is warranted here to actually use vmalloc() directly. Thanks for taking a look at the series! Sorry it's been a while, I am getting back to the series only now :-/ Turns out that vmalloc() is not available on MPU systems (*-mpu jobs in CI): CONFIG_HAS_VMAP is disabled. I will switch to xvmalloc-backed allocation, if that's OK. -- Denis From xen-devel-bounces@lists.xenproject.org Fri May 08 21:46:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 21:46:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304319.1577398 (Exim 4.92) (envelope-from ) id 1wLT2A-00031A-1R; Fri, 08 May 2026 21:46:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304319.1577398; Fri, 08 May 2026 21:46:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT29-000313-Tz; Fri, 08 May 2026 21:46:57 +0000 Received: by outflank-mailman (input) for mailman id 1304319; Fri, 08 May 2026 21:46:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLT28-00030q-Dr for xen-devel@lists.xenproject.org; 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The more that, with the original behavior > properly restored in patch 5, it'll be a power-of-2 multiple of PAGE_SIZE > anyway? > > > Also, update the logline reporting the final conring buffer size to report > > bytes instead of kilobytes, since the user-defined size may not necessarily > > be kilobyte-alined. > > Yet making the number harder to grok. > > > Suggested-by: Andrew Cooper > > Having talked to him, I don't think he meant what you're doing here. All he > apparently meant is to stop using alloc_*heap_pages(), which needlessly > supplies order-aligned memory. Thanks, I will drop that patch. -- Denis From xen-devel-bounces@lists.xenproject.org Fri May 08 22:10:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 22:10:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304337.1577406 (Exim 4.92) (envelope-from ) id 1wLTOT-0007NE-Po; Fri, 08 May 2026 22:10:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304337.1577406; Fri, 08 May 2026 22:10:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTOT-0007Mj-MK; Fri, 08 May 2026 22:10:01 +0000 Received: by outflank-mailman (input) for mailman id 1304337; Fri, 08 May 2026 22:10:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTOS-0007Ec-K9 for xen-devel@lists.xenproject.org; Fri, 08 May 2026 22:10:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLTOS-008ItA-0y for xen-devel@lists.xenproject.org; Sat, 09 May 2026 00:10:00 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fe5f34-2eae-0a2a0a5409dd-0a2a450c9ac2-4 for ; Sat, 09 May 2026 00:09:59 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fe5f36-62f1-0a2a450c0019-ac6904feecee-3 for ; Sat, 09 May 2026 00:09:59 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 28D5860181; Fri, 8 May 2026 22:09:58 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id AB865C2BCB0; Fri, 8 May 2026 22:09:57 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778278197; bh=kHdcgmqC5b2xNkh8ZM37T9xVRgnh1ZpkO/c85/rTw8M=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=VmUyuDEXWQ96wivWfgCTxptNpYwWfn2fwr4uIPSEVD/0d85lkXdPwjm7+fRmJNfvK FIV0WVKd9onTZkRzLq7Upf4sb1Y3pSaK6MR0QS6AC6NnnPyHVgl6CNKH67M+LTlTS4 Il7IeQ5Xbf/2w75qiERGZ+Ba0MjmwnLyf1P1TU+ZTlZnCC7gtLsAIFiYqAvjxlarK7 SaywCoc3aCzcIZHAUOOlm+Lxc6a1RhGO1/TZ8X0Q91d20RxVCAy5UyPa53KduCrUfx xc+csJVJIeplKjmEzdfJhqycu/6pKAufjVVj9I4xyOxnrZ+rtduhh05s8GL2jTjCmt HAyjR9zYAtWzw== Date: Fri, 8 May 2026 15:09:57 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Stefano Stabellini , "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts In-Reply-To: <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> Message-ID: References: <6d9345e7-7ad9-48f4-8447-3a955305430a@suse.com> <540ef3bd-6fc6-4cf1-a1fe-3def9cfcc114@suse.com> <84e74842-9a2e-42ce-9ec9-2892156353b1@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-d25034/1778278199-E0D63CF5-3DBB9276/0/0 X-purgate-type: clean X-purgate-size: 3694 On Fri, 8 May 2026, Jan Beulich wrote: > On 07.05.2026 23:44, Stefano Stabellini wrote: > > On Thu, 7 May 2026, Jan Beulich wrote: > >> On 07.05.2026 02:54, Stefano Stabellini wrote: > >>> On Wed, 6 May 2026, Stefano Stabellini wrote: > >>>> On Wed, 6 May 2026, Jan Beulich wrote: > >>>>> When one of the linking passes fails, additional intermediate files are > >>>>> still in place. Having them available for analysis of the underlying > >>>>> problem can be pretty helpful. Collect some into a new intermediates/ > >>>>> directory. (Nothing new will be collected if linking succeeds.) > >>>>> > >>>>> While there also make sure xen-syms is collected (into binaries/). This > >>>>> is rather more useful for analysis of possible problems than its stripped > >>>>> counterpart. > >>>>> > >>>>> Signed-off-by: Jan Beulich > >>>>> --- > >>>>> As the issue this is meant to help with didn't re-occur with this in > >>>>> place, the new logic wasn't really tested yet. > >>>> > >>>> It looks OK but please provide a link to a successful pipeline > >> > >> Well, I had it in use in > >> https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2503967215 > >> but does that count, when the issue the change is for didn't really occur? > >> For now I can't test the additions without having a way to trigger that > >> symbol table issue (or any other problem at one of the linking stages). > >> Short of artificially breaking things, that is. > > > > Please break it on purpose. Just push to a temporary branch. > > > > > >>>> Reviewed-by: Stefano Stabellini > >> > >> Thanks, but the above wants clarifying first, and the below suggests you > >> actually meant to take back the R-b. > >> > >>> Actually, I see that the build script is run with bash -ex so I wonder > >>> if collect_xen_artefacts would even run if make fails. I think we need: > >>> > >>> trap collect_xen_artefacts EXIT > >> > >> I don't feel comfortable making such a change. Furthermore it's unrelated, > >> as it would mean that on other build failures successfully created final > >> binaries wouldn't be collected either (after all on x86 it may be only one > >> of the two links that failed). Plus then it would likely want doing > >> differently, by making the EXIT hook invoke a new > >> collect_xen_intermediates(), leaving collect_xen_artefacts() unaltered > >> (except for the xen-syms addition there)? > > > > "trap collect_xen_artefacts EXIT" was just a quick suggestion to explain > > the type of change that would be needed to make this work, because as I > > understand it, it does not work now. > > > > From your comment I don't understand if you think that the patch as is > > would work as intended or you agree with my comment that it would not > > work. > > Given the -e passed to bash, I don't expect it to work as is. However, I > question this behavior. Exiting on error may be okay for any of the > preparatory commands, but exiting on failure of make feels dubious [1]. > Hence I'm unsure which way to deal with that aspect (i.e. I'd prefer to > latch the main make's status, collect artifacts, and then exit the > script with make's status). I am OK with your preference. > Somewhat related: Why is it that collect_xen_artefacts is invoked three > times, rather than just once at the very bottom of the script? At which > point it wouldn't even need to be a function. There doesn't seem to be a good reason > Jan > > [1] E.g. a failed tools build may also be easier to analyze if the > already built components (libraries in particular) were collected. > From xen-devel-bounces@lists.xenproject.org Fri May 08 22:11:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 08 May 2026 22:11:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304344.1577415 (Exim 4.92) (envelope-from ) id 1wLTPf-0000E0-1l; Fri, 08 May 2026 22:11:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304344.1577415; Fri, 08 May 2026 22:11:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTPe-0000Do-VT; Fri, 08 May 2026 22:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1304344; Fri, 08 May 2026 22:11:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLTPd-0000De-LQ for xen-devel@lists.xenproject.org; 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Fri, 08 May 2026 15:11:11 -0700 (PDT) MIME-Version: 1.0 References: <5a42b7c32fadf21262b8342f27e685916d0e5812.1775125380.git.mykola_kvach@epam.com> <0BBBB87D-4A54-4378-BC30-4CFAB7553286@arm.com> In-Reply-To: <0BBBB87D-4A54-4378-BC30-4CFAB7553286@arm.com> From: Mykola Kvach Date: Sat, 9 May 2026 01:11:00 +0300 X-Gm-Features: AVHnY4KELghW99FEnZfoYqB5SCXdtGae_3u-LzCWYOF0UcLWMBnXjDQnDLH9bQY Message-ID: Subject: Re: [PATCH v8 05/13] xen/arm: gic-v3: add ITS suspend/resume support To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778278272-B474CFF4-85C35F64/0/0 X-purgate-type: clean X-purgate-size: 3800 On Fri, May 8, 2026 at 2:31=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > On Fri, Apr 24, 2026 at 1:54=E2=80=AFPM Luca Fancellu wrote: > >> > >> Hi Mykola, > >> > >>> On 2 Apr 2026, at 11:45, Mykola Kvach wrote: > >>> > >>> From: Mykola Kvach > >>> > >>> Handle system suspend/resume for GICv3 with an ITS present so LPIs ke= ep > >>> working after firmware powers the GIC down. Snapshot the CPU interfac= e, > >>> distributor and last-CPU redistributor state, > > =E2=80=9CSnapshot the CPU interface, distributor and last-CPU redistribut= or state=E2=80=9D happened in the commit before? Yes, fair point. That wording is too broad for this patch. It describes the wider GICv3 suspend/resume flow in which the ITS handling is invoked, rather than the ITS-specific part added here. The CPU interface, distributor and redistributor handling are covered by the related GICv3 suspend/resume patches, while this patch itself adds the ITS state save/restore. I will tighten the commit message in the next version so it only describes the ITS-specific suspend/resume handling done by this patch. > > >>> disable the ITS to cache its > >>> CTLR/CBASER/BASER registers, then restore everything and re-arm the > >>> collection on resume. > >>> > >>> Add list_for_each_entry_continue_reverse() in list.h for the ITS susp= end > >>> error path that needs to roll back partially saved state. > >>> > >>> Based on Linux commit dba0bc7b76dc ("irqchip/gic-v3-its: Add ability = to save/restore ITS state") > >>> Signed-off-by: Mykola Kvach > >>> --- > [=E2=80=A6] > > > >> > >>> + { > >>> + unsigned int i; > >>> + void __iomem *base =3D its->its_base; > >>> + > >>> + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR); > >>> + ret =3D gicv3_disable_its(its); > >> > >> This is called from system_suspend(), along the path iommu_suspend and > >> console_suspend() are called, finally reaching gic_suspend() and this = one. > >> > >> In the IHI 0069H.b, 5.6.2 Disabling an ITS, it says: > >> =E2=80=9CEnsure that all interrupts that target the ITS that is being = powered down are > >> either redirected or disabled=E2=80=9D, is it correct to assume all th= e ITS targeting source > >> at this point are disabled because domains should be already suspended= ? > > > > Yes, that is the assumption here. > > > > Before Xen reaches this path, each domain must already have entered > > SHUTDOWN_suspend. In other words, the guest OS has already requested > > SYSTEM_SUSPEND only after completing its own suspend flow, so the > > ITS-targeting interrupt sources owned by that OS are expected to be > > quiesced at this point. > > > > So this code relies on the owning OS having disabled or otherwise > > quiesced those sources before issuing SYSTEM_SUSPEND, rather than Xen > > explicitly doing that in gicv3_its_suspend(). > > Ok! I would be for a comment stating this assumption, unless the maintain= ers disagree Ack. Best regards, Mykola > > > > >> > >> > >>> + if ( ret ) > >>> + { > >>> + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > >> > >> here and in the other places we write GITS_CTLR, this reg has Quiescen= t as RO, > >> maybe we should mask the write to only the other bits that are writabl= e? > > > > Yes, this was inherited from the Linux ITS suspend/resume code, which r= estores > > the saved GITS_CTLR value directly. > > > > That said, masking the write to the writable bits is cleaner, and I wil= l do > > that in the next version. > > ok > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304390.1577452 (Exim 4.92) (envelope-from ) id 1wLW0r-00068C-M6; Sat, 09 May 2026 00:57:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304390.1577452; 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Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v5: - fixed memcpy() logic --- xen/drivers/char/console.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 5ab3b0de12d8..5cac87d052b9 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -463,7 +463,8 @@ static void cf_check conring_dump_keyhandler(unsigned char key) void __init console_init_ring(void) { char *ring; - unsigned int i, order, memflags; + XENCONS_RING_IDX i, size; + unsigned int order, memflags; unsigned long flags; if ( !opt_conring_size ) @@ -479,8 +480,22 @@ void __init console_init_ring(void) opt_conring_size = PAGE_SIZE << order; nrspin_lock_irqsave(&console_lock, flags); - for ( i = conringc ; i != conringp; i++ ) - ring[i & (opt_conring_size - 1)] = conring[i & (conring_size - 1)]; + + i = 0; + size = conringp - conringc; + while ( i < size ) + { + XENCONS_RING_IDX src = (conringc + i) & (conring_size - 1); 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Patch 1 introduces CONRING_CONRING_SHIFT to select compile-time conring buffer size. Patch 2 updates conring{,_size} annotations to __ro_after_init as per [2]. Patch 3 optimizes switch from early conring to permanent conring. Patch 4 update the conring buffer allocation code. [1] Link to v6: https://lore.kernel.org/xen-devel/20260205013606.3384798-1-dmukhin@ford.com/ [2] https://lore.kernel.org/xen-devel/1a5ed8ad-0cc7-4e05-9b9c-cd6930d9b9ea@citrix.com [3] Link to CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2511597097 Denis Mukhin (4): xen/console: make console buffer size configurable xen/console: promote conring{,_size} to __ro_after_init xen/console: use memcpy() in console_init_ring() xen/console: switch conring runtime allocation to xvmalloc docs/misc/xen-command-line.pandoc | 5 +-- xen/drivers/char/Kconfig | 15 ++++++++ xen/drivers/char/console.c | 60 +++++++++++++++++++++++-------- 3 files changed, 63 insertions(+), 17 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304388.1577431 (Exim 4.92) (envelope-from ) id 1wLW0m-0005VK-2t; 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Change the conring integer parameters type to `unsigned int` as required by CODING_STYLE. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin Acked-by: Jan Beulich --- Changes since v5: - used `unsigned int` - added Jan's A-b --- xen/drivers/char/console.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 522b2f489a53..5ab3b0de12d8 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -340,15 +340,15 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) */ /* conring_size: override build-time CONFIG_CONRING_SHIFT setting. */ -static uint32_t __initdata opt_conring_size; +static unsigned int __initdata opt_conring_size; size_param("conring_size", opt_conring_size); #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; -static char *__read_mostly conring = _conring; -static uint32_t __read_mostly conring_size = _CONRING_SIZE; -static uint32_t conringc, conringp; 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it does not need a naturally aligned or physically contiguous allocation. Replace the runtime xenheap allocation in console_init_ring() with an xvmalloc-backed buffer. Also clamp the user-configured ring size to the supported range and emit warnings when the requested size is adjusted. Suggested-by: Andrew Cooper Signed-off-by: Denis Mukhin --- Changes since v5: - switched to xvmalloc_array() - fixed conring size checks - corrected diagnostic messages --- xen/drivers/char/console.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index 5cac87d052b9..29b9359468e7 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -33,6 +33,7 @@ #include #include #include +#include #ifdef CONFIG_X86 #include @@ -343,6 +344,7 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) static unsigned int __initdata opt_conring_size; size_param("conring_size", opt_conring_size); +#define CONRING_SIZE_MIN (1U << 14) #define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) #define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; @@ -464,20 +466,33 @@ void __init console_init_ring(void) { char *ring; XENCONS_RING_IDX i, size; - unsigned int order, memflags; + unsigned int order; unsigned long flags; if ( !opt_conring_size ) return; order = get_order_from_bytes(max(opt_conring_size, conring_size)); - memflags = MEMF_bits(crashinfo_maxaddr_bits); - while ( (ring = alloc_xenheap_pages(order, memflags)) == NULL ) + size = PAGE_SIZE << order; + if ( size != opt_conring_size ) { - BUG_ON(order == 0); - order--; + opt_conring_size = size; + printk(XENLOG_WARNING "Normalizing console ring size.\n"); } - opt_conring_size = PAGE_SIZE << order; + if ( opt_conring_size < CONRING_SIZE_MIN ) + { + opt_conring_size = 0; + printk(XENLOG_WARNING "Ignoring too-small console ring size override.\n"); + return; + } + else if ( opt_conring_size > GB(2) ) + { + opt_conring_size = GB(2); + printk(XENLOG_WARNING "Limiting user-configured console ring size to 2 GiB.\n"); + } + + ring = xvmalloc_array(char, opt_conring_size); + BUG_ON(ring == NULL); nrspin_lock_irqsave(&console_lock, flags); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 00:57:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 00:57:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304389.1577443 (Exim 4.92) (envelope-from ) id 1wLW0n-0005sx-DI; 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The supported range is [14..27] -> [16KiB..128MiB]. Set default to 15 (32 KiB). Resolves: https://gitlab.com/xen-project/xen/-/issues/185 Signed-off-by: Denis Mukhin Reviewed-by: Jason Andryuk --- Changes since v5: - shortened the Kconfig option description - kept Jason's R-b since the change is minimal - just dropping few lines from the Kconfig description --- docs/misc/xen-command-line.pandoc | 5 +++-- xen/drivers/char/Kconfig | 15 +++++++++++++++ xen/drivers/char/console.c | 6 +++--- 3 files changed, 21 insertions(+), 5 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..29393631d885 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -425,10 +425,11 @@ The following are examples of correct specifications: ### conring_size > `= ` -> Default: `conring_size=16k` - Specify the size of the console ring buffer. +The default console ring buffer size is selected at build time via +CONFIG_CONRING_SHIFT setting. + ### console > `= List of [ vga | com1[H,L] | com2[H,L] | pv | dbgp | ehci | xhci | none ]` diff --git a/xen/drivers/char/Kconfig b/xen/drivers/char/Kconfig index 8e49a52c735b..11f48415c12a 100644 --- a/xen/drivers/char/Kconfig +++ b/xen/drivers/char/Kconfig @@ -95,6 +95,21 @@ config SERIAL_TX_BUFSIZE Default value is 32768 (32KiB). +config CONRING_SHIFT + int "Console ring buffer size (power of 2)" + range 14 27 + default 15 + help + Select the boot console ring buffer size as a power of 2. + Run-time console ring buffer size is the same as the boot console ring + buffer size, unless overridden via 'conring_size=' boot parameter. + + 27 => 128 MiB + 26 => 64 MiB + ... + 15 => 32 KiB (default) + 14 => 16 KiB + config XHCI bool "XHCI DbC UART driver" depends on X86 diff --git a/xen/drivers/char/console.c b/xen/drivers/char/console.c index bcd6d261491b..522b2f489a53 100644 --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -339,12 +339,12 @@ static void cf_check do_dec_thresh(unsigned char key, bool unused) * ******************************************************** */ -/* conring_size: allows a larger console ring than default (16kB). */ +/* conring_size: override build-time CONFIG_CONRING_SHIFT setting. */ static uint32_t __initdata opt_conring_size; size_param("conring_size", opt_conring_size); -#define _CONRING_SIZE 16384 -#define CONRING_IDX_MASK(i) ((i)&(conring_size-1)) +#define _CONRING_SIZE (1U << CONFIG_CONRING_SHIFT) +#define CONRING_IDX_MASK(i) ((i) & (conring_size - 1)) static char __initdata _conring[_CONRING_SIZE]; static char *__read_mostly conring = _conring; static uint32_t __read_mostly conring_size = _CONRING_SIZE; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 05:07:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 05:07:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304451.1577470 (Exim 4.92) (envelope-from ) id 1wLZtz-0005wS-RM; Sat, 09 May 2026 05:06:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304451.1577470; Sat, 09 May 2026 05:06:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLZtz-0005wD-MG; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao --- v2: - Reorder entries ns16550_config to keep it sorted by device ID. - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple vendor ids. xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..cf10a06a3d 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, }; static int __init diff --git a/xen/include/xen/pci_ids.h b/xen/include/xen/pci_ids.h index 5884a20b8f..15e938225c 100644 --- a/xen/include/xen/pci_ids.h +++ b/xen/include/xen/pci_ids.h @@ -13,6 +13,8 @@ #define PCI_VENDOR_ID_BROADCOM 0x14e4 +#define PCI_VENDOR_ID_WCHIC 0x1c00 + #define PCI_VENDOR_ID_INTEL 0x8086 #endif /* XEN_PCI_IDS_H */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 06:32:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 06:32:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304467.1577479 (Exim 4.92) (envelope-from ) id 1wLbEm-0000v1-Ly; Sat, 09 May 2026 06:32:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304467.1577479; Sat, 09 May 2026 06:32:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLbEm-0000uu-Hu; Sat, 09 May 2026 06:32:32 +0000 Received: by outflank-mailman (input) for mailman id 1304467; Sat, 09 May 2026 06:32:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLbEl-0000uo-1i for xen-devel@lists.xenproject.org; Sat, 09 May 2026 06:32:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLbEk-007LIm-Av for xen-devel@lists.xenproject.org; Sat, 09 May 2026 08:32:30 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69fed4e3-bab6-0a2a0a5309dd-0a2a4505ca8a-26 for ; Sat, 09 May 2026 08:32:30 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69fed4fd-aaa8-0a2a45050019-d155da2bd87b-3 for ; Sat, 09 May 2026 08:32:30 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bcc9fdc959cso4099166b.2 for ; Fri, 08 May 2026 23:32:30 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , xen-devel@lists.xenproject.org References: <20260508143933.493013-1-jgross@suse.com> <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------yQe00ZL7pHPDBzCDdn2c0s4x" X-purgate-ID: tlsNG-c201ff/1778308350-E3B8E443-69F41CA8/0/0 X-purgate-type: clean X-purgate-size: 7999 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------yQe00ZL7pHPDBzCDdn2c0s4x Content-Type: multipart/mixed; boundary="------------ep6tsSF0uwnyPXMR3gMS8gVC"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Kevin Brodsky , linux-kernel@vger.kernel.org, x86@kernel.org Cc: marmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Message-ID: <36fc4317-d7a0-410c-9d95-28858018053c@suse.com> Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving References: <20260508143933.493013-1-jgross@suse.com> <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> In-Reply-To: <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> --------------ep6tsSF0uwnyPXMR3gMS8gVC Content-Type: multipart/mixed; boundary="------------m4M3UMd5trYCjNeUTP33zbJF" --------------m4M3UMd5trYCjNeUTP33zbJF Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMDguMDUuMjYgMjI6NTQsIEtldmluIEJyb2Rza3kgd3JvdGU6DQo+IE9uIDA4LzA1LzIw MjYgMTY6MzksIEp1ZXJnZW4gR3Jvc3Mgd3JvdGU6DQo+PiBXaXRoIHRoZSBzdXBwb3J0IG9m IG5lc3RlZCBsYXp5IG1tdSBzZWN0aW9ucyBpdCBjYW4gaGFwcGVuIHRoYXQNCj4+IGFyY2hf ZW50ZXJfbGF6eV9tbXVfbW9kZSgpIGlzIGJlaW5nIGNhbGxlZCB0d2ljZSB3aXRob3V0IGEg Y2FsbCBvZg0KPj4gYXJjaF9sZWF2ZV9sYXp5X21tdV9tb2RlKCkgaW4gYmV0d2VlbiwgYXMg dGhlIGxhenlfbW11XyooKSBoZWxwZXJzDQo+PiBhcmUgbm90IGRpc2FibGluZyBwcmVlbXB0 aW9uIHdoZW4gY2hlY2tpbmcgZm9yIG5lc3RlZCBsYXp5IG1tdQ0KPj4gc2VjdGlvbnMuDQo+ IA0KPiBJIHRoaW5rIHRoaXMgaXMgYSBjb3JyZWN0IGRlc2NyaXB0aW9uIG9mIHRoZSBpc3N1 ZSwgaS5lLiBwb3RlbnRpYWxseSB3ZQ0KPiBoYXZlIGFyY2hfZW50ZXJfbGF6eV9tbXVfbW9k ZSgpIGNhbGxlZCB0d2ljZSAqc2VxdWVudGlhbGx5Ki4gVGhlcmVmb3JlIEkNCj4gZG9uJ3Qg dGhpbmsgdGhhdCBkaXNhYmxpbmcgcHJlZW1wdGlvbiBpbnNpZGUgYXJjaF9lbnRlcl9sYXp5 X21tdV9tb2RlKCkNCj4gaXMgZW5vdWdoIC0gd2UgaGF2ZSBhIHByb2JsZW0gd2l0aCBwcmVl bXB0aW9uIG9jY3VycmluZyBpbnNpZGUNCj4gbGF6eV9tbXVfbW9kZV9lbmFibGUoKSBnZW5l cmFsbHksIG5vdCBuZWNlc3NhcmlseSBpbnNpZGUNCj4gYXJjaF9lbnRlcl9sYXp5X21tdV9t b2RlKCkuDQo+IA0KPiBQcmVlbXB0aW9uIHNob3VsZG4ndCBtYXR0ZXIgaWYgY29tbWl0IDI5 MWIzYWJlZDY1NyBpcyByZXZlcnRlZC4gQUZBSUNUDQo+IHRoaXMgaXMgdGhlIG9ubHkgZWFz eSBmaXguDQpUaGUgZGVzY3JpcHRpb24gd2Fzbid0IHJlYWxseSBjb21wbGV0ZSwgSSB0aGlu ay4NCg0KVGhlIGRvdWJsZSBjYWxsIHdpbGwgb25seSBiZSBwb3NzaWJsZSBpZiBhcmNoX2Vu ZF9jb250ZXh0X3N3aXRjaCgpIGlzDQpjYWxsaW5nIGFyY2hfZW50ZXJfbGF6eV9tbXVfbW9k ZSgpLCBhbmQgdGhpcyBpcyBoYXBwZW5pbmcgZm9yIFhlbiBQViBvbmx5Lg0KYXJjaF9lbmRf Y29udGV4dF9zd2l0Y2goKSBpcyBhIG5vcCBmb3IgYWxsIG90aGVyIGNhc2VzLg0KDQpTbyB0 aGlzIGNhbiBiZSBoYW5kbGVkIGNvbXBsZXRlbHkgaW50ZXJuYWwgb2YgWGVuIChvdGhlcndp c2UgYSByZXZlcnQgb2YNCjI5MWIzYWJlZDY1NyB3b3VsZG4ndCBoZWxwKSwgYW5kIGl0IGlz IGVhc3kgdG8gZG8gc28gYXMgbXkgcGF0Y2ggaXMNCnNob3dpbmcuDQoNCkFzIHNhaWQsIEkn ZCBsaWtlIHRvIGdldCByaWQgb2YgdGhlIGV4dHJhIHRyYWNraW5nIGJ5IFhlbiByZWdhcmRp bmcgbGF6eSBtb2RlLg0KDQoNCkp1ZXJnZW4NCg== --------------m4M3UMd5trYCjNeUTP33zbJF Content-Type: application/pgp-keys; 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dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778312363; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7QYqPOdnppReAVRJ5P/m4/A1UFEhBGpvGj/XUDUfT3M=; b=R2pvFxDKTxTPwfuH259puMRLOPlnQHIJMyxgjmzuSS1auXaAThRDU3b/2jtwW0LgwmM5UC XSU3BMQRQ1l7zMI4BkbsllTH2Z8Rv+Gy/tPAMlNVKI5abCvSy23FPlrzy8Qv3wS03DymgU YgNpqU1yDNps0s09hhVrAYeTgBBk6a4= X-MC-Unique: manh_PZEMKe58UYmNSnICg-1 X-Mimecast-MFC-AGG-ID: manh_PZEMKe58UYmNSnICg_1778312353 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: stefanha@gmail.com, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Jan Kiszka , Peter Maydell , Phil Dennis-Jordan , Richard Henderson , Helge Deller , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Gerd Hoffmann , Mark Cave-Ayland , Samuel Tardieu , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , Laurent Vivier , Thomas Huth , BALATON Zoltan , "Michael S. Tsirkin" , Stefano Garzarella , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Akihiko Odaki , Dmitry Osipenko , Dmitry Fleytman , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Alistair Francis , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org (open list:Musicpal), qemu-ppc@nongnu.org (open list:sam460ex), xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PULL 28/32] ui/console: rename public API to use consistent qemu_console_ prefix Date: Sat, 9 May 2026 11:36:14 +0400 Message-ID: <20260509073621.1011778-29-marcandre.lureau@redhat.com> In-Reply-To: <20260509073621.1011778-1-marcandre.lureau@redhat.com> References: <20260509073621.1011778-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: kE95bF1YTuOMHVChyh3duK1SQH_ovnBpQov2sB9RoBk_1778312353 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778312364-ACE52C54-FD554556/0/0 X-purgate-type: clean X-purgate-size: 111657 From: Marc-André Lureau Rename the display and graphic console public functions to follow a consistent qemu_console_ (or qemu_graphic_console_) naming convention. The previous API used a mix of prefixes: dpy_, graphic_hw_, graphic_console_, console_has_, and update_displaychangelistener(). Unify them under a common qemu_console_ namespace for better discoverability and consistency. The main renames are: - dpy_gfx_*() / dpy_text_*() / dpy_gl_*() → qemu_console_*() - dpy_{get,set}_ui_info() → qemu_console_{get,set}_ui_info() - graphic_hw_*() → qemu_console_hw_*() - graphic_console_*() → qemu_graphic_console_*() - console_has_gl() → qemu_console_has_gl() - update_displaychangelistener() → qemu_console_listener_set_refresh() No functional changes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Marc-André Lureau --- include/ui/console.h | 108 ++++++++++++------------ hw/arm/musicpal.c | 4 +- hw/display/artist.c | 4 +- hw/display/ati.c | 16 ++-- hw/display/bcm2835_fb.c | 5 +- hw/display/bochs-display.c | 14 ++-- hw/display/cg3.c | 6 +- hw/display/cirrus_vga.c | 8 +- hw/display/cirrus_vga_isa.c | 2 +- hw/display/dm163.c | 6 +- hw/display/exynos4210_fimd.c | 4 +- hw/display/g364fb.c | 10 +-- hw/display/jazz_led.c | 8 +- hw/display/macfb.c | 6 +- hw/display/next-fb.c | 4 +- hw/display/omap_lcdc.c | 4 +- hw/display/pl110.c | 4 +- hw/display/qxl-render.c | 12 +-- hw/display/qxl.c | 14 ++-- hw/display/ramfb-standalone.c | 2 +- hw/display/ramfb.c | 4 +- hw/display/sm501.c | 6 +- hw/display/ssd0303.c | 4 +- hw/display/ssd0323.c | 5 +- hw/display/tcx.c | 16 ++-- hw/display/vga-isa.c | 2 +- hw/display/vga-mmio.c | 2 +- hw/display/vga-pci.c | 6 +- hw/display/vga.c | 40 +++++---- hw/display/vhost-user-gpu.c | 22 ++--- hw/display/virtio-gpu-base.c | 2 +- hw/display/virtio-gpu-rutabaga.c | 10 +-- hw/display/virtio-gpu-udmabuf.c | 4 +- hw/display/virtio-gpu-virgl.c | 20 ++--- hw/display/virtio-gpu.c | 26 +++--- hw/display/virtio-vga.c | 2 +- hw/display/vmware_vga.c | 12 +-- hw/display/xenfb.c | 6 +- hw/display/xlnx_dp.c | 10 +-- hw/vfio/display.c | 32 +++---- ui/console-vc.c | 12 +-- ui/console.c | 140 +++++++++++++++---------------- ui/curses.c | 8 +- ui/dbus-console.c | 4 +- ui/dbus-listener.c | 10 +-- ui/egl-headless.c | 4 +- ui/gtk-egl.c | 6 +- ui/gtk-gl-area.c | 6 +- ui/gtk.c | 18 ++-- ui/sdl2-2d.c | 2 +- ui/sdl2-gl.c | 2 +- ui/sdl2.c | 6 +- ui/spice-display.c | 16 ++-- ui/vnc.c | 22 ++--- hw/display/apple-gfx.m | 16 ++-- ui/cocoa.m | 10 +-- 56 files changed, 372 insertions(+), 382 deletions(-) diff --git a/include/ui/console.h b/include/ui/console.h index 69ac7b01b33..cfa940d4c66 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -294,49 +294,49 @@ DisplayState *init_displaystate(void); void qemu_console_register_listener(QemuConsole *con, DisplayChangeListener *dcl, const DisplayChangeListenerOps *ops); -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval); +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval); void qemu_console_unregister_listener(DisplayChangeListener *dcl); -bool dpy_ui_info_supported(const QemuConsole *con); -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con); -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); - -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_gfx_update_full(QemuConsole *con); -void dpy_gfx_replace_surface(QemuConsole *con, - DisplaySurface *surface); -void dpy_text_cursor(QemuConsole *con, int x, int y); -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_text_resize(QemuConsole *con, int w, int h); -void dpy_mouse_set(QemuConsole *con, int x, int y, bool on); -void dpy_cursor_define(QemuConsole *con, QEMUCursor *cursor); -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format); - -void dpy_gl_scanout_disable(QemuConsole *con); -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, bool backing_y_0_top, - uint32_t backing_width, uint32_t backing_height, - uint32_t x, uint32_t y, uint32_t w, uint32_t h, - void *d3d_tex2d); -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y); -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y); -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h); - -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - QEMUGLParams *params); -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); - -bool console_has_gl(QemuConsole *con); +bool qemu_console_ui_info_supported(const QemuConsole *con); +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con); +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); + +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_update_full(QemuConsole *con); +void qemu_console_set_surface(QemuConsole *con, + DisplaySurface *surface); +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y); +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_text_resize(QemuConsole *con, int w, int h); +void qemu_console_set_mouse(QemuConsole *con, int x, int y, bool on); +void qemu_console_set_cursor(QemuConsole *con, QEMUCursor *cursor); +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format); + +void qemu_console_gl_scanout_disable(QemuConsole *con); +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, bool backing_y_0_top, + uint32_t backing_width, uint32_t backing_height, + uint32_t x, uint32_t y, uint32_t w, uint32_t h, + void *d3d_tex2d); +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y); +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y); +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h); + +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *params); +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); + +bool qemu_console_has_gl(QemuConsole *con); enum { GRAPHIC_FLAGS_NONE = 0, @@ -361,19 +361,19 @@ typedef struct GraphicHwOps { void (*gl_block)(void *opaque, bool block); } GraphicHwOps; -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *ops, - void *opaque); -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque); -void graphic_console_close(QemuConsole *con); - -void graphic_hw_update(QemuConsole *con); -void graphic_hw_update_done(QemuConsole *con); -void graphic_hw_invalidate(QemuConsole *con); -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata); -void graphic_hw_gl_block(QemuConsole *con, bool block); +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *ops, + void *opaque); +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque); +void qemu_graphic_console_close(QemuConsole *con); + +void qemu_console_hw_update(QemuConsole *con); +void qemu_console_hw_update_done(QemuConsole *con); +void qemu_console_hw_invalidate(QemuConsole *con); +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata); +void qemu_console_hw_gl_block(QemuConsole *con, bool block); void qemu_console_early_init(void); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index ba88ed756e2..83676eb7fea 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -170,7 +170,7 @@ static bool lcd_refresh(void *opaque) } } - dpy_gfx_update(s->con, 0, 0, 128*3, 64*3); + qemu_console_update(s->con, 0, 0, 128*3, 64*3); return true; } @@ -253,7 +253,7 @@ static const GraphicHwOps musicpal_gfx_ops = { static void musicpal_lcd_realize(DeviceState *dev, Error **errp) { musicpal_lcd_state *s = MUSICPAL_LCD(dev); - s->con = graphic_console_init(dev, 0, &musicpal_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &musicpal_gfx_ops, s); qemu_console_resize(s->con, 128 * 3, 64 * 3); } diff --git a/hw/display/artist.c b/hw/display/artist.c index a07508378c7..288d466ec64 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1324,7 +1324,7 @@ static bool artist_update_display(void *opaque) artist_draw_cursor(s); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->width, last - first + 1); + qemu_console_update(s->con, 0, first, s->width, last - first + 1); } return true; @@ -1424,7 +1424,7 @@ static void artist_realizefn(DeviceState *dev, Error **errp) s->misc_video |= 0x0A000000; s->misc_ctrl |= 0x00800000; - s->con = graphic_console_init(dev, 0, &artist_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &artist_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/ati.c b/hw/display/ati.c index 3a7d45a8820..d77589df67a 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -161,7 +161,7 @@ static void ati_cursor_define(ATIVGAState *s) } cursor_set_mono(s->cursor, s->regs.cur_color1, s->regs.cur_color0, (uint8_t *)&data[64], 1, (uint8_t *)&data[0]); - dpy_cursor_define(s->vga.con, s->cursor); + qemu_console_set_cursor(s->vga.con, s->cursor); } /* Alternatively support guest rendered hardware cursor */ @@ -626,9 +626,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, if (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) { ati_cursor_define(s); } - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, - (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, + (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); } } if ((val & (CRTC2_EXT_DISP_EN | CRTC2_EN)) != @@ -780,8 +780,8 @@ static void ati_mm_write(void *opaque, hwaddr addr, } if (!s->cursor_guest_mode && (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) && !(t & BIT(31))) { - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, true); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, true); } break; } @@ -1094,7 +1094,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) } vga_init(vga, OBJECT(s), pci_address_space(dev), pci_address_space_io(dev), true); - vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, vga); + vga->con = qemu_graphic_console_create(DEVICE(s), 0, s->vga.hw_ops, vga); if (s->cursor_guest_mode) { vga->cursor_invalidate = ati_cursor_invalidate; vga->cursor_draw_line = ati_cursor_draw_line; @@ -1167,7 +1167,7 @@ static void ati_vga_exit(PCIDevice *dev) ATIVGAState *s = ATI_VGA(dev); timer_del(&s->vblank_timer); - graphic_console_close(s->vga.con); + qemu_graphic_console_close(s->vga.con); } static const Property ati_vga_properties[] = { diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 83c4c03c7ca..bd58f625fcd 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -207,8 +207,7 @@ static bool fb_update_display(void *opaque) draw_line_src16, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->config.xres, - last - first + 1); + qemu_console_update(s->con, 0, first, s->config.xres, last - first + 1); } s->invalidate = false; @@ -427,7 +426,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp) bcm2835_fb_reset(dev); - s->con = graphic_console_init(dev, 0, &vgafb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &vgafb_ops, s); qemu_console_resize(s->con, s->config.xres, s->config.yres); } diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 8ef9b76cf85..64e669429c4 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -224,12 +224,12 @@ static bool bochs_display_update(void *opaque) mode.format, mode.stride, ptr + mode.offset); - dpy_gfx_replace_surface(s->con, ds); + qemu_console_set_surface(s->con, ds); full_update = true; } if (full_update) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } else { snap = memory_region_snapshot_and_clear_dirty(&s->vram, mode.offset, mode.size, @@ -243,14 +243,12 @@ static bool bochs_display_update(void *opaque) ys = y; } if (!dirty && ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); ys = -1; } } if (ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); } g_free(snap); @@ -279,7 +277,7 @@ static void bochs_display_realize(PCIDevice *dev, Error **errp) } s->vgamem = pow2ceil(s->vgamem); - s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, &bochs_display_gfx_ops, s); memory_region_init_ram(&s->vram, obj, "bochs-display-vram", s->vgamem, &error_fatal); @@ -344,7 +342,7 @@ static void bochs_display_exit(PCIDevice *dev) { BochsDisplayState *s = BOCHS_DISPLAY(dev); - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); } static const Property bochs_display_properties[] = { diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 963bb3427a6..f9dda1549dd 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -137,7 +137,7 @@ static bool cg3_update_display(void *opaque) } } else { if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } pix += width; @@ -146,7 +146,7 @@ static bool cg3_update_display(void *opaque) } s->full_update = 0; if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { @@ -311,7 +311,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); - s->con = graphic_console_init(dev, 0, &cg3_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &cg3_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 48be3c8a932..0a8c74e1374 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -779,9 +779,9 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) s->cirrus_blt_width, s->cirrus_blt_height); if (notify) { - dpy_gfx_update(s->vga.con, dx, dy, - s->cirrus_blt_width / depth, - s->cirrus_blt_height); + qemu_console_update(s->vga.con, dx, dy, + s->cirrus_blt_width / depth, + s->cirrus_blt_height); } /* we don't have to notify the display that this portion has @@ -2964,7 +2964,7 @@ static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) } cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), pci_address_space_io(dev)); - s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); /* setup PCI */ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000); diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 76034a88605..b8052d1d8ed 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -62,7 +62,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0, isa_address_space(isadev), isa_address_space_io(isadev)); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ diff --git a/hw/display/dm163.c b/hw/display/dm163.c index 9ea62cb4f76..afade0b98c3 100644 --- a/hw/display/dm163.c +++ b/hw/display/dm163.c @@ -277,8 +277,8 @@ static uint32_t *update_display_of_row(DM163State *s, uint32_t *dest, } } - dpy_gfx_update(s->console, 0, LED_SQUARE_SIZE * row, - RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); + qemu_console_update(s->console, 0, LED_SQUARE_SIZE * row, + RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); s->redraw &= ~(1 << row); trace_dm163_redraw(s->redraw); @@ -322,7 +322,7 @@ static void dm163_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, dm163_en_b_gpio_handler, 1); qdev_init_gpio_out_named(dev, &s->sout, "sout", 1); - s->console = graphic_console_init(dev, 0, &dm163_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &dm163_ops, s); qemu_console_resize(s->console, RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, RGB_MATRIX_NUM_ROWS * LED_SQUARE_SIZE); } diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index a91f04aaf79..5133623ee2e 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1340,7 +1340,7 @@ static bool exynos4210_fimd_update(void *opaque) fimd_copy_line_toqemu(global_width, s->ifb + global_width * line * RGBA_SIZE, d + global_width * line * bpp); } - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); } s->invalidate = false; s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND; @@ -1964,7 +1964,7 @@ static void exynos4210_fimd_realize(DeviceState *dev, Error **errp) return; } - s->console = graphic_console_init(dev, 0, &exynos4210_fimd_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &exynos4210_fimd_ops, s); } static void exynos4210_fimd_class_init(ObjectClass *klass, const void *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index bd15f6f0acc..af54f1f9005 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -191,8 +191,8 @@ static void g364fb_draw_graphic8(G364State *s) } else { int dy; if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, - xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, + xmax - xmin + 1, ymax - ymin + 1); xmin = s->width; xmax = 0; ymin = s->height; @@ -211,7 +211,7 @@ static void g364fb_draw_graphic8(G364State *s) done: if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); } g_free(snap); } @@ -234,7 +234,7 @@ static void g364fb_draw_blank(G364State *s) d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->blanked = 1; } @@ -478,7 +478,7 @@ static const GraphicHwOps g364fb_ops = { static void g364fb_init(DeviceState *dev, G364State *s) { - s->con = graphic_console_init(dev, 0, &g364fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &g364fb_ops, s); memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &g364fb_ctrl_ops, s, "ctrl", 0x180000); diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index ee9758a94b5..84fe1058406 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -217,7 +217,7 @@ static bool jazz_led_update_display(void *opaque) } s->state = REDRAW_NONE; - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); return true; } @@ -233,7 +233,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) LedState *s = opaque; char buf[3]; - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); qemu_console_resize(s->con, 2, 1); /* TODO: draw the segments */ @@ -243,7 +243,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) *chardata++ = ATTR2CHTYPE(buf[1], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, 2, 1); + qemu_console_text_update(s->con, 0, 0, 2, 1); } static int jazz_led_post_load(void *opaque, int version_id) @@ -284,7 +284,7 @@ static void jazz_led_realize(DeviceState *dev, Error **errp) { LedState *s = JAZZ_LED(dev); - s->con = graphic_console_init(dev, 0, &jazz_led_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &jazz_led_ops, s); } static void jazz_led_reset(DeviceState *d) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 848c3c282bd..f40a7ed9f52 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -320,14 +320,14 @@ static void macfb_draw_graphic(MacfbState *s) } } else { if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); ymin = -1; } } } if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); } g_free(snap); @@ -671,7 +671,7 @@ static bool macfb_common_realize(DeviceState *dev, MacfbState *s, Error **errp) s->regs[DAFB_MODE_CTRL1 >> 2] = s->mode->mode_ctrl1; s->regs[DAFB_MODE_CTRL2 >> 2] = s->mode->mode_ctrl2; - s->con = graphic_console_init(dev, 0, &macfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &macfb_ops, s); surface = qemu_console_surface(s->con); if (surface_bits_per_pixel(surface) != 32) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index e758b223ef7..fa2e0d0da80 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -89,7 +89,7 @@ static bool nextfb_update(void *opaque) src_width, dest_width, 0, 1, nextfb_draw_line, s, &first, &last); - dpy_gfx_update(s->con, 0, 0, s->cols, s->rows); + qemu_console_update(s->con, 0, 0, s->cols, s->rows); return true; } @@ -117,7 +117,7 @@ static void nextfb_realize(DeviceState *dev, Error **errp) s->cols = 1120; s->rows = 832; - s->con = graphic_console_init(dev, 0, &nextfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &nextfb_ops, s); qemu_console_resize(s->con, s->cols, s->rows); } diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 1e8385ebffb..2a8d5ffdd57 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -320,7 +320,7 @@ static bool omap_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1); + qemu_console_update(omap_lcd->con, 0, first, width, last - first + 1); } omap_lcd->invalidate = 0; @@ -504,7 +504,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100); memory_region_add_subregion(sysmem, base, &s->iomem); - s->con = graphic_console_init(NULL, 0, &omap_ops, s); + s->con = qemu_graphic_console_create(NULL, 0, &omap_ops, s); return s; } diff --git a/hw/display/pl110.c b/hw/display/pl110.c index e134ac28eb6..4a93cf4cda9 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -303,7 +303,7 @@ static bool pl110_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1); + qemu_console_update(s->con, 0, first, s->cols, last - first + 1); } s->invalidate = 0; return true; @@ -557,7 +557,7 @@ static void pl110_realize(DeviceState *dev, Error **errp) s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl110_vblank_interrupt, s); qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1); - s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &pl110_gfx_ops, s); } static void pl110_init(Object *obj) diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c index 5b4f8842011..7b692d5a854 100644 --- a/hw/display/qxl-render.c +++ b/hw/display/qxl-render.c @@ -135,7 +135,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) (width, height); } - dpy_gfx_replace_surface(vga->con, surface); + qemu_console_set_surface(vga->con, surface); } if (!qxl->guest_primary.data) { @@ -154,16 +154,16 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) continue; } qxl_blit(qxl, qxl->dirty+i); - dpy_gfx_update(vga->con, - qxl->dirty[i].left, qxl->dirty[i].top, - qxl->dirty[i].right - qxl->dirty[i].left, - qxl->dirty[i].bottom - qxl->dirty[i].top); + qemu_console_update(vga->con, + qxl->dirty[i].left, qxl->dirty[i].top, + qxl->dirty[i].right - qxl->dirty[i].left, + qxl->dirty[i].bottom - qxl->dirty[i].top); } qxl->num_dirty_rects = 0; end: if (qxl->render_update_cookie_num == 0) { - graphic_hw_update_done(qxl->ssd.dcl.con); + qemu_console_hw_update_done(qxl->ssd.dcl.con); } } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 4244ebe51d2..74258afa582 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1153,13 +1153,13 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) } trace_qxl_enter_vga_mode(d->id); spice_qxl_driver_unload(&d->ssd.qxl); - graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); qemu_spice_create_host_primary(&d->ssd); d->mode = QXL_MODE_VGA; qemu_spice_display_switch(&d->ssd, d->ssd.ds); vga_dirty_log_start(&d->vga); - graphic_hw_update(d->vga.con); + qemu_console_hw_update(d->vga.con); } static void qxl_exit_vga_mode(PCIQXLDevice *d) @@ -1168,8 +1168,8 @@ static void qxl_exit_vga_mode(PCIQXLDevice *d) return; } trace_qxl_exit_vga_mode(d->id); - graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); vga_dirty_log_stop(&d->vga); qxl_destroy_primary(d, QXL_SYNC); } @@ -2237,7 +2237,7 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); qxl->have_vga = true; - vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + vga->con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->id = qemu_console_get_index(vga->con); /* == channel_id */ if (qxl->id != 0) { error_setg(errp, "primary qxl-vga device must be console 0 " @@ -2262,7 +2262,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); - qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->ssd.dcl.con = qxl->vga.con; qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */ diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 27f0ba19f90..8e8ba37514a 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -41,7 +41,7 @@ static void ramfb_realizefn(DeviceState *dev, Error **errp) { RAMFBStandaloneState *ramfb = RAMFB(dev); - ramfb->con = graphic_console_init(dev, 0, &wrapper_ops, dev); + ramfb->con = qemu_graphic_console_create(dev, 0, &wrapper_ops, dev); ramfb->state = ramfb_setup(ramfb->use_legacy_x86_rom, errp); } diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 50c25706a52..7a88f934e11 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -111,12 +111,12 @@ void ramfb_display_update(QemuConsole *con, RAMFBState *s) } if (s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); s->ds = NULL; } /* simple full screen update */ - dpy_gfx_update_full(con); + qemu_console_update_full(con); } static int ramfb_post_load(void *opaque, int version_id) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index a3993ceba29..af870048372 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1822,7 +1822,7 @@ static bool sm501_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } } @@ -1831,7 +1831,7 @@ static bool sm501_update_display(void *opaque) /* complete flush to display */ if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } return true; @@ -1936,7 +1936,7 @@ static void sm501_init(SM501State *s, DeviceState *dev, &s->twoD_engine_region); /* create qemu graphic console */ - s->con = graphic_console_init(dev, 0, &sm501_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &sm501_ops, s); } static const VMStateDescription vmstate_sm501_state = { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 229856cc427..4e3dede33f1 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -268,7 +268,7 @@ static bool ssd0303_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); return true; } @@ -309,7 +309,7 @@ static void ssd0303_realize(DeviceState *dev, Error **errp) { ssd0303_state *s = SSD0303(dev); - s->con = graphic_console_init(dev, 0, &ssd0303_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0303_ops, s); qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY); } diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 67db16086c8..9309d4d10c4 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -270,7 +270,8 @@ static bool ssd0323_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + return true; } @@ -356,7 +357,7 @@ static void ssd0323_realize(SSIPeripheral *d, Error **errp) s->col_end = 63; s->row_end = 79; - s->con = graphic_console_init(dev, 0, &ssd0323_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0323_ops, s); qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY); qdev_init_gpio_in(dev, ssd0323_cd, 1); diff --git a/hw/display/tcx.c b/hw/display/tcx.c index cedbf5c7acd..2c33a9c4a32 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -243,8 +243,7 @@ static bool tcx_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -253,8 +252,7 @@ static bool tcx_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -297,8 +295,7 @@ static bool tcx24_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -309,8 +306,7 @@ static bool tcx24_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -864,9 +860,9 @@ static void tcx_realize(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); if (s->depth == 8) { - s->con = graphic_console_init(dev, 0, &tcx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx_ops, s); } else { - s->con = graphic_console_init(dev, 0, &tcx24_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx24_ops, s); } s->thcmisc = 0; diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 5f55c884a1b..2cccb0ef12e 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -79,7 +79,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) 0x000a0000, vga_io_memory, 1); memory_region_set_coalescing(vga_io_memory); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); memory_region_add_subregion(isa_address_space(isadev), VBE_DISPI_LFB_PHYSICAL_ADDRESS, diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index 1a9608d865f..3cd64951c09 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -108,7 +108,7 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) } sysbus_init_mmio(sbd, &s->vga.vram); - s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(dev, 0, s->vga.hw_ops, &s->vga); } static const Property vga_mmio_properties[] = { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 4e68dd57a17..d089847bdae 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -247,7 +247,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), true); - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* XXX: VGA_RAM_SIZE must be a power of two */ pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); @@ -282,7 +282,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) if (!vga_common_init(s, OBJECT(dev), errp)) { return; } - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* mmio bar */ memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, @@ -306,7 +306,7 @@ static void pci_secondary_vga_exit(PCIDevice *dev) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); memory_region_del_subregion(&d->mmio, &d->mrs[0]); memory_region_del_subregion(&d->mmio, &d->mrs[1]); if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { diff --git a/hw/display/vga.c b/hw/display/vga.c index 2f266f47a39..0ac4bf37310 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1246,7 +1246,7 @@ static void vga_draw_text(VGACommonState *s, int full_update) s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); surface = qemu_console_surface(s->con); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1365,8 +1365,8 @@ static void vga_draw_text(VGACommonState *s, int full_update) ch_attr_ptr++; } if (cx_max != -1) { - dpy_gfx_update(s->con, cx_min * cw, cy * cheight, - (cx_max - cx_min + 1) * cw, cheight); + qemu_console_update(s->con, cx_min * cw, cy * cheight, + (cx_max - cx_min + 1) * cw, cheight); } dest += linesize * cheight; line1 = line + cheight; @@ -1610,7 +1610,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) */ format = qemu_default_pixman_format(depth, !byteswap); if (format) { - allocate_surface = !dpy_gfx_check_format(s->con, format) + allocate_surface = !qemu_console_check_format(s->con, format) || s->force_shadow || force_shadow; } else { allocate_surface = true; @@ -1647,7 +1647,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) surface = qemu_create_displaysurface_from(disp_width, height, format, s->params.line_offset, s->vram_ptr + (s->params.start_addr * 4)); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } else { qemu_console_resize(s->con, disp_width, height); surface = qemu_console_surface(s->con); @@ -1720,8 +1720,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); y_start = -1; } } @@ -1745,8 +1744,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); } g_free(snap); memset(s->invalidated_y_table, 0, sizeof(s->invalidated_y_table)); @@ -1767,7 +1765,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) /* unshare buffer, otherwise the blanking corrupts vga vram */ surface = qemu_create_displaysurface(s->last_scr_width, s->last_scr_height); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } w = s->last_scr_width * surface_bytes_per_pixel(surface); @@ -1776,7 +1774,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) memset(d, 0, w); d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } #define GMODE_TEXT 0 @@ -1967,7 +1965,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->last_scr_width = width * cw; s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1992,11 +1990,11 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) { cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20); if (cursor_visible && cursor_offset < size && cursor_offset >= 0) - dpy_text_cursor(s->con, - TEXTMODE_X(cursor_offset), - TEXTMODE_Y(cursor_offset)); + qemu_console_text_set_cursor(s->con, + TEXTMODE_X(cursor_offset), + TEXTMODE_Y(cursor_offset)); else - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); s->cursor_offset = cursor_offset; s->cursor_start = s->cr[VGA_CRTC_CURSOR_START]; s->cursor_end = s->cr[VGA_CRTC_CURSOR_END]; @@ -2009,7 +2007,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) for (i = 0; i < size; src ++, dst ++, i ++) *dst = VMEM2CHTYPE(le32_to_cpu(*src)); - dpy_text_update(s->con, 0, 0, width, height); + qemu_console_text_update(s->con, 0, 0, width, height); } else { c_max = 0; @@ -2032,7 +2030,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) if (c_min <= c_max) { i = TEXTMODE_Y(c_min); - dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); + qemu_console_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); } } @@ -2057,8 +2055,8 @@ static void vga_update_text(void *opaque, uint32_t *chardata) /* Display a message */ s->last_width = 60; s->last_height = height = 3; - dpy_text_cursor(s->con, -1, -1); - dpy_text_resize(s->con, s->last_width, height); + qemu_console_text_set_cursor(s->con, -1, -1); + qemu_console_text_resize(s->con, s->last_width, height); for (dst = chardata, i = 0; i < s->last_width * height; i ++) *dst++ = ' '; @@ -2070,7 +2068,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) *dst++ = ATTR2CHTYPE(msg_buffer[i], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, s->last_width, height); + qemu_console_text_update(s->con, 0, 0, s->last_width, height); } static uint64_t vga_mem_read(void *opaque, hwaddr addr, diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 3f6fb7a8033..6e5e6540a46 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -142,11 +142,11 @@ vhost_user_gpu_handle_cursor(VhostUserGPU *g, VhostUserGpuMsg *msg) memcpy(s->current_cursor->data, up->data, 64 * 64 * sizeof(uint32_t)); - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); } - dpy_mouse_set(s->con, pos->x, pos->y, - msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); + qemu_console_set_mouse(s->con, pos->x, pos->y, + msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); } static void @@ -238,7 +238,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) con = s->con; if (m->width == 0) { - dpy_gfx_replace_surface(con, NULL); + qemu_console_set_surface(con, NULL); } else { s->ds = qemu_create_displaysurface(m->width, m->height); /* replace surface on next update */ @@ -269,12 +269,12 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) if (dmabuf) { qemu_dmabuf_close(dmabuf); - dpy_gl_release_dmabuf(con, dmabuf); + qemu_console_gl_release_dmabuf(con, dmabuf); g_clear_pointer(&dmabuf, qemu_dmabuf_free); } if (fd == -1) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); g->dmabuf[m->scanout_id] = NULL; break; } @@ -291,7 +291,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) &fd, 1, false, m->fd_flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP); - dpy_gl_scanout_dmabuf(con, dmabuf); + qemu_console_gl_scanout_dmabuf(con, dmabuf); g->dmabuf[m->scanout_id] = dmabuf; break; } @@ -306,13 +306,13 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) } con = g->parent_obj.scanout[m->scanout_id].con; - if (!console_has_gl(con)) { + if (!qemu_console_has_gl(con)) { error_report("console doesn't support GL!"); vhost_user_gpu_unblock(g); break; } g->backend_blocked = true; - dpy_gl_update(con, m->x, m->y, m->width, m->height); + qemu_console_gl_update(con, m->x, m->y, m->width, m->height); break; } #ifdef CONFIG_PIXMAN @@ -337,9 +337,9 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) pixman_image_unref(image); if (qemu_console_surface(con) != s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); } else { - dpy_gfx_update(con, m->x, m->y, m->width, m->height); + qemu_console_update(con, m->x, m->y, m->width, m->height); } break; } diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index bdc24492850..a68b1848295 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -253,7 +253,7 @@ virtio_gpu_base_device_realize(DeviceState *qdev, g->hw_ops = &virtio_gpu_ops; for (i = 0; i < g->conf.max_outputs; i++) { g->scanout[i].con = - graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g); + qemu_graphic_console_create(DEVICE(g), i, &virtio_gpu_ops, g); } return true; diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c index ebb6c783fb0..6ff12639012 100644 --- a/hw/display/virtio-gpu-rutabaga.c +++ b/hw/display/virtio-gpu-rutabaga.c @@ -282,7 +282,7 @@ rutabaga_cmd_resource_flush(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) rf.resource_id, &transfer, &transfer_iovec); CHECK(!result, cmd); - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); } static void @@ -306,8 +306,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) scanout = &vb->scanout[ss.scanout_id]; if (ss.resource_id == 0) { - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gl_scanout_disable(scanout->con); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_gl_scanout_disable(scanout->con); return; } @@ -331,8 +331,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) /* realloc the surface ptr */ scanout->ds = qemu_create_displaysurface_pixman(res->image); - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, scanout->ds); res->scanout_bitmask = ss.scanout_id; } diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabuf.c index 74b6a7766af..d5ac1cfca0e 100644 --- a/hw/display/virtio-gpu-udmabuf.c +++ b/hw/display/virtio-gpu-udmabuf.c @@ -156,7 +156,7 @@ static void virtio_gpu_free_dmabuf(VirtIOGPU *g, VGPUDMABuf *dmabuf) struct virtio_gpu_scanout *scanout; scanout = &g->parent_obj.scanout[dmabuf->scanout_id]; - dpy_gl_release_dmabuf(scanout->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(scanout->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); QTAILQ_REMOVE(&g->dmabuf.bufs, dmabuf, next); g_free(dmabuf); @@ -232,7 +232,7 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, height = qemu_dmabuf_get_height(new_primary->buf); g->dmabuf.primary[scanout_id] = new_primary; qemu_console_resize(scanout->con, width, height); - dpy_gl_scanout_dmabuf(scanout->con, new_primary->buf); + qemu_console_gl_scanout_dmabuf(scanout->con, new_primary->buf); if (old_primary) { virtio_gpu_free_dmabuf(g, old_primary); diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index add85bd4e61..60c78af06a4 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -521,7 +521,7 @@ static void virtio_gpu_rect_update(VirtIOGPU *g, int idx, int x, int y, return; } - dpy_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); + qemu_console_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); } static void virgl_cmd_resource_flush(VirtIOGPU *g, @@ -584,16 +584,15 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g, qemu_console_resize(g->parent_obj.scanout[ss.scanout_id].con, ss.r.width, ss.r.height); virgl_renderer_force_ctx_0(); - dpy_gl_scanout_texture( + qemu_console_gl_scanout_texture( g->parent_obj.scanout[ss.scanout_id].con, info.tex_id, info.flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP, info.width, info.height, ss.r.x, ss.r.y, ss.r.width, ss.r.height, d3d_tex2d); } else { - dpy_gfx_replace_surface( - g->parent_obj.scanout[ss.scanout_id].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); + qemu_console_set_surface(g->parent_obj.scanout[ss.scanout_id].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); } g->parent_obj.scanout[ss.scanout_id].resource_id = ss.resource_id; } @@ -1315,7 +1314,7 @@ virgl_create_context(void *opaque, int scanout_idx, qparams.major_ver = params->major_ver; qparams.minor_ver = params->minor_ver; - ctx = dpy_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); + ctx = qemu_console_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); return (virgl_renderer_gl_context)ctx; } @@ -1324,7 +1323,7 @@ static void virgl_destroy_context(void *opaque, virgl_renderer_gl_context ctx) VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - dpy_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); + qemu_console_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); } static int virgl_make_context_current(void *opaque, int scanout_idx, @@ -1333,8 +1332,7 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - return dpy_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, - qctx); + return qemu_console_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, qctx); } static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { @@ -1399,8 +1397,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) int i; for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[i].con); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[i].con); } } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index dbb72bbb22d..88526051a99 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -103,14 +103,14 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) if (cursor->resource_id > 0) { vgc->update_cursor_data(g, s, cursor->resource_id); } - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); s->cursor = *cursor; } else { s->cursor.pos.x = cursor->pos.x; s->cursor.pos.y = cursor->pos.y; } - dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); + qemu_console_set_mouse(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); } struct virtio_gpu_simple_resource * @@ -390,7 +390,7 @@ void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) res->scanout_bitmask &= ~(1 << scanout_id); } - dpy_gfx_replace_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, NULL); scanout->resource_id = 0; scanout->ds = NULL; scanout->width = 0; @@ -531,8 +531,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, rf.r.y + rf.r.height >= scanout->y) { within_bounds = true; - if (console_has_gl(scanout->con)) { - dpy_gl_update(scanout->con, 0, 0, scanout->width, + if (qemu_console_has_gl(scanout->con)) { + qemu_console_gl_update(scanout->con, 0, 0, scanout->width, scanout->height); update_submitted = true; } @@ -582,8 +582,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, /* work out the area we need to update for each console */ if (qemu_rect_intersect(&flush_rect, &rect, &rect)) { qemu_rect_translate(&rect, -scanout->x, -scanout->y); - dpy_gfx_update(g->parent_obj.scanout[i].con, - rect.x, rect.y, rect.width, rect.height); + qemu_console_update(g->parent_obj.scanout[i].con, + rect.x, rect.y, rect.width, rect.height); } } } @@ -649,7 +649,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, g->parent_obj.enable = 1; if (res->blob) { - if (console_has_gl(scanout->con)) { + if (qemu_console_has_gl(scanout->con)) { if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb, r)) { virtio_gpu_update_scanout(g, scanout_id, res, fb, r); } else { @@ -665,7 +665,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, } /* create a surface for this scanout */ - if ((res->blob && !console_has_gl(scanout->con)) || + if ((res->blob && !qemu_console_has_gl(scanout->con)) || !scanout->ds || surface_data(scanout->ds) != data + fb->offset || scanout->width != r->width || @@ -686,7 +686,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, fb->offset); pixman_image_unref(rect); - dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, + qemu_console_set_surface(g->parent_obj.scanout[scanout_id].con, scanout->ds); } @@ -1483,10 +1483,10 @@ static int virtio_gpu_post_load(void *opaque, int version_id) } scanout->ds = qemu_create_displaysurface_pixman(res->image); qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, 0); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, scanout->ds); } - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); if (scanout->cursor.resource_id) { update_cursor(g, &scanout->cursor); } @@ -1602,7 +1602,7 @@ static void virtio_gpu_reset_bh(void *opaque) } for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); } g->reset_finished = true; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index efd4858f3d0..2ae649c91ae 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -172,7 +172,7 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vvga->vga_mrs, true, false); vga->con = g->scanout[0].con; - graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); + qemu_graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); for (i = 0; i < g->conf.max_outputs; i++) { object_property_set_link(OBJECT(g->scanout[i].con), "device", diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 11f13c98d7a..f6f9edfd1d9 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -378,7 +378,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s, for (line = h; line > 0; line--, src += bypl, dst += bypl) { memcpy(dst, src, width); } - dpy_gfx_update(s->vga.con, x, y, w, h); + qemu_console_update(s->vga.con, x, y, w, h); } static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) @@ -554,7 +554,7 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, qc = cursor_builtin_left_ptr(); } - dpy_cursor_define(s->vga.con, qc); + qemu_console_set_cursor(s->vga.con, qc); cursor_unref(qc); } #endif @@ -1082,7 +1082,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); #ifdef HW_MOUSE_ACCEL if (value <= SVGA_CURSOR_ON_SHOW) { - dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); + qemu_console_set_mouse(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); } #endif break; @@ -1130,7 +1130,7 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s) surface = qemu_create_displaysurface_from(s->new_width, s->new_height, format, stride, s->vga.vram_ptr); - dpy_gfx_replace_surface(s->vga.con, surface); + qemu_console_set_surface(s->vga.con, surface); s->invalidated = 1; } } @@ -1151,7 +1151,7 @@ static bool vmsvga_update_display(void *opaque) if (s->invalidated) { s->invalidated = 0; - dpy_gfx_update_full(s->vga.con); + qemu_console_update_full(s->vga.con); } return true; @@ -1254,7 +1254,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->scratch_size = SVGA_SCRATCH_SIZE; s->scratch = g_malloc(s->scratch_size * 4); - s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); + s->vga.con = qemu_graphic_console_create(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 2e431e27be6..8e9953bda43 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -657,7 +657,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h) xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n", __func__, xenfb->depth, bpp); - dpy_gfx_update(xenfb->con, x, y, w, h); + qemu_console_update(xenfb->con, x, y, w, h); } #ifdef XENFB_TYPE_REFRESH_PERIOD @@ -743,7 +743,7 @@ static bool xenfb_update(void *opaque) surface = qemu_create_displaysurface(xenfb->width, xenfb->height); break; } - dpy_gfx_replace_surface(xenfb->con, surface); + qemu_console_set_surface(xenfb->con, surface); xen_pv_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n", xenfb->width, xenfb->height, xenfb->depth, @@ -903,7 +903,7 @@ static int fb_initialise(struct XenLegacyDevice *xendev) if (rc != 0) return rc; - fb->con = graphic_console_init(NULL, 0, &xenfb_ops, fb); + fb->con = qemu_graphic_console_create(NULL, 0, &xenfb_ops, fb); if (xenstore_read_fe_int(xendev, "feature-update", &fb->feature_update) == -1) fb->feature_update = 0; diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 50e6ef10984..2486d9e5825 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -605,7 +605,7 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) if ((width != 0) && (height != 0)) { /* - * As dpy_gfx_replace_surface calls qemu_free_displaysurface on the + * As qemu_console_replace_surface calls qemu_free_displaysurface on the * surface we need to be careful and don't free the surface associated * to the console or double free will happen. */ @@ -631,10 +631,10 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) height, s->g_plane.format, 0, NULL); - dpy_gfx_replace_surface(s->console, s->bout_plane.surface); + qemu_console_set_surface(s->console, s->bout_plane.surface); } else { s->bout_plane.surface = NULL; - dpy_gfx_replace_surface(s->console, s->g_plane.surface); + qemu_console_set_surface(s->console, s->g_plane.surface); } xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, @@ -1287,7 +1287,7 @@ static bool xlnx_dp_update_display(void *opaque) /* * XXX: We might want to update only what changed. */ - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); return true; } @@ -1387,7 +1387,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), &error_fatal); - s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &xlnx_dp_gfx_ops, s); surface = qemu_console_surface(s->console); xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, surface_data(surface)); diff --git a/hw/vfio/display.c b/hw/vfio/display.c index 4a9a58036e3..8f91e83da88 100644 --- a/hw/vfio/display.c +++ b/hw/vfio/display.c @@ -264,7 +264,7 @@ static void vfio_display_free_one_dmabuf(VFIODisplay *dpy, VFIODMABuf *dmabuf) QTAILQ_REMOVE(&dpy->dmabuf.bufs, dmabuf, next); qemu_dmabuf_close(dmabuf->buf); - dpy_gl_release_dmabuf(dpy->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(dpy->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); g_free(dmabuf); } @@ -307,7 +307,7 @@ static bool vfio_display_dmabuf_update(void *opaque) if (dpy->dmabuf.primary != primary) { dpy->dmabuf.primary = primary; qemu_console_resize(dpy->con, width, height); - dpy_gl_scanout_dmabuf(dpy->con, primary->buf); + qemu_console_gl_scanout_dmabuf(dpy->con, primary->buf); free_bufs = true; } @@ -321,21 +321,21 @@ static bool vfio_display_dmabuf_update(void *opaque) if (cursor && (new_cursor || cursor->hot_updates)) { bool have_hot = (cursor->hot_x != 0xffffffff && cursor->hot_y != 0xffffffff); - dpy_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, - cursor->hot_x, cursor->hot_y); + qemu_console_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, + cursor->hot_x, cursor->hot_y); cursor->hot_updates = 0; } else if (!cursor && new_cursor) { - dpy_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); + qemu_console_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); } if (cursor && cursor->pos_updates) { - dpy_gl_cursor_position(dpy->con, + qemu_console_gl_cursor_position(dpy->con, cursor->pos_x, cursor->pos_y); cursor->pos_updates = 0; } - dpy_gl_update(dpy->con, 0, 0, width, height); + qemu_console_gl_update(dpy->con, 0, 0, width, height); if (free_bufs) { vfio_display_free_dmabufs(vdev); @@ -363,7 +363,7 @@ static bool vfio_display_dmabuf_init(VFIOPCIDevice *vdev, Error **errp) } vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_dmabuf_ops, vdev); if (vdev->enable_ramfb) { @@ -396,9 +396,9 @@ void vfio_display_reset(VFIOPCIDevice *vdev) return; } - dpy_gl_scanout_disable(vdev->dpy->con); + qemu_console_gl_scanout_disable(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); - dpy_gfx_update_full(vdev->dpy->con); + qemu_console_update_full(vdev->dpy->con); } static bool vfio_display_region_update(void *opaque) @@ -471,13 +471,13 @@ static bool vfio_display_region_update(void *opaque) dpy->region.surface = qemu_create_displaysurface_from (plane.width, plane.height, format, plane.stride, dpy->region.buffer.mmaps[0].mmap); - dpy_gfx_replace_surface(dpy->con, dpy->region.surface); + qemu_console_set_surface(dpy->con, dpy->region.surface); } /* full screen update */ - dpy_gfx_update(dpy->con, 0, 0, - surface_width(dpy->region.surface), - surface_height(dpy->region.surface)); + qemu_console_update(dpy->con, 0, 0, + surface_width(dpy->region.surface), + surface_height(dpy->region.surface)); return true; err: @@ -493,7 +493,7 @@ static const GraphicHwOps vfio_display_region_ops = { static bool vfio_display_region_init(VFIOPCIDevice *vdev, Error **errp) { vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_region_ops, vdev); if (vdev->enable_ramfb) { @@ -553,7 +553,7 @@ void vfio_display_finalize(VFIOPCIDevice *vdev) return; } - graphic_console_close(vdev->dpy->con); + qemu_graphic_console_close(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); vfio_display_region_exit(vdev->dpy); vfio_display_edid_exit(vdev->dpy); diff --git a/ui/console-vc.c b/ui/console-vc.c index 99ad6d079df..828e78c41ea 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -90,15 +90,15 @@ static void text_console_update(void *opaque, uint32_t *chardata) s->vt.cells[src].t_attrib.bgcol, s->vt.cells[src].t_attrib.bold); } - dpy_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], - s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); + qemu_console_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], + s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); s->vt.text_x[0] = s->vt.width; s->vt.text_y[0] = s->vt.height; s->vt.text_x[1] = 0; s->vt.text_y[1] = 0; } if (s->vt.cursor_invalidate) { - dpy_text_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); + qemu_console_text_set_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); s->vt.cursor_invalidate = 0; } } @@ -186,14 +186,14 @@ static void vc_chr_set_echo(Chardev *chr, bool echo) void qemu_text_console_update_size(QemuTextConsole *c) { - dpy_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); + qemu_console_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); } static void text_console_image_update(QemuVT100 *vt, int x, int y, int width, int height) { QemuTextConsole *console = container_of(vt, QemuTextConsole, vt); - dpy_gfx_update(QEMU_CONSOLE(console), x, y, width, height); + qemu_console_update(QEMU_CONSOLE(console), x, y, width, height); } static void text_console_out_flush(QemuVT100 *vt) @@ -232,7 +232,7 @@ static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s = QEMU_TEXT_CONSOLE(object_new(TYPE_QEMU_FIXED_TEXT_CONSOLE)); } - dpy_gfx_replace_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); + qemu_console_set_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); if (vc->has_encoding) { drv->encoding = vc->encoding; } diff --git a/ui/console.c b/ui/console.c index 22ca1c35db3..6f6330d61f1 100644 --- a/ui/console.c +++ b/ui/console.c @@ -129,26 +129,26 @@ static void gui_setup_refresh(DisplayState *ds) } } -void graphic_hw_update_done(QemuConsole *con) +void qemu_console_hw_update_done(QemuConsole *con) { if (con) { qemu_co_enter_all(&con->dump_queue, NULL); } } -void graphic_hw_update(QemuConsole *con) +void qemu_console_hw_update(QemuConsole *con) { if (!con) { return; } if (!con->hw_ops->gfx_update || con->hw_ops->gfx_update(con->hw)) { - graphic_hw_update_done(con); + qemu_console_hw_update_done(con); } } -static void graphic_hw_update_bh(void *con) +static void console_hw_update_bh(void *con) { - graphic_hw_update(con); + qemu_console_hw_update(con); } void qemu_console_co_wait_update(QemuConsole *con) @@ -156,18 +156,18 @@ void qemu_console_co_wait_update(QemuConsole *con) if (qemu_co_queue_empty(&con->dump_queue)) { /* Defer the update, it will restart the pending coroutines */ aio_bh_schedule_oneshot(qemu_get_aio_context(), - graphic_hw_update_bh, con); + console_hw_update_bh, con); } qemu_co_queue_wait(&con->dump_queue, NULL); } -static void graphic_hw_gl_unblock_timer(void *opaque) +static void console_hw_gl_unblock_timer(void *opaque) { warn_report("console: no gl-unblock within one second"); } -void graphic_hw_gl_block(QemuConsole *con, bool block) +void qemu_console_hw_gl_block(QemuConsole *con, bool block) { uint64_t timeout; assert(con != NULL); @@ -205,14 +205,14 @@ void qemu_console_set_window_id(QemuConsole *con, int window_id) con->window_id = window_id; } -void graphic_hw_invalidate(QemuConsole *con) +void qemu_console_hw_invalidate(QemuConsole *con) { if (con && con->hw_ops->invalidate) { con->hw_ops->invalidate(con->hw); } } -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata) +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata) { if (con && con->hw_ops->text_update) { con->hw_ops->text_update(con->hw, chardata); @@ -502,7 +502,7 @@ qemu_graphic_console_init(Object *obj) { } -bool console_has_gl(QemuConsole *con) +bool qemu_console_has_gl(QemuConsole *con) { return con->gl != NULL; } @@ -527,7 +527,7 @@ static bool console_compatible_with(QemuConsole *con, flags = con->hw_ops->get_flags ? con->hw_ops->get_flags(con->hw) : 0; - if (console_has_gl(con) && + if (qemu_console_has_gl(con) && !con->gl->ops->dpy_gl_ctx_is_compatible_dcl(con->gl, dcl)) { error_setg(errp, "Display %s is incompatible with the GL context", dcl->ops->dpy_name); @@ -535,7 +535,7 @@ static bool console_compatible_with(QemuConsole *con, } if (flags & GRAPHIC_FLAGS_GL && - !console_has_gl(con)) { + !qemu_console_has_gl(con)) { error_setg(errp, "The console requires a GL context."); return false; @@ -605,8 +605,8 @@ void qemu_console_register_listener(QemuConsole *con, vt100_update_cursor(); } -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval) +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval) { DisplayState *ds = dcl->ds; @@ -645,7 +645,7 @@ static void dpy_set_ui_info_timer(void *opaque) con->hw_ops->ui_info(con->hw, head, &con->ui_info); } -bool dpy_ui_info_supported(const QemuConsole *con) +bool qemu_console_ui_info_supported(const QemuConsole *con) { if (con == NULL) { return false; @@ -654,16 +654,16 @@ bool dpy_ui_info_supported(const QemuConsole *con) return con->hw_ops->ui_info != NULL; } -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con) +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con) { - assert(dpy_ui_info_supported(con)); + assert(qemu_console_ui_info_supported(con)); return &con->ui_info; } -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) { - if (!dpy_ui_info_supported(con)) { + if (!qemu_console_ui_info_supported(con)) { return -1; } if (memcmp(&con->ui_info, info, sizeof(con->ui_info)) == 0) { @@ -682,7 +682,7 @@ int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) return 0; } -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -707,15 +707,15 @@ void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_gfx_update_full(QemuConsole *con) +void qemu_console_update_full(QemuConsole *con) { int w = qemu_console_get_width(con, 0); int h = qemu_console_get_height(con, 0); - dpy_gfx_update(con, 0, 0, w, h); + qemu_console_update(con, 0, 0, w, h); } -void dpy_gfx_replace_surface(QemuConsole *con, +void qemu_console_set_surface(QemuConsole *con, DisplaySurface *surface) { static const char placeholder_msg[] = "Display output is not active."; @@ -753,8 +753,8 @@ void dpy_gfx_replace_surface(QemuConsole *con, qemu_free_displaysurface(old_surface); } -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format) +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format) { DisplayChangeListener *dcl; DisplayState *s = con->ds; @@ -789,7 +789,7 @@ static void dpy_refresh(DisplayState *s) } } -void dpy_text_cursor(QemuConsole *con, int x, int y) +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -804,7 +804,7 @@ void dpy_text_cursor(QemuConsole *con, int x, int y) } } -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -819,7 +819,7 @@ void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_text_resize(QemuConsole *con, int w, int h) +void qemu_console_text_resize(QemuConsole *con, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -834,7 +834,7 @@ void dpy_text_resize(QemuConsole *con, int w, int h) } } -void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) +void qemu_console_set_mouse(QemuConsole *c, int x, int y, bool on) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -853,7 +853,7 @@ void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) } } -void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) +void qemu_console_set_cursor(QemuConsole *c, QEMUCursor *cursor) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -871,26 +871,26 @@ void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) } } -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - struct QEMUGLParams *qparams) +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *qparams) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_create(con->gl, qparams); } -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); con->gl->ops->dpy_gl_ctx_destroy(con->gl, ctx); } -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_make_current(con->gl, ctx); } -void dpy_gl_scanout_disable(QemuConsole *con) +void qemu_console_gl_scanout_disable(QemuConsole *con) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -908,14 +908,14 @@ void dpy_gl_scanout_disable(QemuConsole *con) } } -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, - bool backing_y_0_top, - uint32_t backing_width, - uint32_t backing_height, - uint32_t x, uint32_t y, - uint32_t width, uint32_t height, - void *d3d_tex2d) +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, + bool backing_y_0_top, + uint32_t backing_width, + uint32_t backing_height, + uint32_t x, uint32_t y, + uint32_t width, uint32_t height, + void *d3d_tex2d) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -939,8 +939,8 @@ void dpy_gl_scanout_texture(QemuConsole *con, } } -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -957,8 +957,8 @@ void dpy_gl_scanout_dmabuf(QemuConsole *con, } } -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y) +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -974,8 +974,8 @@ void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, } } -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y) +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -990,8 +990,8 @@ void dpy_gl_cursor_position(QemuConsole *con, } } -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -1006,15 +1006,15 @@ void dpy_gl_release_dmabuf(QemuConsole *con, } } -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h) +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; assert(con->gl); - graphic_hw_gl_block(con, true); + qemu_console_hw_gl_block(con, true); QLIST_FOREACH(dcl, &s->listeners, next) { if (con != dcl->con) { continue; @@ -1023,7 +1023,7 @@ void dpy_gl_update(QemuConsole *con, dcl->ops->dpy_gl_update(dcl, x, y, w, h); } } - graphic_hw_gl_block(con, false); + qemu_console_hw_gl_block(con, false); } /***********************************************************/ @@ -1060,17 +1060,17 @@ DisplayState *init_displaystate(void) return display_state; } -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque) +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque) { con->hw_ops = hw_ops; con->hw = opaque; } -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *hw_ops, - void *opaque) +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *hw_ops, + void *opaque) { static const char noinit[] = "Guest has not initialized the display (yet)."; @@ -1089,16 +1089,16 @@ QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, s = (QemuConsole *)object_new(TYPE_QEMU_GRAPHIC_CONSOLE); } QEMU_GRAPHIC_CONSOLE(s)->head = head; - graphic_console_set_hwops(s, hw_ops, opaque); + qemu_graphic_console_set_hwops(s, hw_ops, opaque); if (dev) { object_property_set_link(OBJECT(s), "device", OBJECT(dev), &error_abort); } surface = qemu_create_placeholder_surface(width, height, noinit); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); s->gl_unblock_timer = timer_new_ms(QEMU_CLOCK_REALTIME, - graphic_hw_gl_unblock_timer, s); + console_hw_gl_unblock_timer, s); return s; } @@ -1106,7 +1106,7 @@ static const GraphicHwOps unused_ops = { /* no callbacks */ }; -void graphic_console_close(QemuConsole *con) +void qemu_graphic_console_close(QemuConsole *con) { static const char unplugged[] = "Guest display has been unplugged"; @@ -1116,13 +1116,13 @@ void graphic_console_close(QemuConsole *con) trace_console_gfx_close(con->index); object_property_set_link(OBJECT(con), "device", NULL, &error_abort); - graphic_console_set_hwops(con, &unused_ops, NULL); + qemu_graphic_console_set_hwops(con, &unused_ops, NULL); if (con->gl) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); } surface = qemu_create_placeholder_surface(width, height, unplugged); - dpy_gfx_replace_surface(con, surface); + qemu_console_set_surface(con, surface); } QemuConsole *qemu_console_lookup_default(void) @@ -1308,7 +1308,7 @@ void qemu_console_resize(QemuConsole *s, int width, int height) } surface = qemu_create_displaysurface(width, height); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); } DisplaySurface *qemu_console_surface(QemuConsole *console) diff --git a/ui/curses.c b/ui/curses.c index dbb5992981c..24d3713e57d 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -1,8 +1,8 @@ /* * QEMU curses/ncurses display driver - * + * * Copyright (c) 2005 Andrzej Zaborowski - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -275,11 +275,11 @@ static void curses_refresh(DisplayChangeListener *dcl) clear(); refresh(); curses_calc_pad(); - graphic_hw_invalidate(dcl->con); + qemu_console_hw_invalidate(dcl->con); invalidate = 0; } - graphic_hw_text_update(dcl->con, screen); + qemu_console_hw_text_update(dcl->con, screen); while (1) { /* while there are any pending key strokes to process */ diff --git a/ui/dbus-console.c b/ui/dbus-console.c index 23f547a673d..b8e5c57b148 100644 --- a/ui/dbus-console.c +++ b/ui/dbus-console.c @@ -200,7 +200,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, .height = arg_height, }; - if (!dpy_ui_info_supported(ddc->dcl.con)) { + if (!qemu_console_ui_info_supported(ddc->dcl.con)) { g_dbus_method_invocation_return_error(invocation, DBUS_DISPLAY_ERROR, DBUS_DISPLAY_ERROR_UNSUPPORTED, @@ -208,7 +208,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, return DBUS_METHOD_INVOCATION_HANDLED; } - dpy_set_ui_info(ddc->dcl.con, &info, false); + qemu_console_set_ui_info(ddc->dcl.con, &info, false); qemu_dbus_display1_console_complete_set_uiinfo(ddc->iface, invocation); return DBUS_METHOD_INVOCATION_HANDLED; } diff --git a/ui/dbus-listener.c b/ui/dbus-listener.c index cc2c969686e..2e2f6ba4183 100644 --- a/ui/dbus-listener.c +++ b/ui/dbus-listener.c @@ -241,7 +241,7 @@ static void dbus_update_gl_cb(GObject *source_object, } #endif - graphic_hw_gl_block(ddl->dcl.con, false); + qemu_console_hw_gl_block(ddl->dcl.con, false); g_object_unref(ddl); } #endif @@ -257,7 +257,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, glFlush(); #ifdef CONFIG_GBM - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); qemu_dbus_display1_listener_call_update_dmabuf(ddl->proxy, x, y, w, h, G_DBUS_CALL_FLAGS_NONE, @@ -276,7 +276,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, Error *err = NULL; assert(ddl->d3d_texture); - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); if (!d3d_texture2d_release0(ddl->d3d_texture, &err)) { error_report_err(err); return; @@ -711,7 +711,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) { DBusDisplayListener *ddl = container_of(dcl, DBusDisplayListener, dcl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (!ddl->ds || qemu_console_is_gl_blocked(ddl->dcl.con)) { return; @@ -740,7 +740,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) static void dbus_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } #ifdef CONFIG_OPENGL diff --git a/ui/egl-headless.c b/ui/egl-headless.c index 4f046c975a9..878bfebb40c 100644 --- a/ui/egl-headless.c +++ b/ui/egl-headless.c @@ -23,7 +23,7 @@ typedef struct egl_dpy { static void egl_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static void egl_gfx_update(DisplayChangeListener *dcl, @@ -161,7 +161,7 @@ static void egl_scanout_flush(DisplayChangeListener *dcl, } egl_fb_read(edpy->ds, &edpy->blit_fb); - dpy_gfx_update(edpy->dcl.con, x, y, w, h); + qemu_console_update(edpy->dcl.con, x, y, w, h); } static const DisplayChangeListenerOps egl_ops = { diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c index fa8fe8970c1..7c5c9b2428c 100644 --- a/ui/gtk-egl.c +++ b/ui/gtk-egl.c @@ -108,7 +108,7 @@ void gd_egl_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -176,7 +176,7 @@ void gd_egl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -405,7 +405,7 @@ void gd_egl_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_egl_set_scanout_mode(vc, true); gtk_widget_queue_draw_area(area, x, y, w, h); diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c index ce49000d3f1..23806b9d01b 100644 --- a/ui/gtk-gl-area.c +++ b/ui/gtk-gl-area.c @@ -131,7 +131,7 @@ void gd_gl_area_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -195,7 +195,7 @@ void gd_gl_area_refresh(DisplayChangeListener *dcl) } } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -347,7 +347,7 @@ void gd_gl_area_scanout_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_gl_area_set_scanout_mode(vc, true); } diff --git a/ui/gtk.c b/ui/gtk.c index ef3707b3634..2c61b601f78 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -436,7 +436,7 @@ static void gd_update(DisplayChangeListener *dcl, static void gd_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static GdkDevice *gd_get_pointer(GdkDisplay *dpy) @@ -602,7 +602,7 @@ void gd_hw_gl_flushed(void *vcon) qemu_set_fd_handler(fence_fd, NULL, NULL, NULL); close(fence_fd); qemu_dmabuf_set_fence_fd(dmabuf, -1); - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } } @@ -729,27 +729,27 @@ static void gd_set_ui_refresh_rate(VirtualConsole *vc, int refresh_rate) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.refresh_rate = refresh_rate; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } static void gd_set_ui_size(VirtualConsole *vc, gint width, gint height) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.width = width; info.height = height; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } #if defined(CONFIG_OPENGL) @@ -2333,7 +2333,7 @@ static GSList *gd_vc_gfx_init(GtkDisplayState *s, VirtualConsole *vc, gd_connect_vc_gfx_signals(vc); group = gd_vc_menu_init(s, vc, idx, group, view_menu); - if (dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (qemu_console_ui_info_supported(vc->gfx.dcl.con)) { zoom_to_fit = true; } if (s->opts->u.gtk.has_zoom_to_fit) { diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index 73052383c2e..68a3aff7151 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -129,7 +129,7 @@ void sdl2_2d_refresh(DisplayChangeListener *dcl) struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); assert(!scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); sdl2_poll_events(scon); } diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index bb066cdd885..1547ad2f6f8 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -115,7 +115,7 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl) assert(scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (scon->updates && scon->real_window) { scon->updates = 0; sdl2_gl_render_surface(scon); diff --git a/ui/sdl2.c b/ui/sdl2.c index 89516f95c41..4fcdbd79d3c 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -604,7 +604,7 @@ static void handle_windowevent(SDL_Event *ev) .width = ev->window.data1, .height = ev->window.data2, }; - dpy_set_ui_info(scon->dcl.con, &info, true); + qemu_console_set_ui_info(scon->dcl.con, &info, true); } sdl2_redraw(scon); break; @@ -632,10 +632,10 @@ static void handle_windowevent(SDL_Event *ev) } break; case SDL_WINDOWEVENT_RESTORED: - update_displaychangelistener(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_console_listener_set_refresh(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); break; case SDL_WINDOWEVENT_MINIMIZED: - update_displaychangelistener(&scon->dcl, 500); + qemu_console_listener_set_refresh(&scon->dcl, 500); break; case SDL_WINDOWEVENT_CLOSE: if (qemu_console_is_graphic(scon->dcl.con)) { diff --git a/ui/spice-display.c b/ui/spice-display.c index 56d8140fad8..e3716127203 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -468,7 +468,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) assert(ssd->dcl.con); cursor_ref(c); qemu_mutex_unlock(&ssd->lock); - dpy_cursor_define(ssd->dcl.con, c); + qemu_console_set_cursor(ssd->dcl.con, c); qemu_mutex_lock(&ssd->lock); cursor_unref(c); } @@ -481,7 +481,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) ssd->mouse_x = -1; ssd->mouse_y = -1; qemu_mutex_unlock(&ssd->lock); - dpy_mouse_set(ssd->dcl.con, x, y, true); + qemu_console_set_mouse(ssd->dcl.con, x, y, true); } else { qemu_mutex_unlock(&ssd->lock); } @@ -489,7 +489,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) { - graphic_hw_update(ssd->dcl.con); + qemu_console_hw_update(ssd->dcl.con); WITH_QEMU_LOCK_GUARD(&ssd->lock) { if (QTAILQ_EMPTY(&ssd->updates) && ssd->ds) { @@ -668,7 +668,7 @@ static int interface_client_monitors_config(QXLInstance *sin, QemuUIInfo info; int head; - if (!dpy_ui_info_supported(ssd->dcl.con)) { + if (!qemu_console_ui_info_supported(ssd->dcl.con)) { return 0; /* == not supported by guest */ } @@ -676,7 +676,7 @@ static int interface_client_monitors_config(QXLInstance *sin, return 1; } - info = *dpy_get_ui_info(ssd->dcl.con); + info = *qemu_console_get_ui_info(ssd->dcl.con); head = qemu_console_get_index(ssd->dcl.con); if (mc->num_of_monitors > head) { @@ -690,7 +690,7 @@ static int interface_client_monitors_config(QXLInstance *sin, } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); - dpy_set_ui_info(ssd->dcl.con, &info, false); + qemu_console_set_ui_info(ssd->dcl.con, &info, false); return 1; } @@ -817,7 +817,7 @@ static void qemu_spice_gl_block(SimpleSpiceDisplay *ssd, bool block) } else { timer_del(ssd->gl_unblock_timer); } - graphic_hw_gl_block(ssd->dcl.con, block); + qemu_console_hw_gl_block(ssd->dcl.con, block); } static void qemu_spice_gl_unblock_bh(void *opaque) @@ -861,7 +861,7 @@ static void spice_gl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (ssd->gl_updates && ssd->have_surface) { qemu_spice_gl_block(ssd, true); glFlush(); diff --git a/ui/vnc.c b/ui/vnc.c index e8c8773a36e..d3dfabede03 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -2325,8 +2325,8 @@ static void set_pixel_format(VncState *vs, int bits_per_pixel, set_pixel_conversion(vs); - graphic_hw_invalidate(vs->vd->dcl.con); - graphic_hw_update(vs->vd->dcl.con); + qemu_console_hw_invalidate(vs->vd->dcl.con); + qemu_console_hw_update(vs->vd->dcl.con); } static void pixel_format_message (VncState *vs) { @@ -2384,7 +2384,7 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) VncDisplay *vd = vs->vd; if (data[0] > 3) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } switch (data[0]) { @@ -2638,9 +2638,9 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) h = read_u16(data, 4); trace_vnc_msg_client_set_desktop_size(vs, vs->ioc, w, h, screens); - if (dpy_ui_info_supported(vs->vd->dcl.con)) { + if (qemu_console_ui_info_supported(vs->vd->dcl.con)) { QemuUIInfo info = { .width = w, .height = h }; - dpy_set_ui_info(vs->vd->dcl.con, &info, false); + qemu_console_set_ui_info(vs->vd->dcl.con, &info, false); vnc_desktop_resize_ext(vs, 4 /* Request forwarded */); } else { vnc_desktop_resize_ext(vs, 3 /* Invalid screen layout */); @@ -3242,14 +3242,14 @@ static void vnc_refresh(DisplayChangeListener *dcl) int has_dirty, rects = 0; if (QTAILQ_EMPTY(&vd->clients)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); return; } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (vnc_trylock_display(vd)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); return; } @@ -3323,7 +3323,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, sioc, websocket, vs->auth, vs->subauth); VNC_DEBUG("New client on socket %p\n", vs->sioc); - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); qio_channel_set_blocking(vs->ioc, false, &error_abort); g_clear_handle_id(&vs->ioc_tag, g_source_remove); if (websocket) { @@ -3363,7 +3363,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, vnc_update_server_surface(vd); } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (!vs->websocket) { vnc_start_protocol(vs); @@ -3419,7 +3419,7 @@ static void vmstate_change_handler(void *opaque, bool running, RunState state) if (state != RUN_STATE_RUNNING) { return; } - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } static bool vnc_display_open(VncDisplay *vd, Error **errp); diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index 77d80fb7cef..be0061b9db2 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -317,8 +317,8 @@ static void apple_gfx_render_frame_completed_bh(void *opaque) copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface)); if (s->gfx_update_requested) { s->gfx_update_requested = false; - dpy_gfx_update_full(s->con); - graphic_hw_update_done(s->con); + qemu_console_update_full(s->con); + qemu_console_hw_update_done(s->con); s->new_frame_ready = false; } else { s->new_frame_ready = true; @@ -337,7 +337,7 @@ static bool apple_gfx_fb_update_display(void *opaque) assert(bql_locked()); if (s->new_frame_ready) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->new_frame_ready = false; } else if (s->pending_frames > 0) { s->gfx_update_requested = true; @@ -380,14 +380,14 @@ static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height) (s->texture.storageMode == MTLStorageModeManaged); } - dpy_gfx_replace_surface(s->con, s->surface); + qemu_console_set_surface(s->con, s->surface); } static void update_cursor(AppleGFXState *s) { assert(bql_locked()); - dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x, - s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); + qemu_console_set_mouse(s->con, s->pgdisp.cursorPosition.x, + s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); } static void update_cursor_bh(void *opaque) @@ -443,7 +443,7 @@ static void set_cursor_glyph(void *opaque) } px_data += padding_bytes_per_row; } - dpy_cursor_define(s->con, s->cursor); + qemu_console_set_cursor(s->con, s->cursor); update_cursor(s); } [glyph release]; @@ -792,7 +792,7 @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev, apple_gfx_create_display_mode_array(display_modes, num_display_modes); [mode_array release]; - s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &apple_gfx_fb_ops, s); return true; } diff --git a/ui/cocoa.m b/ui/cocoa.m index aaf82421589..98394cdc507 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -421,7 +421,7 @@ - (void) selectConsoleLocked:(unsigned int)index return; } - unregister_displaychangelistener(&dcl); + qemu_console_unregister_listener(&dcl); qkbd_state_switch_console(kbd, con); qemu_console_register_listener(con, &dcl, &dcl_ops); [self notifyMouseModeChange]; @@ -669,8 +669,8 @@ - (void) updateUIInfoLocked CVTime period = CVDisplayLinkGetNominalOutputVideoRefreshPeriod(displayLink); CVDisplayLinkRelease(displayLink); if (!(period.flags & kCVTimeIsIndefinite)) { - update_displaychangelistener(&dcl, - 1000 * period.timeValue / period.timeScale); + qemu_console_listener_set_refresh(&dcl, + 1000 * period.timeValue / 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www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2A090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:47:58 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=SBZa0nIoCp0ki8/Oc5ku4abkqOmqJgEICyF8p7mx+3g=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323679; v=1; b=jMm6FSTg3+WzoljBa1xx0VEIo3rCyipLRB/bXqKMrcdNR+6DvkjrOPX+E8rgREyl fuoDukk7jeWjRH1RJb//0ZivG9KN+Ul5uESgLkuohDwIcRoPNt8uRy5T0Gp++vJT 4ljy4BIr3xPq7yw9Gpv9nXQvfz4i8pRAk2U38IxKW5FtOqeKZ0ntoI+Lqs3KyDDv nDjEcHNRD6ijVNCuvkoaQ5cAbV5r1D3Dhm5B8CbAEzMIQN3EJEZr5W6C+DSMzgNd cVHxAtdtdiH/vXly+xP1n9bu5GWF/sZlyQ+nRmXFWnTsPqR04jZ5qyvejk2hAT2O axrvfxvwxSeG40g+JiQtnw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:21 +0900 Subject: [PATCH RFC 09/28] hw/display/xenfb: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-9-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=1604; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=Q2mGMH2ClWf3nbm1bPmZWB8Bg9tg0j4lbTXQFfwDMGE=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gUtdcxRqAx2EuLe8LbbcLJ3V2baEYQqb3WGOpp0vp j7/IbKxo5SFQYyLQVZMkSWlaDe3RnTtp8KE+BaYOaxMIEMYuDgFYCI9RQy/2Q8qiKx+tYp1h+il SjZJSbOzDF2vF/9SspNzeul288a9zYwMdxVK8qJ7uQ2LMkV3Hb/AejX38skJoiU7t+x5kynJVxz DBgA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c1860d/1778323707-C4A7ADB1-63265AD0/0/0 X-purgate-type: clean X-purgate-size: 1606 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- hw/display/xenfb.c | 21 +++------------------ 1 file changed, 3 insertions(+), 18 deletions(-) diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 9bf89a1e6223..ee23c483499f 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -191,29 +191,14 @@ static int xenfb_send_position(struct XenInput *xenfb, return xenfb_kbd_event(xenfb, &event); } -/* - * Send a key event from the client to the guest OS - * QEMU gives us a QCode. - * We have to turn this into a Linux Input layer keycode. - * - * Wish we could just send scancodes straight to the guest which - * already has code for dealing with this... - */ +/* Send a key event from the client to the guest OS */ static void xenfb_key_event(DeviceState *dev, QemuConsole *src, QemuInputEvent *evt) { struct XenInput *xenfb = (struct XenInput *)dev; - int qcode = qemu_input_linux_to_qcode(evt->key.key); - int lnx; - if (qcode < qemu_input_map_qcode_to_linux_len) { - lnx = qemu_input_map_qcode_to_linux[qcode]; - - if (lnx) { - trace_xenfb_key_event(xenfb, lnx, evt->key.down); - xenfb_send_key(xenfb, evt->key.down, lnx); - } - } + trace_xenfb_key_event(xenfb, evt->key.key, evt->key.down); + xenfb_send_key(xenfb, evt->key.down, evt->key.key); } /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304599.1577509 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001cK-5H; Sat, 09 May 2026 10:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304599.1577509; Sat, 09 May 2026 10:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEQ-0001bU-0D; Sat, 09 May 2026 10:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1304599; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEN-0001aR-8o for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfEM-007lJU-M4 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:22 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10e2-5cb7-0a2a0a5109dd-0a2a45079184-8 for ; Sat, 09 May 2026 12:48:22 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f3-229c-0a2a45070019-31d4f359d5ec-3 for ; Sat, 09 May 2026 12:48:21 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2G090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:48:00 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=uJTvyFxVV0KiKR88wATfRrbdCU5rpbZH8pTJ+9EpZgo=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323680; v=1; b=ck991oxPhvCSI7vlQnQmqDhO8qPNpIzbu7vQgVPPFIogHVvJJp6FOUtEbLRQs7Wq rJybWJpAWrQKHDhTosWtzhajw2VXe/kw3fqKqiG2UhS9trsPHRXw5t29i1L3Pa2s +j0bnxv4lZ7iKLJ+RSnx/Fk6fV06j1QEd0f2DZaYOkH+hIvabREPjGBGXAfix4UT u5sxCXEef9jdvlJ4+vb2i2Iaa1BR1/88G7zSBM9FftH39xA9FNW9i9w0sJwKTfQE R8iErBOQm5A6UBQcyPdBjMiMgsjAiy42tAkuW960cpjVozRZs7xwxt+nafvBV0Ls pc6J3r84Hg0rUW0OzLGetw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:27 +0900 Subject: [PATCH RFC 15/28] replay: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-15-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=2453; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=VN8yQ5lgMxcp3qE4EJjzPaXZLmpoeQItNok0BraEMYc=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gautArYL7NVW29YU/82Suvbv1+mU9UyamRs3sy+8c O1P+/W5HaUsDGJcDLJiiiwpRbu5NaJrPxUmxLfAzGFlAhnCwMUpABOZZM3wz26v8oI5qjXvGxZy vDj3JaP5tf5XTkkXuTjpzYxcrldXaTIyXGPb6Kos+3ROQNmxc851LwXPL1cJKFylWjyxeb+YNMN ETgA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ef75cf/1778323702-0B374C48-FF672CCC/0/0 X-purgate-type: clean X-purgate-size: 2455 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- replay/replay-input.c | 20 +++----------------- replay/replay.c | 2 +- 2 files changed, 4 insertions(+), 18 deletions(-) diff --git a/replay/replay-input.c b/replay/replay-input.c index acf0993c7285..c86e00af0efd 100644 --- a/replay/replay-input.c +++ b/replay/replay-input.c @@ -23,8 +23,7 @@ void replay_save_input_event(QemuInputEvent *evt) switch (evt->type) { case INPUT_EVENT_KIND_KEY: - replay_put_dword(KEY_VALUE_KIND_QCODE); - replay_put_dword(qemu_input_linux_to_qcode(evt->key.key)); + replay_put_dword(evt->key.key); replay_put_byte(evt->key.down); break; case INPUT_EVENT_KIND_BTN: @@ -55,25 +54,12 @@ void replay_save_input_event(QemuInputEvent *evt) QemuInputEvent *replay_read_input_event(void) { QemuInputEvent *evt = g_new(QemuInputEvent, 1); - int qcode; evt->type = replay_get_dword(); switch (evt->type) { case INPUT_EVENT_KIND_KEY: - switch (replay_get_dword()) { - case KEY_VALUE_KIND_NUMBER: - qcode = qemu_input_key_number_to_qcode(replay_get_qword()); - evt->key.down = replay_get_byte(); - break; - case KEY_VALUE_KIND_QCODE: - qcode = (QKeyCode)replay_get_dword(); - evt->key.down = replay_get_byte(); - break; - default: - g_assert_not_reached(); - } - evt->key.key = qcode < qemu_input_map_qcode_to_linux_len ? - qemu_input_map_qcode_to_linux[qcode] : 0; + evt->key.key = replay_get_dword(); + evt->key.down = replay_get_byte(); break; case INPUT_EVENT_KIND_BTN: evt->btn.button = (InputButton)replay_get_dword(); diff --git a/replay/replay.c b/replay/replay.c index 2e5c6fa82eaa..14437b32566b 100644 --- a/replay/replay.c +++ b/replay/replay.c @@ -22,7 +22,7 @@ /* Current version of the replay mechanism. Increase it when file format changes. */ -#define REPLAY_VERSION 0xe0200d +#define REPLAY_VERSION 0xe0200e /* Size of replay log header */ #define HEADER_SIZE (sizeof(uint32_t) + sizeof(uint64_t)) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304601.1577515 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001fu-DX; Sat, 09 May 2026 10:48:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304601.1577515; Sat, 09 May 2026 10:48:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEQ-0001ez-7j; Sat, 09 May 2026 10:48:26 +0000 Received: by outflank-mailman (input) for mailman id 1304601; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEN-0001aS-Ej for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfEM-0010Ja-SC for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:22 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10a2-e002-0a2a0a5209dd-0a2a4504db1e-44 for ; Sat, 09 May 2026 12:48:22 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f3-1dec-0a2a45040019-31d4f359d5f0-3 for ; Sat, 09 May 2026 12:48:21 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2K090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:48:01 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=+9TsdwOjpr1iHxskLt3f2EYt5zfwd9os5E2Yt8jChVM=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323681; v=1; b=aLv1AfwGALDvOFPckAZuQsHV3Iq6x1BBqVwrJH00u/XyCobZnIeo+UuTjIee/uF1 CE7iaauZdwme0etKlR5JtF6nC0R4K2QjXjLnqSFPtJWk2ZWtRkDDChsSXeBDsQYL t4cz59uBHpJkYTCKhAXYsXzKJcJw1fxZKr9JE5pnHcjQV/zCZWpQq4uz5NqOuYUA 6z35XYQLT0Y79u8LPa5ntwP90qqvy4sTBUAfjBYPNVktzrWr3HocC6rjxSB+UTXf dAYGRlX4aivYRczJu9IfluABueOT/ha6MU3Piq4vdmWISSPc6JXVQqkGpIhsq0Ym sxPNGql4PziyvN6QUjaK9A== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:31 +0900 Subject: [PATCH RFC 19/28] ui/input-barrier: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-19-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=3193; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=c6O0syJR1NIU9Ef/YUHm+OV3aKIWUGDzhmEGlDmaM/E=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gete29q+nqlp3CUa0eKVzCXTcqzHpGl5rly6/9OtT k8dj+7pKGVhEONikBVTZEkp2s2tEV37qTAhvgVmDisTyBAGLk4BmMiLBYwM7x9FPytacndF5S3l 7K2H5K7nWFySMXwgGDir9kdN9TrZDEaGJ1VfTL5p89oVhZ4UyOF8ofTxs8amlCAF+a3TbXacLtj BBAA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ebf023/1778323702-42D643FF-654C105C/0/0 X-purgate-type: clean X-purgate-size: 3195 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- ui/input-barrier.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/ui/input-barrier.c b/ui/input-barrier.c index 0a2198ca5003..eb7f0b952d51 100644 --- a/ui/input-barrier.c +++ b/ui/input-barrier.c @@ -84,11 +84,11 @@ static const char *cmd_names[] = { static kbd_layout_t *kbd_layout; -static int input_barrier_to_qcode(uint16_t keyid, uint16_t keycode) +static int input_barrier_to_linux(uint16_t keyid, uint16_t keycode) { /* keycode is optional, if it is not provided use keyid */ - if (keycode && keycode <= qemu_input_map_xorgkbd_to_qcode_len) { - return qemu_input_map_xorgkbd_to_qcode[keycode]; + if (keycode && keycode <= qemu_input_map_xorgkbd_to_linux_len) { + return qemu_input_map_xorgkbd_to_linux[keycode]; } if (keyid >= 0xE000 && keyid <= 0xEFFF) { @@ -99,10 +99,10 @@ static int input_barrier_to_qcode(uint16_t keyid, uint16_t keycode) if (kbd_layout) { keycode = keysym2scancode(kbd_layout, keyid, NULL, false); - return qemu_input_key_number_to_qcode(keycode); + return qemu_input_key_number_to_linux(keycode); } - return qemu_input_map_x11_to_qcode[keyid]; + return qemu_input_map_x11_to_linux[keyid]; } static int input_barrier_to_mouse(uint8_t buttonid) @@ -431,23 +431,23 @@ static gboolean writecmd(InputBarrier *ib, struct barrierMsg *msg) /* keyboard */ case barrierCmdDKeyDown: - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->key.keyid, msg->key.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->key.keyid, msg->key.button), true); break; case barrierCmdDKeyRepeat: for (i = 0; i < msg->repeat.repeat; i++) { - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->repeat.keyid, msg->repeat.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->repeat.keyid, msg->repeat.button), false); - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->repeat.keyid, msg->repeat.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->repeat.keyid, msg->repeat.button), true); } break; case barrierCmdDKeyUp: - qemu_input_event_send_key_qcode(NULL, - input_barrier_to_qcode(msg->key.keyid, msg->key.button), + qemu_input_event_send_key_linux(NULL, + input_barrier_to_linux(msg->key.keyid, msg->key.button), false); break; default: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304600.1577506 (Exim 4.92) (envelope-from ) id 1wLfEP-0001ay-Uo; Sat, 09 May 2026 10:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304600.1577506; Sat, 09 May 2026 10:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEP-0001ap-Pr; Sat, 09 May 2026 10:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1304600; 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Sat, 9 May 2026 19:48:03 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=1HZL/g+SoS2O30ERYe2Yb6nxo7jFOLr4qDArV1Di8vs=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323683; v=1; b=t78Qg2FX6fQPQYjv6ccpjNB5PHM57Z7vH/sFNvFVepBntRbIzBYVxDoFA4Z8zcUH yNwbFuM/ho+hh5SZ7tf+Lkfd6Wii0FvKwt2Neo7Zxyyjj0CPtZ4hhs+44YPVNLLd H36Sm6ApZio0GZOtvJjE7gfl/iPNr1pEm9G79xaqieF17GWnxd4PNKVHVkqEn2ls /0VUSq1OHHAEnBbOUVdWr/eFNLlH0fNvZTrUrycauuM0c2twgV+IGere0olLlQui J1WlwuqN0kKbylZVRId1EEn/7T+bo86HLmzUhdvkZ04CYAklhxjCBTPvbnydSqGn /+uvgM+9RWPYf4U/G5z4Iw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:38 +0900 Subject: [PATCH RFC 26/28] qemu-keymap: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-26-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=4832; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=gcrDwacqS5bkEtnqJY5QTRr0nAfP9KdzJWUdu+r+4i4=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gdv2pyc8enzc0iTzyvf7mQVVX9WD1Rq6ixadzH/JV yrMcK6po5SFQYyLQVZMkSWlaDe3RnTtp8KE+BaYOaxMIEMYuDgFYCJC+xn+x7yYeKUtmfn115RK 3xvJgtvLP+5/9FLHS22im/b1xpj4EIb/gfX6z9rXXG/80tV+1W2F992I945mHGvOMaadZLTVPBL LDwA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-ebf023/1778323703-42B633FF-F2E52775/0/0 X-purgate-type: clean X-purgate-size: 4834 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- qemu-keymap.c | 41 ++++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 21 deletions(-) diff --git a/qemu-keymap.c b/qemu-keymap.c index d4dccf456ef3..d63b6be8ce32 100644 --- a/qemu-keymap.c +++ b/qemu-keymap.c @@ -11,6 +11,7 @@ */ #include "qemu/osdep.h" #include "qemu/notify.h" +#include "standard-headers/linux/input-event-codes.h" #include "ui/input.h" #include @@ -32,19 +33,17 @@ static FILE *outfile; /* ------------------------------------------------------------------------ */ -static uint32_t qcode_to_number(uint32_t qcode) +static uint32_t linux_to_number(uint32_t lnx) { - KeyValue keyvalue; uint32_t number; - keyvalue.type = KEY_VALUE_KIND_QCODE; - keyvalue.u.qcode.data = qcode; - number = qemu_input_key_value_to_number(&keyvalue); + assert(lnx < qemu_input_map_linux_to_qnum_len); + number = qemu_input_map_linux_to_qnum[lnx]; assert(number != 0); return number; } -static void print_sym(xkb_keysym_t sym, uint32_t qcode, const char *mod) +static void print_sym(xkb_keysym_t sym, uint32_t lnx, const char *mod) { char name[64]; @@ -54,7 +53,7 @@ static void print_sym(xkb_keysym_t sym, uint32_t qcode, const char *mod) xkb_keysym_get_name(sym, name, sizeof(name)); /* TODO: make ui/keymap.c parser accept QKeyCode names */ - fprintf(outfile, "%s 0x%02x%s\n", name, qcode_to_number(qcode), mod); + fprintf(outfile, "%s 0x%02x%s\n", name, linux_to_number(lnx), mod); } static void walk_map(struct xkb_keymap *map, xkb_keycode_t code, void *data) @@ -84,37 +83,37 @@ static void walk_map(struct xkb_keymap *map, xkb_keycode_t code, void *data) fprintf(outfile, "# evdev %d (0x%x), QKeyCode \"%s\", number 0x%x\n", evdev, evdev, QKeyCode_str(qcode), - qcode_to_number(qcode)); + linux_to_number(evdev)); /* * check which modifier states generate which keysyms */ xkb_state_update_mask(state, 0, 0, 0, 0, 0, 0); kbase = xkb_state_key_get_one_sym(state, code); - print_sym(kbase, qcode, ""); + print_sym(kbase, evdev, ""); xkb_state_update_mask(state, 0, 0, numlock, 0, 0, 0); knumlock = xkb_state_key_get_one_sym(state, code); if (kbase != knumlock) { - print_sym(knumlock, qcode, " numlock"); + print_sym(knumlock, evdev, " numlock"); } xkb_state_update_mask(state, shift, 0, 0, 0, 0, 0); kshift = xkb_state_key_get_one_sym(state, code); if (kbase != kshift && knumlock != kshift) { - print_sym(kshift, qcode, " shift"); + print_sym(kshift, evdev, " shift"); } xkb_state_update_mask(state, altgr, 0, 0, 0, 0, 0); kaltgr = xkb_state_key_get_one_sym(state, code); if (kbase != kaltgr) { - print_sym(kaltgr, qcode, " altgr"); + print_sym(kaltgr, evdev, " altgr"); } xkb_state_update_mask(state, altgr | shift, 0, 0, 0, 0, 0); kaltgrshift = xkb_state_key_get_one_sym(state, code); if (kshift != kaltgrshift && kaltgr != kaltgrshift) { - print_sym(kaltgrshift, qcode, " shift altgr"); + print_sym(kaltgrshift, evdev, " shift altgr"); } } @@ -251,16 +250,16 @@ int main(int argc, char *argv[]) "# keysyms. So append them here.\n" "#\n" "\n"); - print_sym(XKB_KEY_Print, Q_KEY_CODE_SYSRQ, ""); - print_sym(XKB_KEY_Sys_Req, Q_KEY_CODE_SYSRQ, ""); - print_sym(XKB_KEY_Execute, Q_KEY_CODE_SYSRQ, ""); + print_sym(XKB_KEY_Print, KEY_SYSRQ, ""); + print_sym(XKB_KEY_Sys_Req, KEY_SYSRQ, ""); + print_sym(XKB_KEY_Execute, KEY_SYSRQ, ""); - print_sym(XKB_KEY_KP_Decimal, Q_KEY_CODE_KP_DECIMAL, " numlock"); - print_sym(XKB_KEY_KP_Separator, Q_KEY_CODE_KP_DECIMAL, " numlock"); + print_sym(XKB_KEY_KP_Decimal, KEY_KPDOT, " numlock"); + print_sym(XKB_KEY_KP_Separator, KEY_KPDOT, " numlock"); - print_sym(XKB_KEY_Alt_R, Q_KEY_CODE_ALT_R, ""); - print_sym(XKB_KEY_ISO_Level3_Shift, Q_KEY_CODE_ALT_R, ""); - print_sym(XKB_KEY_Mode_switch, Q_KEY_CODE_ALT_R, ""); + print_sym(XKB_KEY_Alt_R, KEY_RIGHTALT, ""); + print_sym(XKB_KEY_ISO_Level3_Shift, KEY_RIGHTALT, ""); + print_sym(XKB_KEY_Mode_switch, KEY_RIGHTALT, ""); fprintf(outfile, "\n" -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304605.1577556 (Exim 4.92) (envelope-from ) id 1wLfEU-0002hy-Ip; Sat, 09 May 2026 10:48:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304605.1577556; Sat, 09 May 2026 10:48:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfEU-0002h7-Aw; Sat, 09 May 2026 10:48:30 +0000 Received: by outflank-mailman (input) for mailman id 1304605; Sat, 09 May 2026 10:48:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLfES-0002X5-Gq for xen-devel@lists.xenproject.org; Sat, 09 May 2026 10:48:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLfER-007lJU-Tw for xen-devel@lists.xenproject.org; Sat, 09 May 2026 12:48:27 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff10ec-5cb7-0a2a0a5109dd-0a2a4508be8e-6 for ; Sat, 09 May 2026 12:48:27 +0200 Received: from [49.212.243.89] (helo=www3579.sakura.ne.jp) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff10f9-63b5-0a2a45080019-31d4f359d6d7-3 for ; Sat, 09 May 2026 12:48:27 +0200 Received: from h183.csg.ci.i.u-tokyo.ac.jp (h183.csg.ci.i.u-tokyo.ac.jp [133.11.54.183]) (authenticated bits=0) by www3579.sakura.ne.jp (8.16.1/8.16.1) with ESMTPSA id 649AlY2B090834 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Sat, 9 May 2026 19:47:59 +0900 (JST) (envelope-from odaki@rsg.ci.i.u-tokyo.ac.jp) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=temperror header.s=rs20250326 header.d=rsg.ci.i.u-tokyo.ac.jp header.i="@rsg.ci.i.u-tokyo.ac.jp" DKIM-Signature: a=rsa-sha256; bh=ROUhaRxtDzPB8FJJRyCm0S9ppDBULPhLkvEBb93D+50=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323679; v=1; b=lzTC9DyfFbto9QQqJIWX4TjTyGPPBAJyLLupmTJeGxRQGJSl/m+z8PbzrGj5hs5Y 84QpcOTGt4CAoUiRUmz6+tjrT/UqoeEQb9qAfhRxtUf7YNGY1wd1b3Lf8a0T6c11 vor9zI6VjIBEyD7sutt1sCCc/pt+vyuQiA4Lr+CzuVgmzPORLpPOaycOiNXJy1aR KB2DGB0ETvv4v37fuYY7QfFxlZDJE9F4XyhrMnY5UaUcbnwTnYSm5SVr4SuKM/aQ E/5b8EMUHyI+CPmrnRojYg9V7ff5dRTjDhRpOe1G4l0ZZ3zplR32h3OZGA5AouHL XzFQzM4WKw9gg6KvIq+S0g== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:22 +0900 Subject: [PATCH RFC 10/28] hw/input/adb-kbd: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-10-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=11545; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=IuNc0nZq13Cfg85XfjaPn1/m1nF4glzSwdiuAeVhaoQ=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gUu3xSqPLlG2uVqgmuKU9vDaMn/3f4kTXl74G97Rw mkd//9PRykLgxgXg6yYIktK0W5ujejaT4UJ8S0wc1iZQIYwcHEKwEQi8hn+x/GuUVd/6lP7xX1l htXZq2nLzl24X71jt8LHrOe79m7oMGP4Xyd7QKOyrOl61MacbtUXanklidZJsRM2Meeov2i8r/u FAwA= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c1860d/1778323707-C4E78DB1-4D55FD79/0/0 X-purgate-type: clean X-purgate-size: 11547 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- hw/input/adb-kbd.c | 242 ++++++++++++++++++++++++++--------------------------- 1 file changed, 120 insertions(+), 122 deletions(-) diff --git a/hw/input/adb-kbd.c b/hw/input/adb-kbd.c index 060481d0db6d..c4ef9ebb90c8 100644 --- a/hw/input/adb-kbd.c +++ b/hw/input/adb-kbd.c @@ -26,6 +26,7 @@ #include "hw/input/adb.h" #include "migration/vmstate.h" #include "qemu/module.h" +#include "standard-headers/linux/input-event-codes.h" #include "ui/input.h" #include "hw/input/adb-keys.h" #include "adb-internal.h" @@ -55,124 +56,122 @@ struct ADBKeyboardClass { /* The adb keyboard doesn't have every key imaginable */ #define NO_KEY 0xff -int qcode_to_adb_keycode[] = { +int linux_to_adb_keycode[] = { /* Make sure future additions are automatically set to NO_KEY */ - [0 ... 0xff] = NO_KEY, - - [Q_KEY_CODE_SHIFT] = ADB_KEY_LEFT_SHIFT, - [Q_KEY_CODE_SHIFT_R] = ADB_KEY_RIGHT_SHIFT, - [Q_KEY_CODE_ALT] = ADB_KEY_LEFT_OPTION, - [Q_KEY_CODE_ALT_R] = ADB_KEY_RIGHT_OPTION, - [Q_KEY_CODE_CTRL] = ADB_KEY_LEFT_CONTROL, - [Q_KEY_CODE_CTRL_R] = ADB_KEY_RIGHT_CONTROL, - [Q_KEY_CODE_META_L] = ADB_KEY_COMMAND, - [Q_KEY_CODE_META_R] = ADB_KEY_COMMAND, - [Q_KEY_CODE_SPC] = ADB_KEY_SPACEBAR, - - [Q_KEY_CODE_ESC] = ADB_KEY_ESC, - [Q_KEY_CODE_1] = ADB_KEY_1, - [Q_KEY_CODE_2] = ADB_KEY_2, - [Q_KEY_CODE_3] = ADB_KEY_3, - [Q_KEY_CODE_4] = ADB_KEY_4, - [Q_KEY_CODE_5] = ADB_KEY_5, - [Q_KEY_CODE_6] = ADB_KEY_6, - [Q_KEY_CODE_7] = ADB_KEY_7, - [Q_KEY_CODE_8] = ADB_KEY_8, - [Q_KEY_CODE_9] = ADB_KEY_9, - [Q_KEY_CODE_0] = ADB_KEY_0, - [Q_KEY_CODE_MINUS] = ADB_KEY_MINUS, - [Q_KEY_CODE_EQUAL] = ADB_KEY_EQUAL, - [Q_KEY_CODE_BACKSPACE] = ADB_KEY_DELETE, - [Q_KEY_CODE_TAB] = ADB_KEY_TAB, - [Q_KEY_CODE_Q] = ADB_KEY_Q, - [Q_KEY_CODE_W] = ADB_KEY_W, - [Q_KEY_CODE_E] = ADB_KEY_E, - [Q_KEY_CODE_R] = ADB_KEY_R, - [Q_KEY_CODE_T] = ADB_KEY_T, - [Q_KEY_CODE_Y] = ADB_KEY_Y, - [Q_KEY_CODE_U] = ADB_KEY_U, - [Q_KEY_CODE_I] = ADB_KEY_I, - [Q_KEY_CODE_O] = ADB_KEY_O, - [Q_KEY_CODE_P] = ADB_KEY_P, - [Q_KEY_CODE_BRACKET_LEFT] = ADB_KEY_LEFT_BRACKET, - [Q_KEY_CODE_BRACKET_RIGHT] = ADB_KEY_RIGHT_BRACKET, - [Q_KEY_CODE_RET] = ADB_KEY_RETURN, - [Q_KEY_CODE_A] = ADB_KEY_A, - [Q_KEY_CODE_S] = ADB_KEY_S, - [Q_KEY_CODE_D] = ADB_KEY_D, - [Q_KEY_CODE_F] = ADB_KEY_F, - [Q_KEY_CODE_G] = ADB_KEY_G, - [Q_KEY_CODE_H] = ADB_KEY_H, - [Q_KEY_CODE_J] = ADB_KEY_J, - [Q_KEY_CODE_K] = ADB_KEY_K, - [Q_KEY_CODE_L] = ADB_KEY_L, - [Q_KEY_CODE_SEMICOLON] = ADB_KEY_SEMICOLON, - [Q_KEY_CODE_APOSTROPHE] = ADB_KEY_APOSTROPHE, - [Q_KEY_CODE_GRAVE_ACCENT] = ADB_KEY_GRAVE_ACCENT, - [Q_KEY_CODE_BACKSLASH] = ADB_KEY_BACKSLASH, - [Q_KEY_CODE_Z] = ADB_KEY_Z, - [Q_KEY_CODE_X] = ADB_KEY_X, - [Q_KEY_CODE_C] = ADB_KEY_C, - [Q_KEY_CODE_V] = ADB_KEY_V, - [Q_KEY_CODE_B] = ADB_KEY_B, - [Q_KEY_CODE_N] = ADB_KEY_N, - [Q_KEY_CODE_M] = ADB_KEY_M, - [Q_KEY_CODE_COMMA] = ADB_KEY_COMMA, - [Q_KEY_CODE_DOT] = ADB_KEY_PERIOD, - [Q_KEY_CODE_SLASH] = ADB_KEY_FORWARD_SLASH, - [Q_KEY_CODE_ASTERISK] = ADB_KEY_KP_MULTIPLY, - [Q_KEY_CODE_CAPS_LOCK] = ADB_KEY_CAPS_LOCK, - - [Q_KEY_CODE_F1] = ADB_KEY_F1, - [Q_KEY_CODE_F2] = ADB_KEY_F2, - [Q_KEY_CODE_F3] = ADB_KEY_F3, - [Q_KEY_CODE_F4] = ADB_KEY_F4, - [Q_KEY_CODE_F5] = ADB_KEY_F5, - [Q_KEY_CODE_F6] = ADB_KEY_F6, - [Q_KEY_CODE_F7] = ADB_KEY_F7, - [Q_KEY_CODE_F8] = ADB_KEY_F8, - [Q_KEY_CODE_F9] = ADB_KEY_F9, - [Q_KEY_CODE_F10] = ADB_KEY_F10, - [Q_KEY_CODE_F11] = ADB_KEY_F11, - [Q_KEY_CODE_F12] = ADB_KEY_F12, - [Q_KEY_CODE_PRINT] = ADB_KEY_F13, - [Q_KEY_CODE_SYSRQ] = ADB_KEY_F13, - [Q_KEY_CODE_SCROLL_LOCK] = ADB_KEY_F14, - [Q_KEY_CODE_PAUSE] = ADB_KEY_F15, - - [Q_KEY_CODE_NUM_LOCK] = ADB_KEY_KP_CLEAR, - [Q_KEY_CODE_KP_EQUALS] = ADB_KEY_KP_EQUAL, - [Q_KEY_CODE_KP_DIVIDE] = ADB_KEY_KP_DIVIDE, - [Q_KEY_CODE_KP_MULTIPLY] = ADB_KEY_KP_MULTIPLY, - [Q_KEY_CODE_KP_SUBTRACT] = ADB_KEY_KP_SUBTRACT, - [Q_KEY_CODE_KP_ADD] = ADB_KEY_KP_PLUS, - [Q_KEY_CODE_KP_ENTER] = ADB_KEY_KP_ENTER, - [Q_KEY_CODE_KP_DECIMAL] = ADB_KEY_KP_PERIOD, - [Q_KEY_CODE_KP_0] = ADB_KEY_KP_0, - [Q_KEY_CODE_KP_1] = ADB_KEY_KP_1, - [Q_KEY_CODE_KP_2] = ADB_KEY_KP_2, - [Q_KEY_CODE_KP_3] = ADB_KEY_KP_3, - [Q_KEY_CODE_KP_4] = ADB_KEY_KP_4, - [Q_KEY_CODE_KP_5] = ADB_KEY_KP_5, - [Q_KEY_CODE_KP_6] = ADB_KEY_KP_6, - [Q_KEY_CODE_KP_7] = ADB_KEY_KP_7, - [Q_KEY_CODE_KP_8] = ADB_KEY_KP_8, - [Q_KEY_CODE_KP_9] = ADB_KEY_KP_9, - - [Q_KEY_CODE_UP] = ADB_KEY_UP, - [Q_KEY_CODE_DOWN] = ADB_KEY_DOWN, - [Q_KEY_CODE_LEFT] = ADB_KEY_LEFT, - [Q_KEY_CODE_RIGHT] = ADB_KEY_RIGHT, - - [Q_KEY_CODE_HELP] = ADB_KEY_HELP, - [Q_KEY_CODE_INSERT] = ADB_KEY_HELP, - [Q_KEY_CODE_DELETE] = ADB_KEY_FORWARD_DELETE, - [Q_KEY_CODE_HOME] = ADB_KEY_HOME, - [Q_KEY_CODE_END] = ADB_KEY_END, - [Q_KEY_CODE_PGUP] = ADB_KEY_PAGE_UP, - [Q_KEY_CODE_PGDN] = ADB_KEY_PAGE_DOWN, - - [Q_KEY_CODE_POWER] = ADB_KEY_POWER + [0 ... KEY_MAX] = NO_KEY, + + [KEY_LEFTSHIFT] = ADB_KEY_LEFT_SHIFT, + [KEY_RIGHTSHIFT] = ADB_KEY_RIGHT_SHIFT, + [KEY_LEFTALT] = ADB_KEY_LEFT_OPTION, + [KEY_RIGHTALT] = ADB_KEY_RIGHT_OPTION, + [KEY_LEFTCTRL] = ADB_KEY_LEFT_CONTROL, + [KEY_RIGHTCTRL] = ADB_KEY_RIGHT_CONTROL, + [KEY_LEFTMETA] = ADB_KEY_COMMAND, + [KEY_RIGHTMETA] = ADB_KEY_COMMAND, + [KEY_SPACE] = ADB_KEY_SPACEBAR, + + [KEY_ESC] = ADB_KEY_ESC, + [KEY_1] = ADB_KEY_1, + [KEY_2] = ADB_KEY_2, + [KEY_3] = ADB_KEY_3, + [KEY_4] = ADB_KEY_4, + [KEY_5] = ADB_KEY_5, + [KEY_6] = ADB_KEY_6, + [KEY_7] = ADB_KEY_7, + [KEY_8] = ADB_KEY_8, + [KEY_9] = ADB_KEY_9, + [KEY_0] = ADB_KEY_0, + [KEY_MINUS] = ADB_KEY_MINUS, + [KEY_EQUAL] = ADB_KEY_EQUAL, + [KEY_BACKSPACE] = ADB_KEY_DELETE, + [KEY_TAB] = ADB_KEY_TAB, + [KEY_Q] = ADB_KEY_Q, + [KEY_W] = ADB_KEY_W, + [KEY_E] = ADB_KEY_E, + [KEY_R] = ADB_KEY_R, + [KEY_T] = ADB_KEY_T, + [KEY_Y] = ADB_KEY_Y, + [KEY_U] = ADB_KEY_U, + [KEY_I] = ADB_KEY_I, + [KEY_O] = ADB_KEY_O, + [KEY_P] = ADB_KEY_P, + [KEY_LEFTBRACE] = ADB_KEY_LEFT_BRACKET, + [KEY_RIGHTBRACE] = ADB_KEY_RIGHT_BRACKET, + [KEY_ENTER] = ADB_KEY_RETURN, + [KEY_A] = ADB_KEY_A, + [KEY_S] = ADB_KEY_S, + [KEY_D] = ADB_KEY_D, + [KEY_F] = ADB_KEY_F, + [KEY_G] = ADB_KEY_G, + [KEY_H] = ADB_KEY_H, + [KEY_J] = ADB_KEY_J, + [KEY_K] = ADB_KEY_K, + [KEY_L] = ADB_KEY_L, + [KEY_SEMICOLON] = ADB_KEY_SEMICOLON, + [KEY_APOSTROPHE] = ADB_KEY_APOSTROPHE, + [KEY_GRAVE] = ADB_KEY_GRAVE_ACCENT, + [KEY_BACKSLASH] = ADB_KEY_BACKSLASH, + [KEY_Z] = ADB_KEY_Z, + [KEY_X] = ADB_KEY_X, + [KEY_C] = ADB_KEY_C, + [KEY_V] = ADB_KEY_V, + [KEY_B] = ADB_KEY_B, + [KEY_N] = ADB_KEY_N, + [KEY_M] = ADB_KEY_M, + [KEY_COMMA] = ADB_KEY_COMMA, + [KEY_DOT] = ADB_KEY_PERIOD, + [KEY_SLASH] = ADB_KEY_FORWARD_SLASH, + [KEY_CAPSLOCK] = ADB_KEY_CAPS_LOCK, + + [KEY_F1] = ADB_KEY_F1, + [KEY_F2] = ADB_KEY_F2, + [KEY_F3] = ADB_KEY_F3, + [KEY_F4] = ADB_KEY_F4, + [KEY_F5] = ADB_KEY_F5, + [KEY_F6] = ADB_KEY_F6, + [KEY_F7] = ADB_KEY_F7, + [KEY_F8] = ADB_KEY_F8, + [KEY_F9] = ADB_KEY_F9, + [KEY_F10] = ADB_KEY_F10, + [KEY_F11] = ADB_KEY_F11, + [KEY_F12] = ADB_KEY_F12, + [KEY_SYSRQ] = ADB_KEY_F13, + [KEY_SCROLLLOCK] = ADB_KEY_F14, + [KEY_PAUSE] = ADB_KEY_F15, + + [KEY_NUMLOCK] = ADB_KEY_KP_CLEAR, + [KEY_KPEQUAL] = ADB_KEY_KP_EQUAL, + [KEY_KPSLASH] = ADB_KEY_KP_DIVIDE, + [KEY_KPASTERISK] = ADB_KEY_KP_MULTIPLY, + [KEY_KPMINUS] = ADB_KEY_KP_SUBTRACT, + [KEY_KPPLUS] = ADB_KEY_KP_PLUS, + [KEY_KPENTER] = ADB_KEY_KP_ENTER, + [KEY_KPDOT] = ADB_KEY_KP_PERIOD, + [KEY_KP0] = ADB_KEY_KP_0, + [KEY_KP1] = ADB_KEY_KP_1, + [KEY_KP2] = ADB_KEY_KP_2, + [KEY_KP3] = ADB_KEY_KP_3, + [KEY_KP4] = ADB_KEY_KP_4, + [KEY_KP5] = ADB_KEY_KP_5, + [KEY_KP6] = ADB_KEY_KP_6, + [KEY_KP7] = ADB_KEY_KP_7, + [KEY_KP8] = ADB_KEY_KP_8, + [KEY_KP9] = ADB_KEY_KP_9, + + [KEY_UP] = ADB_KEY_UP, + [KEY_DOWN] = ADB_KEY_DOWN, + [KEY_LEFT] = ADB_KEY_LEFT, + [KEY_RIGHT] = ADB_KEY_RIGHT, + + [KEY_HELP] = ADB_KEY_HELP, + [KEY_INSERT] = ADB_KEY_HELP, + [KEY_DELETE] = ADB_KEY_FORWARD_DELETE, + [KEY_HOME] = ADB_KEY_HOME, + [KEY_END] = ADB_KEY_END, + [KEY_PAGEUP] = ADB_KEY_PAGE_UP, + [KEY_PAGEDOWN] = ADB_KEY_PAGE_DOWN, + + [KEY_POWER] = ADB_KEY_POWER }; static void adb_kbd_put_keycode(void *opaque, int keycode) @@ -309,14 +308,13 @@ static void adb_keyboard_event(DeviceState *dev, QemuConsole *src, QemuInputEvent *evt) { KBDState *s = (KBDState *)dev; - int qcode, keycode; + int keycode; - qcode = qemu_input_linux_to_qcode(evt->key.key); - if (qcode >= ARRAY_SIZE(qcode_to_adb_keycode)) { + if (evt->key.key >= ARRAY_SIZE(linux_to_adb_keycode)) { return; } - /* FIXME: take handler into account when translating qcode */ - keycode = qcode_to_adb_keycode[qcode]; + /* FIXME: take handler into account when translating evt->key.key */ + keycode = linux_to_adb_keycode[evt->key.key]; if (keycode == NO_KEY) { /* We don't want to send this to the guest */ trace_adb_device_kbd_no_key(); return; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304602.1577520 (Exim 4.92) (envelope-from ) id 1wLfEQ-0001ib-LJ; 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bh=xdQOdc7TBZKnyuoO4opRDkTrA3cJx8lBTarnEJcV0aU=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323683; v=1; b=GIZRVXUprHxdgxXu37WO+oDE2tz2qK9qCDhUVa6i501Q91fZ3ewidrfX+a8lpkAF 6GqCbMHjs4ZNM/T0U3JUUNO0lOuRgt45WaPhjxfRUQzQ7L41jedjZJWipNEubGOE phEjj2/PsKnUryJDy3atw73TABpx0Y4RKe2xapC3S35WIb2p/Sj+GgbMhxfd+I70 AZYj1bbqe2j25S7YFoc+uJIXEsy4Kj2NTOTGcdZAcyrOD159de5VRjVD/hXBc01L nZ1SauA8vcN6tXKEc/UJt4UHl2gikPAmNjculIMWV+molbtmhbb9DaqjVYaa6FS5 4ThCfIkHGRDhexBedKxrCQ== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:40 +0900 Subject: [PATCH RFC 28/28] ui/input: Remove unused QKeyCode helpers and keymaps MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-28-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=10998; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=C1sfssKpLnbwImq0G/bJG/Pt5wdJQR3NAMSed0uq3qA=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gTsvbv/RVWZK0P/Ye32FUfvZF0LeavN4fqxacE/m2 LZffzYc7yhlYRDjYpAVU2RJKdrNrRFd+6kwIb4FZg4rE8gQBi5OAZiINAfD/zyXjrvBn7VsX/38 oJZuI3cv/2e13IRlN6JljeY/jlVWsWX4nz7hxrV1iZZ5b0xCA5OvZrmoHWAssvl9n2vl1as9GzJ yuQE= X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c201ff/1778323703-D8B78443-CA7F16EE/0/0 X-purgate-type: clean X-purgate-size: 11000 Their users have migrated to Linux key codes. Signed-off-by: Akihiko Odaki --- include/ui/input.h | 50 -------------------------------------------------- ui/input-keymap.c | 39 --------------------------------------- ui/input.c | 18 +----------------- ui/meson.build | 15 --------------- 4 files changed, 1 insertion(+), 121 deletions(-) diff --git a/include/ui/input.h b/include/ui/input.h index caa757ea1c2e..6e4892b73155 100644 --- a/include/ui/input.h +++ b/include/ui/input.h @@ -58,18 +58,13 @@ void qemu_input_event_send_impl(QemuConsole *src, QemuInputEvent *evt); void qemu_input_event_sync(void); void qemu_input_event_sync_impl(void); -void qemu_input_event_send_key(QemuConsole *src, KeyValue *key, bool down); void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, bool down); void qemu_input_event_send_key_number(QemuConsole *src, int num, bool down); -void qemu_input_event_send_key_qcode(QemuConsole *src, QKeyCode q, bool down); void qemu_input_event_send_key_delay(uint32_t delay_ms); int qemu_input_key_number_to_qcode(unsigned int nr); unsigned int qemu_input_key_number_to_linux(unsigned int nr); -int qemu_input_key_value_to_number(const KeyValue *value); -int qemu_input_key_value_to_qcode(const KeyValue *value); unsigned int qemu_input_key_value_to_linux(const KeyValue *value); -int qemu_input_qcode_to_scancode(QKeyCode qcode, bool down, int *codes); int qemu_input_linux_to_scancode(unsigned int lnx, bool down, int *codes); int qemu_input_linux_to_qcode(unsigned int lnx); @@ -94,96 +89,51 @@ void qemu_input_check_mode_change(void); void qemu_add_mouse_mode_change_notifier(Notifier *notify); void qemu_remove_mouse_mode_change_notifier(Notifier *notify); -extern const guint qemu_input_map_atset1_to_qcode_len; -extern const guint16 qemu_input_map_atset1_to_qcode[]; - extern const guint qemu_input_map_atset1_to_linux_len; extern const guint16 qemu_input_map_atset1_to_linux[]; extern const guint qemu_input_map_linux_to_qcode_len; extern const guint16 qemu_input_map_linux_to_qcode[]; -extern const guint qemu_input_map_qcode_to_atset1_len; -extern const guint16 qemu_input_map_qcode_to_atset1[]; - extern const guint qemu_input_map_linux_to_atset1_len; extern const guint16 qemu_input_map_linux_to_atset1[]; -extern const guint qemu_input_map_qcode_to_atset2_len; -extern const guint16 qemu_input_map_qcode_to_atset2[]; - extern const guint qemu_input_map_linux_to_atset2_len; extern const guint16 qemu_input_map_linux_to_atset2[]; -extern const guint qemu_input_map_qcode_to_atset3_len; -extern const guint16 qemu_input_map_qcode_to_atset3[]; - extern const guint qemu_input_map_linux_to_atset3_len; extern const guint16 qemu_input_map_linux_to_atset3[]; extern const guint qemu_input_map_qcode_to_linux_len; extern const guint16 qemu_input_map_qcode_to_linux[]; -extern const guint qemu_input_map_qcode_to_qnum_len; -extern const guint16 qemu_input_map_qcode_to_qnum[]; - extern const guint qemu_input_map_linux_to_qnum_len; extern const guint16 qemu_input_map_linux_to_qnum[]; -extern const guint qemu_input_map_qcode_to_sun_len; -extern const guint16 qemu_input_map_qcode_to_sun[]; - extern const guint qemu_input_map_linux_to_sun_len; extern const guint16 qemu_input_map_linux_to_sun[]; -extern const guint qemu_input_map_qnum_to_qcode_len; -extern const guint16 qemu_input_map_qnum_to_qcode[]; - extern const guint qemu_input_map_qnum_to_linux_len; extern const guint16 qemu_input_map_qnum_to_linux[]; -extern const guint qemu_input_map_usb_to_qcode_len; -extern const guint16 qemu_input_map_usb_to_qcode[]; - extern const guint qemu_input_map_usb_to_linux_len; extern const guint16 qemu_input_map_usb_to_linux[]; -extern const guint qemu_input_map_win32_to_qcode_len; -extern const guint16 qemu_input_map_win32_to_qcode[]; - extern const guint qemu_input_map_win32_to_linux_len; extern const guint16 qemu_input_map_win32_to_linux[]; -extern const guint qemu_input_map_x11_to_qcode_len; -extern const guint16 qemu_input_map_x11_to_qcode[]; - extern const guint qemu_input_map_x11_to_linux_len; extern const guint16 qemu_input_map_x11_to_linux[]; -extern const guint qemu_input_map_xorgevdev_to_qcode_len; -extern const guint16 qemu_input_map_xorgevdev_to_qcode[]; - -extern const guint qemu_input_map_xorgkbd_to_qcode_len; -extern const guint16 qemu_input_map_xorgkbd_to_qcode[]; - extern const guint qemu_input_map_xorgkbd_to_linux_len; extern const guint16 qemu_input_map_xorgkbd_to_linux[]; -extern const guint qemu_input_map_xorgxquartz_to_qcode_len; -extern const guint16 qemu_input_map_xorgxquartz_to_qcode[]; - extern const guint qemu_input_map_xorgxquartz_to_linux_len; extern const guint16 qemu_input_map_xorgxquartz_to_linux[]; -extern const guint qemu_input_map_xorgxwin_to_qcode_len; -extern const guint16 qemu_input_map_xorgxwin_to_qcode[]; - extern const guint qemu_input_map_xorgxwin_to_linux_len; extern const guint16 qemu_input_map_xorgxwin_to_linux[]; -extern const guint qemu_input_map_osx_to_qcode_len; -extern const guint16 qemu_input_map_osx_to_qcode[]; - extern const guint qemu_input_map_osx_to_linux_len; extern const guint16 qemu_input_map_osx_to_linux[]; diff --git a/ui/input-keymap.c b/ui/input-keymap.c index 2b77ef09fd66..ec2a1fbc1a95 100644 --- a/ui/input-keymap.c +++ b/ui/input-keymap.c @@ -4,36 +4,21 @@ #include "standard-headers/linux/input.h" -#include "ui/input-keymap-atset1-to-qcode.c.inc" #include "ui/input-keymap-atset1-to-linux.c.inc" #include "ui/input-keymap-linux-to-qcode.c.inc" -#include "ui/input-keymap-qcode-to-atset1.c.inc" #include "ui/input-keymap-linux-to-atset1.c.inc" -#include "ui/input-keymap-qcode-to-atset2.c.inc" #include "ui/input-keymap-linux-to-atset2.c.inc" -#include "ui/input-keymap-qcode-to-atset3.c.inc" #include "ui/input-keymap-linux-to-atset3.c.inc" #include "ui/input-keymap-qcode-to-linux.c.inc" -#include "ui/input-keymap-qcode-to-qnum.c.inc" #include "ui/input-keymap-linux-to-qnum.c.inc" -#include "ui/input-keymap-qcode-to-sun.c.inc" #include "ui/input-keymap-linux-to-sun.c.inc" -#include "ui/input-keymap-qnum-to-qcode.c.inc" #include "ui/input-keymap-qnum-to-linux.c.inc" -#include "ui/input-keymap-usb-to-qcode.c.inc" #include "ui/input-keymap-usb-to-linux.c.inc" -#include "ui/input-keymap-win32-to-qcode.c.inc" #include "ui/input-keymap-win32-to-linux.c.inc" -#include "ui/input-keymap-x11-to-qcode.c.inc" #include "ui/input-keymap-x11-to-linux.c.inc" -#include "ui/input-keymap-xorgevdev-to-qcode.c.inc" -#include "ui/input-keymap-xorgkbd-to-qcode.c.inc" #include "ui/input-keymap-xorgkbd-to-linux.c.inc" -#include "ui/input-keymap-xorgxquartz-to-qcode.c.inc" #include "ui/input-keymap-xorgxquartz-to-linux.c.inc" -#include "ui/input-keymap-xorgxwin-to-qcode.c.inc" #include "ui/input-keymap-xorgxwin-to-linux.c.inc" -#include "ui/input-keymap-osx-to-qcode.c.inc" #include "ui/input-keymap-osx-to-linux.c.inc" int qemu_input_linux_to_qcode(unsigned int lnx) @@ -44,19 +29,6 @@ int qemu_input_linux_to_qcode(unsigned int lnx) return qemu_input_map_linux_to_qcode[lnx]; } -int qemu_input_key_value_to_number(const KeyValue *value) -{ - if (value->type == KEY_VALUE_KIND_QCODE) { - if (value->u.qcode.data >= qemu_input_map_qcode_to_qnum_len) { - return 0; - } - return qemu_input_map_qcode_to_qnum[value->u.qcode.data]; - } else { - assert(value->type == KEY_VALUE_KIND_NUMBER); - return value->u.number.data; - } -} - int qemu_input_key_number_to_qcode(unsigned int nr) { return qemu_input_linux_to_qcode(qemu_input_key_number_to_linux(nr)); @@ -70,11 +42,6 @@ unsigned int qemu_input_key_number_to_linux(unsigned int nr) return qemu_input_map_qnum_to_linux[nr]; } -int qemu_input_key_value_to_qcode(const KeyValue *value) -{ - return qemu_input_linux_to_qcode(qemu_input_key_value_to_linux(value)); -} - unsigned int qemu_input_key_value_to_linux(const KeyValue *value) { switch (value->type) { @@ -89,12 +56,6 @@ unsigned int qemu_input_key_value_to_linux(const KeyValue *value) } } -int qemu_input_qcode_to_scancode(QKeyCode qcode, bool down, int *codes) -{ - return qemu_input_linux_to_scancode(qemu_input_map_qcode_to_linux[qcode], - down, codes); -} - int qemu_input_linux_to_scancode(unsigned int lnx, bool down, int *codes) { int keycode = lnx < qemu_input_map_linux_to_qnum_len ? diff --git a/ui/input.c b/ui/input.c index e3e277117949..2524abaedf7b 100644 --- a/ui/input.c +++ b/ui/input.c @@ -352,14 +352,6 @@ void qemu_input_event_sync(void) replay_input_sync_event(); } -void qemu_input_event_send_key(QemuConsole *src, KeyValue *key, bool down) -{ - unsigned int lnx = qemu_input_key_value_to_linux(key); - - g_free(key); - qemu_input_event_send_key_linux(src, lnx, down); -} - void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, bool down) { @@ -383,15 +375,7 @@ void qemu_input_event_send_key_linux(QemuConsole *src, unsigned int lnx, void qemu_input_event_send_key_number(QemuConsole *src, int num, bool down) { unsigned int lnx = qemu_input_key_number_to_linux(num); - qemu_input_event_send_key_qcode(src, lnx, down); -} - -void qemu_input_event_send_key_qcode(QemuConsole *src, QKeyCode q, bool down) -{ - KeyValue *key = g_new0(KeyValue, 1); - key->type = KEY_VALUE_KIND_QCODE; - key->u.qcode.data = q; - qemu_input_event_send_key(src, key, down); + qemu_input_event_send_key_linux(src, lnx, down); } void qemu_input_event_send_key_delay(uint32_t delay_ms) diff --git a/ui/meson.build b/ui/meson.build index 4aa2a38c52f4..0b810925d2db 100644 --- a/ui/meson.build +++ b/ui/meson.build @@ -149,36 +149,21 @@ if spice.found() endif keymaps = [ - ['atset1', 'qcode'], ['atset1', 'linux'], ['linux', 'qcode'], - ['qcode', 'atset1'], ['linux', 'atset1'], - ['qcode', 'atset2'], ['linux', 'atset2'], - ['qcode', 'atset3'], ['linux', 'atset3'], ['qcode', 'linux'], - ['qcode', 'qnum'], ['linux', 'qnum'], - ['qcode', 'sun'], ['linux', 'sun'], - ['qnum', 'qcode'], ['qnum', 'linux'], - ['usb', 'qcode'], ['usb', 'linux'], - ['win32', 'qcode'], ['win32', 'linux'], - ['x11', 'qcode'], ['x11', 'linux'], - ['xorgevdev', 'qcode'], - ['xorgkbd', 'qcode'], ['xorgkbd', 'linux'], - ['xorgxquartz', 'qcode'], ['xorgxquartz', 'linux'], - ['xorgxwin', 'qcode'], ['xorgxwin', 'linux'], - ['osx', 'qcode'], ['osx', 'linux'], ] -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 10:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 10:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304603.1577542 (Exim 4.92) (envelope-from ) id 1wLfER-0002Ql-Vu; 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bh=8DrbNDimPytD2Lqd2BsnuvqZLeFlu5Z+sunaR47ICfs=; c=relaxed/relaxed; d=rsg.ci.i.u-tokyo.ac.jp; h=From:Message-Id:To:Subject:Date; s=rs20250326; t=1778323681; v=1; b=EZUG6OgWnMEi80mWOv2bjQh69KIzj095fUuL+GG0Y+Ocgqc0ySNqx21bn9jTgoBi gIOOXCAYQ6WtAM8ujVLEiqtd9gSR0j4rd4xO7o5RqI2XPMW3/UooD+7tSggeiP4L gE0NUbscSS8YA+Mx1Gfr2UylEtbic/4xW8GTk6m2P9EznvTyEH4iV/4IZA+UHNGx dUmXYXfrVKC7U3HU4oua43HgpUYTg1YNjbSpvneEbJ8jidGE8CTbWnEeqeiXZVip MXUMoqwQTbNunaDlZcL3/vUInNW0z7NbHiONGReOLeJaq1Zb585hY6sdxGHqBKgs ZyyMt54SD4C3BEJvhcbbUw== From: Akihiko Odaki Date: Sat, 09 May 2026 19:34:32 +0900 Subject: [PATCH RFC 20/28] ui/input-legacy: Use Linux key codes MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260509-input-v1-20-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> References: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> In-Reply-To: <20260509-input-v1-0-66f18d2edde6@rsg.ci.i.u-tokyo.ac.jp> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , Jan Kiszka , Peter Maydell , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Mark Cave-Ayland , Gerd Hoffmann , "Michael S. Tsirkin" , Thomas Huth , =?utf-8?q?Alex_Benn=C3=A9e?= , qemu-arm@nongnu.org, xen-devel@lists.xenproject.org, qemu-ppc@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Akihiko Odaki X-Mailer: b4 0.16-dev-16047 X-Developer-Signature: v=1; a=openpgp-sha256; l=2048; i=odaki@rsg.ci.i.u-tokyo.ac.jp; h=from:subject:message-id; bh=Fw4LZt0Zxdxd+pp/aswa6uqQEJsaIMY4eIVuWOuDFDU=; b=owGbwMvMwCWmMbc20y1CyJDxtFoSQ+Z/gRuRrFtN2E/2hy4vFXHjb+T9L3/4tGJiRbZhv8OPb n3ll5YdpSwMYlwMsmKKLClFu7k1oms/FSbEt8DMYWUCGcLAxSkAE7nAz/A/x8pUpe/X57bWK/cM bW+638299/u5v635S2aD3y8sV8SyMjIsmraO89bZEL2iixLlB53cTK4dZf/jVxn+dprRhGtK56R 5AA== X-Developer-Key: i=odaki@rsg.ci.i.u-tokyo.ac.jp; a=openpgp; fpr=AEDC03C9AF734F2EC26A7BFFA4BAEAA73536753C X-purgate-ID: tlsNG-c201ff/1778323706-E338A443-BC534A78/0/0 X-purgate-type: clean X-purgate-size: 2050 QemuInputEvent now stores Linux key codes for key events. Use those codes directly instead of translating between internal key code representations. Signed-off-by: Akihiko Odaki --- ui/input-legacy.c | 22 +++++----------------- 1 file changed, 5 insertions(+), 17 deletions(-) diff --git a/ui/input-legacy.c b/ui/input-legacy.c index e2b48dd8f0aa..193c9ae2ef9f 100644 --- a/ui/input-legacy.c +++ b/ui/input-legacy.c @@ -71,23 +71,11 @@ int index_from_key(const char *key, size_t key_length) return i; } -static KeyValue *copy_key_value(KeyValue *src) -{ - KeyValue *dst = g_new(KeyValue, 1); - memcpy(dst, src, sizeof(*src)); - if (dst->type == KEY_VALUE_KIND_NUMBER) { - QKeyCode code = qemu_input_key_number_to_qcode(dst->u.number.data); - dst->type = KEY_VALUE_KIND_QCODE; - dst->u.qcode.data = code; - } - return dst; -} - void qmp_send_key(KeyValueList *keys, bool has_hold_time, int64_t hold_time, Error **errp) { KeyValueList *p; - KeyValue **up = NULL; + unsigned int *up = NULL; int count = 0; if (!has_hold_time) { @@ -95,15 +83,15 @@ void qmp_send_key(KeyValueList *keys, bool has_hold_time, int64_t hold_time, } for (p = keys; p != NULL; p = p->next) { - qemu_input_event_send_key(NULL, copy_key_value(p->value), true); - qemu_input_event_send_key_delay(hold_time); up = g_realloc(up, sizeof(*up) * (count+1)); - up[count] = copy_key_value(p->value); + up[count] = qemu_input_key_value_to_linux(p->value); + qemu_input_event_send_key_linux(NULL, up[count], true); + qemu_input_event_send_key_delay(hold_time); count++; } while (count) { count--; - qemu_input_event_send_key(NULL, up[count], false); + qemu_input_event_send_key_linux(NULL, up[count], false); qemu_input_event_send_key_delay(hold_time); } g_free(up); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 17:01:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 17:01:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304888.1577569 (Exim 4.92) (envelope-from ) id 1wLl2v-0002tL-Ki; Sat, 09 May 2026 17:00:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304888.1577569; Sat, 09 May 2026 17:00:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLl2v-0002tC-Fk; Sat, 09 May 2026 17:00:57 +0000 Received: by outflank-mailman (input) for mailman id 1304888; Sat, 09 May 2026 17:00:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLl2t-0002t6-Un for xen-devel@lists.xenproject.org; Sat, 09 May 2026 17:00:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLl2s-001bV2-VQ for xen-devel@lists.xenproject.org; Sat, 09 May 2026 19:00:55 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff6830-2eae-0a2a0a5409dd-0a2a45048f3a-26 for ; Sat, 09 May 2026 19:00:54 +0200 Received: from [209.85.222.180] (helo=mail-qk1-f180.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff6845-1dec-0a2a45040019-d155deb4a4ee-3 for ; Sat, 09 May 2026 19:00:54 +0200 Received: by mail-qk1-f180.google.com with SMTP id af79cd13be357-8dbbc6c16b2so404700585a.0 for ; Sat, 09 May 2026 10:00:54 -0700 (PDT) Received: from ziepe.ca (crbknf0213w-47-54-130-67.pppoe-dynamic.high-speed.nl.bellaliant.net. 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Message-ID: <20260509170051.GD9285@ziepe.ca> References: <1776873531.8631fc262581453bbf619ec5b2062170.19db5ea67ab000f373@vates.tech> <20260426133027.GB3501894@ziepe.ca> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-ebf023/1778346054-2A5603FF-95453907/0/0 X-purgate-type: clean X-purgate-size: 2153 On Thu, May 07, 2026 at 08:02:40AM +0000, Tian, Kevin wrote: > > From: Jason Gunthorpe > > Sent: Sunday, April 26, 2026 9:30 PM > > > > On Thu, Apr 23, 2026 at 08:01:50AM +0000, Tian, Kevin wrote: > > > > On Xen, we have a dedicated hypercalls for moving a device into another > > > > guest (so it no longer belongs in Dom0, at far as DMA is concerned). > > > > > > > > But it looks like there are no way to describe that idea of "attach that > > > > device to this VM" nor "the device is in a VM"; which makes that > > > > impracticable. > > > > > > > > There may be things that could be done with the vIOMMU objects, but > > > > there would be no "parent domain" in such case, as said earlier it > > > > doesn't exist in the IOMMU subsystem. > > > > > > > > What is expected to be done instead ? > > > > > > > > Teddy > > > > > > > > [1] https://www.youtube.com/watch?v=pLMGRgEJ-Eg > > > > > > > > > > It'd be much easier to collect comments if you can put plain words > > > to explain the problem rather than expecting other folks to watch > > > the video first... > > > > It sounds like CC and pkvm to me so I think it should re-use those > > mechanisms.. > > > > for CC and pkvm the guest memory is still allocated from host. >From an iommu perspective that doesn't entirely matter, what it sees is that the translation is controlled by some secure world and it only needs a way to associate the kvm handle for the secure world with any required call for configuring the viommu. It is not very different from KVM installing encrypted pages that have been completed unmapped from all page tables in the hypervisor into the VM's secure EPT through TDX calls and then iommufd creating a viommu that re-uses the secure EPT. The only thing dealing with the memory map is KVM. I'd expect Xen to work the same, however the invisible memory was affiliated with the VM through KVM the iommu side should pick up the KVM and then request a VIOMMU to be setup for the VFIO device on the target KVM and that should trigger the hypercalls to move the device into the selected guest. Jason From xen-devel-bounces@lists.xenproject.org Sat May 09 17:17:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 17:17:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304899.1577578 (Exim 4.92) (envelope-from ) id 1wLlIW-0004kF-TD; Sat, 09 May 2026 17:17:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304899.1577578; Sat, 09 May 2026 17:17:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLlIW-0004k8-P6; Sat, 09 May 2026 17:17:04 +0000 Received: by outflank-mailman (input) for mailman id 1304899; Sat, 09 May 2026 17:17:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLlIU-0004k2-GJ for xen-devel@lists.xenproject.org; Sat, 09 May 2026 17:17:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLlIT-0026KT-TV for xen-devel@lists.xenproject.org; Sat, 09 May 2026 19:17:01 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ff6bfe-5cb7-0a2a0a5109dd-0a2a4502e204-8 for ; Sat, 09 May 2026 19:17:01 +0200 Received: from [170.10.133.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ff6c0c-af86-0a2a45020019-aa0a857c766d-3 for ; Sat, 09 May 2026 19:17:01 +0200 Received: from mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (ec2-54-186-198-63.us-west-2.compute.amazonaws.com [54.186.198.63]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-636-BfaoMpQBOwe2Oicoz6BwWg-1; Sat, 09 May 2026 13:16:55 -0400 Received: from mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.4]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-03.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 6AB3819560B4; Sat, 9 May 2026 17:16:50 +0000 (UTC) Received: from localhost (unknown [10.44.24.4]) by mx-prod-int-01.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 444FB3002D30; Sat, 9 May 2026 17:16:44 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778347020; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=S55zZ457fOtWSDgpU0+d8V9m5MMTKNlkmEv79oOosxI=; b=C+TmSI3nIwTwD4oIrctDe9CWbo9P2q+dcej67Ab4ATrZPkE20KAHf35ntdpwWOVz0YQN94 6WlFODnMCIPPg/WEWa8JdCVptM+ojhMTuYepz/WHVG13+ZCDh8BgfbWeQ+brjM+7yKXRYq WcWL1NzGNzlDeUROA94epJNehYQy2T0= X-MC-Unique: BfaoMpQBOwe2Oicoz6BwWg-1 X-Mimecast-MFC-AGG-ID: BfaoMpQBOwe2Oicoz6BwWg_1778347011 From: marcandre.lureau@redhat.com To: qemu-devel@nongnu.org Cc: stefanha@gmail.com, =?UTF-8?q?Marc-Andr=C3=A9=20Lureau?= , Jan Kiszka , Peter Maydell , Phil Dennis-Jordan , Richard Henderson , Helge Deller , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Gerd Hoffmann , Mark Cave-Ayland , Samuel Tardieu , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Aleksandar Rikalo , Jean-Christophe Dubois , Laurent Vivier , Thomas Huth , BALATON Zoltan , "Michael S. Tsirkin" , Stefano Garzarella , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Akihiko Odaki , Dmitry Osipenko , Dmitry Fleytman , Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , Alistair Francis , Alex Williamson , =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-arm@nongnu.org (open list:Musicpal), qemu-ppc@nongnu.org (open list:sam460ex), xen-devel@lists.xenproject.org (open list:X86 Xen CPUs) Subject: [PULL v2 28/33] ui/console: rename public API to use consistent qemu_console_ prefix Date: Sat, 9 May 2026 21:13:49 +0400 Message-ID: <20260509171356.1157879-29-marcandre.lureau@redhat.com> In-Reply-To: <20260509171356.1157879-1-marcandre.lureau@redhat.com> References: <20260509171356.1157879-1-marcandre.lureau@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.4 X-Mimecast-MFC-PROC-ID: D35fY0rVM-B65eHF4-ZLT2s8iET6TQw44jBDt0cMmao_1778347011 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778347021-7BD672C1-286549E4/0/0 X-purgate-type: clean X-purgate-size: 114193 From: Marc-André Lureau Rename the display and graphic console public functions to follow a consistent qemu_console_ (or qemu_graphic_console_) naming convention. The previous API used a mix of prefixes: dpy_, graphic_hw_, graphic_console_, console_has_, and update_displaychangelistener(). Unify them under a common qemu_console_ namespace for better discoverability and consistency. The main renames are: - dpy_gfx_*() / dpy_text_*() / dpy_gl_*() → qemu_console_*() - dpy_{get,set}_ui_info() → qemu_console_{get,set}_ui_info() - graphic_hw_*() → qemu_console_hw_*() - graphic_console_*() → qemu_graphic_console_*() - console_has_gl() → qemu_console_has_gl() - update_displaychangelistener() → qemu_console_listener_set_refresh() No functional changes. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Marc-André Lureau --- include/ui/console.h | 108 ++++++++++++------------ hw/arm/musicpal.c | 4 +- hw/display/artist.c | 4 +- hw/display/ati.c | 16 ++-- hw/display/bcm2835_fb.c | 5 +- hw/display/bochs-display.c | 14 ++-- hw/display/cg3.c | 6 +- hw/display/cirrus_vga.c | 8 +- hw/display/cirrus_vga_isa.c | 2 +- hw/display/dm163.c | 6 +- hw/display/exynos4210_fimd.c | 4 +- hw/display/g364fb.c | 10 +-- hw/display/imx6ul_lcdif.c | 14 ++-- hw/display/jazz_led.c | 8 +- hw/display/macfb.c | 6 +- hw/display/next-fb.c | 4 +- hw/display/omap_lcdc.c | 4 +- hw/display/pl110.c | 4 +- hw/display/qxl-render.c | 12 +-- hw/display/qxl.c | 14 ++-- hw/display/ramfb-standalone.c | 2 +- hw/display/ramfb.c | 4 +- hw/display/sm501.c | 6 +- hw/display/ssd0303.c | 4 +- hw/display/ssd0323.c | 5 +- hw/display/tcx.c | 16 ++-- hw/display/vga-isa.c | 2 +- hw/display/vga-mmio.c | 2 +- hw/display/vga-pci.c | 6 +- hw/display/vga.c | 40 +++++---- hw/display/vhost-user-gpu.c | 22 ++--- hw/display/virtio-gpu-base.c | 2 +- hw/display/virtio-gpu-rutabaga.c | 10 +-- hw/display/virtio-gpu-udmabuf.c | 4 +- hw/display/virtio-gpu-virgl.c | 20 ++--- hw/display/virtio-gpu.c | 26 +++--- hw/display/virtio-vga.c | 2 +- hw/display/vmware_vga.c | 12 +-- hw/display/xenfb.c | 6 +- hw/display/xlnx_dp.c | 10 +-- hw/vfio/display.c | 32 +++---- ui/console-vc.c | 12 +-- ui/console.c | 140 +++++++++++++++---------------- ui/curses.c | 8 +- ui/dbus-console.c | 4 +- ui/dbus-listener.c | 10 +-- ui/egl-headless.c | 4 +- ui/gtk-egl.c | 6 +- ui/gtk-gl-area.c | 6 +- ui/gtk.c | 18 ++-- ui/sdl2-2d.c | 2 +- ui/sdl2-gl.c | 2 +- ui/sdl2.c | 6 +- ui/spice-display.c | 16 ++-- ui/vnc.c | 22 ++--- hw/display/apple-gfx.m | 16 ++-- ui/cocoa.m | 10 +-- 57 files changed, 379 insertions(+), 389 deletions(-) diff --git a/include/ui/console.h b/include/ui/console.h index 69ac7b01b33..cfa940d4c66 100644 --- a/include/ui/console.h +++ b/include/ui/console.h @@ -294,49 +294,49 @@ DisplayState *init_displaystate(void); void qemu_console_register_listener(QemuConsole *con, DisplayChangeListener *dcl, const DisplayChangeListenerOps *ops); -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval); +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval); void qemu_console_unregister_listener(DisplayChangeListener *dcl); -bool dpy_ui_info_supported(const QemuConsole *con); -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con); -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); - -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_gfx_update_full(QemuConsole *con); -void dpy_gfx_replace_surface(QemuConsole *con, - DisplaySurface *surface); -void dpy_text_cursor(QemuConsole *con, int x, int y); -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h); -void dpy_text_resize(QemuConsole *con, int w, int h); -void dpy_mouse_set(QemuConsole *con, int x, int y, bool on); -void dpy_cursor_define(QemuConsole *con, QEMUCursor *cursor); -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format); - -void dpy_gl_scanout_disable(QemuConsole *con); -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, bool backing_y_0_top, - uint32_t backing_width, uint32_t backing_height, - uint32_t x, uint32_t y, uint32_t w, uint32_t h, - void *d3d_tex2d); -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y); -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y); -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf); -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h); - -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - QEMUGLParams *params); -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); - -bool console_has_gl(QemuConsole *con); +bool qemu_console_ui_info_supported(const QemuConsole *con); +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con); +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay); + +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_update_full(QemuConsole *con); +void qemu_console_set_surface(QemuConsole *con, + DisplaySurface *surface); +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y); +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h); +void qemu_console_text_resize(QemuConsole *con, int w, int h); +void qemu_console_set_mouse(QemuConsole *con, int x, int y, bool on); +void qemu_console_set_cursor(QemuConsole *con, QEMUCursor *cursor); +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format); + +void qemu_console_gl_scanout_disable(QemuConsole *con); +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, bool backing_y_0_top, + uint32_t backing_width, uint32_t backing_height, + uint32_t x, uint32_t y, uint32_t w, uint32_t h, + void *d3d_tex2d); +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y); +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y); +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf); +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h); + +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *params); +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx); +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx); + +bool qemu_console_has_gl(QemuConsole *con); enum { GRAPHIC_FLAGS_NONE = 0, @@ -361,19 +361,19 @@ typedef struct GraphicHwOps { void (*gl_block)(void *opaque, bool block); } GraphicHwOps; -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *ops, - void *opaque); -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque); -void graphic_console_close(QemuConsole *con); - -void graphic_hw_update(QemuConsole *con); -void graphic_hw_update_done(QemuConsole *con); -void graphic_hw_invalidate(QemuConsole *con); -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata); -void graphic_hw_gl_block(QemuConsole *con, bool block); +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *ops, + void *opaque); +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque); +void qemu_graphic_console_close(QemuConsole *con); + +void qemu_console_hw_update(QemuConsole *con); +void qemu_console_hw_update_done(QemuConsole *con); +void qemu_console_hw_invalidate(QemuConsole *con); +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata); +void qemu_console_hw_gl_block(QemuConsole *con, bool block); void qemu_console_early_init(void); diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index ba88ed756e2..83676eb7fea 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -170,7 +170,7 @@ static bool lcd_refresh(void *opaque) } } - dpy_gfx_update(s->con, 0, 0, 128*3, 64*3); + qemu_console_update(s->con, 0, 0, 128*3, 64*3); return true; } @@ -253,7 +253,7 @@ static const GraphicHwOps musicpal_gfx_ops = { static void musicpal_lcd_realize(DeviceState *dev, Error **errp) { musicpal_lcd_state *s = MUSICPAL_LCD(dev); - s->con = graphic_console_init(dev, 0, &musicpal_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &musicpal_gfx_ops, s); qemu_console_resize(s->con, 128 * 3, 64 * 3); } diff --git a/hw/display/artist.c b/hw/display/artist.c index a07508378c7..288d466ec64 100644 --- a/hw/display/artist.c +++ b/hw/display/artist.c @@ -1324,7 +1324,7 @@ static bool artist_update_display(void *opaque) artist_draw_cursor(s); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->width, last - first + 1); + qemu_console_update(s->con, 0, first, s->width, last - first + 1); } return true; @@ -1424,7 +1424,7 @@ static void artist_realizefn(DeviceState *dev, Error **errp) s->misc_video |= 0x0A000000; s->misc_ctrl |= 0x00800000; - s->con = graphic_console_init(dev, 0, &artist_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &artist_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/ati.c b/hw/display/ati.c index 3a7d45a8820..d77589df67a 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -161,7 +161,7 @@ static void ati_cursor_define(ATIVGAState *s) } cursor_set_mono(s->cursor, s->regs.cur_color1, s->regs.cur_color0, (uint8_t *)&data[64], 1, (uint8_t *)&data[0]); - dpy_cursor_define(s->vga.con, s->cursor); + qemu_console_set_cursor(s->vga.con, s->cursor); } /* Alternatively support guest rendered hardware cursor */ @@ -626,9 +626,9 @@ static void ati_mm_write(void *opaque, hwaddr addr, if (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) { ati_cursor_define(s); } - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, - (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, + (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) != 0); } } if ((val & (CRTC2_EXT_DISP_EN | CRTC2_EN)) != @@ -780,8 +780,8 @@ static void ati_mm_write(void *opaque, hwaddr addr, } if (!s->cursor_guest_mode && (s->regs.crtc_gen_cntl & CRTC2_CUR_EN) && !(t & BIT(31))) { - dpy_mouse_set(s->vga.con, s->regs.cur_hv_pos >> 16, - s->regs.cur_hv_pos & 0xffff, true); + qemu_console_set_mouse(s->vga.con, s->regs.cur_hv_pos >> 16, + s->regs.cur_hv_pos & 0xffff, true); } break; } @@ -1094,7 +1094,7 @@ static void ati_vga_realize(PCIDevice *dev, Error **errp) } vga_init(vga, OBJECT(s), pci_address_space(dev), pci_address_space_io(dev), true); - vga->con = graphic_console_init(DEVICE(s), 0, s->vga.hw_ops, vga); + vga->con = qemu_graphic_console_create(DEVICE(s), 0, s->vga.hw_ops, vga); if (s->cursor_guest_mode) { vga->cursor_invalidate = ati_cursor_invalidate; vga->cursor_draw_line = ati_cursor_draw_line; @@ -1167,7 +1167,7 @@ static void ati_vga_exit(PCIDevice *dev) ATIVGAState *s = ATI_VGA(dev); timer_del(&s->vblank_timer); - graphic_console_close(s->vga.con); + qemu_graphic_console_close(s->vga.con); } static const Property ati_vga_properties[] = { diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c index 83c4c03c7ca..bd58f625fcd 100644 --- a/hw/display/bcm2835_fb.c +++ b/hw/display/bcm2835_fb.c @@ -207,8 +207,7 @@ static bool fb_update_display(void *opaque) draw_line_src16, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->config.xres, - last - first + 1); + qemu_console_update(s->con, 0, first, s->config.xres, last - first + 1); } s->invalidate = false; @@ -427,7 +426,7 @@ static void bcm2835_fb_realize(DeviceState *dev, Error **errp) bcm2835_fb_reset(dev); - s->con = graphic_console_init(dev, 0, &vgafb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &vgafb_ops, s); qemu_console_resize(s->con, s->config.xres, s->config.yres); } diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c index 8ef9b76cf85..64e669429c4 100644 --- a/hw/display/bochs-display.c +++ b/hw/display/bochs-display.c @@ -224,12 +224,12 @@ static bool bochs_display_update(void *opaque) mode.format, mode.stride, ptr + mode.offset); - dpy_gfx_replace_surface(s->con, ds); + qemu_console_set_surface(s->con, ds); full_update = true; } if (full_update) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } else { snap = memory_region_snapshot_and_clear_dirty(&s->vram, mode.offset, mode.size, @@ -243,14 +243,12 @@ static bool bochs_display_update(void *opaque) ys = y; } if (!dirty && ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); ys = -1; } } if (ys >= 0) { - dpy_gfx_update(s->con, 0, ys, - mode.width, y - ys); + qemu_console_update(s->con, 0, ys, mode.width, y - ys); } g_free(snap); @@ -279,7 +277,7 @@ static void bochs_display_realize(PCIDevice *dev, Error **errp) } s->vgamem = pow2ceil(s->vgamem); - s->con = graphic_console_init(DEVICE(dev), 0, &bochs_display_gfx_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, &bochs_display_gfx_ops, s); memory_region_init_ram(&s->vram, obj, "bochs-display-vram", s->vgamem, &error_fatal); @@ -344,7 +342,7 @@ static void bochs_display_exit(PCIDevice *dev) { BochsDisplayState *s = BOCHS_DISPLAY(dev); - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); } static const Property bochs_display_properties[] = { diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 963bb3427a6..f9dda1549dd 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -137,7 +137,7 @@ static bool cg3_update_display(void *opaque) } } else { if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } pix += width; @@ -146,7 +146,7 @@ static bool cg3_update_display(void *opaque) } s->full_update = 0; if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { @@ -311,7 +311,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); - s->con = graphic_console_init(dev, 0, &cg3_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &cg3_ops, s); qemu_console_resize(s->con, s->width, s->height); } diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c index 48be3c8a932..0a8c74e1374 100644 --- a/hw/display/cirrus_vga.c +++ b/hw/display/cirrus_vga.c @@ -779,9 +779,9 @@ static int cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h) s->cirrus_blt_width, s->cirrus_blt_height); if (notify) { - dpy_gfx_update(s->vga.con, dx, dy, - s->cirrus_blt_width / depth, - s->cirrus_blt_height); + qemu_console_update(s->vga.con, dx, dy, + s->cirrus_blt_width / depth, + s->cirrus_blt_height); } /* we don't have to notify the display that this portion has @@ -2964,7 +2964,7 @@ static void pci_cirrus_vga_realize(PCIDevice *dev, Error **errp) } cirrus_init_common(s, OBJECT(dev), device_id, 1, pci_address_space(dev), pci_address_space_io(dev)); - s->vga.con = graphic_console_init(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, s->vga.hw_ops, &s->vga); /* setup PCI */ memory_region_init(&s->pci_bar, OBJECT(dev), "cirrus-pci-bar0", 0x2000000); diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c index 76034a88605..b8052d1d8ed 100644 --- a/hw/display/cirrus_vga_isa.c +++ b/hw/display/cirrus_vga_isa.c @@ -62,7 +62,7 @@ static void isa_cirrus_vga_realizefn(DeviceState *dev, Error **errp) cirrus_init_common(&d->cirrus_vga, OBJECT(dev), CIRRUS_ID_CLGD5430, 0, isa_address_space(isadev), isa_address_space_io(isadev)); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); rom_add_vga(VGABIOS_CIRRUS_FILENAME); /* XXX ISA-LFB support */ /* FIXME not qdev yet */ diff --git a/hw/display/dm163.c b/hw/display/dm163.c index 9ea62cb4f76..afade0b98c3 100644 --- a/hw/display/dm163.c +++ b/hw/display/dm163.c @@ -277,8 +277,8 @@ static uint32_t *update_display_of_row(DM163State *s, uint32_t *dest, } } - dpy_gfx_update(s->console, 0, LED_SQUARE_SIZE * row, - RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); + qemu_console_update(s->console, 0, LED_SQUARE_SIZE * row, + RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, LED_SQUARE_SIZE); s->redraw &= ~(1 << row); trace_dm163_redraw(s->redraw); @@ -322,7 +322,7 @@ static void dm163_realize(DeviceState *dev, Error **errp) qdev_init_gpio_in(dev, dm163_en_b_gpio_handler, 1); qdev_init_gpio_out_named(dev, &s->sout, "sout", 1); - s->console = graphic_console_init(dev, 0, &dm163_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &dm163_ops, s); qemu_console_resize(s->console, RGB_MATRIX_NUM_COLS * LED_SQUARE_SIZE, RGB_MATRIX_NUM_ROWS * LED_SQUARE_SIZE); } diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c index a91f04aaf79..5133623ee2e 100644 --- a/hw/display/exynos4210_fimd.c +++ b/hw/display/exynos4210_fimd.c @@ -1340,7 +1340,7 @@ static bool exynos4210_fimd_update(void *opaque) fimd_copy_line_toqemu(global_width, s->ifb + global_width * line * RGBA_SIZE, d + global_width * line * bpp); } - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); } s->invalidate = false; s->vidintcon[1] |= FIMD_VIDINT_INTFRMPEND; @@ -1964,7 +1964,7 @@ static void exynos4210_fimd_realize(DeviceState *dev, Error **errp) return; } - s->console = graphic_console_init(dev, 0, &exynos4210_fimd_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &exynos4210_fimd_ops, s); } static void exynos4210_fimd_class_init(ObjectClass *klass, const void *data) diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c index bd15f6f0acc..af54f1f9005 100644 --- a/hw/display/g364fb.c +++ b/hw/display/g364fb.c @@ -191,8 +191,8 @@ static void g364fb_draw_graphic8(G364State *s) } else { int dy; if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, - xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, + xmax - xmin + 1, ymax - ymin + 1); xmin = s->width; xmax = 0; ymin = s->height; @@ -211,7 +211,7 @@ static void g364fb_draw_graphic8(G364State *s) done: if (xmax || ymax) { - dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); + qemu_console_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1); } g_free(snap); } @@ -234,7 +234,7 @@ static void g364fb_draw_blank(G364State *s) d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->blanked = 1; } @@ -478,7 +478,7 @@ static const GraphicHwOps g364fb_ops = { static void g364fb_init(DeviceState *dev, G364State *s) { - s->con = graphic_console_init(dev, 0, &g364fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &g364fb_ops, s); memory_region_init_io(&s->mem_ctrl, OBJECT(dev), &g364fb_ctrl_ops, s, "ctrl", 0x180000); diff --git a/hw/display/imx6ul_lcdif.c b/hw/display/imx6ul_lcdif.c index afcd0805ca4..7b5be2b5a75 100644 --- a/hw/display/imx6ul_lcdif.c +++ b/hw/display/imx6ul_lcdif.c @@ -203,7 +203,7 @@ static bool imx6ul_lcdif_update_display(void *opaque) src_width, surface_stride(surface), 0, s->invalidate, fn, s, &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, width, last - first + 1); + qemu_console_update(s->con, 0, first, width, last - first + 1); } s->invalidate = false; @@ -301,7 +301,7 @@ static void imx6ul_lcdif_write(void *opaque, hwaddr offset, if (!FIELD_EX32(oldv, CTRL, RUN) && FIELD_EX32(s->regs[idx], CTRL, RUN)) { s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); imx6ul_lcdif_maybe_schedule_frame(s); break; } @@ -318,17 +318,17 @@ static void imx6ul_lcdif_write(void *opaque, hwaddr offset, break; case A_V4_TRANSFER_COUNT: s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); break; case A_V4_CUR_BUF: s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); break; case A_V4_NEXT_BUF: s->regs[IMX6UL_LCDIF_REG_V4_CUR_BUF] = s->regs[idx]; imx6ul_lcdif_frame_done(s); s->invalidate = true; - graphic_hw_invalidate(s->con); + qemu_console_hw_invalidate(s->con); imx6ul_lcdif_maybe_schedule_frame(s); return; case A_AS_NEXT_BUF: @@ -411,7 +411,7 @@ static void imx6ul_lcdif_realize(DeviceState *dev, Error **errp) TYPE_IMX6UL_LCDIF, LCDIF_MMIO_SIZE); sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->iomem); sysbus_init_irq(SYS_BUS_DEVICE(dev), &s->irq); - s->con = graphic_console_init(dev, 0, &imx6ul_lcdif_graphic_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &imx6ul_lcdif_graphic_ops, s); } static void imx6ul_lcdif_unrealize(DeviceState *dev) @@ -423,7 +423,7 @@ static void imx6ul_lcdif_unrealize(DeviceState *dev) s->frame_timer = NULL; if (s->con) { - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); s->con = NULL; } } diff --git a/hw/display/jazz_led.c b/hw/display/jazz_led.c index ee9758a94b5..84fe1058406 100644 --- a/hw/display/jazz_led.c +++ b/hw/display/jazz_led.c @@ -217,7 +217,7 @@ static bool jazz_led_update_display(void *opaque) } s->state = REDRAW_NONE; - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); return true; } @@ -233,7 +233,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) LedState *s = opaque; char buf[3]; - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); qemu_console_resize(s->con, 2, 1); /* TODO: draw the segments */ @@ -243,7 +243,7 @@ static void jazz_led_text_update(void *opaque, uint32_t *chardata) *chardata++ = ATTR2CHTYPE(buf[1], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, 2, 1); + qemu_console_text_update(s->con, 0, 0, 2, 1); } static int jazz_led_post_load(void *opaque, int version_id) @@ -284,7 +284,7 @@ static void jazz_led_realize(DeviceState *dev, Error **errp) { LedState *s = JAZZ_LED(dev); - s->con = graphic_console_init(dev, 0, &jazz_led_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &jazz_led_ops, s); } static void jazz_led_reset(DeviceState *d) diff --git a/hw/display/macfb.c b/hw/display/macfb.c index 848c3c282bd..f40a7ed9f52 100644 --- a/hw/display/macfb.c +++ b/hw/display/macfb.c @@ -320,14 +320,14 @@ static void macfb_draw_graphic(MacfbState *s) } } else { if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); ymin = -1; } } } if (ymin >= 0) { - dpy_gfx_update(s->con, 0, ymin, s->width, y - ymin); + qemu_console_update(s->con, 0, ymin, s->width, y - ymin); } g_free(snap); @@ -671,7 +671,7 @@ static bool macfb_common_realize(DeviceState *dev, MacfbState *s, Error **errp) s->regs[DAFB_MODE_CTRL1 >> 2] = s->mode->mode_ctrl1; s->regs[DAFB_MODE_CTRL2 >> 2] = s->mode->mode_ctrl2; - s->con = graphic_console_init(dev, 0, &macfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &macfb_ops, s); surface = qemu_console_surface(s->con); if (surface_bits_per_pixel(surface) != 32) { diff --git a/hw/display/next-fb.c b/hw/display/next-fb.c index e758b223ef7..fa2e0d0da80 100644 --- a/hw/display/next-fb.c +++ b/hw/display/next-fb.c @@ -89,7 +89,7 @@ static bool nextfb_update(void *opaque) src_width, dest_width, 0, 1, nextfb_draw_line, s, &first, &last); - dpy_gfx_update(s->con, 0, 0, s->cols, s->rows); + qemu_console_update(s->con, 0, 0, s->cols, s->rows); return true; } @@ -117,7 +117,7 @@ static void nextfb_realize(DeviceState *dev, Error **errp) s->cols = 1120; s->rows = 832; - s->con = graphic_console_init(dev, 0, &nextfb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &nextfb_ops, s); qemu_console_resize(s->con, s->cols, s->rows); } diff --git a/hw/display/omap_lcdc.c b/hw/display/omap_lcdc.c index 1e8385ebffb..2a8d5ffdd57 100644 --- a/hw/display/omap_lcdc.c +++ b/hw/display/omap_lcdc.c @@ -320,7 +320,7 @@ static bool omap_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1); + qemu_console_update(omap_lcd->con, 0, first, width, last - first + 1); } omap_lcd->invalidate = 0; @@ -504,7 +504,7 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem, memory_region_init_io(&s->iomem, NULL, &omap_lcdc_ops, s, "omap.lcdc", 0x100); memory_region_add_subregion(sysmem, base, &s->iomem); - s->con = graphic_console_init(NULL, 0, &omap_ops, s); + s->con = qemu_graphic_console_create(NULL, 0, &omap_ops, s); return s; } diff --git a/hw/display/pl110.c b/hw/display/pl110.c index e134ac28eb6..4a93cf4cda9 100644 --- a/hw/display/pl110.c +++ b/hw/display/pl110.c @@ -303,7 +303,7 @@ static bool pl110_update_display(void *opaque) &first, &last); if (first >= 0) { - dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1); + qemu_console_update(s->con, 0, first, s->cols, last - first + 1); } s->invalidate = 0; return true; @@ -557,7 +557,7 @@ static void pl110_realize(DeviceState *dev, Error **errp) s->vblank_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, pl110_vblank_interrupt, s); qdev_init_gpio_in(dev, pl110_mux_ctrl_set, 1); - s->con = graphic_console_init(dev, 0, &pl110_gfx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &pl110_gfx_ops, s); } static void pl110_init(Object *obj) diff --git a/hw/display/qxl-render.c b/hw/display/qxl-render.c index 5b4f8842011..7b692d5a854 100644 --- a/hw/display/qxl-render.c +++ b/hw/display/qxl-render.c @@ -135,7 +135,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) (width, height); } - dpy_gfx_replace_surface(vga->con, surface); + qemu_console_set_surface(vga->con, surface); } if (!qxl->guest_primary.data) { @@ -154,16 +154,16 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl) continue; } qxl_blit(qxl, qxl->dirty+i); - dpy_gfx_update(vga->con, - qxl->dirty[i].left, qxl->dirty[i].top, - qxl->dirty[i].right - qxl->dirty[i].left, - qxl->dirty[i].bottom - qxl->dirty[i].top); + qemu_console_update(vga->con, + qxl->dirty[i].left, qxl->dirty[i].top, + qxl->dirty[i].right - qxl->dirty[i].left, + qxl->dirty[i].bottom - qxl->dirty[i].top); } qxl->num_dirty_rects = 0; end: if (qxl->render_update_cookie_num == 0) { - graphic_hw_update_done(qxl->ssd.dcl.con); + qemu_console_hw_update_done(qxl->ssd.dcl.con); } } diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 4244ebe51d2..74258afa582 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -1153,13 +1153,13 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d) } trace_qxl_enter_vga_mode(d->id); spice_qxl_driver_unload(&d->ssd.qxl); - graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, d->vga.hw_ops, &d->vga); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_DEFAULT); qemu_spice_create_host_primary(&d->ssd); d->mode = QXL_MODE_VGA; qemu_spice_display_switch(&d->ssd, d->ssd.ds); vga_dirty_log_start(&d->vga); - graphic_hw_update(d->vga.con); + qemu_console_hw_update(d->vga.con); } static void qxl_exit_vga_mode(PCIQXLDevice *d) @@ -1168,8 +1168,8 @@ static void qxl_exit_vga_mode(PCIQXLDevice *d) return; } trace_qxl_exit_vga_mode(d->id); - graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); - update_displaychangelistener(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); + qemu_graphic_console_set_hwops(d->ssd.dcl.con, &qxl_ops, d); + qemu_console_listener_set_refresh(&d->ssd.dcl, GUI_REFRESH_INTERVAL_IDLE); vga_dirty_log_stop(&d->vga); qxl_destroy_primary(d, QXL_SYNC); } @@ -2237,7 +2237,7 @@ static void qxl_realize_primary(PCIDevice *dev, Error **errp) portio_list_add(&qxl->vga_port_list, pci_address_space_io(dev), 0x3b0); qxl->have_vga = true; - vga->con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + vga->con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->id = qemu_console_get_index(vga->con); /* == channel_id */ if (qxl->id != 0) { error_setg(errp, "primary qxl-vga device must be console 0 " @@ -2262,7 +2262,7 @@ static void qxl_realize_secondary(PCIDevice *dev, Error **errp) memory_region_init_ram(&qxl->vga.vram, OBJECT(dev), "qxl.vgavram", qxl->vga.vram_size, &error_fatal); qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram); - qxl->vga.con = graphic_console_init(DEVICE(dev), 0, &qxl_ops, qxl); + qxl->vga.con = qemu_graphic_console_create(DEVICE(dev), 0, &qxl_ops, qxl); qxl->ssd.dcl.con = qxl->vga.con; qxl->id = qemu_console_get_index(qxl->vga.con); /* == channel_id */ diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c index 27f0ba19f90..8e8ba37514a 100644 --- a/hw/display/ramfb-standalone.c +++ b/hw/display/ramfb-standalone.c @@ -41,7 +41,7 @@ static void ramfb_realizefn(DeviceState *dev, Error **errp) { RAMFBStandaloneState *ramfb = RAMFB(dev); - ramfb->con = graphic_console_init(dev, 0, &wrapper_ops, dev); + ramfb->con = qemu_graphic_console_create(dev, 0, &wrapper_ops, dev); ramfb->state = ramfb_setup(ramfb->use_legacy_x86_rom, errp); } diff --git a/hw/display/ramfb.c b/hw/display/ramfb.c index 50c25706a52..7a88f934e11 100644 --- a/hw/display/ramfb.c +++ b/hw/display/ramfb.c @@ -111,12 +111,12 @@ void ramfb_display_update(QemuConsole *con, RAMFBState *s) } if (s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); s->ds = NULL; } /* simple full screen update */ - dpy_gfx_update_full(con); + qemu_console_update_full(con); } static int ramfb_post_load(void *opaque, int version_id) diff --git a/hw/display/sm501.c b/hw/display/sm501.c index a3993ceba29..af870048372 100644 --- a/hw/display/sm501.c +++ b/hw/display/sm501.c @@ -1822,7 +1822,7 @@ static bool sm501_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); y_start = -1; } } @@ -1831,7 +1831,7 @@ static bool sm501_update_display(void *opaque) /* complete flush to display */ if (y_start >= 0) { - dpy_gfx_update(s->con, 0, y_start, width, y - y_start); + qemu_console_update(s->con, 0, y_start, width, y - y_start); } return true; @@ -1936,7 +1936,7 @@ static void sm501_init(SM501State *s, DeviceState *dev, &s->twoD_engine_region); /* create qemu graphic console */ - s->con = graphic_console_init(dev, 0, &sm501_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &sm501_ops, s); } static const VMStateDescription vmstate_sm501_state = { diff --git a/hw/display/ssd0303.c b/hw/display/ssd0303.c index 229856cc427..4e3dede33f1 100644 --- a/hw/display/ssd0303.c +++ b/hw/display/ssd0303.c @@ -268,7 +268,7 @@ static bool ssd0303_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY); return true; } @@ -309,7 +309,7 @@ static void ssd0303_realize(DeviceState *dev, Error **errp) { ssd0303_state *s = SSD0303(dev); - s->con = graphic_console_init(dev, 0, &ssd0303_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0303_ops, s); qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY); } diff --git a/hw/display/ssd0323.c b/hw/display/ssd0323.c index 67db16086c8..9309d4d10c4 100644 --- a/hw/display/ssd0323.c +++ b/hw/display/ssd0323.c @@ -270,7 +270,8 @@ static bool ssd0323_update_display(void *opaque) } } s->redraw = 0; - dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + qemu_console_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY); + return true; } @@ -356,7 +357,7 @@ static void ssd0323_realize(SSIPeripheral *d, Error **errp) s->col_end = 63; s->row_end = 79; - s->con = graphic_console_init(dev, 0, &ssd0323_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &ssd0323_ops, s); qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY); qdev_init_gpio_in(dev, ssd0323_cd, 1); diff --git a/hw/display/tcx.c b/hw/display/tcx.c index cedbf5c7acd..2c33a9c4a32 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -243,8 +243,7 @@ static bool tcx_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -253,8 +252,7 @@ static bool tcx_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -297,8 +295,7 @@ static bool tcx24_update_display(void *opaque) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); y_start = -1; } } @@ -309,8 +306,7 @@ static bool tcx24_update_display(void *opaque) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(ts->con, 0, y_start, - ts->width, y - y_start); + qemu_console_update(ts->con, 0, y_start, ts->width, y - y_start); } g_free(snap); return true; @@ -864,9 +860,9 @@ static void tcx_realize(DeviceState *dev, Error **errp) sysbus_init_irq(sbd, &s->irq); if (s->depth == 8) { - s->con = graphic_console_init(dev, 0, &tcx_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx_ops, s); } else { - s->con = graphic_console_init(dev, 0, &tcx24_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &tcx24_ops, s); } s->thcmisc = 0; diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c index 5f55c884a1b..2cccb0ef12e 100644 --- a/hw/display/vga-isa.c +++ b/hw/display/vga-isa.c @@ -79,7 +79,7 @@ static void vga_isa_realizefn(DeviceState *dev, Error **errp) 0x000a0000, vga_io_memory, 1); memory_region_set_coalescing(vga_io_memory); - s->con = graphic_console_init(dev, 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(dev, 0, s->hw_ops, s); memory_region_add_subregion(isa_address_space(isadev), VBE_DISPI_LFB_PHYSICAL_ADDRESS, diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c index 1a9608d865f..3cd64951c09 100644 --- a/hw/display/vga-mmio.c +++ b/hw/display/vga-mmio.c @@ -108,7 +108,7 @@ static void vga_mmio_realizefn(DeviceState *dev, Error **errp) } sysbus_init_mmio(sbd, &s->vga.vram); - s->vga.con = graphic_console_init(dev, 0, s->vga.hw_ops, &s->vga); + s->vga.con = qemu_graphic_console_create(dev, 0, s->vga.hw_ops, &s->vga); } static const Property vga_mmio_properties[] = { diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c index 4e68dd57a17..d089847bdae 100644 --- a/hw/display/vga-pci.c +++ b/hw/display/vga-pci.c @@ -247,7 +247,7 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp) vga_init(s, OBJECT(dev), pci_address_space(dev), pci_address_space_io(dev), true); - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* XXX: VGA_RAM_SIZE must be a power of two */ pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram); @@ -282,7 +282,7 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp) if (!vga_common_init(s, OBJECT(dev), errp)) { return; } - s->con = graphic_console_init(DEVICE(dev), 0, s->hw_ops, s); + s->con = qemu_graphic_console_create(DEVICE(dev), 0, s->hw_ops, s); /* mmio bar */ memory_region_init_io(&d->mmio, OBJECT(dev), &unassigned_io_ops, NULL, @@ -306,7 +306,7 @@ static void pci_secondary_vga_exit(PCIDevice *dev) PCIVGAState *d = PCI_VGA(dev); VGACommonState *s = &d->vga; - graphic_console_close(s->con); + qemu_graphic_console_close(s->con); memory_region_del_subregion(&d->mmio, &d->mrs[0]); memory_region_del_subregion(&d->mmio, &d->mrs[1]); if (d->flags & (1 << PCI_VGA_FLAG_ENABLE_QEXT)) { diff --git a/hw/display/vga.c b/hw/display/vga.c index 2f266f47a39..0ac4bf37310 100644 --- a/hw/display/vga.c +++ b/hw/display/vga.c @@ -1246,7 +1246,7 @@ static void vga_draw_text(VGACommonState *s, int full_update) s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); surface = qemu_console_surface(s->con); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1365,8 +1365,8 @@ static void vga_draw_text(VGACommonState *s, int full_update) ch_attr_ptr++; } if (cx_max != -1) { - dpy_gfx_update(s->con, cx_min * cw, cy * cheight, - (cx_max - cx_min + 1) * cw, cheight); + qemu_console_update(s->con, cx_min * cw, cy * cheight, + (cx_max - cx_min + 1) * cw, cheight); } dest += linesize * cheight; line1 = line + cheight; @@ -1610,7 +1610,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) */ format = qemu_default_pixman_format(depth, !byteswap); if (format) { - allocate_surface = !dpy_gfx_check_format(s->con, format) + allocate_surface = !qemu_console_check_format(s->con, format) || s->force_shadow || force_shadow; } else { allocate_surface = true; @@ -1647,7 +1647,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) surface = qemu_create_displaysurface_from(disp_width, height, format, s->params.line_offset, s->vram_ptr + (s->params.start_addr * 4)); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } else { qemu_console_resize(s->con, disp_width, height); surface = qemu_console_surface(s->con); @@ -1720,8 +1720,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } else { if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); y_start = -1; } } @@ -1745,8 +1744,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update) } if (y_start >= 0) { /* flush to display */ - dpy_gfx_update(s->con, 0, y_start, - disp_width, y - y_start); + qemu_console_update(s->con, 0, y_start, disp_width, y - y_start); } g_free(snap); memset(s->invalidated_y_table, 0, sizeof(s->invalidated_y_table)); @@ -1767,7 +1765,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) /* unshare buffer, otherwise the blanking corrupts vga vram */ surface = qemu_create_displaysurface(s->last_scr_width, s->last_scr_height); - dpy_gfx_replace_surface(s->con, surface); + qemu_console_set_surface(s->con, surface); } w = s->last_scr_width * surface_bytes_per_pixel(surface); @@ -1776,7 +1774,7 @@ static void vga_draw_blank(VGACommonState *s, int full_update) memset(d, 0, w); d += surface_stride(surface); } - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); } #define GMODE_TEXT 0 @@ -1967,7 +1965,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->last_scr_width = width * cw; s->last_scr_height = height * cheight; qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height); - dpy_text_resize(s->con, width, height); + qemu_console_text_resize(s->con, width, height); s->last_depth = 0; s->last_width = width; s->last_height = height; @@ -1992,11 +1990,11 @@ static void vga_update_text(void *opaque, uint32_t *chardata) s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) { cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20); if (cursor_visible && cursor_offset < size && cursor_offset >= 0) - dpy_text_cursor(s->con, - TEXTMODE_X(cursor_offset), - TEXTMODE_Y(cursor_offset)); + qemu_console_text_set_cursor(s->con, + TEXTMODE_X(cursor_offset), + TEXTMODE_Y(cursor_offset)); else - dpy_text_cursor(s->con, -1, -1); + qemu_console_text_set_cursor(s->con, -1, -1); s->cursor_offset = cursor_offset; s->cursor_start = s->cr[VGA_CRTC_CURSOR_START]; s->cursor_end = s->cr[VGA_CRTC_CURSOR_END]; @@ -2009,7 +2007,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) for (i = 0; i < size; src ++, dst ++, i ++) *dst = VMEM2CHTYPE(le32_to_cpu(*src)); - dpy_text_update(s->con, 0, 0, width, height); + qemu_console_text_update(s->con, 0, 0, width, height); } else { c_max = 0; @@ -2032,7 +2030,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) if (c_min <= c_max) { i = TEXTMODE_Y(c_min); - dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); + qemu_console_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1); } } @@ -2057,8 +2055,8 @@ static void vga_update_text(void *opaque, uint32_t *chardata) /* Display a message */ s->last_width = 60; s->last_height = height = 3; - dpy_text_cursor(s->con, -1, -1); - dpy_text_resize(s->con, s->last_width, height); + qemu_console_text_set_cursor(s->con, -1, -1); + qemu_console_text_resize(s->con, s->last_width, height); for (dst = chardata, i = 0; i < s->last_width * height; i ++) *dst++ = ' '; @@ -2070,7 +2068,7 @@ static void vga_update_text(void *opaque, uint32_t *chardata) *dst++ = ATTR2CHTYPE(msg_buffer[i], QEMU_COLOR_BLUE, QEMU_COLOR_BLACK, 1); - dpy_text_update(s->con, 0, 0, s->last_width, height); + qemu_console_text_update(s->con, 0, 0, s->last_width, height); } static uint64_t vga_mem_read(void *opaque, hwaddr addr, diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c index 3f6fb7a8033..6e5e6540a46 100644 --- a/hw/display/vhost-user-gpu.c +++ b/hw/display/vhost-user-gpu.c @@ -142,11 +142,11 @@ vhost_user_gpu_handle_cursor(VhostUserGPU *g, VhostUserGpuMsg *msg) memcpy(s->current_cursor->data, up->data, 64 * 64 * sizeof(uint32_t)); - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); } - dpy_mouse_set(s->con, pos->x, pos->y, - msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); + qemu_console_set_mouse(s->con, pos->x, pos->y, + msg->request != VHOST_USER_GPU_CURSOR_POS_HIDE); } static void @@ -238,7 +238,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) con = s->con; if (m->width == 0) { - dpy_gfx_replace_surface(con, NULL); + qemu_console_set_surface(con, NULL); } else { s->ds = qemu_create_displaysurface(m->width, m->height); /* replace surface on next update */ @@ -269,12 +269,12 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) if (dmabuf) { qemu_dmabuf_close(dmabuf); - dpy_gl_release_dmabuf(con, dmabuf); + qemu_console_gl_release_dmabuf(con, dmabuf); g_clear_pointer(&dmabuf, qemu_dmabuf_free); } if (fd == -1) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); g->dmabuf[m->scanout_id] = NULL; break; } @@ -291,7 +291,7 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) &fd, 1, false, m->fd_flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP); - dpy_gl_scanout_dmabuf(con, dmabuf); + qemu_console_gl_scanout_dmabuf(con, dmabuf); g->dmabuf[m->scanout_id] = dmabuf; break; } @@ -306,13 +306,13 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) } con = g->parent_obj.scanout[m->scanout_id].con; - if (!console_has_gl(con)) { + if (!qemu_console_has_gl(con)) { error_report("console doesn't support GL!"); vhost_user_gpu_unblock(g); break; } g->backend_blocked = true; - dpy_gl_update(con, m->x, m->y, m->width, m->height); + qemu_console_gl_update(con, m->x, m->y, m->width, m->height); break; } #ifdef CONFIG_PIXMAN @@ -337,9 +337,9 @@ vhost_user_gpu_handle_display(VhostUserGPU *g, VhostUserGpuMsg *msg) pixman_image_unref(image); if (qemu_console_surface(con) != s->ds) { - dpy_gfx_replace_surface(con, s->ds); + qemu_console_set_surface(con, s->ds); } else { - dpy_gfx_update(con, m->x, m->y, m->width, m->height); + qemu_console_update(con, m->x, m->y, m->width, m->height); } break; } diff --git a/hw/display/virtio-gpu-base.c b/hw/display/virtio-gpu-base.c index bdc24492850..a68b1848295 100644 --- a/hw/display/virtio-gpu-base.c +++ b/hw/display/virtio-gpu-base.c @@ -253,7 +253,7 @@ virtio_gpu_base_device_realize(DeviceState *qdev, g->hw_ops = &virtio_gpu_ops; for (i = 0; i < g->conf.max_outputs; i++) { g->scanout[i].con = - graphic_console_init(DEVICE(g), i, &virtio_gpu_ops, g); + qemu_graphic_console_create(DEVICE(g), i, &virtio_gpu_ops, g); } return true; diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c index ebb6c783fb0..6ff12639012 100644 --- a/hw/display/virtio-gpu-rutabaga.c +++ b/hw/display/virtio-gpu-rutabaga.c @@ -282,7 +282,7 @@ rutabaga_cmd_resource_flush(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) rf.resource_id, &transfer, &transfer_iovec); CHECK(!result, cmd); - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); } static void @@ -306,8 +306,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) scanout = &vb->scanout[ss.scanout_id]; if (ss.resource_id == 0) { - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gl_scanout_disable(scanout->con); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_gl_scanout_disable(scanout->con); return; } @@ -331,8 +331,8 @@ rutabaga_cmd_set_scanout(VirtIOGPU *g, struct virtio_gpu_ctrl_command *cmd) /* realloc the surface ptr */ scanout->ds = qemu_create_displaysurface_pixman(res->image); - dpy_gfx_replace_surface(scanout->con, NULL); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, scanout->ds); res->scanout_bitmask = ss.scanout_id; } diff --git a/hw/display/virtio-gpu-udmabuf.c b/hw/display/virtio-gpu-udmabuf.c index 74b6a7766af..d5ac1cfca0e 100644 --- a/hw/display/virtio-gpu-udmabuf.c +++ b/hw/display/virtio-gpu-udmabuf.c @@ -156,7 +156,7 @@ static void virtio_gpu_free_dmabuf(VirtIOGPU *g, VGPUDMABuf *dmabuf) struct virtio_gpu_scanout *scanout; scanout = &g->parent_obj.scanout[dmabuf->scanout_id]; - dpy_gl_release_dmabuf(scanout->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(scanout->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); QTAILQ_REMOVE(&g->dmabuf.bufs, dmabuf, next); g_free(dmabuf); @@ -232,7 +232,7 @@ int virtio_gpu_update_dmabuf(VirtIOGPU *g, height = qemu_dmabuf_get_height(new_primary->buf); g->dmabuf.primary[scanout_id] = new_primary; qemu_console_resize(scanout->con, width, height); - dpy_gl_scanout_dmabuf(scanout->con, new_primary->buf); + qemu_console_gl_scanout_dmabuf(scanout->con, new_primary->buf); if (old_primary) { virtio_gpu_free_dmabuf(g, old_primary); diff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c index add85bd4e61..60c78af06a4 100644 --- a/hw/display/virtio-gpu-virgl.c +++ b/hw/display/virtio-gpu-virgl.c @@ -521,7 +521,7 @@ static void virtio_gpu_rect_update(VirtIOGPU *g, int idx, int x, int y, return; } - dpy_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); + qemu_console_gl_update(g->parent_obj.scanout[idx].con, x, y, width, height); } static void virgl_cmd_resource_flush(VirtIOGPU *g, @@ -584,16 +584,15 @@ static void virgl_cmd_set_scanout(VirtIOGPU *g, qemu_console_resize(g->parent_obj.scanout[ss.scanout_id].con, ss.r.width, ss.r.height); virgl_renderer_force_ctx_0(); - dpy_gl_scanout_texture( + qemu_console_gl_scanout_texture( g->parent_obj.scanout[ss.scanout_id].con, info.tex_id, info.flags & VIRTIO_GPU_RESOURCE_FLAG_Y_0_TOP, info.width, info.height, ss.r.x, ss.r.y, ss.r.width, ss.r.height, d3d_tex2d); } else { - dpy_gfx_replace_surface( - g->parent_obj.scanout[ss.scanout_id].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); + qemu_console_set_surface(g->parent_obj.scanout[ss.scanout_id].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[ss.scanout_id].con); } g->parent_obj.scanout[ss.scanout_id].resource_id = ss.resource_id; } @@ -1315,7 +1314,7 @@ virgl_create_context(void *opaque, int scanout_idx, qparams.major_ver = params->major_ver; qparams.minor_ver = params->minor_ver; - ctx = dpy_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); + ctx = qemu_console_gl_ctx_create(g->parent_obj.scanout[scanout_idx].con, &qparams); return (virgl_renderer_gl_context)ctx; } @@ -1324,7 +1323,7 @@ static void virgl_destroy_context(void *opaque, virgl_renderer_gl_context ctx) VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - dpy_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); + qemu_console_gl_ctx_destroy(g->parent_obj.scanout[0].con, qctx); } static int virgl_make_context_current(void *opaque, int scanout_idx, @@ -1333,8 +1332,7 @@ static int virgl_make_context_current(void *opaque, int scanout_idx, VirtIOGPU *g = opaque; QEMUGLContext qctx = (QEMUGLContext)ctx; - return dpy_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, - qctx); + return qemu_console_gl_ctx_make_current(g->parent_obj.scanout[scanout_idx].con, qctx); } static struct virgl_renderer_callbacks virtio_gpu_3d_cbs = { @@ -1399,8 +1397,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g) int i; for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); - dpy_gl_scanout_disable(g->parent_obj.scanout[i].con); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_gl_scanout_disable(g->parent_obj.scanout[i].con); } } diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index dbb72bbb22d..88526051a99 100644 --- a/hw/display/virtio-gpu.c +++ b/hw/display/virtio-gpu.c @@ -103,14 +103,14 @@ static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor) if (cursor->resource_id > 0) { vgc->update_cursor_data(g, s, cursor->resource_id); } - dpy_cursor_define(s->con, s->current_cursor); + qemu_console_set_cursor(s->con, s->current_cursor); s->cursor = *cursor; } else { s->cursor.pos.x = cursor->pos.x; s->cursor.pos.y = cursor->pos.y; } - dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); + qemu_console_set_mouse(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id); } struct virtio_gpu_simple_resource * @@ -390,7 +390,7 @@ void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id) res->scanout_bitmask &= ~(1 << scanout_id); } - dpy_gfx_replace_surface(scanout->con, NULL); + qemu_console_set_surface(scanout->con, NULL); scanout->resource_id = 0; scanout->ds = NULL; scanout->width = 0; @@ -531,8 +531,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, rf.r.y + rf.r.height >= scanout->y) { within_bounds = true; - if (console_has_gl(scanout->con)) { - dpy_gl_update(scanout->con, 0, 0, scanout->width, + if (qemu_console_has_gl(scanout->con)) { + qemu_console_gl_update(scanout->con, 0, 0, scanout->width, scanout->height); update_submitted = true; } @@ -582,8 +582,8 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g, /* work out the area we need to update for each console */ if (qemu_rect_intersect(&flush_rect, &rect, &rect)) { qemu_rect_translate(&rect, -scanout->x, -scanout->y); - dpy_gfx_update(g->parent_obj.scanout[i].con, - rect.x, rect.y, rect.width, rect.height); + qemu_console_update(g->parent_obj.scanout[i].con, + rect.x, rect.y, rect.width, rect.height); } } } @@ -649,7 +649,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, g->parent_obj.enable = 1; if (res->blob) { - if (console_has_gl(scanout->con)) { + if (qemu_console_has_gl(scanout->con)) { if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb, r)) { virtio_gpu_update_scanout(g, scanout_id, res, fb, r); } else { @@ -665,7 +665,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, } /* create a surface for this scanout */ - if ((res->blob && !console_has_gl(scanout->con)) || + if ((res->blob && !qemu_console_has_gl(scanout->con)) || !scanout->ds || surface_data(scanout->ds) != data + fb->offset || scanout->width != r->width || @@ -686,7 +686,7 @@ static bool virtio_gpu_do_set_scanout(VirtIOGPU *g, qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, fb->offset); pixman_image_unref(rect); - dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con, + qemu_console_set_surface(g->parent_obj.scanout[scanout_id].con, scanout->ds); } @@ -1483,10 +1483,10 @@ static int virtio_gpu_post_load(void *opaque, int version_id) } scanout->ds = qemu_create_displaysurface_pixman(res->image); qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, 0); - dpy_gfx_replace_surface(scanout->con, scanout->ds); + qemu_console_set_surface(scanout->con, scanout->ds); } - dpy_gfx_update_full(scanout->con); + qemu_console_update_full(scanout->con); if (scanout->cursor.resource_id) { update_cursor(g, &scanout->cursor); } @@ -1602,7 +1602,7 @@ static void virtio_gpu_reset_bh(void *opaque) } for (i = 0; i < g->parent_obj.conf.max_outputs; i++) { - dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL); + qemu_console_set_surface(g->parent_obj.scanout[i].con, NULL); } g->reset_finished = true; diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c index efd4858f3d0..2ae649c91ae 100644 --- a/hw/display/virtio-vga.c +++ b/hw/display/virtio-vga.c @@ -172,7 +172,7 @@ static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp) vvga->vga_mrs, true, false); vga->con = g->scanout[0].con; - graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); + qemu_graphic_console_set_hwops(vga->con, &virtio_vga_base_ops, vvga); for (i = 0; i < g->conf.max_outputs; i++) { object_property_set_link(OBJECT(g->scanout[i].con), "device", diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c index 11f13c98d7a..f6f9edfd1d9 100644 --- a/hw/display/vmware_vga.c +++ b/hw/display/vmware_vga.c @@ -378,7 +378,7 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s, for (line = h; line > 0; line--, src += bypl, dst += bypl) { memcpy(dst, src, width); } - dpy_gfx_update(s->vga.con, x, y, w, h); + qemu_console_update(s->vga.con, x, y, w, h); } static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s) @@ -554,7 +554,7 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s, qc = cursor_builtin_left_ptr(); } - dpy_cursor_define(s->vga.con, qc); + qemu_console_set_cursor(s->vga.con, qc); cursor_unref(qc); } #endif @@ -1082,7 +1082,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value) s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE); #ifdef HW_MOUSE_ACCEL if (value <= SVGA_CURSOR_ON_SHOW) { - dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); + qemu_console_set_mouse(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on); } #endif break; @@ -1130,7 +1130,7 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s) surface = qemu_create_displaysurface_from(s->new_width, s->new_height, format, stride, s->vga.vram_ptr); - dpy_gfx_replace_surface(s->vga.con, surface); + qemu_console_set_surface(s->vga.con, surface); s->invalidated = 1; } } @@ -1151,7 +1151,7 @@ static bool vmsvga_update_display(void *opaque) if (s->invalidated) { s->invalidated = 0; - dpy_gfx_update_full(s->vga.con); + qemu_console_update_full(s->vga.con); } return true; @@ -1254,7 +1254,7 @@ static void vmsvga_init(DeviceState *dev, struct vmsvga_state_s *s, s->scratch_size = SVGA_SCRATCH_SIZE; s->scratch = g_malloc(s->scratch_size * 4); - s->vga.con = graphic_console_init(dev, 0, &vmsvga_ops, s); + s->vga.con = qemu_graphic_console_create(dev, 0, &vmsvga_ops, s); s->fifo_size = SVGA_FIFO_SIZE; memory_region_init_ram(&s->fifo_ram, NULL, "vmsvga.fifo", s->fifo_size, diff --git a/hw/display/xenfb.c b/hw/display/xenfb.c index 2e431e27be6..8e9953bda43 100644 --- a/hw/display/xenfb.c +++ b/hw/display/xenfb.c @@ -657,7 +657,7 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h) xen_pv_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n", __func__, xenfb->depth, bpp); - dpy_gfx_update(xenfb->con, x, y, w, h); + qemu_console_update(xenfb->con, x, y, w, h); } #ifdef XENFB_TYPE_REFRESH_PERIOD @@ -743,7 +743,7 @@ static bool xenfb_update(void *opaque) surface = qemu_create_displaysurface(xenfb->width, xenfb->height); break; } - dpy_gfx_replace_surface(xenfb->con, surface); + qemu_console_set_surface(xenfb->con, surface); xen_pv_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n", xenfb->width, xenfb->height, xenfb->depth, @@ -903,7 +903,7 @@ static int fb_initialise(struct XenLegacyDevice *xendev) if (rc != 0) return rc; - fb->con = graphic_console_init(NULL, 0, &xenfb_ops, fb); + fb->con = qemu_graphic_console_create(NULL, 0, &xenfb_ops, fb); if (xenstore_read_fe_int(xendev, "feature-update", &fb->feature_update) == -1) fb->feature_update = 0; diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c index 50e6ef10984..2486d9e5825 100644 --- a/hw/display/xlnx_dp.c +++ b/hw/display/xlnx_dp.c @@ -605,7 +605,7 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) if ((width != 0) && (height != 0)) { /* - * As dpy_gfx_replace_surface calls qemu_free_displaysurface on the + * As qemu_console_replace_surface calls qemu_free_displaysurface on the * surface we need to be careful and don't free the surface associated * to the console or double free will happen. */ @@ -631,10 +631,10 @@ static void xlnx_dp_recreate_surface(XlnxDPState *s) height, s->g_plane.format, 0, NULL); - dpy_gfx_replace_surface(s->console, s->bout_plane.surface); + qemu_console_set_surface(s->console, s->bout_plane.surface); } else { s->bout_plane.surface = NULL; - dpy_gfx_replace_surface(s->console, s->g_plane.surface); + qemu_console_set_surface(s->console, s->g_plane.surface); } xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, @@ -1287,7 +1287,7 @@ static bool xlnx_dp_update_display(void *opaque) /* * XXX: We might want to update only what changed. */ - dpy_gfx_update_full(s->console); + qemu_console_update_full(s->console); return true; } @@ -1387,7 +1387,7 @@ static void xlnx_dp_realize(DeviceState *dev, Error **errp) qdev_realize(DEVICE(s->edid), BUS(aux_get_i2c_bus(s->aux_bus)), &error_fatal); - s->console = graphic_console_init(dev, 0, &xlnx_dp_gfx_ops, s); + s->console = qemu_graphic_console_create(dev, 0, &xlnx_dp_gfx_ops, s); surface = qemu_console_surface(s->console); xlnx_dpdma_set_host_data_location(s->dpdma, DP_GRAPHIC_DMA_CHANNEL, surface_data(surface)); diff --git a/hw/vfio/display.c b/hw/vfio/display.c index 4a9a58036e3..8f91e83da88 100644 --- a/hw/vfio/display.c +++ b/hw/vfio/display.c @@ -264,7 +264,7 @@ static void vfio_display_free_one_dmabuf(VFIODisplay *dpy, VFIODMABuf *dmabuf) QTAILQ_REMOVE(&dpy->dmabuf.bufs, dmabuf, next); qemu_dmabuf_close(dmabuf->buf); - dpy_gl_release_dmabuf(dpy->con, dmabuf->buf); + qemu_console_gl_release_dmabuf(dpy->con, dmabuf->buf); g_clear_pointer(&dmabuf->buf, qemu_dmabuf_free); g_free(dmabuf); } @@ -307,7 +307,7 @@ static bool vfio_display_dmabuf_update(void *opaque) if (dpy->dmabuf.primary != primary) { dpy->dmabuf.primary = primary; qemu_console_resize(dpy->con, width, height); - dpy_gl_scanout_dmabuf(dpy->con, primary->buf); + qemu_console_gl_scanout_dmabuf(dpy->con, primary->buf); free_bufs = true; } @@ -321,21 +321,21 @@ static bool vfio_display_dmabuf_update(void *opaque) if (cursor && (new_cursor || cursor->hot_updates)) { bool have_hot = (cursor->hot_x != 0xffffffff && cursor->hot_y != 0xffffffff); - dpy_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, - cursor->hot_x, cursor->hot_y); + qemu_console_gl_cursor_dmabuf(dpy->con, cursor->buf, have_hot, + cursor->hot_x, cursor->hot_y); cursor->hot_updates = 0; } else if (!cursor && new_cursor) { - dpy_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); + qemu_console_gl_cursor_dmabuf(dpy->con, NULL, false, 0, 0); } if (cursor && cursor->pos_updates) { - dpy_gl_cursor_position(dpy->con, + qemu_console_gl_cursor_position(dpy->con, cursor->pos_x, cursor->pos_y); cursor->pos_updates = 0; } - dpy_gl_update(dpy->con, 0, 0, width, height); + qemu_console_gl_update(dpy->con, 0, 0, width, height); if (free_bufs) { vfio_display_free_dmabufs(vdev); @@ -363,7 +363,7 @@ static bool vfio_display_dmabuf_init(VFIOPCIDevice *vdev, Error **errp) } vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_dmabuf_ops, vdev); if (vdev->enable_ramfb) { @@ -396,9 +396,9 @@ void vfio_display_reset(VFIOPCIDevice *vdev) return; } - dpy_gl_scanout_disable(vdev->dpy->con); + qemu_console_gl_scanout_disable(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); - dpy_gfx_update_full(vdev->dpy->con); + qemu_console_update_full(vdev->dpy->con); } static bool vfio_display_region_update(void *opaque) @@ -471,13 +471,13 @@ static bool vfio_display_region_update(void *opaque) dpy->region.surface = qemu_create_displaysurface_from (plane.width, plane.height, format, plane.stride, dpy->region.buffer.mmaps[0].mmap); - dpy_gfx_replace_surface(dpy->con, dpy->region.surface); + qemu_console_set_surface(dpy->con, dpy->region.surface); } /* full screen update */ - dpy_gfx_update(dpy->con, 0, 0, - surface_width(dpy->region.surface), - surface_height(dpy->region.surface)); + qemu_console_update(dpy->con, 0, 0, + surface_width(dpy->region.surface), + surface_height(dpy->region.surface)); return true; err: @@ -493,7 +493,7 @@ static const GraphicHwOps vfio_display_region_ops = { static bool vfio_display_region_init(VFIOPCIDevice *vdev, Error **errp) { vdev->dpy = g_new0(VFIODisplay, 1); - vdev->dpy->con = graphic_console_init(DEVICE(vdev), 0, + vdev->dpy->con = qemu_graphic_console_create(DEVICE(vdev), 0, &vfio_display_region_ops, vdev); if (vdev->enable_ramfb) { @@ -553,7 +553,7 @@ void vfio_display_finalize(VFIOPCIDevice *vdev) return; } - graphic_console_close(vdev->dpy->con); + qemu_graphic_console_close(vdev->dpy->con); vfio_display_dmabuf_exit(vdev->dpy); vfio_display_region_exit(vdev->dpy); vfio_display_edid_exit(vdev->dpy); diff --git a/ui/console-vc.c b/ui/console-vc.c index 99ad6d079df..828e78c41ea 100644 --- a/ui/console-vc.c +++ b/ui/console-vc.c @@ -90,15 +90,15 @@ static void text_console_update(void *opaque, uint32_t *chardata) s->vt.cells[src].t_attrib.bgcol, s->vt.cells[src].t_attrib.bold); } - dpy_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], - s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); + qemu_console_text_update(QEMU_CONSOLE(s), s->vt.text_x[0], s->vt.text_y[0], + s->vt.text_x[1] - s->vt.text_x[0], i - s->vt.text_y[0]); s->vt.text_x[0] = s->vt.width; s->vt.text_y[0] = s->vt.height; s->vt.text_x[1] = 0; s->vt.text_y[1] = 0; } if (s->vt.cursor_invalidate) { - dpy_text_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); + qemu_console_text_set_cursor(QEMU_CONSOLE(s), s->vt.x, s->vt.y); s->vt.cursor_invalidate = 0; } } @@ -186,14 +186,14 @@ static void vc_chr_set_echo(Chardev *chr, bool echo) void qemu_text_console_update_size(QemuTextConsole *c) { - dpy_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); + qemu_console_text_resize(QEMU_CONSOLE(c), c->vt.width, c->vt.height); } static void text_console_image_update(QemuVT100 *vt, int x, int y, int width, int height) { QemuTextConsole *console = container_of(vt, QemuTextConsole, vt); - dpy_gfx_update(QEMU_CONSOLE(console), x, y, width, height); + qemu_console_update(QEMU_CONSOLE(console), x, y, width, height); } static void text_console_out_flush(QemuVT100 *vt) @@ -232,7 +232,7 @@ static bool vc_chr_open(Chardev *chr, ChardevBackend *backend, Error **errp) s = QEMU_TEXT_CONSOLE(object_new(TYPE_QEMU_FIXED_TEXT_CONSOLE)); } - dpy_gfx_replace_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); + qemu_console_set_surface(QEMU_CONSOLE(s), qemu_create_displaysurface(width, height)); if (vc->has_encoding) { drv->encoding = vc->encoding; } diff --git a/ui/console.c b/ui/console.c index 22ca1c35db3..6f6330d61f1 100644 --- a/ui/console.c +++ b/ui/console.c @@ -129,26 +129,26 @@ static void gui_setup_refresh(DisplayState *ds) } } -void graphic_hw_update_done(QemuConsole *con) +void qemu_console_hw_update_done(QemuConsole *con) { if (con) { qemu_co_enter_all(&con->dump_queue, NULL); } } -void graphic_hw_update(QemuConsole *con) +void qemu_console_hw_update(QemuConsole *con) { if (!con) { return; } if (!con->hw_ops->gfx_update || con->hw_ops->gfx_update(con->hw)) { - graphic_hw_update_done(con); + qemu_console_hw_update_done(con); } } -static void graphic_hw_update_bh(void *con) +static void console_hw_update_bh(void *con) { - graphic_hw_update(con); + qemu_console_hw_update(con); } void qemu_console_co_wait_update(QemuConsole *con) @@ -156,18 +156,18 @@ void qemu_console_co_wait_update(QemuConsole *con) if (qemu_co_queue_empty(&con->dump_queue)) { /* Defer the update, it will restart the pending coroutines */ aio_bh_schedule_oneshot(qemu_get_aio_context(), - graphic_hw_update_bh, con); + console_hw_update_bh, con); } qemu_co_queue_wait(&con->dump_queue, NULL); } -static void graphic_hw_gl_unblock_timer(void *opaque) +static void console_hw_gl_unblock_timer(void *opaque) { warn_report("console: no gl-unblock within one second"); } -void graphic_hw_gl_block(QemuConsole *con, bool block) +void qemu_console_hw_gl_block(QemuConsole *con, bool block) { uint64_t timeout; assert(con != NULL); @@ -205,14 +205,14 @@ void qemu_console_set_window_id(QemuConsole *con, int window_id) con->window_id = window_id; } -void graphic_hw_invalidate(QemuConsole *con) +void qemu_console_hw_invalidate(QemuConsole *con) { if (con && con->hw_ops->invalidate) { con->hw_ops->invalidate(con->hw); } } -void graphic_hw_text_update(QemuConsole *con, uint32_t *chardata) +void qemu_console_hw_text_update(QemuConsole *con, uint32_t *chardata) { if (con && con->hw_ops->text_update) { con->hw_ops->text_update(con->hw, chardata); @@ -502,7 +502,7 @@ qemu_graphic_console_init(Object *obj) { } -bool console_has_gl(QemuConsole *con) +bool qemu_console_has_gl(QemuConsole *con) { return con->gl != NULL; } @@ -527,7 +527,7 @@ static bool console_compatible_with(QemuConsole *con, flags = con->hw_ops->get_flags ? con->hw_ops->get_flags(con->hw) : 0; - if (console_has_gl(con) && + if (qemu_console_has_gl(con) && !con->gl->ops->dpy_gl_ctx_is_compatible_dcl(con->gl, dcl)) { error_setg(errp, "Display %s is incompatible with the GL context", dcl->ops->dpy_name); @@ -535,7 +535,7 @@ static bool console_compatible_with(QemuConsole *con, } if (flags & GRAPHIC_FLAGS_GL && - !console_has_gl(con)) { + !qemu_console_has_gl(con)) { error_setg(errp, "The console requires a GL context."); return false; @@ -605,8 +605,8 @@ void qemu_console_register_listener(QemuConsole *con, vt100_update_cursor(); } -void update_displaychangelistener(DisplayChangeListener *dcl, - uint64_t interval) +void qemu_console_listener_set_refresh(DisplayChangeListener *dcl, + uint64_t interval) { DisplayState *ds = dcl->ds; @@ -645,7 +645,7 @@ static void dpy_set_ui_info_timer(void *opaque) con->hw_ops->ui_info(con->hw, head, &con->ui_info); } -bool dpy_ui_info_supported(const QemuConsole *con) +bool qemu_console_ui_info_supported(const QemuConsole *con) { if (con == NULL) { return false; @@ -654,16 +654,16 @@ bool dpy_ui_info_supported(const QemuConsole *con) return con->hw_ops->ui_info != NULL; } -const QemuUIInfo *dpy_get_ui_info(const QemuConsole *con) +const QemuUIInfo *qemu_console_get_ui_info(const QemuConsole *con) { - assert(dpy_ui_info_supported(con)); + assert(qemu_console_ui_info_supported(con)); return &con->ui_info; } -int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) +int qemu_console_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) { - if (!dpy_ui_info_supported(con)) { + if (!qemu_console_ui_info_supported(con)) { return -1; } if (memcmp(&con->ui_info, info, sizeof(con->ui_info)) == 0) { @@ -682,7 +682,7 @@ int dpy_set_ui_info(QemuConsole *con, QemuUIInfo *info, bool delay) return 0; } -void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -707,15 +707,15 @@ void dpy_gfx_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_gfx_update_full(QemuConsole *con) +void qemu_console_update_full(QemuConsole *con) { int w = qemu_console_get_width(con, 0); int h = qemu_console_get_height(con, 0); - dpy_gfx_update(con, 0, 0, w, h); + qemu_console_update(con, 0, 0, w, h); } -void dpy_gfx_replace_surface(QemuConsole *con, +void qemu_console_set_surface(QemuConsole *con, DisplaySurface *surface) { static const char placeholder_msg[] = "Display output is not active."; @@ -753,8 +753,8 @@ void dpy_gfx_replace_surface(QemuConsole *con, qemu_free_displaysurface(old_surface); } -bool dpy_gfx_check_format(QemuConsole *con, - pixman_format_code_t format) +bool qemu_console_check_format(QemuConsole *con, + pixman_format_code_t format) { DisplayChangeListener *dcl; DisplayState *s = con->ds; @@ -789,7 +789,7 @@ static void dpy_refresh(DisplayState *s) } } -void dpy_text_cursor(QemuConsole *con, int x, int y) +void qemu_console_text_set_cursor(QemuConsole *con, int x, int y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -804,7 +804,7 @@ void dpy_text_cursor(QemuConsole *con, int x, int y) } } -void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) +void qemu_console_text_update(QemuConsole *con, int x, int y, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -819,7 +819,7 @@ void dpy_text_update(QemuConsole *con, int x, int y, int w, int h) } } -void dpy_text_resize(QemuConsole *con, int w, int h) +void qemu_console_text_resize(QemuConsole *con, int w, int h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -834,7 +834,7 @@ void dpy_text_resize(QemuConsole *con, int w, int h) } } -void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) +void qemu_console_set_mouse(QemuConsole *c, int x, int y, bool on) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -853,7 +853,7 @@ void dpy_mouse_set(QemuConsole *c, int x, int y, bool on) } } -void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) +void qemu_console_set_cursor(QemuConsole *c, QEMUCursor *cursor) { QemuGraphicConsole *con = QEMU_GRAPHIC_CONSOLE(c); DisplayState *s = c->ds; @@ -871,26 +871,26 @@ void dpy_cursor_define(QemuConsole *c, QEMUCursor *cursor) } } -QEMUGLContext dpy_gl_ctx_create(QemuConsole *con, - struct QEMUGLParams *qparams) +QEMUGLContext qemu_console_gl_ctx_create(QemuConsole *con, + QEMUGLParams *qparams) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_create(con->gl, qparams); } -void dpy_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) +void qemu_console_gl_ctx_destroy(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); con->gl->ops->dpy_gl_ctx_destroy(con->gl, ctx); } -int dpy_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) +int qemu_console_gl_ctx_make_current(QemuConsole *con, QEMUGLContext ctx) { assert(con->gl); return con->gl->ops->dpy_gl_ctx_make_current(con->gl, ctx); } -void dpy_gl_scanout_disable(QemuConsole *con) +void qemu_console_gl_scanout_disable(QemuConsole *con) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -908,14 +908,14 @@ void dpy_gl_scanout_disable(QemuConsole *con) } } -void dpy_gl_scanout_texture(QemuConsole *con, - uint32_t backing_id, - bool backing_y_0_top, - uint32_t backing_width, - uint32_t backing_height, - uint32_t x, uint32_t y, - uint32_t width, uint32_t height, - void *d3d_tex2d) +void qemu_console_gl_scanout_texture(QemuConsole *con, + uint32_t backing_id, + bool backing_y_0_top, + uint32_t backing_width, + uint32_t backing_height, + uint32_t x, uint32_t y, + uint32_t width, uint32_t height, + void *d3d_tex2d) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -939,8 +939,8 @@ void dpy_gl_scanout_texture(QemuConsole *con, } } -void dpy_gl_scanout_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_scanout_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -957,8 +957,8 @@ void dpy_gl_scanout_dmabuf(QemuConsole *con, } } -void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, - bool have_hot, uint32_t hot_x, uint32_t hot_y) +void qemu_console_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, + bool have_hot, uint32_t hot_x, uint32_t hot_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -974,8 +974,8 @@ void dpy_gl_cursor_dmabuf(QemuConsole *con, QemuDmaBuf *dmabuf, } } -void dpy_gl_cursor_position(QemuConsole *con, - uint32_t pos_x, uint32_t pos_y) +void qemu_console_gl_cursor_position(QemuConsole *con, + uint32_t pos_x, uint32_t pos_y) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -990,8 +990,8 @@ void dpy_gl_cursor_position(QemuConsole *con, } } -void dpy_gl_release_dmabuf(QemuConsole *con, - QemuDmaBuf *dmabuf) +void qemu_console_gl_release_dmabuf(QemuConsole *con, + QemuDmaBuf *dmabuf) { DisplayState *s = con->ds; DisplayChangeListener *dcl; @@ -1006,15 +1006,15 @@ void dpy_gl_release_dmabuf(QemuConsole *con, } } -void dpy_gl_update(QemuConsole *con, - uint32_t x, uint32_t y, uint32_t w, uint32_t h) +void qemu_console_gl_update(QemuConsole *con, + uint32_t x, uint32_t y, uint32_t w, uint32_t h) { DisplayState *s = con->ds; DisplayChangeListener *dcl; assert(con->gl); - graphic_hw_gl_block(con, true); + qemu_console_hw_gl_block(con, true); QLIST_FOREACH(dcl, &s->listeners, next) { if (con != dcl->con) { continue; @@ -1023,7 +1023,7 @@ void dpy_gl_update(QemuConsole *con, dcl->ops->dpy_gl_update(dcl, x, y, w, h); } } - graphic_hw_gl_block(con, false); + qemu_console_hw_gl_block(con, false); } /***********************************************************/ @@ -1060,17 +1060,17 @@ DisplayState *init_displaystate(void) return display_state; } -void graphic_console_set_hwops(QemuConsole *con, - const GraphicHwOps *hw_ops, - void *opaque) +void qemu_graphic_console_set_hwops(QemuConsole *con, + const GraphicHwOps *hw_ops, + void *opaque) { con->hw_ops = hw_ops; con->hw = opaque; } -QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, - const GraphicHwOps *hw_ops, - void *opaque) +QemuConsole *qemu_graphic_console_create(DeviceState *dev, uint32_t head, + const GraphicHwOps *hw_ops, + void *opaque) { static const char noinit[] = "Guest has not initialized the display (yet)."; @@ -1089,16 +1089,16 @@ QemuConsole *graphic_console_init(DeviceState *dev, uint32_t head, s = (QemuConsole *)object_new(TYPE_QEMU_GRAPHIC_CONSOLE); } QEMU_GRAPHIC_CONSOLE(s)->head = head; - graphic_console_set_hwops(s, hw_ops, opaque); + qemu_graphic_console_set_hwops(s, hw_ops, opaque); if (dev) { object_property_set_link(OBJECT(s), "device", OBJECT(dev), &error_abort); } surface = qemu_create_placeholder_surface(width, height, noinit); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); s->gl_unblock_timer = timer_new_ms(QEMU_CLOCK_REALTIME, - graphic_hw_gl_unblock_timer, s); + console_hw_gl_unblock_timer, s); return s; } @@ -1106,7 +1106,7 @@ static const GraphicHwOps unused_ops = { /* no callbacks */ }; -void graphic_console_close(QemuConsole *con) +void qemu_graphic_console_close(QemuConsole *con) { static const char unplugged[] = "Guest display has been unplugged"; @@ -1116,13 +1116,13 @@ void graphic_console_close(QemuConsole *con) trace_console_gfx_close(con->index); object_property_set_link(OBJECT(con), "device", NULL, &error_abort); - graphic_console_set_hwops(con, &unused_ops, NULL); + qemu_graphic_console_set_hwops(con, &unused_ops, NULL); if (con->gl) { - dpy_gl_scanout_disable(con); + qemu_console_gl_scanout_disable(con); } surface = qemu_create_placeholder_surface(width, height, unplugged); - dpy_gfx_replace_surface(con, surface); + qemu_console_set_surface(con, surface); } QemuConsole *qemu_console_lookup_default(void) @@ -1308,7 +1308,7 @@ void qemu_console_resize(QemuConsole *s, int width, int height) } surface = qemu_create_displaysurface(width, height); - dpy_gfx_replace_surface(s, surface); + qemu_console_set_surface(s, surface); } DisplaySurface *qemu_console_surface(QemuConsole *console) diff --git a/ui/curses.c b/ui/curses.c index dbb5992981c..24d3713e57d 100644 --- a/ui/curses.c +++ b/ui/curses.c @@ -1,8 +1,8 @@ /* * QEMU curses/ncurses display driver - * + * * Copyright (c) 2005 Andrzej Zaborowski - * + * * Permission is hereby granted, free of charge, to any person obtaining a copy * of this software and associated documentation files (the "Software"), to deal * in the Software without restriction, including without limitation the rights @@ -275,11 +275,11 @@ static void curses_refresh(DisplayChangeListener *dcl) clear(); refresh(); curses_calc_pad(); - graphic_hw_invalidate(dcl->con); + qemu_console_hw_invalidate(dcl->con); invalidate = 0; } - graphic_hw_text_update(dcl->con, screen); + qemu_console_hw_text_update(dcl->con, screen); while (1) { /* while there are any pending key strokes to process */ diff --git a/ui/dbus-console.c b/ui/dbus-console.c index 23f547a673d..b8e5c57b148 100644 --- a/ui/dbus-console.c +++ b/ui/dbus-console.c @@ -200,7 +200,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, .height = arg_height, }; - if (!dpy_ui_info_supported(ddc->dcl.con)) { + if (!qemu_console_ui_info_supported(ddc->dcl.con)) { g_dbus_method_invocation_return_error(invocation, DBUS_DISPLAY_ERROR, DBUS_DISPLAY_ERROR_UNSUPPORTED, @@ -208,7 +208,7 @@ dbus_console_set_ui_info(DBusDisplayConsole *ddc, return DBUS_METHOD_INVOCATION_HANDLED; } - dpy_set_ui_info(ddc->dcl.con, &info, false); + qemu_console_set_ui_info(ddc->dcl.con, &info, false); qemu_dbus_display1_console_complete_set_uiinfo(ddc->iface, invocation); return DBUS_METHOD_INVOCATION_HANDLED; } diff --git a/ui/dbus-listener.c b/ui/dbus-listener.c index cc2c969686e..2e2f6ba4183 100644 --- a/ui/dbus-listener.c +++ b/ui/dbus-listener.c @@ -241,7 +241,7 @@ static void dbus_update_gl_cb(GObject *source_object, } #endif - graphic_hw_gl_block(ddl->dcl.con, false); + qemu_console_hw_gl_block(ddl->dcl.con, false); g_object_unref(ddl); } #endif @@ -257,7 +257,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, glFlush(); #ifdef CONFIG_GBM - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); qemu_dbus_display1_listener_call_update_dmabuf(ddl->proxy, x, y, w, h, G_DBUS_CALL_FLAGS_NONE, @@ -276,7 +276,7 @@ static void dbus_call_update_gl(DisplayChangeListener *dcl, Error *err = NULL; assert(ddl->d3d_texture); - graphic_hw_gl_block(ddl->dcl.con, true); + qemu_console_hw_gl_block(ddl->dcl.con, true); if (!d3d_texture2d_release0(ddl->d3d_texture, &err)) { error_report_err(err); return; @@ -711,7 +711,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) { DBusDisplayListener *ddl = container_of(dcl, DBusDisplayListener, dcl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (!ddl->ds || qemu_console_is_gl_blocked(ddl->dcl.con)) { return; @@ -740,7 +740,7 @@ static void dbus_gl_refresh(DisplayChangeListener *dcl) static void dbus_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } #ifdef CONFIG_OPENGL diff --git a/ui/egl-headless.c b/ui/egl-headless.c index 4f046c975a9..878bfebb40c 100644 --- a/ui/egl-headless.c +++ b/ui/egl-headless.c @@ -23,7 +23,7 @@ typedef struct egl_dpy { static void egl_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static void egl_gfx_update(DisplayChangeListener *dcl, @@ -161,7 +161,7 @@ static void egl_scanout_flush(DisplayChangeListener *dcl, } egl_fb_read(edpy->ds, &edpy->blit_fb); - dpy_gfx_update(edpy->dcl.con, x, y, w, h); + qemu_console_update(edpy->dcl.con, x, y, w, h); } static const DisplayChangeListenerOps egl_ops = { diff --git a/ui/gtk-egl.c b/ui/gtk-egl.c index fa8fe8970c1..7c5c9b2428c 100644 --- a/ui/gtk-egl.c +++ b/ui/gtk-egl.c @@ -108,7 +108,7 @@ void gd_egl_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -176,7 +176,7 @@ void gd_egl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -405,7 +405,7 @@ void gd_egl_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_egl_set_scanout_mode(vc, true); gtk_widget_queue_draw_area(area, x, y, w, h); diff --git a/ui/gtk-gl-area.c b/ui/gtk-gl-area.c index ce49000d3f1..23806b9d01b 100644 --- a/ui/gtk-gl-area.c +++ b/ui/gtk-gl-area.c @@ -131,7 +131,7 @@ void gd_gl_area_draw(VirtualConsole *vc) qemu_set_fd_handler(fence_fd, gd_hw_gl_flushed, NULL, vc); return; } - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } #endif } else { @@ -195,7 +195,7 @@ void gd_gl_area_refresh(DisplayChangeListener *dcl) } } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (vc->gfx.glupdates) { vc->gfx.glupdates = 0; @@ -347,7 +347,7 @@ void gd_gl_area_scanout_flush(DisplayChangeListener *dcl, if (vc->gfx.guest_fb.dmabuf && !qemu_dmabuf_get_draw_submitted(vc->gfx.guest_fb.dmabuf)) { - graphic_hw_gl_block(vc->gfx.dcl.con, true); + qemu_console_hw_gl_block(vc->gfx.dcl.con, true); qemu_dmabuf_set_draw_submitted(vc->gfx.guest_fb.dmabuf, true); gtk_gl_area_set_scanout_mode(vc, true); } diff --git a/ui/gtk.c b/ui/gtk.c index ef3707b3634..2c61b601f78 100644 --- a/ui/gtk.c +++ b/ui/gtk.c @@ -436,7 +436,7 @@ static void gd_update(DisplayChangeListener *dcl, static void gd_refresh(DisplayChangeListener *dcl) { - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); } static GdkDevice *gd_get_pointer(GdkDisplay *dpy) @@ -602,7 +602,7 @@ void gd_hw_gl_flushed(void *vcon) qemu_set_fd_handler(fence_fd, NULL, NULL, NULL); close(fence_fd); qemu_dmabuf_set_fence_fd(dmabuf, -1); - graphic_hw_gl_block(vc->gfx.dcl.con, false); + qemu_console_hw_gl_block(vc->gfx.dcl.con, false); } } @@ -729,27 +729,27 @@ static void gd_set_ui_refresh_rate(VirtualConsole *vc, int refresh_rate) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.refresh_rate = refresh_rate; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } static void gd_set_ui_size(VirtualConsole *vc, gint width, gint height) { QemuUIInfo info; - if (!dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (!qemu_console_ui_info_supported(vc->gfx.dcl.con)) { return; } - info = *dpy_get_ui_info(vc->gfx.dcl.con); + info = *qemu_console_get_ui_info(vc->gfx.dcl.con); info.width = width; info.height = height; - dpy_set_ui_info(vc->gfx.dcl.con, &info, true); + qemu_console_set_ui_info(vc->gfx.dcl.con, &info, true); } #if defined(CONFIG_OPENGL) @@ -2333,7 +2333,7 @@ static GSList *gd_vc_gfx_init(GtkDisplayState *s, VirtualConsole *vc, gd_connect_vc_gfx_signals(vc); group = gd_vc_menu_init(s, vc, idx, group, view_menu); - if (dpy_ui_info_supported(vc->gfx.dcl.con)) { + if (qemu_console_ui_info_supported(vc->gfx.dcl.con)) { zoom_to_fit = true; } if (s->opts->u.gtk.has_zoom_to_fit) { diff --git a/ui/sdl2-2d.c b/ui/sdl2-2d.c index 73052383c2e..68a3aff7151 100644 --- a/ui/sdl2-2d.c +++ b/ui/sdl2-2d.c @@ -129,7 +129,7 @@ void sdl2_2d_refresh(DisplayChangeListener *dcl) struct sdl2_console *scon = container_of(dcl, struct sdl2_console, dcl); assert(!scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); sdl2_poll_events(scon); } diff --git a/ui/sdl2-gl.c b/ui/sdl2-gl.c index bb066cdd885..1547ad2f6f8 100644 --- a/ui/sdl2-gl.c +++ b/ui/sdl2-gl.c @@ -115,7 +115,7 @@ void sdl2_gl_refresh(DisplayChangeListener *dcl) assert(scon->opengl); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (scon->updates && scon->real_window) { scon->updates = 0; sdl2_gl_render_surface(scon); diff --git a/ui/sdl2.c b/ui/sdl2.c index 89516f95c41..4fcdbd79d3c 100644 --- a/ui/sdl2.c +++ b/ui/sdl2.c @@ -604,7 +604,7 @@ static void handle_windowevent(SDL_Event *ev) .width = ev->window.data1, .height = ev->window.data2, }; - dpy_set_ui_info(scon->dcl.con, &info, true); + qemu_console_set_ui_info(scon->dcl.con, &info, true); } sdl2_redraw(scon); break; @@ -632,10 +632,10 @@ static void handle_windowevent(SDL_Event *ev) } break; case SDL_WINDOWEVENT_RESTORED: - update_displaychangelistener(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); + qemu_console_listener_set_refresh(&scon->dcl, GUI_REFRESH_INTERVAL_DEFAULT); break; case SDL_WINDOWEVENT_MINIMIZED: - update_displaychangelistener(&scon->dcl, 500); + qemu_console_listener_set_refresh(&scon->dcl, 500); break; case SDL_WINDOWEVENT_CLOSE: if (qemu_console_is_graphic(scon->dcl.con)) { diff --git a/ui/spice-display.c b/ui/spice-display.c index 56d8140fad8..e3716127203 100644 --- a/ui/spice-display.c +++ b/ui/spice-display.c @@ -468,7 +468,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) assert(ssd->dcl.con); cursor_ref(c); qemu_mutex_unlock(&ssd->lock); - dpy_cursor_define(ssd->dcl.con, c); + qemu_console_set_cursor(ssd->dcl.con, c); qemu_mutex_lock(&ssd->lock); cursor_unref(c); } @@ -481,7 +481,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) ssd->mouse_x = -1; ssd->mouse_y = -1; qemu_mutex_unlock(&ssd->lock); - dpy_mouse_set(ssd->dcl.con, x, y, true); + qemu_console_set_mouse(ssd->dcl.con, x, y, true); } else { qemu_mutex_unlock(&ssd->lock); } @@ -489,7 +489,7 @@ void qemu_spice_cursor_refresh_bh(void *opaque) void qemu_spice_display_refresh(SimpleSpiceDisplay *ssd) { - graphic_hw_update(ssd->dcl.con); + qemu_console_hw_update(ssd->dcl.con); WITH_QEMU_LOCK_GUARD(&ssd->lock) { if (QTAILQ_EMPTY(&ssd->updates) && ssd->ds) { @@ -668,7 +668,7 @@ static int interface_client_monitors_config(QXLInstance *sin, QemuUIInfo info; int head; - if (!dpy_ui_info_supported(ssd->dcl.con)) { + if (!qemu_console_ui_info_supported(ssd->dcl.con)) { return 0; /* == not supported by guest */ } @@ -676,7 +676,7 @@ static int interface_client_monitors_config(QXLInstance *sin, return 1; } - info = *dpy_get_ui_info(ssd->dcl.con); + info = *qemu_console_get_ui_info(ssd->dcl.con); head = qemu_console_get_index(ssd->dcl.con); if (mc->num_of_monitors > head) { @@ -690,7 +690,7 @@ static int interface_client_monitors_config(QXLInstance *sin, } trace_qemu_spice_ui_info(ssd->qxl.id, info.width, info.height); - dpy_set_ui_info(ssd->dcl.con, &info, false); + qemu_console_set_ui_info(ssd->dcl.con, &info, false); return 1; } @@ -817,7 +817,7 @@ static void qemu_spice_gl_block(SimpleSpiceDisplay *ssd, bool block) } else { timer_del(ssd->gl_unblock_timer); } - graphic_hw_gl_block(ssd->dcl.con, block); + qemu_console_hw_gl_block(ssd->dcl.con, block); } static void qemu_spice_gl_unblock_bh(void *opaque) @@ -861,7 +861,7 @@ static void spice_gl_refresh(DisplayChangeListener *dcl) return; } - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (ssd->gl_updates && ssd->have_surface) { qemu_spice_gl_block(ssd, true); glFlush(); diff --git a/ui/vnc.c b/ui/vnc.c index e8c8773a36e..d3dfabede03 100644 --- a/ui/vnc.c +++ b/ui/vnc.c @@ -2325,8 +2325,8 @@ static void set_pixel_format(VncState *vs, int bits_per_pixel, set_pixel_conversion(vs); - graphic_hw_invalidate(vs->vd->dcl.con); - graphic_hw_update(vs->vd->dcl.con); + qemu_console_hw_invalidate(vs->vd->dcl.con); + qemu_console_hw_update(vs->vd->dcl.con); } static void pixel_format_message (VncState *vs) { @@ -2384,7 +2384,7 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) VncDisplay *vd = vs->vd; if (data[0] > 3) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } switch (data[0]) { @@ -2638,9 +2638,9 @@ static int protocol_client_msg(VncState *vs, uint8_t *data, size_t len) h = read_u16(data, 4); trace_vnc_msg_client_set_desktop_size(vs, vs->ioc, w, h, screens); - if (dpy_ui_info_supported(vs->vd->dcl.con)) { + if (qemu_console_ui_info_supported(vs->vd->dcl.con)) { QemuUIInfo info = { .width = w, .height = h }; - dpy_set_ui_info(vs->vd->dcl.con, &info, false); + qemu_console_set_ui_info(vs->vd->dcl.con, &info, false); vnc_desktop_resize_ext(vs, 4 /* Request forwarded */); } else { vnc_desktop_resize_ext(vs, 3 /* Invalid screen layout */); @@ -3242,14 +3242,14 @@ static void vnc_refresh(DisplayChangeListener *dcl) int has_dirty, rects = 0; if (QTAILQ_EMPTY(&vd->clients)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_MAX); return; } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (vnc_trylock_display(vd)) { - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); return; } @@ -3323,7 +3323,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, sioc, websocket, vs->auth, vs->subauth); VNC_DEBUG("New client on socket %p\n", vs->sioc); - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); qio_channel_set_blocking(vs->ioc, false, &error_abort); g_clear_handle_id(&vs->ioc_tag, g_source_remove); if (websocket) { @@ -3363,7 +3363,7 @@ static void vnc_connect(VncDisplay *vd, QIOChannelSocket *sioc, vnc_update_server_surface(vd); } - graphic_hw_update(vd->dcl.con); + qemu_console_hw_update(vd->dcl.con); if (!vs->websocket) { vnc_start_protocol(vs); @@ -3419,7 +3419,7 @@ static void vmstate_change_handler(void *opaque, bool running, RunState state) if (state != RUN_STATE_RUNNING) { return; } - update_displaychangelistener(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); + qemu_console_listener_set_refresh(&vd->dcl, VNC_REFRESH_INTERVAL_BASE); } static bool vnc_display_open(VncDisplay *vd, Error **errp); diff --git a/hw/display/apple-gfx.m b/hw/display/apple-gfx.m index 77d80fb7cef..be0061b9db2 100644 --- a/hw/display/apple-gfx.m +++ b/hw/display/apple-gfx.m @@ -317,8 +317,8 @@ static void apple_gfx_render_frame_completed_bh(void *opaque) copy_mtl_texture_to_surface_mem(s->texture, surface_data(s->surface)); if (s->gfx_update_requested) { s->gfx_update_requested = false; - dpy_gfx_update_full(s->con); - graphic_hw_update_done(s->con); + qemu_console_update_full(s->con); + qemu_console_hw_update_done(s->con); s->new_frame_ready = false; } else { s->new_frame_ready = true; @@ -337,7 +337,7 @@ static bool apple_gfx_fb_update_display(void *opaque) assert(bql_locked()); if (s->new_frame_ready) { - dpy_gfx_update_full(s->con); + qemu_console_update_full(s->con); s->new_frame_ready = false; } else if (s->pending_frames > 0) { s->gfx_update_requested = true; @@ -380,14 +380,14 @@ static void set_mode(AppleGFXState *s, uint32_t width, uint32_t height) (s->texture.storageMode == MTLStorageModeManaged); } - dpy_gfx_replace_surface(s->con, s->surface); + qemu_console_set_surface(s->con, s->surface); } static void update_cursor(AppleGFXState *s) { assert(bql_locked()); - dpy_mouse_set(s->con, s->pgdisp.cursorPosition.x, - s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); + qemu_console_set_mouse(s->con, s->pgdisp.cursorPosition.x, + s->pgdisp.cursorPosition.y, qatomic_read(&s->cursor_show)); } static void update_cursor_bh(void *opaque) @@ -443,7 +443,7 @@ static void set_cursor_glyph(void *opaque) } px_data += padding_bytes_per_row; } - dpy_cursor_define(s->con, s->cursor); + qemu_console_set_cursor(s->con, s->cursor); update_cursor(s); } [glyph release]; @@ -792,7 +792,7 @@ bool apple_gfx_common_realize(AppleGFXState *s, DeviceState *dev, apple_gfx_create_display_mode_array(display_modes, num_display_modes); [mode_array release]; - s->con = graphic_console_init(dev, 0, &apple_gfx_fb_ops, s); + s->con = qemu_graphic_console_create(dev, 0, &apple_gfx_fb_ops, s); return true; } diff --git a/ui/cocoa.m b/ui/cocoa.m index aaf82421589..98394cdc507 100644 --- a/ui/cocoa.m +++ b/ui/cocoa.m @@ -421,7 +421,7 @@ - (void) selectConsoleLocked:(unsigned int)index return; } - unregister_displaychangelistener(&dcl); + qemu_console_unregister_listener(&dcl); qkbd_state_switch_console(kbd, con); qemu_console_register_listener(con, &dcl, &dcl_ops); [self notifyMouseModeChange]; @@ -669,8 +669,8 @@ - (void) updateUIInfoLocked CVTime period = CVDisplayLinkGetNominalOutputVideoRefreshPeriod(displayLink); CVDisplayLinkRelease(displayLink); if (!(period.flags & kCVTimeIsIndefinite)) { - update_displaychangelistener(&dcl, - 1000 * period.timeValue / period.timeScale); + qemu_console_listener_set_refresh(&dcl, + 1000 * period.timeValue / period.timeScale); info.refresh_rate = (int64_t)1000 * period.timeScale / period.timeValue; } } @@ -688,7 +688,7 @@ - (void) updateUIInfoLocked info.width = frameSize.width * [[self window] backingScaleFactor]; info.height = frameSize.height * [[self window] backingScaleFactor]; - dpy_set_ui_info(dcl.con, &info, TRUE); + qemu_console_set_ui_info(dcl.con, &info, TRUE); } #pragma clang diagnostic pop @@ -2056,7 +2056,7 @@ static void cocoa_refresh(DisplayChangeListener *dcl) NSAutoreleasePool * pool = [[NSAutoreleasePool alloc] init]; COCOA_DEBUG("qemu_cocoa: cocoa_refresh\n"); - graphic_hw_update(dcl->con); + qemu_console_hw_update(dcl->con); if (cbchangecount != [[NSPasteboard generalPasteboard] changeCount]) { qemu_clipboard_info_unref(cbinfo); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304993.1577613 (Exim 4.92) (envelope-from ) id 1wLqTX-0005M5-LA; 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Sun, 10 May 2026 00:48:41 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzF-0RGR; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI5-2o9a; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=Oq7VlckxNB8n7bgOcYWjANYFO3DaRLJberU5GacjSuU=; b=jOrFkvKSfeCH2LUZsk7Qa4q1si 1cn2IXB0FgOjsTvTZrRNh7hhDnUF8iTy5VNQzVGLiQ984kbOjdsQRGiboozozJGahDXezf18ODPOP vLZ1u/o/ZKszo6dSJzCMpUstTESVub+zW6qh8ELRo/vVCiPiwiPqaopf43w87euwlcuz+Oa6kMbpx mDCdrHYDgvg45+ZMLcU/FFslcL9x2/h7QtNRBZ21TczgtYTF+SONYyGOjwayzVfwqLZVyvg45wqBd Wn9xGyIKM7wr67talThaujuyRgCWgtvctcUaOov/T4ngH7RYFyLBNTuQ7p8OJ1mcIMpwBU2PYI0q8 N7Tvd8hQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 13/30] KVM: x86: Fix KVM clock precision in get_kvmclock() with TSC scaling Date: Sat, 9 May 2026 23:46:39 +0100 Message-ID: <20260509224824.3264567-14-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366922-21B86F3B-F70B1F2A/0/0 X-purgate-type: clean X-purgate-size: 4576 From: David Woodhouse When in master clock mode, the KVM clock is defined in terms of the guest TSC. But get_kvmclock() was computing it from the host TSC without applying TSC scaling, leading to a systemic drift from the values the guest computes from its own TSC. Store the VM's TSC scaling ratio in kvm_arch and precompute the guest-TSC-based mul/shift in pvclock_update_vm_gtod_copy(). Use these in get_kvmclock() to scale the host TSC delta to guest TSC before converting to nanoseconds. This avoids "definition C" of the KVM clock described in the earlier commit "KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init()". Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 4 +++ arch/x86/kvm/x86.c | 50 +++++++++++++++++++++++++++++---- 2 files changed, 49 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 37264212c7df..5348fd5ea3f3 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1490,6 +1490,7 @@ struct kvm_arch { u64 last_tsc_write; u32 last_tsc_khz; u64 last_tsc_offset; + u64 last_tsc_scaling_ratio; u64 cur_tsc_nsec; u64 cur_tsc_write; u64 cur_tsc_offset; @@ -1504,6 +1505,9 @@ struct kvm_arch { bool use_master_clock; u64 master_kernel_ns; u64 master_cycle_now; + u64 master_tsc_scaling_ratio; + s8 master_tsc_shift; + u32 master_tsc_mul; #ifdef CONFIG_KVM_HYPERV struct kvm_hv hyperv; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index f2653eaccdf8..09b00906b1de 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2781,6 +2781,7 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, kvm->arch.last_tsc_write = tsc; kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz; kvm->arch.last_tsc_offset = offset; + kvm->arch.last_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; vcpu->arch.last_guest_tsc = tsc; @@ -3109,6 +3110,8 @@ static bool kvm_get_walltime_and_clockread(struct timespec64 *ts, * */ +static unsigned long get_cpu_tsc_khz(void); + static void pvclock_update_vm_gtod_copy(struct kvm *kvm) { #ifdef CONFIG_X86_64 @@ -3132,9 +3135,28 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) && !ka->backwards_tsc_observed && !ka->boot_vcpu_runs_old_kvmclock; - if (ka->use_master_clock) + if (ka->use_master_clock) { + u64 tsc_hz; + atomic_set(&kvm_guest_has_master_clock, 1); + /* + * Copy the scaling ratio and precompute the mul/shift for + * converting guest TSC to nanoseconds. These are used by + * get_kvmclock() to compute kvmclock from the host TSC + * without needing a vCPU reference. + */ + ka->master_tsc_scaling_ratio = ka->last_tsc_scaling_ratio; + tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (tsc_hz && kvm_caps.has_tsc_control) + tsc_hz = kvm_scale_tsc(tsc_hz, + ka->master_tsc_scaling_ratio); + if (tsc_hz) + kvm_get_time_scale(NSEC_PER_SEC, tsc_hz, + &ka->master_tsc_shift, + &ka->master_tsc_mul); + } + vclock_mode = pvclock_gtod_data.clock.vclock_mode; trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode, vcpus_matched); @@ -3235,10 +3257,28 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) data->flags |= KVM_CLOCK_TSC_STABLE; hv_clock.tsc_timestamp = ka->master_cycle_now; hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; - kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + + /* + * Use the precomputed guest-TSC-based mul/shift + * so that the kvmclock value matches what the + * guest computes from its own TSC. + */ + hv_clock.tsc_shift = ka->master_tsc_shift; + hv_clock.tsc_to_system_mul = ka->master_tsc_mul; + + if (kvm_caps.has_tsc_control) { + u64 tsc_delta = data->host_tsc - ka->master_cycle_now; + + tsc_delta = kvm_scale_tsc(tsc_delta, + ka->master_tsc_scaling_ratio); + data->clock = hv_clock.system_time + + pvclock_scale_delta(tsc_delta, + hv_clock.tsc_to_system_mul, + hv_clock.tsc_shift); + } else { + data->clock = __pvclock_read_cycles(&hv_clock, + data->host_tsc); + } put_cpu(); } else { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304990.1577591 (Exim 4.92) (envelope-from ) id 1wLqTW-00050F-Kr; Sat, 09 May 2026 22:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304990.1577591; Sat, 09 May 2026 22:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-000507-FG; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304990; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xv-RP for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-0026cu-8W; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8f5-5cb7-0a2a0a5109dd-0a2a4506e2c6-30 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cb-7371-0a2a45060019-5a9b5cc79ecc-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzH-0U6f; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhID-35Yi; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=D3ZD9svrsYhkrCggc0KSRTT7FBRjbp88Q/98SjyDptU=; b=NrR9w8Khx8VGuwXJ3A16aybrkh ouMjKpQP6w9R9TcqzykS72xA/q0gH4AnT/doDfI3e5MH+ZYve9uiC4MpDjdR9lV6ySGhrydJumLyu NRE6qOZhbMnyVxh0P9LHfCe6NExErdMqYT1Nw3g8Wv/ITqy9kuvgl0DnJY4N544z/iucLmfyYY4c4 YfuyAi3lxDKP1xpkaJePxhXdW73RHEX+f4rOvW6iiVc02rg0BLNX/qjWlRfklA0qK5eTITC9i6vD3 6pSwy+DBngCkFGmK2VnZxRsO13YK8EaftPUcsEt0y86xLTVynuB/ogM2Ne36wGplkptXKQWhZVUSB R/Rz284g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 15/30] KVM: x86: Fix compute_guest_tsc() to handle negative time deltas Date: Sat, 9 May 2026 23:46:41 +0100 Message-ID: <20260509224824.3264567-16-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366924-8C07ED75-342E4FF8/0/0 X-purgate-type: clean X-purgate-size: 1886 From: David Woodhouse The compute_guest_tsc() function computes the guest TSC at a given kernel_ns timestamp. When the master clock reference point (master_kernel_ns) is earlier than vcpu->arch.this_tsc_nsec, the delta is negative. Since pvclock_scale_delta() takes a u64, the negative value wraps to a huge positive number, producing a wildly wrong result. Change the return type to s64 and handle negative deltas explicitly by negating the delta, scaling it, and subtracting from this_tsc_write. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 2bbc2c7ac449..e281c49561fa 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2586,13 +2586,23 @@ static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz) return set_tsc_khz(vcpu, user_tsc_khz, use_scaling); } -static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns) +static s64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns) { - u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec, - vcpu->arch.virtual_tsc_mult, - vcpu->arch.virtual_tsc_shift); - tsc += vcpu->arch.this_tsc_write; - return tsc; + s64 delta_ns = kernel_ns - vcpu->arch.this_tsc_nsec; + u64 tsc; + + /* Handle negative deltas gracefully (master clock ref may be earlier) */ + if (delta_ns < 0) { + tsc = pvclock_scale_delta(-delta_ns, + vcpu->arch.virtual_tsc_mult, + vcpu->arch.virtual_tsc_shift); + return vcpu->arch.this_tsc_write - tsc; + } + + tsc = pvclock_scale_delta(delta_ns, + vcpu->arch.virtual_tsc_mult, + vcpu->arch.virtual_tsc_shift); + return vcpu->arch.this_tsc_write + tsc; } #ifdef CONFIG_X86_64 -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304998.1577675 (Exim 4.92) (envelope-from ) id 1wLqTb-00073C-UM; Sat, 09 May 2026 22:48:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304998.1577675; Sat, 09 May 2026 22:48:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTb-00071C-Lg; Sat, 09 May 2026 22:48:51 +0000 Received: by outflank-mailman (input) for mailman id 1304998; Sat, 09 May 2026 22:48:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-00058x-8n for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTW-008qns-Lp; Sun, 10 May 2026 00:48:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb9ce-2eae-0a2a0a5409dd-0a2a4502d38a-0 for ; Sun, 10 May 2026 00:48:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-af86-0a2a45020019-5a9b32228c18-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LE-0JLi; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIL-3UdM; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=ryZ6RDjir7eBEFWKcHfpnqGgBXXchIxkMDMcoDjTga0=; b=oYH6BxSE1/APIWTTtlkr9hOcnO GVYavHsEtJ1rcc7nBZtYhkeXnYPtdBB0VJfIJ1yTlSI/efp3CMvNOrSGpTjYv+L3IkYoJU2jM+k9w D1JozTm+DSVNSXz8TrpuEO+XGJFQJHZVDEdzqV9324DIRBPFASZorppyCmEWb1PGax+JBNaviBtfe rtlmPRds0TKNavS5M8SBASEBFeeib8EYiDyB9u4bnAhgHEgz3gM3+1IXGJntw4buZeRH+mSoezzun a9HG9lmrKzQe8EMNelYypA8qTUCAdCJcXoHPWJVu3c8AaBGq6ROOlyg7Bgte+C2xigcy3oxXFr7bB 8v+W0vfw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 17/30] KVM: x86: Simplify and comment kvm_get_time_scale() Date: Sat, 9 May 2026 23:46:43 +0100 Message-ID: <20260509224824.3264567-18-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366926-A9B70161-7656F2D5/0/0 X-purgate-type: clean X-purgate-size: 3192 From: David Woodhouse The kvm_get_time_scale() function was entirely opaque. Add comments explaining what it does: compute a fixed-point multiplier and shift for converting TSC ticks to nanoseconds via pvclock_scale_delta(). Rename the local variables from the cryptic tps64/tps32/scaled64 to base_hz_u64/base32/scaled_hz_u64 to make the code self-documenting. The "tps32" name stood for "Ticks Per Second" but was misleading since it held the shifted base frequency, not a tick count. No functional change. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 55 +++++++++++++++++++++++++++++++++------------- 1 file changed, 40 insertions(+), 15 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 8e4993ef4f6b..980fc22ee05b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2472,32 +2472,57 @@ static uint32_t div_frac(uint32_t dividend, uint32_t divisor) return dividend; } -static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz, +static void kvm_get_time_scale(u64 scaled_hz, u64 base_hz, s8 *pshift, u32 *pmultiplier) { - uint64_t scaled64; - int32_t shift = 0; - uint64_t tps64; - uint32_t tps32; + u64 scaled_hz_u64 = scaled_hz; + s32 shift = 0; + u64 base_hz_u64; + u32 base32; - tps64 = base_hz; - scaled64 = scaled_hz; - while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) { - tps64 >>= 1; + /* + * This function calculates a fixed-point multiplier and shift such + * that: + * time_ns = (tsc_cycles << shift) * multiplier >> 32 + * + * Where tsc_cycles tick at base_hz, and time_ns should count at + * scaled_hz (typically NSEC_PER_SEC for a TSC→nanoseconds conversion). + * + * The multiplier is: (scaled_hz << 32) / base_hz, adjusted by shift + * to keep everything in range. + */ + + base_hz_u64 = base_hz; + + /* + * Start by shifting base_hz right until it fits in 32 bits, and + * is lower than double the target rate. This introduces a negative + * shift value which would result in pvclock_scale_delta() shifting + * the actual tick count right before performing the multiplication. + */ + while (base_hz_u64 > scaled_hz_u64 * 2 || base_hz_u64 >> 32) { + base_hz_u64 >>= 1; shift--; } - tps32 = (uint32_t)tps64; - while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) { - if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000) - scaled64 >>= 1; + /* Now the shifted base_hz fits in 32 bits. */ + base32 = (u32)base_hz_u64; + + /* + * Next, shift scaled_hz right until it fits in 32 bits, and ensure + * that the shifted base_hz is not larger (so that the result of the + * final division also fits in 32 bits). + */ + while (base32 <= scaled_hz_u64 || scaled_hz_u64 >> 32) { + if (scaled_hz_u64 >> 32 || base32 & BIT(31)) + scaled_hz_u64 >>= 1; else - tps32 <<= 1; + base32 <<= 1; shift++; } *pshift = shift; - *pmultiplier = div_frac(scaled64, tps32); + *pmultiplier = div_frac(scaled_hz_u64, base32); } #ifdef CONFIG_X86_64 -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304988.1577587 (Exim 4.92) (envelope-from ) id 1wLqTW-0004z2-DV; Sat, 09 May 2026 22:48:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304988.1577587; Sat, 09 May 2026 22:48:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-0004yk-7u; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304988; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004xx-1k for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-00DG64-De; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8ed-e002-0a2a0a5209dd-0a2a450aedf4-32 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9ca-56b3-0a2a450a0019-5a9b5cc7c8dc-3 for ; Sun, 10 May 2026 00:48:43 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzE-0SAJ; Sat, 09 May 2026 22:48:34 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI1-2gsb; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=zKn6rM5SNp1NUsYTwVeNP1ZCWEOK4E9JR5PloHDb+Ck=; b=nkedMhJt8F9vSW46ftqs+afk74 R2kXr8DGF/BR2ZbLetJk7cK8mb7U8wrd+BjH0SLOd2HT+EGkf+eHfiV6BHYj9S3aMKR1w+7RbmCgL WfZdFYRkUyitRkvhEwFbn8/RZK606OSsjn+RxBhvg4DRPETaEapIcUUaSBInJkB6+TK5nUtBNgb72 fA3ZOT6czVLlApEuNGzRjCGH87yrxPogqqE0x+gC0ah5O5nNxLIWkSQaGtRdHx9srHNiP4bM1d0lV h0qnlA792499cVUurkX1eNKfWL1N3jMb9S/HMH93MHG6mUxkvvyxBtKCKH195l2JIeGXuHxtogYJU dinfu75Q==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 12/30] KVM: x86: Use get_kvmclock_base_ns() as fallback in get_kvmclock() Date: Sat, 9 May 2026 23:46:38 +0100 Message-ID: <20260509224824.3264567-13-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366924-725748B7-EE4BF64C/0/0 X-purgate-type: clean X-purgate-size: 1265 From: David Woodhouse If kvm_get_walltime_and_clockread() fails unexpectedly (the WARN case), restart the seqcount loop rather than falling back to a raw rdtsc() which would set KVM_CLOCK_TSC_STABLE without KVM_CLOCK_REALTIME. That code path could never actually be reached in practice: on 64-bit hosts, use_master_clock can only be true when the clocksource is TSC-based, and on 32-bit hosts, use_master_clock is never set. But the fallback to raw rdtsc() was misleading and the resulting flags combination was inconsistent. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 9b395c00ccf2..f2653eaccdf8 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3225,7 +3225,8 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; } else if (WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) { - data->host_tsc = rdtsc(); + put_cpu(); + continue; } #else data->host_tsc = rdtsc(); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304995.1577627 (Exim 4.92) (envelope-from ) id 1wLqTY-0005aA-G0; Sat, 09 May 2026 22:48:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304995.1577627; Sat, 09 May 2026 22:48:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTY-0005YC-1a; Sat, 09 May 2026 22:48:48 +0000 Received: by outflank-mailman (input) for mailman id 1304995; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xt-3C for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTT-002bXZ-Gi; Sun, 10 May 2026 00:48:43 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb8a3-bab6-0a2a0a5309dd-0a2a45028e02-46 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9ca-af86-0a2a45020019-5a9b5cc7d974-3 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTE-00000008wzN-1WDo; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJ3-1Fbj; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=6tRK559BiNuC9vPX6A/P9bB+NgbxmEIjWbF4mmHiKwg=; b=XdZwbo1A+QS0GQ4rSXUX4N1mON +BlsbG3jDpcSWQhV5QxKCntdc8Vov11hWedcSRVSsOFPwppBqsZ6Nis+O8bwl2CCSQ5hYR8W++geD vukV7rjaZBOrvt6I9xowd93yPY0C0Lzh/iojh9p1uQWpLnPfReYKg8eWZhCQMUPCsNXSqu/Y7toLg E6Frch+y/WEDPUhLCG957OQIe+Z+QGM3b4WJ3AXNaeyT5E4hHAIpCsvm122/2Vp2ysz/lvM+nk7kL WDy8f4TtKpFr0JcieI8f8+0F+JBj1RNoxvcmBf9YzAQnVG0oBiA+L4x/Lzr26MdYoNPIdFM9YVMzi 3sLkfLjQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 28/30] KVM: x86: Remove runtime Xen TSC frequency CPUID update Date: Sat, 9 May 2026 23:46:54 +0100 Message-ID: <20260509224824.3264567-29-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366922-7BF66161-A2170A75/0/0 X-purgate-type: clean X-purgate-size: 3108 From: David Woodhouse Remove the code in kvm_cpuid() that dynamically updates the Xen TSC info CPUID leaf at runtime. This code was updating the wrong sub-leaf anyway (0x40000x03/2 EAX is the *host* TSC frequency per the Xen ABI, not the guest frequency which belongs in 0x40000x03/0 ECX). Userspace now has all the information it needs to populate the Xen TSC info leaves (and the generic 0x40000010 timing leaf) at vCPU setup time: - KVM_GET_CLOCK_GUEST returns the pvclock_vcpu_time_info structure containing tsc_to_system_mul and tsc_shift (Xen leaf index 1) - KVM_VCPU_TSC_EFFECTIVE_FREQ returns the effective TSC and bus frequencies in kHz (Xen leaf index 2, and 0x40000010) - KVM_VCPU_TSC_SCALE returns the raw hardware scaling ratio for precise arithmetic (VMClock) This eliminates the last instance of KVM modifying guest CPUID entries at runtime for timing information. Signed-off-by: David Woodhouse --- arch/x86/kvm/cpuid.c | 16 ---------------- arch/x86/kvm/xen.h | 13 ------------- 2 files changed, 29 deletions(-) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 621d950ec692..826637a0b72d 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -2117,22 +2117,6 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, } else if (function == 0x80000007) { if (kvm_hv_invtsc_suppressed(vcpu)) *edx &= ~feature_bit(CONSTANT_TSC); - } else if (IS_ENABLED(CONFIG_KVM_XEN) && - kvm_xen_is_tsc_leaf(vcpu, function)) { - /* - * Update guest TSC frequency information if necessary. - * Ignore failures, there is no sane value that can be - * provided if KVM can't get the TSC frequency. - */ - if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) - kvm_guest_time_update(vcpu); - - if (index == 1) { - *ecx = vcpu->arch.pvclock_tsc_mul; - *edx = vcpu->arch.pvclock_tsc_shift; - } else if (index == 2) { - *eax = div_u64(vcpu->arch.hw_tsc_hz, 1000); - } } } else { *eax = *ebx = *ecx = *edx = 0; diff --git a/arch/x86/kvm/xen.h b/arch/x86/kvm/xen.h index 59e6128a7bd3..f372855857a8 100644 --- a/arch/x86/kvm/xen.h +++ b/arch/x86/kvm/xen.h @@ -50,14 +50,6 @@ static inline void kvm_xen_sw_enable_lapic(struct kvm_vcpu *vcpu) kvm_xen_inject_vcpu_vector(vcpu); } -static inline bool kvm_xen_is_tsc_leaf(struct kvm_vcpu *vcpu, u32 function) -{ - return static_branch_unlikely(&kvm_xen_enabled.key) && - vcpu->arch.xen.cpuid.base && - function <= vcpu->arch.xen.cpuid.limit && - function == (vcpu->arch.xen.cpuid.base | XEN_CPUID_LEAF(3)); -} - static inline bool kvm_xen_msr_enabled(struct kvm *kvm) { return static_branch_unlikely(&kvm_xen_enabled.key) && @@ -177,11 +169,6 @@ static inline bool kvm_xen_timer_enabled(struct kvm_vcpu *vcpu) { return false; } - -static inline bool kvm_xen_is_tsc_leaf(struct kvm_vcpu *vcpu, u32 function) -{ - return false; -} #endif int kvm_xen_hypercall(struct kvm_vcpu *vcpu); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304989.1577598 (Exim 4.92) (envelope-from ) id 1wLqTX-00056O-0T; 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Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzM-0Uid; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIv-0xnG; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=CvARcxGjW2rk76ZnbjloHmvArQA7vOXWK2cN1ZjzCjA=; b=JwWsCSTN0jP5CaRFdIC/kq7DJK 1ckbZPZwhNr+bWo+2Nhf9ylITeR8BeXmgLFP+SLIQy4R3DZLic8UmfJCBL5L/HKQUEiJRG0E/oNuN +lwLHmVzILBn/0iCKWTWSrft7nOvyYmtLxwuFUVmSHB8ERSs5oQFnzVtmRGkTjYFBlwInjCp4Xkjk DZsdQFZY+Wi0hj8gEaa+ri3S19xehlprECPd42H2HjvqS913SmW4HTcoBeS5SSq8WxjSdNReZYJMO P7XDr1BLUNqOsGb6V0VGGUsZ6d3Y6v65PQFbi1ulY6TtP16QxEvcTW/cb1Z5dK786u3iT28gS5bBR /Fo08+AA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 26/30] KVM: x86: Avoid redundant masterclock updates from multiple vCPUs Date: Sat, 9 May 2026 23:46:52 +0100 Message-ID: <20260509224824.3264567-27-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366924-1B77AF3B-836CBEAA/0/0 X-purgate-type: clean X-purgate-size: 4493 From: David Woodhouse When a masterclock update is triggered (e.g. by the clocksource change notifier), KVM_REQ_MASTERCLOCK_UPDATE is set on all vCPUs. Without this fix, each vCPU independently processes the request and redundantly re-executes the entire pvclock_update_vm_gtod_copy() sequence, serialized only by tsc_write_lock. Each redundant re-snapshot of the master clock reference point introduces potential clock drift. Fix this by having __kvm_start_pvclock_update() check, after acquiring the lock, whether the requesting vCPU's KVM_REQ_MASTERCLOCK_UPDATE is still set. If another vCPU already did the update and cleared it, bail out. Otherwise, clear the request on all other vCPUs before proceeding. The caller in vcpu_enter_guest() now uses kvm_test_request() (non-clearing) since the clearing is done inside __kvm_start_pvclock_update() under the lock. Suggested-by: Dongli Zhang Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 56 ++++++++++++++++++++++++++++++++++++---------- 1 file changed, 44 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 7d9ec0638d28..77dfd4455a4e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3259,10 +3259,39 @@ static void kvm_make_mclock_inprogress_request(struct kvm *kvm) kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS); } -static void __kvm_start_pvclock_update(struct kvm *kvm) +static void kvm_clear_mclock_inprogress_request(struct kvm *kvm) { + struct kvm_vcpu *vcpu; + unsigned long i; + + kvm_for_each_vcpu(i, vcpu, kvm) + kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu); +} + +static bool __kvm_start_pvclock_update(struct kvm *kvm, struct kvm_vcpu *requesting_vcpu) +{ + struct kvm_vcpu *vcpu; + unsigned long i; + raw_spin_lock_irq(&kvm->arch.tsc_write_lock); + + /* + * If another vCPU already did the update while we were waiting + * for the lock, our request will have been cleared. Bail out. + */ + if (requesting_vcpu && + !kvm_test_request(KVM_REQ_MASTERCLOCK_UPDATE, requesting_vcpu)) { + kvm_clear_mclock_inprogress_request(kvm); + raw_spin_unlock_irq(&kvm->arch.tsc_write_lock); + return false; + } + + /* The update is VM-wide; prevent other vCPUs from redoing it. */ + kvm_for_each_vcpu(i, vcpu, kvm) + kvm_clear_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu); + write_seqcount_begin(&kvm->arch.pvclock_sc); + return true; } static void kvm_start_pvclock_update(struct kvm *kvm) @@ -3270,7 +3299,7 @@ static void kvm_start_pvclock_update(struct kvm *kvm) kvm_make_mclock_inprogress_request(kvm); /* no guest entries from this point */ - __kvm_start_pvclock_update(kvm); + __kvm_start_pvclock_update(kvm, NULL); } static void kvm_end_pvclock_update(struct kvm *kvm) @@ -3279,22 +3308,25 @@ static void kvm_end_pvclock_update(struct kvm *kvm) struct kvm_vcpu *vcpu; unsigned long i; - write_seqcount_end(&ka->pvclock_sc); - raw_spin_unlock_irq(&ka->tsc_write_lock); kvm_for_each_vcpu(i, vcpu, kvm) kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); /* guest entries allowed */ - kvm_for_each_vcpu(i, vcpu, kvm) - kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu); + kvm_clear_mclock_inprogress_request(kvm); + + write_seqcount_end(&ka->pvclock_sc); + raw_spin_unlock_irq(&ka->tsc_write_lock); } -static void kvm_update_masterclock(struct kvm *kvm) +static void kvm_update_masterclock(struct kvm *kvm, struct kvm_vcpu *vcpu) { kvm_hv_request_tsc_page_update(kvm); - kvm_start_pvclock_update(kvm); - pvclock_update_vm_gtod_copy(kvm); - kvm_end_pvclock_update(kvm); + kvm_make_mclock_inprogress_request(kvm); + + if (__kvm_start_pvclock_update(kvm, vcpu)) { + pvclock_update_vm_gtod_copy(kvm); + kvm_end_pvclock_update(kvm); + } } /* @@ -11485,8 +11517,8 @@ static int vcpu_enter_guest(struct kvm_vcpu *vcpu) kvm_mmu_free_obsolete_roots(vcpu); if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu)) __kvm_migrate_timers(vcpu); - if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu)) - kvm_update_masterclock(vcpu->kvm); + if (kvm_test_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu)) + kvm_update_masterclock(vcpu->kvm, vcpu); if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu)) kvm_gen_kvmclock_update(vcpu); if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304992.1577606 (Exim 4.92) (envelope-from ) id 1wLqTX-0005C8-BL; Sat, 09 May 2026 22:48:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304992.1577606; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-0005B4-4l; Sat, 09 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1304992; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004xy-8i for xen-devel@lists.xenproject.org; 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dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=VZW3BYOsJBjCxrX0Ak3Y7mLfSYoVJvjVzeACh4h0wdA=; b=F8o2huYCyGm1b+IKEhxif0OKZe 1/VjHOyqiLIQDr1VUqRvk7k4ZwOHLp8x2xUQoPmNubIdn/Y9PGOOKLUCPS0Bd6huZraf2VXT69Tcy PrYoG0wU7gMusTyFns2Sk+299Y82Z4fHtRYuTFtZd8fvUT/6x9Lu9Uqy/UPrHonTZFD7kEszHE5Es s0CbR3wEQ7PbLtr3p6fRXS1cxQxf/q+QIwcW3ESwiOvm2ZnZymrCuIOOmVlJ0ZsoEgLs3M07cKcok GwmW2q+R9tkBkUh3woXo6m/KggKAhiNjMtxICUNY9cdd96vI/ocFJGk0T4R8oFSPGI1cygwDPHqGH zDppAOQA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 06/30] KVM: x86: Explicitly disable TSC scaling without CONSTANT_TSC Date: Sat, 9 May 2026 23:46:32 +0100 Message-ID: <20260509224824.3264567-7-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1778366924-AEF58FF4-D61C0A67/0/0 X-purgate-type: clean X-purgate-size: 1884 From: David Woodhouse KVM does make an attempt to cope with non-constant TSC, and has notifiers to handle host TSC frequency changes. However, it *only* adjusts the KVM clock, and doesn't adjust TSC frequency scaling when the host changes. This is presumably because non-constant TSCs were fixed in hardware long before TSC scaling was implemented, so there should never be real CPUs which have TSC scaling but *not* CONSTANT_TSC. Such a combination could potentially happen in some odd L1 nesting environment, but it isn't worth trying to support it. Just make the dependency explicit. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/svm/svm.c | 3 ++- arch/x86/kvm/vmx/vmx.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index e7fdd7a9c280..7817752533fe 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -5546,7 +5546,8 @@ static __init int svm_hardware_setup(void) XFEATURE_MASK_BNDCSR); if (tsc_scaling) { - if (!boot_cpu_has(X86_FEATURE_TSCRATEMSR)) { + if (!boot_cpu_has(X86_FEATURE_TSCRATEMSR) || + !boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { tsc_scaling = false; } else { pr_info("TSC scaling supported\n"); diff --git a/arch/x86/kvm/vmx/vmx.c b/arch/x86/kvm/vmx/vmx.c index 5c2c33a5f7dc..4f6035d72bbe 100644 --- a/arch/x86/kvm/vmx/vmx.c +++ b/arch/x86/kvm/vmx/vmx.c @@ -8696,7 +8696,7 @@ __init int vmx_hardware_setup(void) if (!enable_apicv || !cpu_has_vmx_ipiv()) enable_ipiv = false; - if (cpu_has_vmx_tsc_scaling()) + if (cpu_has_vmx_tsc_scaling() && boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) kvm_caps.has_tsc_control = true; kvm_caps.max_tsc_scaling_ratio = KVM_VMX_TSC_MULTIPLIER_MAX; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304997.1577664 (Exim 4.92) (envelope-from ) id 1wLqTa-0006ce-Sh; Sat, 09 May 2026 22:48:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304997.1577664; Sat, 09 May 2026 22:48:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTa-0006aw-Df; Sat, 09 May 2026 22:48:50 +0000 Received: by outflank-mailman (input) for mailman id 1304997; Sat, 09 May 2026 22:48:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTY-0005Zz-Aa for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTX-002bXZ-Ng; Sun, 10 May 2026 00:48:47 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb9cf-bab6-0a2a0a5309dd-0a2a450bc9d2-0 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-212f-0a2a450b0019-5a9b3222ce9e-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060L9-2Pfv; Sat, 09 May 2026 22:48:32 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHV-0c3b; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=QaE/jvGdpKCrMu7vuBQqqJqP5vWDROke7W8G0eRZk4g=; b=DoOTPUu0tDOpDhNUD5GD3VymGC agkMnNVNF3tXlzjfcJ3f8fgMLH0TVNE6lTDA+SmaBZpdndkRQvdUfYpNNQUjYo4h9pmFg1ghTy6JK TJTD6SNzc2p9xzSd92A3Nod6poc4y3RYpG6snRh5AMmLjSitEoxCD9SnH0EZvrtQ4BiPzgnLMFjUy usxXQCvIHAmTY5b1qUnWerxbab01zCu1M4crES3M4j2BRAHhvBHu1n2xa4oyoj0CIviPuT/Ak90um Wp9wF78NVSSs0glwlOn0E3FZMCPVRqMhutT0hqOqdevTMtFNPl2n/xRBHkhARcz3GtW5FPLogwoms 3soFmUOA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration Date: Sat, 9 May 2026 23:46:30 +0100 Message-ID: <20260509224824.3264567-5-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366927-1A971F3B-EEF38261/0/0 X-purgate-type: clean X-purgate-size: 10255 From: Jack Allister In the common case (where kvm->arch.use_master_clock is true), the KVM clock is defined as a simple arithmetic function of the guest TSC, based on a reference point stored in kvm->arch.master_kernel_ns and kvm->arch.master_cycle_now. The existing KVM_[GS]ET_CLOCK functionality does not allow for this relationship to be precisely saved and restored by userspace. All it can currently do is set the KVM clock at a given UTC reference time, which is necessarily imprecise. So on live update, the guest TSC can remain cycle accurate at precisely the same offset from the host TSC, but there is no way for userspace to restore the KVM clock accurately. Even on live migration to a new host, where the accuracy of the guest time-keeping is fundamentally limited by the accuracy of wallclock synchronization between the source and destination hosts, the clock jump experienced by the guest's TSC and its KVM clock should at least be *consistent*. Even when the guest TSC suffers a discontinuity, its KVM clock should still remain the *same* arithmetic function of the guest TSC, and not suffer an *additional* discontinuity. To allow for accurate migration of the KVM clock, add per-vCPU ioctls which save and restore the actual PV clock info in pvclock_vcpu_time_info. The restoration in KVM_SET_CLOCK_GUEST works by creating a new reference point in time just as kvm_update_masterclock() does, and calculating the corresponding guest TSC value. This guest TSC value is then passed through the user-provided pvclock structure to generate the *intended* KVM clock value at that point in time, and through the *actual* KVM clock calculation. Then kvm->arch.kvmclock_offset is adjusted to eliminate the difference. Where kvm->arch.use_master_clock is false (because the host TSC is unreliable, or the guest TSCs are configured strangely), the KVM clock is *not* defined as a function of the guest TSC so KVM_GET_CLOCK_GUEST returns an error. In this case, as documented, userspace shall use the legacy KVM_GET_CLOCK ioctl. The loss of precision is acceptable in this case since the clocks are imprecise in this mode anyway. On *restoration*, if kvm->arch.use_master_clock is false, an error is returned for similar reasons and userspace shall fall back to using KVM_SET_CLOCK. This does mean that, as documented, userspace needs to use *both* KVM_GET_CLOCK_GUEST and KVM_GET_CLOCK and send both results with the migration data (unless the intent is to refuse to resume on a host with bad TSC). Co-developed-by: David Woodhouse Signed-off-by: David Woodhouse Signed-off-by: Jack Allister Reviewed-by: Paul Durrant Cc: Dongli Zhang --- Documentation/virt/kvm/api.rst | 37 ++++++++ arch/x86/kvm/x86.c | 151 +++++++++++++++++++++++++++++++++ include/uapi/linux/kvm.h | 3 + 3 files changed, 191 insertions(+) diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst index 52bbbb553ce1..2268b4442df6 100644 --- a/Documentation/virt/kvm/api.rst +++ b/Documentation/virt/kvm/api.rst @@ -6553,6 +6553,43 @@ KVM_S390_KEYOP_SSKE Sets the storage key for the guest address ``guest_addr`` to the key specified in ``key``, returning the previous value in ``key``. +4.145 KVM_GET_CLOCK_GUEST +---------------------------- + +:Capability: none +:Architectures: x86_64 +:Type: vcpu ioctl +:Parameters: struct pvclock_vcpu_time_info (out) +:Returns: 0 on success, <0 on error + +Retrieves the current time information structure used for KVM/PV clocks, +in precisely the form advertised to the guest vCPU, which gives parameters +for a direct conversion from a guest TSC value to nanoseconds. + +When the KVM clock is not in "master clock" mode, for example because the +host TSC is unreliable or the guest TSCs are oddly configured, the KVM clock +is actually defined by the host CLOCK_MONOTONIC_RAW instead of the guest TSC. +In this case, the KVM_GET_CLOCK_GUEST ioctl returns -EINVAL. + +4.146 KVM_SET_CLOCK_GUEST +---------------------------- + +:Capability: none +:Architectures: x86_64 +:Type: vcpu ioctl +:Parameters: struct pvclock_vcpu_time_info (in) +:Returns: 0 on success, <0 on error + +Sets the KVM clock (for the whole VM) in terms of the vCPU TSC, using the +pvclock structure as returned by KVM_GET_CLOCK_GUEST. This allows the precise +arithmetic relationship between guest TSC and KVM clock to be preserved by +userspace across migration. + +When the KVM clock is not in "master clock" mode, and the KVM clock is actually +defined by the host CLOCK_MONOTONIC_RAW, this ioctl returns -EINVAL. Userspace +may choose to set the clock using the less precise KVM_SET_CLOCK ioctl, or may +choose to fail, denying migration to a host whose TSC is misbehaving. + .. _kvm_run: 5. The kvm_run structure diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d9ef165df6a1..d1327d5fba3f 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6205,6 +6205,149 @@ static int kvm_get_reg_list(struct kvm_vcpu *vcpu, return 0; } +#ifdef CONFIG_X86_64 +static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) +{ + struct pvclock_vcpu_time_info hv_clock = {}; + struct kvm_vcpu_arch *vcpu = &v->arch; + struct kvm_arch *ka = &v->kvm->arch; + unsigned int seq; + + /* + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the pvclock + * has never been generated at all, call kvm_guest_time_update(). + */ + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, v) || !vcpu->hw_tsc_hz) { + int idx = srcu_read_lock(&v->kvm->srcu); + int ret = kvm_guest_time_update(v); + + srcu_read_unlock(&v->kvm->srcu, idx); + if (ret) + return -EINVAL; + } + + /* + * Reconstruct the pvclock from the master clock state, matching + * exactly what kvm_guest_time_update() writes to the guest. + */ + do { + seq = read_seqcount_begin(&ka->pvclock_sc); + + if (!ka->use_master_clock) + return -EINVAL; + + hv_clock.tsc_timestamp = kvm_read_l1_tsc(v, ka->master_cycle_now); + hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + } while (read_seqcount_retry(&ka->pvclock_sc, seq)); + + hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; + hv_clock.tsc_to_system_mul = vcpu->pvclock_tsc_mul; + hv_clock.flags = PVCLOCK_TSC_STABLE_BIT; + + if (copy_to_user(argp, &hv_clock, sizeof(hv_clock))) + return -EFAULT; + + return 0; +} + +/* + * Reverse the calculation in the hv_clock definition. + * + * time_ns = ( (cycles << shift) * mul ) >> 32; + * (although shift can be negative, so that's bad C) + * + * So for a single second, + * NSEC_PER_SEC = ( ( FREQ_HZ << shift) * mul ) >> 32 + * NSEC_PER_SEC << 32 = ( FREQ_HZ << shift ) * mul + * ( NSEC_PER_SEC << 32 ) / mul = FREQ_HZ << shift + * ( NSEC_PER_SEC << 32 ) / mul ) >> shift = FREQ_HZ + */ +static u64 hvclock_to_hz(u32 mul, s8 shift) +{ + u64 tm = NSEC_PER_SEC << 32; + + /* Maximise precision. Shift right until the top bit is set */ + tm <<= 2; + shift += 2; + + /* While 'mul' is even, increase the shift *after* the division */ + while (!(mul & 1)) { + shift++; + mul >>= 1; + } + + tm /= mul; + + if (shift > 0) + return tm >> shift; + else + return tm << -shift; +} + +static int kvm_vcpu_ioctl_set_clock_guest(struct kvm_vcpu *v, void __user *argp) +{ + struct pvclock_vcpu_time_info user_hv_clock; + struct kvm *kvm = v->kvm; + struct kvm_arch *ka = &kvm->arch; + u64 curr_tsc_hz, user_tsc_hz; + u64 user_clk_ns; + u64 guest_tsc; + int rc = 0; + + if (copy_from_user(&user_hv_clock, argp, sizeof(user_hv_clock))) + return -EFAULT; + + if (!user_hv_clock.tsc_to_system_mul) + return -EINVAL; + + user_tsc_hz = hvclock_to_hz(user_hv_clock.tsc_to_system_mul, + user_hv_clock.tsc_shift); + + kvm_hv_request_tsc_page_update(kvm); + kvm_start_pvclock_update(kvm); + pvclock_update_vm_gtod_copy(kvm); + + if (!ka->use_master_clock) { + rc = -EINVAL; + goto out; + } + + curr_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (unlikely(curr_tsc_hz == 0)) { + rc = -EINVAL; + goto out; + } + + if (kvm_caps.has_tsc_control) + curr_tsc_hz = kvm_scale_tsc(curr_tsc_hz, + v->arch.l1_tsc_scaling_ratio); + + /* + * Allow for a discrepancy of 1 kHz either way between the TSC + * frequency used to generate the user's pvclock and the current + * host's measured frequency, since they may not precisely match. + */ + if (user_tsc_hz < curr_tsc_hz - 1000 || + user_tsc_hz > curr_tsc_hz + 1000) { + rc = -ERANGE; + goto out; + } + + /* + * Calculate the guest TSC at the new reference point, and the + * corresponding KVM clock value according to user_hv_clock. + * Adjust kvmclock_offset so both definitions agree. + */ + guest_tsc = kvm_read_l1_tsc(v, ka->master_cycle_now); + user_clk_ns = __pvclock_read_cycles(&user_hv_clock, guest_tsc); + ka->kvmclock_offset = user_clk_ns - ka->master_kernel_ns; + +out: + kvm_end_pvclock_update(kvm); + return rc; +} +#endif + long kvm_arch_vcpu_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg) { @@ -6605,6 +6748,14 @@ long kvm_arch_vcpu_ioctl(struct file *filp, srcu_read_unlock(&vcpu->kvm->srcu, idx); break; } +#ifdef CONFIG_X86_64 + case KVM_SET_CLOCK_GUEST: + r = kvm_vcpu_ioctl_set_clock_guest(vcpu, argp); + break; + case KVM_GET_CLOCK_GUEST: + r = kvm_vcpu_ioctl_get_clock_guest(vcpu, argp); + break; +#endif #ifdef CONFIG_KVM_HYPERV case KVM_GET_SUPPORTED_HV_CPUID: r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp); diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h index 6c8afa2047bf..9b50191b859c 100644 --- a/include/uapi/linux/kvm.h +++ b/include/uapi/linux/kvm.h @@ -1669,4 +1669,7 @@ struct kvm_pre_fault_memory { __u64 padding[5]; }; +#define KVM_SET_CLOCK_GUEST _IOW(KVMIO, 0xd6, struct pvclock_vcpu_time_info) +#define KVM_GET_CLOCK_GUEST _IOR(KVMIO, 0xd7, struct pvclock_vcpu_time_info) + #endif /* __LINUX_KVM_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304996.1577636 (Exim 4.92) (envelope-from ) id 1wLqTY-0005jS-V1; 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bh=wfrMtj5ZnQw5qzm4tVj9nJs76L69YTBE+psOfwhJUqs=; b=WH1+Pf0sgeUE/1kLOZi2zQe61+ clX/XjFXxTT+HlO735BJ+oBKA2xFoMIwzCRYs9uPFc+tsR2LTvxBT9YU2rhNSq4xECjvRfuLc5zvP uUPr2hiZ/luP/qeJhQYWXATigOx1W799RsiWGCpFIGVbB6n1zkpYPwFnjZDgbFJLCzS+5x7nuIzvk aISbB4j22HT0p5iIcmczYYifqI4UCo1f4iaIVWGou3HmdziKDWtow1GUkQEwb1vSxtNUPcvB1WESA 20D4xRu8stcXhQ493WDRq1vz29jJfNmBc2S8KOifh8+DNtKnbo0Js6r6FJVLPKtAmF3LKaTEaWwmV SJuOPcbw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 02/30] KVM: x86: Improve accuracy of KVM clock when TSC scaling is in force Date: Sat, 9 May 2026 23:46:28 +0100 Message-ID: <20260509224824.3264567-3-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366925-BE776DB1-84D15631/0/0 X-purgate-type: clean X-purgate-size: 4034 From: David Woodhouse The kvm_guest_time_update() function scales the host TSC frequency to the guest's using kvm_scale_tsc() and the v->arch.l1_tsc_scaling_ratio scaling ratio previously calculated for that vCPU. Then calculates the scaling factors for the KVM clock itself based on that guest TSC frequency. However, it uses kHz as the unit when scaling, and then multiplies by 1000 only at the end. With a host TSC frequency of 3000MHz and a guest set to 2500MHz, the result of kvm_scale_tsc() will actually come out at 2,499,999kHz. So the KVM clock advertised to the guest is based on a frequency of 2,499,999,000 Hz. By using Hz as the unit from the beginning, the KVM clock would be based on a more accurate frequency of 2,499,999,999 Hz in this example. Use u64 for the hw_tsc_hz field since an unsigned int would overflow for TSC frequencies above 4GHz. Use div_u64() for the Xen CPUID leaf to play nice with 32-bit kernels. Fixes: 78db6a503796 ("KVM: x86: rewrite handling of scaled TSC for kvmclock") Reviewed-by: Paul Durrant Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 2 +- arch/x86/kvm/cpuid.c | 2 +- arch/x86/kvm/x86.c | 17 +++++++++-------- 3 files changed, 11 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index c470e40a00aa..37264212c7df 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -950,7 +950,7 @@ struct kvm_vcpu_arch { gpa_t time; s8 pvclock_tsc_shift; u32 pvclock_tsc_mul; - unsigned int hw_tsc_khz; + u64 hw_tsc_hz; struct gfn_to_pfn_cache pv_time; /* set guest stopped flag in pvclock flags field */ bool pvclock_set_guest_stopped_request; diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index e69156b54cff..621d950ec692 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -2131,7 +2131,7 @@ bool kvm_cpuid(struct kvm_vcpu *vcpu, u32 *eax, u32 *ebx, *ecx = vcpu->arch.pvclock_tsc_mul; *edx = vcpu->arch.pvclock_tsc_shift; } else if (index == 2) { - *eax = vcpu->arch.hw_tsc_khz; + *eax = div_u64(vcpu->arch.hw_tsc_hz, 1000); } } } else { diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0a1b63c63d1a..d9ef165df6a1 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3314,7 +3314,8 @@ static void kvm_setup_guest_pvclock(struct pvclock_vcpu_time_info *ref_hv_clock, int kvm_guest_time_update(struct kvm_vcpu *v) { struct pvclock_vcpu_time_info hv_clock = {}; - unsigned long flags, tgt_tsc_khz; + unsigned long flags; + u64 tgt_tsc_hz; unsigned seq; struct kvm_vcpu_arch *vcpu = &v->arch; struct kvm_arch *ka = &v->kvm->arch; @@ -3340,8 +3341,8 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* Keep irq disabled to prevent changes to the clock */ local_irq_save(flags); - tgt_tsc_khz = get_cpu_tsc_khz(); - if (unlikely(tgt_tsc_khz == 0)) { + tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + if (unlikely(tgt_tsc_hz == 0)) { local_irq_restore(flags); kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); return 1; @@ -3376,16 +3377,16 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* With all the info we got, fill in the values */ if (kvm_caps.has_tsc_control) { - tgt_tsc_khz = kvm_scale_tsc(tgt_tsc_khz, + tgt_tsc_hz = kvm_scale_tsc(tgt_tsc_hz, v->arch.l1_tsc_scaling_ratio); - tgt_tsc_khz = tgt_tsc_khz ? : 1; + tgt_tsc_hz = tgt_tsc_hz ? : 1; } - if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) { - kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL, + if (unlikely(vcpu->hw_tsc_hz != tgt_tsc_hz)) { + kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_hz, &vcpu->pvclock_tsc_shift, &vcpu->pvclock_tsc_mul); - vcpu->hw_tsc_khz = tgt_tsc_khz; + vcpu->hw_tsc_hz = tgt_tsc_hz; } hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304991.1577601 (Exim 4.92) (envelope-from ) id 1wLqTX-00058N-6S; Sat, 09 May 2026 22:48:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304991.1577601; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTW-000575-U7; Sat, 09 May 2026 22:48:46 +0000 Received: by outflank-mailman (input) for mailman id 1304991; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTU-0004xu-Pl for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTT-00DG64-Lm; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb98b-e002-0a2a0a5209dd-0a2a4508e700-24 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9c9-63b5-0a2a45080019-5a9b5cc79ec6-3 for ; Sun, 10 May 2026 00:48:42 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzB-0RLs; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHp-297o; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=Rlefrv035dE/A4ZfqxoNxpMximz7sVxUML4oSeehurg=; b=BpdCMag+qQeRQ5HUSztZ5825NR CwsTyPlVzrIaUi3MD2Pgs7SkvujS/dAokWA6r0Uea/18K0TZbpMa+C1GC+RQlvY0ZYeA3V0RLgLyH p84QoHNsDoHOem2wktR9d4GMZ4ZXX4ztZGHkA1B2w/VbuGQwNcW4Mp0D5Gi7Vhk5jbzcpmAiPdeOu AxF8VicBNW8EGM7sV+t5BG+wftPQ6ysKcPuc12W/1jcsihSjGgIiHhma2EKG3q+C8LRMLwHtaGaiH 454cyuN/RcRhYiF83g1XnCoTGkyuFg3UanYe4rklrxhs9DBPoMmVvUToHOkIEJ/RUQMiq/LdRh6py hcsFWZkw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 09/30] KVM: x86: WARN if kvm_get_walltime_and_clockread() fails unexpectedly Date: Sat, 9 May 2026 23:46:35 +0100 Message-ID: <20260509224824.3264567-10-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366922-B6368DB1-AA82E900/0/0 X-purgate-type: clean X-purgate-size: 1130 From: David Woodhouse The master clock depends on the pvclock being based on TSC, so the only way kvm_get_walltime_and_clockread() can fail when use_master_clock is true is if the clocksource changed and use_master_clock is stale, in which case a seqcount retry should be pending. Add a WARN_ON_ONCE if the seqcount has not been invalidated, to catch any case where the failure is genuinely unexpected. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1e1834533e98..ccdfd3fa3402 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3474,7 +3474,8 @@ uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm) local_tsc_khz = get_cpu_tsc_khz(); if (local_tsc_khz && - !kvm_get_walltime_and_clockread(&ts, &host_tsc)) + !kvm_get_walltime_and_clockread(&ts, &host_tsc) && + WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) local_tsc_khz = 0; /* Fall back to old method */ put_cpu(); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1304994.1577620 (Exim 4.92) (envelope-from ) id 1wLqTY-0005SX-29; Sat, 09 May 2026 22:48:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1304994.1577620; Sat, 09 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTX-0005Qw-OT; Sat, 09 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1304994; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqTV-0004yF-Af for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:48:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqTU-00DG64-Nq; Sun, 10 May 2026 00:48:44 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffb98b-e002-0a2a0a5209dd-0a2a4508e700-28 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cc-63b5-0a2a45080019-5a9b5cc7e076-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzG-0XFY; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhI9-2vDj; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=1qL8Ver0eVRy2vup5TVneuXo0fgeLVr0y5FVTqd09W0=; b=TIN9a1E8sNcAlsWC1Aa8d+j4n2 ykdU+MKOO6mMS//0nZ9gk/6GtNeig/iy0ktOWfZxfE3Y9oC+BDjozpK+YTRlioH1mCNDrnrIIELfn Dk90c8X8czam38NJuoQCGkKSyonAfsIF0B4Gxy6aAg4JXguhERu1nsTDdjXKIBO+eLUfCrpEUY/KI TvcJr5SlC/FZt8Ny/XRCRRj8ai9g6+Wohw9ZHE3J4GVELHu0tc8Vjezkb9vglY98NiUkuDsAWG3W4 8Keg1ENmXJQKCp20kaYBBMtgVeR3RnqtpIwL3rLtS4PlhMLY7MseveZJDp6XxLDLJem5Fzuh0or1E O8puK54w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 14/30] KVM: x86: Use get_kvmclock() in kvm_get_wall_clock_epoch() Date: Sat, 9 May 2026 23:46:40 +0100 Message-ID: <20260509224824.3264567-15-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366924-BDB6CDB1-357D2A13/0/0 X-purgate-type: clean X-purgate-size: 2903 From: David Woodhouse Now that get_kvmclock() correctly handles TSC scaling and captures both wallclock and kvmclock from the same TSC reading, kvm_get_wall_clock_epoch() can simply call it instead of duplicating the pvclock computation. This eliminates the last instance of the "definition C" kvmclock calculation that computed nanoseconds directly from the host TSC without accounting for guest TSC scaling. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 58 +++++++--------------------------------------- 1 file changed, 8 insertions(+), 50 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 09b00906b1de..2bbc2c7ac449 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3491,60 +3491,18 @@ int kvm_guest_time_update(struct kvm_vcpu *v) */ uint64_t kvm_get_wall_clock_epoch(struct kvm *kvm) { -#ifdef CONFIG_X86_64 - struct pvclock_vcpu_time_info hv_clock; - struct kvm_arch *ka = &kvm->arch; - unsigned long seq, local_tsc_khz; - struct timespec64 ts; - uint64_t host_tsc; - - do { - seq = read_seqcount_begin(&ka->pvclock_sc); - - local_tsc_khz = 0; - if (!ka->use_master_clock) - break; - - /* - * The TSC read and the call to get_cpu_tsc_khz() must happen - * on the same CPU. - */ - get_cpu(); - - local_tsc_khz = get_cpu_tsc_khz(); - - if (local_tsc_khz && - !kvm_get_walltime_and_clockread(&ts, &host_tsc) && - WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) - local_tsc_khz = 0; /* Fall back to old method */ - - put_cpu(); - - /* - * These values must be snapshotted within the seqcount loop. - * After that, it's just mathematics which can happen on any - * CPU at any time. - */ - hv_clock.tsc_timestamp = ka->master_cycle_now; - hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + struct kvm_clock_data data; - } while (read_seqcount_retry(&ka->pvclock_sc, seq)); + get_kvmclock(kvm, &data); /* - * If the conditions were right, and obtaining the wallclock+TSC was - * successful, calculate the KVM clock at the corresponding time and - * subtract one from the other to get the guest's epoch in nanoseconds - * since 1970-01-01. + * If get_kvmclock() captured both wallclock and kvmclock from the + * same TSC reading, use them for a precise epoch calculation. */ - if (local_tsc_khz) { - kvm_get_time_scale(NSEC_PER_SEC, local_tsc_khz * NSEC_PER_USEC, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - return ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec - - __pvclock_read_cycles(&hv_clock, host_tsc); - } -#endif - return ktime_get_real_ns() - get_kvmclock_ns(kvm); + if (data.flags & KVM_CLOCK_REALTIME) + return data.realtime - data.clock; + + return ktime_get_real_ns() - data.clock; } /* -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305070.1577691 (Exim 4.92) (envelope-from ) id 1wLqWn-00030c-HD; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305070.1577691; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-00030U-CQ; Sat, 09 May 2026 22:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1305070; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWl-0002wM-Mi for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqWk-008rH7-WF; Sun, 10 May 2026 00:52:07 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba8d-2eae-0a2a0a5409dd-0a2a4509c56c-4 for ; Sun, 10 May 2026 00:52:06 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9e2-2497-0a2a45090019-5a9b5cc7e918-3 for ; Sun, 10 May 2026 00:49:06 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz5-0QFm; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTB-0000000DhHJ-44Nq; Sat, 09 May 2026 23:48:25 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=TZcXqNntDdHe2w9Q79uCDKAXjVj99JYmMNiVQxMISEk=; b=RYTR6PWoDUrLsNMTzdy0wN2kqO p2Ct4KIVednYPMMXB0h+BxNxxY7O6nyKBfNP26vfbtWUonLSjWNKqF8JNkVVWSgJgZl4CyajD+edo 4EZlrbjl/OqTlok1XxDPd5FKMil3Wdsji/F6cFiRBrNRtoexB+/kFQLLzZF6BGgqQAlB2dFrOjpl2 tKJmulW3eInQuCu10yq4buJjH3yMHj4IgjJlcUW41Feia/vkvndFrmwDxFdpdhVhXixJEvjKItda0 eNWx5YWoDjbrSh11HV9CZ6JTdwttGJYpV1E8mDXXI8K+qyit3Bfka8oTtZN0UDnOxmjR6dYimmjQ5 frlllr1w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 01/30] KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init() Date: Sat, 9 May 2026 23:46:27 +0100 Message-ID: <20260509224824.3264567-2-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1778366946-4015DA53-E50630F4/0/0 X-purgate-type: clean X-purgate-size: 4433 From: David Woodhouse The KVM clock is an interesting thing. It is defined as "nanoseconds since the guest was created", but in practice it runs at two *different* rates — or three different rates, if you count implementation bugs. Definition A is that it runs synchronously with the CLOCK_MONOTONIC_RAW of the host, with a delta of kvm->arch.kvmclock_offset. But that version doesn't actually get used in the common case, where the host has a reliable TSC and the guest TSCs are all running at the same rate and in sync with each other, and kvm->arch.use_master_clock is set. In that common case, definition B is used: There is a reference point in time at kvm->arch.master_kernel_ns (again a CLOCK_MONOTONIC_RAW time), and a corresponding host TSC value kvm->arch.master_cycle_now. This fixed point in time is converted to guest units (the time offset by kvmclock_offset and the TSC Value scaled and offset to be a guest TSC value) and advertised to the guest in the pvclock structure. While in this 'use_master_clock' mode, the fixed point in time never needs to be changed, and the clock runs precisely in time with the guest TSC, at the rate advertised in the pvclock structure. The third definition C is implemented in kvm_get_wall_clock_epoch() and __get_kvmclock(), using the master_cycle_now and master_kernel_ns fields but converting the *host* TSC cycles directly to a value in nanoseconds instead of scaling via the guest TSC. One might naïvely think that all three definitions are identical, since CLOCK_MONOTONIC_RAW is not skewed by NTP frequency corrections; all three are just the result of counting the host TSC at a known frequency, or the scaled guest TSC at a known precise fraction of the host's frequency. The problem is with arithmetic precision, and the way that frequency scaling is done in a division-free way by multiplying by a scale factor, then shifting right. In practice, all three ways of calculating the KVM clock will suffer a systemic drift from each other. Eventually, definition C should just be eliminated. Commit 451a707813ae ("KVM: x86/xen: improve accuracy of Xen timers") worked around it for the specific case of Xen timers, which are defined in terms of the KVM clock and suffered from a continually increasing error in timer expiry times. That commit notes that get_kvmclock_ns() is non-trivial to fix and says "I'll come back to that", which remains true. Definitions A and B do need to coexist, the former to handle the case where the host or guest TSC is suboptimally configured. But KVM should be more careful about switching between them, and the discontinuity in guest time which could result. In particular, KVM_REQ_MASTERCLOCK_UPDATE will take a new snapshot of time as the reference in master_kernel_ns and master_cycle_now, yanking the guest's clock back to match definition A at that moment. When invoked from in 'use_master_clock' mode, kvm_update_masterclock() should probably *adjust* kvm->arch.kvmclock_offset to account for the drift, instead of yanking the clock back to definition A. But in the meantime there are a bunch of places where it just doesn't need to be invoked at all. To start with: there is no need to do such an update when a Xen guest populates the shared_info page. This seems to have been a hangover from the very first implementation of shared_info which automatically populated the vcpu_info structures at their default locations, but even then it should just have raised KVM_REQ_CLOCK_UPDATE on each vCPU instead of using KVM_REQ_MASTERCLOCK_UPDATE. And now that userspace is expected to explicitly set the vcpu_info even in its default locations, there's not even any need for that either. Fixes: 629b5348841a ("KVM: x86/xen: update wallclock region") Reviewed-by: Paul Durrant Signed-off-by: David Woodhouse --- arch/x86/kvm/xen.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c index 91fd3673c09a..82e34edbfdbd 100644 --- a/arch/x86/kvm/xen.c +++ b/arch/x86/kvm/xen.c @@ -98,8 +98,6 @@ static int kvm_xen_shared_info_init(struct kvm *kvm) wc->version = wc_version + 1; read_unlock_irq(&gpc->lock); - kvm_make_all_cpus_request(kvm, KVM_REQ_MASTERCLOCK_UPDATE); - out: srcu_read_unlock(&kvm->srcu, idx); return ret; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305069.1577685 (Exim 4.92) (envelope-from ) id 1wLqWn-0002xT-7s; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305069.1577685; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-0002xM-4n; Sat, 09 May 2026 22:52:09 +0000 Received: by outflank-mailman (input) for mailman id 1305069; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWl-0002wR-On for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqWl-008rH7-5c; Sun, 10 May 2026 00:52:07 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-28 for ; Sun, 10 May 2026 00:52:06 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9e2-7371-0a2a45060019-5a9b5cc7e19a-3 for ; Sun, 10 May 2026 00:49:06 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz7-0Xnk; Sat, 09 May 2026 22:48:34 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHP-0ITl; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=cy4WX+pEhq0ONnRd44jsWeJgn8jdEFwX+WNyOailsXI=; b=f1v81ARMTELtkK8Uo8Dot8XJtu ZPciDZdzdNb1UHVK8ThK5p7adwR8E97R+9zIyV0sMXwSSyxjd4IvQlFS1KguGP5C+dFNoPz2650YT vZPBfyVoT3pRwi4VvjZVlaifWMSpT8PK8VePe/zBIi4e47aMk1d9kmUFgZknxrqOXL2hEvnpa6Snd y4uvxo7khgiNAVT2itX+II+hxxOa7kgC788aR89gNlujoCfM6pkUPukM1rscIT6j4W8yH9v0XoPYA LkcLMKnb6NvFlwXfeMKBZDHIP502+a0Hxb+TlAS4PXWuTHMYVmQlYlBXe0VjTlPt4/nVgJdkX0n4H 2lt+5C2w==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 03/30] UAPI: x86: Move pvclock-abi to UAPI for x86 platforms Date: Sat, 9 May 2026 23:46:29 +0100 Message-ID: <20260509224824.3264567-4-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366946-84964D75-378A9408/0/0 X-purgate-type: clean X-purgate-size: 2944 From: Jack Allister A subsequent commit will provide a new KVM interface for performing a fixup/correction of the KVM clock against the reference TSC. The KVM_[GS]ET_CLOCK_GUEST API requires a pvclock_vcpu_time_info, as such the caller must know about this definition. Move the definition to the UAPI folder so that it is exported to usermode and also change the type definitions to use the standard for UAPI exports. Signed-off-by: Jack Allister Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- MAINTAINERS | 4 +-- arch/x86/include/{ => uapi}/asm/pvclock-abi.h | 27 ++++++++++--------- 2 files changed, 17 insertions(+), 14 deletions(-) rename arch/x86/include/{ => uapi}/asm/pvclock-abi.h (82%) diff --git a/MAINTAINERS b/MAINTAINERS index e0b307b2108c..e49676955c0c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -14406,7 +14406,7 @@ S: Supported T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git F: arch/um/include/asm/kvm_para.h F: arch/x86/include/asm/kvm_para.h -F: arch/x86/include/asm/pvclock-abi.h +F: arch/x86/include/uapi/asm/pvclock-abi.h F: arch/x86/include/uapi/asm/kvm_para.h F: arch/x86/kernel/kvm.c F: arch/x86/kernel/kvmclock.c @@ -29087,7 +29087,7 @@ R: Boris Ostrovsky L: xen-devel@lists.xenproject.org (moderated for non-subscribers) S: Supported F: arch/x86/configs/xen.config -F: arch/x86/include/asm/pvclock-abi.h +F: arch/x86/include/uapi/asm/pvclock-abi.h F: arch/x86/include/asm/xen/ F: arch/x86/platform/pvh/ F: arch/x86/xen/ diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/uapi/asm/pvclock-abi.h similarity index 82% rename from arch/x86/include/asm/pvclock-abi.h rename to arch/x86/include/uapi/asm/pvclock-abi.h index b9fece5fc96d..6d70cf640362 100644 --- a/arch/x86/include/asm/pvclock-abi.h +++ b/arch/x86/include/uapi/asm/pvclock-abi.h @@ -1,6 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_PVCLOCK_ABI_H #define _ASM_X86_PVCLOCK_ABI_H + +#include + #ifndef __ASSEMBLER__ /* @@ -24,20 +27,20 @@ */ struct pvclock_vcpu_time_info { - u32 version; - u32 pad0; - u64 tsc_timestamp; - u64 system_time; - u32 tsc_to_system_mul; - s8 tsc_shift; - u8 flags; - u8 pad[2]; + __u32 version; + __u32 pad0; + __u64 tsc_timestamp; + __u64 system_time; + __u32 tsc_to_system_mul; + __s8 tsc_shift; + __u8 flags; + __u8 pad[2]; } __attribute__((__packed__)); /* 32 bytes */ struct pvclock_wall_clock { - u32 version; - u32 sec; - u32 nsec; + __u32 version; + __u32 sec; + __u32 nsec; } __attribute__((__packed__)); #define PVCLOCK_TSC_STABLE_BIT (1 << 0) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305071.1577697 (Exim 4.92) (envelope-from ) id 1wLqWn-00036x-RG; Sat, 09 May 2026 22:52:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305071.1577697; Sat, 09 May 2026 22:52:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqWn-00036j-MJ; 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From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 10/30] KVM: x86: Fold __get_kvmclock() into get_kvmclock() Date: Sat, 9 May 2026 23:46:36 +0100 Message-ID: <20260509224824.3264567-11-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366947-19B68F3B-F6348F77/0/0 X-purgate-type: clean X-purgate-size: 3279 From: David Woodhouse There is no need for the separate __get_kvmclock() helper; just inline its body into get_kvmclock() within the seqcount retry loop. No functional change. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 63 +++++++++++++++++++++------------------------- 1 file changed, 28 insertions(+), 35 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ccdfd3fa3402..6f660c3210ee 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3200,50 +3200,43 @@ static unsigned long get_cpu_tsc_khz(void) return __this_cpu_read(cpu_tsc_khz); } -/* Called within read_seqcount_begin/retry for kvm->pvclock_sc. */ -static void __get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) +static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) { struct kvm_arch *ka = &kvm->arch; struct pvclock_vcpu_time_info hv_clock; + unsigned int seq; - /* both __this_cpu_read() and rdtsc() should be on the same cpu */ - get_cpu(); + do { + seq = read_seqcount_begin(&ka->pvclock_sc); - data->flags = 0; - if (ka->use_master_clock && - (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { + /* both __this_cpu_read() and rdtsc() should be on the same cpu */ + get_cpu(); + + data->flags = 0; + if (ka->use_master_clock && + (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { #ifdef CONFIG_X86_64 - struct timespec64 ts; + struct timespec64 ts; - if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { - data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; - data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; - } else + if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { + data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; + data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; + } else #endif - data->host_tsc = rdtsc(); - - data->flags |= KVM_CLOCK_TSC_STABLE; - hv_clock.tsc_timestamp = ka->master_cycle_now; - hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; - kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, - &hv_clock.tsc_shift, - &hv_clock.tsc_to_system_mul); - data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); - } else { - data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; - } - - put_cpu(); -} - -static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) -{ - struct kvm_arch *ka = &kvm->arch; - unsigned seq; + data->host_tsc = rdtsc(); + + data->flags |= KVM_CLOCK_TSC_STABLE; + hv_clock.tsc_timestamp = ka->master_cycle_now; + hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; + kvm_get_time_scale(NSEC_PER_SEC, get_cpu_tsc_khz() * 1000LL, + &hv_clock.tsc_shift, + &hv_clock.tsc_to_system_mul); + data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + } else { + data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; + } - do { - seq = read_seqcount_begin(&ka->pvclock_sc); - __get_kvmclock(kvm, data); + put_cpu(); } while (read_seqcount_retry(&ka->pvclock_sc, seq)); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305072.1577712 (Exim 4.92) (envelope-from ) id 1wLqWs-0003gU-7F; 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Sun, 10 May 2026 00:49:11 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzI-0OeQ; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIH-3IBh; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=LepzYKC8zChWcqxDUMiFOK7RmizpFH9hCCvlIfnf3aY=; b=bkTTeIeQ6yjciV79dnwOCTS3X8 kWPljQM5uuCcLf9xYvOMvxwp0BudJtlKdezBUn+2HsrUtDHGE8X85ygS5I9M1clK6zpm2ifFrsLyI 6vHlr9bbTcd192RWw5BeCaycQCXib9QwDp+uVtaExyL6cHh0l//vCGieuOmQt3Zb6k0V42gUmdzy2 v+X/RNkqyGK6O828YYwwQwcGi7JC5ICV2+sjdn6xRCbShFs6B4a8UPDR2YF3J0Ue6G7OcdLr2c0KW mS9Em/atYVqzn+EMq4KLzVjs83ETumOZCG//oet13+jOZDJ2WZbahqUjO1qRQftiPO8dK8pbrQTVE zPdP0YPA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 16/30] KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling Date: Sat, 9 May 2026 23:46:42 +0100 Message-ID: <20260509224824.3264567-17-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366951-86D72D75-A28EBC8B/0/0 X-purgate-type: clean X-purgate-size: 4131 From: David Woodhouse Restructure kvm_guest_time_update() so that kernel_ns/host_tsc are always "now" when doing TSC catchup, then swap in the master clock reference values afterward for the hv_clock. This makes the TSC upscaling code considerably simpler: the catchup adjustment is computed as the delta between what the guest TSC *should* be at "now" and what it actually is, rather than mixing "now" and "master clock reference" timestamps. The seqcount loop now also contains the kvm_get_time_and_clockread() call (matching get_kvmclock's pattern), with the same WARN for unexpected failure. Based on a suggestion by Sean Christopherson. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 67 ++++++++++++++++++++++++++++++++-------------- 1 file changed, 47 insertions(+), 20 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index e281c49561fa..8e4993ef4f6b 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3363,39 +3363,51 @@ int kvm_guest_time_update(struct kvm_vcpu *v) struct kvm_arch *ka = &v->kvm->arch; s64 kernel_ns; u64 tsc_timestamp, host_tsc; + u64 master_host_tsc = 0; + s64 master_kernel_ns = 0; bool use_master_clock; - kernel_ns = 0; - host_tsc = 0; - /* * If the host uses TSC clock, then passthrough TSC as stable * to the guest. */ do { seq = read_seqcount_begin(&ka->pvclock_sc); + use_master_clock = ka->use_master_clock; - if (use_master_clock) { - host_tsc = ka->master_cycle_now; - kernel_ns = ka->master_kernel_ns; - } + + /* + * The TSC read and the call to get_cpu_tsc_khz() must happen + * on the same CPU. + */ + get_cpu(); + + tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; + + if (use_master_clock && + !kvm_get_time_and_clockread(&kernel_ns, &host_tsc) && + WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) + use_master_clock = false; + + put_cpu(); + + if (!use_master_clock) + break; + + master_host_tsc = ka->master_cycle_now; + master_kernel_ns = ka->master_kernel_ns; } while (read_seqcount_retry(&ka->pvclock_sc, seq)); - /* Keep irq disabled to prevent changes to the clock */ - local_irq_save(flags); - tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; if (unlikely(tgt_tsc_hz == 0)) { - local_irq_restore(flags); kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); return 1; } + if (!use_master_clock) { host_tsc = rdtsc(); kernel_ns = get_kvmclock_base_ns(); } - tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); - /* * We may have to catch up the TSC to match elapsed wall clock * time for two reasons, even if kvmclock is used. @@ -3404,17 +3416,32 @@ int kvm_guest_time_update(struct kvm_vcpu *v) * entry to avoid unknown leaps of TSC even when running * again on the same CPU. This may cause apparent elapsed * time to disappear, and the guest to stand still or run - * very slowly. + * very slowly. */ if (vcpu->tsc_catchup) { - u64 tsc = compute_guest_tsc(v, kernel_ns); - if (tsc > tsc_timestamp) { - adjust_tsc_offset_guest(v, tsc - tsc_timestamp); - tsc_timestamp = tsc; - } + s64 adjustment; + + /* + * Calculate the delta between what the guest TSC *should* be + * and what it actually is according to kvm_read_l1_tsc(). + */ + adjustment = compute_guest_tsc(v, kernel_ns) - + kvm_read_l1_tsc(v, host_tsc); + if (adjustment > 0) + adjust_tsc_offset_guest(v, adjustment); } - local_irq_restore(flags); + /* + * Now that TSC upscaling is out of the way, the remaining calculations + * are all relative to the reference time that's placed in hv_clock. + * If the master clock is NOT in use, the reference time is "now". If + * master clock is in use, the reference time comes from there. + */ + if (use_master_clock) { + host_tsc = master_host_tsc; + kernel_ns = master_kernel_ns; + } + tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); /* With all the info we got, fill in the values */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305099.1577721 (Exim 4.92) (envelope-from ) id 1wLqXP-0004qr-Gz; Sat, 09 May 2026 22:52:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305099.1577721; Sat, 09 May 2026 22:52:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qc-Da; Sat, 09 May 2026 22:52:47 +0000 Received: by outflank-mailman (input) for mailman id 1305099; Sat, 09 May 2026 22:52:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXO-0004qF-Hz for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXN-008rH7-VM; Sun, 10 May 2026 00:52:45 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-46 for ; Sun, 10 May 2026 00:52:45 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cc-7371-0a2a45060019-5a9b5cc78a84-3 for ; Sun, 10 May 2026 00:48:44 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wz8-0RZG; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHZ-0vyl; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=fjV26NrwIY9cQcLo8KkXdG7OKt7Yi3rTCYPgBP8g6KA=; b=KLhaK8eBC6ebOLVUd2G2XJdjhp GXwrOjDkaQr8ATVtUHjTxBu5zBqFFwsjGTlzl3hjb+yDwKI/GmtnzkbTLBCprwF5i88X+i2gNfNtu AhTzqJLvX1o0xaW7BbsUEpF6HwIzH+C2ZBvSKAi6klr3u/5mYzzCxSJlrpU+cmgbBrcCNwGqty8hx MvQC0vAJX2NsYDgXYha5BQc60V0RqWatSl4OwQvuBRfWWCc1TYsEBzZ4dkPj7w/H8YWI9dn5o/cm6 juwXijSC7WN8YToiRDEbEXHGa1bNmrufksGVCXtjiXykouJq4qg1d6G3d2NX7Gxi1KBXm5+3pWC0N o7slZr4g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 05/30] KVM: selftests: Add KVM/PV clock selftest to prove timer correction Date: Sat, 9 May 2026 23:46:31 +0100 Message-ID: <20260509224824.3264567-6-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366924-8556ED75-AF4EFC7B/0/0 X-purgate-type: clean X-purgate-size: 15144 From: Jack Allister A VM's KVM/PV clock has an inherent relationship to its TSC. When either the host system live-updates or the VM is live-migrated this pairing of the two clock sources should stay the same. In reality this is not the case without some correction taking place. The KVM_GET_CLOCK_GUEST/KVM_SET_CLOCK_GUEST ioctls can be used to perform a correction on the PVTI (PV time information) structure held by KVM to effectively fix up the kvmclock_offset prior to the guest VM resuming in either a live-update/migration scenario. This test proves that without the necessary fixup there is a perceived change in the guest TSC and KVM/PV clock relationship before and after a simulated LU/LM takes place, and that the correction eliminates it. The test: 1. Snapshots the PVTI at boot (PVTI0). 2. Induces a change in PVTI data (KVM_REQ_MASTERCLOCK_UPDATE). 3. Snapshots the PVTI after the change (PVTI1). 4. Requests correction via KVM_SET_CLOCK_GUEST using PVTI0. 5. Snapshots the PVTI after correction (PVTI2). Then samples the TSC at a single point in time and calculates the KVM clock using each PVTI snapshot. The corrected clock should match the boot clock to within ±1ns. The test enumerates multiple TSC frequencies from 1GHz to 5GHz at 500MHz steps, crossing the 32-bit boundary, to exercise the scaling path at various ratios. The sleep duration between snapshots is configurable via the -s/--sleep command line option. Co-developed-by: David Woodhouse Signed-off-by: David Woodhouse Signed-off-by: Jack Allister Reviewed-by: Paul Durrant Cc: Dongli Zhang --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../testing/selftests/kvm/x86/pvclock_test.c | 415 ++++++++++++++++++ 2 files changed, 416 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/pvclock_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selftests/kvm/Makefile.kvm index 9118a5a51b89..fb935ae3bf38 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -105,6 +105,7 @@ TEST_GEN_PROGS_x86 += x86/pmu_counters_test TEST_GEN_PROGS_x86 += x86/pmu_event_filter_test TEST_GEN_PROGS_x86 += x86/private_mem_conversions_test TEST_GEN_PROGS_x86 += x86/private_mem_kvm_exits_test +TEST_GEN_PROGS_x86 += x86/pvclock_test TEST_GEN_PROGS_x86 += x86/set_boot_cpu_id TEST_GEN_PROGS_x86 += x86/set_sregs_test TEST_GEN_PROGS_x86 += x86/smaller_maxphyaddr_emulation_test diff --git a/tools/testing/selftests/kvm/x86/pvclock_test.c b/tools/testing/selftests/kvm/x86/pvclock_test.c new file mode 100644 index 000000000000..1a3d52923c71 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/pvclock_test.c @@ -0,0 +1,415 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © Amazon.com, Inc. or its affiliates. + * + * Tests for pvclock API + * KVM_SET_CLOCK_GUEST/KVM_GET_CLOCK_GUEST + */ +#include +#include +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +/* + * Reproduce the pvclock calculation the guest uses to convert TSC to + * nanoseconds. This must match the kernel's __pvclock_read_cycles(). + */ +static inline uint64_t pvclock_scale_delta(uint64_t delta, uint32_t mul, + int8_t shift) +{ + if (shift < 0) + delta >>= -shift; + else + delta <<= shift; + return ((__uint128_t)delta * mul) >> 32; +} + +static inline uint64_t pvclock_read_cycles(struct pvclock_vcpu_time_info *src, + uint64_t tsc) +{ + uint64_t delta = tsc - src->tsc_timestamp; + + return src->system_time + pvclock_scale_delta(delta, + src->tsc_to_system_mul, + src->tsc_shift); +} + +enum { + STAGE_FIRST_BOOT, + STAGE_UNCORRECTED, + STAGE_CORRECTED +}; + +#define KVMCLOCK_GPA 0xc0000000ull +#define KVMCLOCK_SIZE sizeof(struct pvclock_vcpu_time_info) + +static void trigger_pvti_update(void) +{ + /* + * Toggle between KVM's old and new system time methods to coerce KVM + * into updating the fields in the PV time info struct. + */ + wrmsr(MSR_KVM_SYSTEM_TIME, KVMCLOCK_GPA | KVM_MSR_ENABLED); + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); +} + +static void guest_code(void) +{ + struct pvclock_vcpu_time_info *pvti = + (void *)(unsigned long)KVMCLOCK_GPA; + struct pvclock_vcpu_time_info pvti_boot; + struct pvclock_vcpu_time_info pvti_uncorrected; + struct pvclock_vcpu_time_info pvti_corrected; + uint64_t tsc_guest; + uint64_t clk_boot, clk_uncorrected, clk_corrected; + int64_t delta_corrected; + + /* Set up kvmclock and snapshot the initial pvclock parameters. */ + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); + pvti_boot = *pvti; + GUEST_SYNC(STAGE_FIRST_BOOT); + + /* + * Trigger an update of the PVTI. Calculating the KVM clock using this + * updated structure will show a delta from the original. + */ + trigger_pvti_update(); + pvti_uncorrected = *pvti; + GUEST_SYNC(STAGE_UNCORRECTED); + + /* + * Snapshot the corrected time (the host does KVM_SET_CLOCK_GUEST when + * handling STAGE_UNCORRECTED). + */ + pvti_corrected = *pvti; + + /* + * Sample the TSC at a single point in time, then calculate the + * effective KVM clock using the PVTI from each stage. Verify that the + * corrected clock matches the boot clock to within ±1ns. + */ + tsc_guest = rdtsc(); + + clk_boot = pvclock_read_cycles(&pvti_boot, tsc_guest); + clk_uncorrected = pvclock_read_cycles(&pvti_uncorrected, tsc_guest); + clk_corrected = pvclock_read_cycles(&pvti_corrected, tsc_guest); + + delta_corrected = clk_boot - clk_corrected; + + __GUEST_ASSERT(delta_corrected >= -2 && delta_corrected <= 2, + "corrected delta %ld out of range (boot=%lu uncorrected=%lu corrected=%lu)", + delta_corrected, clk_boot, clk_uncorrected, clk_corrected); + + GUEST_SYNC(STAGE_CORRECTED); +} + +static void run_test(struct kvm_vm *vm, struct kvm_vcpu *vcpu, + unsigned int sleep_sec) +{ + struct pvclock_vcpu_time_info pvti_before; + struct ucall uc; + + for (;;) { + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } + + switch (uc.args[1]) { + case STAGE_FIRST_BOOT: + /* Save the pvclock parameters before the update. */ + vcpu_ioctl(vcpu, KVM_GET_CLOCK_GUEST, &pvti_before); + + /* Sleep to let the clocks diverge. */ + sleep(sleep_sec); + break; + + case STAGE_UNCORRECTED: + /* Restore the original pvclock parameters. */ + vcpu_ioctl(vcpu, KVM_SET_CLOCK_GUEST, &pvti_before); + break; + + case STAGE_CORRECTED: + /* Guest verified the delta in-guest. */ + return; + + default: + TEST_FAIL("Unknown stage %lu", uc.args[1]); + } + } +} + +static void configure_pvclock(struct kvm_vm *vm) +{ + unsigned int nr_pages; + + nr_pages = vm_calc_num_guest_pages(VM_MODE_DEFAULT, KVMCLOCK_SIZE); + vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, + KVMCLOCK_GPA, 1, nr_pages, 0); + virt_map(vm, KVMCLOCK_GPA, KVMCLOCK_GPA, nr_pages); +} + +static void run_at_frequency(uint64_t tsc_khz, unsigned int sleep_sec) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + + pr_info("Testing at TSC frequency %lu kHz\n", tsc_khz); + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + configure_pvclock(vm); + vcpu_ioctl(vcpu, KVM_SET_TSC_KHZ, (void *)tsc_khz); + run_test(vm, vcpu, sleep_sec); + kvm_vm_release(vm); +} + +static void test_tsc_stable_bit(void); +static void test_clock_guest_with_offsets(void); + +static void usage(const char *name) +{ + printf("Usage: %s [options]\n" + " -s, --sleep SEC sleep duration between snapshots (default: 2)\n" + " -h, --help show this help\n", name); +} + +int main(int argc, char *argv[]) +{ + static const struct option long_opts[] = { + { "sleep", required_argument, NULL, 's' }, + { "help", no_argument, NULL, 'h' }, + { NULL, 0, NULL, 0 }, + }; + unsigned int sleep_sec = 2; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + uint64_t host_khz; + uint64_t freq; + int opt; + + while ((opt = getopt_long(argc, argv, "s:h", long_opts, NULL)) != -1) { + switch (opt) { + case 's': + sleep_sec = atoi(optarg); + break; + case 'h': + default: + usage(argv[0]); + return opt == 'h' ? 0 : 1; + } + } + + TEST_REQUIRE(sys_clocksource_is_based_on_tsc()); + + vm = vm_create_with_one_vcpu(&vcpu, guest_code); + configure_pvclock(vm); + + /* First run at native frequency (no scaling). */ + run_test(vm, vcpu, sleep_sec); + + /* + * Then enumerate a range of TSC frequencies crossing the 32-bit + * boundary, to exercise the scaling path at various ratios. + */ + host_khz = __vcpu_ioctl(vcpu, KVM_GET_TSC_KHZ, NULL); + kvm_vm_release(vm); + + for (freq = 1000000; freq <= 5000000; freq += 500000) { + if (freq == host_khz) + continue; + run_at_frequency(freq, sleep_sec); + } + + test_tsc_stable_bit(); + test_clock_guest_with_offsets(); + + return 0; +} + +static void guest_code_stable_bit(void) +{ + wrmsr(MSR_KVM_SYSTEM_TIME_NEW, KVMCLOCK_GPA | KVM_MSR_ENABLED); + GUEST_SYNC(0); + GUEST_SYNC(0); + GUEST_SYNC(0); +} + +static void set_tsc_offset(struct kvm_vcpu *vcpu, uint64_t offset) +{ + struct kvm_device_attr attr = { + .group = KVM_VCPU_TSC_CTRL, + .attr = KVM_VCPU_TSC_OFFSET, + .addr = (__u64)(uintptr_t)&offset, + }; + vcpu_ioctl(vcpu, KVM_SET_DEVICE_ATTR, &attr); +} + +static void run_vcpu_once(struct kvm_vcpu *vcpu) +{ + struct ucall uc; + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } +} + +static void test_tsc_stable_bit(void) +{ + struct pvclock_vcpu_time_info pvti; + struct kvm_vcpu *vcpus[2]; + struct kvm_vm *vm; + int ret; + + pr_info("Testing PVCLOCK_TSC_STABLE_BIT with matched/unmatched TSCs\n"); + + vm = vm_create_with_vcpus(2, guest_code_stable_bit, vcpus); + configure_pvclock(vm); + + /* + * Case 1: All TSCs matched (same frequency and offset). + * Master clock should be active, PVCLOCK_TSC_STABLE_BIT set. + */ + run_vcpu_once(vcpus[0]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST should succeed with matched TSCs"); + TEST_ASSERT(pvti.flags & PVCLOCK_TSC_STABLE_BIT, + "PVCLOCK_TSC_STABLE_BIT should be set with matched TSCs"); + + /* + * Case 2: Different TSC offset, same frequency. + * Master clock should still be active (frequency matches), but + * PVCLOCK_TSC_STABLE_BIT should be cleared (offsets differ). + */ + set_tsc_offset(vcpus[1], 12345678); + run_vcpu_once(vcpus[1]); + run_vcpu_once(vcpus[0]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + if (ret) { + /* Master clock disabled by offset mismatch — old kernel */ + pr_info(" Skipping offset tests (master clock requires matched offsets)\n"); + goto out_stable; + } + TEST_ASSERT(!(pvti.flags & PVCLOCK_TSC_STABLE_BIT), + "PVCLOCK_TSC_STABLE_BIT should be clear with offset-mismatched TSCs"); + + /* + * Case 3: Different TSC frequency. + * Master clock should be disabled entirely. + */ + vcpu_ioctl(vcpus[1], KVM_SET_TSC_KHZ, + (void *)(unsigned long)(__vcpu_ioctl(vcpus[1], KVM_GET_TSC_KHZ, NULL) / 2)); + /* Write TSC to trigger kvm_synchronize_tsc / kvm_track_tsc_matching */ + vcpu_set_msr(vcpus[1], MSR_IA32_TSC, 0); + run_vcpu_once(vcpus[1]); + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(ret && errno == EINVAL, + "GET_CLOCK_GUEST should fail with frequency-mismatched TSCs, got %d (errno %d)", + ret, errno); + +out_stable: + kvm_vm_release(vm); +} + +static void test_clock_guest_with_offsets(void) +{ + struct pvclock_vcpu_time_info pvti0, pvti1, pvti1_after; + struct kvm_vcpu *vcpus[2]; + struct kvm_vm *vm; + int64_t delta; + int ret; + + pr_info("Testing KVM_[GS]ET_CLOCK_GUEST with different TSC offsets\n"); + + vm = vm_create_with_vcpus(2, guest_code_stable_bit, vcpus); + configure_pvclock(vm); + + /* Set different TSC offsets on the two vCPUs */ + set_tsc_offset(vcpus[0], 0); + set_tsc_offset(vcpus[1], 1000000000ull); + + /* Run both to establish kvmclock */ + run_vcpu_once(vcpus[0]); + run_vcpu_once(vcpus[1]); + + /* GET_CLOCK_GUEST on both — should succeed (master clock active) */ + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti0); + if (ret) { + pr_info(" Skipping (master clock requires matched offsets on this kernel)\n"); + kvm_vm_release(vm); + return; + } + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 failed"); + + /* The tsc_timestamps should differ (different offsets) */ + TEST_ASSERT(pvti0.tsc_timestamp != pvti1.tsc_timestamp, + "tsc_timestamps should differ with different offsets"); + + /* Sleep to let time elapse, then restore vcpu0's clock */ + sleep(1); + vcpu_ioctl(vcpus[0], KVM_SET_CLOCK_GUEST, &pvti0); + + /* Run vcpu0 to process the clock update */ + run_vcpu_once(vcpus[0]); + + /* GET_CLOCK_GUEST on vcpu1 — should reflect the correction */ + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 after SET failed"); + + /* + * After SET on vcpu0, verify the correction worked by getting + * the clock on vcpu0 again. The mul/shift should be the same, + * and computing kvmclock at the same TSC should give the same + * result as the original (within ±2ns). + */ + { + struct pvclock_vcpu_time_info pvti0_after; + uint64_t tsc_now, clk_from_old, clk_from_new; + + ret = __vcpu_ioctl(vcpus[0], KVM_GET_CLOCK_GUEST, &pvti0_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu0 after SET failed"); + + tsc_now = pvti0_after.tsc_timestamp; + clk_from_old = pvclock_read_cycles(&pvti0, tsc_now); + clk_from_new = pvclock_read_cycles(&pvti0_after, tsc_now); + + delta = (int64_t)clk_from_new - (int64_t)clk_from_old; + TEST_ASSERT(delta >= -2 && delta <= 2, + "clock correction delta should be <=2ns, got %ld ns", + delta); + } + + /* + * Also verify that vcpu1's clock is still accessible (master + * clock still active with different offsets). + */ + ret = __vcpu_ioctl(vcpus[1], KVM_GET_CLOCK_GUEST, &pvti1_after); + TEST_ASSERT(!ret, "GET_CLOCK_GUEST on vcpu1 after SET failed"); + + kvm_vm_release(vm); +} -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305100.1577730 (Exim 4.92) (envelope-from ) id 1wLqXQ-00055G-T6; Sat, 09 May 2026 22:52:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305100.1577730; Sat, 09 May 2026 22:52:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000558-QG; Sat, 09 May 2026 22:52:48 +0000 Received: by outflank-mailman (input) for mailman id 1305100; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qN-8E for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXO-008rH7-LN; Sun, 10 May 2026 00:52:46 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba24-2eae-0a2a0a5409dd-0a2a4506b144-48 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-7371-0a2a45060019-5a9b3222d576-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LP-2pj4; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJ7-1V2k; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=HcPos2+xuZTjBV7pxq7NSClTpw+Fu99QdQJ5Jy1Ls+M=; b=Zf77LfPtfI70hL1gqLbAhPtLtX ibkr66p3p6/yNwf1wG6qqc/ms/D0cd+mf/gL9RKluGUlABJWL954X+hC7rfWjImiJ7CROZMthVqh7 OTkMC4vADFkwf63SWHGMNbF2qJVf9rruhAcDBmTZgzvOH0jHPndB5bEQv9StPED9R1rJWRdq5KqsA idLIC0tiDnsbUYQlxQkaFsJ1rxU7HJqRe1UHoilCGBY2oTbY3Qok9mr4jH7I9F9puYYvsCXOgoRSg aGZgxEUEluS1lC7dL54o1eq6sM/iCEMUEUte4b9q7W4oNzFdeq8Z9C54Hgb9kHKHIxTuTapNwFb2v 46Z9XONA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 29/30] x86/kvm: Obtain TSC frequency from CPUID if present Date: Sat, 9 May 2026 23:46:55 +0100 Message-ID: <20260509224824.3264567-30-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366926-8FD7AD75-F860CF9A/0/0 X-purgate-type: clean X-purgate-size: 3522 From: David Woodhouse In https://lore.kernel.org/all/1222881242.9381.17.camel@alok-dev1/ a proposal was made for generic CPUID conventions across hypervisors. It was mostly shot down in flames, but the leaf at 0x40000010 containing timing information didn't die. It's used by XNU and FreeBSD guests under all hypervisors to determine the TSC frequency, and also exposed by the EC2 Nitro hypervisor and VMware. Use it under KVM to obtain the TSC frequency more accurately, instead of reverse-calculating the frequency from the mul/shift values in the KVM clock. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/include/uapi/asm/kvm_para.h | 11 +++++++++++ arch/x86/kernel/kvm.c | 10 ++++++++++ arch/x86/kernel/kvmclock.c | 7 ++++++- 4 files changed, 28 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 4a47c16e2df8..03fa1228fcf2 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -121,6 +121,7 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, void kvmclock_init(void); void kvmclock_disable(void); bool kvm_para_available(void); +unsigned int kvm_para_tsc_khz(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); void kvm_async_pf_task_wait_schedule(u32 token); diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h index a1efa7907a0b..dc0d036fe678 100644 --- a/arch/x86/include/uapi/asm/kvm_para.h +++ b/arch/x86/include/uapi/asm/kvm_para.h @@ -44,6 +44,17 @@ */ #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 +/* + * In https://lore.kernel.org/all/1222881242.9381.17.camel@alok-dev1/ + * VMware proposed a timing information leaf providing the TSC and + * local APIC timer frequencies: + * + * # EAX: (Virtual) TSC frequency in kHz. + * # EBX: (Virtual) Bus (local apic timer) frequency in kHz. + * # ECX, EDX: RESERVED (reserved fields are set to zero). + */ +#define KVM_CPUID_TIMING_INFO 0x40000010 + #define MSR_KVM_WALL_CLOCK 0x11 #define MSR_KVM_SYSTEM_TIME 0x12 diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 29226d112029..60375165b66c 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -910,6 +910,16 @@ bool kvm_para_available(void) } EXPORT_SYMBOL_GPL(kvm_para_available); +unsigned int kvm_para_tsc_khz(void) +{ + u32 base = kvm_cpuid_base(); + + if (base && cpuid_eax(base) >= (base | KVM_CPUID_TIMING_INFO)) + return cpuid_eax(base | KVM_CPUID_TIMING_INFO); + + return 0; +} + unsigned int kvm_arch_para_features(void) { return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES); diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b5991d53fc0e..74aca22dc726 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -118,7 +118,12 @@ static inline void kvm_sched_clock_init(bool stable) static unsigned long kvm_get_tsc_khz(void) { setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); - return pvclock_tsc_khz(this_cpu_pvti()); + + /* + * If KVM advertises the frequency directly in CPUID, use that + * instead of reverse-calculating it from the KVM clock data. + */ + return kvm_para_tsc_khz() ? : pvclock_tsc_khz(this_cpu_pvti()); } static void __init kvm_get_preset_lpj(void) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305101.1577736 (Exim 4.92) (envelope-from ) id 1wLqXR-000580-95; Sat, 09 May 2026 22:52:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305101.1577736; Sat, 09 May 2026 22:52:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-00056z-1J; Sat, 09 May 2026 22:52:49 +0000 Received: by outflank-mailman (input) for mailman id 1305101; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qO-94 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXO-002c5y-MQ; Sun, 10 May 2026 00:52:46 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-16 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-56b3-0a2a450a0019-5a9b3222bc10-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060L8-2QAw; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTB-0000000DhHG-3mRt; Sat, 09 May 2026 23:48:25 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:Message-ID:Date:Subject:To:From:Reply-To:Cc:Content-Type: Content-ID:Content-Description:In-Reply-To:References; bh=XG5p4cJcLgImpvW6Me4R9NQ4kt4cFymqrFSnQMVMwOY=; b=ES7WV1IaPYdAPQghiFOJa/RmZY 4LlcRdnPpTdc4p2WmH6+v831QI/nCxKhQTpeiQvQrzWuSN4lUBadGmnwriNY/sd4I32yr/WcNisPu zxc1dbf2YiOSilzjsQoIyixtVnPxtRgYEGOk/3O7TNWwNux0b0TRIy1Ou5tsIHkzYUvYbfVgT6xxo TFOzByeaxUYJVDT/7L+l+B0HN24YMmuUuyb51SEhxtyguBU1yjwvirNy12P9s7lrPmH1QtMISeoV/ VY6XaeAoQkrjuUqg8fTQThOxdknMqCh4N9HgtHWTEQqrk7RIg92pmHDd09fvkAm1nJkmrZgL2jgs/ oRqO8Acg==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4] 00/30] Cleaning up the KVM clock mess Date: Sat, 9 May 2026 23:46:26 +0100 Message-ID: <20260509224824.3264567-1-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366926-7C07C8B7-89B9C4F6/0/0 X-purgate-type: clean X-purgate-size: 6354 This is v4 of the series to clean up the KVM clock, addressing review feedback from Sean Christopherson and Paul Durrant on v3, rebased to the current kernel, and incorporating related work from Dongli Zhang. The KVM clock has historically suffered from three problems: 1. Imprecision: get_kvmclock_ns() computed the clock from the *host* TSC without applying guest TSC scaling, causing systemic drift from the values the guest computes from its own TSC. 2. Unnecessary discontinuities: gratuitous KVM_REQ_MASTERCLOCK_UPDATE requests caused the master clock reference point to be re-snapshotted, yanking the guest's clock due to arithmetic precision differences. 3. No precise migration API: the existing KVM_[GS]ET_CLOCK only allows setting the clock at a given UTC reference time, which is necessarily imprecise. There was no way to preserve the exact arithmetic relationship between guest TSC and KVM clock across live migration. This series addresses all three, and adds new APIs for precise clock migration and TSC frequency reporting. Changes since v3: - Rebased to v7.1-rc2 - Split patch 09 (__get_kvmclock fix) into 6 incremental patches per Sean's review - Split patch 10 (TSC upscaling) into 2 patches per Sean's review - Split patch 15 (offset TSCs) into frequency-match vs offset-match - Addressed Sean's review: hw_tsc_hz overflow (u64), KVM_VCPU_TSC_SCALE gated on has_tsc_control, pvclock_gtod_notifier unregister path, kvm_get_time_scale() readability, and many more - Incorporated Dongli Zhang's masterclock drift mitigation, reworked as a proper deduplication of redundant updates via request clearing under the tsc_write_lock - Added KVM_VCPU_TSC_EFFECTIVE_FREQ attribute for userspace to populate CPUID timing leaves without KVM modifying guest CPUID at runtime - Removed runtime Xen TSC CPUID modification (was updating wrong leaf) - Added guest-side patches to use CPUID 0x40000010 for TSC frequency under both KVM and Xen - Selftest covers clock correction at multiple TSC frequencies, PVCLOCK_TSC_STABLE_BIT behaviour, and multi-vCPU offset scenarios - Fixed RCU splat in KVM_GET_CLOCK_GUEST (needs srcu_read_lock) The series can be broadly grouped as: Patches 1-5: Core clock fixes and new KVM_[GS]ET_CLOCK_GUEST API Patches 6-8: TSC scaling prerequisites Patches 9-14: Fix get_kvmclock() precision (split per review) Patches 15-16: Fix kvm_guest_time_update() for TSC upscaling Patches 17-20: Code cleanup and simplification Patches 21-22: Allow master clock with offset TSCs Patches 23-24: Eliminate gratuitous clock updates Patch 25: Xen runstate negative time fix Patch 26: Deduplicate redundant masterclock updates Patches 27-28: TSC frequency reporting for CPUID Patches 29-30: Guest-side CPUID frequency consumption David Woodhouse (27): KVM: x86/xen: Do not corrupt KVM clock in kvm_xen_shared_info_init() KVM: x86: Improve accuracy of KVM clock when TSC scaling is in force KVM: x86: Explicitly disable TSC scaling without CONSTANT_TSC KVM: x86: Add KVM_VCPU_TSC_SCALE and fix the documentation on TSC migration KVM: x86: Avoid NTP frequency skew for KVM clock on 32-bit host KVM: x86: WARN if kvm_get_walltime_and_clockread() fails unexpectedly KVM: x86: Fold __get_kvmclock() into get_kvmclock() KVM: x86: Add WARN and restructure get_kvmclock() KVM: x86: Use get_kvmclock_base_ns() as fallback in get_kvmclock() KVM: x86: Fix KVM clock precision in get_kvmclock() with TSC scaling KVM: x86: Use get_kvmclock() in kvm_get_wall_clock_epoch() KVM: x86: Fix compute_guest_tsc() to handle negative time deltas KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling KVM: x86: Simplify and comment kvm_get_time_scale() KVM: x86: Remove implicit rdtsc() from kvm_compute_l1_tsc_offset() KVM: x86: Improve synchronization in kvm_synchronize_tsc() KVM: x86: Kill last_tsc_{nsec,write,offset} fields KVM: x86: Replace nr_vcpus_matched_tsc count with all_vcpus_matched_tsc bool KVM: x86: Allow KVM master clock mode when TSCs are offset from each other KVM: x86: Factor out kvm_use_master_clock() KVM: x86: Avoid gratuitous global clock updates KVM: x86/xen: Prevent runstate times from becoming negative KVM: x86: Avoid redundant masterclock updates from multiple vCPUs KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute KVM: x86: Remove runtime Xen TSC frequency CPUID update x86/kvm: Obtain TSC frequency from CPUID if present x86/xen: Obtain TSC frequency from CPUID if present Jack Allister (3): UAPI: x86: Move pvclock-abi to UAPI for x86 platforms KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration KVM: selftests: Add KVM/PV clock selftest to prove timer correction Documentation/virt/kvm/api.rst | 37 ++ Documentation/virt/kvm/devices/vcpu.rst | 69 ++- MAINTAINERS | 4 +- arch/x86/include/asm/kvm_host.h | 13 +- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/include/uapi/asm/kvm.h | 12 + arch/x86/include/uapi/asm/kvm_para.h | 11 + arch/x86/include/{ => uapi}/asm/pvclock-abi.h | 27 +- arch/x86/kernel/kvm.c | 10 + arch/x86/kernel/kvmclock.c | 7 +- arch/x86/kvm/cpuid.c | 16 - arch/x86/kvm/svm/svm.c | 3 +- arch/x86/kvm/vmx/vmx.c | 2 +- arch/x86/kvm/x86.c | 735 ++++++++++++++++++------- arch/x86/kvm/xen.c | 21 +- arch/x86/kvm/xen.h | 13 - arch/x86/xen/time.c | 12 + include/uapi/linux/kvm.h | 3 + tools/testing/selftests/kvm/Makefile.kvm | 1 + tools/testing/selftests/kvm/x86/pvclock_test.c | 415 ++++++++++++++ 20 files changed, 1157 insertions(+), 255 deletions(-) create mode 100644 tools/testing/selftests/kvm/x86/pvclock_test.c rename arch/x86/include/{asm => uapi/asm}/pvclock-abi.h (82%) From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305102.1577742 (Exim 4.92) (envelope-from ) id 1wLqXR-0005CL-Nb; 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Sun, 10 May 2026 00:48:46 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LF-0WlZ; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIP-3h9H; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=b7vK04j3ME79EByeo7DIf/aiU6TZ9fbb5omdiwpyWzc=; b=S2A6ymwriAt64z9TQK3O/qNgAN N8Ha10Fnpk9cyE11JyOV9pteTaq1j1VA/HgVSrPtKweFAdNaCJtwgaOB0BqIBjb2U5qybT08nHlqv xii0wn7hkW8fGmcyIX0jnFsCVvpGq7akuF7b9OK/S5JyBBC3Y8HtWS8HJclPsQNfa/UDTBuiPYyfn fhTclwPmu5i6rZ9PmzVgA0eLcOdU/nHxOFMHS54bZkPkb3Gp9jhjgUtG0NSInmOkImKCqDRj8Ae5c gGGeVrXNwhBE24V2+6zvu3na1yuNyDvRQ+GsAKRctkF7Ih1XQq1Q/F1Snn5YPhWeuHJWjLp83tBxT OXCP80SQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 18/30] KVM: x86: Remove implicit rdtsc() from kvm_compute_l1_tsc_offset() Date: Sat, 9 May 2026 23:46:44 +0100 Message-ID: <20260509224824.3264567-19-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1778366926-8797CD75-D2F4383B/0/0 X-purgate-type: clean X-purgate-size: 2890 From: David Woodhouse Let the callers pass the host TSC value in as an explicit parameter. This leaves some fairly obviously stupid code, which is using this function to compare the guest TSC at some *other* time, with the newly-minted TSC value from rdtsc(). Unless it's being used to measure *elapsed* time, that isn't very sensible. In this case, "obviously stupid" is an improvement over being non-obviously so. No functional change intended. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 980fc22ee05b..c9cbebd6a92a 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2693,11 +2693,12 @@ u64 kvm_scale_tsc(u64 tsc, u64 ratio) return _tsc; } -static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc) +static u64 kvm_compute_l1_tsc_offset(struct kvm_vcpu *vcpu, u64 host_tsc, + u64 target_tsc) { u64 tsc; - tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio); + tsc = kvm_scale_tsc(host_tsc, vcpu->arch.l1_tsc_scaling_ratio); return target_tsc - tsc; } @@ -2859,7 +2860,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) bool synchronizing = false; raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); - offset = kvm_compute_l1_tsc_offset(vcpu, data); + offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); ns = get_kvmclock_base_ns(); elapsed = ns - kvm->arch.last_tsc_nsec; @@ -2908,7 +2909,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) } else { u64 delta = nsec_to_cycles(vcpu, elapsed); data += delta; - offset = kvm_compute_l1_tsc_offset(vcpu, data); + offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); } matched = true; } @@ -4143,7 +4144,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info) if (msr_info->host_initiated) { kvm_synchronize_tsc(vcpu, &data); } else if (!vcpu->arch.guest_tsc_protected) { - u64 adj = kvm_compute_l1_tsc_offset(vcpu, data) - vcpu->arch.l1_tsc_offset; + u64 adj = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data) - + vcpu->arch.l1_tsc_offset; adjust_tsc_offset_guest(vcpu, adj); vcpu->arch.ia32_tsc_adjust_msr += adj; } @@ -5267,7 +5269,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) mark_tsc_unstable("KVM discovered backwards TSC"); if (kvm_check_tsc_unstable()) { - u64 offset = kvm_compute_l1_tsc_offset(vcpu, + u64 offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), vcpu->arch.last_guest_tsc); kvm_vcpu_write_tsc_offset(vcpu, offset); if (!vcpu->arch.guest_tsc_protected) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305103.1577749 (Exim 4.92) (envelope-from ) id 1wLqXS-0005MZ-4h; Sat, 09 May 2026 22:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305103.1577749; Sat, 09 May 2026 22:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-0005L2-S1; Sat, 09 May 2026 22:52:49 +0000 Received: by outflank-mailman (input) for mailman id 1305103; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXP-0004qZ-J7 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXP-00270l-0L; Sun, 10 May 2026 00:52:47 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba0e-5cb7-0a2a0a5109dd-0a2a450cd954-22 for ; Sun, 10 May 2026 00:52:46 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cd-62f1-0a2a450c0019-5a9b32228c26-3 for ; Sun, 10 May 2026 00:48:45 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LH-1BBJ; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIb-00Lr; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=i7duIEXMStsWYL6WzEUEDaNP/mNDkLAL2ohxoamlxeI=; b=tUOlFFtqlQAYYwkkjSAjnrd09b FlczeN8fbJ55CAdtEjipsEF6BGQa+jEwKWCAu7ZQWWLZNA2WyNUiwJqoU+9cIhKfRX3YlSbjCad+8 RJqZPdPJcvOSafcL8lIn0h/w9WRQZ42JkLCMmYn4ILswgFOm4+KN31x6l3TGrtDS/qyiqOqcGMmKo fW7cDJ9FimXogOx1R346817oTvmQRox1amlNQsTtmjffDrdm1jYEhJegyoEfIsc63AyrMh/jXzx7f Qd9kK+oZ4I03WNImARQGDVWRdK9mKi82Qx3p1Hw+Hu4WdPTsKlMcpx6Ju7nMHg0f2pvnTAmcwHySc jpEdKDRA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 21/30] KVM: x86: Replace nr_vcpus_matched_tsc count with all_vcpus_matched_tsc bool Date: Sat, 9 May 2026 23:46:47 +0100 Message-ID: <20260509224824.3264567-22-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1778366926-DB57FCF5-33742259/0/0 X-purgate-type: clean X-purgate-size: 2980 From: David Woodhouse Using a count and comparing with kvm->online_vcpus was always racy because a new vCPU could be created while kvm_track_tsc_matching() was running and comparing with kvm->online_vcpus. That variable is only atomic with respect to itself; kvm_arch_vcpu_create() runs before kvm->online_vcpus is incremented for the new vCPU. Replace the count with a boolean that is set in kvm_track_tsc_matching() after comparing the count, and cleared when a new TSC generation starts. The boolean is consumed by pvclock_update_vm_gtod_copy() under the tsc_write_lock, which serializes against __kvm_synchronize_tsc(). Keep the count for now as it's still used in the trace event. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/x86.c | 13 +++++++------ 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 59298a8f78eb..eb81f90284ba 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1492,6 +1492,7 @@ struct kvm_arch { u64 cur_tsc_write; u64 cur_tsc_offset; u64 cur_tsc_generation; + bool all_vcpus_matched_tsc; int nr_vcpus_matched_tsc; u32 default_tsc_khz; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 3c68d2a4c8d0..b74fd8b088ad 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2648,11 +2648,12 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) /* * To use the masterclock, the host clocksource must be based on TSC - * and all vCPUs must have matching TSCs. Note, the count for matching - * vCPUs doesn't include the reference vCPU, hence "+1". + * and all vCPUs must have matching TSCs. */ - bool use_master_clock = (ka->nr_vcpus_matched_tsc + 1 == - atomic_read(&vcpu->kvm->online_vcpus)) && + ka->all_vcpus_matched_tsc = (ka->nr_vcpus_matched_tsc + 1 == + atomic_read(&vcpu->kvm->online_vcpus)); + + bool use_master_clock = ka->all_vcpus_matched_tsc && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -2837,6 +2838,7 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, kvm->arch.cur_tsc_write = tsc; kvm->arch.cur_tsc_offset = offset; kvm->arch.nr_vcpus_matched_tsc = 0; + kvm->arch.all_vcpus_matched_tsc = false; } else if (vcpu->arch.this_tsc_generation != kvm->arch.cur_tsc_generation) { kvm->arch.nr_vcpus_matched_tsc++; } @@ -3176,8 +3178,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) bool host_tsc_clocksource, vcpus_matched; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 == - atomic_read(&kvm->online_vcpus)); + vcpus_matched = ka->all_vcpus_matched_tsc; /* * If the host uses TSC clock, then passthrough TSC as stable -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305104.1577756 (Exim 4.92) (envelope-from ) id 1wLqXS-0005Xy-Qa; Sat, 09 May 2026 22:52:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305104.1577756; Sat, 09 May 2026 22:52:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXS-0005W9-FU; Sat, 09 May 2026 22:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1305104; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000518-Fn for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXP-002c5y-Sz; Sun, 10 May 2026 00:52:47 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-18 for ; Sun, 10 May 2026 00:52:47 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-56b3-0a2a450a0019-5a9b3222ce94-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LL-20sT; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIr-0oMS; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=cVUBIMjJ1XQ+25DjUmKRxKTuLcXblZ+qoogoFwNKcIc=; b=torvBl2IxVi6KiT3kAGIroWI4I UHAsuTdRPh4qRitOygfigQ1bAbUUG7McF3OzIG9i9a0E5Fdpf7W2dxYsdi2T+3Da7wSe5wrhAU0Hu UXTwlv8WaP3QzacDy4C4jM3KVH7+Pp5XHWGBU/9KK0WTB73LlGyLWuyHeZv0hc5Kyz465wyPP1mlc lhDLx6WzRZ83hVWzBaedx016ZIz5E3feT+mmNponeRyijVADq9F52nSgTNfk9oNhSl0O0YtolH7OG 473u+7Q9XkH2jKKZnfrEAA5BnEuleCjxcuQLdk9/M+yQswQjTCyZ3FIwzZHbaOwIrPfMtA7EknKKU 2zPWQIJA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 25/30] KVM: x86/xen: Prevent runstate times from becoming negative Date: Sat, 9 May 2026 23:46:51 +0100 Message-ID: <20260509224824.3264567-26-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366927-6FB5F8B7-CB0D16A1/0/0 X-purgate-type: clean X-purgate-size: 2734 From: David Woodhouse When kvm_xen_update_runstate() is invoked to set a vCPU's runstate, the time spent in the previous runstate is accounted. This is based on the delta between the current KVM clock time, and the previous value stored in vcpu->arch.xen.runstate_entry_time. If the KVM clock goes backwards, that delta will be negative. Or, since it's an unsigned 64-bit integer, very *large*. Linux guests deal with that particularly badly, reporting 100% steal time for ever more (well, for *centuries* at least, until the delta has been consumed). So when a negative delta is detected, just refrain from updating the runstates until the KVM clock catches up with runstate_entry_time again. Also clamp steal_ns to delta_ns to prevent steal time from exceeding the total elapsed time, and handle negative steal_ns (which can happen if run_delay goes backwards across a scheduler update). The userspace APIs for setting the runstate times do not allow them to be set past the current KVM clock, but userspace can still adjust the KVM clock *after* setting the runstate times, which would cause this situation to occur. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/xen.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/x86/kvm/xen.c b/arch/x86/kvm/xen.c index 82e34edbfdbd..fef52b8ea26a 100644 --- a/arch/x86/kvm/xen.c +++ b/arch/x86/kvm/xen.c @@ -586,24 +586,33 @@ void kvm_xen_update_runstate(struct kvm_vcpu *v, int state) { struct kvm_vcpu_xen *vx = &v->arch.xen; u64 now = get_kvmclock_ns(v->kvm); - u64 delta_ns = now - vx->runstate_entry_time; u64 run_delay = current->sched_info.run_delay; + s64 delta_ns = now - vx->runstate_entry_time; + s64 steal_ns = run_delay - vx->last_steal; if (unlikely(!vx->runstate_entry_time)) vx->current_runstate = RUNSTATE_offline; + vx->last_steal = run_delay; + + /* + * If KVM clock time went backwards, stop updating until it + * catches up (or the runstates are reset by userspace). + */ + if (delta_ns < 0) + return; + /* * Time waiting for the scheduler isn't "stolen" if the * vCPU wasn't running anyway. */ - if (vx->current_runstate == RUNSTATE_running) { - u64 steal_ns = run_delay - vx->last_steal; + if (vx->current_runstate == RUNSTATE_running && steal_ns > 0) { + if (steal_ns > delta_ns) + steal_ns = delta_ns; delta_ns -= steal_ns; - vx->runstate_times[RUNSTATE_runnable] += steal_ns; } - vx->last_steal = run_delay; vx->runstate_times[vx->current_runstate] += delta_ns; vx->current_runstate = state; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305105.1577762 (Exim 4.92) (envelope-from ) id 1wLqXT-0005eb-70; Sat, 09 May 2026 22:52:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305105.1577762; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXS-0005cd-Rw; Sat, 09 May 2026 22:52:50 +0000 Received: by outflank-mailman (input) for mailman id 1305105; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-000532-LL for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-006SzZ-2G; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba91-bab6-0a2a0a5309dd-0a2a450884bc-22 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-63b5-0a2a45080019-5a9b322294c0-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LJ-1pmT; Sat, 09 May 2026 22:48:31 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIj-0Fe7; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=fg8C3e0zngZ/qjTwoH3UeG+KjIQgclDXz6pRh4tinms=; b=PKujpKHmlrgXqjPVL9jaYkGJO3 T53JltigiUhtpHLz+35Soyi64kAnFI6avFDSQ7/IsNyZ28l+qFCRvclVStCfZHOZz828JXHb31UdJ N7lE9EYlEhuJZCzxJ4ROVt9rXq8DoQ6Kq4DUaUrRGuQx0dP4khkmjRDJ/M13crOzpM7oqACBUXIs3 Q4nD8VTOzo/a5INBq2ieHxDAu27u1CaWybhnejK7d4D9LRkfa7L3FXKr81GvuOhbDZFGzyrQ8YMGi 8v/2/UeGdEcEt4bq95OSqY24tuE+B53teUl+Vpo85e3cKBhcevIqPiHpEnEnceUh3LIMiGmLn2PyW NDQeV2eg==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 23/30] KVM: x86: Factor out kvm_use_master_clock() Date: Sat, 9 May 2026 23:46:49 +0100 Message-ID: <20260509224824.3264567-24-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366927-BFD7BDB1-47E21989/13/0 X-purgate-type: clean X-purgate-size: 3576 From: David Woodhouse Both kvm_track_tsc_matching() and pvclock_update_vm_gtod_copy() make a decision about whether the KVM clock should be in master clock mode. They used *different* criteria for the decision though. This isn't really a problem; it only has the potential to cause unnecessary invocations of KVM_REQ_MASTERCLOCK_UPDATE if the masterclock was disabled due to TSC going backwards, or the guest using the old MSR. But it isn't pretty. Factor the decision out to a single function. And document the historical reason why it's disabled for guests that use the old MSR_KVM_SYSTEM_TIME. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 33 ++++++++++++++++++++++++++------- 1 file changed, 26 insertions(+), 7 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d36d03b8268e..0656d901fe79 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2640,6 +2640,27 @@ static inline bool gtod_is_based_on_tsc(int mode) } #endif +static bool kvm_use_master_clock(struct kvm *kvm) +{ + struct kvm_arch *ka = &kvm->arch; + + /* + * The 'old kvmclock' check is a workaround (from 2015) for a + * SUSE 2.6.16 kernel that didn't boot if the system_time in + * its kvmclock was too far behind the current time. So the + * mode of just setting the reference point and allowing time + * to proceed linearly from there makes it fail to boot. + * Despite that being kind of the *point* of the way the clock + * is exposed to the guest. By coincidence, the offending + * kernels used the old MSR_KVM_SYSTEM_TIME, which was moved + * only because it resided in the wrong number range. So the + * workaround is activated for *all* guests using the old MSR. + */ + return ka->all_vcpus_matched_freq && + !ka->backwards_tsc_observed && + !ka->boot_vcpu_runs_old_kvmclock; +} + static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) { #ifdef CONFIG_X86_64 @@ -2662,7 +2683,7 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) * are fine — each vCPU's pvclock has its own tsc_timestamp that * accounts for its offset. */ - bool use_master_clock = ka->all_vcpus_matched_freq && + bool use_master_clock = kvm_use_master_clock(vcpu->kvm) && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -3190,10 +3211,9 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) #ifdef CONFIG_X86_64 struct kvm_arch *ka = &kvm->arch; int vclock_mode; - bool host_tsc_clocksource, vcpus_matched; + bool host_tsc_clocksource; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = ka->all_vcpus_matched_freq; /* * If the host uses TSC clock, then passthrough TSC as stable @@ -3203,9 +3223,8 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) &ka->master_kernel_ns, &ka->master_cycle_now); - ka->use_master_clock = host_tsc_clocksource && vcpus_matched - && !ka->backwards_tsc_observed - && !ka->boot_vcpu_runs_old_kvmclock; + ka->use_master_clock = host_tsc_clocksource && + kvm_use_master_clock(kvm); if (ka->use_master_clock) { u64 tsc_hz; @@ -3231,7 +3250,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) vclock_mode = pvclock_gtod_data.clock.vclock_mode; trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode, - vcpus_matched); + ka->all_vcpus_matched_freq); #endif } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305106.1577768 (Exim 4.92) (envelope-from ) id 1wLqXT-0005kL-I0; Sat, 09 May 2026 22:52:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305106.1577768; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXT-0005j1-7k; Sat, 09 May 2026 22:52:51 +0000 Received: by outflank-mailman (input) for mailman id 1305106; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXQ-00054w-S0 for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-00270l-8r; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba8c-5cb7-0a2a0a5109dd-0a2a4502af40-16 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9cf-af86-0a2a45020019-5a9b322294d0-3 for ; Sun, 10 May 2026 00:48:47 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LG-11bn; Sat, 09 May 2026 22:48:30 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIX-44HE; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=iwNDogNMnm4WL4MqrZc8nsIfoorb7pJAk0uuGh5ggK4=; b=mRIMgmptP6nlE1xwJJE7wWchlj c5hj715Dq8L1J2PI/D8dsuU7xrbXhQSFIt0oyARLK3GdPSMaIrfKJHxkF9HDegFgOkjueS3rlt6/W 67i4Frua5/XiZINxBRRzCpomDpKO/csTN/dT245yPE+YO/RGSemOgeVIrNqUFKZUie5YfIuoBg59D g4vHNMHV7b+p80wEm1WwTOrLjMRW61Rdrzxh+x2pC5SJvDvJ5xkIWKHTGA60lHzLK+h51bNW2SkUq GFEo/NItxLK2xl668Yom6hg1gOvV+KTatfa1uufQQBtqoY9AZDAAT79NjCzqnQxh6Fr9HrZUmpbLh cxvDdfFQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 20/30] KVM: x86: Kill last_tsc_{nsec,write,offset} fields Date: Sat, 9 May 2026 23:46:46 +0100 Message-ID: <20260509224824.3264567-21-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1778366927-AB762161-F367B231/13/0 X-purgate-type: clean X-purgate-size: 5500 From: David Woodhouse These pointlessly duplicate the cur_tsc_{nsec,write,offset} values. The only place they were used was where the TSC is stable and a new vCPU is being synchronized to the previous setting, in which case the cur_tsc_* value is definitely identical. Rename last_tsc_khz and last_tsc_scaling_ratio to cur_tsc_khz and cur_tsc_scaling_ratio respectively, since they are properties of the current TSC generation. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/include/asm/kvm_host.h | 7 ++----- arch/x86/kvm/x86.c | 32 ++++++++++++++------------------ 2 files changed, 16 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index 5348fd5ea3f3..59298a8f78eb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1486,11 +1486,8 @@ struct kvm_arch { * preemption-disabled region, so it must be a raw spinlock. */ raw_spinlock_t tsc_write_lock; - u64 last_tsc_nsec; - u64 last_tsc_write; - u32 last_tsc_khz; - u64 last_tsc_offset; - u64 last_tsc_scaling_ratio; + u32 cur_tsc_khz; + u64 cur_tsc_scaling_ratio; u64 cur_tsc_nsec; u64 cur_tsc_write; u64 cur_tsc_offset; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 097df58749c3..3c68d2a4c8d0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2813,14 +2813,12 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, vcpu->kvm->arch.user_set_tsc = true; /* - * We also track th most recent recorded KHZ, write and time to - * allow the matching interval to be extended at each write. + * Track the TSC frequency, scaling ratio, and offset for the current + * generation. These are used to detect matching TSC writes and to + * compute the guest TSC from the host clock. */ - kvm->arch.last_tsc_nsec = ns; - kvm->arch.last_tsc_write = tsc; - kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz; - kvm->arch.last_tsc_offset = offset; - kvm->arch.last_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; + kvm->arch.cur_tsc_khz = vcpu->arch.virtual_tsc_khz; + kvm->arch.cur_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; vcpu->arch.last_guest_tsc = tsc; @@ -2833,8 +2831,6 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, * nanosecond time, offset, and write, so if TSCs are in * sync, we can match exact offset, and if not, we can match * exact software computation in compute_guest_tsc() - * - * These values are tracked in kvm->arch.cur_xxx variables. */ kvm->arch.cur_tsc_generation++; kvm->arch.cur_tsc_nsec = ns; @@ -2873,7 +2869,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); offset = kvm_compute_l1_tsc_offset(vcpu, host_tsc, data); - elapsed = ns - kvm->arch.last_tsc_nsec; + elapsed = ns - kvm->arch.cur_tsc_nsec; if (vcpu->arch.virtual_tsc_khz) { if (data == 0) { @@ -2883,7 +2879,7 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) */ synchronizing = true; } else if (kvm->arch.user_set_tsc) { - u64 tsc_exp = kvm->arch.last_tsc_write + + u64 tsc_exp = kvm->arch.cur_tsc_write + nsec_to_cycles(vcpu, elapsed); u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL; /* @@ -2914,14 +2910,14 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) * it's better to try to match offsets from the beginning. */ if (synchronizing && - vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) { + vcpu->arch.virtual_tsc_khz == kvm->arch.cur_tsc_khz) { /* * If synchronizing, the "last written" TSC value/time * recorded by __kvm_synchronize_tsc() should not change * (i.e. should be precisely the same as the existing * generation). */ - data = kvm->arch.last_tsc_write; + data = kvm->arch.cur_tsc_write; if (!kvm_check_tsc_unstable()) { offset = kvm->arch.cur_tsc_offset; @@ -3206,7 +3202,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) * get_kvmclock() to compute kvmclock from the host TSC * without needing a vCPU reference. */ - ka->master_tsc_scaling_ratio = ka->last_tsc_scaling_ratio; + ka->master_tsc_scaling_ratio = ka->cur_tsc_scaling_ratio; tsc_hz = (u64)get_cpu_tsc_khz() * 1000; if (tsc_hz && kvm_caps.has_tsc_control) tsc_hz = kvm_scale_tsc(tsc_hz, @@ -6075,8 +6071,8 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); matched = (vcpu->arch.virtual_tsc_khz && - kvm->arch.last_tsc_khz == vcpu->arch.virtual_tsc_khz && - kvm->arch.last_tsc_offset == offset); + kvm->arch.cur_tsc_khz == vcpu->arch.virtual_tsc_khz && + kvm->arch.cur_tsc_offset == offset); tsc = kvm_scale_tsc(rdtsc(), vcpu->arch.l1_tsc_scaling_ratio) + offset; ns = get_kvmclock_base_ns(); @@ -13520,8 +13516,8 @@ int kvm_arch_enable_virtualization_cpu(void) * you may have some problem. Solving this issue is * left as an exercise to the reader. */ - kvm->arch.last_tsc_nsec = 0; - kvm->arch.last_tsc_write = 0; + kvm->arch.cur_tsc_nsec = 0; + kvm->arch.cur_tsc_write = 0; } } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305107.1577770 (Exim 4.92) (envelope-from ) id 1wLqXU-0005uO-1d; Sat, 09 May 2026 22:52:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305107.1577770; Sat, 09 May 2026 22:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXT-0005sG-Ok; Sat, 09 May 2026 22:52:51 +0000 Received: by outflank-mailman (input) for mailman id 1305107; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXR-000585-AO for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXQ-006SzZ-NA; Sun, 10 May 2026 00:52:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-bab6-0a2a0a5309dd-0a2a4507d1b8-14 for ; Sun, 10 May 2026 00:52:48 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9d0-229c-0a2a45070019-5a9b3222c1fe-3 for ; Sun, 10 May 2026 00:48:48 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTC-000000060LA-3IS1; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHl-1rbg; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=XMpTG0soXwBy/thkGcHgDsOpdH9egi4Ry9N+LywUSzQ=; b=EKu/r3asoX2SfZ406BfO/egThQ F7iNeLfLoiU4BsuJsLO9wR8exCZfZ16VgO9TgglaLHmvaRE6F70VHCnwl5QPDB/JwnS10nhgau/yJ J7wo3Gx/Lb6KtqMv+CitqIMVfrl98+1mN1P9qTui4wUaHmhIF2QPv9yvu5B+ImTV0eMefXLrJykZI RZJN17BBtlrWPeX5MOsjcAWOEZY+jE7pmxG6iDAaJ3T+mJBuYORNrVKRUOhpuPNI4KwilZw/E9oC2 RqxHvK8aRbu2faUJNYRKNfBxBr/ZIi3kMgj6xBoxv/3p4ZSilEZi4CxBzlFx3KoZ7DRnwk1LjYxuB p3RWaigw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 08/30] KVM: x86: Avoid NTP frequency skew for KVM clock on 32-bit host Date: Sat, 9 May 2026 23:46:34 +0100 Message-ID: <20260509224824.3264567-9-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778366928-09D6FC48-54E68A94/13/0 X-purgate-type: clean X-purgate-size: 3670 From: David Woodhouse Commit 53fafdbb8b21 ("KVM: x86: switch KVMCLOCK base to monotonic raw clock") did so only for 64-bit hosts, by capturing the boot offset from within the existing clocksource notifier update_pvclock_gtod(). That notifier was added in commit 16e8d74d2da9 ("KVM: x86: notifier for clocksource changes") but only on x86_64, because its original purpose was just to disable the "master clock" mode which is only supported on x86_64. Now that the notifier is used for more than disabling master clock mode, enable it for the 32-bit build too so that get_kvmclock_base_ns() can be unaffected by NTP sync on 32-bit too. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 19 ++++++------------- 1 file changed, 6 insertions(+), 13 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 2179ea2da8e0..1e1834533e98 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2342,7 +2342,6 @@ static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data) return kvm_set_msr_ignored_check(vcpu, index, *data, true); } -#ifdef CONFIG_X86_64 struct pvclock_clock { int vclock_mode; u64 cycle_last; @@ -2400,13 +2399,6 @@ static s64 get_kvmclock_base_ns(void) /* Count up from boot time, but with the frequency of the raw clock. */ return ktime_to_ns(ktime_add(ktime_get_raw(), pvclock_gtod_data.offs_boot)); } -#else -static s64 get_kvmclock_base_ns(void) -{ - /* Master clock not used, so we can just use CLOCK_BOOTTIME. */ - return ktime_get_boottime_ns(); -} -#endif static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock, int sec_hi_ofs) { @@ -10160,6 +10152,7 @@ static void pvclock_irq_work_fn(struct irq_work *w) } static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn); +#endif /* * Notification about pvclock gtod data update. @@ -10167,26 +10160,26 @@ static DEFINE_IRQ_WORK(pvclock_irq_work, pvclock_irq_work_fn); static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused, void *priv) { - struct pvclock_gtod_data *gtod = &pvclock_gtod_data; struct timekeeper *tk = priv; update_pvclock_gtod(tk); +#ifdef CONFIG_X86_64 /* * Disable master clock if host does not trust, or does not use, * TSC based clocksource. Delegate queue_work() to irq_work as * this is invoked with tk_core.seq write held. */ - if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) && + if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode) && atomic_read(&kvm_guest_has_master_clock) != 0) irq_work_queue(&pvclock_irq_work); +#endif return 0; } static struct notifier_block pvclock_gtod_notifier = { .notifier_call = pvclock_gtod_notify, }; -#endif void kvm_setup_xss_caps(void) { @@ -10375,9 +10368,9 @@ int kvm_x86_vendor_init(struct kvm_x86_init_ops *ops) if (pi_inject_timer == -1) pi_inject_timer = housekeeping_enabled(HK_TYPE_TIMER); -#ifdef CONFIG_X86_64 pvclock_gtod_register_notifier(&pvclock_gtod_notifier); +#ifdef CONFIG_X86_64 if (hypervisor_is_type(X86_HYPER_MS_HYPERV)) set_hv_tscchange_cb(kvm_hyperv_tsc_notifier); #endif @@ -10434,8 +10427,8 @@ void kvm_x86_vendor_exit(void) CPUFREQ_TRANSITION_NOTIFIER); cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE); } -#ifdef CONFIG_X86_64 pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier); +#ifdef CONFIG_X86_64 irq_work_sync(&pvclock_irq_work); cancel_work_sync(&pvclock_gtod_work); #endif -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:52:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:52:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305109.1577803 (Exim 4.92) (envelope-from ) id 1wLqXZ-0007Co-O5; Sat, 09 May 2026 22:52:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305109.1577803; Sat, 09 May 2026 22:52:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXZ-0007Bf-G4; Sat, 09 May 2026 22:52:57 +0000 Received: by outflank-mailman (input) for mailman id 1305109; Sat, 09 May 2026 22:52:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXX-000748-Pe for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:52:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXX-006SzZ-6b; Sun, 10 May 2026 00:52:55 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba91-bab6-0a2a0a5309dd-0a2a450884bc-28 for ; Sun, 10 May 2026 00:52:55 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9d6-63b5-0a2a45080019-5a9b3222c200-3 for ; Sun, 10 May 2026 00:48:54 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-000000060LN-26fo; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIz-16xH; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=iccKma5DaUh/za+fsn0g6dyqukLvuPzbIDc21T+eVFU=; b=u6RYDSbD4U67hGcbeOF2FyQMxF 4dNfxJgj+Jw1VpmpgORUTUZi/lx3jqCjscmmNps9Ktu6RmyhKNQqG8Zrshc/lCMPNKFIfu5ClurIy afITS5d2xHSMWTG1ed+ca466NtWYvBcu88t51HCKij8WUt4q45fFjeqxZY2/6d429QdDCMJqzlYX7 P+yZB0umg7J4duqoMjVX9Fgti9c5kdgIh1TnkR32o+5SZVuXwWnuwEIwgF0Q+TO4dsFx/cw9gg56g 4jcjQhe2ozp2dKpbnlzBRde2x4i2wfno53zqxKIRk7l41GA2YKpPWUPfJlcBAfuh3NmuEZZFoC7Td q83vedYA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute Date: Sat, 9 May 2026 23:46:53 +0100 Message-ID: <20260509224824.3264567-28-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1778366934-BF77EDB1-33DC7014/13/0 X-purgate-type: clean X-purgate-size: 5057 From: David Woodhouse Add a read-only per-vCPU attribute that reports the effective TSC and APIC bus frequencies as seen by the guest, after hardware TSC scaling is applied. This allows userspace to populate CPUID leaf 0x40000010 (the "generic" timing information leaf used by FreeBSD, XNU, and VMware) with correct values, without KVM needing to modify guest CPUID at runtime. The effective TSC frequency differs from what userspace requested via KVM_SET_TSC_KHZ due to the granularity of hardware scaling and the host kernel's measurement of its own TSC frequency. The relationship between the attributes in KVM_VCPU_TSC_CTRL: KVM_VCPU_TSC_OFFSET: the offset added to the scaled host TSC KVM_VCPU_TSC_SCALE: the raw hardware scaling ratio and frac_bits, for VMClock and precise arithmetic KVM_VCPU_TSC_EFFECTIVE_FREQ: the resulting frequencies in kHz, for populating CPUID leaves Signed-off-by: David Woodhouse --- Documentation/virt/kvm/devices/vcpu.rst | 33 +++++++++++++++++++++++++ arch/x86/include/uapi/asm/kvm.h | 6 +++++ arch/x86/kvm/x86.c | 23 +++++++++++++++++ 3 files changed, 62 insertions(+) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 56562b932280..75d1c2bbb8bc 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -326,3 +326,36 @@ host TSC values are converted to guest TSC using the formula: Userspace can use this to precisely calculate the guest TSC from the host TSC at any given moment. This is needed for accurate migration of guests, as described in the documentation for the KVM_VCPU_TSC_OFFSET attribute. + +4.3 ATTRIBUTE: KVM_VCPU_TSC_EFFECTIVE_FREQ +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:Parameters: struct kvm_vcpu_tsc_effective_freq + +Returns: + + ======= ====================================== + -EFAULT Error reading the provided parameter + address. + -ENXIO Attribute not supported (no constant TSC) + ======= ====================================== + +This read-only attribute reports the effective TSC and APIC bus timer +frequencies as observed by the guest, after hardware TSC scaling is +applied:: + + struct kvm_vcpu_tsc_effective_freq { + __u32 tsc_khz; + __u32 bus_khz; + }; + +The tsc_khz field is the guest's effective TSC frequency in kHz. This +may differ slightly from what userspace requested via KVM_SET_TSC_KHZ +due to the granularity of hardware scaling and the host kernel's +measurement of its own TSC frequency. + +The bus_khz field is the APIC bus timer frequency in kHz. + +Userspace can use these values to populate CPUID timing leaves for the +guest, such as the generic timing leaf at 0x40000010 (EAX=tsc_khz, +EBX=bus_khz) or hypervisor-specific equivalents. diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h index 384be9a53395..196899296f84 100644 --- a/arch/x86/include/uapi/asm/kvm.h +++ b/arch/x86/include/uapi/asm/kvm.h @@ -962,12 +962,18 @@ struct kvm_hyperv_eventfd { #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */ #define KVM_VCPU_TSC_SCALE 1 /* attribute for TSC scaling factor */ +#define KVM_VCPU_TSC_EFFECTIVE_FREQ 2 /* attribute for effective frequencies */ struct kvm_vcpu_tsc_scale { __u64 tsc_ratio; __u64 tsc_frac_bits; }; +struct kvm_vcpu_tsc_effective_freq { + __u32 tsc_khz; + __u32 bus_khz; +}; + /* x86-specific KVM_EXIT_HYPERCALL flags. */ #define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 77dfd4455a4e..c15303963686 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -6079,6 +6079,9 @@ static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu, case KVM_VCPU_TSC_SCALE: r = kvm_caps.has_tsc_control ? 0 : -ENXIO; break; + case KVM_VCPU_TSC_EFFECTIVE_FREQ: + r = boot_cpu_has(X86_FEATURE_CONSTANT_TSC) ? 0 : -ENXIO; + break; default: r = -ENXIO; } @@ -6115,6 +6118,25 @@ static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu, r = 0; break; } + case KVM_VCPU_TSC_EFFECTIVE_FREQ: { + struct kvm_vcpu_tsc_effective_freq freq; + + if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) { + r = -ENXIO; + break; + } + + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) + kvm_guest_time_update(vcpu); + + freq.tsc_khz = div_u64(vcpu->arch.hw_tsc_hz, 1000); + freq.bus_khz = 1000000 / vcpu->kvm->arch.apic_bus_cycle_ns; + r = -EFAULT; + if (copy_to_user(uaddr, &freq, sizeof(freq))) + break; + r = 0; + break; + } default: r = -ENXIO; } @@ -6155,6 +6177,7 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, break; } case KVM_VCPU_TSC_SCALE: + case KVM_VCPU_TSC_EFFECTIVE_FREQ: r = -EINVAL; /* Read only */ break; default: -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305120.1577812 (Exim 4.92) (envelope-from ) id 1wLqXf-0007nO-4A; Sat, 09 May 2026 22:53:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305120.1577812; Sat, 09 May 2026 22:53:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007mx-Sm; Sat, 09 May 2026 22:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1305120; Sat, 09 May 2026 22:53:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXd-0007i0-Si for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-9C; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba1a-bab6-0a2a0a5309dd-0a2a4501b8f8-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-c1f2-0a2a45010019-5a9b5cc7e740-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzD-0P9r; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHx-2Z87; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=r8GUuEfSqVDY4ObHqgt5fkCwzZUXPNLZaFFwnl8uecE=; b=HmsoA/x37thVn7QmEUqzXzZ9dp ISe/5Rd32SNWt4q/Hbqvi9qSeQ3m/RtXJVGMmKWoN+OBAG8rHeLvJxRArpgwhp/bdKz6lzirvf8+j lU6es406aj7gY7eg4CaYfnmcL3Ekw6pKnOBZbpEf5Yi7Ujp3B0CbSJpFSogmG934w7gSa13zWF15F 8WY2cypbbhm5GfQeDwrC57KIozrcjnTuGUB//phuSrDxdxKUBVfD8R4QRbDbZwVGHlu49uXm1L5jK p7AtGqj6hNRZwETSVvraP00ZpIIBVXPuj3ThBQtbUkwVhFMHy4lwLeaSA6Rd3M8bbeKoJBkhcuJxJ rYlaHovQ==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 11/30] KVM: x86: Add WARN and restructure get_kvmclock() Date: Sat, 9 May 2026 23:46:37 +0100 Message-ID: <20260509224824.3264567-12-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1778366940-ADBA8FF4-964F25BB/13/0 X-purgate-type: clean X-purgate-size: 2313 From: David Woodhouse Add the same WARN_ON_ONCE for unexpected kvm_get_walltime_and_clockread() failure as in kvm_get_wall_clock_epoch(). Move get/put_cpu inside the use_master_clock branch since they are only needed there (for RDTSC and get_cpu_tsc_khz() to be on the same CPU). Also simplify the use_master_clock condition: the open-coded CONSTANT_TSC || cpu_tsc_khz check is unnecessary since use_master_clock can only be true when the TSC is usable. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 6f660c3210ee..9b395c00ccf2 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3209,21 +3209,27 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) do { seq = read_seqcount_begin(&ka->pvclock_sc); - /* both __this_cpu_read() and rdtsc() should be on the same cpu */ - get_cpu(); - data->flags = 0; - if (ka->use_master_clock && - (static_cpu_has(X86_FEATURE_CONSTANT_TSC) || __this_cpu_read(cpu_tsc_khz))) { + if (ka->use_master_clock) { #ifdef CONFIG_X86_64 struct timespec64 ts; +#endif + /* + * The RDTSC and get_cpu_tsc_khz() must happen on + * the same CPU. + */ + get_cpu(); +#ifdef CONFIG_X86_64 if (kvm_get_walltime_and_clockread(&ts, &data->host_tsc)) { data->realtime = ts.tv_nsec + NSEC_PER_SEC * ts.tv_sec; data->flags |= KVM_CLOCK_REALTIME | KVM_CLOCK_HOST_TSC; - } else -#endif + } else if (WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) { + data->host_tsc = rdtsc(); + } +#else data->host_tsc = rdtsc(); +#endif data->flags |= KVM_CLOCK_TSC_STABLE; hv_clock.tsc_timestamp = ka->master_cycle_now; @@ -3232,11 +3238,11 @@ static void get_kvmclock(struct kvm *kvm, struct kvm_clock_data *data) &hv_clock.tsc_shift, &hv_clock.tsc_to_system_mul); data->clock = __pvclock_read_cycles(&hv_clock, data->host_tsc); + + put_cpu(); } else { data->clock = get_kvmclock_base_ns() + ka->kvmclock_offset; } - - put_cpu(); } while (read_seqcount_retry(&ka->pvclock_sc, seq)); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305121.1577817 (Exim 4.92) (envelope-from ) id 1wLqXf-0007sI-Jt; Sat, 09 May 2026 22:53:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305121.1577817; Sat, 09 May 2026 22:53:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007re-Bq; Sat, 09 May 2026 22:53:03 +0000 Received: by outflank-mailman (input) for mailman id 1305121; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007ik-0l for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-Dj; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffbac8-bab6-0a2a0a5309dd-0a2a45058fce-2 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-aaa8-0a2a45050019-5a9b5cc785ee-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzL-0Tzi; Sat, 09 May 2026 22:48:27 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIn-0aFl; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=gfI2hlP2ghO7kkyYaxpeS6acpLBXM/Xjzeg1dOVvOBY=; b=QRXeSw9e0EZn2zrMh0ZMFdeOuH gWYH1Am3+0BI9z6x5jPUh85q3k5sy+S+6PCYf+8U0ulYWYrn5/9WtjOSvz+Fb4yRPvNn8wMEVq2Ee FqXuKANiZmVNTzEwuvyyzfQAkk5rPcDM94g8+018sWE0TCxEZYMBGG0dANDcR7FGqRlFbpFf7uuVt L++xNEjHUy1cqZyLQx3TVzs2EHXd6EoPsZIbj3oBDvKW5wu6DgH0+fohc1QpxXw+gtceIic+69G9B p1nYyIjwdlj0NMHJxzeg3E8VYyVWxIgA+QxNsssMNKPpcSi3HsTIune8KieKthZ++YCViDvVKCj83 1riSTOmA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 24/30] KVM: x86: Avoid gratuitous global clock updates Date: Sat, 9 May 2026 23:46:50 +0100 Message-ID: <20260509224824.3264567-25-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c201ff/1778366940-E119B443-EB3518E7/13/0 X-purgate-type: clean X-purgate-size: 2521 From: David Woodhouse Eliminate three sources of unnecessary KVM_REQ_GLOBAL_CLOCK_UPDATE: 1. kvm_write_system_time(): The global clock update was a workaround for ever-drifting clocks based on the host's CLOCK_MONOTONIC subject to NTP skew. On booting or resuming a guest, it just leads to running kvm_guest_time_update() twice for each vCPU for no good reason. Use KVM_REQ_CLOCK_UPDATE on the vCPU itself, and only when the clock is being enabled, not disabled. 2. kvm_arch_vcpu_load(): Use KVM_REQ_CLOCK_UPDATE instead of KVM_REQ_GLOBAL_CLOCK_UPDATE. There is no need to update all vCPUs' clocks when one vCPU is loaded. 3. kvm_gen_kvmclock_update(): Skip the periodic global update entirely when in master clock mode, since the clock is defined precisely by the guest TSC and doesn't drift. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 0656d901fe79..7d9ec0638d28 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2457,13 +2457,13 @@ static void kvm_write_system_time(struct kvm_vcpu *vcpu, gpa_t system_time, } vcpu->arch.time = system_time; - kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu); /* we verify if the enable bit is set... */ - if (system_time & 1) + if (system_time & 1) { kvm_gpc_activate(&vcpu->arch.pv_time, system_time & ~1ULL, sizeof(struct pvclock_vcpu_time_info)); - else + kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); + } else kvm_gpc_deactivate(&vcpu->arch.pv_time); return; @@ -3638,6 +3638,10 @@ static void kvm_gen_kvmclock_update(struct kvm_vcpu *v) struct kvm_vcpu *vcpu; struct kvm *kvm = v->kvm; + /* In master clock mode, the clock doesn't need periodic updates. */ + if (kvm->arch.use_master_clock) + return; + kvm_for_each_vcpu(i, vcpu, kvm) { kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); kvm_vcpu_kick(vcpu); @@ -5339,7 +5343,7 @@ void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) * kvmclock on vcpu->cpu migration */ if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1) - kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu); + kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu); if (vcpu->cpu != cpu) kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu); vcpu->cpu = cpu; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305122.1577822 (Exim 4.92) (envelope-from ) id 1wLqXg-0007y6-72; Sat, 09 May 2026 22:53:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305122.1577822; Sat, 09 May 2026 22:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007wb-Sh; Sat, 09 May 2026 22:53:03 +0000 Received: by outflank-mailman (input) for mailman id 1305122; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007ja-6a for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-006SzZ-JV; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-bab6-0a2a0a5309dd-0a2a4507d1b8-18 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-229c-0a2a45070019-5a9b5cc7b00c-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTE-00000008wzO-1SLK; Sat, 09 May 2026 22:48:29 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhJB-1rWh; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=7Ju9ZkuVTj15MTYPuc5v1baLIQZcnrhBioVVlGYLmig=; b=p9tq+aOMSeacmQ+4Sy4WtR+Bw1 rYvCfaSU8+lYsJ1CJ4Wy3pzj2uKXGy0pM0Ahea/jCqrw+5As5J8XgCbgN62RH7j2INOMeBQZuAIWB Hf1L4TNwru7qFAI4f8D1WGgtpujT/IjjqAWnDWz1VUrvNaFptMW1b+O++qTbN/ppWqeM6TyUvW8YV mflTFSI3RImhAJIQtf+O/jPIOeMiS7dA5nYi8sUibf5VboP3isIb2W1I3Dg+YT/BxfLoQkCXVpUAH R9/k0agLsuB17tEyMDxJhZ4DYg0sSBuzd2sIN4BUNWtGOm1xtsfk4W0cUu9vX8LGFQUJf9OwLePSX sjG3n0SA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 30/30] x86/xen: Obtain TSC frequency from CPUID if present Date: Sat, 9 May 2026 23:46:56 +0100 Message-ID: <20260509224824.3264567-31-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778366940-28C7DC48-9A34D9A4/13/0 X-purgate-type: clean X-purgate-size: 2077 From: David Woodhouse The Xen CPUID leaf 3, sub-leaf 0, ECX provides the guest TSC frequency in kHz directly. Use it when available instead of reverse-calculating the frequency from the pvclock tsc_to_system_mul and tsc_shift values, which loses precision. This mirrors the equivalent change for KVM guests using the generic 0x40000010 timing leaf. Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 3 +-- arch/x86/xen/time.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c15303963686..ac982652e5e0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -3469,7 +3469,6 @@ static void kvm_setup_guest_pvclock(struct pvclock_vcpu_time_info *ref_hv_clock, int kvm_guest_time_update(struct kvm_vcpu *v) { struct pvclock_vcpu_time_info hv_clock = {}; - unsigned long flags; u64 tgt_tsc_hz; unsigned seq; struct kvm_vcpu_arch *vcpu = &v->arch; @@ -10162,7 +10161,7 @@ static void kvm_hyperv_tsc_notifier(void) kvm_caps.max_guest_tsc_khz = tsc_khz; list_for_each_entry(kvm, &vm_list, vm_list) { - __kvm_start_pvclock_update(kvm); + __kvm_start_pvclock_update(kvm, NULL); pvclock_update_vm_gtod_copy(kvm); kvm_end_pvclock_update(kvm); } diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 6f9f665bb7ae..862b8e9e8405 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -41,8 +41,20 @@ static unsigned long xen_tsc_khz(void) { struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; + u32 eax, ebx, ecx, edx; + u32 base = xen_cpuid_base(); setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + + /* + * If Xen provides the guest TSC frequency directly in CPUID + * (leaf 3, sub-leaf 0, ECX), use that instead of reverse- + * calculating from the pvclock mul/shift. + */ + cpuid_count(base + 3, 0, &eax, &ebx, &ecx, &edx); + if (ecx) + return ecx; + return pvclock_tsc_khz(info); } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305123.1577828 (Exim 4.92) (envelope-from ) id 1wLqXh-00085l-6G; Sat, 09 May 2026 22:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305123.1577828; Sat, 09 May 2026 22:53:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXg-000835-Hw; Sat, 09 May 2026 22:53:04 +0000 Received: by outflank-mailman (input) for mailman id 1305123; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007k5-CC for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-00AYGp-P8; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba0e-5cb7-0a2a0a5109dd-0a2a450cd954-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-62f1-0a2a450c0019-5a9b5cc7e912-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzA-0Oe2; Sat, 09 May 2026 22:48:32 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhHh-1YLk; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=dFbbY5OtZVYUw6Qy5tHS1aKoaYMuSOyj4x77iW34VYE=; b=SE6rkQzNLq7L4CqMdEC8BZZ0P6 EjpyYbZKK7v43rP/AeQVjSCbX4CyqL7SJgHZ4T2fJwadBOsjBMNWV4O9xztFhbc8UcA+mg4CVAeM/ pF/f/hHOOeWQWkfR1yJ2MttlyGrwYzwM8Us9usfEsF/GJA5jH2cvu8IwGenT2kPZ0o39/N1dT+CvY nxohuJurpY0cff1GFCz0rJ1gt7T7yFG3MUVg02Quc5oH80soyrmI4lVS78+lhGlGprjcpiGEuprPs JbtHdqIH9/IguEaANVzJe00VtBFhZaDJfm4NidetUasrra5NgYbGP82uPUI+FCBzQ8t4ujGxOn5Cs 38tbJYDw==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 07/30] KVM: x86: Add KVM_VCPU_TSC_SCALE and fix the documentation on TSC migration Date: Sat, 9 May 2026 23:46:33 +0100 Message-ID: <20260509224824.3264567-8-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1778366940-F4E78CF5-1807B8E8/13/0 X-purgate-type: clean X-purgate-size: 4939 From: David Woodhouse The documentation on TSC migration using KVM_VCPU_TSC_OFFSET is woefully inadequate. It ignores TSC scaling, and ignores the fact that the host TSC may differ from one host to the next (and in fact because of the way the kernel calibrates it, it generally differs from one boot to the next even on the same hardware). Add KVM_VCPU_TSC_SCALE to extract the actual scale ratio and frac_bits, and attempt to document the process that userspace needs to follow to preserve the TSC across migration. Only enumerate KVM_VCPU_TSC_SCALE when kvm_caps.has_tsc_control is true, since the scaling ratio is only meaningful when hardware TSC scaling is supported. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- Documentation/virt/kvm/devices/vcpu.rst | 36 ++++++++++++++++++++++++- arch/x86/include/uapi/asm/kvm.h | 6 +++++ arch/x86/kvm/x86.c | 22 +++++++++++++++ 3 files changed, 63 insertions(+), 1 deletion(-) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index 5e3805820010..56562b932280 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -243,7 +243,10 @@ Returns: Specifies the guest's TSC offset relative to the host's TSC. The guest's TSC is then derived by the following equation: - guest_tsc = host_tsc + KVM_VCPU_TSC_OFFSET + guest_tsc = ((host_tsc * tsc_scale_ratio) >> tsc_scale_bits) + KVM_VCPU_TSC_OFFSET + +The values of tsc_scale_ratio and tsc_scale_bits can be obtained using +the KVM_VCPU_TSC_SCALE attribute. This attribute is useful to adjust the guest's TSC on live migration, so that the TSC counts the time during which the VM was paused. The @@ -292,3 +295,34 @@ From the destination VMM process: 7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the respective value derived in the previous step. + +4.2 ATTRIBUTE: KVM_VCPU_TSC_SCALE +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +:Parameters: struct kvm_vcpu_tsc_scale + +Returns: + + ======= ====================================== + -EFAULT Error reading the provided parameter + address. + -ENXIO Attribute not supported (no TSC scaling) + -EINVAL Invalid request to write the attribute + ======= ====================================== + +This read-only attribute reports the guest's TSC scaling factor, in the form +of a fixed-point number represented by the following structure:: + + struct kvm_vcpu_tsc_scale { + __u64 tsc_ratio; + __u64 tsc_frac_bits; + }; + +The tsc_frac_bits field indicates the location of the fixed point, such that +host TSC values are converted to guest TSC using the formula: + + guest_tsc = ((host_tsc * tsc_ratio) >> tsc_frac_bits) + offset + +Userspace can use this to precisely calculate the guest TSC from the host +TSC at any given moment. This is needed for accurate migration of guests, +as described in the documentation for the KVM_VCPU_TSC_OFFSET attribute. diff --git a/arch/x86/include/uapi/asm/kvm.h b/arch/x86/include/uapi/asm/kvm.h index 5f2b30d0405c..384be9a53395 100644 --- a/arch/x86/include/uapi/asm/kvm.h +++ b/arch/x86/include/uapi/asm/kvm.h @@ -961,6 +961,12 @@ struct kvm_hyperv_eventfd { /* for KVM_{GET,SET,HAS}_DEVICE_ATTR */ #define KVM_VCPU_TSC_CTRL 0 /* control group for the timestamp counter (TSC) */ #define KVM_VCPU_TSC_OFFSET 0 /* attribute for the TSC offset */ +#define KVM_VCPU_TSC_SCALE 1 /* attribute for TSC scaling factor */ + +struct kvm_vcpu_tsc_scale { + __u64 tsc_ratio; + __u64 tsc_frac_bits; +}; /* x86-specific KVM_EXIT_HYPERCALL flags. */ #define KVM_EXIT_HYPERCALL_LONG_MODE _BITULL(0) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index d1327d5fba3f..2179ea2da8e0 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -5930,6 +5930,9 @@ static int kvm_arch_tsc_has_attr(struct kvm_vcpu *vcpu, case KVM_VCPU_TSC_OFFSET: r = 0; break; + case KVM_VCPU_TSC_SCALE: + r = kvm_caps.has_tsc_control ? 0 : -ENXIO; + break; default: r = -ENXIO; } @@ -5950,6 +5953,22 @@ static int kvm_arch_tsc_get_attr(struct kvm_vcpu *vcpu, break; r = 0; break; + case KVM_VCPU_TSC_SCALE: { + struct kvm_vcpu_tsc_scale scale; + + if (!kvm_caps.has_tsc_control) { + r = -ENXIO; + break; + } + + scale.tsc_ratio = vcpu->arch.l1_tsc_scaling_ratio; + scale.tsc_frac_bits = kvm_caps.tsc_scaling_ratio_frac_bits; + r = -EFAULT; + if (copy_to_user(uaddr, &scale, sizeof(scale))) + break; + r = 0; + break; + } default: r = -ENXIO; } @@ -5989,6 +6008,9 @@ static int kvm_arch_tsc_set_attr(struct kvm_vcpu *vcpu, r = 0; break; } + case KVM_VCPU_TSC_SCALE: + r = -EINVAL; /* Read only */ + break; default: r = -ENXIO; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305124.1577831 (Exim 4.92) (envelope-from ) id 1wLqXh-0008Bw-Lr; Sat, 09 May 2026 22:53:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305124.1577831; Sat, 09 May 2026 22:53:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXh-00089s-3B; Sat, 09 May 2026 22:53:05 +0000 Received: by outflank-mailman (input) for mailman id 1305124; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXe-0007kw-Ga for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXd-002c5y-Ts; Sun, 10 May 2026 00:53:01 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffba4c-e002-0a2a0a5209dd-0a2a450ae9e4-24 for ; Sun, 10 May 2026 00:53:01 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9dc-56b3-0a2a450a0019-5a9b5cc7b01a-3 for ; Sun, 10 May 2026 00:49:00 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzK-0NIx; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTD-0000000DhIf-06oU; Sat, 09 May 2026 23:48:27 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To: From:Reply-To:Cc:Content-ID:Content-Description; bh=kOxo26JgkgBnkgpV4u4u6bNS0TzdmD76LNhTnJ/HBkg=; b=S1Qj7ot+NvaVb/ETnLNcOSWLI7 a8uV8eSZQIwsFNUiD0HkK8FYHDMAVTpOBbqWewmXi9iTOyErjosby5Pac1eE/QdywtKg3s1IgXLek HsNyTFM+ykVPLWmEpjCYTbzPzXkWq2gBFRY2VWy5lSXutf/hfKCAX5QZID2vs2Qba7bmYbLFSYdHJ e63CuDfT1qC1GqGhST/XGcE8ayKk2efxCazSVC33178g9UgpHiWeSxDzwAU6HGywcZLQDaNc+JTqO f/VY+Sc/cuha12qsM/abTJXD6y2KRPxWwrDd1pwd3HDISKnYc2g96zWw4BFuGCu9pg1BtxPbgj7Dm WQFH5k/g==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 22/30] KVM: x86: Allow KVM master clock mode when TSCs are offset from each other Date: Sat, 9 May 2026 23:46:48 +0100 Message-ID: <20260509224824.3264567-23-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778366940-727758B7-C95BCE30/13/0 X-purgate-type: clean X-purgate-size: 4581 From: David Woodhouse There is no reason why the KVM clock cannot be in masterclock mode when the TSCs are not in sync, as long as they are at the same *frequency*. Running at a different frequency would lead to a systemic skew between the clock(s) as observed by different vCPUs due to arithmetic precision in the scaling. So that should indeed force the clock to be based on the host's CLOCK_MONOTONIC_RAW instead of being in masterclock mode where it is defined by the guest TSC. But when the vCPUs merely have a different TSC *offset*, that's not a problem. The offset is applied to that vCPU's kvmclock->tsc_timestamp field, and it all comes out in the wash. Track frequency matching separately from full TSC matching. Use frequency match for master clock eligibility, and full TSC match (including offset) only for PVCLOCK_TSC_STABLE_BIT, which tells the guest it is safe to skip cross-vCPU monotonicity enforcement. Signed-off-by: David Woodhouse --- arch/x86/include/asm/kvm_host.h | 1 + arch/x86/kvm/x86.c | 27 +++++++++++++++++++++------ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h index eb81f90284ba..c770c63087cb 100644 --- a/arch/x86/include/asm/kvm_host.h +++ b/arch/x86/include/asm/kvm_host.h @@ -1493,6 +1493,7 @@ struct kvm_arch { u64 cur_tsc_offset; u64 cur_tsc_generation; bool all_vcpus_matched_tsc; + bool all_vcpus_matched_freq; int nr_vcpus_matched_tsc; u32 default_tsc_khz; diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index b74fd8b088ad..d36d03b8268e 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2647,13 +2647,22 @@ static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu, bool new_generation) struct pvclock_gtod_data *gtod = &pvclock_gtod_data; /* - * To use the masterclock, the host clocksource must be based on TSC - * and all vCPUs must have matching TSCs. + * Track whether all vCPUs have matching TSC offsets (for + * PVCLOCK_TSC_STABLE_BIT) and matching frequencies (for + * master clock eligibility). */ ka->all_vcpus_matched_tsc = (ka->nr_vcpus_matched_tsc + 1 == atomic_read(&vcpu->kvm->online_vcpus)); + if (ka->all_vcpus_matched_tsc) + ka->all_vcpus_matched_freq = true; - bool use_master_clock = ka->all_vcpus_matched_tsc && + /* + * To use the masterclock, the host clocksource must be based on TSC + * and all vCPUs must have matching TSC *frequency*. Different offsets + * are fine — each vCPU's pvclock has its own tsc_timestamp that + * accounts for its offset. + */ + bool use_master_clock = ka->all_vcpus_matched_freq && gtod_is_based_on_tsc(gtod->clock.vclock_mode); /* @@ -2817,7 +2826,13 @@ static void __kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 offset, u64 tsc, * Track the TSC frequency, scaling ratio, and offset for the current * generation. These are used to detect matching TSC writes and to * compute the guest TSC from the host clock. + * + * If the frequency changed, master clock mode can no longer be used + * since the kvmclock scaling factors differ between vCPUs. */ + if (vcpu->arch.virtual_tsc_khz != kvm->arch.cur_tsc_khz) + kvm->arch.all_vcpus_matched_freq = false; + kvm->arch.cur_tsc_khz = vcpu->arch.virtual_tsc_khz; kvm->arch.cur_tsc_scaling_ratio = vcpu->arch.l1_tsc_scaling_ratio; @@ -3178,7 +3193,7 @@ static void pvclock_update_vm_gtod_copy(struct kvm *kvm) bool host_tsc_clocksource, vcpus_matched; lockdep_assert_held(&kvm->arch.tsc_write_lock); - vcpus_matched = ka->all_vcpus_matched_tsc; + vcpus_matched = ka->all_vcpus_matched_freq; /* * If the host uses TSC clock, then passthrough TSC as stable @@ -3513,7 +3528,7 @@ int kvm_guest_time_update(struct kvm_vcpu *v) /* If the host uses TSC clocksource, then it is stable */ hv_clock.flags = 0; - if (use_master_clock) + if (use_master_clock && ka->all_vcpus_matched_tsc) hv_clock.flags |= PVCLOCK_TSC_STABLE_BIT; if (vcpu->pv_time.active) { @@ -6340,7 +6355,7 @@ static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; hv_clock.tsc_to_system_mul = vcpu->pvclock_tsc_mul; - hv_clock.flags = PVCLOCK_TSC_STABLE_BIT; + hv_clock.flags = ka->all_vcpus_matched_tsc ? PVCLOCK_TSC_STABLE_BIT : 0; if (copy_to_user(argp, &hv_clock, sizeof(hv_clock))) return -EFAULT; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Sat May 09 22:53:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 09 May 2026 22:53:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305125.1577839 (Exim 4.92) (envelope-from ) id 1wLqXi-0008RV-TA; Sat, 09 May 2026 22:53:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305125.1577839; Sat, 09 May 2026 22:53:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXi-0008OH-AD; Sat, 09 May 2026 22:53:06 +0000 Received: by outflank-mailman (input) for mailman id 1305125; Sat, 09 May 2026 22:53:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wLqXf-0007tu-Tc for xen-devel@lists.xenproject.org; Sat, 09 May 2026 22:53:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wLqXf-008rH7-8W; Sun, 10 May 2026 00:53:03 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 69ffbac3-2eae-0a2a0a5409dd-0a2a450bb858-4 for ; Sun, 10 May 2026 00:53:03 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 69ffb9de-212f-0a2a450b0019-5a9b5cc7e74a-3 for ; Sun, 10 May 2026 00:49:02 +0200 Received: from [2001:8b0:10b:1::425] (helo=i7.infradead.org) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wLqTD-00000008wzJ-0RiQ; Sat, 09 May 2026 22:48:28 +0000 Received: from dwoodhou by i7.infradead.org with local (Exim 4.98.2 #2 (Red Hat Linux)) id 1wLqTC-0000000DhIT-3ti3; Sat, 09 May 2026 23:48:26 +0100 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Sender:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From:Reply-To: Cc:Content-Type:Content-ID:Content-Description; bh=zXYXQPXLzd2dcTYMg1gTvCK26tkN2cOEOzkWZ733ogk=; b=AEobeMIDugUN7eiHan6hG45ktT R8amBcPRPjDj++/KH0EpUAl64+jTiq4HqRCpFlKNJbg0Of6kv36aIL7EvtIvglcW5i5jGHAErQ/Vc dKqUBmeqrAnIe6LEB2fkB/ovB+UQdK3lXaCR+dnU6korDQshJ5DAdhqpWOyaEv2G77UTRa8f2x22C vKZ63Pm6BoF5585QClj84e8/cDylBglkhaMYVB2KseLvn9zQSkWprSvtDDW1OWTfLa57WKhE62eZM 6HqViX8GtTkrFcAN4TnSazhzMhDCuRlzY/mlo7x8njgH/Krm4SCYrSqNM4P0sypNw9QrDVk8fCKh2 5QfynusA==; From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: [PATCH v4 19/30] KVM: x86: Improve synchronization in kvm_synchronize_tsc() Date: Sat, 9 May 2026 23:46:45 +0100 Message-ID: <20260509224824.3264567-20-dwmw2@infradead.org> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: David Woodhouse X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1778366942-19165F3B-805BB91F/13/0 X-purgate-type: clean X-purgate-size: 3595 From: David Woodhouse When synchronizing to an existing TSC (either by explicitly writing zero, or the legacy hack where the TSC is written within one second's worth of the previously written TSC), the last_tsc_write and last_tsc_nsec values were being misrecorded by __kvm_synchronize_tsc(). The *unsynchronized* value of the TSC (perhaps even zero) was being recorded, along with the current time at which kvm_synchronize_tsc() was called. This could cause *subsequent* writes to fail to synchronize correctly. Fix that by resetting {data, ns} to the previous values before passing them to __kvm_synchronize_tsc() when synchronization is detected. Except in the case where the TSC is unstable and *has* to be synthesised from the host clock, in which case attempt to create a nsec/tsc pair which is on the correct line. Furthermore, there were *three* different TSC reads used for calculating the "current" time, all slightly different from each other. Fix that by using kvm_get_time_and_clockread() where possible and using the same host_tsc value in all cases. Signed-off-by: David Woodhouse Reviewed-by: Paul Durrant --- arch/x86/kvm/x86.c | 32 ++++++++++++++++++++++++++++---- 1 file changed, 28 insertions(+), 4 deletions(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index c9cbebd6a92a..097df58749c3 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -203,6 +203,9 @@ module_param(mitigate_smt_rsb, bool, 0444); * usermode, e.g. SYSCALL MSRs and TSC_AUX, can be deferred until the CPU * returns to userspace, i.e. the kernel can run with the guest's value. */ +#ifdef CONFIG_X86_64 +static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp); +#endif #define KVM_MAX_NR_USER_RETURN_MSRS 16 struct kvm_user_return_msrs { @@ -2854,14 +2857,22 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) { u64 data = user_value ? *user_value : 0; struct kvm *kvm = vcpu->kvm; - u64 offset, ns, elapsed; + u64 offset, host_tsc, ns, elapsed; unsigned long flags; bool matched = false; bool synchronizing = false; +#ifdef CONFIG_X86_64 + if (!kvm_get_time_and_clockread(&ns, &host_tsc)) +#endif + { + ns = get_kvmclock_base_ns(); + host_tsc = rdtsc(); + } + raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags); - offset = kvm_compute_l1_tsc_offset(vcpu, rdtsc(), data); - ns = get_kvmclock_base_ns(); + + offset = kvm_compute_l1_tsc_offset(vcpu, host_tsc, data); elapsed = ns - kvm->arch.last_tsc_nsec; if (vcpu->arch.virtual_tsc_khz) { @@ -2904,12 +2915,25 @@ static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value) */ if (synchronizing && vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) { + /* + * If synchronizing, the "last written" TSC value/time + * recorded by __kvm_synchronize_tsc() should not change + * (i.e. should be precisely the same as the existing + * generation). + */ + data = kvm->arch.last_tsc_write; + if (!kvm_check_tsc_unstable()) { offset = kvm->arch.cur_tsc_offset; + ns = kvm->arch.cur_tsc_nsec; } else { + /* + * ...unless the TSC is unstable and has to be + * synthesised from the host clock in nanoseconds. + */ u64 delta = nsec_to_cycles(vcpu, elapsed); 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Sat, 09 May 2026 23:02:53 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Sun, 10 May 2026 09:02:42 +0300 X-Gm-Features: AVHnY4Liw9b4vVk0zuGrKmULc20ZcK-O_7r4lptAmDphN-WnqIpD3Sa7zwS3D0Y Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1778392974-E0D63CF5-B8D4D1B9/0/0 X-purgate-type: clean X-purgate-size: 6276 On Fri, May 8, 2026 at 1:57=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > >> > >>> + } > >>> + > >>> + off =3D i * sizeof(irqs->icfgr); > >>> + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > >>> + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > >>> + } > >>> + > >>> + /* Make sure all registers are restored and enable distributor *= / > >>> + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); > >>> + > >>> + /* Restore GIC CPU interface configuration */ > >>> + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); > >>> + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); > >>> + > >>> + /* Enable GIC CPU interface */ > >>> + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); > >>> +} > >>> + > >> > >> I also see that we don=E2=80=99t save pending SGIs state (by GICD_CPEN= DSGIRn/GICD_SPENDSGIRn) or Active Priorities registers > >> state (GICC_APRn/GICC_NSAPRn [latter if security extension are there])= as written in [1] =E2=80=9C4.5 Preserving and restoring GIC state=E2=80=9D= , > >> was it intentional? > > > > Yes, this was intentional. > > > > The GICv2 suspend callback is called at a quiescent point in the > > SYSTEM_SUSPEND path: all domains are already shut down for suspend, gue= st > > execution is quiesced, the scheduler is disabled, non-boot CPUs have be= en > > offlined, and CPU0 enters gic_suspend() with local interrupts disabled. > > > > For SGIs, I don't consider GICD_CPENDSGIRn/GICD_SPENDSGIRn part of the = saved > > host GIC context. Xen uses physical SGIs as IPIs, and IPI delivery is a= n > > internal synchronization mechanism, not architectural state that should= be > > replayed after SYSTEM_SUSPEND. Guest SGI state is virtual GIC state and= is not > > represented by these physical GICD SGI pending registers. > > ack, I would maybe mention in the commit message that we exclude transien= t IPI/active-priority > state at the suspend quiescent point. Ack. > > > > > For GICC_APRn/GICC_NSAPRn, those registers describe active priority sta= te for > > interrupts already acknowledged by the CPU interface. The final suspend= path is > > not expected to run with an active physical interrupt context. If those > > registers were non-zero there, restoring only APR/NSAPR would not make = the > > corresponding interrupt handling context valid after resume, and could = instead > > leave the CPU interface with stale active priority state. > > Ok I understand now, but if we are expecting here GICD_ISACTIVERn zeroed,= why are > we saving/restoring it? Shouldn=E2=80=99t we instead have a runtime check= that it=E2=80=99s zero and in case > it=E2=80=99s not bail out? And in the resume path we would only zero it. > > Am I missing something? Good questions. Yes, the distinction I should have made clearer is between CPU-interface active-priority state and distributor active state. For GICC_APRn/GICC_NSAPRn, I expect the state to be quiesced at this point. Those registers track active priorities in the CPU interface. Xen reaches gic_suspend() with local interrupts disabled, and for the guest-routed interrupt case that can leave a distributor active bit behind, Xen has already performed the physical EOI, so the CPU-interface priority has been dropped. There is no CPU-interface active-priority context that we can meaningfully replay after resume. That is different from GICD_ISACTIVERn. In EOImode=3D=3D1, EOIR only drops = the priority. The interrupt remains active in the distributor until the separat= e deactivation step. For a guest-routed interrupt Xen's GICv2 guest end path = does only the physical EOI; deactivation is completed later by the virtual GIC/G= ICV path when the guest completes the interrupt. This is why APR/NSAPR and ISACTIVERn are treated differently. For example: 1. A physical IRQ routed to a guest is acknowledged by Xen. 2. The GIC marks the interrupt active in the distributor. 3. Xen EOIs it, which drops the physical priority. 4. Xen queues/injects the interrupt to the vGIC. 5. The guest has not yet run, or the virtual interrupt is not yet deliver= able because of guest PMR/priority/local IRQ masking/vGIC state. 6. Therefore the guest-side deactivate has not happened yet, and the phys= ical distributor active bit remains set. There is also a late suspend window in the current Xen path: domains are suspended and the scheduler is disabled before local IRQs are disabled. A guest-routed IRQ can therefore be taken by Xen after the guest is already suspended, but before gic_suspend(). Xen can EOI/priority-drop it and queue it for the guest, while the guest cannot run and deactivate it before the GIC state is saved. This is the same class of issue handled by Linux for GIC EOImode=3D=3D1. Li= nux saves/restores the active state because forwarded interrupts can remain act= ive while passed to a VM [1]. So I don't think GICD_ISACTIVERn should be treated as "must be zero" unless= we also add an explicit suspend-abort/quiesce policy for in-flight guest interrupts. That would be a different design: detect non-zero active/in-fli= ght state, unwind suspend, thaw domains, let the guest drain/deactivate the interrupts, and retry later. This series does not implement that policy. Gi= ven the current flow, preserving GICD_ISACTIVERn avoids losing architectural interrupt-controller state across suspend/resume. I am not opposed to such a policy as a follow-up if we want stricter suspen= d quiescence rules, but I think it should be designed explicitly rather than inferred from the GIC save/restore code. Best regards, Mykola [1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/1447701208-= 18150-5-git-send-email-marc.zyngier@arm.com/ > > > > > So I did not add save/restore for GICD_CPENDSGIRn/GICD_SPENDSGIRn or > > GICC_APRn/GICC_NSAPRn in this patch. I can add a short comment in v9 to= make > > this scope explicit. > > > > Please let me know if you think there is a suspend/resume path where th= is > > state still needs to be preserved. > > > > Best regards, > > Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Sun May 10 20:59:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 10 May 2026 20:59:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305593.1577884 (Exim 4.92) (envelope-from ) id 1wMBFI-0005H9-Eb; Sun, 10 May 2026 20:59:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305593.1577884; Sun, 10 May 2026 20:59:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMBFI-0005H2-AY; Sun, 10 May 2026 20:59:28 +0000 Received: by outflank-mailman (input) for mailman id 1305593; Sun, 10 May 2026 20:59:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMBFH-0005FU-9P for xen-devel@lists.xenproject.org; Sun, 10 May 2026 20:59:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMBFG-003wke-Mc; Sun, 10 May 2026 22:59:26 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a00f152-5cb7-0a2a0a5109dd-0a2a450aec3c-34 for ; Sun, 10 May 2026 22:59:25 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a00f1ad-56b3-0a2a450a0019-5a9b322292ea-3 for ; Sun, 10 May 2026 22:59:25 +0200 Received: from 54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBEe-00000007GLM-0IXw; Sun, 10 May 2026 20:58:58 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=xVN4cOYEHLvsvTsrs+Mo4ZF+TKkKL5dKm3kNYJ9llFY=; b=qnSpKJ33qhVTOfzu2g2xy/mOWn WgAnKyKONg75//4h4TDKLqKtbEQC7vadz8Gu58pP3oL3ub0M1GFAwcY9vKlYRq/oc8zuJV92NgJwN f0/3F1kmVCbhl4p3jm+cNSRXnfz7h4ZI6Wro/2ShZlH3AuHcVuiCSkNIe2CWQ44+SFexvzRskAKPJ T4d0cDCMojrcEffGmo1ijQzcCVZZp+YHV9S8qlpFnbGMvSBzPvWGFumv+QOsL2MzlaF3y1cNVq0zR 1YRaRp9pbvZTesm0G9/tAEwB+YZfloUwHm951aEWeSoah+Ey4FFSi/QSgIo8wW8wNsxc+W7c3bUQ0 F7hgqY/A==; Message-ID: <6a820ac041d4d289dba2e78eff815443a036fe0d.camel@infradead.org> Subject: [PATCH v4 31/30] KVM: selftests: Add Xen/generic CPUID timing leaf test From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 21:58:21 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-Baioh5K8VSQI5oIkCRkB" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1778446765-7D5868B7-18587396/0/0 X-purgate-type: clean X-purgate-size: 16200 --=-Baioh5K8VSQI5oIkCRkB Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse Verify that userspace can correctly populate Xen and generic CPUID timing leaves using the KVM_VCPU_TSC_EFFECTIVE_FREQ and KVM_VCPU_TSC_SCALE attributes. This validates that the removal of KVM's runtime Xen CPUID modification doesn't break guests: userspace queries the effective TSC and bus frequencies, computes the pvclock mul/shift, populates the CPUID leaves, and the guest verifies the values match. The test exercises: - KVM_VCPU_TSC_EFFECTIVE_FREQ at native and scaled frequencies - KVM_VCPU_TSC_SCALE ratio verification against effective frequency - Generic timing leaf 0x40000010 (EAX=3Dtsc_khz, EBX=3Dbus_khz) - Xen leaf 3 sub-leaf 0 (ECX=3Dguest TSC kHz) - Xen leaf 3 sub-leaf 1 (ECX=3Dmul, EDX=3Dshift) Gracefully skips TSC scaling tests on hardware without support. Signed-off-by: David Woodhouse --- tools/testing/selftests/kvm/Makefile.kvm | 1 + .../selftests/kvm/x86/xen_cpuid_timing_test.c | 232 ++++++++++++++++++ 2 files changed, 233 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c diff --git a/tools/testing/selftests/kvm/Makefile.kvm b/tools/testing/selft= ests/kvm/Makefile.kvm index fb935ae3bf38..50f02116249f 100644 --- a/tools/testing/selftests/kvm/Makefile.kvm +++ b/tools/testing/selftests/kvm/Makefile.kvm @@ -139,6 +139,7 @@ TEST_GEN_PROGS_x86 +=3D x86/xss_msr_test TEST_GEN_PROGS_x86 +=3D x86/debug_regs TEST_GEN_PROGS_x86 +=3D x86/tsc_msrs_test TEST_GEN_PROGS_x86 +=3D x86/vmx_pmu_caps_test +TEST_GEN_PROGS_x86 +=3D x86/xen_cpuid_timing_test TEST_GEN_PROGS_x86 +=3D x86/xen_shinfo_test TEST_GEN_PROGS_x86 +=3D x86/xen_vmcall_test TEST_GEN_PROGS_x86 +=3D x86/sev_init2_tests diff --git a/tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c b/tool= s/testing/selftests/kvm/x86/xen_cpuid_timing_test.c new file mode 100644 index 000000000000..f574343ed449 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/xen_cpuid_timing_test.c @@ -0,0 +1,232 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Test that userspace can correctly populate Xen and generic CPUID + * timing leaves using KVM_VCPU_TSC_EFFECTIVE_FREQ. + * + * This validates that the removal of KVM's runtime Xen CPUID modification + * doesn't break guests, because userspace has all the information needed. + */ +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +#define XEN_CPUID_BASE 0x40000100 +#define XEN_CPUID_LEAF(n) (XEN_CPUID_BASE + (n)) +#define GENERIC_TIMING_LEAF 0x40000010 + +/* Values set by host, verified by guest */ +static uint32_t expected_tsc_khz; +static uint32_t expected_bus_khz; +static uint32_t expected_tsc_mul; +static int8_t expected_tsc_shift; +static uint64_t host_khz; + +static void guest_code(void) +{ + uint32_t eax, ebx, ecx, edx; + + /* Check generic timing leaf 0x40000010 */ + __cpuid(GENERIC_TIMING_LEAF, 0, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(eax, expected_tsc_khz); + GUEST_ASSERT_EQ(ebx, expected_bus_khz); + + /* Check Xen leaf 3, sub-leaf 0: ECX =3D guest TSC frequency */ + __cpuid(XEN_CPUID_LEAF(3), 0, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(ecx, expected_tsc_khz); + + /* Check Xen leaf 3, sub-leaf 1: ECX =3D mul, EDX =3D shift */ + __cpuid(XEN_CPUID_LEAF(3), 1, &eax, &ebx, &ecx, &edx); + GUEST_ASSERT_EQ(ecx, expected_tsc_mul); + GUEST_ASSERT_EQ((int8_t)edx, expected_tsc_shift); + + GUEST_SYNC(0); +} + +static void add_cpuid_entry(struct kvm_vcpu *vcpu, uint32_t function, + uint32_t index, uint32_t eax, uint32_t ebx, + uint32_t ecx, uint32_t edx) +{ + struct kvm_cpuid2 *cpuid =3D vcpu->cpuid; + struct kvm_cpuid_entry2 *entry; + int n =3D cpuid->nent; + + vcpu->cpuid =3D realloc(vcpu->cpuid, + sizeof(*cpuid) + (n + 1) * sizeof(*entry)); + cpuid =3D vcpu->cpuid; + cpuid->nent =3D n + 1; + + entry =3D &cpuid->entries[n]; + memset(entry, 0, sizeof(*entry)); + entry->function =3D function; + entry->index =3D index; + entry->flags =3D KVM_CPUID_FLAG_SIGNIFCANT_INDEX; + entry->eax =3D eax; + entry->ebx =3D ebx; + entry->ecx =3D ecx; + entry->edx =3D edx; +} + +/* + * Compute pvclock mul/shift from frequency, matching kvm_get_time_scale()= . + */ +static void compute_tsc_mul_shift(uint64_t tsc_hz, uint32_t *mul, int8_t *= shift) +{ + uint64_t scaled =3D 1000000000ULL; + uint64_t base =3D tsc_hz; + int32_t s =3D 0; + uint32_t base32; + + while (base > scaled * 2 || base >> 32) { + base >>=3D 1; + s--; + } + base32 =3D (uint32_t)base; + while (base32 <=3D scaled || scaled >> 32) { + if (scaled >> 32 || base32 & (1U << 31)) + scaled >>=3D 1; + else + base32 <<=3D 1; + s++; + } + *mul =3D (uint32_t)((scaled << 32) / base32); + *shift =3D (int8_t)s; +} + +static void run_test(uint64_t tsc_khz) +{ + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct ucall uc; + struct { uint32_t tsc_khz; uint32_t bus_khz; } freq; + struct kvm_device_attr freq_attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 2, /* KVM_VCPU_TSC_EFFECTIVE_FREQ */ + .addr =3D (uint64_t)(uintptr_t)&freq, + }; + + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); + + if (tsc_khz) { + pr_info("Testing at TSC frequency %lu kHz\n", tsc_khz); + vcpu_ioctl(vcpu, KVM_SET_TSC_KHZ, (void *)(unsigned long)tsc_khz); + } else { + pr_info("Testing at native TSC frequency\n"); + } + + vcpu_ioctl(vcpu, KVM_GET_DEVICE_ATTR, &freq_attr); + + /* If scaling wasn't applied, skip this frequency */ + if (tsc_khz && freq.tsc_khz =3D=3D host_khz) { + pr_info(" TSC scaling not available, skipping\n"); + kvm_vm_release(vm); + return; + } + + pr_info(" Effective TSC: %u kHz, Bus: %u kHz\n", freq.tsc_khz, freq.bus_= khz); + + /* Also exercise KVM_VCPU_TSC_SCALE if available */ + { + struct { uint64_t ratio; uint64_t frac_bits; } scale; + struct kvm_device_attr scale_attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 1, /* KVM_VCPU_TSC_SCALE */ + .addr =3D (uint64_t)(uintptr_t)&scale, + }; + + if (!__vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &scale_attr)) { + vcpu_ioctl(vcpu, KVM_GET_DEVICE_ATTR, &scale_attr); + pr_info(" TSC scale: ratio=3D%lu frac_bits=3D%lu\n", + scale.ratio, scale.frac_bits); + + /* + * Verify: applying the ratio to the host TSC frequency + * should give approximately the effective frequency. + */ + if (tsc_khz) { + uint64_t computed =3D ((__uint128_t)host_khz * scale.ratio) >> scale.f= rac_bits; + int64_t diff =3D (int64_t)computed - (int64_t)freq.tsc_khz; + + TEST_ASSERT(diff >=3D -1 && diff <=3D 1, + "TSC_SCALE ratio mismatch: computed %lu vs effective %u (diff %ld= )", + computed, freq.tsc_khz, diff); + } + } + } + + compute_tsc_mul_shift((uint64_t)freq.tsc_khz * 1000, + &expected_tsc_mul, &expected_tsc_shift); + + expected_tsc_khz =3D freq.tsc_khz; + expected_bus_khz =3D freq.bus_khz; + + sync_global_to_guest(vm, expected_tsc_khz); + sync_global_to_guest(vm, expected_bus_khz); + sync_global_to_guest(vm, expected_tsc_mul); + sync_global_to_guest(vm, expected_tsc_shift); + + /* Populate CPUID leaves as a VMM would */ + add_cpuid_entry(vcpu, GENERIC_TIMING_LEAF, 0, + freq.tsc_khz, freq.bus_khz, 0, 0); + add_cpuid_entry(vcpu, XEN_CPUID_LEAF(3), 0, + 0, 0, freq.tsc_khz, 0); + add_cpuid_entry(vcpu, XEN_CPUID_LEAF(3), 1, + 0, 0, expected_tsc_mul, + (uint32_t)(uint8_t)expected_tsc_shift); + + vcpu_set_cpuid(vcpu); + + pr_info(" pvclock mul=3D%u shift=3D%d\n", expected_tsc_mul, expected_tsc= _shift); + + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + + switch (get_ucall(vcpu, &uc)) { + case UCALL_ABORT: + REPORT_GUEST_ASSERT(uc); + break; + case UCALL_SYNC: + break; + default: + TEST_FAIL("Unexpected ucall"); + } + + kvm_vm_release(vm); +} + +int main(void) +{ + uint64_t freq; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct kvm_device_attr attr =3D { + .group =3D KVM_VCPU_TSC_CTRL, + .attr =3D 2, + }; + + TEST_REQUIRE(sys_clocksource_is_based_on_tsc()); + + /* Check KVM_VCPU_TSC_EFFECTIVE_FREQ is supported */ + vm =3D vm_create_with_one_vcpu(&vcpu, guest_code); + TEST_REQUIRE(!__vcpu_ioctl(vcpu, KVM_HAS_DEVICE_ATTR, &attr)); + host_khz =3D __vcpu_ioctl(vcpu, KVM_GET_TSC_KHZ, NULL); + kvm_vm_release(vm); + + /* Native frequency */ + run_test(0); + + /* Scaled frequencies =E2=80=94 skip if TSC scaling not available */ + for (freq =3D 1000000; freq <=3D 4000000; freq +=3D 1000000) { + if (freq =3D=3D host_khz) + continue; + run_test(freq); + } + + pr_info("PASS: All CPUID timing leaf tests passed\n"); + return 0; +} --=20 2.43.0 --=-Baioh5K8VSQI5oIkCRkB Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT 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for ; Sun, 10 May 2026 22:59:04 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a00f197-229c-0a2a45070019-5a9b3222df74-3 for ; Sun, 10 May 2026 22:59:04 +0200 Received: from 54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBER-00000007GKB-3RrH; Sun, 10 May 2026 20:58:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2fh66ArsKe8U1Q1vazOhgHC7ZL/RSaZ7Onoha+m5hJY=; b=vgVEtbex1j5sE2mCcKtcKlE90c nPwt7nAiy4w+dbfimkczHzK87JFH4kM4KgZjrdWnOLksjWypfG3VOs67WLsDD8y03Qqi0InQ2OtXC WYZXB/uvdNqa016XglX2VV6uCC+d7mD0aGi2i+5qfchaeHrFdf3sty4Lsrompyku6pTWNTcvjbBA6 vihKszwBl4Nffc6cDeaKKXKEBO+wjUBJltWD5cvYUZtDGAAQUqK1UtUUNUWfxZBhQojEcmQ/90YKn QoO8kKJeV0kpegy7ENLQBcdbTpTH2LoKfQiCkFZBbchm6mcPDsPNSw83iPAmkMo3HqEc0TBTVKeya FAE5luUA==; Message-ID: <0c199440c2cfd56a4c8e451134c6a0b1137507d6.camel@infradead.org> Subject: [PATCH v4 33/30] KVM: selftests: Add Xen runstate migration test From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 21:56:35 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-SFVUe3tfsnRVPe9dwb/j" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778446744-0B175C48-6EC8CD65/0/0 X-purgate-type: clean X-purgate-size: 15302 --=-SFVUe3tfsnRVPe9dwb/j Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse Test that Xen runstate (steal time) is correctly accounted across a simulated live migration using KVM_XEN_VCPU_ATTR and KVM_[GS]ET_CLOCK_GUEST= . The test simulates what a real VMM does during migration: 1. Creates a VM with Xen HVM config and runstate tracking 2. Runs the guest to accumulate some kvmclock time 3. Saves clock (KVM_GET_CLOCK_GUEST), TSC offset, and runstate 4. Marks the saved state as RUNSTATE_runnable (vCPU not running) 5. Destroys the source VM 6. Sleeps 10ms (simulating migration network transfer time) 7. Creates a new VM and restores all state precisely as saved 8. Runs the guest and verifies the migration gap appears as steal The kernel accounts the gap because: on vcpu_load, it transitions from RUNSTATE_runnable to RUNSTATE_running, computing delta =3D kvmclock_now - state_entry_time. Since kvmclock has advanced past the saved entry time (real time elapsed during migration), the delta is added to time_runnable. Signed-off-by: David Woodhouse --- .../selftests/kvm/x86/xen_migration_test.c | 194 ++++++++++++++++++ 1 file changed, 194 insertions(+) create mode 100644 tools/testing/selftests/kvm/x86/xen_migration_test.c diff --git a/tools/testing/selftests/kvm/x86/xen_migration_test.c b/tools/t= esting/selftests/kvm/x86/xen_migration_test.c new file mode 100644 index 000000000000..37e8ace00611 --- /dev/null +++ b/tools/testing/selftests/kvm/x86/xen_migration_test.c @@ -0,0 +1,194 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Test Xen runstate (steal time) preservation across simulated migration. + * + * Verifies that the kernel correctly accounts the migration gap as + * steal time (runnable) when runstate data is saved and restored + * precisely, but real time elapses during the migration. + * + * The key insight: userspace saves the runstate with state=3DRUNSTATE_run= nable + * (the vCPU is not running during migration). On restore, the kernel sees + * that kvmclock has advanced past state_entry_time, and accounts the + * difference as time spent in the runnable state. + */ +#include +#include +#include +#include +#include + +#include "test_util.h" +#include "kvm_util.h" +#include "processor.h" + +#include + +#define SHINFO_GPA 0xc0000000ULL +#define RUNSTATE_GPA (SHINFO_GPA + 0x1000) + +#define RUNSTATE_running 0 +#define RUNSTATE_runnable 1 +#define RUNSTATE_blocked 2 +#define RUNSTATE_offline 3 + +struct vcpu_runstate_info { + uint32_t state; + uint64_t state_entry_time; + uint64_t time[4]; +} __attribute__((packed)); + +static void guest_code(void) +{ + volatile struct vcpu_runstate_info *rs =3D + (void *)(unsigned long)RUNSTATE_GPA; + + /* Report runstate times =E2=80=94 no need to enable kvmclock MSR, + * the kernel writes runstate using its internal kvmclock. */ + GUEST_SYNC_ARGS(0, rs->time[RUNSTATE_runnable], + rs->time[RUNSTATE_running], 0, 0); +} + +static struct kvm_vm *create_xen_vm(struct kvm_vcpu **vcpu) +{ + struct kvm_vm *vm; + int xen_caps; + + vm =3D vm_create_with_one_vcpu(vcpu, guest_code); + + xen_caps =3D kvm_check_cap(KVM_CAP_XEN_HVM); + TEST_REQUIRE(xen_caps & KVM_XEN_HVM_CONFIG_SHARED_INFO); + TEST_REQUIRE(xen_caps & KVM_XEN_HVM_CONFIG_RUNSTATE); + + /* Map pages */ + vm_userspace_mem_region_add(vm, VM_MEM_SRC_ANONYMOUS, + SHINFO_GPA, 1, 2, 0); + virt_map(vm, SHINFO_GPA, SHINFO_GPA, 2); + + /* Enable Xen HVM with MSR interception (enables runstate tracking) */ + struct kvm_xen_hvm_config cfg =3D { + .flags =3D KVM_XEN_HVM_CONFIG_INTERCEPT_HCALL, + .msr =3D 0x40000000, + }; + vm_ioctl(vm, KVM_XEN_HVM_CONFIG, &cfg); + + /* Set shared_info */ + struct kvm_xen_hvm_attr ha =3D { + .type =3D KVM_XEN_ATTR_TYPE_SHARED_INFO, + .u.shared_info.gfn =3D SHINFO_GPA >> 12, + }; + vm_ioctl(vm, KVM_XEN_HVM_SET_ATTR, &ha); + + /* Set runstate address */ + struct kvm_xen_vcpu_attr rs_addr =3D { + .type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_ADDR, + .u.gpa =3D RUNSTATE_GPA, + }; + vcpu_ioctl(*vcpu, KVM_XEN_VCPU_SET_ATTR, &rs_addr); + + return vm; +} + +int main(void) +{ + struct pvclock_vcpu_time_info pvti; + struct kvm_xen_vcpu_attr runstate_save; + struct kvm_vcpu *vcpu; + struct kvm_vm *vm; + struct ucall uc; + uint64_t tsc_offset; + int ret; + + /* =3D=3D=3D SOURCE SIDE =3D=3D=3D */ + pr_info("=3D=3D=3D Source: create VM and run guest =3D=3D=3D\n"); + vm =3D create_xen_vm(&vcpu); + + /* Run guest once to accumulate some runstate time */ + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + TEST_ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC); + + pr_info(" Guest sees: runnable=3D%" PRIu64 " running=3D%" PRIu64 "\n", + uc.args[2], uc.args[3]); + + /* Save clock state */ + ret =3D __vcpu_ioctl(vcpu, KVM_GET_CLOCK_GUEST, &pvti); + TEST_ASSERT(!ret, "KVM_GET_CLOCK_GUEST failed"); + + /* Save TSC offset */ + tsc_offset =3D vcpu_get_msr(vcpu, MSR_IA32_TSC_ADJUST); + + /* Save runstate =E2=80=94 the vCPU is now "runnable" (not running) */ + runstate_save.type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA; + vcpu_ioctl(vcpu, KVM_XEN_VCPU_GET_ATTR, &runstate_save); + + /* + * Transition to runnable state before saving =E2=80=94 the vCPU is + * not running during migration. + */ + runstate_save.u.runstate.state =3D RUNSTATE_runnable; + + pr_info(" Saved runstate: running=3D%" PRIu64 " runnable=3D%" PRIu64 + " entry=3D%" PRIu64 "\n", + (uint64_t)runstate_save.u.runstate.time_running, + (uint64_t)runstate_save.u.runstate.time_runnable, + (uint64_t)runstate_save.u.runstate.state_entry_time); + + uint64_t saved_runnable =3D runstate_save.u.runstate.time_runnable; + + kvm_vm_release(vm); + + /* =3D=3D=3D MIGRATION GAP =3D=3D=3D */ + pr_info("=3D=3D=3D Simulating migration (sleeping 10ms) =3D=3D=3D\n"); + usleep(10000); + + /* =3D=3D=3D DESTINATION SIDE =3D=3D=3D */ + pr_info("=3D=3D=3D Destination: create new VM and restore =3D=3D=3D\n"); + vm =3D create_xen_vm(&vcpu); + + /* Restore TSC offset */ + vcpu_set_msr(vcpu, MSR_IA32_TSC_ADJUST, tsc_offset); + + /* Restore clock =E2=80=94 kvmclock will now be ~10ms ahead of the snapsh= ot */ + vcpu_ioctl(vcpu, KVM_SET_CLOCK_GUEST, &pvti); + + /* Restore runstate exactly as saved (state=3Drunnable) */ + runstate_save.type =3D KVM_XEN_VCPU_ATTR_TYPE_RUNSTATE_DATA; + ret =3D __vcpu_ioctl(vcpu, KVM_XEN_VCPU_SET_ATTR, &runstate_save); + TEST_ASSERT(!ret, "Restore runstate failed: errno %d", errno); + + /* + * Run the guest. When the vCPU enters vcpu_run, the kernel + * transitions from RUNSTATE_runnable to RUNSTATE_running. + * It computes: delta =3D kvmclock_now - state_entry_time + * This delta (which includes the migration gap) is added to + * time_runnable (steal time). + */ + vcpu_run(vcpu); + TEST_ASSERT_KVM_EXIT_REASON(vcpu, KVM_EXIT_IO); + TEST_ASSERT_EQ(get_ucall(vcpu, &uc), UCALL_SYNC); + + uint64_t guest_runnable =3D uc.args[2]; + uint64_t guest_running =3D uc.args[3]; + + pr_info(" Guest sees: runnable=3D%" PRIu64 " running=3D%" PRIu64 "\n", + guest_runnable, guest_running); + + uint64_t steal_increase =3D guest_runnable - saved_runnable; + pr_info(" Steal time increase: %" PRIu64 " ns (migration gap)\n", + steal_increase); + + /* + * The steal time increase should be at least 10ms (the sleep) + * but not more than 5s (allowing for VM creation overhead). + * The actual gap is from the source's state_entry_time to the + * destination's kvmclock "now" at vcpu_load time. + */ + TEST_ASSERT(steal_increase >=3D 10000000ULL && + steal_increase < 5000000000ULL, + "Steal time increase %" PRIu64 " ns not in expected range " + "[10ms, 5s]", steal_increase); + + kvm_vm_release(vm); + pr_info("PASS: Migration gap correctly accounted as steal time\n"); + return 0; +} --=20 2.43.0 --=-SFVUe3tfsnRVPe9dwb/j Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj 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54-240-197-234.amazon.com ([54.240.197.234] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wMBLA-00000007GmD-1vIF; Sun, 10 May 2026 21:05:36 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=bhNOFvkH719t7i9pQvqgD9PQhJFs6ir/zUj3G3rKD18=; b=k3gDaT7vBcXRudpVf2JczbIT1q 5afuzuA0DX9RyNuKWPIbcFfMzM95N5bcyy38ZIevIkLL9zY4zLoghfyqt5mCgw8RfARtFladk4DRS mhEmCZR0wnj1sMkVgMRew2bzKtPMcrFIMBGzMRto5CiJui/yonAWitgBo7DXOG5JF9RIu1i377M2A pgfSLhdq3rJcC+kwSrgxUxqx9iVfay9FgtA+vIZz0+eZTBiF3uABfmOlRptJ3ez23N83pSvwwqWSb icd8XPttOeADBiZBrMnnQzrvU7QGpB/zx9+imXaF4rhTGXJghLDrx3sI7cbaAI/Qvr8bngLVEixRy 87Plb/WQ==; Message-ID: <66458bbc44f98b7f9742007348a9f70ee8086429.camel@infradead.org> Subject: [PATCH v4 32/30] KVM: x86: Re-synchronize TSC after KVM_SET_TSC_KHZ From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , David Woodhouse , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Dongli Zhang , Jack Allister , Joe Jin , Joey Gouly , kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Sun, 10 May 2026 22:05:31 +0100 In-Reply-To: <20260509224824.3264567-1-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-n1rYoFphXBZk9zIVxw0J" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1778447153-28479C48-A21FFE83/0/0 X-purgate-type: clean X-purgate-size: 9332 --=-n1rYoFphXBZk9zIVxw0J Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable From: David Woodhouse KVM_SET_TSC_KHZ changes the vCPU's TSC scaling ratio but does not update the VM-wide cur_tsc_scaling_ratio used by get_kvmclock(). This causes get_kvmclock() to use a stale (default 1:1) ratio when computing the KVM clock, leading to drift between the host-side kvmclock and what the guest observes. Fix this by calling kvm_synchronize_tsc() after changing the TSC frequency. This: - Updates cur_tsc_scaling_ratio (consumed by pvclock_update_vm_gtod_copy) - Ensures the TSC value is continuous across the frequency change - Triggers kvm_track_tsc_matching() for proper masterclock handling - Allows subsequent vCPUs to synchronize via the 1-second slop hack Signed-off-by: David Woodhouse --- arch/x86/kvm/x86.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index ac982652e5e0..833a4f119e22 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -206,6 +206,7 @@ module_param(mitigate_smt_rsb, bool, 0444); #ifdef CONFIG_X86_64 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)= ; #endif +static void kvm_synchronize_tsc(struct kvm_vcpu *vcpu, u64 *user_value); #define KVM_MAX_NR_USER_RETURN_MSRS 16 =20 struct kvm_user_return_msrs { @@ -2611,7 +2612,20 @@ static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u3= 2 user_tsc_khz) user_tsc_khz, thresh_lo, thresh_hi); use_scaling =3D 1; } - return set_tsc_khz(vcpu, user_tsc_khz, use_scaling); + if (set_tsc_khz(vcpu, user_tsc_khz, use_scaling)) + return -1; + + /* + * Re-synchronize the TSC after changing frequency. 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+0200 Roger Pau Monn=C3=A9 wrote: > >> + pci_writel(devfn, 0x40, ACPI_PM1A_EVT_BLK_ADDRESS_V1 | 1); >> + pci_writeb(devfn, 0x44, 0x80); /* enable PM io space */ >> + outl(SCI_EN_IOPORT, inl(SCI_EN_IOPORT) | GBL_SMI_EN | APMC_EN); > >Most of the above looks like black magic. It's not like the context >of this function is great, most of the existing stuff is poorly >documented. Can we get a bit more comments about what's this supposed >to do, and maybe a reference to the Intel specification that lists >where those PCI config space registers are coming from? This is a precondition for the (later) switch to ACPI. First, we set the ACPI I/O registers base - it can be absolutely arbitrary but we choose the same value that was used before for PIIX4 - ACPI_PM1A_EVT_BLK_ADDRESS_V1. The "| 1" part is likely NOT necessary and should be removed unless QEMU has a bug with its handling - according to Intel datasheet, bit0 is "Hardwired to 1 to indicate I/O space", no need to set it explicitly. At this point we can use ACPI I/O register block at ACPI_PM1A_EVT_BLK_ADDRESS_V1. We are only interested in one register from this range - at offset +30h. SCI_EN_IOPORT is a wrong name actually, it should be renamed to SMI_EN_IOPORT. Finally, the line "outl(SCI_EN_IOPORT, inl(SCI_EN_IOPORT) | GBL_SMI_EN | APMC_EN)" enables SMI generation - we will use it later to perform a classic APM -> ACPI switch via a write to the APM_CNT (0B2h) register to trigger an SW SMI, followed by validating SCI_EN=3D1 to confirm the successful switch. Basically, all this setup is just a preparation for the step done in the next patch - "hvmloader: add ACPI enabling for Q35". What I don't remember is who was actually responsible for actual ACPI enabling - either QEMU or firmware. On real systems it is a bit more complicated - the APM -> ACPI switch is done by an ACPI-aware OS itself (OSPM, how they call it). The OS extracts information from ACPI tables and use it to find out what and where to write in order to switch to ACPI. Under the hood it's still a special value written to the SW SMI register, triggering a SMI handler in the firmware. The actual hand-off to ACPI was done by the SMI handler, including switching the PM interrupt from SMI to ACPI's SCI. I'm not sure why hvmloader does this switch early instead. But at least this APM -> ACPI switch flow matches the older (PIIX4) one. Perhaps this is how it was handled by QEMU. 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pr=C Message-ID: Date: Mon, 11 May 2026 08:16:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-2-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468A:EE_|SJ5PPF4D350AC80:EE_ X-MS-Office365-Filtering-Correlation-Id: 7b3daa51-a50f-438a-1005-08deaf24e7b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700016|18002099003|22082099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PzD+cxI9Vgws0aogubZQWwvV+NhUTySfMr8pNfvcqPcLS37QXpIr/D+qjwaG3Fhh/3D6raN2+NeH8BXKXK741IbyE//pj2tuA81tRzSUtpqexjnXFHLcPgq9N+MFRcr5WixLZn6qcjEpGIsA7mwR3HajTM4oQlzUT3ZeaoNnLizQ3VL7nwbvSLkh2olbcdAOzwTmwpnRdYEIlrWM9R6GHbhNwyBzsETUM9Ih0LqqftB2+kcRYGkbUhy6x4T4y0UyyZMKyNrhw/kooh9iPkyAJ3kRzi4innXqX86DhECaoGrqIKuQQEcqAve9h867fx9T0fHUal+Dbx2lEzyyG60c/J90wnyP1AtIIIxBZ8J59o6wpl7WevBF1XI1Bz0G21PnS9DhpumO48XrDZmPRibfUCw4zdJL8phZFYk8bIa0P/ufQsuNjuJsipblf1Ufz8Nq X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:16:57.3853 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7b3daa51-a50f-438a-1005-08deaf24e7b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPF4D350AC80 X-purgate-ID: tlsNG-33051d/1778480223-38B74938-F545CCBE/0/0 X-purgate-type: clean X-purgate-size: 3134 On 08-May-26 23:29, Andrew Cooper wrote: > The binaries/ directory is a composition from the artefacts, and also used as > a working directory for most of the tests. If the very first artefact is from > a root container, then the test must also be a root container to use it as a > working directory. > > For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the > microcode-x86 artefact as it's the smallest available. This bodge can be > removed when all build containers have become non-root. > > For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs > ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate > the *-export dependency. > > This will allow us to change containers to being non-root one at a time, > rather than all in one go. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Stefano Stabellini > CC: Michal Orzel > CC: Doug Goldstein > > We should also stop using binaries/ as a working directory for the tests, but > that gets very complicated very quickly and I don't have time to do it at this > juncture. > --- > automation/gitlab-ci/test.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index 8770c523e228..517af1732437 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -15,6 +15,12 @@ > - qemu-system-aarch64-6.0.0-arm64-export > > .arm32-test-needs: &arm32-test-needs > + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes > + # from a non-root container, and microcode-x86 is the smallest. Remove when > + # all build containers have become non-root. > + - project: $ARTIFACTS_REPO > + job: microcode-x86 > + ref: $ARTIFACTS_BRANCH I don't see it being removed in this series even though the containers are non-root. > - qemu-system-aarch64-6.0.0-arm32-export > > .x86-64-test-needs: &x86-64-test-needs > @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: > script: > - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} > needs: > + - *arm64-test-needs This also pulls in Linux image and rootfs which XTF tests don't need. I think it's much better for a test to list the actual list of its dependencies. Otherwise you are asking user/developer to dig into the yaml. ~Michal > - alpine-3.18-gcc-arm64 > - - qemu-system-aarch64-6.0.0-arm64-export > > qemu-xtf-dom0less-arm64-gcc-debug-hyp-xen-version: > extends: .qemu-arm64 > script: > - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} > needs: > + - *arm64-test-needs > - alpine-3.18-gcc-debug-arm64 > - - qemu-system-aarch64-6.0.0-arm64-export > > qemu-smoke-dom0-arm32-gcc: > extends: .qemu-arm32 From xen-devel-bounces@lists.xenproject.org Mon May 11 06:20:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:20:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305769.1577920 (Exim 4.92) (envelope-from ) id 1wMK0F-0001Ox-79; Mon, 11 May 2026 06:20:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305769.1577920; Mon, 11 May 2026 06:20:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMK0F-0001Oq-3e; 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bh=jdM50mrh+pLYS3OuhZx93MxruQNAV7za+f+2dsNIGHI=; b=DuhJUDGTUT0ApIGE104cq5qXHSMeZHIiXOEdLvlJqBtu3R3VM7p2qom3w6WOyMCxtPr3QOXJQgpKC8Wscut66m5S8zARHxyuXjVGzXCVMWAGxqWqpKE5bQJpqzYZkB/5QRwnTncp7Yr242v8cUlqHiPE5WTnhgjr75FRsSxPOTs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 08:20:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] CI: Refresh the Debian 12 arm32 cross compile container To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-3-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-3-andrew.cooper3@citrix.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7veMQPN66XqAvkyGCc5+jfHd8yIhGKAnc2BEY6bzTBt7whu3M9ynyUaGQnjGGX/RZtkSn+6iYqi5TxEnRodYGc8VV913ORSNEe0o9dUAupbKvk2zPufMZwhjda1yNnO7NUanjY5wtL6SxlYh1qMqdL7Xsqg2HuL7IiKn1E4PjEyPjptR/MV+xFFSy/bsAi1k1EztB+THr20LwER8hEGtLvr6xeaZDy7ZlWUQC1H1Ff8iURE591YouJpV8EVOJwhLf0bEsXKsB3CaJ0a3dPd3RpizWIUMhmj9is3HRDqYEzmeA3P5dvGzLZC1Rh7jqn0I+mLgIWE6Zy7MLPoNrRbCcSXqkzuKWqE0jTQMubcnLBNPaPH0NbARctzaoaAeSgxEGebYFjQdy/SozShPG4NfYAqdwKvU/k4YCZzm2lEWHl0QsHE63DXWQY5Qgdx+C3/P X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:20:19.9290 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a00b48ea-851d-425e-db29-08deaf25606e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A108.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5792 X-purgate-ID: tlsNG-42698a/1778480428-22589F3B-5C8879EC/0/0 X-purgate-type: clean X-purgate-size: 702 On 08-May-26 23:29, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to user heredocs for readability, derive from > bookworm-slim and use apt-get --no-install-recommends to keep the size down. > > Convert it to being a non-root container. Add checkpolicy as FLASK is an > available build option for arm32 under Randconfig testing. > > Rename the CI jobs to debian-12-arm32-* to follow the naming scheme of all the > other CI jobs. > > No functional change. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 06:23:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:23:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305779.1577928 (Exim 4.92) (envelope-from ) id 1wMK34-0001wo-M4; Mon, 11 May 2026 06:23:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305779.1577928; Mon, 11 May 2026 06:23:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMK34-0001wh-JM; Mon, 11 May 2026 06:23:26 +0000 Received: by outflank-mailman (input) for mailman id 1305779; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QyIkAxWO9gXLOjkyKCkHKMq5ldkNVKefUdOFpaMpMkmG9ZbIo6rSCQlhkn11GEpHDji/OSUeNFcVuHcDcoZ/j1+Lt4mp5laUM/iK2nO9PqBZWqzJwIrlBCrZQBlzLgHJ44ch0RcGyv15xy0G7sGYT8Qy8tiZnUT5qiQkmwQtPS3z+Z9kzgFJHvNgSQFYipzVcRElwQgrW6sk9TlYD78gJgq/JuCgLUJ1iks+jBEdCKYyvy1QzyI5wz23N8DpeLgMV22dWRfB0kCr7a2/H+MHsdp/STAl5rB0VN2i68gG66eBJHDSxh9N8D9ezy9YoybP/qg35NimlAzFHj8xuE9gQ0aDx/NQu98/EXUYN+VDjLamBYkEk9zJ7gMoDRLrObVD5tgpC2f+cPLiLp5xesRAsX+P8f+wgUimi0vp4nJpNDt0NsJDwhpWLaT4uWn5PZ96 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:23:18.0046 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ceb89621-e260-4f2c-f0be-08deaf25ca91 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF00029928.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPFABD533732 X-purgate-ID: tlsNG-33051d/1778480603-4279C938-8FA99089/0/0 X-purgate-type: clean X-purgate-size: 1030 On 08-May-26 23:29, Andrew Cooper wrote: > From: Javi Merino > > Rework the container to user heredocs for readability, derive from > bookworm-slim and use apt-get --no-install-recommends to keep the size down. > > Additionally: > > * Make it a non-root container. > * Drop libext2fs-dev which is an x86-only dependency. > * Add libncurses5-dev for xentop and zlib1g-dev which was missing from the > libxenguest decompressors. > * As there's no ninja, the container can no loger build QEMU so drop > libglib2.0-dev and libpixman-1-dev too. > * Swap libyajl-dev for libjson-c-dev given the latters deprecation. > > Rename the job to debian-12-arm64-* to follow the naming scheme of all the > other CI jobs. > > This reduces the size of the debian:12-arm64v8 from 2.25GB down to 1.62GB. > > Signed-off-by: Javi Merino > Signed-off-by: Andrew Cooper Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 06:29:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:29:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305788.1577938 (Exim 4.92) (envelope-from ) id 1wMK8l-0002iC-9B; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zCpjqdGGJUEu4icy4WvLx0ZK09CB6WBsMeGTeh5WXIw3zZZHa/PivVXMkpQOstvK8ZgmS4O3cxA8Yit+SUV4VjUBjfImYIC8NLt5xTrLf0NCdK4iaBiPYrKKPG86d8T5ts7+BrAg+0ayMjmAvsmty2Z2W8e5T/QtDTlS/kPVZ7IJEK4+xPB+gVE6VJHv4aR6UNa1Dqdv57g58jsoPbrQsKZB7/KtibJyRKjGNXGpCRdRD9Ws2uoAxJZQQA4RRredBX3GqP5TwanF4oj7MaaX4YTOleRNMTTqoFVLWd8FjymEurlhQBRs3VTNEx3l8XcgvIPZARxraxSYomxCdDg+iE3lJAnLXvb9zXTs3x6iBCLKTr0KjwcjXjLipOG7RGPYUKOBep5/IOB1trYPDjGwVzt/j+AFgYSMmu5Hqq2SQIpl5x4z2ea61d93Eei4Mjrk X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 06:29:09.7036 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 77f5967f-4a23-4354-d775-08deaf269c3a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9CF.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4116 X-purgate-ID: tlsNG-720697/1778480956-A9971161-D022E69A/10/63158204843 X-purgate-type: spam X-purgate-size: 4664 On 08-May-26 23:29, Andrew Cooper wrote: > Exactly as per the Bookworm container, but additionally with the ipxe-qemu and > qemu-system-aarch64 packages. These will be used to remove the export jobs. > > Switch qemu-arm{32,64} jobs to use this container. > > No functional change. > > Signed-off-by: Andrew Cooper > --- > CC: Anthony PERARD > CC: Stefano Stabellini > CC: Michal Orzel > CC: Doug Goldstein > > We should probably wire up some build tests too, but it's too late on a Friday > for me to be thinking about that for this posting. > --- > automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ > automation/gitlab-ci/test.yaml | 4 +- > automation/scripts/containerize | 1 + > 3 files changed, 74 insertions(+), 2 deletions(-) > create mode 100644 automation/build/debian/13-arm64v8.dockerfile > > diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile > new file mode 100644 > index 000000000000..b9062ee8b443 > --- /dev/null > +++ b/automation/build/debian/13-arm64v8.dockerfile > @@ -0,0 +1,71 @@ > +# syntax=docker/dockerfile:1 > +FROM --platform=linux/arm64/v8 debian:trixie-slim > +LABEL maintainer.name="The Xen Project" > +LABEL maintainer.email="xen-devel@lists.xenproject.org" > + > +ENV DEBIAN_FRONTEND=noninteractive > + > +RUN < +#!/bin/bash > + set -eu > + > + useradd --create-home user > + > + apt-get update > + > + DEPS=( > + # Xen > + bison > + build-essential > + checkpolicy > + flex > + > + # Tools (general) > + ca-certificates > + cpio > + git-core > + pkg-config > + wget > + # libxenguest dombuilder > + libbz2-dev > + liblzma-dev > + liblzo2-dev > + libzstd-dev > + zlib1g-dev > + # libacpi > + acpica-tools > + # libxl > + libfdt-dev > + libjson-c-dev > + uuid-dev > + # xentop > + libncurses5-dev > + # Python bindings > + python3-dev > + python3-setuptools > + # Golang bindings > + golang-go > + # Ocaml bindings/oxenstored > + ocaml-nox > + ocaml-findlib Since this is a container used only for tests, why listing packages required for Xen and tools build? > + > + # for test phase, qemu-* jobs > + busybox-static > + curl > + device-tree-compiler > + expect > + file > + ipxe-qemu > + ovmf > + qemu-system-aarch64 > + u-boot-qemu > + u-boot-tools So after this change, even though you replace debian-12 with debian-13 for all the tests, the debian-12 still contains the unneeded packages (i.e. for a test phase that it no longer runs). ~Michal > + ) > + > + apt-get -y --no-install-recommends install "${DEPS[@]}" > + > + rm -rf /var/lib/apt/lists* > +EOF > + > +USER user > +WORKDIR /build > diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml > index 982fd86db079..008deef98d1e 100644 > --- a/automation/gitlab-ci/test.yaml > +++ b/automation/gitlab-ci/test.yaml > @@ -37,7 +37,7 @@ > .qemu-arm64: > extends: .test-jobs-common > variables: > - CONTAINER: debian:12-arm64v8 > + CONTAINER: debian:13-arm64v8 > LOGFILE: qemu-smoke-arm64.log > artifacts: > paths: > @@ -50,7 +50,7 @@ > .qemu-arm32: > extends: .test-jobs-common > variables: > - CONTAINER: debian:12-arm64v8 > + CONTAINER: debian:13-arm64v8 > LOGFILE: qemu-smoke-arm32.log > artifacts: > paths: > diff --git a/automation/scripts/containerize b/automation/scripts/containerize > index bda06054ebde..8bd2a847aac0 100755 > --- a/automation/scripts/containerize > +++ b/automation/scripts/containerize > @@ -41,6 +41,7 @@ case "_${CONTAINER}" in > _bookworm-arm64v8-arm32) CONTAINER="${BASE}/debian:12-arm64v8-arm32" ;; > _bookworm-arm64v8) CONTAINER="${BASE}/debian:12-arm64v8" ;; > _bookworm-cppcheck) CONTAINER="${BASE}/debian:12-arm64v8-cppcheck" ;; > + _trixie-arm64v8) CONTAINER="${BASE}/debian:13-arm64v8" ;; > _opensuse-leap|_leap) CONTAINER="${BASE}/opensuse:leap-15.6-x86_64" ;; > _opensuse-tumbleweed|_tumbleweed) CONTAINER="${BASE}/opensuse:tumbleweed-x86_64" ;; > _xenial) CONTAINER="${BASE}/ubuntu:16.04-x86_64" ;; From xen-devel-bounces@lists.xenproject.org Mon May 11 06:42:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 06:42:00 +0000 Received: from list by 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Each port on the chip is a standalone PCI function, with UART registers on its I/O BAR0. Signed-off-by: Jiaqing Zhao --- xen/drivers/char/ns16550.c | 15 +++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 17 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index cf10a06a3d..26503070dc 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -96,6 +96,7 @@ struct ns16550_config { param_exar_xr17v358, param_intel_lpss, param_wch_ch382, + param_asix, } param; }; @@ -872,6 +873,14 @@ static const struct ns16550_config_param __initconst uart_param[] = { .bar0 = 1, .max_ports = 2, }, + [param_asix] = { + .base_baud = 115200, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 1, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1212,6 +1221,12 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x3253, .param = param_wch_ch382 }, + /* ASIX AX99100 PCIe to Multi I/O Controller */ + { + .vendor_id = PCI_VENDOR_ID_ASIX, + .dev_id = 0x9910, + .param = param_asix + }, }; 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CH382 PCIe dual port serial adapter. The CH382 is available in two variants: - CH382 2S [1c00:3253]: 2 serial ports - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port This chip uses IO BAR0, base baud rate 115200, ports starting at offset 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html Signed-off-by: Jiaqing Zhao Reviewed-by: Denis Mukhin --- xen/drivers/char/ns16550.c | 23 +++++++++++++++++++++++ xen/include/xen/pci_ids.h | 2 ++ 2 files changed, 25 insertions(+) diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c index 878da27f2e..cf10a06a3d 100644 --- a/xen/drivers/char/ns16550.c +++ b/xen/drivers/char/ns16550.c @@ -95,6 +95,7 @@ struct ns16550_config { param_exar_xr17v354, param_exar_xr17v358, param_intel_lpss, + param_wch_ch382, } param; }; @@ -861,6 +862,16 @@ static const struct ns16550_config_param __initconst uart_param[] = { .mmio = 1, .max_ports = 1, }, + [param_wch_ch382] = { + .base_baud = 115200, + .first_offset = 0xc0, + .uart_offset = 8, + .reg_width = 1, + .fifo_size = 256, + .lsr_mask = UART_LSR_THRE, + .bar0 = 1, + .max_ports = 2, + }, }; static const struct ns16550_config __initconst uart_config[] = @@ -1189,6 +1200,18 @@ static const struct ns16550_config __initconst uart_config[] = .dev_id = 0x7adc, .param = param_intel_lpss }, + /* WCH CH382 2S1P */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3250, + .param = param_wch_ch382 + }, + /* WCH CH382 2S */ + { + .vendor_id = PCI_VENDOR_ID_WCHIC, + .dev_id = 0x3253, + .param = param_wch_ch382 + }, }; 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pr=C From: Jiaqing Zhao To: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano Stabellini" CC: , Jiaqing Zhao Subject: [PATCH v3 0/2] ns16550: add support for WCH CH382 and ASIX AX99100 Date: Mon, 11 May 2026 15:54:13 +0800 Message-ID: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000F0E0:EE_|SJ2PR12MB9237:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a2f3a31-fff7-4330-06cf-08deaf329e7d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|56012099003|18002099003; X-Microsoft-Antispam-Message-Info: aB/BRV0jDxNUxoocxZcZTmE7OaUb7orQfqmD8eQ/LzDAezIgu4VXtlyLFraKWgz9o06rZ26i9xiWSF1W50D0DB1d8+oDIv9O+p14GpnORrvf1Ge4dCkZAnHN28VEVc5vYgdie6jpQg5KyeBhVVO61qQrsyCT/l3IhhQFQOxAqGknUyR1lfX6NjrMyQMKWBocfNrUVfc2guCX3P9CjkqVpLM14crSCcCqekkmO8+cY2tzPT1qkzqhk9q+8l8bqYokIg+tro0n9Ll3vrxXjjTtNy90DEMKb1LKTslHjw/HWXQ1bN+LAacdpXhtQWsh2ZbSGjnb9QIvYojDav38zuFYEpjNQxhN9pPP47R9XfVMxRduNQMHpSj1Lw4KPHJ614YCe1EADcRKdtnCmW+p0kD/51XAYdpOk/vKD0FyvtYNimPhMvMjitFNOfp4oWqZUeF9byAqvenoE6g5sPfxvMSDbr992ATgL/cVeTq8dO3UlxZW5bpN0GVDyliq/xnxRgepuEzbpMW7lbWL68qJ67w+4jinC0FLfdWrTJtcngzDw6gSvFO1dThlsJB9Bq8BKe5xrJILP2dDSLpi2Mv7LBuMM4LOtFQwK5YPJHOPwQekslS1nLRQwikTlOILTSJqZFl0yASqU9GNulBSlOyb/LMhHg4c4UcZiRjULzZLCYZglnulFKAsQ5ZQnHGqQYn0xmzwM3cMvPyqoirSRDnsp7bvtorI6I5e+c0qml6/Nfx3LcI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(1800799024)(56012099003)(18002099003);DIR:OUT;SFP:1101; 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Both chips expose 16550-compatible UARTs through PCI I/O BAR0 and work with the existing ns16550 driver once a matching device table entry and parameter set are added. v3: - New patch 2/2: add support for ASIX AX99100. - Add forgotten Reviewed-by from Denis in patch 1/2 (WCH CH382). v2: - Reorder entries in ns16550_config to keep them sorted by device ID. - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple vendor IDs. Jiaqing Zhao (2): ns16550: add support for WCH CH382 serial adapters ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller xen/drivers/char/ns16550.c | 38 ++++++++++++++++++++++++++++++++++++++ xen/include/xen/pci_ids.h | 4 ++++ 2 files changed, 42 insertions(+) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 11 08:28:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 08:28:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305856.1577983 (Exim 4.92) (envelope-from ) id 1wMM0J-0004I6-SP; Mon, 11 May 2026 08:28:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305856.1577983; Mon, 11 May 2026 08:28:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMM0J-0004Hz-PY; Mon, 11 May 2026 08:28:43 +0000 Received: by outflank-mailman (input) for mailman id 1305856; Mon, 11 May 2026 08:28:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMM0I-0004Hn-JK for xen-devel@lists.xenproject.org; Mon, 11 May 2026 08:28:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMM0G-009vIl-Nz for xen-devel@lists.xenproject.org; Mon, 11 May 2026 10:28:40 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a019334-e002-0a2a0a5209dd-0a2a4507814c-20 for ; Mon, 11 May 2026 10:28:40 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a019338-229c-0a2a45070019-d1558029d9e4-3 for ; Mon, 11 May 2026 10:28:40 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-48e82c23840so4886825e9.3 for ; Mon, 11 May 2026 01:28:40 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 11 May 2026 01:28:39 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 10:28:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 0/2] ns16550: add support for WCH CH382 and ASIX AX99100 To: Jiaqing Zhao Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778488120-22F76C48-E4B26C31/0/0 X-purgate-type: clean X-purgate-size: 1230 On 11.05.2026 09:54, Jiaqing Zhao wrote: > This series adds ns16550 support for two PCIe serial adapters found on > market: > > - WCH (Nanjing Qinheng Microelectronics) CH382, available as > CH382 2S [1c00:3253] and CH382 2S1P [1c00:3250]. > - ASIX AX99100 PCIe to Multi-I/O Controller [125b:9910]. > > Both chips expose 16550-compatible UARTs through PCI I/O BAR0 and > work with the existing ns16550 driver once a matching device table > entry and parameter set are added. > > v3: > - New patch 2/2: add support for ASIX AX99100. > - Add forgotten Reviewed-by from Denis in patch 1/2 (WCH CH382). > > v2: > - Reorder entries in ns16550_config to keep them sorted by device ID. > - Rename PCI_VENDOR_ID_WCH to PCI_VENDOR_ID_WCHIC as WCH has multiple > vendor IDs. > > Jiaqing Zhao (2): > ns16550: add support for WCH CH382 serial adapters > ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller > > xen/drivers/char/ns16550.c | 38 ++++++++++++++++++++++++++++++++++++++ > xen/include/xen/pci_ids.h | 4 ++++ > 2 files changed, 42 insertions(+) Please can you adhere to patch submission rules? They're sent To: the list, with relevant maintainers Cc:-ed. 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If the very first artefact is from >> a root container, then the test must also be a root container to use it as a >> working directory. >> >> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >> microcode-x86 artefact as it's the smallest available. This bodge can be >> removed when all build containers have become non-root. >> >> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >> the *-export dependency. >> >> This will allow us to change containers to being non-root one at a time, >> rather than all in one go. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Anthony PERARD >> CC: Stefano Stabellini >> CC: Michal Orzel >> CC: Doug Goldstein >> >> We should also stop using binaries/ as a working directory for the tests, but >> that gets very complicated very quickly and I don't have time to do it at this >> juncture. >> --- >> automation/gitlab-ci/test.yaml | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >> index 8770c523e228..517af1732437 100644 >> --- a/automation/gitlab-ci/test.yaml >> +++ b/automation/gitlab-ci/test.yaml >> @@ -15,6 +15,12 @@ >> - qemu-system-aarch64-6.0.0-arm64-export >> >> .arm32-test-needs: &arm32-test-needs >> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >> + # from a non-root container, and microcode-x86 is the smallest. Remove when >> + # all build containers have become non-root. >> + - project: $ARTIFACTS_REPO >> + job: microcode-x86 >> + ref: $ARTIFACTS_BRANCH > I don't see it being removed in this series even though the containers are non-root. Correct.  The Alpine container still being root is discussed in the commit message, and is why ... > >> - qemu-system-aarch64-6.0.0-arm32-export >> >> .x86-64-test-needs: &x86-64-test-needs >> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >> script: >> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >> needs: >> + - *arm64-test-needs ... why use here is ahead of ... > This also pulls in Linux image and rootfs which XTF tests don't need. I think > it's much better for a test to list the actual list of its dependencies. > Otherwise you are asking user/developer to dig into the yaml. > > ~Michal > >> - alpine-3.18-gcc-arm64 >> - - qemu-system-aarch64-6.0.0-arm64-export ... the alpine inclusion here. This can get reverted once the alpine container is split/reworked, but not before. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 09:07:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:07:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305878.1578001 (Exim 4.92) (envelope-from ) id 1wMMbQ-0001n9-UM; Mon, 11 May 2026 09:07:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305878.1578001; Mon, 11 May 2026 09:07:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMbQ-0001n2-Qz; Mon, 11 May 2026 09:07:04 +0000 Received: by outflank-mailman (input) for mailman id 1305878; Mon, 11 May 2026 09:07:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMbO-0001mu-PZ for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 11 May 2026 11:06:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000011:EE_|DS7PR12MB6007:EE_ X-MS-Office365-Filtering-Correlation-Id: 7ece4e74-363c-4a7d-1ad8-08deaf3ca6d0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|1800799024|22082099003|56012099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: p7n6e9Oh9u6lH+QStZorANeaavRV1KQAuUlwLmkqi6UaEjxlZZLkheBkNZimDi1DQe28D5ePsCtYrCMkmXrxoQ2O3N5D+X7mNbRT23AYa/NqYph1BZyTMiMXtpeJl5EOrsmyxKCK9kmnxSGm5oTCGPR9mmudQnWb+vHAlNvqxvNaz5CyJdQASMEQ7M4a379uJbTqI6eeXjWnXevwfivwosUK/oHTriiF6vTeaJfRHJKvQYAYs6XqvzYvt7R9EcE6zgrNfLUUBI0mVEC7/hmEiwPj4GfEMPC3FmHPerWOhL5pxNED02eMFmeG5M50v0u0gcrEFo3EcH4Rqf7VuFNDpHU7ox7+fYf8Odo6RKCtusyfT0Wzbw4QbSdQ/HOyUmP+1l1FZeBBrSRQbm0EZn+TLSl2HsghaMu7Dre8c3rp7o3maThrxP3DHl4GZaF01brg X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 09:06:56.4445 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7ece4e74-363c-4a7d-1ad8-08deaf3ca6d0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000011.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB6007 X-purgate-ID: tlsNG-c1860d/1778490421-B6D73DB1-B56C75CD/0/0 X-purgate-type: clean X-purgate-size: 3431 On 11-May-26 11:03, Andrew Cooper wrote: > On 11/05/2026 7:16 am, Orzel, Michal wrote: >> >> On 08-May-26 23:29, Andrew Cooper wrote: >>> The binaries/ directory is a composition from the artefacts, and also used as >>> a working directory for most of the tests. If the very first artefact is from >>> a root container, then the test must also be a root container to use it as a >>> working directory. >>> >>> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >>> microcode-x86 artefact as it's the smallest available. This bodge can be >>> removed when all build containers have become non-root. >>> >>> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >>> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >>> the *-export dependency. >>> >>> This will allow us to change containers to being non-root one at a time, >>> rather than all in one go. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >>> --- >>> CC: Anthony PERARD >>> CC: Stefano Stabellini >>> CC: Michal Orzel >>> CC: Doug Goldstein >>> >>> We should also stop using binaries/ as a working directory for the tests, but >>> that gets very complicated very quickly and I don't have time to do it at this >>> juncture. >>> --- >>> automation/gitlab-ci/test.yaml | 10 ++++++++-- >>> 1 file changed, 8 insertions(+), 2 deletions(-) >>> >>> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >>> index 8770c523e228..517af1732437 100644 >>> --- a/automation/gitlab-ci/test.yaml >>> +++ b/automation/gitlab-ci/test.yaml >>> @@ -15,6 +15,12 @@ >>> - qemu-system-aarch64-6.0.0-arm64-export >>> >>> .arm32-test-needs: &arm32-test-needs >>> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >>> + # from a non-root container, and microcode-x86 is the smallest. Remove when >>> + # all build containers have become non-root. >>> + - project: $ARTIFACTS_REPO >>> + job: microcode-x86 >>> + ref: $ARTIFACTS_BRANCH >> I don't see it being removed in this series even though the containers are non-root. > > Correct.  The Alpine container still being root is discussed in the > commit message, and is why ... > >> >>> - qemu-system-aarch64-6.0.0-arm32-export >>> >>> .x86-64-test-needs: &x86-64-test-needs >>> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >>> script: >>> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >>> needs: >>> + - *arm64-test-needs > > ... why use here is ahead of ... > > >> This also pulls in Linux image and rootfs which XTF tests don't need. I think >> it's much better for a test to list the actual list of its dependencies. >> Otherwise you are asking user/developer to dig into the yaml. >> >> ~Michal >> >>> - alpine-3.18-gcc-arm64 >>> - - qemu-system-aarch64-6.0.0-arm64-export > > ... the alpine inclusion here. > > This can get reverted once the alpine container is split/reworked, but > not before. Ok, so once the Alpine container is reworked, we will get back to proper dependencies list. In that case: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 09:21:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:21:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305901.1578009 (Exim 4.92) (envelope-from ) id 1wMMp9-0004jf-2n; Mon, 11 May 2026 09:21:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305901.1578009; Mon, 11 May 2026 09:21:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMMp8-0004jY-WB; Mon, 11 May 2026 09:21:14 +0000 Received: by outflank-mailman (input) for mailman id 1305901; Mon, 11 May 2026 09:21:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMMp7-0004jS-T2 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:21:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMMp7-00EFS9-9N for xen-devel@lists.xenproject.org; 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These will be used to remove the export jobs. >> >> Switch qemu-arm{32,64} jobs to use this container. >> >> No functional change. >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Anthony PERARD >> CC: Stefano Stabellini >> CC: Michal Orzel >> CC: Doug Goldstein >> >> We should probably wire up some build tests too, but it's too late on a Friday >> for me to be thinking about that for this posting. >> --- >> automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ >> automation/gitlab-ci/test.yaml | 4 +- >> automation/scripts/containerize | 1 + >> 3 files changed, 74 insertions(+), 2 deletions(-) >> create mode 100644 automation/build/debian/13-arm64v8.dockerfile >> >> diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile >> new file mode 100644 >> index 000000000000..b9062ee8b443 >> --- /dev/null >> +++ b/automation/build/debian/13-arm64v8.dockerfile >> @@ -0,0 +1,71 @@ >> +# syntax=docker/dockerfile:1 >> +FROM --platform=linux/arm64/v8 debian:trixie-slim >> +LABEL maintainer.name="The Xen Project" >> +LABEL maintainer.email="xen-devel@lists.xenproject.org" >> + >> +ENV DEBIAN_FRONTEND=noninteractive >> + >> +RUN <> +#!/bin/bash >> + set -eu >> + >> + useradd --create-home user >> + >> + apt-get update >> + >> + DEPS=( >> + # Xen >> + bison >> + build-essential >> + checkpolicy >> + flex >> + >> + # Tools (general) >> + ca-certificates >> + cpio >> + git-core >> + pkg-config >> + wget >> + # libxenguest dombuilder >> + libbz2-dev >> + liblzma-dev >> + liblzo2-dev >> + libzstd-dev >> + zlib1g-dev >> + # libacpi >> + acpica-tools >> + # libxl >> + libfdt-dev >> + libjson-c-dev >> + uuid-dev >> + # xentop >> + libncurses5-dev >> + # Python bindings >> + python3-dev >> + python3-setuptools >> + # Golang bindings >> + golang-go >> + # Ocaml bindings/oxenstored >> + ocaml-nox >> + ocaml-findlib > Since this is a container used only for tests, why listing packages required for > Xen and tools build? I did leave a note about that. > >> + >> + # for test phase, qemu-* jobs >> + busybox-static >> + curl >> + device-tree-compiler >> + expect >> + file >> + ipxe-qemu >> + ovmf >> + qemu-system-aarch64 >> + u-boot-qemu >> + u-boot-tools > So after this change, even though you replace debian-12 with debian-13 for all > the tests, the debian-12 still contains the unneeded packages (i.e. for a test > phase that it no longer runs). Yes.  I can't do this series bisectably without it.  Also, in the past people have explicitly requested to be able to run the qemu smoke testing from the build container, which is why it's like this and not split. Honestly, I was hoping to leave the Trixie update to the ARM maintainers, but despite the Bookworm QEMU (7.2) being newer than the 6.0 in the export jobs, it contains the SYSREG interception bugs which prevents hiding ThumbEE from guests, and breaks all the arm32 testing with a Linux dom0. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 09:35:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:35:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305911.1578018 (Exim 4.92) (envelope-from ) id 1wMN31-0006e3-8U; Mon, 11 May 2026 09:35:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305911.1578018; Mon, 11 May 2026 09:35:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN31-0006dw-5t; Mon, 11 May 2026 09:35:35 +0000 Received: by outflank-mailman (input) for mailman id 1305911; Mon, 11 May 2026 09:35:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN30-0006dp-Ia for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:35:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN2y-00ACPl-WE for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:35:33 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a2e3-2eae-0a2a0a5409dd-0a2a4508d342-16 for ; Mon, 11 May 2026 11:35:32 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a2e4-63b5-0a2a45080019-d1558029e161-3 for ; Mon, 11 May 2026 11:35:32 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso37066515e9.3 for ; Mon, 11 May 2026 02:35:32 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260508143353.3512004-3-luca.fancellu@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778492132-BED73DB1-3A8411D4/0/0 X-purgate-type: clean X-purgate-size: 1316 On 08.05.2026 16:33, Luca Fancellu wrote: > --- a/xen/include/public/arch-arm.h > +++ b/xen/include/public/arch-arm.h > @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); > #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 > #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 > > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 > +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 > + > struct xen_arch_domainconfig { > /* IN/OUT */ > uint8_t gic_version; > @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { > uint32_t clock_frequency; > /* IN */ > uint8_t arm_sci_type; > + /* IN */ > + uint8_t v8r_el1_msa; > }; Can you please take the opportunity and insert (and check) explicit padding, so that the next uint8_t field addition won't require ... > --- a/xen/include/public/domctl.h > +++ b/xen/include/public/domctl.h > @@ -30,9 +30,9 @@ > * fields) don't require a change of the version. > * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! > * > - * Last version bump: Xen 4.19 > + * Last version bump: Xen 4.22 > */ > -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 > +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 ... such a bump? Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 09:36:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:36:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305916.1578027 (Exim 4.92) (envelope-from ) id 1wMN3Q-00071z-LP; Mon, 11 May 2026 09:36:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305916.1578027; Mon, 11 May 2026 09:36:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN3Q-00071s-IS; Mon, 11 May 2026 09:36:00 +0000 Received: by outflank-mailman (input) for mailman id 1305916; Mon, 11 May 2026 09:35:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMN3P-00070M-57 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:35:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN3O-00ACdq-I7 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:35:58 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a2f3-2eae-0a2a0a5409dd-0a2a4509caf0-26 for ; Mon, 11 May 2026 11:35:58 +0200 Received: from [209.85.221.44] (helo=mail-wr1-f44.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a2fe-2497-0a2a45090019-d155dd2cd4c7-3 for ; Mon, 11 May 2026 11:35:58 +0200 Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-44985f4ab0fso2286058f8f.0 for ; Mon, 11 May 2026 02:35:58 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Bugfixes may continue to be accepted by maintainers without R-Ack. Thanks in advance. Have a good week. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 09:39:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:39:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305933.1578036 (Exim 4.92) (envelope-from ) id 1wMN6W-0007ud-3X; Mon, 11 May 2026 09:39:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305933.1578036; Mon, 11 May 2026 09:39:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN6W-0007uW-0i; Mon, 11 May 2026 09:39:12 +0000 Received: by outflank-mailman (input) for mailman id 1305933; Mon, 11 May 2026 09:39:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN6U-0007uQ-SL for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:39:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN6U-005lBz-9L for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:39:10 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a3b7-e002-0a2a0a5209dd-0a2a450cc314-42 for ; Mon, 11 May 2026 11:39:10 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a3be-62f1-0a2a450c0019-d155dd33d5be-3 for ; Mon, 11 May 2026 11:39:10 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d7645adbdso2175959f8f.1 for ; Mon, 11 May 2026 02:39:10 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778492350-DB97DCF5-304221DF/0/0 X-purgate-type: clean X-purgate-size: 693 On 08.05.2026 22:27, Bernhard Kaindl wrote: > Add an OCaml binding for xc_domain_claim_memory(): > > - tools/ocaml/libs/xc/xenctrl.ml/mli: > Add claim record type and domain_claim_memory external. > > - tools/ocaml/libs/xc/xenctrl_stubs.c: > Marshal the OCaml claim array into a xen_memory_claim_t array. > Map nodes of -1 to XEN_DOMCTL_CLAIM_MEMORY_HOST for host-wide claims. > > Acked-by: Christian Lindig > Requested-by: Andrew Cooper > Signed-off-by: Bernhard Kaindl Nit: Chronologically order tags, please: Christian can't have ack-ed this before you signed off on it. Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 09:41:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 09:41:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305939.1578047 (Exim 4.92) (envelope-from ) id 1wMN8r-0000wM-GK; Mon, 11 May 2026 09:41:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305939.1578047; Mon, 11 May 2026 09:41:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN8r-0000wF-CM; Mon, 11 May 2026 09:41:37 +0000 Received: by outflank-mailman (input) for mailman id 1305939; Mon, 11 May 2026 09:41:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMN8p-0000w9-DP for xen-devel@lists.xenproject.org; Mon, 11 May 2026 09:41:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMN8n-0044AH-4x for xen-devel@lists.xenproject.org; Mon, 11 May 2026 11:41:34 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01a430-5cb7-0a2a0a5109dd-0a2a4509894a-46 for ; Mon, 11 May 2026 11:41:34 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01a44e-2497-0a2a45090019-d1558033b105-3 for ; Mon, 11 May 2026 11:41:34 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-4893940bb5eso24218605e9.3 for ; Mon, 11 May 2026 02:41:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1778492494-8A589A53-FD705782/0/0 X-purgate-type: clean X-purgate-size: 541 On 11.05.2026 11:35, Oleksii Kurochko wrote: > I would like to inform you that Code freeze period is started and will > be until Fri Jun 05, 2026 (+4 weeks from Feature freeze). > > Bugfixes may continue to be accepted by maintainers without R-Ack. Gives me context to ask right away: "x86/mwait-idle: sync up with Linux 7.0-rc" has had a few small adjustments and hence would want re-posting. Question is: Does that even make sense at this point, i.e. would you give it a release-ack despite it not all being bug fixes? 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Mon, 11 May 2026 03:00:01 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 12:00:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko From: Jan Beulich Subject: [PATCH] symbols: explicitly specify source file name for symtab Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778493602-A8D7F161-852BBC38/10/73395122804 X-purgate-type: spam X-purgate-size: 3295 If there are any local symbols in an object file, GNU ld will create an STT_FILE symbol derived from the object file name if there is none in the incoming symbol table. The object file name, however, varies between linking passes. As a result, symbol name compression can yield different results if any of those local symbols need retaining (Arm [and RISC-V] mapping symbols are omitted, for example). If that difference in compression would yield a difference in the sizes of symbol_names[] or symbols_token_table[], the compare-symbol-tables sanity check will fail. Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") Reported-by: Oleksii Kurochko Signed-off-by: Jan Beulich --- The observed problem was with a stub generated as Arm64 erratum 843419 workaround. Such stubs' symbols (imo wrongly) are associated with the last input object, rather than the input object they belong to. Also for other kinds of stubs, afaict. See https://sourceware.org/bugzilla/show_bug.cgi?id=34140. As per the above, having a Fixes: tag here is questionable. --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no ifeq ($(CONFIG_DEBUG_INFO),y) $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" endif - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ + > $(dot-target).0s.S $(MAKE) $(build)=$(@D) .$(@F).0s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ @@ -210,6 +211,7 @@ endif > $(dot-target).1r.S $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + --source-name=$(@F).S \ > $(dot-target).1s.S $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ @@ -220,6 +222,7 @@ endif > $(dot-target).2r.S $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + --source-name=$(@F).S \ > $(dot-target).2s.S $(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o $(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o) --- a/xen/tools/symbols.c +++ b/xen/tools/symbols.c @@ -66,6 +66,7 @@ int token_profit[0x10000]; unsigned char best_table[256][2]; unsigned char best_table_len[256]; +static const char *srcname = "xen-syms.S"; static void usage(void) { @@ -356,6 +357,7 @@ static void write_src(void) printf("#define ALGN 4\n"); printf("#endif\n"); + printf("\t.file \"%s\"\n", srcname); printf("\t.section .rodata, \"a\"\n"); printf("#ifndef SYMBOLS_ORIGIN\n"); @@ -679,6 +681,8 @@ int main(int argc, char **argv) unsorted = true; else if (strcmp(argv[i], "--sort-by-name") == 0) sort_by_name = 1; + else if (strncmp(argv[i], "--source-name=", 14) == 0) + srcname = argv[i] + 14; else if (strcmp(argv[i], "--warn-dup") == 0) warn_dup = true; else if (strcmp(argv[i], "--error-dup") == 0) From xen-devel-bounces@lists.xenproject.org Mon May 11 10:16:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:16:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305966.1578064 (Exim 4.92) (envelope-from ) id 1wMNgB-00066b-Am; Mon, 11 May 2026 10:16:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1305966.1578064; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6E2i9eEwH3eNSU08KxErThEKw+hdyS+BCYlWNrXcZ3kjdLnvcU+TxZ1CyKlBFO1ipZ3arGCFWT502O/VQPkL3uxbSmZKIc1xQeg8wBvAMCaVfXBlb92xuqWhaa9QY8LFNCbFfRsL1raGv7W1jSPQ2NHjWjiF3TurLePA2NL6IMFI2C+c3VAtUDiqKSyklXlu1zuiQsVuzInl8VdaTeeY7+HkcKF4IrFdjv0km1R9M5y0vyffmySERw3czvrNHcLYlAOCcKLesfRseolQeluoQuD5Z3qg5i7yUwDNN03tvMAPBea/T3ziW/HDmxMUGHvSp+onSk2UgMU06Pfly1JDat4D11/QR7WBUJUutdN4iWAPU5Lq7RZpMth1QWq+PrrnS/JYs+GRh+x83bzxWCs9x4CSdimBYK7VoiGPXBorGlYAc61us47haOfuWJ5IKTgu X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:15:52.8618 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 87f1bc23-f951-4305-9893-08deaf464858 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000E9D0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6984 X-purgate-ID: tlsNG-c201ff/1778494560-E0461443-F87F1A77/0/0 X-purgate-type: clean X-purgate-size: 10302 On 08-May-26 16:33, Luca Fancellu wrote: > From: Harry Ramsey > > Add a new device tree property `v8r_el1_msa` to select the MSA (memory > system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the > former is the default if the property is not passed. > > Implement the dom0less path to parse the new device tree property, add > a new domctl hypercall input parameter `v8r_el1_msa` for arm and > add the sanitisation in arch_sanitise_domain_config(), the parameter > is intended to be used on CONFIG_MPU systems and returns an error if > selected for MMU. > > Given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v5: > - follow the way domu_dt_sci_parse and ARM_SCI is doing, but > return error if property is present in MMU systems. > - Align the commit message on the new changes > - fix documentation > - fix multiline comment > - drop the explicit padding from struct xen_arch_domainconfig > v4: > - Rework the patch to have the v8r_el1_msa input parameter more > enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. > v3: > - Improve commit message and device tree property description > - Remove macro protection > - Remove unused function is_mpu_domain > - Code formatting > --- > docs/misc/arm/device-tree/booting.txt | 14 +++++ > xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ > xen/arch/arm/domain.c | 11 ++++ > xen/arch/arm/include/asm/domain.h | 4 ++ > xen/arch/arm/include/asm/domain_build.h | 21 +++++++ > xen/arch/arm/mpu/arm32/mm.c | 17 ++++++ > xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ > xen/include/public/arch-arm.h | 6 ++ > xen/include/public/domctl.h | 4 +- > 9 files changed, 167 insertions(+), 2 deletions(-) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 977b4286082f..2389ae610963 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -322,6 +322,20 @@ with the following properties: > Should be used together with scmi-smc-passthrough Xen command line > option. > > +- v8r_el1_msa > + > + A string property specifying whether, on Armv8-R systems at EL1, a domain > + should use PMSAv8 (MPU) or VMSAv8 (MMU). > + > + - "mmu" > + Enables VMSAv8 at EL1. This requires hardware support and is only > + optionally available on AArch64. Not supported on AArch32. > + > + - "mpu" > + Enables PMSAv8 at EL1. This is the default behaviour when the property is s/behaviour/behavior/ > + not passed. This configuration requires static allocation (xen,static-mem) > + and direct mapping (direct-map). > + > Under the "xen,domain" compatible node, one or more sub-nodes are present > for the DomU kernel and ramdisk. > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 6f73c65e5151..2a0671bd0e8e 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -295,6 +295,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, > return 0; > } > > +static int __init > +domu_dt_v8r_el1_msa_parse(struct dt_device_node *node, node can be const > + struct xen_domctl_createdomain *d_cfg, > + unsigned int flags) > +{ > + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); > + > + if ( !property_present ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; > + else > + { > + const char *v8r_el1_msa; > + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); > + > + if ( ret ) > + return ret; > + > + if ( !strcmp(v8r_el1_msa, "mpu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; > + else if ( !strcmp(v8r_el1_msa, "mmu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; > + else > + { > + printk(XENLOG_ERR > + "v8r_el1_msa value (%s) not valid for domain %s\n", > + v8r_el1_msa, dt_node_name(node)); dt_node_name can be any arbitrary name not necessarily denoting a domain in a meaningful way. Without a full path it can be misleading. Either print a full path or don't print it at all. Here and elsewhere. > + return -EINVAL; > + } > + } > + > + if ( !IS_ENABLED(CONFIG_MPU) ) > + { > + if ( !property_present ) > + return 0; > + > + printk(XENLOG_ERR > + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", > + dt_node_name(node)); > + return -EINVAL; > + } > + > + switch ( d_cfg->arch.v8r_el1_msa ) > + { > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: > + fallthrough; > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: > + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > + { > + printk(XENLOG_ERR > + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", > + dt_node_name(node)); > + return -EINVAL; > + } > + break; > + > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: > + if ( !has_v8r_vmsa_support() ) > + { > + printk(XENLOG_ERR > + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); > + return -EINVAL; > + } > + break; > + > + default: > + return -EINVAL; > + } > + > + return 0; > +} > + > int __init arch_parse_dom0less_node(struct dt_device_node *node, > struct boot_domain *bd) > { > @@ -308,6 +379,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > if ( domu_dt_sci_parse(node, d_cfg) ) > panic("Error getting SCI configuration\n"); > > + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) > + panic("Error getting v8r_el1_msa configuration\n"); > + > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) > { > int vpl011_virq = GUEST_VPL011_SPI; > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 26380a807cad..ac7d1abd9c7c 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -630,6 +631,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > return -EINVAL; > } > > + if ( !v8r_el1_msa_domain_sanitise_config(config) ) > + { > + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); > + return -EINVAL; > + } > + > return sci_domain_sanitise_config(config); > } > > @@ -722,6 +729,10 @@ int arch_domain_create(struct domain *d, > d->arch.sve_vl = config->arch.sve_vl; > #endif > > +#ifdef CONFIG_MPU > + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; > +#endif > + > if ( (rc = sci_domain_init(d, config)) != 0 ) > goto fail; > > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h > index b24f02d269be..ac7300e41fcd 100644 > --- a/xen/arch/arm/include/asm/domain.h > +++ b/xen/arch/arm/include/asm/domain.h > @@ -112,6 +112,10 @@ struct arch_domain > #endif > > struct resume_info resume_ctx; > + > +#ifdef CONFIG_MPU > + uint8_t v8r_el1_msa; > +#endif > } __cacheline_aligned; > > struct arch_vcpu > diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h > index 6674dac5e2f8..50ddc0511e7e 100644 > --- a/xen/arch/arm/include/asm/domain_build.h > +++ b/xen/arch/arm/include/asm/domain_build.h > @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); > > int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); > > +#ifdef CONFIG_MPU > +/* Utility function to determine if an Armv8-R processor supports VMSA. */ > +bool has_v8r_vmsa_support(void); > +bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config); > +#else > +static inline bool has_v8r_vmsa_support(void) > +{ > + return false; > +} > + > +static inline bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config) Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 MPU, MMU) but they do not have anything that would prevent from generalizing them in a single function. > +{ > + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE ) > + return false; > + > + return true; > +} > +#endif /* CONFIG_MPU */ > + > #endif > > /* > diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c > index a4673c351141..a759ebdfc124 100644 > --- a/xen/arch/arm/mpu/arm32/mm.c > +++ b/xen/arch/arm/mpu/arm32/mm.c > @@ -5,6 +5,8 @@ > #include > #include > #include > +#include > +#include > > #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ > case num: \ > @@ -38,6 +40,21 @@ > break; \ > } > > +bool has_v8r_vmsa_support(void) > +{ > + return false; > +} > + > +bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config) > +{ > + if ( config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE && > + config->arch.v8r_el1_msa != XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA ) Please add brackets ( () && () ) ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:36:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:36:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1305979.1578072 (Exim 4.92) (envelope-from ) id 1wMO06-0000o5-UN; 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bh=RmlcBMtgTUbMbO5vSUFU8z0giO0xkCTKxNxFf/bABSU=; b=4LhAGxe8C48MvneKm5QzGVsG34hAFfM1ECDTfUUlsEt771BWW22+VPeWfkGS6xx+kFI8iKc85JnCGsSw8tSLe7syxqLKTMvu/PGuEVwTzqK6KaXJtZn8uHCi05/NHs7OZ9EK9t5RqCsKv8XpYQ227sYgMsi8NHzKxdO+fT8n8YU= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 12:36:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-4-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508143353.3512004-4-luca.fancellu@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 86qu4UT6d5AUdGI8zPjOp8rS8wP11DAPEzlG9Ztu3J8UJSs2+piciVNzqnsnvkuCHxa5/g+a9nxCFJayJtdPJYG3vEa4MVyomqJ7yz8D9Nwy5LqEU5P0R9de1OzPaP1ReXZW34FIiqGGpbOzp3ydK/SJ2TUWjY4H2xhFmlLrsq99222lsw4me5lDClyk2oh6r5zyLFRQ6F1Oc+S2ARZhdj+H8Nr9Y2wDteVUJuR4jshP9Zxca+UVDsjVwqvDUNfPgNjQKSCXl5n+WrBJM5y/8WLcK3yOK2Y7Kgq53iNIFfgUdwMn+aZ0Rb7b6V4pUkr9QDMHrbFKEEO4y0h/3ussbueieQkWXE/YUvTPwT1jn4Z1qaHVdRuBhjg/uvBbDlyslLuvLpIHPebHXxqGyMkeqy5s/lMBDX+vbZdjhN/E6711wNu+2ziWP5JRYjK4t0jy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:36:31.0784 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 53816c8d-cf0c-4632-3fa7-08deaf492a58 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F41.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB999088 X-purgate-ID: tlsNG-bad1c0/1778495796-43D7FA53-EF40598B/0/0 X-purgate-type: clean X-purgate-size: 4961 On 08-May-26 16:33, Luca Fancellu wrote: > From: Harry Ramsey > > Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU > systems. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v5: > - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER > - used MAX_MPU_REGION_NR instead of opencoding 255 > - use 'table' in p2m_alloc_table to clear pages > - remove p2m_free_vmid() from error path in p2m_init() > which is already handled outside > v4: > - no changes > v3: > - Check for alloc_xenheap_pages allocation > - Clear additional page allocated for ARM64 > - Add check for INVALID_VCPU_ID > - Remove unnecessary function generate_vsctlr > - Code formatting fixes > --- > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- > 5 files changed, 85 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h > index 2cf0f8cbacae..d565230f84ee 100644 > --- a/xen/arch/arm/include/asm/arm32/mpu.h > +++ b/xen/arch/arm/include/asm/arm32/mpu.h > @@ -11,6 +11,8 @@ > */ > #define MPU_REGION_RES0 0x0 > > +#define VSCTLR_VMID_SHIFT 16 > + > /* Hypervisor Protection Region Base Address Register */ > typedef union { > struct { > diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h > index 4f694190a8a3..8b86a03fee44 100644 > --- a/xen/arch/arm/include/asm/arm64/mpu.h > +++ b/xen/arch/arm/include/asm/arm64/mpu.h > @@ -7,6 +7,8 @@ > > #define MPU_REGION_RES0 (0xFFFFULL << 48) > > +#define VSCTLR_VMID_SHIFT 48 > + > /* Protection Region Base Address Register */ > typedef union { > struct __packed { > diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h > index e46d9e757a1d..0d4149c71987 100644 > --- a/xen/arch/arm/include/asm/mpu/p2m.h > +++ b/xen/arch/arm/include/asm/mpu/p2m.h > @@ -3,8 +3,15 @@ > #ifndef __ARM_MPU_P2M_H__ > #define __ARM_MPU_P2M_H__ > > +#include > +#include > +#include > + > struct p2m_domain; > > +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) You should include mpu.h for MAX_MPU_REGION_NR definition > +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) > + > static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} > > static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9ebbd..ed1b6dd40f40 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -48,8 +48,13 @@ struct p2m_domain { > /* Current VMID in use */ > uint16_t vmid; > > +#ifdef CONFIG_MMU > /* Current Translation Table Base Register for the p2m */ > uint64_t vttbr; > +#else > + /* Current Virtualization System Control Register for the p2m */ > + register_t vsctlr; > +#endif > > /* Highest guest frame that's ever been mapped in the p2m */ > gfn_t max_mapped_gfn; > diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c > index f7fb58ab6aa8..8d5c65b1003f 100644 > --- a/xen/arch/arm/mpu/p2m.c > +++ b/xen/arch/arm/mpu/p2m.c > @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) > BUG_ON("unimplemented"); > } > > +static int p2m_alloc_table(struct domain *d) > +{ > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); Why char and not void? We use void and pointer arithmetic is done by treating the size of a void as 1. > + unsigned int i; > + > + if ( !table ) > + { > + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", > + d); > + return -ENOMEM; > + } > + > + p2m->root = virt_to_page(table); > + > + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) > + clear_page(table + (i * PAGE_SIZE)); > + > + return 0; > +} > + > int p2m_init(struct domain *d) > { > - BUG_ON("unimplemented"); > - return -EINVAL; > + struct p2m_domain *p2m = p2m_get_hostp2m(d); > + int rc = 0; > + unsigned int cpu; > + > + rwlock_init(&p2m->lock); > + > + p2m->vmid = INVALID_VMID; > + p2m->max_mapped_gfn = _gfn(0); > + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); > + > + p2m->default_access = p2m_access_rwx; > + /* mem_access is NOT supported in MPU system. */ s/in/on With the above fixed: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:40:54 2026 Return-path: Envelope-to: archives@lists.xen.org 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Mon, 11 May 2026 03:41:03 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 12:41:05 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 9/9] x86/mwait-idle: Add C-states validation To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <7b7a677e-a5b9-42c8-beec-3c506b4eac52@suse.com> <57233a5d-3944-433c-a7c5-a1a491a2c1dd@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778496064-C5784DB1-064AD845/0/0 X-purgate-type: clean X-purgate-size: 2912 On 08.05.2026 09:38, Roger Pau Monné wrote: > On Mon, May 04, 2026 at 11:34:40AM +0200, Jan Beulich wrote: >> On 24.04.2026 21:15, Roger Pau Monné wrote: >>> On Thu, Mar 12, 2026 at 05:58:21PM +0100, Jan Beulich wrote: >>>> @@ -1589,6 +1594,41 @@ static char *__init get_cmdline_field(ch >>>> } >>>> >>>> /** >>>> + * validate_cmdline_cstate - Validate a C-state from cmdline. >>>> + * @state: The C-state to validate. >>>> + * @prev_state: The previous C-state in the table or NULL. >>>> + * >>>> + * Return: 0 if the C-state is valid or -EINVAL otherwise. >>> >>> Hm, I know we picked this up from upstream, but this function would >>> better return a boolean, rather than 0 or -EINVAL. >> >> I agree, but I didn't want to deviate from their code purely for cosmetic >> reasons. >> >>>> +static int __init validate_cmdline_cstate(struct cpuidle_state *state, >>>> + struct cpuidle_state *prev_state) >>>> +{ >>>> + if (state->exit_latency == 0) >>>> + /* Exit latency 0 can only be used for the POLL state */ >>>> + return -EINVAL; >>>> + >>>> + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency < state->exit_latency) >>>> + return -EINVAL; >>>> + >>>> + if (!prev_state) >>>> + return 0; >>>> + >>>> + if (state->exit_latency <= prev_state->exit_latency) >>>> + return -EINVAL; >>>> + >>>> + if (state->target_residency <= prev_state->target_residency) >>>> + return -EINVAL; >>> >>> I'm not an expert on C-states, but isn't this checking against the >>> previous value kind of defeating part of the purpose of the command >>> line? >> >> I don't know. The question would need raising to the author. >> >>> Also, it might help to also write down those limits in the command >>> line documentation. >> >> What do you mean there? Some of the values are universal, but some >> checks are against model-specific values. I don't think you mean to >> enumerate them all? > > Maybe it's indeed not very useful. What I referring to was something > along the lines of: "the command line provided residency and latency > values must be smaller than the default ones". As noted above it > seems weird to me than higher than current values cannot be set, > albeit I have no idea what's the expected usage of this interface. Hmm, while meaning to make this change I came to wonder: What exactly do you refer to by "current values" and "default ones"? prev_state here isn't "previous state" as in "before this option was parsed", but as in "next lower C-state", as per prev_state = i ? &cmdline_states[i - 1] : NULL; ahead of the call site. Instead what I'm inclined to do (despite deviating from the original) is to constify the function's parameters. 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bh=3UUBguPlhjyv2WTqU3xP1vMGoLN6aTg6DByEoeNDgSA=; b=Z2bMSfd/Xl00T7alORmA8x7rij4UFo9SgvZCoaV3SmpgdyXFuHoCYI/+9oVIuIcysNkI1iDUkSsVaZ54H5D8BrnFiBhEVQLpKq1qyqP7yIhHSSxjr665842IWOVa2bGv+w4upb7IZkENAWIVFjnsNLKOFQQwZ8phvc0lv0Un0F4= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 11 May 2026 12:50:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8Kf3/8ImtdbGmAHp+uhJGRveW6ByO4CtqUuSxJlD2wqangZ1SdhpkKcHTuD0rQf5ozDUB8/WOmST6NfaAQX4bhR/3FULdoabLnkOoBpnErIVDWFy+/XowPPE8feeN1Y4h8uN7jVJ1YC6WTSWmg4N5k5hQZOkglnHgvmdtk/+wPHzeuKATY7sEqXFqDg7d6vj3C9EnipmP/MFpXeNi2LZ9CmzNb7F5+TBAk2VLD7BtNihA83hulEL02jsPHQ31lMC8M05eB3k19u8Wg3du8ZLltK3aRhbxyPrD7WC7K+snEGgE2fToB6S1Z9zONksc4DHwyHWzPQoISkilwcuzDlHbs0GNzl8rZsg9vs6Z50As+DObXKy60mgQk2BIBHVdbdEnLjHm3PTuR1jOfTPyepDXhab7BuLjFq4TSOBXZardIafado49aHmdeTbreXP+DdO X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:50:43.7696 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac027343-50cf-422b-747d-08deaf4b2697 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF00036F41.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7144 X-purgate-ID: tlsNG-4011c0/1778496651-709668B7-5DDC8C7B/0/0 X-purgate-type: clean X-purgate-size: 1689 On 11-May-26 12:44, Luca Fancellu wrote: > Hi Michal, > >>> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h >>> index 6674dac5e2f8..50ddc0511e7e 100644 >>> --- a/xen/arch/arm/include/asm/domain_build.h >>> +++ b/xen/arch/arm/include/asm/domain_build.h >>> @@ -19,6 +19,27 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); >>> >>> int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); >>> >>> +#ifdef CONFIG_MPU >>> +/* Utility function to determine if an Armv8-R processor supports VMSA. */ >>> +bool has_v8r_vmsa_support(void); >>> +bool v8r_el1_msa_domain_sanitise_config( >>> + const struct xen_domctl_createdomain *config); >>> +#else >>> +static inline bool has_v8r_vmsa_support(void) >>> +{ >>> + return false; >>> +} >>> + >>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>> + const struct xen_domctl_createdomain *config) >> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >> MPU, MMU) but they do not have anything that would prevent from generalizing >> them in a single function. > > I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? > > Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed > Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed > Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed What's the reason for allowing NONE for MPU here? None denotes property not specified but at this point it should be set to a default. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:52:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:52:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306023.1578117 (Exim 4.92) (envelope-from ) id 1wMOFd-0005uV-8K; Mon, 11 May 2026 10:52:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306023.1578117; Mon, 11 May 2026 10:52:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOFd-0005uO-5X; Mon, 11 May 2026 10:52:41 +0000 Received: by outflank-mailman (input) for mailman id 1306023; Mon, 11 May 2026 10:52:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOFb-0005u0-3o for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <494b99b4-2d45-4893-9300-b3e8ffdd4396@amd.com> Date: Mon, 11 May 2026 12:45:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 3/3] arm/mpu: Implement p2m tables To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-4-luca.fancellu@arm.com> <0A9C53BD-D9FD-4CBF-B874-E7465C8E421E@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0A9C53BD-D9FD-4CBF-B874-E7465C8E421E@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002529F:EE_|DS0PR12MB8416:EE_ X-MS-Office365-Filtering-Correlation-Id: 3d0f368a-ce0d-469a-25dd-08deaf4a6be4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|1800799024|376014|56012099003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hPWgL4FGdLEi79U4gEPJKG+AvbMZ6h921NhI9Od4xDIJ1fcl4oGO3pSFBsesR5byUghe/uXjFHjEMINfNgF5eaUxGgGVcwPp89T3Z2aPQqFyaplhY/MK1WHEBuDSyQf1VFkG7z2q4mC4pp2hu8ZMY9s8XQVDX9OoUEdIwVT52qSLaaRNCXYd9xdZ4/mborHlinxVPHA1YlFnfeRMcuV0sTgs/YFFayE2dqGwN87Pfcm5hS59rU21u/gLDqSinjuQmC/nWx72PgbmbH7xt9VxRw80V3jT6c0C+WxOTZQDxlat5jp1aQKN9KIyftmw1Ve5XnnehHV5KvZIFl+54khNxJYljsFzhi3sDXYhEO6HBNqoNsajBxO8bQcuZ6hszGqfiYPDyFAet8KNIwU68Zrh4PClEmsarRBAVtWLd9cBlDof6Rd/rJoWfvyQbEn3P+TN X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:45:30.5088 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3d0f368a-ce0d-469a-25dd-08deaf4a6be4 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002529F.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB8416 X-purgate-ID: tlsNG-bad1c0/1778496337-89377A53-B48A3C80/37/8731086901-1579827 X-purgate-type: clean X-purgate-size: 3075 On 11-May-26 12:39, Luca Fancellu wrote: > Hi Michal, > > >>> diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h >>> index e46d9e757a1d..0d4149c71987 100644 >>> --- a/xen/arch/arm/include/asm/mpu/p2m.h >>> +++ b/xen/arch/arm/include/asm/mpu/p2m.h >>> @@ -3,8 +3,15 @@ >>> #ifndef __ARM_MPU_P2M_H__ >>> #define __ARM_MPU_P2M_H__ >>> >>> +#include >>> +#include >>> +#include >>> + >>> struct p2m_domain; >>> >>> +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) >> You should include mpu.h for MAX_MPU_REGION_NR definition > > right, I’ll include > >> >>> +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) >>> + >>> static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} >>> >>> static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} >>> diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h >>> index 010ce8c9ebbd..ed1b6dd40f40 100644 >>> --- a/xen/arch/arm/include/asm/p2m.h >>> +++ b/xen/arch/arm/include/asm/p2m.h >>> @@ -48,8 +48,13 @@ struct p2m_domain { >>> /* Current VMID in use */ >>> uint16_t vmid; >>> >>> +#ifdef CONFIG_MMU >>> /* Current Translation Table Base Register for the p2m */ >>> uint64_t vttbr; >>> +#else >>> + /* Current Virtualization System Control Register for the p2m */ >>> + register_t vsctlr; >>> +#endif >>> >>> /* Highest guest frame that's ever been mapped in the p2m */ >>> gfn_t max_mapped_gfn; >>> diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c >>> index f7fb58ab6aa8..8d5c65b1003f 100644 >>> --- a/xen/arch/arm/mpu/p2m.c >>> +++ b/xen/arch/arm/mpu/p2m.c >>> @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) >>> BUG_ON("unimplemented"); >>> } >>> >>> +static int p2m_alloc_table(struct domain *d) >>> +{ >>> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >>> + char *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); >> Why char and not void? We use void and pointer arithmetic is done by treating >> the size of a void as 1. > > I did it on purpose since it’s a compiler extension, but if you say it’s ok I’ll change it to void. Yes, this is a documented extension in our MISRA language toolchain and as you can see, we use it in our code base. BTW, please also ... > >>> + unsigned int i; >>> + >>> + if ( !table ) >>> + { >>> + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", >>> + d); >>> + return -ENOMEM; >>> + } >>> + >>> + p2m->root = virt_to_page(table); >>> + >>> + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) >>> + clear_page(table + (i * PAGE_SIZE)); >>> + >>> + return 0; >>> +} >>> + >>> int p2m_init(struct domain *d) >>> { >>> - BUG_ON("unimplemented"); >>> - return -EINVAL; >>> + struct p2m_domain *p2m = p2m_get_hostp2m(d); >>> + int rc = 0; ... drop this redundant assignment. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 10:55:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:55:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306029.1578128 (Exim 4.92) (envelope-from ) id 1wMOI7-0006QT-Ld; Mon, 11 May 2026 10:55:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306029.1578128; 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I can see 3 definitions (Arm64 MPU, = Arm32 >>> MPU, MMU) but they do not have anything that would prevent from general= izing >>> them in a single function. >>=20 >> I can do a common one I think, just to be aligned, should the common one= behaves as the current implementation? >>=20 >> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_= NONE allowed >> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,P= MSA,VMSA} allowed >> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,P= MSA} allowed > What's the reason for allowing NONE for MPU here? None denotes property n= ot > specified but at this point it should be set to a default. We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lea= d to PMSA at EL1 Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 10:59:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 10:59:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306045.1578136 (Exim 4.92) (envelope-from ) id 1wMOMK-0007Gz-8Z; Mon, 11 May 2026 10:59:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306045.1578136; Mon, 11 May 2026 10:59:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOMK-0007Gs-5H; Mon, 11 May 2026 10:59:36 +0000 Received: by outflank-mailman (input) for mailman id 1306045; Mon, 11 May 2026 10:59:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOMI-0007Gm-Sr for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <74ffed08-caae-4d70-959b-12daf5d67cb1@amd.com> Date: Mon, 11 May 2026 12:59:23 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC4:EE_|SA3PR12MB7951:EE_ X-MS-Office365-Filtering-Correlation-Id: c48abdf5-4178-4237-eccc-08deaf4c5e1d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|7416014|36860700016|1800799024|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: DTBfqOwGsrvLvQs0eC4eWxRbcsoJPdp/e9BFHLMuXZF6ZDurn+Fw9S6qDU8i9lkoLEw3xZnujJySA8vM8XVGoHRJRchMu78mbBWIQYFnsmXj99ORyCzDtdpTqlQCwYpZ0XlVcQ7OFen/AMmcSw1y0BKlIBs54z3FYGfH3IBW2hHrogShDYQwETy/+/W4UP04J5eGSc4XSLraCAataqESRmYVwmOlTGkTj8+HreluPXtJe4ojKYJ7UfYwtEWx3w0yWKrxi9E3Ye/6p+wLNJMLwjZd9t09KQaImiwXr3Zpp58lhw9TC4IPBY7tR1lB1KZPtaJFMdFPuMwBGXnEIxObD7YCGiGgAosw1lKUgV0ij9eEq5chpAf9GnBN+jTeT+PrQzPgkX8S0GX/1HAXjuWQ5CyFQ5fie3T2mpkNjfsLAIOfgmDIrzIdLLch2buVLq7j X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 10:59:26.3693 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c48abdf5-4178-4237-eccc-08deaf4c5e1d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC4.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB7951 X-purgate-ID: tlsNG-4011c0/1778497173-7E58E8B7-009DECE8/0/0 X-purgate-type: clean X-purgate-size: 1312 On 11-May-26 12:53, Luca Fancellu wrote: > Hi Michal, > >>>>> + >>>>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>>>> + const struct xen_domctl_createdomain *config) >>>> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >>>> MPU, MMU) but they do not have anything that would prevent from generalizing >>>> them in a single function. >>> >>> I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? >>> >>> Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed >>> Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed >>> Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed >> What's the reason for allowing NONE for MPU here? None denotes property not >> specified but at this point it should be set to a default. > > We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lead to PMSA at EL1 NONE denotes property not set i.e. set a default. IMO at the place where we set a default, NONE should be switched to PMSA. This is a cleaner solution than giving two options the same meaning. Sanitization could then verify that indeed the default setting took place. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 11:08:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:08:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306056.1578145 (Exim 4.92) (envelope-from ) id 1wMOUg-0000gK-0t; Mon, 11 May 2026 11:08:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306056.1578145; Mon, 11 May 2026 11:08:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOUf-0000gD-U0; Mon, 11 May 2026 11:08:13 +0000 Received: by outflank-mailman (input) for mailman id 1306056; Mon, 11 May 2026 11:08:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOUe-0000g7-K4 for xen-devel@lists.xenproject.org; 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I can see 3 definitions (Arm64 MPU= , Arm32 >>>>> MPU, MMU) but they do not have anything that would prevent from gener= alizing >>>>> them in a single function. >>>>=20 >>>> I can do a common one I think, just to be aligned, should the common o= ne behaves as the current implementation? >>>>=20 >>>> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MS= A_NONE allowed >>>> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE= ,PMSA,VMSA} allowed >>>> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE= ,PMSA} allowed >>> What's the reason for allowing NONE for MPU here? None denotes property= not >>> specified but at this point it should be set to a default. >>=20 >> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and = lead to PMSA at EL1 > NONE denotes property not set i.e. set a default. IMO at the place where = we set > a default, NONE should be switched to PMSA. This is a cleaner solution th= an > giving two options the same meaning. Sanitization could then verify that = indeed > the default setting took place. Ok so this is a bit different from how all other *_NONE are handled current= ly (TEE and SCI). So on MPU Arm32/64 now we will stop the domain creation if NONE is passed, = is that the behaviour you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get this b= ecause we will switch during DT parse) Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 11:09:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:09:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306062.1578154 (Exim 4.92) (envelope-from ) id 1wMOWF-0001AG-CR; Mon, 11 May 2026 11:09:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306062.1578154; Mon, 11 May 2026 11:09:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOWF-0001A9-8q; Mon, 11 May 2026 11:09:51 +0000 Received: by outflank-mailman (input) for mailman id 1306062; Mon, 11 May 2026 11:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOWD-00019z-Ui for xen-devel@lists.xenproject.org; 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Message-ID: <12f44475-f4de-494f-8d75-3c3ac039b96c@citrix.com> Date: Mon, 11 May 2026 12:09:33 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Doug Goldstein Subject: Re: [PATCH 1/5] CI: Adjust test needs[] to ensure binaries/ is non-root To: "Orzel, Michal" , Xen-devel References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-2-andrew.cooper3@citrix.com> <455c64a2-bae4-47d0-a2bd-902be3ea6127@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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If the very first artefact is from >>>> a root container, then the test must also be a root container to use it as a >>>> working directory. >>>> >>>> For arm64, the existing linux-arm64 artefact suffices. For arm32, pull in the >>>> microcode-x86 artefact as it's the smallest available. This bodge can be >>>> removed when all build containers have become non-root. >>>> >>>> For the qemu-xtf-dom0less-arm64-*-xen-version jobs, use *arm64-test-needs >>>> ahead of alpine-3.18-gcc-* (as it's a root container), and to deduplicate >>>> the *-export dependency. >>>> >>>> This will allow us to change containers to being non-root one at a time, >>>> rather than all in one go. >>>> >>>> No functional change. >>>> >>>> Signed-off-by: Andrew Cooper >>>> --- >>>> CC: Anthony PERARD >>>> CC: Stefano Stabellini >>>> CC: Michal Orzel >>>> CC: Doug Goldstein >>>> >>>> We should also stop using binaries/ as a working directory for the tests, but >>>> that gets very complicated very quickly and I don't have time to do it at this >>>> juncture. >>>> --- >>>> automation/gitlab-ci/test.yaml | 10 ++++++++-- >>>> 1 file changed, 8 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml >>>> index 8770c523e228..517af1732437 100644 >>>> --- a/automation/gitlab-ci/test.yaml >>>> +++ b/automation/gitlab-ci/test.yaml >>>> @@ -15,6 +15,12 @@ >>>> - qemu-system-aarch64-6.0.0-arm64-export >>>> >>>> .arm32-test-needs: &arm32-test-needs >>>> + # Bodge to ensure binaries/ is non-root. Can be any artefact which comes >>>> + # from a non-root container, and microcode-x86 is the smallest. Remove when >>>> + # all build containers have become non-root. >>>> + - project: $ARTIFACTS_REPO >>>> + job: microcode-x86 >>>> + ref: $ARTIFACTS_BRANCH >>> I don't see it being removed in this series even though the containers are non-root. >> Correct.  The Alpine container still being root is discussed in the >> commit message, and is why ... >> >>>> - qemu-system-aarch64-6.0.0-arm32-export >>>> >>>> .x86-64-test-needs: &x86-64-test-needs >>>> @@ -569,16 +575,16 @@ qemu-xtf-dom0less-arm64-gcc-hyp-xen-version: >>>> script: >>>> - ./automation/scripts/qemu-xtf.sh arm64 mmu64le hyp-xen-version 2>&1 | tee ${LOGFILE} >>>> needs: >>>> + - *arm64-test-needs >> ... why use here is ahead of ... >> >> >>> This also pulls in Linux image and rootfs which XTF tests don't need. I think >>> it's much better for a test to list the actual list of its dependencies. >>> Otherwise you are asking user/developer to dig into the yaml. >>> >>> ~Michal >>> >>>> - alpine-3.18-gcc-arm64 >>>> - - qemu-system-aarch64-6.0.0-arm64-export >> ... the alpine inclusion here. >> >> This can get reverted once the alpine container is split/reworked, but >> not before. > Ok, so once the Alpine container is reworked, we will get back to proper > dependencies list. Yes.  I hope to do so for 4.22, but the alpine container needs more careful work as it's also used by the QubeOS hardware runner environment. > In that case: > Reviewed-by: Michal Orzel Thankyou. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 11:18:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:18:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306074.1578162 (Exim 4.92) (envelope-from ) id 1wMOe4-00035M-6i; Mon, 11 May 2026 11:17:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306074.1578162; Mon, 11 May 2026 11:17:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOe4-00035E-3R; Mon, 11 May 2026 11:17:56 +0000 Received: by outflank-mailman (input) for mailman id 1306074; Mon, 11 May 2026 11:17:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOe1-000358-Sp for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 11 May 2026 13:17:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu CC: "xen-devel@lists.xenproject.org" , Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260508143353.3512004-1-luca.fancellu@arm.com> <20260508143353.3512004-3-luca.fancellu@arm.com> <63c08741-42dd-41c2-9f27-b14f350544c7@amd.com> <4372B93E-1AC7-4BF5-93A7-D1AD8FCE42FE@arm.com> <74ffed08-caae-4d70-959b-12daf5d67cb1@amd.com> <4E3CC074-A194-4B55-9B69-12204047D1E4@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <4E3CC074-A194-4B55-9B69-12204047D1E4@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF0000C37D:EE_|SA3PR12MB8021:EE_ X-MS-Office365-Filtering-Correlation-Id: f042fea1-ab06-461f-a36f-08deaf4eec48 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|1800799024|7416014|376014|56012099003|22082099003|18002099003|11063799002; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: cOGXfhaPsIlq6Vbr45rpKoBVLDh+Ug8bcVvdossImhp0tzvpEhZfQEmZGjkR3IKEmxRhYdH7Fb8AthbLeGvODpt7WdCSyDKFHsFtf8KCZSpLG9gQ40jtPEe/kHls1CvgBMbm2tmvehg2GpO9uT8HTtMPE0/7Mbvtzjt0OmKSK3PGs8RZZUwnZJOtTEeZaIyxLooNwa8tFBfZL2WCp3WIPdEXAKi5nBbvACMyDA5hZKgBl8vf5JP03oRyUKv2UZX7t89m8m5fJ8bVrLilhbibphWuu2/EJ1DW02qGUC5TnBi2qgr1a6/n+SavT1BOczu+C4LJbVusi3Jzj4LsneHM3rPAyOqP0GuWhfz6zjhpfXASIlJSamYMTshPjffDUVKBSDyO8yzXImxv7yNfUWp+p+K/NdfqXDBqt0+UnUhUrSrsrPf29dy5W8o59m/AIk1X X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 11 May 2026 11:17:43.8846 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f042fea1-ab06-461f-a36f-08deaf4eec48 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF0000C37D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB8021 X-purgate-ID: tlsNG-ef75cf/1778498272-0AF76C48-5BFDBE7F/0/0 X-purgate-type: clean X-purgate-size: 2005 On 11-May-26 13:07, Luca Fancellu wrote: > Hi Michal, > >>> >>>>>>> + >>>>>>> +static inline bool v8r_el1_msa_domain_sanitise_config( >>>>>>> + const struct xen_domctl_createdomain *config) >>>>>> Why can't this function be common? I can see 3 definitions (Arm64 MPU, Arm32 >>>>>> MPU, MMU) but they do not have anything that would prevent from generalizing >>>>>> them in a single function. >>>>> >>>>> I can do a common one I think, just to be aligned, should the common one behaves as the current implementation? >>>>> >>>>> Arm64/32 MMU: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE allowed >>>>> Arm64: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA,VMSA} allowed >>>>> Arm32: Only v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NONE,PMSA} allowed >>>> What's the reason for allowing NONE for MPU here? None denotes property not >>>> specified but at this point it should be set to a default. >>> >>> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid and lead to PMSA at EL1 >> NONE denotes property not set i.e. set a default. IMO at the place where we set >> a default, NONE should be switched to PMSA. This is a cleaner solution than >> giving two options the same meaning. Sanitization could then verify that indeed >> the default setting took place. > > Ok so this is a bit different from how all other *_NONE are handled currently (TEE and SCI). > > So on MPU Arm32/64 now we will stop the domain creation if NONE is passed, is that the behaviour > you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get this because we will switch > during DT parse) I think the confusion is that you are mixing the meaning of none (i.e. I don't want it) with not set. In case of TEE and SCI, none means you I don't want TEE or SCI, please disable them. Now, how would this look like for MPU. I don't want PMSA or VMSA? This does not make any sense because it's something impossible. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 11 11:27:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 11:27:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306082.1578172 (Exim 4.92) (envelope-from ) id 1wMOnS-0004m2-0R; Mon, 11 May 2026 11:27:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306082.1578172; Mon, 11 May 2026 11:27:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOnR-0004lv-Tr; Mon, 11 May 2026 11:27:37 +0000 Received: by outflank-mailman (input) for mailman id 1306082; Mon, 11 May 2026 11:27:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMOnQ-0004kV-Hk for xen-devel@lists.xenproject.org; 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I can see 3 definitions (Arm64 M= PU, Arm32 >>>>>>> MPU, MMU) but they do not have anything that would prevent from gen= eralizing >>>>>>> them in a single function. >>>>>>=20 >>>>>> I can do a common one I think, just to be aligned, should the common= one behaves as the current implementation? >>>>>>=20 >>>>>> Arm64/32 MMU: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_= MSA_NONE allowed >>>>>> Arm64: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NO= NE,PMSA,VMSA} allowed >>>>>> Arm32: Only v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{NO= NE,PMSA} allowed >>>>> What's the reason for allowing NONE for MPU here? None denotes proper= ty not >>>>> specified but at this point it should be set to a default. >>>>=20 >>>> We treat NONE as PMSA on Armv8-R, so either NONE and PMSA are valid an= d lead to PMSA at EL1 >>> NONE denotes property not set i.e. set a default. IMO at the place wher= e we set >>> a default, NONE should be switched to PMSA. This is a cleaner solution = than >>> giving two options the same meaning. Sanitization could then verify tha= t indeed >>> the default setting took place. >>=20 >> Ok so this is a bit different from how all other *_NONE are handled curr= ently (TEE and SCI). >>=20 >> So on MPU Arm32/64 now we will stop the domain creation if NONE is passe= d, is that the behaviour >> you are expecting for DOMCTL v8r_el1_msa? (Ideally we should not get thi= s because we will switch >> during DT parse) > I think the confusion is that you are mixing the meaning of none (i.e. I = don't > want it) with not set. In case of TEE and SCI, none means you I don't wan= t TEE > or SCI, please disable them. Now, how would this look like for MPU. I don= 't want > PMSA or VMSA? This does not make any sense because it's something impossi= ble. ok makes sense, I will then: Arm 64/32 MMU: allow only XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE Arm 64 MPU: allow XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_{PMSA,VMSA} Arm 32 MPU: allow XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 12:27:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 12:27:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306111.1578180 (Exim 4.92) (envelope-from ) id 1wMPim-0004XL-53; Mon, 11 May 2026 12:26:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306111.1578180; Mon, 11 May 2026 12:26:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPim-0004XE-2C; Mon, 11 May 2026 12:26:52 +0000 Received: by outflank-mailman (input) for mailman id 1306111; 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CPUID-wise, > while its and FRED's enumerators were already introduced, their dependency > still needs adding. > > While adding a testcase, also add a SWAPGS one. In order to not affect > the behavior of pre-existing tests, install write_{segment,msr} hooks > only transiently. > > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Mon May 11 12:37:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 12:37:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306124.1578189 (Exim 4.92) (envelope-from ) id 1wMPtD-0006RX-2d; Mon, 11 May 2026 12:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306124.1578189; Mon, 11 May 2026 12:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPtD-0006RQ-02; Mon, 11 May 2026 12:37:39 +0000 Received: by outflank-mailman (input) for mailman id 1306124; Mon, 11 May 2026 12:37:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMPtB-0006RK-DO for xen-devel@lists.xenproject.org; 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Message-ID: Date: Mon, 11 May 2026 13:37:29 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] x86/MCE: adjust S3 resume handling To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <1e0a8808-4594-4574-819b-1a75d104294d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1e0a8808-4594-4574-819b-1a75d104294d@suse.com> Content-Type: text/plain; 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The additional "bsp" boolean needs to be used (and > propagated as necessary) instead. > > While touching intel_init_thermal(), constify its 1st parameter, which > in turn requires touching intel_thermal_supported() as well. > > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper This is all horrible. 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>> #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 >> #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 >>=20 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 >> +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 >> + >> struct xen_arch_domainconfig { >> /* IN/OUT */ >> uint8_t gic_version; >> @@ -355,6 +359,8 @@ struct xen_arch_domainconfig { >> uint32_t clock_frequency; >> /* IN */ >> uint8_t arm_sci_type; >> + /* IN */ >> + uint8_t v8r_el1_msa; >> }; >=20 > Can you please take the opportunity and insert (and check) explicit > padding, so that the next uint8_t field addition won't require ... >=20 >> --- a/xen/include/public/domctl.h >> +++ b/xen/include/public/domctl.h >> @@ -30,9 +30,9 @@ >> * fields) don't require a change of the version. >> * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! >> * >> - * Last version bump: Xen 4.19 >> + * Last version bump: Xen 4.22 >> */ >> -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 >> +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 >=20 > ... such a bump? Yes, will be part of v6, thanks for your review. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Mon May 11 13:03:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:03:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306146.1578208 (Exim 4.92) (envelope-from ) id 1wMQIU-0002id-BA; Mon, 11 May 2026 13:03:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306146.1578208; Mon, 11 May 2026 13:03:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQIU-0002iW-8F; Mon, 11 May 2026 13:03:46 +0000 Received: by outflank-mailman (input) for mailman id 1306146; Mon, 11 May 2026 13:03:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQIS-0002iO-BG for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:03:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQIR-006Tjw-ON for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:03:43 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01d3aa-bab6-0a2a0a5309dd-0a2a450aa54c-12 for ; Mon, 11 May 2026 15:03:43 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01d3af-56b3-0a2a450a0019-d155dd33b85a-3 for ; Mon, 11 May 2026 15:03:43 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d76dd4ee8so3939332f8f.2 for ; Mon, 11 May 2026 06:03:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778504623-7C67F8B7-96893E8B/0/0 X-purgate-type: clean X-purgate-size: 212 1: re-work Xen artifacts collection 2: collect certain intermediate files as artifacts Pipeline (PPC intentionally broken): https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 13:04:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:04:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306153.1578217 (Exim 4.92) (envelope-from ) id 1wMQJF-0003BY-JM; Mon, 11 May 2026 13:04:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306153.1578217; Mon, 11 May 2026 13:04:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJF-0003BR-GE; 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Mon, 11 May 2026 06:04:30 -0700 (PDT) Message-ID: Date: Mon, 11 May 2026 15:04:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 1/2] CI: re-work Xen artifacts collection From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778504671-7377D8B7-AF9A630E/0/0 X-purgate-type: clean X-purgate-size: 1989 There's no need to do this separately from three places. Once moved to the bottom of the script, the need for this to be a function also disappears. While there also make sure xen-syms is collected. This is rather more useful for analysis of possible problems than its stripped counterpart. Signed-off-by: Jan Beulich --- a/automation/scripts/build +++ b/automation/scripts/build @@ -44,30 +44,15 @@ cp xen/.config xen-config # Directory for the artefacts to be dumped into mkdir -p binaries -collect_xen_artefacts() -{ - local f - - for f in xen/xen xen/xen.efi; do - if [[ -f $f ]]; then - cp $f binaries/ - fi - done -} - if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Cppcheck analysis invokes Xen-only build xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) # Preserve artefacts - collect_xen_artefacts cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Xen-only build make -j$(nproc) xen - - # Preserve artefacts - collect_xen_artefacts else # Full build. Figure out our ./configure options cfgargs=("--prefix=/usr") @@ -108,9 +93,16 @@ else make -j$(nproc) dist # Preserve artefacts - # Note: Some smoke tests depending on finding binaries/xen on a full build - # even though dist/ contains everything, while some containers don't even - # build Xen (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz - collect_xen_artefacts fi + +# Preserve Xen artefacts +# +# Note: Some smoke tests depend on finding binaries/xen on a full build +# even though dist/ contains everything, while some containers don't even +# build Xen. +for f in xen/xen xen/xen-syms xen/xen.efi; do + if [[ -f $f ]]; then + cp $f binaries/ + fi +done From xen-devel-bounces@lists.xenproject.org Mon May 11 13:05:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:05:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306158.1578225 (Exim 4.92) (envelope-from ) id 1wMQJj-0003bg-Qy; Mon, 11 May 2026 13:05:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306158.1578225; Mon, 11 May 2026 13:05:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJj-0003bZ-O6; Mon, 11 May 2026 13:05:03 +0000 Received: by outflank-mailman (input) for mailman id 1306158; Mon, 11 May 2026 13:05:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQJi-0003bJ-4o for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:05:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQJh-00DB1g-HZ for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:05:01 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01d3fb-2eae-0a2a0a5409dd-0a2a450ba71a-6 for ; Mon, 11 May 2026 15:05:01 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01d3fd-212f-0a2a450b0019-d1558030bd12-3 for ; Mon, 11 May 2026 15:05:01 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488b0046078so35992875e9.1 for ; Mon, 11 May 2026 06:05:01 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 11 May 2026 06:05:00 -0700 (PDT) Message-ID: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> Date: Mon, 11 May 2026 15:05:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH v2 2/2] CI: collect certain intermediate files as artifacts From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778504701-22589F3B-C2F86D50/0/0 X-purgate-type: clean X-purgate-size: 2753 When one of the linking passes fails, additional intermediate files are still in place. Having them available for analysis of the underlying problem can be pretty helpful. Collect some into a new intermediates/ directory. (Nothing new will be collected if linking succeeds.) As the script is run with -e passed to bash, defer exit if the main "make" (or substituent script thereof) failed. This way more artifacts are collected, potentially making it easier to analyze the failure. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 (with PPC forced to invoke the new logic, hence respective failures there) --- v2: Different approach. --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -6,6 +6,7 @@ artifacts: paths: - binaries/ + - intermediates/ - xen-config - xen-cppcheck.txt - '*.log' --- a/automation/scripts/build +++ b/automation/scripts/build @@ -37,22 +37,24 @@ else make -j$(nproc) -C xen olddefconfig fi -# Save the config file before building because build failure causes the script -# to exit early -- bash is invoked with -e. +# Save the config file before building, just in case. cp xen/.config xen-config -# Directory for the artefacts to be dumped into -mkdir -p binaries +# Directories for artefacts to be dumped into +mkdir -p binaries intermediates + +# Script exit status, to be overridden by the main make's status below. +ret=0 if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Cppcheck analysis invokes Xen-only build - xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) + xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) || ret=$? # Preserve artefacts cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then # Xen-only build - make -j$(nproc) xen + make -j$(nproc) xen || ret=$? else # Full build. Figure out our ./configure options cfgargs=("--prefix=/usr") @@ -90,7 +92,7 @@ else fi ./configure "${cfgargs[@]}" - make -j$(nproc) dist + make -j$(nproc) dist || ret=$? # Preserve artefacts (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz @@ -106,3 +108,12 @@ for f in xen/xen xen/xen-syms xen/xen.ef cp $f binaries/ fi done + +# Preserve Xen intermediate files. Some may be there only upon build failure. +for f in xen/.xen-syms.* xen/.xen.efi.*; do + if [[ -f $f ]]; then + cp $f intermediates/ + fi +done + +exit $ret From xen-devel-bounces@lists.xenproject.org Mon May 11 13:17:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:17:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306171.1578239 (Exim 4.92) (envelope-from ) id 1wMQVj-0005fY-UP; Mon, 11 May 2026 13:17:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306171.1578239; Mon, 11 May 2026 13:17:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQVj-0005fR-R2; Mon, 11 May 2026 13:17:27 +0000 Received: by outflank-mailman (input) for mailman id 1306171; Mon, 11 May 2026 13:17:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by 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I don't see any Fixes: tag in the mentioned patch series and also based on cover letter it doesn't really clear what this patch series is fixing. Could you please clarify? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 13:41:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:41:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306195.1578257 (Exim 4.92) (envelope-from ) id 1wMQtD-0002D3-1W; Mon, 11 May 2026 13:41:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306195.1578257; Mon, 11 May 2026 13:41:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQtC-0002Cw-Ui; Mon, 11 May 2026 13:41:42 +0000 Received: by outflank-mailman (input) for mailman id 1306195; Mon, 11 May 2026 13:41:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMQtC-0002Cq-4R for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:41:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQtB-00B4U0-3G for xen-devel@lists.xenproject.org; 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich > --- > The observed problem was with a stub generated as Arm64 erratum 843419 > workaround. Such stubs' symbols (imo wrongly) are associated with the last > input object, rather than the input object they belong to. Also for other > kinds of stubs, afaict. See > https://sourceware.org/bugzilla/show_bug.cgi?id=34140. > > As per the above, having a Fixes: tag here is questionable. > > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no > ifeq ($(CONFIG_DEBUG_INFO),y) > $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" > endif > - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S > + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ > + > $(dot-target).0s.S > $(MAKE) $(build)=$(@D) .$(@F).0s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ > @@ -210,6 +211,7 @@ endif > > $(dot-target).1r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).1s.S > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > @@ -220,6 +222,7 @@ endif > > $(dot-target).2r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).2s.S > $(MAKE) $(build)=$(@D) .$(@F).2r.o .$(@F).2s.o > $(call compare-symbol-tables, $(dot-target).1r.o, $(dot-target).2r.o) > --- a/xen/tools/symbols.c > +++ b/xen/tools/symbols.c > @@ -66,6 +66,7 @@ int token_profit[0x10000]; > unsigned char best_table[256][2]; > unsigned char best_table_len[256]; > > +static const char *srcname = "xen-syms.S"; > > static void usage(void) > { > @@ -356,6 +357,7 @@ static void write_src(void) > printf("#define ALGN 4\n"); > printf("#endif\n"); > > + printf("\t.file \"%s\"\n", srcname); > printf("\t.section .rodata, \"a\"\n"); > > printf("#ifndef SYMBOLS_ORIGIN\n"); > @@ -679,6 +681,8 @@ int main(int argc, char **argv) > unsorted = true; > else if (strcmp(argv[i], "--sort-by-name") == 0) > sort_by_name = 1; > + else if (strncmp(argv[i], "--source-name=", 14) == 0) > + srcname = argv[i] + 14; > else if (strcmp(argv[i], "--warn-dup") == 0) > warn_dup = true; > else if (strcmp(argv[i], "--error-dup") == 0) Why does x86 need to plumb the source name in, but the other architectures don't? xen-syms.S suffices for both x86 builds AFAICT, so can't it just be unconditional? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 13:45:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:45:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306203.1578265 (Exim 4.92) (envelope-from ) id 1wMQx4-0002kb-FV; Mon, 11 May 2026 13:45:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306203.1578265; Mon, 11 May 2026 13:45:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQx4-0002kU-Cw; Mon, 11 May 2026 13:45:42 +0000 Received: by outflank-mailman (input) for mailman id 1306203; Mon, 11 May 2026 13:45:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMQx3-0002kO-Rw for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:45:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMQx3-00DIsP-8P for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:45:41 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01dd79-e002-0a2a0a5209dd-0a2a450c9c28-34 for ; Mon, 11 May 2026 15:45:41 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01dd84-62f1-0a2a450c0019-d155dd2de8e2-3 for ; Mon, 11 May 2026 15:45:41 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44e5624c053so2436454f8f.2 for ; Mon, 11 May 2026 06:45:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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AFNElJ/gp0hbxZ3hvMFaRqUSIP1k75CbPzEFycXq263laWOWN5/RS4w7ixRHFbLpnoktwdRIbVGreGaFAMA=@lists.xenproject.org X-Gm-Message-State: AOJu0YwnkIX6pAw0XSAZPK5Aoj1Qbc0M9jT6M1Pg/VIEWBa2foD8lYll hIOCi6YvkVNKxaT8S1dPfDl/2/4R0GzbhQg+muwoslaecRBSf8O5DdBHkgmdCQl1jg== X-Gm-Gg: Acq92OHTMIWt9O4UhqGJ4fAKsinEtPmT2olvnFKJMtpO/WVn2MLueOgDtvmmkM7Rzv+ HfwhxuUBBCI9k3tlgcjmFZKUWRfBcO9Jj2z39BeL6LT9OxbBbZ4WMJ2v6XHeqn0S6hKEsi6BE/A EEw6AGehF+AbcdKnXL8WpZLRlalXmuZuNw30KJwHtTPC1Ac9Eqr/MfHLL7Gy4aqUtaDyOFIsTvL IH0BvW871Sk9JWt0ct5z0KHAU1urKE/rs9OT/Ut7TF6XVQA1iGJQnIdMG/HlkO2v2dpwtMjzF6p 7FELQhbFv+QsEzYiMquN/KVR76RzpN4y75Ko6dr96R9cPp+E+qi2mcdqaRiWDvSbiXg2gQHv6UA XmuSJ4VP33XvoOFHGErYjanRL5PXHzOg8Q04nd6M2OWR1fhQjPIGAdfvsVs9Sy1hRASLV2wEXe8 0HR9mJWkXdL/JbJGQl49VZz033NcJ2P2bpzgLxCnDMbQ2xoAmzn36JB58KwNJJoeNutSAqExrYE FKXBJl+GtIQ9KY= X-Received: by 2002:a05:6000:1ac6:b0:43e:a9ba:b194 with SMTP id ffacd0b85a97d-4515d5c6b69mr39595707f8f.34.1778507140425; Mon, 11 May 2026 06:45:40 -0700 (PDT) Message-ID: <4b0f55a1-1e9b-4ce1-b6b6-29b868d57e25@suse.com> Date: Mon, 11 May 2026 15:45:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: Code freeze for 4.22 started on May 11, 2026 To: Oleksii Kurochko Cc: Community Manager , "committers@xenproject.org" , Xen-devel References: <2a6117e6-e458-4818-9c22-0c356982eb59@suse.com> <58f80bf6-b9e0-42b8-9f84-831a1c546768@gmail.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <58f80bf6-b9e0-42b8-9f84-831a1c546768@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778507141-E3B7CCF5-4321E6A0/0/0 X-purgate-type: clean X-purgate-size: 965 On 11.05.2026 15:34, Oleksii Kurochko wrote: > On 5/11/26 11:41 AM, Jan Beulich wrote: >> On 11.05.2026 11:35, Oleksii Kurochko wrote: >>> I would like to inform you that Code freeze period is started and will >>> be until Fri Jun 05, 2026 (+4 weeks from Feature freeze). >>> >>> Bugfixes may continue to be accepted by maintainers without R-Ack. >> >> Gives me context to ask right away: "x86/mwait-idle: sync up with Linux >> 7.0-rc" has had a few small adjustments and hence would want re-posting. >> Question is: Does that even make sense at this point, i.e. would you >> give it a release-ack despite it not all being bug fixes? > > I don't see any Fixes: tag in the mentioned patch series and also based > on cover letter it doesn't really clear what this patch series is fixing. > > Could you please clarify? It is "fixing" us lagging behind the Linux driver that ours was cloned from. Plus the series was posted well in time. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778507235-71B6F8B7-0703080A/0/0 X-purgate-type: clean X-purgate-size: 1358 On 11.05.2026 15:41, Andrew Cooper wrote: > On 11/05/2026 11:00 am, Jan Beulich wrote: >> --- a/xen/tools/symbols.c >> +++ b/xen/tools/symbols.c >> @@ -66,6 +66,7 @@ int token_profit[0x10000]; >> unsigned char best_table[256][2]; >> unsigned char best_table_len[256]; >> >> +static const char *srcname = "xen-syms.S"; >> >> static void usage(void) >> { >> @@ -356,6 +357,7 @@ static void write_src(void) >> printf("#define ALGN 4\n"); >> printf("#endif\n"); >> >> + printf("\t.file \"%s\"\n", srcname); >> printf("\t.section .rodata, \"a\"\n"); >> >> printf("#ifndef SYMBOLS_ORIGIN\n"); >> @@ -679,6 +681,8 @@ int main(int argc, char **argv) >> unsorted = true; >> else if (strcmp(argv[i], "--sort-by-name") == 0) >> sort_by_name = 1; >> + else if (strncmp(argv[i], "--source-name=", 14) == 0) >> + srcname = argv[i] + 14; >> else if (strcmp(argv[i], "--warn-dup") == 0) >> warn_dup = true; >> else if (strcmp(argv[i], "--error-dup") == 0) > > Why does x86 need to plumb the source name in, but the other > architectures don't? > > xen-syms.S suffices for both x86 builds AFAICT, so can't it just be > unconditional? It could. Yet I'd prefer the distinction between xen.efi and xen-syms to be recognizable (in case any dependent local symbol would show up). Jan From xen-devel-bounces@lists.xenproject.org Mon May 11 13:53:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:53:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306222.1578284 (Exim 4.92) (envelope-from ) id 1wMR46-0005D3-Fv; Mon, 11 May 2026 13:52:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306222.1578284; Mon, 11 May 2026 13:52:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMR46-0005Cw-DF; Mon, 11 May 2026 13:52:58 +0000 Received: by outflank-mailman (input) for mailman id 1306222; Mon, 11 May 2026 13:52:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMR44-0005Cq-Rk for xen-devel@lists.xenproject.org; Mon, 11 May 2026 13:52:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMR42-00FE5f-MQ for xen-devel@lists.xenproject.org; Mon, 11 May 2026 15:52:54 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01df27-e002-0a2a0a5209dd-0a2a450ca008-44 for ; Mon, 11 May 2026 15:52:54 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01df36-62f1-0a2a450c0019-d1558031d93d-3 for ; Mon, 11 May 2026 15:52:54 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48e82c23840so8884275e9.3 for ; Mon, 11 May 2026 06:52:54 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich I would like to note that with the current staging I can't reproduce this bug anymore with configs I have: 10d417b8b62e (HEAD -> staging, upstream/staging) xen/arm: skip holes in physical address space when setting up frametable 2611377cf9c9 xen/riscv: fix MMIO alignment check in imsic_init() 54ca0aadc821 x86/time: make do_settime() uses more accurate 4526d6763466 x86/time: make early NOW() uses slightly more precise 9f976dec039c xen: introduce CONFIG_HAS_DOMAIN_TYPE bdb30883f352 iommu/amd-vi: do not zero IOMMU MMIO region 4f9457ece11a xsm/flask: Fix undefined behaviour in avc_dump_av() 4ff927133ebc EFI: adjust cfg file buffer freeing 96ffccef5a5f xvmalloc: adjust XVFREE() ordering e8c1feab33cb CI: Refresh the Debian 12 cppcheck container 278953f6c155 (origin/staging, origin/HEAD) automation/gitlab: introduce macOS build jobs But when I switched to origin/HEAD I can reproduce the bug and I applied the suggested patch on top of it and I don't see this bug anymore with this fix: Tested-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 13:58:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 13:58:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306232.1578293 (Exim 4.92) (envelope-from ) id 1wMR93-00063e-1X; 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Plus the series was posted well in time. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM6PR03MB6070.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20a6b063-9825-4ca8-6df2-08deaf6701f6 X-MS-Exchange-CrossTenant-originalarrivaltime: 11 May 2026 14:10:08.2545 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: VOW8xu4AfxP0j6Cqf5LDcJBu4WK/OvgbtdijC4OcgXaWlSTFuUn1k2CRIHVx4U2kmTjOd3FewP3u6X2yCvYoOwmmQqwR7pFuUMSpSi53Yo4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7850 X-purgate-ID: tlsNG-720697/1778508610-8256B161-1303DAF6/0/0 X-purgate-type: clean X-purgate-size: 4202 Hi Jan, Jan Beulich writes: > On 07.05.2026 22:40, Volodymyr Babchuk wrote: >> Jan Beulich writes: >>> On 06.05.2026 11:39, Mykyta Poturai wrote: >>>> On 5/4/26 08:37, Jan Beulich wrote: >>>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>>> From: Stewart Hildebrand >>>>>>>> >>>>>>>> This code is expected to only be used by privileged domains, >>>>>>>> unprivileged domains should not get access to the SR-IOV capabilit= y. >>>>>>>> >>>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to acc= ount >>>>>>>> for possible changes in the system page size register. Also force = VFs to >>>>>>>> always use emulated reads for command register, this is needed to >>>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>>> >>>>>>> This apparently refers to the change to vpci_init_header(). Writes = are >>>>>>> already intercepted. How would a read lead to accidental BAR unmap?= Even >>>>>>> for writes I don't see how a VF driver could accidentally unmap BAR= s, as >>>>>>> the memory decode bit there is hardwired to 0. >>>>>>> >>>>>>>> Discovery of VFs is >>>>>>>> done by Dom0, which must register them with Xen. >>>>>>> >>>>>>> If we intercept control register writes, why would we still require >>>>>>> Dom0 to report the VFs that appear? >>>>>>> >>>>>> >>>>>> Sorry, I don't understand this question. You specifically requested = this >>>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>>> >>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>>> returning "true" >>>>>> > from vpci_process_pending() until the time has passed? This imo = is a >>>>>> no-go. You >>>>>> > want to set a timer and put the vCPU to sleep, to wake it up aga= in >>>>>> when the >>>>>> > timer has expired. That'll then eliminate the need for the >>>>>> not-so-nice patch 4. >>>>>> >>>>>> > Question is whether we need to actually go this far (right away)= . I >>>>>> expect you >>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the= hardware >>>>>> > domain, can't we trust it to set things up correctly, just like = we >>>>>> trust it in >>>>>> > a number of other aspects? >>>>> >>>>> How's any of this related to the question I raised here, or your repl= y >>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created= . >>>>> Why still demand Dom0 to report them then? >>>>> >>>> >>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit = is=20 >>>> set to become alive. We discussed in the V2 that it is not acceptable = to=20 >>>> do a required 100ms wait in Xen while blocking a domain. And not doing= =20 >>>> that blocking would require some mechanism to only allow a domain to r= un=20 >>>> for precisely 99(or more?)ms. You yourself suggested that we can trust= =20 >>>> the hardware domain with registering VFs if we already trust it with=20 >>>> other PCI-related stuff. Did you change your mind, or am I completely= =20 >>>> misunderstanding this question? >>> >>> No, I still think that we can trust hwdom enough. Nevertheless we shoul= d >>> aim at being independent of it where possible. And I seem to recall tha= t >>> I had also outlined an approach how to avoid spin-waiting for 100ms in >>> the hypervisor. >>=20 >> I want to clarify: you are telling that Xen should not wait for hwdom to >> report VFs and instead create them by itself. Is this correct? > > If that's technically possible, yes. Okay, so let's clear this. If I remember correct, you discussed this with Mykyta in the previous version and suggested to put the vCPU to sleep for 100ms. I don't think that this is a good idea, because guest kernel will not be happy about that. So, IMO, it is better to just allows the guest to tell Xen when VFs are ready. Or maybe I am missing something and you had some another idea? --=20 WBR, Volodymyr= From xen-devel-bounces@lists.xenproject.org Mon May 11 14:24:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 14:24:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306255.1578311 (Exim 4.92) (envelope-from ) id 1wMRYL-0002e8-7V; Mon, 11 May 2026 14:24:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306255.1578311; Mon, 11 May 2026 14:24:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRYL-0002e1-4b; Mon, 11 May 2026 14:24:13 +0000 Received: by outflank-mailman (input) for mailman id 1306255; Mon, 11 May 2026 14:24:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMRYK-0002dv-Gw for xen-devel@lists.xenproject.org; Mon, 11 May 2026 14:24:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMRYJ-006jwc-G8 for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:24:11 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01e679-5cb7-0a2a0a5109dd-0a2a4505baae-28 for ; Mon, 11 May 2026 16:24:11 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01e68b-aaa8-0a2a45050019-d155802eb863-3 for ; Mon, 11 May 2026 16:24:11 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so49510335e9.2 for ; Mon, 11 May 2026 07:24:11 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Plus the series was posted well in time. It was posted well in time but it wasn't committed before Code freeze started. But considering that it is necessary for new CPUs (as Andrew C. mentioned in one of reply) we want to have that in release. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 11 14:36:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 14:36:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306266.1578319 (Exim 4.92) (envelope-from ) id 1wMRjs-0004SO-7O; Mon, 11 May 2026 14:36:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306266.1578319; Mon, 11 May 2026 14:36:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRjs-0004SH-3h; Mon, 11 May 2026 14:36:08 +0000 Received: by outflank-mailman (input) for mailman id 1306266; Mon, 11 May 2026 14:36:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMRjp-0004SB-Pr for xen-devel@lists.xenproject.org; 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Mon, 11 May 2026 16:35:58 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=a0q201vIKf1vO7S42ZZHRgvkH9wSeEzbBYXM2JnybF8=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=V8MqBWm04AuDl1a1z51cnFDQt+J5C+n/jORdx/RAQe+2faalV6c01fsblUpIpQp48YD7s7Pb8 IcHQVTTHHzBnau8FH18wUekMcTEAcwPth0XUOXC4CMsG7+Ao/GYxH7Ih2hsUIjxkSALZ5QaoNh8 ryJBY+94Bf/nqT9BI+UuJtEJqstecQNve32DAnwKZi3NKKthbnt5BHPeD0C/qVhQ8OGDmDJ+JXv LYtzn5oMugsROh1cTpMdfqvT9Xyx0a/uKwp8hSPhsE3cVWDJ7biFb1HOt6EWH7QJx3V0Mpgmu33 +v6kAk22eqNmeDuPCgrHocsVx/oYGmrZ0l+P9Rwhn5Lg== X-Zone-Loop: 78f179093fe7b0610ca74ffcc80f43a459d16538e9c5 x-campaign-type: default x-transaction-id: 54fdc653-9cd2-4b3b-93d9-8b7273cb7261 x-swg-uid: 01-7354f868-cbc0-4385-9139-e58603462f12 X-Mailer: Sweego Message-ID: <1778510159.8631fc262581453bbf619ec5b2062170.19e17775cf1000f373@vates.tech> x-swg-bid: 1778510159.8631fc262581453bbf619ec5b2062170.19e17775cf1000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Mon, 11 May 2026 16:35:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] nestedsvm: Clear GIF when injecting VMEXIT To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk References: <20260423161112.50221-1-ross.lagerwall@citrix.com> <1777481694.8631fc262581453bbf619ec5b2062170.19dda2a3d88000f373@vates.tech> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------2tCv8lah157BJQF9rpGpL77U" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778510158434 X-purgate-ID: tlsNG-d25034/1778510164-DBD7BCF5-553F3735/0/0 X-purgate-type: clean X-purgate-size: 8354 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------2tCv8lah157BJQF9rpGpL77U Content-Type: multipart/mixed; boundary="------------C0cURaa7BNCpW75c6NUlBXOP"; protected-headers="v1" From: Teddy Astie To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk Message-ID: <00bc6b62-3529-4b55-8626-d25ba9376bda@vates.tech> Subject: Re: [PATCH] nestedsvm: Clear GIF when injecting VMEXIT References: <20260423161112.50221-1-ross.lagerwall@citrix.com> <1777481694.8631fc262581453bbf619ec5b2062170.19dda2a3d88000f373@vates.tech> In-Reply-To: --------------C0cURaa7BNCpW75c6NUlBXOP Content-Type: multipart/mixed; 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>>>>        if ( vmcb->_vintr.fields.vgif_enable ) >>>> -        ASSERT(vmcb->_vintr.fields.vgif == 0); >>>> +        vmcb->_vintr.fields.vgif = 0; >>>>        else >>>> -        ASSERT(svm->ns_gif == 0); >>>> +        nestedsvm_vcpu_clgi(v); >>>>        ns_vmcb = nv->nv_vvmcx; >>> >>> Looks good to me, though I think we are here looking to make a "guest >>> CLGI" (clear GIF), so the vGIF specific logic should be collapsed into >>> nestedsvm_vcpu_clgi() instead of having it as the non-vgif-support >>> case. >>> (as IIUC, vGIF is a hardware accelration for nested GIF handling ?) >> >> Not 100% sure I follow your point here but v2 of this series removes >> nestedsvm_vcpu_clgi() entirely. Does that address your concern? >> >>> >>> (also making me notice that svm_vmexit_do_{stgi,clgi}() seems to lack >>> vGIF specific logic) >>> >> >> Isn't that by design? If vGIF is enabled the hardware should handle >> STGI/CLGI without a VMEXIT. >> > > I think at some point in the future, we may need a > `nestedsvm_vcpu_{stgi,clgi}()` function, or something in that regard; > e.g for emulating this instruction outside of a SVM intercept path > (x86 emulator bits ?). As I think there are cases where the > instruction is not intercepted but still needs to be emulated. > > Such function would need to know whether or not we use vGIF. Yes we will (eventually) want emulation of STGI/CLGI.  It will specifically not reintroduce nestedsvm_vcpu_{stgi,clgi}(). With introspection, we do get arbitrary instructions running through the emulator.  This is why we take care to ensure that the emulator can cope before a feature gets enabled generally. For normal cases, we either have vGIF active and everything is handled without VMExit, or we don't have vGIF active and everything hits the intercept; this is not a split based on hardware support - it includes both L0 and L1's configuration. In fact, vGIF is a feature where on older hardware it's actually faster for L0 to emulate it for L1, because a virtual VMExit/Entry and running the L1 vmexit handler is much slower than L0 just emulating it and re-entering L2 as if nothing had happened.  But that's an optimisation for a later day. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 11 16:01:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 16:01:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306308.1578338 (Exim 4.92) (envelope-from ) id 1wMT3z-0000Y6-CH; Mon, 11 May 2026 16:00:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306308.1578338; Mon, 11 May 2026 16:00:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMT3z-0000Xz-8k; Mon, 11 May 2026 16:00:59 +0000 Received: by outflank-mailman (input) for mailman id 1306308; Mon, 11 May 2026 16:00:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMT3x-0000Xp-Rv for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:00:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMT3u-007hct-AW for xen-devel@lists.xenproject.org; Mon, 11 May 2026 18:00:54 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01fd25-5cb7-0a2a0a5109dd-0a2a45019b44-18 for ; Mon, 11 May 2026 18:00:54 +0200 Received: from [209.85.208.181] (helo=mail-lj1-f181.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01fd35-c1f2-0a2a45010019-d155d0b5b19b-3 for ; Mon, 11 May 2026 18:00:54 +0200 Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-39393c1b5aaso40018451fa.3 for ; Mon, 11 May 2026 09:00:54 -0700 (PDT) Received: from [10.17.80.122] (ll-74.141.223.85.sovam.net.ua. [85.223.141.74]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-393f6131c08sm28569531fa.30.2026.05.11.09.00.51 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 11 May 2026 09:00:52 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778515253; x=1779120053; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=+ug0aCUEmDPdrZzEZL+s+UF5tIuI8VwfPl3ENnEI/bU=; b=Wxnbl9hnWsu9UWf3ytnnBycu+lhrFtPqhA1Oa3jPOWs73v5iFOFhTgnkklL3TZJnt8 UY6DnHn3swnBjPr8lo4aEUabFqNXPswTegfANc709ovqliHgUBOPTK0XcXRqXlcHh0zp oDV1xh++GcucaRfAByYkXxepk8DyGNXBtIvrZ6ZneDSV403JWQtBuL3ksbZRr7quzhty wScZciAOMc0vbirQbiN1+MIXTwbfYnY8DlGANXkwriNlZKuj/ABFqmpS5i9SPxEnsVSI kWz+SvC8c/KftJSaQaFz3Pkkflr+heRBU61iDj8E0IJ0cFOUcsHUIY1IZVqmsXv5zm41 cRwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778515253; x=1779120053; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=+ug0aCUEmDPdrZzEZL+s+UF5tIuI8VwfPl3ENnEI/bU=; b=JC1u4SEZUKKNnBWwHTRPX7ASAr4qCDNx4auPWjgzJ+gqnm3ozXbxY5t3uDgC2SYZxc j2Sd+YmTLLlLklva0JtIDkbDHlHliOKE15hWXIYTcWa7RgD3psK3tQWpOvAc8hyaetNU urKbfSTMfvNMympEEXMyqWsCpUAdIVxym4DPlSW3AAyVAIS4+Y17Ou8rgqHYqZGy4n0A PrP6Ffuatp0cQDiX5hYcc2QBkjDNzRkLrbIgM3z0Y6MbcalgW5ddePB3dlH9zweealaa 49Alc+oTl5V36PGPF4HLcEPo4c7SbimMzTiCF/zf37Ih4CjERqHEuRIbHOVpUnnw2nFu jC7w== X-Forwarded-Encrypted: i=1; AFNElJ8Lo0P1LoJ14JAMvOcTdvjUjwa4tiffBzlsOJw7zq7zjrXwEBnYOsq8CQRY7a+QrhY5I7atJweeFiE=@lists.xenproject.org X-Gm-Message-State: AOJu0YyhbzWEaP8RP/8r3gkWOJikpP4y6ZVSd3DgGf82RAMqgBbD0w2s 671+Dku+Sc5rlRD7H5evC3cdc9pwFicNQR13tbvEV1N0zXOVFncuQy7k X-Gm-Gg: Acq92OHycYWSFmqQhylMKVoy3u5xJ0yedIJYBdrK62mFy28uNpKqbZ1zSMYgjV9DJy9 F2pAleBfups842PnxTRINqI33GdL7UOwCZQFBT5dJTOavg5pVWSotZ3ZmM8OSA3eGPpTJjt4c34 hDd6PZ9cLMpukHdEV4MJmZGxkYrs5vvRqC//UMGGNhIixtt9Xo9YuffPMCDPDvOJ6YOgNq46Gm/ TzLrryoA8fRPmMGSGmKREB6rbg4AyIjxjhBHPYTLqMUegnvhiiAU/ZsDLqtvZSPC4CsNkaPPgjk dPfenjyK5RgXqTBP2zfS4j6GBdhCDEJZRbO25FLlF1JV/hurvC3AiRe7HePKeZ8uNxQ5l8sX/bN wy1cHp6w3jiIc2exNS4WlG4eAkFVnNFTXXVhcBCsbgv1CgCMwNOOvJ3Nrhc8YPxPKw+8bl8yiJ1 Z8Ana7a8efdblRoIPrV5dZb5kUKhbb/xJB0WVXCALpIfW5ZI/To9kkz8fyuYw3kW+ZPA== X-Received: by 2002:a2e:bc09:0:b0:393:bffa:d815 with SMTP id 38308e7fff4ca-393f4f1d3edmr38453991fa.21.1778515253066; Mon, 11 May 2026 09:00:53 -0700 (PDT) Message-ID: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> Date: Mon, 11 May 2026 19:00:50 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Mykola Kvach , xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778515254-AC055FF4-57AE83BC/0/0 X-purgate-type: clean X-purgate-size: 7202 On 4/2/26 13:45, Mykola Kvach wrote: Hello Mykola I did not spot any obvious issues with this patch. As far as I can tell, the save/restore register set appears to be complete and correct for the current codebase. Just one observation: there is an API asymmetry between prepare_resume_ctx() and hyp_resume() (save uses pointer, restore hardcodes global) ... > From: Mirela Simonovic > > The context of CPU general purpose and system control registers must be > saved on suspend and restored on resume. This is implemented in > prepare_resume_ctx and before the return from the hyp_resume function. > The prepare_resume_ctx must be invoked just before the PSCI system suspend > call is issued to the ATF. The prepare_resume_ctx must return a non-zero > value so that the calling 'if' statement evaluates to true, causing the > system suspend to be invoked. Upon resume, the context saved on suspend > will be restored, including the link register. Therefore, after > restoring the context, the control flow will return to the address > pointed to by the saved link register, which is the place from which > prepare_resume_ctx was called. To ensure that the calling 'if' statement > does not again evaluate to true and initiate system suspend, hyp_resume > must return a zero value after restoring the context. > > Note that the order of saving register context into cpu_context structure > must match the order of restoring. > > Support for ARM32 is not implemented. Instead, compilation fails with a > build-time error if suspend is enabled for ARM32. > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- > Changes in v8: > - fix alignments in code > > Changes in v7: > - no changes > --- > xen/arch/arm/Makefile | 1 + > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++- > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > xen/arch/arm/suspend.c | 14 +++++ > 4 files changed, 130 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/suspend.c > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > index 69200b2728..c36158271a 100644 > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -51,6 +51,7 @@ obj-y += setup.o > obj-y += shutdown.o > obj-y += smp.o > obj-y += smpboot.o > +obj-$(CONFIG_SYSTEM_SUSPEND) += suspend.o > obj-$(CONFIG_SYSCTL) += sysctl.o > obj-y += time.o > obj-y += traps.o > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > index 596e960152..2cb02ee314 100644 > --- a/xen/arch/arm/arm64/head.S > +++ b/xen/arch/arm/arm64/head.S > @@ -562,6 +562,52 @@ END(efi_xen_start) > #endif /* CONFIG_ARM_EFI */ > > #ifdef CONFIG_SYSTEM_SUSPEND > +/* > + * int prepare_resume_ctx(struct cpu_context *ptr) > + * > + * x0 - pointer to the storage where callee's context will be saved ... the C signature takes a pointer (struct cpu_context *ptr) and the save path uses it, ... > + * > + * CPU context saved here will be restored on resume in hyp_resume function. > + * prepare_resume_ctx shall return a non-zero value. Upon restoring context > + * hyp_resume shall return value zero instead. From C code that invokes > + * prepare_resume_ctx, the return value is interpreted to determine whether > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > + */ > +FUNC(prepare_resume_ctx) > + /* Store callee-saved registers */ > + stp x19, x20, [x0], #16 > + stp x21, x22, [x0], #16 > + stp x23, x24, [x0], #16 > + stp x25, x26, [x0], #16 > + stp x27, x28, [x0], #16 > + stp x29, lr, [x0], #16 > + > + /* Store stack-pointer */ > + mov x2, sp > + str x2, [x0], #8 > + > + /* Store system control registers */ > + mrs x2, VBAR_EL2 > + str x2, [x0], #8 > + mrs x2, VTCR_EL2 > + str x2, [x0], #8 > + mrs x2, VTTBR_EL2 > + str x2, [x0], #8 > + mrs x2, TPIDR_EL2 > + str x2, [x0], #8 > + mrs x2, MDCR_EL2 > + str x2, [x0], #8 > + mrs x2, HSTR_EL2 > + str x2, [x0], #8 > + mrs x2, CPTR_EL2 > + str x2, [x0], #8 > + mrs x2, HCR_EL2 > + str x2, [x0], #8 > + > + /* prepare_resume_ctx must return a non-zero value */ > + mov x0, #1 > + ret > +END(prepare_resume_ctx) > > FUNC(hyp_resume) > /* Initialize the UART if earlyprintk has been enabled. */ > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > b enable_secondary_cpu_mm > > mmu_resumed: > - b . > + /* Now we can access the cpu_context, so restore the context here */ > + ldr x0, =cpu_context ... but the restore path hardcodes =cpu_context, ignoring whatever pointer was originally passed. If a caller were to pass anything other than &cpu_context, the resume would load from the wrong location. Since the sole call site does pass &cpu_context (called from system_suspend() in the last patch), this works correctly today — but the API is somewhat misleading. I might be missing something, but why not make prepare_resume_ctx() take no arguments and use =cpu_context directly inside the assembly? That way the save and restore paths would both use the same global, and the API would not be misleading. > + > + /* Restore callee-saved registers */ > + ldp x19, x20, [x0], #16 > + ldp x21, x22, [x0], #16 > + ldp x23, x24, [x0], #16 > + ldp x25, x26, [x0], #16 > + ldp x27, x28, [x0], #16 > + ldp x29, lr, [x0], #16 > + > + /* Restore stack pointer */ > + ldr x2, [x0], #8 > + mov sp, x2 > + > + /* Restore system control registers */ > + ldr x2, [x0], #8 > + msr VBAR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTCR_EL2, x2 > + ldr x2, [x0], #8 > + msr VTTBR_EL2, x2 > + ldr x2, [x0], #8 > + msr TPIDR_EL2, x2 > + ldr x2, [x0], #8 > + msr MDCR_EL2, x2 > + ldr x2, [x0], #8 > + msr HSTR_EL2, x2 > + ldr x2, [x0], #8 > + msr CPTR_EL2, x2 > + ldr x2, [x0], #8 > + msr HCR_EL2, x2 > + isb > + > + /* > + * Since context is restored return from this function will appear > + * as return from prepare_resume_ctx. To distinguish a return from > + * prepare_resume_ctx which is called upon finalizing the suspend, > + * as opposed to return from this function which executes on resume, > + * we need to return zero value here. > + */ > + mov x0, #0 > + ret > END(hyp_resume) > > #endif /* CONFIG_SYSTEM_SUSPEND */ [snip] From xen-devel-bounces@lists.xenproject.org Mon May 11 16:11:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 16:11:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306319.1578347 (Exim 4.92) (envelope-from ) id 1wMTE2-0002Ju-9s; Mon, 11 May 2026 16:11:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306319.1578347; Mon, 11 May 2026 16:11:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMTE2-0002Jn-6l; Mon, 11 May 2026 16:11:22 +0000 Received: by outflank-mailman (input) for mailman id 1306319; Mon, 11 May 2026 16:11:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMTE0-0002Jf-VY for xen-devel@lists.xenproject.org; Mon, 11 May 2026 16:11:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMTE0-006ykw-1o for xen-devel@lists.xenproject.org; Mon, 11 May 2026 18:11:20 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a01ff99-bab6-0a2a0a5309dd-0a2a4504e8f0-28 for ; Mon, 11 May 2026 18:11:20 +0200 Received: from [209.85.167.48] (helo=mail-lf1-f48.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a01ffa7-1dec-0a2a45040019-d155a730dd6d-3 for ; Mon, 11 May 2026 18:11:19 +0200 Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-5a8cb92f26aso1217441e87.1 for ; Mon, 11 May 2026 09:11:19 -0700 (PDT) Received: from [10.17.80.122] (ll-74.141.223.85.sovam.net.ua. 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I don't see >> why it should be separated from the rest of the resume path that is >> added in the next patch > > Ack. I'll combine this with the next patch in v9. > > Best regards, > Mykola > >> >>> This patch adds MMU setup during resume by reusing the existing >>> enable_secondary_cpu_mm function, which enables data cache and the MMU. >>> Before the MMU is enabled, the content of TTBR0_EL2 is changed to point >>> to init_ttbr (page tables used at runtime). >>> >>> Signed-off-by: Mirela Simonovic >>> Signed-off-by: Saeed Nowshadi >>> Signed-off-by: Mykyta Poturai >>> Signed-off-by: Mykola Kvach >>> --- >>> Changes in v7: >>> - no functional changes, just moved commit >>> --- >>> xen/arch/arm/arm64/head.S | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> >>> diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S >>> index 72c7b24498..596e960152 100644 >>> --- a/xen/arch/arm/arm64/head.S >>> +++ b/xen/arch/arm/arm64/head.S >>> @@ -561,6 +561,30 @@ END(efi_xen_start) >>> >>> #endif /* CONFIG_ARM_EFI */ >>> >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + >>> +FUNC(hyp_resume) >>> + /* Initialize the UART if earlyprintk has been enabled. */ >>> +#ifdef CONFIG_EARLY_PRINTK >>> + bl init_uart >>> +#endif >>> + PRINT_ID("- Xen resuming -\r\n") >>> + >>> + bl check_cpu_mode >>> + bl cpu_init >>> + >>> + ldr x0, =start >>> + adr x20, start /* x20 := paddr (start) */ >>> + sub x20, x20, x0 /* x20 := phys-offset */ >>> + ldr lr, =mmu_resumed >>> + b enable_secondary_cpu_mm >>> + >>> +mmu_resumed: >>> + b . I also think this patch would be better squashed with the next one, as they are tightly coupled. During the review of patch 11, I had to switch between patches 10 and 11 several times to understand the full context—patch 10 sets up hyp_resume with a placeholder (b .), and patch 11 immediately fills in the actual context restore. >>> +END(hyp_resume) >>> + >>> +#endif /* CONFIG_SYSTEM_SUSPEND */ >>> + >>> /* >>> * Local variables: >>> * mode: ASM >> >> -- >> WBR, Volodymyr > From xen-devel-bounces@lists.xenproject.org Mon May 11 18:52:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:52:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306366.1578356 (Exim 4.92) (envelope-from ) id 1wMVjR-0005wK-9b; Mon, 11 May 2026 18:51:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306366.1578356; Mon, 11 May 2026 18:51:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVjR-0005w4-3t; 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Enable the option by default to make PVH dom0 more robust in its default configuration. Signed-off-by: Roger Pau Monné --- Changes since v1: - Slightly reword an expand option help text. - Mention the change of defaults in CHANGELOG. --- CHANGELOG.md | 2 ++ docs/misc/xen-command-line.pandoc | 8 ++++++-- xen/arch/x86/hvm/emulate.c | 2 +- 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index ce46020dbdb4..25f5a192ed48 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD ### Changed + - On x86: + - Enable pf-fixup option by default for PVH dom0. ### Added - Support for per-domain Xenstore quota in C xenstored (includes diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 6c77129732bf..2da90548d8fb 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -849,7 +849,7 @@ Controls for how dom0 is constructed on x86 systems. If using this option is necessary to fix an issue, please report a bug. * The `pf-fixup` boolean is only applicable when using a PVH dom0 and - defaults to false. + defaults to true. When running dom0 in PVH mode the dom0 kernel has no way to map MMIO regions into its physical memory map, such mode relies on Xen dom0 builder @@ -857,10 +857,14 @@ Controls for how dom0 is constructed on x86 systems. access. However Xen doesn't have a complete picture of the host memory map, due to not being able to process ACPI dynamic tables. - The `pf-fixup` option allows Xen to attempt to add missing MMIO regions + The `pf-fixup` option causes Xen to attempt to add missing MMIO regions to the dom0 physical memory map in response to page-faults generated by dom0 trying to access unpopulated entries in the memory map. + Users having to disable the feature to boot in PVH dom0 mode should report + it to the xen-devel mailing list, together with Xen and dom0 output with the + option enabled. + Enables features on dom0 on Arm systems. * The `sve` integer parameter enables Arm SVE usage for Dom0 and sets the diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index f3aae158e9f8..bb1bb03ac4e9 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -165,7 +165,7 @@ void hvmemul_cancel(struct vcpu *v) hvmemul_cache_disable(v); } -bool __ro_after_init opt_dom0_pf_fixup; +bool __ro_after_init opt_dom0_pf_fixup = true; static int hwdom_fixup_p2m(paddr_t addr) { unsigned long gfn = paddr_to_pfn(addr); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 11 18:52:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:52:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306370.1578365 (Exim 4.92) (envelope-from ) id 1wMVk5-0006NJ-FU; Mon, 11 May 2026 18:52:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306370.1578365; Mon, 11 May 2026 18:52:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVk5-0006NC-Bo; Mon, 11 May 2026 18:52:37 +0000 Received: by outflank-mailman (input) for mailman id 1306370; Mon, 11 May 2026 18:52:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVk3-0006N1-J7 for xen-devel@lists.xenproject.org; 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Mon, 11 May 2026 11:52:33 -0700 (PDT) MIME-Version: 1.0 References: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> In-Reply-To: <515377c0-2d8c-4069-86d0-e50674fefc68@gmail.com> From: Mykola Kvach Date: Mon, 11 May 2026 21:52:22 +0300 X-Gm-Features: AVHnY4J3h-b6myBnxQz8_mxa7K4zWtVZ_3YhrYRdOqN1yMuVXJvULZvcvf1b5gI Message-ID: Subject: Re: [PATCH v8 11/13] xen/arm: Save/restore context on suspend/resume To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778525554-491763FF-87D55BBF/0/0 X-purgate-type: clean X-purgate-size: 8050 Hi Oleksandr, Thank you for the review. On Mon, May 11, 2026 at 7:00=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 4/2/26 13:45, Mykola Kvach wrote: > > Hello Mykola > > I did not spot any obvious issues with this patch. As far as I can tell, > the save/restore register set appears to be complete and correct for the > current codebase. > > Just one observation: there is an API asymmetry between > prepare_resume_ctx() and hyp_resume() (save uses pointer, restore > hardcodes global) ... > > > From: Mirela Simonovic > > > > The context of CPU general purpose and system control registers must be > > saved on suspend and restored on resume. This is implemented in > > prepare_resume_ctx and before the return from the hyp_resume function. > > The prepare_resume_ctx must be invoked just before the PSCI system susp= end > > call is issued to the ATF. The prepare_resume_ctx must return a non-zer= o > > value so that the calling 'if' statement evaluates to true, causing the > > system suspend to be invoked. Upon resume, the context saved on suspend > > will be restored, including the link register. Therefore, after > > restoring the context, the control flow will return to the address > > pointed to by the saved link register, which is the place from which > > prepare_resume_ctx was called. To ensure that the calling 'if' statemen= t > > does not again evaluate to true and initiate system suspend, hyp_resume > > must return a zero value after restoring the context. > > > > Note that the order of saving register context into cpu_context structu= re > > must match the order of restoring. > > > > Support for ARM32 is not implemented. Instead, compilation fails with a > > build-time error if suspend is enabled for ARM32. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > --- > > Changes in v8: > > - fix alignments in code > > > > Changes in v7: > > - no changes > > --- > > xen/arch/arm/Makefile | 1 + > > xen/arch/arm/arm64/head.S | 90 +++++++++++++++++++++++++++++= - > > xen/arch/arm/include/asm/suspend.h | 26 +++++++++ > > xen/arch/arm/suspend.c | 14 +++++ > > 4 files changed, 130 insertions(+), 1 deletion(-) > > create mode 100644 xen/arch/arm/suspend.c > > > > diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile > > index 69200b2728..c36158271a 100644 > > --- a/xen/arch/arm/Makefile > > +++ b/xen/arch/arm/Makefile > > @@ -51,6 +51,7 @@ obj-y +=3D setup.o > > obj-y +=3D shutdown.o > > obj-y +=3D smp.o > > obj-y +=3D smpboot.o > > +obj-$(CONFIG_SYSTEM_SUSPEND) +=3D suspend.o > > obj-$(CONFIG_SYSCTL) +=3D sysctl.o > > obj-y +=3D time.o > > obj-y +=3D traps.o > > diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S > > index 596e960152..2cb02ee314 100644 > > --- a/xen/arch/arm/arm64/head.S > > +++ b/xen/arch/arm/arm64/head.S > > @@ -562,6 +562,52 @@ END(efi_xen_start) > > #endif /* CONFIG_ARM_EFI */ > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > +/* > > + * int prepare_resume_ctx(struct cpu_context *ptr) > > + * > > + * x0 - pointer to the storage where callee's context will be saved > > ... the C signature takes a pointer (struct cpu_context *ptr) and > the save path uses it, ... > > > + * > > + * CPU context saved here will be restored on resume in hyp_resume fun= ction. > > + * prepare_resume_ctx shall return a non-zero value. Upon restoring co= ntext > > + * hyp_resume shall return value zero instead. From C code that invoke= s > > + * prepare_resume_ctx, the return value is interpreted to determine wh= ether > > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > > + */ > > +FUNC(prepare_resume_ctx) > > + /* Store callee-saved registers */ > > + stp x19, x20, [x0], #16 > > + stp x21, x22, [x0], #16 > > + stp x23, x24, [x0], #16 > > + stp x25, x26, [x0], #16 > > + stp x27, x28, [x0], #16 > > + stp x29, lr, [x0], #16 > > + > > + /* Store stack-pointer */ > > + mov x2, sp > > + str x2, [x0], #8 > > + > > + /* Store system control registers */ > > + mrs x2, VBAR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, VTTBR_EL2 > > + str x2, [x0], #8 > > + mrs x2, TPIDR_EL2 > > + str x2, [x0], #8 > > + mrs x2, MDCR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HSTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, CPTR_EL2 > > + str x2, [x0], #8 > > + mrs x2, HCR_EL2 > > + str x2, [x0], #8 > > + > > + /* prepare_resume_ctx must return a non-zero value */ > > + mov x0, #1 > > + ret > > +END(prepare_resume_ctx) > > > > FUNC(hyp_resume) > > /* Initialize the UART if earlyprintk has been enabled. */ > > @@ -580,7 +626,49 @@ FUNC(hyp_resume) > > b enable_secondary_cpu_mm > > > > mmu_resumed: > > - b . > > + /* Now we can access the cpu_context, so restore the context h= ere */ > > + ldr x0, =3Dcpu_context > > ... but the restore path hardcodes =3Dcpu_context, ignoring whatever > pointer was originally passed. If a caller were to pass anything other > than &cpu_context, the resume would load from the wrong location. Since > the sole call site does pass &cpu_context (called from system_suspend() > in the last patch), this works correctly today =E2=80=94 but the API is s= omewhat > misleading. > > I might be missing something, but why not make prepare_resume_ctx() take > no arguments and use =3Dcpu_context directly inside the assembly? That wa= y > the save and restore paths would both use the same global, and the API > would not be misleading. Yes, good point. Since the resume path restores from the global context obj= ect, the argument to prepare_resume_ctx() is misleading. I will remove the argument and make both the save and restore paths use the same global resume_cpu_context object. Best regards, Mykola > > > + > > + /* Restore callee-saved registers */ > > + ldp x19, x20, [x0], #16 > > + ldp x21, x22, [x0], #16 > > + ldp x23, x24, [x0], #16 > > + ldp x25, x26, [x0], #16 > > + ldp x27, x28, [x0], #16 > > + ldp x29, lr, [x0], #16 > > + > > + /* Restore stack pointer */ > > + ldr x2, [x0], #8 > > + mov sp, x2 > > + > > + /* Restore system control registers */ > > + ldr x2, [x0], #8 > > + msr VBAR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr VTTBR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr TPIDR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr MDCR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HSTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr CPTR_EL2, x2 > > + ldr x2, [x0], #8 > > + msr HCR_EL2, x2 > > + isb > > + > > + /* > > + * Since context is restored return from this function will ap= pear > > + * as return from prepare_resume_ctx. To distinguish a return = from > > + * prepare_resume_ctx which is called upon finalizing the susp= end, > > + * as opposed to return from this function which executes on r= esume, > > + * we need to return zero value here. > > + */ > > + mov x0, #0 > > + ret > > END(hyp_resume) > > > > #endif /* CONFIG_SYSTEM_SUSPEND */ > > > [snip] > > From xen-devel-bounces@lists.xenproject.org Mon May 11 18:54:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 11 May 2026 18:54:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306377.1578373 (Exim 4.92) (envelope-from ) id 1wMVlR-0006tC-Ns; Mon, 11 May 2026 18:54:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306377.1578373; Mon, 11 May 2026 18:54:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMVlR-0006t5-LL; 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Hello, I would like to inquire about whether changing an option default value could still be accepted: https://lore.kernel.org/xen-devel/20260511185145.23750-1-roger.pau@citrix.com/ This is not new code, just changing a default. I believe this makes dom0 PVH more usable out of the box (see commit message). Thanks, Roger. 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Mon, 11 May 2026 13:41:24 -0700 (PDT) MIME-Version: 1.0 References: <5e1951e1c17037e020de9c0eecb5fba94edcd9dd.1775125380.git.mykola_kvach@epam.com> <81FE9BB6-2C8D-49B8-86E4-BD1B19B3F76E@arm.com> In-Reply-To: <81FE9BB6-2C8D-49B8-86E4-BD1B19B3F76E@arm.com> From: Mykola Kvach Date: Mon, 11 May 2026 23:41:13 +0300 X-Gm-Features: AVHnY4L6KVcmSANctcbMbzU_-qNRJXjCUsosZNN4ylII2i0mx_ZY4nBcQsbGw5k Message-ID: Subject: Re: [PATCH v8 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1778532085-7CE7B8B7-A5661A24/0/0 X-purgate-type: clean X-purgate-size: 4638 On Mon, May 11, 2026 at 9:41=E2=80=AFAM Luca Fancellu wrote: > > Hi Mykola, > > > > >> > >>> > >>> For GICC_APRn/GICC_NSAPRn, those registers describe active priority s= tate for > >>> interrupts already acknowledged by the CPU interface. The final suspe= nd path is > >>> not expected to run with an active physical interrupt context. If tho= se > >>> registers were non-zero there, restoring only APR/NSAPR would not mak= e the > >>> corresponding interrupt handling context valid after resume, and coul= d instead > >>> leave the CPU interface with stale active priority state. > >> > >> Ok I understand now, but if we are expecting here GICD_ISACTIVERn zero= ed, why are > >> we saving/restoring it? Shouldn=E2=80=99t we instead have a runtime ch= eck that it=E2=80=99s zero and in case > >> it=E2=80=99s not bail out? And in the resume path we would only zero i= t. > >> > >> Am I missing something? > > > > Good questions. > > > > Yes, the distinction I should have made clearer is between CPU-interfac= e > > active-priority state and distributor active state. > > > > For GICC_APRn/GICC_NSAPRn, I expect the state to be quiesced at this po= int. > > Those registers track active priorities in the CPU interface. Xen reach= es > > gic_suspend() with local interrupts disabled, and for the guest-routed > > interrupt case that can leave a distributor active bit behind, Xen has > > already performed the physical EOI, so the CPU-interface priority has b= een > > dropped. > > There is no CPU-interface active-priority context that we can meaningfu= lly > > replay after resume. > > > > That is different from GICD_ISACTIVERn. In EOImode=3D=3D1, EOIR only dr= ops the > > priority. The interrupt remains active in the distributor until the sep= arate > > deactivation step. For a guest-routed interrupt Xen's GICv2 guest end p= ath does > > only the physical EOI; deactivation is completed later by the virtual G= IC/GICV > > path when the guest completes the interrupt. > > > > This is why APR/NSAPR and ISACTIVERn are treated differently. For examp= le: > > > > 1. A physical IRQ routed to a guest is acknowledged by Xen. > > 2. The GIC marks the interrupt active in the distributor. > > 3. Xen EOIs it, which drops the physical priority. > > 4. Xen queues/injects the interrupt to the vGIC. > > 5. The guest has not yet run, or the virtual interrupt is not yet deli= verable > > because of guest PMR/priority/local IRQ masking/vGIC state. > > 6. Therefore the guest-side deactivate has not happened yet, and the p= hysical > > distributor active bit remains set. > > > > There is also a late suspend window in the current Xen path: domains ar= e > > suspended and the scheduler is disabled before local IRQs are disabled. > > A guest-routed IRQ can therefore be taken by Xen after the guest is alr= eady > > suspended, but before gic_suspend(). Xen can EOI/priority-drop it and q= ueue > > it for the guest, while the guest cannot run and deactivate it before t= he > > GIC state is saved. > > > > This is the same class of issue handled by Linux for GIC EOImode=3D=3D1= . Linux > > saves/restores the active state because forwarded interrupts can remain= active > > while passed to a VM [1]. > > > > So I don't think GICD_ISACTIVERn should be treated as "must be zero" un= less we > > also add an explicit suspend-abort/quiesce policy for in-flight guest > > interrupts. That would be a different design: detect non-zero active/in= -flight > > state, unwind suspend, thaw domains, let the guest drain/deactivate the > > interrupts, and retry later. This series does not implement that policy= . Given > > the current flow, preserving GICD_ISACTIVERn avoids losing architectura= l > > interrupt-controller state across suspend/resume. > > > > I am not opposed to such a policy as a follow-up if we want stricter su= spend > > quiescence rules, but I think it should be designed explicitly rather t= han > > inferred from the GIC save/restore code. > > > > Best regards, > > Mykola > > > > [1] https://patchwork.kernel.org/project/linux-arm-kernel/patch/1447701= 208-18150-5-git-send-email-marc.zyngier@arm.com/ > > Right, yes I agree! I have another question though, since GICC_APRn state= should be > quiesced in the suspend path (allimplemented active-priority bits should = read as zero), > should we have a runtime check just after disabling the CPU interface? Yes, I think a runtime check is appropriate here. Best regards, Mykola > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Tue May 12 01:39:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 01:39:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306497.1578392 (Exim 4.92) (envelope-from ) id 1wMc5G-0006ls-Ie; Tue, 12 May 2026 01:38:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306497.1578392; Tue, 12 May 2026 01:38:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc5G-0006lj-Da; Tue, 12 May 2026 01:38:54 +0000 Received: by outflank-mailman (input) for mailman id 1306497; Tue, 12 May 2026 01:38:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc5F-0006ld-8d for xen-devel@lists.xenproject.org; Tue, 12 May 2026 01:38:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMc5E-00CVao-MA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 03:38:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a028472-2eae-0a2a0a5409dd-0a2a4506b7fe-36 for ; Tue, 12 May 2026 03:38:52 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0284ab-7371-0a2a45060019-ac6904feb2f2-3 for ; Tue, 12 May 2026 03:38:52 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 0FB0960055; Tue, 12 May 2026 01:38:51 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 95B27C2BCB0; Tue, 12 May 2026 01:38:50 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778549930; bh=8yKlDYprkgFD+kXbd1+3tO2NcMOvkhTdD+b0zY6Bwgg=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=pBNl3uf5nH7g8NANprrSypC3QbgSBw6YLGTCJJ55dpByV0ewjskUvOIdPP9x2cmax R2hhQHrqpp+P01Y3kLy5cngcYTbOzFAsXQ4fON2zFmkk1mNUj+any9ANyzargQlxR8 Nt3wd2CgqmkDIkE1OTuvMFWH9nNFCvxA9CqI+IrYnxV28EsiF293suEjCr8l2+Mgc7 Rk5HsSijJdS3FOC7TfeRypycelBxw94oGSu6x7+QGjaG1PO8ESzrtY4TLXZrIWoSUz vCHiX2nTncnVUQnMG7oZMSbkjCobd9zrJCjnzPG6oRfGhE5myAkg737jv4W5qESPS7 BEq4YmayosTAg== Date: Mon, 11 May 2026 18:38:49 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH v2 1/2] CI: re-work Xen artifacts collection In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-16d1c6/1778549932-8596CD75-DB421C3C/0/0 X-purgate-type: clean X-purgate-size: 2216 On Mon, 11 May 2026, Jan Beulich wrote: > There's no need to do this separately from three places. Once moved to the > bottom of the script, the need for this to be a function also disappears. > > While there also make sure xen-syms is collected. This is rather more > useful for analysis of possible problems than its stripped counterpart. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -44,30 +44,15 @@ cp xen/.config xen-config > # Directory for the artefacts to be dumped into > mkdir -p binaries > > -collect_xen_artefacts() > -{ > - local f > - > - for f in xen/xen xen/xen.efi; do > - if [[ -f $f ]]; then > - cp $f binaries/ > - fi > - done > -} > - > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Cppcheck analysis invokes Xen-only build > xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) > > # Preserve artefacts > - collect_xen_artefacts > cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt > elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Xen-only build > make -j$(nproc) xen > - > - # Preserve artefacts > - collect_xen_artefacts > else > # Full build. Figure out our ./configure options > cfgargs=("--prefix=/usr") > @@ -108,9 +93,16 @@ else > make -j$(nproc) dist > > # Preserve artefacts > - # Note: Some smoke tests depending on finding binaries/xen on a full build > - # even though dist/ contains everything, while some containers don't even > - # build Xen > (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz > - collect_xen_artefacts > fi > + > +# Preserve Xen artefacts > +# > +# Note: Some smoke tests depend on finding binaries/xen on a full build > +# even though dist/ contains everything, while some containers don't even > +# build Xen. > +for f in xen/xen xen/xen-syms xen/xen.efi; do > + if [[ -f $f ]]; then > + cp $f binaries/ > + fi > +done > From xen-devel-bounces@lists.xenproject.org Tue May 12 01:40:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 01:40:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306504.1578401 (Exim 4.92) (envelope-from ) id 1wMc6z-0008Bd-Sz; Tue, 12 May 2026 01:40:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306504.1578401; Tue, 12 May 2026 01:40:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc6z-0008BW-Ou; Tue, 12 May 2026 01:40:41 +0000 Received: by outflank-mailman (input) for mailman id 1306504; Tue, 12 May 2026 01:40:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMc6y-0008BQ-EH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 01:40:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMc6x-007pn1-OB for xen-devel@lists.xenproject.org; Tue, 12 May 2026 03:40:39 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02845f-bab6-0a2a0a5309dd-0a2a450ab7bc-30 for ; Tue, 12 May 2026 03:40:39 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a028516-56b3-0a2a450a0019-aceafc1f9a3e-3 for ; Tue, 12 May 2026 03:40:39 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 5D1434452E; Tue, 12 May 2026 01:40:37 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DFEBC2BCB0; Tue, 12 May 2026 01:40:37 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778550037; bh=WCPI3dg8DDCJlpoPRAjEBYQiGGCHc21thDzCEXK8g74=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=iz0i5OXtoc9GL0oQ2CXsNwvuNChREi6mxIBhONyw7M+pqM5zD1Yc9Ooqd6aiRDw8p LWFVSuRC+1BL55fSIM8g/OJeOsmMc3kXZwxsVxXRids722Vg/wOGC653oSm3kq27ex LuP3xYoY0HtQV0BTLv9vc/vUPwKpCyp6hzXbeou5pn4rT4OPcWpJeRnLzCWgocdu9R Aq9Dl5LiaNIX2gTvaoNnNkT+uIveCZgOaPAYW4AdG2wovqI8/KEmW7kRZ8S4ws/vUU bwtiGS/2knMqoXNwKPMAKvqt/qQRSu6DqDmUY47EkXYgbQoDYnW9Xa98CCcfTgY+FZ 3K3FpoQIw21Ag== Date: Mon, 11 May 2026 18:40:36 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH v2 2/2] CI: collect certain intermediate files as artifacts In-Reply-To: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> Message-ID: References: <6e0266e6-8dda-4a87-886d-79da637c2172@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-4011c0/1778550039-705648B7-8D5D352F/0/0 X-purgate-type: clean X-purgate-size: 3020 On Mon, 11 May 2026, Jan Beulich wrote: > When one of the linking passes fails, additional intermediate files are > still in place. Having them available for analysis of the underlying > problem can be pretty helpful. Collect some into a new intermediates/ > directory. (Nothing new will be collected if linking succeeds.) > > As the script is run with -e passed to bash, defer exit if the main > "make" (or substituent script thereof) failed. This way more artifacts > are collected, potentially making it easier to analyze the failure. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2515787945 > (with PPC forced to invoke the new logic, hence respective failures there) > --- > v2: Different approach. > > --- a/automation/gitlab-ci/build.yaml > +++ b/automation/gitlab-ci/build.yaml > @@ -6,6 +6,7 @@ > artifacts: > paths: > - binaries/ > + - intermediates/ > - xen-config > - xen-cppcheck.txt > - '*.log' > --- a/automation/scripts/build > +++ b/automation/scripts/build > @@ -37,22 +37,24 @@ else > make -j$(nproc) -C xen olddefconfig > fi > > -# Save the config file before building because build failure causes the script > -# to exit early -- bash is invoked with -e. > +# Save the config file before building, just in case. > cp xen/.config xen-config > > -# Directory for the artefacts to be dumped into > -mkdir -p binaries > +# Directories for artefacts to be dumped into > +mkdir -p binaries intermediates > + > +# Script exit status, to be overridden by the main make's status below. > +ret=0 > > if [[ "${CPPCHECK}" == "y" ]] && [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Cppcheck analysis invokes Xen-only build > - xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) > + xen/scripts/xen-analysis.py --run-cppcheck --cppcheck-misra -- -j$(nproc) || ret=$? > > # Preserve artefacts > cp xen/cppcheck-report/xen-cppcheck.txt xen-cppcheck.txt > elif [[ "${HYPERVISOR_ONLY}" == "y" ]]; then > # Xen-only build > - make -j$(nproc) xen > + make -j$(nproc) xen || ret=$? > else > # Full build. Figure out our ./configure options > cfgargs=("--prefix=/usr") > @@ -90,7 +92,7 @@ else > fi > > ./configure "${cfgargs[@]}" > - make -j$(nproc) dist > + make -j$(nproc) dist || ret=$? > > # Preserve artefacts > (cd dist/install; find | cpio -R 0:0 -o -H newc | gzip) > binaries/xen-tools.cpio.gz > @@ -106,3 +108,12 @@ for f in xen/xen xen/xen-syms xen/xen.ef > cp $f binaries/ > fi > done > + > +# Preserve Xen intermediate files. Some may be there only upon build failure. > +for f in xen/.xen-syms.* xen/.xen.efi.*; do > + if [[ -f $f ]]; then > + cp $f intermediates/ > + fi > +done > + > +exit $ret > From xen-devel-bounces@lists.xenproject.org Tue May 12 06:20:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 06:20:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306561.1578430 (Exim 4.92) (envelope-from ) id 1wMgTX-0001Nl-Ot; Tue, 12 May 2026 06:20:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306561.1578430; Tue, 12 May 2026 06:20:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgTX-0001Nd-JU; Tue, 12 May 2026 06:20:15 +0000 Received: by outflank-mailman (input) for mailman id 1306561; Tue, 12 May 2026 06:20:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgTW-0001NX-6N for xen-devel@lists.xenproject.org; Tue, 12 May 2026 06:20:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMgTT-006t8m-Ht for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:20:13 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02c68b-e002-0a2a0a5209dd-0a2a45068d94-30 for ; Tue, 12 May 2026 08:20:12 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02c69c-7371-0a2a45060019-d155dd31adfd-3 for ; Tue, 12 May 2026 08:20:12 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-459bf19e87bso876161f8f.1 for ; Mon, 11 May 2026 23:20:12 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <877bparq9t.fsf@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778566812-8EF89D75-7771194F/0/0 X-purgate-type: clean X-purgate-size: 4311 On 11.05.2026 16:10, Volodymyr Babchuk wrote: > Hi Jan, > > Jan Beulich writes: > >> On 07.05.2026 22:40, Volodymyr Babchuk wrote: >>> Jan Beulich writes: >>>> On 06.05.2026 11:39, Mykyta Poturai wrote: >>>>> On 5/4/26 08:37, Jan Beulich wrote: >>>>>> On 23.04.2026 12:12, Mykyta Poturai wrote: >>>>>>> On 4/21/26 17:43, Jan Beulich wrote: >>>>>>>> On 09.04.2026 16:01, Mykyta Poturai wrote: >>>>>>>>> From: Stewart Hildebrand >>>>>>>>> >>>>>>>>> This code is expected to only be used by privileged domains, >>>>>>>>> unprivileged domains should not get access to the SR-IOV capability. >>>>>>>>> >>>>>>>>> Implement RW handlers for PCI_SRIOV_CTRL register to dynamically >>>>>>>>> map/unmap VF BARS. Recalculate BAR sizes before mapping VFs to account >>>>>>>>> for possible changes in the system page size register. Also force VFs to >>>>>>>>> always use emulated reads for command register, this is needed to >>>>>>>>> prevent some drivers accidentally unmapping BARs. >>>>>>>> >>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are >>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even >>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as >>>>>>>> the memory decode bit there is hardwired to 0. >>>>>>>> >>>>>>>>> Discovery of VFs is >>>>>>>>> done by Dom0, which must register them with Xen. >>>>>>>> >>>>>>>> If we intercept control register writes, why would we still require >>>>>>>> Dom0 to report the VFs that appear? >>>>>>>> >>>>>>> >>>>>>> Sorry, I don't understand this question. You specifically requested this >>>>>>> to be done this way in V2. Quoting your reply from V2 below. >>>>>>> >>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply >>>>>>> returning "true" >>>>>>> > from vpci_process_pending() until the time has passed? This imo is a >>>>>>> no-go. You >>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again >>>>>>> when the >>>>>>> > timer has expired. That'll then eliminate the need for the >>>>>>> not-so-nice patch 4. >>>>>>> >>>>>>> > Question is whether we need to actually go this far (right away). I >>>>>>> expect you >>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware >>>>>>> > domain, can't we trust it to set things up correctly, just like we >>>>>>> trust it in >>>>>>> > a number of other aspects? >>>>>> >>>>>> How's any of this related to the question I raised here, or your reply >>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. >>>>>> Why still demand Dom0 to report them then? >>>>>> >>>>> >>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is >>>>> set to become alive. We discussed in the V2 that it is not acceptable to >>>>> do a required 100ms wait in Xen while blocking a domain. And not doing >>>>> that blocking would require some mechanism to only allow a domain to run >>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust >>>>> the hardware domain with registering VFs if we already trust it with >>>>> other PCI-related stuff. Did you change your mind, or am I completely >>>>> misunderstanding this question? >>>> >>>> No, I still think that we can trust hwdom enough. Nevertheless we should >>>> aim at being independent of it where possible. And I seem to recall that >>>> I had also outlined an approach how to avoid spin-waiting for 100ms in >>>> the hypervisor. >>> >>> I want to clarify: you are telling that Xen should not wait for hwdom to >>> report VFs and instead create them by itself. Is this correct? >> >> If that's technically possible, yes. > > Okay, so let's clear this. If I remember correct, you discussed this > with Mykyta in the previous version and suggested to put the vCPU to > sleep for 100ms. I don't think I did (except perhaps from a very abstract perspective), precisely because of ... > I don't think that this is a good idea, because guest > kernel will not be happy about that. ... this. Instead iirc I suggested to refuse (short-circuit) handling VF register accesses for the next 100ms. Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 06:27:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 06:27:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306570.1578439 (Exim 4.92) (envelope-from ) id 1wMgZq-000219-F8; Tue, 12 May 2026 06:26:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306570.1578439; Tue, 12 May 2026 06:26:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgZq-000211-BN; Tue, 12 May 2026 06:26:46 +0000 Received: by outflank-mailman (input) for mailman id 1306570; Tue, 12 May 2026 06:26:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMgZp-00020v-Ba for xen-devel@lists.xenproject.org; Tue, 12 May 2026 06:26:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMgZo-008Opg-L6 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:26:44 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02c80e-e002-0a2a0a5209dd-0a2a450ac0c8-42 for ; Tue, 12 May 2026 08:26:44 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02c824-56b3-0a2a450a0019-d155dd34ad6c-3 for ; Tue, 12 May 2026 08:26:44 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-459bf19e87bso879573f8f.1 for ; Mon, 11 May 2026 23:26:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260511185145.23750-1-roger.pau@citrix.com> Content-Type: text/plain; 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Enable the option by default to make PVH dom0 more > robust in its default configuration. > > Signed-off-by: Roger Pau Monné Reviewed-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Tue May 12 07:32:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 07:32:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306586.1578448 (Exim 4.92) (envelope-from ) id 1wMhbP-0002sK-TG; Tue, 12 May 2026 07:32:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306586.1578448; Tue, 12 May 2026 07:32:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMhbP-0002sD-Q1; Tue, 12 May 2026 07:32:27 +0000 Received: by outflank-mailman (input) for mailman id 1306586; Tue, 12 May 2026 07:32:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMhbO-0002s5-7O for xen-devel@lists.xenproject.org; Tue, 12 May 2026 07:32:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMhbN-009Tbs-2j for xen-devel@lists.xenproject.org; Tue, 12 May 2026 09:32:25 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02d77b-e002-0a2a0a5209dd-0a2a4501eb6c-38 for ; Tue, 12 May 2026 09:32:25 +0200 Received: from [40.107.162.105] (helo=PA4PR04CU001.outbound.protection.outlook.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02d788-c1f2-0a2a45010019-286ba2693bc0-3 for ; Tue, 12 May 2026 09:32:24 +0200 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com (2603:10a6:102:30d::12) by PR3PR03MB6378.eurprd03.prod.outlook.com (2603:10a6:102:5f::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9913.11; Tue, 12 May 2026 07:32:21 +0000 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb]) by PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb%5]) with mapi id 15.20.9891.020; Tue, 12 May 2026 07:32:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:x-ms-exchange-senderadcheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Q2bT+ramku/bOZvmMW0cIyU9Rn6hd7T13T2g6TIPBfOrurHQhLlXUCjjI4/DAchtBP5468XRkoOt/eYIAeoDI9I/T+GLDqZFNqYNMQdjaxzt2dY4N0v4mudpJ/zpnlTWFZUYDQ/vwOMcLETU9v2sVfjRw5KQmo3w9AHQVvsAAUlwLT4C7W7byYg+EFIWJaO7Zlm+Rhsgc2TMqK44ntstdIpwOB0TvNu32X9tx0NUxC/XMVkTEqnn22lARatAbU9LzNbcGtfmkUi/O8vdHLI1O/HZ74EDlkMPWxGaCECYChF25EFuF8+g1FykpP+t7vQTDRipw4TuWzvz5dNM4585dw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=x11TnGOl04orQbuqqYgUo62byMZqkXSryoufrsNuqH0=; b=gfsjC8CZMG/c5DKBPJxsH07hhDFrDFqBqaZQWhrY3UBZfW8gIwI9/73o/LsaeVKk/PccTu5s5ZXRgkKa1e3F6hQna496HKiIH6+0mB7ylkKQZpFDlscWQGYu+Dw4llWbO6X9fVZi7vA4Pmg34PRQZzPniBnP86OYemYx9cPciJa+0AidX9opCBexE/k+hVJI0x4XC7OQMhpVh/RGSyPwTDCNHGgaKULPIk8xOeVjJfukYNMir9BJiSI34dVMX2UqEPAa6Man3wsW1esdd/yf5e2AAHDR8q9FNRZIC1eGehtT4xfHxn0Ttm2Dux5Ash7xLKPYV99Sca3JGFCef8DEYg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=x11TnGOl04orQbuqqYgUo62byMZqkXSryoufrsNuqH0=; b=JyUMKLHvAxICUBK64Ol3+C6CoPZLMjceuCEsm5FQfUQeVTkp+T3ET1SHHuXK96t6E04mT2P7eSv3NazK9SP3t9yK806AyuFerbxb/Kf9A7tjsQdOErgJTPMqc4STnweL6MYg00bR8KyAVerdggH2QE91uRilP17KxOZCZIy+1Eiw9DLEuyF+HW2t3RbbGdblfPpxE6o1NXohMLB19rnhVmEan7PRR0NIwKvKrF+zGnvS72MYvYHMcI/SMBcRqLZARgHTO3/A1GgOPrnVtvr81igYaq+YhIRKnVKxBNGBYcnLPklPeyjVvAZ+lhMIO3CaFlQNRX9V6o/CJxUVxgGevg== From: Mykyta Poturai To: Jan Beulich , Volodymyr Babchuk CC: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= , "Daniel P. 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3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A349.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4125 X-purgate-ID: tlsNG-ebf023/1778573702-2B96A3FF-31ED3B11/0/0 X-purgate-type: clean X-purgate-size: 2812 On Arm we stay on the safe side and refuse to create a domain on user requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to the feature not being compiled in. SCI fall through the crack and does not adhere to that i.e. a user request for SCI type other than NONE when CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently ignored. Fix it by not allowing anything else other than NONE if the feature is not enabled. Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, single agent") Signed-off-by: Michal Orzel --- xen/arch/arm/dom0less-build.c | 11 +++++++++-- xen/arch/arm/include/asm/firmware/sci.h | 5 +++++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 6f73c65e5151..52cf788a45ea 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -273,8 +273,7 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_NONE; - if ( !IS_ENABLED(CONFIG_ARM_SCI) || - !dt_property_read_bool(node, "xen,sci_type") ) + if ( !dt_property_read_bool(node, "xen,sci_type") ) return 0; ret = dt_property_read_string(node, "xen,sci_type", &sci_type); @@ -284,7 +283,15 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, if ( !strcmp(sci_type, "none") ) d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_NONE; else if ( !strcmp(sci_type, "scmi_smc") ) + { + if ( !IS_ENABLED(CONFIG_SCMI_SMC) ) + { + printk(XENLOG_ERR "xen,sci_type=scmi_smc requested, but CONFIG_SCMI_SMC not set\n"); + return -EINVAL; + } + d_cfg->arch.arm_sci_type = XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC; + } else { printk(XENLOG_ERR "xen,sci_type in not valid (%s) for domain %s\n", diff --git a/xen/arch/arm/include/asm/firmware/sci.h b/xen/arch/arm/include/asm/firmware/sci.h index 3500216bc250..485ce211c995 100644 --- a/xen/arch/arm/include/asm/firmware/sci.h +++ b/xen/arch/arm/include/asm/firmware/sci.h @@ -148,6 +148,8 @@ int sci_dt_finalize(struct domain *d, void *fdt); int sci_assign_dt_device(struct domain *d, struct dt_device_node *dev); #else +#include + static inline bool sci_domain_is_enabled(struct domain *d) { return false; @@ -162,6 +164,9 @@ static inline int sci_domain_init(struct domain *d, static inline int sci_domain_sanitise_config(struct xen_domctl_createdomain *config) { + if ( config->arch.arm_sci_type != XEN_DOMCTL_CONFIG_ARM_SCI_NONE ) + return -EINVAL; + return 0; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 08:54:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 08:54:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306626.1578466 (Exim 4.92) (envelope-from ) id 1wMise-00062m-0r; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: y8RvMewNYyqngI48n0lc96h0Uz5Nd9nmvSW5LchAbL824ZJK4Ecm3N21LLUfR3C5u7vpRk/1rO6PlZh1eck7qeJTMjbnXJdmjN1XomCcbiedqo6CxwpaDbXXx6L47oOP3jgIr7VtVG2/acjAtUSkhx/mMB0mgU1H9i1JzFivAn/Ukj4m6yAJMW91CxKqMPnSfXK9F9L/7EAGSmGbtwp5fOlmtEeudn0gAiU/zGO9Q5umgLlQ8JACoyMgM9aBWjdqwyKYdrj+HH4SskxkaY2lC/v/oARD4pQi7JRGtqOiMcM4NIWpEwGlGsHmsbscxlzd6nerideZfZNjkGZNSJtq4QyelErf82t9giQ+Qb14fx9CPtJKAF8Gp03AKCr/aOHEzMkGv07qiF4O8P7ad/yO/8TkTn2EACQJED4H/Zm/HgjNXdnfDhffAm5OcU37cMgd X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 08:54:07.4100 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ec9faf35-6823-48d1-7412-08deb00406e3 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF00028D0D.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6289 X-purgate-ID: tlsNG-33051d/1778576055-4006F938-3D8BB1D4/0/0 X-purgate-type: clean X-purgate-size: 984 Hi Michal, > On 12 May 2026, at 09:14, Michal Orzel wrote: >=20 > On Arm we stay on the safe side and refuse to create a domain on user > requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to > the feature not being compiled in. SCI fall through the crack and does no= t > adhere to that i.e. a user request for SCI type other than NONE when > CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently > ignored. Fix it by not allowing anything else other than NONE if the > feature is not enabled. >=20 > Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, = single agent") > Signed-off-by: Michal Orzel > --- > xen/arch/arm/dom0less-build.c | 11 +++++++++-- > xen/arch/arm/include/asm/firmware/sci.h | 5 +++++ > 2 files changed, 14 insertions(+), 2 deletions(-) Looks ok to me Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Tue May 12 08:58:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 08:58:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306636.1578475 (Exim 4.92) (envelope-from ) id 1wMiwu-0006l3-H0; Tue, 12 May 2026 08:58:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306636.1578475; Tue, 12 May 2026 08:58:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMiwu-0006kw-Ds; Tue, 12 May 2026 08:58:44 +0000 Received: by outflank-mailman (input) for mailman id 1306636; Tue, 12 May 2026 08:58:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMiws-0006kq-3L for xen-devel@lists.xenproject.org; Tue, 12 May 2026 08:58:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMiwr-00325c-GT for xen-devel@lists.xenproject.org; Tue, 12 May 2026 10:58:41 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a02ebc0-bab6-0a2a0a5309dd-0a2a45019034-4 for ; Tue, 12 May 2026 10:58:41 +0200 Received: from [52.101.62.35] (helo=DM5PR21CU001.outbound.protection.outlook.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a02ebc0-c1f2-0a2a45010019-34653e232d5a-3 for ; Tue, 12 May 2026 10:58:41 +0200 Received: from CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) by CH4PR03MB7603.namprd03.prod.outlook.com (2603:10b6:610:23c::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9913.11; Tue, 12 May 2026 08:58:38 +0000 Received: from CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343]) by CH7PR03MB7860.namprd03.prod.outlook.com ([fe80::f5ba:35df:1c9f:b343%4]) with mapi id 15.20.9891.021; Tue, 12 May 2026 08:58:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=nnxlfFEIl6LbOy5ahady0CbZ3k4PGlQaHE2iX0YaQsxb6oqNE9Lls+PJ/w1IASsy6IjDU0qABeEFZEH2zP+mf2MxpQtItse9pAvnPJgxCLCfNGulB1IBFuiDjhIlYq5UjAzk76OwFv+CjWr/qQ5DPkiHw/e5KZ0CEpFwJJsuhOtEUlXdpkf8phpDOVOMTFeFbxdkUFqV743M1G2DJaIKJ2wcSoVY2dSGCj2lxIIVMDHfipkpULUI63zUr9ltid9Ny6YK3QiCAxiLq84Lijs7+eyIuHC+ce7R1ZExeudXQgGLTyOv9l/9YZepPVTzBZ4PntzmJLX6P1B93GA0qXmphw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=qH4EWmAqN6sVd9w3DT5QYXve3FhDQLaIzlvXI4tn7w8=; b=FjZs75dTFqogmSMMmoqDHnmV2d2SAry+GkyHaEFCHIVTvY4BqDoARPOFKgcpWsRqG0jd6KZHGcXTRn4W/lo5GEeK53fRSbCCZEE4h4i9dhofWDF1CFYeQtMZjmVDTbujgzOV1EOiVRzP1AhRxh+0pjKx8rcbFlOtKueRMoYrHZZPUV1l1TaX4JcqlNx0e88BPuFFAp69sRGgarZVQC9ymxev72tEALAS/Rib4amiiDHGLcY44YBmCoH9g2fCXMOP+p4zuFkc4+4HENTEfaTQyMQWdgIuzNj+DcmIAwv404j6nonSA+ib8hR+h7GO6scgtMQhgeglI6hH2iY2lILfUg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=qH4EWmAqN6sVd9w3DT5QYXve3FhDQLaIzlvXI4tn7w8=; b=hTSVqqLmUtvXKccTCLImU8P5r6GG+en4bFc8IJs4dfmj2ZIGjsfgpa52/jhb0DwmTstJG1uBsE10nbCxhFUnT2MCRD0r51Ok9wr/fVHSCtDacJWA/YTWywqZVf2rcrBd8OW6Ese3ucl1BzyeE9Vc5PGv1oZTyw/r9goHSnszRNk= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Date: Tue, 12 May 2026 10:58:34 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Mykyta Poturai Cc: Jan Beulich , Volodymyr Babchuk , "Daniel P. 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Recalculate BAR sizes before mapping VFs to account > >>>>>>>>>> for possible changes in the system page size register. Also force VFs to > >>>>>>>>>> always use emulated reads for command register, this is needed to > >>>>>>>>>> prevent some drivers accidentally unmapping BARs. > >>>>>>>>> > >>>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are > >>>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even > >>>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as > >>>>>>>>> the memory decode bit there is hardwired to 0. > >>>>>>>>> > >>>>>>>>>> Discovery of VFs is > >>>>>>>>>> done by Dom0, which must register them with Xen. > >>>>>>>>> > >>>>>>>>> If we intercept control register writes, why would we still require > >>>>>>>>> Dom0 to report the VFs that appear? > >>>>>>>>> > >>>>>>>> > >>>>>>>> Sorry, I don't understand this question. You specifically requested this > >>>>>>>> to be done this way in V2. Quoting your reply from V2 below. > >>>>>>>> > >>>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply > >>>>>>>> returning "true" > >>>>>>>> > from vpci_process_pending() until the time has passed? This imo is a > >>>>>>>> no-go. You > >>>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again > >>>>>>>> when the > >>>>>>>> > timer has expired. That'll then eliminate the need for the > >>>>>>>> not-so-nice patch 4. > >>>>>>>> > >>>>>>>> > Question is whether we need to actually go this far (right away). I > >>>>>>>> expect you > >>>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > >>>>>>>> > domain, can't we trust it to set things up correctly, just like we > >>>>>>>> trust it in > >>>>>>>> > a number of other aspects? > >>>>>>> > >>>>>>> How's any of this related to the question I raised here, or your reply > >>>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. > >>>>>>> Why still demand Dom0 to report them then? > >>>>>>> > >>>>>> > >>>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > >>>>>> set to become alive. We discussed in the V2 that it is not acceptable to > >>>>>> do a required 100ms wait in Xen while blocking a domain. And not doing > >>>>>> that blocking would require some mechanism to only allow a domain to run > >>>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust > >>>>>> the hardware domain with registering VFs if we already trust it with > >>>>>> other PCI-related stuff. Did you change your mind, or am I completely > >>>>>> misunderstanding this question? > >>>>> > >>>>> No, I still think that we can trust hwdom enough. Nevertheless we should > >>>>> aim at being independent of it where possible. And I seem to recall that > >>>>> I had also outlined an approach how to avoid spin-waiting for 100ms in > >>>>> the hypervisor. > >>>> > >>>> I want to clarify: you are telling that Xen should not wait for hwdom to > >>>> report VFs and instead create them by itself. Is this correct? > >>> > >>> If that's technically possible, yes. > >> > >> Okay, so let's clear this. If I remember correct, you discussed this > >> with Mykyta in the previous version and suggested to put the vCPU to > >> sleep for 100ms. > > > > I don't think I did (except perhaps from a very abstract perspective), > > precisely because of ... > > > >> I don't think that this is a good idea, because guest > >> kernel will not be happy about that. > > > > ... this. Instead iirc I suggested to refuse (short-circuit) handling > > VF register accesses for the next 100ms. > > > > Jan > > Do you have any suggestions on how to ensure that we accurately catch > the window where 100ms have already passed, but guests haven’t tried to > read anything yet, to flip this back? As I mentioned in the previous > version, Linux, for example, doesn’t attempt to re-read anything if the > first read failed after 100ms. So it appears to me that this approach > would be prone to racing with the guest for getting to the VF first. One > approach I can think of is to somehow swap the register handlers back > in-flight during the first read by the guest if 100ms have already > passed. However, this would still depend on Dom0 for registering VFs, > but in a more convoluted way. We also can’t add the VFs before 100ms > have passed and add timing checks to all register handlers, because > pci_add_device and everything below it expects the device to be > functional at the moment of addition. > > > > Maybe you see some other way to avoid these problems that I am missing? We could maybe do some middle ground here, kind of similar to what Linux does. The overall idea would be to put on hold any accesses to the device(s) PCI config space for 100ms, that would include the PF and any VFs. At the point when VF enable is set Xen already knows the position of the VFs in the PCI config space. Any PCI config space access attempts to the PF or VFs during that 100ms window would cause the guest vCPU to be put on hold, and the access would only be retried once the 100ms window has passed and Xen has registered the VFs with vPCI. This approach needs extra logic to put vPCI accesses on hold, similar to what Xen does when mapping a BAR into the p2m, and a timer to defer the adding of the Vfs and the unlocking of the affected PCI config space region. That would be a middle ground IMO, as the guest vCPUs could be running freely, unless accesses to the affected PCI config space was attempted before the 100ms window, at which point they would be blocked waiting for the timeout to expire. A well-behaved domain shouldn't try to access the PCI config space either ahead the 100ms window expiring. Roger. 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The object file name, however, varies between > linking passes. As a result, symbol name compression can yield different > results if any of those local symbols need retaining (Arm [and RISC-V] > mapping symbols are omitted, for example). If that difference in > compression would yield a difference in the sizes of symbol_names[] or > symbols_token_table[], the compare-symbol-tables sanity check will fail. > > Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") > Reported-by: Oleksii Kurochko > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné > --- > The observed problem was with a stub generated as Arm64 erratum 843419 > workaround. Such stubs' symbols (imo wrongly) are associated with the last > input object, rather than the input object they belong to. Also for other > kinds of stubs, afaict. See > https://sourceware.org/bugzilla/show_bug.cgi?id=34140. > > As per the above, having a Fixes: tag here is questionable. > > --- a/xen/arch/x86/Makefile > +++ b/xen/arch/x86/Makefile > @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no > ifeq ($(CONFIG_DEBUG_INFO),y) > $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" > endif > - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S > + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ > + > $(dot-target).0s.S > $(MAKE) $(build)=$(@D) .$(@F).0s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ > @@ -210,6 +211,7 @@ endif > > $(dot-target).1r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).1s.S > $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o > $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ > @@ -220,6 +222,7 @@ endif > > $(dot-target).2r.S > $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + --source-name=$(@F).S \ > > $(dot-target).2s.S Wouldn't it be more accurate to use $(dot-target) as the source name? Maybe $(notdir $(dot-target)).S? I see the default is already set to the target filename for other arches, so not a big deal IMO. Thanks, Roger. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Vv19JzTfa2MMOurpAFjE/2g5kTKiaqzMI65+hgtNK68pyBSWRaN9Q9V1MUs1a2sTGoYCbj5QOMQsrCuYco3c2BDvrg3BbSXjpwOomYBOagRWBg48mi2CRqiLYLwllSws3XFGASSJk3UPGo9fRmYJw2XcPMk+e2iVwLfWdWdv0l3kz68FroEzuOQ60HTC4rhxi21CUAPmtJ38t9qWMxPmHYmOVuqdlkqS3dNAqlhYJQxRLpFveBwKnnU1MxvzK79K1bwkB+H/KbixDfAwiULlyvMJ05WxTYggKNcUD3eT+60HROAiUCu7GJLNXVoYulPK5ERckYiZwuDiGHeh2d4TpE9YqD0jUYIQ1jCsisNEbXBubvOQStRK9cwQ31xIdgfxHyvq1Fj9e4WRTtwKFxyHYhwo7zRtbIe3YFGP0KML+wK5CfRVLqBsD4ih+eetqWmG X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 09:30:52.9245 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ee8026b-2286-45b1-7371-08deb009297a X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B9B.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: GV1PR08MB11167 X-purgate-ID: tlsNG-d25034/1778578262-F407FCF5-6EFEC896/0/0 X-purgate-type: clean X-purgate-size: 820 Hi Michal, > On 12 May 2026, at 10:14, Michal Orzel wrote: >=20 > On Arm we stay on the safe side and refuse to create a domain on user > requests (e.g. via xl.cfg, DT options) that cannot be satisfied due to > the feature not being compiled in. SCI fall through the crack and does no= t > adhere to that i.e. a user request for SCI type other than NONE when > CONFIG_SCMI_SMC (and thus CONFIG_ARM_SCI) is not set would be silently > ignored. Fix it by not allowing anything else other than NONE if the > feature is not enabled. >=20 > Fixes: 10e7473d6024 ("xen/arm: scmi-smc: passthrough SCMI SMC to domain, = single agent") > Signed-off-by: Michal Orzel Looks good to me: Reviewed-by: Bertrand Marquis Cheers Bertrand From xen-devel-bounces@lists.xenproject.org Tue May 12 10:28:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 10:28:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306684.1578510 (Exim 4.92) (envelope-from ) id 1wMkLW-00033m-7Y; Tue, 12 May 2026 10:28:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306684.1578510; Tue, 12 May 2026 10:28:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMkLW-00033e-4J; Tue, 12 May 2026 10:28:14 +0000 Received: by outflank-mailman (input) for mailman id 1306684; Tue, 12 May 2026 10:28:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMkLU-00033W-2m for xen-devel@lists.xenproject.org; Tue, 12 May 2026 10:28:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMkLT-000aIq-Fu for xen-devel@lists.xenproject.org; Tue, 12 May 2026 12:28:11 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0300ac-bab6-0a2a0a5309dd-0a2a45039c0c-38 for ; Tue, 12 May 2026 12:28:11 +0200 Received: from [40.107.159.98] (helo=OSPPR02CU001.outbound.protection.outlook.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0300b9-672d-0a2a45030019-286b9f6286d5-3 for ; Tue, 12 May 2026 12:28:09 +0200 Received: from VE1PR03MB6078.eurprd03.prod.outlook.com (2603:10a6:803:113::29) by VI1PR03MB10078.eurprd03.prod.outlook.com (2603:10a6:800:1ca::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9891.23; Tue, 12 May 2026 10:28:06 +0000 Received: from VE1PR03MB6078.eurprd03.prod.outlook.com ([fe80::4722:b91:9b24:ee48]) by VE1PR03MB6078.eurprd03.prod.outlook.com ([fe80::4722:b91:9b24:ee48%4]) with mapi id 15.20.9891.021; Tue, 12 May 2026 10:28:06 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:x-ms-exchange-senderadcheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=b5CjJJ5VmvcEiygxMATkEfLNMjYT0m5YmbzuqaXUTmvjO0hYa2UWs1S3uOFzJxFbZ93rQf1kRbctiTTFsx69TgfhV1aYt9dfLcFEnw47TbvPyv/r33C4zoQ0spFbJReKEEUlvbFhNazYp1CnUP6RFbXLPm0nHkdz11/sqJUkvFGhd0iHzArd2c9Ic/tjusyYZkd6KuyGOBO3rDCmvXo+lJ6NbYEXIr/Bp1XjhzaP7k10F5K/HituZpZNEZ+pn76+CWuSo0z0QtlSCTE1LdrxE1SeHPlDMk4eANcDTOW+dCIf63bTaC9RQhTnsIOnPUmiogDZGtOvuMgzYkMVqhfVpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=3iO3TnDT3jNgS1XIX49S5ps9lb9t8niIpRoBJCLC8eY=; b=Je7UM4FR9wwHmsAfoZgAICyxwsqtYpiRXMJmW7niHhj/qlSx58Nu3YTdp6ICvfzbVKeQLHjN0+C9ivzbO8welIVjtald9hr6OdtIS5H0NJIBjH11BaZafWH8qS/pgl0IGIPbWzwQAQWx0Daa0giws51ktKhJJUsI1FyuMXHwqqOucmeA3SCAzeRGT+h11m8g9nhnxhuRo9hif4gHUDHIAOZwvBOseHGTyYQAH+gra7wFeHj2OVuQtPr+VEJ4Eh9AiBFGrRWjYpCXX0qfW4vszCwhpUy39Pt1dqgoF8zFUNpbuJvzgZ0KKPHXcthD2xwHVj0zoHEy5nopaTHYHcVcPg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=3iO3TnDT3jNgS1XIX49S5ps9lb9t8niIpRoBJCLC8eY=; b=VFccf7+SCRC2bI/foY8GNugjFRob3YnJ4Qcq6iynory4dkWBU402rq+dZ6Rh+iIDDb4Ox2EVIxhIxy+v/n5I/wmPQDtt5ATbZqkqxhDNhl+11NSTvdhGBxg2w5ugWhaPeDXPgVrLLv2XNSXWig1S8gQn7l+63/o/BmObLWPo/4+7RfWFP4KGff1Zy3hKG6smjbzF1g/k7TQcC7k3LN/1p1hXcIrcrANGcucB5AKYDY7A2fY9PCX39knrUpld65cKfsEpxNNva2GokCKE4RQ73M5vOKMkiEUvo6GdhzBywt6GKcFyzWe/iwEpzq9Ee7CwoZedIghMghK9PY8tnOYFBw== From: Volodymyr Babchuk To: =?utf-8?B?Um9nZXIgUGF1IE1vbm7DqQ==?= CC: Mykyta Poturai , Jan Beulich , "Daniel P. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand , Mykyta Poturai References: <5efddecc-3665-4a53-9eaa-b117370cc0e4@suse.com> <5168207f-33ed-4fc4-918e-6c3b454b0efa@epam.com> <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> <1d591ff7-599d-4dfa-b521-bfaded430a76@suse.com> <925f2076-f98b-4102-ba45-a85a83861c9f@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778582690-D3563443-EE73FDAD/0/0 X-purgate-type: clean X-purgate-size: 3091 On 12.05.2026 10:58, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 07:32:20AM +0000, Mykyta Poturai wrote: >> On 5/12/26 09:20, Jan Beulich wrote: >>> On 11.05.2026 16:10, Volodymyr Babchuk wrote: >>>> Okay, so let's clear this. If I remember correct, you discussed this >>>> with Mykyta in the previous version and suggested to put the vCPU to >>>> sleep for 100ms. >>> >>> I don't think I did (except perhaps from a very abstract perspective), >>> precisely because of ... >>> >>>> I don't think that this is a good idea, because guest >>>> kernel will not be happy about that. >>> >>> ... this. Instead iirc I suggested to refuse (short-circuit) handling >>> VF register accesses for the next 100ms. >> >> Do you have any suggestions on how to ensure that we accurately catch >> the window where 100ms have already passed, but guests haven’t tried to >> read anything yet, to flip this back? As I mentioned in the previous >> version, Linux, for example, doesn’t attempt to re-read anything if the >> first read failed after 100ms. So it appears to me that this approach >> would be prone to racing with the guest for getting to the VF first. When we do the write to the control register in Xen, our timer will start ticking before the guest's. Hence our 100ms will be over (slightly) earlier, and a well-behaved guest (having waited for the full 100ms according to its own tracking) will be handled fine. >> One >> approach I can think of is to somehow swap the register handlers back >> in-flight during the first read by the guest if 100ms have already >> passed. However, this would still depend on Dom0 for registering VFs, >> but in a more convoluted way. We also can’t add the VFs before 100ms >> have passed and add timing checks to all register handlers, because >> pci_add_device and everything below it expects the device to be >> functional at the moment of addition. I fear I'm not following this. > We could maybe do some middle ground here, kind of similar to what > Linux does. The overall idea would be to put on hold any accesses to > the device(s) PCI config space for 100ms, that would include the PF > and any VFs. For the PF, at most parts of the SR-IOV capability should be thus constrained, I think. > At the point when VF enable is set Xen already knows the > position of the VFs in the PCI config space. > > Any PCI config space access attempts to the PF or VFs during that > 100ms window would cause the guest vCPU to be put on hold, and the > access would only be retried once the 100ms window has passed and Xen > has registered the VFs with vPCI. This approach needs extra logic to > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > into the p2m, and a timer to defer the adding of the Vfs and the > unlocking of the affected PCI config space region. I was meaning to have this done in even simpler a way: Simply record when the VFs were configured, and within the next 100ms terminate all accesses (read all ones, discard writes). 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Tue, 12 May 2026 03:51:34 -0700 (PDT) Message-ID: <5b77896d-4f56-439c-9b7f-c3d83d671066@suse.com> Date: Tue, 12 May 2026 12:51:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] symbols: explicitly specify source file name for symtab To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , Oleksii Kurochko References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778583095-D3D67443-AD105564/10/73395122804 X-purgate-type: spam X-purgate-size: 2711 On 12.05.2026 11:20, Roger Pau Monné wrote: > On Mon, May 11, 2026 at 12:00:03PM +0200, Jan Beulich wrote: >> If there are any local symbols in an object file, GNU ld will create an >> STT_FILE symbol derived from the object file name if there is none in the >> incoming symbol table. The object file name, however, varies between >> linking passes. As a result, symbol name compression can yield different >> results if any of those local symbols need retaining (Arm [and RISC-V] >> mapping symbols are omitted, for example). If that difference in >> compression would yield a difference in the sizes of symbol_names[] or >> symbols_token_table[], the compare-symbol-tables sanity check will fail. >> >> Fixes: d37d63d4b548 ("symbols: prefix static symbols with their source file names") >> Reported-by: Oleksii Kurochko >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> --- a/xen/arch/x86/Makefile >> +++ b/xen/arch/x86/Makefile >> @@ -200,7 +200,8 @@ $(TARGET).efi: $(objtree)/prelink.o $(no >> ifeq ($(CONFIG_DEBUG_INFO),y) >> $(if $(filter --strip-debug,$(EFI_LDFLAGS)),echo,:) "Will strip debug info from $(@F)" >> endif >> - $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0s.S >> + $(objtree)/tools/symbols $(all_symbols) --source-name=$(@F).S --empty \ >> + > $(dot-target).0s.S >> $(MAKE) $(build)=$(@D) .$(@F).0s.o >> $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ >> $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ >> @@ -210,6 +211,7 @@ endif >> > $(dot-target).1r.S >> $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).0 \ >> | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> + --source-name=$(@F).S \ >> > $(dot-target).1s.S >> $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o >> $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ >> @@ -220,6 +222,7 @@ endif >> > $(dot-target).2r.S >> $(NM) -pa --format=sysv $(dot-target).$(VIRT_BASE).1 \ >> | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> + --source-name=$(@F).S \ >> > $(dot-target).2s.S > > Wouldn't it be more accurate to use $(dot-target) as the source name? > > Maybe $(notdir $(dot-target)).S? Why would that be better (more accurate)? The file names change, so the specified file is "virtual" anyway. I simply don't see why prepending a . would be helpful. > I see the default is already set to the target filename for other > arches, so not a big deal IMO. It's a "virtual" filename also there. No real xen-syms.S is ever created. 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If I remember correct, you discussed this > >>>> with Mykyta in the previous version and suggested to put the vCPU to > >>>> sleep for 100ms. > >>> > >>> I don't think I did (except perhaps from a very abstract perspective), > >>> precisely because of ... > >>> > >>>> I don't think that this is a good idea, because guest > >>>> kernel will not be happy about that. > >>> > >>> ... this. Instead iirc I suggested to refuse (short-circuit) handling > >>> VF register accesses for the next 100ms. > >> > >> Do you have any suggestions on how to ensure that we accurately catch > >> the window where 100ms have already passed, but guests haven’t tried to > >> read anything yet, to flip this back? As I mentioned in the previous > >> version, Linux, for example, doesn’t attempt to re-read anything if the > >> first read failed after 100ms. So it appears to me that this approach > >> would be prone to racing with the guest for getting to the VF first. > > When we do the write to the control register in Xen, our timer will start > ticking before the guest's. Hence our 100ms will be over (slightly) > earlier, and a well-behaved guest (having waited for the full 100ms > according to its own tracking) will be handled fine. > > >> One > >> approach I can think of is to somehow swap the register handlers back > >> in-flight during the first read by the guest if 100ms have already > >> passed. However, this would still depend on Dom0 for registering VFs, > >> but in a more convoluted way. We also can’t add the VFs before 100ms > >> have passed and add timing checks to all register handlers, because > >> pci_add_device and everything below it expects the device to be > >> functional at the moment of addition. > > I fear I'm not following this. > > > We could maybe do some middle ground here, kind of similar to what > > Linux does. The overall idea would be to put on hold any accesses to > > the device(s) PCI config space for 100ms, that would include the PF > > and any VFs. > > For the PF, at most parts of the SR-IOV capability should be thus > constrained, I think. Linux blocks access to the whole device PCI config space, but that might be simply because it's easier to implement that way on their side. Certainly the spec doesn't mention any restriction in accessing the PF config space during that window. As a simpler approach we might want to reject write accesses to the SR-IOV capability during that window. > > At the point when VF enable is set Xen already knows the > > position of the VFs in the PCI config space. > > > > Any PCI config space access attempts to the PF or VFs during that > > 100ms window would cause the guest vCPU to be put on hold, and the > > access would only be retried once the 100ms window has passed and Xen > > has registered the VFs with vPCI. This approach needs extra logic to > > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > > into the p2m, and a timer to defer the adding of the Vfs and the > > unlocking of the affected PCI config space region. > > I was meaning to have this done in even simpler a way: Simply record > when the VFs were configured, and within the next 100ms terminate all > accesses (read all ones, discard writes). Hm, I thought about such approach also, I was mostly worried that some drivers might know the device has a shorter initialization time, and hence attempt to access before the 100ms window. However simply discarding accesses might be easier to implement initially, and hence I would be fien with such approach. We would need to log any such discarded accesses during the init window. Thanks, Roger. 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Smith" , "xen-devel@lists.xenproject.org" , Stewart Hildebrand Subject: Re: [PATCH v3 5/7] vpci: add SR-IOV support for PVH Dom0 Message-ID: References: <878q9vt0lg.fsf@epam.com> <877bparq9t.fsf@epam.com> <1d591ff7-599d-4dfa-b521-bfaded430a76@suse.com> <925f2076-f98b-4102-ba45-a85a83861c9f@epam.com> <87v7csrkgb.fsf@epam.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87v7csrkgb.fsf@epam.com> X-ClientProxiedBy: BN9PR03CA0543.namprd03.prod.outlook.com (2603:10b6:408:138::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|SA1PR03MB7053:EE_ X-MS-Office365-Filtering-Correlation-Id: 16d537a5-c150-4db3-f180-08deb02983ec X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|56012099003|22082099003|18002099003|11063799003; X-Microsoft-Antispam-Message-Info: 0k1iM+7QYtjvOX+K5FMN852Iu4ueFjgVLT87xj1PuWJiYoQoPW2QO/jII2q13+gTYks9ge1oouHZwXSxhEZtjRFutB9e1iK3F5QBT2qOK461Q1ra02hRhjUk8hvSYF3Pmv3cikFZOslkUcC1ZIAwfcQ8SNiycCfZLK/YISgEzNBjgnJwvmMZRi4sFwGX5l3Kn1/dBhSLyYPbCh2zE8SSsHfWsbIJf4owyDwj0XuIOZClWeCD0bUvhookdsLvmOJLv9zDYaZwuQTU8z5sq/ofve2O+6IwTJtVO2gfvLxHOGJNwvBwNAGv6VVgO/3FaJeCxcbjqebku9mU8IA8NpqKSCJYTBLNFdsY3IygRly4UPy8P7uQVKnH1MrjXTxkXKCyiwbsNTQPE6ezThIMkaJPetPo8eWPuefbtfSUJzFi8du5f8prxSREM9CfLySr9khoC36gpyLIVDDFtZ/QvsblLr1XFdxnp+dpf9uXiq2PSswphkYnEOmifhHtKAZLUZOTLYL/b8lDDqZ0v2IRlQ13xjYxK4v/mtDAU714roT7Q77jRlc+0NtDeItZemqG2LY7NR0Tnr3UcgKlCnHVljLciwfciwn/ow6AmHqp5pxgTV4+xgFGFq7udDzPqAN1JLMoJ8CaJp5Rs3UNKenx3kEvWHWlPeRK9NlNpNZU0umvXTehy25JRgGlI0vw1VynPvig X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:CH7PR03MB7860.namprd03.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(56012099003)(22082099003)(18002099003)(11063799003);DIR:OUT;SFP:1101; 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Recalculate BAR sizes before mapping VFs to account > >> >>>>>>>>>> for possible changes in the system page size register. Also force VFs to > >> >>>>>>>>>> always use emulated reads for command register, this is needed to > >> >>>>>>>>>> prevent some drivers accidentally unmapping BARs. > >> >>>>>>>>> > >> >>>>>>>>> This apparently refers to the change to vpci_init_header(). Writes are > >> >>>>>>>>> already intercepted. How would a read lead to accidental BAR unmap? Even > >> >>>>>>>>> for writes I don't see how a VF driver could accidentally unmap BARs, as > >> >>>>>>>>> the memory decode bit there is hardwired to 0. > >> >>>>>>>>> > >> >>>>>>>>>> Discovery of VFs is > >> >>>>>>>>>> done by Dom0, which must register them with Xen. > >> >>>>>>>>> > >> >>>>>>>>> If we intercept control register writes, why would we still require > >> >>>>>>>>> Dom0 to report the VFs that appear? > >> >>>>>>>>> > >> >>>>>>>> > >> >>>>>>>> Sorry, I don't understand this question. You specifically requested this > >> >>>>>>>> to be done this way in V2. Quoting your reply from V2 below. > >> >>>>>>>> > >> >>>>>>>> > Aren't you effectively busy-waiting for these 100ms, by simply > >> >>>>>>>> returning "true" > >> >>>>>>>> > from vpci_process_pending() until the time has passed? This imo is a > >> >>>>>>>> no-go. You > >> >>>>>>>> > want to set a timer and put the vCPU to sleep, to wake it up again > >> >>>>>>>> when the > >> >>>>>>>> > timer has expired. That'll then eliminate the need for the > >> >>>>>>>> not-so-nice patch 4. > >> >>>>>>>> > >> >>>>>>>> > Question is whether we need to actually go this far (right away). I > >> >>>>>>>> expect you > >> >>>>>>>> > don't mean to hand PFs to DomU-s. As long as we keep them in the hardware > >> >>>>>>>> > domain, can't we trust it to set things up correctly, just like we > >> >>>>>>>> trust it in > >> >>>>>>>> > a number of other aspects? > >> >>>>>>> > >> >>>>>>> How's any of this related to the question I raised here, or your reply > >> >>>>>>> thereto? If we intercept PCI_SRIOV_CTRL, we know when VFs are created. > >> >>>>>>> Why still demand Dom0 to report them then? > >> >>>>>>> > >> >>>>>> > >> >>>>>> The spec states that VFs can take up to 100ms after the VF_ENABLE bit is > >> >>>>>> set to become alive. We discussed in the V2 that it is not acceptable to > >> >>>>>> do a required 100ms wait in Xen while blocking a domain. And not doing > >> >>>>>> that blocking would require some mechanism to only allow a domain to run > >> >>>>>> for precisely 99(or more?)ms. You yourself suggested that we can trust > >> >>>>>> the hardware domain with registering VFs if we already trust it with > >> >>>>>> other PCI-related stuff. Did you change your mind, or am I completely > >> >>>>>> misunderstanding this question? > >> >>>>> > >> >>>>> No, I still think that we can trust hwdom enough. Nevertheless we should > >> >>>>> aim at being independent of it where possible. And I seem to recall that > >> >>>>> I had also outlined an approach how to avoid spin-waiting for 100ms in > >> >>>>> the hypervisor. > >> >>>> > >> >>>> I want to clarify: you are telling that Xen should not wait for hwdom to > >> >>>> report VFs and instead create them by itself. Is this correct? > >> >>> > >> >>> If that's technically possible, yes. > >> >> > >> >> Okay, so let's clear this. If I remember correct, you discussed this > >> >> with Mykyta in the previous version and suggested to put the vCPU to > >> >> sleep for 100ms. > >> > > >> > I don't think I did (except perhaps from a very abstract perspective), > >> > precisely because of ... > >> > > >> >> I don't think that this is a good idea, because guest > >> >> kernel will not be happy about that. > >> > > >> > ... this. Instead iirc I suggested to refuse (short-circuit) handling > >> > VF register accesses for the next 100ms. > >> > > >> > Jan > >> > >> Do you have any suggestions on how to ensure that we accurately catch > >> the window where 100ms have already passed, but guests haven’t tried to > >> read anything yet, to flip this back? As I mentioned in the previous > >> version, Linux, for example, doesn’t attempt to re-read anything if the > >> first read failed after 100ms. So it appears to me that this approach > >> would be prone to racing with the guest for getting to the VF first. One > >> approach I can think of is to somehow swap the register handlers back > >> in-flight during the first read by the guest if 100ms have already > >> passed. However, this would still depend on Dom0 for registering VFs, > >> but in a more convoluted way. We also can’t add the VFs before 100ms > >> have passed and add timing checks to all register handlers, because > >> pci_add_device and everything below it expects the device to be > >> functional at the moment of addition. > >> > >> > >> > >> Maybe you see some other way to avoid these problems that I am missing? > > > > We could maybe do some middle ground here, kind of similar to what > > Linux does. The overall idea would be to put on hold any accesses to > > the device(s) PCI config space for 100ms, that would include the PF > > and any VFs. At the point when VF enable is set Xen already knows the > > position of the VFs in the PCI config space. > > > > Any PCI config space access attempts to the PF or VFs during that > > 100ms window would cause the guest vCPU to be put on hold, and the > > access would only be retried once the 100ms window has passed and Xen > > has registered the VFs with vPCI. This approach needs extra logic to > > put vPCI accesses on hold, similar to what Xen does when mapping a BAR > > into the p2m, and a timer to defer the adding of the Vfs and the > > unlocking of the affected PCI config space region. > > > > That would be a middle ground IMO, as the guest vCPUs could be running > > freely, unless accesses to the affected PCI config space was attempted > > before the 100ms window, at which point they would be blocked waiting > > for the timeout to expire. A well-behaved domain shouldn't try to > > access the PCI config space either ahead the 100ms window expiring. > > This approach seems reasonable for me, but this would require big > changes in vPCI logic, as now pci_add_device() needs ability to defer > all config space accesses till VFs are ready and in meantime we'll have > to deal with half-initialized pdev. PCI/vPCI logic is already convoluted > enough and adding more intermediate states, which need to be dealt with > in different places will make things even worse. Unless I miss some easy > fix, of course... You could just defer the pci_add_device() to after the 100ms window from having enabled VFs? The only requirement would be blocking PCI config space accesses to VFs during those 100ms. You could use a bitmap to signal which SBDF should be rejected in vpci_{read,write}. There's already logic in those functions to reject accesses. > What I am trying to say is that your suggestion is technically doable, > but requires lots of work, and we don't need resources for this right > now. So, what's your opinion on existing approach? Is relying on a > domain to introduce VFs such a bad idea? IMO yes, requiring the usage of an hypercall (or any other side-band interface) when not strictly required is just adding a handicap for OSes that then need to be ported to run on Xen. It might seem easier at first, but adding and maintaining such side-band interfaces in OSes tend to be cumbersome and prone to errors. We could have avoided introducing vPCI at the cost of adding a completely new side-band interface to manage PCI config space accesses and interrupts on x86 PVH, yet we didn't do it because albeit easier to implement from the Xen side, it would have a huge cost on OSes that would want to run in PVH mode. Thanks, Roger. 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I believe this makes > dom0 PVH more usable out of the box (see commit message). I am okay to have this patch in release. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 13:36:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 13:36:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306788.1578572 (Exim 4.92) (envelope-from ) id 1wMnHU-0004KY-BK; Tue, 12 May 2026 13:36:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306788.1578572; Tue, 12 May 2026 13:36:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMnHU-0004KR-7Z; Tue, 12 May 2026 13:36:16 +0000 Received: by outflank-mailman (input) for mailman id 1306788; Tue, 12 May 2026 13:36:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMnHT-0004KL-JR for xen-devel@lists.xenproject.org; Tue, 12 May 2026 13:36:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMnHS-003yMz-SJ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:14 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a032cce-2eae-0a2a0a5409dd-0a2a4505896e-0 for ; Tue, 12 May 2026 15:36:14 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a032cce-aaa8-0a2a45050019-d1558033c07d-3 for ; Tue, 12 May 2026 15:36:14 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso51066445e9.2 for ; Tue, 12 May 2026 06:36:14 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Enable the option by default to make PVH dom0 more > robust in its default configuration. > > Signed-off-by: Roger Pau Monné > --- > Changes since v1: > - Slightly reword an expand option help text. > - Mention the change of defaults in CHANGELOG. > --- > CHANGELOG.md | 2 ++ > docs/misc/xen-command-line.pandoc | 8 ++++++-- > xen/arch/x86/hvm/emulate.c | 2 +- > 3 files changed, 9 insertions(+), 3 deletions(-) > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index ce46020dbdb4..25f5a192ed48 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -7,6 +7,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD > > ### Changed > + - On x86: > + - Enable pf-fixup option by default for PVH dom0. LGTM: Acked-by: Oleksii Kurochko And also, Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 14:46:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:46:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306832.1578584 (Exim 4.92) (envelope-from ) id 1wMoNG-0005LK-DG; Tue, 12 May 2026 14:46:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306832.1578584; Tue, 12 May 2026 14:46:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoNG-0005LD-AJ; Tue, 12 May 2026 14:46:18 +0000 Received: by outflank-mailman (input) for mailman id 1306832; Tue, 12 May 2026 14:46:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoNE-0005L7-OV for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:46:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoNE-00AHY7-55 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:46:16 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033d2d-5cb7-0a2a0a5109dd-0a2a4503d1c6-30 for ; Tue, 12 May 2026 16:46:16 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033d37-672d-0a2a45030019-d155802ad525-3 for ; Tue, 12 May 2026 16:46:15 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488ba840146so50706295e9.1 for ; Tue, 12 May 2026 07:46:15 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:46:15 -0700 (PDT) Message-ID: <6e3dbb4f-5849-4525-8f8b-a2818c39da2d@suse.com> Date: Tue, 12 May 2026 16:46:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH for-4.22(?) v2] gnttab: simplify (really: drop) gnttab_set_frame_gfn() To: "xen-devel@lists.xenproject.org" Cc: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Michal Orzel , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Rafal Wojtczuk , Oleksii Kurochko Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778597175-42965938-03EF2E91/0/0 X-purgate-type: clean X-purgate-size: 3269 It's not really doing anything for valid GFNs, which renders its one use site pretty pointless. The other isn't so much about setting anything, but rather about clearing. The main point here, however, is about Rafal spotting the double fetching of the GFN (first in gnttab_unpopulate_status_frames(), then again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass in the already fetched GFN, while dropping the no longer used parameters. As the result is a mere wrapper around guest_physmap_remove_page(), drop the hook altogether. Suggested-by: Rafal Wojtczuk Signed-off-by: Jan Beulich --- v2: Drop hook altogether. --- a/xen/arch/arm/include/asm/grant_table.h +++ b/xen/arch/arm/include/asm/grant_table.h @@ -50,13 +50,6 @@ int replace_grant_host_mapping(uint64_t #define gnttab_dom0_frames() \ min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0) - #define gnttab_get_frame_gfn(gt, st, idx) ({ \ (st) ? gnttab_status_gfn(NULL, gt, idx) \ : gnttab_shared_gfn(NULL, gt, idx); \ --- a/xen/arch/x86/include/asm/grant_table.h +++ b/xen/arch/x86/include/asm/grant_table.h @@ -32,12 +32,6 @@ static inline int replace_grant_host_map return replace_grant_pv_mapping(addr, frame, new_addr, flags); } -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ - (gfn_eq(gfn, INVALID_GFN) \ - ? guest_physmap_remove_page((gt)->domain, \ - gnttab_get_frame_gfn(gt, st, idx), \ - mfn, 0) \ - : 0 /* Handled in add_to_physmap_one(). */) #define gnttab_get_frame_gfn(gt, st, idx) ({ \ mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ : gnttab_shared_mfn(gt, idx); \ --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d { int rc = gfn_eq(gfn, INVALID_GFN) ? 0 - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, - page_to_mfn(pg)); + : guest_physmap_remove_page(d, gfn, page_to_mfn(pg), 0); if ( rc ) { @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( */ if ( !get_page(pg, d) ) rc = -EBUSY; - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) - put_page(pg); } if ( rc ) From xen-devel-bounces@lists.xenproject.org Tue May 12 14:49:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:49:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306865.1578595 (Exim 4.92) (envelope-from ) id 1wMoQW-00062Z-RU; Tue, 12 May 2026 14:49:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306865.1578595; Tue, 12 May 2026 14:49:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoQW-00062S-Nf; Tue, 12 May 2026 14:49:40 +0000 Received: by outflank-mailman (input) for mailman id 1306865; Tue, 12 May 2026 14:49:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoQV-00062K-CH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:49:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoQU-004Dpu-PN for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:49:38 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033dfb-e002-0a2a0a5209dd-0a2a450ac3d2-12 for ; Tue, 12 May 2026 16:49:38 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033e02-56b3-0a2a450a0019-d155dd31d89a-3 for ; Tue, 12 May 2026 16:49:38 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44e1ebb3122so2950226f8f.2 for ; Tue, 12 May 2026 07:49:38 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:49:38 -0700 (PDT) Message-ID: <7b5dd0c9-ff34-4d03-be4c-7d50e517b0e9@suse.com> Date: Tue, 12 May 2026 16:49:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH RFC v2] x86/time: set AP's TSC scale estimate earlier To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778597378-7397E8B7-C2DD9C81/0/0 X-purgate-type: clean X-purgate-size: 2010 NOW() (in particular) can be used ahead of init_percpu_time(). As the initial scale value set is merely the BSP's, we can as well set it very early when the AP is coming up. Setting the scale alone, however, doesn't work, so the entire struct cpu_time is copied. Signed-off-by: Jan Beulich --- RFC: Copying the entire struct won't work very well when tsc_adjust[] is in use (and values there differ between sockets). This in particular mostly eliminates an anomaly with log messages issued early while APs are coming up, when "boot" console timestamps are in use. --- v2: Call the function from very early in start_secondary() --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preinit_percpu_time(unsigned int cpu); void init_percpu_time(void); void time_latch_stamps(void); --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -356,6 +356,8 @@ void asmlinkage start_secondary(void) /* Safe to enable feature such as CR4.MCE with the IDT set up now. */ write_cr4(mmu_cr4_features); + preinit_percpu_time(cpu); + percpu_traps_init(); cpu_init(); --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2346,6 +2346,12 @@ void time_latch_stamps(void) ap_bringup_ref.local_stime = get_s_time_fixed(ap_bringup_ref.local_tsc); } +void preinit_percpu_time(unsigned int cpu) +{ + /* Initial estimate for TSC rate etc. */ + per_cpu(cpu_time, cpu) = per_cpu(cpu_time, 0); +} + void init_percpu_time(void) { struct cpu_time *t = &this_cpu(cpu_time); @@ -2353,9 +2359,6 @@ void init_percpu_time(void) u64 tsc; s_time_t now; - /* Initial estimate for TSC rate. */ - t->tsc_scale = per_cpu(cpu_time, 0).tsc_scale; - if ( tsc_adjust ) { unsigned int socket = cpu_to_socket(smp_processor_id()); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:57:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:57:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306878.1578603 (Exim 4.92) (envelope-from ) id 1wMoXz-0007do-HC; Tue, 12 May 2026 14:57:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306878.1578603; Tue, 12 May 2026 14:57:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoXz-0007dh-DS; Tue, 12 May 2026 14:57:23 +0000 Received: by outflank-mailman (input) for mailman id 1306878; Tue, 12 May 2026 14:57:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoXx-0007da-Mv for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:57:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoXv-008lpm-EY for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:57:21 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a033fc7-e002-0a2a0a5209dd-0a2a45018c90-12 for ; Tue, 12 May 2026 16:57:20 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a033fd0-c1f2-0a2a45010019-d155dd29ed54-3 for ; Tue, 12 May 2026 16:57:20 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44b330c5cc6so4097357f8f.1 for ; Tue, 12 May 2026 07:57:20 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:57:20 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 16:57:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko From: Jan Beulich Subject: [PATCH 0/5] x86/time: CMOS RTC century byte Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778597840-B534AFF4-ADE2EF33/0/0 X-purgate-type: clean X-purgate-size: 499 I'm surprised that we didn't consume this thus far, and that we got away with also not emulating it for HVM guests. The 1st and 3rd patches are imo candidates for 4.22, whereas the others (more or less associated cleanup) likely aren't. 1: x86/time: use RTC century byte when available 2: x86/time: move BCD_TO_BIN() uses 3: x86/vRTC: support century field 4: x86/vRTC: use available macros for BCD <-> BIN conversion 5: tools/xen-hvmctx: shorten various format strings a little Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 14:58:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:58:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306883.1578611 (Exim 4.92) (envelope-from ) id 1wMoZK-0008Gs-Pn; Tue, 12 May 2026 14:58:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306883.1578611; Tue, 12 May 2026 14:58:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZK-0008Gl-Mu; Tue, 12 May 2026 14:58:46 +0000 Received: by outflank-mailman (input) for mailman id 1306883; Tue, 12 May 2026 14:58:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZJ-0008Gd-FN for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:58:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoZI-001UUo-SJ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:58:44 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034015-2eae-0a2a0a5409dd-0a2a4505cdba-38 for ; Tue, 12 May 2026 16:58:44 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034024-aaa8-0a2a45050019-d155dd2bd5dc-3 for ; Tue, 12 May 2026 16:58:44 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-43d7645adbdso3076242f8f.1 for ; Tue, 12 May 2026 07:58:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:58:44 -0700 (PDT) Message-ID: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> Date: Tue, 12 May 2026 16:58:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 1/5] x86/time: use RTC century byte when available From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; 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Signed-off-by: Jan Beulich --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1257,6 +1257,7 @@ struct rtc_time { static bool __get_cmos_time(struct rtc_time *rtc) { s_time_t start, t1, t2; + unsigned int century = 0; unsigned long flags; spin_lock_irqsave(&rtc_lock, flags); @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); rtc->mon = CMOS_READ(RTC_MONTH); rtc->year = CMOS_READ(RTC_YEAR); + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) + century = CMOS_READ(acpi_gbl_FADT.century); if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) { @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t spin_unlock_irqrestore(&rtc_lock, flags); - if ( (rtc->year += 1900) < 1970 ) + if ( century ) + { + BCD_TO_BIN(century); + rtc->year += century * 100; + } + else if ( (rtc->year += 1900) < 1970 ) rtc->year += 100; return t1 <= SECONDS(1) && t2 < MILLISECS(3); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:59:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:59:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306887.1578621 (Exim 4.92) (envelope-from ) id 1wMoZe-0000Eo-50; Tue, 12 May 2026 14:59:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306887.1578621; Tue, 12 May 2026 14:59:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZe-0000Eh-1s; Tue, 12 May 2026 14:59:06 +0000 Received: by outflank-mailman (input) for mailman id 1306887; Tue, 12 May 2026 14:59:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoZd-0000EM-7h for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:59:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoZc-00B5ja-Kr for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:59:04 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034037-5cb7-0a2a0a5109dd-0a2a4506e0c2-4 for ; Tue, 12 May 2026 16:59:04 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034038-7371-0a2a45060019-d1558029f084-3 for ; Tue, 12 May 2026 16:59:04 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488d2079582so59943355e9.2 for ; Tue, 12 May 2026 07:59:04 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:59:04 -0700 (PDT) Message-ID: <2c5af8f9-05f6-43c4-afb4-a50cbacd2d49@suse.com> Date: Tue, 12 May 2026 16:59:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/5] x86/time: move BCD_TO_BIN() uses From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778597944-8797CD75-EA009AFA/0/0 X-purgate-type: clean X-purgate-size: 1496 ... outside of __get_cmos_time()'s locked region. There's no need to hold the lock for these computations. Signed-off-by: Jan Beulich --- How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an inverted comment? Looks like we've inherited this from Linux, and even in Linus'es current tree it's still this same way. Yet all half-way recent chipsets I'm aware of properly implement the DM bit in reg B. Might this be another 32-bit leftover? --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1257,6 +1257,7 @@ struct rtc_time { static bool __get_cmos_time(struct rtc_time *rtc) { s_time_t start, t1, t2; + bool bcd; unsigned int century = 0; unsigned long flags; @@ -1283,8 +1284,12 @@ static bool __get_cmos_time(struct rtc_t rtc->year = CMOS_READ(RTC_YEAR); if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) century = CMOS_READ(acpi_gbl_FADT.century); - - if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) + + bcd = RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY); + + spin_unlock_irqrestore(&rtc_lock, flags); + + if ( bcd ) { BCD_TO_BIN(rtc->sec); BCD_TO_BIN(rtc->min); @@ -1294,8 +1299,6 @@ static bool __get_cmos_time(struct rtc_t BCD_TO_BIN(rtc->year); } - spin_unlock_irqrestore(&rtc_lock, flags); - if ( century ) { BCD_TO_BIN(century); From xen-devel-bounces@lists.xenproject.org Tue May 12 14:59:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 14:59:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306897.1578629 (Exim 4.92) (envelope-from ) id 1wMoaB-0000pI-Bi; Tue, 12 May 2026 14:59:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306897.1578629; Tue, 12 May 2026 14:59:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoaB-0000pB-97; Tue, 12 May 2026 14:59:39 +0000 Received: by outflank-mailman (input) for mailman id 1306897; Tue, 12 May 2026 14:59:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMoaA-0000nk-7x for xen-devel@lists.xenproject.org; Tue, 12 May 2026 14:59:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMoa9-00B61l-Kx for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:59:37 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03403e-e002-0a2a0a5209dd-0a2a4503a98e-30 for ; Tue, 12 May 2026 16:59:37 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034059-672d-0a2a45030019-d1558029b5cf-3 for ; Tue, 12 May 2026 16:59:37 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488b150559bso44170885e9.1 for ; Tue, 12 May 2026 07:59:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 07:59:36 -0700 (PDT) Message-ID: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> Date: Tue, 12 May 2026 16:59:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 3/5] x86/vRTC: support century field From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778597977-4086B938-1FA6D66E/0/0 X-purgate-type: clean X-purgate-size: 8908 Both ROMBIOS and SeaBIOS (with CONFIG_QEMU=y, as we build it) blindly assume availability of this field (at its conventional index 0x32); OVMF at least has code to inspect FADT. Hence we ought to have supported it virtually forever. As the index is beyond RTC_CMOS_SIZE, leverage the padding field in struct hvm_hw_rtc to hold its value. Update the field only when involved values are valid BCD century specifiers. Otherwise (for VMs migrated in from an older hypervisor) leave handling to the DM. This makes the Linux rtc-cmos driver report y3k compatibility. While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") Signed-off-by: Jan Beulich --- Am I overly paranoid with the checking of the field, considering that Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests have ever run with should have been aware of the field? Or am I, quite the opposite, still not strict enough? I can't help the impression that this introduces a latency issue for the 2nd of gmtime()'s while() loops: We now allow years up into the 99th century, i.e. over 8000 years away from 1970. 8000 years are very roughly 2^^38 seconds, making for (again very roughly) 5 million iterations there. Did I get my math wrong, or do we need a prereq change to (vastly) reduce the number of iterations of that loop (e.g. along the lines of the other one, first going in 400 year steps)? Isn't day-of-week handling flawed? If the field is brought out of sync with the other values, shouldn't it stay respectively out-of-sync? And isn't it excessive overhead to go through rtc_set_time() when the field is updated while SET is clear? Perhaps we ought to also support alarm day/month features? --- a/tools/libacpi/static_tables.c +++ b/tools/libacpi/static_tables.c @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ + struct acpi_fadt Fadt = { .header = { .signature = ACPI_FADT_SIGNATURE, @@ -88,7 +90,9 @@ struct acpi_fadt Fadt = { .register_bit_width = ACPI_PM_TMR_BLK_BIT_WIDTH, .register_bit_offset = ACPI_PM_TMR_BLK_BIT_OFFSET, .address = ACPI_PM_TMR_BLK_ADDRESS_V1, - } + }, + + .century = CMOS_CENTURY, }; struct acpi_20_rsdt Rsdt = { --- a/tools/misc/xen-hvmctx.c +++ b/tools/misc/xen-hvmctx.c @@ -311,7 +311,7 @@ static void dump_rtc(void) printf(" 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x, index 0x%2.2x\n", r.cmos_data[8], r.cmos_data[9], r.cmos_data[10], r.cmos_data[11], r.cmos_data[12], r.cmos_data[13], r.cmos_index); - + printf(" century 0x%02x offset %"PRId64"\n", r.century, r.rtc_offset); } static void dump_hpet(void) --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -47,6 +47,12 @@ #define epoch_year 1900 #define get_year(x) ((x) + epoch_year) +static inline bool is_century(unsigned int x) +{ + /* Constant below should match epoch_year above, just as BCD value. */ + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; +} + enum rtc_mode { rtc_mode_no_ack, rtc_mode_strict @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque data &= 0x7f; s->hw.cmos_index = data; spin_unlock(&s->lock); + /* RTC_CENTURY always forwarded to DM. */ return (data < RTC_CMOS_SIZE); } - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) + switch ( s->hw.cmos_index ) { + case 0 ... RTC_CMOS_SIZE - 1: + orig = s->hw.cmos_data[s->hw.cmos_index]; + break; + + case RTC_CENTURY: + orig = s->hw.century; + if ( !is_century(orig) || !is_century(data) ) + { + /* Prevent further use of the field. */ + s->hw.century = 0; + spin_unlock(&s->lock); + return 0; + } + break; + + default: spin_unlock(&s->lock); return 0; } - orig = s->hw.cmos_data[s->hw.cmos_index]; switch ( s->hw.cmos_index ) { case RTC_SECONDS_ALARM: @@ -507,6 +529,7 @@ static int rtc_ioport_write(void *opaque case RTC_DAY_OF_MONTH: case RTC_MONTH: case RTC_YEAR: + case RTC_CENTURY: /* if in set mode, just write the register */ if ( (s->hw.cmos_data[RTC_REG_B] & RTC_SET) ) s->hw.cmos_data[s->hw.cmos_index] = data; @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque /* Fetch the current time and update just this field. */ s->current_tm = gmtime(get_localtime(d)); rtc_copy_date(s); - s->hw.cmos_data[s->hw.cmos_index] = data; + if ( s->hw.cmos_index != RTC_CENTURY ) + s->hw.cmos_data[s->hw.cmos_index] = data; + else + s->hw.century = data; rtc_set_time(s); } alarm_timer_update(s); @@ -591,7 +617,16 @@ static void rtc_set_time(RTCState *s) tm->tm_wday = from_bcd(s, s->hw.cmos_data[RTC_DAY_OF_WEEK]); tm->tm_mday = from_bcd(s, s->hw.cmos_data[RTC_DAY_OF_MONTH]); tm->tm_mon = from_bcd(s, s->hw.cmos_data[RTC_MONTH]) - 1; - tm->tm_year = from_bcd(s, s->hw.cmos_data[RTC_YEAR]) + 100; + tm->tm_year = from_bcd(s, s->hw.cmos_data[RTC_YEAR]); + if ( is_century(s->hw.century) ) + { + unsigned int century = s->hw.century; + + BCD_TO_BIN(century); + tm->tm_year += century * 100 - epoch_year; + } + else + tm->tm_year += 100; after = mktime(get_year(tm->tm_year), tm->tm_mon + 1, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); @@ -629,6 +664,12 @@ static void rtc_copy_date(RTCState *s) s->hw.cmos_data[RTC_DAY_OF_MONTH] = to_bcd(s, tm->tm_mday); s->hw.cmos_data[RTC_MONTH] = to_bcd(s, tm->tm_mon + 1); s->hw.cmos_data[RTC_YEAR] = to_bcd(s, tm->tm_year % 100); + + if ( is_century(s->hw.century) ) + { + s->hw.century = get_year(tm->tm_year) / 100; + BIN_TO_BCD(s->hw.century); + } } static int update_in_progress(RTCState *s) @@ -656,6 +697,13 @@ static uint32_t rtc_ioport_read(RTCState switch ( s->hw.cmos_index ) { + case RTC_CENTURY: + if ( !is_century(s->hw.century) ) + { + ret = UINT32_MAX; + break; + } + fallthrough; case RTC_SECONDS: case RTC_MINUTES: case RTC_HOURS: @@ -669,7 +717,10 @@ static uint32_t rtc_ioport_read(RTCState s->current_tm = gmtime(get_localtime(d)); rtc_copy_date(s); } - ret = s->hw.cmos_data[s->hw.cmos_index]; + if ( s->hw.cmos_index != RTC_CENTURY ) + ret = s->hw.cmos_data[s->hw.cmos_index]; + else + ret = s->hw.century; break; case RTC_REG_A: ret = s->hw.cmos_data[s->hw.cmos_index]; @@ -718,10 +769,12 @@ static int cf_check handle_rtc_io( *val = 0xff; return X86EMUL_OKAY; } - else if ( vrtc->hw.cmos_index < RTC_CMOS_SIZE ) + else if ( vrtc->hw.cmos_index < RTC_CMOS_SIZE || + vrtc->hw.cmos_index == RTC_CENTURY ) { *val = rtc_ioport_read(vrtc); - return X86EMUL_OKAY; + if ( *val != UINT32_MAX ) + return X86EMUL_OKAY; } return X86EMUL_UNHANDLEABLE; @@ -873,6 +926,8 @@ void rtc_init(struct domain *d) s->hw.cmos_data[RTC_REG_C] = 0; s->hw.cmos_data[RTC_REG_D] = RTC_VRT; + s->hw.century = 0x20; /* Arbitrary initial value satisfying is_century() */ + s->current_tm = gmtime(get_localtime(d)); s->start_time = NOW(); --- a/xen/arch/x86/include/asm/mc146818rtc.h +++ b/xen/arch/x86/include/asm/mc146818rtc.h @@ -37,6 +37,9 @@ bool is_cmos_port(unsigned int port, uns #define RTC_REG_C 12 #define RTC_REG_D 13 +/* Conventional index used without (and typically also with) ACPI. */ +#define RTC_CENTURY 0x32 + /********************************************************************** * register details **********************************************************************/ --- a/xen/include/public/arch-x86/hvm/save.h +++ b/xen/include/public/arch-x86/hvm/save.h @@ -485,7 +485,7 @@ struct hvm_hw_rtc { uint8_t cmos_data[RTC_CMOS_SIZE]; /* Index register for 2-part operations */ uint8_t cmos_index; - uint8_t pad0; + uint8_t century; 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Tue, 12 May 2026 08:00:05 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:00:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 4/5] x86/vRTC: use available macros for BCD <-> BIN conversion From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778598006-C5386DB1-604F2D14/0/0 X-purgate-type: clean X-purgate-size: 889 There's no need to open-code these. No functional change intended, even if the | changes to + in to_bcd(). Signed-off-by: Jan Beulich --- a/xen/arch/x86/hvm/rtc.c +++ b/xen/arch/x86/hvm/rtc.c @@ -253,18 +253,18 @@ static void cf_check rtc_update_timer2(v static unsigned int to_bcd(const RTCState *s, unsigned int a) { - if ( s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY ) - return a; + if ( !(s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY) ) + BIN_TO_BCD(a); - return ((a / 10) << 4) | (a % 10); + return a; } static unsigned int from_bcd(const RTCState *s, unsigned int a) { - if ( s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY ) - return a; + if ( !(s->hw.cmos_data[RTC_REG_B] & RTC_DM_BINARY) ) + BCD_TO_BIN(a); - return ((a >> 4) * 10) + (a & 0x0f); + return a; } /* From xen-devel-bounces@lists.xenproject.org Tue May 12 15:00:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:00:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306914.1578648 (Exim 4.92) (envelope-from ) id 1wMobI-0002qx-0w; Tue, 12 May 2026 15:00:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306914.1578648; Tue, 12 May 2026 15:00:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMobH-0002qp-Tp; Tue, 12 May 2026 15:00:47 +0000 Received: by outflank-mailman (input) for mailman id 1306914; Tue, 12 May 2026 15:00:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMobF-0002qd-QA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:00:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMobF-004Fsk-70 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:00:45 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034097-bab6-0a2a0a5309dd-0a2a4504baf4-36 for ; Tue, 12 May 2026 17:00:45 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a03409d-1dec-0a2a45040019-d155dd2dc5a2-3 for ; Tue, 12 May 2026 17:00:45 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-45562c41ec7so2406316f8f.1 for ; Tue, 12 May 2026 08:00:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:00:44 -0700 (PDT) Message-ID: <4bcd76e9-1bd5-4a2c-8d75-7d29b9dfa31f@suse.com> Date: Tue, 12 May 2026 17:00:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 5/5] tools/xen-hvmctx: shorten various format strings a little From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778598045-433673FF-6E94AD80/0/0 X-purgate-type: clean X-purgate-size: 6655 %4.4x and alike format specifiers can be expressed shorter as %04x or, as e.g. dump_ioapic() has it, %.4x. In dump_fpu()'s XMM register dumping, also move away from showing bogus xmm03 and alike. The proper register name is xmm3 for that particular example. Also strip trailing whitespace from lines touched. Signed-off-by: Jan Beulich --- a/tools/misc/xen-hvmctx.c +++ b/tools/misc/xen-hvmctx.c @@ -107,26 +107,26 @@ static void dump_fpu(void *p) struct fpu_regs *r = p; int i; - printf(" FPU: fcw 0x%4.4x fsw 0x%4.4x\n" - " ftw 0x%2.2x (0x%2.2x) fop 0x%4.4x\n" - " fpuip 0x%16.16"PRIx64" fpudp 0x%16.16"PRIx64"\n" - " mxcsr 0x%8.8lx mask 0x%8.8lx\n", + printf(" FPU: fcw 0x%04x fsw 0x%04x\n" + " ftw 0x%02x (0x%02x) fop 0x%04x\n" + " fpuip 0x%016"PRIx64" fpudp 0x%016"PRIx64"\n" + " mxcsr 0x%08lx mask 0x%08lx\n", (unsigned)r->fcw, (unsigned)r->fsw, (unsigned)r->ftw, (unsigned)r->res0, (unsigned)r->fop, r->fpuip, r->fpudp, (unsigned long)r->mxcsr, (unsigned long)r->mxcsr_mask); for ( i = 0 ; i < 8 ; i++ ) - printf(" mm%i 0x%4.4x%16.16"PRIx64" (0x%4.4x%4.4x%4.4x)\n", + printf(" mm%i 0x%04x%016"PRIx64" (0x%04x%04x%04x)\n", i, r->mm[i].hi, r->mm[i].lo, r->mm[i].pad[2], r->mm[i].pad[1], r->mm[i].pad[0]); for ( i = 0 ; i < 16 ; i++ ) - printf(" xmm%2.2i 0x%16.16"PRIx64"%16.16"PRIx64"\n", + printf(" xmm%-2i 0x%016"PRIx64"%016"PRIx64"\n", i, r->xmm[i].hi, r->xmm[i].lo); for ( i = 0 ; i < 6 ; i++ ) - printf(" (0x%16.16"PRIx64"%16.16"PRIx64")\n", + printf(" (0x%016"PRIx64"%016"PRIx64")\n", r->res1[2*i+1], r->res1[2*i]); } @@ -134,20 +134,20 @@ static void dump_cpu(void) { HVM_SAVE_TYPE(CPU) c; READ(c); - printf(" CPU: rax 0x%16.16llx rbx 0x%16.16llx\n" - " rcx 0x%16.16llx rdx 0x%16.16llx\n" - " rbp 0x%16.16llx rsi 0x%16.16llx\n" - " rdi 0x%16.16llx rsp 0x%16.16llx\n" - " r8 0x%16.16llx r9 0x%16.16llx\n" - " r10 0x%16.16llx r11 0x%16.16llx\n" - " r12 0x%16.16llx r13 0x%16.16llx\n" - " r14 0x%16.16llx r15 0x%16.16llx\n" - " rip 0x%16.16llx rflags 0x%16.16llx\n" - " cr0 0x%16.16llx cr2 0x%16.16llx\n" - " cr3 0x%16.16llx cr4 0x%16.16llx\n" - " dr0 0x%16.16llx dr1 0x%16.16llx\n" - " dr2 0x%16.16llx dr3 0x%16.16llx\n" - " dr6 0x%16.16llx dr7 0x%16.16llx\n" + printf(" CPU: rax 0x%016llx rbx 0x%016llx\n" + " rcx 0x%016llx rdx 0x%016llx\n" + " rbp 0x%016llx rsi 0x%016llx\n" + " rdi 0x%016llx rsp 0x%016llx\n" + " r8 0x%016llx r9 0x%016llx\n" + " r10 0x%016llx r11 0x%016llx\n" + " r12 0x%016llx r13 0x%016llx\n" + " r14 0x%016llx r15 0x%016llx\n" + " rip 0x%016llx rflags 0x%016llx\n" + " cr0 0x%016llx cr2 0x%016llx\n" + " cr3 0x%016llx cr4 0x%016llx\n" + " dr0 0x%016llx dr1 0x%016llx\n" + " dr2 0x%016llx dr3 0x%016llx\n" + " dr6 0x%016llx dr7 0x%016llx\n" " cs %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" " es %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" " ds %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.8" PRIx32 " / %#7.4" PRIx32 ")\n" @@ -158,12 +158,12 @@ static void dump_cpu(void) " ldtr %#6.4" PRIx32 " (%#18.8" PRIx64 " + %#10.4" PRIx32 " / %#7.4" PRIx32 ")\n" " idtr (%#18.8" PRIx64 " + %#10.4" PRIx32 ")\n" " gdtr (%#18.8" PRIx64 " + %#10.4" PRIx32 ")\n" - " sysenter cs 0x%8.8llx eip 0x%16.16llx esp 0x%16.16llx\n" + " sysenter cs 0x%08llx eip 0x%016llx esp 0x%016llx\n" " shadow gs %#18.16" PRIx64 " efer %#18.8" PRIx64 "\n" " lstar %#18.16" PRIx64 " cstar %#18.16" PRIx64 "\n" " star %#18.16" PRIx64 " sfmask %#18.8" PRIx64 "\n" - " tsc 0x%16.16llx\n" - " event 0x%8.8lx error 0x%8.8lx\n", + " tsc 0x%016llx\n" + " event 0x%08lx error 0x%08lx\n", (unsigned long long) c.rax, (unsigned long long) c.rbx, (unsigned long long) c.rcx, (unsigned long long) c.rdx, (unsigned long long) c.rbp, (unsigned long long) c.rsi, @@ -260,7 +260,7 @@ static void dump_pci_irq(void) { HVM_SAVE_TYPE(PCI_IRQ) i; READ(i); - printf(" PCI IRQs: 0x%16.16llx%16.16llx\n", + printf(" PCI IRQs: 0x%016llx%016llx\n", (unsigned long long) i.pad[0], (unsigned long long) i.pad[1]); } @@ -268,7 +268,7 @@ static void dump_isa_irq(void) { HVM_SAVE_TYPE(ISA_IRQ) i; READ(i); - printf(" ISA IRQs: 0x%4.4llx\n", + printf(" ISA IRQs: 0x%04llx\n", (unsigned long long) i.pad[0]); } @@ -305,10 +305,10 @@ static void dump_rtc(void) { HVM_SAVE_TYPE(RTC) r; READ(r); - printf(" RTC: regs 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x\n", + printf(" RTC: regs 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x\n", r.cmos_data[0], r.cmos_data[1], r.cmos_data[2], r.cmos_data[3], r.cmos_data[4], r.cmos_data[5], r.cmos_data[6], r.cmos_data[7]); - printf(" 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x, index 0x%2.2x\n", + printf(" 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x, index 0x%02x\n", r.cmos_data[8], r.cmos_data[9], r.cmos_data[10], r.cmos_data[11], r.cmos_data[12], r.cmos_data[13], r.cmos_index); printf(" century 0x%02x offset %"PRId64"\n", r.century, r.rtc_offset); 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pr=C Message-ID: Date: Tue, 12 May 2026 17:06:48 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/5] CI: Switch qemu-arm* jobs to using the distro provided QEMU To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-6-andrew.cooper3@citrix.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260508212907.1643761-6-andrew.cooper3@citrix.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE9:EE_|PH8PR12MB7231:EE_ X-MS-Office365-Filtering-Correlation-Id: c586d971-af51-468a-e442-08deb038184e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|1800799024|36860700016|11063799003|56012099003|18002099003|22082099003; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778599377-D8F7E443-2BC24D1F/10/73395122804 X-purgate-type: spam X-purgate-size: 582 On 3/12/26 5:53 PM, Jan Beulich wrote: > Includes a few custom changes, too. > > 1: arrange for BSP MSR adjustments during S3 resume > 2: clean up BYT/CHT auto demotion disable > 3: latch struct idle_cpu contents > 4: move pre-initialized struct idle_cpu instances > 5: Remove unused driver version constant > 6: Remove the 'preferred_cstates' parameter > 7: drop const from struct cpuidle_state arrays > 8: Add cmdline option to adjust C-states table > 9: Add C-states validation > Release-Acked-by: Oleksii Kurochko ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:23:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:23:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306946.1578675 (Exim 4.92) (envelope-from ) id 1wMoxg-0007GF-6G; Tue, 12 May 2026 15:23:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306946.1578675; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778599433-87371D75-43463CD8/10/73395122804 X-purgate-type: spam X-purgate-size: 1804 Hello Luca, On 5/8/26 4:33 PM, Luca Fancellu wrote: > This series continues to further the ongoing work to introduce support > for MPU systems in Xen. > > The patches in this series aim to implement MPU specific p2m functions. > > This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. > > Harry Ramsey (2): > arm/mpu: Introduce `v8r_el1_msa` device tree property for domains > arm/mpu: Implement p2m tables > > Penny Zheng (1): > arm/mpu: implement setup_virt_paging for MPU systems > > docs/misc/arm/device-tree/booting.txt | 14 +++++ > xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- > xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ > xen/arch/arm/domain.c | 11 ++++ > xen/arch/arm/include/asm/arm32/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/mpu.h | 2 + > xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ > xen/arch/arm/include/asm/cpufeature.h | 13 +++- > xen/arch/arm/include/asm/domain.h | 4 ++ > xen/arch/arm/include/asm/domain_build.h | 21 +++++++ > xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ > xen/arch/arm/include/asm/p2m.h | 5 ++ > xen/arch/arm/include/asm/processor.h | 8 +++ > xen/arch/arm/mpu/arm32/mm.c | 17 +++++ > xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ > xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- > xen/include/public/arch-arm.h | 6 ++ > xen/include/public/domctl.h | 4 +- > 18 files changed, 353 insertions(+), 9 deletions(-) > I am okay to have this patch series in the current release: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:25:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:25:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306958.1578683 (Exim 4.92) (envelope-from ) id 1wMozb-0007s6-Ix; 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The other isn't so much about setting anything, but > rather about clearing. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > As the result is a mere wrapper around guest_physmap_remove_page(), drop > the hook altogether. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich Acked-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Tue May 12 15:27:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:27:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306966.1578692 (Exim 4.92) (envelope-from ) id 1wMp0k-0008M3-Ra; Tue, 12 May 2026 15:27:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306966.1578692; Tue, 12 May 2026 15:27:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp0k-0008Lw-Ot; Tue, 12 May 2026 15:27:06 +0000 Received: by outflank-mailman (input) for mailman id 1306966; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 8Sf6Ls6wLoE2w8NfLl+DB/xV7KpjS109ThpkNcf3TOZHIPUu8SI2YAFIkb8mwdABkih5UaVeVM24r8URdbzf5uGKe8vVD/58UPYgqbR9ZcpN4mrUtZMQd68AFy4kq+y9q5YUoJOgiJsw3XfHyUZQwMAp+6deWMlZgZ7gZL7QVjvmgczVUZZBtSogkysgnASpqR4czd1EMOwk+eIdkYPlyibB91wXvb4cXkH4kgCwEz1nYU7VJfARtNp0ke89ImuQf2p+qdIUvG3WPymvDjYEEfaTP6VZXaCmZ7LOfCIeCb9LGQv1gOgruyrSBI18gYCg4t+GiE2Z3KgGpu61cW+P+Iiv73rSlWnk2k4boLygo4ZmJW7wSovwHTNSsjHPH1BomlVYnL3aG2uGDhCNynQsoYelHEI0DkyAm7LVfaMznoxBhgjVSeB6FeHSMRN/0aUC X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 May 2026 15:26:59.3147 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dbd57d7e-61f2-48c3-aa23-08deb03ae8d4 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS0EPF000001AD.eurprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR08MB6349 X-purgate-ID: tlsNG-d25034/1778599623-E2169CF5-CC246201/10/73395122804 X-purgate-type: spam X-purgate-size: 1979 Hi Oleksii, > On 12 May 2026, at 16:23, Oleksii Kurochko w= rote: >=20 > Hello Luca, >=20 > On 5/8/26 4:33 PM, Luca Fancellu wrote: >> This series continues to further the ongoing work to introduce support >> for MPU systems in Xen. >> The patches in this series aim to implement MPU specific p2m functions. >> This serie is based on staging 10d417b8b62efa5093707c1dfe9bd48e0abeb331. >> Harry Ramsey (2): >> arm/mpu: Introduce `v8r_el1_msa` device tree property for domains >> arm/mpu: Implement p2m tables >> Penny Zheng (1): >> arm/mpu: implement setup_virt_paging for MPU systems >> docs/misc/arm/device-tree/booting.txt | 14 +++++ >> xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- >> xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ >> xen/arch/arm/domain.c | 11 ++++ >> xen/arch/arm/include/asm/arm32/mpu.h | 2 + >> xen/arch/arm/include/asm/arm64/mpu.h | 2 + >> xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ >> xen/arch/arm/include/asm/cpufeature.h | 13 +++- >> xen/arch/arm/include/asm/domain.h | 4 ++ >> xen/arch/arm/include/asm/domain_build.h | 21 +++++++ >> xen/arch/arm/include/asm/mpu/p2m.h | 7 +++ >> xen/arch/arm/include/asm/p2m.h | 5 ++ >> xen/arch/arm/include/asm/processor.h | 8 +++ >> xen/arch/arm/mpu/arm32/mm.c | 17 +++++ >> xen/arch/arm/mpu/arm64/mm.c | 18 ++++++ >> xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- >> xen/include/public/arch-arm.h | 6 ++ >> xen/include/public/domctl.h | 4 +- >> 18 files changed, 353 insertions(+), 9 deletions(-) >=20 > I am okay to have this patch series in the current release: > Release-Acked-by: Oleksii Kurochko Thanks, I will send the v6 shortly and CC you as well in the cover letter. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Tue May 12 15:32:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:32:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306979.1578702 (Exim 4.92) (envelope-from ) id 1wMp6J-0001ts-EK; Tue, 12 May 2026 15:32:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306979.1578702; Tue, 12 May 2026 15:32:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp6J-0001tk-Av; Tue, 12 May 2026 15:32:51 +0000 Received: by outflank-mailman (input) for mailman id 1306979; Tue, 12 May 2026 15:32:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMp6H-0001te-LA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:32:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp6H-00ALJ3-1x for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:32:49 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03481b-e002-0a2a0a5209dd-0a2a4508e73a-8 for ; Tue, 12 May 2026 17:32:49 +0200 Received: from [209.85.221.46] (helo=mail-wr1-f46.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034820-63b5-0a2a45080019-d155dd2eb916-3 for ; Tue, 12 May 2026 17:32:49 +0200 Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-453903ee4adso4957149f8f.3 for ; Tue, 12 May 2026 08:32:48 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The other isn't so much about setting anything, but > rather about clearing. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > As the result is a mere wrapper around guest_physmap_remove_page(), drop > the hook altogether. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:34:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:34:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306988.1578711 (Exim 4.92) (envelope-from ) id 1wMp7T-0002RV-RH; Tue, 12 May 2026 15:34:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306988.1578711; Tue, 12 May 2026 15:34:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp7T-0002RO-OG; Tue, 12 May 2026 15:34:03 +0000 Received: by outflank-mailman (input) for mailman id 1306988; Tue, 12 May 2026 15:34:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp7T-0002RI-4Y for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:34:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp7S-00ALYr-6z for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:34:02 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034867-5cb7-0a2a0a5109dd-0a2a4509dbf6-10 for ; Tue, 12 May 2026 17:34:02 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034869-2497-0a2a45090019-d155802cc8e7-3 for ; Tue, 12 May 2026 17:34:02 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4891e5b9c1fso53004525e9.2 for ; Tue, 12 May 2026 08:34:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:34:01 -0700 (PDT) Message-ID: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Date: Tue, 12 May 2026 17:34:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH for-4.22 v2 0/8] x86/mwait-idle: sync up with Linux 7.0-rc To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1778600042-3777AA53-922562DE/0/0 X-purgate-type: clean X-purgate-size: 397 Includes a few custom changes, too. 1: arrange for BSP MSR adjustments during S3 resume 2: clean up BYT/CHT auto demotion disable 3: latch struct idle_cpu contents 4: move pre-initialized struct idle_cpu instances 5: Remove the 'preferred_cstates' parameter 6: drop const from struct cpuidle_state arrays 7: Add cmdline option to adjust C-states table 8: Add C-states validation Jan From xen-devel-bounces@lists.xenproject.org Tue May 12 15:35:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:35:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306994.1578719 (Exim 4.92) (envelope-from ) id 1wMp8z-0002wn-3t; Tue, 12 May 2026 15:35:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306994.1578719; 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Tue, 12 May 2026 08:35:34 -0700 (PDT) Message-ID: <5c66cfb1-e234-4efa-9a01-88acb284e414@suse.com> Date: Tue, 12 May 2026 17:35:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 1/8] x86/mwait-idle: arrange for BSP MSR adjustments during S3 resume From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778600135-0AB70C48-33CB9FDF/0/0 X-purgate-type: clean X-purgate-size: 3124 mwait_idle_cpu_init() is only called for APs, yet MSR writes will typically need re-doing post-S3 even for the BSP. When multiple cores / threads are present (and to come back online) in a package, for package scope MSRs this may be covered by APs doing the writes, but we can't rely on that. Signed-off-by: Jan Beulich --- a/xen/arch/x86/acpi/power.c +++ b/xen/arch/x86/acpi/power.c @@ -28,6 +28,7 @@ #include #include #include +#include #include #include #include @@ -299,6 +300,7 @@ static int enter_state(u32 state) acpi_sleep_post(state); if ( hvm_cpu_up() ) BUG(); + mwait_idle_resume(); cpufreq_add_cpu(0); enable_cpu: --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1677,6 +1677,28 @@ static int __init mwait_idle_probe(void) return 0; } +static void mwait_idle_cpu_tweak(unsigned int cpu) +{ + if (icpu->auto_demotion_disable_flags) + on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); + + if (icpu->byt_auto_demotion_disable_flag) + on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); + + switch (icpu->c1e_promotion) { + case C1E_PROMOTION_DISABLE: + on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); + break; + + case C1E_PROMOTION_ENABLE: + on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); + break; + + case C1E_PROMOTION_PRESERVE: + break; + } +} + static int cf_check mwait_idle_cpu_init( struct notifier_block *nfb, unsigned long action, void *hcpu) { @@ -1759,24 +1781,7 @@ static int cf_check mwait_idle_cpu_init( dev->count++; } - if (icpu->auto_demotion_disable_flags) - on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - - if (icpu->byt_auto_demotion_disable_flag) - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); - - switch (icpu->c1e_promotion) { - case C1E_PROMOTION_DISABLE: - on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); - break; - - case C1E_PROMOTION_ENABLE: - on_selected_cpus(cpumask_of(cpu), c1e_promotion_enable, NULL, 1); - break; - - case C1E_PROMOTION_PRESERVE: - break; - } + mwait_idle_cpu_tweak(cpu); return NOTIFY_DONE; } @@ -1808,6 +1813,14 @@ int __init mwait_idle_init(struct notifi return err; } +void mwait_idle_resume(void) +{ + if (!icpu) + return; + + mwait_idle_cpu_tweak(smp_processor_id()); +} + /* Helper function for HPET. */ bool __init mwait_pc10_supported(void) { --- a/xen/arch/x86/include/asm/mwait.h +++ b/xen/arch/x86/include/asm/mwait.h @@ -14,9 +14,12 @@ #define MWAIT_ECX_INTERRUPT_BREAK 0x1 void mwait_idle_with_hints(unsigned int eax, unsigned int ecx); + #ifdef CONFIG_INTEL +void mwait_idle_resume(void); bool mwait_pc10_supported(void); #else +static inline void mwait_idle_resume(void) {} static inline bool mwait_pc10_supported(void) { return false; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1306999.1578729 (Exim 4.92) (envelope-from ) id 1wMp9W-0003Nc-Bk; Tue, 12 May 2026 15:36:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1306999.1578729; Tue, 12 May 2026 15:36:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9W-0003NV-7x; Tue, 12 May 2026 15:36:10 +0000 Received: by outflank-mailman (input) for mailman id 1306999; Tue, 12 May 2026 15:36:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9U-0003NH-QH for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp9U-00AQXI-6u for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:36:08 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0348dc-bab6-0a2a0a5309dd-0a2a4503a70c-40 for ; Tue, 12 May 2026 17:36:08 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0348e8-672d-0a2a45030019-d1558032c526-3 for ; Tue, 12 May 2026 17:36:08 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so32813645e9.1 for ; Tue, 12 May 2026 08:36:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:36:07 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:36:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 2/8] x86/mwait-idle: clean up BYT/CHT auto demotion disable From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778600168-3B96D938-1DFE7A89/0/0 X-purgate-type: clean X-purgate-size: 3850 Bay Trail (BYT) and Cherry Trail (CHT) platforms have a very specific way of disabling auto-demotion via specific MSR bits. Clean up the code so that BYT/CHT-specifics do not show up in the common 'struct idle_cpu' data structure. Remove the 'byt_auto_demotion_disable_flag' flag from 'struct idle_cpu', because a better coding pattern is to avoid very case-specific fields like 'bool byt_auto_demotion_disable_flag' in a common data structure, which is used for all platforms, not only BYT/CHT. The code is just more readable when common data structures contain only commonly used fields. Instead, match BYT/CHT in the 'intel_idle_init_cstates_icpu()' function, and introduce a small helper to take care of BYT/CHT auto-demotion. This is consistent with how platform-specific things are done for other platforms. No intended functional changes. Inspired by (and description largely taken from) Linux'es c93d13b661a6 ("intel_idle: clean up BYT/CHT auto demotion disable"). Signed-off-by: Jan Beulich --- v2: Init "first" to "true" in mwait_idle_cpu_init(). --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -103,7 +103,6 @@ struct idle_cpu { * Indicate which enable bits to clear here. */ unsigned long auto_demotion_disable_flags; - bool byt_auto_demotion_disable_flag; enum c1e_promotion c1e_promotion; }; @@ -1144,7 +1143,7 @@ static void cf_check auto_demotion_disab wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); } -static void cf_check byt_auto_demotion_disable(void *dummy) +static void byt_cht_auto_demotion_disable(void) { wrmsrl(MSR_CC6_DEMOTION_POLICY_CONFIG, 0); wrmsrl(MSR_MC6_DEMOTION_POLICY_CONFIG, 0); @@ -1195,13 +1194,11 @@ static const struct idle_cpu idle_cpu_sn static const struct idle_cpu idle_cpu_byt = { .state_table = byt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, - .byt_auto_demotion_disable_flag = true, }; static const struct idle_cpu idle_cpu_cht = { .state_table = cht_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, - .byt_auto_demotion_disable_flag = true, }; static const struct idle_cpu idle_cpu_ivb = { @@ -1677,14 +1674,11 @@ static int __init mwait_idle_probe(void) return 0; } -static void mwait_idle_cpu_tweak(unsigned int cpu) +static void mwait_idle_cpu_tweak(unsigned int cpu, bool bsp) { if (icpu->auto_demotion_disable_flags) on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - if (icpu->byt_auto_demotion_disable_flag) - on_selected_cpus(cpumask_of(cpu), byt_auto_demotion_disable, NULL, 1); - switch (icpu->c1e_promotion) { case C1E_PROMOTION_DISABLE: on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); @@ -1697,12 +1691,24 @@ static void mwait_idle_cpu_tweak(unsigne case C1E_PROMOTION_PRESERVE: break; } + + /* Pkg-scope MSRs on 1-socket-only systems need writing only once. */ + if (!bsp) + return; + + switch (boot_cpu_data.vfm) { + case INTEL_ATOM_SILVERMONT: + case INTEL_ATOM_AIRMONT: + byt_cht_auto_demotion_disable(); + break; + } } static int cf_check mwait_idle_cpu_init( struct notifier_block *nfb, unsigned long action, void *hcpu) { unsigned int cpu = (unsigned long)hcpu, cstate; + static bool first = true; struct acpi_processor_power *dev = processor_powers[cpu]; switch (action) { @@ -1781,7 +1787,8 @@ static int cf_check mwait_idle_cpu_init( dev->count++; } - mwait_idle_cpu_tweak(cpu); + mwait_idle_cpu_tweak(cpu, first); + first = false; return NOTIFY_DONE; } @@ -1818,7 +1825,7 @@ void mwait_idle_resume(void) if (!icpu) return; - mwait_idle_cpu_tweak(smp_processor_id()); + mwait_idle_cpu_tweak(smp_processor_id(), true); } /* Helper function for HPET. */ From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307004.1578737 (Exim 4.92) (envelope-from ) id 1wMp9s-0003lj-HG; Tue, 12 May 2026 15:36:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307004.1578737; Tue, 12 May 2026 15:36:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9s-0003lc-EX; Tue, 12 May 2026 15:36:32 +0000 Received: by outflank-mailman (input) for mailman id 1307004; Tue, 12 May 2026 15:36:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMp9q-0003lF-NC for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:36:30 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMp9q-00AQbz-47 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:36:30 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0348fa-bab6-0a2a0a5309dd-0a2a4501acb2-8 for ; Tue, 12 May 2026 17:36:30 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0348fd-c1f2-0a2a45010019-d1558032d188-3 for ; Tue, 12 May 2026 17:36:30 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48d146705b4so69766415e9.3 for ; Tue, 12 May 2026 08:36:30 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:36:29 -0700 (PDT) Message-ID: <696b4fe5-d8a5-4768-9b24-5c2d2975e686@suse.com> Date: Tue, 12 May 2026 17:36:28 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 3/8] x86/mwait-idle: latch struct idle_cpu contents From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778600190-B695FFF4-1EE8C1D0/0/0 X-purgate-type: clean X-purgate-size: 5850 Rather than storing a pointer (and needing to keep all struct instances in memory post-init), and rather than (like the Linux counterpart has it) keeping individual variables, simply copy the respective structure instance. By implication, subsequent updates now need doing to the copy. Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -106,14 +106,14 @@ struct idle_cpu { enum c1e_promotion c1e_promotion; }; -static const struct idle_cpu *__ro_after_init icpu; +static struct idle_cpu __ro_after_init icpu; -static const struct cpuidle_state { +struct cpuidle_state { char name[16]; unsigned int flags; unsigned int exit_latency; /* in US */ unsigned int target_residency; /* in US */ -} *__ro_after_init cpuidle_state_table; +}; #define CPUIDLE_FLAG_DISABLED 0x1 /* @@ -1097,7 +1097,7 @@ static void cf_check mwait_idle(void) * leave_mm() to avoid costly and often unnecessary wakeups * for flushing the user TLB's associated with the active mm. */ - if (cpuidle_state_table[].flags & CPUIDLE_FLAG_TLB_FLUSHED) + if (icpu.state_table[].flags & CPUIDLE_FLAG_TLB_FLUSHED) leave_mm(cpu); #endif @@ -1139,7 +1139,7 @@ static void cf_check auto_demotion_disab u64 msr_bits; rdmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); - msr_bits &= ~(icpu->auto_demotion_disable_flags); + msr_bits &= ~icpu.auto_demotion_disable_flags; wrmsrl(MSR_PKG_CST_CONFIG_CONTROL, msr_bits); } @@ -1371,10 +1371,10 @@ static void __init ivt_idle_state_table_ /* 1 and 2 socket systems use default ivt_cstates */ break; case 2: case 3: - cpuidle_state_table = ivt_cstates_4s; + icpu.state_table = ivt_cstates_4s; break; default: - cpuidle_state_table = ivt_cstates_8s; + icpu.state_table = ivt_cstates_8s; break; } } @@ -1525,14 +1525,12 @@ static void __init adl_idle_state_table_ adl_l_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; /* Disable C1E by clearing the "C1E promotion" bit. */ - idle_cpu_adl.c1e_promotion = C1E_PROMOTION_DISABLE; - idle_cpu_adl_l.c1e_promotion = C1E_PROMOTION_DISABLE; + icpu.c1e_promotion = C1E_PROMOTION_DISABLE; return; } /* Make sure C1E is enabled by default */ - idle_cpu_adl.c1e_promotion = C1E_PROMOTION_ENABLE; - idle_cpu_adl_l.c1e_promotion = C1E_PROMOTION_ENABLE; + icpu.c1e_promotion = C1E_PROMOTION_ENABLE; } /* @@ -1593,6 +1591,7 @@ static int __init mwait_idle_probe(void) { unsigned int eax, ebx, ecx; const struct x86_cpu_id *id; + const struct idle_cpu *idle_cpu; const char *str; if (boot_cpu_data.vendor != X86_VENDOR_INTEL) @@ -1627,8 +1626,8 @@ static int __init mwait_idle_probe(void) pr_debug(PREFIX "MWAIT substates: %#x\n", mwait_substates); - icpu = id->driver_data; - cpuidle_state_table = icpu->state_table; + idle_cpu = id->driver_data; + icpu = *idle_cpu; if (boot_cpu_has(X86_FEATURE_XEN_ARAT)) lapic_timer_reliable_states = LAPIC_TIMER_ALWAYS_RELIABLE; @@ -1644,7 +1643,7 @@ static int __init mwait_idle_probe(void) const char *ss; do { - const struct cpuidle_state *state = icpu->state_table; + const struct cpuidle_state *state = idle_cpu->state_table; unsigned int bit = 1; ss = strchr(str, ','); @@ -1676,10 +1675,10 @@ static int __init mwait_idle_probe(void) static void mwait_idle_cpu_tweak(unsigned int cpu, bool bsp) { - if (icpu->auto_demotion_disable_flags) + if (icpu.auto_demotion_disable_flags) on_selected_cpus(cpumask_of(cpu), auto_demotion_disable, NULL, 1); - switch (icpu->c1e_promotion) { + switch (icpu.c1e_promotion) { case C1E_PROMOTION_DISABLE: on_selected_cpus(cpumask_of(cpu), c1e_promotion_disable, NULL, 1); break; @@ -1732,11 +1731,11 @@ static int cf_check mwait_idle_cpu_init( dev->count = 1; - for (cstate = 0; cpuidle_state_table[cstate].target_residency; ++cstate) { + for (cstate = 0; icpu.state_table[cstate].target_residency; ++cstate) { unsigned int num_substates, hint, state; struct acpi_processor_cx *cx; - hint = flg2MWAIT(cpuidle_state_table[cstate].flags); + hint = flg2MWAIT(icpu.state_table[cstate].flags); state = MWAIT_HINT2CSTATE(hint) + 1; if (state > max_cstate()) { @@ -1752,10 +1751,10 @@ static int cf_check mwait_idle_cpu_init( continue; /* if state marked as disabled, skip it */ - if (cpuidle_state_table[cstate].flags & + if (icpu.state_table[cstate].flags & CPUIDLE_FLAG_DISABLED) { printk(XENLOG_DEBUG PREFIX "state %s is disabled\n", - cpuidle_state_table[cstate].name); + icpu.state_table[cstate].name); continue; } @@ -1773,15 +1772,15 @@ static int cf_check mwait_idle_cpu_init( cx->type = state; cx->address = hint; cx->entry_method = ACPI_CSTATE_EM_FFH; - cx->latency = cpuidle_state_table[cstate].exit_latency; + cx->latency = icpu.state_table[cstate].exit_latency; cx->target_residency = - cpuidle_state_table[cstate].target_residency; - if ((cpuidle_state_table[cstate].flags & + icpu.state_table[cstate].target_residency; + if ((icpu.state_table[cstate].flags & CPUIDLE_FLAG_IRQ_ENABLE) && /* cstate_restore_tsc() needs to be a no-op */ boot_cpu_has(X86_FEATURE_NONSTOP_TSC)) cx->irq_enable_early = true; - if (cpuidle_state_table[cstate].flags & CPUIDLE_FLAG_IBRS) + if (icpu.state_table[cstate].flags & CPUIDLE_FLAG_IBRS) cx->ibrs_disable = true; dev->count++; @@ -1822,7 +1821,7 @@ int __init mwait_idle_init(struct notifi void mwait_idle_resume(void) { - if (!icpu) + if (!icpu.state_table) return; mwait_idle_cpu_tweak(smp_processor_id(), true); From xen-devel-bounces@lists.xenproject.org Tue May 12 15:36:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:36:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307009.1578747 (Exim 4.92) (envelope-from ) id 1wMpAB-0004Gq-S7; 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Tue, 12 May 2026 08:36:48 -0700 (PDT) Message-ID: <2e8a4a74-fae9-4c75-aa98-f4b0dc7ac6bf@suse.com> Date: Tue, 12 May 2026 17:36:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 4/8] x86/mwait-idle: move pre-initialized struct idle_cpu instances From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1778600209-BCD63DB1-4E30620E/0/0 X-purgate-type: clean X-purgate-size: 5568 Now that they're not referenced anymore post-init, they can themselves move into .init.rodata. (idle_cpu_adl{,_l} can also become const in the first place.) Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -1167,132 +1167,132 @@ static void cf_check c1e_promotion_disab wrmsrl(MSR_IA32_POWER_CTL, msr_bits); } -static const struct idle_cpu idle_cpu_nehalem = { +static const struct idle_cpu __initconstrel idle_cpu_nehalem = { .state_table = nehalem_cstates, .auto_demotion_disable_flags = NHM_C1_AUTO_DEMOTE | NHM_C3_AUTO_DEMOTE, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_atom = { +static const struct idle_cpu __initconstrel idle_cpu_atom = { .state_table = atom_cstates, }; -static const struct idle_cpu idle_cpu_tangier = { +static const struct idle_cpu __initconstrel idle_cpu_tangier = { .state_table = tangier_cstates, }; -static const struct idle_cpu idle_cpu_lincroft = { +static const struct idle_cpu __initconstrel idle_cpu_lincroft = { .state_table = atom_cstates, .auto_demotion_disable_flags = ATM_LNC_C6_AUTO_DEMOTE, }; -static const struct idle_cpu idle_cpu_snb = { +static const struct idle_cpu __initconstrel idle_cpu_snb = { .state_table = snb_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_byt = { +static const struct idle_cpu __initconstrel idle_cpu_byt = { .state_table = byt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_cht = { +static const struct idle_cpu __initconstrel idle_cpu_cht = { .state_table = cht_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_ivb = { +static const struct idle_cpu __initconstrel idle_cpu_ivb = { .state_table = ivb_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_ivt = { +static const struct idle_cpu __initconstrel idle_cpu_ivt = { .state_table = ivt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_hsw = { +static const struct idle_cpu __initconstrel idle_cpu_hsw = { .state_table = hsw_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_bdw = { +static const struct idle_cpu __initconstrel idle_cpu_bdw = { .state_table = bdw_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_skl = { +static const struct idle_cpu __initconstrel idle_cpu_skl = { .state_table = skl_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_skx = { +static const struct idle_cpu __initconstrel idle_cpu_skx = { .state_table = skx_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_icx = { +static const struct idle_cpu __initconstrel idle_cpu_icx = { .state_table = icx_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static struct idle_cpu __ro_after_init idle_cpu_adl = { +static const struct idle_cpu __initconstrel idle_cpu_adl = { .state_table = adl_cstates, }; -static struct idle_cpu __ro_after_init idle_cpu_adl_l = { +static const struct idle_cpu __initconstrel idle_cpu_adl_l = { .state_table = adl_l_cstates, }; -static const struct idle_cpu idle_cpu_mtl_l = { +static const struct idle_cpu __initconstrel idle_cpu_mtl_l = { .state_table = mtl_l_cstates, }; -static const struct idle_cpu idle_cpu_gmt = { +static const struct idle_cpu __initconstrel idle_cpu_gmt = { .state_table = gmt_cstates, }; -static const struct idle_cpu idle_cpu_spr = { +static const struct idle_cpu __initconstrel idle_cpu_spr = { .state_table = spr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_gnr = { +static const struct idle_cpu __initconstrel idle_cpu_gnr = { .state_table = gnr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_gnrd = { +static const struct idle_cpu __initconstrel idle_cpu_gnrd = { .state_table = gnrd_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_avn = { +static const struct idle_cpu __initconstrel idle_cpu_avn = { .state_table = avn_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_bxt = { +static const struct idle_cpu __initconstrel idle_cpu_bxt = { .state_table = bxt_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_dnv = { +static const struct idle_cpu __initconstrel idle_cpu_dnv = { .state_table = dnv_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_snr = { +static const struct idle_cpu __initconstrel idle_cpu_snr = { .state_table = snr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_grr = { +static const struct idle_cpu __initconstrel idle_cpu_grr = { .state_table = grr_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; -static const struct idle_cpu idle_cpu_srf = { +static const struct idle_cpu __initconstrel idle_cpu_srf = { .state_table = srf_cstates, .c1e_promotion = C1E_PROMOTION_DISABLE, }; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:37:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:37:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307018.1578756 (Exim 4.92) (envelope-from ) id 1wMpAZ-0004r9-2k; Tue, 12 May 2026 15:37:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307018.1578756; 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Tue, 12 May 2026 08:37:12 -0700 (PDT) Message-ID: <70787b38-b656-4259-a496-0d0545fa98ba@suse.com> Date: Tue, 12 May 2026 17:37:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 5/8] x86/mwait-idle: Remove the 'preferred_cstates' parameter From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778600233-3B161938-09C28C5E/0/0 X-purgate-type: clean X-purgate-size: 5567 From: Artem Bityutskiy Remove the 'preferred_cstates' module parameter as it is not really useful. The parameter currently only affects Alder Lake, where it controls C1/C1E preference, with C1E being the default. The parameter does not support any other platform. For example, Meteor Lake has a similar C1/C1E limitation, but the parameter does not support Meteor Lake. This indicates that the parameter is not very useful. Generally, independent C1 and C1E are important for server platforms where low latency is key. However, they are not as important for client platforms, like Alder Lake, where C1E providing better energy savings is generally preferred. The parameter was originally introduced for Sapphire Rapids Xeon: da0e58c038e6 intel_idle: add 'preferred_cstates' module argument Later it was added to Alder Lake: d1cf8bbfed1ed ("intel_idle: Add AlderLake support") But it was removed from Sapphire Rapids when firmware fixed the C1/C1E limitation: 1548fac47a114 ("intel_idle: make SPR C1 and C1E be independent") So Alder Lake is the only platform left where this parameter has any effect. Remove this parameter to simplify the driver and reduce maintenance burden. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251215111300.132803-1-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git a36dc37b5672 Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -2071,12 +2071,6 @@ compression is selected at build time fr ### ple_window (Intel) > `= ` -### preferred-cstates (x86) -> `= ( | List of ( C1 | C1E | C2 | ... )` - -This is a mask of C-states which are to be used preferably. This option is -applicable only on hardware were certain C-states are exclusive of one another. - ### probe-port-aliases (x86) > `= ` --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -72,19 +72,6 @@ boolean_param("mwait-idle", opt_mwait_id static unsigned int mwait_substates; -/* - * Some platforms come with mutually exclusive C-states, so that if one is - * enabled, the other C-states must not be used. Example: C1 and C1E on - * Sapphire Rapids platform. This parameter allows for selecting the - * preferred C-states among the groups of mutually exclusive C-states - the - * selected C-states will be registered, the other C-states from the mutually - * exclusive group won't be registered. If the platform has no mutually - * exclusive C-states, this parameter has no effect. - */ -static unsigned int __ro_after_init preferred_states_mask; -static char __initdata preferred_states[64]; -string_param("preferred-cstates", preferred_states); - #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF /* Reliable LAPIC Timer States, bit 1 for C1 etc. Default to only C1. */ static unsigned int lapic_timer_reliable_states = (1 << 1); @@ -1512,28 +1499,6 @@ static void __init skx_idle_state_table_ } /* - * adl_idle_state_table_update - Adjust AlderLake idle states table. - */ -static void __init adl_idle_state_table_update(void) -{ - /* Check if user prefers C1 over C1E. */ - if ((preferred_states_mask & BIT(1, U)) && - !(preferred_states_mask & BIT(2, U))) { - adl_cstates[0].flags &= ~CPUIDLE_FLAG_DISABLED; - adl_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; - adl_l_cstates[0].flags &= ~CPUIDLE_FLAG_DISABLED; - adl_l_cstates[1].flags |= CPUIDLE_FLAG_DISABLED; - - /* Disable C1E by clearing the "C1E promotion" bit. */ - icpu.c1e_promotion = C1E_PROMOTION_DISABLE; - return; - } - - /* Make sure C1E is enabled by default */ - icpu.c1e_promotion = C1E_PROMOTION_ENABLE; -} - -/* * spr_idle_state_table_update - Adjust Sapphire Rapids idle states table. */ static void __init spr_idle_state_table_update(void) @@ -1579,11 +1544,6 @@ static void __init mwait_idle_state_tabl case INTEL_EMERALDRAPIDS_X: spr_idle_state_table_update(); break; - case INTEL_ALDERLAKE: - case INTEL_ALDERLAKE_L: - case INTEL_ATOM_GRACEMONT: - adl_idle_state_table_update(); - break; } } @@ -1592,7 +1552,6 @@ static int __init mwait_idle_probe(void) unsigned int eax, ebx, ecx; const struct x86_cpu_id *id; const struct idle_cpu *idle_cpu; - const char *str; if (boot_cpu_data.vendor != X86_VENDOR_INTEL) return -ENODEV; @@ -1635,39 +1594,6 @@ static int __init mwait_idle_probe(void) pr_debug(PREFIX "lapic_timer_reliable_states %#x\n", lapic_timer_reliable_states); - str = preferred_states; - if (isdigit(str[0])) - preferred_states_mask = simple_strtoul(str, &str, 0); - else if (str[0]) - { - const char *ss; - - do { - const struct cpuidle_state *state = idle_cpu->state_table; - unsigned int bit = 1; - - ss = strchr(str, ','); - if (!ss) - ss = strchr(str, '\0'); - - for (; state->name[0]; ++state) { - bit <<= 1; - if (!cmdline_strcmp(str, state->name)) { - preferred_states_mask |= bit; - break; - } - } - if (!state->name[0]) - break; - - str = ss + 1; - } while (*ss); - - str -= str == ss + 1; - } - if (str[0]) - printk("unrecognized \"preferred-cstates=%s\"\n", str); - mwait_idle_state_table_update(); return 0; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:37:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:37:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307026.1578764 (Exim 4.92) (envelope-from ) id 1wMpAx-0005Tb-9k; Tue, 12 May 2026 15:37:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307026.1578764; Tue, 12 May 2026 15:37:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpAx-0005TU-6k; Tue, 12 May 2026 15:37:39 +0000 Received: by outflank-mailman (input) for mailman id 1307026; Tue, 12 May 2026 15:37:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpAw-0005Ov-5K for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:37:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpAv-00BBxs-I1 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:37:37 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034938-bab6-0a2a0a5309dd-0a2a45098220-34 for ; Tue, 12 May 2026 17:37:37 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034941-2497-0a2a45090019-d155dd32c877-3 for ; Tue, 12 May 2026 17:37:37 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-43d77f6092eso3543632f8f.2 for ; Tue, 12 May 2026 08:37:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:37:36 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:37:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 6/8] x86/mwait-idle: drop const from struct cpuidle_state arrays From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778600257-40D67A53-BB1F923F/0/0 X-purgate-type: clean X-purgate-size: 6280 A subsequent change will want to be able to alter them based on a new command line option. (Note that some were __ro_after_init already.) Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -83,7 +83,7 @@ enum c1e_promotion { }; struct idle_cpu { - const struct cpuidle_state *state_table; + struct cpuidle_state *state_table; /* * Hardware C-state auto-demotion may not always be optimal. @@ -139,7 +139,7 @@ struct cpuidle_state { * which is also the index into the MWAIT hint array. * Thus C0 is a dummy. */ -static const struct cpuidle_state nehalem_cstates[] = { +static struct cpuidle_state __ro_after_init nehalem_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -167,7 +167,7 @@ static const struct cpuidle_state nehale {} }; -static const struct cpuidle_state snb_cstates[] = { +static struct cpuidle_state __ro_after_init snb_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -201,7 +201,7 @@ static const struct cpuidle_state snb_cs {} }; -static const struct cpuidle_state byt_cstates[] = { +static struct cpuidle_state __ro_after_init byt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -235,7 +235,7 @@ static const struct cpuidle_state byt_cs {} }; -static const struct cpuidle_state cht_cstates[] = { +static struct cpuidle_state __ro_after_init cht_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -269,7 +269,7 @@ static const struct cpuidle_state cht_cs {} }; -static const struct cpuidle_state ivb_cstates[] = { +static struct cpuidle_state __ro_after_init ivb_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -303,7 +303,7 @@ static const struct cpuidle_state ivb_cs {} }; -static const struct cpuidle_state ivt_cstates[] = { +static struct cpuidle_state __ro_after_init ivt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -331,7 +331,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state ivt_cstates_4s[] = { +static struct cpuidle_state __ro_after_init ivt_cstates_4s[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -359,7 +359,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state ivt_cstates_8s[] = { +static struct cpuidle_state __ro_after_init ivt_cstates_8s[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -387,7 +387,7 @@ static const struct cpuidle_state ivt_cs {} }; -static const struct cpuidle_state hsw_cstates[] = { +static struct cpuidle_state __ro_after_init hsw_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -439,7 +439,7 @@ static const struct cpuidle_state hsw_cs {} }; -static const struct cpuidle_state bdw_cstates[] = { +static struct cpuidle_state __ro_after_init bdw_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -565,7 +565,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state icx_cstates[] = { +static struct cpuidle_state __ro_after_init icx_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_IRQ_ENABLE, @@ -665,7 +665,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state mtl_l_cstates[] = { +static struct cpuidle_state __ro_after_init mtl_l_cstates[] = { { .name = "C1E", .flags = MWAIT2flg(0x01), @@ -687,7 +687,7 @@ static const struct cpuidle_state mtl_l_ {} }; -static const struct cpuidle_state gmt_cstates[] = { +static struct cpuidle_state __ro_after_init gmt_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_DISABLED, @@ -743,7 +743,7 @@ static struct cpuidle_state __ro_after_i {} }; -static const struct cpuidle_state gnr_cstates[] = { +static struct cpuidle_state __ro_after_init gnr_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -771,7 +771,7 @@ static const struct cpuidle_state gnr_cs {} }; -static const struct cpuidle_state gnrd_cstates[] = { +static struct cpuidle_state __ro_after_init gnrd_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -799,7 +799,7 @@ static const struct cpuidle_state gnrd_c {} }; -static const struct cpuidle_state atom_cstates[] = { +static struct cpuidle_state __ro_after_init atom_cstates[] = { { .name = "C1E", .flags = MWAIT2flg(0x00), @@ -827,7 +827,7 @@ static const struct cpuidle_state atom_c {} }; -static const struct cpuidle_state tangier_cstates[] = { +static struct cpuidle_state __ro_after_init tangier_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -861,7 +861,7 @@ static const struct cpuidle_state tangie {} }; -static const struct cpuidle_state avn_cstates[] = { +static struct cpuidle_state __ro_after_init avn_cstates[] = { { .name = "C1", .flags = MWAIT2flg(0x00), @@ -923,7 +923,7 @@ static struct cpuidle_state __ro_after_i {} }; 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Tue, 12 May 2026 08:38:09 -0700 (PDT) Message-ID: <8c46fedd-f1f3-4cad-91fb-1b3b8d58db50@suse.com> Date: Tue, 12 May 2026 17:38:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 7/8] x86/mwait-idle: Add cmdline option to adjust C-states table From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778600289-4217E3FF-6158878D/0/0 X-purgate-type: clean X-purgate-size: 8619 From: Artem Bityutskiy Add a new module parameter that allows adjusting the C-states table used by the driver. Currently, the C-states table is hardcoded in the driver based on the CPU model. The goal is to have good enough defaults for most users. However, C-state characteristics, such as exit latency and residency, can vary between different variants of the same CPU model and BIOS settings. Moreover, different platform usage models and user preferences may benefit from different C-state target_residency values. Provide a way for users to adjust the C-states table via a module parameter "table". The general format is: "state1:latency1:target_residency1,state2:latency2:target_residency2,..." In other words, represent each C-state by its name, exit latency (in microseconds), and target residency (in microseconds), separated by colons. Separate multiple C-states by commas. For example, suppose a CPU has 3 C-states with the following characteristics: C1: exit_latency=1, target_residency=2 C1E: exit_latency=10, target_residency=10 C6: exit_latency=100, target_residency=500 Users can specify a custom C-states table as follows: 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" Result: C1: exit_latency=2, target_residency=2 C1E: exit_latency=5, target_residency=20 C6: exit_latency=150, target_residency=600 2. intel_idle.table="C6::400" Result: C1: exit_latency=1, target_residency=2 (unchanged) C1E: exit_latency=10, target_residency=10 (unchanged) C6: exit_latency=100, target_residency=400 (only target_residency changed) Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. Other adjustments to fit our env. Signed-off-by: Jan Beulich --- For the initial attempt, I've left the new option as a standalone one. It may be worth integrating with "mwait-idle", but I think much of the parsing would then want doing differently. It'll then likely be much harder to apply future Linux changes there. --- v2: Correct example in cmdline doc. --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1916,6 +1916,23 @@ Print boot time MTRR state. Use the MWAIT idle driver (with model specific C-state knowledge) instead of the ACPI based one. +### mwait-idle.table (x86) +> `= ` + + Define the C-states table from a user input string. Expected format is + 'name:latency:residency', where: + - name: The C-state name. + - latency: The C-state exit latency in us. + - residency: The C-state target residency in us. + + Multiple C-states can be defined by separating them with commas: + 'name1:latency1:residency1,name2:latency2:residency2' + + Example: mwait-idle.table=C1:1:1,C1E:5:10,C6:100:600 + + To leave latency or residency unchanged, use an empty field, for example: + 'C1:1:1,C1E::10' - leaves C1E latency unchanged. + ### nmi (x86) > `= ignore | dom0 | fatal` --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -70,6 +70,11 @@ static __initdata bool opt_mwait_idle = true; boolean_param("mwait-idle", opt_mwait_idle); +/* The maximum allowed length for the 'table' module parameter */ +#define MAX_CMDLINE_TABLE_LEN 256 +static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; +string_param("mwait-idle.table", cmdline_table_str); + static unsigned int mwait_substates; #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF @@ -122,6 +127,9 @@ struct cpuidle_state { */ #define CPUIDLE_FLAG_IBRS 0x20000 +/* C-states data from the 'mwait-idle.table' cmdline parameter */ +static struct cpuidle_state cmdline_states[ACPI_PROCESSOR_MAX_POWER] __initdata; + /* * MWAIT takes an 8-bit "hint" in EAX "suggesting" * the C-state (top nibble) and sub-state (bottom nibble) @@ -1547,6 +1555,161 @@ static void __init mwait_idle_state_tabl } } + /** + * get_cmdline_field - Get the current field from a cmdline string. + * @args: The cmdline string to get the current field from. + * @field: Pointer to the current field upon return. + * @sep: The fields separator character. + * + * Examples: + * Input: args="C1:1:1,C1E:2:10", sep=':' + * Output: field="C1", return "1:1,C1E:2:10" + * Input: args="C1:1:1,C1E:2:10", sep=',' + * Output: field="C1:1:1", return "C1E:2:10" + * Ipnut: args="::", sep=':' + * Output: field="", return ":" + * + * Return: The continuation of the cmdline string after the field or NULL. + */ +static char *__init get_cmdline_field(char *args, char **field, char sep) +{ + unsigned int i; + + for (i = 0; args[i] && !isspace(args[i]); i++) { + if (args[i] == sep) + break; + } + + *field = args; + + if (args[i] != sep) + return NULL; + + args[i] = '\0'; + return args + i + 1; +} + +/** + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. + * + * Adjust the C-states table with data from the 'mwait-idle.table' parameter + * (if specified). + */ +static void __init cmdline_table_adjust(void) +{ + char *args = cmdline_table_str; + struct cpuidle_state *state; + unsigned int i, state_count; + + if (args[0] == '\0') + /* The 'mwait-idle.table' module parameter was not specified */ + return; + + /* Create a copy of the C-states table */ + for (i = 0; + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; + i++) + cmdline_states[i] = icpu.state_table[i]; + + state_count = i; + + /* + * Adjust the C-states table copy with data from the 'mwait-idle.table' + * module parameter. + */ + while (args) { + char *fields, *name, *val; + + /* + * Get the next C-state definition, which is expected to be + * '::'. Treat "empty" + * fields as unchanged. For example, + * '::' leaves the latency unchanged. + */ + args = get_cmdline_field(args, &fields, ','); + + /* name */ + fields = get_cmdline_field(fields, &name, ':'); + if (!fields) + goto error; + + /* Find the C-state by its name */ + state = NULL; + for (i = 0; i < state_count; i++) { + if (!strcmp(name, cmdline_states[i].name)) { + state = &cmdline_states[i]; + break; + } + } + + if (!state) { + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", + name); + continue; + } + + /* Latency */ + fields = get_cmdline_field(fields, &val, ':'); + if (!fields) + goto error; + + if (*val) { + const char *end; + unsigned long n = simple_strtoul(val, &end, 0); + + state->exit_latency = n; + if (*end || state->exit_latency != n) + goto error; + } + + /* Target residency */ + fields = get_cmdline_field(fields, &val, ':'); + + if (*val) { + const char *end; + unsigned long n = simple_strtoul(val, &end, 0); + + state->target_residency = n; + if (*end || state->target_residency != n) + goto error; + } + + /* + * Allow for 3 more fields, but ignore them. Helps to make + * possible future extensions of the cmdline format backward + * compatible. + */ + for (i = 0; fields && i < 3; i++) { + fields = get_cmdline_field(fields, &val, ':'); + if (!fields) + break; + } + + if (fields) { + printk(XENLOG_ERR PREFIX + "Too many fields for C-state '%s'\n", + state->name); + goto error; + } + + printk(XENLOG_INFO PREFIX + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", + state->name, state->exit_latency, state->target_residency); + } + + /* Copy the adjusted C-states table back */ + for (i = 0; i < state_count; i++) + icpu.state_table[i] = cmdline_states[i]; + + printk(XENLOG_INFO PREFIX + "Adjusted C-states with data from 'mwait-idle.table'\n"); + return; + + error: + printk(PREFIX + "Failed to adjust C-states with data from 'mwait-idle.table'\n"); +} + static int __init mwait_idle_probe(void) { unsigned int eax, ebx, ecx; @@ -1596,6 +1759,8 @@ static int __init mwait_idle_probe(void) mwait_idle_state_table_update(); + cmdline_table_adjust(); + return 0; } From xen-devel-bounces@lists.xenproject.org Tue May 12 15:38:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:38:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307041.1578782 (Exim 4.92) (envelope-from ) id 1wMpBs-0006yV-Rw; Tue, 12 May 2026 15:38:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307041.1578782; Tue, 12 May 2026 15:38:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpBs-0006xs-Oz; Tue, 12 May 2026 15:38:36 +0000 Received: by outflank-mailman (input) for mailman id 1307041; Tue, 12 May 2026 15:38:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpBr-0006ve-1f for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:38:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpBq-004MKj-Eh for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:38:34 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a03495d-5cb7-0a2a0a5109dd-0a2a4505e454-42 for ; Tue, 12 May 2026 17:38:34 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a03497a-aaa8-0a2a45050019-d1558034dc9f-3 for ; Tue, 12 May 2026 17:38:34 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48909558b3aso58479815e9.0 for ; Tue, 12 May 2026 08:38:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 08:38:33 -0700 (PDT) Message-ID: Date: Tue, 12 May 2026 17:38:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH for-4.22 v2 8/8] x86/mwait-idle: Add C-states validation From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778600314-DAD6F443-93512BCA/0/0 X-purgate-type: clean X-purgate-size: 3148 From: Artem Bityutskiy Add validation for C-states specified via the "table=" module parameter. Treat this module parameter as untrusted input and validate it thoroughly. Signed-off-by: Artem Bityutskiy Link: https://patch.msgid.link/20251216080402.156988-4-dedekind1@gmail.com Signed-off-by: Rafael J. Wysocki Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git be6a150829b3 Add __init to validate_cmdline_cstate(). Other adjustments to fit our env. Signed-off-by: Jan Beulich --- v2: Const-ify validate_cmdline_cstate()'s parameters. --- a/xen/arch/x86/cpu/mwait-idle.c +++ b/xen/arch/x86/cpu/mwait-idle.c @@ -72,6 +72,11 @@ boolean_param("mwait-idle", opt_mwait_id /* The maximum allowed length for the 'table' module parameter */ #define MAX_CMDLINE_TABLE_LEN 256 +/* Maximum allowed C-state latency */ +#define MAX_CMDLINE_LATENCY_US (5 * 1000 /* USEC_PER_MSEC */) +/* Maximum allowed C-state target residency */ +#define MAX_CMDLINE_RESIDENCY_US (100 * 1000 /* USEC_PER_MSEC */) + static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; string_param("mwait-idle.table", cmdline_table_str); @@ -1590,6 +1595,41 @@ static char *__init get_cmdline_field(ch } /** + * validate_cmdline_cstate - Validate a C-state from cmdline. + * @state: The C-state to validate. + * @prev_state: The previous C-state in the table or NULL. + * + * Return: 0 if the C-state is valid or -EINVAL otherwise. + */ +static int __init validate_cmdline_cstate(const struct cpuidle_state *state, + const struct cpuidle_state *prev_state) +{ + if (state->exit_latency == 0) + /* Exit latency 0 can only be used for the POLL state */ + return -EINVAL; + + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) + return -EINVAL; + + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) + return -EINVAL; + + if (state->target_residency < state->exit_latency) + return -EINVAL; + + if (!prev_state) + return 0; + + if (state->exit_latency <= prev_state->exit_latency) + return -EINVAL; + + if (state->target_residency <= prev_state->target_residency) + return -EINVAL; + + return 0; +} + +/** * cmdline_table_adjust - Adjust the C-states table with data from cmdline. * * Adjust the C-states table with data from the 'mwait-idle.table' parameter @@ -1697,6 +1737,21 @@ static void __init cmdline_table_adjust( state->name, state->exit_latency, state->target_residency); } + /* Validate the adjusted C-states */ + for (i = 0; i < state_count; i++) { + struct cpuidle_state *prev_state; + + state = &cmdline_states[i]; + prev_state = i ? &cmdline_states[i - 1] : NULL; + + if (validate_cmdline_cstate(state, prev_state)) { + printk(XENLOG_ERR PREFIX + "C-state '%s' validation failed\n", + state->name); + goto error; + } + } + /* Copy the adjusted C-states table back */ for (i = 0; i < state_count; i++) icpu.state_table[i] = cmdline_states[i]; From xen-devel-bounces@lists.xenproject.org Tue May 12 15:39:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:39:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307053.1578791 (Exim 4.92) (envelope-from ) id 1wMpCy-0007ac-4A; Tue, 12 May 2026 15:39:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307053.1578791; Tue, 12 May 2026 15:39:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpCy-0007aV-1X; Tue, 12 May 2026 15:39:44 +0000 Received: by outflank-mailman (input) for mailman id 1307053; Tue, 12 May 2026 15:39:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpCw-0007aL-LQ for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:39:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpCw-00AMT0-2C for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:39:42 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0349a6-bab6-0a2a0a5309dd-0a2a4501e428-36 for ; Tue, 12 May 2026 17:39:42 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0349bd-c1f2-0a2a45010019-d155802acc0b-3 for ; Tue, 12 May 2026 17:39:41 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so60580955e9.0 for ; Tue, 12 May 2026 08:39:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1778600382-AE342FF4-B284F238/0/0 X-purgate-type: clean X-purgate-size: 516 On 12.05.2026 17:34, Jan Beulich wrote: > Includes a few custom changes, too. > > 1: arrange for BSP MSR adjustments during S3 resume > 2: clean up BYT/CHT auto demotion disable > 3: latch struct idle_cpu contents > 4: move pre-initialized struct idle_cpu instances > 5: Remove the 'preferred_cstates' parameter > 6: drop const from struct cpuidle_state arrays > 7: Add cmdline option to adjust C-states table > 8: Add C-states validation I probably should have Cc-ed you on the v2 submission. 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In order not to make it easy for a domU > to query existence of a domid, adding permission for a non-existing > domain is not rejected by Xenstore. The XSA-417 patches solved that > problem by adding a flag to a permission entry referencing a not > existing domain, indicating that the permission should not be > effective for Xenstore. > > One corner case was not handled: > > Consider guest 1 and guest 2 running. Guest 1 adds guest 2 to be able > to access a Xenstore entry. Now guest 2 is removed from the system and > a new guest 3 with the same domid as guest 2 had is being created. > > When guest 3 would try now to access the Xenstore entry, it would fail, > as Xenstore would see that the Xenstore entry is older than guest 3. > > But if guest 1 is modifying the permissions of the Xenstore entry > again, e.g. by adding another domain, the permission entry for guest 2 > would lose its "special flag", resulting in guest 3 now really gaining > access to the Xenstore entry. > > This series is fixing this problem by the following means: > > - In order to allow guests to know that a Xenstore entry permission > might have gone stale, allow unprivileged guests to receive > @releaseDomain watch events. This doesn't open a security hole, as > the only knowledge which can by gathered from that change is that a > domain is gone, not that a domain with a specific domid is existing. > > - When a domain is removed, remove all permissions relating to this > domain from all Xenstore entries. > > Note that this issue was discussed by the Xen security team and we > decided not to issue an XSA, as there are no known use cases where one > unprivileged guest would grant access to its Xenstore nodes to more > than one other unprivileged guests. > > We decided to delay this patch series until the watch depth feature has > been committed, as with that feature available it is now possible for > a guest to handle the death of a specific domain in a sane way. > > Changes in V2: > - some minor comments addressed > > Denis Mukhin (1): > xen/public: introduce DOMID_ANY > > Juergen Gross (3): > tools/xenstored: add support for "all domains" node permission > tools/xenstored: allow @releaseDomain watch for all domains > tools/xenstored: remove permissions related to dead domain > > docs/man/xl.cfg.5.pod.in | 4 ++ > tools/xenstored/core.c | 45 ++++++++++++++----- > tools/xenstored/domain.c | 78 +++++++++++++++++++++------------ > tools/xenstored/domain.h | 3 +- > xen/include/public/io/xs_wire.h | 2 + > xen/include/public/xen.h | 7 +++ > 6 files changed, 100 insertions(+), 39 deletions(-) > Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 12 15:53:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:53:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307082.1578810 (Exim 4.92) (envelope-from ) id 1wMpPq-0002zK-IL; Tue, 12 May 2026 15:53:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307082.1578810; Tue, 12 May 2026 15:53:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpPq-0002zD-FT; Tue, 12 May 2026 15:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1307082; Tue, 12 May 2026 15:53:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMpPo-0002z7-Th for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:53:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpPo-004OV0-7B for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:53:00 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034cd7-5cb7-0a2a0a5109dd-0a2a450193be-6 for ; Tue, 12 May 2026 17:53:00 +0200 Received: from [209.85.208.50] (helo=mail-ed1-f50.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034cdb-c1f2-0a2a45010019-d155d032c0ad-3 for ; Tue, 12 May 2026 17:53:00 +0200 Received: by mail-ed1-f50.google.com with SMTP id 4fb4d7f45d1cf-67e2498f3a7so9388797a12.2 for ; Tue, 12 May 2026 08:53:00 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------lTQ1cRUfiNgBk99CdoxkFxlz" X-purgate-ID: tlsNG-d62444/1778601180-B7555FF4-13DA3B1C/10/73395122804 X-purgate-type: spam X-purgate-size: 12454 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------lTQ1cRUfiNgBk99CdoxkFxlz Content-Type: multipart/mixed; boundary="------------RODOeHPUGP0nvgf27v1Dq21C"; protected-headers="v1" From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= To: Oleksii Kurochko , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Message-ID: <06e1554e-87b0-4aae-ac55-a547bf810a92@suse.com> Subject: Re: [PATCH v2 0/4] tools/xenstore: fix issue related to XSA-417 References: <20260429120619.1013440-1-jgross@suse.com> <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> In-Reply-To: <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------RODOeHPUGP0nvgf27v1Dq21C Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoDTNoFAwAAAAAACgkQsN6d1ii/Ey8X AQf/czV3eozegtxuUwnqXhiGgwIW0+htQ26fLwRZTRSIMNM7bZQTVPEurz4IhVZa3LR9GXypS20J P0H80L7JChOdFdXkgiiRcAJ0zOSf+z+f7bzPjSva60toaP+ZBuNp3tSXCHr7hQoD/v7xlKIF2Ogr TvP97mKMsZUIoPVWCjNLYfMyYz7hioOhhG1b7idhRb3Qe+mEFKRuB0L96sOiJ/jvny0fQHGaAZ7e i6Jhhh2p+Bes3gJ+vv1JBWFyliP9Eb1/i0FHgldbvHcWsHOz78oRenefOKX065nSxSjmY/ExTO2E qcz3iwSFv2g0Ojpfjz+jGCsBdnqgDKTjn2TUL7Pmrw== =NhOb -----END PGP SIGNATURE----- --------------lTQ1cRUfiNgBk99CdoxkFxlz-- From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307094.1578837 (Exim 4.92) (envelope-from ) id 1wMpSd-0003uT-Fr; Tue, 12 May 2026 15:55:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307094.1578837; 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[78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8d69d0bsm4361335e9.13.2026.05.12.08.55.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 08:55:51 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778601352; x=1779206152; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=eWLklbcInMPQObYaiBnOHsAE/t9hZPY8o89RLu9YkzU=; b=O9THNi4xrLB6Y1oPM3C5RAVefSiWxB0mUz1/YviUnYfo77kyEii4xWoAaSKojZpRRo Ou71vQ/vApP4fDmX+Gguo8TN2NqBAu0j7H+nmj9FLLOqlk7SFrltzAMYF1pMnOQclL+M EZuXEP9bezZLP3AignX6yU2lpNTpWoKZQcTyc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778601352; x=1779206152; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=eWLklbcInMPQObYaiBnOHsAE/t9hZPY8o89RLu9YkzU=; b=gHce2PX/HUB0AsAD88hC5IpcZXfu39enfhZnTG/LxSYZwnxLu3g8ZQbYAfgbKIWE2H Sqc13k6FDtLO/g4T32O/MwjSMlVDHnsLHH03ylNIcbaQlF4gjzZg6+oZBZzZe86RDrVE YboDLtXvuXN+JuLMNKbI0Qo/P8lseQ9oCtpeofUXW0NhlAdi+xzos9hw72kGUpZTON2f 6fwU4qgpa9qRWi2HW133eCOxEdMEGMUPB/KwPJW7Bf3Lah/Qq9q8ZqvAFasuB+PJS2gJ GVSt6r1jgaZvDRrN5um3UKvztEbQJyBCFexdFdV6DBZBvm2cRbPFrH3kdrB+FTO7ZWOH aEeQ== X-Gm-Message-State: AOJu0YxjKKhf3PQX4vVaAEdXit5cmzIegT0g2tJvK/4SjHkgdBrFoEpz qypkpjHqKsW0jswSZ7gIFt/ZiUZXNV78yGXzKvwMgvKC6T3CjQbiwHbsup6+jOnEEgf+QPhFOKn uV/l7zVc= X-Gm-Gg: Acq92OFZnFGKEj3datAxcOHrrQ4jtTaTOf6u+neKNOvtTKw21+BOwLQLapg3RE745ja XUqdC7AH/NqrIIcOcPQbazjxV/hRp3z9hh90Tzl62rz+G3OJ2l0C7c2WmnIREQWffj4KYBVaJmz I9kSPm0oFQnadFel535d6fbBkRBbLEcIxpyVF0uIYabQU3EJTEvTW3oSpUU5vr+jzwW+fucxipF V3f4GjvFntZcO/r+5xcnX/3YwVemyPunPA6pJAW5nhRG//vRjhXi668WrSBF7ecG1QKZe9fu3C0 6No2r3iu3EAwhyaMMeysgKb6vvVVqWlaET7Z7zL1yOnBeXBAU7SICwyCSXPqNrerMyMj8npUjD9 a6403XygFWeHoJihhpGCWrwidM5vpvDDUUQY8dHjpQs21T7s7fo/+2Q4Ud+fSSgiNYiFGhaLCrA c0GF7GRUBSPqpbgYmfRirhv3J2MHgy2zbs2G5hJXwKPJTBtMw+Z+fFEwqeZMAhICOpfMfiXGnTw nmn X-Received: by 2002:a05:600c:45d0:b0:488:7ff6:1f75 with SMTP id 5b1f17b1804b1-48e707f821dmr238327625e9.21.1778601351719; Tue, 12 May 2026 08:55:51 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko Subject: [PATCH 2/2] tests/paging-mempool: Extend to test P2M relocation Date: Tue, 12 May 2026 16:55:40 +0100 Message-Id: <20260512155540.1733403-3-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260512155540.1733403-1-andrew.cooper3@citrix.com> References: <20260512155540.1733403-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778601352-37F7EA53-072FC948/10/73395122804 X-purgate-type: spam X-purgate-size: 12153 XENMAPSPACE_gmfn_range was found to be buggy with overlapping ranges, and the fix is sufficiently far from clear that yours truely decided a test was in order. XENMAPSPACE_gmfn_range is exposed by xendevicemodel_relocate_memory() so take the opportunity to create a better example for others to copy. The test works as follows. Populate 2M of RAM in the guest, marking the pages so they can be identified later. Then construct four relocation test cases (overlapping vs non-overlapping, forwards vs backwards) using the marks in the guest pages to confirm that the P2M was adjusted correctly. The use of XEN_DOMCTL_CDF_iommu forces xenmem_add_to_physmap() to limit the iteration count to a maximum of 16. Use this to force a continuation and exercise more of the logic. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Oleksii Kurochko paging-mempool isn't necessary the best named test to put this in, but it's the one with the best structure to fit it. We are going to want to shuffle the testing structure a bit when we've got a couple more examples to draw good lines between. Without "memory: overlapping XENMAPSPACE_gmfn_range requests", this fails: ... Test p2m memory relocation Test forward, no overlap: GFNs [3e0...3ff] -> [400...41f] Test forward, overlapping: GFNs [3c0...3df] -> [3c1...3e0] Fail: check mark unable to map 003c1: -22 Fail: check mark unable to map 003c2: -22 Fail: check mark unable to map 003c3: -22 Fail: check mark unable to map 003c4: -22 Fail: check mark unable to map 003c5: -22 Fail: check mark unable to map 003c6: -22 Fail: check mark unable to map 003c7: -22 Fail: check mark unable to map 003c8: -22 Fail: check mark unable to map 003c9: -22 Fail: check mark unable to map 003ca: -22 Fail: check mark unable to map 003cb: -22 Fail: check mark unable to map 003cc: -22 Fail: check mark unable to map 003cd: -22 Fail: check mark unable to map 003ce: -22 Fail: check mark unable to map 003cf: -22 Fail: check mark unable to map 003d0: -22 Fail: check mark unable to map 003d1: -22 Fail: check mark unable to map 003d2: -22 Fail: check mark unable to map 003d3: -22 Fail: check mark unable to map 003d4: -22 Fail: check mark unable to map 003d5: -22 Fail: check mark unable to map 003d6: -22 Fail: check mark unable to map 003d7: -22 Fail: check mark unable to map 003d8: -22 Fail: check mark unable to map 003d9: -22 Fail: check mark unable to map 003da: -22 Fail: check mark unable to map 003db: -22 Fail: check mark unable to map 003dc: -22 Fail: check mark unable to map 003dd: -22 Fail: check mark unable to map 003de: -22 Fail: check mark unable to map 003df: -22 Fail: check mark: gfn 003e0 expecting fffffe20 (479), got fffffe3f (448) With the fix in place, the test passes: ... Test p2m memory relocation Test forward, no overlap: GFNs [3e0...3ff] -> [400...41f] Test forward, overlapping: GFNs [3c0...3df] -> [3c1...3e0] Test backwards, no overlap: GFNs [200...21f] -> [1e0...1ff] Test backwards, no overlap: GFNs [220...23f] -> [21f...23e] --- tools/tests/paging-mempool/Makefile | 4 + .../paging-mempool/test-paging-mempool.c | 197 +++++++++++++++++- xen/common/memory.c | 2 +- 3 files changed, 201 insertions(+), 2 deletions(-) diff --git a/tools/tests/paging-mempool/Makefile b/tools/tests/paging-mempool/Makefile index a1e12584ce80..7444d81b8460 100644 --- a/tools/tests/paging-mempool/Makefile +++ b/tools/tests/paging-mempool/Makefile @@ -25,9 +25,13 @@ uninstall: CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) +CFLAGS += $(CFLAGS_libxendevicemodel) +CFLAGS += $(CFLAGS_libxenforeignmemory) CFLAGS += $(APPEND_CFLAGS) LDFLAGS += $(LDLIBS_libxenctrl) +LDFLAGS += $(LDLIBS_libxendevicemodel) +LDFLAGS += $(LDLIBS_libxenforeignmemory) LDFLAGS += $(APPEND_LDFLAGS) %.o: Makefile diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index d1207d26d3fc..fc0375358324 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -6,6 +6,7 @@ #include #include +#include #include #include #include @@ -19,10 +20,15 @@ static unsigned int nr_failures; }) static xc_interface *xch; +static xendevicemodel_handle *dh; +static xenforeignmemory_handle *fh; static uint32_t domid; static struct xen_domctl_createdomain create = { - .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, + .flags = (XEN_DOMCTL_CDF_hvm | + XEN_DOMCTL_CDF_hap | + XEN_DOMCTL_CDF_iommu | + 0), .max_vcpus = 1, .max_grant_frames = 1, .grant_opts = XEN_DOMCTL_GRANT_version(1), @@ -145,6 +151,183 @@ static int test_paging_mempool_size(void) return 0; } +static int mark_guest_mem(xen_pfn_t gfn, size_t count) +{ + xen_pfn_t gfns[count]; + uint32_t *mem; + size_t i; + int rc; + + for ( i = 0; i < count; ++i ) + gfns[i] = gfn + i; + + mem = xenforeignmemory_map(fh, domid, PROT_READ | PROT_WRITE, + count, gfns, NULL); + if ( !mem ) + return fail(" Fail: mark mem foreign map: %d - %s\n", + errno, strerror(errno)); + + for ( i = 0; i < count; ++i ) + { + uint32_t *mark = &mem[i << 10]; + + *mark = ~i; + } + + rc = xenforeignmemory_unmap(fh, mem, count); + if ( rc ) + return fail(" Fail: mark mem foreign unmap: %d - %s\n", + errno, strerror(errno)); + + return 0; +} + +static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) +{ + xen_pfn_t gfns[count]; + int errs[count]; + uint32_t *mem; + size_t i; + int rc = 0; + + for ( i = 0; i < count; ++i ) + gfns[i] = gfn + i; + + mem = xenforeignmemory_map(fh, domid, PROT_READ, + count, gfns, errs); + if ( !mem ) + return fail(" Fail: check mark foreign map: %d - %s\n", + errno, strerror(errno)); + + for ( i = 0; i < count; ++i ) + { + uint32_t *mark = &mem[i << 10]; + uint32_t exp = ~(mark_start + i); + + if ( errs[i] ) + { + rc = -1; + fail(" Fail: check mark unable to map %05lx: %d\n", gfns[i], errs[i]); + continue; + } + + if ( *mark == exp ) + continue; + + fail(" Fail: check mark: gfn %05lx expecting %08x (%u), got %08x (%u)\n", + gfns[i], exp, ~exp, *mark, ~*mark); + rc = -1; + } + + if ( xenforeignmemory_unmap(fh, mem, count) ) + return fail(" Fail: check marks foreign unmap: %d - %s\n", + errno, strerror(errno)); + + return rc; +} + +static int test_p2m_relocate_memory(void) +{ +#define GFN_2M ((2UL << 20) >> 12) +#define GFN_4M ((4UL << 20) >> 12) + + xen_pfn_t physmap[] = { GFN_2M }; + int rc; + + /* + * Inherited state of the domain: + * - Unlimited allocation + * + * Construction of the test: + * - Populate 2M at 2M, mark the pages. + */ + printf("Test p2m memory relocation\n"); + + rc = xc_domain_populate_physmap_exact(xch, domid, ARRAY_SIZE(physmap), + 9 /* order 2M */, 0 /* flags */, physmap); + if ( rc ) + return fail(" Fail: populate physmap: %d - %s\n", + errno, strerror(errno)); + + rc = mark_guest_mem(GFN_2M, 1 << 9 /* order 2M */); + if ( rc ) + return rc; + + /* Sanity check the start and end markers. */ + if ( (rc = check_guest_marks(GFN_2M, 0, 8)) || + (rc = check_guest_marks(GFN_4M - 8, 512 - 8, 8)) ) + return rc; + + +#define GFN_PAIR(g, c) (g), ((g) + (c) - 1) + + /* + * Move the final 32 pages below 4M forward by 32 pages. All destination + * GFNs free, and no overlap. + */ + printf(" Test forward, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_4M - 32, 32), GFN_PAIR(GFN_4M, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_4M - 32, GFN_4M); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_4M, 512 - 32, 32); + if ( rc ) + return rc; + + /* + * Move the next 32 pages below 4M forward by 1 page. The region is + * almost completely overlapping. + */ + printf(" Test forward, overlapping: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_4M - 64, 32), GFN_PAIR(GFN_4M - 63, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_4M - 64, GFN_4M - 63); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_4M - 63, 512 - 64, 32); + if ( rc ) + return rc; + + /* + * Move the first 32 pages above 2M backwards by 32 pages. All + * destination GFNs free, and no overlap. + */ + printf(" Test backwards, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_2M, 32), GFN_PAIR(GFN_2M - 32, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_2M, GFN_2M - 32); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_2M - 32, 0, 32); + if ( rc ) + return rc; + + /* + * Move the next 32 pages above 2M backwards by 1 page. The region is + * almost completely overlapping. + */ + printf(" Test backwards, no overlap: GFNs [%lx...%lx] -> [%lx...%lx]\n", + GFN_PAIR(GFN_2M + 32, 32), GFN_PAIR(GFN_2M + 31, 32)); + + rc = xendevicemodel_relocate_memory(dh, domid, 32, GFN_2M + 32, GFN_2M + 31); + if ( rc ) + return fail(" Fail: relocate memory: %d - %s\n", + errno, strerror(errno)); + + rc = check_guest_marks(GFN_2M + 31, 32, 32); + if ( rc ) + return rc; + + return 0; +} + static int run_tests(void) { int rc; @@ -153,6 +336,10 @@ static int run_tests(void) if ( rc ) return rc; + rc = test_p2m_relocate_memory(); + if ( rc ) + return rc; + return 0; } @@ -166,6 +353,14 @@ int main(int argc, char **argv) if ( !xch ) err(1, "xc_interface_open"); + dh = xendevicemodel_open(NULL, 0); + if ( !dh ) + err(1, "xendevicemodel_open"); + + fh = xenforeignmemory_open(NULL, 0); + if ( !fh ) + err(1, "xenforeignmemory_open"); + rc = xc_domain_create(xch, &domid, &create); if ( rc ) { diff --git a/xen/common/memory.c b/xen/common/memory.c index 1ad4b51c5b02..c6109dc7d664 100644 --- a/xen/common/memory.c +++ b/xen/common/memory.c @@ -962,7 +962,7 @@ int xenmem_add_to_physmap(struct domain *d, struct xen_add_to_physmap *xatp, unsigned int done = 0; long rc = 0; union add_to_physmap_extra extra = {}; - struct page_info *pages[16]; + struct page_info *pages[16]; /* If changing this, adjust test-paging-mempool too */ if ( !paging_mode_translate(d) ) { -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307093.1578825 (Exim 4.92) (envelope-from ) id 1wMpSc-0003XP-7j; Tue, 12 May 2026 15:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307093.1578825; Tue, 12 May 2026 15:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSc-0003WC-1l; Tue, 12 May 2026 15:55:54 +0000 Received: by outflank-mailman (input) for mailman id 1307093; Tue, 12 May 2026 15:55:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wMpSa-0003UK-Vd for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpSa-001eB7-CF for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:55:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034d80-2eae-0a2a0a5409dd-0a2a450696ee-8 for ; Tue, 12 May 2026 17:55:52 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034d88-7371-0a2a45060019-d155802dd027-3 for ; Tue, 12 May 2026 17:55:52 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so55895555e9.2 for ; Tue, 12 May 2026 08:55:52 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Rename run_tests() to test_paging_mempool_size() and have it return int so the newly wrapping run_tests() can decide whether to run the next or not. Comment the parameters to xc_domain_populate_physmap_exact() to make it clearer what's going on, and remove the page added to the physmap when the test is done. No practical change. Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Oleksii Kurochko --- .../paging-mempool/test-paging-mempool.c | 25 ++++++++++++++++--- 1 file changed, 22 insertions(+), 3 deletions(-) diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 1ebc13455ac2..d1207d26d3fc 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -15,6 +15,7 @@ static unsigned int nr_failures; ({ \ nr_failures++; \ (void)printf(fmt, ##__VA_ARGS__); \ + -1; \ }) static xc_interface *xch; @@ -40,7 +41,7 @@ static uint64_t default_mempool_size_bytes = 16 << 12; #endif -static void run_tests(void) +static int test_paging_mempool_size(void) { xen_pfn_t physmap[] = { 0 }; uint64_t size_bytes, old_size_bytes; @@ -80,7 +81,8 @@ static void run_tests(void) return fail(" Fail: setmaxmem: : %d - %s\n", errno, strerror(errno)); - rc = xc_domain_populate_physmap_exact(xch, domid, 1, 0, 0, physmap); + rc = xc_domain_populate_physmap_exact(xch, domid, ARRAY_SIZE(physmap), + 0 /* order 4k */, 0 /* flags */, physmap); if ( rc ) return fail(" Fail: populate physmap: %d - %s\n", errno, strerror(errno)); @@ -98,6 +100,11 @@ static void run_tests(void) return fail(" Fail: mempool size changed %"PRIu64" => %"PRIu64"\n", old_size_bytes, size_bytes); + /* We added one 4k page. Check we can remove it. */ + rc = xc_domain_remove_from_physmap(xch, domid, physmap[0]); + if ( rc ) + return fail(" Fail: remove from physmap: %d - %s\n", + errno, strerror(errno)); printf("Test bad set size\n"); @@ -134,6 +141,19 @@ static void run_tests(void) if ( size_bytes != 64 << 20 ) return fail(" Fail: expected mempool size %u, got %"PRIu64"\n", 64 << 20, size_bytes); + + return 0; +} + +static int run_tests(void) +{ + int rc; + + rc = test_paging_mempool_size(); + if ( rc ) + return rc; + + return 0; } int main(int argc, char **argv) @@ -143,7 +163,6 @@ int main(int argc, char **argv) printf("Paging mempool tests\n"); xch = xc_interface_open(NULL, NULL, 0); - if ( !xch ) err(1, "xc_interface_open"); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 15:55:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 15:55:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307092.1578819 (Exim 4.92) (envelope-from ) id 1wMpSb-0003Ud-VH; Tue, 12 May 2026 15:55:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307092.1578819; Tue, 12 May 2026 15:55:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSb-0003UW-ST; Tue, 12 May 2026 15:55:53 +0000 Received: by outflank-mailman (input) for mailman id 1307092; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpSa-0003UE-Hc for xen-devel@lists.xenproject.org; Tue, 12 May 2026 15:55:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpSZ-00AP0L-HM for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:55:51 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034d71-bab6-0a2a0a5309dd-0a2a4509d370-42 for ; Tue, 12 May 2026 17:55:51 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034d87-2497-0a2a45090019-d155802ae877-3 for ; Tue, 12 May 2026 17:55:51 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488ff90d6c7so51665355e9.2 for ; Tue, 12 May 2026 08:55:51 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Tue, 12 May 2026 08:55:50 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Oleksii Kurochko Subject: [PATCH 0/2] tests/paging-mempool: Testing for P2M relocation Date: Tue, 12 May 2026 16:55:38 +0100 Message-Id: <20260512155540.1733403-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: e3af387a-dd8b-4d58-8356-777319c7a2bf@suse.com References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778601351-4216DA53-B5ABC0E1/0/0 X-purgate-type: clean X-purgate-size: 371 Andrew Cooper (2): tests/paging-mempool: Misc cleanup tests/paging-mempool: Extend to test P2M relocation tools/tests/paging-mempool/Makefile | 4 + .../paging-mempool/test-paging-mempool.c | 222 +++++++++++++++++- xen/common/memory.c | 2 +- 3 files changed, 223 insertions(+), 5 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 12 16:00:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:00:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307119.1578847 (Exim 4.92) (envelope-from ) id 1wMpXO-0007Gd-0m; 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But since the code > change didn't end up overly intrusive, I thought I would go the "fix it" > route first. > --- > v2: Adjust XEN_DMOP_relocate_memory handling for the working-backwards > case. Acked-by: Andrew Cooper Tested-by: Andrew Cooper I can't say that I've understood everything going on here (hence the test case), but the test case says it does fix the bug I reported. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 12 16:02:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:02:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307130.1578863 (Exim 4.92) (envelope-from ) id 1wMpYv-0007uT-Pz; Tue, 12 May 2026 16:02:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307130.1578863; Tue, 12 May 2026 16:02:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpYv-0007tZ-Jn; Tue, 12 May 2026 16:02:25 +0000 Received: by outflank-mailman (input) for mailman id 1307130; Tue, 12 May 2026 16:02:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpYt-0007pW-LN; Tue, 12 May 2026 16:02:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpYt-00AUkp-25; Tue, 12 May 2026 18:02:23 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a034f05-2eae-0a2a0a5409dd-0a2a4502ad60-28 for ; Tue, 12 May 2026 18:02:23 +0200 Received: from [104.130.215.37] (helo=mail.xenproject.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a034f0d-af86-0a2a45020019-6882d725d11a-3 for ; Tue, 12 May 2026 18:02:22 +0200 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wMpYl-001iLv-2l; Tue, 12 May 2026 16:02:15 +0000 Received: from andrewcoop by xenbits.xenproject.org with local (Exim 4.96) (envelope-from ) id 1wMpYl-001fwg-1X; Tue, 12 May 2026 16:02:15 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Content-Type: multipart/mixed; boundary="=separator"; charset="utf-8" Content-Transfer-Encoding: binary MIME-Version: 1.0 X-Mailer: MIME-tools 5.510 (Entity 5.510) To: xen-announce@lists.xen.org, xen-devel@lists.xen.org, xen-users@lists.xen.org, oss-security@lists.openwall.com From: Xen.org security team CC: Xen.org security team Subject: Xen Security Advisory 490 v1 (CVE-2025-54518) - x86: CPU Opcode Cache corruption Message-Id: Date: Tue, 12 May 2026 16:02:15 +0000 X-purgate-ID: tlsNG-720697/1778601742-82969161-928BE5B8/0/0 X-purgate-type: clean X-purgate-size: 29472 --=separator Content-Type: text/plain; charset="utf-8" Content-Disposition: inline Content-Transfer-Encoding: 7bit -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA256 Xen Security Advisory CVE-2025-54518 / XSA-490 x86: CPU Opcode Cache corruption ISSUE DESCRIPTION ================= AMD have disclosed a potential vulnerability in certain CPUs which can cause instructions to execute at a higher privilege. For more information, see: https://www.amd.com/en/resources/product-security/bulletin/amd-sb-7052.html IMPACT ====== Code of any privilege could escalate to a higher privilege, including userspace to kernel, and guest to host. VULNERABLE SYSTEMS ================== Systems running all versions of Xen are affected. Only AMD Fam17h CPUs (Zen2 microarchitecture) are believed to be vulnerable. Other AMD CPUs and CPUs from other manufacturers are not known to be affected. MITIGATION ========== There are no mitigations. RESOLUTION ========== Applying the appropriate attached patch resolves this issue. For Xen 4.17, patch 1 is a backport of a change which only went back as far as 4.18 under normal bugfix rules, but which is tightly texturally coupled with the XSA-940 fix. It is possible to rework patch 2 to avoid patch 1, but a number of Xen-focused downstreams already have patch 1 backported, and those without patch 1 really ought to take it. So, while this is slightly abnormal for an XSA, it is believed to be in the best interest of everyone with a 4.17 based Xen. Note that patches for released versions are generally prepared to apply to the stable branches, and may not apply cleanly to the most recent release tarball. Downstreams are encouraged to update to the tip of the stable branch before applying these patches. xsa490.patch xen-unstable xsa490-4.21.patch Xen 4.21.x - Xen 4.18.x xsa490-4.17-?.patch Xen 4.17.x $ sha256sum xsa490* 7c256d3384bf640d171ae2f18930c193a72bbdd92ebeb8942e58634dd7b27439 xsa490.patch 4d64d95937630f2147bb69d0d0ff24fc7d97efd48e376d882265662f93886ec7 xsa490-4.17-1.patch 6c717a5bd914088463c74b89893672388848a2222165478aed63b6c2a4151e28 xsa490-4.17-2.patch 1e397550a542bc0957bf93a6e6f01ffcdfe8f005697a505c62ec6120a72d3f90 xsa490-4.21.patch $ -----BEGIN PGP SIGNATURE----- iQFABAEBCAAqFiEEI+MiLBRfRHX6gGCng/4UyVfoK9kFAmoDTuQMHHBncEB4ZW4u b3JnAAoJEIP+FMlX6CvZn38H/2xujQ3YDEsE2U8RiH/6M1yVxnATlCEqEPBxIcVX h6W4QMzlFw/IXZBi6twduuzMME2uX6eKWCbE9riw2v4lybgNYMxV20oW86LhjLwr uL1NHJ3Fop1IuRy+po20jmT9sPfpieHU9zGmFvgd/k91gSZ1b/5G8k36MtgODL0j 4Svsdo3LYSvULQn5EymjO/t57ZZIDBWj5Od7aBbPuGkQKtW6+/UCE0JnrzOtP+Di 0Y5bBSUhwrMh0h32AV/w2nwvFQN/EeyakfjDWQc1ST6wHzFMLSo2kaY40TZ6C+T8 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nhdrsghrohgushhkhiesrghrmhdrtghomhdprhgtphhtthhopegsohhrihhsrdhoshhtrh hovhhskhihsehorhgrtghlvgdrtghomhdprhgtphhtthhopehtghhlgieskhgvrhhnvghl rdhorhhgpdhrtghpthhtohepmhhinhhgohesrhgvughhrghtrdgtohhmpdhrtghpthhtoh epsghpsegrlhhivghnkedruggvpdhrtghpthhtohepuggrvhgvrdhhrghnshgvnheslhhi nhhugidrihhnthgvlhdrtghomh X-ME-Proxy: Feedback-ID: i1568416f:Fastmail Date: Tue, 12 May 2026 18:05:01 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Juergen Gross Cc: linux-kernel@vger.kernel.org, x86@kernel.org, kevin.brodsky@arm.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving Message-ID: References: <20260508143933.493013-1-jgross@suse.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="TX6pd/gDPiw+HuTq" Content-Disposition: inline In-Reply-To: <20260508143933.493013-1-jgross@suse.com> X-purgate-ID: tlsNG-bad1c0/1778601913-42573A53-857CACF2/0/0 X-purgate-type: clean X-purgate-size: 3498 --TX6pd/gDPiw+HuTq Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 12 May 2026 18:05:01 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Juergen Gross Cc: linux-kernel@vger.kernel.org, x86@kernel.org, kevin.brodsky@arm.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving On Fri, May 08, 2026 at 04:39:33PM +0200, Juergen Gross wrote: > With the support of nested lazy mmu sections it can happen that > arch_enter_lazy_mmu_mode() is being called twice without a call of > arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers > are not disabling preemption when checking for nested lazy mmu > sections. >=20 > This is a problem when running as a Xen PV guest, as > xen_enter_lazy_mmu() and xen_leave_lazy_mmu() don't tolerate this > case. >=20 > Fix that in xen_enter_lazy_mmu() and xen_leave_lazy_mmu() in order > not to hurt all other lazy mmu mode users. >=20 > Fixes: 291b3abed657 ("x86/xen: use lazy_mmu_state when context-switching") > Signed-off-by: Juergen Gross I have ran several test iterations with this patch (on top of 7.0.4) and it seems to fix the issue. So, Tested-by: Marek Marczykowski-G=C3=B3recki I did run some tests also with 291b3abed657 reverted (instead of this patch), and that seems to work too, but I didn't run enough of iterations to be 100% sure. Would it be helpful to that that further too? > --- > arch/x86/xen/mmu_pv.c | 8 ++++++-- > 1 file changed, 6 insertions(+), 2 deletions(-) >=20 > diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c > index c80d0058efd1..3eee5f84f8a7 100644 > --- a/arch/x86/xen/mmu_pv.c > +++ b/arch/x86/xen/mmu_pv.c > @@ -2145,7 +2145,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr= _t phys, pgprot_t prot) > =20 > static void xen_enter_lazy_mmu(void) > { > - enter_lazy(XEN_LAZY_MMU); > + preempt_disable(); > + if (xen_get_lazy_mode() !=3D XEN_LAZY_MMU) > + enter_lazy(XEN_LAZY_MMU); > + preempt_enable(); > } > =20 > static void xen_flush_lazy_mmu(void) > @@ -2182,7 +2185,8 @@ static void xen_leave_lazy_mmu(void) > { > preempt_disable(); > xen_mc_flush(); > - leave_lazy(XEN_LAZY_MMU); > + if (xen_get_lazy_mode() !=3D XEN_LAZY_NONE) > + leave_lazy(XEN_LAZY_MMU); > preempt_enable(); > } > =20 > --=20 > 2.54.0 >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --TX6pd/gDPiw+HuTq Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmoDT60ACgkQ24/THMrX 1yx4bAf/VQ75g91ht89MgBxSdIsuH3bHFEoMWP584OeaPmODQ286u3tzJYlkk6A0 N4hU2vs2cf6FGx1zFkwRrW4mCe7jsI2J0ZNinxpKEiX8Gkan1LqDWRI568/7lwHJ RoWSFmeM6fq/EmpVnRIVvTucul9r6+I5LqV3cG01RcOyV50f3zRZgIacIIgQKdU/ F0b/vQVZ9FksDmCudohF6xdOH1kFMhC/wBu+GRmE1j2rALpRZhGp9ofiLxpwtyqp 6EE45bopaGTU2EecaeSOCnmmvtP+M4BIPaRDqsdXXvh8qKFDCjuCn+0wqUWUKItr Gb8dxWXuPRtvYz/Q1el+pajOBkviBQ== =QeYe -----END PGP SIGNATURE----- --TX6pd/gDPiw+HuTq-- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:07:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:07:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307208.1578904 (Exim 4.92) (envelope-from ) id 1wMpdu-0002Jt-AG; Tue, 12 May 2026 16:07:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307208.1578904; Tue, 12 May 2026 16:07:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpdu-0002Jj-6g; Tue, 12 May 2026 16:07:34 +0000 Received: by outflank-mailman (input) for mailman id 1307208; Tue, 12 May 2026 16:07:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMpds-0002JY-24 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 16:07:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMpdr-00ARDz-Ck for xen-devel@lists.xenproject.org; Tue, 12 May 2026 18:07:31 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035023-e002-0a2a0a5209dd-0a2a450bcc6e-36 for ; Tue, 12 May 2026 18:07:31 +0200 Received: from [185.255.28.34] (helo=prod-mta-13.swg-srv.net) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035042-212f-0a2a450b0019-b9ff1c2296a9-3 for ; Tue, 12 May 2026 18:07:31 +0200 Received: from mail2.vates.fr ([37.26.189.201] mail2.vates.fr) (Authenticated sender: 8631fc262581453bbf619ec5b2062170/smtp/7773de5a-2839-4720-82ee-e06722ae1d3e) by prod-mta-13.swg-srv.net (ZoneMTA - prod-mta-13) with ESMTPSA id 19e1cf17f96000f373.005 for (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Tue, 12 May 2026 16:07:29 +0000 Received: from l14.. (unknown [82.67.99.167]) (Authenticated sender: anthony.perard) by mail2.vates.fr (Postfix) with ESMTPSA id 8768981617; Tue, 12 May 2026 18:07:28 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=Api6dZu/kYwbQY6iMbeIAyrVF8cQmcaLDQnh0B2K++o=; h=from:subject:date:message-id:to:cc:mime-version:content-type:feedback-id; b=TPJCNANsOxRaFsdRsZqF7gOcrk7PsQaX43Af5qC2t3N5EnKNwk1IUrEOE9B/oCFZNj4W6KLyW r/XZj7nr7xmzRfew+FCsu3ZscjDxl9IWSvqdRjWsG5ekNZwgmGh09PFtDhA8P0uNyIzWp94aMFA +klhS3bhZwxY4iZIhf4cejhyvS7jHaDHc0FiMy48xFICnF6qTo2iSq1a4IR8elQN3lBImhYy3U9 daXN0zZoWocv6bxRn1pO6n5D82ExFeOvRlYsX9BbKWyvB7MatAnTDMb7ixKr3JDr8gRGi/tc/G3 7zXCAuI7+6C29ZNNiFxBbI3JCWRvlujHwlnS2HNcxDsQ== X-Zone-Loop: 961a7766eba627a5ddfde0227fce3ac0adcadf422438 x-campaign-type: default x-transaction-id: 1d358507-51e9-4734-8ddd-062f1f3a7107 x-swg-uid: 01-28159fd6-ba5f-446b-acc9-bc7b6ec44ae6 X-Mailer: Sweego Message-ID: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> x-swg-bid: 1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Anthony PERARD To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Nicola Vetrini , Anthony PERARD , Doug Goldstein , Stefano Stabellini Subject: [XEN PATCH] automation/eclair: Restrict where eclair jobs are auto-started Date: Tue, 12 May 2026 18:07:22 +0200 MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778602048688 X-purgate-ID: tlsNG-42698a/1778602051-19165F3B-B2974F6D/0/0 X-purgate-type: clean X-purgate-size: 1530 ---=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable This will prevent eclair jobs from been started automatically everywhere but in the main push repo, but still have the option to start a jobs manually=2E Signed-off-by: Anthony PERARD --- Notes: eclair jobs are still manual under people: https://gitlab=2Ecom/xen-project/people/anthonyper/xen/-/pipelines= /2519778881 =20 and they are still running in hardware repos: https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/pipelines/= 2519784420 automation/gitlab-ci/analyze=2Eyaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/automation/gitlab-ci/analyze=2Eyaml b/automation/gitlab-ci/an= alyze=2Eyaml index b3f99f472d9e=2E=2Ed6b6cf3e548b 100644 --- a/automation/gitlab-ci/analyze=2Eyaml +++ b/automation/gitlab-ci/analyze=2Eyaml @@ -33,7 +33,7 @@ when: never - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY when: never - - if: $WTOKEN && $CI_PROJECT_PATH =3D~ /^xen-project\/people\/=2E*$/ + - if: $WTOKEN && $CI_PROJECT_PATH !~ /^xen-project\/hardware\// when: manual allow_failure: true - !reference [=2Eeclair-analysis, rules] -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.abc.a9ca9332a5435f32.19e1cf17cb0.7336cce55c47b1f4=--- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:10:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:10:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307223.1578913 (Exim 4.92) (envelope-from ) id 1wMpgU-0004Ix-NA; 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Peter Anvin" , xen-devel@lists.xenproject.org Message-ID: <35936020-53e2-463f-846f-f222d75e768c@suse.com> Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving References: <20260508143933.493013-1-jgross@suse.com> In-Reply-To: --------------Wy767085Ws1QL0FOH35jU760 Content-Type: multipart/mixed; boundary="------------JjmlKxfKwtEwFxHfBuAt65Jq" --------------JjmlKxfKwtEwFxHfBuAt65Jq Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMTIuMDUuMjYgMTg6MDUsIE1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSB3cm90ZToN Cj4gT24gRnJpLCBNYXkgMDgsIDIwMjYgYXQgMDQ6Mzk6MzNQTSArMDIwMCwgSnVlcmdlbiBH cm9zcyB3cm90ZToNCj4+IFdpdGggdGhlIHN1cHBvcnQgb2YgbmVzdGVkIGxhenkgbW11IHNl Y3Rpb25zIGl0IGNhbiBoYXBwZW4gdGhhdA0KPj4gYXJjaF9lbnRlcl9sYXp5X21tdV9tb2Rl KCkgaXMgYmVpbmcgY2FsbGVkIHR3aWNlIHdpdGhvdXQgYSBjYWxsIG9mDQo+PiBhcmNoX2xl YXZlX2xhenlfbW11X21vZGUoKSBpbiBiZXR3ZWVuLCBhcyB0aGUgbGF6eV9tbXVfKigpIGhl bHBlcnMNCj4+IGFyZSBub3QgZGlzYWJsaW5nIHByZWVtcHRpb24gd2hlbiBjaGVja2luZyBm b3IgbmVzdGVkIGxhenkgbW11DQo+PiBzZWN0aW9ucy4NCj4+DQo+PiBUaGlzIGlzIGEgcHJv YmxlbSB3aGVuIHJ1bm5pbmcgYXMgYSBYZW4gUFYgZ3Vlc3QsIGFzDQo+PiB4ZW5fZW50ZXJf bGF6eV9tbXUoKSBhbmQgeGVuX2xlYXZlX2xhenlfbW11KCkgZG9uJ3QgdG9sZXJhdGUgdGhp cw0KPj4gY2FzZS4NCj4+DQo+PiBGaXggdGhhdCBpbiB4ZW5fZW50ZXJfbGF6eV9tbXUoKSBh bmQgeGVuX2xlYXZlX2xhenlfbW11KCkgaW4gb3JkZXINCj4+IG5vdCB0byBodXJ0IGFsbCBv dGhlciBsYXp5IG1tdSBtb2RlIHVzZXJzLg0KPj4NCj4+IEZpeGVzOiAyOTFiM2FiZWQ2NTcg KCJ4ODYveGVuOiB1c2UgbGF6eV9tbXVfc3RhdGUgd2hlbiBjb250ZXh0LXN3aXRjaGluZyIp DQo+PiBTaWduZWQtb2ZmLWJ5OiBKdWVyZ2VuIEdyb3NzIDxqZ3Jvc3NAc3VzZS5jb20+DQo+ IA0KPiBJIGhhdmUgcmFuIHNldmVyYWwgdGVzdCBpdGVyYXRpb25zIHdpdGggdGhpcyBwYXRj aCAob24gdG9wIG9mIDcuMC40KSBhbmQNCj4gaXQgc2VlbXMgdG8gZml4IHRoZSBpc3N1ZS4g U28sDQo+IA0KPiBUZXN0ZWQtYnk6IE1hcmVrIE1hcmN6eWtvd3NraS1Hw7NyZWNraSA8bWFy bWFyZWtAaW52aXNpYmxldGhpbmdzbGFiLmNvbT4NCg0KVGhhbmtzIGZvciB0ZXN0aW5nLg0K DQo+IA0KPiBJIGRpZCBydW4gc29tZSB0ZXN0cyBhbHNvIHdpdGggMjkxYjNhYmVkNjU3IHJl dmVydGVkIChpbnN0ZWFkIG9mIHRoaXMNCj4gcGF0Y2gpLCBhbmQgdGhhdCBzZWVtcyB0byB3 b3JrIHRvbywgYnV0IEkgZGlkbid0IHJ1biBlbm91Z2ggb2YNCj4gaXRlcmF0aW9ucyB0byBi ZSAxMDAlIHN1cmUuIFdvdWxkIGl0IGJlIGhlbHBmdWwgdG8gdGhhdCB0aGF0IGZ1cnRoZXIN Cj4gdG9vPw0KDQpJIGRvIHByZWZlciBteSB2YXJpYW50LCBhcyBpdCBpcyBvbiBteSBwcmVm ZXJyZWQgcGF0aCB0byBnZXQgcmlkIG9mIHRoZQ0KWGVuLXByaXZhdGUgbGF6eSBtb2RlIHRy YWNraW5nLg0KDQpTbyBpbiBteSBwZXJzb25hbCBvcGluaW9uIHlvdSBkb24ndCBuZWVkIHRv IGNvbnRpbnVlIHRoaXMgdGVzdC4NCg0KDQpKdWVyZ2VuDQo= --------------JjmlKxfKwtEwFxHfBuAt65Jq Content-Type: application/pgp-keys; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoDUOIFAwAAAAAACgkQsN6d1ii/Ey+R igf/bLkJbK/E0deKsFcXjFAm3VlBqZmmPWllGpqk1qIJmfsCfE7YkxhY9aJHeDsElcdj/xn7sHWj b/pHVEUO/+FXaycgDzmxnAehWB7ugaFNyrR7CLprUdNQjH+j8ZODTS/JzfwrkvPbvVbt8YRbu1U2 Grck0XSF6newKzl7yoPYnIQL+CQYMUJqzFOL3neYZbPe1GUbUGkjXUFtNH+AovVR/q7LMNe8vute ArXHCoMJ1f3Qc18JgTfLY6UPjRcRg9EzXkfVn8SeT4OXuU6gy1nRj8Znuqpk7+4tEo+0pev7EpCA 9wSS1OQVqOEGGltswvcvknsLZAqoaVKYo5MlUbX2Mg== =dbfb -----END PGP SIGNATURE----- --------------0Tod8Lg01GRoSUt0eYLZ2069-- From xen-devel-bounces@lists.xenproject.org Tue May 12 16:18:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 16:18:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307243.1578930 (Exim 4.92) (envelope-from ) id 1wMpoC-0005PY-Nw; Tue, 12 May 2026 16:18:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307243.1578930; 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arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Tue, 12 May 2026 18:48:04 +0200 From: Nicola Vetrini To: Anthony PERARD Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Doug Goldstein , Stefano Stabellini Subject: Re: [XEN PATCH] automation/eclair: Restrict where eclair jobs are auto-started In-Reply-To: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> References: <1778602049.8631fc262581453bbf619ec5b2062170.19e1cf17f96000f373@vates.tech> Message-ID: X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778604484-80B78161-086A03E3/0/0 X-purgate-type: clean X-purgate-size: 1599 On 2026-05-12 18:07, Anthony PERARD wrote: > This will prevent eclair jobs from been started automatically > everywhere but in the main push repo, but still have the option to > start a jobs manually. > > Signed-off-by: Anthony PERARD Reviewed-by: Nicola Vetrini > --- > > Notes: > eclair jobs are still manual under people: > > https://gitlab.com/xen-project/people/anthonyper/xen/-/pipelines/2519778881 > > and they are still running in hardware repos: > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2519784420 > > automation/gitlab-ci/analyze.yaml | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/automation/gitlab-ci/analyze.yaml > b/automation/gitlab-ci/analyze.yaml > index b3f99f472d9e..d6b6cf3e548b 100644 > --- a/automation/gitlab-ci/analyze.yaml > +++ b/automation/gitlab-ci/analyze.yaml > @@ -33,7 +33,7 @@ > when: never > - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY > when: never > - - if: $WTOKEN && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ > + - if: $WTOKEN && $CI_PROJECT_PATH !~ /^xen-project\/hardware\// > when: manual > allow_failure: true > - !reference [.eclair-analysis, rules] > > > -- > Anthony Perard | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech -- Nicola Vetrini, B.Sc. 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Signed-off-by: Mykola Kvach --- Changes in V9: - fix the suspend-context comment typo and split dist_ctx declarations; - restore ICC_IGRPEN1_EL1 on the suspend error path; - re-initialize GICD_IGROUPRnE during resume; - restore GICD_IROUTER only after re-enabling ARE_NS during resume. Changes in V8: - use right rdist base for prop/pend baser and ctrl Changes in V7: - restore LPI regs on resume - add timeout during redist disabling - squash with suspend/resume handling for GICv3 eSPI registers - drop ITS guard paths so suspend/resume always runs; switch missing ctx allocation to panic - trim TODO comments; narrow redistributor storage to PPI icfgr - keep distributor context allocation even without ITS; adjust resume to use GENMASK(31, 0) for clearing enables - drop storage of the SGI configuration register, as SGIs are always edge-triggered --- xen/arch/arm/gic-v3-lpi.c | 3 + xen/arch/arm/gic-v3.c | 362 ++++++++++++++++++++++++- xen/arch/arm/include/asm/gic_v3_defs.h | 1 + 3 files changed, 363 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 36bb45738e..b0289ee4dc 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -467,6 +467,9 @@ static int cpu_callback(struct notifier_block *nfb, unsigned long action, switch ( action ) { case CPU_UP_PREPARE: + if ( system_state == SYS_STATE_resume ) + break; + rc = gicv3_lpi_allocate_pendtable(cpu); if ( rc ) printk(XENLOG_ERR "Unable to allocate the pendtable for CPU%lu\n", diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index cc0569a157..6fc4354e2e 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1072,12 +1072,12 @@ out: return res; } -static void gicv3_hyp_disable(void) +static void gicv3_hyp_enable(bool enable) { register_t hcr; hcr = READ_SYSREG(ICH_HCR_EL2); - hcr &= ~GICH_HCR_EN; + hcr = enable ? (hcr | GICH_HCR_EN) : (hcr & ~GICH_HCR_EN); WRITE_SYSREG(hcr, ICH_HCR_EL2); isb(); } @@ -1184,7 +1184,7 @@ static void gicv3_disable_interface(void) spin_lock(&gicv3.lock); gicv3_cpu_disable(); - gicv3_hyp_disable(); + gicv3_hyp_enable(false); spin_unlock(&gicv3.lock); } @@ -1920,6 +1920,354 @@ static bool gic_dist_supports_lpis(void) return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents a block of 32 IRQs */ +struct dist_irq_block { + uint32_t icfgr[2]; + uint32_t ipriorityr[8]; + uint64_t irouter[32]; + uint32_t isactiver; + uint32_t isenabler; +}; + +struct redist_ctx { + uint32_t ctlr; + uint32_t icfgr; /* only PPIs stored */ + uint32_t igroupr; + uint32_t ipriorityr[8]; + uint32_t isactiver; + uint32_t isenabler; + + uint64_t pendbase; + uint64_t propbase; +}; + +/* GICv3 registers to be saved/restored on system suspend/resume */ +struct gicv3_ctx { + struct dist_ctx { + uint32_t ctlr; + struct dist_irq_block *irqs; + struct dist_irq_block *espi_irqs; + } dist; + + /* have only one rdist structure for last running CPU during suspend */ + struct redist_ctx rdist; + + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + uint32_t sre_el2; + uint32_t grpen; + } cpu; +}; + +static struct gicv3_ctx gicv3_ctx; + +static void __init gicv3_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv3_info.nr_lines, 32); + + /* The spec allows for systems without any SPIs */ + if ( blocks > 1 ) + { + gicv3_ctx.dist.irqs = xzalloc_array(struct dist_irq_block, blocks - 1); + if ( !gicv3_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv3 suspend context\n"); + } + +#ifdef CONFIG_GICV3_ESPI + if ( !gic_number_espis() ) + return; + + blocks = gic_number_espis() / 32; + gicv3_ctx.dist.espi_irqs = xzalloc_array(struct dist_irq_block, blocks); + if ( !gicv3_ctx.dist.espi_irqs ) + panic("Failed to allocate memory for GICv3 eSPI suspend context\n"); +#endif +} + +static int gicv3_disable_redist(void) +{ + void __iomem *waker = GICD_RDIST_BASE + GICR_WAKER; + s_time_t deadline; + + /* + * Avoid infinite loop if Non-secure does not have access to GICR_WAKER. + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: + * When GICD_CTLR.DS == 0 and an access is Non-secure accesses to this + * register are RAZ/WI. + */ + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) + return 0; + + deadline = NOW() + MILLISECS(1000); + + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, waker); + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) == 0 ) + { + if ( NOW() > deadline ) + { + printk("GICv3: Timeout waiting for redistributor to sleep\n"); + return -ETIMEDOUT; + } + cpu_relax(); + udelay(10); + } + + return 0; +} + +#define GET_SPI_REG_OFFSET(name, is_espi) \ + ((is_espi) ? GICD_##name##nE : GICD_##name) + +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + irqs->icfgr[0] = readl_relaxed(base); + irqs->icfgr[1] = readl_relaxed(base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) + irqs->ipriorityr[irq] = readl_relaxed(base + 4 * irq); + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) + irqs->irouter[irq] = readq_relaxed_non_atomic(base + 8 * irq); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + irqs->isactiver = readl_relaxed(base); + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + irqs->isenabler = readl_relaxed(base); +} + +static void gicv3_restore_spi_irq_config(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + writel_relaxed(irqs->icfgr[0], base); + writel_relaxed(irqs->icfgr[1], base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); +} + +static void gicv3_restore_spi_irq_routing(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); +} + +static void gicv3_restore_spi_irq_state(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + + base = GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + writel_relaxed(irqs->isenabler, base); + + base = GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + writel_relaxed(irqs->isactiver, base); +} + +static int gicv3_suspend(void) +{ + unsigned int i; + void __iomem *base; + int ret; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + /* Save GICC configuration */ + gicv3_ctx.cpu.ctlr = READ_SYSREG(ICC_CTLR_EL1); + gicv3_ctx.cpu.pmr = READ_SYSREG(ICC_PMR_EL1); + gicv3_ctx.cpu.bpr = READ_SYSREG(ICC_BPR1_EL1); + gicv3_ctx.cpu.sre_el2 = READ_SYSREG(ICC_SRE_EL2); + gicv3_ctx.cpu.grpen = READ_SYSREG(ICC_IGRPEN1_EL1); + + gicv3_disable_interface(); + + ret = gicv3_disable_redist(); + if ( ret ) + goto out_enable_iface; + + /* Save GICR configuration */ + gicv3_redist_wait_for_rwp(); + + base = GICD_RDIST_BASE; + + rdist->ctlr = readl_relaxed(base + GICR_CTLR); + + rdist->propbase = readq_relaxed(base + GICR_PROPBASER); + rdist->pendbase = readq_relaxed(base + GICR_PENDBASER); + + base = GICD_RDIST_SGI_BASE; + + /* Save priority on PPI and SGI interrupts */ + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + rdist->ipriorityr[i] = readl_relaxed(base + GICR_IPRIORITYR0 + 4 * i); + + rdist->isactiver = readl_relaxed(base + GICR_ISACTIVER0); + rdist->isenabler = readl_relaxed(base + GICR_ISENABLER0); + rdist->igroupr = readl_relaxed(base + GICR_IGROUPR0); + rdist->icfgr = readl_relaxed(base + GICR_ICFGR1); + + /* Save GICD configuration */ + gicv3_dist_wait_for_rwp(); + gicv3_ctx.dist.ctlr = readl_relaxed(GICD + GICD_CTLR); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, true); +#endif + + return 0; + + out_enable_iface: + gicv3_hyp_enable(true); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + return ret; +} + +static void gicv3_resume(void) +{ + int ret; + unsigned int i; + uint32_t dist_ctlr; + void __iomem *base; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + writel_relaxed(0, GICD + GICD_CTLR); + + for ( i = NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i += 32 ) + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) * 4); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_config(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + { + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPRnE + i * 4); + gicv3_restore_spi_irq_config(gicv3_ctx.dist.espi_irqs + i, i, true); + } +#endif + + dist_ctlr = gicv3_ctx.dist.ctlr & GICD_CTLR_ARE_NS; + if ( dist_ctlr ) + { + writel_relaxed(dist_ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.irqs + i - 1, i, + false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.espi_irqs + i, i, + true); +#endif + } + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.espi_irqs + i, i, true); +#endif + + writel_relaxed(gicv3_ctx.dist.ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + ret = gicv3_lpi_init_rdist(GICD_RDIST_BASE); + /* + * If LPIs are already enabled, assume firmware or the still-powered + * redistributor has valid PROPBASER/PENDBASER and skip reprogramming. + * Return -EBUSY so callers can ignore this case. + */ + if ( ret && ret != -ENODEV && ret != -EBUSY ) + panic("GICv3: Failed to re-initialize LPIs during resume\n"); + else if ( ret == -EBUSY ) /* extra checks, just to be sure */ + { + base = GICD_RDIST_BASE; + if ( readq_relaxed(base + GICR_PROPBASER) != rdist->propbase || + readq_relaxed(base + GICR_PENDBASER) != rdist->pendbase ) + panic("GICv3: LPIs already enabled with unexpected PROPBASER/PENDBASER during resume\n"); + } + + /* Restore GICR (Redistributor) configuration */ + if ( gicv3_enable_redist() ) + panic("GICv3: Failed to re-enable redistributor during resume\n"); + + base = GICD_RDIST_SGI_BASE; + + writel_relaxed(GENMASK(31, 0), base + GICR_ICENABLER0); + gicv3_redist_wait_for_rwp(); + + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + writel_relaxed(rdist->ipriorityr[i], base + GICR_IPRIORITYR0 + i * 4); + + writel_relaxed(rdist->isactiver, base + GICR_ISACTIVER0); + writel_relaxed(rdist->igroupr, base + GICR_IGROUPR0); + writel_relaxed(rdist->icfgr, base + GICR_ICFGR1); + + gicv3_redist_wait_for_rwp(); + + writel_relaxed(rdist->isenabler, base + GICR_ISENABLER0); + writel_relaxed(rdist->ctlr, GICD_RDIST_BASE + GICR_CTLR); + + gicv3_redist_wait_for_rwp(); + + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); + isb(); + + /* Restore CPU interface (System registers) */ + WRITE_SYSREG(gicv3_ctx.cpu.pmr, ICC_PMR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.bpr, ICC_BPR1_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + gicv3_hyp_init(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* Set up the GIC */ static int __init gicv3_init(void) { @@ -1994,6 +2342,10 @@ static int __init gicv3_init(void) gicv3_hyp_init(); +#ifdef CONFIG_SYSTEM_SUSPEND + gicv3_alloc_context(); +#endif + out: spin_unlock(&gicv3.lock); @@ -2033,6 +2385,10 @@ static const struct gic_hw_operations gicv3_ops = { #endif .iomem_deny_access = gicv3_iomem_deny_access, .do_LPI = gicv3_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv3_suspend, + .resume = gicv3_resume, +#endif }; static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data) diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/asm/gic_v3_defs.h index c373b94d19..992c8f9c2f 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -94,6 +94,7 @@ #define GICD_TYPE_LPIS (1U << 17) #define GICD_CTLR_RWP (1UL << 31) +#define GICD_CTLR_DS (1U << 6) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) #define GICD_CTLR_ENABLE_G1 (1U << 0) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307276.1579007 (Exim 4.92) (envelope-from ) id 1wMqc7-0006Fs-Ll; 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([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:43 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605784; x=1779210584; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XXX7LiIDl3A+pjPnWv0DkG9B7a9KxTjMmrGlAN2uPmo=; b=VWCqtQu9XJmjbzceO96JPfwoRYiZGQOusmT5/rBDrzxvI6P8YORsDVhS5MHneEwMbs Xata0uBfRfHfsRSRY84BLfZuwb9fL9kr0JMNAepgjUzHr59qk28T0n/9Id/hIObNaY8J XQeeJ9ucIsPJDfl11tO+Lv3tNx3gEeWUwXFr7z8QwrWc9rEWEssYExHscQEJg40TRfK7 0MSlxY4U30NZgtSYyHCiiqsDbG9gkeMAEKgiHfKe4kPq9UaEheBLIXpRLREKZo46NLTJ jHRd2D1wGY5yc7mTAC7L4BXLGV44lIPu+SpmHXCGFMenCzbKxFwIDfXTWEApKkXm3JQd 8iKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605784; x=1779210584; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=XXX7LiIDl3A+pjPnWv0DkG9B7a9KxTjMmrGlAN2uPmo=; b=N9f/rUhvTqgC8V0/YhL6XAUhXEVK3531rbu4f7HRy5EEYPwveTp7I4AeUiMD++5aZ5 HG0AgOgbRpwwH/hnQbfYcCw9IFChv6A6Qo0donoLehRl4TvNKJRcU6X+LyRXkFSB8JW2 5zayS+3h6gMX52j+FNGX5ZpZs2MpkZZGYC+X47kYJR9YNvzRNIhOuxJCsaijzRFFhlUy uNtijB0pfoybVIFNZc6Vly4EPHPZfzRUR6wAtSseR2tFJ3tCECnYgkAdkKKCKml2+3QU 7PwYZFYJ/oUt9xBZoIpAnmMCrWjjw8x9pcuordZwglm3LdUttMzblAwj8OHweqdKvl0S 4zdQ== X-Gm-Message-State: AOJu0Ywsf9hUm62rrHN3faP+nziBm+jqoP+Cqs6Hcn/xPQY3v02IQjyA 3b4Hvfi8Ayy9IQKcB1K0WykeYcFU1wLdMrHIfOurVHirjMjrSLmA2/xBQluHCA== X-Gm-Gg: Acq92OEQcSPRBqQNCeTbx4q8ELVYrkiA/e49p9C8JjA5jsmcd7J6x57iCoSM8uv6Goe BGkEYNyDVgGvb13ueBzdB3Wg9L/6oqEhu3xgpA5hhOEJFYl1VICDlexQt/ajkaHFi7MuttIsSlw /OzJY2z96ORXeDRSzQT6GQoqUXCvJh36x2kC+DENqVo+d+3M4hCqGToHMB+NjpuMSrDZLmlzomx i6eMNQIKq46twG6tPQvmyavP5wzVvrp42I2K0j3DyeVuEp/C7gzRaESFC6zBVZlxD6jWStmecm8 AuQ8Aieax6UxYsDKhw34zqUTD8MemT5zfHOTbkpf9ZHeMQ+/e/wt6Rc1FwHFUmozqgF5LnG4BK8 hSBqcm5gCeusJkhw3H6bpx2tYh2JV4rtAjaV50XtiA5o+2q2nBGdmIkPEB+iRihUYp+6EQhadbA JxXC9OCozH65aOrSt/BaxYfNAs3A== X-Received: by 2002:a05:600c:37c6:b0:48e:7f22:d90 with SMTP id 5b1f17b1804b1-48e7f7de432mr182800855e9.4.1778605784332; Tue, 12 May 2026 10:09:44 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v9 03/13] xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF Date: Tue, 12 May 2026 20:07:10 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778605785-2887FC48-52A15AD8/0/0 X-purgate-type: clean X-purgate-size: 10164 From: Mykola Kvach PSCI does not guarantee that a GICv3 redistributor is powered down across CPU_OFF -> CPU_ON. DEN0022F.b says CPU_OFF powers down the calling core (5.5) and CPU_ON brings the core back with a defined initial CPU state (5.6, 6.4). However, PSCI leaves interrupt migration and GIC re-initialization to the supervisory software/firmware stack: the caller must migrate interrupts away before CPU_OFF (5.5.2), and the execution context that is lost in a powerdown state must be saved and restored by software (6.8). PSCI also calls out GIC management explicitly in 6.8, including retargeting SPIs, preventing PPIs/SGIs from targeting a powered down CPU, and reinitializing the CPU interface after CPU_ON. This matches the GIC architecture. IHI0069H.b Chapter 11.1 requires the PE and CPU interface to share a power domain, but explicitly allows the associated redistributor, distributor, and ITS to remain powered while the PE and CPU interface are off. All other GIC power-management behavior is IMPLEMENTATION DEFINED. DEN0050D Chapter 4.2, "Generic Interrupt Controller (GIC)", says the GICv3 redistributor may live either in the AP core power domain or in a relatively always-on parent domain. So after CPU_OFF -> CPU_ON a secondary CPU can legitimately come back to a live redistributor with GICR_CTLR.EnableLPIs still set. Handle that case in the LPI setup path instead of assuming a fully reset redistributor. The LPI path needs special care because the GIC spec makes redistributor LPI state sticky and partially implementation defined. IHI0069H.b 5.1.1 and 5.1.2 say that changing GICR_PROPBASER or GICR_PENDBASER while GICR_CTLR.EnableLPIs == 1 is UNPREDICTABLE. After clearing EnableLPIs, software must wait for GICR_CTLR.RWP == 0 before touching the pending table. The architecture also permits implementations where, once EnableLPIs has been set, clearing it again is not guaranteed to work. Where an ITS is present, the spec strongly recommends moving LPIs to another redistributor before clearing EnableLPIs. Because of that, treat a retained EnableLPIs state as valid when the redistributor still points at Xen's expected PROPBASER/PENDBASER tables. Only try to clear EnableLPIs when the retained configuration does not match Xen's state, and wait for RWP before reprogramming the tables. This is also consistent with platform firmware reality: PSCI and the GIC architecture allow platform-specific redistributor power handling, and not all platform firmware implementations force a full redistributor power-off through implementation-defined controls during CPU_OFF. Xen therefore needs to tolerate retained redistributor state on secondary CPU bring-up. Keep gicv3_populate_rdist() resident as well, because gicv3_cpu_init() reuses it on secondary CPU bring-up after init. Tested using Xen's non-boot CPU disable/enable path on Arm FVP_Base_RevC-2xAEMvA, both with and without: -C gic_distributor.allow-LPIEN-clear=1 -C gic_distributor.GICR-clear-enable-supported=1 and on Orange Pi 5. Signed-off-by: Mykola Kvach --- Changes in v9: - move gicv3_do_wait_for_rwp prototype from its related header to gic.h - drop __init from gicv3_populate_rdist(), which is reused on secondary CPU bring-up after boot - changed print format for smp_processor_id in gicv3_populate_rdist func - cosmetic changes --- xen/arch/arm/gic-v3-lpi.c | 77 +++++++++++++++++++++++++++++++++- xen/arch/arm/gic-v3.c | 23 ++++++---- xen/arch/arm/include/asm/gic.h | 4 ++ 3 files changed, 94 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 9ee338edc2..36bb45738e 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -81,6 +81,13 @@ static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redist); #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) +#define GICR_PROPBASER_XEN_MASK GENMASK_ULL(51, 12) +/* + * For retained redistributor state, match the pending table by address only. + * Attribute bits such as PTZ may not read back with the programmed value. + */ +#define GICR_PENDBASER_XEN_MASK GENMASK_ULL(51, 16) + static union host_lpi *gic_get_host_lpi(uint32_t plpi) { union host_lpi *block; @@ -296,6 +303,60 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist_base) return 0; } +static uint64_t gicv3_lpi_expected_proptable(void) +{ + return virt_to_maddr(lpi_data.lpi_property); +} + +static uint64_t gicv3_lpi_expected_pendtable(void) +{ + return virt_to_maddr(this_cpu(lpi_redist).pending_table); +} + +static bool gicv3_lpi_tables_match(void __iomem *rdist_base) +{ + uint64_t propbase, pendbase; + + if ( !lpi_data.lpi_property || !this_cpu(lpi_redist).pending_table ) + return false; + + propbase = readq_relaxed(rdist_base + GICR_PROPBASER); + pendbase = readq_relaxed(rdist_base + GICR_PENDBASER); + + return ((propbase & GICR_PROPBASER_XEN_MASK) == + (gicv3_lpi_expected_proptable() & GICR_PROPBASER_XEN_MASK)) && + ((pendbase & GICR_PENDBASER_XEN_MASK) == + (gicv3_lpi_expected_pendtable() & GICR_PENDBASER_XEN_MASK)); +} + +static int gicv3_lpi_disable_lpis(void __iomem *rdist_base) +{ + uint32_t reg = readl_relaxed(rdist_base + GICR_CTLR); + int ret; + + if ( !(reg & GICR_CTLR_ENABLE_LPIS) ) + return 0; + + writel_relaxed(reg & ~GICR_CTLR_ENABLE_LPIS, rdist_base + GICR_CTLR); + + /* + * The spec only guarantees programmability when we have observed the bit + * cleared. Where clearing is supported, RWP must reach 0 before touching + * PROPBASER/PENDBASER again. + */ + wmb(); + + ret = gicv3_do_wait_for_rwp(rdist_base); + if ( ret ) + return ret; + + reg = readl_relaxed(rdist_base + GICR_CTLR); + if ( reg & GICR_CTLR_ENABLE_LPIS ) + return -EBUSY; + + return 0; +} + /* * Tell a redistributor about the (shared) property table, allocating one * if not already done. @@ -374,7 +435,21 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base) /* Make sure LPIs are disabled before setting up the tables. */ reg = readl_relaxed(rdist_base + GICR_CTLR); if ( reg & GICR_CTLR_ENABLE_LPIS ) - return -EBUSY; + { + if ( gicv3_lpi_tables_match(rdist_base) ) + return -EBUSY; + + ret = gicv3_lpi_disable_lpis(rdist_base); + if ( ret == -EBUSY ) + { + printk(XENLOG_ERR + "GICv3: CPU%u: LPIs still enabled with unexpected redistributor tables\n", + smp_processor_id()); + return -EINVAL; + } + if ( ret ) + return ret; + } ret = gicv3_lpi_set_pendtable(rdist_base); if ( ret ) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9..cc0569a157 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -274,8 +274,8 @@ static void gicv3_enable_sre(void) isb(); } -/* Wait for completion of a distributor change */ -static void gicv3_do_wait_for_rwp(void __iomem *base) +/* Wait for completion of a distributor/redistributor write-pending change. */ +int gicv3_do_wait_for_rwp(void __iomem *base) { uint32_t val; bool timeout = false; @@ -295,17 +295,22 @@ static void gicv3_do_wait_for_rwp(void __iomem *base) } while ( 1 ); if ( timeout ) + { dprintk(XENLOG_ERR, "RWP timeout\n"); + return -ETIMEDOUT; + } + + return 0; } static void gicv3_dist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD); + (void)gicv3_do_wait_for_rwp(GICD); } static void gicv3_redist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD_RDIST_BASE); + (void)gicv3_do_wait_for_rwp(GICD_RDIST_BASE); } static void gicv3_wait_for_rwp(int irq) @@ -857,7 +862,7 @@ static bool gicv3_enable_lpis(void) return true; } -static int __init gicv3_populate_rdist(void) +static int gicv3_populate_rdist(void) { int i; uint32_t aff; @@ -925,15 +930,15 @@ static int __init gicv3_populate_rdist(void) gicv3_set_redist_address(rdist_addr, procnum); ret = gicv3_lpi_init_rdist(ptr); - if ( ret && ret != -ENODEV ) + if ( ret && ret != -ENODEV && ret != -EBUSY ) { - printk("GICv3: CPU%d: Cannot initialize LPIs: %u\n", + printk("GICv3: CPU%u: Cannot initialize LPIs: %d\n", smp_processor_id(), ret); break; } } - printk("GICv3: CPU%d: Found redistributor in region %d @%p\n", + printk("GICv3: CPU%u: Found redistributor in region %d @%p\n", smp_processor_id(), i, ptr); return 0; } @@ -953,7 +958,7 @@ static int __init gicv3_populate_rdist(void) } while ( !(typer & GICR_TYPER_LAST) ); } - dprintk(XENLOG_ERR, "GICv3: CPU%d: mpidr 0x%"PRIregister" has no re-distributor!\n", + dprintk(XENLOG_ERR, "GICv3: CPU%u: mpidr 0x%"PRIregister" has no re-distributor!\n", smp_processor_id(), cpu_logical_map(smp_processor_id())); return -ENODEV; diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index fbf0d69edd..9293aa56e2 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,10 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_GICV3 +int gicv3_do_wait_for_rwp(void __iomem *base); +#endif + #ifdef CONFIG_SYSTEM_SUSPEND /* Suspend/resume */ extern int gic_suspend(void); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307274.1578983 (Exim 4.92) (envelope-from ) id 1wMqc5-0005fJ-1v; Tue, 12 May 2026 17:09:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307274.1578983; Tue, 12 May 2026 17:09:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005ef-VH; Tue, 12 May 2026 17:09:44 +0000 Received: by outflank-mailman (input) for mailman id 1307274; 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Suspending timers in Xen consists of disabling the physical timer and the hypervisor timer on the current CPU. The virtual timer does not need explicit handling here, as it is already disabled on vCPU context switch and its state is restored per-vCPU on the next context restore. Resuming consists of raising TIMER_SOFTIRQ, which prompts the generic timer code to reprogram the hypervisor timer with the correct timeout. Xen does not use or expose the physical timer, so it remains disabled across suspend/resume. Introduce a new helper, disable_phys_hyp_timers(), to encapsulate disabling of the physical and hypervisor timers. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykola Kvach Acked-by: Julien Grall Reviewed-by: Luca Fancellu --- Changes in V7: - Dropped EL1/EL2 wording; use "physical timer" and "hypervisor timer" - Renamed helper to disable_phys_hyp_timers() to reflect its actual scope - Clarified virtual timer handling (disabled on vCPU switch-out, restored on context restore) and added comments in suspend/resume paths - Added resume comment explaining which timers are restored by TIMER_SOFTIRQ --- xen/arch/arm/include/asm/time.h | 5 ++++ xen/arch/arm/time.c | 44 ++++++++++++++++++++++++++++----- 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index c194dbb9f5..9313b157ea 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -105,6 +105,11 @@ void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +void time_suspend(void); +void time_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* __ARM_TIME_H__ */ /* * Local variables: diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 6955b2788f..fff8e4aca6 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -296,6 +296,14 @@ static void check_timer_irq_cfg(unsigned int irq, const char *which) static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_hyp); static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_virt); +/* Disable physical and hypervisor timers on the current CPU */ +static inline void disable_phys_hyp_timers(void) +{ + WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ + WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ + isb(); +} + /* Set up the timer interrupt on this CPU */ void init_timer_interrupt(void) { @@ -306,9 +314,7 @@ void init_timer_interrupt(void) WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ /* Do not let the VMs program the physical timer, only read the physical counter */ WRITE_SYSREG(CNTHCTL_EL2_EL1PCTEN, CNTHCTL_EL2); - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ - isb(); + disable_phys_hyp_timers(); hyp_action->name = "hyptimer"; hyp_action->handler = htimer_interrupt; @@ -333,9 +339,7 @@ void init_timer_interrupt(void) */ static void deinit_timer_interrupt(void) { - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Disable physical timer */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Disable hypervisor's timer */ - isb(); + disable_phys_hyp_timers(); release_irq(timer_irq[TIMER_HYP_PPI], NULL); release_irq(timer_irq[TIMER_VIRT_PPI], NULL); @@ -375,6 +379,34 @@ void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds) /* XXX update guest visible wallclock time */ } +#ifdef CONFIG_SYSTEM_SUSPEND + +void time_suspend(void) +{ + /* CNTV already disabled by virt_timer_save() during vcpu context switch. */ + disable_phys_hyp_timers(); +} + +void time_resume(void) +{ + /* + * Raising TIMER_SOFTIRQ triggers generic timer code to reprogram the + * hypervisor timer with the correct timeout (not known here). + * + * Xen doesn't use or expose the physical timer, so it remains disabled + * across suspend/resume. + * + * The virtual timer state is restored per-vCPU on the next context switch. + * + * No further action is needed to restore timekeeping after power down, + * since the system counter is unaffected. See ARM DDI 0487 L.a, D12.1.2 + * "The system counter must be implemented in an always-on power domain." + */ + raise_softirq(TIMER_SOFTIRQ); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_time_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307279.1579034 (Exim 4.92) (envelope-from ) id 1wMqcC-000702-Qo; Tue, 12 May 2026 17:09:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307279.1579034; Tue, 12 May 2026 17:09:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcC-0006zo-Ll; Tue, 12 May 2026 17:09:52 +0000 Received: by outflank-mailman (input) for mailman id 1307279; Tue, 12 May 2026 17:09:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcB-0006je-AA for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcA-007RzZ-NY for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:50 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-2eae-0a2a0a5409dd-0a2a450cc83c-42 for ; Tue, 12 May 2026 19:09:50 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ede-62f1-0a2a450c0019-d155802cd561-3 for ; Tue, 12 May 2026 19:09:50 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488ba840146so52227225e9.1 for ; Tue, 12 May 2026 10:09:50 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Calling it from the CPU hotplug/resume path then executed discarded code, which could crash Xen. Drop __init so the TEE mediator secondary init can run safely on hotplugged and resumed CPUs. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/tee/tee.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c index 8501443c8e..00e561fc78 100644 --- a/xen/arch/arm/tee/tee.c +++ b/xen/arch/arm/tee/tee.c @@ -128,7 +128,7 @@ static int __init tee_init(void) presmp_initcall(tee_init); -void __init init_tee_secondary(void) +void init_tee_secondary(void) { if ( cur_mediator && cur_mediator->ops->init_secondary ) cur_mediator->ops->init_secondary(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307278.1579025 (Exim 4.92) (envelope-from ) id 1wMqcB-0006jx-CT; Tue, 12 May 2026 17:09:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307278.1579025; Tue, 12 May 2026 17:09:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcB-0006jh-7h; Tue, 12 May 2026 17:09:51 +0000 Received: by outflank-mailman (input) for mailman id 1307278; Tue, 12 May 2026 17:09:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc9-0006ej-Vt for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqc9-007RzZ-9b for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:49 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-2eae-0a2a0a5409dd-0a2a450cc83c-40 for ; Tue, 12 May 2026 19:09:49 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035edd-62f1-0a2a450c0019-d1558031dcc7-3 for ; Tue, 12 May 2026 19:09:49 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48909558b3aso59332165e9.0 for ; Tue, 12 May 2026 10:09:49 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:47 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605788; x=1779210588; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0IZE3vvZX8wTCOIvxrr5h+/UmQXvZVQaktiFrkuAMu4=; b=IcD5Ikeb+fSV5jb87eN5sdQt4h2F2BytaEeYehJUmw40qv/cp+XqzuB4FGVlAd+9SP GfpwGoHKfP2AF4D9VUK3Aj0Cz/KZz2sLaIFezm4Wd2nnGIpbvZrSIVUaUQSrnngX8hM4 k4wFFEh2UBX94XBGL1wy/S8f+1ki0X6Z6KCtAdEi4Z7t7zJOCsM//hUg2e+/EIX8VXFI TBmkki1ew5FG3Y2Cr9YQIt7pNS7SI/WLf6m7ioxXFUttOH4uf1rPCE3RLzuLxeiHzK+u S9ovfQFWIi67h3j5jTSXlXQFOU/ngOdYSmalLxkC6H4fxeetUDhbssLkgj5EJW7NaPLm fuSw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605788; x=1779210588; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=0IZE3vvZX8wTCOIvxrr5h+/UmQXvZVQaktiFrkuAMu4=; b=Dv8n+k4f4HLDPxVvDwiaJk5+VmA7K2Mp15xHPo97UC4Ps4V9yT5Swa07uWPv5DKHoh YhWVZ4L10HFxYVFpY/GKCfQXqA9//IQ9CZ0cO4nw9E9bF/FxLcIh6pGlRpi0C/j2aDL4 VkoAytNDjPouUiOcQvEFP9ptJAxe2VgfHCl1slepQwv04OOtbm+C0W4qgHPH3NBw03Be CGkm3cmQpKkzN2yWWs9xolP4a+cQMv4/QJCksPgO0MPLnONNBEOChPNjUpBgGh+Wts0U EwrNX30iZJfFbSK+5ifn3tUXzfdrACLOcGmR5tnE6868fOGllp3PbmMnHobkdxDJFDYa cJMw== X-Gm-Message-State: AOJu0YyTaEjCgIvA+gmHhO4EVHCcCY+1SnqMScpScK9BnLo7lkIuG64E 1Sj8piNmPPfoq0M1X7GYPS6pmpbMMq20NkKWXnV65eCPh/CC/brwcIwfIa8TOw== X-Gm-Gg: Acq92OHO1CIs/KGzFDNXleamW1+7YGauD0qAByiutdwvykQ9OF9+5f48aXhABcCy4+o 5pS6oHMCLb3/MHm2OoYLaXlWoS/pa3+RpBodYWEgfYYZiqPYbtY3v9S01rgZGgFiQ5/ns4qDiUb DhCMP78+I8B+4vthgPICauD1sOZiu/TbhzAt4RnDKxd3pSOH0GQGLW4tOuANx31RVf3vDKyPsiR wGBm0PocQOogWmBEIAfTcCRbcyVIoeI/YjSYvIAkVERk86ZskR+Rpa9Xu3xIFDc6+mAuew07iKp ibzuh2nAP6m8JlZjgGFHdgayaFpCtdmPSor8jkV9dx9LrwE0u1QsopUfxVp1VwtRDJygQRfnoJ3 F87d6gQWLDHrUTSKId17jLEtuYhZDTE56eA2s7EhKHlg/XMoMoREWSXCRulliWhXn7XNrisAUxK WUKeIuQrEququ3vsm7m1aoneA4GQ== X-Received: by 2002:a05:600c:3b0f:b0:48a:7965:b943 with SMTP id 5b1f17b1804b1-48e51f4e9admr478114025e9.29.1778605788240; Tue, 12 May 2026 10:09:48 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v9 05/13] xen/arm: gic-v3: add ITS suspend/resume support Date: Tue, 12 May 2026 20:07:12 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778605789-DB57FCF5-620AAA48/0/0 X-purgate-type: clean X-purgate-size: 9457 From: Mykola Kvach Handle system suspend/resume for GICv3 with an ITS present so LPIs keep working after firmware powers the GIC down. Save and restore the ITS CTLR, CBASER and BASER registers, and re-establish the collection mapping on resume. Add list_for_each_entry_continue_reverse() in list.h for the ITS suspend error path that needs to roll back partially saved state. Based on Linux commit dba0bc7b76dc: "irqchip/gic-v3-its: Add ability to save/restore ITS state". Signed-off-by: Mykola Kvach --- Changes in V9: - fix the ITS suspend/resume coding-style nits; - preserve the saved GITS_CTLR state while masking the read-only QUIESCENT bit. Changes in V8: - Reword the CBASER/CWRITER comment to match Xen and drop the stale Linux cmd_write reference. - Clarify the list_for_each_entry_continue_reverse() comment. - Factor out per-ITS helpers for collection setup and resume. - Restore each ITS and re-establish its collection mapping in the same loop, so a failed ITS resume is not followed by MAPC/SYNC on that un-restored instance. - panic in case when resume of an ITS failed - cleanup baser cache during suspend --- xen/arch/arm/gic-v3-its.c | 133 ++++++++++++++++++++++++-- xen/arch/arm/gic-v3.c | 11 ++- xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++ xen/include/xen/list.h | 14 +++ 4 files changed, 171 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 9005ce8ce5..582c26d964 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, return its_send_command(its, cmd); } +static int gicv3_its_setup_collection_single(struct host_its *its, + unsigned int cpu) +{ + int ret; + + ret = its_send_cmd_mapc(its, cpu, cpu); + if ( ret ) + return ret; + + ret = its_send_cmd_sync(its, cpu); + if ( ret ) + return ret; + + return gicv3_its_wait_commands(its); +} + /* Set up the (1:1) collection mapping for the given host CPU. */ int gicv3_its_setup_collection(unsigned int cpu) { @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) list_for_each_entry(its, &host_its_list, entry) { - ret = its_send_cmd_mapc(its, cpu, cpu); - if ( ret ) - return ret; - - ret = its_send_cmd_sync(its, cpu); - if ( ret ) - return ret; - - ret = gicv3_its_wait_commands(its); + ret = gicv3_its_setup_collection_single(its, cpu); if ( ret ) return ret; } @@ -1210,6 +1218,113 @@ int gicv3_its_init(void) return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void) +{ + struct host_its *its; + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + unsigned int i; + void __iomem *base = its->its_base; + + /* + * By the time Xen reaches gic_suspend(), every domain is already in + * SHUTDOWN_suspend, so ITS-targeting interrupt sources are expected + * to have been quiesced by the owning OS before SYSTEM_SUSPEND. + */ + /* Preserve saved GITS_CTLR state, excluding read-only QUIESCENT. */ + its->suspend_ctx.ctlr = readl_relaxed(base + GITS_CTLR) & + ~GITS_CTLR_QUIESCENT; + ret = gicv3_disable_its(its); + if ( ret ) + { + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + goto err; + } + + its->suspend_ctx.cbaser = readq_relaxed(base + GITS_CBASER); + + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = readq_relaxed(base + GITS_BASER0 + i * 8); + + its->suspend_ctx.baser[i] = 0; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + its->suspend_ctx.baser[i] = baser; + } + } + + return 0; + + err: + list_for_each_entry_continue_reverse( its, &host_its_list, entry ) + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTLR); + + return ret; +} + +static int gicv3_its_resume_single(struct host_its *its, unsigned int cpu) +{ + void __iomem *base = its->its_base; + unsigned int i; + int ret; + + /* + * Make sure that the ITS is disabled. If it fails to quiesce, + * don't restore it since writing to CBASER or BASER + * registers is undefined according to the GIC v3 ITS + * Specification. + */ + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); + ret = gicv3_disable_its(its); + if ( ret ) + return ret; + + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); + + /* + * Writing CBASER resets CREADR to 0, so reset CWRITER to + * keep the command queue pointers aligned. + */ + writeq_relaxed(0, base + GITS_CWRITER); + + /* Restore GITS_BASER from the value cache. */ + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = its->suspend_ctx.baser[i]; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); + } + + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + + return gicv3_its_setup_collection_single(its, cpu); +} + +void gicv3_its_resume(void) +{ + struct host_its *its; + unsigned int cpu = smp_processor_id(); + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + ret = gicv3_its_resume_single(its, cpu); + if ( ret ) + panic("GICv3: ITS@%"PRIpaddr": failed to restore during resume: %d\n", + its->addr, ret); + } +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ /* * Local variables: diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 6fc4354e2e..8ef9f416d0 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -2115,10 +2115,14 @@ static int gicv3_suspend(void) gicv3_disable_interface(); - ret = gicv3_disable_redist(); + ret = gicv3_its_suspend(); if ( ret ) goto out_enable_iface; + ret = gicv3_disable_redist(); + if ( ret ) + goto out_its_resume; + /* Save GICR configuration */ gicv3_redist_wait_for_rwp(); @@ -2154,6 +2158,9 @@ static int gicv3_suspend(void) return 0; + out_its_resume: + gicv3_its_resume(); + out_enable_iface: gicv3_hyp_enable(true); WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); @@ -2253,6 +2260,8 @@ static void gicv3_resume(void) gicv3_redist_wait_for_rwp(); + gicv3_its_resume(); + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); isb(); diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index fc5a84892c..492c468ae0 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -129,6 +129,13 @@ struct host_its { spinlock_t cmd_lock; void *cmd_buf; unsigned int flags; +#ifdef CONFIG_SYSTEM_SUSPEND + struct suspend_ctx { + uint32_t ctlr; + uint64_t cbaser; + uint64_t baser[GITS_BASER_NR_REGS]; + } suspend_ctx; +#endif }; /* Map a collection for this host CPU to each host ITS. */ @@ -204,6 +211,11 @@ uint64_t gicv3_its_get_cacheability(void); uint64_t gicv3_its_get_shareability(void); unsigned int gicv3_its_get_memflags(void); +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void); +void gicv3_its_resume(void); +#endif + #else #ifdef CONFIG_ACPI @@ -271,6 +283,17 @@ static inline int gicv3_its_make_hwdom_dt_nodes(const struct domain *d, return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +static inline int gicv3_its_suspend(void) +{ + return 0; +} + +static inline void gicv3_its_resume(void) +{ +} +#endif + #endif /* CONFIG_HAS_ITS */ #endif diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h index 98d8482dab..2aab274157 100644 --- a/xen/include/xen/list.h +++ b/xen/include/xen/list.h @@ -535,6 +535,20 @@ static inline void list_splice_init(struct list_head *list, &(pos)->member != (head); \ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member)) +/** + * list_for_each_entry_continue_reverse - iterate backwards from the given point + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_head within the struct. + * + * Iterate over list of given type backwards, starting from the element previous + * to the current one in list order. + */ +#define list_for_each_entry_continue_reverse(pos, head, member) \ + for ((pos) = list_entry((pos)->member.prev, typeof(*(pos)), member); \ + &(pos)->member != (head); \ + (pos) = list_entry((pos)->member.prev, typeof(*(pos)), member)) + /** * list_for_each_entry_from - iterate over list of given type from the * current point -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307281.1579042 (Exim 4.92) (envelope-from ) id 1wMqcE-0007Fn-4E; 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As a result, CPUs going offline and back online could end up with stale or missing handlers, breaking delivery of FF-A notifications. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_notif.c | 63 ++++++++++++++++++++++++++++-------- 1 file changed, 50 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c index 186e726412..513c399594 100644 --- a/xen/arch/arm/tee/ffa_notif.c +++ b/xen/arch/arm/tee/ffa_notif.c @@ -360,10 +360,28 @@ static int32_t ffa_notification_bitmap_destroy(uint16_t vm_id) return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0, 0); } -void ffa_notif_init_interrupt(void) +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, sri_irq); + +static int request_sri_irq(void) { int ret; + struct irqaction *sri_action = &this_cpu(sri_irq); + + sri_action->name = "FF-A notif"; + sri_action->handler = notif_irq_handler; + sri_action->dev_id = NULL; + sri_action->free_on_release = 0; + + ret = setup_irq(notif_sri_irq, 0, sri_action); + if ( ret ) + printk(XENLOG_ERR "ffa: setup_irq irq %u failed: error %d\n", + notif_sri_irq, ret); + return ret; +} + +void ffa_notif_init_interrupt(void) +{ if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) { /* @@ -376,14 +394,36 @@ void ffa_notif_init_interrupt(void) * pending, while the SPMC in the secure world will not notice that * the interrupt was lost. */ - ret = request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A notif", - NULL); - if ( ret ) - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - notif_sri_irq, ret); + request_sri_irq(); } } +static void deinit_ffa_notif_interrupt(void) +{ + if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) + release_irq(notif_sri_irq, NULL); +} + +static int cpu_ffa_notif_callback(struct notifier_block *nfb, + unsigned long action, + void *hcpu) +{ + switch ( action ) + { + case CPU_DYING: + deinit_ffa_notif_interrupt(); + break; + default: + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block cpu_ffa_notif_nfb = { + .notifier_call = cpu_ffa_notif_callback, +}; + void ffa_notif_init(void) { const struct arm_smccc_1_2_regs arg = { @@ -392,7 +432,6 @@ void ffa_notif_init(void) }; struct arm_smccc_1_2_regs resp; unsigned int irq; - int ret; /* Only enable fw notification if all ABIs we need are supported */ if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) && @@ -408,13 +447,11 @@ void ffa_notif_init(void) notif_sri_irq = irq; if ( irq >= NR_GIC_SGI ) irq_set_type(irq, IRQ_TYPE_EDGE_RISING); - ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL); - if ( ret ) - { - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - irq, ret); + + if ( request_sri_irq() ) return; - } + + register_cpu_notifier(&cpu_ffa_notif_nfb); fw_notif_enabled = true; } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307283.1579047 (Exim 4.92) (envelope-from ) id 1wMqcE-0007IU-Fh; Tue, 12 May 2026 17:09:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307283.1579047; Tue, 12 May 2026 17:09:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcE-0007I9-9w; Tue, 12 May 2026 17:09:54 +0000 Received: by outflank-mailman (input) for mailman id 1307283; Tue, 12 May 2026 17:09:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcD-0007Av-Q1 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcD-007RzZ-6w for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:53 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ec9-2eae-0a2a0a5409dd-0a2a4501afae-36 for ; Tue, 12 May 2026 19:09:53 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee1-c1f2-0a2a45010019-d155802cc06e-3 for ; Tue, 12 May 2026 19:09:53 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso53223425e9.2 for ; Tue, 12 May 2026 10:09:53 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Tested on R-Car H3 Starter Kit. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Mykola Kvach --- Changes in V9: - set dt_device_set_protected() only after ipmmu_alloc_ctx_suspend() succeeds, so DT devices do not remain protected on allocation failure. Changes in V7: - moved suspend context allocation before pci stuff --- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 319 +++++++++++++++++++++-- 1 file changed, 304 insertions(+), 15 deletions(-) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c index fa9ab9cb13..e1b47a5824 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -71,6 +71,8 @@ }) #endif +#define dev_dbg(dev, fmt, ...) \ + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) #define dev_info(dev, fmt, ...) \ dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) #define dev_warn(dev, fmt, ...) \ @@ -130,6 +132,24 @@ struct ipmmu_features { unsigned int imuctr_ttsel_mask; }; +#ifdef CONFIG_SYSTEM_SUSPEND + +struct ipmmu_reg_ctx { + unsigned int imttlbr0; + unsigned int imttubr0; + unsigned int imttbcr; + unsigned int imctr; +}; + +struct ipmmu_vmsa_backup { + struct device *dev; + unsigned int *utlbs_val; + unsigned int *asids_val; + struct list_head list; +}; + +#endif + /* Root/Cache IPMMU device's information */ struct ipmmu_vmsa_device { struct device *dev; @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; unsigned int utlb_refcount[IPMMU_UTLB_MAX]; const struct ipmmu_features *features; +#ifdef CONFIG_SYSTEM_SUSPEND + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; +#endif }; /* @@ -547,6 +570,245 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, spin_unlock_irqrestore(&mmu->lock, flags); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); +static LIST_HEAD(ipmmu_devices_backup); + +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; + +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, + unsigned int utlb) +{ + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); +} + +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + backup_data->asids_val[i] = ipmmu_imuasid_read(mmu, utlb); + backup_data->utlbs_val[i] = ipmmu_imuctr_read(mmu, utlb); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->context_id); + + regs->imttlbr0 = ipmmu_ctx_read_root(domain, IMTTLBR0); + regs->imttubr0 = ipmmu_ctx_read_root(domain, IMTTUBR0); + regs->imttbcr = ipmmu_ctx_read_root(domain, IMTTBCR); + regs->imctr = ipmmu_ctx_read_root(domain, IMCTR); +} + +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->context_id); + + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); +} + +/* + * Xen: Unlike Linux implementation, Xen uses a single driver instance + * for handling all IPMMUs. There is no framework for ipmmu_suspend/resume + * callbacks to be invoked for each IPMMU device. So, we need to iterate + * through all registered IPMMUs performing required actions. + * + * Also take care of restoring special settings, such as translation + * table format, etc. + */ +static int __must_check ipmmu_suspend(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return 0; + + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); + + spin_lock(&ipmmu_devices_lock); + + list_for_each_entry( mmu, &ipmmu_devices, list ) + { + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_backup_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_backup(mmu); + } + + spin_unlock(&ipmmu_devices_lock); + + return 0; +} + +static void ipmmu_resume(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return; + + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); + + spin_lock(&ipmmu_devices_lock); + + list_for_each_entry( mmu, &ipmmu_devices, list ) + { + uint32_t reg; + + /* Do not use security group function */ + reg = IMSCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) & ~IMSCTLR_USE_SECGRP); + + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + /* Use stage 2 translation table format */ + reg = IMSAUXCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) | IMSAUXCTLR_S2PTE); + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_restore_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_restore(mmu); + } + + spin_unlock(&ipmmu_devices_lock); +} + +static int ipmmu_alloc_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data; + unsigned int *utlbs_val, *asids_val; + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + + utlbs_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !utlbs_val ) + return -ENOMEM; + + asids_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !asids_val ) + { + xfree(utlbs_val); + return -ENOMEM; + } + + backup_data = xzalloc(struct ipmmu_vmsa_backup); + if ( !backup_data ) + { + xfree(utlbs_val); + xfree(asids_val); + return -ENOMEM; + } + + backup_data->dev = dev; + backup_data->utlbs_val = utlbs_val; + backup_data->asids_val = asids_val; + + spin_lock(&ipmmu_devices_backup_lock); + list_add(&backup_data->list, &ipmmu_devices_backup); + spin_unlock(&ipmmu_devices_backup_lock); + + return 0; +} + +#ifdef CONFIG_HAS_PCI +static void ipmmu_free_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data, *tmp; + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry_safe( backup_data, tmp, &ipmmu_devices_backup, list ) + { + if ( backup_data->dev == dev ) + { + list_del(&backup_data->list); + xfree(backup_data->utlbs_val); + xfree(backup_data->asids_val); + xfree(backup_data); + break; + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} +#endif /* CONFIG_HAS_PCI */ + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { uint64_t ttbr; @@ -559,6 +821,9 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) return ret; domain->context_id = ret; +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[ret] = &root_pgtable[ret]; +#endif /* * TTBR0 @@ -615,6 +880,9 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) ipmmu_ctx_write_root(domain, IMCTR, IMCTR_FLUSH); ipmmu_tlb_sync(domain); +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[domain->context_id] = NULL; +#endif ipmmu_domain_free_context(domain->mmu->root, domain->context_id); } @@ -1338,10 +1606,11 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct iommu_fwspec *fwspec; #ifdef CONFIG_HAS_PCI + int ret; + if ( dev_is_pci(dev) ) { struct pci_dev *pdev = dev_to_pci(dev); - int ret; if ( devfn != pdev->devfn ) return 0; @@ -1358,17 +1627,24 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( !to_ipmmu(dev) ) return -ENODEV; - if ( !dev_is_pci(dev) ) + if ( !dev_is_pci(dev) && dt_device_is_protected(dev_to_dt(dev)) ) { - if ( dt_device_is_protected(dev_to_dt(dev)) ) - { - dev_err(dev, "Already added to IPMMU\n"); - return -EEXIST; - } + dev_err(dev, "Already added to IPMMU\n"); + return -EEXIST; + } - /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); +#ifdef CONFIG_SYSTEM_SUSPEND + if ( ipmmu_alloc_ctx_suspend(dev) ) + { + dev_err(dev, "Failed to allocate context for suspend\n"); + return -ENOMEM; } +#endif + + /* Let Xen know that the master device is protected by an IOMMU. */ + if ( !dev_is_pci(dev) ) + dt_device_set_protected(dev_to_dt(dev)); + #ifdef CONFIG_HAS_PCI if ( dev_is_pci(dev) ) { @@ -1377,26 +1653,28 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct pci_host_bridge *bridge; struct iommu_fwspec *fwspec_bridge; unsigned int utlb_osid0 = 0; - int ret; bridge = pci_find_host_bridge(pdev->seg, pdev->bus); if ( !bridge ) { dev_err(dev, "Failed to find host bridge\n"); - return -ENODEV; + ret = -ENODEV; + goto free_suspend_ctx; } fwspec_bridge = dev_iommu_fwspec_get(dt_to_dev(bridge->dt_node)); if ( fwspec_bridge->num_ids < 1 ) { dev_err(dev, "Failed to find host bridge uTLB\n"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } if ( fwspec->num_ids < 1 ) { dev_err(dev, "Failed to find uTLB"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } rcar4_pcie_osid_regs_init(bridge); @@ -1405,7 +1683,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( ret < 0 ) { dev_err(dev, "No unused OSID regs\n"); - return ret; + goto free_suspend_ctx; } reg_id = ret; @@ -1420,7 +1698,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) { rcar4_pcie_osid_bdf_clear(bridge, reg_id); rcar4_pcie_osid_reg_free(bridge, reg_id); - return ret; + goto free_suspend_ctx; } } #endif @@ -1429,6 +1707,13 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) dev_name(fwspec->iommu_dev), fwspec->num_ids); return 0; +#ifdef CONFIG_HAS_PCI + free_suspend_ctx: +#ifdef CONFIG_SYSTEM_SUSPEND + ipmmu_free_ctx_suspend(dev); +#endif + return ret; +#endif } static int ipmmu_iommu_domain_init(struct domain *d) @@ -1490,6 +1775,10 @@ static const struct iommu_ops ipmmu_iommu_ops = .unmap_page = arm_iommu_unmap_page, .dt_xlate = ipmmu_dt_xlate, .add_device = ipmmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = ipmmu_suspend, + .resume = ipmmu_resume, +#endif }; static __init int ipmmu_init(struct dt_device_node *node, const void *data) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307275.1578998 (Exim 4.92) (envelope-from ) id 1wMqc6-00062Q-DI; Tue, 12 May 2026 17:09:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307275.1578998; Tue, 12 May 2026 17:09:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc6-00062I-AP; Tue, 12 May 2026 17:09:46 +0000 Received: by outflank-mailman (input) for mailman id 1307275; Tue, 12 May 2026 17:09:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005cE-PB for xen-devel@lists.xenproject.org; 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Transient physical SGI pending state (GICD_CPENDSGIRn/GICD_SPENDSGIRn) is intentionally excluded. CPU-interface active-priority state is also not restored across suspend/resume. Xen reaches the final suspend path at a quiescent point, so there is no active-priority execution context to replay after resume. Enforce this with a runtime check after disabling the CPU interface: if any implemented GICC_APRn word is still non-zero, restore GICC_CTLR and abort suspend with -EBUSY. This does not apply to distributor active state. With GICv2 EOImode==1, EOIR only drops the interrupt priority; final deactivation is a separate step. For guest-routed interrupts, Xen can have already EOIed the physical IRQ while deactivation is still pending on the vGIC/GICV path. Therefore GICD_ISACTIVER is preserved as architectural in-flight interrupt state. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V9: - Skip saving/restoring GICD_ITARGETSR0..7 because SGI/PPI target registers hold no state (read-only on MP, RAZ/WI on UP). - Add a runtime GICC_APRn quiescence check after disabling the CPU interface, and restore GICC_CTLR before returning -EBUSY. Changes in V8: - disable cpu interface + distributor before suspend - change 0xffffffff to GENMASK; - cosmetic changes; Changes in V7: - Allocate one contiguous memory block for the GICv2 dist suspend context. - gicv2_resume() no longer unconditionally re-enables the distributor/CPU interface; it now writes back the saved CTLR values as-is. - gicv2_alloc_context() now returns 0 on success and panics on failure, since suspend context allocation is not recoverable. --- xen/arch/arm/gic-v2.c | 181 +++++++++++++++++++++++++++++++++ xen/arch/arm/gic.c | 29 ++++++ xen/arch/arm/include/asm/gic.h | 12 +++ 3 files changed, 222 insertions(+) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 43a379fdda..1970c4feb9 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1108,6 +1108,178 @@ static int gicv2_iomem_deny_access(struct domain *d) return iomem_deny_access(d, mfn, mfn + nr - 1); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents block of 32 IRQs */ +struct irq_block { + uint32_t icfgr[2]; /* 2 registers of 16 IRQs each */ + uint32_t ipriorityr[8]; + uint32_t isenabler; + uint32_t isactiver; + uint32_t itargetsr[8]; +}; + +/* GICv2 registers to be saved/restored on system suspend/resume */ +struct gicv2_context { + /* GICC context */ + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + } cpu; + + /* GICD context */ + struct dist_ctx { + uint32_t ctlr; + /* Includes banked SGI/PPI state for the boot CPU. */ + struct irq_block *irqs; + } dist; +}; + +static struct gicv2_context gic_ctx; + +#define GICV2_NR_APRS 4 + +static int gicv2_suspend(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + /* Save GICC_CTLR configuration. */ + gic_ctx.cpu.ctlr = readl_gicc(GICC_CTLR); + + /* Quiesce the GIC CPU interface before suspend. */ + gicv2_cpu_disable(); + + /* + * Check the active-priority state for the group Xen drives through the + * CPU interface. GICC_CTL_ENABLE enables Group 0 without SecurityExtn and + * Group 1 in Xen's Non-secure view with SecurityExtn, and in both cases + * the relevant state is visible through GICC_APRn. Only zero/non-zero + * matters here, not the implementation-defined bit layout. + */ + for ( i = 0; i < GICV2_NR_APRS; i++ ) + { + uint32_t apr = readl_gicc(GICC_APR + i * 4); + + if ( !apr ) + continue; + + printk(XENLOG_ERR "GICv2: suspend aborted: GICC_APR%u=%#08x\n", i, apr); + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); + return -EBUSY; + } + + /* Save GICD configuration */ + gic_ctx.dist.ctlr = readl_gicd(GICD_CTLR); + writel_gicd(0, GICD_CTLR); + + gic_ctx.cpu.pmr = readl_gicc(GICC_PMR); + gic_ctx.cpu.bpr = readl_gicc(GICC_BPR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + + irqs->isenabler = readl_gicd(GICD_ISENABLER + off); + + /* + * Save distributor active state as part of the hypervisor-owned + * physical interrupt state. In GICv2 EOImode==1, EOIR only drops the + * priority; final deactivation is separate. For guest-routed + * interrupts, Xen may have EOIed the physical IRQ while the guest/vGIC + * side still owns the deactivate step. Therefore GICD_ISACTIVER can + * legitimately remain set even though transient SGI pending state and + * CPU-interface active-priority state are expected to be quiesced here. + */ + irqs->isactiver = readl_gicd(GICD_ISACTIVER + off); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) + irqs->ipriorityr[j] = readl_gicd(GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) + irqs->itargetsr[j] = readl_gicd(GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + irqs->icfgr[j] = readl_gicd(GICD_ICFGR + off + j * 4); + } + + return 0; +} + +static void gicv2_resume(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gicv2_cpu_disable(); + /* Disable distributor */ + writel_gicd(0, GICD_CTLR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); + + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); + } + + /* Make sure all registers are restored and enable distributor */ + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); + + /* Restore GIC CPU interface configuration */ + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); + + /* Enable GIC CPU interface */ + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); +} + +static void __init gicv2_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gic_ctx.dist.irqs = xzalloc_array(struct irq_block, blocks); + if ( !gic_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv2 suspend context\n"); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + #ifdef CONFIG_ACPI static unsigned long gicv2_get_hwdom_extra_madt_size(const struct domain *d) { @@ -1312,6 +1484,11 @@ static int __init gicv2_init(void) spin_unlock(&gicv2.lock); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Allocate memory to be used for saving GIC context during the suspend */ + gicv2_alloc_context(); +#endif /* CONFIG_SYSTEM_SUSPEND */ + return 0; } @@ -1355,6 +1532,10 @@ static const struct gic_hw_operations gicv2_ops = { .map_hwdom_extra_mappings = gicv2_map_hwdom_extra_mappings, .iomem_deny_access = gicv2_iomem_deny_access, .do_LPI = gicv2_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv2_suspend, + .resume = gicv2_resume, +#endif /* CONFIG_SYSTEM_SUSPEND */ }; /* Set up the GIC */ diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index ee75258fc3..7727ffed5a 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -432,6 +432,35 @@ int gic_iomem_deny_access(struct domain *d) return gic_hw_ops->iomem_deny_access(d); } +#ifdef CONFIG_SYSTEM_SUSPEND + +int gic_suspend(void) +{ + /* Must be called by boot CPU#0 with interrupts disabled */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + + if ( !gic_hw_ops->suspend || !gic_hw_ops->resume ) + return -ENOSYS; + + return gic_hw_ops->suspend(); +} + +void gic_resume(void) +{ + /* + * Must be called by boot CPU#0 with interrupts disabled after gic_suspend + * has returned successfully. + */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + ASSERT(gic_hw_ops->resume); + + gic_hw_ops->resume(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_gic_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index ff22dea40d..fbf0d69edd 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,12 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +/* Suspend/resume */ +extern int gic_suspend(void); +extern void gic_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* SGI (AKA IPIs) */ enum gic_sgi { GIC_SGI_EVENT_CHECK, @@ -444,6 +450,12 @@ struct gic_hw_operations { int (*iomem_deny_access)(struct domain *d); /* Handle LPIs, which require special handling */ void (*do_LPI)(unsigned int lpi); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Save GIC configuration due to the system suspend */ + int (*suspend)(void); + /* Restore GIC configuration due to the system resume */ + void (*resume)(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ }; extern const struct gic_hw_operations *gic_hw_ops; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307273.1578980 (Exim 4.92) (envelope-from ) id 1wMqc4-0005cM-Rz; Tue, 12 May 2026 17:09:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307273.1578980; Tue, 12 May 2026 17:09:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc4-0005cF-OV; Tue, 12 May 2026 17:09:44 +0000 Received: by outflank-mailman (input) for mailman id 1307273; Tue, 12 May 2026 17:09:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqc2-0005Ur-KU for xen-devel@lists.xenproject.org; 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Part 1, covering guest suspend functionality, is already in mainline. NOTE: Host-wide suspend/resume support is guarded by CONFIG_SYSTEM_SUSPEND, which can currently only be selected when UNSUPPORTED is set, and thus the host suspend backend is neither enabled by default nor built in supported configurations. The separate HAS_HWDOM_SYSTEM_SUSPEND policy bit only changes how ARM treats SHUTDOWN_suspend from the hardware domain; it does not enable the host-wide suspend backend by itself. This version is ported to Xen master and includes extensive improvements based on reviewer feedback. The patch series restructures code to improve robustness, maintainability, and implements system Suspend-to-RAM support on ARM64 hardware/control domains. Key updates in this series: - Introduced architecture-specific suspend/resume infrastructure - Integrated GICv2/GICv3 suspend and resume, including memory-backed context save/restore with error handling - Added time and IRQ suspend/resume hooks, ensuring correct timer/interrupt state across suspend cycles - Implemented proper PSCI SYSTEM_SUSPEND invocation and version checks - Improved state management and recovery in error cases during suspend/resume - Added support for IPMMU-VMSA/SMMUv3 context save/restore - Added support for GICv3 eSPI registers context save/restore - Added support for ITS registers context save/restore --- TODOs: - Enable "xl suspend" support on ARM - Add suspend/resume CI test for ARM (QEMU if feasible) - PCI suspend ? --- Detailed changelogs can be found in each patch. Changes in v9: - Split the control-domain SYSTEM_SUSPEND flow so host availability, runtime blockers and domain-readiness checks are handled separately from the host suspend backend. - Gate vPSCI SYSTEM_SUSPEND on cached host PSCI support and Xen runtime suspend blockers, and log firmware support during initialization. - Fold the arm64 resume trampoline into the CPU context save/restore patch and use asm-offsets-generated RESUME_CTX_* definitions for the assembly save/restore path. - Tighten the GICv2/GICv3/ITS/IPMMU/SMMUv3 suspend/resume paths based on review feedback, including state-save/restore fixes and safer failure handling. - Reorder the host suspend/resume phases so timer and GIC state are handled with local IRQs disabled and restored before console/IOMMU resume. Changes in v8: - Rebased to latest master and refreshed the series accordingly. - Added a new GICv3 patch to tolerate retained redistributor LPI state across CPU_OFF/CPU_ON. - GICv2 suspend now disables the CPU interface and distributor before saving state. - GICv3 suspend/resume fixes the redistributor base used for LPI state. - ITS and SMMUv3 suspend/resume paths were tightened, with safer restore/rollback handling and stricter fatal-error handling. - System suspend now checks that all domains are already in SHUTDOWN_suspend before proceeding, and renames the hardware-domain suspend capability/helper for clearer semantics. - Fixed alignment/cleanup issues in the low-level suspend/resume code. Changes in v7: - Timer helper renamed/clarified; virtual/hyper/phys handling documented. - GICv2 uses one context block; restore saved CTLR; panic on alloc failure. - GICv3/eSPI/ITS always suspend/resume; restore LPI/eSPI; rdist timeout. - IPMMU suspend context allocated before PCI setup. - System suspend: control domain drives host suspend. - Dropped v6 IRQ descriptor restore patches; use setup_irq and re-register local IRQs on resume instead. For earlier changelogs, please refer to the previous cover letters. Mirela Simonovic (5): xen/arm: Add suspend and resume timer helpers xen/arm: gic-v2: Implement GIC suspend/resume functions xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND xen/arm: Implement PSCI SYSTEM_SUSPEND call (host interface) xen/arm: Add host system suspend backend Mykola Kvach (7): xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF xen/arm: gic-v3: Implement GICv3 suspend/resume functions xen/arm: gic-v3: add ITS suspend/resume support xen/arm: tee: keep init_tee_secondary() for hotplug and resume xen/arm: ffa: fix notification SRI across CPU hotplug/suspend xen/arm: smmu-v3: add suspend/resume handlers xen/arm: Add vPSCI SYSTEM_SUSPEND policy Oleksandr Tyshchenko (1): iommu/ipmmu-vmsa: Implement suspend/resume callbacks xen/arch/arm/Kconfig | 2 + xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 20 ++ xen/arch/arm/arm64/head.S | 118 +++++++ xen/arch/arm/gic-v2.c | 181 +++++++++++ xen/arch/arm/gic-v3-its.c | 133 +++++++- xen/arch/arm/gic-v3-lpi.c | 80 ++++- xen/arch/arm/gic-v3.c | 394 ++++++++++++++++++++++- xen/arch/arm/gic.c | 35 ++ xen/arch/arm/include/asm/gic.h | 16 + xen/arch/arm/include/asm/gic_v3_defs.h | 1 + xen/arch/arm/include/asm/gic_v3_its.h | 23 ++ xen/arch/arm/include/asm/mm.h | 2 + xen/arch/arm/include/asm/psci.h | 4 + xen/arch/arm/include/asm/suspend.h | 36 +++ xen/arch/arm/include/asm/time.h | 5 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/psci.c | 38 ++- xen/arch/arm/suspend.c | 194 +++++++++++ xen/arch/arm/tee/ffa_notif.c | 63 +++- xen/arch/arm/tee/tee.c | 2 +- xen/arch/arm/time.c | 44 ++- xen/arch/arm/vpsci.c | 120 ++++++- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 + xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/ipmmu-vmsa.c | 319 +++++++++++++++++- xen/drivers/passthrough/arm/smmu-v3.c | 182 ++++++++--- xen/include/xen/list.h | 14 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 32 files changed, 1951 insertions(+), 107 deletions(-) create mode 100644 xen/arch/arm/suspend.c -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307285.1579062 (Exim 4.92) (envelope-from ) id 1wMqcH-0007rp-HP; Tue, 12 May 2026 17:09:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307285.1579062; Tue, 12 May 2026 17:09:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007rR-8A; Tue, 12 May 2026 17:09:57 +0000 Received: by outflank-mailman (input) for mailman id 1307285; Tue, 12 May 2026 17:09:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcF-0007Om-10 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcE-007RzZ-D4 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:54 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035eb4-2eae-0a2a0a5409dd-0a2a45059d4c-28 for ; Tue, 12 May 2026 19:09:54 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee2-aaa8-0a2a45050019-d1558030b83b-3 for ; Tue, 12 May 2026 19:09:54 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so64771745e9.2 for ; Tue, 12 May 2026 10:09:54 -0700 (PDT) Received: from EPUAKYIW02F7.. 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During suspend, configure GBPA to abort incoming transactions, disable the translation interface while keeping CMDQ enabled, issue CMD_SYNC to ensure all previously issued commands have completed, then disable the SMMU. Resume uses arm_smmu_device_reset() to reprogram the SMMU and re-enable translation and interrupt generation. The IRQ setup split follows the approach from Pranjal Shrivastava's Linux arm-smmu-v3 runtime/system sleep series: IRQ handlers are requested once during probe, while reset/resume only restores SMMU hardware state and re-enables IRQ_CTRL. Only the pieces relevant to Xen's currently supported SMMUv3 path are ported here. Xen documents SMMUv3 MSI and PCI ATS as unsupported and not compiled/tested, so this patch does not restore SMMU MSI IRQ_CFGn registers nor reinitialize ATS/PRI endpoints. If those paths become usable, suspend/resume will need corresponding MSI restore and ATS/PRI quiesce/reinit steps. Link: https://lore.kernel.org/r/20260414194702.1229094-1-praan@google.com/ Based-on-patch-by: Pranjal Shrivastava Signed-off-by: Mykola Kvach --- Changes in V9: - Use CMD_SYNC in suspend instead of polling CMDQ_CONS, so the suspend path waits for command completion rather than only command consumption. - Document that arm_smmu_setup_irqs() is probe-only and that future Xen SMMUv3 MSI support will need to restore SMMU IRQ_CFGn registers on resume. - Restore the reference to Pranjal's Linux runtime/system sleep series and clarify that MSI/ATS/PRI resume handling is outside the supported Xen path. - Prefix the subject with xen/arm for consistency with the rest of the Arm suspend/resume series. Changes in V8: - Honor ARM_SMMU_FEAT_SEV when draining the CMDQ during suspend, matching the existing runtime CMD_SYNC path. - Fold the suspend rollback reset path into a helper and rename the error reporting to describe suspend rollback rather than resume. - Treat SMMU reset failure during resume as fatal instead of logging and continuing with a potentially unusable IOMMU. - cosmetic changes --- xen/drivers/passthrough/arm/smmu-v3.c | 178 ++++++++++++++++++++------ 1 file changed, 142 insertions(+), 36 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index bf153227db..82c8ead979 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1814,8 +1814,7 @@ static int arm_smmu_write_reg_sync(struct arm_smmu_device *smmu, u32 val, } /* GBPA is "special" */ -static int __init arm_smmu_update_gbpa(struct arm_smmu_device *smmu, - u32 set, u32 clr) +static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set, u32 clr) { int ret; u32 reg, __iomem *gbpa = smmu->base + ARM_SMMU_GBPA; @@ -1995,10 +1994,35 @@ err_free_evtq_irq: return ret; } +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) +{ + int ret; + u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; + + if ( smmu->features & ARM_SMMU_FEAT_PRI ) + irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; + + /* Enable interrupt generation on the SMMU */ + ret = arm_smmu_write_reg_sync(smmu, irqen_flags, + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); + if ( ret ) + { + dev_warn(smmu->dev, "failed to enable irqs\n"); + return ret; + } + + return 0; +} + +/* + * Probe-time only: request host IRQs and, when available, program the SMMU's + * MSI doorbells. Resume does not restore the SMMU *_IRQ_CFGn MSI registers, + * so any host suspend support must treat the active MSI IRQ path as + * unsupported until that restore path exists. + */ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) { int ret, irq; - u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; /* Disable IRQs first */ ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, @@ -2028,22 +2052,7 @@ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) } } - if (smmu->features & ARM_SMMU_FEAT_PRI) - irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; - - /* Enable interrupt generation on the SMMU */ - ret = arm_smmu_write_reg_sync(smmu, irqen_flags, - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); - if (ret) { - dev_warn(smmu->dev, "failed to enable irqs\n"); - goto err_free_irqs; - } - return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_disable(struct arm_smmu_device *smmu) @@ -2057,7 +2066,7 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu) return ret; } -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; u32 reg, enables; @@ -2163,17 +2172,9 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } } - ret = arm_smmu_setup_irqs(smmu); - if (ret) { - dev_err(smmu->dev, "failed to setup irqs\n"); + ret = arm_smmu_enable_irqs(smmu); + if ( ret ) return ret; - } - - /* Initialize tasklets for threaded IRQs*/ - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, - smmu); /* Enable the SMMU interface, or ensure bypass */ if (disable_bypass) { @@ -2181,20 +2182,16 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } else { ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); if (ret) - goto err_free_irqs; + return ret; } ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { dev_err(smmu->dev, "failed to enable SMMU interface\n"); - goto err_free_irqs; + return ret; } return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) @@ -2558,10 +2555,23 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) if (ret) goto out_free; + ret = arm_smmu_setup_irqs(smmu); + if ( ret ) + { + dev_err(smmu->dev, "failed to setup irqs\n"); + goto out_free; + } + + /* Initialize tasklets for threaded IRQs*/ + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, + smmu); + /* Reset the device */ ret = arm_smmu_device_reset(smmu); if (ret) - goto out_free; + goto out_free_irqs; /* * Keep a list of all probed devices. This will be used to query @@ -2575,6 +2585,8 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) return 0; +out_free_irqs: + arm_smmu_free_irqs(smmu); out_free: arm_smmu_free_structures(smmu); @@ -2855,6 +2867,96 @@ static void arm_smmu_iommu_xen_domain_teardown(struct domain *d) xfree(xen_domain); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device *smmu) +{ + int ret = arm_smmu_device_reset(smmu); + + if ( ret ) + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", + ret); +} + +static int arm_smmu_suspend(void) +{ + struct arm_smmu_device *smmu; + int ret = 0; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + /* Abort all transactions before disable to avoid spurious bypass */ + ret = arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); + if ( ret ) + goto fail; + + /* Disable the SMMU via CR0.EN and all queues except CMDQ */ + ret = arm_smmu_write_reg_sync(smmu, CR0_CMDQEN, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out while disabling smmu\n"); + goto fail; + } + + /* + * At this point the translation interface is disabled and the + * SMMU won't access translation/config structures, even + * speculatively, as per the IHI0070 spec (section 6.3.9.6). + * CMDQ is still enabled so that a CMD_SYNC can complete any + * previously issued commands. + */ + + /* Ensure all previously issued commands have completed. */ + ret = arm_smmu_cmdq_issue_sync(smmu); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out waiting for pending commands\n"); + goto fail; + } + + /* Disable everything */ + ret = arm_smmu_device_disable(smmu); + if ( ret ) + goto fail; + + dev_dbg(smmu->dev, "Suspended smmu\n"); + } + + return 0; + + fail: + /* Reset the device that failed as well as any already-suspended ones. */ + arm_smmu_reset_for_suspend_rollback(smmu); + + list_for_each_entry_continue_reverse(smmu, &arm_smmu_devices, devices) + arm_smmu_reset_for_suspend_rollback(smmu); + + return ret; +} + +static void arm_smmu_resume(void) +{ + int ret; + struct arm_smmu_device *smmu; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + dev_dbg(smmu->dev, "Resuming device\n"); + + /* + * The reset will re-initialize all the base addresses, queues, + * prod and cons maintained within struct arm_smmu_device as well as + * re-enable the interrupts. + */ + ret = arm_smmu_device_reset(smmu); + if ( ret ) + panic("SMMUv3: %s: Failed to reset during resume: %d\n", + dev_name(smmu->dev), ret); + } +} +#endif + static const struct iommu_ops arm_smmu_iommu_ops = { .page_sizes = PAGE_SIZE_4K, .init = arm_smmu_iommu_xen_domain_init, @@ -2867,6 +2969,10 @@ static const struct iommu_ops arm_smmu_iommu_ops = { .unmap_page = arm_iommu_unmap_page, .dt_xlate = arm_smmu_dt_xlate, .add_device = arm_smmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = arm_smmu_suspend, + .resume = arm_smmu_resume, +#endif }; static __init int arm_smmu_dt_init(struct dt_device_node *dev, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307286.1579066 (Exim 4.92) (envelope-from ) id 1wMqcI-0007xC-76; Tue, 12 May 2026 17:09:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307286.1579066; Tue, 12 May 2026 17:09:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007vj-Qu; Tue, 12 May 2026 17:09:57 +0000 Received: by outflank-mailman (input) for mailman id 1307286; Tue, 12 May 2026 17:09:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcG-0007mm-Ix for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcF-00AdLt-Vm for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:55 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ecd-bab6-0a2a0a5309dd-0a2a4506e5aa-36 for ; Tue, 12 May 2026 19:09:55 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee3-7371-0a2a45060019-d155802fbd5a-3 for ; Tue, 12 May 2026 19:09:55 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488b0046078so48589675e9.1 for ; Tue, 12 May 2026 10:09:55 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fc8cccf90sm10838845e9.0.2026.05.12.10.09.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 12 May 2026 10:09:54 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778605795; x=1779210595; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=lkhNyEzobDpYCgF/TpDVG4OQjxYfp1uqUAAZRreqhtU=; b=HIjHo2uRftMJxoWplko2MV09aZb+TgQQDwXc/9X8jOIBHNH+emuV09INzgmvNX0kWf gwVplwoTi0hvlTUKN+PwB7wJHMQqkESi5ftc48LyKXfqIgrDeaQsewfSXe+20cztL2WM gDJ91vUEYhbRGTIScsLG1AWpokGnkf/mQbAPzBqnlI+pS+Bo/dirE1XyPmUrLcJtKUyo 9G1lktAWbBU0CUdxKQKHNFIByR7qLVYdF1NtumGRL6M9ZsAqXFpV89nOUHX1fO6jOStq BUUOATjAc8I7TBYc/JJpT/43CPgz4uDj4ynsdRy1u08NIFQIzgaLd/xEWuha8MQJwU+j qbmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778605795; x=1779210595; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=lkhNyEzobDpYCgF/TpDVG4OQjxYfp1uqUAAZRreqhtU=; b=BPsQ6zxy/aLh+M8bOGOekgKfLUynOC/ToEgfF+0/y+1r23iQz+JHJgBbuuji2Xt7ff fz0gG4bhzgMS/IXdB6O6MbQSggOuBlrMjuDEPzeGHxpl3RFAMWmtK/H2nq6ONWccg5Mn 8KXQ8rbdgk4t2/C3T6Lg6gDRtCXEgpZMfAfyjqjoedfw2Dmkq77fXSu00vQMImU0A01r 6x0udCAKn4xzNrrxiRbTUJf8+fxpE5xiAzHzXSijtr08y4xFouSKyIy8SCxf426qc9/C 7uHiyYGxI+MvmuuzVehAXapAEozxOsc6QR6xcxxXsjzANjUNGNuklRKVGcZy8u50NfiY GnrA== X-Gm-Message-State: AOJu0YwnzLC1ypjX8naGysuUwsI4la7ULlOXMkjpF7XImAMGuOp1rZDY InL0mEcdMtgrcWcnTw4zUjmodabLWs9CCx6U1xwpt4eCZbBo0R+bxlowmWDBAQ== X-Gm-Gg: Acq92OGObMgOjuE+Wct8qwdrJBgPcddU6k+/Tu4wkCdEg56HGdtSK5bTsDmQtO3RJjl +pzQqqAl8xVpriARLEmxka02PNvMsLDRg/Lu9hIiPL0eLcnzEK1AREzJA3NvNKNaMb6KxL1ddkm uiSKbfJS3SHt2H/OuYWqO6Hnq2d8onA12cR7UE9KyftnKp0xC5lEAP37B2JJEghrkg6LmPY+LpF QA6MMNKQNJH/uW2lRomzX/iBDTxPa3XToiVcv1uiJlip5tnvB28M1URf3aV7xOFr0/Yvyh117Qh iZDYJnz8pGywViSWOq1f/sHQe6JtVSuCBfVApj8jK83QGG6LsHqS2kyTJfSH1U4Cr6jiMIUiL7u V970glNf4TaLHiD+e4dw1tw9M/N59j9Wm9P3IR6sCdJeHGBjELKjsVTSVnbGLowpMxhwY/pCpnS 3AHsLJ+s7E8twPiu0afXkhz1mVgw== X-Received: by 2002:a05:600c:5248:b0:48a:906a:9050 with SMTP id 5b1f17b1804b1-48e7069175fmr245499865e9.10.1778605794944; Tue, 12 May 2026 10:09:54 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v9 10/13] xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND Date: Tue, 12 May 2026 20:07:17 +0300 Message-ID: <46bbc9e008a65dd86fb2b368e4751eb7d2014afa.1778605274.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778605795-85361D75-333E9410/0/0 X-purgate-type: clean X-purgate-size: 11024 From: Mirela Simonovic On wakeup from PSCI SYSTEM_SUSPEND, Xen re-enters EL2 with the MMU and data cache disabled. The resume path must first switch back to Xen's runtime page tables before it can access the saved CPU context using virtual addresses. Add an arm64 hyp_resume trampoline that reuses enable_secondary_cpu_mm() to enable the data cache and MMU, switch to init_ttbr, and resume in the runtime virtual mapping. The trampoline then restores the saved CPU general-purpose and system-control register context. prepare_resume_ctx() must be invoked just before the PSCI system suspend call is issued to the platform firmware. It saves the current CPU context and returns a non-zero value so that the caller enters the physical SYSTEM_SUSPEND call. On resume, hyp_resume restores the saved context, including the saved link register. Control therefore returns to the place where prepare_resume_ctx() was called. To avoid re-entering the suspend path, the restored path sees prepare_resume_ctx() return zero. The assembly save/restore code uses offsets generated by asm-offsets.c from struct resume_cpu_context, keeping the assembly memory accesses in sync with the C structure layout. Support for ARM32 is not implemented. Instead, compilation fails with a build-time error if suspend is enabled for ARM32. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in v9: - Drop the misleading prepare_resume_ctx() pointer argument and make both save/restore paths use the global resume_cpu_context. - Squash the arm64 resume trampoline into the context save/restore patch. - Document in code that hyp_resume relies on PSCI initial-state rules. - Use generic platform firmware wording instead of ATF-specific wording. - Rename the saved context type/storage to resume_cpu_context and rely on implicit zero-initialization for the file-scope object. - Use asm-offsets.c-generated RESUME_CTX_* offsets to keep the assembly save/restore code in sync with struct resume_cpu_context. Changes in v8: - Fix alignments in code. Changes in v7: - No functional changes, just moved commit. --- xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 20 +++++ xen/arch/arm/arm64/head.S | 118 +++++++++++++++++++++++++++++ xen/arch/arm/include/asm/suspend.h | 26 +++++++ xen/arch/arm/suspend.c | 14 ++++ 5 files changed, 179 insertions(+) create mode 100644 xen/arch/arm/suspend.c diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 982c6c396a..c97df7f3a0 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -51,6 +51,7 @@ obj-y += setup.o obj-y += shutdown.o obj-y += smp.o obj-y += smpboot.o +obj-$(CONFIG_SYSTEM_SUSPEND) += suspend.o obj-$(CONFIG_SYSCTL) += sysctl.o obj-y += time.o obj-y += traps.o diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 38a3894a3b..4da5fff584 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -13,6 +13,7 @@ #include #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ( "\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\""\ @@ -57,6 +58,25 @@ void __dummy__(void) OFFSET(INITINFO_stack, struct init_info, stack); BLANK(); +#ifdef CONFIG_SYSTEM_SUSPEND + OFFSET(RESUME_CTX_X19, struct resume_cpu_context, callee_regs[0]); + OFFSET(RESUME_CTX_X21, struct resume_cpu_context, callee_regs[2]); + OFFSET(RESUME_CTX_X23, struct resume_cpu_context, callee_regs[4]); + OFFSET(RESUME_CTX_X25, struct resume_cpu_context, callee_regs[6]); + OFFSET(RESUME_CTX_X27, struct resume_cpu_context, callee_regs[8]); + OFFSET(RESUME_CTX_X29, struct resume_cpu_context, callee_regs[10]); + OFFSET(RESUME_CTX_SP, struct resume_cpu_context, sp); + OFFSET(RESUME_CTX_VBAR_EL2, struct resume_cpu_context, vbar_el2); + OFFSET(RESUME_CTX_VTCR_EL2, struct resume_cpu_context, vtcr_el2); + OFFSET(RESUME_CTX_VTTBR_EL2, struct resume_cpu_context, vttbr_el2); + OFFSET(RESUME_CTX_TPIDR_EL2, struct resume_cpu_context, tpidr_el2); + OFFSET(RESUME_CTX_MDCR_EL2, struct resume_cpu_context, mdcr_el2); + OFFSET(RESUME_CTX_HSTR_EL2, struct resume_cpu_context, hstr_el2); + OFFSET(RESUME_CTX_CPTR_EL2, struct resume_cpu_context, cptr_el2); + OFFSET(RESUME_CTX_HCR_EL2, struct resume_cpu_context, hcr_el2); + BLANK(); +#endif + OFFSET(SMCCC_RES_a0, struct arm_smccc_res, a0); OFFSET(SMCCC_RES_a2, struct arm_smccc_res, a2); OFFSET(ARM_SMCCC_1_2_REGS_X0_OFFS, struct arm_smccc_1_2_regs, a0); diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 72c7b24498..512a3c35b2 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -561,6 +561,124 @@ END(efi_xen_start) #endif /* CONFIG_ARM_EFI */ +#ifdef CONFIG_SYSTEM_SUSPEND +/* + * int prepare_resume_ctx(void) + * + * CPU context saved here will be restored on resume in hyp_resume function. + * prepare_resume_ctx shall return a non-zero value. Upon restoring context + * hyp_resume shall return value zero instead. From C code that invokes + * prepare_resume_ctx, the return value is interpreted to determine whether + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). + */ +FUNC(prepare_resume_ctx) + ldr x0, =resume_cpu_context + + /* Store callee-saved registers */ + stp x19, x20, [x0, #RESUME_CTX_X19] + stp x21, x22, [x0, #RESUME_CTX_X21] + stp x23, x24, [x0, #RESUME_CTX_X23] + stp x25, x26, [x0, #RESUME_CTX_X25] + stp x27, x28, [x0, #RESUME_CTX_X27] + stp x29, lr, [x0, #RESUME_CTX_X29] + + /* Store stack-pointer */ + mov x2, sp + str x2, [x0, #RESUME_CTX_SP] + + /* Store system control registers */ + mrs x2, VBAR_EL2 + str x2, [x0, #RESUME_CTX_VBAR_EL2] + mrs x2, VTCR_EL2 + str x2, [x0, #RESUME_CTX_VTCR_EL2] + mrs x2, VTTBR_EL2 + str x2, [x0, #RESUME_CTX_VTTBR_EL2] + mrs x2, TPIDR_EL2 + str x2, [x0, #RESUME_CTX_TPIDR_EL2] + mrs x2, MDCR_EL2 + str x2, [x0, #RESUME_CTX_MDCR_EL2] + mrs x2, HSTR_EL2 + str x2, [x0, #RESUME_CTX_HSTR_EL2] + mrs x2, CPTR_EL2 + str x2, [x0, #RESUME_CTX_CPTR_EL2] + mrs x2, HCR_EL2 + str x2, [x0, #RESUME_CTX_HCR_EL2] + + /* prepare_resume_ctx must return a non-zero value */ + mov x0, #1 + ret +END(prepare_resume_ctx) + +FUNC(hyp_resume) + /* + * PSCI states that SYSTEM_SUSPEND follows the CPU_SUSPEND initial + * state rules, so PSCI-compliant firmware must enter the return + * exception level with DAIF masked. + */ + + /* Initialize the UART if earlyprintk has been enabled. */ +#ifdef CONFIG_EARLY_PRINTK + bl init_uart +#endif + PRINT_ID("- Xen resuming -\r\n") + + bl check_cpu_mode + bl cpu_init + + ldr x0, =start + adr x20, start /* x20 := paddr (start) */ + sub x20, x20, x0 /* x20 := phys-offset */ + ldr lr, =mmu_resumed + b enable_secondary_cpu_mm + +mmu_resumed: + /* Now we can access the saved context, so restore it here. */ + ldr x0, =resume_cpu_context + + /* Restore callee-saved registers */ + ldp x19, x20, [x0, #RESUME_CTX_X19] + ldp x21, x22, [x0, #RESUME_CTX_X21] + ldp x23, x24, [x0, #RESUME_CTX_X23] + ldp x25, x26, [x0, #RESUME_CTX_X25] + ldp x27, x28, [x0, #RESUME_CTX_X27] + ldp x29, lr, [x0, #RESUME_CTX_X29] + + /* Restore stack pointer */ + ldr x2, [x0, #RESUME_CTX_SP] + mov sp, x2 + + /* Restore system control registers */ + ldr x2, [x0, #RESUME_CTX_VBAR_EL2] + msr VBAR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTCR_EL2] + msr VTCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTTBR_EL2] + msr VTTBR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_TPIDR_EL2] + msr TPIDR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_MDCR_EL2] + msr MDCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HSTR_EL2] + msr HSTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_CPTR_EL2] + msr CPTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HCR_EL2] + msr HCR_EL2, x2 + isb + + /* + * Since context is restored return from this function will appear + * as return from prepare_resume_ctx. To distinguish a return from + * prepare_resume_ctx which is called upon finalizing the suspend, + * as opposed to return from this function which executes on resume, + * we need to return zero value here. + */ + mov x0, #0 + ret +END(hyp_resume) + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* * Local variables: * mode: ASM diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 31a98a1f1b..2d9fc331fc 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -3,6 +3,8 @@ #ifndef ARM_SUSPEND_H #define ARM_SUSPEND_H +#include + struct domain; struct vcpu; struct vcpu_guest_context; @@ -14,6 +16,30 @@ struct resume_info { void arch_domain_resume(struct domain *d); +#ifdef CONFIG_SYSTEM_SUSPEND +#ifdef CONFIG_ARM_64 +struct resume_cpu_context { + register_t callee_regs[12]; + register_t sp; + register_t vbar_el2; + register_t vtcr_el2; + register_t vttbr_el2; + register_t tpidr_el2; + register_t mdcr_el2; + register_t hstr_el2; + register_t cptr_el2; + register_t hcr_el2; +} __aligned(16); +#else +#error "Define resume_cpu_context structure for arm32" +#endif + +extern struct resume_cpu_context resume_cpu_context; + +int prepare_resume_ctx(void); +void hyp_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* ARM_SUSPEND_H */ /* diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c new file mode 100644 index 0000000000..6ea4a0f9cc --- /dev/null +++ b/xen/arch/arm/suspend.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +struct resume_cpu_context resume_cpu_context; + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:09:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:09:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307288.1579071 (Exim 4.92) (envelope-from ) id 1wMqcJ-00088e-1d; Tue, 12 May 2026 17:09:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307288.1579071; Tue, 12 May 2026 17:09:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcI-00085R-P0; Tue, 12 May 2026 17:09:58 +0000 Received: by outflank-mailman (input) for mailman id 1307288; Tue, 12 May 2026 17:09:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcH-0007rj-GK for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcG-00AZHt-TV for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:56 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035eca-e002-0a2a0a5209dd-0a2a45078240-46 for ; Tue, 12 May 2026 19:09:56 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee4-229c-0a2a45070019-d1558030e133-3 for ; Tue, 12 May 2026 19:09:56 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso53138125e9.3 for ; Tue, 12 May 2026 10:09:56 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Pass the Xen resume entry point (hyp_resume) to EL3 together with a zero context ID, matching Linux. This patch wires up only the host-side PSCI SYSTEM_SUSPEND invocation. The resume trampoline and context restore are provided by earlier patches in the series. Only enable this path when CONFIG_SYSTEM_SUSPEND is set and PSCI advertises SYSTEM_SUSPEND via PSCI_FEATURES. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in v9: - cache SYSTEM_SUSPEND support using PSCI_FEATURES and gate the host call on the cached capability - keep the cached SYSTEM_SUSPEND capability read-only after init - log whether firmware reports SYSTEM_SUSPEND support - pass an explicit zero context ID in the SYSTEM_SUSPEND call - drop the stale note claiming hyp_resume is still a stub --- xen/arch/arm/include/asm/psci.h | 1 + xen/arch/arm/psci.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index 48a93e6b79..bb3c73496e 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -23,6 +23,7 @@ int call_psci_cpu_on(int cpu); void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); +int call_psci_system_suspend(void); /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index b6860a7760..e05dae1133 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -17,23 +17,27 @@ #include #include #include +#include /* * While a 64-bit OS can make calls with SMC32 calling conventions, for * some calls it is necessary to use SMC64 to pass or return 64-bit values. - * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate + * For such calls PSCI_*_FN_NATIVE(x) will choose the appropriate * (native-width) function ID. */ #ifdef CONFIG_ARM_64 #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN64_##name #else #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN32_##name #endif uint32_t psci_ver; uint32_t smccc_ver; static uint32_t psci_cpu_on_nr; +static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) @@ -60,6 +64,25 @@ void call_psci_cpu_off(void) } } +int call_psci_system_suspend(void) +{ +#ifdef CONFIG_SYSTEM_SUSPEND + struct arm_smccc_res res; + + if ( !has_psci_system_suspend ) + return PSCI_NOT_SUPPORTED; + + /* Context ID is unused for the Xen resume path. */ + arm_smccc_smc(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND), __pa(hyp_resume), 0, + &res); + return PSCI_RET(res); +#else + dprintk(XENLOG_WARNING, + "SYSTEM_SUSPEND not supported (CONFIG_SYSTEM_SUSPEND disabled)\n"); + return PSCI_NOT_SUPPORTED; +#endif +} + void call_psci_system_off(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) @@ -223,9 +246,15 @@ int __init psci_init(void) psci_init_smccc(); + has_psci_system_suspend = + psci_features(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND)) == 0; + printk(XENLOG_INFO "Using PSCI v%u.%u\n", PSCI_VERSION_MAJOR(psci_ver), PSCI_VERSION_MINOR(psci_ver)); + printk(XENLOG_DEBUG "PSCI SYSTEM_SUSPEND is %ssupported by firmware\n", + has_psci_system_suspend ? "" : "not "); + return 0; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:10:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:10:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307291.1579087 (Exim 4.92) (envelope-from ) id 1wMqcL-0000HX-FO; Tue, 12 May 2026 17:10:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307291.1579087; Tue, 12 May 2026 17:10:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcL-0000FZ-7b; Tue, 12 May 2026 17:10:01 +0000 Received: by outflank-mailman (input) for mailman id 1307291; Tue, 12 May 2026 17:09:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcI-00084X-T5 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:09:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMqcI-007RzZ-9l for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:09:58 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a035ec9-2eae-0a2a0a5409dd-0a2a4501afae-42 for ; Tue, 12 May 2026 19:09:58 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a035ee6-c1f2-0a2a45010019-d155802dbd81-3 for ; Tue, 12 May 2026 19:09:58 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488b0046078so48589885e9.1 for ; Tue, 12 May 2026 10:09:58 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For non-control domains, including the hardware domain when it is not acting as a control domain, the call is handled as a guest/domain suspend request and parks the domain in SHUTDOWN_suspend. Control domains need additional sequencing because their SYSTEM_SUSPEND request is used to coordinate host-wide suspend. A non-last awake control domain may be parked in SHUTDOWN_suspend without requiring the host suspend path to be available. The last awake control domain is treated as the point where the request becomes a host-suspend request, and it may only proceed when all non-control domains are already in SHUTDOWN_suspend and the host suspend path is available. Keep the control-domain sequencing and domain-readiness checks out of PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and enforce the sequencing policy in the call handler. Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so that SHUTDOWN_suspend from the hardware domain can be treated as a domain suspend state rather than as a hardware-domain initiated host shutdown. This does not by itself imply that host-wide suspend is available. Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND capability with runtime blockers reported by Xen-owned subsystems. Add runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths lacking suspend/resume support. These blockers are runtime based, so they only apply to drivers or paths that Xen actually uses on the platform. For SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. Signed-off-by: Mykola Kvach --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/gic.c | 6 ++ xen/arch/arm/include/asm/psci.h | 3 + xen/arch/arm/include/asm/suspend.h | 10 ++- xen/arch/arm/psci.c | 7 ++ xen/arch/arm/suspend.c | 40 +++++++++ xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 +++ xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/smmu-v3.c | 4 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 14 files changed, 201 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a1..54a5bfb9ae 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -19,6 +19,7 @@ config ARM select HAS_ALTERNATIVE if HAS_VMAP select HAS_DEVICE_TREE_DISCOVERY select HAS_DOM0LESS + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE select HAS_STACK_PROTECTOR select HAS_UBSAN diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 7727ffed5a..a5efcaeb4c 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) void register_gic_ops(const struct gic_hw_operations *ops) { gic_hw_ops = ops; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("GIC driver lacks suspend/resume support"); +#endif } static void clear_cpu_lr_mask(void) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index bb3c73496e..142fa1bfe5 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); int call_psci_system_suspend(void); +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void); +#endif /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 2d9fc331fc..87db12eac3 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -38,7 +38,15 @@ extern struct resume_cpu_context resume_cpu_context; int prepare_resume_ctx(void); void hyp_resume(void); -#endif /* CONFIG_SYSTEM_SUSPEND */ +bool host_system_suspend_allowed(void); +void host_system_suspend_disable(const char *reason); + +#else /* !CONFIG_SYSTEM_SUSPEND */ + +static inline bool host_system_suspend_allowed(void) { return false; } +static inline void host_system_suspend_disable(const char *reason) {} + +#endif #endif /* ARM_SUSPEND_H */ diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index e05dae1133..e9d78668fd 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void) +{ + return has_psci_system_suspend; +} +#endif + int call_psci_cpu_on(int cpu) { struct arm_smccc_res res; diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index 6ea4a0f9cc..a571035d2c 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,9 +1,49 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include +#include +#include + struct resume_cpu_context resume_cpu_context; +/* + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid + * suspend/resume path. + * + * This gate is checked only when the last awake control domain attempts to + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. + */ +static bool host_system_suspend_runtime_allowed = true; + +static bool host_serial_suspend_allowed(void) +{ + if ( serial_suspend_supported() ) + return true; + + printk_once(XENLOG_INFO + "Host SYSTEM_SUSPEND blocked: serial driver lacks suspend/resume support\n"); + + return false; +} + +bool host_system_suspend_allowed(void) +{ + return psci_system_suspend_allowed() && + host_serial_suspend_allowed() && + host_system_suspend_runtime_allowed; +} + +void host_system_suspend_disable(const char *reason) +{ + host_system_suspend_runtime_allowed = false; + + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", + reason ? reason : "unsupported suspend/resume path"); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index ac6af6118f..48a963ae3e 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) domain_shutdown(d,SHUTDOWN_reboot); } +/* + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, + * so multiple control domains cannot all observe each other as still awake. + */ +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); + +static bool domain_in_suspend_state(struct domain *d) +{ + bool suspended; + + spin_lock(&d->shutdown_lock); + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; + spin_unlock(&d->shutdown_lock); + + return suspended; +} + +static int32_t domain_psci_system_suspend_policy(struct domain *d) +{ + struct domain *other; + bool last_awake_control_domain = true; + bool awake_non_control_domain = false; + + /* Only control domains participate in sequencing policy. */ + if ( !is_control_domain(d) ) + return 0; + + rcu_read_lock(&domlist_read_lock); + + for_each_domain ( other ) + { + bool suspended; + + if ( other == d ) + continue; + + suspended = domain_in_suspend_state(other); + if ( suspended ) + continue; + + if ( is_control_domain(other) ) + { + last_awake_control_domain = false; + break; + } + + awake_non_control_domain = true; + } + + rcu_read_unlock(&domlist_read_lock); + + /* + * Another control domain is still awake. This request is only the first + * phase of the sequencing: park this control domain and leave the host + * running. Host-wide suspend gates must not block this intermediate state. + */ + if ( !last_awake_control_domain ) + return 0; + + /* + * This is the last awake control domain. It must not be parked unless the + * request can proceed as a host-suspend request; otherwise Xen would lose + * the last domain that can coordinate the system suspend. + */ + if ( awake_non_control_domain ) + { + printk(XENLOG_DEBUG + "SYSTEM_SUSPEND denied: last awake control domain dom%u requested host suspend while non-control domains are still awake\n", + d->domain_id); + return PSCI_DENIED; + } + + /* + * Host-wide gates are relevant only for the last-control-domain case. They + * must not block parking of a non-last control domain, but they must reject + * the last control domain when host suspend is not available. + */ + if ( !host_system_suspend_allowed() ) + return PSCI_NOT_SUPPORTED; + + return 0; +} + static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) { int32_t rc; @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( is_64bit_domain(d) && is_thumb ) return PSCI_INVALID_ADDRESS; - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ - if ( is_hardware_domain(d) ) - return PSCI_NOT_SUPPORTED; - /* Ensure that all CPUs other than the calling one are offline */ domain_lock(d); for_each_vcpu ( d, v ) @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( rc ) return PSCI_DENIED; - rc = domain_shutdown(d, SHUTDOWN_suspend); + spin_lock(&vpsci_system_suspend_lock); + + rc = domain_psci_system_suspend_policy(d); + if ( !rc ) + { + rc = domain_shutdown(d, SHUTDOWN_suspend); + if ( rc ) + rc = PSCI_DENIED; + else + { + rctx->ctxt = ctxt; + rctx->wake_cpu = current; + } + } + + spin_unlock(&vpsci_system_suspend_lock); + if ( rc ) { free_vcpu_guest_context(ctxt); - return PSCI_DENIED; + return rc; } - rctx->ctxt = ctxt; - rctx->wake_cpu = current; - gprintk(XENLOG_DEBUG, "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) case PSCI_0_2_FN32_SYSTEM_RESET: case PSCI_1_0_FN32_PSCI_FEATURES: case ARM_SMCCC_VERSION_FID: - return 0; case PSCI_1_0_FN32_SYSTEM_SUSPEND: case PSCI_1_0_FN64_SYSTEM_SUSPEND: - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; + return 0; default: return PSCI_NOT_SUPPORTED; } diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480ee..816a1a4ecb 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -140,6 +140,9 @@ config HAS_EX_TABLE config HAS_FAST_MULTIPLY bool +config HAS_HWDOM_SYSTEM_SUSPEND + bool + config HAS_IOPORTS bool diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c28..d3edfb2a13 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) domain_shutdown(d, SHUTDOWN_crash); } +static inline bool want_hwdom_shutdown(uint8_t reason) +{ + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || + reason != SHUTDOWN_suspend; +} int domain_shutdown(struct domain *d, u8 reason) { @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) d->shutdown_code = reason; reason = d->shutdown_code; - if ( is_hardware_domain(d) ) + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) hwdom_shutdown(reason); if ( d->is_shutting_down ) diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c index adb312d796..cc2b5b5dee 100644 --- a/xen/drivers/char/serial.c +++ b/xen/drivers/char/serial.c @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) #ifdef CONFIG_SYSTEM_SUSPEND +static bool __read_mostly serial_suspend_available = true; + void serial_suspend(void) { int i; @@ -513,6 +515,11 @@ void serial_resume(void) com[i].driver->resume(&com[i]); } +bool serial_suspend_supported(void) +{ + return serial_suspend_available; +} + #endif /* CONFIG_SYSTEM_SUSPEND */ void __init serial_register_uart(int idx, struct uart_driver *driver, @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, /* Store UART-specific info. */ com[idx].driver = driver; com[idx].uart = uart; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !driver->suspend || !driver->resume ) + serial_suspend_available = false; +#endif } void __init serial_async_transmit(struct serial_port *port) diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/arm/iommu.c index 100545e23f..420b9fbdf0 100644 --- a/xen/drivers/passthrough/arm/iommu.c +++ b/xen/drivers/passthrough/arm/iommu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -46,6 +47,9 @@ void __init iommu_set_ops(const struct iommu_ops *ops) } iommu_ops = ops; + + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("IOMMU driver lacks suspend/resume support"); } int __init iommu_hardware_setup(void) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index 82c8ead979..443dd0e893 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -91,6 +91,7 @@ #include #include #include +#include #include "smmu-v3.h" @@ -1903,6 +1904,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) } } + host_system_suspend_disable( + "SMMUv3 MSI IRQ path is unsupported for host suspend"); + /* Add callback to free MSIs on teardown */ devm_add_action(dev, arm_smmu_free_msis, dev); } diff --git a/xen/include/xen/serial.h b/xen/include/xen/serial.h index 8e18445552..418b00ead0 100644 --- a/xen/include/xen/serial.h +++ b/xen/include/xen/serial.h @@ -137,6 +137,7 @@ const struct vuart_info* serial_vuart_info(int idx); /* Serial suspend/resume. */ void serial_suspend(void); void serial_resume(void); +bool serial_suspend_supported(void); #endif /* diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h index 6f94fd53b0..a941331035 100644 --- a/xen/include/xen/suspend.h +++ b/xen/include/xen/suspend.h @@ -6,6 +6,8 @@ #if __has_include() #include #else +struct domain; + static inline void arch_domain_resume(struct domain *d) {} #endif -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:10:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:10:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307294.1579093 (Exim 4.92) (envelope-from ) id 1wMqcM-0000Qh-8W; Tue, 12 May 2026 17:10:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307294.1579093; Tue, 12 May 2026 17:10:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMqcL-0000Oq-U9; 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The vPSCI policy, runtime driver blockers and control-domain sequencing checks are handled by the preceding commit; this change adds the code that actually drives the host suspend attempt. The backend runs from a tasklet scheduled on pCPU0, because non-boot CPUs are disabled during suspend. It freezes domains, disables the scheduler and then disables non-boot CPUs. Host-side suspend participants are handled in phases. IOMMU and console state are suspended first. Local IRQs are then disabled before suspending timer and GIC state. On resume or failure, the completed suspend phases are unwound in reverse: GIC and timer state are restored while IRQs are still disabled, local IRQs are restored, and then console and IOMMU state are restored. On boot, init_ttbr is normally initialized during secondary CPU hotplug. On uniprocessor systems this can leave init_ttbr uninitialized, so set it from the boot CPU before entering suspend. Note: the code is behind CONFIG_HAS_SYSTEM_SUSPEND, which is currently only selected when UNSUPPORTED is set and MPU is not set. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V9: - Split vPSCI availability policy, runtime host-suspend blockers and the domain-readiness precheck into the preceding commit. - Trigger the host suspend backend from the control-domain SYSTEM_SUSPEND path. - Reorder the host suspend/resume phases so the timer is suspended with local IRQs disabled and local IRQs are restored after the GIC and timer resume paths, before the console and IOMMU resume paths. - Move HAS_HWDOM_SYSTEM_SUSPEND and related logic to policy patch. Changes in V8: - Add a pre-suspend check in system_suspend() after scheduler_disable() to require all domains to be in the shut down state with SHUTDOWN_suspend before proceeding with the global suspend flow. - Drop the common-level depends on !ARM_64 || !SYSTEM_SUSPEND from CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND and model the ARM64 suspend case with an arch-selected capability instead. - Rename CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND to CONFIG_HAS_HWDOM_SYSTEM_SUSPEND. - Rename need_hwdom_shutdown() to want_hwdom_shutdown(). Changes in V7: - Control domain is responsible for host suspend. - Add an empty inline host_system_suspend() function when SYSTEM_SUSPEND config is disabled. - Use IS_ENABLED() for config checking instead of #ifdef. - Replace #ifdef checks in domain_shutdown() with IS_ENABLED() to simplify control flow. - Factor hardware domain shutdown condition into a helper (need_hwdom_shutdown()) to avoid preprocessor directives inside the function. - Squash with iommu suspend/resume commit. --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/include/asm/mm.h | 2 + xen/arch/arm/include/asm/suspend.h | 2 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/suspend.c | 140 +++++++++++++++++++++++++++++ xen/arch/arm/vpsci.c | 10 ++- 6 files changed, 154 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 54a5bfb9ae..119bc00674 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -9,6 +9,7 @@ config ARM_64 select 64BIT select HAS_DOMAIN_TYPE select HAS_FAST_MULTIPLY + select HAS_SYSTEM_SUSPEND if !MPU && UNSUPPORTED select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH config ARM diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h index 2eb8465aa9..de119cad3a 100644 --- a/xen/arch/arm/include/asm/mm.h +++ b/xen/arch/arm/include/asm/mm.h @@ -360,6 +360,8 @@ static inline void page_set_xenheap_gfn(struct page_info *p, gfn_t gfn) } while ( (y = cmpxchg(&p->u.inuse.type_info, x, nx)) != x ); } +void set_init_ttbr(lpae_t *root); + #endif /* __ARCH_ARM_MM__ */ /* * Local variables: diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 87db12eac3..a194dbb21a 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -40,11 +40,13 @@ int prepare_resume_ctx(void); void hyp_resume(void); bool host_system_suspend_allowed(void); void host_system_suspend_disable(const char *reason); +void host_system_suspend(struct domain *d); #else /* !CONFIG_SYSTEM_SUSPEND */ static inline bool host_system_suspend_allowed(void) { return false; } static inline void host_system_suspend_disable(const char *reason) {} +static inline void host_system_suspend(struct domain *d) {} #endif diff --git a/xen/arch/arm/mmu/smpboot.c b/xen/arch/arm/mmu/smpboot.c index 37e91d72b7..ff508ecf40 100644 --- a/xen/arch/arm/mmu/smpboot.c +++ b/xen/arch/arm/mmu/smpboot.c @@ -72,7 +72,7 @@ static void clear_boot_pagetables(void) clear_table(boot_third); } -static void set_init_ttbr(lpae_t *root) +void set_init_ttbr(lpae_t *root) { /* * init_ttbr is part of the identity mapping which is read-only. So diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index a571035d2c..b1cc67fbdb 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,10 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include +#include +#include +#include #include +#include #include +#include struct resume_cpu_context resume_cpu_context; @@ -44,6 +50,140 @@ void host_system_suspend_disable(const char *reason) reason ? reason : "unsupported suspend/resume path"); } +/* Xen suspend. data identifies the domain that initiated suspend. */ +static void system_suspend(void *data) +{ + int status; + unsigned long flags; + struct domain *d = (struct domain *)data; + + BUG_ON(system_state != SYS_STATE_active); + + system_state = SYS_STATE_suspend; + + printk("Xen suspending...\n"); + + freeze_domains(); + scheduler_disable(); + + /* + * Non-boot CPUs have to be disabled on suspend and enabled on resume + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to PSCI + * CPU_OFF to be called by each non-boot CPU. Depending on the underlying + * platform capabilities, this may lead to the physical powering down of + * CPUs. + */ + status = disable_nonboot_cpus(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_nonboot_cpus; + } + + console_start_sync(); + status = iommu_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_end_sync; + } + + status = console_suspend(); + if ( status ) + { + dprintk(XENLOG_ERR, "Failed to suspend the console, err=%d\n", status); + system_state = SYS_STATE_resume; + goto resume_iommu; + } + + local_irq_save(flags); + + time_suspend(); + + status = gic_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_time; + } + + set_init_ttbr(xen_pgtable); + + /* + * Enable identity mapping before entering suspend to simplify + * the resume path + */ + update_boot_mapping(true); + + if ( prepare_resume_ctx() ) + { + status = call_psci_system_suspend(); + /* + * If suspend is finalized properly by above system suspend PSCI call, + * the code below in this 'if' branch will never execute. Execution + * will continue from hyp_resume which is the hypervisor's resume point. + * In hyp_resume CPU context will be restored and since link-register is + * restored as well, it will appear to return from prepare_resume_ctx. + * The difference in returning from prepare_resume_ctx on system suspend + * versus resume is in function's return value: on suspend, the return + * value is a non-zero value, on resume it is zero. That is why the + * control flow will not re-enter this 'if' branch on resume. + */ + if ( status ) + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err=%d\n", + status); + } + + system_state = SYS_STATE_resume; + update_boot_mapping(false); + + gic_resume(); + + resume_time: + time_resume(); + + local_irq_restore(flags); + + console_resume(); + + resume_iommu: + iommu_resume(); + + resume_end_sync: + console_end_sync(); + + resume_nonboot_cpus: + /* + * The rcu_barrier() has to be added to ensure that the per cpu area is + * freed before a non-boot CPU tries to initialize it (_free_percpu_area() + * has to be called before the init_percpu_area()). This scenario occurs + * when non-boot CPUs are hot-unplugged on suspend and hotplugged on resume. + */ + rcu_barrier(); + enable_nonboot_cpus(); + + scheduler_enable(); + thaw_domains(); + + system_state = SYS_STATE_active; + + printk("Resume (status %d)\n", status); + + domain_resume(d); +} + +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL); + +void host_system_suspend(struct domain *d) +{ + system_suspend_tasklet.data = (void *)d; + /* + * The suspend procedure has to be finalized by the pCPU#0 (non-boot pCPUs + * will be disabled during the suspend). + */ + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 48a963ae3e..79100cbb1e 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -237,7 +237,8 @@ static bool domain_in_suspend_state(struct domain *d) return suspended; } -static int32_t domain_psci_system_suspend_policy(struct domain *d) +static int32_t domain_psci_system_suspend_policy(struct domain *d, + bool *host_suspend) { struct domain *other; bool last_awake_control_domain = true; @@ -300,6 +301,7 @@ static int32_t domain_psci_system_suspend_policy(struct domain *d) if ( !host_system_suspend_allowed() ) return PSCI_NOT_SUPPORTED; + *host_suspend = true; return 0; } @@ -310,6 +312,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) struct vcpu *v; struct domain *d = current->domain; bool is_thumb = epoint & 1; + bool host_suspend = false; struct resume_info *rctx = &d->arch.resume_ctx; /* THUMB set is not allowed with 64-bit domain */ @@ -334,7 +337,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) spin_lock(&vpsci_system_suspend_lock); - rc = domain_psci_system_suspend_policy(d); + rc = domain_psci_system_suspend_policy(d, &host_suspend); if ( !rc ) { rc = domain_shutdown(d, SHUTDOWN_suspend); @@ -359,6 +362,9 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); + if ( host_suspend ) + host_system_suspend(d); + return rc; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307399.1579132 (Exim 4.92) (envelope-from ) id 1wMrMb-0003pd-Qm; Tue, 12 May 2026 17:57:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307399.1579132; Tue, 12 May 2026 17:57:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMb-0003pW-Nk; Tue, 12 May 2026 17:57:49 +0000 Received: by outflank-mailman (input) for mailman id 1307399; Tue, 12 May 2026 17:57:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Q1-Ei for xen-devel@lists.xenproject.org; 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dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608666; bh=VCpUi1qw2aTk/5VvkiebTI4EVFxVnB22sLNkwL9YBf4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=C8OtUX6BcH+wQikMQAXfmgaR4vGdDRscBuS4SkctVe6FamUTgyyXnMxN4YEMJ7Tzv I+DX034qS0NsfRQU5+YyObmDQMIDl7MVGuHtgU1yFV9EUhYywR1okYmWm72Dg5rLsF AX7szD/UPQBqplpxxgbOy1v6JnbOq5X4Fd7dakUQ= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v6 3/3] arm/mpu: Implement p2m tables Date: Tue, 12 May 2026 18:57:29 +0100 Message-Id: <20260512175729.1915120-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608667-8336C161-6EE4EC13/0/0 X-purgate-type: clean X-purgate-size: 5922 From: Harry Ramsey Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v6: - Included mpu.h for MAX_MPU_REGION_NR - used void* instead of char* in pointer arithmetic - fixed typo in comment - Add Michal R-by v5: - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER - used MAX_MPU_REGION_NR instead of opencoding 255 - use 'table' in p2m_alloc_table to clear pages - remove p2m_free_vmid() from error path in p2m_init() which is already handled outside v4: - no changes v3: - Check for alloc_xenheap_pages allocation - Clear additional page allocated for ARM64 - Add check for INVALID_VCPU_ID - Remove unnecessary function generate_vsctlr - Code formatting fixes --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/p2m.h | 8 ++++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- 5 files changed, 86 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbacae..d565230f84ee 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8a3..8b86a03fee44 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a1d..1484c75b55aa 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -3,8 +3,16 @@ #ifndef __ARM_MPU_P2M_H__ #define __ARM_MPU_P2M_H__ +#include +#include +#include +#include + struct p2m_domain; +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) + static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..ed1b6dd40f40 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6aa8..f3ca8a4ab35f 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + void *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + unsigned int i; + + if ( !table ) + { + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", + d); + return -ENOMEM; + } + + p2m->root = virt_to_page(table); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_page(table + (i * PAGE_SIZE)); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported on MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); + + return p2m_alloc_table(d); } void p2m_save_state(struct vcpu *p) @@ -46,7 +99,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307397.1579115 (Exim 4.92) (envelope-from ) id 1wMrMa-0003Oo-6J; Tue, 12 May 2026 17:57:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307397.1579115; Tue, 12 May 2026 17:57:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Oh-3Q; Tue, 12 May 2026 17:57:48 +0000 Received: by outflank-mailman (input) for mailman id 1307397; Tue, 12 May 2026 17:57:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMX-0003Bf-W5 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMV-009D7s-RO for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:45 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a11-bab6-0a2a0a5309dd-0a2a4502963a-12 for ; Tue, 12 May 2026 19:57:45 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a17-af86-0a2a45020019-d98c6eaca98e-1 for ; Tue, 12 May 2026 19:57:44 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 205A6168F; Tue, 12 May 2026 10:57:38 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 024873F85F; Tue, 12 May 2026 10:57:41 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608663; bh=3OwJmJ83fF7wYUwwajm97vdwH/PiBu+huX5oR7YFd8I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YGtG+/FGraeXfKwo6j2ZszCbIexHGTz5euMS3ApNO7W1S5knzb1eWlLwl7yHl76z8 htJu4fA71TzqxS+kS3Z+OK0tqmxB6fu5EB+s8UfHIAxCpzSVgQ1fm4dMxs9A93hetA B9kf5ORAAl6b45uX7SF1vjDdqw4xYWvcUCbV/kBE= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Penny Zheng , Wei Chen , Hari Limaye , Harry Ramsey Subject: [PATCH v6 1/3] arm/mpu: implement setup_virt_paging for MPU systems Date: Tue, 12 May 2026 18:57:27 +0100 Message-Id: <20260512175729.1915120-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608664-ABB60161-24A4E566/0/0 X-purgate-type: clean X-purgate-size: 7761 From: Penny Zheng Implement setup_virt_paging for AArch64 MPU systems, taking care of stage 2 address translation regime, IPA bits, supported VMID length configuration and VTCR_EL2/VSTCR_EL2 register programming. Implement also the Armv8-R specific changes to ID_AA64MMFR0_EL1, related to the supported memory system architecture (PMSA/VMSA) and check that when MPU is built, the underlying HW is compatible with PMSA. By default MPU at EL2 and EL1 is required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey Reviewed-by: Michal Orzel --- v5: - removed spaces in inline if condition - Add Michal R-by v4: - Fixed typo in the comments - Fixed typo in the commit title and message - moved p2m_vmid_allocator_init() after write of VTCR_EL2 - Fixed printf format specifier %d -> %u v3: - Refactor unused code to more relevant commits. - Add P2M print information - Formatting issues - Update commit message v2: - Separate commit into multiple commits --- xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/processor.h | 8 +++ 4 files changed, 101 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b58..4547417df97e 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,89 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + register_t vtcr_el2 = READ_SYSREG(VTCR_EL2); + register_t vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against PA size. + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_PMSA_SUPPORT) && + (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT) ) + goto fault; + + /* Stage 1 EL1&0 translation regime uses PMSAv8 by default */ + vtcr_el2 &= ~VTCR_MSA; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8-R only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * cpuinfo sanitization makes sure we support 16-bits VMID only if all cores + * are supporting it. + * + * Set the VS bit only if 16 bit VMID is supported. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + { + vtcr_el2 |= VTCR_VS; + max_vmid = MAX_VMID_16_BIT; + } + else + vtcr_el2 &= ~VTCR_VS; + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + p2m_vmid_allocator_init(); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + printk("P2M: %u-bit IPA with %u-bit PA and %u-bit VMID\n", + p2m_ipa_bits, + pa_range_info[system_cpuinfo.mm64.pa_range], + (MAX_VMID == MAX_VMID_16_BIT) ? 16 : 8); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb5a..f3c11d871e86 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,U) << 30) +#define VSTCR_EL2_SC (_AC(0x1,U) << 20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1ad1..bf902a397068 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b39..895d7cd50244 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,9 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#define VTCR_MSA (_AC(0x1,UL)<<31) +#define VTCR_NSA (_AC(0x1,UL)<<30) + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +467,11 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307396.1579106 (Exim 4.92) (envelope-from ) id 1wMrMY-0003Bn-06; Tue, 12 May 2026 17:57:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307396.1579106; Tue, 12 May 2026 17:57:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMX-0003Bg-TR; Tue, 12 May 2026 17:57:45 +0000 Received: by outflank-mailman (input) for mailman id 1307396; Tue, 12 May 2026 17:57:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMW-0003BZ-H8 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMT-009D2R-UK for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:43 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a05-bab6-0a2a0a5309dd-0a2a4509aae2-22 for ; Tue, 12 May 2026 19:57:42 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a16-2497-0a2a45090019-d98c6eac94d0-1 for ; Tue, 12 May 2026 19:57:42 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6EF4A1684; Tue, 12 May 2026 10:57:36 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4BAE13F85F; Tue, 12 May 2026 10:57:40 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608661; bh=nReNm4K5rZibVDy0hIHmSNZc8OOuIK2HBFp4E3sLKok=; h=From:To:Cc:Subject:Date:From; b=s4Fs3ga/THENyHcOtOeLwzXdXQ7rtlVpYWuKxlxYKFfGfiqdA7JJ8+zxz8sGYNofx n/wpQaOt9HL6/eVdGGvO0/F/6zEno0MW2H0v+GLsqMKCSS1bWybis/Re9TmWb7pjHB iZ3q5fkMedUjLC5EYESdnqPfFi83nJPvqgJtK3pc= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Oleksii Kurochko" Subject: [PATCH v6 0/3] Fifth MPU Series Date: Tue, 12 May 2026 18:57:26 +0100 Message-Id: <20260512175729.1915120-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778608662-89F84A53-ED08F955/0/0 X-purgate-type: clean X-purgate-size: 1441 This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU systems docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 74 ++++++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 +++ xen/arch/arm/include/asm/mpu/p2m.h | 8 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 8 +++ xen/arch/arm/mpu/arm32/mm.c | 7 +++ xen/arch/arm/mpu/arm64/mm.c | 7 +++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 18 files changed, 349 insertions(+), 9 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 12 17:57:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 12 May 2026 17:57:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307398.1579120 (Exim 4.92) (envelope-from ) id 1wMrMa-0003VD-Iy; Tue, 12 May 2026 17:57:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307398.1579120; Tue, 12 May 2026 17:57:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMa-0003Tz-Fu; Tue, 12 May 2026 17:57:48 +0000 Received: by outflank-mailman (input) for mailman id 1307398; Tue, 12 May 2026 17:57:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wMrMZ-0003OZ-45 for xen-devel@lists.xenproject.org; Tue, 12 May 2026 17:57:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wMrMW-009D7s-Vd for xen-devel@lists.xenproject.org; Tue, 12 May 2026 19:57:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a036a11-bab6-0a2a0a5309dd-0a2a4502963a-14 for ; Tue, 12 May 2026 19:57:46 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-720697.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a036a19-af86-0a2a45020019-d98c6eacd7ce-1 for ; Tue, 12 May 2026 19:57:46 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6CC51684; Tue, 12 May 2026 10:57:39 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id A60AE3F85F; Tue, 12 May 2026 10:57:43 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778608665; bh=pUlihSCtoluRvHSQDgApxcwFy6+3MCxnxU+k0Ku8GtY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TBbSArrt/uJJn0ZPk8KH0Uc5HoDBRzJdPOfk8dunk+ud0bHsMl8NKbiZWoZgLAzT7 H1utUjad+9BZPz3jIv7WhTjgsdbkydUJkoqCHDyRc05g/kAu3vjp9V2ISgAS/aBdci WYTxFgBrnxLIPkUxhHhiVBRnDADroFY1jgRm7rGk= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v6 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Tue, 12 May 2026 18:57:28 +0100 Message-Id: <20260512175729.1915120-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260512175729.1915120-1-luca.fancellu@arm.com> References: <20260512175729.1915120-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778608666-A9B70161-2DB769CA/0/0 X-purgate-type: clean X-purgate-size: 12627 From: Harry Ramsey Add a new device tree property `v8r_el1_msa` to select the MSA (memory system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the former is the default if the property is not passed. Implement the dom0less path to parse the new device tree property, add a new domctl hypercall input parameter `v8r_el1_msa` for arm and add the sanitisation in arch_sanitise_domain_config(), the parameter is intended to be used on CONFIG_MPU systems and returns an error if selected for MMU. While there, add explicit padding and check that it's zero during arch domain config sanitisation, given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v6: - Add explicit padding to `struct xen_arch_domainconfig` and check it - Provide common v8r_el1_msa_domain_sanitise_config() for MMU/MPU - During domu_dt_v8r_el1_msa_parse() set PMSA when property not present - constify *node in domu_dt_v8r_el1_msa_parse() - Print full path of the node in domu_dt_v8r_el1_msa_parse() error msgs - typo fixing v5: - follow the way domu_dt_sci_parse and ARM_SCI is doing, but return error if property is present in MMU systems. - Align the commit message on the new changes - fix documentation - fix multiline comment - drop the explicit padding from struct xen_arch_domainconfig v4: - Rework the patch to have the v8r_el1_msa input parameter more enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. v3: - Improve commit message and device tree property description - Remove macro protection - Remove unused function is_mpu_domain - Code formatting --- docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++++ xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 ++++ xen/arch/arm/mpu/arm32/mm.c | 7 +++ xen/arch/arm/mpu/arm64/mm.c | 7 +++ xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 9 files changed, 162 insertions(+), 2 deletions(-) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b4286082f..f73839df090b 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R systems at EL1, a domain + should use PMSAv8 (MPU) or VMSAv8 (MMU). + + - "mmu" + Enables VMSAv8 at EL1. This requires hardware support and is only + optionally available on AArch64. Not supported on AArch32. + + - "mpu" + Enables PMSAv8 at EL1. This is the default behavior when the property is + not passed. This configuration requires static allocation (xen,static-mem) + and direct mapping (direct-map). + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 52cf788a45ea..fecdb33d3e3a 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -302,6 +302,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, return 0; } +static int __init +domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, + struct xen_domctl_createdomain *d_cfg, + unsigned int flags) +{ + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); + + if ( !IS_ENABLED(CONFIG_MPU) ) + { + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + + if ( !property_present ) + return 0; + + printk(XENLOG_ERR + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", + dt_node_full_name(node)); + return -EINVAL; + } + + if ( !property_present ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else + { + const char *v8r_el1_msa; + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); + + if ( ret ) + return ret; + + if ( !strcmp(v8r_el1_msa, "mpu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + else if ( !strcmp(v8r_el1_msa, "mmu") ) + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; + else + { + printk(XENLOG_ERR + "v8r_el1_msa value (%s) not valid for domain %s\n", + v8r_el1_msa, dt_node_full_name(node)); + return -EINVAL; + } + } + + switch ( d_cfg->arch.v8r_el1_msa ) + { + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + { + printk(XENLOG_ERR + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", + dt_node_full_name(node)); + return -EINVAL; + } + break; + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: + if ( !has_v8r_vmsa_support() ) + { + printk(XENLOG_ERR + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); + return -EINVAL; + } + break; + + default: + return -EINVAL; + } + + return 0; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { @@ -315,6 +386,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) + panic("Error getting v8r_el1_msa configuration\n"); + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..e579c3b1bb3c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -538,6 +539,24 @@ void vcpu_switch_to_aarch64_mode(struct vcpu *v) v->arch.hcr_el2 |= HCR_RW; } +static bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + uint8_t v8r_el1_msa = config->arch.v8r_el1_msa; + + if ( !IS_ENABLED(CONFIG_MPU) ) + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + + if ( IS_ENABLED(CONFIG_ARM_32) ) + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + + if ( IS_ENABLED(CONFIG_ARM_64) ) + return (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA) || + (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA); + + return false; +} + int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { unsigned int max_vcpus; @@ -554,6 +573,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + /* Check config structure padding */ + if ( config->arch.pad ) + { + dprintk(XENLOG_INFO, + "Invalid domain configuration during domain creation\n"); + return -EINVAL; + } + /* Check feature flags */ if ( sve_vl_bits > 0 ) { @@ -630,6 +657,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( !v8r_el1_msa_domain_sanitise_config(config) ) + { + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); + return -EINVAL; + } + return sci_domain_sanitise_config(config); } @@ -722,6 +755,10 @@ int arch_domain_create(struct domain *d, d->arch.sve_vl = config->arch.sve_vl; #endif +#ifdef CONFIG_MPU + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..ac7300e41fcd 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -112,6 +112,10 @@ struct arch_domain #endif struct resume_info resume_ctx; + +#ifdef CONFIG_MPU + uint8_t v8r_el1_msa; +#endif } __cacheline_aligned; struct arch_vcpu diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 6674dac5e2f8..13e88fc0891b 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,16 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#ifdef CONFIG_MPU +/* Utility function to determine if an Armv8-R processor supports VMSA. */ +bool has_v8r_vmsa_support(void); +#else +static inline bool has_v8r_vmsa_support(void) +{ + return false; +} +#endif /* CONFIG_MPU */ + #endif /* diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c index a4673c351141..702bea804acd 100644 --- a/xen/arch/arm/mpu/arm32/mm.c +++ b/xen/arch/arm/mpu/arm32/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ case num: \ @@ -38,6 +40,11 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return false; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c index ed643cad4073..b8abcc6f7bc6 100644 --- a/xen/arch/arm/mpu/arm64/mm.c +++ b/xen/arch/arm/mpu/arm64/mm.c @@ -5,6 +5,8 @@ #include #include #include +#include +#include /* * The following are needed for the cases: GENERATE_WRITE_PR_REG_CASE @@ -32,6 +34,11 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf70684..7d6f87e8b2b1 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 + struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; @@ -355,6 +359,9 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t v8r_el1_msa; + uint16_t pad; }; #endif /* __XEN__ || __XEN_TOOLS__ */ diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..23124547f347 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -30,9 +30,9 @@ * fields) don't require a change of the version. * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! * - * Last version bump: Xen 4.19 + * Last version bump: Xen 4.22 */ -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 /* * NB. xen_domctl.domain is an IN/OUT parameter for this operation. -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 13 05:51:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 05:51:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307573.1579170 (Exim 4.92) (envelope-from ) id 1wN2VL-0003P0-HX; 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Tue, 12 May 2026 22:51:30 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Wed, 13 May 2026 07:51:19 +0200 X-Gm-Features: AVHnY4Kt3Zf2s_av28Irr6I9SAXTnMMXzbj2154gD1vg7BivIcdLyJ0bhJxZRRw Message-ID: Subject: Re: [PATCH v2 2/6] xen/arm: ffa: Track hypervisor notifications in a bitmap To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1778651492-81B70161-82860AF4/0/0 X-purgate-type: clean X-purgate-size: 7434 Hi Bertrand, On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis wrote: > > Hypervisor notifications are currently tracked with a dedicated > buff_full_pending boolean. The old RX-buffer-full path also exposed a > pending indication indirectly via vm_pending, so > FFA_NOTIFICATION_INFO_GET could clear that summary before the guest > retrieved the Hypervisor notification bitmap with > FFA_NOTIFICATION_GET. > > Replace the single boolean with a Hypervisor notification bitmap > protected by notif_lock. INFO_GET reports pending when hyp_pending is > non-zero, GET returns and clears the HYP bitmap under the lock, and > RX-buffer-full now keeps notif_lock held across the local NPI > decision. notif_irq_raised is only set when an NPI is actually > injected, and is cleared once the local pending state is consumed. > > Initialize and clear the bitmap during domain lifecycle handling, and > use ctx->ffa_id for bitmap create and destroy so the notification > state stays tied to the cached FF-A endpoint ID. > > If the local injection attempt fails because no vCPU is online, > hyp_pending remains set and notif_irq_raised remains clear. This > keeps the RX-buffer-full notification pending until the guest > retrieves it, without publishing a successful local IRQ state too > early. > > Functional impact: RX-buffer-full remains pending in hyp_pending > until FFA_NOTIFICATION_GET, and failed local NPI injection no longer > leaves Xen thinking the interrupt was already raised. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - clarify that v1 exposed RX-buffer-full indirectly via vm_pending > - document that v2 keeps the HYP pending indication until > FFA_NOTIFICATION_GET > - keep RX-buffer-full pending state stable across failed local NPI > injection attempts > --- > xen/arch/arm/tee/ffa_notif.c | 56 ++++++++++++++++++++++++++-------- > xen/arch/arm/tee/ffa_private.h | 15 +++++++-- > 2 files changed, 56 insertions(+), 15 deletions(-) Looks good. Reviewed-by: Jens Wiklander Cheers, Jens > > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index 07bc5cb3a430..a631481e3815 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -19,7 +19,7 @@ > static bool __ro_after_init fw_notif_enabled; > static unsigned int __ro_after_init notif_sri_irq; > > -static void inject_notif_pending(struct domain *d) > +static bool inject_notif_pending(struct domain *d) > { > struct vcpu *v; > > @@ -33,13 +33,15 @@ static void inject_notif_pending(struct domain *d) > if ( is_vcpu_online(v) ) > { > vgic_inject_irq(d, v, GUEST_FFA_NOTIF_PEND_INTR_ID, true); > - return; > + return true; > } > } > > if ( printk_ratelimit() ) > printk(XENLOG_G_DEBUG "%pd: ffa: can't inject NPI, all vCPUs off= line\n", > d); > + > + return false; > } > > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs) > @@ -94,8 +96,15 @@ void ffa_handle_notification_info_get(struct cpu_user_= regs *regs) > > notif_pending =3D test_and_clear_bool(ctx->notif.secure_pending); > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + { > notif_pending |=3D test_and_clear_bool(ctx->notif.vm_pending); > > + spin_lock(&ctx->notif.notif_lock); > + if ( ctx->notif.hyp_pending ) > + notif_pending =3D true; > + spin_unlock(&ctx->notif.notif_lock); > + } > + > if ( notif_pending ) > { > /* A pending global notification for the guest */ > @@ -174,12 +183,19 @@ void ffa_handle_notification_get(struct cpu_user_re= gs *regs) > w6 =3D resp.a6; > } > > - if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) && > - flags & FFA_NOTIF_FLAG_BITMAP_HYP && > - test_and_clear_bool(ctx->notif.buff_full_pending) ) > + if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > - ACCESS_ONCE(ctx->notif.vm_pending) =3D false; > - w7 =3D FFA_NOTIF_RX_BUFFER_FULL; > + spin_lock(&ctx->notif.notif_lock); > + > + if ( (flags & FFA_NOTIF_FLAG_BITMAP_HYP) && ctx->notif.hyp_pendi= ng ) > + { > + w7 =3D ctx->notif.hyp_pending; > + ctx->notif.hyp_pending =3D 0; > + if ( !ctx->notif.vm_pending ) > + ctx->notif.notif_irq_raised =3D false; > + } > + > + spin_unlock(&ctx->notif.notif_lock); > } > > ffa_set_regs(regs, FFA_SUCCESS_32, 0, w2, w3, w4, w5, w6, w7); > @@ -211,9 +227,12 @@ void ffa_raise_rx_buffer_full(struct domain *d) > if ( !ctx ) > return; > > - ACCESS_ONCE(ctx->notif.buff_full_pending) =3D true; > - if ( !test_and_set_bool(ctx->notif.vm_pending) ) > - inject_notif_pending(d); > + spin_lock(&ctx->notif.notif_lock); > + ctx->notif.hyp_pending |=3D FFA_NOTIF_RX_BUFFER_FULL; > + if ( !ctx->notif.notif_irq_raised && > + inject_notif_pending(d) ) > + ctx->notif.notif_irq_raised =3D true; > + spin_unlock(&ctx->notif.notif_lock); > } > #endif > > @@ -426,12 +445,16 @@ void ffa_notif_init(void) > > int ffa_notif_domain_init(struct domain *d) > { > + struct ffa_ctx *ctx =3D d->arch.tee; > int32_t res; > > + spin_lock_init(&ctx->notif.notif_lock); > + ctx->notif.notif_irq_raised =3D false; > + ctx->notif.hyp_pending =3D 0; > + > if ( fw_notif_enabled ) > { > - > - res =3D ffa_notification_bitmap_create(ffa_get_vm_id(d), d->max_= vcpus); > + res =3D ffa_notification_bitmap_create(ctx->ffa_id, d->max_vcpus= ); > if ( res ) > return -ENOMEM; > } > @@ -441,10 +464,17 @@ int ffa_notif_domain_init(struct domain *d) > > void ffa_notif_domain_destroy(struct domain *d) > { > + struct ffa_ctx *ctx =3D d->arch.tee; > + > + spin_lock(&ctx->notif.notif_lock); > + ctx->notif.notif_irq_raised =3D false; > + ctx->notif.hyp_pending =3D 0; > + spin_unlock(&ctx->notif.notif_lock); > + > /* > * Call bitmap_destroy even if bitmap create failed as the SPMC will > * return a DENIED error that we will ignore. > */ > if ( fw_notif_enabled ) > - ffa_notification_bitmap_destroy(ffa_get_vm_id(d)); > + ffa_notification_bitmap_destroy(ctx->ffa_id); > } > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index c291f32b56ff..9ddda3f88986 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -340,9 +340,20 @@ struct ffa_ctx_notif { > bool vm_pending; > > /* > - * True if domain has buffer full notification pending > + * Lock protecting the hypervisor-managed notification state. > */ > - bool buff_full_pending; > + spinlock_t notif_lock; > + > + /* > + * Tracks whether a local notification pending interrupt was raised. > + * Protected by notif_lock. > + */ > + bool notif_irq_raised; > + > + /* > + * Bitmap of pending hypervisor notifications (for HYP bitmap querie= s). > + */ > + uint32_t hyp_pending; > }; > > struct ffa_ctx { > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Wed May 13 05:52:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 05:52:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307577.1579178 (Exim 4.92) (envelope-from ) id 1wN2Vu-0003nS-R3; Wed, 13 May 2026 05:52:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307577.1579178; Wed, 13 May 2026 05:52:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN2Vu-0003nL-OF; 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Tue, 12 May 2026 22:52:06 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Jens Wiklander Date: Wed, 13 May 2026 07:51:55 +0200 X-Gm-Features: AVHnY4JDr4br8YW584uPXHxxnLvNtoDya9_GfV9ljZW70CeJkuhrYmlrDTHC6SY Message-ID: Subject: Re: [PATCH v2 4/6] xen/arm: ffa: Preserve secure notification state when polling SPMC To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778651528-40E68938-CD8BE204/0/0 X-purgate-type: clean X-purgate-size: 7845 Hi Bertrand, On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis wrote: > > Secure pending state is latched when the SPMC raises the schedule > receiver interrupt, but Xen currently clears that latch too aggressively. > Guest FFA_NOTIFICATION_INFO_GET consumes secure_pending even though it > only reports pending state, and secure FFA_NOTIFICATION_GET only clears > the latch when both SP and SPM bitmaps are requested together. This can > drop a pending indication before the receiver retrieves secure > notifications, or keep INFO_GET reporting stale secure pending state > after a successful GET. > > Keep secure_pending as a latched indication until secure notifications > are actually retrieved. Guest FFA_NOTIFICATION_INFO_GET now reports the > latched state without clearing it, while a successful secure > FFA_NOTIFICATION_GET clears the latch regardless of which secure bitmap > flags were requested. Also protect secure_pending with notif_lock, > serialize SPMC INFO_GET polling behind notif_info_lock, and preserve the > caller-visible INFO_GET success width. > > Functional impact: guest INFO_GET preserves the secure pending > indication until secure notifications are retrieved, and successful > secure GET clears the guest-visible pending latch. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - drop the defensive fw_notif_enabled guard in notif_sri_action() > --- > xen/arch/arm/tee/ffa_notif.c | 51 ++++++++++++++++++++++-------------- > 1 file changed, 32 insertions(+), 19 deletions(-) Looks good. Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index 1260f98a77e9..e1cd852d1c53 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -18,6 +18,7 @@ > > static bool __ro_after_init fw_notif_enabled; > static unsigned int __ro_after_init notif_sri_irq; > +static DEFINE_SPINLOCK(notif_info_lock); > > static bool inject_notif_pending(struct domain *d) > { > @@ -111,6 +112,7 @@ void ffa_handle_notification_info_get(struct cpu_user= _regs *regs) > { > struct domain *d =3D current->domain; > struct ffa_ctx *ctx =3D d->arch.tee; > + uint32_t fid =3D get_user_reg(regs, 0); > bool notif_pending; > > if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !fw_notif_enabled ) > @@ -119,7 +121,10 @@ void ffa_handle_notification_info_get(struct cpu_use= r_regs *regs) > return; > } > > - notif_pending =3D test_and_clear_bool(ctx->notif.secure_pending); > + spin_lock(&ctx->notif.notif_lock); > + notif_pending =3D ctx->notif.secure_pending; > + spin_unlock(&ctx->notif.notif_lock); > + > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > notif_pending |=3D test_and_clear_bool(ctx->notif.vm_pending); > @@ -133,7 +138,9 @@ void ffa_handle_notification_info_get(struct cpu_user= _regs *regs) > if ( notif_pending ) > { > /* A pending global notification for the guest */ > - ffa_set_regs(regs, FFA_SUCCESS_64, 0, > + ffa_set_regs(regs, > + smccc_is_conv_64(fid) ? FFA_SUCCESS_64 : FFA_SUCCES= S_32, > + 0, > 1U << FFA_NOTIF_INFO_GET_ID_COUNT_SHIFT, ffa_get_vm= _id(d), > 0, 0, 0, 0); > } > @@ -156,6 +163,8 @@ void ffa_handle_notification_get(struct cpu_user_regs= *regs) > uint32_t w5 =3D 0; > uint32_t w6 =3D 0; > uint32_t w7 =3D 0; > + uint32_t secure_flags =3D flags & ( FFA_NOTIF_FLAG_BITMAP_SP | > + FFA_NOTIF_FLAG_BITMAP_SPM ); > > if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) && !fw_notif_enabled ) > { > @@ -175,27 +184,16 @@ void ffa_handle_notification_get(struct cpu_user_re= gs *regs) > return; > } > > - if ( fw_notif_enabled && (flags & ( FFA_NOTIF_FLAG_BITMAP_SP | > - FFA_NOTIF_FLAG_BITMAP_SPM )) ) > + if ( fw_notif_enabled && secure_flags ) > { > struct arm_smccc_1_2_regs arg =3D { > .a0 =3D FFA_NOTIFICATION_GET, > .a1 =3D recv, > - .a2 =3D flags & ( FFA_NOTIF_FLAG_BITMAP_SP | > - FFA_NOTIF_FLAG_BITMAP_SPM ), > + .a2 =3D secure_flags, > }; > struct arm_smccc_1_2_regs resp; > int32_t e; > > - /* > - * Clear secure pending if both FFA_NOTIF_FLAG_BITMAP_SP and > - * FFA_NOTIF_FLAG_BITMAP_SPM are set since secure world can't ha= ve > - * any more pending notifications. > - */ > - if ( ( flags & FFA_NOTIF_FLAG_BITMAP_SP ) && > - ( flags & FFA_NOTIF_FLAG_BITMAP_SPM ) ) > - ACCESS_ONCE(ctx->notif.secure_pending) =3D false; > - > arm_smccc_1_2_smc(&arg, &resp); > e =3D ffa_get_ret_code(&resp); > if ( e ) > @@ -212,6 +210,10 @@ void ffa_handle_notification_get(struct cpu_user_reg= s *regs) > > if ( flags & FFA_NOTIF_FLAG_BITMAP_SPM ) > w6 =3D resp.a6; > + > + spin_lock(&ctx->notif.notif_lock); > + ctx->notif.secure_pending =3D false; > + spin_unlock(&ctx->notif.notif_lock); > } > > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > @@ -356,7 +358,10 @@ static void notif_vm_pend_intr(uint16_t vm_id) > * guarantees that the data structure isn't freed while we're access= ing > * it. > */ > - ACCESS_ONCE(ctx->notif.secure_pending) =3D true; > + spin_lock(&ctx->notif.notif_lock); > + ctx->notif.secure_pending =3D true; > + spin_unlock(&ctx->notif.notif_lock); > + > inject_notif_pending(d); > > out_unlock: > @@ -375,11 +380,15 @@ static void notif_sri_action(void *unused) > unsigned int n; > int32_t res; > > - do { > + spin_lock(¬if_info_lock); > + > + do > + { > arm_smccc_1_2_smc(&arg, &resp); > res =3D ffa_get_ret_code(&resp); > if ( res ) > { > + spin_unlock(¬if_info_lock); > if ( res !=3D FFA_RET_NO_DATA && printk_ratelimit() ) > printk(XENLOG_WARNING > "ffa: notification info get failed: error %d\n", = res); > @@ -393,7 +402,7 @@ static void notif_sri_action(void *unused) > id_pos =3D 0; > for ( n =3D 0; n < list_count; n++ ) > { > - unsigned int count =3D ((ids_count >> 2 * n) & 0x3) + 1; > + unsigned int count =3D ((ids_count >> (2 * n)) & 0x3) + 1; > uint16_t vm_id =3D get_id_from_resp(&resp, id_pos); > > notif_vm_pend_intr(vm_id); > @@ -401,7 +410,9 @@ static void notif_sri_action(void *unused) > id_pos +=3D count; > } > > - } while (resp.a2 & FFA_NOTIF_INFO_GET_MORE_FLAG); > + } while ( resp.a2 & FFA_NOTIF_INFO_GET_MORE_FLAG ); > + > + spin_unlock(¬if_info_lock); > } > > static DECLARE_TASKLET(notif_sri_tasklet, notif_sri_action, NULL); > @@ -489,6 +500,7 @@ int ffa_notif_domain_init(struct domain *d) > > spin_lock_init(&ctx->notif.notif_lock); > ctx->notif.notif_irq_raised =3D false; > + ctx->notif.secure_pending =3D false; > ctx->notif.hyp_pending =3D 0; > > if ( fw_notif_enabled ) > @@ -507,6 +519,7 @@ void ffa_notif_domain_destroy(struct domain *d) > > spin_lock(&ctx->notif.notif_lock); > ctx->notif.notif_irq_raised =3D false; > + ctx->notif.secure_pending =3D false; > ctx->notif.hyp_pending =3D 0; > spin_unlock(&ctx->notif.notif_lock); > > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Wed May 13 05:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 05:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307585.1579189 (Exim 4.92) (envelope-from ) id 1wN2WZ-0004MB-4Z; Wed, 13 May 2026 05:52:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307585.1579189; Wed, 13 May 2026 05:52:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN2WZ-0004M3-0N; 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Tue, 12 May 2026 22:52:46 -0700 (PDT) MIME-Version: 1.0 References: <13a7b810346a31acb5b1407b51c17141aebb33f8.1776955622.git.bertrand.marquis@arm.com> In-Reply-To: <13a7b810346a31acb5b1407b51c17141aebb33f8.1776955622.git.bertrand.marquis@arm.com> From: Jens Wiklander Date: Wed, 13 May 2026 07:52:35 +0200 X-Gm-Features: AVHnY4K9JECQh14N9OrT82FgU5rHyonVvTFLPN2aLmujgK0Zwpmvyj1lSGGAIJI Message-ID: Subject: Re: [PATCH v2 5/6] xen/arm: ffa: Track VM notification bindings locally To: Bertrand Marquis Cc: xen-devel@lists.xenproject.org, Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778651568-3BB6C938-188A492E/0/0 X-purgate-type: clean X-purgate-size: 8241 Hi Bertrand, On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis wrote: > > VM-to-VM notifications need receiver-side bind state so Xen can validate > which sender owns each notification bit. Non-secure BIND and UNBIND > requests currently have no local state and cannot enforce that contract. > > Add per-bit VM notification binding state to struct ffa_ctx_notif and > use it to handle non-secure BIND and UNBIND requests when > CONFIG_FFA_VM_TO_VM is enabled. The update helper validates the whole > request under notif_lock before mutating anything, denies bind or > unbind when a bit is pending, rejects rebinding to a different sender, > and keeps rebinding to the same sender idempotent. > > Promote vm_pending to a bitmap so the bind logic can reason per > notification ID, use that bitmap directly when reporting pending state, > and initialize and clear the new VM notification state during domain > init and teardown. > > Functional impact: when CONFIG_FFA_VM_TO_VM is enabled, Xen tracks VM > notification bindings locally and validates non-secure bind and unbind > requests against that state. > > Signed-off-by: Bertrand Marquis > --- > Changes since v1: > - use memset() to clear vm_bind[] in init/destroy > - replace the file-scope #error check with BUILD_BUG_ON() > --- > xen/arch/arm/tee/ffa_notif.c | 96 ++++++++++++++++++++++++++++++---- > xen/arch/arm/tee/ffa_private.h | 11 ++-- > 2 files changed, 94 insertions(+), 13 deletions(-) Looks good. Reviewed-by: Jens Wiklander Cheers, Jens > > diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c > index e1cd852d1c53..a841c8f8d747 100644 > --- a/xen/arch/arm/tee/ffa_notif.c > +++ b/xen/arch/arm/tee/ffa_notif.c > @@ -8,6 +8,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -58,6 +59,54 @@ static int32_t ffa_notif_validate_params(uint16_t dom_= id, uint16_t caller_id, > return FFA_RET_OK; > } > > +static int32_t ffa_notif_update_vm_binding(struct ffa_ctx *ctx, > + uint16_t dest_id, uint64_t bi= tmap, > + bool bind) > +{ > + unsigned int id; > + int32_t ret =3D FFA_RET_OK; > + > + spin_lock(&ctx->notif.notif_lock); > + > + for ( id =3D 0; id < FFA_NUM_VM_NOTIF; id++ ) > + { > + if ( !(bitmap & BIT(id, ULL)) ) > + continue; > + > + if ( ctx->notif.vm_pending & BIT(id, ULL) ) > + { > + ret =3D FFA_RET_DENIED; > + goto out_unlock; > + } > + > + if ( bind ) > + { > + if ( ctx->notif.vm_bind[id] !=3D 0 && > + ctx->notif.vm_bind[id] !=3D dest_id ) > + { > + ret =3D FFA_RET_DENIED; > + goto out_unlock; > + } > + } > + else if ( ctx->notif.vm_bind[id] !=3D dest_id ) > + { > + ret =3D FFA_RET_DENIED; > + goto out_unlock; > + } > + } > + > + for ( id =3D 0; id < FFA_NUM_VM_NOTIF; id++ ) > + { > + if ( bitmap & BIT(id, ULL) ) > + ctx->notif.vm_bind[id] =3D bind ? dest_id : 0; > + } > + > +out_unlock: > + spin_unlock(&ctx->notif.notif_lock); > + > + return ret; > +} > + > int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs) > { > struct domain *d =3D current->domain; > @@ -78,11 +127,21 @@ int32_t ffa_handle_notification_bind(struct cpu_user= _regs *regs) > if ( ret ) > return ret; > > - if ( FFA_ID_IS_SECURE(dest_id) && fw_notif_enabled ) > - return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags, > - bitmap_lo, bitmap_hi); > + if ( FFA_ID_IS_SECURE(dest_id) ) > + { > + if ( fw_notif_enabled ) > + return ffa_simple_call(FFA_NOTIFICATION_BIND, src_dst, flags= , > + bitmap_lo, bitmap_hi); > > - return FFA_RET_NOT_SUPPORTED; > + return FFA_RET_NOT_SUPPORTED; > + } > + > + if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + return FFA_RET_NOT_SUPPORTED; > + > + return ffa_notif_update_vm_binding(ctx, dest_id, > + ((uint64_t)bitmap_hi << 32) | bit= map_lo, > + true); > } > > int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs) > @@ -101,11 +160,21 @@ int32_t ffa_handle_notification_unbind(struct cpu_u= ser_regs *regs) > if ( ret ) > return ret; > > - if ( FFA_ID_IS_SECURE(dest_id) && fw_notif_enabled ) > - return ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, bitm= ap_lo, > - bitmap_hi); > + if ( FFA_ID_IS_SECURE(dest_id) ) > + { > + if ( fw_notif_enabled ) > + return ffa_simple_call(FFA_NOTIFICATION_UNBIND, src_dst, 0, > + bitmap_lo, bitmap_hi); > > - return FFA_RET_NOT_SUPPORTED; > + return FFA_RET_NOT_SUPPORTED; > + } > + > + if ( !IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > + return FFA_RET_NOT_SUPPORTED; > + > + return ffa_notif_update_vm_binding(ctx, dest_id, > + ((uint64_t)bitmap_hi << 32) | bit= map_lo, > + false); > } > > void ffa_handle_notification_info_get(struct cpu_user_regs *regs) > @@ -127,9 +196,10 @@ void ffa_handle_notification_info_get(struct cpu_use= r_regs *regs) > > if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > { > - notif_pending |=3D test_and_clear_bool(ctx->notif.vm_pending); > - > spin_lock(&ctx->notif.notif_lock); > + if ( ctx->notif.vm_pending ) > + notif_pending =3D true; > + > if ( ctx->notif.hyp_pending ) > notif_pending =3D true; > spin_unlock(&ctx->notif.notif_lock); > @@ -498,9 +568,13 @@ int ffa_notif_domain_init(struct domain *d) > struct ffa_ctx *ctx =3D d->arch.tee; > int32_t res; > > + BUILD_BUG_ON(FFA_NUM_VM_NOTIF > 64); > + > spin_lock_init(&ctx->notif.notif_lock); > ctx->notif.notif_irq_raised =3D false; > ctx->notif.secure_pending =3D false; > + ctx->notif.vm_pending =3D 0; > + memset(ctx->notif.vm_bind, 0, sizeof(ctx->notif.vm_bind)); > ctx->notif.hyp_pending =3D 0; > > if ( fw_notif_enabled ) > @@ -520,6 +594,8 @@ void ffa_notif_domain_destroy(struct domain *d) > spin_lock(&ctx->notif.notif_lock); > ctx->notif.notif_irq_raised =3D false; > ctx->notif.secure_pending =3D false; > + ctx->notif.vm_pending =3D 0; > + memset(ctx->notif.vm_bind, 0, sizeof(ctx->notif.vm_bind)); > ctx->notif.hyp_pending =3D 0; > spin_unlock(&ctx->notif.notif_lock); > > diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_privat= e.h > index 9ddda3f88986..78a0a9815d56 100644 > --- a/xen/arch/arm/tee/ffa_private.h > +++ b/xen/arch/arm/tee/ffa_private.h > @@ -236,6 +236,7 @@ > #define FFA_NOTIF_INFO_GET_ID_COUNT_MASK 0x1F > > #define FFA_NOTIF_RX_BUFFER_FULL BIT(0, U) > +#define FFA_NUM_VM_NOTIF 64U > > /* Feature IDs used with FFA_FEATURES */ > #define FFA_FEATURE_NOTIF_PEND_INTR 0x1U > @@ -334,10 +335,14 @@ struct ffa_ctx_notif { > bool secure_pending; > > /* > - * True if domain is reported by FFA_NOTIFICATION_INFO_GET to have > - * pending notifications from VMs (including framework ones). > + * Bitmap of pending notifications from VMs (including framework one= s). > + */ > + uint64_t vm_pending; > + > + /* > + * Source endpoint bound to each VM notification ID (0 means unbound= ). > */ > - bool vm_pending; > + uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > > /* > * Lock protecting the hypervisor-managed notification state. > -- > 2.53.0 > From xen-devel-bounces@lists.xenproject.org Wed May 13 05:53:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 05:53:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307591.1579197 (Exim 4.92) (envelope-from ) id 1wN2XL-0004pA-Bl; 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Tue, 12 May 2026 22:53:34 -0700 (PDT) MIME-Version: 1.0 References: <1ead2af7182a0501f16e7b4e9ad3e58ccd8f538c.1776955622.git.bertrand.marquis@arm.com> <109D53DA-85D7-4AA5-BBB1-F54DF529BA8D@arm.com> In-Reply-To: <109D53DA-85D7-4AA5-BBB1-F54DF529BA8D@arm.com> From: Jens Wiklander Date: Wed, 13 May 2026 07:53:23 +0200 X-Gm-Features: AVHnY4In8dqg6cLibmw3h9X9c5XFn51UMHigSTRhtcPOk9mPT4p3t68Pzg_54gU Message-ID: Subject: Re: [PATCH v2 6/6] xen/arm: ffa: Deliver VM-to-VM notifications locally To: Bertrand Marquis Cc: "xen-devel@lists.xenproject.org" , Volodymyr Babchuk , Stefano Stabellini , Julien Grall , Michal Orzel Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1778651616-29F7D3FF-8A44E5E3/0/0 X-purgate-type: clean X-purgate-size: 11828 Hi Bertrand, On Mon, May 11, 2026 at 3:17=E2=80=AFPM Bertrand Marquis wrote: > > Hi Jens, > > > On 5 May 2026, at 11:21, Jens Wiklander wro= te: > > > > Hi Bertrand, > > > > On Wed, Apr 29, 2026 at 7:44=E2=80=AFAM Bertrand Marquis > > wrote: > >> > >> VM notification binding and pending tracking exist for non-secure > >> endpoints, but FFA_NOTIFICATION_SET still only forwards secure > >> destinations to the SPMC. Non-secure VMs therefore cannot receive > >> notifications from other VMs. Local NPI delivery also needs explicit > >> re-arm tracking so repeated raises are not lost while the interrupt is > >> already pending. > >> > >> Add a local VM notification delivery path for non-secure destinations. > >> notification_set_vm() resolves the destination endpoint, verifies that > >> every requested bit is bound to the sender, sets the receiver's > >> vm_pending bitmap under notif_lock, and raises an NPI only when local > >> pending state is not already armed. > >> > >> Track whether a local NPI is already armed with notif_irq_raised, > >> clear that state once both VM and hypervisor pending bitmaps are > >> drained, and keep notif_lock held across the VM notification injection > >> attempt. If no destination vCPU is online, leave the pending bits set > >> and keep notif_irq_raised clear so delivery can be retried later. > >> Also expose firmware notification availability so FFA_FEATURES only > >> advertises notification support when it is actually provided by the > >> firmware or by CONFIG_FFA_VM_TO_VM. > >> > >> Functional impact: when CONFIG_FFA_VM_TO_VM is enabled, non-secure > >> FFA_NOTIFICATION_SET delivers VM-to-VM notifications locally and keeps > >> NPI delivery reliable across repeated raises. > >> > >> Signed-off-by: Bertrand Marquis > >> --- > >> Changes since v1: > >> - serialize notification_set_vm() state updates with the NPI attempt > >> - keep pending VM notifications set when local injection fails > >> --- > >> xen/arch/arm/tee/ffa.c | 24 ++++++++-- > >> xen/arch/arm/tee/ffa_notif.c | 82 ++++++++++++++++++++++++++++++++-- > >> xen/arch/arm/tee/ffa_private.h | 17 ++++--- > >> 3 files changed, 107 insertions(+), 16 deletions(-) > >> > >> diff --git a/xen/arch/arm/tee/ffa.c b/xen/arch/arm/tee/ffa.c > >> index 1fe33f26454a..7fe021049cba 100644 > >> --- a/xen/arch/arm/tee/ffa.c > >> +++ b/xen/arch/arm/tee/ffa.c > >> @@ -39,8 +39,13 @@ > >> * o FFA_MSG_SEND_DIRECT_REQ: > >> * - only supported from a VM to an SP > >> * o FFA_NOTIFICATION_*: > >> + * - only supported when firmware notifications are enabled or VM-t= o-VM > >> + * support is built in > >> * - only supports global notifications, that is, per vCPU notificat= ions > >> - * are not supported > >> + * are not supported and secure per-vCPU notification information= is > >> + * not forwarded > >> + * - the source endpoint ID reported for a notification may no long= er > >> + * exist by the time the receiver consumes it > >> * - doesn't support signalling the secondary scheduler of pending > >> * notification for secure partitions > >> * - doesn't support notifications for Xen itself > >> @@ -245,6 +250,8 @@ static void handle_features(struct cpu_user_regs *= regs) > >> uint32_t a1 =3D get_user_reg(regs, 1); > >> struct domain *d =3D current->domain; > >> struct ffa_ctx *ctx =3D d->arch.tee; > >> + bool notif_supported =3D IS_ENABLED(CONFIG_FFA_VM_TO_VM) || > >> + ffa_notif_fw_enabled(); > >> > >> /* > >> * FFA_FEATURES defines w2 as input properties only for specific > >> @@ -343,10 +350,16 @@ static void handle_features(struct cpu_user_regs= *regs) > >> > >> break; > >> case FFA_FEATURE_NOTIF_PEND_INTR: > >> - ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, 0); > >> + if ( notif_supported ) > >> + ffa_set_regs_success(regs, GUEST_FFA_NOTIF_PEND_INTR_ID, = 0); > >> + else > >> + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > >> break; > >> case FFA_FEATURE_SCHEDULE_RECV_INTR: > >> - ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_ID, 0= ); > >> + if ( notif_supported ) > >> + ffa_set_regs_success(regs, GUEST_FFA_SCHEDULE_RECV_INTR_I= D, 0); > >> + else > >> + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > >> break; > >> case FFA_PARTITION_INFO_GET_REGS: > >> if ( ACCESS_ONCE(ctx->guest_vers) >=3D FFA_VERSION_1_2 ) > >> @@ -361,7 +374,10 @@ static void handle_features(struct cpu_user_regs = *regs) > >> case FFA_NOTIFICATION_SET: > >> case FFA_NOTIFICATION_INFO_GET_32: > >> case FFA_NOTIFICATION_INFO_GET_64: > >> - ffa_set_regs_success(regs, 0, 0); > >> + if ( notif_supported ) > >> + ffa_set_regs_success(regs, 0, 0); > >> + else > >> + ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > >> break; > >> default: > >> ffa_set_regs_error(regs, FFA_RET_NOT_SUPPORTED); > >> diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif= .c > >> index a841c8f8d747..b29d948a7110 100644 > >> --- a/xen/arch/arm/tee/ffa_notif.c > >> +++ b/xen/arch/arm/tee/ffa_notif.c > >> @@ -21,6 +21,11 @@ static bool __ro_after_init fw_notif_enabled; > >> static unsigned int __ro_after_init notif_sri_irq; > >> static DEFINE_SPINLOCK(notif_info_lock); > >> > >> +bool ffa_notif_fw_enabled(void) > >> +{ > >> + return fw_notif_enabled; > >> +} > >> + > >> static bool inject_notif_pending(struct domain *d) > >> { > >> struct vcpu *v; > >> @@ -107,6 +112,55 @@ out_unlock: > >> return ret; > >> } > >> > >> +/* > >> + * Deliver a VM-to-VM notification. ctx->notif.notif_lock protects > >> + * vm_bind/vm_pending so callers must not hold it already. > >> + */ > >> +static int32_t notification_set_vm(uint16_t dst_id, uint16_t src_id, > >> + uint32_t flags, uint64_t bitmap) > >> +{ > >> + struct domain *dst_d; > >> + struct ffa_ctx *dst_ctx; > >> + unsigned int id; > >> + int32_t ret; > >> + > >> + if ( flags ) > >> + return FFA_RET_INVALID_PARAMETERS; > >> + > >> + ret =3D ffa_endpoint_domain_lookup(dst_id, &dst_d, &dst_ctx); > >> + if ( ret ) > >> + return ret; > >> + > >> + ret =3D FFA_RET_OK; > >> + > >> + spin_lock(&dst_ctx->notif.notif_lock); > >> + > >> + for ( id =3D 0; id < FFA_NUM_VM_NOTIF; id++ ) > >> + { > >> + if ( !(bitmap & BIT(id, ULL)) ) > >> + continue; > >> + > >> + if ( dst_ctx->notif.vm_bind[id] !=3D src_id ) > >> + { > >> + ret =3D FFA_RET_DENIED; > >> + goto out_unlock; > >> + } > >> + } > >> + > >> + dst_ctx->notif.vm_pending |=3D bitmap; > >> + if ( !dst_ctx->notif.notif_irq_raised && > >> + (dst_ctx->notif.vm_pending || dst_ctx->notif.hyp_pending) && > >> + inject_notif_pending(dst_d) ) > >> + dst_ctx->notif.notif_irq_raised =3D true; > >> + > >> +out_unlock: > >> + spin_unlock(&dst_ctx->notif.notif_lock); > >> + > >> + rcu_unlock_domain(dst_d); > >> + > >> + return ret; > >> +} > >> + > >> int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs) > >> { > >> struct domain *d =3D current->domain; > >> @@ -288,6 +342,8 @@ void ffa_handle_notification_get(struct cpu_user_r= egs *regs) > >> > >> if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > >> { > >> + bool pending; > >> + > >> spin_lock(&ctx->notif.notif_lock); > >> > >> if ( (flags & FFA_NOTIF_FLAG_BITMAP_HYP) && ctx->notif.hyp_pen= ding ) > >> @@ -298,6 +354,18 @@ void ffa_handle_notification_get(struct cpu_user_= regs *regs) > >> ctx->notif.notif_irq_raised =3D false; > >> } > >> > >> + if ( (flags & FFA_NOTIF_FLAG_BITMAP_VM) && ctx->notif.vm_pend= ing ) > >> + { > >> + w4 =3D (uint32_t)(ctx->notif.vm_pending & GENMASK(31, 0))= ; > >> + w5 =3D (uint32_t)((ctx->notif.vm_pending >> 32) & GENMASK= (31, 0)); > >> + ctx->notif.vm_pending =3D 0; > >> + } > >> + > >> + pending =3D (ctx->notif.hyp_pending !=3D 0) || > >> + (ctx->notif.vm_pending !=3D 0); > >> + if ( !pending ) > >> + ctx->notif.notif_irq_raised =3D false; > > > > This seems to take care of clearing notif_irq_raised for all cases. Do > > we still need the one just above this block (copied here): > > if ( !ctx->notif.vm_pending ) > > ctx->notif.notif_irq_raised =3D false; > > ? > > Yes you are right, this is now redundant. > I will drop it in v3. Good, thanks. Cheers, Jens > > Cheers > Bertrand > > > > > Cheers, > > Jens > > > >> + > >> spin_unlock(&ctx->notif.notif_lock); > >> } > >> > >> @@ -323,9 +391,17 @@ int32_t ffa_handle_notification_set(struct cpu_us= er_regs *regs) > >> if ( flags ) > >> return FFA_RET_INVALID_PARAMETERS; > >> > >> - if ( FFA_ID_IS_SECURE(dest_id) && fw_notif_enabled ) > >> - return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, flags, = bitmap_lo, > >> - bitmap_hi); > >> + if ( FFA_ID_IS_SECURE(dest_id) ) > >> + { > >> + if ( fw_notif_enabled ) > >> + return ffa_simple_call(FFA_NOTIFICATION_SET, src_dst, fla= gs, > >> + bitmap_lo, bitmap_hi); > >> + } > >> + else if ( IS_ENABLED(CONFIG_FFA_VM_TO_VM) ) > >> + { > >> + return notification_set_vm(dest_id, caller_id, flags, > >> + ((uint64_t)bitmap_hi << 32) | bitm= ap_lo); > >> + } > >> > >> return FFA_RET_NOT_SUPPORTED; > >> } > >> diff --git a/xen/arch/arm/tee/ffa_private.h b/xen/arch/arm/tee/ffa_pri= vate.h > >> index 78a0a9815d56..923a071a9d7c 100644 > >> --- a/xen/arch/arm/tee/ffa_private.h > >> +++ b/xen/arch/arm/tee/ffa_private.h > >> @@ -340,20 +340,18 @@ struct ffa_ctx_notif { > >> uint64_t vm_pending; > >> > >> /* > >> - * Source endpoint bound to each VM notification ID (0 means unbo= und). > >> + * Tracks whether an NPI has been raised for local pending notifi= cations. > >> + * Protected by notif_lock. > >> */ > >> - uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > >> + bool notif_irq_raised; > >> > >> /* > >> - * Lock protecting the hypervisor-managed notification state. > >> + * Source endpoint bound to each VM notification ID (0 means unbo= und). > >> */ > >> - spinlock_t notif_lock; > >> + uint16_t vm_bind[FFA_NUM_VM_NOTIF]; > >> > >> - /* > >> - * Tracks whether a local notification pending interrupt was rais= ed. > >> - * Protected by notif_lock. > >> - */ > >> - bool notif_irq_raised; > >> + /* Lock protecting local notification state. */ > >> + spinlock_t notif_lock; > >> > >> /* > >> * Bitmap of pending hypervisor notifications (for HYP bitmap quer= ies). > >> @@ -495,6 +493,7 @@ void ffa_notif_init(void); > >> void ffa_notif_init_interrupt(void); > >> int ffa_notif_domain_init(struct domain *d); > >> void ffa_notif_domain_destroy(struct domain *d); > >> +bool ffa_notif_fw_enabled(void); > >> > >> int32_t ffa_handle_notification_bind(struct cpu_user_regs *regs); > >> int32_t ffa_handle_notification_unbind(struct cpu_user_regs *regs); > >> -- > >> 2.53.0 > >> > From xen-devel-bounces@lists.xenproject.org Wed May 13 06:32:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 06:32:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307607.1579205 (Exim 4.92) (envelope-from ) id 1wN38g-0002Zw-8N; Wed, 13 May 2026 06:32:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307607.1579205; Wed, 13 May 2026 06:32:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN38g-0002Zp-5X; Wed, 13 May 2026 06:32:14 +0000 Received: by outflank-mailman (input) for mailman id 1307607; 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pr=C Message-ID: <36527d70-da8c-454d-8de4-54c29c3bd565@amd.com> Date: Wed, 13 May 2026 08:32:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] CI: Add a Debian 13 (Trixie) arm64 container To: Andrew Cooper , Xen-devel CC: Anthony PERARD , Stefano Stabellini , Doug Goldstein References: <20260508212907.1643761-1-andrew.cooper3@citrix.com> <20260508212907.1643761-5-andrew.cooper3@citrix.com> <249ca124-b144-4c50-a0fb-3c0e6db5a1ca@amd.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN1PEPF0000468B:EE_|LV8PR12MB9452:EE_ X-MS-Office365-Filtering-Correlation-Id: cebb09d0-6e21-46e2-f354-08deb0b95ac6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|11063799003|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: sGS48mLdiIbO2GCCBzp/YYm2b+t+g973Mt6TIG+Oz+ur5NqN6ONR56aWVy+p5Zr0qjslEXM37DVkNbLr4uX+AWClZ+jrZ9vKnPN7Qgys/4/YFp/s4tIvxzgwkNtcNdgpQxGkQiiIRWotV7LFkwb0I7Our+YRwIUvEQoSTEzf/RzMs0qEVkd7ubEvQ8kx+RZjFPYdQuqAoYaQmm7rS/2fp8FGgBpKCG3wnCvqXegUFh7jH/8ga7d2+s/htoMCumoqiylKbWVsKvdv1XQ8ONSHM4ASCfVQSdAg+uTfYu5tCbPIsznGQNyN2xJqogoHUxUx6q8AOLwfK/+Ej6oAeZvKs1DWmQQkbBJMf6zcRgj2UfxVypIcU7BIa4IZRVhD4i8Vubum9hVZOkQzpIau8J9XUMTY06eet1jTasqZUAt4E83cta82upBbWIDeL+cHTnrK X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 06:32:07.1222 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cebb09d0-6e21-46e2-f354-08deb0b95ac6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF0000468B.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9452 X-purgate-ID: tlsNG-ef75cf/1778653931-23374C48-5C54813F/10/63158204843 X-purgate-type: spam X-purgate-size: 4599 On 11-May-26 11:21, Andrew Cooper wrote: > On 11/05/2026 7:29 am, Orzel, Michal wrote: >> >> On 08-May-26 23:29, Andrew Cooper wrote: >>> Exactly as per the Bookworm container, but additionally with the ipxe-qemu and >>> qemu-system-aarch64 packages. These will be used to remove the export jobs. >>> >>> Switch qemu-arm{32,64} jobs to use this container. >>> >>> No functional change. >>> >>> Signed-off-by: Andrew Cooper >>> --- >>> CC: Anthony PERARD >>> CC: Stefano Stabellini >>> CC: Michal Orzel >>> CC: Doug Goldstein >>> >>> We should probably wire up some build tests too, but it's too late on a Friday >>> for me to be thinking about that for this posting. >>> --- >>> automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ >>> automation/gitlab-ci/test.yaml | 4 +- >>> automation/scripts/containerize | 1 + >>> 3 files changed, 74 insertions(+), 2 deletions(-) >>> create mode 100644 automation/build/debian/13-arm64v8.dockerfile >>> >>> diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile >>> new file mode 100644 >>> index 000000000000..b9062ee8b443 >>> --- /dev/null >>> +++ b/automation/build/debian/13-arm64v8.dockerfile >>> @@ -0,0 +1,71 @@ >>> +# syntax=docker/dockerfile:1 >>> +FROM --platform=linux/arm64/v8 debian:trixie-slim >>> +LABEL maintainer.name="The Xen Project" >>> +LABEL maintainer.email="xen-devel@lists.xenproject.org" >>> + >>> +ENV DEBIAN_FRONTEND=noninteractive >>> + >>> +RUN <>> +#!/bin/bash >>> + set -eu >>> + >>> + useradd --create-home user >>> + >>> + apt-get update >>> + >>> + DEPS=( >>> + # Xen >>> + bison >>> + build-essential >>> + checkpolicy >>> + flex >>> + >>> + # Tools (general) >>> + ca-certificates >>> + cpio >>> + git-core >>> + pkg-config >>> + wget >>> + # libxenguest dombuilder >>> + libbz2-dev >>> + liblzma-dev >>> + liblzo2-dev >>> + libzstd-dev >>> + zlib1g-dev >>> + # libacpi >>> + acpica-tools >>> + # libxl >>> + libfdt-dev >>> + libjson-c-dev >>> + uuid-dev >>> + # xentop >>> + libncurses5-dev >>> + # Python bindings >>> + python3-dev >>> + python3-setuptools >>> + # Golang bindings >>> + golang-go >>> + # Ocaml bindings/oxenstored >>> + ocaml-nox >>> + ocaml-findlib >> Since this is a container used only for tests, why listing packages required for >> Xen and tools build? > > I did leave a note about that. > >> >>> + >>> + # for test phase, qemu-* jobs >>> + busybox-static >>> + curl >>> + device-tree-compiler >>> + expect >>> + file >>> + ipxe-qemu >>> + ovmf >>> + qemu-system-aarch64 >>> + u-boot-qemu >>> + u-boot-tools >> So after this change, even though you replace debian-12 with debian-13 for all >> the tests, the debian-12 still contains the unneeded packages (i.e. for a test >> phase that it no longer runs). > > Yes.  I can't do this series bisectably without it.  Also, in the past Ok, I understand the bisectibility problem. > people have explicitly requested to be able to run the qemu smoke > testing from the build container, which is why it's like this and not split. Unless it's a rule that every container follows and is documented somewhere I don't like this argument. My plan then is to do the clean up of Arm containers in the future to remove packages not used. It creates more confusion for people willing to create their own dockerfiles for testing (or just to see what it takes to build e.g. Xen on Arm) than it gives benefits. > > Honestly, I was hoping to leave the Trixie update to the ARM > maintainers, but despite the Bookworm QEMU (7.2) being newer than the > 6.0 in the export jobs, it contains the SYSREG interception bugs which > prevents hiding ThumbEE from guests, and breaks all the arm32 testing > with a Linux dom0. Does it make sense to have both Debian 12 and Debian 13 build/test? Can't we have just the latest one? All of the remarks above are not something that should prevent this patch from going in, so: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 06:44:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 06:44:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307616.1579214 (Exim 4.92) (envelope-from ) id 1wN3Ks-0004ha-9o; Wed, 13 May 2026 06:44:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307616.1579214; Wed, 13 May 2026 06:44:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN3Ks-0004hT-6z; Wed, 13 May 2026 06:44:50 +0000 Received: by outflank-mailman (input) for mailman id 1307616; Wed, 13 May 2026 06:44:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN3Kr-0004hL-Dx for xen-devel@lists.xenproject.org; Wed, 13 May 2026 06:44:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN3Kq-001RW2-CS for xen-devel@lists.xenproject.org; Wed, 13 May 2026 08:44:48 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a041dd4-2eae-0a2a0a5409dd-0a2a450c9570-48 for ; Wed, 13 May 2026 08:44:48 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a041de0-62f1-0a2a450c0019-d1558034e181-3 for ; Wed, 13 May 2026 08:44:48 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso57796565e9.3 for ; Tue, 12 May 2026 23:44:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 12 May 2026 23:44:47 -0700 (PDT) Message-ID: <68b1607a-f2a1-4f53-84c5-43c61eeb1869@suse.com> Date: Wed, 13 May 2026 08:44:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH v2 RFC] x86/time: avoid early uses of NOW() to return zero To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1778654688-DA368CF5-9A085F9D/0/0 X-purgate-type: clean X-purgate-size: 5826 Waiting loops like the one in flush_command_buffer() will degenerate to infinite ones when used early enough for NOW() to still return constant zero. Make sure the returned value at least monotonically increases. When available, use nominal frequency values as initial approximation. Do this only in get_s_time(), as producing a sane value in get_s_time_fixed() for non-zero inputs won't be reasonably possible. Put an assertion there. Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which checks for NOW() returning 0 (falling back to TSM_RAW in this case). For now I have no idea how to avoid this; perhaps that's tolerable at least in the case where we put in place an early estimate? Should we maybe weaken the fallback condition to take effect for any value below 1μs? RFC: While generally the mentioned waiting loops will take longer to time out, on a very fast CPU tight loops may time out too early. RFC: For the AMD/Hygon case, if the "nominal" value isn't available, we could use the "high" one. That would cause NOW() to run too slowly (until the scale is properly set), but maybe that's still better than it returning 0? (As it stands, I can't really test the new code there, as my Rome system only supplies the lo/hi pair of values.) RFC: On the 2nd pass through early_cpu_init() it may be okay to skip the new additions. With "x86/time: set AP's TSC scale estimate earlier" the counter update may not need to be atomic anymore, as then only the BSP can reasonably hit that path. I don't think Fixes: tags should be put here. If we did, we'd have to enumerate all introductions of early uses of NOW() (or get_s_time()), with the exception of those dealing with getting back 0 (which I expect is only printk_start_of_line()). Will want backporting nevertheless (unless deemed too risky). --- v2: Add assertion to get_s_time_fixed(). Use nominal frequencies for very early setting, if available. --- unstable.orig/xen/arch/x86/cpu/common.c 2026-05-13 08:35:28.640503356 +0200 +++ unstable/xen/arch/x86/cpu/common.c 2026-05-12 12:30:35.475284195 +0200 @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -403,6 +404,25 @@ void __init early_cpu_init(bool verbose) &c->x86_capability[FEATURESET_7d1]); } + if (c->cpuid_level >= 0x15) { + cpuid(0x15, &eax, &ebx, &ecx, &edx); + + if (ecx && ebx && eax) + preset_tsc_scale(DIV_ROUND_UP(ecx * 1UL * ebx, eax)); + else if (c->cpuid_level >= 0x16) { + /* Assume CPU base freq ≈ TSC freq. */ + cpuid(0x16, &eax, &ebx, &ecx, &edx); + if (eax) + preset_tsc_scale(eax * 1000000UL); + } + } else if (c->vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) { + unsigned int nom_mhz = 0; + + amd_process_freq(c, NULL, &nom_mhz, NULL); + if (nom_mhz) + preset_tsc_scale(nom_mhz * 1000000UL); + } + eax = cpuid_eax(0x80000000); if ((eax >> 16) == 0x8000 && eax >= 0x80000008) { ebx = eax >= 0x8000001f ? cpuid_ebx(0x8000001f) : 0; --- unstable.orig/xen/arch/x86/include/asm/time.h 2026-05-13 08:35:28.640503356 +0200 +++ unstable/xen/arch/x86/include/asm/time.h 2026-05-12 12:25:14.435489339 +0200 @@ -23,6 +23,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preset_tsc_scale(unsigned long freq); void init_percpu_time(void); void time_latch_stamps(void); --- unstable.orig/xen/arch/x86/time.c 2026-05-13 08:35:28.640503356 +0200 +++ unstable/xen/arch/x86/time.c 2026-05-13 08:33:54.000000000 +0200 @@ -1655,6 +1655,9 @@ s_time_t get_s_time_fixed(u64 at_tsc) const struct cpu_time *t = &this_cpu(cpu_time); u64 tsc, delta; + /* scale_delta() degenerates when the scale wasn't set yet. */ + ASSERT(t->tsc_scale.mul_frac); + if ( at_tsc ) tsc = at_tsc; else @@ -1670,6 +1673,20 @@ s_time_t get_s_time_fixed(u64 at_tsc) s_time_t get_s_time(void) { + /* + * Before the TSC scale is set, avoid returning constant 0 (or whatever + * this_cpu(cpu_time).stamp.local_stime is set to). While the returned + * value is in no way representing time, it at least increases + * monotonically, thus avoiding e.g. waiting loops to degenerate to + * entirely infinite ones. + */ + if ( unlikely(!this_cpu(cpu_time).tsc_scale.mul_frac) ) + { + static s_time_t counter; + + return arch_fetch_and_add(&counter, 1); + } + return get_s_time_fixed(0); } @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) return 0; } +/* BSP-only function to pre-set an approximate TSC scale. */ +void __init preset_tsc_scale(unsigned long freq) +{ + struct cpu_time *t = &this_cpu(cpu_time); + + /* + * The incoming frequency is only approximate (nominal). Increase it by + * 1% to make NOW() output rather a little too slow than too fast, thus + * avoiding a possible backwards jump once the final scale is set. + */ + freq += DIV_ROUND_UP(freq, 100); + + set_time_scale(&t->tsc_scale, freq); + t->stamp.local_tsc = boot_tsc_stamp; +} /* Early init function. */ void __init early_time_init(void) @@ -2640,6 +2672,9 @@ void __init early_time_init(void) "TSC ADJUST set to %lx on boot CPU - clearing\n", tmp); wrmsrl(MSR_IA32_TSC_ADJUST, 0); boot_tsc_stamp -= tmp; + + if ( t->stamp.local_tsc ) + t->stamp.local_tsc -= tmp; } } From xen-devel-bounces@lists.xenproject.org Wed May 13 06:54:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 06:54:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307624.1579225 (Exim 4.92) (envelope-from ) id 1wN3To-0006Xa-6V; Wed, 13 May 2026 06:54:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307624.1579225; Wed, 13 May 2026 06:54:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN3To-0006XT-2R; Wed, 13 May 2026 06:54:04 +0000 Received: by outflank-mailman (input) for mailman id 1307624; Wed, 13 May 2026 06:54:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN3Tm-0006XN-Hz for xen-devel@lists.xenproject.org; Wed, 13 May 2026 06:54:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN3Tl-001TRv-Ra for xen-devel@lists.xenproject.org; Wed, 13 May 2026 08:54:01 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a042000-e002-0a2a0a5209dd-0a2a4506b008-36 for ; Wed, 13 May 2026 08:54:01 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a042009-7371-0a2a45060019-d1558033e0e7-3 for ; Wed, 13 May 2026 08:54:01 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so107085685e9.2 for ; Tue, 12 May 2026 23:54:01 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <06448a30ef6694a55ac85d4c8c78ca2d71342430.1778605274.git.mykola_kvach@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778655241-8EB8BD75-C0D0E279/0/0 X-purgate-type: clean X-purgate-size: 6329 On 12.05.2026 19:07, Mykola Kvach wrote: > From: Mykola Kvach > > Introduce CONFIG_HAS_HWDOM_SYSTEM_SUSPEND as an architecture-selected > capability for platforms where the hardware domain can be parked with > SHUTDOWN_suspend without calling hwdom_shutdown(). > > Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For > non-control domains, including the hardware domain when it is not acting as a > control domain, the call is handled as a guest/domain suspend request and > parks the domain in SHUTDOWN_suspend. > > Control domains need additional sequencing because their SYSTEM_SUSPEND > request is used to coordinate host-wide suspend. A non-last awake control > domain may be parked in SHUTDOWN_suspend without requiring the host suspend > path to be available. The last awake control domain is treated as the point > where the request becomes a host-suspend request, and it may only proceed > when all non-control domains are already in SHUTDOWN_suspend and the host > suspend path is available. > > Keep the control-domain sequencing and domain-readiness checks out of > PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI > function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and > enforce the sequencing policy in the call handler. > > Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so > that SHUTDOWN_suspend from the hardware domain can be treated as a domain > suspend state rather than as a hardware-domain initiated host shutdown. This > does not by itself imply that host-wide suspend is available. > > Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND > capability with runtime blockers reported by Xen-owned subsystems. Add > runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths > lacking suspend/resume support. These blockers are runtime based, so they > only apply to drivers or paths that Xen actually uses on the platform. For > SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, > since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. > > Signed-off-by: Mykola Kvach > --- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/gic.c | 6 ++ > xen/arch/arm/include/asm/psci.h | 3 + > xen/arch/arm/include/asm/suspend.h | 10 ++- > xen/arch/arm/psci.c | 7 ++ > xen/arch/arm/suspend.c | 40 +++++++++ > xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- > xen/common/Kconfig | 3 + > xen/common/domain.c | 7 +- > xen/drivers/char/serial.c | 12 +++ > xen/drivers/passthrough/arm/iommu.c | 4 + > xen/drivers/passthrough/arm/smmu-v3.c | 4 + > xen/include/xen/serial.h | 1 + > xen/include/xen/suspend.h | 2 + > 14 files changed, 201 insertions(+), 13 deletions(-) > Contrary to what the cover letter says, there's no revlog here. > --- a/xen/arch/arm/suspend.c > +++ b/xen/arch/arm/suspend.c > @@ -1,9 +1,49 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > #include > > +#include > +#include > + > struct resume_cpu_context resume_cpu_context; > > +/* > + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI > + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid > + * suspend/resume path. > + * > + * This gate is checked only when the last awake control domain attempts to > + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. > + */ > +static bool host_system_suspend_runtime_allowed = true; > + > +static bool host_serial_suspend_allowed(void) > +{ > + if ( serial_suspend_supported() ) > + return true; > + > + printk_once(XENLOG_INFO > + "Host SYSTEM_SUSPEND blocked: serial driver lacks suspend/resume support\n"); Please try to keep log messages down to a reasonable size. In the case here, what value does "suspend/resume" add? > +static int32_t domain_psci_system_suspend_policy(struct domain *d) > +{ > + struct domain *other; > + bool last_awake_control_domain = true; > + bool awake_non_control_domain = false; > + > + /* Only control domains participate in sequencing policy. */ > + if ( !is_control_domain(d) ) > + return 0; > + > + rcu_read_lock(&domlist_read_lock); > + > + for_each_domain ( other ) > + { > + bool suspended; > + > + if ( other == d ) > + continue; > + > + suspended = domain_in_suspend_state(other); > + if ( suspended ) > + continue; > + > + if ( is_control_domain(other) ) > + { > + last_awake_control_domain = false; > + break; > + } > + > + awake_non_control_domain = true; > + } > + > + rcu_read_unlock(&domlist_read_lock); > + > + /* > + * Another control domain is still awake. This request is only the first > + * phase of the sequencing: park this control domain and leave the host > + * running. Host-wide suspend gates must not block this intermediate state. > + */ > + if ( !last_awake_control_domain ) > + return 0; > + > + /* > + * This is the last awake control domain. It must not be parked unless the > + * request can proceed as a host-suspend request; otherwise Xen would lose > + * the last domain that can coordinate the system suspend. > + */ > + if ( awake_non_control_domain ) > + { > + printk(XENLOG_DEBUG > + "SYSTEM_SUSPEND denied: last awake control domain dom%u requested host suspend while non-control domains are still awake\n", > + d->domain_id); Same here, plus please use %pd. > --- a/xen/drivers/char/serial.c > +++ b/xen/drivers/char/serial.c > @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) > > #ifdef CONFIG_SYSTEM_SUSPEND > > +static bool __read_mostly serial_suspend_available = true; __ro_after_init? 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pr=C Message-ID: <12115791-513e-4d1b-956c-6b0c00bebe3b@amd.com> Date: Wed, 13 May 2026 09:34:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260512175729.1915120-1-luca.fancellu@arm.com> <20260512175729.1915120-3-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260512175729.1915120-3-luca.fancellu@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000010:EE_|SA1PR12MB999107:EE_ X-MS-Office365-Filtering-Correlation-Id: 79b4ad87-142f-44fd-e4a4-08deb0c2179f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|1800799024|82310400026|11063799003|22082099003|18002099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: nmNLfDK6cLJIR+AncfkfsfIMUY26lKA57PdTC2s0vTqWNe4wwoFjlpTSvVxIqVAn1foUSS8Sv2NCKdobOP1mKBCXal19JQIzPLZ8xT8UW7+4eFNpGmmtx2J8j/TDtdr2AOzPC17iuIRqqyPFSHpkWRbMSBkyi3j6kr7YTAlWvBfoiDKRlUGucd9dLofP0oS5MasK6iMJhtcKcE0s3oaXdDNDZswS/lQK1WNy1zTxdnxN7ZXnjbeTkoEvUtyxYnLvs2WPqwsurChiFC3Epgo2sF33ZF2uM5QqhmElw0iwCbAyS76Kqj1d3iNv6GbFop0nylfc5s+mtM0TWJDiwTtYjD5XqEyp0tLyYejSewcNV6ptvnExdPN8Vprr/h80gAWqk3nIP6fjZKHFU9xP5anXVqQD2MIfo7MKccZdsoeti6l3aAjsChAanjwfpDM5C6F6 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 07:34:39.9353 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 79b4ad87-142f-44fd-e4a4-08deb0c2179f X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000010.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB999107 X-purgate-ID: tlsNG-720697/1778657689-A9B70161-1E4B1D7A/0/0 X-purgate-type: clean X-purgate-size: 14499 On 12-May-26 19:57, Luca Fancellu wrote: > From: Harry Ramsey > > Add a new device tree property `v8r_el1_msa` to select the MSA (memory > system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the > former is the default if the property is not passed. > > Implement the dom0less path to parse the new device tree property, add > a new domctl hypercall input parameter `v8r_el1_msa` for arm and > add the sanitisation in arch_sanitise_domain_config(), the parameter > is intended to be used on CONFIG_MPU systems and returns an error if > selected for MMU. > > While there, add explicit padding and check that it's zero during > arch domain config sanitisation, given the breaking change, bump the > XEN_DOMCTL_INTERFACE_VERSION. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu > --- > v6: > - Add explicit padding to `struct xen_arch_domainconfig` and check it > - Provide common v8r_el1_msa_domain_sanitise_config() for MMU/MPU > - During domu_dt_v8r_el1_msa_parse() set PMSA when property not present > - constify *node in domu_dt_v8r_el1_msa_parse() > - Print full path of the node in domu_dt_v8r_el1_msa_parse() error msgs > - typo fixing > v5: > - follow the way domu_dt_sci_parse and ARM_SCI is doing, but > return error if property is present in MMU systems. > - Align the commit message on the new changes > - fix documentation > - fix multiline comment > - drop the explicit padding from struct xen_arch_domainconfig > v4: > - Rework the patch to have the v8r_el1_msa input parameter more > enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. > v3: > - Improve commit message and device tree property description > - Remove macro protection > - Remove unused function is_mpu_domain > - Code formatting > --- > docs/misc/arm/device-tree/booting.txt | 14 +++++ > xen/arch/arm/dom0less-build.c | 74 +++++++++++++++++++++++++ > xen/arch/arm/domain.c | 37 +++++++++++++ > xen/arch/arm/include/asm/domain.h | 4 ++ > xen/arch/arm/include/asm/domain_build.h | 10 ++++ > xen/arch/arm/mpu/arm32/mm.c | 7 +++ > xen/arch/arm/mpu/arm64/mm.c | 7 +++ > xen/include/public/arch-arm.h | 7 +++ > xen/include/public/domctl.h | 4 +- > 9 files changed, 162 insertions(+), 2 deletions(-) > > diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt > index 977b4286082f..f73839df090b 100644 > --- a/docs/misc/arm/device-tree/booting.txt > +++ b/docs/misc/arm/device-tree/booting.txt > @@ -322,6 +322,20 @@ with the following properties: > Should be used together with scmi-smc-passthrough Xen command line > option. > > +- v8r_el1_msa > + > + A string property specifying whether, on Armv8-R systems at EL1, a domain > + should use PMSAv8 (MPU) or VMSAv8 (MMU). > + > + - "mmu" > + Enables VMSAv8 at EL1. This requires hardware support and is only > + optionally available on AArch64. Not supported on AArch32. > + > + - "mpu" > + Enables PMSAv8 at EL1. This is the default behavior when the property is > + not passed. This configuration requires static allocation (xen,static-mem) > + and direct mapping (direct-map). > + > Under the "xen,domain" compatible node, one or more sub-nodes are present > for the DomU kernel and ramdisk. > > diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c > index 52cf788a45ea..fecdb33d3e3a 100644 > --- a/xen/arch/arm/dom0less-build.c > +++ b/xen/arch/arm/dom0less-build.c > @@ -302,6 +302,77 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, > return 0; > } > > +static int __init > +domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, > + struct xen_domctl_createdomain *d_cfg, > + unsigned int flags) > +{ > + bool property_present = dt_property_read_bool(node, "v8r_el1_msa"); I know it's present in the code for SCI, but it's not really necessary to do the DT parsing twice (once for boot, second for string given that dt_property_read_string returns -EINVAL if no property found). You could move this bool check ... > + > + if ( !IS_ENABLED(CONFIG_MPU) ) > + { > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; > + > + if ( !property_present ) ... here. > + return 0; > + > + printk(XENLOG_ERR > + "Not supported 'v8r_el1_msa' DT property found for domain %s\n", > + dt_node_full_name(node)); > + return -EINVAL; > + } > + > + if ( !property_present ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; > + else > + { > + const char *v8r_el1_msa; > + int ret = dt_property_read_string(node, "v8r_el1_msa", &v8r_el1_msa); > + > + if ( ret ) > + return ret; > + > + if ( !strcmp(v8r_el1_msa, "mpu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; > + else if ( !strcmp(v8r_el1_msa, "mmu") ) > + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; > + else > + { > + printk(XENLOG_ERR > + "v8r_el1_msa value (%s) not valid for domain %s\n", > + v8r_el1_msa, dt_node_full_name(node)); > + return -EINVAL; > + } > + } > + > + switch ( d_cfg->arch.v8r_el1_msa ) > + { > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: > + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > + { > + printk(XENLOG_ERR > + "PMSA is not valid for domain (%s) without static allocation and direct map (v8r_el1_msa)\n", > + dt_node_full_name(node)); > + return -EINVAL; > + } > + break; > + > + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: > + if ( !has_v8r_vmsa_support() ) > + { > + printk(XENLOG_ERR > + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\n"); > + return -EINVAL; > + } > + break; > + > + default: > + return -EINVAL; > + } > + > + return 0; This does not look very clean. How about: static int __init domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, struct xen_domctl_createdomain *d_cfg, unsigned int flags) { const char *value; int ret; if ( !IS_ENABLED(CONFIG_MPU) ) { d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; if ( !dt_property_read_bool(node, "v8r_el1_msa") ) return 0; printk(XENLOG_ERR "v8r_el1_msa not supported on this build for domain %s\n", dt_node_full_name(node)); return -EINVAL; } ret = dt_property_read_string(node, "v8r_el1_msa", &value); /* property absent: PMSA is the default */ if ( ret == -EINVAL ) value = "mpu"; else if ( ret ) return ret; if ( !strcmp(value, "mpu") ) { if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) { printk(XENLOG_ERR "v8r_el1_msa=mpu requires static-mem and direct-map for domain %s\n", dt_node_full_name(node)); return -EINVAL; } d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; return 0; } if ( !strcmp(value, "mmu") ) { if ( !has_v8r_vmsa_support() ) { printk(XENLOG_ERR "v8r_el1_msa=mmu unsupported by platform for domain %s\n", dt_node_full_name(node)); return -EINVAL; } d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; return 0; } printk(XENLOG_ERR "v8r_el1_msa value '%s' not valid for domain %s\n", value, dt_node_full_name(node)); return -EINVAL; } > +} > + > int __init arch_parse_dom0less_node(struct dt_device_node *node, > struct boot_domain *bd) > { > @@ -315,6 +386,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, > if ( domu_dt_sci_parse(node, d_cfg) ) > panic("Error getting SCI configuration\n"); > > + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) > + panic("Error getting v8r_el1_msa configuration\n"); > + > if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) > { > int vpl011_virq = GUEST_VPL011_SPI; > diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c > index 26380a807cad..e579c3b1bb3c 100644 > --- a/xen/arch/arm/domain.c > +++ b/xen/arch/arm/domain.c > @@ -18,6 +18,7 @@ > #include > #include > #include > +#include You don't seem to use anything from this header. > #include > #include > #include > @@ -538,6 +539,24 @@ void vcpu_switch_to_aarch64_mode(struct vcpu *v) > v->arch.hcr_el2 |= HCR_RW; > } > > +static bool v8r_el1_msa_domain_sanitise_config( > + const struct xen_domctl_createdomain *config) > +{ > + uint8_t v8r_el1_msa = config->arch.v8r_el1_msa; That is not a useful assignment. > + > + if ( !IS_ENABLED(CONFIG_MPU) ) > + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; > + > + if ( IS_ENABLED(CONFIG_ARM_32) ) > + return v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; > + > + if ( IS_ENABLED(CONFIG_ARM_64) ) > + return (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA) || > + (v8r_el1_msa == XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA); > + > + return false; Arm32 and Arm64 are mutually exclusive, so this line is unreachable. How about: static bool v8r_el1_msa_domain_sanitise_config( const struct xen_domctl_createdomain *config) { switch ( config->arch.v8r_el1_msa ) { case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: return !IS_ENABLED(CONFIG_MPU); case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: return IS_ENABLED(CONFIG_MPU); case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: return IS_ENABLED(CONFIG_MPU) && IS_ENABLED(CONFIG_ARM_64); default: return false; } } > +} > + > int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > { > unsigned int max_vcpus; > @@ -554,6 +573,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > return -EINVAL; > } > > + /* Check config structure padding */ > + if ( config->arch.pad ) > + { > + dprintk(XENLOG_INFO, > + "Invalid domain configuration during domain creation\n"); > + return -EINVAL; > + } > + > /* Check feature flags */ > if ( sve_vl_bits > 0 ) > { > @@ -630,6 +657,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > return -EINVAL; > } > > + if ( !v8r_el1_msa_domain_sanitise_config(config) ) > + { > + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); > + return -EINVAL; > + } > + > return sci_domain_sanitise_config(config); > } > > @@ -722,6 +755,10 @@ int arch_domain_create(struct domain *d, > d->arch.sve_vl = config->arch.sve_vl; > #endif > > +#ifdef CONFIG_MPU > + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; > +#endif > + > if ( (rc = sci_domain_init(d, config)) != 0 ) > goto fail; > > diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h > index b24f02d269be..ac7300e41fcd 100644 > --- a/xen/arch/arm/include/asm/domain.h > +++ b/xen/arch/arm/include/asm/domain.h > @@ -112,6 +112,10 @@ struct arch_domain > #endif > > struct resume_info resume_ctx; > + > +#ifdef CONFIG_MPU > + uint8_t v8r_el1_msa; > +#endif > } __cacheline_aligned; > > struct arch_vcpu > diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h > index 6674dac5e2f8..13e88fc0891b 100644 > --- a/xen/arch/arm/include/asm/domain_build.h > +++ b/xen/arch/arm/include/asm/domain_build.h > @@ -19,6 +19,16 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); > > int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); > > +#ifdef CONFIG_MPU You could do: && CONFIG_ARM64 and then ... > +/* Utility function to determine if an Armv8-R processor supports VMSA. */ > +bool has_v8r_vmsa_support(void); > +#else > +static inline bool has_v8r_vmsa_support(void) > +{ > + return false; > +} > +#endif /* CONFIG_MPU */ > + > #endif > > /* > diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c > index a4673c351141..702bea804acd 100644 > --- a/xen/arch/arm/mpu/arm32/mm.c > +++ b/xen/arch/arm/mpu/arm32/mm.c > @@ -5,6 +5,8 @@ > #include > #include > #include > +#include > +#include You don't seem to add anything from these headers. > > #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ > case num: \ > @@ -38,6 +40,11 @@ > break; \ > } > > +bool has_v8r_vmsa_support(void) > +{ > + return false; > +} ... and then you could get rid of this stub > + > /* > * Armv8-R supports direct access and indirect access to the MPU regions through > * registers: > diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c > index ed643cad4073..b8abcc6f7bc6 100644 > --- a/xen/arch/arm/mpu/arm64/mm.c > +++ b/xen/arch/arm/mpu/arm64/mm.c > @@ -5,6 +5,8 @@ > #include > #include > #include > +#include > +#include You don't seem to add anything from these headers. ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 07:37:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 07:37:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307644.1579242 (Exim 4.92) (envelope-from ) id 1wN49R-0004Q4-CU; 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Wed, 13 May 2026 00:37:03 -0700 (PDT) Message-ID: <8d758429-8c2b-4578-a2fc-9ac7dac0a62f@suse.com> Date: Wed, 13 May 2026 09:37:02 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Anthony PERARD From: Jan Beulich Subject: [PATCH] xl/parse: mark as GNU source Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778657823-28678C48-587E8332/0/0 X-purgate-type: clean X-purgate-size: 608 Very old glibc (2.4 in the observed case) declares strndup() only when _GNU_SOURCE is defined. Fixes: ad860c6454ba ("tools/xl: add xl commands for xenstore quota operations") Signed-off-by: Jan Beulich --- This follows what xl_info.c and xl_utils.c already do. Question is whether instead the Makefile would want to uniformly define _GNU_SOURCE. --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -12,6 +12,8 @@ * GNU Lesser General Public License for more details. */ +#define _GNU_SOURCE + #include #include #include From xen-devel-bounces@lists.xenproject.org Wed May 13 08:07:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 08:07:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307668.1579251 (Exim 4.92) (envelope-from ) id 1wN4cL-0000vm-2f; Wed, 13 May 2026 08:06:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307668.1579251; Wed, 13 May 2026 08:06:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN4cL-0000vf-00; Wed, 13 May 2026 08:06:57 +0000 Received: by outflank-mailman (input) for mailman id 1307668; Wed, 13 May 2026 08:06:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN4cJ-0000vZ-E9 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 08:06:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN4cI-003ilc-Cs for xen-devel@lists.xenproject.org; Wed, 13 May 2026 10:06:54 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a043114-e002-0a2a0a5209dd-0a2a45068cb0-32 for ; Wed, 13 May 2026 10:06:54 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04311d-7371-0a2a45060019-d155802bd06a-3 for ; Wed, 13 May 2026 10:06:54 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488e1a8ac40so62230765e9.2 for ; Wed, 13 May 2026 01:06:54 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778659614-7FB7DD75-A9CB6B13/0/0 X-purgate-type: clean X-purgate-size: 566 On 12.05.2026 17:55, Andrew Cooper wrote: > Andrew Cooper (2): > tests/paging-mempool: Misc cleanup > tests/paging-mempool: Extend to test P2M relocation > > tools/tests/paging-mempool/Makefile | 4 + > .../paging-mempool/test-paging-mempool.c | 222 +++++++++++++++++- > xen/common/memory.c | 2 +- > 3 files changed, 223 insertions(+), 5 deletions(-) Acked-by: Jan Beulich ideally with line length of 80 chars not exceeded, as looks to be the case in both of the patches. Jan From xen-devel-bounces@lists.xenproject.org Wed May 13 08:33:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 08:33:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307680.1579260 (Exim 4.92) (envelope-from ) id 1wN521-0005B2-2H; Wed, 13 May 2026 08:33:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307680.1579260; Wed, 13 May 2026 08:33:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN520-0005Av-Vm; Wed, 13 May 2026 08:33:28 +0000 Received: by outflank-mailman (input) for mailman id 1307680; Wed, 13 May 2026 08:33:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN51y-0005Ap-Sq for xen-devel@lists.xenproject.org; Wed, 13 May 2026 08:33:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN51y-003qST-4A for xen-devel@lists.xenproject.org; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=BLxOg0+mLn9yXHhy3MEH1LEgqG3zIrha9S3RgANZTNQ=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=JMZuLxcFC+hrJ3fLrIi7vtRwhwf2yH+FuanFvWyzDCLAHth8oPYaUZWbInITpMEouy7ckU7+9 dod4+Y72/epdPSa707lqktmaiyXCJk++GrRU5b/97wyLVAU+Ye+D+1oLQpVXeG1jbzTvZQALWtn qB0vSbtAcRb8XYyB/GPpWjRnie03rhkWXb+3yCOcQXjqPh1JRyRhWYXjJou1Kvu06w0Uydaa7oJ xO3zvU9bP2SJU7wDeihBWMep+rqvRHoQ6zwS1X/VprIKRakEQtiJm0TAk5MS9r4B++rZC613AIp xtziG8lFD/W7GyqGxHlXvQugF96hLHfW5ebntIY+OiUw== X-Zone-Loop: 14610ecd834d6021d94370fe1ca0bdc6c2e4b727ad3b x-campaign-type: default x-transaction-id: 95a45314-1519-47a4-9f5f-47747ee4a867 x-swg-uid: 01-466186c3-7371-4b44-9ac4-6e7b00dce5cd X-Mailer: Sweego Message-ID: <1778661201.8631fc262581453bbf619ec5b2062170.19e2078180c000f373@vates.tech> x-swg-bid: 1778661201.8631fc262581453bbf619ec5b2062170.19e2078180c000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Wed, 13 May 2026 10:33:20 +0200 From: Anthony PERARD To: Andrew Cooper Cc: Xen-devel , Juergen Gross , Michael Young , Stefano Stabellini Subject: Re: [PATCH] tools/libxl: Fix libxl_nocpuid.c build with json-c References: <20260508162815.1617203-1-andrew.cooper3@citrix.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260508162815.1617203-1-andrew.cooper3@citrix.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.aff.f9d4c5bc86c0d911.19e207815ec.18ede270610a7821=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778661201388 X-purgate-ID: tlsNG-720697/1778661205-83961161-BF4918F7/0/0 X-purgate-type: clean X-purgate-size: 1157 ---=Part.aff.f9d4c5bc86c0d911.19e207815ec.18ede270610a7821=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Fri, May 08, 2026 at 05:28:15PM +0100, Andrew Cooper wrote: > libxl_nocpuid=2Ec needs the same treatment as libxl_cpuid=2Ec >=20 > Fixes: f6c6f2679d49 ("libxl: Convert libxl__object_to_json() to json-c") > Signed-off-by: Andrew Cooper > --- >=20 > Discovered while trying to complete the ARM CI cleanup=2E >=20 > This supercedes > https://lore=2Ekernel=2Eorg/xen-devel/94ffdeb1-6826-4c3a-a9c1-3ccc8b129a= 61@durham=2Eac=2Euk/T/#u > using Anthony's suggested approach=2E >=20 > Failed run: > https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/jobs/142822797= 51 >=20 > Succeeding run (same container): > https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/jobs/142827145= 27 Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.aff.f9d4c5bc86c0d911.19e207815ec.18ede270610a7821=--- From xen-devel-bounces@lists.xenproject.org Wed May 13 08:49:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 08:49:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307689.1579269 (Exim 4.92) (envelope-from ) id 1wN5HL-00078G-Bx; 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> + unsigned int century = 0; > unsigned long flags; > > spin_lock_irqsave(&rtc_lock, flags); > @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t > rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); > rtc->mon = CMOS_READ(RTC_MONTH); > rtc->year = CMOS_READ(RTC_YEAR); > + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) > + century = CMOS_READ(acpi_gbl_FADT.century); > > if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) > { > @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t > > spin_unlock_irqrestore(&rtc_lock, flags); > > - if ( (rtc->year += 1900) < 1970 ) > + if ( century ) > + { > + BCD_TO_BIN(century); Don't you need to move the BCD_TO_BIN() translation with the rest, so it's not done unconditionally? Thanks, Roger. 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=CnX5O2p0QQt5FLQjcwiWGsVpu665UGO3dj9rFSugdp0=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=LWkcILAftIv27KTNFL47Ipr6M7dOwFWkBMbhjAzcuadX9oNCDQ/T6ySYSUV/M5YNigUxFOm1d kCLzTfIocW3CdKpFc1kX9QUsEB+E4bT1SoCeQj2wGI6B9GD92BKU/08faEKoZyfXwhxK0NaXwzf liJ+GbJevitfm9MvU6mXQA0dFLSsX7meQWVXBaXtgHUA7Cx8KSODFD7dmS1uimMkBSDcLHIu6Lw TTBpv7LaBRN7u9TPdQv0T5RLbqofN/ig+BKfo8vnlgghj+SIzgGKL7dRD3c3oEX17YK2n2HnraC b5+8PpScMyYLLJ8YyYOtHUMZWsY5qzQ10RvB22Yxbwig== X-Zone-Loop: 0d44efe66d2677e8fdc59c183b4a15c138599af1783b x-campaign-type: default x-transaction-id: 1bd0ce06-9756-48cc-9595-2b1214142419 x-swg-uid: 01-5aff09eb-c63c-4706-8dde-af8328650e2b X-Mailer: Sweego Message-ID: <1778662455.8631fc262581453bbf619ec5b2062170.19e208b39e3000f373@vates.tech> x-swg-bid: 1778662455.8631fc262581453bbf619ec5b2062170.19e208b39e3000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Wed, 13 May 2026 10:54:14 +0200 From: Anthony PERARD To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" Subject: Re: [PATCH] xl/parse: mark as GNU source References: <8d758429-8c2b-4578-a2fc-9ac7dac0a62f@suse.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <8d758429-8c2b-4578-a2fc-9ac7dac0a62f@suse.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.b15.30d14826cf67bb18.19e208b37be.fde1075920b6cad1=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778662455230 X-purgate-ID: tlsNG-4011c0/1778662457-7DB818B7-A7E1A28C/0/0 X-purgate-type: clean X-purgate-size: 927 ---=Part.b15.30d14826cf67bb18.19e208b37be.fde1075920b6cad1=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, May 13, 2026 at 09:37:02AM +0200, Jan Beulich wrote: > Very old glibc (2=2E4 in the observed case) declares strndup() only when > _GNU_SOURCE is defined=2E >=20 > Fixes: ad860c6454ba ("tools/xl: add xl commands for xenstore quota opera= tions") > Signed-off-by: Jan Beulich Acked-by: Anthony PERARD > --- > This follows what xl_info=2Ec and xl_utils=2Ec already do=2E Question is= whether > instead the Makefile would want to uniformly define _GNU_SOURCE=2E It would probably be ok to do so=2E Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.b15.30d14826cf67bb18.19e208b37be.fde1075920b6cad1=--- From xen-devel-bounces@lists.xenproject.org Wed May 13 08:55:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 08:55:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307706.1579287 (Exim 4.92) (envelope-from ) id 1wN5NI-0000kC-A4; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: sJoBEvfd1PswxSWM2AnxBoi6MoAxzKTaZNZf0EVyeQHzLsU/qwWtf9rxoA8qfl+al4gfYc0GiWXmEzXu+DNFYVp365IWV+LqzpreBVyHEty4jf91OYXLOL8PBiYEVjtNNhjfv86+Ek/MTdxiBufhWYSCWDe2nnlbg5SoqHVu2JMdL6Ec1HoeHKuQ1//iXzBpHICVebGDu0rDcFcw1S/NsdRQSIdrCAuxgDxtihIBX+fXPntIOLiCWopHtjcdHzxUHCJigl+HmzDTyzIOWSs1Jaq1DkQJAjUQo+l5wHBtYaE84RX5EOZTFjTUueq84IzbksHUspUSp3SUWftF5P7iV5wrYj8Z1MTNZvZoO/ftG/UxPRyKSro0amjN/ENrO3buKGLwO85enS7VwBmJcAWO7mvlNro6qyjqsZ7RHrsST60zBAcMn8FSulevfmkpJ9/e X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 08:55:19.6721 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 24ff61c5-e292-4ca9-f08f-08deb0cd5c5f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00025F9C.EURPRD83.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB9600 X-purgate-ID: tlsNG-42698a/1778662525-19B68F3B-9C1380B4/0/0 X-purgate-type: clean X-purgate-size: 9664 Hi Michal, thanks for your review >>=20 >> +static int __init >> +domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, >> + struct xen_domctl_createdomain *d_cfg, >> + unsigned int flags) >> +{ >> + bool property_present =3D dt_property_read_bool(node, "v8r_el1_msa"= ); > I know it's present in the code for SCI, but it's not really necessary to= do the > DT parsing twice (once for boot, second for string given that > dt_property_read_string returns -EINVAL if no property found). >=20 > You could move this bool check ... >=20 >> + >> + if ( !IS_ENABLED(CONFIG_MPU) ) >> + { >> + d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_N= ONE; >> + >> + if ( !property_present ) > ... here. >=20 >> + return 0; >> + >> + printk(XENLOG_ERR >> + "Not supported 'v8r_el1_msa' DT property found for domai= n %s\n", >> + dt_node_full_name(node)); >> + return -EINVAL; >> + } >> + >> + if ( !property_present ) >> + d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_P= MSA; >> + else >> + { >> + const char *v8r_el1_msa; >> + int ret =3D dt_property_read_string(node, "v8r_el1_msa", &v8r_e= l1_msa); >> + >> + if ( ret ) >> + return ret; >> + >> + if ( !strcmp(v8r_el1_msa, "mpu") ) >> + d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_M= SA_PMSA; >> + else if ( !strcmp(v8r_el1_msa, "mmu") ) >> + d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_M= SA_VMSA; >> + else >> + { >> + printk(XENLOG_ERR >> + "v8r_el1_msa value (%s) not valid for domain %s\n", >> + v8r_el1_msa, dt_node_full_name(node)); >> + return -EINVAL; >> + } >> + } >> + >> + switch ( d_cfg->arch.v8r_el1_msa ) >> + { >> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: >> + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) >> + { >> + printk(XENLOG_ERR >> + "PMSA is not valid for domain (%s) without static al= location and direct map (v8r_el1_msa)\n", >> + dt_node_full_name(node)); >> + return -EINVAL; >> + } >> + break; >> + >> + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: >> + if ( !has_v8r_vmsa_support() ) >> + { >> + printk(XENLOG_ERR >> + "Platform doesn't support VMSA at EL1 (v8r_el1_msa)\= n"); >> + return -EINVAL; >> + } >> + break; >> + >> + default: >> + return -EINVAL; >> + } >> + >> + return 0; > This does not look very clean. How about: >=20 > static int __init > domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, > struct xen_domctl_createdomain *d_cfg, > unsigned int flags) > { > const char *value; > int ret; >=20 > if ( !IS_ENABLED(CONFIG_MPU) ) > { > d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE= ; >=20 > if ( !dt_property_read_bool(node, "v8r_el1_msa") ) > return 0; >=20 > printk(XENLOG_ERR > "v8r_el1_msa not supported on this build for domain %s\n", > dt_node_full_name(node)); > return -EINVAL; > } >=20 > ret =3D dt_property_read_string(node, "v8r_el1_msa", &value); > /* property absent: PMSA is the default */ > if ( ret =3D=3D -EINVAL ) > value =3D "mpu"; > else if ( ret ) > return ret; >=20 > if ( !strcmp(value, "mpu") ) > { > if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) > { > printk(XENLOG_ERR > "v8r_el1_msa=3Dmpu requires static-mem and direct-map f= or > domain %s\n", > dt_node_full_name(node)); > return -EINVAL; > } > d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA= ; > return 0; > } >=20 > if ( !strcmp(value, "mmu") ) > { > if ( !has_v8r_vmsa_support() ) > { > printk(XENLOG_ERR > "v8r_el1_msa=3Dmmu unsupported by platform for domain %= s\n", > dt_node_full_name(node)); > return -EINVAL; > } > d_cfg->arch.v8r_el1_msa =3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA= ; > return 0; > } >=20 > printk(XENLOG_ERR "v8r_el1_msa value '%s' not valid for domain %s\n", > value, dt_node_full_name(node)); > return -EINVAL; > } ack >=20 >=20 >> +} >> + >> int __init arch_parse_dom0less_node(struct dt_device_node *node, >> struct boot_domain *bd) >> { >> @@ -315,6 +386,9 @@ int __init arch_parse_dom0less_node(struct dt_device= _node *node, >> if ( domu_dt_sci_parse(node, d_cfg) ) >> panic("Error getting SCI configuration\n"); >>=20 >> + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) >> + panic("Error getting v8r_el1_msa configuration\n"); >> + >> if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) >> { >> int vpl011_virq =3D GUEST_VPL011_SPI; >> diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c >> index 26380a807cad..e579c3b1bb3c 100644 >> --- a/xen/arch/arm/domain.c >> +++ b/xen/arch/arm/domain.c >> @@ -18,6 +18,7 @@ >> #include >> #include >> #include >> +#include > You don't seem to use anything from this header. Yep my bad, leftover >=20 >> #include >> #include >> #include >> @@ -538,6 +539,24 @@ void vcpu_switch_to_aarch64_mode(struct vcpu *v) >> v->arch.hcr_el2 |=3D HCR_RW; >> } >>=20 >> +static bool v8r_el1_msa_domain_sanitise_config( >> + const struct xen_domctl_createdomain *config) >> +{ >> + uint8_t v8r_el1_msa =3D config->arch.v8r_el1_msa; > That is not a useful assignment. yeah it was only to shorten the line >=20 >> + >> + if ( !IS_ENABLED(CONFIG_MPU) ) >> + return v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NON= E; >> + >> + if ( IS_ENABLED(CONFIG_ARM_32) ) >> + return v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMS= A; >> + >> + if ( IS_ENABLED(CONFIG_ARM_64) ) >> + return (v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PM= SA) || >> + (v8r_el1_msa =3D=3D XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VM= SA); >> + >> + return false; > Arm32 and Arm64 are mutually exclusive, so this line is unreachable. > How about: > static bool v8r_el1_msa_domain_sanitise_config( > const struct xen_domctl_createdomain *config) > { > switch ( config->arch.v8r_el1_msa ) > { > case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: > return !IS_ENABLED(CONFIG_MPU); >=20 > case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: > return IS_ENABLED(CONFIG_MPU); >=20 > case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: > return IS_ENABLED(CONFIG_MPU) && IS_ENABLED(CONFIG_ARM_64); >=20 > default: > return false; > } > } ack >>=20 >> diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/incl= ude/asm/domain_build.h >> index 6674dac5e2f8..13e88fc0891b 100644 >> --- a/xen/arch/arm/include/asm/domain_build.h >> +++ b/xen/arch/arm/include/asm/domain_build.h >> @@ -19,6 +19,16 @@ int prepare_acpi(struct domain *d, struct kernel_info= *kinfo); >>=20 >> int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data= ); >>=20 >> +#ifdef CONFIG_MPU > You could do: && CONFIG_ARM64 and then ... >=20 >> +/* Utility function to determine if an Armv8-R processor supports VMSA.= */ >> +bool has_v8r_vmsa_support(void); >> +#else >> +static inline bool has_v8r_vmsa_support(void) >> +{ >> + return false; >> +} >> +#endif /* CONFIG_MPU */ >> + >> #endif >>=20 >> /* >> diff --git a/xen/arch/arm/mpu/arm32/mm.c b/xen/arch/arm/mpu/arm32/mm.c >> index a4673c351141..702bea804acd 100644 >> --- a/xen/arch/arm/mpu/arm32/mm.c >> +++ b/xen/arch/arm/mpu/arm32/mm.c >> @@ -5,6 +5,8 @@ >> #include >> #include >> #include >> +#include >> +#include > You don't seem to add anything from these headers. Yep, leftover >=20 >>=20 >> #define GENERATE_WRITE_PR_REG_CASE(num, pr) \ >> case num: \ >> @@ -38,6 +40,11 @@ >> break; \ >> } >>=20 >> +bool has_v8r_vmsa_support(void) >> +{ >> + return false; >> +} > ... and then you could get rid of this stub ack >> + >> /* >> * Armv8-R supports direct access and indirect access to the MPU regions= through >> * registers: >> diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c >> index ed643cad4073..b8abcc6f7bc6 100644 >> --- a/xen/arch/arm/mpu/arm64/mm.c >> +++ b/xen/arch/arm/mpu/arm64/mm.c >> @@ -5,6 +5,8 @@ >> #include >> #include >> #include >> +#include >> +#include > You don't seem to add anything from these headers. Yep, leftover Will respin with the fixes soon. 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There's no need to hold > the lock for these computations. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné I had the same thought about moving the conversion out of the locked region when reviewing the previous patch. As noted in the previous patch, we should move the conversion of the century field with the rest? > --- > How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an > inverted comment? Looks like we've inherited this from Linux, and even in > Linus'es current tree it's still this same way. Yet all half-way recent > chipsets I'm aware of properly implement the DM bit in reg B. Might this > be another 32-bit leftover? *shrugs* I don't know. Seems like Linux is still doing it, so it's likely safer for us to continue doing it also? We had no reports of it being problematic, albeit one could argue it would be best to prevent such reports by doing the right thing. Thanks, Roger. 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IOW, this doesn't include > dom0. Is this what you meant? If so, how would you enable it for dom0? > This boot option enables vIOMMU initialization in Xen itself and also enables vIOMMU for dom0. For domUs, vIOMMU is enabled via the guest configuration file. The exception is dom0less mode, where setting this boot option enables vIOMMU for all guests. > That said, is there any particular reason why this can't be > automatically enabled based on the SMMUv3 discovered? > This boot option was intended to provide a runtime enable/disable mechanism for vIOMMU even when the vIOMMU build options (CONFIG_VIRTUAL_IOMMU / CONFIG_VIRTUAL_ARM_SMMU_V3) are enabled. However, this may be unnecessary, and relying on the build options for enabling vIOMMU seems sufficient. I will remove this commit from the patch series. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> docs/misc/xen-command-line.pandoc | 9 +++++++++ >> xen/arch/arm/include/asm/viommu.h | 12 ++++++++++++ >> xen/drivers/passthrough/arm/viommu.c | 11 +++++++++++ >> xen/drivers/passthrough/arm/vsmmu-v3.c | 3 +++ >> 4 files changed, 35 insertions(+) >> >> diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc >> index 6c77129732..6531c2355c 100644 >> --- a/docs/misc/xen-command-line.pandoc >> +++ b/docs/misc/xen-command-line.pandoc >> @@ -2850,6 +2850,15 @@ The optional `keep` parameter causes Xen to continue using the vga >> console even after dom0 has been started. The default behaviour is to >> relinquish control to dom0. >> >> +### viommu (arm) >> +> `= ` >> + >> +> Default: `` >> + >> +Flag to enable or disable support for the virtual IOMMU for guests. Disabled by >> +default. Enable by specifying target IOMMU type (if supported). Only "smmuv3" >> +IOMMU emulation supported at this point. >> + >> ### viridian-spinlock-retry-count (x86) >> > `= ` >> >> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/include/asm/viommu.h >> index 2a6742de73..ed338fe0ec 100644 >> --- a/xen/arch/arm/include/asm/viommu.h >> +++ b/xen/arch/arm/include/asm/viommu.h >> @@ -10,6 +10,7 @@ >> #include >> >> extern struct list_head host_iommu_list; >> +extern char viommu[]; >> >> /* data structure for each hardware IOMMU */ >> struct host_iommu { >> @@ -50,6 +51,12 @@ uint16_t viommu_get_type(void); >> void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> const struct dt_device_node *node); >> >> +static always_inline bool is_viommu_enabled(void) > > Regardless what Luca wrote, why do we need to force "always_inline"? > I don't think it's necessary to use always_inline here, anyway this function will be removed. >> +{ >> + /* only smmuv3 emulation supported */ >> + return !strcmp(viommu, "smmuv3"); >> +} >> + >> #else >> >> static inline uint8_t viommu_get_type(void) >> @@ -76,6 +83,11 @@ static inline void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> return; >> } >> >> +static always_inline bool is_viommu_enabled(void) >> +{ >> + return false; >> +} >> + >> #endif /* CONFIG_ARM_VIRTUAL_IOMMU */ >> >> #endif /* __ARCH_ARM_VIOMMU_H__ */ >> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/passthrough/arm/viommu.c >> index 53ae46349a..5f5892fbb2 100644 >> --- a/xen/drivers/passthrough/arm/viommu.c >> +++ b/xen/drivers/passthrough/arm/viommu.c >> @@ -3,6 +3,7 @@ >> #include >> #include >> #include >> +#include >> #include >> >> #include >> @@ -38,8 +39,18 @@ void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> list_add_tail(&iommu_data->entry, &host_iommu_list); >> } >> >> +/* By default viommu is disabled. >> + * If enabled, 'viommu' param indicates type (smmuv3 is only supported type atm) >> + */ >> +char __read_mostly viommu[10] = ""; >> +string_param("viommu", viommu); >> + >> int domain_viommu_init(struct domain *d, uint16_t viommu_type) >> { >> + /* Enable viommu when it has been enabled explicitly (viommu="smmuv3"). */ >> + if ( !is_viommu_enabled() ) > > + return 0;> + >> if ( viommu_type == XEN_DOMCTL_CONFIG_VIOMMU_NONE ) >> return 0; >> >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> index 6b4009e5ef..e36f200ba5 100644 >> --- a/xen/drivers/passthrough/arm/vsmmu-v3.c >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -105,6 +105,9 @@ void __init vsmmuv3_set_type(void) >> { >> const struct viommu_desc *desc = &vsmmuv3_desc; >> >> + if ( !is_viommu_enabled() ) > > This is likely going to go wrong in the future if we add support for > other vIOMMU in the future. If we decide to continue using the command > line option (see above), you would want want an helper to return the > selected emulation and check against SMMUv3 here. > Yes, I will remove the command-line option and use the viommu_get_type() helper where needed to check the selected vIOMMU emulation type. > Cheers, > Best regards, Milan From xen-devel-bounces@lists.xenproject.org Wed May 13 09:41:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 09:41:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307741.1579326 (Exim 4.92) (envelope-from ) id 1wN65T-0000pE-93; Wed, 13 May 2026 09:41:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307741.1579326; Wed, 13 May 2026 09:41:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN65T-0000p7-5x; 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>> +extern char viommu[]; > > As far as I can see this one is used only in this header by ... > >> >> /* data structure for each hardware IOMMU */ >> struct host_iommu { >> @@ -50,6 +51,12 @@ uint16_t viommu_get_type(void); >> void add_to_host_iommu_list(paddr_t addr, paddr_t size, >> const struct dt_device_node *node); >> >> +static always_inline bool is_viommu_enabled(void) >> +{ >> + /* only smmuv3 emulation supported */ >> + return !strcmp(viommu, "smmuv3"); >> +} > > this function, it seems cleaner to me if viommu is static inside xen/xen/drivers/passthrough/arm/viommu.c > and this one can be defined there as well, so here we will have only the declaration. > I will remove this patch, including the additional boot option and is_viommu_enabled(). Relying on the existing vIOMMU config options should be sufficient for vIOMMU enable/disable control. > Cheers, > Luca > Best regards, Milan From xen-devel-bounces@lists.xenproject.org Wed May 13 10:36:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 10:36:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307766.1579346 (Exim 4.92) (envelope-from ) id 1wN6x5-0007ua-95; Wed, 13 May 2026 10:36:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307766.1579346; Wed, 13 May 2026 10:36:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN6x5-0007uT-6P; Wed, 13 May 2026 10:36:31 +0000 Received: by outflank-mailman (input) for mailman id 1307766; Wed, 13 May 2026 10:36:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN6x3-0007uN-LG for xen-devel@lists.xenproject.org; Wed, 13 May 2026 10:36:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN6x1-00BYSE-5t for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:36:28 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a045421-bab6-0a2a0a5309dd-0a2a4502e210-28 for ; Wed, 13 May 2026 12:36:28 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04542c-af86-0a2a45020019-d155dd33a46e-3 for ; Wed, 13 May 2026 12:36:28 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d734223e4so4073134f8f.0 for ; Wed, 13 May 2026 03:36:28 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 03:36:27 -0700 (PDT) Message-ID: <35e23e0f-5439-4516-906c-4310cd05a4a9@suse.com> Date: Wed, 13 May 2026 12:36:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 1/5] x86/time: use RTC century byte when available To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778668588-8137C161-66984141/0/0 X-purgate-type: clean X-purgate-size: 937 On 13.05.2026 10:49, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 04:58:43PM +0200, Jan Beulich wrote: >> @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t >> rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); >> rtc->mon = CMOS_READ(RTC_MONTH); >> rtc->year = CMOS_READ(RTC_YEAR); >> + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) >> + century = CMOS_READ(acpi_gbl_FADT.century); >> >> if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) >> { >> @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t >> >> spin_unlock_irqrestore(&rtc_lock, flags); >> >> - if ( (rtc->year += 1900) < 1970 ) >> + if ( century ) >> + { >> + BCD_TO_BIN(century); > > Don't you need to move the BCD_TO_BIN() translation with the rest, so > it's not done unconditionally? No, the century field is always BCD. Jan From xen-devel-bounces@lists.xenproject.org Wed May 13 10:39:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 10:39:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307777.1579356 (Exim 4.92) (envelope-from ) id 1wN70I-0000F7-QA; Wed, 13 May 2026 10:39:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307777.1579356; Wed, 13 May 2026 10:39:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN70I-0000F0-Ml; Wed, 13 May 2026 10:39:50 +0000 Received: by outflank-mailman (input) for mailman id 1307777; Wed, 13 May 2026 10:39:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN70H-0000Es-8j for xen-devel@lists.xenproject.org; Wed, 13 May 2026 10:39:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN70G-009oFH-LL for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:39:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0454f3-bab6-0a2a0a5309dd-0a2a4507856c-6 for ; Wed, 13 May 2026 12:39:48 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0454f4-229c-0a2a45070019-d155802fc560-3 for ; Wed, 13 May 2026 12:39:48 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so37589815e9.1 for ; Wed, 13 May 2026 03:39:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 03:39:47 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 12:39:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] x86/time: move BCD_TO_BIN() uses To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <2c5af8f9-05f6-43c4-afb4-a50cbacd2d49@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778668788-20F66C48-CF883A97/0/0 X-purgate-type: clean X-purgate-size: 1519 On 13.05.2026 10:56, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 04:59:03PM +0200, Jan Beulich wrote: >> ... outside of __get_cmos_time()'s locked region. There's no need to hold >> the lock for these computations. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. > I had the same thought about moving the conversion out of the locked > region when reviewing the previous patch. > > As noted in the previous patch, we should move the conversion of the > century field with the rest? As said there, no, I don't think so. >> --- >> How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an >> inverted comment? Looks like we've inherited this from Linux, and even in >> Linus'es current tree it's still this same way. Yet all half-way recent >> chipsets I'm aware of properly implement the DM bit in reg B. Might this >> be another 32-bit leftover? > > *shrugs* I don't know. Seems like Linux is still doing it, so it's > likely safer for us to continue doing it also? We had no reports of > it being problematic, albeit one could argue it would be best to > prevent such reports by doing the right thing. That's my point. If we did this as specified, we'd unbreak systems with the DM bit set correctly, but we'd break (hypothetical) systems with it bogusly set. Like with a few other fixes, perhaps we should correct it, but provide a command line option to restore old behavior? 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These will be used to remove the export jobs. >>>> >>>> Switch qemu-arm{32,64} jobs to use this container. >>>> >>>> No functional change. >>>> >>>> Signed-off-by: Andrew Cooper >>>> --- >>>> CC: Anthony PERARD >>>> CC: Stefano Stabellini >>>> CC: Michal Orzel >>>> CC: Doug Goldstein >>>> >>>> We should probably wire up some build tests too, but it's too late on a Friday >>>> for me to be thinking about that for this posting. >>>> --- >>>> automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ >>>> automation/gitlab-ci/test.yaml | 4 +- >>>> automation/scripts/containerize | 1 + >>>> 3 files changed, 74 insertions(+), 2 deletions(-) >>>> create mode 100644 automation/build/debian/13-arm64v8.dockerfile >>>> >>>> diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile >>>> new file mode 100644 >>>> index 000000000000..b9062ee8b443 >>>> --- /dev/null >>>> +++ b/automation/build/debian/13-arm64v8.dockerfile >>>> @@ -0,0 +1,71 @@ >>>> +# syntax=docker/dockerfile:1 >>>> +FROM --platform=linux/arm64/v8 debian:trixie-slim >>>> +LABEL maintainer.name="The Xen Project" >>>> +LABEL maintainer.email="xen-devel@lists.xenproject.org" >>>> + >>>> +ENV DEBIAN_FRONTEND=noninteractive >>>> + >>>> +RUN <>>> +#!/bin/bash >>>> + set -eu >>>> + >>>> + useradd --create-home user >>>> + >>>> + apt-get update >>>> + >>>> + DEPS=( >>>> + # Xen >>>> + bison >>>> + build-essential >>>> + checkpolicy >>>> + flex >>>> + >>>> + # Tools (general) >>>> + ca-certificates >>>> + cpio >>>> + git-core >>>> + pkg-config >>>> + wget >>>> + # libxenguest dombuilder >>>> + libbz2-dev >>>> + liblzma-dev >>>> + liblzo2-dev >>>> + libzstd-dev >>>> + zlib1g-dev >>>> + # libacpi >>>> + acpica-tools >>>> + # libxl >>>> + libfdt-dev >>>> + libjson-c-dev >>>> + uuid-dev >>>> + # xentop >>>> + libncurses5-dev >>>> + # Python bindings >>>> + python3-dev >>>> + python3-setuptools >>>> + # Golang bindings >>>> + golang-go >>>> + # Ocaml bindings/oxenstored >>>> + ocaml-nox >>>> + ocaml-findlib >>> Since this is a container used only for tests, why listing packages required for >>> Xen and tools build? >> I did leave a note about that. >> >>>> + >>>> + # for test phase, qemu-* jobs >>>> + busybox-static >>>> + curl >>>> + device-tree-compiler >>>> + expect >>>> + file >>>> + ipxe-qemu >>>> + ovmf >>>> + qemu-system-aarch64 >>>> + u-boot-qemu >>>> + u-boot-tools >>> So after this change, even though you replace debian-12 with debian-13 for all >>> the tests, the debian-12 still contains the unneeded packages (i.e. for a test >>> phase that it no longer runs). >> Yes.  I can't do this series bisectably without it.  Also, in the past > Ok, I understand the bisectibility problem. On further thought, I can in principle fix bisectibility by introducing Trixie first, but that loses the logical sequence of events somewhat. >> people have explicitly requested to be able to run the qemu smoke >> testing from the build container, which is why it's like this and not split. > Unless it's a rule that every container follows and is documented somewhere I > don't like this argument. It was explicitly requested by ARM, and accepted at a time. If you'd like to revisit this decision, that's also fine too, but I don't want to be flip-flopping on it. I could: 1) Make a 13-arm64v8-test.dockerfile containing only the test phase stuff 2) Switch to this ahead of the 12 cleanup 3) Do the 12 cleanup without the test phase stuff although this makes a new scheme that we haven't used before. The one thing to say.  It's almost always safe to add packages to an existing container, but ... > My plan then is to do the clean up of Arm containers > in the future to remove packages not used. ... you can't remove packages from an existing container.  The containers are shared by all stable branches, and you'll generally break older branches by doing this. Where we have dropped dependences, e.g. ae26101f6bfc, I've commented the dockerfile so it doesn't get copied forwards into a new container, and can be dropped when the identified version falls out of stable support. a0e29b316 is an example where the containers did get rebuilt after the version of Xen ceased being tested. > It creates more confusion for people > willing to create their own dockerfiles for testing (or just to see what it > takes to build e.g. Xen on Arm) than it gives benefits. That's why the dependencies are grouped and labelled.  I do expect people to be able to figure out the bits they don't need based on the comments. >> Honestly, I was hoping to leave the Trixie update to the ARM >> maintainers, but despite the Bookworm QEMU (7.2) being newer than the >> 6.0 in the export jobs, it contains the SYSREG interception bugs which >> prevents hiding ThumbEE from guests, and breaks all the arm32 testing >> with a Linux dom0. > Does it make sense to have both Debian 12 and Debian 13 build/test? Can't we > have just the latest one? Build, yes absolutely.  You want as wider range of compilers/toolchains as possible. Test, we tend to only do one.  For x86 it's the alpine build; for ARM, it's from the Debian build. > All of the remarks above are not something that should prevent this patch from > going in, so: > Reviewed-by: Michal Orzel Thanks, but lets see about the latest proposal first. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 13 11:08:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:08:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307804.1579382 (Exim 4.92) (envelope-from ) id 1wN7S8-0005Nq-CX; Wed, 13 May 2026 11:08:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307804.1579382; Wed, 13 May 2026 11:08:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN7S8-0005Nj-9b; Wed, 13 May 2026 11:08:36 +0000 Received: by outflank-mailman (input) for mailman id 1307804; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: aUR/NhzCj1Tb3I+X2rv3ZqNxVcoq6sItyi9qaHP54cSYcDO4vLD/3gbDtuSf/V2U9YCMa2Er8sCxVo/NdbFZzQGnwGG6KCMVeTT28JZH7wX+WzAWig+z2hT/3FUzK3kTNCds1InoiWgE6Dev/ElLR3TRx62PpnzwMPhVtsm9uswUkrPKeqNRzMeBwVnbA+XZSCuz6M5xqkb00+rodHSNKwPepDq3yBX1are/7lCV2RBsA9uTKl076+ZBUt6oLdNuT7jZjczDT/9XRFB1qY4KanFNVrBFpMHPCO6bRvwJUG6e+xq5ptX6zHwhVK1fTmBDa81Y0qzqbhFTj20HhkiDbNQTVcPVvBtTSAq/uVZv3zQmh/a9unnpG9s9tsXc3U7+a0pcTPRhRGckd/sYLopc2+NZS5cr6GGR7Lfn4yC1d0XJS8s4uhhX3KttBXg9HuC8 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:08:27.5617 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 15750208-db1e-4cff-0330-08deb0dff589 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C618E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8915 X-purgate-ID: tlsNG-720697/1778670513-A877A161-37050CF0/10/73395122804 X-purgate-type: spam X-purgate-size: 1357 On 07-May-26 10:58, Oleksii Kurochko wrote: > Widen the len argument of copy_to_guest_phys_flush_dcache() and the > copy_to_guest_phys_cb typedef from unsigned int to unsigned long, as > the function can be used to copy large blobs such as the initrd which > may exceed 4GB. Update the internal copy_guest() len argument to > unsigned long accordingly. > > Change the type for local variable size in copy_guest() to avoid > compilation error because of type mismatch. > > raw_* wrappers above copy_guest() keep returning unsigned long to > avoid type narrowing; it is not an issue for raw_*'s len argument > to remain 'unsigned int' since the assignment to copy_guest()'s wider > unsigned long parameter is safe and there is no raw_* users who > are using a value bigger than what can fit into 'unsigned int'. > > Fixes: 2986481b3d9e6 ("xen/arm: guest_copy: Extend the prototype to pass the vCPU") > Fixes: 5302bd490bea7 ("xen/arm: Introduce copy_to_guest_phys_flush_dcache") > Fixes: d07b7369aa65b ("xen/common: dom0less: introduce common domain-build.c") > Reported-by: Jan Beulich > Signed-off-by: Oleksii Kurochko > Reviewed-by: Jan Beulich > Reviewed-by: Luca Fancellu Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:08:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:08:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307803.1579373 (Exim 4.92) (envelope-from ) id 1wN7S6-0005AS-3X; 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pr=C Message-ID: <56900ab8-0f43-4b85-9866-66d7fdabd39d@amd.com> Date: Wed, 13 May 2026 13:07:53 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 02/11] xen/dom0less: rename kernel_zimage_probe() to kernel_image_probe() To: Oleksii Kurochko , CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Luca Fancellu References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA4B:EE_|SA1PR12MB999251:EE_ X-MS-Office365-Filtering-Correlation-Id: 647944f2-af09-49f9-9941-08deb0dff4db X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|7416014|376014|11063799003|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: SPB5r0oZV7053Dw68q6q1gsxb6T4RpSSmY/t9DX1p17j+uNlAMcrt06MJfmmBilZXPDXNcJAuhSL+80KWzx0kAoCbdGs4jwAfpgfZj6dBPlzohbYKY0h1G8HzGdqD99R4lPntdIPypKKVHv1f3Gv0efKE9jpM+aD7xJXZN4Rz12rDCizHqedqvMsx0YGtiOkenEUIxB/vWDKKwts4mfambAWd5NHKcHg1rN23KLPSIaYyL455rf8pS9NLa9CphjDB+jU7A4m5Ssxm4ZVCgom2chvxRc+F0zSZaKxcr7AdV2dRM9NWGrqvRJP21kbzYjRDcYt4fLn7d0C0x64PGQvlzPlJFr38r3IivyyeqLxWNUy4AjEH+FAuhWu2C67jUnA/zAio4yebQWdxbBIRPWRTV6XUXNuDy5J8aUTavgpfzMsDf9bbHjMtuIngNuYa4Hu X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:08:26.4814 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 647944f2-af09-49f9-9941-08deb0dff4db X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA4B.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB999251 X-purgate-ID: tlsNG-4011c0/1778670512-711628B7-8A966658/10/73395122804 X-purgate-type: spam X-purgate-size: 999 On 07-May-26 10:58, Oleksii Kurochko wrote: > The helper kernel_zimage_probe() is referenced from common code > (xen/common/device-tree/kernel.c), but its name is tied to the zImage > format which is specific to Arm (from architectures supported by Xen). > > Other architectures supported by Xen, such as RISC-V, do not use the > zImage format and instead rely on other kernel image types (e.g. Image > or compressed Image variants: Image.gz, etc). Using "zimage" in the > name is therefore misleading in architecture-independent code. > > Rename kernel_zimage_probe() to kernel_image_probe() and update the > associated structure field from "zimage" to "image" to reflect that the > code handles generic kernel images rather than the zImage format > specifically. > > No functional change intended. > > Reported-by: Jan Beulich > Signed-off-by: Oleksii Kurochko Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:08:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:08:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307806.1579392 (Exim 4.92) (envelope-from ) id 1wN7SE-0005fQ-JN; Wed, 13 May 2026 11:08:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307806.1579392; Wed, 13 May 2026 11:08:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN7SE-0005fJ-Fm; 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bh=NfVx5iqwz5K8cvw+XXqSAEbzC3Qeo5a8zfHEwXV40P0=; b=HIZKbtGgNY+/hazZsLHnOU/XlLq/FiFqW9MQdL9tP+Ns6q55OIBDcvqYa9Ebt0OZ4/0w8Hl4cUfMu7mm6GzJGjU2TZpX7Ons57x1xy3jZQso30wCLQ/2gwchQAiJ5BpBHar4SvrHP0LwcpnCtco/1Lm00FNSWms+clw0gMvYCco= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Wed, 13 May 2026 13:08:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 03/11] xen: move declaration of fw_unreserved_regions() to common header To: Oleksii Kurochko , CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Luca Fancellu References: <6e79a0cf0a718e8e8c582cc5848ce5221cd56902.1778140240.git.oleksii.kurochko@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <6e79a0cf0a718e8e8c582cc5848ce5221cd56902.1778140240.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: elwesyRKCeLAGkWBQ0/lVoYOaPNEsmCxI0PZRLkeqiR8IPAIZqXYMqU+UvKmExLWj8rIonLyLVmSTWACv7Cg/X6LQ8Be6moxfX1llGRw1WaJ46hxLxUCzRvC3Ufwlh2CNqgpP7xH4US92sh73UpU+uXvZ94Y5JCpUnkPxEtq5Xz+pbAbxQGngy9SbwFtt1J5Ckymtv/OJSUtO4JB/u1uYvbLDxQsmeTbiv+AheDOLbdNpr4rydQ5YTlAv35hYtNjblzHh2nn12ITMcSzNcl1r4c43spSvbVyT7qdTveiM1UF0xpEhLtuBZGnR4BEPvBSfW6aTpd+qPjhRFoHaYN/rCxSkLEkAoc08eh8aC17OzU3tK7NrLXYkxMApHsoWhDhPATXspfNGLaR9Vtro2C/bo8wWhp3js47+2rxbM09tuZcs3zJOYhOkYfXQ9KgWMAy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:08:29.1377 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7559d8e4-e364-454d-5b99-08deb0dff67b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6193.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4185 X-purgate-ID: tlsNG-4011c0/1778670519-6FF598B7-F2059D2D/10/73395122804 X-purgate-type: spam X-purgate-size: 348 On 07-May-26 10:58, Oleksii Kurochko wrote: > Since the implementation of fw_unreserved_regions() is in common code, move > its declaration to xen/bootinfo.h. > > Signed-off-by: Oleksii Kurochko > Reviewed-by: Luca Fancellu Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:10:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:10:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307826.1579401 (Exim 4.92) (envelope-from ) id 1wN7Tp-0007dY-UB; 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pr=C Message-ID: Date: Wed, 13 May 2026 13:10:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 04/11] xen: introduce domain-layout.h with common domain_use_host_layout() To: Oleksii Kurochko , CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Alistair Francis , Connor Davis , "Luca Fancellu" References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECD4:EE_|SA0PR12MB4350:EE_ X-MS-Office365-Filtering-Correlation-Id: f66c43cd-806d-4b3f-866d-08deb0e03470 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|7416014|82310400026|376014|13003099007|11063799003|22082099003|18002099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6Bvfd86EWJ4/ELp65WHPF7z7z6uqd6y0UDCvUtD1DPIaYtcPhvJCbelPsbzHkCp0KXSxtEKdjTBTh/Y0dmJ5dP9YQJFin33cr1aLSONkzeYC09uxRSyc1Ccr6TmmCVOgkcCC9HjXX+2wF0WxZGCtKTC4n60lIdwLH18dCM77dZmRr21+SfEpk4BDx8T4ExSTnlYAPd6h2+s6C7QV/TerfMgLMhO2izZlabWMc05txAWzwBP+mi0tEzw2OuBwNgWPENw9vT7GExUjg5ov50XorMERP6gx518zzc24jCKjQI3fn2QO/Q6rNQPN9ZzF37GHiOwhhB+e/aUzorvEu6TiihQi5sd8qen3n20aPNPjhbyXqaSn/JzX5Rho+0TopmaxW7oQArasyaPiUQH5E17Ee46PM3DXzdx1DBaObpU4lOgzyevAGbrzHWJ3Hc+wpw6x X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:10:13.1696 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f66c43cd-806d-4b3f-866d-08deb0e03470 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MN1PEPF0000ECD4.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4350 X-purgate-ID: tlsNG-4011c0/1778670619-71B6F8B7-55EAA6AB/10/73395122804 X-purgate-type: spam X-purgate-size: 1876 On 07-May-26 10:58, Oleksii Kurochko wrote: > domain_use_host_layout() is not architecture-specific and may be needed > on x86 [1]. Replace the ARM-specific macro in asm/domain.h with a common > static inline in a new dedicated header, xen/domain-layout.h. > > xen/domain.h would be the natural home, but placing it there would > require including xen/paging.h (for paging_mode_translate()) and > xen/sched.h (for is_hardware_domain()), which would introduce circular > dependencies. A separate header that callers opt into avoids this. > > Adjust the implementation to take paging_mode_translate() into account > so it works correctly for all architectures, including x86. Some extra > details about implementation [2] and [3]. > > To avoid the following compilation issue: > > In file included from ./include/xen/paging.h:4, > from ./include/xen/domain-layout.h:6, > from common/device-tree/domain-build.c:4: > ./arch/riscv/include/asm/paging.h:17:48: error: 'struct page_info' > declared inside parameter list will not be visible outside of this > definition or declaration [-Werror] > 17 | void paging_free_page(struct domain *d, struct page_info *pg); > > add the forward declaration of struct page_info to RISC-V's asm/paging.h. > > [1] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602161038120.359097@ubuntu-linux-20-04-desktop/ > [2] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271742400.3148344@ubuntu-linux-20-04-desktop/ > [3] https://lore.kernel.org/xen-devel/alpine.DEB.2.22.394.2602271750190.3148344@ubuntu-linux-20-04-desktop/ > > Suggested-by: Stefano Stabellini > Signed-off-by: Oleksii Kurochko > Acked-by: Jan Beulich Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:15:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:15:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307843.1579410 (Exim 4.92) (envelope-from ) id 1wN7YK-0008GJ-HR; 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pr=C Message-ID: <46c3f430-77a6-4baf-9597-17873e0782c4@amd.com> Date: Wed, 13 May 2026 13:14:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 05/11] xen/device-tree: use p2m_gpa_bits in common code To: Oleksii Kurochko , CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Luca Fancellu , Jan Beulich References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000A6730:EE_|MW6PR12MB8759:EE_ X-MS-Office365-Filtering-Correlation-Id: 98b1f939-66bd-4999-8b90-08deb0e0d9fe X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|1800799024|36860700016|82310400026|18002099003|22082099003|11063799003|56012099003; X-Microsoft-Antispam-Message-Info: aX9/frkfL+Yq2mFj4LA85nBDtid/uHbczwsCCXJvCI++No6T1vE7OSdRveElHPWJJvy3IiKpI+ez4MYuIZsOAP3GyQ2RGUa3IY1H3j0prse2nTL36RsaO98ZQ2JAjSCLdhzyOipMVMAQkpTfoKE0jmguwMOFtKHJZfN9w5P2WapfSmMqrnyVr5vXatgxahWaqLAUxtDbvZhlCIxnyBCevFaYXrG7+p/6Au6ZcCoGXnGbbG2pdCJcGahnBTyGUgn4R5wXyGb+Ci63RZkiCGr4Xjv+2CWO6terVgcjAqFXNpyBthvujNnB8f/kmr90oZQvHAPZfm8RO/rXLeFeYeGVneiBJrMoTfedoyEyxwP8/Po3gzhB3uMxtrXkkSXfEGLTY9goBjz914oGwCrY1mMcktYthcc4ny3YfVmvn6EiDVDtmK2+09Xq5FZ8M1/yzXBYf6o8iSFkXSLEOjsnRdkb0KObEvgIhzV4hPMnewhwlFq2NFG0s5GqcEVEnC1+VPY0Pl4BAJ8If0QW2O1s+KYmHIBr/mP6DYu2y6EISJdwEQE9azpeEu3umOCAXfEARFBFIR7LbDTZB433xwxNW07DIL5PmzLyGf1CAFIm1ZavWJM7ghuvzg5I3kju9DSTKimre/hcLgU12HgTVNV1I2J0lqEOjARdhmsSaizeonLQ4XAX+rBt33+QeffNVWx/6yRXmi6v0mlOtq9xKjVE8i5iw49PO06HzPWkoxdLS+LQKag= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(1800799024)(36860700016)(82310400026)(18002099003)(22082099003)(11063799003)(56012099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: sETQaRTG4/nT/w9NieA+6ZuCNhG9WBzEk/YfMQbD4czIUvvsDpxIwG0NiNYnOoaqmONnG6RSNWWgsUvzTTb6JCwGc4ReuxQ2+jPr0bLPWb0Q+nUHh8+cQqytirMsUc0/qA0KhIndB356YsvCUzXIgJtSxlb9dvK2I9CXegVuz7yku99uZ5nrZ4/HQQdwu3LyLaHUgH3aN7Co9hGfq15gxVrK6nFdPMHy1TOs+KPQpLbnjYNgQzmiqkKVBWmAoGd3y9vfsZi4JERHIi4rYZaDZV4VHfGOelYLxllqtRw5CiiaMhclDjuXGgsorJqI7izsokX7pTca1MYgXgzTyg3jBLJefklNREb2m1uJDJgPUvEVUcgK4GCu3ua1C5xjNWjIxj5gVlBJIRiDnBUzRfBSN4pVc8G7NJu8mNmvdVFRu0YGVeZituGfb9yutjMjjMKy X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:14:50.8324 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 98b1f939-66bd-4999-8b90-08deb0e0d9fe X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000A6730.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW6PR12MB8759 X-purgate-ID: tlsNG-ef75cf/1778670897-21364C48-C00B3392/10/73395122804 X-purgate-type: spam X-purgate-size: 1560 On 07-May-26 10:58, Oleksii Kurochko wrote: > The IPA terminology is Arm-specific, so rename p2m_ipa_bits to > p2m_gpa_bits to use architecture-neutral naming in > xen/common/device-tree/ code. > > No functional changes. > > Reported-by: Jan Beulich > Signed-off-by: Oleksii Kurochko > Reviewed-by: Luca Fancellu > --- > Changes in v5: > - Rephraze commit subject. > - Reviewed-by: Luca Fancellu . > --- > Changes in v4: > - Nothing changed only rebase. > --- > Changes in v3: > - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of > renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of > changes clearer and keep using Arm-specific terminolgy inside > Arm code. > --- > Changes in v2: > - New patch. > --- > --- > xen/arch/arm/include/asm/p2m.h | 2 ++ > xen/common/device-tree/domain-build.c | 2 +- > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h > index 010ce8c9ebbd..7957dbd96e57 100644 > --- a/xen/arch/arm/include/asm/p2m.h > +++ b/xen/arch/arm/include/asm/p2m.h > @@ -14,6 +14,8 @@ > /* Holds the bit size of IPAs in p2m tables. */ > extern unsigned int p2m_ipa_bits; > > +#define p2m_gpa_bits p2m_ipa_bits This deserves the comment e.g.: /* Common-code alias; ARM keeps the IPA spelling internally */ With that: Acked-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:16:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:16:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307849.1579419 (Exim 4.92) (envelope-from ) id 1wN7Zk-0000K7-RC; Wed, 13 May 2026 11:16:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307849.1579419; Wed, 13 May 2026 11:16:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN7Zk-0000K0-OH; Wed, 13 May 2026 11:16:28 +0000 Received: by outflank-mailman (input) for mailman id 1307849; Wed, 13 May 2026 11:16:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wN7Zj-0000Js-Mn for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <7c75dce1-f0e9-44f6-bda5-9d18435b882d@amd.com> Date: Wed, 13 May 2026 13:16:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v5 05/11] xen/device-tree: use p2m_gpa_bits in common code From: "Orzel, Michal" To: Oleksii Kurochko , CC: Romain Caritey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Luca Fancellu , Jan Beulich References: <46c3f430-77a6-4baf-9597-17873e0782c4@amd.com> Content-Language: en-US In-Reply-To: <46c3f430-77a6-4baf-9597-17873e0782c4@amd.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CEB:EE_|PH7PR12MB7843:EE_ X-MS-Office365-Filtering-Correlation-Id: 09ae9472-ccaf-4091-97dd-08deb0e10d76 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|36860700016|376014|11063799003|56012099003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: g3ZlNxZBRHiQVOhgwJmywYVA4POVd55c1W5OuANRNzfA+QJ3/7Kle/2PZUEPgFnZmlMKZCVcULHeDSzt5GLBJgwy11RLHqpZ3D57JSerrML527MTqxEiNa68qs4l3Sybu4gfOVLcrMmd2iAWT0N95q2hy/tWg1NmCYrPgJg21gAELbR+zpDk+BqKq7qsgvYGIU4NNc0H8y/09PF3jZgqC9mXjHvNaImWKXZhHujepBoBy9t4JcKY/ps4xxDzbtZYGXKGdU/Uz8/v2hbNSWhN82ZF442OvwsZepRFttdPyMC3iLhHLsCExAQVxQ/jiGh2KQiVUUdi8eGQFmLiQ+bpBELzB7YOd2o6LOmuazKuoBrqoWv3To8mhJMUQDNflyKOoeRzdpGJQua4K/kpccBSnECQZPznx3lNIrtQS7xvyfpnxeEZo3eAcTSM3Ry5tdjJ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 11:16:17.1845 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 09ae9472-ccaf-4091-97dd-08deb0e10d76 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CEB.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7843 X-purgate-ID: tlsNG-d25034/1778670986-E0766CF5-9DCFE38A/10/73395122804 X-purgate-type: spam X-purgate-size: 1761 On 13-May-26 13:14, Orzel, Michal wrote: > > > On 07-May-26 10:58, Oleksii Kurochko wrote: >> The IPA terminology is Arm-specific, so rename p2m_ipa_bits to >> p2m_gpa_bits to use architecture-neutral naming in >> xen/common/device-tree/ code. >> >> No functional changes. >> >> Reported-by: Jan Beulich >> Signed-off-by: Oleksii Kurochko >> Reviewed-by: Luca Fancellu >> --- >> Changes in v5: >> - Rephraze commit subject. >> - Reviewed-by: Luca Fancellu . >> --- >> Changes in v4: >> - Nothing changed only rebase. >> --- >> Changes in v3: >> - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of >> renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of >> changes clearer and keep using Arm-specific terminolgy inside >> Arm code. >> --- >> Changes in v2: >> - New patch. >> --- >> --- >> xen/arch/arm/include/asm/p2m.h | 2 ++ >> xen/common/device-tree/domain-build.c | 2 +- >> 2 files changed, 3 insertions(+), 1 deletion(-) >> >> diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h >> index 010ce8c9ebbd..7957dbd96e57 100644 >> --- a/xen/arch/arm/include/asm/p2m.h >> +++ b/xen/arch/arm/include/asm/p2m.h >> @@ -14,6 +14,8 @@ >> /* Holds the bit size of IPAs in p2m tables. */ >> extern unsigned int p2m_ipa_bits; >> >> +#define p2m_gpa_bits p2m_ipa_bits > This deserves the comment e.g.: > /* Common-code alias; ARM keeps the IPA spelling internally */ > > With that: > Acked-by: Michal Orzel Forgot to mention that I'm ok to do this change on commit (patches 1-5 are ready from this series). ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 11:43:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:43:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307866.1579429 (Exim 4.92) (envelope-from ) id 1wN800-0004sJ-TN; Wed, 13 May 2026 11:43:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307866.1579429; Wed, 13 May 2026 11:43:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN800-0004sC-OM; Wed, 13 May 2026 11:43:36 +0000 Received: by outflank-mailman (input) for mailman id 1307866; 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Wed, 13 May 2026 04:44:28 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 13:44:27 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/5] x86/guest: rename a local variable From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778672669-7176D8B7-06DFC93F/0/0 X-purgate-type: clean X-purgate-size: 810 ... shadowing a file scope one, thuis violating Misra C:2012 rule 5.3 ("An identifier declared in an inner scope shall not hide an identifier declared in an outer scope"). No difference in generated code. Signed-off-by: Jan Beulich --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -203,11 +203,11 @@ static void __init init_memmap(void) static void cf_check xen_evtchn_upcall(void) { - struct vcpu_info *vcpu_info = this_cpu(vcpu_info); + struct vcpu_info *vi = this_cpu(vcpu_info); unsigned long pending; - vcpu_info->evtchn_upcall_pending = 0; - pending = xchg(&vcpu_info->evtchn_pending_sel, 0); + vi->evtchn_upcall_pending = 0; + pending = xchg(&vi->evtchn_pending_sel, 0); while ( pending ) { From xen-devel-bounces@lists.xenproject.org Wed May 13 11:44:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307878.1579446 (Exim 4.92) (envelope-from ) id 1wN81E-0005kG-D1; Wed, 13 May 2026 11:44:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307878.1579446; Wed, 13 May 2026 11:44:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN81E-0005k9-9w; Wed, 13 May 2026 11:44:52 +0000 Received: by outflank-mailman (input) for mailman id 1307878; Wed, 13 May 2026 11:44:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN81C-0005iQ-K5 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 11:44:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN81C-000Ge9-13 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 13:44:50 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a046424-e002-0a2a0a5209dd-0a2a450bb526-44 for ; Wed, 13 May 2026 13:44:49 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a046431-212f-0a2a450b0019-d1558030bcf6-3 for ; Wed, 13 May 2026 13:44:49 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4896c22fcbaso58449745e9.0 for ; Wed, 13 May 2026 04:44:49 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 04:44:48 -0700 (PDT) Message-ID: <871c0ca7-898f-4bc6-8115-d94d40b88301@suse.com> Date: Wed, 13 May 2026 13:44:47 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/5] x86/PV: rename a local variable in pv_emulate_gate_op() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778672689-12971F3B-A993FEAD/0/0 X-purgate-type: clean X-purgate-size: 1840 ... shadowing a function scope one, thus violating Misra C:2012 rule 5.3 ("An identifier declared in an inner scope shall not hide an identifier declared in an outer scope"). No difference in generated code. Signed-off-by: Jan Beulich --- Technically, as the outer scope "rc" isn't used again later, we could simply drop the inner decl. That seemed more error prone to me, though. --- a/xen/arch/x86/pv/emul-gate-op.c +++ b/xen/arch/x86/pv/emul-gate-op.c @@ -286,16 +286,16 @@ void pv_emulate_gate_op(struct cpu_user_ if ( !jump ) { unsigned int ss, esp, *stkp; - int rc; + int left; #define push(item) do \ { \ --stkp; \ esp -= 4; \ - rc = __put_guest(item, stkp); \ - if ( rc ) \ + left = __put_guest(item, stkp); \ + if ( left ) \ { \ pv_inject_page_fault(PFEC_write_access, \ - (unsigned long)(stkp + 1) - rc); \ + (unsigned long)(stkp + 1) - left); \ return; \ } \ } while ( 0 ) @@ -359,10 +359,11 @@ void pv_emulate_gate_op(struct cpu_user_ unsigned int parm; --ustkp; - rc = __get_guest(parm, ustkp); - if ( rc ) + left = __get_guest(parm, ustkp); + if ( left ) { - pv_inject_page_fault(0, (unsigned long)(ustkp + 1) - rc); + pv_inject_page_fault(0, + (unsigned long)(ustkp + 1) - left); return; } push(parm); From xen-devel-bounces@lists.xenproject.org Wed May 13 11:45:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:45:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307887.1579455 (Exim 4.92) (envelope-from ) id 1wN81c-0006Ex-K5; Wed, 13 May 2026 11:45:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307887.1579455; Wed, 13 May 2026 11:45:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN81c-0006Eq-Ha; Wed, 13 May 2026 11:45:16 +0000 Received: by outflank-mailman (input) for mailman id 1307887; Wed, 13 May 2026 11:45:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN81a-0006EV-Hz for xen-devel@lists.xenproject.org; Wed, 13 May 2026 11:45:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN81Z-002bZs-Um for xen-devel@lists.xenproject.org; Wed, 13 May 2026 13:45:13 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a046448-2eae-0a2a0a5409dd-0a2a4504e9a4-10 for ; Wed, 13 May 2026 13:45:13 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a046449-1dec-0a2a45040019-d155dd35e1e6-3 for ; Wed, 13 May 2026 13:45:13 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-4585a116a4aso2624280f8f.3 for ; Wed, 13 May 2026 04:45:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 04:45:13 -0700 (PDT) Message-ID: <86b0f926-6733-48ca-90d5-5601e7c6f0bb@suse.com> Date: Wed, 13 May 2026 13:45:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 3/5] x86/shadow: conditionalize / rename local variables From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778672713-41B7B3FF-3D8EEAA2/0/0 X-purgate-type: clean X-purgate-size: 2006 ... shadowing a function scope one in one case and the global _end[] in another, thus violating Misra C:2012 rule 5.3 ("An identifier declared in an inner scope shall not hide an identifier declared in an outer scope"). No difference in generated code. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -857,13 +857,13 @@ do { /* 64-bit l2: touch all entries except for PAE compat guests. */ #define FOREACH_PRESENT_L2E(_sl2mfn, _sl2e, _gl2p, _done, _dom, _code) \ do { \ - unsigned int _i, _end = SHADOW_L2_PAGETABLE_ENTRIES; \ + unsigned int _i, _nr = SHADOW_L2_PAGETABLE_ENTRIES; \ shadow_l2e_t *_sp = map_domain_page((_sl2mfn)); \ ASSERT_VALID_L2(mfn_to_page(_sl2mfn)->u.sh.type); \ if ( is_pv_32bit_domain(_dom) /* implies !paging_mode_external */ && \ mfn_to_page(_sl2mfn)->u.sh.type != SH_type_l2_64_shadow ) \ - _end = COMPAT_L2_PAGETABLE_FIRST_XEN_SLOT(_dom); \ - for ( _i = 0; _i < _end; ++_i ) \ + _nr = COMPAT_L2_PAGETABLE_FIRST_XEN_SLOT(_dom); \ + for ( _i = 0; _i < _nr; ++_i ) \ { \ (_sl2e) = _sp + _i; \ if ( shadow_l2e_get_flags(*(_sl2e)) & _PAGE_PRESENT ) \ @@ -3349,7 +3349,9 @@ static pagetable_t cf_check sh_update_cr #if SHADOW_PAGING_LEVELS == 3 { mfn_t smfn = pagetable_get_mfn(v->arch.paging.shadow.shadow_table[0]); +#if GUEST_PAGING_LEVELS != 3 unsigned int i; +#endif for_each_shadow_table(v, i) { From xen-devel-bounces@lists.xenproject.org Wed May 13 11:46:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:46:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307896.1579464 (Exim 4.92) (envelope-from ) id 1wN82U-0006mb-UR; Wed, 13 May 2026 11:46:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307896.1579464; Wed, 13 May 2026 11:46:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN82U-0006mS-Qz; Wed, 13 May 2026 11:46:10 +0000 Received: by outflank-mailman (input) for mailman id 1307896; Wed, 13 May 2026 11:46:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN82U-0006mM-7C for xen-devel@lists.xenproject.org; Wed, 13 May 2026 11:46:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN82T-00D90v-K3 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 13:46:09 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04647c-2eae-0a2a0a5409dd-0a2a450ad202-16 for ; Wed, 13 May 2026 13:46:09 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a046481-56b3-0a2a450a0019-d155802adc46-3 for ; Wed, 13 May 2026 13:46:09 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48909558b3aso66381825e9.0 for ; Wed, 13 May 2026 04:46:09 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 04:46:09 -0700 (PDT) Message-ID: <146d214c-e766-4b3f-bc50-0b9beee50473@suse.com> Date: Wed, 13 May 2026 13:46:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 4/5] x86/shadow: split a nested max() invocation From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini , Nicola Vetrini References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1778672769-73F798B7-C5C149AD/0/0 X-purgate-type: clean X-purgate-size: 1655 Such nesting causes the inner instance to shadow the outer instance's macro-local variables, thus violating Misra C:2012 rule 5.3 ("An identifier declared in an inner scope shall not hide an identifier declared in an outer scope"). Use an intermediate variable for the inner invocation. No difference in generated code. Signed-off-by: Jan Beulich --- Supposedly this case is deviated (rules.rst). Does that deviation not work quite right? Actually, am I mis-reading deviations.ecl or is the respective setting only covering the combination of min() and max(), but not multiple use of the same macro? Furthermore, why would e.g. min(max_t(), ...) need a deviation? Even more generally, aren't those expressions too permissive? --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -767,11 +767,12 @@ static unsigned int sh_min_allocation(co * megabyte of RAM (for the p2m table, minimally enough for HVM's setting * up of slot zero and an LAPIC page), plus one for HVM's 1-to-1 pagetable. */ + unsigned int extra = max(domain_tot_pages(d) / 256, + is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0U) + + is_hvm_domain(d); + return shadow_min_acceptable_pages(d) + - max(max(domain_tot_pages(d) / 256, - is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0U) + - is_hvm_domain(d), - d->arch.paging.p2m_pages); + max(extra, d->arch.paging.p2m_pages); } int shadow_set_allocation(struct domain *d, unsigned int pages, bool *preempted) From xen-devel-bounces@lists.xenproject.org Wed May 13 11:47:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:47:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307902.1579473 (Exim 4.92) (envelope-from ) id 1wN83L-0007GU-5z; Wed, 13 May 2026 11:47:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307902.1579473; Wed, 13 May 2026 11:47:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN83L-0007GN-2v; Wed, 13 May 2026 11:47:03 +0000 Received: by outflank-mailman (input) for mailman id 1307902; Wed, 13 May 2026 11:47:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN83J-0007GD-Jp for xen-devel@lists.xenproject.org; Wed, 13 May 2026 11:47:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN83J-00A2US-0T for xen-devel@lists.xenproject.org; Wed, 13 May 2026 13:47:01 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0464a0-bab6-0a2a0a5309dd-0a2a450898be-40 for ; Wed, 13 May 2026 13:47:00 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0464b4-63b5-0a2a45080019-d1558035e080-3 for ; Wed, 13 May 2026 13:47:00 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so112025175e9.2 for ; Wed, 13 May 2026 04:47:00 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 04:47:00 -0700 (PDT) Message-ID: <8aca671a-eb6f-475d-87cb-7a738ecd0793@suse.com> Date: Wed, 13 May 2026 13:46:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 5/5] x86/shadow: rename a parameter of shadow_l_index() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778672820-BC766DB1-D6F222C2/0/0 X-purgate-type: clean X-purgate-size: 2555 ... shadowing a file scope one, thus violating Misra C:2012 rule 5.3 ("An identifier declared in an inner scope shall not hide an identifier declared in an outer scope"). While there, - replace u32 by uint32_t, - reduce the number of cf_check by aliasing shadow_l_index() to shadow_l1_index() for N > 1 and GUEST_PAGING_LEVELS > 2. No difference in generated code, except of course the removal of the duplicate function instances. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -402,46 +402,39 @@ guest_index(const void *ptr) return (u32)((unsigned long)ptr & ~PAGE_MASK) / sizeof(guest_l1e_t); } -static u32 cf_check shadow_l1_index(mfn_t *smfn, u32 guest_index) +static uint32_t cf_check shadow_l1_index(mfn_t *smfn, uint32_t gidx) { #if (GUEST_PAGING_LEVELS == 2) ASSERT(mfn_to_page(*smfn)->u.sh.head); - if ( guest_index >= SHADOW_L1_PAGETABLE_ENTRIES ) + if ( gidx >= SHADOW_L1_PAGETABLE_ENTRIES ) *smfn = sh_next_page(*smfn); - return (guest_index % SHADOW_L1_PAGETABLE_ENTRIES); + return (gidx % SHADOW_L1_PAGETABLE_ENTRIES); #else - return guest_index; + return gidx; #endif } -static u32 cf_check shadow_l2_index(mfn_t *smfn, u32 guest_index) -{ #if (GUEST_PAGING_LEVELS == 2) +static uint32_t cf_check shadow_l2_index(mfn_t *smfn, uint32_t gidx) +{ int i; ASSERT(mfn_to_page(*smfn)->u.sh.head); // Because we use 2 shadow l2 entries for each guest entry, the number of // guest entries per shadow page is SHADOW_L2_PAGETABLE_ENTRIES/2 - for ( i = 0; i < guest_index / (SHADOW_L2_PAGETABLE_ENTRIES / 2); i++ ) + for ( i = 0; i < gidx / (SHADOW_L2_PAGETABLE_ENTRIES / 2); i++ ) *smfn = sh_next_page(*smfn); // We multiply by two to get the index of the first of the two entries // used to shadow the specified guest entry. - return (guest_index % (SHADOW_L2_PAGETABLE_ENTRIES / 2)) * 2; + return (gidx % (SHADOW_L2_PAGETABLE_ENTRIES / 2)) * 2; +} #else - return guest_index; +#define shadow_l2_index shadow_l1_index #endif -} #if GUEST_PAGING_LEVELS >= 4 -static u32 cf_check shadow_l3_index(mfn_t *smfn, u32 guest_index) -{ - return guest_index; -} - -static u32 cf_check shadow_l4_index(mfn_t *smfn, u32 guest_index) -{ - return guest_index; -} +#define shadow_l3_index shadow_l1_index +#define shadow_l4_index shadow_l1_index #endif // GUEST_PAGING_LEVELS >= 4 From xen-devel-bounces@lists.xenproject.org Wed May 13 11:48:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 11:48:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307915.1579481 (Exim 4.92) (envelope-from ) id 1wN84r-0007wA-IB; Wed, 13 May 2026 11:48:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307915.1579481; Wed, 13 May 2026 11:48:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN84r-0007w3-FI; Wed, 13 May 2026 11:48:37 +0000 Received: by outflank-mailman (input) for mailman id 1307915; Wed, 13 May 2026 11:48:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN84q-0007vt-3H for xen-devel@lists.xenproject.org; Wed, 13 May 2026 11:48:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN84p-00CwTx-4m for xen-devel@lists.xenproject.org; Wed, 13 May 2026 13:48:35 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04650e-2eae-0a2a0a5409dd-0a2a4508a3d8-38 for ; Wed, 13 May 2026 13:48:35 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a046512-63b5-0a2a45080019-d1558029b87a-3 for ; Wed, 13 May 2026 13:48:34 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so74440135e9.2 for ; Wed, 13 May 2026 04:48:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 04:48:34 -0700 (PDT) Message-ID: <4c96b39c-ddfe-41ad-ae6c-3393dd4f9e90@suse.com> Date: Wed, 13 May 2026 13:48:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini From: Jan Beulich Subject: [PATCH] x86/shadow: deviate guest_va_t wrt Misra C:2012 rule 5.6 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778672914-B757FDB1-342779AD/0/0 X-purgate-type: clean X-purgate-size: 1063 ... ("A `typedef' name shall be a unique identifier"). Much like already done for guest_intpte_t and guest_l[12]e_t, but limited to shadow/multi.c. Signed-off-by: Jan Beulich --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -143,6 +143,11 @@ number of guest paging levels." -config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(file(^xen/arch/x86/include/asm/guest_pt\\.h$)))&&any_area(any_loc(text(^.*(guest_intpte_t|guest_l[12]e_t).*$)))"} -doc_end +-doc_begin="In x86 shadow code, the type \"guest_va_t\" is deliberately defined +multiple times, depending on the number of guest paging levels." +-config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(file(^xen/arch/x86/mm/shadow/multi\\.c$)))&&any_area(any_loc(text(^.*guest_va_t.*$)))"} +-doc_end + -doc_begin="The following files are imported from the gnu-efi package." -file_tag+={adopted_r5_6,"^xen/include/efi/.*$"} -file_tag+={adopted_r5_6,"^xen/arch/.*/include/asm/.*/efibind\\.h$"} From xen-devel-bounces@lists.xenproject.org Wed May 13 12:42:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 12:42:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307953.1579500 (Exim 4.92) (envelope-from ) id 1wN8uT-0000Lk-T0; Wed, 13 May 2026 12:41:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307953.1579500; Wed, 13 May 2026 12:41:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uT-0000Ld-Pe; Wed, 13 May 2026 12:41:57 +0000 Received: by outflank-mailman (input) for mailman id 1307953; Wed, 13 May 2026 12:41:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uS-0000LP-R5 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:41:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN8uQ-00C24R-J7 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:41:56 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04718e-2eae-0a2a0a5409dd-0a2a450aa664-20 for ; Wed, 13 May 2026 14:41:55 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a047192-56b3-0a2a450a0019-d98c6eacd6de-1 for ; Wed, 13 May 2026 14:41:55 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A485E1C14; Wed, 13 May 2026 05:41:48 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 5E0693F7B4; Wed, 13 May 2026 05:41:51 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778676113; bh=yqnUbiBLy+WsRZlIKSSExjsOXHwN130L4LLW2aQM8Eo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HyHikizYDISUAxlGmYeMk04sY3KsFDohwBOm5bJDOVuJXPZyY/w9XIfkIge71Mt6c FJlRyAk2hpTbZRQgFxMb1c5QswiiEiYZ60AiAdoU8iF9WW4wcyEamOGZpOUUT+2EeU XzYwJ2GzqsmWCO7Bo4611bdgfKz0rjKyRykL/iUQ= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Penny Zheng , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Oleksii Kurochko" , Penny Zheng , Wei Chen , Hari Limaye , Harry Ramsey Subject: [PATCH v7 1/3] arm/mpu: implement setup_virt_paging for MPU systems Date: Wed, 13 May 2026 13:41:36 +0100 Message-Id: <20260513124138.275290-2-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260513124138.275290-1-luca.fancellu@arm.com> References: <20260513124138.275290-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778676115-7C47E8B7-C1F80581/0/0 X-purgate-type: clean X-purgate-size: 7784 From: Penny Zheng Implement setup_virt_paging for AArch64 MPU systems, taking care of stage 2 address translation regime, IPA bits, supported VMID length configuration and VTCR_EL2/VSTCR_EL2 register programming. Implement also the Armv8-R specific changes to ID_AA64MMFR0_EL1, related to the supported memory system architecture (PMSA/VMSA) and check that when MPU is built, the underlying HW is compatible with PMSA. By default MPU at EL2 and EL1 is required. Signed-off-by: Penny Zheng Signed-off-by: Wei Chen Signed-off-by: Luca Fancellu Signed-off-by: Hari Limaye Signed-off-by: Harry Ramsey Reviewed-by: Michal Orzel --- v6/v7: - no changes v5: - removed spaces in inline if condition - Add Michal R-by v4: - Fixed typo in the comments - Fixed typo in the commit title and message - moved p2m_vmid_allocator_init() after write of VTCR_EL2 - Fixed printf format specifier %d -> %u v3: - Refactor unused code to more relevant commits. - Add P2M print information - Formatting issues - Update commit message v2: - Separate commit into multiple commits --- xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/processor.h | 8 +++ 4 files changed, 101 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/mpu/p2m.c b/xen/arch/arm/arm64/mpu/p2m.c index b6d8b2777b58..4547417df97e 100644 --- a/xen/arch/arm/arm64/mpu/p2m.c +++ b/xen/arch/arm/arm64/mpu/p2m.c @@ -2,11 +2,89 @@ #include #include +#include #include void __init setup_virt_paging(void) { - BUG_ON("unimplemented"); + register_t vtcr_el2 = READ_SYSREG(VTCR_EL2); + register_t vstcr_el2 = READ_SYSREG(VSTCR_EL2); + + /* PA size */ + const unsigned int pa_range_info[] = {32, 36, 40, 42, 44, 48, 52, 0, + /* Invalid */}; + + /* + * Restrict "p2m_ipa_bits" if needed. As P2M table is always configured + * with IPA bits == PA bits, compare against PA size. + */ + if ( pa_range_info[system_cpuinfo.mm64.pa_range] < p2m_ipa_bits ) + p2m_ipa_bits = pa_range_info[system_cpuinfo.mm64.pa_range]; + + /* + * The MSA and MSA_frac fields in the ID_AA64MMFR0_EL1 register identify the + * memory system configurations supported. In Armv8-R AArch64, the + * only permitted value for ID_AA64MMFR0_EL1.MSA is 0b1111. + */ + if ( system_cpuinfo.mm64.msa != MM64_MSA_PMSA_SUPPORT ) + goto fault; + + /* Permitted values for ID_AA64MMFR0_EL1.MSA_frac are 0b0001 and 0b0010. */ + if ( (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_PMSA_SUPPORT) && + (system_cpuinfo.mm64.msa_frac != MM64_MSA_FRAC_VMSA_SUPPORT) ) + goto fault; + + /* Stage 1 EL1&0 translation regime uses PMSAv8 by default */ + vtcr_el2 &= ~VTCR_MSA; + + /* + * Clear VTCR_EL2.NSA bit to configure non-secure stage 2 translation output + * address space to access the Secure PA space as Armv8-R only implements + * secure state. + */ + vtcr_el2 &= ~VTCR_NSA; + + /* + * cpuinfo sanitization makes sure we support 16-bits VMID only if all cores + * are supporting it. + * + * Set the VS bit only if 16 bit VMID is supported. + */ + if ( system_cpuinfo.mm64.vmid_bits == MM64_VMID_16_BITS_SUPPORT ) + { + vtcr_el2 |= VTCR_VS; + max_vmid = MAX_VMID_16_BIT; + } + else + vtcr_el2 &= ~VTCR_VS; + + WRITE_SYSREG(vtcr_el2, VTCR_EL2); + + p2m_vmid_allocator_init(); + + /* + * VSTCR_EL2.SA defines secure stage 2 translation output address space. + * To make sure that all stage 2 translations for the Secure PA space access + * the Secure PA space, we keep SA bit as 0. + * + * VSTCR_EL2.SC is NS check enable bit. To make sure that Stage 2 NS + * configuration is checked against stage 1 NS configuration in EL1&0 + * translation regime for the given address, and generates a fault if they + * are different, we set SC bit 1. + */ + vstcr_el2 &= ~VSTCR_EL2_SA; + vstcr_el2 |= VSTCR_EL2_SC; + WRITE_SYSREG(vstcr_el2, VSTCR_EL2); + + printk("P2M: %u-bit IPA with %u-bit PA and %u-bit VMID\n", + p2m_ipa_bits, + pa_range_info[system_cpuinfo.mm64.pa_range], + (MAX_VMID == MAX_VMID_16_BIT) ? 16 : 8); + + return; + + fault: + panic("Hardware with no PMSAv8-64 support in any translation regime\n"); } /* diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index 19d409d3eb5a..f3c11d871e86 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -462,6 +462,10 @@ #define ZCR_ELx_LEN_SIZE 9 #define ZCR_ELx_LEN_MASK 0x1ff +/* Virtualization Secure Translation Control Register */ +#define VSTCR_EL2_SA (_AC(0x1,U) << 30) +#define VSTCR_EL2_SC (_AC(0x1,U) << 20) + #ifdef CONFIG_MPU /* * The Armv8-R AArch64 architecture always executes code in Secure diff --git a/xen/arch/arm/include/asm/cpufeature.h b/xen/arch/arm/include/asm/cpufeature.h index 13353c8e1ad1..bf902a397068 100644 --- a/xen/arch/arm/include/asm/cpufeature.h +++ b/xen/arch/arm/include/asm/cpufeature.h @@ -248,6 +248,12 @@ struct cpuinfo_arm { unsigned long tgranule_16K:4; unsigned long tgranule_64K:4; unsigned long tgranule_4K:4; +#ifdef CONFIG_MPU + unsigned long __res0:16; + unsigned long msa:4; + unsigned long msa_frac:4; + unsigned long __res1:8; +#else unsigned long tgranule_16k_2:4; unsigned long tgranule_64k_2:4; unsigned long tgranule_4k_2:4; @@ -255,6 +261,7 @@ struct cpuinfo_arm { unsigned long __res0:8; unsigned long fgt:4; unsigned long ecv:4; +#endif /* MMFR1 */ unsigned long hafdbs:4; @@ -267,13 +274,13 @@ struct cpuinfo_arm { unsigned long xnx:4; unsigned long twed:4; unsigned long ets:4; - unsigned long __res1:4; + unsigned long __res2:4; unsigned long afp:4; - unsigned long __res2:12; + unsigned long __res3:12; unsigned long ecbhb:4; /* MMFR2 */ - unsigned long __res3:64; + unsigned long __res4:64; }; } mm64; diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 1a48c9ff3b39..895d7cd50244 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -403,6 +403,9 @@ #define VTCR_RES1 (_AC(1,UL)<<31) +#define VTCR_MSA (_AC(0x1,UL)<<31) +#define VTCR_NSA (_AC(0x1,UL)<<30) + /* HCPTR Hyp. Coprocessor Trap Register */ #define HCPTR_TAM ((_AC(1,U)<<30)) #define HCPTR_TTA ((_AC(1,U)<<20)) /* Trap trace registers */ @@ -464,6 +467,11 @@ #define MM64_VMID_16_BITS_SUPPORT 0x2 #endif +#define MM64_MSA_PMSA_SUPPORT 0xf +#define MM64_MSA_FRAC_NONE_SUPPORT 0x0 +#define MM64_MSA_FRAC_PMSA_SUPPORT 0x1 +#define MM64_MSA_FRAC_VMSA_SUPPORT 0x2 + #ifndef __ASSEMBLER__ extern register_t __cpu_logical_map[]; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 13 12:42:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 12:42:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307952.1579490 (Exim 4.92) (envelope-from ) id 1wN8uQ-00007z-LJ; Wed, 13 May 2026 12:41:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307952.1579490; Wed, 13 May 2026 12:41:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uQ-00007s-Iq; Wed, 13 May 2026 12:41:54 +0000 Received: by outflank-mailman (input) for mailman id 1307952; Wed, 13 May 2026 12:41:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uP-00007k-9p for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:41:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN8uN-00C24R-56 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:41:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04718a-2eae-0a2a0a5409dd-0a2a4506aeac-20 for ; Wed, 13 May 2026 14:41:52 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a04718f-7371-0a2a45060019-d98c6eacd714-1 for ; Wed, 13 May 2026 14:41:51 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A1A2E165C; Wed, 13 May 2026 05:41:45 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 7EB323F7B4; Wed, 13 May 2026 05:41:48 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778676110; bh=NM3eJlbqL8Yo0QXE/TrTFd72EjUsY9X8TYQBIlW72YY=; h=From:To:Cc:Subject:Date:From; b=R9Zsuyeqy9jSA1DVX+V2FfsM326JQXb+nRJbr4GGC9s/msBsSeFKVpMVYis7d4faB R7kf6aT07aOoZc4jHI67PbusPP+PmqITxF7ssazO+Qnmbny0o8RIkqQiEZ4HFTndE7 6ZIF6rUt2fVeDCxxMDmUCh2Cu2iE96ACHgwWGXfg= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Oleksii Kurochko" Subject: [PATCH v7 0/3] Fifth MPU Series Date: Wed, 13 May 2026 13:41:35 +0100 Message-Id: <20260513124138.275290-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1778676112-85B6DD75-8C75625D/0/0 X-purgate-type: clean X-purgate-size: 1462 This series continues to further the ongoing work to introduce support for MPU systems in Xen. The patches in this series aim to implement MPU specific p2m functions. This serie is based on staging 8070bdfa7220e772fae248abd3cbf5e87fc0fefb. Harry Ramsey (2): arm/mpu: Introduce `v8r_el1_msa` device tree property for domains arm/mpu: Implement p2m tables Penny Zheng (1): arm/mpu: implement setup_virt_paging for MPU systems docs/misc/arm/device-tree/booting.txt | 14 +++++ xen/arch/arm/arm64/mpu/p2m.c | 80 +++++++++++++++++++++++- xen/arch/arm/dom0less-build.c | 62 ++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++ xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/arm64/sysregs.h | 4 ++ xen/arch/arm/include/asm/cpufeature.h | 13 +++- xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 +++ xen/arch/arm/include/asm/mpu/p2m.h | 8 +++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/include/asm/processor.h | 8 +++ xen/arch/arm/mpu/arm64/mm.c | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++- xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 17 files changed, 328 insertions(+), 9 deletions(-) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 13 12:42:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 12:42:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307955.1579517 (Exim 4.92) (envelope-from ) id 1wN8uY-0000o7-AY; Wed, 13 May 2026 12:42:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307955.1579517; Wed, 13 May 2026 12:42:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uY-0000o0-7i; Wed, 13 May 2026 12:42:02 +0000 Received: by outflank-mailman (input) for mailman id 1307955; Wed, 13 May 2026 12:42:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uX-0000Zz-20 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:42:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN8uW-00AEoG-F6 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:42:00 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a047190-e002-0a2a0a5209dd-0a2a4501a82e-34 for ; Wed, 13 May 2026 14:42:00 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a047197-c1f2-0a2a45010019-d98c6eacd74a-1 for ; Wed, 13 May 2026 14:42:00 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CE2961C14; Wed, 13 May 2026 05:41:53 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2627B3F7B4; Wed, 13 May 2026 05:41:56 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778676118; bh=n2Ld6NodaMnOgoYtwOiJc5QPXnSYY1O1/IBqkPwZA40=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jMVKWhCGRs0OdQpLs/rYoU22HoB+mkoagomFQXvoL2QDQ9kAHzw968iP0qFFPDXPE qmlRUD+Rt2QyviB7xw2bXZn0MZEt0WS1xzR1YoNMz69zRIBCKKBzqcL3u6Nk1kW7yf 5Zuf+bGn0bm4KAsy9tdFStbRnkXbViLslqrMtTAk= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Oleksii Kurochko" Subject: [PATCH v7 3/3] arm/mpu: Implement p2m tables Date: Wed, 13 May 2026 13:41:38 +0100 Message-Id: <20260513124138.275290-4-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260513124138.275290-1-luca.fancellu@arm.com> References: <20260513124138.275290-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778676120-B675CFF4-1E66B698/0/0 X-purgate-type: clean X-purgate-size: 5942 From: Harry Ramsey Implement `p2m_alloc_table`, `p2m_init` and `p2m_final_teardown` for MPU systems. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v7: - no changes v6: - Included mpu.h for MAX_MPU_REGION_NR - used void* instead of char* in pointer arithmetic - fixed typo in comment - Add Michal R-by v5: - removed comment for P2M_ROOT_PAGES/P2M_ROOT_ORDER - used MAX_MPU_REGION_NR instead of opencoding 255 - use 'table' in p2m_alloc_table to clear pages - remove p2m_free_vmid() from error path in p2m_init() which is already handled outside v4: - no changes v3: - Check for alloc_xenheap_pages allocation - Clear additional page allocated for ARM64 - Add check for INVALID_VCPU_ID - Remove unnecessary function generate_vsctlr - Code formatting fixes --- xen/arch/arm/include/asm/arm32/mpu.h | 2 + xen/arch/arm/include/asm/arm64/mpu.h | 2 + xen/arch/arm/include/asm/mpu/p2m.h | 8 ++++ xen/arch/arm/include/asm/p2m.h | 5 ++ xen/arch/arm/mpu/p2m.c | 72 ++++++++++++++++++++++++++-- 5 files changed, 86 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/include/asm/arm32/mpu.h b/xen/arch/arm/include/asm/arm32/mpu.h index 2cf0f8cbacae..d565230f84ee 100644 --- a/xen/arch/arm/include/asm/arm32/mpu.h +++ b/xen/arch/arm/include/asm/arm32/mpu.h @@ -11,6 +11,8 @@ */ #define MPU_REGION_RES0 0x0 +#define VSCTLR_VMID_SHIFT 16 + /* Hypervisor Protection Region Base Address Register */ typedef union { struct { diff --git a/xen/arch/arm/include/asm/arm64/mpu.h b/xen/arch/arm/include/asm/arm64/mpu.h index 4f694190a8a3..8b86a03fee44 100644 --- a/xen/arch/arm/include/asm/arm64/mpu.h +++ b/xen/arch/arm/include/asm/arm64/mpu.h @@ -7,6 +7,8 @@ #define MPU_REGION_RES0 (0xFFFFULL << 48) +#define VSCTLR_VMID_SHIFT 48 + /* Protection Region Base Address Register */ typedef union { struct __packed { diff --git a/xen/arch/arm/include/asm/mpu/p2m.h b/xen/arch/arm/include/asm/mpu/p2m.h index e46d9e757a1d..1484c75b55aa 100644 --- a/xen/arch/arm/include/asm/mpu/p2m.h +++ b/xen/arch/arm/include/asm/mpu/p2m.h @@ -3,8 +3,16 @@ #ifndef __ARM_MPU_P2M_H__ #define __ARM_MPU_P2M_H__ +#include +#include +#include +#include + struct p2m_domain; +#define P2M_ROOT_PAGES DIV_ROUND_UP(MAX_MPU_REGION_NR * sizeof(pr_t), PAGE_SIZE) +#define P2M_ROOT_ORDER get_count_order(P2M_ROOT_PAGES) + static inline void p2m_clear_root_pages(struct p2m_domain *p2m) {} static inline void p2m_tlb_flush_sync(struct p2m_domain *p2m) {} diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 010ce8c9ebbd..ed1b6dd40f40 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -48,8 +48,13 @@ struct p2m_domain { /* Current VMID in use */ uint16_t vmid; +#ifdef CONFIG_MMU /* Current Translation Table Base Register for the p2m */ uint64_t vttbr; +#else + /* Current Virtualization System Control Register for the p2m */ + register_t vsctlr; +#endif /* Highest guest frame that's ever been mapped in the p2m */ gfn_t max_mapped_gfn; diff --git a/xen/arch/arm/mpu/p2m.c b/xen/arch/arm/mpu/p2m.c index f7fb58ab6aa8..f3ca8a4ab35f 100644 --- a/xen/arch/arm/mpu/p2m.c +++ b/xen/arch/arm/mpu/p2m.c @@ -28,10 +28,63 @@ void p2m_dump_info(struct domain *d) BUG_ON("unimplemented"); } +static int p2m_alloc_table(struct domain *d) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + void *table = alloc_xenheap_pages(P2M_ROOT_ORDER, 0); + unsigned int i; + + if ( !table ) + { + printk(XENLOG_G_ERR "%pd: p2m: unable to allocate P2M MPU mapping table\n", + d); + return -ENOMEM; + } + + p2m->root = virt_to_page(table); + + for ( i = 0; i < P2M_ROOT_PAGES; i++ ) + clear_page(table + (i * PAGE_SIZE)); + + return 0; +} + int p2m_init(struct domain *d) { - BUG_ON("unimplemented"); - return -EINVAL; + struct p2m_domain *p2m = p2m_get_hostp2m(d); + int rc = 0; + unsigned int cpu; + + rwlock_init(&p2m->lock); + + p2m->vmid = INVALID_VMID; + p2m->max_mapped_gfn = _gfn(0); + p2m->lowest_mapped_gfn = _gfn(ULONG_MAX); + + p2m->default_access = p2m_access_rwx; + /* mem_access is NOT supported on MPU system. */ + p2m->mem_access_enabled = false; + + /* Ensure that the type chosen is large enough for MAX_VIRT_CPUS. */ + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < MAX_VIRT_CPUS); + BUILD_BUG_ON((1 << (sizeof(p2m->last_vcpu_ran[0]) * 8)) < INVALID_VCPU_ID); + + for_each_possible_cpu(cpu) + p2m->last_vcpu_ran[cpu] = INVALID_VCPU_ID; + + /* + * "Trivial" initialization is now complete. Set the backpointer so that + * p2m_teardown() and related functions know to do something. + */ + p2m->domain = d; + + rc = p2m_alloc_vmid(d); + if ( rc ) + return rc; + + p2m->vsctlr = ((register_t)p2m->vmid << VSCTLR_VMID_SHIFT); + + return p2m_alloc_table(d); } void p2m_save_state(struct vcpu *p) @@ -46,7 +99,20 @@ void p2m_restore_state(struct vcpu *n) void p2m_final_teardown(struct domain *d) { - BUG_ON("unimplemented"); + struct p2m_domain *p2m = p2m_get_hostp2m(d); + + /* p2m not actually initialized */ + if ( !p2m->domain ) + return; + + if ( p2m->root ) + free_xenheap_pages(page_to_virt(p2m->root), P2M_ROOT_ORDER); + + p2m->root = NULL; + + p2m_free_vmid(d); + + p2m->domain = NULL; } bool p2m_resolve_translation_fault(struct domain *d, gfn_t gfn) -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 13 12:42:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 12:42:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307954.1579508 (Exim 4.92) (envelope-from ) id 1wN8uX-0000aB-2s; Wed, 13 May 2026 12:42:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1307954.1579508; Wed, 13 May 2026 12:42:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uW-0000a0-Vn; Wed, 13 May 2026 12:42:00 +0000 Received: by outflank-mailman (input) for mailman id 1307954; Wed, 13 May 2026 12:41:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wN8uV-0000Z6-BS for xen-devel@lists.xenproject.org; Wed, 13 May 2026 12:41:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wN8uU-00E9Ns-OZ for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:41:58 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04718b-5cb7-0a2a0a5109dd-0a2a450b9894-26 for ; Wed, 13 May 2026 14:41:58 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a047195-212f-0a2a450b0019-d98c6eac9412-1 for ; Wed, 13 May 2026 14:41:58 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 95A8B165C; Wed, 13 May 2026 05:41:51 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 37A433F7B4; Wed, 13 May 2026 05:41:54 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1778676116; bh=aOA8pGXM8+sNDr47EDKPkNf3yIEB9x8YW7eu8Tal1Kk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Sbj9hQxV4DZBvt+sGnpkvCwe9W8Hot25QZ0Hzl5ktAtaVH9pCv559w5MUAsdLXQUK rTEy/qecPIIjbiEw5HWtHFLieOaD6g04RyrWrILRuOhllXLE2/Emx+RsVJup3Ai8Bb /VmXGNk6gFSFe276oNKV8Zu9b9IJzFikpjIuT41I= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Oleksii Kurochko" Subject: [PATCH v7 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains Date: Wed, 13 May 2026 13:41:37 +0100 Message-Id: <20260513124138.275290-3-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260513124138.275290-1-luca.fancellu@arm.com> References: <20260513124138.275290-1-luca.fancellu@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1778676118-2007BF3B-907EDB15/0/0 X-purgate-type: clean X-purgate-size: 11210 From: Harry Ramsey Add a new device tree property `v8r_el1_msa` to select the MSA (memory system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the former is the default if the property is not passed. Implement the dom0less path to parse the new device tree property, add a new domctl hypercall input parameter `v8r_el1_msa` for arm and add the sanitisation in arch_sanitise_domain_config(), the parameter is intended to be used on CONFIG_MPU systems and returns an error if selected for MMU. While there, add explicit padding and check that it's zero during arch domain config sanitisation, given the breaking change, bump the XEN_DOMCTL_INTERFACE_VERSION. Signed-off-by: Harry Ramsey Signed-off-by: Luca Fancellu --- v7: - Refactor domu_dt_v8r_el1_msa_parse() and v8r_el1_msa_domain_sanitise_config() - remove unused headers from mpu/{arm32,arm64}/mm.c - remove has_v8r_vmsa_support() stub from mpu/arm32/mm.c and use the one in asm/domain_build.h v6: - Add explicit padding to `struct xen_arch_domainconfig` and check it - Provide common v8r_el1_msa_domain_sanitise_config() for MMU/MPU - During domu_dt_v8r_el1_msa_parse() set PMSA when property not present - constify *node in domu_dt_v8r_el1_msa_parse() - Print full path of the node in domu_dt_v8r_el1_msa_parse() error msgs - typo fixing v5: - follow the way domu_dt_sci_parse and ARM_SCI is doing, but return error if property is present in MMU systems. - Align the commit message on the new changes - fix documentation - fix multiline comment - drop the explicit padding from struct xen_arch_domainconfig v4: - Rework the patch to have the v8r_el1_msa input parameter more enclosed in the Armv8-A (mmu)/Armv8-R (mpu) space. v3: - Improve commit message and device tree property description - Remove macro protection - Remove unused function is_mpu_domain - Code formatting --- docs/misc/arm/device-tree/booting.txt | 14 ++++++ xen/arch/arm/dom0less-build.c | 62 +++++++++++++++++++++++++ xen/arch/arm/domain.c | 37 +++++++++++++++ xen/arch/arm/include/asm/domain.h | 4 ++ xen/arch/arm/include/asm/domain_build.h | 10 ++++ xen/arch/arm/mpu/arm64/mm.c | 5 ++ xen/include/public/arch-arm.h | 7 +++ xen/include/public/domctl.h | 4 +- 8 files changed, 141 insertions(+), 2 deletions(-) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index 977b4286082f..f73839df090b 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -322,6 +322,20 @@ with the following properties: Should be used together with scmi-smc-passthrough Xen command line option. +- v8r_el1_msa + + A string property specifying whether, on Armv8-R systems at EL1, a domain + should use PMSAv8 (MPU) or VMSAv8 (MMU). + + - "mmu" + Enables VMSAv8 at EL1. This requires hardware support and is only + optionally available on AArch64. Not supported on AArch32. + + - "mpu" + Enables PMSAv8 at EL1. This is the default behavior when the property is + not passed. This configuration requires static allocation (xen,static-mem) + and direct mapping (direct-map). + Under the "xen,domain" compatible node, one or more sub-nodes are present for the DomU kernel and ramdisk. diff --git a/xen/arch/arm/dom0less-build.c b/xen/arch/arm/dom0less-build.c index 52cf788a45ea..3f48f742260b 100644 --- a/xen/arch/arm/dom0less-build.c +++ b/xen/arch/arm/dom0less-build.c @@ -302,6 +302,65 @@ static int __init domu_dt_sci_parse(struct dt_device_node *node, return 0; } +static int __init +domu_dt_v8r_el1_msa_parse(const struct dt_device_node *node, + struct xen_domctl_createdomain *d_cfg, + unsigned int flags) +{ + const char *value; + int ret; + + if ( !IS_ENABLED(CONFIG_MPU) ) + { + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE; + + if ( !dt_property_read_bool(node, "v8r_el1_msa") ) + return 0; + + printk(XENLOG_ERR + "v8r_el1_msa not supported on this build for domain %s\n", + dt_node_full_name(node)); + return -EINVAL; + } + + ret = dt_property_read_string(node, "v8r_el1_msa", &value); + /* Property absent: PMSA is the default */ + if ( ret == -EINVAL ) + value = "mpu"; + else if ( ret ) + return ret; + + if ( !strcmp(value, "mpu") ) + { + if ( !(flags & CDF_staticmem) || !(flags & CDF_directmap) ) + { + printk(XENLOG_ERR + "v8r_el1_msa=mpu requires static-mem and direct-map for domain %s\n", + dt_node_full_name(node)); + return -EINVAL; + } + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA; + return 0; + } + + if ( !strcmp(value, "mmu") ) + { + if ( !has_v8r_vmsa_support() ) + { + printk(XENLOG_ERR + "v8r_el1_msa=mmu unsupported by platform for domain %s\n", + dt_node_full_name(node)); + return -EINVAL; + } + d_cfg->arch.v8r_el1_msa = XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA; + return 0; + } + + printk(XENLOG_ERR "v8r_el1_msa value '%s' not valid for domain %s\n", + value, dt_node_full_name(node)); + return -EINVAL; +} + int __init arch_parse_dom0less_node(struct dt_device_node *node, struct boot_domain *bd) { @@ -315,6 +374,9 @@ int __init arch_parse_dom0less_node(struct dt_device_node *node, if ( domu_dt_sci_parse(node, d_cfg) ) panic("Error getting SCI configuration\n"); + if ( domu_dt_v8r_el1_msa_parse(node, d_cfg, flags) ) + panic("Error getting v8r_el1_msa configuration\n"); + if ( !dt_property_read_u32(node, "nr_spis", &d_cfg->arch.nr_spis) ) { int vpl011_virq = GUEST_VPL011_SPI; diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..baa3a5d7086c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -538,6 +538,25 @@ void vcpu_switch_to_aarch64_mode(struct vcpu *v) v->arch.hcr_el2 |= HCR_RW; } +static bool v8r_el1_msa_domain_sanitise_config( + const struct xen_domctl_createdomain *config) +{ + switch ( config->arch.v8r_el1_msa ) + { + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE: + return !IS_ENABLED(CONFIG_MPU); + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA: + return IS_ENABLED(CONFIG_MPU); + + case XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA: + return IS_ENABLED(CONFIG_MPU) && IS_ENABLED(CONFIG_ARM_64); + + default: + return false; + } +} + int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) { unsigned int max_vcpus; @@ -554,6 +573,14 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + /* Check config structure padding */ + if ( config->arch.pad ) + { + dprintk(XENLOG_INFO, + "Invalid domain configuration during domain creation\n"); + return -EINVAL; + } + /* Check feature flags */ if ( sve_vl_bits > 0 ) { @@ -630,6 +657,12 @@ int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) return -EINVAL; } + if ( !v8r_el1_msa_domain_sanitise_config(config) ) + { + dprintk(XENLOG_INFO, "Unsupported v8r_el1_msa value\n"); + return -EINVAL; + } + return sci_domain_sanitise_config(config); } @@ -722,6 +755,10 @@ int arch_domain_create(struct domain *d, d->arch.sve_vl = config->arch.sve_vl; #endif +#ifdef CONFIG_MPU + d->arch.v8r_el1_msa = config->arch.v8r_el1_msa; +#endif + if ( (rc = sci_domain_init(d, config)) != 0 ) goto fail; diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index b24f02d269be..ac7300e41fcd 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -112,6 +112,10 @@ struct arch_domain #endif struct resume_info resume_ctx; + +#ifdef CONFIG_MPU + uint8_t v8r_el1_msa; +#endif } __cacheline_aligned; struct arch_vcpu diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index 6674dac5e2f8..df8b361b3da5 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,16 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) +/* Utility function to determine if an Armv8-R processor supports VMSA. */ +bool has_v8r_vmsa_support(void); +#else +static inline bool has_v8r_vmsa_support(void) +{ + return false; +} +#endif /* CONFIG_MPU */ + #endif /* diff --git a/xen/arch/arm/mpu/arm64/mm.c b/xen/arch/arm/mpu/arm64/mm.c index ed643cad4073..b07e729a7d05 100644 --- a/xen/arch/arm/mpu/arm64/mm.c +++ b/xen/arch/arm/mpu/arm64/mm.c @@ -32,6 +32,11 @@ break; \ } +bool has_v8r_vmsa_support(void) +{ + return system_cpuinfo.mm64.msa_frac == MM64_MSA_FRAC_VMSA_SUPPORT; +} + /* * Armv8-R supports direct access and indirect access to the MPU regions through * registers: diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index cd563cf70684..7d6f87e8b2b1 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -330,6 +330,10 @@ DEFINE_XEN_GUEST_HANDLE(vcpu_guest_context_t); #define XEN_DOMCTL_CONFIG_ARM_SCI_NONE 0 #define XEN_DOMCTL_CONFIG_ARM_SCI_SCMI_SMC 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_NONE 0 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_PMSA 1 +#define XEN_DOMCTL_CONFIG_ARM_V8R_EL1_MSA_VMSA 2 + struct xen_arch_domainconfig { /* IN/OUT */ uint8_t gic_version; @@ -355,6 +359,9 @@ struct xen_arch_domainconfig { uint32_t clock_frequency; /* IN */ uint8_t arm_sci_type; + /* IN */ + uint8_t v8r_el1_msa; + uint16_t pad; }; #endif /* __XEN__ || __XEN_TOOLS__ */ diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..23124547f347 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -30,9 +30,9 @@ * fields) don't require a change of the version. * Stable ops are NOT covered by XEN_DOMCTL_INTERFACE_VERSION! * - * Last version bump: Xen 4.19 + * Last version bump: Xen 4.22 */ -#define XEN_DOMCTL_INTERFACE_VERSION 0x00000017 +#define XEN_DOMCTL_INTERFACE_VERSION 0x00000018 /* * NB. xen_domctl.domain is an IN/OUT parameter for this operation. -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 13 12:44:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 12:44:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1307981.1579527 (Exim 4.92) (envelope-from ) id 1wN8xB-00025Y-Tg; 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pr=C Message-ID: <740cca52-656f-4c82-b979-58f2f5874c91@amd.com> Date: Wed, 13 May 2026 14:44:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v7 2/3] arm/mpu: Introduce `v8r_el1_msa` device tree property for domains To: Luca Fancellu , CC: Harry Ramsey , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <20260513124138.275290-1-luca.fancellu@arm.com> <20260513124138.275290-3-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260513124138.275290-3-luca.fancellu@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B077:EE_|MN2PR12MB4045:EE_ X-MS-Office365-Filtering-Correlation-Id: 40457883-8f05-4dcf-f93f-08deb0ed6028 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|7416014|82310400026|376014|11063799003|22082099003|18002099003|56012099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: vhRnthjz/HTNzsJPbxLc/a8JDgAXXykPYCo7rcpyBsC5sfNmm7bJE51DZIsRuEVoo04VDcgYQnjZ4Z3yULuLgn0NIpLFZ0wfgfTUj4tl7ZXBYv+XqW9lxC4R2G+sYQFBwPyGXu7bC2Z4PdN4cYwnpqULkeBG3fQVWBMsIxhefXlIg2USfU+epRYSUGZ4rWNJFTzJ9u9PxDdXyBC9JPLLx2AhoWfRlPpsOs7wg8rKuYVtEm/4hlk5lX9XXZphz2ZIfar9jJ/31EJwmnkP0dis5QXV1qQNg7MgDr89Yn5Fi0OAR1FOnl/6dQMs3FfMl16NRHgJOIJdlvIFlxTB3A8ZITdzo1SvKSh9L77aJbIG9otwN1c64CP5qB1njrO4r64KZahlr/LD8PNyRkIw5RkDtDgMq+b418BMelJStNi1mCR4LdpmrZ+GP63wyHC0lFQI X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 12:44:29.9802 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 40457883-8f05-4dcf-f93f-08deb0ed6028 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B077.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4045 X-purgate-ID: tlsNG-720697/1778676282-A877A161-B9486FA9/0/0 X-purgate-type: clean X-purgate-size: 964 On 13-May-26 14:41, Luca Fancellu wrote: > From: Harry Ramsey > > Add a new device tree property `v8r_el1_msa` to select the MSA (memory > system architecture) at EL1 for Armv8-R architecture: MPU or MMU, the > former is the default if the property is not passed. > > Implement the dom0less path to parse the new device tree property, add > a new domctl hypercall input parameter `v8r_el1_msa` for arm and > add the sanitisation in arch_sanitise_domain_config(), the parameter > is intended to be used on CONFIG_MPU systems and returns an error if > selected for MMU. > > While there, add explicit padding and check that it's zero during > arch domain config sanitisation, given the breaking change, bump the > XEN_DOMCTL_INTERFACE_VERSION. > > Signed-off-by: Harry Ramsey > Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 13 13:42:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 13:42:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308004.1579535 (Exim 4.92) (envelope-from ) id 1wN9r8-0002Hf-2b; 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Wed, 13 May 2026 06:41:12 -0700 (PDT) MIME-Version: 1.0 From: xf zhang Date: Wed, 13 May 2026 21:41:01 +0800 X-Gm-Features: AVHnY4KzzXxz915eiSwR3akIJUf1hq94xBY99YkXV9C-mH6tCVqEOJZNNNn4kEw Message-ID: Subject: A student seeking help: HVMI instruction emulation crashes on Windows guest (tried many approaches, still stuck) To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="0000000000000cd1bd0651b322b0" X-purgate-ID: tlsNG-4011c0/1778679673-72B778B7-A07AB54C/0/0 X-purgate-type: clean X-purgate-size: 28898 --0000000000000cd1bd0651b322b0 Content-Type: text/plain; charset="UTF-8" Dear HVMI maintainers and Xen community, Hello! I am a China student currently learning and researching Virtual Machine Introspection (VMI) technology. I have been working with HVMI and encountered several persistent issues. I would like to kindly ask if there are any known solutions or workarounds. Background: To test and reproduce these issues, I have kept my Windows guest running for several days and tried many different approaches (including source code modifications and configuration changes). Unfortunately, nothing has worked so far. The issues keep recurring, and I am truly stuck. I would greatly appreciate your guidance. Please forgive me if I have misunderstood anything. ------------------------------ My Environment Item Information Host Linux (Ubuntu [20.04]) Guest Windows ([Windows 10_17763_x64]) Virtualization [Xen] ------------------------------ Issues Encountered When using HVMI to introspect a Windows guest, the introcore module crashes when handling certain instructions due to "spills in the next entry". Here are the specific issues: Issue 1: MOVZX causes process crash text [ERROR] Access at 1aafa7 spills in the next entry, size 4, instruction 'MOVZX' [ERROR] IntHookPtwEmulateWrite failed: 0xe1000508 process 48416 crashed Issue 2: PUSH causes introspection engine shutdown text [ERROR] Access at 1aa975 spills in the next entry, size 8, instruction 'PUSH' [ERROR] IntHookPtwEmulateWrite failed: 0xe1000508 Introcore shutdown complete Issue 3: CMP instruction not supported text [ERROR] Instruction 'CMP dword ptr [rbx+0x108], esi' not supported Introcore shutdown complete Issue 4: Agent deployment fails (cascading effect) text [WARNING] Agent bdQL9CeR.exe will not be deployed as the guest is NOT initialized! ------------------------------ What I Have Tried (all failed) I have spent several days trying the following approaches, but the issues persist: 1. Source code modifications: Commented out IntBugCheck(), forced INT_STATUS_SUCCESS return 2. Configuration changes: Tried disabling certain hook types, modified EPT protection parameters 3. Restarting services: Restarted hvmid and the guest VM multiple times 4. Different Windows versions: Tried both Windows 10 and Windows 7 5. Documentation search: Searched for HVMI-related resources but found no similar solutions ------------------------------ My Questions 1. Are there any known solutions or patches for these issues? 2. Are there any plans to fix these issues in future releases? 3. If no official fix is available yet, could you suggest any temporary workarounds? (e.g., disabling certain hook types, changing configuration parameters, etc.) 4. Do you have any advice for a student learning HVMI and VMI technology? ------------------------------ Thank you for your open-source work on HVMI and the Xen community, which has given students like me the opportunity to learn and explore VMI technology. I look forward to your reply. Best regards, [name]Xiaofei Zhang [School Name] Beijing University of Posts and Telecommunications --0000000000000cd1bd0651b322b0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable

Dear HVMI maintainers and Xen = community,

Hello! I am a China student curre= ntly learning and researching Virtual Machine Introspection (VMI) technolog= y. I have been working with HVMI and encountered several persistent issues.= I would like to kindly ask if there are any known solutions or workarounds= .

Background= : To test and reproduce these issues, I have kept my Windows guest r= unning for=C2=A0several days=C2=A0an= d tried many different approaches (including source code modifications and = configuration changes). Unfortunately, nothing has worked so far. The issue= s keep recurring, and I am truly stuck. I would greatly appreciate your gui= dance.

Please forgive me if I have misunders= tood anything.

My Environment

<= td style=3D"border-bottom:1px solid rgba(0,0,0,0.1);font-variant:normal;fon= t-size-adjust:none;font-kerning:auto;font-feature-settings:normal;font-stre= tch:normal;font-size:15px;line-height:25px;min-width:100px;padding:10px 16p= x 10px 0px">Virtualization
ItemInformation
HostLinux (Ubuntu [20.04])
GuestWindows ([Windows 10_17763_x64])
[Xen]


Issues Encountered

When using HVMI = to introspect a Windows guest, the=C2=A0introcore=C2=A0module crashes when handling certain instructions due to "spill= s in the next entry". Here are the specific issues:

Issue= 1: MOVZX causes process crash

text
[ERROR] Access at 1aafa7 spills in the next entry, size 4, in=
struction 'MOVZX'
[ERROR] IntHookPtwEmulateWrite failed: 0xe1000508
process 48416 crashed

Issue 2: PUSH causes introspecti= on engine shutdown

text
[ERROR] Access at 1aa975 spills in the next entry, size 8, instruction &#=
39;PUSH'
[ERROR] IntHookPtwEmulateWrite failed: 0xe1000508
Introcore shutdown complete

Issue 3: CMP instruction n= ot supported

text
[ERR=
OR] Instruction 'CMP dword ptr [rbx+0x108], esi' not supported
Introcore shutdown complete

Issue 4: Agent deployment = fails (cascading effect)

text
[WARNING] Agent bdQL9CeR.exe will not be deployed as the guest is N=
OT initialized!

What I Have Tried (all f= ailed)

I have spent several days trying the= following approaches, but the issues persist:

  1. Source code modifications: Commented out=C2=A0IntBugCheck(), forced= =C2=A0INT_STATUS_SUCCESS=C2=A0return

    2. Configuration changes: Tried disabling certa= in hook types, modified EPT protection parameters

  2. Restarting services: Restarted=C2=A0hv= mid=C2=A0and the guest VM multiple times

  3. Different Windows versions: Tried both Windows 10 and Window= s 7

  4. Documentation search: Sea= rched for HVMI-related resources but found no similar solutions

    5. My Questions

    1. Are there any known solutions or pat= ches for these issues?

    2. Are there = any plans to fix these issues in future releases?

    3. If no official fix is available yet, could you suggest an= y temporary workarounds?=C2=A0(e.g., disabling certain hook types, c= hanging configuration parameters, etc.)

    4. = Do you have any advice for a student learning HVMI and VMI technology?


    Thank you for= your open-source work on HVMI and the Xen community, which has given stude= nts like me the opportunity to learn and explore VMI technology. I look for= ward to your reply.

    Best regards,

    [name]Xiaofei Zhang

    [School Name]=C2= =A0Beijing University of Posts and Telecommunicat= ions
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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=c5mn0R3cSrwYsFzqCU6S4JzSDzyRSIJQ1FFNjRhpbGo=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=k2OZtpIOa+Cvjn/Pw1h+MqfoXKkLG4azhejXuaTQMfXKAb3BRvCC0jFiJnByXx5fXy/lRsGwO n0awKnImfYnMLEb0E/aZCIfWQW8aicndzusiN4qeS67YLcNcGurGcMlK0wC7tBvQ10zWoDPUwKq QAbc5HOUPnUAiKa6opBz5rY1pwZuo4uvCWMVPr0W3GODdWj9e7M+/S4c+BPH/MoiEVQxQpYqGPY 6z/SLSVVE31z7cmfImaJtcbwvwNOyFcVa1/s8iOycZnrh9+Wf9duzGGk2r4XitL1SWQ8gevN0RH R6FDyXBjSPxJ44ZZC0ioxGm+5uhaxTR+meUGF4Q74oSQ== X-Zone-Loop: 6fef3e81695edb80aa42e09278e61849d45f6577c01f x-campaign-type: default x-transaction-id: 28d12be7-15c9-4204-8ce3-43febf1818e0 x-swg-uid: 01-387a348c-9a6b-4dc4-bd5c-c000351858da X-Mailer: Sweego Message-ID: <1778680300.8631fc262581453bbf619ec5b2062170.19e219b849d000f373@vates.tech> x-swg-bid: 1778680300.8631fc262581453bbf619ec5b2062170.19e219b849d000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Wed, 13 May 2026 15:51:39 +0200 From: Anthony PERARD To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org Subject: Re: [PATCH v8] xen/domain: introduce DOMID_ANY References: <20260507202840.293269-1-dmukhin@ford.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20260507202840.293269-1-dmukhin@ford.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.b6f.f50e21ee35a0dab2.19e219b8280.d8cc0075e210b33e=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778680300161 X-purgate-ID: tlsNG-c201ff/1778680304-E0063443-6E85778E/0/0 X-purgate-type: clean X-purgate-size: 1568 ---=Part.b6f.f50e21ee35a0dab2.19e219b8280.d8cc0075e210b33e=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thu, May 07, 2026 at 01:28:40PM -0700, dmukhin@ford=2Ecom wrote: > From: Denis Mukhin =20 >=20 > Add a new symbol DOMID_ANY to improve the readability of the code=2E >=20 > Update all relevant domid_alloc() call sites and harden the domid_alloc(= ) > input value check=2E >=20 > Also, fix problem with passing invalid domain IDs in > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > uses 0xffff as domain ID=2E >=20 > Fix failing tools tests too=2E >=20 > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > Signed-off-by: Denis Mukhin > --- > Changes since v7: > - aligned the DOMID_ANY comment with another patch sent separately to > unblock xenstore series: https://lore=2Ekernel=2Eorg/xen-devel/2026042= 9120619=2E1013440-2-jgross@suse=2Ecom/ > - added fixups to mem-claim, paging-mempool, resource and tsx tests=2E > - Link to v7: https://lore=2Ekernel=2Eorg/xen-devel/20260408234046=2E131= 4021-1-dmukhin@ford=2Ecom/ > - Link to full CI: https://gitlab=2Ecom/xen-project/people/sstabellini/x= en/-/pipelines/2508345752 For the tools part: Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.b6f.f50e21ee35a0dab2.19e219b8280.d8cc0075e210b33e=--- From xen-devel-bounces@lists.xenproject.org Wed May 13 13:59:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 13:59:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308022.1579554 (Exim 4.92) (envelope-from ) id 1wNA7U-0004uQ-MX; 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Wed, 13 May 2026 06:59:25 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 15:59:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= From: Jan Beulich Subject: common: Misra rule 8.3 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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Wed, 13 May 2026 07:00:01 -0700 (PDT) Message-ID: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> Date: Wed, 13 May 2026 16:00:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH 0/2] common: Misra rule 8.3 To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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Wed, 13 May 2026 14:00:09 +0000 Received: from l14 (lfbn-lyo-1-414-55.w2-7.abo.wanadoo.fr [2.7.24.55]) (Authenticated sender: anthony.perard) by mail2.vates.fr (Postfix) with ESMTPSA id 26A7486325; Wed, 13 May 2026 16:00:09 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=4F3qy5FshBiukcq6f2QlrscuPwKnV9FhFH3+nMgpNSY=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=Rmxc0A9jsG5q8HlhNsRFTReAL/SgfScTg9jlACQwLD9oevEO/vLR54dOHspQMh6PccLS0gNwx LaMqhdkdqAzNurXWWwdKQPFJY0NHRd8XE7wXQDK8RjxzYBrCeHISLJ4WYExsh+NKOZs8bE8FnP/ DN2erlvC7i56JVKfyjV3lD4PJoOsDwmD88BVwe7b/Yodq8dfMHfGlfDNAfE4rf5e+2BXTI3yYZj 1U1/Cd+6BCffibsN9fjTw2nTyCWvv569yAuknCBY4ErVbXY+fhNfsuks4q8ZsYC+Q4kp9nQH1io gW/Zx84Mxi48Jv9bDr0Fq5G9uFs50yo7bPyS3SEQDBUA== X-Zone-Loop: 7fbc1c5f169fd20823d135b78d4f1fc5834e45c550d6 x-campaign-type: default x-transaction-id: 5c87f954-506c-4ab5-9e1e-9361579faa6f x-swg-uid: 01-cc9bee46-2cc1-4c02-8504-617014310f80 X-Mailer: Sweego Message-ID: <1778680809.8631fc262581453bbf619ec5b2062170.19e21a3491a000f373@vates.tech> x-swg-bid: 1778680809.8631fc262581453bbf619ec5b2062170.19e21a3491a000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Wed, 13 May 2026 16:00:08 +0200 From: Anthony PERARD To: Mykyta Poturai Cc: Jan Beulich , Juergen Gross , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH v7 5/6] tools: Allow building xen-hptool without CONFIG_MIGRATE References: <73db845e6617130966a565cdca6274db4cb46428.1774871881.git.mykyta_poturai@epam.com> <58cfab3b-7cf2-4e38-9968-1248e665f985@suse.com> <28900826-5a96-4bf0-8d5b-11fd1be8386a@suse.com> <96829f0b-faac-4100-8c30-c93ac9459600@epam.com> <1777473230.8631fc262581453bbf619ec5b2062170.19dd9a915bc000f373@vates.tech> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.b79.2671a3264dfd5530.19e21a34721.d489baf10e185a4b=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778680809250 X-purgate-ID: tlsNG-720697/1778680813-AA76A161-08B26096/0/0 X-purgate-type: clean X-purgate-size: 1680 ---=Part.b79.2671a3264dfd5530.19e21a34721.d489baf10e185a4b=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, May 06, 2026 at 08:52:29AM +0000, Mykyta Poturai wrote: > On 4/29/26 17:33, Anthony PERARD wrote: > > So you are trying to modify a library and introduced untested > > functionality just to be able to build a different tool? I don't think > > that a good idea especially in this case where it's more than just glu= e > > code between a binary and xen=2E > >=20 > > We could change the library to provide the missing symbols, but it is > > probably best to keep it that way for now=2E > >=20 > > So, how about changing `xen-hptool` to have reduced functionality on > > other platform, and keep the 'mem-*' command on x86 only? You could mo= ve > > the function that implement the 'mem-*' command into a separate file, > > that compile only on x86 (or more specifically when CONFIG_MIGRATE is > > set) and just have a "#if defined(__i386__) || defined(__x86_64__)" in > > the `main_options` array=2E > >=20 > > They are compile-time arch-specific check everywhere in tools=2E Arch > > specific are often implemented in separated source file, this mean we > > can limit the #ifdefs to a minimum and keep the code readable=2E >=20 > Should I also do the same thing for SMT operations? I guess it wouldn't hurt they are x86 only=2E So yes, looks like a good idea to do it for the smt op as well=2E Cheers, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.b79.2671a3264dfd5530.19e21a34721.d489baf10e185a4b=--- From xen-devel-bounces@lists.xenproject.org Wed May 13 14:00:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:00:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308036.1579580 (Exim 4.92) (envelope-from ) id 1wNA8k-00079i-Bu; Wed, 13 May 2026 14:00:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308036.1579580; Wed, 13 May 2026 14:00:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNA8k-00079b-9H; Wed, 13 May 2026 14:00:46 +0000 Received: by outflank-mailman (input) for mailman id 1308036; Wed, 13 May 2026 14:00:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNA8j-00079K-Io for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:00:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNA8i-00357C-T6 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:00:44 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a048406-bab6-0a2a0a5309dd-0a2a4501e290-6 for ; Wed, 13 May 2026 16:00:43 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04840b-c1f2-0a2a45010019-d155802fc065-3 for ; Wed, 13 May 2026 16:00:43 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso61476385e9.2 for ; Wed, 13 May 2026 07:00:43 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 07:00:42 -0700 (PDT) Message-ID: <0af810a1-3392-472a-93c9-c98fcb81c43a@suse.com> Date: Wed, 13 May 2026 16:00:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/2] kexec: kexec_crash_save_info() vs Misra C:2012 rule 8.3 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper References: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> Content-Type: text/plain; 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("All declarations of an object or function shall use the same names and type qualifiers"). The declaration doesn't use the typedef, so the definition shouldn't either. Signed-off-by: Jan Beulich --- Really, is the typedef of much use? I.e. can't we drop it altogether? --- a/xen/common/kexec.c +++ b/xen/common/kexec.c @@ -333,7 +333,7 @@ void kexec_crash_save_cpu(void) } /* Set up the single Xen-specific-info crash note. */ -crash_xen_info_t *kexec_crash_save_info(void) +struct crash_xen_info *kexec_crash_save_info(void) { int cpu = smp_processor_id(); crash_xen_info_t info; From xen-devel-bounces@lists.xenproject.org Wed May 13 14:01:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:01:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308042.1579590 (Exim 4.92) (envelope-from ) id 1wNA9A-0007ga-OS; Wed, 13 May 2026 14:01:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308042.1579590; Wed, 13 May 2026 14:01:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNA9A-0007gA-Jl; Wed, 13 May 2026 14:01:12 +0000 Received: by outflank-mailman (input) for mailman id 1308042; Wed, 13 May 2026 14:01:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNA99-0007dz-GR for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:01:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNA98-00EQdJ-Rc for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:01:10 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a048416-2eae-0a2a0a5409dd-0a2a4503a792-40 for ; Wed, 13 May 2026 16:01:10 +0200 Received: from [209.85.221.54] (helo=mail-wr1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a048426-672d-0a2a45030019-d155dd36cc9b-3 for ; Wed, 13 May 2026 16:01:10 +0200 Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-44ce78ab5feso5843028f8f.0 for ; Wed, 13 May 2026 07:01:10 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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("All declarations of an object or function shall use the same names and type qualifiers"). Bring declarations in line with the corresponding definitions, accepting the use of the being-phased-out u types. While we don't define NEED_RIJNDAEL_DECRYPT, cover rijndaelKeySetupDec() as well for completeness. Signed-off-by: Jan Beulich --- a/xen/include/crypto/rijndael.h +++ b/xen/include/crypto/rijndael.h @@ -50,9 +50,8 @@ int rijndael_set_key_enc_only(rijndael_c void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); -int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char cipherKey[], int keyBits); -int rijndaelKeySetupDec(unsigned int rk[], const unsigned char cipkerKey[], int keyBits); -void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned char pt[16], - unsigned char ct[16]); +int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); +int rijndaelKeySetupDec(u32 rk[], const u8 cipkerKey[], int keyBits); +void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 ct[16]); #endif /* __RIJNDAEL_H */ From xen-devel-bounces@lists.xenproject.org Wed May 13 14:03:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:03:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308062.1579599 (Exim 4.92) (envelope-from ) id 1wNABB-0008Ti-2X; Wed, 13 May 2026 14:03:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308062.1579599; Wed, 13 May 2026 14:03:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNABA-0008Tb-V3; Wed, 13 May 2026 14:03:16 +0000 Received: by outflank-mailman (input) for mailman id 1308062; Wed, 13 May 2026 14:03:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNAB9-0008TM-Fy for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:03:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNAB7-00ER8U-JN for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:03:13 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a048492-bab6-0a2a0a5309dd-0a2a4503c550-42 for ; Wed, 13 May 2026 16:03:13 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0484a1-672d-0a2a45030019-d155dd33e4d8-3 for ; Wed, 13 May 2026 16:03:13 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-44c4cc7c1cfso5649862f8f.0 for ; Wed, 13 May 2026 07:03:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 07:03:12 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 16:03:12 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86: address Misra C:2012 rule 8.4 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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("A compatible declaration shall be visible when an object or function with external linkage is defined"). Three variables lack asmlinkage annotations. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 (covering more than just this) --- a/xen/arch/x86/guest/xen/pvh-boot.c +++ b/xen/arch/x86/guest/xen/pvh-boot.c @@ -22,7 +22,7 @@ /* Initialised in head.S, before .bss is zeroed. */ bool __initdata pvh_boot; -uint32_t __initdata pvh_start_info_pa; +uint32_t asmlinkage __initdata pvh_start_info_pa; static multiboot_info_t __initdata pvh_mbi; static module_t __initdata pvh_mbi_mods[8]; --- a/xen/arch/x86/guest/xen/xen.c +++ b/xen/arch/x86/guest/xen/xen.c @@ -40,7 +40,7 @@ DEFINE_PER_CPU(struct vcpu_info *, vcpu_ * 0 vmcall * > 0 vmmcall */ -int8_t __initdata early_hypercall_insn = -1; +int8_t asmlinkage __initdata early_hypercall_insn = -1; /* * Called once during the first hypercall to figure out which instruction to --- a/xen/arch/x86/pv/hypercall.c +++ b/xen/arch/x86/pv/hypercall.c @@ -180,7 +180,7 @@ void pv_ring1_init_hypercall_page(void * } } -void do_entry_int82(struct cpu_user_regs *regs) +void asmlinkage do_entry_int82(struct cpu_user_regs *regs) { if ( unlikely(untrusted_msi) ) check_for_unexpected_msi((uint8_t)regs->entry_vector); From xen-devel-bounces@lists.xenproject.org Wed May 13 14:03:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:03:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308070.1579608 (Exim 4.92) (envelope-from ) id 1wNABf-0000TQ-AF; Wed, 13 May 2026 14:03:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308070.1579608; Wed, 13 May 2026 14:03:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNABf-0000TJ-79; Wed, 13 May 2026 14:03:47 +0000 Received: by outflank-mailman (input) for mailman id 1308070; Wed, 13 May 2026 14:03:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNABd-0000T7-OT for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:03:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNABd-00ERMx-4V for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:03:45 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0484bd-bab6-0a2a0a5309dd-0a2a4503af22-12 for ; Wed, 13 May 2026 16:03:45 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0484c0-672d-0a2a45030019-d1558031c5e1-3 for ; Wed, 13 May 2026 16:03:45 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so38921535e9.1 for ; Wed, 13 May 2026 07:03:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 07:03:44 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 16:03:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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("Conversions shall not be performed between a pointer to an incomplete type and any other type"): Add an intermediate cat to void *. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 (covering more than just this) --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ #if BITS_PER_LONG == 64 -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) #define COOKIE2ID(c) ((uint64_t)(c)) #elif defined(BITS_PER_LONG) From xen-devel-bounces@lists.xenproject.org Wed May 13 14:06:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:06:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308078.1579621 (Exim 4.92) (envelope-from ) id 1wNADo-00015S-NW; Wed, 13 May 2026 14:06:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308078.1579621; Wed, 13 May 2026 14:06:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNADo-00015L-KM; Wed, 13 May 2026 14:06:00 +0000 Received: by outflank-mailman (input) for mailman id 1308078; Wed, 13 May 2026 14:05:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNADn-00015F-8l for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:05:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNADl-00CJAv-3v for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:05:58 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a048541-5cb7-0a2a0a5109dd-0a2a450aad26-12 for ; Wed, 13 May 2026 16:05:58 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a048546-56b3-0a2a450a0019-d155dd32ac9b-3 for ; Wed, 13 May 2026 16:05:58 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-44e1860558fso4404839f8f.0 for ; Wed, 13 May 2026 07:05:58 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 07:05:56 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 16:05:55 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/2] x86/mm: address Misra C:2012 rule 16.2 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; 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("A switch label shall only be used when the most closely-enclosing compound statement is the body of a `switch' statement"). Use a form of fall-through instead. No difference in generated code, except for some line number changes. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -2663,15 +2663,17 @@ static int validate_page(struct page_inf get_gpfn_from_mfn(mfn_x(page_to_mfn(page))), type, page->count_info, page->u.inuse.type_info); if ( page != current->arch.old_guest_table ) - page->u.inuse.type_info = 0; - else { - ASSERT((page->u.inuse.type_info & - (PGT_count_mask | PGT_validated)) == 1); - case -ERESTART: - get_page_light(page); - page->u.inuse.type_info |= PGT_partial; + page->u.inuse.type_info = 0; + break; } + + ASSERT((page->u.inuse.type_info & + (PGT_count_mask | PGT_validated)) == 1); + fallthrough; + case -ERESTART: + get_page_light(page); + page->u.inuse.type_info |= PGT_partial; break; } From xen-devel-bounces@lists.xenproject.org Wed May 13 14:06:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 14:06:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308083.1579629 (Exim 4.92) (envelope-from ) id 1wNAEC-0001Tp-12; Wed, 13 May 2026 14:06:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308083.1579629; Wed, 13 May 2026 14:06:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNAEB-0001Ti-Uf; Wed, 13 May 2026 14:06:23 +0000 Received: by outflank-mailman (input) for mailman id 1308083; Wed, 13 May 2026 14:06:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNAEA-0001TM-IT for xen-devel@lists.xenproject.org; Wed, 13 May 2026 14:06:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNAE8-00CJHY-DX for xen-devel@lists.xenproject.org; Wed, 13 May 2026 16:06:21 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04855b-5cb7-0a2a0a5109dd-0a2a45029b4a-14 for ; Wed, 13 May 2026 16:06:21 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04855d-af86-0a2a45020019-d1558034e582-3 for ; Wed, 13 May 2026 16:06:21 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-48e8132c6d0so30464545e9.1 for ; Wed, 13 May 2026 07:06:21 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 07:06:21 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 16:06:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/2] x86/PV: address Misra C:2012 rule 16.2 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; 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("A switch label shall only be used when the most closely-enclosing compound statement is the body of a `switch' statement"). While I don't really like doing so, use a few "goto" instead. No change in generated code (somewhat to my surprise). Signed-off-by: Jan Beulich --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -897,7 +897,7 @@ static int cf_check read_msr( struct vcpu *curr = current; const struct domain *currd = curr->domain; const struct cpu_policy *cp = currd->arch.cpu_policy; - bool vpmu_msr = false, warn = false; + bool warn = false; uint64_t tmp; int ret; @@ -996,21 +996,21 @@ static int cf_check read_msr( case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) - { - vpmu_msr = true; - /* fall through */ + goto vpmu; + goto check_relaxed; + case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: - if ( vpmu_msr || (boot_cpu_data.vendor & - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) - { - if ( vpmu_do_rdmsr(reg, val) ) - break; - return X86EMUL_OKAY; - } + if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) + { + vpmu: + if ( vpmu_do_rdmsr(reg, val) ) + break; + return X86EMUL_OKAY; } /* fall through */ default: + check_relaxed: if ( currd->arch.msr_relaxed && !rdmsr_safe(reg, &tmp) ) { *val = 0; @@ -1049,7 +1049,6 @@ static int cf_check write_msr( const struct domain *currd = curr->domain; const struct cpu_policy *cp = currd->arch.cpu_policy; uint64_t temp = 0; - bool vpmu_msr = false; int ret; if ( (ret = guest_wrmsr(curr, reg, val)) != X86EMUL_UNHANDLEABLE ) @@ -1179,24 +1178,25 @@ static int cf_check write_msr( case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) - { - vpmu_msr = true; + goto vpmu; + goto check_relaxed; + case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... 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tlsNG-16d1c6/1778682273-8DF81D75-AF43F9E9/0/0 X-purgate-type: clean X-purgate-size: 6530 On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: > Both ROMBIOS and SeaBIOS (with CONFIG_QEMU=y, as we build it) blindly > assume availability of this field (at its conventional index 0x32); OVMF > at least has code to inspect FADT. Hence we ought to have supported it > virtually forever. > > As the index is beyond RTC_CMOS_SIZE, leverage the padding field in > struct hvm_hw_rtc to hold its value. Update the field only when involved > values are valid BCD century specifiers. Otherwise (for VMs migrated in > from an older hypervisor) leave handling to the DM. > > This makes the Linux rtc-cmos driver report y3k compatibility. > > While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. > > Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") > Signed-off-by: Jan Beulich > --- > Am I overly paranoid with the checking of the field, considering that > Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests > have ever run with should have been aware of the field? Or am I, quite the > opposite, still not strict enough? > > I can't help the impression that this introduces a latency issue for > the 2nd of gmtime()'s while() loops: We now allow years up into the 99th > century, i.e. over 8000 years away from 1970. 8000 years are very roughly > 2^^38 seconds, making for (again very roughly) 5 million iterations there. > Did I get my math wrong, or do we need a prereq change to (vastly) reduce > the number of iterations of that loop (e.g. along the lines of the other > one, first going in 400 year steps)? Hm, maybe we need to add some XTF testing for the RTC? I'm slightly worried how much time this could take, and since those calls are serialized on the s->lock I wonder whether enough parallel accesses from the guest could manage to trigger the watchdog? > > Isn't day-of-week handling flawed? If the field is brought out of sync > with the other values, shouldn't it stay respectively out-of-sync? And > isn't it excessive overhead to go through rtc_set_time() when the field > is updated while SET is clear? > > Perhaps we ought to also support alarm day/month features? > > --- a/tools/libacpi/static_tables.c > +++ b/tools/libacpi/static_tables.c > @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { > #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 > #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 > > +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ IMO this define (together with the RTC_CENTURY one below) need to be in a public header so it can be consumed by both the hypervisor and the toolstack. Having two separate defines, one for the hypervisor, and another for the toolstack will just create confusion. > + > struct acpi_fadt Fadt = { > .header = { > .signature = ACPI_FADT_SIGNATURE, > @@ -88,7 +90,9 @@ struct acpi_fadt Fadt = { > .register_bit_width = ACPI_PM_TMR_BLK_BIT_WIDTH, > .register_bit_offset = ACPI_PM_TMR_BLK_BIT_OFFSET, > .address = ACPI_PM_TMR_BLK_ADDRESS_V1, > - } > + }, > + > + .century = CMOS_CENTURY, > }; > > struct acpi_20_rsdt Rsdt = { > --- a/tools/misc/xen-hvmctx.c > +++ b/tools/misc/xen-hvmctx.c > @@ -311,7 +311,7 @@ static void dump_rtc(void) > printf(" 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x 0x%2.2x, index 0x%2.2x\n", > r.cmos_data[8], r.cmos_data[9], r.cmos_data[10], r.cmos_data[11], > r.cmos_data[12], r.cmos_data[13], r.cmos_index); > - > + printf(" century 0x%02x offset %"PRId64"\n", r.century, r.rtc_offset); > } > > static void dump_hpet(void) > --- a/xen/arch/x86/hvm/rtc.c > +++ b/xen/arch/x86/hvm/rtc.c > @@ -47,6 +47,12 @@ > #define epoch_year 1900 > #define get_year(x) ((x) + epoch_year) > > +static inline bool is_century(unsigned int x) > +{ > + /* Constant below should match epoch_year above, just as BCD value. */ > + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; > +} > + > enum rtc_mode { > rtc_mode_no_ack, > rtc_mode_strict > @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque > data &= 0x7f; > s->hw.cmos_index = data; > spin_unlock(&s->lock); > + /* RTC_CENTURY always forwarded to DM. */ > return (data < RTC_CMOS_SIZE); > } > > - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) > + switch ( s->hw.cmos_index ) > { > + case 0 ... RTC_CMOS_SIZE - 1: > + orig = s->hw.cmos_data[s->hw.cmos_index]; > + break; > + > + case RTC_CENTURY: > + orig = s->hw.century; > + if ( !is_century(orig) || !is_century(data) ) Is a real RTC strict in such a way, ie: will it refuse to set the century value to < 19 (0x19)? For example QEMU seems to be way more relaxed, and allow any century value. > + { > + /* Prevent further use of the field. */ > + s->hw.century = 0; > + spin_unlock(&s->lock); > + return 0; > + } > + break; > + > + default: > spin_unlock(&s->lock); > return 0; > } > > - orig = s->hw.cmos_data[s->hw.cmos_index]; > switch ( s->hw.cmos_index ) > { > case RTC_SECONDS_ALARM: > @@ -507,6 +529,7 @@ static int rtc_ioport_write(void *opaque > case RTC_DAY_OF_MONTH: > case RTC_MONTH: > case RTC_YEAR: > + case RTC_CENTURY: > /* if in set mode, just write the register */ > if ( (s->hw.cmos_data[RTC_REG_B] & RTC_SET) ) > s->hw.cmos_data[s->hw.cmos_index] = data; > @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque > /* Fetch the current time and update just this field. */ > s->current_tm = gmtime(get_localtime(d)); > rtc_copy_date(s); > - s->hw.cmos_data[s->hw.cmos_index] = data; > + if ( s->hw.cmos_index != RTC_CENTURY ) > + s->hw.cmos_data[s->hw.cmos_index] = data; > + else > + s->hw.century = data; > rtc_set_time(s); > } > alarm_timer_update(s); Don't you need to adjust the tail return of rtc_ioport_write() (below the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so the set value is also propagated to the DM, and not only the index? Thanks, Roger. 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No functional change intended, even if > the | changes to + in to_bcd(). > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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> >> rtc->mon = CMOS_READ(RTC_MONTH); > >> rtc->year = CMOS_READ(RTC_YEAR); > >> + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) > >> + century = CMOS_READ(acpi_gbl_FADT.century); > >> > >> if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) > >> { > >> @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t > >> > >> spin_unlock_irqrestore(&rtc_lock, flags); > >> > >> - if ( (rtc->year += 1900) < 1970 ) > >> + if ( century ) > >> + { > >> + BCD_TO_BIN(century); > > > > Don't you need to move the BCD_TO_BIN() translation with the rest, so > > it's not done unconditionally? > > No, the century field is always BCD. Hm, then I guess Linux needs adjusting, as mc146818_set_time() only converts the century to the BCD format conditionally on the control register or RTC_ALWAYS_BCD. I've found several sources only that as you mention also claim the century value is unconditionally in BCD format. Acked-by: Roger Pau Monné Thanks, Roger. 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=?utf-8?B?WGM4SHhvQkJ2aldOZ1dkZWRYRklKSEc0WG5idUVaR0xXZE51ZG8rNWxac0pt?= =?utf-8?B?MCtuQTYyMW82VDJ2eWZCREdCS3JZZGpNYm5UUlY4ZVVTT2JPU1BBSW5rM0k4?= =?utf-8?B?T1d4dHlOWjFwcnFJQmtZK3Fxb2w5VVhOOG5KamRGTmNZRmp0NTJidVJnVEpo?= =?utf-8?B?QWpTbXVUWXJVQzhNT3Nad0twdGhaVXhIOWFPbTR3ZmJxVU0wV01KaVdyTVZB?= =?utf-8?B?aW1RSG9jN1NRMkNuamlYTVFLQ3FCUk1peERkK0dqUjBFdHFMaThHdz09?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 90f33fe1-8364-4261-e13f-08deb1001d51 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 14:58:38.5756 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UM2iOaeczb6/aThIa0ctjnzBZNJqrdLUMq8iNQfhq0sjC3Frbj6dOhKZNNDkGYTXcqqp6WbObOlYF3GgJpCw4g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH8PR03MB8273 X-purgate-ID: tlsNG-bad1c0/1778684321-41165A53-C188BBF5/0/0 X-purgate-type: clean X-purgate-size: 1937 On Wed, May 13, 2026 at 12:39:46PM +0200, Jan Beulich wrote: > On 13.05.2026 10:56, Roger Pau Monné wrote: > > On Tue, May 12, 2026 at 04:59:03PM +0200, Jan Beulich wrote: > >> ... outside of __get_cmos_time()'s locked region. There's no need to hold > >> the lock for these computations. > >> > >> Signed-off-by: Jan Beulich > > > > Acked-by: Roger Pau Monné > > Thanks. > > > I had the same thought about moving the conversion out of the locked > > region when reviewing the previous patch. > > > > As noted in the previous patch, we should move the conversion of the > > century field with the rest? > > As said there, no, I don't think so. > > >> --- > >> How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an > >> inverted comment? Looks like we've inherited this from Linux, and even in > >> Linus'es current tree it's still this same way. Yet all half-way recent > >> chipsets I'm aware of properly implement the DM bit in reg B. Might this > >> be another 32-bit leftover? > > > > *shrugs* I don't know. Seems like Linux is still doing it, so it's > > likely safer for us to continue doing it also? We had no reports of > > it being problematic, albeit one could argue it would be best to > > prevent such reports by doing the right thing. > > That's my point. If we did this as specified, we'd unbreak systems with the > DM bit set correctly, but we'd break (hypothetical) systems with it bogusly > set. Like with a few other fixes, perhaps we should correct it, but provide > a command line option to restore old behavior? Possibly, but I would do after 4.22 has branched, just in case. One thing I've noticed, is that Xen don't attempts to set RTC_DM_BINARY in REG_B, shouldn't it try to set the bit when probing for the CMOS? Since it assumes BCD mode it should at least try to set it? Thanks, Roger. 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Wed, 13 May 2026 07:58:59 -0700 (PDT) Message-ID: <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> Date: Wed, 13 May 2026 16:58:57 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 3/5] x86/vRTC: support century field To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778684339-D9B70443-41B5CD2F/0/0 X-purgate-type: clean X-purgate-size: 5424 On 13.05.2026 16:24, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: >> Both ROMBIOS and SeaBIOS (with CONFIG_QEMU=y, as we build it) blindly >> assume availability of this field (at its conventional index 0x32); OVMF >> at least has code to inspect FADT. Hence we ought to have supported it >> virtually forever. >> >> As the index is beyond RTC_CMOS_SIZE, leverage the padding field in >> struct hvm_hw_rtc to hold its value. Update the field only when involved >> values are valid BCD century specifiers. Otherwise (for VMs migrated in >> from an older hypervisor) leave handling to the DM. >> >> This makes the Linux rtc-cmos driver report y3k compatibility. >> >> While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. >> >> Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") >> Signed-off-by: Jan Beulich >> --- >> Am I overly paranoid with the checking of the field, considering that >> Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests >> have ever run with should have been aware of the field? Or am I, quite the >> opposite, still not strict enough? >> >> I can't help the impression that this introduces a latency issue for >> the 2nd of gmtime()'s while() loops: We now allow years up into the 99th >> century, i.e. over 8000 years away from 1970. 8000 years are very roughly >> 2^^38 seconds, making for (again very roughly) 5 million iterations there. >> Did I get my math wrong, or do we need a prereq change to (vastly) reduce >> the number of iterations of that loop (e.g. along the lines of the other >> one, first going in 400 year steps)? > > Hm, maybe we need to add some XTF testing for the RTC? I'm slightly > worried how much time this could take, and since those calls are > serialized on the s->lock I wonder whether enough parallel accesses > from the guest could manage to trigger the watchdog? I'm not really up to making an XTF test, I guess. However, as you look to share my concern, I'll add a prereq patch adjusting gmtime(). >> --- a/tools/libacpi/static_tables.c >> +++ b/tools/libacpi/static_tables.c >> @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { >> #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 >> #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 >> >> +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ > > IMO this define (together with the RTC_CENTURY one below) need to be > in a public header so it can be consumed by both the hypervisor and > the toolstack. Having two separate defines, one for the hypervisor, > and another for the toolstack will just create confusion. I first thought I'd do it like this, but (a) this isn't a value Xen defines (hence the comments in both places) and (b) I'm not entirely happy with such a(n) (ab)use of the public headers (yes, we have other such examples there, which I also don't really like). >> --- a/xen/arch/x86/hvm/rtc.c >> +++ b/xen/arch/x86/hvm/rtc.c >> @@ -47,6 +47,12 @@ >> #define epoch_year 1900 >> #define get_year(x) ((x) + epoch_year) >> >> +static inline bool is_century(unsigned int x) >> +{ >> + /* Constant below should match epoch_year above, just as BCD value. */ >> + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; >> +} >> + >> enum rtc_mode { >> rtc_mode_no_ack, >> rtc_mode_strict >> @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque >> data &= 0x7f; >> s->hw.cmos_index = data; >> spin_unlock(&s->lock); >> + /* RTC_CENTURY always forwarded to DM. */ >> return (data < RTC_CMOS_SIZE); >> } >> >> - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) >> + switch ( s->hw.cmos_index ) >> { >> + case 0 ... RTC_CMOS_SIZE - 1: >> + orig = s->hw.cmos_data[s->hw.cmos_index]; >> + break; >> + >> + case RTC_CENTURY: >> + orig = s->hw.century; >> + if ( !is_century(orig) || !is_century(data) ) > > Is a real RTC strict in such a way, ie: will it refuse to set the > century value to < 19 (0x19)? For example QEMU seems to be way more > relaxed, and allow any century value. I can switch to rejecting merely 0. Unlike centuries in the future, it didn't look very useful to me to permit anything below 19. Please clarify which way you prefer it. >> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque >> /* Fetch the current time and update just this field. */ >> s->current_tm = gmtime(get_localtime(d)); >> rtc_copy_date(s); >> - s->hw.cmos_data[s->hw.cmos_index] = data; >> + if ( s->hw.cmos_index != RTC_CENTURY ) >> + s->hw.cmos_data[s->hw.cmos_index] = data; >> + else >> + s->hw.century = data; >> rtc_set_time(s); >> } >> alarm_timer_update(s); > > Don't you need to adjust the tail return of rtc_ioport_write() (below > the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so > the set value is also propagated to the DM, and not only the index? I don't think so. The case of us not handling RTC_CENTURY is dealt with earlier in the function. Whereas when we handle the field, we don't want to forward (like for all the other RTC fields). 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The proper register name is xmm3 for that particular > example. > > Also strip trailing whitespace from lines touched. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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Wed, 13 May 2026 08:08:31 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 17:08:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 1/5] x86/time: use RTC century byte when available To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> <35e23e0f-5439-4516-906c-4310cd05a4a9@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778684911-A9772161-CEC50CFB/0/0 X-purgate-type: clean X-purgate-size: 1692 On 13.05.2026 16:51, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 12:36:26PM +0200, Jan Beulich wrote: >> On 13.05.2026 10:49, Roger Pau Monné wrote: >>> On Tue, May 12, 2026 at 04:58:43PM +0200, Jan Beulich wrote: >>>> @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t >>>> rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); >>>> rtc->mon = CMOS_READ(RTC_MONTH); >>>> rtc->year = CMOS_READ(RTC_YEAR); >>>> + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) >>>> + century = CMOS_READ(acpi_gbl_FADT.century); >>>> >>>> if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) >>>> { >>>> @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t >>>> >>>> spin_unlock_irqrestore(&rtc_lock, flags); >>>> >>>> - if ( (rtc->year += 1900) < 1970 ) >>>> + if ( century ) >>>> + { >>>> + BCD_TO_BIN(century); >>> >>> Don't you need to move the BCD_TO_BIN() translation with the rest, so >>> it's not done unconditionally? >> >> No, the century field is always BCD. > > Hm, then I guess Linux needs adjusting, as mc146818_set_time() only > converts the century to the BCD format conditionally on the control > register or RTC_ALWAYS_BCD. Hmm, indeed. Btw, while looking there I also noticed this #ifdef CONFIG_ACPI if (p.century > 19) time->tm_year += (p.century - 19) * 100; #endif (relevant to a remark you gave on a later patch in this series). > I've found several sources only that as you mention also claim the > century value is unconditionally in BCD format. > > Acked-by: Roger Pau Monné Thanks. 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OVMF > >> at least has code to inspect FADT. Hence we ought to have supported it > >> virtually forever. > >> > >> As the index is beyond RTC_CMOS_SIZE, leverage the padding field in > >> struct hvm_hw_rtc to hold its value. Update the field only when involved > >> values are valid BCD century specifiers. Otherwise (for VMs migrated in > >> from an older hypervisor) leave handling to the DM. > >> > >> This makes the Linux rtc-cmos driver report y3k compatibility. > >> > >> While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. > >> > >> Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") > >> Signed-off-by: Jan Beulich > >> --- > >> Am I overly paranoid with the checking of the field, considering that > >> Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests > >> have ever run with should have been aware of the field? Or am I, quite the > >> opposite, still not strict enough? > >> > >> I can't help the impression that this introduces a latency issue for > >> the 2nd of gmtime()'s while() loops: We now allow years up into the 99th > >> century, i.e. over 8000 years away from 1970. 8000 years are very roughly > >> 2^^38 seconds, making for (again very roughly) 5 million iterations there. > >> Did I get my math wrong, or do we need a prereq change to (vastly) reduce > >> the number of iterations of that loop (e.g. along the lines of the other > >> one, first going in 400 year steps)? > > > > Hm, maybe we need to add some XTF testing for the RTC? I'm slightly > > worried how much time this could take, and since those calls are > > serialized on the s->lock I wonder whether enough parallel accesses > > from the guest could manage to trigger the watchdog? > > I'm not really up to making an XTF test, I guess. However, as you look to > share my concern, I'll add a prereq patch adjusting gmtime(). > > >> --- a/tools/libacpi/static_tables.c > >> +++ b/tools/libacpi/static_tables.c > >> @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { > >> #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 > >> #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 > >> > >> +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ > > > > IMO this define (together with the RTC_CENTURY one below) need to be > > in a public header so it can be consumed by both the hypervisor and > > the toolstack. Having two separate defines, one for the hypervisor, > > and another for the toolstack will just create confusion. > > I first thought I'd do it like this, but (a) this isn't a value Xen > defines (hence the comments in both places) and (b) I'm not entirely > happy with such a(n) (ab)use of the public headers (yes, we have other > such examples there, which I also don't really like). Yeah, it's not great, but it's better than having the same value defined in two different files, and having to keep them in-sync for the CMOS century field to work correctly? > >> --- a/xen/arch/x86/hvm/rtc.c > >> +++ b/xen/arch/x86/hvm/rtc.c > >> @@ -47,6 +47,12 @@ > >> #define epoch_year 1900 > >> #define get_year(x) ((x) + epoch_year) > >> > >> +static inline bool is_century(unsigned int x) > >> +{ > >> + /* Constant below should match epoch_year above, just as BCD value. */ > >> + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; > >> +} > >> + > >> enum rtc_mode { > >> rtc_mode_no_ack, > >> rtc_mode_strict > >> @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque > >> data &= 0x7f; > >> s->hw.cmos_index = data; > >> spin_unlock(&s->lock); > >> + /* RTC_CENTURY always forwarded to DM. */ > >> return (data < RTC_CMOS_SIZE); > >> } > >> > >> - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) > >> + switch ( s->hw.cmos_index ) > >> { > >> + case 0 ... RTC_CMOS_SIZE - 1: > >> + orig = s->hw.cmos_data[s->hw.cmos_index]; > >> + break; > >> + > >> + case RTC_CENTURY: > >> + orig = s->hw.century; > >> + if ( !is_century(orig) || !is_century(data) ) > > > > Is a real RTC strict in such a way, ie: will it refuse to set the > > century value to < 19 (0x19)? For example QEMU seems to be way more > > relaxed, and allow any century value. > > I can switch to rejecting merely 0. Unlike centuries in the future, it > didn't look very useful to me to permit anything below 19. Please clarify > which way you prefer it. QEMU seems to tolerate everything, so I lean towards tolerating everything that's not 0. That's solely based on what QEMU does, which I think it's likely to be (quite) widely tested. > >> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque > >> /* Fetch the current time and update just this field. */ > >> s->current_tm = gmtime(get_localtime(d)); > >> rtc_copy_date(s); > >> - s->hw.cmos_data[s->hw.cmos_index] = data; > >> + if ( s->hw.cmos_index != RTC_CENTURY ) > >> + s->hw.cmos_data[s->hw.cmos_index] = data; > >> + else > >> + s->hw.century = data; > >> rtc_set_time(s); > >> } > >> alarm_timer_update(s); > > > > Don't you need to adjust the tail return of rtc_ioport_write() (below > > the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so > > the set value is also propagated to the DM, and not only the index? > > I don't think so. The case of us not handling RTC_CENTURY is dealt with > earlier in the function. Whereas when we handle the field, we don't want > to forward (like for all the other RTC fields). Right, so then you also want to adjust the top part of rtc_ioport_write() to not propagate the write to the 0x70 IO port when data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, but not the read/write to port 0x71? Thanks, Roger. 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Wed, 13 May 2026 08:15:42 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 17:15:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] x86/time: move BCD_TO_BIN() uses To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <2c5af8f9-05f6-43c4-afb4-a50cbacd2d49@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1778685342-0AD77C48-D5D8C923/0/0 X-purgate-type: clean X-purgate-size: 1745 On 13.05.2026 16:58, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 12:39:46PM +0200, Jan Beulich wrote: >> On 13.05.2026 10:56, Roger Pau Monné wrote: >>> On Tue, May 12, 2026 at 04:59:03PM +0200, Jan Beulich wrote: >>>> --- >>>> How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an >>>> inverted comment? Looks like we've inherited this from Linux, and even in >>>> Linus'es current tree it's still this same way. Yet all half-way recent >>>> chipsets I'm aware of properly implement the DM bit in reg B. Might this >>>> be another 32-bit leftover? >>> >>> *shrugs* I don't know. Seems like Linux is still doing it, so it's >>> likely safer for us to continue doing it also? We had no reports of >>> it being problematic, albeit one could argue it would be best to >>> prevent such reports by doing the right thing. >> >> That's my point. If we did this as specified, we'd unbreak systems with the >> DM bit set correctly, but we'd break (hypothetical) systems with it bogusly >> set. Like with a few other fixes, perhaps we should correct it, but provide >> a command line option to restore old behavior? > > Possibly, but I would do after 4.22 has branched, just in case. Of course. > One thing I've noticed, is that Xen don't attempts to set > RTC_DM_BINARY in REG_B, shouldn't it try to set the bit when probing > for the CMOS? Since it assumes BCD mode it should at least try to set > it? For one - don't you mean "clear it"? But then - no, that bit is purely informational aiui. Changing it won't alter what the date/time registers hold (only how they're updated). Hence by fiddling with it we'd corrupt information (breaking OSes which properly respect the bit). Jan From xen-devel-bounces@lists.xenproject.org Wed May 13 15:24:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 15:24:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308227.1579760 (Exim 4.92) (envelope-from ) id 1wNBRY-0003h6-KZ; Wed, 13 May 2026 15:24:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308227.1579760; Wed, 13 May 2026 15:24:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNBRY-0003gz-Hg; Wed, 13 May 2026 15:24:16 +0000 Received: by outflank-mailman (input) for mailman id 1308227; Wed, 13 May 2026 15:24:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNBRX-0003gt-Dt for xen-devel@lists.xenproject.org; Wed, 13 May 2026 15:24:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNBRW-00128n-Qo for xen-devel@lists.xenproject.org; Wed, 13 May 2026 17:24:14 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04977c-5cb7-0a2a0a5109dd-0a2a45019d26-48 for ; Wed, 13 May 2026 17:24:14 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04979e-c1f2-0a2a45010019-d155dd34f095-3 for ; Wed, 13 May 2026 17:24:14 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-43d73422431so5227633f8f.2 for ; Wed, 13 May 2026 08:24:14 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 08:24:14 -0700 (PDT) Message-ID: <439d03f4-4ebb-4bbf-a1ea-324156bff9f0@suse.com> Date: Wed, 13 May 2026 17:24:13 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 3/5] x86/vRTC: support century field To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778685854-AFB56FF4-0D32E4E9/0/0 X-purgate-type: clean X-purgate-size: 4939 On 13.05.2026 17:14, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 04:58:57PM +0200, Jan Beulich wrote: >> On 13.05.2026 16:24, Roger Pau Monné wrote: >>> On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: >>>> --- a/tools/libacpi/static_tables.c >>>> +++ b/tools/libacpi/static_tables.c >>>> @@ -33,6 +33,8 @@ struct acpi_20_facs Facs = { >>>> #define ACPI_PM_TMR_BLK_BIT_WIDTH 0x20 >>>> #define ACPI_PM_TMR_BLK_BIT_OFFSET 0x00 >>>> >>>> +#define CMOS_CENTURY 0x32 /* Conventional index used also without ACPI */ >>> >>> IMO this define (together with the RTC_CENTURY one below) need to be >>> in a public header so it can be consumed by both the hypervisor and >>> the toolstack. Having two separate defines, one for the hypervisor, >>> and another for the toolstack will just create confusion. >> >> I first thought I'd do it like this, but (a) this isn't a value Xen >> defines (hence the comments in both places) and (b) I'm not entirely >> happy with such a(n) (ab)use of the public headers (yes, we have other >> such examples there, which I also don't really like). > > Yeah, it's not great, but it's better than having the same value > defined in two different files, and having to keep them in-sync for > the CMOS century field to work correctly? As the values come from the outside, they necessarily need to stay the way they are (and hence implicitly in sync). If we meant to announce another value to guests in the FADT we produce (breaking non-ACPI guests), we then couldn't use RTC_CENTURY in hvm/rtc.c anyway. Instead we'd have to track and migrate the index to use. >>>> --- a/xen/arch/x86/hvm/rtc.c >>>> +++ b/xen/arch/x86/hvm/rtc.c >>>> @@ -47,6 +47,12 @@ >>>> #define epoch_year 1900 >>>> #define get_year(x) ((x) + epoch_year) >>>> >>>> +static inline bool is_century(unsigned int x) >>>> +{ >>>> + /* Constant below should match epoch_year above, just as BCD value. */ >>>> + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; >>>> +} >>>> + >>>> enum rtc_mode { >>>> rtc_mode_no_ack, >>>> rtc_mode_strict >>>> @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque >>>> data &= 0x7f; >>>> s->hw.cmos_index = data; >>>> spin_unlock(&s->lock); >>>> + /* RTC_CENTURY always forwarded to DM. */ >>>> return (data < RTC_CMOS_SIZE); >>>> } >>>> >>>> - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) >>>> + switch ( s->hw.cmos_index ) >>>> { >>>> + case 0 ... RTC_CMOS_SIZE - 1: >>>> + orig = s->hw.cmos_data[s->hw.cmos_index]; >>>> + break; >>>> + >>>> + case RTC_CENTURY: >>>> + orig = s->hw.century; >>>> + if ( !is_century(orig) || !is_century(data) ) >>> >>> Is a real RTC strict in such a way, ie: will it refuse to set the >>> century value to < 19 (0x19)? For example QEMU seems to be way more >>> relaxed, and allow any century value. >> >> I can switch to rejecting merely 0. Unlike centuries in the future, it >> didn't look very useful to me to permit anything below 19. Please clarify >> which way you prefer it. > > QEMU seems to tolerate everything, so I lean towards tolerating > everything that's not 0. That's solely based on what QEMU does, which > I think it's likely to be (quite) widely tested. Will do. >>>> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque >>>> /* Fetch the current time and update just this field. */ >>>> s->current_tm = gmtime(get_localtime(d)); >>>> rtc_copy_date(s); >>>> - s->hw.cmos_data[s->hw.cmos_index] = data; >>>> + if ( s->hw.cmos_index != RTC_CENTURY ) >>>> + s->hw.cmos_data[s->hw.cmos_index] = data; >>>> + else >>>> + s->hw.century = data; >>>> rtc_set_time(s); >>>> } >>>> alarm_timer_update(s); >>> >>> Don't you need to adjust the tail return of rtc_ioport_write() (below >>> the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so >>> the set value is also propagated to the DM, and not only the index? >> >> I don't think so. The case of us not handling RTC_CENTURY is dealt with >> earlier in the function. Whereas when we handle the field, we don't want >> to forward (like for all the other RTC fields). > > Right, so then you also want to adjust the top part of > rtc_ioport_write() to not propagate the write to the 0x70 IO port when > data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, > but not the read/write to port 0x71? I can't, as whether to forward depends on the data subsequently written. Propagating the index "just in case" is the only workable model that I can think of. And as guests can do any number of successive port 70 writes, the DM needs to cope with this anyway. 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Wed, 13 May 2026 08:43:00 -0700 (PDT) Message-ID: <6ef656b3-0428-4867-aea2-901d852d12e7@suse.com> Date: Wed, 13 May 2026 17:42:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 3/5] x86/vRTC: support century field From: Jan Beulich To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1778686980-13B78F3B-7C50F452/0/0 X-purgate-type: clean X-purgate-size: 2495 On 13.05.2026 16:58, Jan Beulich wrote: > On 13.05.2026 16:24, Roger Pau Monné wrote: >> On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: >>> Both ROMBIOS and SeaBIOS (with CONFIG_QEMU=y, as we build it) blindly >>> assume availability of this field (at its conventional index 0x32); OVMF >>> at least has code to inspect FADT. Hence we ought to have supported it >>> virtually forever. >>> >>> As the index is beyond RTC_CMOS_SIZE, leverage the padding field in >>> struct hvm_hw_rtc to hold its value. Update the field only when involved >>> values are valid BCD century specifiers. Otherwise (for VMs migrated in >>> from an older hypervisor) leave handling to the DM. >>> >>> This makes the Linux rtc-cmos driver report y3k compatibility. >>> >>> While extending xen-hvmctx.c:dump_rtc() also add RTC offset there. >>> >>> Fixes: 4ca161214355 ("[HVM] Move RTC emulation into the hypervisor") >>> Signed-off-by: Jan Beulich >>> --- >>> Am I overly paranoid with the checking of the field, considering that >>> Xen 3.x post-dates year 2000 and hence all firmware nowadays usable guests >>> have ever run with should have been aware of the field? Or am I, quite the >>> opposite, still not strict enough? >>> >>> I can't help the impression that this introduces a latency issue for >>> the 2nd of gmtime()'s while() loops: We now allow years up into the 99th >>> century, i.e. over 8000 years away from 1970. 8000 years are very roughly >>> 2^^38 seconds, making for (again very roughly) 5 million iterations there. >>> Did I get my math wrong, or do we need a prereq change to (vastly) reduce >>> the number of iterations of that loop (e.g. along the lines of the other >>> one, first going in 400 year steps)? >> >> Hm, maybe we need to add some XTF testing for the RTC? I'm slightly >> worried how much time this could take, and since those calls are >> serialized on the s->lock I wonder whether enough parallel accesses >> from the guest could manage to trigger the watchdog? > > I'm not really up to making an XTF test, I guess. However, as you look to > share my concern, I'll add a prereq patch adjusting gmtime(). While making such a patch, I noticed my flaw in the description above: That loop walks in granularity of years, so can't have more than about 10k iterations. Shortening the processing by first going in 400-year steps may still be worthwhile, but doesn't look to be strictly required. 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("The function argument corresponding to a parameter declared to have an array type shall have an appropriate number of elements"). Instead of casts, (ab)use unions. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14354119193 (also covering the 20.12 patch) There are also two cautions (in vmac()), which aren't dealt with for now. --- a/xen/crypto/vmac.c +++ b/xen/crypto/vmac.c @@ -926,41 +926,41 @@ uint64_t vmac(unsigned char m[], void vmac_set_key(const unsigned char user_key[], vmac_ctx_t *ctx) { - uint64_t in[2] = {0}, out[2]; + union { + uint64_t q[2]; + uint8_t b[16]; + } in, out; unsigned i; aes_key_setup(user_key, &ctx->cipher_key); /* Fill nh key */ - ((unsigned char *)in)[0] = 0x80; + in = (typeof(in)){ .b[0] = 0x80 }; for (i = 0; i < sizeof(ctx->nhkey)/8; i+=2) { - aes_encryption((unsigned char *)in, (unsigned char *)out, - &ctx->cipher_key); - ctx->nhkey[i ] = get64BE(out); - ctx->nhkey[i+1] = get64BE(out+1); - ((unsigned char *)in)[15] += 1; + aes_encryption(in.b, out.b, &ctx->cipher_key); + ctx->nhkey[i ] = get64BE(out.q); + ctx->nhkey[i+1] = get64BE(out.q + 1); + in.b[15] += 1; } /* Fill poly key */ - ((unsigned char *)in)[0] = 0xC0; - in[1] = 0; + in.b[0] = 0xC0; + in.q[1] = 0; for (i = 0; i < sizeof(ctx->polykey)/8; i+=2) { - aes_encryption((unsigned char *)in, (unsigned char *)out, - &ctx->cipher_key); - ctx->polytmp[i ] = ctx->polykey[i ] = get64BE(out) & mpoly; - ctx->polytmp[i+1] = ctx->polykey[i+1] = get64BE(out+1) & mpoly; - ((unsigned char *)in)[15] += 1; + aes_encryption(in.b, out.b, &ctx->cipher_key); + ctx->polytmp[i ] = ctx->polykey[i ] = get64BE(out.q) & mpoly; + ctx->polytmp[i+1] = ctx->polykey[i+1] = get64BE(out.q + 1) & mpoly; + in.b[15] += 1; } /* Fill ip key */ - ((unsigned char *)in)[0] = 0xE0; - in[1] = 0; + in.b[0] = 0xE0; + in.q[1] = 0; for (i = 0; i < sizeof(ctx->l3key)/8; i+=2) { do { - aes_encryption((unsigned char *)in, (unsigned char *)out, - &ctx->cipher_key); - ctx->l3key[i ] = get64BE(out); - ctx->l3key[i+1] = get64BE(out+1); - ((unsigned char *)in)[15] += 1; + aes_encryption(in.b, out.b, &ctx->cipher_key); + ctx->l3key[i ] = get64BE(out.q); + ctx->l3key[i+1] = get64BE(out.q + 1); + in.b[15] += 1; } while (ctx->l3key[i] >= p64 || ctx->l3key[i+1] >= p64); } From xen-devel-bounces@lists.xenproject.org Wed May 13 15:52:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 15:52:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308257.1579786 (Exim 4.92) (envelope-from ) id 1wNBsh-0001AK-41; Wed, 13 May 2026 15:52:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308257.1579786; Wed, 13 May 2026 15:52:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNBsh-0001AD-0X; Wed, 13 May 2026 15:52:19 +0000 Received: by outflank-mailman (input) for mailman id 1308257; Wed, 13 May 2026 15:52:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNBsf-00019y-18 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 15:52:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNBse-0080Y1-Dz for xen-devel@lists.xenproject.org; Wed, 13 May 2026 17:52:16 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a049e1a-2eae-0a2a0a5409dd-0a2a450ad0ce-38 for ; Wed, 13 May 2026 17:52:16 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a049e30-56b3-0a2a450a0019-d1558035c952-3 for ; Wed, 13 May 2026 17:52:16 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488b8bc6bc9so44299255e9.3 for ; Wed, 13 May 2026 08:52:16 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 13 May 2026 08:52:15 -0700 (PDT) Message-ID: Date: Wed, 13 May 2026 17:52:14 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86/shim: adjust for Misra C:2012 rule 20.12 Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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("A macro parameter used as an operand to the `#' or `##' operators, which is itself subject to further macro replacement, shall only be used as an operand to these operators"). Move the HVM_PARAM_ prefixes into the macro body, to use ## on the 2nd use (each) of the macro parameter. Signed-off-by: Jan Beulich --- I understand that this "absorbing" of prefixes isn't liked by some people, so I'm all ears towards alternative suggestions. https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14354119193 (also covering the 17.5 patch) --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -116,17 +116,17 @@ void __init pv_shim_fixup_e820(void) ASSERT(xen_guest); -#define MARK_PARAM_RAM(p) ({ \ - rc = xen_hypercall_hvm_get_param(p, &pfn); \ - if ( rc ) \ - panic("Unable to get " #p "\n"); \ - mark_pfn_as_ram(pfn); \ - ASSERT(i < ARRAY_SIZE(reserved_pages)); \ - reserved_pages[i++].mfn = pfn; \ +#define MARK_PARAM_RAM(p) ({ \ + rc = xen_hypercall_hvm_get_param(HVM_PARAM_ ## p, &pfn); \ + if ( rc ) \ + panic("Unable to get HVM_PARAM_" #p "\n"); \ + mark_pfn_as_ram(pfn); \ + ASSERT(i < ARRAY_SIZE(reserved_pages)); \ + reserved_pages[i++].mfn = pfn; \ }) - MARK_PARAM_RAM(HVM_PARAM_STORE_PFN); + MARK_PARAM_RAM(STORE_PFN); if ( !pv_console ) - MARK_PARAM_RAM(HVM_PARAM_CONSOLE_PFN); + MARK_PARAM_RAM(CONSOLE_PFN); #undef MARK_PARAM_RAM } @@ -190,9 +190,9 @@ void __init pv_shim_setup_dom(struct dom long rc; #define SET_AND_MAP_PARAM(p, si, va) ({ \ - rc = xen_hypercall_hvm_get_param(p, ¶m); \ + rc = xen_hypercall_hvm_get_param(HVM_PARAM_ ## p, ¶m); \ if ( rc ) \ - panic("Unable to get " #p "\n"); \ + panic("Unable to get HVM_PARAM_" #p "\n"); \ (si) = param; \ if ( va ) \ { \ @@ -207,12 +207,11 @@ void __init pv_shim_setup_dom(struct dom evtchn_reserve(d, param); \ } \ }) - SET_AND_MAP_PARAM(HVM_PARAM_STORE_PFN, si->store_mfn, store_va); - SET_AND_MAP_PARAM(HVM_PARAM_STORE_EVTCHN, si->store_evtchn, 0); - SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_EVTCHN, si->console.domU.evtchn, 0); + SET_AND_MAP_PARAM(STORE_PFN, si->store_mfn, store_va); + SET_AND_MAP_PARAM(STORE_EVTCHN, si->store_evtchn, 0); + SET_AND_MAP_PARAM(CONSOLE_EVTCHN, si->console.domU.evtchn, 0); if ( !pv_console ) - SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_PFN, si->console.domU.mfn, - console_va); + SET_AND_MAP_PARAM(CONSOLE_PFN, si->console.domU.mfn, console_va); #undef SET_AND_MAP_PARAM else { From xen-devel-bounces@lists.xenproject.org Wed May 13 16:12:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 16:12:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308277.1579796 (Exim 4.92) (envelope-from ) id 1wNCCP-00056g-Mt; Wed, 13 May 2026 16:12:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308277.1579796; Wed, 13 May 2026 16:12:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNCCP-00056Z-K1; Wed, 13 May 2026 16:12:41 +0000 Received: by outflank-mailman (input) for mailman id 1308277; Wed, 13 May 2026 16:12:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org 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=?utf-8?B?TVUrRnRFd010ak4wM1VmTkpCeEE0TVFoaDVYbW1zY2g0aDMzZlhoT1Q5RzBs?= =?utf-8?B?cjVaNW5oZUwxVW9vVTN4bWdFdDhzV3UwWlBmdzBKT0thcnBRM1NlYUNFK1hl?= =?utf-8?B?WFlhR0sxYVFFcWUwYllwaDdRbFdSRUJOcEJrSmo5d01mYUF5VjBYcnhzMVJ5?= =?utf-8?B?TWFOWEg3M0hnR25Hd1A2MDVVbnZtaGJBRGxhaC9MNDdwMkRIaWdzTFNxeUZh?= =?utf-8?Q?t5m/0ZwR8w2lqiG4=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: a6b5019e-b0ef-4bfc-5a6a-08deb10cf8bc X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 May 2026 16:30:40.4744 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: e+CRFR5XfCoMVmR4G8V+e9eKtbiGK/3aQuZcFfpu+DCDCCsgBhbP5b1CqJpraNUPcwpYY6Z7cRfEcEsbRQiGMxJQhSxtUcZWp2kjGlRQqy4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR03MB7004 X-purgate-ID: tlsNG-c1860d/1778689849-B596DDB1-2174A34C/0/0 X-purgate-type: clean X-purgate-size: 1068 On 13/05/2026 4:52 pm, Jan Beulich wrote: > ... ("A macro parameter used as an operand to the `#' or `##' operators, > which is itself subject to further macro replacement, shall only be used > as an operand to these operators"). Move the HVM_PARAM_ prefixes into the > macro body, to use ## on the 2nd use (each) of the macro parameter. > > Signed-off-by: Jan Beulich > --- > I understand that this "absorbing" of prefixes isn't liked by some people, > so I'm all ears towards alternative suggestions. > > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14354119193 > (also covering the 17.5 patch) Yeah, I'm a firm -1 to absorbing the prefixes.  This is simple obfuscation just to hide it from Eclair's eyes. The ARM folks fixed this by using a SAF-6 annotation.  e.g. 195d754170891 Although honestly, the more I think about this, the more I think we should just globally deviate.  I don't consider the concept having a well-named constant be used both as a value and a string a confusing thing. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 13 17:01:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 17:01:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308319.1579834 (Exim 4.92) (envelope-from ) id 1wNCxM-0004cm-HV; Wed, 13 May 2026 17:01:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308319.1579834; Wed, 13 May 2026 17:01:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNCxM-0004cf-EX; Wed, 13 May 2026 17:01:12 +0000 Received: by outflank-mailman (input) for mailman id 1308319; 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b=qkiVGvp8++/gHQqQfpd5e7qvZ4095gSrtF/VR5I7xo5fda+lhcZWAkIO7riuiR6RMM4msiU/wvOO6HX2DcsPzKWsKHjMH9X8k0/Bokptbe9ocCIq/Mq3Y91kQmoZAy+KlF+FiYIw3+PKcajPR/VPaw1Oxt8MCoWRsJKb/bef/gM= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <8ef5af19-7660-4ee9-9cf6-094c744abd0c@citrix.com> Date: Wed, 13 May 2026 18:00:54 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 To: Jan Beulich , "xen-devel@lists.xenproject.org" References: Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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("Conversions shall not be performed between a pointer to an > incomplete type and any other type"): Add an intermediate cat to void *. cast > Signed-off-by: Jan Beulich > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 > (covering more than just this) > > --- a/xen/arch/x86/cpu/mcheck/mce.c > +++ b/xen/arch/x86/cpu/mcheck/mce.c > @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ > > #if BITS_PER_LONG == 64 > > -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) > +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) The interface here is horrible, because we're passing a pointer to a uint64_t to userspace and back. But, can't we just cast through unsigned long instead?  The compiler is happy, and that feels safer than using a pointer type. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 13 17:16:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 17:16:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308342.1579843 (Exim 4.92) (envelope-from ) id 1wNDBf-0006UB-Ma; Wed, 13 May 2026 17:15:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308342.1579843; Wed, 13 May 2026 17:15:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNDBf-0006U4-Jd; Wed, 13 May 2026 17:15:59 +0000 Received: by outflank-mailman (input) for mailman id 1308342; Wed, 13 May 2026 17:15:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNDBe-0006Ty-Ar for xen-devel@lists.xenproject.org; Wed, 13 May 2026 17:15:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNDBd-00DsxI-K5 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 19:15:57 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04b1b9-5cb7-0a2a0a5109dd-0a2a450ac1f6-36 for ; Wed, 13 May 2026 19:15:57 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04b1cd-56b3-0a2a450a0019-d1558031c0c2-3 for ; Wed, 13 May 2026 19:15:57 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso63335305e9.2 for ; Wed, 13 May 2026 10:15:57 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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It doesn't exist in prior revisions of the K8. Furthermore, from APM Vol2 3.1.5 CR8 (Task Priority Register, TPR): The AMD64 architecture introduces a new control register, CR8, defined as the task priority register (TPR). Additionally, from APM Vol3 4 System Instructions MOV CRn: CR8 can be read and written in 64-bit mode, using a REX prefix. CR8 can be read and written in all modes using a LOCK prefix instead of a REX prefix to specify the additional opcode bit. i.e. the LOCK prefix serves as an alternative encoding for REX.R. Switch decode_twobyte() from += 8 to |= 8 to better match the description given. Other indications that the encoding isn't additive are that the CR intercepts stop at 15, and that LOCK MOV CR8 generates #UD rather than becoming a CR0 access. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné v2: * No dependency on LM. Also, designers never put an ADD into silicon if they can possibly avoid it, because it's large and slow compared to the single OR gate needed in this case. --- xen/arch/x86/x86_emulate/decode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/x86_emulate/decode.c b/xen/arch/x86/x86_emulate/decode.c index 2c13356c4d17..51c89ddfc893 100644 --- a/xen/arch/x86/x86_emulate/decode.c +++ b/xen/arch/x86/x86_emulate/decode.c @@ -782,10 +782,10 @@ decode_twobyte(struct x86_emulate_state *s, case 0x20: case 0x22: /* mov to/from cr */ if ( s->lock_prefix && vcpu_has_cr8_legacy() ) { - s->modrm_reg += 8; + s->modrm_reg |= 8; s->lock_prefix = false; } - /* fall through */ + fallthrough; case 0x21: case 0x23: /* mov to/from dr */ ASSERT(s->ea.type == OP_REG); /* Early operand adjustment ensures this. */ generate_exception_if(s->lock_prefix, X86_EXC_UD); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Wed May 13 19:08:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 19:08:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308406.1579853 (Exim 4.92) (envelope-from ) id 1wNEwj-0004xl-JN; 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And then even with an > >>>> inverted comment? Looks like we've inherited this from Linux, and even in > >>>> Linus'es current tree it's still this same way. Yet all half-way recent > >>>> chipsets I'm aware of properly implement the DM bit in reg B. Might this > >>>> be another 32-bit leftover? > >>> > >>> *shrugs* I don't know. Seems like Linux is still doing it, so it's > >>> likely safer for us to continue doing it also? We had no reports of > >>> it being problematic, albeit one could argue it would be best to > >>> prevent such reports by doing the right thing. > >> > >> That's my point. If we did this as specified, we'd unbreak systems with the > >> DM bit set correctly, but we'd break (hypothetical) systems with it bogusly > >> set. Like with a few other fixes, perhaps we should correct it, but provide > >> a command line option to restore old behavior? > > > > Possibly, but I would do after 4.22 has branched, just in case. > > Of course. > > > One thing I've noticed, is that Xen don't attempts to set > > RTC_DM_BINARY in REG_B, shouldn't it try to set the bit when probing > > for the CMOS? Since it assumes BCD mode it should at least try to set > > it? > > For one - don't you mean "clear it"? But then - no, that bit is purely > informational aiui. Changing it won't alter what the date/time registers > hold (only how they're updated). Hence by fiddling with it we'd corrupt > information (breaking OSes which properly respect the bit). Yes, sorry, clear it. The (possibly very outdated) specification I have contains: DM – The data mode (DM) bit indicates whether time and calendar updates are to use binary or BCD formats. The DM bit is written by the processor program and maybe read by the program, but is not modified by any internal functions or RESET. A "1" in DM signifies binary data, while a "0" in DM specifies binary-coded-decimal (BCD) data. To me the "DM bit is written by the processor program" reads as if it could be set by the OS, but maybe that just means the bit is writable, but it doesn't affect the format of the field really. Thanks, Roger. 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Having two separate defines, one for the hypervisor, > >>> and another for the toolstack will just create confusion. > >> > >> I first thought I'd do it like this, but (a) this isn't a value Xen > >> defines (hence the comments in both places) and (b) I'm not entirely > >> happy with such a(n) (ab)use of the public headers (yes, we have other > >> such examples there, which I also don't really like). > > > > Yeah, it's not great, but it's better than having the same value > > defined in two different files, and having to keep them in-sync for > > the CMOS century field to work correctly? > > As the values come from the outside, they necessarily need to stay the > way they are (and hence implicitly in sync). If we meant to announce > another value to guests in the FADT we produce (breaking non-ACPI > guests), we then couldn't use RTC_CENTURY in hvm/rtc.c anyway. Instead > we'd have to track and migrate the index to use. Hm, OK, so the value is well-known enough to be considered part of the standard CMOS index layout, I guess that's fair enough. > >>>> --- a/xen/arch/x86/hvm/rtc.c > >>>> +++ b/xen/arch/x86/hvm/rtc.c > >>>> @@ -47,6 +47,12 @@ > >>>> #define epoch_year 1900 > >>>> #define get_year(x) ((x) + epoch_year) > >>>> > >>>> +static inline bool is_century(unsigned int x) > >>>> +{ > >>>> + /* Constant below should match epoch_year above, just as BCD value. */ > >>>> + return x >= 0x19 && (x & 0xf) < 10 && (x >> 4) < 10; > >>>> +} > >>>> + > >>>> enum rtc_mode { > >>>> rtc_mode_no_ack, > >>>> rtc_mode_strict > >>>> @@ -482,16 +488,32 @@ static int rtc_ioport_write(void *opaque > >>>> data &= 0x7f; > >>>> s->hw.cmos_index = data; > >>>> spin_unlock(&s->lock); > >>>> + /* RTC_CENTURY always forwarded to DM. */ > >>>> return (data < RTC_CMOS_SIZE); > >>>> } > >>>> > >>>> - if ( s->hw.cmos_index >= RTC_CMOS_SIZE ) > >>>> + switch ( s->hw.cmos_index ) > >>>> { > >>>> + case 0 ... RTC_CMOS_SIZE - 1: > >>>> + orig = s->hw.cmos_data[s->hw.cmos_index]; > >>>> + break; > >>>> + > >>>> + case RTC_CENTURY: > >>>> + orig = s->hw.century; > >>>> + if ( !is_century(orig) || !is_century(data) ) > >>> > >>> Is a real RTC strict in such a way, ie: will it refuse to set the > >>> century value to < 19 (0x19)? For example QEMU seems to be way more > >>> relaxed, and allow any century value. > >> > >> I can switch to rejecting merely 0. Unlike centuries in the future, it > >> didn't look very useful to me to permit anything below 19. Please clarify > >> which way you prefer it. > > > > QEMU seems to tolerate everything, so I lean towards tolerating > > everything that's not 0. That's solely based on what QEMU does, which > > I think it's likely to be (quite) widely tested. > > Will do. We need to keep 0 as the sentinel invalid value, because that's the content of the pad field in the structure when not supported. Otherwise we could just use 0xff (or any other invalid) BCD value. > >>>> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque > >>>> /* Fetch the current time and update just this field. */ > >>>> s->current_tm = gmtime(get_localtime(d)); > >>>> rtc_copy_date(s); > >>>> - s->hw.cmos_data[s->hw.cmos_index] = data; > >>>> + if ( s->hw.cmos_index != RTC_CENTURY ) > >>>> + s->hw.cmos_data[s->hw.cmos_index] = data; > >>>> + else > >>>> + s->hw.century = data; > >>>> rtc_set_time(s); > >>>> } > >>>> alarm_timer_update(s); > >>> > >>> Don't you need to adjust the tail return of rtc_ioport_write() (below > >>> the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so > >>> the set value is also propagated to the DM, and not only the index? > >> > >> I don't think so. The case of us not handling RTC_CENTURY is dealt with > >> earlier in the function. Whereas when we handle the field, we don't want > >> to forward (like for all the other RTC fields). > > > > Right, so then you also want to adjust the top part of > > rtc_ioport_write() to not propagate the write to the 0x70 IO port when > > data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, > > but not the read/write to port 0x71? > > I can't, as whether to forward depends on the data subsequently written. > Propagating the index "just in case" is the only workable model that I > can think of. And as guests can do any number of successive port 70 > writes, the DM needs to cope with this anyway. Hm, I see, the newly written value to port 0x71 is taken into account to decide whether to forward to the DM or not. I wonder: would it be simpler to extend the size of the hvm_hw_rtc structure so that Xen can detect whether the incoming VM has support for the century field, and then avoid having to play heuristics with the value itself? We would know ahead of starting the guest whether RTC_CENTURY is supposed to be handled by Xen or forwarded to the DM, and we won't be limited to use 0 as the sentinel value for not exposing RTC_CENTURY. Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Wed May 13 20:47:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:47:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308439.1579869 (Exim 4.92) (envelope-from ) id 1wNGTf-0001z4-Cq; Wed, 13 May 2026 20:46:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308439.1579869; Wed, 13 May 2026 20:46:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGTf-0001yx-AB; Wed, 13 May 2026 20:46:47 +0000 Received: by outflank-mailman (input) for mailman id 1308439; Wed, 13 May 2026 20:46:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGTe-0001yr-UE for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:46:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGTc-00DGYm-M5 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:46:46 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e319-2eae-0a2a0a5409dd-0a2a450281a2-20 for ; Wed, 13 May 2026 22:46:46 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e334-af86-0a2a45020019-aceafc1f8f28-3 for ; Wed, 13 May 2026 22:46:45 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id F132A402B8; Wed, 13 May 2026 20:46:43 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id BC912C19425; Wed, 13 May 2026 20:46:43 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778705203; bh=wpV9StRR9YZtclK2hc4IXe7av7xmUbXWolQsdD9HKOs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=I8UYK5L4gmxgsKlaW4uGsBdS6Z1VJaxw7fJ9HjItqugPWpL5CRTQOP4cvSruEiUvu nIqHl6jwZkR9cWVmoVvhATWmE39aV8Vp/SNbQzGsEFcOQTSlbCMODg1LzIqzmqyTxz 54c12JTKxeQdXsbIFTpgR4Fmy3km6JDrai6HwYNx7XTByqOw7fANvNrlrx/20V2gF+ L8qT6+hxyptelTbz9vA6IxNFdd3UKXKBTuiHsT6Y4N1YrW9f678SWZk5dhl9aQslx3 oysqc9pttapQmNj7sWou4UjQANMmSzi9X8DtCVKYV47N84b220aukp7UtTmnigp32+ JVH0be2CfmZng== Date: Wed, 13 May 2026 13:46:40 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Andrew Cooper Subject: Re: [PATCH 1/2] kexec: kexec_crash_save_info() vs Misra C:2012 rule 8.3 In-Reply-To: <0af810a1-3392-472a-93c9-c98fcb81c43a@suse.com> Message-ID: References: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> <0af810a1-3392-472a-93c9-c98fcb81c43a@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-720697/1778705206-A917D161-59822B90/0/0 X-purgate-type: clean X-purgate-size: 791 On Wed, 13 May 2026, Jan Beulich wrote: > ... ("All declarations of an object or function shall use the same names > and type qualifiers"). The declaration doesn't use the typedef, so the > definition shouldn't either. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- > Really, is the typedef of much use? I.e. can't we drop it altogether? > > --- a/xen/common/kexec.c > +++ b/xen/common/kexec.c > @@ -333,7 +333,7 @@ void kexec_crash_save_cpu(void) > } > > /* Set up the single Xen-specific-info crash note. */ > -crash_xen_info_t *kexec_crash_save_info(void) > +struct crash_xen_info *kexec_crash_save_info(void) > { > int cpu = smp_processor_id(); > crash_xen_info_t info; > > From xen-devel-bounces@lists.xenproject.org Wed May 13 20:47:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:47:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308446.1579880 (Exim 4.92) (envelope-from ) id 1wNGUH-0002UW-Ok; Wed, 13 May 2026 20:47:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308446.1579880; Wed, 13 May 2026 20:47:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGUH-0002UP-L7; Wed, 13 May 2026 20:47:25 +0000 Received: by outflank-mailman (input) for mailman id 1308446; Wed, 13 May 2026 20:47:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGUG-0002UJ-Av for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:47:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGUF-00ERZn-OH for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:47:23 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e351-bab6-0a2a0a5309dd-0a2a45029ac4-30 for ; Wed, 13 May 2026 22:47:23 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e35b-af86-0a2a45020019-a237832f960c-3 for ; Wed, 13 May 2026 22:47:23 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 597354EE1D37; Wed, 13 May 2026 22:47:23 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778705243; b=XTMkqSKfD4wferpWcybbA25dl8SbGm+a5kQujPg8Vs5oydboMwj4yF3Z7naNkS5Y09F6 F0ajzAMNfppX84bhf8gQP0+NFeYcKums6pm3ihgT3n3T4XCJ7YPImfh+6FTitto8BJndo 4wcZvijFoivjWJj9sfFvWmFieLulYaBgJYLia50wYJ7iRcWxU1yokzsULcK8B7nU/VIzX 3fgHteTjE8Eh7Zpb70XPuCOaiVFEiUHjxHhN52iy2TI8/oBspK5Vd8pCESfOEVRJqZqry 86IEVUgJiBaRBaPNg+YmzN9Oh+oW+GKbLWGtw5Mll48cVuEkCLLHSbj4sB5CuHpXrSd7A vjQ9FjPG5Q+9BQSV+NRXkNcnBn7QAKBF9FvpIj34UwZLUSakBycfi+O0VrXSXuZp8G2wc Q14PVolSB2h33cW9sfrT1Zc42jmoHDCTAQ9lgPh0DHutLqROzXVa0h/X+XvGGqWEHgwGo REiJe97/++S71oyNfcaKKB72Y7ZO7ftshARaagBMYosHOPlmhoMldknqLd46j/xQqIsFE 0PzNDRX0ALzaH2nVArrU6IUqMkaLyZilpGsZf2atLEivZTOK+SuDoTOrirNKPH9WSYCZ+ pWUDUyaOYEp3tvA2Ah3lWKeyPaF4wb8GhYqUmM+TtnA+yByZJA6MDxAdNVeKzfI= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778705243; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=fEw7R8gfi4CKLZ7U1ZfvbeZdcg7q6TFeK8CtUy8K9P4=; b=G6nQMx3hJiPuOf7E4s7NQx9C5c50DfLN2TncDG6aPmY3L0ox1jEk0hvELTmS27tgtDyv xufr2tREQpW7hpfCfZGtfuVn8nzXIb+ghRHbpixAgTWYoZFmAA9tQ3BHZoy9N3yj+oq3T AlrxmbN1Zdq8t1uYKnHihOZdiyhw8RRWoRcvVQYvXj7ZnUqMlJCwoEtgKk3eaLtyrMOiw Wx5O2rV67CRBEW08UyW4cX/UlUztijNXcdFjK6UQgF4iFPisK2/aWRTiE+L2X/VfSLE64 tCsNQmnKyhYydl/Nfyw+uMGwrf9TxUvJCqt/khlL5mOlIiu34j8UXITP+5sUY980FeO6D Ge/HMFYPfvJk06oR7X5FgZo7zb5h2xbgUqrc4cQ8RSt6jhnz2JPZSw2htNB9Aab7Gk5sv 18nyKV912W3sc6uNdDTDEJgb6YU5EeTfHCc0mAr21o5rhUbOBdQbwF8tlS+pOGJXplgBi mfn5s80CGZTscy1LvgqYokPpKTTJb49KU3N2IVlfk1CwcjAkeKWAiW8MoigiNkJhDPdd6 b3zlW+pxGDGllBJ+7WKk8ERYpXjzZOoe5yYJ/Xo5+G+w4LQfudIwtYqpP0PFC9iJCMMxp X4knx6cAE4a3Xo6g872wFMBk8+q2F04oqfqgRGlYvgxHuBzzP30cyn1ve3qCngE= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 13 May 2026 22:47:23 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 In-Reply-To: References: Message-ID: <36723a55f4465ab1a99041b8bb0575c4@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778705243-A8979161-26DCF6F3/0/0 X-purgate-type: clean X-purgate-size: 1121 On 2026-05-13 16:03, Jan Beulich wrote: > ... ("Conversions shall not be performed between a pointer to an > incomplete type and any other type"): Add an intermediate cat to void > *. > > Signed-off-by: Jan Beulich > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 > (covering more than just this) > > --- a/xen/arch/x86/cpu/mcheck/mce.c > +++ b/xen/arch/x86/cpu/mcheck/mce.c > @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ > > #if BITS_PER_LONG == 64 > > -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) > +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) Notwithstanding the comment from Andrew, I think a comment here could be nice to explain what it going on, otherwise the double cast looks quite odd. Unrelated: why not contextually marking this rule as clean to prevent regressions? > #define COOKIE2ID(c) ((uint64_t)(c)) > > #elif defined(BITS_PER_LONG) -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 13 20:47:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:47:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308451.1579888 (Exim 4.92) (envelope-from ) id 1wNGUn-00032t-Uq; Wed, 13 May 2026 20:47:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308451.1579888; Wed, 13 May 2026 20:47:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGUn-00032m-Rx; Wed, 13 May 2026 20:47:57 +0000 Received: by outflank-mailman (input) for mailman id 1308451; Wed, 13 May 2026 20:47:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGUn-00032a-1O for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:47:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGUk-00DGtW-T8 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:47:56 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e37c-5cb7-0a2a0a5109dd-0a2a4507d25c-0 for ; Wed, 13 May 2026 22:47:56 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e37a-229c-0a2a45070019-aceafc1fb224-3 for ; Wed, 13 May 2026 22:47:56 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 6FC6A4075B; Wed, 13 May 2026 20:47:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 125FEC19425; Wed, 13 May 2026 20:47:54 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778705274; bh=O0zqcBOBq6DRxj4bk/iy7C/IXg3z+jEdR7fpHHctHqs=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=LzuY2gwQaCdrkm9w7hQWmcwfPwIbXXTen4cp1JiVoU8FcCQDXsWqFL1yLg/A5+6PM bdLzHh4FIsBHNt5CzB2KXwvHow4hlfD81ZPxzbxUKjCo/frnTfLXzWuK7AnxulTPQe J1YqVsMkm+QQrMrRAey7uwQV2IFN7w3JK9ZxZqRmD9wqqKMwaZVoddoTnF7LeAUnL2 5IZIv47dnhv8vy9GGXycfCiY7R5m2CD1+CgV9T/qIG1EDA1tvqUdY6K0X+kpCD9DMv WzjdoK0oA0QP+YGAFskOhYr/g1Ehk+kliUAgG+zTopzTC0FwIar3rL+ClVqWNs26ud DPvGqWQCwYtMg== Date: Wed, 13 May 2026 13:47:53 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH 2/2] crypto/rijndael: adjust for Misra C:2012 rule 8.3 In-Reply-To: <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> Message-ID: References: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-ef75cf/1778705276-0A16DC48-2EC49985/0/0 X-purgate-type: clean X-purgate-size: 1418 On Wed, 13 May 2026, Jan Beulich wrote: > ... ("All declarations of an object or function shall use the same names > and type qualifiers"). Bring declarations in line with the corresponding > definitions, accepting the use of the being-phased-out u types. While > we don't define NEED_RIJNDAEL_DECRYPT, cover rijndaelKeySetupDec() as > well for completeness. > > Signed-off-by: Jan Beulich > --- a/xen/include/crypto/rijndael.h > +++ b/xen/include/crypto/rijndael.h > @@ -50,9 +50,8 @@ int rijndael_set_key_enc_only(rijndael_c > void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); > void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); > > -int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char cipherKey[], int keyBits); > -int rijndaelKeySetupDec(unsigned int rk[], const unsigned char cipkerKey[], int keyBits); > -void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned char pt[16], > - unsigned char ct[16]); > +int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); > +int rijndaelKeySetupDec(u32 rk[], const u8 cipkerKey[], int keyBits); There is a typo "cipkerKey" which is only present in rijndael.h but not in rijndael.c > +void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 ct[16]); > > #endif /* __RIJNDAEL_H */ > > From xen-devel-bounces@lists.xenproject.org Wed May 13 20:54:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:54:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308463.1579896 (Exim 4.92) (envelope-from ) id 1wNGbT-0004oc-Jy; Wed, 13 May 2026 20:54:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308463.1579896; Wed, 13 May 2026 20:54:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGbT-0004oV-HB; Wed, 13 May 2026 20:54:51 +0000 Received: by outflank-mailman (input) for mailman id 1308463; Wed, 13 May 2026 20:54:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGbR-0004oP-RX for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:54:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGbQ-00FIfA-Ou for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:54:48 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e4d5-5cb7-0a2a0a5109dd-0a2a450b9232-48 for ; Wed, 13 May 2026 22:54:48 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e517-212f-0a2a450b0019-ac6904fea3b8-3 for ; Wed, 13 May 2026 22:54:48 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 397CF60052; Wed, 13 May 2026 20:54:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 97CD4C19425; Wed, 13 May 2026 20:54:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778705686; bh=xkJmYuOtGLZWpb7CNtzCmol5bRCeD7uZ7hhfNPO0krY=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=L4u9I1inHUCZUHTczpo5x1rZEG1deWeM+d/IJY5N0P24lbAvBO7Y+x8QmZrpy5N74 10nSDc6jKOtEW/UEl6gBwXO1vIxHCQ5iuZXyGjMtsb5zKgnvoNQ2CtjF/MTiUYUmbN juSkI+haYzSOP6JZufzQepZBZU1yvKH0Tsn5uE7XENWtv8+Qs7jIFXAJDZLu4CqLAL CuZiK8g+1g3U/nlQxPTSImz8YPB0I0uuNL5uXrHRJTuPjOUm7UX8FuCgCy7pfRc6IW ns9PU89AumzFcPddDZ5PBr5Cph1kudNboFl828xJnzXV+IRATJ+WughQK3EYtoX5a2 m1/vwED/H+/7w== Date: Wed, 13 May 2026 13:54:46 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jiaqing Zhao cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Denis Mukhin Subject: Re: [PATCH v3 1/2] ns16550: add support for WCH CH382 serial adapters In-Reply-To: <20260511075415.36538-2-Zhao.Jiaqing@amd.com> Message-ID: References: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> <20260511075415.36538-2-Zhao.Jiaqing@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-42698a/1778705688-12971F3B-B20F1C1B/0/0 X-purgate-type: clean X-purgate-size: 671 On Mon, 11 May 2026, Jiaqing Zhao wrote: > Add support for the WCH (Nanjing Qinheng Microelectronics Co., Ltd.) > CH382 PCIe dual port serial adapter. The CH382 is available in two > variants: > - CH382 2S [1c00:3253]: 2 serial ports > - CH382 2S1P [1c00:3250]: 2 serial ports + 1 parallel port > > This chip uses IO BAR0, base baud rate 115200, ports starting at offset > 0xc0 and spaced 8 bytes apart, and a 256-byte FIFO. [1] > > [1] https://www.wch-ic.com/downloads/CH382DS1_PDF.html > > Signed-off-by: Jiaqing Zhao > Reviewed-by: Denis Mukhin Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Wed May 13 20:57:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:57:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308472.1579906 (Exim 4.92) (envelope-from ) id 1wNGe5-0005TW-00; Wed, 13 May 2026 20:57:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308472.1579906; Wed, 13 May 2026 20:57:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGe4-0005TP-Tf; Wed, 13 May 2026 20:57:32 +0000 Received: by outflank-mailman (input) for mailman id 1308472; Wed, 13 May 2026 20:57:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGe3-0005QD-0a for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:57:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGe2-003w5X-Dp for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:57:30 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e597-bab6-0a2a0a5309dd-0a2a4509d626-26 for ; Wed, 13 May 2026 22:57:30 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e5ba-2497-0a2a45090019-a237832fc384-3 for ; Wed, 13 May 2026 22:57:30 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 174D34EE1D3A; Wed, 13 May 2026 22:57:30 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778705850; b=ceNqlb+CuF+jorU8Wx9BcxFvagjdfPy49Ky5wBqMxnAU/q1rGMG6y/SqonF3zc8YpWKQ 37Cy56+B6GHF4CrIDmXQvr3J3rC3PXIl7cSl6uFImmIulAvIbtU8vMI4MHHCgDgJPlhMw Gsf8irz85frWaQ6VEPFWqCg+hWrdDQhJ+BNLI3jnL2YAll56UUXeLttGMINjIIybXZfdj ZT/7WDKxkkgUOicCXY+1Q6mt78r+gqQHtXk82eTjMEtQb0Doztt+MVa9taDUk1QeZWbou lGkeGpU1i/WXBBoaB2bvoTbHSpdROHvRvEAn8cHhaeCRARIxZ2ldpOE0TGKTZ+XZyEwa8 p31xTSRIMiUZBdicEL9UBskXppFFbBDjSnvTa6FaA7clQkpiNS0YCbOEBZjSGvWuQELf4 cjcle2d5aMfH7xRVCBi7u1Lq3RvhgR7teIoVVdhjGKV1PZ20RjqxQQLIjM7igzYm/ghEG yidtjzcaT15xhUKaJ7UmbzvyC+m4RgKI81vpbM8MyiK0cTbAfnGaoKzfsrr/WYq8OvgoG Tp0oWBBnxI9GrnwLjXzcHVJMSX9X8t7yg+wGfsBq0qxcNQ/FKPGxLrlz3riJkppMbYjpp gxWtC9UOJ/fQCks1QKAvrUGMjSOoaFhDcZfqcF1BBGqQVu1PbaOmDepFUO0vpI0= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778705850; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=2+2IlPZf8jZ1VbwpfpG+rDF5J+dRcr28rGmbAHPKR24=; b=SlOgZVKDhsl7tk/mFBaPvqFaCPMpRWjIpV+327782dmz7RGJALDe7ERAzc7cFZpGMi3G NwR5/JXN/jHqwkHG2uAUFybL07FYSPz1SU8kZnTw8dsEXM7Xbp6PtkyMHFnx7fXBednQx CU57ze35hGVGrob2rCzsEa6hsOM9NzqAGch04w045+7IlhtpQNYMTVFDfF39bqXfhfFuE RsFhgO8lFMaSG0Y0O/S4hQg3RwxYSoe76zKZ28fFN2EZl3B85dvFmLJVgHHJNOknzfQWd hgRttC9ZD1Pik7ZmEtHLbpJ3treDYA5DjuU7yAgftdEDYQk5sXGyzAWH/oO8cpWn/d97j 8sCIiZgJfRB5QSnWZuFZaSwFynt/Bq7sJIqs0vOYfWJRIzeWsRRQw3inoWz4Hw3LCqQwB YEzQsHC0tr0/bI3JwSCJTzqMTC8xk004xj/Zr578F1qUQ/90tKjHe5irpylCDUGvNAwig yp94p4TE+hsCJ2f2K7OqLJAi87ba6uUtT5XGHh19ShxgtxLDmSe+Gn5ki8UV0Y6xwI4Bq p4qV1YX3nmiWg+bTLGUE0qNbgZBDuJtaYHk66z5fXsaqBk2foyLHMiJ/qzrsod8tNzRWQ aQvv4IiXFLzHhVR8yE223tWxV/jU0GXmEP3qR1tdpZvqT1mB40BN/llOCyainHk= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 13 May 2026 22:57:30 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH 2/2] crypto/rijndael: adjust for Misra C:2012 rule 8.3 In-Reply-To: <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> References: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> Message-ID: <1204570ec06469568958c7ad1cf53496@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1778705850-40563A53-51FCBB80/0/0 X-purgate-type: clean X-purgate-size: 1642 On 2026-05-13 16:01, Jan Beulich wrote: > ... ("All declarations of an object or function shall use the same > names > and type qualifiers"). Bring declarations in line with the > corresponding > definitions, accepting the use of the being-phased-out u types. > While > we don't define NEED_RIJNDAEL_DECRYPT, cover rijndaelKeySetupDec() as > well for completeness. > > Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini with the typo in rijndaelKeySetupDec's declaration fixed as noted by Stefano > --- a/xen/include/crypto/rijndael.h > +++ b/xen/include/crypto/rijndael.h > @@ -50,9 +50,8 @@ int rijndael_set_key_enc_only(rijndael_c > void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, > unsigned char *dst); > void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, > unsigned char *dst); > > -int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char > cipherKey[], int keyBits); > -int rijndaelKeySetupDec(unsigned int rk[], const unsigned char > cipkerKey[], int keyBits); > -void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned > char pt[16], > - unsigned char ct[16]); > +int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); > +int rijndaelKeySetupDec(u32 rk[], const u8 cipkerKey[], int keyBits); > +void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 > ct[16]); > > #endif /* __RIJNDAEL_H */ -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 13 20:57:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 20:57:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308473.1579915 (Exim 4.92) (envelope-from ) id 1wNGeH-0005uj-6i; Wed, 13 May 2026 20:57:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308473.1579915; Wed, 13 May 2026 20:57:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGeH-0005uc-3F; Wed, 13 May 2026 20:57:45 +0000 Received: by outflank-mailman (input) for mailman id 1308473; Wed, 13 May 2026 20:57:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGeF-0005uC-Rh for xen-devel@lists.xenproject.org; Wed, 13 May 2026 20:57:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGeF-001hfp-8e for xen-devel@lists.xenproject.org; Wed, 13 May 2026 22:57:43 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e595-2eae-0a2a0a5409dd-0a2a45038920-32 for ; Wed, 13 May 2026 22:57:43 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e5c6-672d-0a2a45030019-ac6904fee0aa-3 for ; Wed, 13 May 2026 22:57:43 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id B4BA860126; Wed, 13 May 2026 20:57:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2794FC2BCC7; Wed, 13 May 2026 20:57:41 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778705861; bh=QSRr88+bJ+mw8eN2N6nw/WIyoxLc4FX8rbgxy8AkDfE=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=fhAT6fDqTeswK6p51PnYUUGlrwcmzgdQjVVqHGhAAUH1dWxZYZHJwSETe+C5oOrTf RY/tF0/qY9wR2F17QBgxE2TJ2O79ibwnTStUzzQXmgMfX9ZY9r/QK9gG4pEHTRuvbF 6Mshn0skwJtR7qEJ+H15W9mmESCcj8sNoSIoZneg9MS4WGYzkXc2gteGGGrJNlDQJY 4bVhOX3ncVPiKcvbxt3niCH8zR74gcZWnxao/9n9bkfausaysvj91eVYJZONLj7lnN QWRsjmF5kEfWwvo7SJR09OWvDjaC7klDrVxeq8ecc7lw3W/AUn9ulTsKQ1dcXUYLj+ 8yDgpMgC1HM5w== Date: Wed, 13 May 2026 13:57:40 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jiaqing Zhao cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH v3 2/2] ns16550: add support for ASIX AX99100 PCIe Multi-I/O controller In-Reply-To: <20260511075415.36538-3-Zhao.Jiaqing@amd.com> Message-ID: References: <20260511075415.36538-1-Zhao.Jiaqing@amd.com> <20260511075415.36538-3-Zhao.Jiaqing@amd.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-33051d/1778705863-38B74938-25CF2360/0/0 X-purgate-type: clean X-purgate-size: 376 On Mon, 11 May 2026, Jiaqing Zhao wrote: > Add a PCI device table entry and matching parameter for the ASIX > AX99100 PCIe to Multi-I/O controller [125b:9910]. Each port on the > chip is a standalone PCI function, with UART registers on its I/O > BAR0. > > Signed-off-by: Jiaqing Zhao Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Wed May 13 21:07:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 21:07:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308487.1579923 (Exim 4.92) (envelope-from ) id 1wNGnZ-0007jP-1N; Wed, 13 May 2026 21:07:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308487.1579923; Wed, 13 May 2026 21:07:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGnY-0007jI-UZ; Wed, 13 May 2026 21:07:20 +0000 Received: by outflank-mailman (input) for mailman id 1308487; Wed, 13 May 2026 21:07:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGnX-0007jC-O9 for xen-devel@lists.xenproject.org; Wed, 13 May 2026 21:07:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGnX-00EIfJ-4w for xen-devel@lists.xenproject.org; Wed, 13 May 2026 23:07:19 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e7d2-5cb7-0a2a0a5109dd-0a2a450adac6-46 for ; Wed, 13 May 2026 23:07:19 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e806-56b3-0a2a450a0019-a237832f930e-3 for ; Wed, 13 May 2026 23:07:19 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 8DACE4EE1D2C; Wed, 13 May 2026 23:07:18 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778706438; b=lKYF5CtIub/XWAkXp17OZplT/s0L8RDupaMeV2fcptHWimgDLVVyayXjxd0izOuSQ5kK HP/xFU4Q0IbNXDeZ5zurZ7KXQIuGoZoez7GgnXjEhBl9HT7dWf3ZyxWtdT6XDfnkkL/QV xq48BShyJpP76l/8Ifb8H5UMn9CJGb+oGnW4XR90WfDMqwcMGYB8YUAMzH5US+mcsfwYJ Bw9Pm57cgQqWYkq8yF2NBzNt/P1kmWziirY5mge6S3NFl6Bb5jbfnXklA3WFi9D9/2wcc 7Y/m7XTBkUGbBXHvVeejUyV8Pi44mCkc+yUYxzZIEelCh2cVvpnbuKam64Gq+6VIgWvbO 7VyIL86BmhHGMYE9cFKk+gfjhFycAmxQDO9ile21ZLL1d5yGpR1znBKROvGaFtiyXhEyt D98bMP9Qa5qmRGpC1eNC7GiwpcFF0q+4a8aUEglS+R5DfJzEwZr4zA7rCf1BxH/r2Op2V YBAB8V+lVUUyXksT2vQKTUqEcGWnqj77HDB1QcrSJ4s5pHX3la+X1eycO98Cy+LD+mbed fOox3BuuWJBrvqI3eXrH6tZxdIMa68GaSVXTP7JV5LcuMRYEXKtL4Y9LU7DUtMH+yHWqj 6Q4cJqHVn0FCeKGNrDXlknn74a0zJnfj0z78DRsOXZj7gpFE2J1/Q72KUQtvtnM= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778706438; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=EJJPGORqhSahaG4Yo4YCJnTQFEkFGg7G9VmW7fkOktY=; b=jL81OBv/jDmMzaMllh0tWpOinFJ83UyVEZRGk9aHIR3dKCqRa5osC9AuYP8OaCt4R9XK tOJnJZIrrY7t7aVXGf0XwaV78Byx5oC8MJQNqNMucRmp3wxUbLy4Qfo4kjXc+TVO/dzUg aVOSXnuI7BPaK3feh1MvkjRVZ2sx2wn0aYi8K5Xg+6QEOOV5ipKMtDMZ+NOMaEj8sBf5w tzDngkV5LsnNZOY5BP7FsSS7QFdMLm3fW6DcWabC4icc2dNvh9tZwx/1F9IyRsac7gUiC M/6L0UPeefmxfl5txDiGG4z2bD55Jh7Ocbs3AQi3vrtlWwNkMZ0xYMrD+9+JY0L2KSrKb CWYOdZ/fAbiywG9xR83nv8INDMYV4OAE0F7XaacF6W2RlpZZnl9lUdzn+Ezq4zmmULWIS GpVil0npQ7fGxgnn6pvdeIkLUvWMaBvkIlQkHmE8P/IiyKO9WZPTvl/RLDF5TCzfWw9+X db8H73WiwTpapxAnZATxbrvvO0KJibyIYYI0PGdqD3DqKEYHymTRmYn9js/x7PHE4trtz qxQ7o/ppU+S/YNvMzlFFM5Y5AWQw5M6gLiU41feKTCYd+o+PuW4Y4i5w/iWeEZYIy6sOl 34d7/S2YqH1ZkcQJ7oE1QpwsVXJeF8ZXcd+14eC9GYrl1L+FIRq8i5wNw7u6c0w= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 13 May 2026 23:07:18 +0200 From: Nicola Vetrini To: Andrew Cooper Cc: Jan Beulich , xen-devel@lists.xenproject.org, =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/shim: adjust for Misra C:2012 rule 20.12 In-Reply-To: References: Message-ID: <29550088408bfcfec43901c58e0f423f@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778706439-7FD788B7-31CC842A/0/0 X-purgate-type: clean X-purgate-size: 2449 On 2026-05-13 18:30, Andrew Cooper wrote: > On 13/05/2026 4:52 pm, Jan Beulich wrote: >> ... ("A macro parameter used as an operand to the `#' or `##' >> operators, >> which is itself subject to further macro replacement, shall only be >> used >> as an operand to these operators"). Move the HVM_PARAM_ prefixes into >> the >> macro body, to use ## on the 2nd use (each) of the macro parameter. >> >> Signed-off-by: Jan Beulich >> --- >> I understand that this "absorbing" of prefixes isn't liked by some >> people, >> so I'm all ears towards alternative suggestions. >> >> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14354119193 >> (also covering the 17.5 patch) > > Yeah, I'm a firm -1 to absorbing the prefixes.  This is simple > obfuscation just to hide it from Eclair's eyes. > > The ARM folks fixed this by using a SAF-6 annotation.  e.g. > 195d754170891 > > Although honestly, the more I think about this, the more I think we > should just globally deviate.  I don't consider the concept having a > well-named constant be used both as a value and a string a confusing > thing. > There are already special cases for R20.12 also for things like GENERATE_CASE -doc_begin="The helper macro GENERATE_CASE may use a macro parameter for ordinary expansion and token pasting to improve readability. Only instances where this leads to a violation of the Rule are deviated." -file_tag+={deliberate_generate_case, "^xen/arch/arm/vcpreg\\.c$"} -config=MC3A2.R20.12,macros+={deliberate, "name(GENERATE_CASE)&&loc(file(deliberate_generate_case))"} -doc_end which fits this macro perfectly. The more general question is whether we want to whitelist certain macros uniformely, or in general Xen developers want to use that pattern, because that conversation has two very different outcomes: one is the disabling of the rule, though there is an associated unspecified behaviour. Us.B 25 for C99 to be precise: The order in which # and ## operations are evaluated during macro substitution (6.10.3.2, 6.10.3.3). The other possible outcome is deciding that the allowed cases, which should be very few (and indeed they are currently) should use a single deviation pattern to be handled uniformely. -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 13 21:14:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 21:14:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308500.1579932 (Exim 4.92) (envelope-from ) id 1wNGuq-0001D7-P6; Wed, 13 May 2026 21:14:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308500.1579932; Wed, 13 May 2026 21:14:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGuq-0001D0-Lx; Wed, 13 May 2026 21:14:52 +0000 Received: by outflank-mailman (input) for mailman id 1308500; Wed, 13 May 2026 21:14:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGup-0001Cs-TY for xen-devel@lists.xenproject.org; Wed, 13 May 2026 21:14:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGup-00EUHP-AL for xen-devel@lists.xenproject.org; Wed, 13 May 2026 23:14:51 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04e96f-e002-0a2a0a5209dd-0a2a4508b6a2-42 for ; Wed, 13 May 2026 23:14:51 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04e9cb-63b5-0a2a45080019-a237832f9c62-3 for ; Wed, 13 May 2026 23:14:51 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id AB4994EE1D2C; Wed, 13 May 2026 23:14:50 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778706891; b=CLrKCVqiK6WnDWdEZDlJCkTOQWJgFMl5AkDPK/8DP9wyDTvzdTfuemfRjEl0HDfO/NXV t9yqo/c7yWjcUuU9HlJWDTy/34A/3WxbxAMQY+igRoGoVD6D9Sx2UhNCgzm+xTNF0k3R7 VyoNHaZZbpGHSBBcfgw8K65jtveBDVnGdI6l1LZD+cPNi0ChuyEX66I6cMnAOWnnrgmPq OmEKlqDn3Fmfy9y7swZ+BCLCxKPrKbLPesTYywurs2Yb3C0akzdY4vWRQjmmdldanjhJe gGqN8QCklJV5O88LXHBWd/TdbPMYAHl2CQ8v87hSx1m1GTxcpf+FSNKAWiinP5A2Z1dj2 RY2/yHwk8Q7ia2uPmiEzV4chk3yief38u4n6kC51R26m/ouTWBNw6WCqy+UafqiqJ7+P0 IUtSTVVJxRuRpzeD/5DFUDx7/5GcVRX4tNu0ky5ll2ZeLnL8xqaAt9LtHpN/kquoJrulP ShfDACX0YAVeKCpFxzIbQr0U46bEuKDm1/3zOi3B/W+CRxzIWGdxX0k75tH88BHjrGCH/ hLNz7VvHUpluayFGuOwGDLMvvkOOa6Sp8XAv6/o5qk7IE0VhF7jfa5WM5T2Y4ogMHl6P3 cHAspD/z8oT+4Z+jzwwPog4Hw11pfJO27eRUWOnR0j2iIRiPgy8TKiUaozS4NmM= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778706891; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=PTvjraaklV2YyLSuhdYYWG+LojtBf4e8CWfb3/VE0nw=; b=jvkL24C+mMhD3da7gFmmBbC0eeQ3jx1lKWan3FUn3YdE2/ZZOvBJfuVqKytc1yI51M/T M6eWcAkrQ5M5Uo2ygPAJ+S5d73olTQuGG6DcQ7qJyKgNduI76IOtF2HqynCQHFVbvl6Yx r4m2wY1oCd+2uEyqjipn6tTANaIYGvhUC3PtZmHM6R8Y/LYcaMsATzoNhpwoKhiL4btx5 ajMG4BPqIDERUzTTCUzNYGcgsgiS16Ux1oamreNwcXG0sLxK7WdwRjU2SZ3TRdyerfblv QKKCEXzgRdljrTG+sFI729HtbKPtThs6KUVbiaehSLiJb7KV0UkiR5msMAWU68qAONYJg 2gMMD3gdH4R5kzWcvgVrdDf5UWkQ9OTGN66eclFzRzQq557fnL5khQdG6oqSU5Y/MDQgV Kuug1ted08Dke1i7aIbvf6OJ8pzvvk6D0hhSOu3NhGDkgGyvEpZ/VpU0zywG4Hl4Fa2pv TQoVum7BQTe1JjXOOLYSTO1W38Rkzs/SK+5uQHkwyx7Tveyiow67BbV+/sr6tLZY6HxSE N3Jb9ezc5Pb0s5dcG2ic4czfFzgZFUvOShsS4hGPzxizj1wW+omcScUYOPdTVAt0yFSAF 4tCc4rtwl18gJWJr0vE8iDfuAdYh3Y61fQeSyzd52LFmY0KiFNaIbHtxIFN/B64= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 13 May 2026 23:14:50 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86: address Misra C:2012 rule 8.4 In-Reply-To: References: Message-ID: <883724a4dc0899f8aafd252c3d974a3d@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778706891-BF171DB1-22F0873D/0/0 X-purgate-type: clean X-purgate-size: 1760 On 2026-05-13 16:03, Jan Beulich wrote: > ... ("A compatible declaration shall be visible when an object or > function > with external linkage is defined"). Three variables lack asmlinkage > annotations. > > Signed-off-by: Jan Beulich Reviewed-by: Nicola Vetrini > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 > (covering more than just this) > > --- a/xen/arch/x86/guest/xen/pvh-boot.c > +++ b/xen/arch/x86/guest/xen/pvh-boot.c > @@ -22,7 +22,7 @@ > > /* Initialised in head.S, before .bss is zeroed. */ > bool __initdata pvh_boot; > -uint32_t __initdata pvh_start_info_pa; > +uint32_t asmlinkage __initdata pvh_start_info_pa; > > static multiboot_info_t __initdata pvh_mbi; > static module_t __initdata pvh_mbi_mods[8]; > --- a/xen/arch/x86/guest/xen/xen.c > +++ b/xen/arch/x86/guest/xen/xen.c > @@ -40,7 +40,7 @@ DEFINE_PER_CPU(struct vcpu_info *, vcpu_ > * 0 vmcall > * > 0 vmmcall > */ > -int8_t __initdata early_hypercall_insn = -1; > +int8_t asmlinkage __initdata early_hypercall_insn = -1; > > /* > * Called once during the first hypercall to figure out which > instruction to > --- a/xen/arch/x86/pv/hypercall.c > +++ b/xen/arch/x86/pv/hypercall.c > @@ -180,7 +180,7 @@ void pv_ring1_init_hypercall_page(void * > } > } > > -void do_entry_int82(struct cpu_user_regs *regs) > +void asmlinkage do_entry_int82(struct cpu_user_regs *regs) > { > if ( unlikely(untrusted_msi) ) > check_for_unexpected_msi((uint8_t)regs->entry_vector); -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 13 21:17:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 13 May 2026 21:17:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308505.1579942 (Exim 4.92) (envelope-from ) id 1wNGxA-0001j1-4v; Wed, 13 May 2026 21:17:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308505.1579942; Wed, 13 May 2026 21:17:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGxA-0001it-1n; Wed, 13 May 2026 21:17:16 +0000 Received: by outflank-mailman (input) for mailman id 1308505; Wed, 13 May 2026 21:17:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNGx8-0001im-UN for xen-devel@lists.xenproject.org; Wed, 13 May 2026 21:17:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNGx7-00EUSt-TR for xen-devel@lists.xenproject.org; Wed, 13 May 2026 23:17:13 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a04ea09-2eae-0a2a0a5409dd-0a2a4502be78-44 for ; Wed, 13 May 2026 23:17:13 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a04ea59-af86-0a2a45020019-a237832f8c9e-3 for ; Wed, 13 May 2026 23:17:13 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id A34754EE1D2C; Wed, 13 May 2026 23:17:13 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778707033; b=2uehh0KZQilLEJoP05q7J9zNLJbA6L/qWsnFklkG4CcZKiPo1SfZYDJ7FwLll21fwROG E02XOkvvfnrefvmyC5zFs2TmZ4olu/Cl5H8mEgCOyJWN5RcB3geNOfgYqttGP2nSOeUIj M2EQQMBxGS+8A0hICsOS7FIozCSWgDeBP1U+DUtG8seoEDaY23nDOexyy6jRiEiTX+s2U UDx6JlcPtegCP1pyfsZd1Ls3lZ3XpyeGhjcPddqsZqFtFLPjSLoxa/VZPpTcLOTubGyD+ 95GZUEkdwkNQZY1+jKo5aWdP9zA8D7irt0PZ04yaTdNxRuAfO+igsKyVBskCxQMv5rxqm OnwLQ/SZ9PgR7QVDc+8RYD5lDxy45xLca5HnnRAG9XM6Cnntk31S7tU2OR6IVTaKUuc6I yYa2rS+0TXr6/QPhEYZzJLjl1fxsWors2HFWHsziwd/lB1cSEeu9BNk96OjDfgqE0tYN6 T06hcgF6PVJE8j8d101htB2nXj5KON8IlbT0tioZN6CmIzK3sX7M09Opy2dfF7rAksL+b 7KOvHIrys/CS6DORPGQ+RcB60etz0HpcSHDhVGBVQXHBkzPNv1JNZRDsjtbb4LkWObepC ghmncPoXeN3ktKfBmNtJxaAhDzHv3klKqjmZ8CIOGHu879eVZ6MYqMxfohzXNz0= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778707033; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=oqMIl3ImIBNcSHSKMRhcxFJ25v5N9fxZ+6J6hCoODDo=; b=a7VmKZk/8+rDyVZpGZ0qtTM8qrxYwdccYgVz87RmAGPICcfjN7GEJQDh04GsJhJleqIM dW77walFlT2At3F+14KTjPnSndLIXvYRZNamTmka9zKphhu075in2qzVMtNgpEXbTdyBY kJhKnzZbJ5V3B2yLXwcU63lz6MwoaoNnF4GhFCdkZdMHrO/L13dgMi+qSR9mihsNzatdR i5Vly00leQAS78CaLr8gd5FLJyo7ReQAIt1cxkDQtkdGuysDLtLNZ1Lcas3+bF5dJd+H4 KQOmOhvwfgqgzpxuwaNVzosSdy4cVy+D6ArNYheyrKEqkMHoialSiSskXw2t7qYQsy/Bk a+fzLf7/kwHo3alHb7oABZZebpi7j519dUV1RlL+wq/GtPs/aBv4xOsVotXmPdIiwuuwh V9huWFibMCQw1isyvGXbPchzdSMvQw83wa+O/jjKDfnDE6Wwy5PcFsDTSD4eHxlHdsLn2 aV+J4jbuY9xG5NWW0sHQD4z9SzqXNTqVqTjESr0xDZppEpbKiEn2HPVs8Fe0eRW96mIEo kDfBlP984QVsJEKsqQqUTE9KB8niZdT1TbxZkxTbNpNmUlVKmw56NrOKoWp2Zrxc+PIAV hl3MEih9xTC3hT5jkSELCEcL7Sm9TZQbNTmDvZWndF83NiR3k9UVoeRIWNmWnZo= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 13 May 2026 23:17:13 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH 1/5] x86/guest: rename a local variable In-Reply-To: References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> Message-ID: <010ae9668460c5a3a9705793713a976e@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778707033-8316D161-F136A303/0/0 X-purgate-type: clean X-purgate-size: 1098 On 2026-05-13 13:44, Jan Beulich wrote: > ... shadowing a file scope one, thuis violating Misra C:2012 rule 5.3 > ("An identifier declared in an inner scope shall not hide an identifier > declared in an outer scope"). No difference in generated code. > > Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini > --- a/xen/arch/x86/guest/xen/xen.c > +++ b/xen/arch/x86/guest/xen/xen.c > @@ -203,11 +203,11 @@ static void __init init_memmap(void) > > static void cf_check xen_evtchn_upcall(void) > { > - struct vcpu_info *vcpu_info = this_cpu(vcpu_info); > + struct vcpu_info *vi = this_cpu(vcpu_info); > unsigned long pending; > > - vcpu_info->evtchn_upcall_pending = 0; > - pending = xchg(&vcpu_info->evtchn_pending_sel, 0); > + vi->evtchn_upcall_pending = 0; > + pending = xchg(&vi->evtchn_pending_sel, 0); > > while ( pending ) > { -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Thu May 14 01:15:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 01:15:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308572.1579971 (Exim 4.92) (envelope-from ) id 1wNKfm-0008Q0-4A; Thu, 14 May 2026 01:15:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308572.1579971; Thu, 14 May 2026 01:15:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNKfl-0008Ps-VI; Thu, 14 May 2026 01:15:33 +0000 Received: by outflank-mailman (input) for mailman id 1308572; Thu, 14 May 2026 01:15:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNKfl-0008Pm-5c for xen-devel@lists.xenproject.org; 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dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778721330; bh=t5sjd5h7AhqCHvVTGxpv77qD10NFeCmZNyaIOsigFEo=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=XY/7cH7CDop3NhMxmyZz8HzJ7yo6jP8EL77u2LyCfOe+Xzn0DGVHhebivc1BfPg6W xXtsNpSMGDi775RwTcN8TNgLZDJA9JwUxE9sR/2mk4FyC46a8uwdSsT5aMnVlNprN+ O1RfQx1NV9UQl73zhWnZQfFdcEpr1p6ebaQAwlWrfBwJ5daN1mo9w+h7qb+kORgsiK sRCfZTNDPCY8VuS0V33cJ58/PLZEKIO1IJxord3N3lmIWJ4mw+6UJDk6o+obtp+WOX Tm5v2eBXfoGtQfhklh623ILwgdglZppI5uMvz/i1YMb1TxxJavC3npqdQAlKs/ovtg 2cdAzDtvhOBAw== Date: Wed, 13 May 2026 18:15:24 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Juergen Gross cc: xen-devel@lists.xenproject.org, Denis Mukhin , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk Subject: Re: [PATCH v2 1/4] xen/public: introduce DOMID_ANY In-Reply-To: <20260429120619.1013440-2-jgross@suse.com> Message-ID: References: <20260429120619.1013440-1-jgross@suse.com> <20260429120619.1013440-2-jgross@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; 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Since the pirq is not updated, the caller doesn't know that pirq won't fire - only old_pirq. For allocate_and_map_gsi_pirq(), the new pirq is still returned to the caller. I would expect old_pirq to be returned so the caller knows what to use. Am I missing something? Thanks, Jason From xen-devel-bounces@lists.xenproject.org Thu May 14 01:39:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 01:39:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308588.1579989 (Exim 4.92) (envelope-from ) id 1wNL2b-0003ur-W6; Thu, 14 May 2026 01:39:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308588.1579989; Thu, 14 May 2026 01:39:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNL2b-0003uk-Sy; Thu, 14 May 2026 01:39:09 +0000 Received: by outflank-mailman (input) for mailman id 1308588; Thu, 14 May 2026 01:39:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNL2a-0003ue-Jw for xen-devel@lists.xenproject.org; Thu, 14 May 2026 01:39:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNL2Z-004Ng9-Fp for xen-devel@lists.xenproject.org; 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d="scan'208";a="243228403" Date: Thu, 14 May 2026 09:38:03 +0800 From: kernel test robot To: Mauricio Faria de Oliveira Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev, xen-devel@lists.xenproject.org, Juergen Gross Subject: [xen-tip:linux-next 2/6] ld.lld: error: undefined symbol: __memset Message-ID: <202605140922.q7IlUv7o-lkp@intel.com> User-Agent: s-nail v14.9.25 X-purgate-ID: tlsNG-bad1c0/1778722746-41364A53-033F8F92/0/0 X-purgate-type: clean X-purgate-size: 1335 tree: https://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git linux-next head: 67d618348f8f1ce11b1d76f3303a28097f165ac9 commit: 99cf26a6143c22ee6c5b940a0e5e027a99e5524a [2/6] x86/asm, x86/boot: Expose inline memcmp config: x86_64-randconfig-005-20260514 (https://download.01.org/0day-ci/archive/20260514/202605140922.q7IlUv7o-lkp@intel.com/config) compiler: clang version 20.1.8 (https://github.com/llvm/llvm-project 87f0227cb60147a26a1eeb4fb06e3b505e9c7261) reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260514/202605140922.q7IlUv7o-lkp@intel.com/reproduce) If you fix the issue in a separate patch/commit (i.e. not just a new version of the same patch/commit), kindly add following tags | Reported-by: kernel test robot | Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ All errors (new ones prefixed by >>): >> ld.lld: error: undefined symbol: __memset >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:(__UNIQUE_ID_addressable___memset_0) -- >> ld.lld: error: undefined symbol: __memmove >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:(__UNIQUE_ID_addressable___memmove_1) -- 0-DAY CI Kernel Test Service https://github.com/intel/lkp-tests/wiki From xen-devel-bounces@lists.xenproject.org Thu May 14 05:08:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 05:08:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308649.1580013 (Exim 4.92) (envelope-from ) id 1wNOJ2-0000gT-Jp; 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arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Thu, 14 May 2026 07:08:17 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini Subject: Re: [PATCH 4/5] x86/shadow: split a nested max() invocation In-Reply-To: <146d214c-e766-4b3f-bc50-0b9beee50473@suse.com> References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> <146d214c-e766-4b3f-bc50-0b9beee50473@suse.com> Message-ID: <337dd83065dae7555dfecb2163241ead@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1778735298-3BF6A938-84558477/0/0 X-purgate-type: clean X-purgate-size: 2674 On 2026-05-13 13:46, Jan Beulich wrote: > Such nesting causes the inner instance to shadow the outer instance's > macro-local variables, thus violating Misra C:2012 rule 5.3 ("An > identifier declared in an inner scope shall not hide an identifier > declared in an outer scope"). Use an intermediate variable for the > inner invocation. No difference in generated code. > > Signed-off-by: Jan Beulich > --- > Supposedly this case is deviated (rules.rst). Does that deviation not > work > quite right? Actually, am I mis-reading deviations.ecl or is the > respective setting only covering the combination of min() and max(), > but > not multiple use of the same macro? Furthermore, why would e.g. > min(max_t(), ...) need a deviation? Even more generally, aren't those > expressions too permissive? Yeah, it does cover only mixing max(_t)?/min(_t)? because that was the only pattern that emerged in the safety scope originally. the _t is not there for mixing e.g. min(max_t(...), ...) but rather for min_t(max_t(...), ...) and viceversa; could be split if you think it's worth it. These expressions are a tad broad, because it's way more complicated to express the condition: "ignore overlapping only beetween identifiers defined in the expansion of max/min when used together". Perhaps it could be done, but then if you are already implicitly using shadowing in those instances maybe that's not as serious a concern? In any case, the patch looks ok to me, so Reviewed-by: Nicola Vetrini > > --- a/xen/arch/x86/mm/shadow/common.c > +++ b/xen/arch/x86/mm/shadow/common.c > @@ -767,11 +767,12 @@ static unsigned int sh_min_allocation(co > * megabyte of RAM (for the p2m table, minimally enough for HVM's > setting > * up of slot zero and an LAPIC page), plus one for HVM's 1-to-1 > pagetable. > */ > + unsigned int extra = max(domain_tot_pages(d) / 256, > + is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + > 2 : 0U) + > + is_hvm_domain(d); > + > return shadow_min_acceptable_pages(d) + > - max(max(domain_tot_pages(d) / 256, > - is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0U) + > - is_hvm_domain(d), > - d->arch.paging.p2m_pages); > + max(extra, d->arch.paging.p2m_pages); > } > > int shadow_set_allocation(struct domain *d, unsigned int pages, bool > *preempted) -- Nicola Vetrini, B.Sc. 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Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1778735611-AB563161-AFF1F1CB/0/0 X-purgate-type: clean X-purgate-size: 1367 On 2026-05-13 13:48, Jan Beulich wrote: > ... ("A `typedef' name shall be a unique identifier"). Much like > already > done for guest_intpte_t and guest_l[12]e_t, but limited to > shadow/multi.c. > > Signed-off-by: Jan Beulich Reviewed-by: Nicola Vetrini > > --- a/automation/eclair_analysis/ECLAIR/deviations.ecl > +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl > @@ -143,6 +143,11 @@ number of guest paging levels." > > -config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(file(^xen/arch/x86/include/asm/guest_pt\\.h$)))&&any_area(any_loc(text(^.*(guest_intpte_t|guest_l[12]e_t).*$)))"} > -doc_end > > +-doc_begin="In x86 shadow code, the type \"guest_va_t\" is > deliberately defined > +multiple times, depending on the number of guest paging levels." > +-config=MC3A2.R5.6,reports+={deliberate,"any_area(any_loc(file(^xen/arch/x86/mm/shadow/multi\\.c$)))&&any_area(any_loc(text(^.*guest_va_t.*$)))"} > +-doc_end > + > -doc_begin="The following files are imported from the gnu-efi > package." > -file_tag+={adopted_r5_6,"^xen/include/efi/.*$"} > -file_tag+={adopted_r5_6,"^xen/arch/.*/include/asm/.*/efibind\\.h$"} -- Nicola Vetrini, B.Sc. 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1778743195-E2F72CF5-4C41460D/10/73395122804 X-purgate-type: spam X-purgate-size: 1920 On 5/13/26 1:16 PM, Orzel, Michal wrote: > > > On 13-May-26 13:14, Orzel, Michal wrote: >> >> >> On 07-May-26 10:58, Oleksii Kurochko wrote: >>> The IPA terminology is Arm-specific, so rename p2m_ipa_bits to >>> p2m_gpa_bits to use architecture-neutral naming in >>> xen/common/device-tree/ code. >>> >>> No functional changes. >>> >>> Reported-by: Jan Beulich >>> Signed-off-by: Oleksii Kurochko >>> Reviewed-by: Luca Fancellu >>> --- >>> Changes in v5: >>> - Rephraze commit subject. >>> - Reviewed-by: Luca Fancellu . >>> --- >>> Changes in v4: >>> - Nothing changed only rebase. >>> --- >>> Changes in v3: >>> - Introduce #define p2m_gpa_bits p2m_ipa_bits for Arm instead of >>> renaming of p2m_ipa_bits to p2m_gpa_bits to keep Arm part of >>> changes clearer and keep using Arm-specific terminolgy inside >>> Arm code. >>> --- >>> Changes in v2: >>> - New patch. >>> --- >>> --- >>> xen/arch/arm/include/asm/p2m.h | 2 ++ >>> xen/common/device-tree/domain-build.c | 2 +- >>> 2 files changed, 3 insertions(+), 1 deletion(-) >>> >>> diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h >>> index 010ce8c9ebbd..7957dbd96e57 100644 >>> --- a/xen/arch/arm/include/asm/p2m.h >>> +++ b/xen/arch/arm/include/asm/p2m.h >>> @@ -14,6 +14,8 @@ >>> /* Holds the bit size of IPAs in p2m tables. */ >>> extern unsigned int p2m_ipa_bits; >>> >>> +#define p2m_gpa_bits p2m_ipa_bits >> This deserves the comment e.g.: >> /* Common-code alias; ARM keeps the IPA spelling internally */ >> >> With that: >> Acked-by: Michal Orzel Thanks! > Forgot to mention that I'm ok to do this change on commit (patches 1-5 are ready > from this series). I would be happy with that. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu May 14 07:23:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 07:23:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308687.1580062 (Exim 4.92) (envelope-from ) id 1wNQPW-0003eP-DV; Thu, 14 May 2026 07:23:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308687.1580062; Thu, 14 May 2026 07:23:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNQPW-0003eI-9h; Thu, 14 May 2026 07:23:10 +0000 Received: by outflank-mailman (input) for mailman id 1308687; Thu, 14 May 2026 07:23:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wNQPV-0003eC-79 for xen-devel@lists.xenproject.org; Thu, 14 May 2026 07:23:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNQPU-00CT8O-Gg for xen-devel@lists.xenproject.org; Thu, 14 May 2026 09:23:08 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a05782e-bab6-0a2a0a5309dd-0a2a4504cc26-38 for ; Thu, 14 May 2026 09:23:08 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a05785c-1dec-0a2a45040019-d155802ee8a9-3 for ; Thu, 14 May 2026 09:23:08 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-488ff90d6c7so67186115e9.2 for ; Thu, 14 May 2026 00:23:08 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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AFNElJ+otTynajBR5RjdZqExrP00zKFNL6OJrzm+y3oIjXW7dX5tiQBa+NPkB9cjLsr4auX3xtJ1zwvx4gc=@lists.xenproject.org X-Gm-Message-State: AOJu0Yw2fM2a2q5Ia9ZeMYfTE4/+krKlu7WeeBeSiOUjfvbfevU29aPT V4ZfGiBV0BBW/in7NFg9D3U89+45LS1WhhTvnJLMf3FXc9fSyrPZFafP X-Gm-Gg: Acq92OFwx7jMih9Ykd907hF6aAYCfolMhV7qUAS+w4JQj5miDYaRhUo7XUWjjtlwNjp O7mSRd3DVnC0RO2emPGFiXOTRup93O2UNRisDIWLjNdcbGDBHn23XiB30oGMqMlU6tPNj95drVr 00T4TeNwbGIs3lMTvTD8O7Opyvs7cg1+wktmwE6Y4dUzCtGBVj7CuWXTR/maSqfz/cN+jDgZ5gy OrGabpH+IA2rVejHtWlFPHp/Y8ut8UVp6xFI0LEdDodH92d0Qg6d9dYX5G0iNbYZecM+KOiFWAi VkLGMifyaVHDRsw/9pbQd6lgm7ufn7rfReXVNZfRze7HcQL68CyWuVnNcgS/ZgowHxDbg+JpTGr CC7ttjwscGZzlDzjLxBjd1cffn3tI3E0ZM7gygGbqg3vjnBUYcdLO8VEzIQ4c1nNag7owl09FMg cU6CM7JHt4JwidSc0i9cdKfa0n9SijQkklxEGu8ydCc69FpsfEvkh6Of5RecWnK9k64fd2DwYv1 O2yein5LHhgGg== X-Received: by 2002:a05:600c:34d6:b0:48a:79d8:a8d6 with SMTP id 5b1f17b1804b1-48fd635049amr779655e9.7.1778743627246; Thu, 14 May 2026 00:27:07 -0700 (PDT) Message-ID: Date: Thu, 14 May 2026 09:27:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 1/5] x86/time: use RTC century byte when available To: Jan Beulich , "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: <2723456f-5d8c-4a2a-9876-e65d35579936@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778743627-23175C48-3A017615/10/73395122804 X-purgate-type: spam X-purgate-size: 1635 On 5/12/26 4:58 PM, Jan Beulich wrote: > Without this the present logic will misbehave from 2070 onwards. > > Signed-off-by: Jan Beulich Generally it looks like 4.22 won't be used in 2070 or higher (I am curious do we have similar use cases now that very old Xen version is used nowadays?) but the patch looks pretty straightforward: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii > > --- a/xen/arch/x86/time.c > +++ b/xen/arch/x86/time.c > @@ -1257,6 +1257,7 @@ struct rtc_time { > static bool __get_cmos_time(struct rtc_time *rtc) > { > s_time_t start, t1, t2; > + unsigned int century = 0; > unsigned long flags; > > spin_lock_irqsave(&rtc_lock, flags); > @@ -1280,6 +1281,8 @@ static bool __get_cmos_time(struct rtc_t > rtc->day = CMOS_READ(RTC_DAY_OF_MONTH); > rtc->mon = CMOS_READ(RTC_MONTH); > rtc->year = CMOS_READ(RTC_YEAR); > + if ( acpi_gbl_FADT.century && acpi_gbl_FADT.century < 0x80 ) > + century = CMOS_READ(acpi_gbl_FADT.century); > > if ( RTC_ALWAYS_BCD || !(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) ) > { > @@ -1293,7 +1296,12 @@ static bool __get_cmos_time(struct rtc_t > > spin_unlock_irqrestore(&rtc_lock, flags); > > - if ( (rtc->year += 1900) < 1970 ) > + if ( century ) > + { > + BCD_TO_BIN(century); > + rtc->year += century * 100; > + } > + else if ( (rtc->year += 1900) < 1970 ) > rtc->year += 100; > > return t1 <= SECONDS(1) && t2 < MILLISECS(3); > From xen-devel-bounces@lists.xenproject.org Thu May 14 08:26:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 08:26:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308728.1580099 (Exim 4.92) (envelope-from ) id 1wNROr-0005Ml-JF; Thu, 14 May 2026 08:26:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308728.1580099; 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> old_pirq = domain_irq_to_pirq(d, irq); > > if ( (old_irq > 0 && (old_irq != irq) ) || > (old_pirq && (old_pirq != pirq)) ) > { > dprintk(XENLOG_G_WARNING, > "dom%d: pirq %d or irq %d already mapped (%d,%d)\n", > d->domain_id, pirq, irq, old_pirq, old_irq); > return 0; > } > > Why do we return 0 instead of -EEXIST? Since the pirq is not updated, the > caller doesn't know that pirq won't fire - only old_pirq. For > allocate_and_map_gsi_pirq(), the new pirq is still returned to the caller. > I would expect old_pirq to be returned so the caller knows what to use. Am > I missing something? Looking at bfc341a65cfb2 it seems like this might have been an attempt to keep the previous logic in ioapic_guest_write() that didn't return an error when attempting to add/move an in use IRQ, while switching ioapic_guest_write() to use map_domain_pirq()? The commit description is not very helpful sadly. I think the mention of "And this patch also makes broken NetBSD dom0 work again." is relevant. AFAICT NetBSD will do PHYSDEVOP_apic_read -> modify RTE (ie: set mask bit for example) -> PHYSDEVOP_apic_write. However the semantics of those hypercalls is not symmetric. PHYSDEVOP_apic_read will return the vector used by Xen in the RTE, while PHYSDEVOP_apic_write expects the vector field of the RTE to contain the pIRQ. I think this is why map_domain_pirq() was adjusted in such a weird way, to ignore requests with bogus pIRQs and still succeed, so that PHYSDEVOP_apic_write would also succeed. Ideally the interface should have been adjusted so that read/modify/write cycles using PHYSDEVOP_apic_{read,write} would work as expected (iow: PHYSDEVOP_apic_read should have returned the pIRQ in the vector field). In the context of GSIs, I think we aim for Xen to always identity map them (so IRQ == pIRQ), but there might be (or might have been) hypercalls that could allow you to create non-identity mappings between GSIs and pIRQs. Explicitly looking at allocate_and_map_gsi_pirq() do you know what causes the domain_irq_to_pirq() in allocate_pirq() to not return the already allocated pIRQ that matches the passed IRQ? Overall we should likely adjust map_domain_pirq() to return -EEIXST, and then fix ioapic_guest_write() to shallow such error so we can keep the current behavior for that specific interface. Regards, Roger. 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Thu, 14 May 2026 01:41:49 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Thu, 14 May 2026 11:41:37 +0300 X-Gm-Features: AVHnY4I0gUvzQQ-_qHdTa0hzEHhPjCzUk3TSOa0yP8AT7mJJff5njkcTSwduex8 Message-ID: Subject: Re: [PATCH v9 03/13] xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1778748110-4066C938-535ADEF6/0/0 X-purgate-type: clean X-purgate-size: 4492 Hi Luca, Thank you for the review. On Wed, May 13, 2026 at 5:53=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 12 May 2026, at 18:07, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > PSCI does not guarantee that a GICv3 redistributor is powered down acro= ss > > CPU_OFF -> CPU_ON. > > > > DEN0022F.b says CPU_OFF powers down the calling core (5.5) and CPU_ON > > brings the core back with a defined initial CPU state (5.6, 6.4). > > However, PSCI leaves interrupt migration and GIC re-initialization to t= he > > supervisory software/firmware stack: the caller must migrate interrupts > > away before CPU_OFF (5.5.2), and the execution context that is lost in = a > > powerdown state must be saved and restored by software (6.8). PSCI also > > calls out GIC management explicitly in 6.8, including retargeting SPIs, > > preventing PPIs/SGIs from targeting a powered down CPU, and reinitializ= ing > > the CPU interface after CPU_ON. > > > > This matches the GIC architecture. IHI0069H.b Chapter 11.1 requires the= PE > > and CPU interface to share a power domain, but explicitly allows the > > associated redistributor, distributor, and ITS to remain powered while = the > > PE and CPU interface are off. All other GIC power-management behavior i= s > > IMPLEMENTATION DEFINED. DEN0050D Chapter 4.2, "Generic Interrupt > > Controller (GIC)", says the GICv3 redistributor may live either in the = AP > > core power domain or in a relatively always-on parent domain. So after > > CPU_OFF -> CPU_ON a secondary CPU can legitimately come back to a live > > redistributor with GICR_CTLR.EnableLPIs still set. > > > > Handle that case in the LPI setup path instead of assuming a fully rese= t > > redistributor. > > > > The LPI path needs special care because the GIC spec makes redistributo= r > > LPI state sticky and partially implementation defined. IHI0069H.b 5.1.1 > > and 5.1.2 say that changing GICR_PROPBASER or GICR_PENDBASER while > > GICR_CTLR.EnableLPIs =3D=3D 1 is UNPREDICTABLE. After clearing EnableLP= Is, > > software must wait for GICR_CTLR.RWP =3D=3D 0 before touching the pendi= ng > > table. The architecture also permits implementations where, once > > EnableLPIs has been set, clearing it again is not guaranteed to work. > > Where an ITS is present, the spec strongly recommends moving LPIs to > > another redistributor before clearing EnableLPIs. > > > > Because of that, treat a retained EnableLPIs state as valid when the > > redistributor still points at Xen's expected PROPBASER/PENDBASER tables= . > > Only try to clear EnableLPIs when the retained configuration does not > > match Xen's state, and wait for RWP before reprogramming the tables. > > > > This is also consistent with platform firmware reality: PSCI and the GI= C > > architecture allow platform-specific redistributor power handling, and = not > > all platform firmware implementations force a full redistributor power-= off > > through implementation-defined controls during CPU_OFF. Xen therefore n= eeds > > to tolerate retained redistributor state on secondary CPU bring-up. > > > > Keep gicv3_populate_rdist() resident as well, because gicv3_cpu_init() > > reuses it on secondary CPU bring-up after init. > > > > Tested using Xen's non-boot CPU disable/enable path on Arm > > FVP_Base_RevC-2xAEMvA, both with and without: > > -C gic_distributor.allow-LPIEN-clear=3D1 > > -C gic_distributor.GICR-clear-enable-supported=3D1 > > and on Orange Pi 5. > > > > Signed-off-by: Mykola Kvach > > --- > > I understand you will send a separate patch to fix RWP. > > Looks ok to me, I see you=E2=80=99ve touched some printk in gicv3_populat= e_rdist() which > were wrongly having %d for smp_processor_id(), sometimes maintainers are = not > really ok with that when the changes are not related to the commit, but a= part from that: That change was intentional. In the previous version of this series, you pointed out the wrong format specifier for smp_processor_id() in one of these printk()s. Although it was not directly related to the functional change in this patch, I decided to fix the other similar occurrences in gicv3_populate_rdist() as well, for consistency. > > Reviewed-by: Luca Fancellu > > Cheers, > Luca > > Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Thu May 14 09:10:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 09:10:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308755.1580116 (Exim 4.92) (envelope-from ) id 1wNS5W-0004cW-WE; Thu, 14 May 2026 09:10:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308755.1580116; Thu, 14 May 2026 09:10:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNS5W-0004cP-Ta; Thu, 14 May 2026 09:10:38 +0000 Received: by outflank-mailman (input) for mailman id 1308755; Thu, 14 May 2026 09:10:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNS5W-0004cJ-9M for xen-devel@lists.xenproject.org; Thu, 14 May 2026 09:10:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNS5V-005B0q-MJ for xen-devel@lists.xenproject.org; Thu, 14 May 2026 11:10:37 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a05917a-5cb7-0a2a0a5109dd-0a2a4501b2c4-38 for ; Thu, 14 May 2026 11:10:37 +0200 Received: from [209.85.167.49] (helo=mail-lf1-f49.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a05918d-c1f2-0a2a45010019-d155a731f05e-3 for ; Thu, 14 May 2026 11:10:37 +0200 Received: by mail-lf1-f49.google.com with SMTP id 2adb3069b0e04-5a85b30dd54so7717652e87.2 for ; Thu, 14 May 2026 02:10:37 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.26.18]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5a90f11a7a0sm342068e87.24.2026.05.14.02.10.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 02:10:36 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1778749837; x=1779354637; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=UEnvo9OmaIrifU4IF1NjzdEIguWJngIg2w/0p8PT3os=; b=qzai1i5DRdf851JTfRhiRMDgRqN90YY3Q31iosIbC01pt3rMnERgAk86QxAT7JGP9s ZjT5a0UrszQswsGFtRVfwqGOOq56vP/Qq/KeUFZaSVqPBE6SGdyQITFycWvZ3/nP7ffJ hnBFiPq//jMUJUd2MPaOSEITKyDr5/3bCtv5WQoznQ3Fq4/2w1+1YWPVTeqf7GPzU3Xq K8ubY3a1rFtFRarUwVgVg2XY/7lNOcyg5Mb+Xb+3lyFYPjNZ4V2BxkuDoewm5/WZ+Ohw 7tcMTqmJYOgDXKPqGGiey5RgChUTzhDfznjHQh2lwVRpnhZ0p/a2uVHU6kscV05sSINh /Cgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778749837; x=1779354637; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=UEnvo9OmaIrifU4IF1NjzdEIguWJngIg2w/0p8PT3os=; b=YDp+rUz48UBbIBhN8IGbEZRElwuRc8gde9cQrYIYw6Arnzj6C9P2rbqX59+g5f4pF4 x4+UdOksOiXChAf66xIz/NNPA97dKznB9UsaYBpGScziFRmhnqRykKfumuZsvNmXeRb8 iQXSdp792zshb5TCDKbdwC7rrTkp1fyCid0WsY9myWRlUrKMEVhPKt1vLOJzkNgHnZXg rjd2WxefDI+VCGWnV20nkr9/m3aV89tZqgxl751D8BCpBCMS9Bj1RWwakwpri2HKhEPt hOa0JFgnBbWNZcZWWqoXs7vimaiAdnllL9Th1/kpfkz3YVLxwiPfqUx0EHSlmCYiXzzn B+tA== X-Gm-Message-State: AOJu0YwUN0xx2ROmQUhCYwdii2K3hu8G2EMxdXyR7Zx9iHejAOpUzls1 pUclab3vVOyJHLcn8wfpcEKEo3SpF96O/XbxQd8JVvhUH53w3lnmSV+b8k3anw== X-Gm-Gg: Acq92OHAoi0sSDgIrlii6uAKKFOC1HLOZA+jd8Y139QGODcsxSZQmWSscatpw0Pf1hl dBGczDH/AQfzuDqyd9Ao14hEaFc+J8Siuv9zZlg+JV3Sp9N2fM0twcN29c+IOwc53l6+gw5+Xeh BpdIvzNltPVIsM/uy4NEaFHyap1kN1j1OIASpHyBpEpL37t380K1J52oWV3TSwzU96HZooKTPfT Dqkrmgd/hvu0sStcwFeQ7l681oKvy8MJZhtHTPO+La08Nd8LQhPYu0QcQqHJAKVTknACcZ0FWWA gKtT75ClNReYIrPzlVQonc2wnUc/Tsw/3NV/g/E/m2S32w2klOAWtgxsUGI+Y+cHq4eqN66PFyq aVSnjEZa8mwekvlnfHm2MXg2KBmBT1ScmcygZ/N+0xtfGuKc/lUvwdWlnIeWldgshErDQec1GCN 6WxzRcwch/7qziY4mTTd4OdO1eYw== X-Received: by 2002:a05:6512:3186:b0:5a8:6931:ddea with SMTP id 2adb3069b0e04-5a8f37c31d9mr2050765e87.3.1778749836559; Thu, 14 May 2026 02:10:36 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Fancellu Subject: [PATCH] xen/arm: gic-v3: Wait for redistributor RWP using the right bit Date: Thu, 14 May 2026 12:08:13 +0300 Message-ID: <0fc5e4d297b8dde66ea36be3ebd60a68dea2562d.1778749474.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778749837-B6342FF4-3695D959/0/0 X-purgate-type: clean X-purgate-size: 2933 From: Mykola Kvach gicv3_do_wait_for_rwp() is used for both distributor and redistributor writes. The CTLR register is at offset 0 for both, but the RWP bit is not in the same position. For GICD_CTLR, RWP is bit 31. For GICR_CTLR, bit 31 is UWP, while RWP is bit 3. The redistributor wait path was therefore polling UWP instead of RWP. UWP covers upstream writes, including Generate SGI packets, and is not a substitute for redistributor register write completion. The existing redistributor callers need RWP semantics for redistributor register writes such as GICR_ICENABLER0 and GICR_CTLR updates. Add GICR_CTLR_RWP and pass the expected RWP bit to the shared helper. Fixes: bc183a0235e ("xen/arm: Add support for GIC v3") Reported-by: Luca Fancellu Signed-off-by: Mykola Kvach --- xen/arch/arm/gic-v3.c | 14 +++++++++----- xen/arch/arm/include/asm/gic_v3_defs.h | 1 + 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9..dfd5d44603 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -274,16 +274,20 @@ static void gicv3_enable_sre(void) isb(); } -/* Wait for completion of a distributor change */ -static void gicv3_do_wait_for_rwp(void __iomem *base) +/* Wait for completion of a distributor/redistributor change */ +static void gicv3_do_wait_for_rwp(void __iomem *base, uint32_t rwp_bit) { uint32_t val; bool timeout = false; s_time_t deadline = NOW() + MILLISECS(1000); do { + /* + * GICD_CTLR and GICR_CTLR are both at offset 0, so this is + * valid for either a distributor or redistributor base. + */ val = readl_relaxed(base + GICD_CTLR); - if ( !(val & GICD_CTLR_RWP) ) + if ( !(val & rwp_bit) ) break; if ( NOW() > deadline ) { @@ -300,12 +304,12 @@ static void gicv3_do_wait_for_rwp(void __iomem *base) static void gicv3_dist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD); + gicv3_do_wait_for_rwp(GICD, GICD_CTLR_RWP); } static void gicv3_redist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD_RDIST_BASE); + gicv3_do_wait_for_rwp(GICD_RDIST_BASE, GICR_CTLR_RWP); } static void gicv3_wait_for_rwp(int irq) diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/asm/gic_v3_defs.h index c373b94d19..3714cfeb7d 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -146,6 +146,7 @@ #define GICR_NSACR (0x0E00) #define GICR_CTLR_ENABLE_LPIS (1U << 0) +#define GICR_CTLR_RWP (1U << 3) #define GICR_TYPER_PLPIS (1U << 0) #define GICR_TYPER_VLPIS (1U << 1) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 14 10:18:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 10:18:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308774.1580127 (Exim 4.92) (envelope-from ) id 1wNT8i-0005Ue-Os; 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Suggested-by: Jan Beulich Signed-off-by: Nicola Vetrini --- Pipeline: https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2524548198 A significant reduction in wallclock time can be seen for both arm64 and x86_64 jobs, with no impact on correctness as far as I'm aware. --- automation/eclair_analysis/ECLAIR/analysis.ecl | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl b/automation/eclair_analysis/ECLAIR/analysis.ecl index 399099938f..ec37f7eff5 100644 --- a/automation/eclair_analysis/ECLAIR/analysis.ecl +++ b/automation/eclair_analysis/ECLAIR/analysis.ecl @@ -34,6 +34,13 @@ their Standard Library equivalents." -doc_end +-doc_begin="Do not analyze intermediate linking artifacts, as they do not differ from their final +counterparts for the purposes of MISRA C static analysis." +-file_tag+={xen_efi, "^xen/\\.xen\\.efi\\..*$"} +-file_tag+={xen_syms, "^xen/\\.xen-syms\\.[0-9]+$"} +-frames+={hide, "kind(program)&&target(xen_syms||xen_efi)"} +-doc_end + -eval_file=toolchain.ecl -eval_file=public_APIs.ecl -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 14 10:39:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 10:39:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308787.1580134 (Exim 4.92) (envelope-from ) id 1wNTSt-0000Cz-AW; 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Yes, a very nice improvement.  I suspect this wants backporting to stable trees too? > --- > automation/eclair_analysis/ECLAIR/analysis.ecl | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl b/automation/eclair_analysis/ECLAIR/analysis.ecl > index 399099938f..ec37f7eff5 100644 > --- a/automation/eclair_analysis/ECLAIR/analysis.ecl > +++ b/automation/eclair_analysis/ECLAIR/analysis.ecl > @@ -34,6 +34,13 @@ their Standard Library equivalents." > > -doc_end > > +-doc_begin="Do not analyze intermediate linking artifacts, as they do not differ from their final > +counterparts for the purposes of MISRA C static analysis." > +-file_tag+={xen_efi, "^xen/\\.xen\\.efi\\..*$"} > +-file_tag+={xen_syms, "^xen/\\.xen-syms\\.[0-9]+$"} > +-frames+={hide, "kind(program)&&target(xen_syms||xen_efi)"} > +-doc_end Why the difference in suffix in the regex?  Slightly rhetorical because it's the full link address so includes an x for 0x. But, the two regexs for suffixes really ought to be the same, so I suppose we should exclude .* for xen_syms too? For the sake of clarity, do the names xen_efi and xen_syms want a _tmp or _intermediate suffix, just to make things a bit clearer? ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 14 11:01:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 11:01:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308804.1580143 (Exim 4.92) (envelope-from ) id 1wNToN-0004TX-1L; Thu, 14 May 2026 11:01:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308804.1580143; Thu, 14 May 2026 11:01:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNToM-0004TQ-Uj; Thu, 14 May 2026 11:01:02 +0000 Received: by outflank-mailman (input) for mailman id 1308804; Thu, 14 May 2026 11:01:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNToL-0004TK-Ov for xen-devel@lists.xenproject.org; Thu, 14 May 2026 11:01:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNToJ-00EpDi-KA for xen-devel@lists.xenproject.org; Thu, 14 May 2026 13:01:01 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a05ab69-bab6-0a2a0a5309dd-0a2a4503d834-6 for ; Thu, 14 May 2026 13:01:00 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a05ab6c-672d-0a2a45030019-a237832faf26-3 for ; Thu, 14 May 2026 13:01:00 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 58F8D4EE3CE8; Thu, 14 May 2026 13:01:00 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778756460; b=H4x0u1M9tDXeYElNzOQZMagbtThZjRMQhg7WNxksOsvzSDNt1puMzAO5j8eKp583raYW 3/d8Fxy65ZnA57zNvmhx8mLqKxo5ELNSISKPvHE/SJp3E0nXU3HdcZ5h0JSTT/sq3rJSt sIeiGpKmG8vtpjHHSS3Yed8vyLf1cWmqbqRcz3YtVcKgieLa99b1n++IKHe92pPWik+uZ tSYli/zZ0TrCWMGf8GLwyvmYq8wlyBFdCX1M02Ao1cIT9o16VW9eCOmRMA8eemboy7u88 jzDJrjrnSRRTv6l2T+gzpWOnwYUHC8jFfivWJfdmnws3zbfc/eEFtpny3vh/QaYJ6gsOU Q5nSkE/FdBcNJLhRxOq4sXYwx8unlHtQhkwARJzeiQuPCkA5V1IxBVQv9xsocizO32E/q sN3IJDomX1ckhQqUzu+N7FMkO9YOPTh4IW0q6tSNV2wffLcAurf+eZM3MCxPnXzusr9t6 incGSYogPbJsCYHL54m7moL1FZ/51VxTf82L/f39/pazX9unyBVhe/MZh5ryit9T/+EEm /sAGV9I4RU5y6N+lsyWjuCPkj78wXQYSoX8XirkhuoE9bEhmpJ0DxoCPl++GHRdkZmfqv CDhc8s+3KglE/hsxaHQdKYHs7rR1iBQkmwKfWxIy+97Pds4iqwjl4wzDof+UPZ8= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778756460; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=tfMIkDemM21Bsz0R+H4Mx1AnYK7jBKKPtAey5obr0c0=; b=ZbfG55/QOjCronYXqzW5IOrhx3iNhBHnYZHJYDWGZmoRycmN1VX+0AeGlSwahb5kDE1Z jqnQAjdNvQ9o7eevCNIv0rp/5goNoS/pgsNW7Rez1QiwWLC8w8wTVmBWQlHOaFfGLd2OQ cIdVSorXwZoD3xjkRvS/x1NLM7wFZXNkGcjTeILnOI6q9uZBwY0ddvYDeW1cUdairA63y oCaxCIG8O561GT4gdoAoj4Yw+a01h9pyUBE8nKy+Vpw/6kkhV/rf9jU9Ns1BMn9Y/c3rC KMIy9wY7M5/5ppEqv87nP6IsRyLnjwNRD1qln9maNvVwKjgJGEiuUIPpyUMGynCO+T/fE ZLl5QQZm/VHVOqXGtQ1WKppBdPVpa+XOa2vdz5oeJO+fpjvwyn/cNYXKva9fjkewpkhPN QXeE2+zu+sS4KurHyOnJVy2hR50ewQMQ1qA/gjvpeFkCfYnBINm88hbify5NaAJ2w31zh aaqpJiA5KEs+pXzgjB9QsxZ6eMRqZ10YqhIG5Z0AXxO4qRzJU4JIq20JoVFSB3u3RkQBZ xU7PARbH5XVfHQcA6P7M64SHSYLugee8hHa5GRSepfxA5OE8Oytw59k0m9VSu0TML5+dH 4bgOQk16tryq2XGKwiogKFy43s3O1UXtZS2vNWQyGxJEkOMpLgZTc95zMJzJU5c= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Thu, 14 May 2026 13:01:00 +0200 From: Nicola Vetrini To: Andrew Cooper Cc: Nicola Vetrini , xen-devel@lists.xenproject.org, consulting@bugseng.com, Doug Goldstein , Stefano Stabellini , Jan Beulich Subject: Re: [PATCH] ci: ECLAIR: avoid intercepting intermediate linking steps In-Reply-To: References: Message-ID: X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778756460-38776938-885D0E8C/0/0 X-purgate-type: clean X-purgate-size: 2289 On 2026-05-14 12:38, Andrew Cooper wrote: > On 14/05/2026 11:16 am, Nicola Vetrini wrote: >> From: Nicola Vetrini >> >> These do not add any value to the analysis other than duplicating some >> reports >> in whole-program analysis, as the intermediate linking steps are only >> used to >> build the symbol table. >> >> Suggested-by: Jan Beulich >> Signed-off-by: Nicola Vetrini >> --- >> Pipeline: >> https://gitlab.com/xen-project/people/bugseng/xen/-/pipelines/2524548198 >> >> A significant reduction in wallclock time can be seen for both arm64 >> and x86_64 jobs, >> with no impact on correctness as far as I'm aware. > > Yes, a very nice improvement.  I suspect this wants backporting to > stable trees too? > Perhaps. Is the rate of analysis significant there? >> --- >> automation/eclair_analysis/ECLAIR/analysis.ecl | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl >> b/automation/eclair_analysis/ECLAIR/analysis.ecl >> index 399099938f..ec37f7eff5 100644 >> --- a/automation/eclair_analysis/ECLAIR/analysis.ecl >> +++ b/automation/eclair_analysis/ECLAIR/analysis.ecl >> @@ -34,6 +34,13 @@ their Standard Library equivalents." >> >> -doc_end >> >> +-doc_begin="Do not analyze intermediate linking artifacts, as they do >> not differ from their final >> +counterparts for the purposes of MISRA C static analysis." >> +-file_tag+={xen_efi, "^xen/\\.xen\\.efi\\..*$"} >> +-file_tag+={xen_syms, "^xen/\\.xen-syms\\.[0-9]+$"} >> +-frames+={hide, "kind(program)&&target(xen_syms||xen_efi)"} >> +-doc_end > > Why the difference in suffix in the regex?  Slightly rhetorical because > it's the full link address so includes an x for 0x. > > But, the two regexs for suffixes really ought to be the same, so I > suppose we should exclude .* for xen_syms too? > Fine with me. > For the sake of clarity, do the names xen_efi and xen_syms want a _tmp > or _intermediate suffix, just to make things a bit clearer? > Ack -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Thu May 14 11:04:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 11:04:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308811.1580153 (Exim 4.92) (envelope-from ) id 1wNTrr-00051P-Go; Thu, 14 May 2026 11:04:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1308811.1580153; Thu, 14 May 2026 11:04:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNTrr-00051I-Bz; Thu, 14 May 2026 11:04:39 +0000 Received: by outflank-mailman (input) for mailman id 1308811; Thu, 14 May 2026 11:04:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNTrq-00051C-3P for xen-devel@lists.xenproject.org; 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Message-ID: <26ec207d-0053-4505-b62b-351fe6cb8f15@citrix.com> Date: Thu, 14 May 2026 12:04:29 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Nicola Vetrini , xen-devel@lists.xenproject.org, consulting@bugseng.com, Doug Goldstein , Stefano Stabellini , Jan Beulich Subject: Re: [PATCH] ci: ECLAIR: avoid intercepting intermediate linking steps To: Nicola Vetrini References: Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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Is the rate of analysis significant there? Security content drops on all trees at once.  Even shaving 5 minutes per tree (and it's more than that) makes a half our improvement in wallclock time for CI to complete. > >>> --- >>>  automation/eclair_analysis/ECLAIR/analysis.ecl | 7 +++++++ >>>  1 file changed, 7 insertions(+) >>> >>> diff --git a/automation/eclair_analysis/ECLAIR/analysis.ecl >>> b/automation/eclair_analysis/ECLAIR/analysis.ecl >>> index 399099938f..ec37f7eff5 100644 >>> --- a/automation/eclair_analysis/ECLAIR/analysis.ecl >>> +++ b/automation/eclair_analysis/ECLAIR/analysis.ecl >>> @@ -34,6 +34,13 @@ their Standard Library equivalents." >>> >>>  -doc_end >>> >>> +-doc_begin="Do not analyze intermediate linking artifacts, as they >>> do not differ from their final >>> +counterparts for the purposes of MISRA C static analysis." >>> +-file_tag+={xen_efi, "^xen/\\.xen\\.efi\\..*$"} >>> +-file_tag+={xen_syms, "^xen/\\.xen-syms\\.[0-9]+$"} >>> +-frames+={hide, "kind(program)&&target(xen_syms||xen_efi)"} >>> +-doc_end >> >> Why the difference in suffix in the regex?  Slightly rhetorical because >> it's the full link address so includes an x for 0x. >> >> But, the two regexs for suffixes really ought to be the same, so I >> suppose we should exclude .* for xen_syms too? >> > > Fine with me. > >> For the sake of clarity, do the names xen_efi and xen_syms want a _tmp >> or _intermediate suffix, just to make things a bit clearer? >> > > Ack > Ok, I'll fix up on commit.  Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu May 14 13:07:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 13:07:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1308894.1580167 (Exim 4.92) (envelope-from ) id 1wNVm9-000614-GP; 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When multiple cores / > threads are present (and to come back online) in a package, for package > scope MSRs this may be covered by APs doing the writes, but we can't rely > on that. > > Signed-off-by: Jan Beulich It's a bit unfortunate that we end up doing self-IPIs for the BSP also, but that should be fixed elsewhere. Acked-by: Roger Pau Monné Thanks, Roger. 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Clean up the code so that > BYT/CHT-specifics do not show up in the common 'struct idle_cpu' data > structure. > > Remove the 'byt_auto_demotion_disable_flag' flag from 'struct idle_cpu', > because a better coding pattern is to avoid very case-specific fields like > 'bool byt_auto_demotion_disable_flag' in a common data structure, which is > used for all platforms, not only BYT/CHT. The code is just more readable > when common data structures contain only commonly used fields. > > Instead, match BYT/CHT in the 'intel_idle_init_cstates_icpu()' function, > and introduce a small helper to take care of BYT/CHT auto-demotion. This > is consistent with how platform-specific things are done for other > platforms. > > No intended functional changes. > > Inspired by (and description largely taken from) Linux'es c93d13b661a6 > ("intel_idle: clean up BYT/CHT auto demotion disable"). > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné Thanks, Roger. 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quoted-printable X-purgate-ID: tlsNG-c201ff/1778770308-E0A66443-DE9AD681/0/0 X-purgate-type: clean X-purgate-size: 7462 Hi Jan, Thank you for the review. On Wed, May 13, 2026 at 9:54=E2=80=AFAM Jan Beulich wro= te: > > On 12.05.2026 19:07, Mykola Kvach wrote: > > From: Mykola Kvach > > > > Introduce CONFIG_HAS_HWDOM_SYSTEM_SUSPEND as an architecture-selected > > capability for platforms where the hardware domain can be parked with > > SHUTDOWN_suspend without calling hwdom_shutdown(). > > > > Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For > > non-control domains, including the hardware domain when it is not actin= g as a > > control domain, the call is handled as a guest/domain suspend request a= nd > > parks the domain in SHUTDOWN_suspend. > > > > Control domains need additional sequencing because their SYSTEM_SUSPEND > > request is used to coordinate host-wide suspend. A non-last awake contr= ol > > domain may be parked in SHUTDOWN_suspend without requiring the host sus= pend > > path to be available. The last awake control domain is treated as the p= oint > > where the request becomes a host-suspend request, and it may only proce= ed > > when all non-control domains are already in SHUTDOWN_suspend and the ho= st > > suspend path is available. > > > > Keep the control-domain sequencing and domain-readiness checks out of > > PSCI_FEATURES. They are per-attempt runtime conditions rather than stab= le PSCI > > function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI= and > > enforce the sequencing policy in the call handler. > > > > Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEN= D so > > that SHUTDOWN_suspend from the hardware domain can be treated as a doma= in > > suspend state rather than as a hardware-domain initiated host shutdown.= This > > does not by itself imply that host-wide suspend is available. > > > > Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPE= ND > > capability with runtime blockers reported by Xen-owned subsystems. Add > > runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ p= aths > > lacking suspend/resume support. These blockers are runtime based, so th= ey > > only apply to drivers or paths that Xen actually uses on the platform. = For > > SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ pat= h, > > since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. > > > > Signed-off-by: Mykola Kvach > > --- > > xen/arch/arm/Kconfig | 1 + > > xen/arch/arm/gic.c | 6 ++ > > xen/arch/arm/include/asm/psci.h | 3 + > > xen/arch/arm/include/asm/suspend.h | 10 ++- > > xen/arch/arm/psci.c | 7 ++ > > xen/arch/arm/suspend.c | 40 +++++++++ > > xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- > > xen/common/Kconfig | 3 + > > xen/common/domain.c | 7 +- > > xen/drivers/char/serial.c | 12 +++ > > xen/drivers/passthrough/arm/iommu.c | 4 + > > xen/drivers/passthrough/arm/smmu-v3.c | 4 + > > xen/include/xen/serial.h | 1 + > > xen/include/xen/suspend.h | 2 + > > 14 files changed, 201 insertions(+), 13 deletions(-) > > > > Contrary to what the cover letter says, there's no revlog here. Right, I should have added a short note for this patch as well. This is a new patch in this version of the series, so there was no previous version of this particular patch to compare against, but I agree that this should still have been mentioned explicitly, e.g. as "New in v9". I will ad= d that in the next version. > > > --- a/xen/arch/arm/suspend.c > > +++ b/xen/arch/arm/suspend.c > > @@ -1,9 +1,49 @@ > > /* SPDX-License-Identifier: GPL-2.0-only */ > > > > +#include > > #include > > > > +#include > > +#include > > + > > struct resume_cpu_context resume_cpu_context; > > > > +/* > > + * Non-PSCI infrastructure can make host suspend impossible even when = the PSCI > > + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has= no valid > > + * suspend/resume path. > > + * > > + * This gate is checked only when the last awake control domain attemp= ts to > > + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. > > + */ > > +static bool host_system_suspend_runtime_allowed =3D true; > > + > > +static bool host_serial_suspend_allowed(void) > > +{ > > + if ( serial_suspend_supported() ) > > + return true; > > + > > + printk_once(XENLOG_INFO > > + "Host SYSTEM_SUSPEND blocked: serial driver lacks susp= end/resume support\n"); > > Please try to keep log messages down to a reasonable size. In the case he= re, > what value does "suspend/resume" add? Fair point. The important part is that the serial driver cannot support the host suspend path. I will shorten the message somehow. > > > +static int32_t domain_psci_system_suspend_policy(struct domain *d) > > +{ > > + struct domain *other; > > + bool last_awake_control_domain =3D true; > > + bool awake_non_control_domain =3D false; > > + > > + /* Only control domains participate in sequencing policy. */ > > + if ( !is_control_domain(d) ) > > + return 0; > > + > > + rcu_read_lock(&domlist_read_lock); > > + > > + for_each_domain ( other ) > > + { > > + bool suspended; > > + > > + if ( other =3D=3D d ) > > + continue; > > + > > + suspended =3D domain_in_suspend_state(other); > > + if ( suspended ) > > + continue; > > + > > + if ( is_control_domain(other) ) > > + { > > + last_awake_control_domain =3D false; > > + break; > > + } > > + > > + awake_non_control_domain =3D true; > > + } > > + > > + rcu_read_unlock(&domlist_read_lock); > > + > > + /* > > + * Another control domain is still awake. This request is only the= first > > + * phase of the sequencing: park this control domain and leave the= host > > + * running. Host-wide suspend gates must not block this intermedia= te state. > > + */ > > + if ( !last_awake_control_domain ) > > + return 0; > > + > > + /* > > + * This is the last awake control domain. It must not be parked un= less the > > + * request can proceed as a host-suspend request; otherwise Xen wo= uld lose > > + * the last domain that can coordinate the system suspend. > > + */ > > + if ( awake_non_control_domain ) > > + { > > + printk(XENLOG_DEBUG > > + "SYSTEM_SUSPEND denied: last awake control domain dom%u= requested host suspend while non-control domains are still awake\n", > > + d->domain_id); > > Same here, plus please use %pd. Ack, I will shorten the message and use %pd. > > > --- a/xen/drivers/char/serial.c > > +++ b/xen/drivers/char/serial.c > > @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > > > +static bool __read_mostly serial_suspend_available =3D true; > > __ro_after_init? Good catch, yes. I will use __ro_after_init for this variable. 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The goal is to have good enough defaults for most users. > > However, C-state characteristics, such as exit latency and residency, can > vary between different variants of the same CPU model and BIOS settings. > Moreover, different platform usage models and user preferences may benefit > from different C-state target_residency values. > > Provide a way for users to adjust the C-states table via a module parameter > "table". The general format is: > "state1:latency1:target_residency1,state2:latency2:target_residency2,..." > > In other words, represent each C-state by its name, exit latency (in > microseconds), and target residency (in microseconds), separated by colons. > Separate multiple C-states by commas. > > For example, suppose a CPU has 3 C-states with the following > characteristics: > C1: exit_latency=1, target_residency=2 > C1E: exit_latency=10, target_residency=10 > C6: exit_latency=100, target_residency=500 > > Users can specify a custom C-states table as follows: > > 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" > Result: C1: exit_latency=2, target_residency=2 > C1E: exit_latency=5, target_residency=20 > C6: exit_latency=150, target_residency=600 > 2. intel_idle.table="C6::400" > Result: C1: exit_latency=1, target_residency=2 (unchanged) > C1E: exit_latency=10, target_residency=10 (unchanged) > C6: exit_latency=100, target_residency=400 > (only target_residency changed) > > Signed-off-by: Artem Bityutskiy > Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com > Signed-off-by: Rafael J. Wysocki > Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 > > Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. > Other adjustments to fit our env. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné One possible adjustment below. > --- > For the initial attempt, I've left the new option as a standalone one. It > may be worth integrating with "mwait-idle", but I think much of the > parsing would then want doing differently. It'll then likely be much > harder to apply future Linux changes there. > --- > v2: Correct example in cmdline doc. > > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -1916,6 +1916,23 @@ Print boot time MTRR state. > Use the MWAIT idle driver (with model specific C-state knowledge) instead > of the ACPI based one. > > +### mwait-idle.table (x86) > +> `= ` > + > + Define the C-states table from a user input string. Expected format is > + 'name:latency:residency', where: > + - name: The C-state name. > + - latency: The C-state exit latency in us. > + - residency: The C-state target residency in us. > + > + Multiple C-states can be defined by separating them with commas: > + 'name1:latency1:residency1,name2:latency2:residency2' > + > + Example: mwait-idle.table=C1:1:1,C1E:5:10,C6:100:600 > + > + To leave latency or residency unchanged, use an empty field, for example: > + 'C1:1:1,C1E::10' - leaves C1E latency unchanged. > + > ### nmi (x86) > > `= ignore | dom0 | fatal` > > --- a/xen/arch/x86/cpu/mwait-idle.c > +++ b/xen/arch/x86/cpu/mwait-idle.c > @@ -70,6 +70,11 @@ > static __initdata bool opt_mwait_idle = true; > boolean_param("mwait-idle", opt_mwait_idle); > > +/* The maximum allowed length for the 'table' module parameter */ > +#define MAX_CMDLINE_TABLE_LEN 256 > +static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; > +string_param("mwait-idle.table", cmdline_table_str); > + > static unsigned int mwait_substates; > > #define LAPIC_TIMER_ALWAYS_RELIABLE 0xFFFFFFFF > @@ -122,6 +127,9 @@ struct cpuidle_state { > */ > #define CPUIDLE_FLAG_IBRS 0x20000 > > +/* C-states data from the 'mwait-idle.table' cmdline parameter */ > +static struct cpuidle_state cmdline_states[ACPI_PROCESSOR_MAX_POWER] __initdata; > + > /* > * MWAIT takes an 8-bit "hint" in EAX "suggesting" > * the C-state (top nibble) and sub-state (bottom nibble) > @@ -1547,6 +1555,161 @@ static void __init mwait_idle_state_tabl > } > } > > + /** > + * get_cmdline_field - Get the current field from a cmdline string. > + * @args: The cmdline string to get the current field from. > + * @field: Pointer to the current field upon return. > + * @sep: The fields separator character. > + * > + * Examples: > + * Input: args="C1:1:1,C1E:2:10", sep=':' > + * Output: field="C1", return "1:1,C1E:2:10" > + * Input: args="C1:1:1,C1E:2:10", sep=',' > + * Output: field="C1:1:1", return "C1E:2:10" > + * Ipnut: args="::", sep=':' > + * Output: field="", return ":" > + * > + * Return: The continuation of the cmdline string after the field or NULL. > + */ > +static char *__init get_cmdline_field(char *args, char **field, char sep) > +{ > + unsigned int i; > + > + for (i = 0; args[i] && !isspace(args[i]); i++) { > + if (args[i] == sep) > + break; > + } > + > + *field = args; > + > + if (args[i] != sep) > + return NULL; > + > + args[i] = '\0'; > + return args + i + 1; > +} > + > +/** > + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. > + * > + * Adjust the C-states table with data from the 'mwait-idle.table' parameter > + * (if specified). > + */ > +static void __init cmdline_table_adjust(void) > +{ > + char *args = cmdline_table_str; > + struct cpuidle_state *state; > + unsigned int i, state_count; > + > + if (args[0] == '\0') > + /* The 'mwait-idle.table' module parameter was not specified */ > + return; > + > + /* Create a copy of the C-states table */ > + for (i = 0; > + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; > + i++) > + cmdline_states[i] = icpu.state_table[i]; > + > + state_count = i; > + > + /* > + * Adjust the C-states table copy with data from the 'mwait-idle.table' > + * module parameter. > + */ > + while (args) { > + char *fields, *name, *val; > + > + /* > + * Get the next C-state definition, which is expected to be > + * '::'. Treat "empty" > + * fields as unchanged. For example, > + * '::' leaves the latency unchanged. > + */ > + args = get_cmdline_field(args, &fields, ','); > + > + /* name */ > + fields = get_cmdline_field(fields, &name, ':'); > + if (!fields) > + goto error; > + > + /* Find the C-state by its name */ > + state = NULL; > + for (i = 0; i < state_count; i++) { > + if (!strcmp(name, cmdline_states[i].name)) { > + state = &cmdline_states[i]; > + break; > + } > + } > + > + if (!state) { > + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", > + name); > + continue; > + } > + > + /* Latency */ > + fields = get_cmdline_field(fields, &val, ':'); > + if (!fields) > + goto error; > + > + if (*val) { > + const char *end; > + unsigned long n = simple_strtoul(val, &end, 0); > + > + state->exit_latency = n; > + if (*end || state->exit_latency != n) > + goto error; > + } > + > + /* Target residency */ > + fields = get_cmdline_field(fields, &val, ':'); > + > + if (*val) { > + const char *end; > + unsigned long n = simple_strtoul(val, &end, 0); > + > + state->target_residency = n; > + if (*end || state->target_residency != n) > + goto error; > + } > + > + /* > + * Allow for 3 more fields, but ignore them. Helps to make > + * possible future extensions of the cmdline format backward > + * compatible. > + */ > + for (i = 0; fields && i < 3; i++) { > + fields = get_cmdline_field(fields, &val, ':'); > + if (!fields) > + break; > + } > + > + if (fields) { > + printk(XENLOG_ERR PREFIX > + "Too many fields for C-state '%s'\n", > + state->name); > + goto error; > + } > + > + printk(XENLOG_INFO PREFIX > + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", > + state->name, state->exit_latency, state->target_residency); > + } > + > + /* Copy the adjusted C-states table back */ > + for (i = 0; i < state_count; i++) > + icpu.state_table[i] = cmdline_states[i]; > + > + printk(XENLOG_INFO PREFIX > + "Adjusted C-states with data from 'mwait-idle.table'\n"); > + return; > + > + error: > + printk(PREFIX XENLOG_ERR ahead of the prefix maybe? Thanks, Roger. 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X-MS-Exchange-CrossTenant-Network-Message-Id: 50415295-9392-43d0-0321-08deb1cdb475 X-MS-Exchange-CrossTenant-AuthSource: CH7PR03MB7860.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2026 15:30:18.9519 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Ym+g6zuwxblsUW6JFzgoZukwgnELBlyjG26KIUpyZxXAQ+xGXCyLnUJLqEkLIwlVgbrIbpsUb/QC2SyP9jz6bQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR03MB7179 X-purgate-ID: tlsNG-ebf023/1778772622-407713FF-D04EDE9D/0/0 X-purgate-type: clean X-purgate-size: 3182 On Tue, May 12, 2026 at 05:38:32PM +0200, Jan Beulich wrote: > From: Artem Bityutskiy > > Add validation for C-states specified via the "table=" module parameter. > Treat this module parameter as untrusted input and validate it thoroughly. > > Signed-off-by: Artem Bityutskiy > Link: https://patch.msgid.link/20251216080402.156988-4-dedekind1@gmail.com > Signed-off-by: Rafael J. Wysocki > Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git be6a150829b3 > > Add __init to validate_cmdline_cstate(). Other adjustments to fit our env. > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné One comment below. > --- > v2: Const-ify validate_cmdline_cstate()'s parameters. > > --- a/xen/arch/x86/cpu/mwait-idle.c > +++ b/xen/arch/x86/cpu/mwait-idle.c > @@ -72,6 +72,11 @@ boolean_param("mwait-idle", opt_mwait_id > > /* The maximum allowed length for the 'table' module parameter */ > #define MAX_CMDLINE_TABLE_LEN 256 > +/* Maximum allowed C-state latency */ > +#define MAX_CMDLINE_LATENCY_US (5 * 1000 /* USEC_PER_MSEC */) > +/* Maximum allowed C-state target residency */ > +#define MAX_CMDLINE_RESIDENCY_US (100 * 1000 /* USEC_PER_MSEC */) > + > static char cmdline_table_str[MAX_CMDLINE_TABLE_LEN] __initdata; > string_param("mwait-idle.table", cmdline_table_str); > > @@ -1590,6 +1595,41 @@ static char *__init get_cmdline_field(ch > } > > /** > + * validate_cmdline_cstate - Validate a C-state from cmdline. > + * @state: The C-state to validate. > + * @prev_state: The previous C-state in the table or NULL. > + * > + * Return: 0 if the C-state is valid or -EINVAL otherwise. > + */ > +static int __init validate_cmdline_cstate(const struct cpuidle_state *state, > + const struct cpuidle_state *prev_state) > +{ > + if (state->exit_latency == 0) > + /* Exit latency 0 can only be used for the POLL state */ > + return -EINVAL; > + > + if (state->exit_latency > MAX_CMDLINE_LATENCY_US) > + return -EINVAL; > + > + if (state->target_residency > MAX_CMDLINE_RESIDENCY_US) > + return -EINVAL; > + > + if (state->target_residency < state->exit_latency) > + return -EINVAL; > + > + if (!prev_state) > + return 0; > + > + if (state->exit_latency <= prev_state->exit_latency) > + return -EINVAL; > + > + if (state->target_residency <= prev_state->target_residency) > + return -EINVAL; > + > + return 0; > +} > + > +/** > * cmdline_table_adjust - Adjust the C-states table with data from cmdline. > * > * Adjust the C-states table with data from the 'mwait-idle.table' parameter > @@ -1697,6 +1737,21 @@ static void __init cmdline_table_adjust( > state->name, state->exit_latency, state->target_residency); > } > > + /* Validate the adjusted C-states */ > + for (i = 0; i < state_count; i++) { > + struct cpuidle_state *prev_state; const? FWIW, you could also init the field at definition, but I understand this might diverge too much from the Linux code. Thanks, Roger. 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Make sure the returned value at least monotonically increases. When > available, use nominal frequency values as initial approximation. > > Do this only in get_s_time(), as producing a sane value in > get_s_time_fixed() for non-zero inputs won't be reasonably possible. > Put an assertion there. > > Reported-by: Roger Pau Monné > Signed-off-by: Jan Beulich > --- > RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which > checks for NOW() returning 0 (falling back to TSM_RAW in this case). > For now I have no idea how to avoid this; perhaps that's tolerable at > least in the case where we put in place an early estimate? Should we > maybe weaken the fallback condition to take effect for any value > below 1μs? Maybe it's fine to print cycles unconditionally until we reach SYS_STATE_smp_boot when we know the per-cpu scale is correctly set? > > RFC: While generally the mentioned waiting loops will take longer to time > out, on a very fast CPU tight loops may time out too early. > > RFC: For the AMD/Hygon case, if the "nominal" value isn't available, we > could use the "high" one. That would cause NOW() to run too slowly > (until the scale is properly set), but maybe that's still better than > it returning 0? (As it stands, I can't really test the new code > there, as my Rome system only supplies the lo/hi pair of values.) Using the "high" frequency would seem fine to me. > > RFC: On the 2nd pass through early_cpu_init() it may be okay to skip the > new additions. > > With "x86/time: set AP's TSC scale estimate earlier" the counter update > may not need to be atomic anymore, as then only the BSP can reasonably hit > that path. > > I don't think Fixes: tags should be put here. If we did, we'd have to > enumerate all introductions of early uses of NOW() (or get_s_time()), with > the exception of those dealing with getting back 0 (which I expect is only > printk_start_of_line()). Will want backporting nevertheless (unless deemed > too risky). > --- > v2: Add assertion to get_s_time_fixed(). Use nominal frequencies for very > early setting, if available. > > --- unstable.orig/xen/arch/x86/cpu/common.c 2026-05-13 08:35:28.640503356 +0200 > +++ unstable/xen/arch/x86/cpu/common.c 2026-05-12 12:30:35.475284195 +0200 > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > #include > > #include > @@ -403,6 +404,25 @@ void __init early_cpu_init(bool verbose) > &c->x86_capability[FEATURESET_7d1]); > } > > + if (c->cpuid_level >= 0x15) { > + cpuid(0x15, &eax, &ebx, &ecx, &edx); > + > + if (ecx && ebx && eax) > + preset_tsc_scale(DIV_ROUND_UP(ecx * 1UL * ebx, eax)); > + else if (c->cpuid_level >= 0x16) { > + /* Assume CPU base freq ≈ TSC freq. */ > + cpuid(0x16, &eax, &ebx, &ecx, &edx); > + if (eax) > + preset_tsc_scale(eax * 1000000UL); > + } > + } else if (c->vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) { > + unsigned int nom_mhz = 0; > + > + amd_process_freq(c, NULL, &nom_mhz, NULL); > + if (nom_mhz) > + preset_tsc_scale(nom_mhz * 1000000UL); > + } > + > eax = cpuid_eax(0x80000000); > if ((eax >> 16) == 0x8000 && eax >= 0x80000008) { > ebx = eax >= 0x8000001f ? cpuid_ebx(0x8000001f) : 0; > --- unstable.orig/xen/arch/x86/include/asm/time.h 2026-05-13 08:35:28.640503356 +0200 > +++ unstable/xen/arch/x86/include/asm/time.h 2026-05-12 12:25:14.435489339 +0200 > @@ -23,6 +23,7 @@ mktime (unsigned int year, unsigned int > int time_suspend(void); > int time_resume(void); > > +void preset_tsc_scale(unsigned long freq); > void init_percpu_time(void); > void time_latch_stamps(void); > > --- unstable.orig/xen/arch/x86/time.c 2026-05-13 08:35:28.640503356 +0200 > +++ unstable/xen/arch/x86/time.c 2026-05-13 08:33:54.000000000 +0200 > @@ -1655,6 +1655,9 @@ s_time_t get_s_time_fixed(u64 at_tsc) > const struct cpu_time *t = &this_cpu(cpu_time); > u64 tsc, delta; > > + /* scale_delta() degenerates when the scale wasn't set yet. */ > + ASSERT(t->tsc_scale.mul_frac); > + > if ( at_tsc ) > tsc = at_tsc; > else > @@ -1670,6 +1673,20 @@ s_time_t get_s_time_fixed(u64 at_tsc) > > s_time_t get_s_time(void) > { > + /* > + * Before the TSC scale is set, avoid returning constant 0 (or whatever > + * this_cpu(cpu_time).stamp.local_stime is set to). While the returned > + * value is in no way representing time, it at least increases > + * monotonically, thus avoiding e.g. waiting loops to degenerate to > + * entirely infinite ones. > + */ > + if ( unlikely(!this_cpu(cpu_time).tsc_scale.mul_frac) ) > + { > + static s_time_t counter; > + > + return arch_fetch_and_add(&counter, 1); > + } > + > return get_s_time_fixed(0); > } > > @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) > return 0; > } > > +/* BSP-only function to pre-set an approximate TSC scale. */ > +void __init preset_tsc_scale(unsigned long freq) > +{ > + struct cpu_time *t = &this_cpu(cpu_time); > + > + /* > + * The incoming frequency is only approximate (nominal). Increase it by > + * 1% to make NOW() output rather a little too slow than too fast, thus > + * avoiding a possible backwards jump once the final scale is set. > + */ > + freq += DIV_ROUND_UP(freq, 100); To avoid such possible jump backwards, won't it safer to also update the ->local_stime and ->local_tsc fields at the time the new scale is set? Updatign those ahead of setting the new scale should avoid any backward jumps. Thanks, Roger. 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> }; >=20 > +#ifdef CONFIG_SYSTEM_SUSPEND > + > +struct ipmmu_reg_ctx { > + unsigned int imttlbr0; > + unsigned int imttubr0; > + unsigned int imttbcr; > + unsigned int imctr; > +}; > + > +struct ipmmu_vmsa_backup { > + struct device *dev; > + unsigned int *utlbs_val; > + unsigned int *asids_val; > + struct list_head list; > +}; > + > +#endif > + > /* Root/Cache IPMMU device's information */ > struct ipmmu_vmsa_device { > struct device *dev; > @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { > struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; > unsigned int utlb_refcount[IPMMU_UTLB_MAX]; > const struct ipmmu_features *features; > +#ifdef CONFIG_SYSTEM_SUSPEND > + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; > +#endif > }; >=20 > /* > @@ -547,6 +570,245 @@ static void ipmmu_domain_free_context(struct ipmmu_= vmsa_device *mmu, > spin_unlock_irqrestore(&mmu->lock, flags); > } >=20 > +#ifdef CONFIG_SYSTEM_SUSPEND > + > +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); > +static LIST_HEAD(ipmmu_devices_backup); > + > +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; > + > +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, > + unsigned int utlb) > +{ > + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); > +} > + > +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) > +{ > + struct ipmmu_vmsa_backup *backup_data; > + > + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); > + > + spin_lock(&ipmmu_devices_backup_lock); > + > + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) > + { > + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(backup_data= ->dev); > + unsigned int i; > + > + if ( to_ipmmu(backup_data->dev) !=3D mmu ) > + continue; > + > + for ( i =3D 0; i < fwspec->num_ids; i++ ) > + { > + unsigned int utlb =3D fwspec->ids[i]; > + > + backup_data->asids_val[i] =3D ipmmu_imuasid_read(mmu, utlb); > + backup_data->utlbs_val[i] =3D ipmmu_imuctr_read(mmu, utlb); > + } > + } > + > + spin_unlock(&ipmmu_devices_backup_lock); > +} > + > +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) > +{ > + struct ipmmu_vmsa_backup *backup_data; > + > + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); > + > + spin_lock(&ipmmu_devices_backup_lock); > + > + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) > + { > + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(backup_data= ->dev); > + unsigned int i; > + > + if ( to_ipmmu(backup_data->dev) !=3D mmu ) > + continue; > + > + for ( i =3D 0; i < fwspec->num_ids; i++ ) > + { > + unsigned int utlb =3D fwspec->ids[i]; > + > + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); > + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); > + } > + } > + > + spin_unlock(&ipmmu_devices_backup_lock); > +} > + > +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *domain= ) > +{ > + struct ipmmu_vmsa_device *mmu =3D domain->mmu->root; > + struct ipmmu_reg_ctx *regs =3D mmu->reg_backup[domain->context_id]; > + > + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->conte= xt_id); > + > + regs->imttlbr0 =3D ipmmu_ctx_read_root(domain, IMTTLBR0); > + regs->imttubr0 =3D ipmmu_ctx_read_root(domain, IMTTUBR0); > + regs->imttbcr =3D ipmmu_ctx_read_root(domain, IMTTBCR); > + regs->imctr =3D ipmmu_ctx_read_root(domain, IMCTR); > +} > + > +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *domai= n) > +{ > + struct ipmmu_vmsa_device *mmu =3D domain->mmu->root; > + struct ipmmu_reg_ctx *regs =3D mmu->reg_backup[domain->context_id]; NIT: There is a double space before the `=3D` > + > + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->cont= ext_id); > + > + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); > + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); > + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); > + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); I see in ipmmu_tlb_invalidate() we do: dsb(sy); ipmmu_tlb_sync(domain); Is it safe to omit them here? > +} > + > +/* > + * Xen: Unlike Linux implementation, Xen uses a single driver instance > + * for handling all IPMMUs. There is no framework for ipmmu_suspend/resu= me > + * callbacks to be invoked for each IPMMU device. So, we need to iterate > + * through all registered IPMMUs performing required actions. > + * > + * Also take care of restoring special settings, such as translation > + * table format, etc. > + */ > +static int __must_check ipmmu_suspend(void) > +{ > + struct ipmmu_vmsa_device *mmu; > + > + if ( !iommu_enabled ) > + return 0; > + > + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); > + > + spin_lock(&ipmmu_devices_lock); > + > + list_for_each_entry( mmu, &ipmmu_devices, list ) > + { > + if ( ipmmu_is_root(mmu) ) > + { > + unsigned int i; > + > + for ( i =3D 0; i < mmu->num_ctx; i++ ) > + { > + if ( !mmu->domains[i] ) > + continue; > + ipmmu_domain_backup_context(mmu->domains[i]); > + } > + } > + else > + ipmmu_utlbs_backup(mmu); > + } > + > + spin_unlock(&ipmmu_devices_lock); > + > + return 0; > +} > + > +static void ipmmu_resume(void) > +{ > + struct ipmmu_vmsa_device *mmu; > + > + if ( !iommu_enabled ) > + return; > + > + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); > + > + spin_lock(&ipmmu_devices_lock); > + > + list_for_each_entry( mmu, &ipmmu_devices, list ) This loop has an ordering problem because we can run ipmmu_utlbs_restore() = before the root ipmmu is restored (ipmmu_probe() uses `list_add()`). Maybe going twice on the list, restoring first the root and in the second r= ound the rest should work. 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There is no need for the artificial tracking > of the NMI handling completion with the IRET instruction interception. > > Adjust the svm_inject_nmi to rather inject the NMIs using the vNMI Hardware > accelerated feature when the AMD platform supports the vNMI. > > Signed-off-by: Abdelkareem Abdelsaamad > --- > xen/arch/x86/hvm/svm/intr.c | 6 ++++++ > xen/arch/x86/hvm/svm/svm.c | 1 + > xen/arch/x86/hvm/svm/vmcb.c | 2 ++ > 3 files changed, 9 insertions(+) > > diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c > index 6453a46b85..112a393211 100644 > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -33,6 +33,12 @@ static void svm_inject_nmi(struct vcpu *v) > u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); > intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + vmcb->_vintr.fields.vnmi_pending = 1; > + return; > + } > + > event.raw = 0; > event.v = true; > event.type = X86_ET_NMI; > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 18ba837738..815565c33f 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -2524,6 +2524,7 @@ const struct hvm_function_table * __init start_svm(void) > P(cpu_has_tsc_ratio, "TSC Rate MSR"); > P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); > P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); > + P(cpu_has_svm_vnmi, "Virtual NMI"); > P(cpu_has_svm_bus_lock, "Bus Lock Filter"); > #undef P > > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c > index e583ef8548..e90bbac332 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -184,6 +184,8 @@ static int construct_vmcb(struct vcpu *v) > if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) > v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; > > + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; > + > return 0; > } > This works for the common case, but breaks emulation of IRET which needs to be able to clear the NMI latch. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rNupZ0OE1uiyu3R+4mdGLl5fqac36ES0fSmLOjCZZnw247n5giISI3tLelwcCk9AwnPPozqsd9uJoXqq4a91Y1lQcqAr26iopMbVq4D8j4yRTTJqkA+JseQlpv5nSoKoqe0Onh2ZpDRklMeQHWsbgbEfnIBzyiPLqpc7txlKgnJy2nKVSYvwBbj9MWN5lHygMZI1JCHRgsiyjbhCcHXHuutSWYIeNqPFSRej1Rpfpmm9JsKDYwu3u8NQEOLnsletyxq70LzsQ1WS8xXfWC0aIMbgJKQkBybL0K5sxWf7wYkOK7ny6AGxcMLmKI7Pzu2r2Xf5hu2Phix2GdTXa3hA+Qq3AjJjuKpg0DSQGIpd4PdycYppmKFhEIu3R43WrQSZAI6+YmTl77rg5PdylBFij0UX9HUu5B8eqYsUHXc9PpELqSkDKeuUZnIbT+oCYKVl X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 May 2026 16:42:44.8951 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ad8138c-449d-4bf1-df8f-08deb1d7d30c X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B92.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB8829 X-purgate-ID: tlsNG-42698a/1778776969-1377AF3B-7FE4ACE3/0/0 X-purgate-type: clean X-purgate-size: 5377 Hi Mykola, >=20 > +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) > +{ > + int ret; > + u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > + > + if ( smmu->features & ARM_SMMU_FEAT_PRI ) > + irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > + > + /* Enable interrupt generation on the SMMU */ > + ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > + if ( ret ) > + { > + dev_warn(smmu->dev, "failed to enable irqs\n"); > + return ret; > + } > + > + return 0; > +} > + > +/* > + * Probe-time only: request host IRQs and, when available, program the S= MMU's > + * MSI doorbells. Resume does not restore the SMMU *_IRQ_CFGn MSI regist= ers, > + * so any host suspend support must treat the active MSI IRQ path as > + * unsupported until that restore path exists. > + */ > static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) > { > int ret, irq; > - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; >=20 > /* Disable IRQs first */ > ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, > @@ -2028,22 +2052,7 @@ static int __init arm_smmu_setup_irqs(struct arm_s= mmu_device *smmu) > } > } >=20 > - if (smmu->features & ARM_SMMU_FEAT_PRI) > - irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > - > - /* Enable interrupt generation on the SMMU */ > - ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > - if (ret) { > - dev_warn(smmu->dev, "failed to enable irqs\n"); > - goto err_free_irqs; > - } > - > return 0; > - > -err_free_irqs: > - arm_smmu_free_irqs(smmu); > - return ret; > } >=20 > static int arm_smmu_device_disable(struct arm_smmu_device *smmu) > @@ -2057,7 +2066,7 @@ static int arm_smmu_device_disable(struct arm_smmu_= device *smmu) > return ret; > } >=20 > -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) > +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > { > int ret; > u32 reg, enables; > @@ -2163,17 +2172,9 @@ static int __init arm_smmu_device_reset(struct arm= _smmu_device *smmu) > } > } >=20 > - ret =3D arm_smmu_setup_irqs(smmu); > - if (ret) { > - dev_err(smmu->dev, "failed to setup irqs\n"); > + ret =3D arm_smmu_enable_irqs(smmu); > + if ( ret ) > return ret; > - } > - > - /* Initialize tasklets for threaded IRQs*/ > - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet= , > - smmu); >=20 > /* Enable the SMMU interface, or ensure bypass */ > if (disable_bypass) { > @@ -2181,20 +2182,16 @@ static int __init arm_smmu_device_reset(struct ar= m_smmu_device *smmu) > } else { > ret =3D arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); > if (ret) > - goto err_free_irqs; > + return ret; > } > ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, > ARM_SMMU_CR0ACK); > if (ret) { > dev_err(smmu->dev, "failed to enable SMMU interface\n"); > - goto err_free_irqs; > + return ret; > } >=20 > return 0; > - > -err_free_irqs: > - arm_smmu_free_irqs(smmu); > - return ret; > } >=20 > static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > @@ -2558,10 +2555,23 @@ static int __init arm_smmu_device_probe(struct pl= atform_device *pdev) > if (ret) > goto out_free; >=20 > + ret =3D arm_smmu_setup_irqs(smmu); > + if ( ret ) > + { > + dev_err(smmu->dev, "failed to setup irqs\n"); > + goto out_free; > + } > + > + /* Initialize tasklets for threaded IRQs*/ > + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet= , > + smmu); > + > /* Reset the device */ > ret =3D arm_smmu_device_reset(smmu); > if (ret) > - goto out_free; > + goto out_free_irqs; >=20 > /* > * Keep a list of all probed devices. This will be used to query > @@ -2575,6 +2585,8 @@ static int __init arm_smmu_device_probe(struct plat= form_device *pdev) >=20 > return 0; >=20 > +out_free_irqs: > + arm_smmu_free_irqs(smmu); >=20 > out_free: > arm_smmu_free_structures(smmu); > @@ -2855,6 +2867,96 @@ static void arm_smmu_iommu_xen_domain_teardown(str= uct domain *d) > xfree(xen_domain); > } >=20 > +#ifdef CONFIG_SYSTEM_SUSPEND > + > +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device *= smmu) > +{ > + int ret =3D arm_smmu_device_reset(smmu); > + > + if ( ret ) > + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", > + ret); > +} > + > +static int arm_smmu_suspend(void) > +{ > + struct arm_smmu_device *smmu; > + int ret =3D 0; > + > + list_for_each_entry(smmu, &arm_smmu_devices, devices) > + { > + /* Abort all transactions before disable to avoid spurious bypass */ > + ret =3D arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); > + if ( ret ) > + goto fail; Should we have this here as the restore path calls arm_smmu_enable_irqs()? ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); 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Upon restoring cont= ext > + * hyp_resume shall return value zero instead. From C code that invokes > + * prepare_resume_ctx, the return value is interpreted to determine whet= her > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > + */ > +FUNC(prepare_resume_ctx) > + ldr x0, =3Dresume_cpu_context > + > + /* Store callee-saved registers */ > + stp x19, x20, [x0, #RESUME_CTX_X19] > + stp x21, x22, [x0, #RESUME_CTX_X21] > + stp x23, x24, [x0, #RESUME_CTX_X23] > + stp x25, x26, [x0, #RESUME_CTX_X25] > + stp x27, x28, [x0, #RESUME_CTX_X27] > + stp x29, lr, [x0, #RESUME_CTX_X29] > + > + /* Store stack-pointer */ > + mov x2, sp > + str x2, [x0, #RESUME_CTX_SP] > + > + /* Store system control registers */ > + mrs x2, VBAR_EL2 > + str x2, [x0, #RESUME_CTX_VBAR_EL2] > + mrs x2, VTCR_EL2 > + str x2, [x0, #RESUME_CTX_VTCR_EL2] > + mrs x2, VTTBR_EL2 > + str x2, [x0, #RESUME_CTX_VTTBR_EL2] > + mrs x2, TPIDR_EL2 > + str x2, [x0, #RESUME_CTX_TPIDR_EL2] > + mrs x2, MDCR_EL2 > + str x2, [x0, #RESUME_CTX_MDCR_EL2] > + mrs x2, HSTR_EL2 > + str x2, [x0, #RESUME_CTX_HSTR_EL2] > + mrs x2, CPTR_EL2 > + str x2, [x0, #RESUME_CTX_CPTR_EL2] > + mrs x2, HCR_EL2 > + str x2, [x0, #RESUME_CTX_HCR_EL2] Do you think we should save also CNTHCTL_EL2? Apologies it escaped my first= review, but I see we program it in the boot cpu path + secondary cpu path: init_tim= er_interrupt(). The rest looks ok. Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 14 17:56:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 17:56:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309149.1580269 (Exim 4.92) (envelope-from ) id 1wNaIO-0001cN-IJ; Thu, 14 May 2026 17:56:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309149.1580269; Thu, 14 May 2026 17:56:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNaIO-0001cG-Fa; Thu, 14 May 2026 17:56:28 +0000 Received: by outflank-mailman (input) for mailman id 1309149; Thu, 14 May 2026 17:56:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wNaIM-0001cA-Vh for xen-devel@lists.xenproject.org; Thu, 14 May 2026 17:56:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNaIM-00GS1i-6v for xen-devel@lists.xenproject.org; Thu, 14 May 2026 19:56:26 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a060caf-5cb7-0a2a0a5109dd-0a2a45059080-32 for ; Thu, 14 May 2026 19:56:26 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a060cc9-aaa8-0a2a45050019-d155802edd8e-3 for ; Thu, 14 May 2026 19:56:26 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4891b0786beso53602635e9.1 for ; Thu, 14 May 2026 10:56:25 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. [78.146.242.105]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-48fe4c88495sm8335235e9.4.2026.05.14.10.56.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 14 May 2026 10:56:24 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=google header.d=citrix.com header.i="@citrix.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-Id:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=google; t=1778781385; x=1779386185; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=f3fGRidiZ0yfRYQMPdYfRMNwaMmmyOBVWWMsI1nxEsU=; b=NVuNxaOraSLu95dRLoOZaB9RSiVgMB2lsIBWgKc8/LaxHCCX44sxX120jmtZ2CjpF6 M4VOLBKMI9hxVj+F7enTdo+Yqu7/HBnKwc140E4Z1jcs57JY24UCkJHtvLZ76DTElS1C Bw6f3qytkLzyXsa+LdbvYptkcQfhT9uzF4t0Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778781385; x=1779386185; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=f3fGRidiZ0yfRYQMPdYfRMNwaMmmyOBVWWMsI1nxEsU=; b=CbvEuNGVppApnKMKPF+1WCJnvgJGVufhfib6DHy5g816cUgKDO88b2O7NjaS3CDDga b3Zj9Q39P3iMAGHgL/mNCKhNv2j57x/iVflU+kLCnu19bxZPpl1rSY+cfkL39iwrtW1L 8PseZ4wiSFITePXW4BqU65Rwl2bOX06brN8NCEoLlzwsZWGD6NJwt13j72DYg8iNp1WN tU8uAupYzhEUTj0E10aHmLJCmJhLEJkokoexA767dpc2JoZsRFklpqkt5HNtNwYvWWMt G3KRRh7FgKWsXWcV+ESORG3FHLnJb2DvVtAV1Tmg0EoAuFjVDzKF/qeyI2r+6dA1xUNA cLyw== X-Gm-Message-State: AOJu0YzIXFMfLwyP5qLqR8ZOdtSalU9dFYEWyBWBvpF/WKZjnA1b9tA0 CJx6D64OfwGjM8ovxRLSW3tgFtvQpu3nPXjOfqsU/EmbDgii/+NtYw1dAYVWQJjoS4Y4SaAVEMi QIp0rSMs= X-Gm-Gg: Acq92OHcuVc+aa4wFvbSWlt9HBlYFGvrYy/RQmkwuFabHiLVCkX3rGOgl2CmtSF4GUY U2cYwJWhkpjHvfCpLPJWJTgagwjTm3fvKENPBg+8EepdpLBSClYT41rSylHCgwQc3dfuFdiOsfd 8vHmFY0oc1CT405o1OZ4l8syqGBQnWNGictHNYz19Q5Gx6gX8T5roQ7Ct1YN18OeTsHq1w6G2We wg4zTx+r1b5+pOlZaS4D8+9xDDXnmOCoVVWuDP5XyjkyXTZhdY3f461rvruX3CC2nlT8ZAdS1zV 8/KCNzIaOqPo7Us8M75n88bbxTTOqcuZbjsfanKyRMzXTjOODJWRFhAqRbUQam46B0TZ6E0zuc2 Gp3yC68HT5B3ZmwqctWAqJxDAZWeMW1duE8uDU06QTQIEhP8GKLWrSIqx0yvQQb+CXVV6xPXWn5 alVXmOKvHUbHhgKdS33n6Xljr1SXT5ilPciNaqwjxaelTl4a48RqI2wYoYAySO5FCmKtz/L8muz 3/y X-Received: by 2002:a05:600c:a4f:b0:48f:e230:2a1f with SMTP id 5b1f17b1804b1-48fe661ede2mr5069785e9.30.1778781385272; Thu, 14 May 2026 10:56:25 -0700 (PDT) From: Andrew Cooper To: Xen-devel Cc: Abdelkareem Abdelsaamad , Andrew Cooper , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Jason Andryuk , Oleksii Kurochko Subject: [PATCH for-4.22 v6] x86/svm: Support vNMI on capable hardware Date: Thu, 14 May 2026 18:56:23 +0100 Message-Id: <20260514175623.1869042-1-andrew.cooper3@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778781386-E2F94443-541C8930/10/73395122804 X-purgate-type: spam X-purgate-size: 6213 From: Abdelkareem Abdelsaamad Starting with Zen4, AMD CPUs can virtualise NMIs for a guest. On older hardware, determining when an NMI is safe to deliver is a challenge and Xen does not handle all corner cases correctly. With vNMI, there is an enablement bit and two new bits of state in the VMCB; a pending bit, and a blocked bit. These directly map to the CPU state for handling NMIs, and are maintained by hardware during the running of the vCPU. When vNMI is enabled, have svm_{get,set}set_interrupt_shadow() work in terms of the vnmi_blocking bit rather than the IRET intercept. This allows an emulated IRET instruction to re-enable NMIs. When injecting a new NMI, simply set the vnmi_pending bit; hardware will deliver the NMI to the guest at the next suitable juncture. One complication is that, when delivering a second NMI before the first has completed, the mix between common HVM logic and SVM specific logic will try to open an NMI window, malfunctioning as it does so. When vNMI is enabled, short circuit this to not consider NMIs blocked. Signed-off-by: Abdelkareem Abdelsaamad Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: Teddy Astie CC: Jason Andryuk CC: Oleksii Kurochko For 4.22. This is somewhat overdue and makes a concrete improvement to NMI handling on recent AMD hardware. v6: * Plumb through svm_{get,set}set_interrupt_shadow() so that emulated IRET works, as requested several times during review of earlier revisions. * Expand the commit message The !vNMI case is even more broken than I'd realised. Besides the "what if the IRET faults?" problem, svm_enable_intr_window() basically ignores the NMI case and simply re-enters the VM. This causes the pending NMI to only be injected next time there is a VMExit. --- xen/arch/x86/hvm/svm/intr.c | 19 +++++++++++++++++++ xen/arch/x86/hvm/svm/svm.c | 23 +++++++++++++++++------ xen/arch/x86/hvm/svm/vmcb.c | 2 ++ 3 files changed, 38 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index 6453a46b8508..cf0621d2f628 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -33,6 +33,12 @@ static void svm_inject_nmi(struct vcpu *v) u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); intinfo_t event; + if ( vmcb->_vintr.fields.vnmi_enable ) + { + vmcb->_vintr.fields.vnmi_pending = true; + return; + } + event.raw = 0; event.v = true; event.type = X86_ET_NMI; @@ -142,6 +148,19 @@ void asmlinkage svm_intr_assist(void) return; intblk = hvm_interrupt_blocked(v, intack); + + /* + * When vNMI is active, NMIs can be injected by setting vnmi_pending + * and hardware will deliver them at the next appropriate opportunity. + * Consider them not blocked, to avoid trying to open an NMI Window. + * + * Correctness here relies on the fact that all vNMI capable hardware + * has vGIF, and vGIF is always activated when appropriate. + */ + if ( intblk == hvm_intblk_nmi_iret && + vmcb->_vintr.fields.vnmi_enable ) + intblk = hvm_intblk_none; + if ( intblk == hvm_intblk_svm_gif ) { ASSERT(nestedhvm_enabled(v->domain)); diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index f49d2ebbfdd5..49fcdd906cf8 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -499,7 +499,9 @@ static unsigned cf_check int svm_get_interrupt_shadow(struct vcpu *v) if ( vmcb->int_stat.intr_shadow ) intr_shadow |= HVM_INTR_SHADOW_MOV_SS | HVM_INTR_SHADOW_STI; - if ( vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET ) + if ( vmcb->_vintr.fields.vnmi_enable + ? vmcb->_vintr.fields.vnmi_blocking + : (vmcb_get_general1_intercepts(vmcb) & GENERAL1_INTERCEPT_IRET) ) intr_shadow |= HVM_INTR_SHADOW_NMI; return intr_shadow; @@ -509,15 +511,23 @@ static void cf_check svm_set_interrupt_shadow( struct vcpu *v, unsigned int intr_shadow) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; - u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); + bool block_nmi = intr_shadow & HVM_INTR_SHADOW_NMI; vmcb->int_stat.intr_shadow = !!(intr_shadow & (HVM_INTR_SHADOW_MOV_SS|HVM_INTR_SHADOW_STI)); - general1_intercepts &= ~GENERAL1_INTERCEPT_IRET; - if ( intr_shadow & HVM_INTR_SHADOW_NMI ) - general1_intercepts |= GENERAL1_INTERCEPT_IRET; - vmcb_set_general1_intercepts(vmcb, general1_intercepts); + if ( vmcb->_vintr.fields.vnmi_enable ) + vmcb->_vintr.fields.vnmi_blocking = block_nmi; + else + { + uint32_t gen1 = vmcb_get_general1_intercepts(vmcb); + + gen1 &= ~GENERAL1_INTERCEPT_IRET; + if ( block_nmi ) + gen1 |= GENERAL1_INTERCEPT_IRET; + + vmcb_set_general1_intercepts(vmcb, gen1); + } } static int cf_check svm_guest_x86_mode(struct vcpu *v) @@ -2460,6 +2470,7 @@ const struct hvm_function_table * __init start_svm(void) P(cpu_has_tsc_ratio, "TSC Rate MSR"); P(cpu_has_svm_sss, "NPT Supervisor Shadow Stack"); P(cpu_has_svm_spec_ctrl, "MSR_SPEC_CTRL virtualisation"); + P(cpu_has_svm_vnmi, "Virtual NMI"); P(cpu_has_svm_bus_lock, "Bus Lock Filter"); #undef P diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 514e530cbda7..975a1eaef806 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -185,6 +185,8 @@ static int construct_vmcb(struct vcpu *v) if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; 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Message-ID: <7ef99f0e-2847-49d8-8701-8243e4b073ed@citrix.com> Date: Thu, 14 May 2026 19:07:40 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] crypto/vmac: adjust for Misra C:2012 rule 17.5 To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <036752dc-5333-4d01-acaf-ed450e09fe48@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <036752dc-5333-4d01-acaf-ed450e09fe48@suse.com> Content-Type: text/plain; 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("The function argument corresponding to a parameter declared to have > an array type shall have an appropriate number of elements"). Instead of > casts, (ab)use unions. > > Signed-off-by: Jan Beulich The Rule 17.5 violations aren't reported against this function.  They look to be addressed by one of your other patches. Which rules is this addressing?  I can't locate anything referencing this function. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 14 18:11:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 18:11:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309173.1580287 (Exim 4.92) (envelope-from ) id 1wNaWw-0005KS-3Z; Thu, 14 May 2026 18:11:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309173.1580287; Thu, 14 May 2026 18:11:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNaWv-0005KL-WE; Thu, 14 May 2026 18:11:30 +0000 Received: by outflank-mailman (input) for mailman id 1309173; Thu, 14 May 2026 18:11:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNaWu-0005KF-DJ for xen-devel@lists.xenproject.org; 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Message-ID: <1f8c7aef-1432-4026-b97a-acf9a3d06330@citrix.com> Date: Thu, 14 May 2026 19:11:11 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH 2/2] crypto/rijndael: adjust for Misra C:2012 rule 8.3 To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <13ca5f9f-d985-41bf-9c30-afd657dade89@suse.com> <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <3ca0351a-8be9-4b3b-989f-0ba004fada2f@suse.com> Content-Type: text/plain; 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("All declarations of an object or function shall use the same names > and type qualifiers"). Bring declarations in line with the corresponding > definitions, accepting the use of the being-phased-out u types. While > we don't define NEED_RIJNDAEL_DECRYPT, cover rijndaelKeySetupDec() as > well for completeness. > > Signed-off-by: Jan Beulich > > --- a/xen/include/crypto/rijndael.h > +++ b/xen/include/crypto/rijndael.h > @@ -50,9 +50,8 @@ int rijndael_set_key_enc_only(rijndael_c > void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); > void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); > > -int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char cipherKey[], int keyBits); > -int rijndaelKeySetupDec(unsigned int rk[], const unsigned char cipkerKey[], int keyBits); > -void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned char pt[16], > - unsigned char ct[16]); > +int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); > +int rijndaelKeySetupDec(u32 rk[], const u8 cipkerKey[], int keyBits); > +void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 ct[16]); > > #endif /* __RIJNDAEL_H */ > Hmm. The rijndael_encrypt() in context is a trivial wrapper of rijndaelEncrypt() using rijndael_ctx.  The only user is VMAC which defines aes_encryption() in terms of rijndaelEncrypt(), making rijndael_encrypt() dead code.  The decrypt side is even deader code. It might be worth taking this patch in the short term, but I think we could get away with a lot of deletion. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 14 23:23:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 23:23:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309279.1580312 (Exim 4.92) (envelope-from ) id 1wNfP4-0005fM-EY; Thu, 14 May 2026 23:23:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309279.1580312; Thu, 14 May 2026 23:23:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfP4-0005f3-9d; Thu, 14 May 2026 23:23:42 +0000 Received: by outflank-mailman (input) for mailman id 1309279; Thu, 14 May 2026 23:23:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfP2-0005ex-Fr for xen-devel@lists.xenproject.org; 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Sorry, it's been a while for this and other series... I am picking that up. > > On Tue, Sep 9, 2025 at 1:26 AM wrote: > > > > From: Denis Mukhin > > > > Add THR register emulation to the I/O port handlder. > > > > Add TX FIFO management code since THR depends on TX FIFO. > > > > TX FIFOs is not emulated as per UART specs for simplicity (not need to emulate > > baud rate). Emulator does not emulate NS8250 (no FIFO), NS16550a (16 bytes) or > > NS16750 (64 bytes). > > > > TX FIFOs is emulated by using xencons_interface which conveniently provides > > primitives for buffer management and later can be used for inter-domain > > communication similarly to vpl011. > > > > Account for DLL == 0: in this case, disable transmitter. > > > > Add UART_IIR_THR interrupt reason handling since it depends on THR register > > access. > > > > Signed-off-by: Denis Mukhin > > --- > > Changes since v6: > > - added DLL == 0 case handling as per Mykola's suggestion > > - dropped UART_IIR_THR clearing in UART_IIR register emulation in ns16x50_io_write8() > > - simplified UART_IIR_THR handling > > - updated ns16x50_iir_check_thr() > > --- > > xen/common/emul/vuart/ns16x50.c | 82 ++++++++++++++++++++++++++++++++- > > 1 file changed, 81 insertions(+), 1 deletion(-) > > > > diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16x50.c > > index 250411e0a7d8..137ce08f4e1d 100644 > > --- a/xen/common/emul/vuart/ns16x50.c > > +++ b/xen/common/emul/vuart/ns16x50.c > > @@ -149,6 +149,66 @@ static int ns16x50_fifo_rx_putchar(struct vuart_ns16x50 *vdev, char c) > > return rc; > > } > > > > +static bool ns16x50_fifo_tx_full(const struct vuart_ns16x50 *vdev) > > +{ > > + const struct xencons_interface *cons = &vdev->cons; > > + > > + return cons->out_prod - cons->out_cons == ARRAY_SIZE(cons->out); > > +} > > + > > +static void ns16x50_fifo_tx_reset(struct vuart_ns16x50 *vdev) > > +{ > > + struct xencons_interface *cons = &vdev->cons; > > + > > + cons->out_cons = cons->out_prod; > > +} > > + > > +/* > > + * Flush cached output to Xen console. > > + */ > > +static void ns16x50_fifo_tx_flush(struct vuart_ns16x50 *vdev) > > +{ > > + struct xencons_interface *cons = &vdev->cons; > > + struct domain *d = vdev->owner; > > + XENCONS_RING_IDX i, n, len = cons->out_prod - cons->out_cons; > > + > > + ASSERT(len <= ARRAY_SIZE(cons->out)); > > + if ( !len ) > > + return; > > + > > + i = MASK_XENCONS_IDX(cons->out_cons, cons->out); > > + n = min_t(XENCONS_RING_IDX, len, ARRAY_SIZE(cons->out) - i); > > + if ( n ) > > + guest_printk(d, guest_prefix "%.*s", n, &cons->out[i]); > > + > > + i = 0; > > + n = len - n; > > + if ( n ) > > + guest_printk(d, guest_prefix "%.*s", n, &cons->out[i]); > > ns16x50_fifo_tx_flush() splits wrapped output into two guest_printk() > calls, so the log gets two prefixes for a single line: > (d1) PART1(d1) PART2 > > Could we linearize the wrapped buffer and emit a single guest_printk() > (e.g. by printing both spans in one format string) to keep just one prefix? Good idea, will do. -- Denis From xen-devel-bounces@lists.xenproject.org Thu May 14 23:35:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 23:35:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309294.1580321 (Exim 4.92) (envelope-from ) id 1wNfaj-0007Y0-I6; Thu, 14 May 2026 23:35:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309294.1580321; Thu, 14 May 2026 23:35:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfaj-0007Xt-Eq; Thu, 14 May 2026 23:35:45 +0000 Received: by outflank-mailman (input) for mailman id 1309294; Thu, 14 May 2026 23:35:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfah-0007Xn-I6 for xen-devel@lists.xenproject.org; Thu, 14 May 2026 23:35:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNfag-00EHkz-U3 for xen-devel@lists.xenproject.org; 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> > + const struct domain *d = vdev->owner; > > + const struct vuart_info *info = vdev->info; > > + const struct xencons_interface *cons; > > + const uint8_t *regs; > > + > > + if ( !vdev ) > > Is this NULL check actually useful here? At this point we’ve already > dereferenced vdev (vdev->owner / vdev->info), so if arg could be NULL > we’d already be in UB. Either the hook never receives NULL (and we can > drop the check or turn it into ASSERT(vdev)), or the check should be > moved before the first dereference. Will promote to ASSERT(). > > > + return; > > + > > + /* Allow printing state in case of a deadlock. */ > > + if ( !spin_trylock(&vdev->lock) ) > > + return; > > + > > + cons = &vdev->cons; > > + regs = &vdev->regs[0]; > > + > > + printk("Virtual " pr_prefix " (%s) I/O port 0x%04x IRQ#%d owner %pd\n", > > + vdev->name, info->base_addr, info->irq, d); > > + > > + printk(" RX FIFO size %ld in_prod %d in_cons %d used %d\n", > > + ARRAY_SIZE(cons->in), cons->in_prod, cons->in_cons, > > + cons->in_prod - cons->in_cons); > > + > > + printk(" TX FIFO size %ld out_prod %d out_cons %d used %d\n", > > + ARRAY_SIZE(cons->out), cons->out_prod, cons->out_cons, > > + cons->out_prod - cons->out_cons); > > + > > + printk(" %02"PRIx8" RBR %02"PRIx8" THR %02"PRIx8" DLL %02"PRIx8" DLM %02"PRIx8"\n", > > + UART_RBR, > > Should this be using cons->in / cons->out instead of cons? Yes, it should! Thanks for the catch! > > > + cons->in[MASK_XENCONS_IDX(cons->in_prod, cons)], > > + cons->out[MASK_XENCONS_IDX(cons->out_prod, cons)], > > As written, MASK_XENCONS_IDX() gets &vdev->cons (struct pointer), not the > RX/TX arrays themselves, so its size/index calculation will use the size > of the pointer/struct rather than the in[]/out[] ring size. I think this > should be: > > cons->in[MASK_XENCONS_IDX(cons->in_prod, cons->in)], > cons->out[MASK_XENCONS_IDX(cons->out_prod, cons->out)], > > > Best regards, > Mykola From xen-devel-bounces@lists.xenproject.org Thu May 14 23:52:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 14 May 2026 23:52:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309303.1580330 (Exim 4.92) (envelope-from ) id 1wNfrB-0002BY-Tk; Thu, 14 May 2026 23:52:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309303.1580330; Thu, 14 May 2026 23:52:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfrB-0002BR-R4; Thu, 14 May 2026 23:52:45 +0000 Received: by outflank-mailman (input) for mailman id 1309303; Thu, 14 May 2026 23:52:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNfrA-0002BK-2H for xen-devel@lists.xenproject.org; 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> > + int rc; > > + > > + if ( pv_shim ) > > + return 0; > > + > > +#ifdef CONFIG_HVM > > ioports_setup_access() now allocates a per-domain io_bitmap for all HVM domains: > > > + d->arch.hvm.io_bitmap = _xmalloc(HVM_IOBITMAP_SIZE, PAGE_SIZE); > > but I only see this being freed for the hardware domain in the > existing failure paths. > Where is io_bitmap freed for non-hardware HVM domains? Missed that. I will add something like ioports_release_access() to release resources. [..] > > > > diff --git a/xen/common/emul/vuart/ns16x50.c b/xen/common/emul/vuart/ns16x50.c > > index c341f012d005..ea34c3ae598a 100644 > > --- a/xen/common/emul/vuart/ns16x50.c > > +++ b/xen/common/emul/vuart/ns16x50.c > > @@ -783,9 +783,20 @@ static int ns16x50_init(void *arg) > > struct vuart_ns16x50 *vdev = arg; > > const struct vuart_info *info = vdev->info; > > struct domain *d = vdev->owner; > > + int rc; > > > > ASSERT(vdev); > > > > + /* Disallow sharing physical I/O port */ > > Should this be undone on teardown and error paths? > > > + rc = ioports_deny_access(d, info->base_addr, > > + info->base_addr + info->size - 1); > AFAIR, there was a feedback on that during the earlier iterations of the series and the agreement was - no need to release resources on teardown since the domain is being destroyed at this point. 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pr=C Message-ID: <591387c7-e78a-4bd2-ae52-c98d66554cbd@amd.com> Date: Thu, 14 May 2026 21:01:28 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: map_domain_pirq(): pirq already mapped? To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= CC: Xen-devel References: <700f3bd5-2887-4f30-95b2-5dd19fb91abe@amd.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF00003F64:EE_|CY1PR12MB9584:EE_ X-MS-Office365-Filtering-Correlation-Id: 95e40369-d5eb-4cae-c194-08deb21d7f57 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|1800799024|82310400026|22082099003|18002099003|56012099003|11063799003|4143699003; X-Microsoft-Antispam-Message-Info: R1WJ0cnwIA10hqERQhNRrit+hCFsZwyM9hveQzBRb5DvZXm2RBbyHEl/Cun+Ugo1e5JB4RMF6gdJgD/5NF1lyUT7OgbksVICRXwZavdlxuxf4TdcqzbWPtufZh0BJvd2wujuSua/AYElH4EKelRrVWR4mdJiDxt/zZSRXTslt9cHd1X+cWVoRHlLOxSS6ynp+d4fUXjKGqPfs5hUyZKAdKC8Gd95N4bBUq18I8S+lvJgLhV6Iwx7hkaUio4mYOWoyWZ4/EjJ7qLESpMACvtRJBJaZG3Txc0OydQMv+D5rnVIvLUk8He3bLNYpX3SDSEY3vWc9fZff3C5OgC3qj2MB+Nuv06VRzOOXtH7GFWTYWQ5RCGjm18MdQfjFlRdIEO0pOSTfPTScQ5/ZJaQAP10U3AllOIwT5SaPIVu8NiIlPPT6n1fpb1dKgls5W2NY0g5CN3LIdQxtVJTswiUjCu0w1xI1+2djpyolPQqXC7CBvbt8253UxRNNP42cRNjFL3F3Ujvuo6hxe9AU+Ndl6+N6O052XHVNh37kdxSlHKd1YG9rrO6qyuhfsS5bQQDdEHOG/cnx5g6dFSX5rSE0/24HzX7GwTVQDgB5/t2gY2hedUt5peqJCkcbWWNxCpSV2fxJHYC9IFh/S55zB+d7IJEVLB4NUVUBiya5zoWSDshuc5I1Sm+exCKni/amEuEVt+ji5E2kMyXlUQ94OLVM7QGYgM7r99/3jHgx9oPvOhB5u8= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(376014)(1800799024)(82310400026)(22082099003)(18002099003)(56012099003)(11063799003)(4143699003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: /7S4+UBS1UVwOStO3ktXyrcpfyrVGnoXnBwclYyx7wBYU/Lx4NOfqiGTzshUmZSoxm9m49VFbN7ycmS6/fGiJlLLIA9IpSNpuy3KQScEWwCKaI4ukGtGZMb1tN2l1DKmTbJKQSq0e1pwYT6vgQVurvY682rQK4YP0Z1lTto2AMPFdIRqbM6ZF+WvE25xvhuCdwcWtxBhT8Mme+o2pBGSHfel7ccUODXDbhb6iHjwp5QVBwAyOkyKqBAIGBRVrc6T7aGCEzI+Qb52tNVYqTyky+D3wYj0T87OBS2cYNGb41PgbESjXIEW9rvi8vx+/+QGR5FS/SnCllTspTNqsu9KNMGFQVJRd0dvyEJkt1rN+roFNqIkFK4e1HDd2oKLRNELPG+7f3n2pSOKOBTAnNHLtwUtTvnRvBZTG8Ot2+qntmvlwSaOVtyAHFJq5Xb64KnX X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 01:01:29.2729 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 95e40369-d5eb-4cae-c194-08deb21d7f57 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF00003F64.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY1PR12MB9584 X-purgate-ID: tlsNG-ebf023/1778806895-4866B3FF-B290B3B4/0/0 X-purgate-type: clean X-purgate-size: 3373 Hi Roger, Thanks for taking a look. On 2026-05-14 04:26, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 09:18:46PM -0400, Jason Andryuk wrote: >> Hi, >> >> Early in map_domain_pirq(), we have this block: >> >> old_irq = domain_pirq_to_irq(d, pirq); >> old_pirq = domain_irq_to_pirq(d, irq); >> >> if ( (old_irq > 0 && (old_irq != irq) ) || >> (old_pirq && (old_pirq != pirq)) ) >> { >> dprintk(XENLOG_G_WARNING, >> "dom%d: pirq %d or irq %d already mapped (%d,%d)\n", >> d->domain_id, pirq, irq, old_pirq, old_irq); >> return 0; >> } >> >> Why do we return 0 instead of -EEXIST? Since the pirq is not updated, the >> caller doesn't know that pirq won't fire - only old_pirq. For >> allocate_and_map_gsi_pirq(), the new pirq is still returned to the caller. >> I would expect old_pirq to be returned so the caller knows what to use. Am >> I missing something? > > Looking at bfc341a65cfb2 it seems like this might have been an attempt > to keep the previous logic in ioapic_guest_write() that didn't return > an error when attempting to add/move an in use IRQ, while switching > ioapic_guest_write() to use map_domain_pirq()? > > The commit description is not very helpful sadly. I think the mention > of "And this patch also makes broken NetBSD dom0 work again." is > relevant. AFAICT NetBSD will do PHYSDEVOP_apic_read -> modify RTE (ie: > set mask bit for example) -> PHYSDEVOP_apic_write. However the > semantics of those hypercalls is not symmetric. PHYSDEVOP_apic_read > will return the vector used by Xen in the RTE, while > PHYSDEVOP_apic_write expects the vector field of the RTE to contain > the pIRQ. I think this is why map_domain_pirq() was adjusted in such > a weird way, to ignore requests with bogus pIRQs and still succeed, so > that PHYSDEVOP_apic_write would also succeed. Ideally the interface > should have been adjusted so that read/modify/write cycles using > PHYSDEVOP_apic_{read,write} would work as expected (iow: > PHYSDEVOP_apic_read should have returned the pIRQ in the vector > field). > > In the context of GSIs, I think we aim for Xen to always identity map > them (so IRQ == pIRQ), but there might be (or might have been) > hypercalls that could allow you to create non-identity mappings > between GSIs and pIRQs. To support non-PCI passthrough with Hyperlaunch, we added code to map a GSI to a vIOAPIC. It does not require identity mapping, and that works. It was while testing conditions that I expected to fail that I found the behavior. First map: machine A -> guest B Then map: machine A -> guest C "success" from the return 0 > Explicitly looking at allocate_and_map_gsi_pirq() do you know what > causes the domain_irq_to_pirq() in allocate_pirq() to not return the > already allocated pIRQ that matches the passed IRQ? Well, it's PVH and I'm making up a "PIRQ" for the vIOAPIC. > Overall we should likely adjust map_domain_pirq() to return -EEIXST, > and then fix ioapic_guest_write() to shallow such error so we can keep > the current behavior for that specific interface. Having been focused on PVH, I didn't look much at the PV behavior. But it was still surprising to see the "no-op" success. Thanks for the pointers. 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Teardown uses these records to hand them back in the right RMI order. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/state.c | 19 ++++++++++++++++ xen/arch/arm/include/asm/cca.h | 40 ++++++++++++++++++++++++++++++++++ 2 files changed, 59 insertions(+) diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index a47d9cd7b6fd..66375965a1b4 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -10,17 +10,36 @@ static void arm_cca_reset_domain_state(struct domain *d) { + unsigned int i; + d->arch.cca.realm_active = false; d->arch.cca.rd = INVALID_PADDR; d->arch.cca.rmi_features0 = 0; d->arch.cca.rmi_features1 = 0; + d->arch.cca.rd_page = NULL; + d->arch.cca.rtt_root_page = NULL; + d->arch.cca.nr_realm_sro_pages = 0; + d->arch.cca.rtts = NULL; + d->arch.cca.nr_rtts = 0; + d->arch.cca.data_pages = NULL; + d->arch.cca.nr_data_pages = 0; + + for ( i = 0; i < ARRAY_SIZE(d->arch.cca.realm_sro_pages); ++i ) + d->arch.cca.realm_sro_pages[i] = NULL; } static void arm_cca_reset_vcpu_state(struct vcpu *v) { + unsigned int i; + v->arch.cca.rec = INVALID_PADDR; v->arch.cca.run = NULL; v->arch.cca.run_pa = INVALID_PADDR; + v->arch.cca.rec_page = NULL; + v->arch.cca.nr_aux = 0; + + for ( i = 0; i < ARRAY_SIZE(v->arch.cca.aux_pages); ++i ) + v->arch.cca.aux_pages[i] = NULL; } void arm_cca_domain_init(struct domain *d) diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index 1be43327119e..6bf644fbcee5 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -14,20 +14,60 @@ */ #define ARM_CCA_MAX_REC_AUX 16U +/* + * Xen implementation cap for pages accepted by one memory-transferring SRO, + * not an RMI architectural limit. Switch to dynamic tracking if a real RMM + * needs more. + */ +#define ARM_CCA_MAX_SRO_DONATION_PAGES 64U + struct domain; struct vcpu; +struct page_info; + +struct arm_cca_rtt_record { + paddr_t ipa; + paddr_t pa; + unsigned int level; +}; + +struct arm_cca_data_page_record { + paddr_t ipa; + paddr_t pa; +}; struct arm_cca_domain_state { bool realm_active; paddr_t rd; unsigned long rmi_features0; unsigned long rmi_features1; + + /* + * Host references for granules whose RMM state is no longer represented + * by Xen's page allocator alone. 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 04/26] xen/arm/cca: add Realm domain and vCPU state Date: Fri, 15 May 2026 13:07:50 +0900 Message-ID: <20260515040812.983626-5-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0352.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:7c::19) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB3981:EE_ X-MS-Office365-Filtering-Correlation-Id: 63cdcc5a-39d3-40a8-b9c4-08deb2379a6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|366016|10070799003|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: ZwoBko41sEgLYwrUrKmeEfiYFlxIgyph0mcsCSU6JEuJRI57Bf2AmHyd+NkzxkU/qbzAvY0Q8REFvkQYIBLvhRrsumiz/QPMc5vHVEfgTCEJJWEfvEIwypZKuyGwCns4rCIp+6WQOrTwxxptYN6cvYoN1rnlJVvDk9gq5hbW0Ohb5fjf4P/rUvA4WgPrlvpYzELkwsiJzJYtv6Fa2QnFHPJQOZ219S4HHsxwGgdOWawnKm80SreoBbRCwAHtT7ja6WMRH1plXasL2BJ0W5lCzGEW3Hllz5cfn1GNqqH1XRBObuaqICFtd/fgYxqwkFJsRUPpq22IGHVl5XFVkJ8BxA4nKhIzyfm2nwzrBhIypNIaSs1KMgypdVJM/YMCSMeD5BcNRfQI8lYA3a7qMMSWsEz538opakLw2v6P1DtIDhLGb5IytSKUz1U72CsmbFWvtYo4L5Q5vZCOqEi6s0pwDPnS3Sq1SS4pr9nWsAjmGozKqVLfRIxkGQoIVfX5YkqB25W2SQrWfLo3IPVgut2ukEHuQkdMV3E+KTR2gmLEUXNdPFGTmIBkrMiPKnYpDV3Sk3YyyMH7AuzHwmZ7Ebe2yfa0KnFkD6DEn1T23RU//UXaHFpLu/yvjd+Zh4tN7oEao/bmz23EqjKTnET3YB4hcErcU4z4lBqSIuQLREhyangYt7ShhhlKoZLAIf1wbitx X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(366016)(10070799003)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1102; 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/state.c | 68 +++++++++++++++++++++++++++++++ xen/arch/arm/domain.c | 14 +++++++ xen/arch/arm/include/asm/cca.h | 42 +++++++++++++++++++ xen/arch/arm/include/asm/domain.h | 16 ++++++++ 5 files changed, 141 insertions(+) create mode 100644 xen/arch/arm/cca/state.c create mode 100644 xen/arch/arm/include/asm/cca.h diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index 9c351f901dfd..aaa04e3b914b 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -1 +1,2 @@ obj-y += rmi.o +obj-y += state.o diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c new file mode 100644 index 000000000000..a47d9cd7b6fd --- /dev/null +++ b/xen/arch/arm/cca/state.c @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#include + +#include "rmi.h" + +static void arm_cca_reset_domain_state(struct domain *d) +{ + d->arch.cca.realm_active = false; + d->arch.cca.rd = INVALID_PADDR; + d->arch.cca.rmi_features0 = 0; + d->arch.cca.rmi_features1 = 0; +} + +static void arm_cca_reset_vcpu_state(struct vcpu *v) +{ + v->arch.cca.rec = INVALID_PADDR; + v->arch.cca.run = NULL; + v->arch.cca.run_pa = INVALID_PADDR; +} + +void arm_cca_domain_init(struct domain *d) +{ + arm_cca_reset_domain_state(d); +} + +void arm_cca_domain_destroy(struct domain *d) +{ + arm_cca_reset_domain_state(d); +} + +void arm_cca_vcpu_init(struct vcpu *v) +{ + arm_cca_reset_vcpu_state(v); +} + +void arm_cca_vcpu_destroy(struct vcpu *v) +{ + if ( v->arch.cca.run ) + arm_cca_free_rec_run(v->arch.cca.run); + + arm_cca_reset_vcpu_state(v); +} + +void *arm_cca_alloc_rec_run(void) +{ + void *run; + + BUILD_BUG_ON(sizeof(struct arm_cca_rmi_rec_run) != + ARM_CCA_RMI_REC_RUN_SIZE); + + run = alloc_xenheap_page(); + if ( run == NULL ) + return NULL; + + clear_page(run); + + return run; +} + +void arm_cca_free_rec_run(void *run) +{ + free_xenheap_page(run); +} diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 26380a807cad..4b6115491c59 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -482,6 +482,10 @@ int arch_vcpu_create(struct vcpu *v) v->arch.saved_context.sp = (register_t)v->arch.cpu_info; v->arch.saved_context.pc = (register_t)continue_new_vcpu; +#ifdef CONFIG_ARM_CCA + arm_cca_vcpu_init(v); +#endif + /* Idle VCPUs don't need the rest of this setup */ if ( is_idle_vcpu(v) ) return rc; @@ -526,6 +530,9 @@ fail: void arch_vcpu_destroy(struct vcpu *v) { +#ifdef CONFIG_ARM_CCA + arm_cca_vcpu_destroy(v); +#endif if ( is_sve_domain(v->domain) ) sve_context_free(v); vcpu_timer_destroy(v); @@ -642,6 +649,10 @@ int arch_domain_create(struct domain *d, BUILD_BUG_ON(GUEST_MAX_VCPUS < MAX_VIRT_CPUS); +#ifdef CONFIG_ARM_CCA + arm_cca_domain_init(d); +#endif + #ifdef CONFIG_IOREQ_SERVER ioreq_domain_init(d); #endif @@ -786,6 +797,9 @@ void arch_domain_destroy(struct domain *d) { resume_ctx_reset(&d->arch.resume_ctx); +#ifdef CONFIG_ARM_CCA + arm_cca_domain_destroy(d); +#endif tee_free_domain_ctx(d); /* IOMMU page table is shared with P2M, always call * iommu_domain_destroy() before p2m_final_teardown(). diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h new file mode 100644 index 000000000000..1be43327119e --- /dev/null +++ b/xen/arch/arm/include/asm/cca.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ARM_CCA_H +#define ARM_CCA_H + +#include + +/* + * Keep the public ARM CCA arch header independent from the internal RMI ABI + * definitions that live under arch/arm/cca/. + * + * DEN0137 2.0-bet1 - B3.99 RecAuxCount caps the implementation-defined + * number of REC auxiliary granules. REC_CREATE gets them through SRO + * donation. + */ +#define ARM_CCA_MAX_REC_AUX 16U + +struct domain; +struct vcpu; + +struct arm_cca_domain_state { + bool realm_active; + paddr_t rd; + unsigned long rmi_features0; + unsigned long rmi_features1; +}; + +struct arm_cca_vcpu_state { + paddr_t rec; + void *run; + paddr_t run_pa; +}; + +void arm_cca_domain_init(struct domain *d); +void arm_cca_domain_destroy(struct domain *d); + +void arm_cca_vcpu_init(struct vcpu *v); +void arm_cca_vcpu_destroy(struct vcpu *v); + +void *arm_cca_alloc_rec_run(void); +void arm_cca_free_rec_run(void *run); + +#endif /* ARM_CCA_H */ diff --git a/xen/arch/arm/include/asm/domain.h b/xen/arch/arm/include/asm/domain.h index 46a5cdc0c800..25230c18d16b 100644 --- a/xen/arch/arm/include/asm/domain.h +++ b/xen/arch/arm/include/asm/domain.h @@ -3,6 +3,7 @@ #include #include +#include #include #include #include @@ -96,6 +97,9 @@ struct arch_domain /* ARM SCI driver's specific data */ void *sci_data; #endif +#ifdef CONFIG_ARM_CCA + struct arm_cca_domain_state cca; +#endif struct resume_info resume_ctx; } __cacheline_aligned; @@ -207,6 +211,10 @@ struct arch_vcpu /* Timer registers */ register_t cntkctl; +#ifdef CONFIG_ARM_CCA + struct arm_cca_vcpu_state cca; +#endif + struct vtimer phys_timer; struct vtimer virt_timer; bool vtimer_initialized; @@ -224,6 +232,14 @@ struct arch_vcpu void vcpu_show_registers(struct vcpu *v); void vcpu_switch_to_aarch64_mode(struct vcpu *v); +#ifdef CONFIG_ARM_CCA +#define is_domain_realm(d) ((d)->arch.cca.realm_active) +#define is_vcpu_realm(v) is_domain_realm((v)->domain) +#else +#define is_domain_realm(d) ({ (void)(d); false; }) +#define is_vcpu_realm(v) ({ (void)(v); false; }) +#endif + /* * Due to the restriction of GICv3, the number of vCPUs in AFF0 is * limited to 16, thus only the first 4 bits of AFF0 are legal. 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/rmi-abi.h | 433 +++++++++++++++++++++++++++++++++++++ 1 file changed, 433 insertions(+) create mode 100644 xen/arch/arm/cca/rmi-abi.h diff --git a/xen/arch/arm/cca/rmi-abi.h b/xen/arch/arm/cca/rmi-abi.h new file mode 100644 index 000000000000..7afb1ae05bca --- /dev/null +++ b/xen/arch/arm/cca/rmi-abi.h @@ -0,0 +1,433 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * RMI v2.0 ABI definitions used by Xen from DEN0137 2.0-bet1. + */ + +#ifndef ARM_CCA_RMI_ABI_H +#define ARM_CCA_RMI_ABI_H + +#include + +#define ARM_CCA_RMI_ABI_VERSION_MAJOR 2U +#define ARM_CCA_RMI_ABI_VERSION_MINOR 0U +#define ARM_CCA_RMI_ABI_VERSION \ + (((uint32_t)ARM_CCA_RMI_ABI_VERSION_MAJOR << 16) | \ + ARM_CCA_RMI_ABI_VERSION_MINOR) + +#define ARM_CCA_RMI_VERSION_GET_MAJOR(_v) ((_v) >> 16) +#define ARM_CCA_RMI_VERSION_GET_MINOR(_v) ((_v) & 0xffffU) + +#define ARM_CCA_RMI_FID_BASE 0xC4000150U +#define ARM_CCA_RMI_FID(_off) (ARM_CCA_RMI_FID_BASE + (_off)) + +/* DEN0137 2.0-bet1 - B4.5 RMI commands */ +#define ARM_CCA_RMI_VERSION_FID ARM_CCA_RMI_FID(0x0) +#define ARM_CCA_RMI_RTT_DATA_MAP_INIT_FID ARM_CCA_RMI_FID(0x3) +#define ARM_CCA_RMI_REALM_ACTIVATE_FID ARM_CCA_RMI_FID(0x7) +#define ARM_CCA_RMI_REALM_CREATE_FID ARM_CCA_RMI_FID(0x8) +#define ARM_CCA_RMI_REALM_DESTROY_FID ARM_CCA_RMI_FID(0x9) +#define ARM_CCA_RMI_REC_CREATE_FID ARM_CCA_RMI_FID(0xa) +#define ARM_CCA_RMI_REC_DESTROY_FID ARM_CCA_RMI_FID(0xb) +#define ARM_CCA_RMI_REC_ENTER_FID ARM_CCA_RMI_FID(0xc) +#define ARM_CCA_RMI_RTT_CREATE_FID ARM_CCA_RMI_FID(0xd) +#define ARM_CCA_RMI_RTT_DESTROY_FID ARM_CCA_RMI_FID(0xe) +#define ARM_CCA_RMI_RTT_READ_ENTRY_FID ARM_CCA_RMI_FID(0x11) +#define ARM_CCA_RMI_RTT_DEV_VALIDATE_FID ARM_CCA_RMI_FID(0x13) +#define ARM_CCA_RMI_PSCI_COMPLETE_FID ARM_CCA_RMI_FID(0x14) +#define ARM_CCA_RMI_FEATURES_FID ARM_CCA_RMI_FID(0x15) +#define ARM_CCA_RMI_RTT_FOLD_FID ARM_CCA_RMI_FID(0x16) +#define ARM_CCA_RMI_RTT_INIT_RIPAS_FID ARM_CCA_RMI_FID(0x18) +#define ARM_CCA_RMI_RTT_SET_RIPAS_FID ARM_CCA_RMI_FID(0x19) +#define ARM_CCA_RMI_VSMMU_CREATE_FID ARM_CCA_RMI_FID(0x1a) +#define ARM_CCA_RMI_VSMMU_DESTROY_FID ARM_CCA_RMI_FID(0x1b) +#define ARM_CCA_RMI_RMM_CONFIG_SET_FID ARM_CCA_RMI_FID(0x1e) +#define ARM_CCA_RMI_PSMMU_IRQ_NOTIFY_FID ARM_CCA_RMI_FID(0x1f) +#define ARM_CCA_RMI_PDEV_ABORT_FID ARM_CCA_RMI_FID(0x24) +#define ARM_CCA_RMI_PDEV_COMMUNICATE_FID ARM_CCA_RMI_FID(0x25) +#define ARM_CCA_RMI_PDEV_CREATE_FID ARM_CCA_RMI_FID(0x26) +#define ARM_CCA_RMI_PDEV_DESTROY_FID ARM_CCA_RMI_FID(0x27) +#define ARM_CCA_RMI_PDEV_GET_STATE_FID ARM_CCA_RMI_FID(0x28) +#define ARM_CCA_RMI_PDEV_STREAM_KEY_REFRESH_FID ARM_CCA_RMI_FID(0x2a) +#define ARM_CCA_RMI_PDEV_SET_PUBKEY_FID ARM_CCA_RMI_FID(0x2b) +#define ARM_CCA_RMI_PDEV_STOP_FID ARM_CCA_RMI_FID(0x2c) +#define ARM_CCA_RMI_RTT_AUX_CREATE_FID ARM_CCA_RMI_FID(0x2d) +#define ARM_CCA_RMI_RTT_AUX_DESTROY_FID ARM_CCA_RMI_FID(0x2e) +#define ARM_CCA_RMI_RTT_AUX_FOLD_FID ARM_CCA_RMI_FID(0x2f) +#define ARM_CCA_RMI_VDEV_ABORT_FID ARM_CCA_RMI_FID(0x35) +#define ARM_CCA_RMI_VDEV_COMMUNICATE_FID ARM_CCA_RMI_FID(0x36) +#define ARM_CCA_RMI_VDEV_CREATE_FID ARM_CCA_RMI_FID(0x37) +#define ARM_CCA_RMI_VDEV_DESTROY_FID ARM_CCA_RMI_FID(0x38) +#define ARM_CCA_RMI_VDEV_GET_STATE_FID ARM_CCA_RMI_FID(0x39) +#define ARM_CCA_RMI_VDEV_UNLOCK_FID ARM_CCA_RMI_FID(0x3a) +#define ARM_CCA_RMI_RTT_SET_S2AP_FID ARM_CCA_RMI_FID(0x3b) +#define ARM_CCA_RMI_VDEV_COMPLETE_FID ARM_CCA_RMI_FID(0x3e) +#define ARM_CCA_RMI_VDEV_GET_INTERFACE_REPORT_FID ARM_CCA_RMI_FID(0x80) +#define ARM_CCA_RMI_VDEV_GET_MEASUREMENTS_FID ARM_CCA_RMI_FID(0x81) +#define ARM_CCA_RMI_VDEV_LOCK_FID ARM_CCA_RMI_FID(0x82) +#define ARM_CCA_RMI_VDEV_START_FID ARM_CCA_RMI_FID(0x83) +#define ARM_CCA_RMI_VSMMU_EVENT_NOTIFY_FID ARM_CCA_RMI_FID(0x86) +#define ARM_CCA_RMI_PSMMU_ACTIVATE_FID ARM_CCA_RMI_FID(0x87) +#define ARM_CCA_RMI_PSMMU_DEACTIVATE_FID ARM_CCA_RMI_FID(0x88) +#define ARM_CCA_RMI_PSMMU_ST_L2_CREATE_FID ARM_CCA_RMI_FID(0x8b) +#define ARM_CCA_RMI_PSMMU_ST_L2_DESTROY_FID ARM_CCA_RMI_FID(0x8c) +#define ARM_CCA_RMI_DPT_L0_CREATE_FID ARM_CCA_RMI_FID(0x8d) +#define ARM_CCA_RMI_DPT_L0_DESTROY_FID ARM_CCA_RMI_FID(0x8e) +#define ARM_CCA_RMI_DPT_L1_CREATE_FID ARM_CCA_RMI_FID(0x8f) +#define ARM_CCA_RMI_DPT_L1_DESTROY_FID ARM_CCA_RMI_FID(0x90) +#define ARM_CCA_RMI_GRANULE_TRACKING_GET_FID ARM_CCA_RMI_FID(0x91) +#define ARM_CCA_RMI_GRANULE_TRACKING_SET_FID ARM_CCA_RMI_FID(0x93) +#define ARM_CCA_RMI_RMM_CONFIG_GET_FID ARM_CCA_RMI_FID(0x9c) +#define ARM_CCA_RMI_VSMMU_EVENT_COMPLETE_FID ARM_CCA_RMI_FID(0x9e) +#define ARM_CCA_RMI_PSMMU_EVENT_DISCARD_FID ARM_CCA_RMI_FID(0xa0) +#define ARM_CCA_RMI_GRANULE_RANGE_DELEGATE_FID ARM_CCA_RMI_FID(0xa1) +#define ARM_CCA_RMI_GRANULE_RANGE_UNDELEGATE_FID ARM_CCA_RMI_FID(0xa2) +#define ARM_CCA_RMI_GPT_L1_CREATE_FID ARM_CCA_RMI_FID(0xa3) +#define ARM_CCA_RMI_GPT_L1_DESTROY_FID ARM_CCA_RMI_FID(0xa4) +#define ARM_CCA_RMI_RTT_DATA_MAP_FID ARM_CCA_RMI_FID(0xa5) +#define ARM_CCA_RMI_RTT_DATA_UNMAP_FID ARM_CCA_RMI_FID(0xa6) +#define ARM_CCA_RMI_RTT_DEV_MAP_FID ARM_CCA_RMI_FID(0xa7) +#define ARM_CCA_RMI_RTT_DEV_UNMAP_FID ARM_CCA_RMI_FID(0xa8) +#define ARM_CCA_RMI_RTT_ARCH_DEV_MAP_FID ARM_CCA_RMI_FID(0xa9) +#define ARM_CCA_RMI_RTT_ARCH_DEV_UNMAP_FID ARM_CCA_RMI_FID(0xaa) +#define ARM_CCA_RMI_RTT_UNPROT_MAP_FID ARM_CCA_RMI_FID(0xab) +#define ARM_CCA_RMI_RTT_UNPROT_UNMAP_FID ARM_CCA_RMI_FID(0xac) +#define ARM_CCA_RMI_RTT_AUX_PROT_MAP_FID ARM_CCA_RMI_FID(0xad) +#define ARM_CCA_RMI_RTT_AUX_PROT_UNMAP_FID ARM_CCA_RMI_FID(0xae) +#define ARM_CCA_RMI_RTT_AUX_UNPROT_MAP_FID ARM_CCA_RMI_FID(0xaf) +#define ARM_CCA_RMI_RTT_AUX_UNPROT_UNMAP_FID ARM_CCA_RMI_FID(0xb0) +#define ARM_CCA_RMI_REALM_TERMINATE_FID ARM_CCA_RMI_FID(0xb1) +#define ARM_CCA_RMI_RMM_ACTIVATE_FID ARM_CCA_RMI_FID(0xb2) +#define ARM_CCA_RMI_OP_CONTINUE_FID ARM_CCA_RMI_FID(0xb3) +#define ARM_CCA_RMI_PDEV_STREAM_CONNECT_FID ARM_CCA_RMI_FID(0xb4) +#define ARM_CCA_RMI_PDEV_STREAM_DISCONNECT_FID ARM_CCA_RMI_FID(0xb5) +#define ARM_CCA_RMI_PDEV_STREAM_COMPLETE_FID ARM_CCA_RMI_FID(0xb6) +#define ARM_CCA_RMI_PDEV_STREAM_KEY_PURGE_FID ARM_CCA_RMI_FID(0xb7) +#define ARM_CCA_RMI_OP_MEM_DONATE_FID ARM_CCA_RMI_FID(0xb8) +#define ARM_CCA_RMI_OP_MEM_RECLAIM_FID ARM_CCA_RMI_FID(0xb9) +#define ARM_CCA_RMI_OP_CANCEL_FID ARM_CCA_RMI_FID(0xba) +#define ARM_CCA_RMI_VSMMU_FEATURES_FID ARM_CCA_RMI_FID(0xbb) +#define ARM_CCA_RMI_VSMMU_CMD_GET_FID ARM_CCA_RMI_FID(0xbc) +#define ARM_CCA_RMI_VSMMU_CMD_COMPLETE_FID ARM_CCA_RMI_FID(0xbd) + +/* DEN0137 2.0-bet1 - B4.6.1 RmiAddrBlockSize type */ +#define ARM_CCA_RMI_PAGE_L3 0U +#define ARM_CCA_RMI_BLOCK_L2 1U +#define ARM_CCA_RMI_BLOCK_L1 2U +#define ARM_CCA_RMI_BLOCK_L0 3U + +/* DEN0137 2.0-bet1 - B4.6.5 RmiAddrRangeDesc4KB type */ +#define ARM_CCA_RMI_ADDR_DESC_4K_SZ_SHIFT 0U +#define ARM_CCA_RMI_ADDR_DESC_4K_SZ_WIDTH 2U +#define ARM_CCA_RMI_ADDR_DESC_4K_CNT_SHIFT 2U +#define ARM_CCA_RMI_ADDR_DESC_4K_CNT_WIDTH 10U +#define ARM_CCA_RMI_ADDR_DESC_4K_ADDR_SHIFT 12U +#define ARM_CCA_RMI_ADDR_DESC_4K_ADDR_WIDTH 40U +#define ARM_CCA_RMI_ADDR_DESC_4K_ST_SHIFT 63U +#define ARM_CCA_RMI_ADDR_DESC_4K_ST_WIDTH 1U + +/* DEN0137 2.0-bet1 - B4.6.10 RmiContinueBeyond type */ +#define ARM_CCA_RMI_CONTINUE_KEEP_GOING 0U +#define ARM_CCA_RMI_CONTINUE_STOP 1U + +/* DEN0137 2.0-bet1 - B4.6.12 RmiDataFlags type */ +#define ARM_CCA_RMI_DATA_FLAGS_MEASURE_SHIFT 0U +#define ARM_CCA_RMI_DATA_FLAGS_MEASURE_WIDTH 1U + +/* DEN0137 2.0-bet1 - B4.6.13 RmiDataMeasureContent type */ +#define ARM_CCA_RMI_NO_MEASURE_CONTENT 0U +#define ARM_CCA_RMI_MEASURE_CONTENT 1U + +#define ARM_CCA_RMI_DATA_FLAGS_MEASURE_CONTENT \ + (ARM_CCA_RMI_MEASURE_CONTENT << ARM_CCA_RMI_DATA_FLAGS_MEASURE_SHIFT) + +/* DEN0137 2.0-bet1 - B4.6.22 RmiFeature type */ +#define ARM_CCA_RMI_FEATURE_FALSE 0U +#define ARM_CCA_RMI_FEATURE_TRUE 1U + +/* DEN0137 2.0-bet1 - B4.6.23 RmiFeatureRegister0 type */ +#define ARM_CCA_RMI_FEATURE_REGISTER_0_S2SZ_SHIFT 0U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_S2SZ_WIDTH 8U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_LPA2_SHIFT 8U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_LPA2_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_SHIFT 9U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_VL_SHIFT 10U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_VL_WIDTH 4U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_SHIFT 14U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH 6U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT 20U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH 6U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_SHIFT 26U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_SHIFT 27U +#define ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_WIDTH 5U + +/* DEN0137 2.0-bet1 - B4.6.24 RmiFeatureRegister1 type */ +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_4KB_SHIFT 0U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_4KB_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_16KB_SHIFT 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_16KB_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_64KB_SHIFT 2U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_64KB_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_256_SHIFT 3U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_256_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_384_SHIFT 4U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_384_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_512_SHIFT 5U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_512_WIDTH 1U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER_SHIFT 6U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER_WIDTH 4U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_L0GPTSZ_SHIFT 10U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_L0GPTSZ_WIDTH 4U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_PPS_SHIFT 14U +#define ARM_CCA_RMI_FEATURE_REGISTER_1_PPS_WIDTH 3U + +/* DEN0137 2.0-bet1 - B4.6.27 RmiFeatureRegister4 type */ +#define ARM_CCA_RMI_FEATURE_REGISTER_4_MEC_COUNT_SHIFT 0U +#define ARM_CCA_RMI_FEATURE_REGISTER_4_MEC_COUNT_WIDTH 64U + +/* DEN0137 2.0-bet1 - B4.6.29 RmiGranuleSize type */ +#define ARM_CCA_RMI_GRANULE_SIZE_4KB 0U +#define ARM_CCA_RMI_GRANULE_SIZE_16KB 1U +#define ARM_CCA_RMI_GRANULE_SIZE_64KB 2U + +/* DEN0137 2.0-bet1 - B4.6.30 RmiHashAlgorithm type */ +#define ARM_CCA_RMI_HASH_SHA_256 0U +#define ARM_CCA_RMI_HASH_SHA_512 1U +#define ARM_CCA_RMI_HASH_SHA_384 2U + +/* DEN0137 2.0-bet1 - B4.6.35 RmiMecPolicy type */ +#define ARM_CCA_RMI_MEC_POLICY_SHARED 0U +#define ARM_CCA_RMI_MEC_POLICY_PRIVATE 1U + +/* DEN0137 2.0-bet1 - B4.6.36 RmiMemCategory type */ +#define ARM_CCA_RMI_MEM_CATEGORY_CONVENTIONAL 0U +#define ARM_CCA_RMI_MEM_CATEGORY_DEV_NCOH 1U +#define ARM_CCA_RMI_MEM_CATEGORY_DEV_COH 2U + +/* DEN0137 2.0-bet1 - B4.6.37 RmiOpCanCancel type */ +#define ARM_CCA_RMI_OP_CANNOT_CANCEL 0U +#define ARM_CCA_RMI_OP_CAN_CANCEL 1U + +/* DEN0137 2.0-bet1 - B4.6.38 RmiOpMemContig type */ +#define ARM_CCA_RMI_OP_MEM_NON_CONTIG 0U +#define ARM_CCA_RMI_OP_MEM_CONTIG 1U + +/* DEN0137 2.0-bet1 - B4.6.39 RmiOpMemDonateReq type */ +#define ARM_CCA_RMI_OP_DONATE_BLK_SIZE_SHIFT 0U +#define ARM_CCA_RMI_OP_DONATE_BLK_SIZE_WIDTH 2U +#define ARM_CCA_RMI_OP_DONATE_BLK_COUNT_SHIFT 2U +#define ARM_CCA_RMI_OP_DONATE_BLK_COUNT_WIDTH 14U +#define ARM_CCA_RMI_OP_DONATE_MEM_CONTIG_SHIFT 16U +#define ARM_CCA_RMI_OP_DONATE_MEM_CONTIG_WIDTH 1U +#define ARM_CCA_RMI_OP_DONATE_MEM_STATE_SHIFT 17U +#define ARM_CCA_RMI_OP_DONATE_MEM_STATE_WIDTH 1U + +/* DEN0137 2.0-bet1 - B4.6.40 RmiOpMemReq type */ +#define ARM_CCA_RMI_OP_MEM_REQ_NONE 0U +#define ARM_CCA_RMI_OP_MEM_REQ_DONATE 1U +#define ARM_CCA_RMI_OP_MEM_REQ_RECLAIM 2U + +/* DEN0137 2.0-bet1 - B4.6.41 RmiOpMemState type */ +#define ARM_CCA_RMI_OP_MEM_DELEGATED 0U +#define ARM_CCA_RMI_OP_MEM_UNDELEGATED 1U + +/* DEN0137 2.0-bet1 - B4.6.60 RmiRealmFlags0 type */ +#define ARM_CCA_RMI_REALM_FLAGS0_MEC_POLICY_SHIFT 7U +#define ARM_CCA_RMI_REALM_FLAGS0_MEC_POLICY_WIDTH 2U +#define ARM_CCA_RMI_REALM_FLAGS0_MEC_POLICY(policy) \ + ((uint64_t)(policy) << ARM_CCA_RMI_REALM_FLAGS0_MEC_POLICY_SHIFT) + +/* DEN0137 2.0-bet1 - B4.6.62 RmiRealmParams type */ +#define ARM_CCA_RMI_PARAMS_SIZE 0x1000U +#define ARM_CCA_RMI_RPV_SIZE 64U + +struct arm_cca_rmi_realm_params { + uint64_t flags0; + uint8_t s2sz; + uint8_t __pad0[0x10 - 0x09]; + uint8_t sve_vl; + uint8_t __pad1[0x18 - 0x11]; + uint8_t num_bps; + uint8_t __pad2[0x20 - 0x19]; + uint8_t num_wps; + uint8_t __pad3[0x28 - 0x21]; + uint8_t pmu_num_ctrs; + uint8_t __pad4[0x30 - 0x29]; + uint8_t hash_algo; + uint8_t __pad5[0x38 - 0x31]; + uint64_t num_aux_planes; + uint8_t __pad6[0x400 - 0x40]; + uint8_t rpv[ARM_CCA_RMI_RPV_SIZE]; + uint64_t ats_plane; + uint8_t __pad7[0x808 - 0x448]; + uint64_t rtt_base; + int64_t rtt_level_start; + uint32_t rtt_num_start; + uint8_t __pad8[0x820 - 0x81c]; + uint64_t flags1; + uint8_t __pad9[0xf80 - 0x828]; + uint64_t aux_rtt_base[3]; + uint8_t __pad10[ARM_CCA_RMI_PARAMS_SIZE - 0xf98]; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.63 RmiRecCreateFlags type */ +#define ARM_CCA_RMI_REC_CREATE_RUNNABLE (1UL << 0) + +/* DEN0137 2.0-bet1 - B4.6.64 RmiRecEnter type */ +#define ARM_CCA_RMI_REC_ENTER_SIZE 0x800U +#define ARM_CCA_RMI_REC_NR_GPRS 31U + +struct arm_cca_rmi_rec_enter { + uint64_t flags; + uint8_t __pad0[0x200 - 0x008]; + uint64_t gprs[ARM_CCA_RMI_REC_NR_GPRS]; + uint8_t __pad1[ARM_CCA_RMI_REC_ENTER_SIZE - + (0x200 + ARM_CCA_RMI_REC_NR_GPRS * 8)]; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.65 RmiRecEnterFlags type */ +#define ARM_CCA_RMI_REC_ENTER_FLAG_EMUL_MMIO (1UL << 0) +#define ARM_CCA_RMI_REC_ENTER_FLAG_INJECT_SEA (1UL << 1) +#define ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFI (1UL << 2) +#define ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFE (1UL << 3) +#define ARM_CCA_RMI_REC_ENTER_FLAG_RIPAS_RESPONSE (1UL << 4) +#define ARM_CCA_RMI_REC_ENTER_FLAG_S2AP_RESPONSE (1UL << 5) +#define ARM_CCA_RMI_REC_ENTER_FLAG_DEV_MEM_RESPONSE (1UL << 6) +#define ARM_CCA_RMI_REC_ENTER_FLAG_FORCE_P0 (1UL << 7) + +/* DEN0137 2.0-bet1 - B4.6.66 RmiRecExit type */ +#define ARM_CCA_RMI_REC_EXIT_SIZE 0x800U + +struct arm_cca_rmi_rec_exit { + uint8_t exit_reason; + uint8_t __pad0[0x100 - 0x001]; + uint64_t esr; + uint64_t far; + uint64_t hpfar; + uint64_t rtt_tree; + uint8_t __pad1[0x200 - 0x120]; + uint64_t gprs[ARM_CCA_RMI_REC_NR_GPRS]; + uint8_t __pad2[0x400 - (0x200 + ARM_CCA_RMI_REC_NR_GPRS * 8)]; + uint64_t cntp_ctl; + uint64_t cntp_cval; + uint64_t cntv_ctl; + uint64_t cntv_cval; + uint8_t __pad3[0x500 - 0x420]; + uint64_t ripas_base; + uint64_t ripas_top; + uint8_t ripas_value; + uint8_t __pad4[0x520 - 0x511]; + uint64_t s2ap_base; + uint64_t s2ap_top; + uint64_t vdev_id_1; + uint64_t vdev_id_2; + uint64_t dev_mem_base; + uint64_t dev_mem_top; + uint64_t dev_mem_pa; + uint8_t __pad5[0x600 - 0x558]; + uint16_t imm; + uint8_t __pad6[0x608 - 0x602]; + uint64_t plane; + uint8_t __pad7[0x700 - 0x610]; + uint8_t pmu_ovf_status; + uint8_t __pad8[0x710 - 0x701]; + uint64_t vsmmu; + uint8_t __pad9[ARM_CCA_RMI_REC_EXIT_SIZE - 0x718]; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.67 RmiRecExitReason type */ +#define ARM_CCA_RMI_EXIT_SYNC 0U +#define ARM_CCA_RMI_EXIT_IRQ 1U +#define ARM_CCA_RMI_EXIT_FIQ 2U +#define ARM_CCA_RMI_EXIT_PSCI 3U +#define ARM_CCA_RMI_EXIT_RIPAS_CHANGE 4U +#define ARM_CCA_RMI_EXIT_HOST_CALL 5U +#define ARM_CCA_RMI_EXIT_SERROR 6U +#define ARM_CCA_RMI_EXIT_S2AP_CHANGE 7U +#define ARM_CCA_RMI_EXIT_VDEV_REQUEST 8U +#define ARM_CCA_RMI_EXIT_VDEV_VALIDATE_MAPPING 9U +#define ARM_CCA_RMI_EXIT_VSMMU_COMMAND 10U + +/* DEN0137 2.0-bet1 - B4.6.69 RmiRecParams type */ +#define ARM_CCA_RMI_REC_CREATE_NR_GPRS 8U + +struct arm_cca_rmi_rec_params { + uint64_t flags; + uint8_t __pad0[0x100 - 0x008]; + uint64_t mpidr; + uint8_t __pad1[0x200 - 0x108]; + uint64_t pc; + uint8_t __pad2[0x300 - 0x208]; + uint64_t gprs[ARM_CCA_RMI_REC_CREATE_NR_GPRS]; + uint8_t __pad3[ARM_CCA_RMI_PARAMS_SIZE - + (0x300 + ARM_CCA_RMI_REC_CREATE_NR_GPRS * 8)]; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.70 RmiRecRun type */ +#define ARM_CCA_RMI_REC_RUN_SIZE 0x1000U + +struct arm_cca_rmi_rec_run { + struct arm_cca_rmi_rec_enter enter; + struct arm_cca_rmi_rec_exit exit; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.73 RmiResult type */ +#define ARM_CCA_RMI_RESULT_STATUS_SHIFT 0U +#define ARM_CCA_RMI_RESULT_STATUS_WIDTH 8U +#define ARM_CCA_RMI_RESULT_DATA_SHIFT 8U + +/* DEN0137 2.0-bet1 - B4.6.74 RmiResultDataIncomplete type */ +#define ARM_CCA_RMI_RESULT_INCOMPLETE_MEM_SHIFT 0U +#define ARM_CCA_RMI_RESULT_INCOMPLETE_MEM_WIDTH 2U +#define ARM_CCA_RMI_RESULT_INCOMPLETE_CAN_CANCEL_SHIFT 2U +#define ARM_CCA_RMI_RESULT_INCOMPLETE_CAN_CANCEL_WIDTH 1U + +/* DEN0137 2.0-bet1 - B4.6.77 RmiRipas type */ +#define ARM_CCA_RMI_RIPAS_EMPTY 0U +#define ARM_CCA_RMI_RIPAS_RAM 1U +#define ARM_CCA_RMI_RIPAS_DESTROYED 2U +#define ARM_CCA_RMI_RIPAS_DEV 3U + +/* DEN0137 2.0-bet1 - B4.6.78 RmiRmmConfig type */ +#define ARM_CCA_RMI_RMM_CONFIG_SIZE 0x1000U +#define ARM_CCA_RMI_TRACKING_4KB_REGION_1GB 0U + +struct arm_cca_rmi_rmm_config { + uint8_t tracking_region_size; + uint8_t __pad0[0x8 - 0x1]; + uint8_t rmi_granule_size; + uint8_t __pad1[ARM_CCA_RMI_RMM_CONFIG_SIZE - 0x9]; +} __packed; + +/* DEN0137 2.0-bet1 - B4.6.80 RmiRttAddrType type */ +#define ARM_CCA_RMI_ADDR_TYPE_NONE 0U +#define ARM_CCA_RMI_ADDR_TYPE_SINGLE 1U +#define ARM_CCA_RMI_ADDR_TYPE_LIST 2U + +/* DEN0137 2.0-bet1 - B4.6.93 RmiStatusCode type */ +#define ARM_CCA_RMI_SUCCESS 0U +#define ARM_CCA_RMI_ERROR_INPUT 1U +#define ARM_CCA_RMI_ERROR_REALM 2U +#define ARM_CCA_RMI_ERROR_REC 3U +#define ARM_CCA_RMI_ERROR_RTT 4U +#define ARM_CCA_RMI_ERROR_NOT_SUPPORTED 5U +#define ARM_CCA_RMI_ERROR_DEVICE 6U +#define ARM_CCA_RMI_ERROR_RTT_AUX 7U +#define ARM_CCA_RMI_ERROR_PSMMU_ST 8U +#define ARM_CCA_RMI_ERROR_DPT 9U +#define ARM_CCA_RMI_BUSY 10U +#define ARM_CCA_RMI_ERROR_GLOBAL 11U +#define ARM_CCA_RMI_ERROR_TRACKING 12U +#define ARM_CCA_RMI_INCOMPLETE 13U +#define ARM_CCA_RMI_BLOCKED 14U +#define ARM_CCA_RMI_ERROR_GPT 15U +#define ARM_CCA_RMI_ERROR_GRANULE 16U + +/* DEN0137 2.0-bet1 - B4.6.94 RmiTrackingRegionState type */ +#define ARM_CCA_RMI_TRACKING_RESERVED 0U +#define ARM_CCA_RMI_TRACKING_NONE 1U +#define ARM_CCA_RMI_TRACKING_FINE 2U +#define ARM_CCA_RMI_TRACKING_COARSE 3U + +#endif /* ARM_CCA_RMI_ABI_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309342.1580392 (Exim 4.92) (envelope-from ) id 1wNjqi-0002JM-Nb; Fri, 15 May 2026 04:08:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309342.1580392; Fri, 15 May 2026 04:08:32 +0000 Received: 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header.d=none;dmarc=none action=none header.from=valinux.co.jp; From: Koichiro Den To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 08/26] xen/arm/cca: add shared SRO helpers Date: Fri, 15 May 2026 13:07:54 +0900 Message-ID: <20260515040812.983626-9-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCPR01CA0065.jpnprd01.prod.outlook.com (2603:1096:405:2::29) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB5257:EE_ X-MS-Office365-Filtering-Correlation-Id: cf47f41a-6693-4a9c-ecbf-08deb2379c36 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|376014|7416014|366016|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: AJmeJMXP0ESfV7X4ZXuVLgXoKJTKYnTOMcHnL/wKvE3h4QdsbOyYd0yFyQj8rdS0Pkj4zTn1yM5au5g/8/Ro5m9pA15NEX6RaDxLl1H1D8ueV8/ouKuLfyD9KXVIm5SYb0CEliI1YHPR9YsFHcrah/m4gBkxAMAxJyLI2ofVnRLvBPORbR0/OlswQGlAzFOjy14srbI6P8wZPm4FX+An2G9zb5N7Lkoe2BO9uiWXpmT0jTJyv8K0PJMUjoeDHtdBBK4YxXTumv4l2zXNdqccu/6IullRaOYvnGBwkrI0rFkst0YjPMF9rlbcCiIKMiR77Qupuelkt5WoTHPb1Y5dQXnM/mqa1d76QWdX7C3Ab3wBaBoWtFlerSZkLcCEXR2lGtIPk4p1cqvWf2smoiM5sccKJ2u/NZqzx+NjhDNMhsI2eTilnfzWQ2IgNznBtiOoy0nRYY/hDUyLf5VsmZYJApw0vi6m/n4D7f9NyMHXRfsLVug//dnqKrAOs6zQyXoL3C3ts0ri9t3ZFuoIV279zc2PQqpJPcF0qH3EA/1yFxmHf//9llPx+I6GjiEbW+9shFcpyqa2TIffzVVTxeFh8FMe1TGALZzXzqTRWZW5JuhU3XJe19jW+jGBpx0oew6x3i0R7Agra/ebt4lGPX0gOZPESEfemIGy1eMOVto4EEG+efNzuf0swZfWKOSYXjD0 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(376014)(7416014)(366016)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1102; 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It keeps donate, reclaim and cancel handling out of each lifecycle caller. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/sro.c | 485 ++++++++++++++++++++++++++++++++++++++ xen/arch/arm/cca/sro.h | 25 ++ 3 files changed, 511 insertions(+) create mode 100644 xen/arch/arm/cca/sro.c create mode 100644 xen/arch/arm/cca/sro.h diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index 57c3986d5de8..bf6d9b58ebec 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -1,4 +1,5 @@ obj-y += granule.o obj-y += realm.o obj-y += rmi.o +obj-y += sro.o obj-y += state.o diff --git a/xen/arch/arm/cca/sro.c b/xen/arch/arm/cca/sro.c new file mode 100644 index 000000000000..d17810388398 --- /dev/null +++ b/xen/arch/arm/cca/sro.c @@ -0,0 +1,485 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#include "rmi.h" +#include "sro.h" + +static struct page_info *arm_cca_sro_alloc_page(void) +{ + struct page_info *pg; + void *va; + + pg = alloc_domheap_page(NULL, 0); + if ( !pg ) + return NULL; + + va = map_domain_page(page_to_mfn(pg)); + clear_page(va); + unmap_domain_page(va); + + return pg; +} + +static unsigned long arm_cca_sro_donate_req_count(unsigned long req) +{ + return arm_cca_rmi_field_get(req, + ARM_CCA_RMI_OP_DONATE_BLK_COUNT_SHIFT, + ARM_CCA_RMI_OP_DONATE_BLK_COUNT_WIDTH); +} + +static uint64_t arm_cca_sro_addr_desc_4k(paddr_t pa) +{ + return ((uint64_t)ARM_CCA_RMI_PAGE_L3 << + ARM_CCA_RMI_ADDR_DESC_4K_SZ_SHIFT) | + (1ULL << ARM_CCA_RMI_ADDR_DESC_4K_CNT_SHIFT) | + (((uint64_t)pa >> PAGE_SHIFT) << + ARM_CCA_RMI_ADDR_DESC_4K_ADDR_SHIFT) | + ((uint64_t)ARM_CCA_RMI_OP_MEM_DELEGATED << + ARM_CCA_RMI_ADDR_DESC_4K_ST_SHIFT); +} + +static int +arm_cca_sro_free_delegated_pages(const struct arm_cca_sro_mem_xfer *xfer, + struct page_info **pages, + unsigned int nr_pages) +{ + unsigned int i; + int rc = 0; + + for ( i = 0; i < nr_pages; ++i ) + { + if ( !pages[i] ) + continue; + + if ( arm_cca_undelegate_granule(page_to_maddr(pages[i])) != 0 ) + { + page_list_add_tail(pages[i], xfer->abandoned_pages); + pages[i] = NULL; + rc = -EIO; + continue; + } + + free_domheap_page(pages[i]); + pages[i] = NULL; + } + + return rc; +} + +static int +arm_cca_sro_validate_donate_req(const struct arm_cca_sro_mem_xfer *xfer, + unsigned long req, unsigned long *count) +{ + unsigned long blk_size, contig, state; + + if ( !xfer || !xfer->pages || !xfer->nr_pages || !xfer->max_pages || + !xfer->abandoned_pages ) + return -EOPNOTSUPP; + + blk_size = arm_cca_rmi_field_get(req, + ARM_CCA_RMI_OP_DONATE_BLK_SIZE_SHIFT, + ARM_CCA_RMI_OP_DONATE_BLK_SIZE_WIDTH); + contig = arm_cca_rmi_field_get(req, + ARM_CCA_RMI_OP_DONATE_MEM_CONTIG_SHIFT, + ARM_CCA_RMI_OP_DONATE_MEM_CONTIG_WIDTH); + state = arm_cca_rmi_field_get(req, + ARM_CCA_RMI_OP_DONATE_MEM_STATE_SHIFT, + ARM_CCA_RMI_OP_DONATE_MEM_STATE_WIDTH); + *count = arm_cca_sro_donate_req_count(req); + + /* + * Xen donates 4KB, non-contiguous, already-delegated granules here + * because they can be allocated and tracked as individual pages. + */ + if ( blk_size != ARM_CCA_RMI_PAGE_L3 || + contig != ARM_CCA_RMI_OP_MEM_NON_CONTIG || + state != ARM_CCA_RMI_OP_MEM_DELEGATED ) + return -EOPNOTSUPP; + + if ( *count == 0 ) + return -EINVAL; + + if ( *xfer->nr_pages > xfer->max_pages || + *count > xfer->max_pages - *xfer->nr_pages ) + return -E2BIG; + + if ( *count > PAGE_SIZE / sizeof(uint64_t) ) + return -E2BIG; + + return 0; +} + +static int arm_cca_sro_donate_pages(unsigned long handle, + unsigned long donate_req, + const struct arm_cca_sro_mem_xfer *xfer, + struct arm_smccc_res *res) +{ + struct page_info *list_pg = NULL; + struct page_info **pages = NULL; + uint64_t *list; + unsigned long count, consumed; + unsigned int i; + int cleanup_rc, rc; + + rc = arm_cca_sro_validate_donate_req(xfer, donate_req, &count); + if ( rc != 0 ) + return rc; + + pages = xzalloc_array(struct page_info *, count); + if ( !pages ) + return -ENOMEM; + + list_pg = arm_cca_sro_alloc_page(); + if ( !list_pg ) + { + rc = -ENOMEM; + goto out; + } + + list = map_domain_page(page_to_mfn(list_pg)); + + for ( i = 0; i < count; ++i ) + { + pages[i] = arm_cca_sro_alloc_page(); + if ( !pages[i] ) + { + rc = -ENOMEM; + goto out_unmap; + } + + rc = arm_cca_delegate_granule(page_to_maddr(pages[i])); + if ( rc != 0 ) + { + free_domheap_page(pages[i]); + pages[i] = NULL; + goto out_unmap; + } + + list[i] = arm_cca_sro_addr_desc_4k(page_to_maddr(pages[i])); + } + + rc = arm_cca_rmi_op_mem_donate(handle, page_to_maddr(list_pg), count, res); + /* + * donated_count is valid regardless of the RMI status. + * See DEN0137 2.0-bet1 - B4.3.2.2 Donating memory to an SRO + */ + consumed = res->a1; + if ( consumed > count ) + { + rc = -EIO; + consumed = count; + } + + for ( i = 0; i < consumed; ++i ) + { + xfer->pages[*xfer->nr_pages] = pages[i]; + (*xfer->nr_pages)++; + pages[i] = NULL; + } + +out_unmap: + unmap_domain_page(list); + free_domheap_page(list_pg); + +out: + cleanup_rc = arm_cca_sro_free_delegated_pages(xfer, pages, count); + if ( cleanup_rc != 0 ) + rc = cleanup_rc; + xfree(pages); + + return rc; +} + +static int arm_cca_sro_continue(unsigned long handle, + struct arm_smccc_res *res) +{ + return arm_cca_rmi_op_continue(handle, ARM_CCA_RMI_CONTINUE_KEEP_GOING, + res); +} + +static bool arm_cca_sro_is_pending(const struct arm_smccc_res *res) +{ + uint64_t result = arm_cca_rmi_result(res); + + return arm_cca_rmi_status_is(result, ARM_CCA_RMI_INCOMPLETE) || + arm_cca_rmi_status_is(result, ARM_CCA_RMI_BUSY); +} + +static int arm_cca_sro_reclaim_pages(unsigned long handle, + const struct arm_cca_sro_mem_xfer *xfer, + struct arm_smccc_res *res); + +static int +arm_cca_sro_validate_reclaim_xfer(const struct arm_cca_sro_mem_xfer *xfer) +{ + if ( !xfer || !xfer->pages || !xfer->nr_pages || !xfer->abandoned_pages ) + return -EOPNOTSUPP; + + if ( *xfer->nr_pages == 0 ) + return -EIO; + + return 0; +} + +static int arm_cca_sro_cancel(unsigned long handle, + const struct arm_cca_sro_mem_xfer *xfer, + struct arm_smccc_res *res) +{ + int rc = arm_cca_rmi_op_cancel(handle, res); + + if ( rc != 0 && !arm_cca_sro_is_pending(res) ) + return rc; + + while ( arm_cca_sro_is_pending(res) ) + { + unsigned long mem_req; + + if ( arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_BUSY) ) + { + rc = arm_cca_sro_continue(handle, res); + if ( rc < 0 ) + return rc; + if ( !arm_cca_sro_is_pending(res) ) + return rc; + continue; + } + + mem_req = arm_cca_rmi_sro_mem_req(res->a0); + + switch ( mem_req ) + { + case ARM_CCA_RMI_OP_MEM_REQ_RECLAIM: + rc = arm_cca_sro_validate_reclaim_xfer(xfer); + if ( rc != 0 ) + return rc; + rc = arm_cca_sro_reclaim_pages(handle, xfer, res); + break; + + case ARM_CCA_RMI_OP_MEM_REQ_NONE: + rc = arm_cca_sro_continue(handle, res); + if ( rc < 0 ) + return rc; + if ( !arm_cca_sro_is_pending(res) ) + return rc; + break; + + default: + return -EIO; + } + + if ( rc < 0 ) + return rc; + } + + return rc; +} + +int arm_cca_sro_complete_mem_transfer(int rc, struct arm_smccc_res *res, + const struct arm_cca_sro_mem_xfer *xfer) +{ + unsigned long handle; + bool can_cancel = false; + + if ( rc != 0 && !arm_cca_sro_is_pending(res) ) + return rc; + + if ( !arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_INCOMPLETE) ) + return rc; + + handle = res->a1; + + while ( arm_cca_sro_is_pending(res) ) + { + uint64_t result = arm_cca_rmi_result(res); + unsigned long mem_req; + + if ( arm_cca_rmi_status_is(result, ARM_CCA_RMI_BUSY) ) + { + rc = arm_cca_sro_continue(handle, res); + } + else + { + can_cancel = arm_cca_rmi_sro_can_cancel(result); + mem_req = arm_cca_rmi_sro_mem_req(result); + + switch ( mem_req ) + { + case ARM_CCA_RMI_OP_MEM_REQ_DONATE: + rc = arm_cca_sro_donate_pages(handle, res->a2, xfer, res); + /* + * RMM records a failed donation through the SRO context. The + * Host must continue the SRO after an RMI_OP_MEM_DONATE error. + * + * See DEN0137 2.0-bet1 - B4.3.2.2 + */ + if ( arm_cca_rmi_status_is_error(arm_cca_rmi_result(res)) ) + rc = arm_cca_sro_continue(handle, res); + break; + + case ARM_CCA_RMI_OP_MEM_REQ_RECLAIM: + rc = arm_cca_sro_validate_reclaim_xfer(xfer); + if ( rc != 0 ) + break; + + rc = arm_cca_sro_reclaim_pages(handle, xfer, res); + break; + + case ARM_CCA_RMI_OP_MEM_REQ_NONE: + rc = arm_cca_sro_continue(handle, res); + break; + + default: + rc = -EOPNOTSUPP; + break; + } + } + + if ( rc < 0 ) + { + int cancel_rc; + + /* + * A final RMI_ERROR_* already ends the SRO. CANCEL is only for + * a still-pending SRO which Xen can no longer drive. + */ + if ( !arm_cca_sro_is_pending(res) ) + break; + + if ( !can_cancel ) + break; + + cancel_rc = arm_cca_sro_cancel(handle, xfer, res); + if ( cancel_rc != 0 ) + rc = cancel_rc; + break; + } + } + + return rc; +} + +static int +arm_cca_sro_forget_reclaimed_page(const struct arm_cca_sro_mem_xfer *xfer, + paddr_t pa) +{ + struct page_info **pages = xfer->pages; + unsigned int *nr_pages = xfer->nr_pages; + unsigned int i; + + for ( i = 0; i < *nr_pages; ++i ) + { + struct page_info *pg = pages[i]; + + if ( !pg || page_to_maddr(pg) != pa ) + continue; + + pages[i] = pages[*nr_pages - 1]; + pages[*nr_pages - 1] = NULL; + (*nr_pages)--; + + if ( arm_cca_undelegate_granule(pa) != 0 ) + { + /* + * The RMM has returned the page. Keep host undelegation failure + * out of the SRO state machine and retry it from relinquish. + */ + page_list_add_tail(pg, xfer->abandoned_pages); + return 0; + } + + free_domheap_page(pg); + + return 0; + } + + return -ENOENT; +} + +static int +arm_cca_sro_forget_reclaimed_desc(const struct arm_cca_sro_mem_xfer *xfer, + uint64_t desc) +{ + paddr_t pa = arm_cca_rmi_addr_desc_4k_pa(desc); + unsigned long count = arm_cca_rmi_addr_desc_4k_count(desc); + unsigned long size = arm_cca_rmi_addr_desc_4k_size(desc); + unsigned long state = arm_cca_rmi_addr_desc_4k_state(desc); + unsigned long i; + + if ( size != ARM_CCA_RMI_PAGE_L3 || + state != ARM_CCA_RMI_OP_MEM_DELEGATED || + count == 0 ) + return -EIO; + + for ( i = 0; i < count; ++i ) + { + int rc = arm_cca_sro_forget_reclaimed_page(xfer, pa); + + if ( rc != 0 ) + return rc; + + pa += PAGE_SIZE; + } + + return 0; +} + +static int arm_cca_sro_reclaim_pages(unsigned long handle, + const struct arm_cca_sro_mem_xfer *xfer, + struct arm_smccc_res *res) +{ + struct page_info *list_pg; + uint64_t *list; + unsigned long max_descs = *xfer->nr_pages; + unsigned long nr_descs = 0; + unsigned int i; + int rc; + + list_pg = alloc_domheap_page(NULL, 0); + if ( !list_pg ) + return -ENOMEM; + + list = map_domain_page(page_to_mfn(list_pg)); + clear_page(list); + + /* + * In the worst case each reclaimed page needs one address-list + * descriptor, so the tracked page count is a sufficient list capacity. + */ + rc = arm_cca_rmi_op_mem_reclaim(handle, page_to_maddr(list_pg), max_descs, + res); + + if ( arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_INCOMPLETE) ) + { + nr_descs = res->a1; + if ( nr_descs > max_descs ) + { + nr_descs = max_descs; + rc = -EIO; + } + } + + for ( i = 0; i < nr_descs; ++i ) + { + int ret = arm_cca_sro_forget_reclaimed_desc(xfer, list[i]); + + if ( ret != 0 ) + { + rc = ret; + break; + } + } + + unmap_domain_page(list); + free_domheap_page(list_pg); + + return rc; +} diff --git a/xen/arch/arm/cca/sro.h b/xen/arch/arm/cca/sro.h new file mode 100644 index 000000000000..71d26574fe7e --- /dev/null +++ b/xen/arch/arm/cca/sro.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef ARM_CCA_SRO_H +#define ARM_CCA_SRO_H + +struct arm_smccc_res; +struct page_list_head; +struct page_info; + +struct arm_cca_sro_mem_xfer { + /* + * pages tracks pages accepted by the SRO and later returned by reclaim. + * max_pages is the capacity for accepted donations; zero disables + * donation. abandoned_pages keeps delegated pages which still need + * host-side undelegation retry. + */ + struct page_info **pages; + unsigned int *nr_pages; + unsigned int max_pages; + struct page_list_head *abandoned_pages; +}; + +int arm_cca_sro_complete_mem_transfer(int rc, struct arm_smccc_res *res, + const struct arm_cca_sro_mem_xfer *xfer); + +#endif /* ARM_CCA_SRO_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309343.1580398 (Exim 4.92) (envelope-from ) id 1wNjqj-0002Sb-6H; Fri, 15 May 2026 04:08:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309343.1580398; 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Realm-owned pages have to come from fine, conventional tracking regions. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/granule.c | 150 +++++++++++++++++++++++++++++++++ xen/arch/arm/include/asm/cca.h | 5 ++ 3 files changed, 156 insertions(+) create mode 100644 xen/arch/arm/cca/granule.c diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index aaa04e3b914b..7f20d43323c3 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -1,2 +1,3 @@ +obj-y += granule.o obj-y += rmi.o obj-y += state.o diff --git a/xen/arch/arm/cca/granule.c b/xen/arch/arm/cca/granule.c new file mode 100644 index 000000000000..d2be4d240f19 --- /dev/null +++ b/xen/arch/arm/cca/granule.c @@ -0,0 +1,150 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include + +#include "rmi.h" + +static paddr_t __init arm_cca_l0gpt_size(unsigned long features1) +{ + unsigned long l0gptsz = arm_cca_rmi_field_get( + features1, ARM_CCA_RMI_FEATURE_REGISTER_1_L0GPTSZ_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_1_L0GPTSZ_WIDTH); + + return 1ULL << (30 + l0gptsz); +} + +static int __init arm_cca_verify_memory_tracking(paddr_t start, paddr_t end) +{ + while ( start < end ) + { + unsigned long category, state; + paddr_t next; + int rc; + + rc = arm_cca_rmi_granule_tracking_get(start, end, &category, &state, + &next); + if ( rc != 0 ) + return rc; + + if ( category != ARM_CCA_RMI_MEM_CATEGORY_CONVENTIONAL || + state != ARM_CCA_RMI_TRACKING_FINE || + next <= start || next > end ) + { + printk(XENLOG_ERR + "ARM CCA: memory [%#" PRIpaddr ", %#" PRIpaddr + ") is not fine-tracked conventional memory\n", + start, end); + return -EOPNOTSUPP; + } + + start = next; + } + + return 0; +} + +static int __init arm_cca_create_gpts(paddr_t start, paddr_t end, + paddr_t l0gpt_size) +{ + paddr_t base = ROUNDDOWN(start, l0gpt_size); + paddr_t stop = ROUNDUP(end, l0gpt_size); + + while ( base < stop ) + { + int rc = arm_cca_rmi_gpt_l1_create(base); + + if ( rc != 0 ) + { + printk(XENLOG_ERR + "ARM CCA: failed to create GPT L1 for %#" PRIpaddr "\n", + base); + return rc; + } + + base += l0gpt_size; + } + + return 0; +} + +int __init arm_cca_prepare_host_memory(unsigned long features1) +{ + const struct membanks *mem = bootinfo_get_mem(); + paddr_t l0gpt_size = arm_cca_l0gpt_size(features1); + unsigned int i; + int rc; + + for ( i = 0; i < mem->nr_banks; i++ ) + { + paddr_t start = mem->bank[i].start; + paddr_t end = start + mem->bank[i].size; + + rc = arm_cca_verify_memory_tracking(start, end); + if ( rc != 0 ) + return rc; + + rc = arm_cca_create_gpts(start, end, l0gpt_size); + if ( rc != 0 ) + return rc; + } + + return 0; +} + +static int arm_cca_process_granule_range(paddr_t start, paddr_t end, + bool delegate) +{ + paddr_t cur = start; + int rc; + + /* + * arm_cca_prepare_host_memory() checks that host DRAM is fine-tracked and + * has GPT L1 metadata before any Realm-owned granule can be delegated. + */ + if ( start >= end || !IS_ALIGNED(start, PAGE_SIZE) || + !IS_ALIGNED(end, PAGE_SIZE) ) + return -EINVAL; + + while ( cur < end ) + { + paddr_t out_top = INVALID_PADDR; + + if ( delegate ) + rc = arm_cca_rmi_granule_range_delegate(cur, end, &out_top); + else + rc = arm_cca_rmi_granule_range_undelegate(cur, end, &out_top); + + if ( rc != 0 ) + return rc; + + if ( out_top <= cur || out_top > end ) + return -EIO; + + cur = out_top; + } + + return 0; +} + +/* DEN0137 2.0-bet1 - D1.1.1 Granule delegation flow. */ +int arm_cca_delegate_granule(paddr_t granule) +{ + if ( !IS_ALIGNED(granule, PAGE_SIZE) ) + return -EINVAL; + + return arm_cca_process_granule_range(granule, granule + PAGE_SIZE, true); +} + +/* DEN0137 2.0-bet1 - D1.1.2 Granule undelegation flow. */ +int arm_cca_undelegate_granule(paddr_t granule) +{ + if ( !IS_ALIGNED(granule, PAGE_SIZE) ) + return -EINVAL; + + return arm_cca_process_granule_range(granule, granule + PAGE_SIZE, false); +} diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index 6bf644fbcee5..c35d51f750a3 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -2,6 +2,7 @@ #ifndef ARM_CCA_H #define ARM_CCA_H +#include #include /* @@ -79,4 +80,8 @@ void arm_cca_vcpu_destroy(struct vcpu *v); void *arm_cca_alloc_rec_run(void); void arm_cca_free_rec_run(void *run); +int arm_cca_delegate_granule(paddr_t granule); +int arm_cca_undelegate_granule(paddr_t granule); +int arm_cca_prepare_host_memory(unsigned long features1) __init; + #endif /* ARM_CCA_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309338.1580365 (Exim 4.92) (envelope-from ) id 1wNjqg-0001nj-3j; Fri, 15 May 2026 04:08:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309338.1580365; Fri, 15 May 2026 04:08:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjqf-0001nc-WD; Fri, 15 May 2026 04:08:30 +0000 Received: by outflank-mailman (input) for mailman id 1309338; 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Keep the stateful completion rules close to the raw RMI call boundary and avoid code duplication. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/rmi.c | 271 +++++++++++++++++++++++++++++++++++++++++ xen/arch/arm/cca/rmi.h | 88 +++++++++++++ 2 files changed, 359 insertions(+) diff --git a/xen/arch/arm/cca/rmi.c b/xen/arch/arm/cca/rmi.c index d37f1226f834..5661d35e30da 100644 --- a/xen/arch/arm/cca/rmi.c +++ b/xen/arch/arm/cca/rmi.c @@ -56,6 +56,46 @@ static int arm_cca_rmi_initiate_sro(unsigned long fid, cpu_relax(); } } + +static int arm_cca_rmi_complete_no_mem_transfer(struct arm_smccc_res *res) +{ + unsigned long handle; + uint64_t result = arm_cca_rmi_result(res); + + if ( !arm_cca_rmi_status_is(result, ARM_CCA_RMI_INCOMPLETE) ) + return arm_cca_rmi_result_to_errno(result); + + /* + * The initiating command returns the SRO handle in X1. Once + * the operation is continued, X1 is not a stable handle output: + * completion returns the initiating command's output registers. + * + * See DEN0137 2.0-bet1 - B4.3.2 and B4.3.2.1 + */ + handle = res->a1; + + while ( arm_cca_rmi_status_is(result, ARM_CCA_RMI_INCOMPLETE) || + arm_cca_rmi_status_is(result, ARM_CCA_RMI_BUSY) ) + { + if ( arm_cca_rmi_status_is(result, ARM_CCA_RMI_INCOMPLETE) ) + { + /* + * This helper is only for commands specified as stateful but not + * memory-transferring. Callers with donate/reclaim flows handle SROs + * themselves because they must own the backing-page lifetime. + */ + if ( arm_cca_rmi_sro_mem_req(result) != + ARM_CCA_RMI_OP_MEM_REQ_NONE ) + return -EOPNOTSUPP; + } + + arm_cca_rmi_op_continue(handle, ARM_CCA_RMI_CONTINUE_KEEP_GOING, res); + result = arm_cca_rmi_result(res); + } + + return arm_cca_rmi_result_to_errno(result); +} + int arm_cca_rmi_version(unsigned long requested_revision, unsigned long *revision_lower, unsigned long *revision_higher) @@ -168,3 +208,234 @@ int arm_cca_rmi_gpt_l1_create(paddr_t base) return arm_cca_rmi_res_to_errno(&res); } + +int arm_cca_rmi_granule_range_delegate(paddr_t base, paddr_t top, + paddr_t *out_top) +{ + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_GRANULE_RANGE_DELEGATE_FID, + base, top, 0, 0, 0, &res); + if ( rc != 0 ) + return rc; + + rc = arm_cca_rmi_complete_no_mem_transfer(&res); + if ( rc == 0 && out_top != NULL ) + *out_top = res.a1; + + return rc; +} + +int arm_cca_rmi_granule_range_undelegate(paddr_t base, paddr_t top, + paddr_t *out_top) +{ + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_GRANULE_RANGE_UNDELEGATE_FID, + base, top, 0, 0, 0, &res); + if ( rc != 0 ) + return rc; + + rc = arm_cca_rmi_complete_no_mem_transfer(&res); + if ( rc == 0 && out_top != NULL ) + *out_top = res.a1; + + return rc; +} + +int arm_cca_rmi_realm_create(paddr_t rd, paddr_t params_ptr, + struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_REALM_CREATE_FID, + rd, params_ptr, 0, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_realm_activate(paddr_t rd, struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_REALM_ACTIVATE_FID, rd, 0, 0, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_realm_terminate(paddr_t rd, struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_REALM_TERMINATE_FID, + rd, 0, 0, 0, 0, res); + if ( rc != 0 ) + return rc; + + rc = arm_cca_rmi_res_to_errno(res); + + if ( !arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_INCOMPLETE) ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_realm_destroy(paddr_t rd, struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_REALM_DESTROY_FID, + rd, 0, 0, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_rec_create(paddr_t rd, paddr_t rec, paddr_t params_ptr, + struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_REC_CREATE_FID, + rd, rec, params_ptr, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_rec_destroy(paddr_t rec, struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_REC_DESTROY_FID, + rec, 0, 0, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_rec_enter(paddr_t rec, paddr_t run, struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_REC_ENTER_FID, rec, run, 0, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_op_continue(unsigned long handle, unsigned long flags, + struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_OP_CONTINUE_FID, + handle, flags, 0, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_op_cancel(unsigned long handle, struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_OP_CANCEL_FID, handle, 0, 0, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_op_mem_donate(unsigned long handle, paddr_t list, + unsigned long list_count, + struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_OP_MEM_DONATE_FID, + handle, list, list_count, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_op_mem_reclaim(unsigned long handle, paddr_t list, + unsigned long list_count, + struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_OP_MEM_RECLAIM_FID, + handle, list, list_count, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_rtt_create(paddr_t rd, paddr_t rtt, paddr_t ipa, + unsigned long level, struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RTT_CREATE_FID, + rd, rtt, ipa, level, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_rtt_destroy(paddr_t rd, paddr_t ipa, unsigned long level, + struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RTT_DESTROY_FID, + rd, ipa, level, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_rtt_set_ripas(paddr_t rd, paddr_t rec, paddr_t base, + paddr_t top, struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RTT_SET_RIPAS_FID, + rd, rec, base, top, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_rtt_data_map_init(paddr_t rd, paddr_t data, paddr_t ipa, + paddr_t src, unsigned long flags, + struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RTT_DATA_MAP_INIT_FID, + rd, data, ipa, src, flags, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_rtt_data_unmap(paddr_t rd, paddr_t base, paddr_t top, + unsigned long flags, unsigned long oaddr, + struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RTT_DATA_UNMAP_FID, + rd, base, top, flags, oaddr, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_complete_no_mem_transfer(res); +} + +int arm_cca_rmi_psci_complete(paddr_t calling_rec, paddr_t target_rec, + int64_t status, struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_PSCI_COMPLETE_FID, + calling_rec, target_rec, (unsigned long)status, + 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} diff --git a/xen/arch/arm/cca/rmi.h b/xen/arch/arm/cca/rmi.h index 4cd0bc64ccf5..589c12b24e79 100644 --- a/xen/arch/arm/cca/rmi.h +++ b/xen/arch/arm/cca/rmi.h @@ -110,6 +110,51 @@ static inline int arm_cca_rmi_res_to_errno(const struct arm_smccc_res *res) { return arm_cca_rmi_result_to_errno(arm_cca_rmi_result(res)); } + +static inline unsigned long arm_cca_rmi_sro_mem_req(uint64_t result) +{ + uint64_t incomplete_data = arm_cca_rmi_result_data(result); + + return arm_cca_rmi_field_get( + incomplete_data, ARM_CCA_RMI_RESULT_INCOMPLETE_MEM_SHIFT, + ARM_CCA_RMI_RESULT_INCOMPLETE_MEM_WIDTH); +} + +static inline bool arm_cca_rmi_sro_can_cancel(uint64_t result) +{ + uint64_t incomplete_data = arm_cca_rmi_result_data(result); + + return arm_cca_rmi_field_get( + incomplete_data, ARM_CCA_RMI_RESULT_INCOMPLETE_CAN_CANCEL_SHIFT, + ARM_CCA_RMI_RESULT_INCOMPLETE_CAN_CANCEL_WIDTH) == + ARM_CCA_RMI_OP_CAN_CANCEL; +} + +static inline paddr_t arm_cca_rmi_addr_desc_4k_pa(uint64_t desc) +{ + return arm_cca_rmi_field_get(desc, ARM_CCA_RMI_ADDR_DESC_4K_ADDR_SHIFT, + ARM_CCA_RMI_ADDR_DESC_4K_ADDR_WIDTH) + << PAGE_SHIFT; +} + +static inline unsigned long arm_cca_rmi_addr_desc_4k_size(uint64_t desc) +{ + return arm_cca_rmi_field_get(desc, ARM_CCA_RMI_ADDR_DESC_4K_SZ_SHIFT, + ARM_CCA_RMI_ADDR_DESC_4K_SZ_WIDTH); +} + +static inline unsigned long arm_cca_rmi_addr_desc_4k_count(uint64_t desc) +{ + return arm_cca_rmi_field_get(desc, ARM_CCA_RMI_ADDR_DESC_4K_CNT_SHIFT, + ARM_CCA_RMI_ADDR_DESC_4K_CNT_WIDTH); +} + +static inline unsigned long arm_cca_rmi_addr_desc_4k_state(uint64_t desc) +{ + return arm_cca_rmi_field_get(desc, ARM_CCA_RMI_ADDR_DESC_4K_ST_SHIFT, + ARM_CCA_RMI_ADDR_DESC_4K_ST_WIDTH); +} + int arm_cca_rmi_version(unsigned long requested_revision, unsigned long *revision_lower, unsigned long *revision_higher); @@ -123,4 +168,47 @@ int arm_cca_rmi_granule_tracking_get(paddr_t base, paddr_t top, unsigned long *state, paddr_t *out_top); int arm_cca_rmi_gpt_l1_create(paddr_t base); +int arm_cca_rmi_granule_range_delegate(paddr_t base, paddr_t top, + paddr_t *out_top); +int arm_cca_rmi_granule_range_undelegate(paddr_t base, paddr_t top, + paddr_t *out_top); + +int arm_cca_rmi_realm_create(paddr_t rd, paddr_t params_ptr, + struct arm_smccc_res *res); +int arm_cca_rmi_realm_activate(paddr_t rd, struct arm_smccc_res *res); +int arm_cca_rmi_realm_terminate(paddr_t rd, struct arm_smccc_res *res); +int arm_cca_rmi_realm_destroy(paddr_t rd, struct arm_smccc_res *res); + +int arm_cca_rmi_rec_create(paddr_t rd, paddr_t rec, paddr_t params_ptr, + struct arm_smccc_res *res); +int arm_cca_rmi_rec_destroy(paddr_t rec, struct arm_smccc_res *res); +int arm_cca_rmi_rec_enter(paddr_t rec, paddr_t run, struct arm_smccc_res *res); + +int arm_cca_rmi_op_continue(unsigned long handle, unsigned long flags, + struct arm_smccc_res *res); +int arm_cca_rmi_op_cancel(unsigned long handle, struct arm_smccc_res *res); +int arm_cca_rmi_op_mem_donate(unsigned long handle, paddr_t list, + unsigned long list_count, + struct arm_smccc_res *res); +int arm_cca_rmi_op_mem_reclaim(unsigned long handle, paddr_t list, + unsigned long list_count, + struct arm_smccc_res *res); + +int arm_cca_rmi_rtt_create(paddr_t rd, paddr_t rtt, paddr_t ipa, + unsigned long level, struct arm_smccc_res *res); +int arm_cca_rmi_rtt_destroy(paddr_t rd, paddr_t ipa, unsigned long level, + struct arm_smccc_res *res); +int arm_cca_rmi_rtt_set_ripas(paddr_t rd, paddr_t rec, paddr_t base, + paddr_t top, struct arm_smccc_res *res); + +int arm_cca_rmi_rtt_data_map_init(paddr_t rd, paddr_t data, paddr_t ipa, + paddr_t src, unsigned long flags, + struct arm_smccc_res *res); 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The rest of the series can build on typed helpers rather than spelling out registers each time. Signed-off-by: Koichiro Den --- xen/arch/arm/Kconfig | 14 ++++ xen/arch/arm/Makefile | 1 + xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/rmi.c | 170 ++++++++++++++++++++++++++++++++++++++ xen/arch/arm/cca/rmi.h | 126 ++++++++++++++++++++++++++++ 5 files changed, 312 insertions(+) create mode 100644 xen/arch/arm/cca/Makefile create mode 100644 xen/arch/arm/cca/rmi.c create mode 100644 xen/arch/arm/cca/rmi.h diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a10d..dc99020c96de 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -118,6 +118,20 @@ config ARM_EFI UEFI firmware. A UEFI stub is provided to allow Xen to be booted as an EFI application. +config ARM_CCA + bool "Arm Confidential Compute Architecture support (UNSUPPORTED)" if UNSUPPORTED + depends on ARM_64 && MMU + default n + help + Build Xen's Arm CCA / RMM support for Arm Realm guests on + Armv9 platforms. + + This enables the NS hypervisor-side Realm creation and execution + paths, including the RMI ABI wrappers, Realm build/finalize + flows and REC run loop. + + This support is experimental. If unsure, say N. + config GICV2 bool "GICv2 driver" default y diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 982c6c396a05..953dcbbe6626 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -8,6 +8,7 @@ ifneq ($(CONFIG_NO_PLAT),y) obj-y += platforms/ endif obj-y += firmware/ +obj-$(CONFIG_ARM_CCA) += cca/ obj-$(CONFIG_TEE) += tee/ obj-$(CONFIG_HAS_VPCI) += vpci.o diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile new file mode 100644 index 000000000000..9c351f901dfd --- /dev/null +++ b/xen/arch/arm/cca/Makefile @@ -0,0 +1 @@ +obj-y += rmi.o diff --git a/xen/arch/arm/cca/rmi.c b/xen/arch/arm/cca/rmi.c new file mode 100644 index 000000000000..d37f1226f834 --- /dev/null +++ b/xen/arch/arm/cca/rmi.c @@ -0,0 +1,170 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Internal Xen RMI command wrappers for DEN0137 2.0-bet1 / RMI v2.0. + */ + +#include + +#include +#include + +#include "rmi.h" + +#define ARM_CCA_RMI_INITIATE_SRO_BUSY_RETRIES 1000000U + +static void arm_cca_rmi_invoke(unsigned long fid, + unsigned long arg0, + unsigned long arg1, + unsigned long arg2, + unsigned long arg3, + unsigned long arg4, + struct arm_smccc_res *res) +{ + arm_smccc_1_0_smc(fid, arg0, arg1, arg2, arg3, arg4, 0, 0, res); +} + +static int arm_cca_rmi_initiate_sro(unsigned long fid, + unsigned long arg0, + unsigned long arg1, + unsigned long arg2, + unsigned long arg3, + unsigned long arg4, + struct arm_smccc_res *res) +{ + unsigned int retries = 0; + + /* + * Conform to DEN0137 2.0-bet1 B4.3.2.5 Programming model for an SRO: + * retry the initiating command while it returns RMI_BUSY. Once a handle + * is returned, progress is driven through RMI_OP_CONTINUE. + * + * Initial RMI_BUSY is expected to be transient. Keep the retry loop + * finite so a broken RMM cannot spin Xen forever. + */ + while ( true ) + { + arm_cca_rmi_invoke(fid, arg0, arg1, arg2, arg3, arg4, res); + + if ( !arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_BUSY) ) + return 0; + + if ( retries == ARM_CCA_RMI_INITIATE_SRO_BUSY_RETRIES ) + return -EBUSY; + retries++; + + cpu_relax(); + } +} +int arm_cca_rmi_version(unsigned long requested_revision, + unsigned long *revision_lower, + unsigned long *revision_higher) +{ + struct arm_smccc_res res; + int rc; + + arm_cca_rmi_invoke(ARM_CCA_RMI_VERSION_FID, + requested_revision, 0, 0, 0, 0, &res); + + rc = arm_cca_rmi_res_to_errno(&res); + + if ( revision_lower != NULL ) + *revision_lower = res.a1; + + if ( revision_higher != NULL ) + *revision_higher = res.a2; + + return rc; +} + +unsigned long arm_cca_rmi_features(unsigned long index) +{ + struct arm_smccc_res res; + + arm_cca_rmi_invoke(ARM_CCA_RMI_FEATURES_FID, index, 0, 0, 0, 0, &res); + + return arm_cca_rmi_res_to_errno(&res) ? 0 : res.a1; +} + +int arm_cca_rmi_rmm_config_get(paddr_t cfg_ptr, struct arm_smccc_res *res) +{ + arm_cca_rmi_invoke(ARM_CCA_RMI_RMM_CONFIG_GET_FID, + cfg_ptr, 0, 0, 0, 0, res); + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_rmm_config_set(paddr_t cfg_ptr) +{ + struct arm_smccc_res res; + + arm_cca_rmi_invoke(ARM_CCA_RMI_RMM_CONFIG_SET_FID, + cfg_ptr, 0, 0, 0, 0, &res); + + return arm_cca_rmi_res_to_errno(&res); +} + +int arm_cca_rmi_rmm_activate(struct arm_smccc_res *res) +{ + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_RMM_ACTIVATE_FID, + 0, 0, 0, 0, 0, res); + if ( rc != 0 ) + return rc; + + return arm_cca_rmi_res_to_errno(res); +} + +int arm_cca_rmi_granule_tracking_get(paddr_t base, paddr_t top, + unsigned long *category, + unsigned long *state, paddr_t *out_top) +{ + struct arm_smccc_res res; + int rc; + + arm_cca_rmi_invoke(ARM_CCA_RMI_GRANULE_TRACKING_GET_FID, + base, top, 0, 0, 0, &res); + + rc = arm_cca_rmi_res_to_errno(&res); + if ( rc != 0 ) + return rc; + + /* + * Note that X3 is not defined by DEN0137 2.0-bet1 B4.5.10.1.3. The + * tested TF-RMM v2.0 PoC branch, also followed by the KVM host series, + * returns range progress there. + */ + *category = res.a1; + *state = res.a2; + *out_top = res.a3; + + return 0; +} + +int arm_cca_rmi_gpt_l1_create(paddr_t base) +{ + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_initiate_sro(ARM_CCA_RMI_GPT_L1_CREATE_FID, + base, 0, 0, 0, 0, &res); + if ( rc != 0 ) + return rc; + + if ( arm_cca_rmi_is_success(&res) || + arm_cca_rmi_status_is(arm_cca_rmi_result(&res), + ARM_CCA_RMI_ERROR_GPT) ) + return 0; + + /* + * Xen CCA supports immediate GPT L1 creation, or an existing GPT L1 + * reported as RMI_ERROR_GPT. If creation needs a memory-transferring + * SRO, leave CCA unavailable for now. + */ + if ( arm_cca_rmi_status_is(arm_cca_rmi_result(&res), + ARM_CCA_RMI_INCOMPLETE) ) + return -EOPNOTSUPP; + + return arm_cca_rmi_res_to_errno(&res); +} diff --git a/xen/arch/arm/cca/rmi.h b/xen/arch/arm/cca/rmi.h new file mode 100644 index 000000000000..4cd0bc64ccf5 --- /dev/null +++ b/xen/arch/arm/cca/rmi.h @@ -0,0 +1,126 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Internal Xen RMI command API. + * + * This header exposes typed wrappers and helpers for the subset of RMI + * commands used by Xen. Raw ABI constants live in rmi-abi.h. + */ +#ifndef ARM_CCA_RMI_H +#define ARM_CCA_RMI_H + +#include +#include +#include +#include + +#include + +#include "rmi-abi.h" + +static inline uint64_t arm_cca_rmi_field_get(uint64_t value, + unsigned int shift, + unsigned int width) +{ + ASSERT(width != 0 && shift < 64U && width <= 64U - shift); + + return (value & GENMASK_ULL(shift + width - 1, shift)) >> shift; +} + +static inline uint64_t arm_cca_rmi_result(const struct arm_smccc_res *res) +{ + return res->a0; +} + +static inline bool arm_cca_rmi_is_success(const struct arm_smccc_res *res) +{ + return arm_cca_rmi_result(res) == ARM_CCA_RMI_SUCCESS; +} + +static inline bool arm_cca_rmi_result_is_smccc_unknown(uint64_t result) +{ + return result == (uint64_t)ARM_SMCCC_ERR_UNKNOWN_FUNCTION; +} + +static inline unsigned int arm_cca_rmi_status_code(uint64_t result) +{ + return arm_cca_rmi_field_get(result, ARM_CCA_RMI_RESULT_STATUS_SHIFT, + ARM_CCA_RMI_RESULT_STATUS_WIDTH); +} + +static inline uint64_t arm_cca_rmi_result_data(uint64_t result) +{ + return result >> ARM_CCA_RMI_RESULT_DATA_SHIFT; +} + +static inline bool arm_cca_rmi_status_is(uint64_t result, unsigned int status) +{ + return arm_cca_rmi_status_code(result) == status; +} + +static inline bool arm_cca_rmi_status_is_error(uint64_t result) +{ + unsigned int status; + + if ( arm_cca_rmi_result_is_smccc_unknown(result) ) + return false; + + status = arm_cca_rmi_status_code(result); + + switch ( status ) + { + case ARM_CCA_RMI_ERROR_INPUT: + case ARM_CCA_RMI_ERROR_REALM: + case ARM_CCA_RMI_ERROR_REC: + case ARM_CCA_RMI_ERROR_RTT: + case ARM_CCA_RMI_ERROR_NOT_SUPPORTED: + case ARM_CCA_RMI_ERROR_DEVICE: + case ARM_CCA_RMI_ERROR_RTT_AUX: + case ARM_CCA_RMI_ERROR_PSMMU_ST: + case ARM_CCA_RMI_ERROR_DPT: + case ARM_CCA_RMI_ERROR_GLOBAL: + case ARM_CCA_RMI_ERROR_TRACKING: + case ARM_CCA_RMI_ERROR_GPT: + case ARM_CCA_RMI_ERROR_GRANULE: + return true; + + default: + return false; + } +} + +static inline int arm_cca_rmi_result_to_errno(uint64_t result) +{ + /* + * SRO progress states are not errno failures. The SRO helpers keep + * inspecting the raw result in X0 through struct arm_smccc_res. + */ + if ( result == ARM_CCA_RMI_SUCCESS || + arm_cca_rmi_status_is(result, ARM_CCA_RMI_INCOMPLETE) || + arm_cca_rmi_status_is(result, ARM_CCA_RMI_BUSY) ) + return 0; + + if ( arm_cca_rmi_result_is_smccc_unknown(result) || + arm_cca_rmi_status_is(result, ARM_CCA_RMI_ERROR_NOT_SUPPORTED) ) + return -EOPNOTSUPP; + + return -EIO; +} + +static inline int arm_cca_rmi_res_to_errno(const struct arm_smccc_res *res) +{ + return arm_cca_rmi_result_to_errno(arm_cca_rmi_result(res)); +} +int arm_cca_rmi_version(unsigned long requested_revision, + unsigned long *revision_lower, + unsigned long *revision_higher); +unsigned long arm_cca_rmi_features(unsigned long index); +int arm_cca_rmi_rmm_config_get(paddr_t cfg_ptr, struct arm_smccc_res *res); +int arm_cca_rmi_rmm_config_set(paddr_t cfg_ptr); +int arm_cca_rmi_rmm_activate(struct arm_smccc_res *res); + +int arm_cca_rmi_granule_tracking_get(paddr_t base, paddr_t top, + unsigned long *category, + unsigned long *state, paddr_t *out_top); +int arm_cca_rmi_gpt_l1_create(paddr_t base); + +#endif /* ARM_CCA_RMI_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309344.1580407 (Exim 4.92) (envelope-from ) id 1wNjqk-0002hz-3C; Fri, 15 May 2026 04:08:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309344.1580407; Fri, 15 May 2026 04:08:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjqj-0002gK-Oa; Fri, 15 May 2026 04:08:33 +0000 Received: by outflank-mailman (input) for mailman id 1309344; Fri, 15 May 2026 04:08:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjqh-00021K-E3 for xen-devel@lists.xenproject.org; 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 09/26] xen/arm: vpl011: expose VPL011 presence to Arm code Date: Fri, 15 May 2026 13:07:55 +0900 Message-ID: <20260515040812.983626-10-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0083.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:2b3::11) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB5257:EE_ X-MS-Office365-Filtering-Correlation-Id: 5d76a1a3-5e66-4a7c-3e44-08deb2379ca9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|376014|7416014|366016|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: 9lTVlJNHahq+ojBEUkiP3eixCr08Kjxvnalzg4IOzf1laArrd1tL14LA3YCW53V6SoPwDIzUrEudAUa4NGPDJDRdQtb/d3id8qRp9dGCTGgMbe/YU7Xi5o9saVs/1NzRktdvgLwWjC9sKN1lJz32cPJbbh4syU2gU4xVLKjx+9NgfByWaMA4czCyqQ6JNy1WCFllbDbtCGtueoLQi6KXap8bsNlifxPXVm4KFfHsit/6URsgU1VL9kcI58HULKOe9/DDs45SnBNwVfAWTw4+j3b6BVY/97RxE//XBiolCJv1XCv+Kh4Y5qNmG935FrXmCgL7D/a10vm1nqKiBrtVqDABLKpBjt7kaWZEhHS83kfX1BxCGB50XIOFMQG+YGX5rkWfoBcpLEmDNHSMc3MLvcG80ft+gsbjwyoLKlU+dq0uaZfWj8J54Pq156ngIqUERILwQkRNZyswk238xUuhRo6tRT7jLNcL/x2XuByPs8ceCgqGuqMRSsBxSrQYTU0qzCygeHC+Sdm/lmPcG+c4ojyzpaclgVtcf+4OksOcfUqQE/9g6Fxwp5bLHIMwmrkAv2sirD6etH0iWM3Sk9uMUCK0sn18LJ/Efb7yqaPMTGHQOJyKaNBxU7+go+8pKlJAX9ft7ZIDgwpblVIwmc+LQjGC4LhXnGUs1K9gmZb7gYiSyHFOn6kyJV8U6c7JBhRX X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(376014)(7416014)(366016)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1102; 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Realm validation uses this to keep the clear-text debug console behind a Kconfig choice. Signed-off-by: Koichiro Den --- xen/arch/arm/include/asm/vpl011.h | 5 +++++ xen/arch/arm/vpl011.c | 5 +++++ 2 files changed, 10 insertions(+) diff --git a/xen/arch/arm/include/asm/vpl011.h b/xen/arch/arm/include/asm/vpl011.h index cc838682815c..35d08556785a 100644 --- a/xen/arch/arm/include/asm/vpl011.h +++ b/xen/arch/arm/include/asm/vpl011.h @@ -69,6 +69,7 @@ struct vpl011_init_info { int domain_vpl011_init(struct domain *d, struct vpl011_init_info *info); void domain_vpl011_deinit(struct domain *d); +bool domain_has_vpl011(const struct domain *d); int vpl011_rx_char_xen(struct domain *d, char c); #else static inline int domain_vpl011_init(struct domain *d, @@ -78,6 +79,10 @@ static inline int domain_vpl011_init(struct domain *d, } static inline void domain_vpl011_deinit(struct domain *d) { } +static inline bool domain_has_vpl011(const struct domain *d) +{ + return false; +} #endif #endif /* _VPL011_H_ */ diff --git a/xen/arch/arm/vpl011.c b/xen/arch/arm/vpl011.c index d0d17c76b72c..05a03a5ce5d0 100644 --- a/xen/arch/arm/vpl011.c +++ b/xen/arch/arm/vpl011.c @@ -747,6 +747,11 @@ out: return rc; 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From: Koichiro Den To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 07/26] xen/arm/cca: initialize the RMM and Realm parameters Date: Fri, 15 May 2026 13:07:53 +0900 Message-ID: <20260515040812.983626-8-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0093.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:2b4::6) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB3981:EE_ X-MS-Office365-Filtering-Correlation-Id: 2e4ce52f-3bfb-4bd1-7471-08deb2379bc5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|366016|10070799003|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: UfcFrQvCIVtqCR+pvBa12k3wKUgmP05cV1WxFmxp6NiG2+Ap6xJMIUsD0Z4NzRl2N+nWIkfGF7J/dtUVrZbEjUlq/LE1bJagplHaWyZUOBTYh6KVJ7U8/Y6OZfCxAmAvShgUDlXZswOoBaaVsAa6yZ6lLIY7RDcEG5L3xPp1CcvXu5iPyAn9KyTP6IzJNzqX4rQGKBP01ytnWPVXXlmUcsIdoatmu0UbdTKbZRX/ZazgvvM8bPHcm0b2DV83OjhZhkPiTA2r8ynRlokPlFQWClRBi7pmtDznUrz8KUGVzFU+iIja6TtJszQle/L6tj+l2fzpaXB+qX8oQJLmNNeT6QcQOHkcViVhb6cUkTQg/PChmJAauXulOy59eGRpLMLhH1JS5uTjyxU3bys3zTbLdFt3m37jY1AdsDSkJ4Jg9/YbuTKJ9L0iztUXkzlpvFHgqM3z2Gym7/7heBtGaktple+WyT0OJryVKOqFXvnHOJx1n20grgzcmxK9CVcFOiGIuzsaseU7tIFYMgKgJ2AlbxkvqGwWuDQSHB3X8BGsuX2a8w3nVwmeTwj3P+9xz+60+vTqQ9ISI5WYXGwsVEQCWIa4YUDOjxl0vu79qd+UAJOSazPn4pAmvlMTW1UjJt/Cz++0s9nfasPk5pb4fOBSlPC8ZqYve2OjW4D5pYsVujcXQEahEJ2IUDgipxCQs67q X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(366016)(10070799003)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1102; 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/realm.c | 191 +++++++++++++++++++++++++++++++++ xen/arch/arm/include/asm/cca.h | 10 ++ 3 files changed, 202 insertions(+) create mode 100644 xen/arch/arm/cca/realm.c diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index 7f20d43323c3..57c3986d5de8 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -1,3 +1,4 @@ obj-y += granule.o +obj-y += realm.o obj-y += rmi.o obj-y += state.o diff --git a/xen/arch/arm/cca/realm.c b/xen/arch/arm/cca/realm.c new file mode 100644 index 000000000000..14aa7bba595f --- /dev/null +++ b/xen/arch/arm/cca/realm.c @@ -0,0 +1,191 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +#include + +#include "rmi.h" +#include "sro.h" + +/* + * Pages donated while activating the RMM are owned by the activated RMM until + * system reset. Keep the host references here to make that lifetime explicit. + */ +static struct page_info *arm_cca_rmm_sro_pages[ARM_CCA_MAX_SRO_DONATION_PAGES]; +static unsigned int arm_cca_nr_rmm_sro_pages; +static struct page_list_head arm_cca_rmm_abandoned_pages = + PAGE_LIST_HEAD_INIT(arm_cca_rmm_abandoned_pages); +static bool arm_cca_rmm_available; +static unsigned long arm_cca_rmm_features0; +static unsigned long arm_cca_rmm_features1; + +static int arm_cca_set_rmm_config(struct arm_cca_rmi_rmm_config *cfg) +{ + memset(cfg, 0, ARM_CCA_RMI_RMM_CONFIG_SIZE); + cfg->rmi_granule_size = ARM_CCA_RMI_GRANULE_SIZE_4KB; + cfg->tracking_region_size = ARM_CCA_RMI_TRACKING_4KB_REGION_1GB; + + return arm_cca_rmi_rmm_config_set(virt_to_maddr(cfg)); +} + +static int arm_cca_activate_rmm(void) +{ + struct arm_cca_rmi_rmm_config *cfg; + struct arm_cca_sro_mem_xfer xfer = { + .pages = arm_cca_rmm_sro_pages, + .nr_pages = &arm_cca_nr_rmm_sro_pages, + .max_pages = ARRAY_SIZE(arm_cca_rmm_sro_pages), + .abandoned_pages = &arm_cca_rmm_abandoned_pages, + }; + struct arm_smccc_res res; + int rc = 0; + + cfg = alloc_xenheap_page(); + if ( cfg == NULL ) + return -ENOMEM; + + rc = arm_cca_set_rmm_config(cfg); + if ( rc == 0 ) + { + rc = arm_cca_rmi_rmm_activate(&res); + rc = arm_cca_sro_complete_mem_transfer(rc, &res, &xfer); + } + + if ( rc != 0 && (arm_cca_nr_rmm_sro_pages != 0 || + !page_list_empty(&arm_cca_rmm_abandoned_pages)) ) + rc = -EIO; + + free_xenheap_page(cfg); + + return rc; +} + +static int arm_cca_validate_rmm_config(void) +{ + struct arm_cca_rmi_rmm_config *cfg; + struct arm_smccc_res res; + int rc; + + cfg = alloc_xenheap_page(); + if ( cfg == NULL ) + return -ENOMEM; + + memset(cfg, 0, ARM_CCA_RMI_RMM_CONFIG_SIZE); + + rc = arm_cca_rmi_rmm_config_get(virt_to_maddr(cfg), &res); + if ( rc != 0 ) + { + printk(XENLOG_ERR + "ARM CCA: RMI_RMM_CONFIG_GET failed status=%#x data=%#lx\n", + arm_cca_rmi_status_code(arm_cca_rmi_result(&res)), + (unsigned long)arm_cca_rmi_result_data( + arm_cca_rmi_result(&res))); + rc = -EOPNOTSUPP; + goto out; + } + + /* + * Xen's current Realm build and teardown paths assume 4KB RMI granules + * and the matching 1GB tracking region. Other active RMM configurations + * are valid RMI, but need explicit Xen support before they can be + * accepted here. + */ + if ( cfg->rmi_granule_size != ARM_CCA_RMI_GRANULE_SIZE_4KB ) + { + printk(XENLOG_ERR + "ARM CCA: requires 4KB RMI granules, but current RMM " + "granule size encoding is %u\n", cfg->rmi_granule_size); + rc = -EOPNOTSUPP; + goto out; + } + + if ( cfg->tracking_region_size != ARM_CCA_RMI_TRACKING_4KB_REGION_1GB ) + { + printk(XENLOG_ERR + "ARM CCA: requires 1GB tracking regions for 4KB RMI " + "granules, but current RMM tracking-region encoding is %u\n", + cfg->tracking_region_size); + rc = -EOPNOTSUPP; + goto out; + } + + rc = 0; + +out: + free_xenheap_page(cfg); + + return rc; +} + +static int __init arm_cca_init_rmi(void) +{ + unsigned long revision_lower; + int rc; + + rc = arm_cca_rmi_version(ARM_CCA_RMI_ABI_VERSION, &revision_lower, NULL); + if ( rc != 0 || revision_lower != ARM_CCA_RMI_ABI_VERSION ) + return 0; + + arm_cca_rmm_features0 = arm_cca_rmi_features(0); + arm_cca_rmm_features1 = arm_cca_rmi_features(1); + + rc = arm_cca_activate_rmm(); + if ( rc != 0 ) + { + printk(XENLOG_ERR "ARM CCA: RMM activate failed: %d\n", rc); + return 0; + } + + rc = arm_cca_validate_rmm_config(); + if ( rc != 0 ) + return 0; + + rc = arm_cca_prepare_host_memory(arm_cca_rmm_features1); + if ( rc != 0 ) + { + printk(XENLOG_ERR "ARM CCA: host memory metadata check failed: %d\n", + rc); + return 0; + } + + arm_cca_rmm_available = true; + printk(XENLOG_INFO "ARM CCA: RMI configured\n"); + + return 0; +} +__initcall(arm_cca_init_rmi); + +int arm_cca_probe(struct domain *d) +{ + if ( !arm_cca_rmm_available ) + return -EOPNOTSUPP; + + d->arch.cca.rmi_features0 = arm_cca_rmm_features0; + d->arch.cca.rmi_features1 = arm_cca_rmm_features1; + + return 0; +} + +void arm_cca_realm_params_init(struct arm_cca_rmi_realm_params *params) +{ + memset(params, 0, sizeof(*params)); +} + +void arm_cca_rec_params_init(struct arm_cca_rmi_rec_params *params, + register_t mpidr, register_t pc, bool runnable) +{ + memset(params, 0, sizeof(*params)); + + params->flags = runnable ? ARM_CCA_RMI_REC_CREATE_RUNNABLE : 0; + params->mpidr = mpidr; + params->pc = pc; +} + +void arm_cca_rec_run_init(struct arm_cca_rmi_rec_run *run) +{ + memset(run, 0, sizeof(*run)); +} diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index c35d51f750a3..80c161078d6c 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -24,6 +24,9 @@ struct domain; struct vcpu; +struct arm_cca_rmi_realm_params; +struct arm_cca_rmi_rec_params; +struct arm_cca_rmi_rec_run; struct page_info; struct arm_cca_rtt_record { @@ -84,4 +87,11 @@ int arm_cca_delegate_granule(paddr_t granule); int arm_cca_undelegate_granule(paddr_t granule); int arm_cca_prepare_host_memory(unsigned long features1) __init; +int arm_cca_probe(struct domain *d); + +void arm_cca_realm_params_init(struct arm_cca_rmi_realm_params *params); +void arm_cca_rec_params_init(struct arm_cca_rmi_rec_params *params, + register_t mpidr, register_t pc, bool runnable); +void arm_cca_rec_run_init(struct arm_cca_rmi_rec_run *run); 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 00/26] xen/arm: Initial Arm CCA Realm support Date: Fri, 15 May 2026 13:07:46 +0900 Message-ID: <20260515040812.983626-1-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0285.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:3c9::20) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB3981:EE_ X-MS-Office365-Filtering-Correlation-Id: 4f67344c-1488-43a1-073e-08deb2379895 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|366016|10070799003|3023799003|18002099003|56012099003; X-Microsoft-Antispam-Message-Info: KgD8fpFAfPLiKoE7w+9zzFThxEYmoTTy4+TXZ+Z4TzmbWt3/1HRL6rY2pneQinsXyW01adwWkbk/NEDFatdOKnchhSFFxG2JNE7HxM2+AyGmoHBNuRJBCeeXvSSrMGPUXZNv2xK6jdRXftApIV0DZFG6hxe/k00IS30OPYdP3Zu7jQ/RV73TfhCFQXuaLicVcZ425vwNBiGo7w/HM4kUMBom/NjuwhkUZ0jQcdto2PNEe4G8hZqNByZqHJMlEA04UbyL0ek0x14n90UbZqZQr1B4tumFaBMAaSN0AxsLCO4BCAQ18PcefDfF5IqiwBPjz7twPsIq2o2aXOC/V7AStdEzgMHmAfjg8mQo3bqLvbKr2fYHuVK/ZAJKDwSH1LgEOilyr9pPeUJzGgFQ3Ad/h8lMdUjkmjrctWgp2/4ZFambkTjxggcOyA1/bU3zLetOvsUgBQ6vCQLQsrwsNDXkdtJ704L0Z81DzA29bggGVN4AiJUUIVBMiklLjP2oYJR8CwTtxXHkgKoBM5Z3GrVApfHkzhblLr3IbUHij/29+z4WQfPoClW28RG74xLLhctwwBq3l3EXdgAtck8Axpe2Xh/jrMNimf2bhVBbTPc6GB3yftMU+mb+NmyxaC/oPaTq5PuSZqm4JLx4byiGqOXrIw== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(366016)(10070799003)(3023799003)(18002099003)(56012099003);DIR:OUT;SFP:1102; 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It targets the RMI v2.0 ABI described by DEN0137 2.0-bet1 (https://developer.arm.com/documentation/den0137/2-0bet1). The scope is intentionally narrow. The series boots a small Realm guest and exercises the Realm lifecycle, REC entry, basic MMIO exits, PSCI, RIPAS changes and a local attestation smoke test. It is not complete Arm CCA support. Preface ======= This work was prepared independently, using public Arm CCA material as the reference point: the RMM architecture specification, the public TF-RMM v2.0 PoC branch, and the public Arm/KVM CCA series. I expect this series to need further respins while TF-RMM v2.0 and the KVM CCA support, v14 at the time of writing, continue to settle. Some choices here follow the current public PoC code rather than a tagged TF-RMM v2.0 release. Review from people familiar with Arm CCA, RMM and the KVM CCA work would be much appreciated. I would be especially grateful if someone from Arm could help sanity-check the RMI/RMM assumptions, even informally. Developed and tested with the following component revisions: * TF-RMM: commit 3340667a291a topics/rmm-v2.0-poc_2 branch tip as of 2026-05-14 https://git.trustedfirmware.org/plugins/gitiles/TF-RMM/tf-rmm.git/+/3340667a291acd5722cb45d05135d7aa15174b25 * TF-A [1]: commit 7ad4b5ed31e3 https://git.trustedfirmware.org/plugins/gitiles/TF-A/trusted-firmware-a.git/+/7ad4b5ed31e33dca21dd4d2f4a9f64f9b7d4db85 * Arm FVP: FVP_Base_RevC-2xAEMvA 11.30_27 * vanilla Linux v7.0 for both Dom0 and the Realm guest. A runnable demo workspace is here: https://gitlab.com/cca-for-xen-demo/cca-stack-xen-demo The tested path is: * boot Xen and Dom0 on the Arm FVP Base RevC AEMvA RME model * create a Realm guest through toolstack * boot a Linux Realm guest * attach to the current debug vUART * run a local Realm attestation smoke test * shut the Realm guest down and relinquish the Realm resources [1] https://lists.trustedfirmware.org/archives/list/tf-a@lists.trustedfirmware.org/message/NL63OIIDQVFGQ4TFXY7TNZS43TLLIKXD/ Overview ======== The series contains: * RMI v2.0 ABI definitions and SMCCC wrappers. * Realm domain and vCPU state. * Realm-owned granule tracking for RD, RTT, DATA and REC pages, plus REC auxiliary pages donated through SRO. * Host RAM tracking checks and GPT L1 setup before Xen creates Realms. * Stateful RMI Operation helpers for RMM, Realm and REC lifecycle commands. * Realm construction: - RMI_REALM_CREATE - RTT creation - DATA mapping with measured initial contents - REC creation - RMI_REALM_ACTIVATE * Realm relinquish and teardown: - RMI_REALM_TERMINATE - DATA unmap - RTT destroy - REC destroy and SRO reclaim of auxiliary pages - RMI_REALM_DESTROY * A dedicated REC execution path based on RMI_REC_ENTER. * Minimal REC exit handling for: - interrupt exits returning control to Xen - PSCI - WFI/WFE - RIPAS change - emulatable Data Abort MMIO - selected GICv3 sysreg exits - simple timer state handoff around Realm entry and exit. * A domctl used by libxl to finalize Realm construction. * A libxl/xl option, realm=true, for Arm PVH guests. Current scope and limitations ============================= The initial support is intentionally minimally-scoped: * No Dom0less Realm launch at Xen boot * No Xen PV interfaces for Realm guests * No device assignment or VDEV/VSMMU handling * No Multi-Plane Realms * No Realm LPA2, so the Realm IPA size is limited to 48 bits * No Realm SVE or Realm PMU * No selectable Live Firmware Activation policy * Shared MEC policy only * Fixed zero Realm Personalization Value * No guest RAM outside the first Arm guest RAM bank * No S2AP change handling through RMI_RTT_SET_S2AP * No Host call exits * No frontend/backend devices, virtio, or Xen grant mappings for Realm guests * No ACPI Realm guests * No non-4KB RMI granule or non-1GB tracking-region configurations * No shared-memory mappings through RMI_RTT_UNPROT_MAP and RMI_RTT_UNPROT_UNMAP * No hardware-backed vIRQ deactivation in the ICC_DIR_EL1 emulation path * No production-safe replacement for the current clear-text debug VUART. The debug VUART is Kconfig-gated and host-visible. It is only a debug path, not a confidential Realm I/O path. Realm creation is intended to be libxl-driven in this RFC. libxl rejects Realm guests whose RAM does not fit in the first Arm guest RAM bank, and passes that single first-bank RAM range to Xen for Realm conversion. The current Linux v7.0 Realm guest code used for testing does not issue RSI_MEM_SET_PERM_INDEX, so the missing S2AP change flow is not exercised by the tested boot and attestation path. Two implementation details are worth mentioning. Initial Realm RAM population measures every populated DATA granule. There is no measured-range interface yet. Xen also tracks up to 64 accepted donation pages for one memory-transferring SRO. That is a Xen implementation cap, not an RMI limit. Device assignment is separate work. The tested TF-RMM revision already has some PDEV, VDEV and PSMMU code. Xen simply does not create those objects, enable Realm DA in RmiRealmParams, or handle the related REC exits yet. Best regards, Koichiro Koichiro Den (26): xen/arm/cca: add RMI v2.0 ABI definitions xen/arm/cca: add RMI v2.0 SMCCC core wrappers xen/arm/cca: add RMI v2.0 lifecycle wrappers xen/arm/cca: add Realm domain and vCPU state xen/arm/cca: track Realm-owned granules xen/arm/cca: add Realm granule helpers xen/arm/cca: initialize the RMM and Realm parameters xen/arm/cca: add shared SRO helpers xen/arm: vpl011: expose VPL011 presence to Arm code xen/arm/cca: add Realm relinquish entry point xen/arm/cca: terminate and destroy Realms on relinquish xen/arm/cca: tear down Realm DATA and RTT granules xen/arm/cca: destroy RECs during Realm relinquish xen/arm/cca: validate Realm construction inputs xen/arm/cca: create Realm descriptors xen/arm/cca: build Realm RTTs xen/arm/cca: populate Realm DATA granules xen/arm/cca: create RECs and activate Realms xen/arm: io: add register-backed MMIO emulation helpers xen/arm: vgic-v3: expose SGI emulation for Realm exits xen/arm/cca: add Realm vCPU timer state xen/arm/cca: add Realm REC enter path xen/arm/cca: handle Realm RIPAS and GIC sysreg exits xen/arm, tools: add domctl for Realm finalization libxl/arm: add and validate Realm guest support docs: arm: add an Arm CCA Realm guest guide docs/hypervisor-guide/arm/cca-realm.rst | 83 ++ docs/hypervisor-guide/arm/index.rst | 1 + docs/man/xl.cfg.5.pod.in | 46 +- tools/flask/policy/modules/xen.if | 1 + tools/include/libxl.h | 5 + tools/include/xenctrl.h | 12 + tools/libs/ctrl/xc_domain.c | 37 + tools/libs/light/libxl_arm.c | 140 ++- tools/libs/light/libxl_create.c | 2 + tools/libs/light/libxl_types.idl | 1 + tools/xl/xl_parse.c | 2 + xen/arch/arm/Kconfig | 25 + xen/arch/arm/Makefile | 1 + xen/arch/arm/cca/Makefile | 7 + xen/arch/arm/cca/build.c | 1131 +++++++++++++++++++++++ xen/arch/arm/cca/granule.c | 150 +++ xen/arch/arm/cca/realm.c | 191 ++++ xen/arch/arm/cca/rec.c | 965 +++++++++++++++++++ xen/arch/arm/cca/rmi-abi.h | 433 +++++++++ xen/arch/arm/cca/rmi.c | 441 +++++++++ xen/arch/arm/cca/rmi.h | 214 +++++ xen/arch/arm/cca/sro.c | 485 ++++++++++ xen/arch/arm/cca/sro.h | 25 + xen/arch/arm/cca/state.c | 470 ++++++++++ xen/arch/arm/domain.c | 32 +- xen/arch/arm/domctl.c | 60 ++ xen/arch/arm/include/asm/arm64/hsr.h | 1 + xen/arch/arm/include/asm/cca.h | 137 +++ xen/arch/arm/include/asm/domain.h | 16 + xen/arch/arm/include/asm/hsr.h | 4 + xen/arch/arm/include/asm/mmio.h | 11 + xen/arch/arm/include/asm/vgic.h | 10 + xen/arch/arm/include/asm/vpl011.h | 5 + xen/arch/arm/io.c | 99 +- xen/arch/arm/vgic-v3.c | 4 +- xen/arch/arm/vpl011.c | 5 + xen/include/public/domctl.h | 12 + xen/xsm/flask/hooks.c | 3 + xen/xsm/flask/policy/access_vectors | 2 + 39 files changed, 5221 insertions(+), 48 deletions(-) create mode 100644 docs/hypervisor-guide/arm/cca-realm.rst create mode 100644 xen/arch/arm/cca/Makefile create mode 100644 xen/arch/arm/cca/build.c create mode 100644 xen/arch/arm/cca/granule.c create mode 100644 xen/arch/arm/cca/realm.c create mode 100644 xen/arch/arm/cca/rec.c create mode 100644 xen/arch/arm/cca/rmi-abi.h create mode 100644 xen/arch/arm/cca/rmi.c create mode 100644 xen/arch/arm/cca/rmi.h create mode 100644 xen/arch/arm/cca/sro.c create mode 100644 xen/arch/arm/cca/sro.h create mode 100644 xen/arch/arm/cca/state.c create mode 100644 xen/arch/arm/include/asm/cca.h -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309356.1580438 (Exim 4.92) (envelope-from ) id 1wNjqy-0004N1-2N; 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Keep enough state to continue after preemption or abort cleanly. Signed-off-by: Koichiro Den --- xen/arch/arm/Kconfig | 11 ++ xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/build.c | 333 +++++++++++++++++++++++++++++++++ xen/arch/arm/cca/state.c | 7 + xen/arch/arm/include/asm/cca.h | 26 +++ 5 files changed, 378 insertions(+) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index dc99020c96de..3635a79af272 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -132,6 +132,17 @@ config ARM_CCA This support is experimental. If unsure, say N. +config ARM_CCA_REALM_DEBUG_VUART + bool "Debug VUART console for Arm Realm guests" + depends on ARM_CCA && SBSA_VUART_CONSOLE + help + Allow Arm CCA Realm guests to use the emulated SBSA UART console. + + The VUART is a host-visible clear-text debug channel. It is useful + for Realm debug access while there is no better guest access + path, but confidentiality-oriented configurations should disable it + and rely on attested in-Realm services instead. + config GICV2 bool "GICv2 driver" default y diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index bf6d9b58ebec..0e66280012b7 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -3,3 +3,4 @@ obj-y += realm.o obj-y += rmi.o obj-y += sro.o obj-y += state.o +obj-y += build.o diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c index 8e607e97b99c..29eb0c6057b0 100644 --- a/xen/arch/arm/cca/build.c +++ b/xen/arch/arm/cca/build.c @@ -788,3 +788,336 @@ err_page: return rc; } + +static void arm_cca_adopt_rec_aux_pages(struct vcpu *v, + struct page_info **pending_aux, + unsigned int *nr_pending_aux) +{ + unsigned int i; + + for ( i = 0; i < *nr_pending_aux; ++i ) + { + ASSERT(v->arch.cca.nr_aux < ARRAY_SIZE(v->arch.cca.aux_pages)); + v->arch.cca.aux_pages[v->arch.cca.nr_aux++] = pending_aux[i]; + pending_aux[i] = NULL; + } + + *nr_pending_aux = 0; +} + +static int arm_cca_rmi_rec_create_complete(struct domain *d, struct vcpu *v, + paddr_t rec, paddr_t params, + uint64_t *rmi_result) +{ + struct page_info *pending_aux[ARM_CCA_MAX_REC_AUX] = { NULL }; + unsigned int nr_pending_aux = 0; + struct arm_cca_sro_mem_xfer xfer = { + .pages = pending_aux, + .nr_pages = &nr_pending_aux, + .abandoned_pages = &d->arch.cca.abandoned_pages, + }; + struct arm_smccc_res res; + int rc; + + if ( v->arch.cca.nr_aux > ARRAY_SIZE(v->arch.cca.aux_pages) ) + return -EIO; + + xfer.max_pages = ARRAY_SIZE(v->arch.cca.aux_pages) - v->arch.cca.nr_aux; + + rc = arm_cca_rmi_rec_create(d->arch.cca.rd, rec, params, &res); + rc = arm_cca_sro_complete_mem_transfer(rc, &res, &xfer); + rc = arm_cca_build_record_rmi_failure(rmi_result, rc, &res); + + if ( rc != 0 && nr_pending_aux != 0 ) + { + /* + * Accepted REC auxiliary pages are returned only when the SRO reports + * RMI_OP_MEM_REQ_RECLAIM. If it ends before then, Xen has no separate + * reclaim operation for them. + */ + d->arch.cca.build_unrecoverable = true; + } + + if ( nr_pending_aux != 0 ) + arm_cca_adopt_rec_aux_pages(v, pending_aux, &nr_pending_aux); + + return rc; +} + +static int arm_cca_create_rec(struct domain *d, struct vcpu *v, bool runnable, + uint64_t *rmi_result) +{ + struct cpu_user_regs *regs; + struct arm_cca_rmi_rec_params *params; + struct page_info *rec_pg = NULL; + struct page_info *params_pg = NULL; + bool rec_delegated = false, run_created = false; + void *va; + int rc = -ENOMEM; + + rec_pg = arm_cca_alloc_host_page(); + if ( !rec_pg ) + goto out; + + params_pg = arm_cca_alloc_host_page(); + if ( !params_pg ) + goto out; + + if ( !v->arch.cca.run ) + { + v->arch.cca.run = arm_cca_alloc_rec_run(); + if ( !v->arch.cca.run ) + goto out; + v->arch.cca.run_pa = virt_to_maddr(v->arch.cca.run); + run_created = true; + } + + rc = arm_cca_delegate_granule(page_to_maddr(rec_pg)); + if ( rc != 0 ) + goto out; + rec_delegated = true; + + va = map_domain_page(page_to_mfn(params_pg)); + params = va; + regs = &v->arch.cpu_info->guest_cpu_user_regs; + + /* + * REC_CREATE takes an RmiRecMpidr affinity value, not a full MPIDR_EL1. + * DEN0137 2.0-bet1 - B4.6.68 RmiRecMpidr type. + */ + arm_cca_rec_params_init(params, vcpuid_to_vaffinity(v->vcpu_id), + regs->pc, runnable); + params->gprs[0] = regs->x0; + params->gprs[1] = regs->x1; + params->gprs[2] = regs->x2; + params->gprs[3] = regs->x3; + + unmap_domain_page(va); + + rc = arm_cca_rmi_rec_create_complete(d, v, page_to_maddr(rec_pg), + page_to_maddr(params_pg), + rmi_result); + if ( rc != 0 ) + goto out; + + arm_cca_rec_run_init(v->arch.cca.run); + + v->arch.cca.rec_page = rec_pg; + v->arch.cca.rec = page_to_maddr(rec_pg); + rc = 0; + +out: + if ( params_pg ) + free_domheap_page(params_pg); + + if ( rc != 0 && rec_pg ) + arm_cca_free_or_abandon_build_page(d, rec_pg, rec_delegated); + + if ( rc != 0 && run_created ) + { + arm_cca_free_rec_run(v->arch.cca.run); + v->arch.cca.run = NULL; + v->arch.cca.run_pa = INVALID_PADDR; + } + + return rc; +} + +/* DEN0137 2.0-bet1 - D1.2.4 REC creation flow. */ +static int arm_cca_create_recs(struct domain *d, uint64_t *rmi_result) +{ + unsigned int i; + int rc; + + for ( i = 0; i < d->max_vcpus; ++i ) + { + struct vcpu *v = d->vcpu[i]; + + ASSERT(v); + + rc = arm_cca_create_rec(d, v, i == 0, rmi_result); + if ( rc != 0 ) + return rc; + + } + + return 0; +} + +static void arm_cca_build_state_clear(struct domain *d) +{ + d->arch.cca.build_phase = ARM_CCA_BUILD_NONE; + d->arch.cca.build_unrecoverable = false; + d->arch.cca.build_abort_rmi_result = 0; + d->arch.cca.build_base_gfn = INVALID_GFN; + d->arch.cca.build_nr_pages = 0; + d->arch.cca.build_next_ipa = INVALID_PADDR; + d->arch.cca.build_rtt_level = 0; +} + +static void arm_cca_build_state_start(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages) +{ + d->arch.cca.build_phase = ARM_CCA_BUILD_VALIDATE; + d->arch.cca.build_unrecoverable = false; + d->arch.cca.build_abort_rmi_result = 0; + d->arch.cca.build_base_gfn = base_gfn; + d->arch.cca.build_nr_pages = nr_pages; + d->arch.cca.build_next_ipa = INVALID_PADDR; + d->arch.cca.build_rtt_level = 0; +} + +static int arm_cca_build_state_check(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages) +{ + if ( d->arch.cca.build_phase == ARM_CCA_BUILD_NONE ) + { + arm_cca_build_state_start(d, base_gfn, nr_pages); + return 0; + } + + if ( !gfn_eq(d->arch.cca.build_base_gfn, base_gfn) || + d->arch.cca.build_nr_pages != nr_pages ) + return -EBUSY; + + return 0; +} + +static int arm_cca_domain_finalize_abort(struct domain *d) +{ + unsigned int i; + bool fatal = d->arch.cca.build_unrecoverable; + int rc; + + rc = arm_cca_domain_relinquish_resources(d); + if ( rc != 0 ) + { + if ( rc == -ERESTART ) + return rc; + + return -EIO; + } + + for ( i = 0; i < d->max_vcpus; ++i ) + { + struct vcpu *v = d->vcpu[i]; + + if ( v == NULL ) + continue; + + arm_cca_vcpu_destroy(v); + arm_cca_vcpu_init(v); + } + + return fatal ? -EIO : 0; +} + +int arm_cca_domain_finalize(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages, + uint64_t *rmi_result) +{ + paddr_t base = gfn_to_gaddr(base_gfn); + struct arm_smccc_res res; + uint64_t abort_rmi_result; + int abort_rc, rc; + + if ( rmi_result ) + *rmi_result = 0; + + rc = arm_cca_build_state_check(d, base_gfn, nr_pages); + if ( rc != 0 ) + return rc; + + for ( ;; ) + { + switch ( d->arch.cca.build_phase ) + { + case ARM_CCA_BUILD_VALIDATE: + rc = arm_cca_validate_domain(d, base_gfn, nr_pages); + if ( rc != 0 ) + { + arm_cca_build_state_clear(d); + return rc; + } + rc = arm_cca_probe(d); + if ( rc != 0 ) + { + arm_cca_build_state_clear(d); + return rc; + } + d->arch.cca.build_phase = ARM_CCA_BUILD_CREATE_REALM; + fallthrough; + + case ARM_CCA_BUILD_CREATE_REALM: + rc = arm_cca_create_realm(d, rmi_result); + if ( rc != 0 ) + goto err; + d->arch.cca.build_phase = ARM_CCA_BUILD_BUILD_RTTS; + fallthrough; + + case ARM_CCA_BUILD_BUILD_RTTS: + rc = arm_cca_build_rtts(d, base, nr_pages, rmi_result); + if ( rc == -ERESTART ) + return rc; + if ( rc != 0 ) + goto err; + d->arch.cca.build_phase = ARM_CCA_BUILD_CREATE_DATA; + fallthrough; + + case ARM_CCA_BUILD_CREATE_DATA: + rc = arm_cca_create_data_pages(d, base_gfn, nr_pages, rmi_result); + if ( rc == -ERESTART ) + return rc; + if ( rc != 0 ) + goto err; + d->arch.cca.build_phase = ARM_CCA_BUILD_CREATE_REC; + fallthrough; + + case ARM_CCA_BUILD_CREATE_REC: + rc = arm_cca_create_recs(d, rmi_result); + if ( rc != 0 ) + goto err; + d->arch.cca.build_phase = ARM_CCA_BUILD_ACTIVATE; + fallthrough; + + case ARM_CCA_BUILD_ACTIVATE: + rc = arm_cca_rmi_realm_activate(d->arch.cca.rd, &res); + rc = arm_cca_build_record_rmi_failure(rmi_result, rc, &res); + if ( rc != 0 ) + goto err; + d->arch.cca.build_phase = ARM_CCA_BUILD_BIND; + fallthrough; + + case ARM_CCA_BUILD_BIND: + d->arch.cca.realm_active = true; + arm_cca_build_state_clear(d); + return 0; + + case ARM_CCA_BUILD_ABORT: + abort_rmi_result = d->arch.cca.build_abort_rmi_result; + rc = arm_cca_domain_finalize_abort(d); + if ( rc == -ERESTART ) + return rc; + /* The original build error is gone after a continuation. */ + if ( rc == 0 ) + rc = -EIO; + if ( rc == -EIO && rmi_result ) + *rmi_result = abort_rmi_result; + return rc; + + default: + rc = -EINVAL; + goto err; + } + } + +err: + d->arch.cca.build_abort_rmi_result = rmi_result ? *rmi_result : 0; + d->arch.cca.build_phase = ARM_CCA_BUILD_ABORT; + + abort_rc = arm_cca_domain_finalize_abort(d); + if ( abort_rc == -ERESTART ) + return abort_rc; + + return abort_rc ?: rc; +} diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index 72dbb83841d7..d85a20a9e7d2 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -32,6 +32,13 @@ static void arm_cca_reset_domain_state(struct domain *d) d->arch.cca.nr_data_pages = 0; d->arch.cca.relinquish_data_idx = 0; d->arch.cca.realm_terminate_done = false; + d->arch.cca.build_phase = ARM_CCA_BUILD_NONE; + d->arch.cca.build_unrecoverable = false; + d->arch.cca.build_abort_rmi_result = 0; + d->arch.cca.build_base_gfn = INVALID_GFN; + d->arch.cca.build_nr_pages = 0; + d->arch.cca.build_next_ipa = INVALID_PADDR; + d->arch.cca.build_rtt_level = 0; for ( i = 0; i < ARRAY_SIZE(d->arch.cca.realm_sro_pages); ++i ) d->arch.cca.realm_sro_pages[i] = NULL; diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index d69e95a10010..5e6b11a3693d 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -2,6 +2,7 @@ #ifndef ARM_CCA_H #define ARM_CCA_H +#include #include #include #include @@ -41,6 +42,18 @@ struct arm_cca_data_page_record { paddr_t pa; }; +enum arm_cca_build_phase { + ARM_CCA_BUILD_NONE, + ARM_CCA_BUILD_VALIDATE, + ARM_CCA_BUILD_CREATE_REALM, + ARM_CCA_BUILD_BUILD_RTTS, + ARM_CCA_BUILD_CREATE_DATA, + ARM_CCA_BUILD_CREATE_REC, + ARM_CCA_BUILD_ACTIVATE, + ARM_CCA_BUILD_BIND, + ARM_CCA_BUILD_ABORT, +}; + struct arm_cca_domain_state { bool realm_active; paddr_t rd; @@ -70,6 +83,15 @@ struct arm_cca_domain_state { /* Realm destruction state for domain_relinquish_resources(). */ unsigned long relinquish_data_idx; bool realm_terminate_done; + + /* Continuable Realm construction state for XEN_DOMCTL_arm_cca_op. */ + enum arm_cca_build_phase build_phase; + bool build_unrecoverable; + uint64_t build_abort_rmi_result; + gfn_t build_base_gfn; + unsigned long build_nr_pages; + paddr_t build_next_ipa; + unsigned int build_rtt_level; }; struct arm_cca_vcpu_state { @@ -85,8 +107,12 @@ struct arm_cca_vcpu_state { void arm_cca_domain_init(struct domain *d); void arm_cca_domain_destroy(struct domain *d); int arm_cca_domain_relinquish_resources(struct domain *d); +int arm_cca_domain_finalize(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages, + uint64_t *rmi_result); void arm_cca_vcpu_init(struct vcpu *v); +void noreturn arm_cca_vcpu_run(struct vcpu *v); void arm_cca_vcpu_destroy(struct vcpu *v); void *arm_cca_alloc_rec_run(void); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:08:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:08:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309359.1580447 (Exim 4.92) (envelope-from ) id 1wNjqz-0004i7-GC; Fri, 15 May 2026 04:08:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309359.1580447; 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RMI failures are reported back as-is. Signed-off-by: Koichiro Den --- tools/flask/policy/modules/xen.if | 1 + tools/include/xenctrl.h | 12 ++++++ tools/libs/ctrl/xc_domain.c | 37 ++++++++++++++++++ xen/arch/arm/domctl.c | 60 +++++++++++++++++++++++++++++ xen/include/public/domctl.h | 12 ++++++ xen/xsm/flask/hooks.c | 3 ++ xen/xsm/flask/policy/access_vectors | 2 + 7 files changed, 127 insertions(+) diff --git a/tools/flask/policy/modules/xen.if b/tools/flask/policy/modules/xen.if index ef7d8f438c65..5eb2d98341e9 100644 --- a/tools/flask/policy/modules/xen.if +++ b/tools/flask/policy/modules/xen.if @@ -98,6 +98,7 @@ define(`create_domain_common', ` vuart_op set_llc_colors get_domain_state + arm_cca_op }; allow $1 $2:security check_context; allow $1 $2:shadow enable; diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index d5dbf69c8968..149e15f7c531 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -808,6 +808,18 @@ int xc_dom_vuart_init(xc_interface *xch, xen_pfn_t gfn, evtchn_port_t *evtchn); +/* + * Finalize a paused ARM domain as a Realm backed by RMM. The toolstack is + * expected to have already built a normal ARM guest image in the domain RAM. + * + * Returns 0 on success, or -1 with errno set. If Xen receives an RMI error + * result from RMM, libxc logs the raw RMI result and reports EPROTO. + */ +int xc_arm_cca_init_realm(xc_interface *xch, + uint32_t domid, + xen_pfn_t base_gfn, + uint64_t nr_pages); + /** * This function returns information about the XSAVE state of a particular * vcpu of a domain. If extstate->size and extstate->xfeature_mask are 0, diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index 01c0669c8863..3cb8da9cc07d 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -345,6 +345,43 @@ int xc_dom_vuart_init(xc_interface *xch, return rc; } +int xc_arm_cca_init_realm(xc_interface *xch, + uint32_t domid, + xen_pfn_t base_gfn, + uint64_t nr_pages) +{ + struct xen_domctl domctl = {}; + int rc; + + memset(&domctl, 0, sizeof(domctl)); + + domctl.cmd = XEN_DOMCTL_arm_cca_op; + domctl.domain = domid; + domctl.u.arm_cca_op.cmd = XEN_DOMCTL_ARM_CCA_OP_INIT_REALM; + domctl.u.arm_cca_op.flags = 0; + domctl.u.arm_cca_op.base_gfn = base_gfn; + domctl.u.arm_cca_op.nr_pages = nr_pages; + + rc = do_domctl(xch, &domctl); + if ( rc < 0 ) + { + if ( domctl.u.arm_cca_op.rmi_result ) + { + xc_report_error(xch, XC_INTERNAL_ERROR, + "xc_arm_cca_init_realm failed with raw RMI " + "result 0x%llx", + (unsigned long long) + domctl.u.arm_cca_op.rmi_result); + errno = EPROTO; + return -1; + } + + return rc; + } + + return rc; +} + int xc_domain_getinfo_single(xc_interface *xch, uint32_t domid, xc_domaininfo_t *info) diff --git a/xen/arch/arm/domctl.c b/xen/arch/arm/domctl.c index ad914c915f81..36461eeda633 100644 --- a/xen/arch/arm/domctl.c +++ b/xen/arch/arm/domctl.c @@ -16,6 +16,7 @@ #include #include #include +#include void arch_get_domain_info(const struct domain *d, struct xen_domctl_getdomaininfo *info) @@ -49,6 +50,42 @@ static int handle_vuart_init(struct domain *d, return rc; } +static int handle_arm_cca_init_realm(struct domain *d, + struct xen_domctl_arm_cca_op *cca_op) +{ +#ifdef CONFIG_ARM_CCA + uint64_t rmi_result = 0; + int rc; +#endif + + if ( cca_op->flags ) + return -EINVAL; + + cca_op->rmi_result = 0; + +#ifdef CONFIG_ARM_CCA + rc = arm_cca_domain_finalize(d, _gfn(cca_op->base_gfn), + cca_op->nr_pages, &rmi_result); + + /* + * Once Realm data conversion starts, the original guest RAM image can no + * longer be trusted after a failed finalization attempt. + */ + if ( rc == -EIO ) + domain_shutdown(d, SHUTDOWN_crash); + + if ( rc == -EIO && rmi_result ) + { + cca_op->rmi_result = rmi_result; + return rc; + } + + return rc; +#else + return -EOPNOTSUPP; +#endif +} + long arch_do_domctl(struct xen_domctl *domctl, struct domain *d, XEN_GUEST_HANDLE_PARAM(xen_domctl_t) u_domctl) { @@ -177,6 +214,29 @@ long arch_do_domctl(struct xen_domctl *domctl, struct domain *d, return rc; } + case XEN_DOMCTL_arm_cca_op: + { + struct xen_domctl_arm_cca_op *cca_op = &domctl->u.arm_cca_op; + + switch ( cca_op->cmd ) + { + case XEN_DOMCTL_ARM_CCA_OP_INIT_REALM: + { + long rc = handle_arm_cca_init_realm(d, cca_op); + + if ( rc == -ERESTART ) + rc = hypercall_create_continuation(__HYPERVISOR_domctl, + "h", u_domctl); + else if ( rc == -EIO && cca_op->rmi_result && + copy_to_guest(u_domctl, domctl, 1) ) + rc = -EFAULT; + + return rc; + } + default: + return -EINVAL; + } + } case XEN_DOMCTL_dt_overlay: return dt_overlay_domctl(d, &domctl->u.dt_overlay); default: diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 8f6708c0a7cd..2562647d93d3 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -1201,6 +1201,16 @@ struct xen_domctl_vuart_op { */ }; +/* XEN_DOMCTL_arm_cca_op */ +struct xen_domctl_arm_cca_op { +#define XEN_DOMCTL_ARM_CCA_OP_INIT_REALM 0 + uint32_t cmd; /* IN - XEN_DOMCTL_ARM_CCA_OP_* */ + uint32_t flags; /* IN - reserved, must be zero */ + uint64_aligned_t base_gfn; /* IN - first guest RAM gfn to protect */ + uint64_aligned_t nr_pages; /* IN - number of 4K pages to protect */ + uint64_aligned_t rmi_result; /* OUT - raw RMI result on -EIO */ +}; + /* XEN_DOMCTL_vmtrace_op: Perform VM tracing operations. */ struct xen_domctl_vmtrace_op { uint32_t cmd; /* IN */ @@ -1368,6 +1378,7 @@ struct xen_domctl { #define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_set_llc_colors 89 #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ +#define XEN_DOMCTL_arm_cca_op 91 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1429,6 +1440,7 @@ struct xen_domctl { struct xen_domctl_monitor_op monitor_op; struct xen_domctl_psr_alloc psr_alloc; struct xen_domctl_vuart_op vuart_op; + struct xen_domctl_arm_cca_op arm_cca_op; struct xen_domctl_vmtrace_op vmtrace_op; struct xen_domctl_paging_mempool paging_mempool; #if defined(__arm__) || defined(__aarch64__) diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd271..f95552992a26 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -805,6 +805,9 @@ static int cf_check flask_domctl(struct domain *d, unsigned int cmd, case XEN_DOMCTL_vuart_op: return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__VUART_OP); + case XEN_DOMCTL_arm_cca_op: + return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__ARM_CCA_OP); + case XEN_DOMCTL_get_cpu_policy: return current_has_perm(d, SECCLASS_DOMAIN2, DOMAIN2__GET_CPU_POLICY); diff --git a/xen/xsm/flask/policy/access_vectors b/xen/xsm/flask/policy/access_vectors index bbb9c117ec4a..dee895bef673 100644 --- a/xen/xsm/flask/policy/access_vectors +++ b/xen/xsm/flask/policy/access_vectors @@ -253,6 +253,8 @@ class domain2 set_llc_colors # XEN_DOMCTL_get_domain_state get_domain_state +# XEN_DOMCTL_arm_cca_op + arm_cca_op } # Similar to class domain, but primarily contains domctls related to HVM domains -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309421.1580465 (Exim 4.92) (envelope-from ) id 1wNjtf-0000FZ-90; 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The domctl range is treated as the protected Realm RAM. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/build.c | 411 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 411 insertions(+) create mode 100644 xen/arch/arm/cca/build.c diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c new file mode 100644 index 000000000000..f333813e10a0 --- /dev/null +++ b/xen/arch/arm/cca/build.c @@ -0,0 +1,411 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "rmi.h" +#include "sro.h" + +/* + * Xen CCA currently accepts only 4KB RMI granules. With 512 entries per RTT, + * the table spans here are 512GB, 1GB, and 2MB respectively. + */ +#define ARM_CCA_L0_TABLE_SPAN GB(512) +#define ARM_CCA_L1_TABLE_SPAN GB(1) +#define ARM_CCA_L2_TABLE_SPAN SZ_2M +#define ARM_CCA_REALM_MAX_PAGES (GUEST_RAM0_SIZE >> PAGE_SHIFT) +#define ARM_CCA_BUILD_PREEMPT_TABLES 64U +#define ARM_CCA_BUILD_FORCE_PREEMPT_TABLES 256U +#define ARM_CCA_BUILD_PREEMPT_PAGES 1024UL +#define ARM_CCA_BUILD_FORCE_PREEMPT_PAGES 4096UL +#define ARM_CCA_REALM_MAX_IPA_BITS_WITHOUT_LPA2 48U + +static struct page_info *arm_cca_alloc_host_page(void) +{ + struct page_info *pg; + void *va; + + pg = alloc_domheap_page(NULL, 0); + if ( !pg ) + return NULL; + + va = map_domain_page(page_to_mfn(pg)); + clear_page(va); + unmap_domain_page(va); + + return pg; +} + +static unsigned int arm_cca_feature_field(unsigned long features, + unsigned int shift, + unsigned int width) +{ + return arm_cca_rmi_field_get(features, shift, width); +} + +static bool arm_cca_feature_is_true(unsigned long features, unsigned int shift) +{ + return arm_cca_feature_field(features, shift, 1U) == + ARM_CCA_RMI_FEATURE_TRUE; +} + +static int arm_cca_build_record_rmi_failure(uint64_t *rmi_result, int rc, + const struct arm_smccc_res *res) +{ + uint64_t result = arm_cca_rmi_result(res); + + if ( rc != 0 && rmi_result && + (arm_cca_rmi_status_is_error(result) || + arm_cca_rmi_result_is_smccc_unknown(result)) ) + *rmi_result = result; + + return rc; +} + +static bool arm_cca_undelegate_build_page(struct domain *d, + struct page_info *pg) +{ + paddr_t pa = page_to_maddr(pg); + int rc = arm_cca_undelegate_granule(pa); + + if ( rc != 0 ) + { + /* No successful undelegation means no RMM wipe guarantee. */ + printk(XENLOG_ERR + "%pd: ARM CCA: failed to undelegate abandoned granule %#" + PRIpaddr "\n", + d, pa); + return false; + } + + return true; +} + +/* + * Return true when the caller can forget pg. A false return means + * undelegation failed, so the caller must keep the page tracked. + */ +static bool arm_cca_free_build_page(struct domain *d, struct page_info *pg, + bool delegated) +{ + if ( !pg ) + return true; + + if ( delegated && !arm_cca_undelegate_build_page(d, pg) ) + return false; + + free_domheap_page(pg); + + return true; +} + +static void arm_cca_free_or_abandon_build_page(struct domain *d, + struct page_info *pg, + bool delegated) +{ + if ( !arm_cca_free_build_page(d, pg, delegated) ) + page_list_add_tail(pg, &d->arch.cca.abandoned_pages); +} + +static bool arm_cca_gfn_range_contains(gfn_t base, gfn_t end, + gfn_t start, gfn_t next) +{ + return gfn_x(base) <= gfn_x(start) && gfn_x(next) <= gfn_x(end); +} + +static bool arm_cca_gfn_range_overlaps(gfn_t base, gfn_t end, + gfn_t start, gfn_t next) +{ + return gfn_x(start) < gfn_x(end) && gfn_x(base) < gfn_x(next); +} + +/* + * Initial Realm support has no separate private/shared memory metadata. + * Treat the domctl range as the whole protected Realm RAM contract: every + * mapped entry in the range must be writable RAM, and no other valid guest + * mapping may remain outside it apart from Arm magic pages, which are not + * exposed through the Realm device tree. + * + * p2m_get_entry() can return block mappings, so reject entries which only + * partly overlap the Realm RAM range. Otherwise one p2m block could make + * memory outside the measured/protected range guest-visible. + */ +static int arm_cca_validate_ram_layout(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages) +{ + struct p2m_domain *p2m = p2m_get_hostp2m(d); + gfn_t end_gfn = gfn_add(base_gfn, nr_pages); + gfn_t magic_base = _gfn(GUEST_MAGIC_BASE >> PAGE_SHIFT); + gfn_t magic_end = _gfn((GUEST_MAGIC_BASE + GUEST_MAGIC_SIZE) >> + PAGE_SHIFT); + gfn_t gfn, end; + int rc = 0; + + p2m_read_lock(p2m); + + gfn = p2m->lowest_mapped_gfn; + end = gfn_add(p2m->max_mapped_gfn, 1); + + while ( gfn_x(gfn) < gfn_x(end) ) + { + unsigned int order; + p2m_type_t t; + bool valid; + mfn_t mfn = p2m_get_entry(p2m, gfn, &t, NULL, &order, &valid); + gfn_t next = gfn_next_boundary(gfn, order); + + if ( arm_cca_gfn_range_overlaps(base_gfn, end_gfn, gfn, next) ) + { + if ( !valid || mfn_eq(mfn, INVALID_MFN) || + t != p2m_ram_rw || + !arm_cca_gfn_range_contains(base_gfn, end_gfn, gfn, next) ) + { + rc = -EINVAL; + break; + } + } + else if ( valid && !mfn_eq(mfn, INVALID_MFN) && + !arm_cca_gfn_range_contains(magic_base, magic_end, gfn, + next) ) + { + rc = -EINVAL; + break; + } + + gfn = next; + } + + p2m_read_unlock(p2m); + + return rc; +} + +static int arm_cca_validate_domain(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages) +{ + unsigned int i; + int rc; + + if ( is_hardware_domain(d) ) + return -EOPNOTSUPP; + + if ( !is_hvm_domain(d) ) + return -EOPNOTSUPP; + + if ( is_32bit_domain(d) ) + return -EOPNOTSUPP; + + if ( d->max_vcpus == 0 || d->vcpu[0] == NULL ) + return -EOPNOTSUPP; + + for ( i = 1; i < d->max_vcpus; ++i ) + if ( d->vcpu[i] == NULL ) + return -EOPNOTSUPP; + + if ( d->arch.vgic.version != GIC_V3 ) + return -EOPNOTSUPP; + + if ( d->creation_finished ) + return -EPERM; + + if ( is_domain_realm(d) ) + return -EEXIST; + + if ( domain_has_vpl011(d) && + !IS_ENABLED(CONFIG_ARM_CCA_REALM_DEBUG_VUART) ) + { + printk(XENLOG_G_ERR + "ARM CCA: Realm VUART debug console is disabled for %pd\n", + d); + return -EOPNOTSUPP; + } + + if ( gfn_x(base_gfn) != (GUEST_RAM_BASE >> PAGE_SHIFT) ) + return -EOPNOTSUPP; + + if ( nr_pages == 0 || nr_pages > ARM_CCA_REALM_MAX_PAGES ) + return -EINVAL; + + /* + * domain_tot_pages() also includes Arm magic pages outside guest RAM, so + * it is only a sanity upper bound for the protected RAM range. + */ + if ( nr_pages > domain_tot_pages(d) ) + return -EINVAL; + + rc = arm_cca_validate_ram_layout(d, base_gfn, nr_pages); + if ( rc != 0 ) + return rc; + + return 0; +} + +static int arm_cca_validate_realm_features0(struct domain *d) +{ + unsigned long features0 = d->arch.cca.rmi_features0; + unsigned int max_ipa_bits; + unsigned int num_bps, num_wps; + + max_ipa_bits = arm_cca_feature_field( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_S2SZ_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_S2SZ_WIDTH); + if ( p2m_ipa_bits > max_ipa_bits ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd requires %u-bit IPA, RMM supports %u-bit IPA\n", + d, p2m_ipa_bits, max_ipa_bits); + return -EOPNOTSUPP; + } + + /* + * Xen CCA currently leaves RmiRealmParams::flags0.lpa2, sve, and pmu + * clear. Reject configurations that would need those Realm features + * instead of silently creating a Realm with different behavior. + */ + if ( p2m_ipa_bits > ARM_CCA_REALM_MAX_IPA_BITS_WITHOUT_LPA2 ) + { + if ( !arm_cca_feature_is_true( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_LPA2_SHIFT) ) + printk(XENLOG_G_ERR + "ARM CCA: %pd requires LPA2 for %u-bit IPA, " + "but RMM does not report LPA2 support\n", + d, p2m_ipa_bits); + else + printk(XENLOG_G_ERR + "ARM CCA: %pd requires LPA2 for %u-bit IPA, " + "but Xen CCA does not enable Realm LPA2 yet\n", + d, p2m_ipa_bits); + return -EOPNOTSUPP; + } + + if ( is_sve_domain(d) ) + { + if ( !arm_cca_feature_is_true( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_SHIFT) ) + printk(XENLOG_G_ERR + "ARM CCA: %pd requests SVE, " + "but RMM does not report SVE support\n", + d); + else + { + unsigned int max_sve_vl = arm_cca_feature_field( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_VL_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_SVE_VL_WIDTH); + + printk(XENLOG_G_ERR + "ARM CCA: %pd requests SVE; RMM supports %u-bit VL, " + "but Xen CCA does not enable Realm SVE yet\n", + d, (max_sve_vl + 1U) * SVE_VL_MULTIPLE_VAL); + } + return -EOPNOTSUPP; + } + + num_bps = arm_cca_feature_field( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH); + if ( num_bps == 0 ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd RMM reports reserved NUM_BPS value 0\n", d); + return -EOPNOTSUPP; + } + + num_wps = arm_cca_feature_field( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH); + if ( num_wps == 0 ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd RMM reports reserved NUM_WPS value 0\n", d); + return -EOPNOTSUPP; + } + + if ( d->options & XEN_DOMCTL_CDF_vpmu ) + { + if ( !arm_cca_feature_is_true( + features0, ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_SHIFT) ) + printk(XENLOG_G_ERR + "ARM CCA: %pd requests PMU, " + "but RMM does not report PMU support\n", + d); + else + { + unsigned int num_ctrs = arm_cca_feature_field( + features0, + ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_PMU_NUM_CTRS_WIDTH); + + printk(XENLOG_G_ERR + "ARM CCA: %pd requests PMU; RMM supports %u counters, " + "but Xen CCA does not enable Realm PMU yet\n", + d, num_ctrs); + } + return -EOPNOTSUPP; + } + + return 0; +} + +static int arm_cca_validate_realm_features1(struct domain *d) +{ + unsigned long features1 = d->arch.cca.rmi_features1; + unsigned int max_recs_order, max_recs; + + if ( !arm_cca_feature_is_true( + features1, + ARM_CCA_RMI_FEATURE_REGISTER_1_RMI_GRAN_SZ_4KB_SHIFT) ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd requires 4KB RMI granules, " + "but RMM does not report 4KB RMI granule support\n", + d); + return -EOPNOTSUPP; + } + + if ( !arm_cca_feature_is_true( + features1, ARM_CCA_RMI_FEATURE_REGISTER_1_HASH_SHA_256_SHIFT) ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd requires SHA-256 Realm measurements, " + "but RMM does not report SHA-256 support\n", + d); + return -EOPNOTSUPP; + } + + max_recs_order = arm_cca_feature_field( + features1, ARM_CCA_RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_1_MAX_RECS_ORDER_WIDTH); + max_recs = (1U << max_recs_order) - 1U; + if ( d->max_vcpus > max_recs ) + { + printk(XENLOG_G_ERR + "ARM CCA: %pd requires %u RECs, RMM supports %u RECs\n", + d, d->max_vcpus, max_recs); + return -EOPNOTSUPP; + } + + return 0; +} + +static int arm_cca_validate_realm_features(struct domain *d) +{ + int rc; + + rc = arm_cca_validate_realm_features0(d); + if ( rc != 0 ) + return rc; + + return arm_cca_validate_realm_features1(d); +} -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309420.1580457 (Exim 4.92) (envelope-from ) id 1wNjte-0008TQ-2q; Fri, 15 May 2026 04:11:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309420.1580457; Fri, 15 May 2026 04:11:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjtd-0008TJ-VI; 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Later patches plug the RMI teardown work into this path. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/state.c | 24 ++++++++++++++++++++++++ xen/arch/arm/domain.c | 8 ++++++++ xen/arch/arm/include/asm/cca.h | 5 +++++ 3 files changed, 37 insertions(+) diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index 66375965a1b4..3646948eb11c 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -19,6 +19,7 @@ static void arm_cca_reset_domain_state(struct domain *d) d->arch.cca.rd_page = NULL; d->arch.cca.rtt_root_page = NULL; d->arch.cca.nr_realm_sro_pages = 0; + INIT_PAGE_LIST_HEAD(&d->arch.cca.abandoned_pages); d->arch.cca.rtts = NULL; d->arch.cca.nr_rtts = 0; d->arch.cca.data_pages = NULL; @@ -52,6 +53,29 @@ void arm_cca_domain_destroy(struct domain *d) arm_cca_reset_domain_state(d); } +static int arm_cca_relinquish_abandoned_pages(struct domain *d) +{ + struct page_info *pg, *tmp; + int rc; + + page_list_for_each_safe( pg, tmp, &d->arch.cca.abandoned_pages ) + { + rc = arm_cca_undelegate_granule(page_to_maddr(pg)); + if ( rc != 0 ) + return rc; + + page_list_del(pg, &d->arch.cca.abandoned_pages); + free_domheap_page(pg); + } + + return 0; +} + +int arm_cca_domain_relinquish_resources(struct domain *d) +{ + return arm_cca_relinquish_abandoned_pages(d); +} + void arm_cca_vcpu_init(struct vcpu *v) { arm_cca_reset_vcpu_state(v); diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 4b6115491c59..2d9469f388c6 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -1038,6 +1038,7 @@ enum { PROG_sci, PROG_tee, PROG_xen, + PROG_cca, PROG_page, PROG_mapping, PROG_p2m_root, @@ -1098,6 +1099,13 @@ int domain_relinquish_resources(struct domain *d) if ( ret ) return ret; + PROGRESS(cca): +#ifdef CONFIG_ARM_CCA + ret = arm_cca_domain_relinquish_resources(d); + if ( ret ) + return ret; +#endif + PROGRESS(page): ret = relinquish_memory(d, &d->page_list); if ( ret ) diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index 80c161078d6c..9b53c80b5bba 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -3,6 +3,7 @@ #define ARM_CCA_H #include +#include #include /* @@ -57,6 +58,9 @@ struct arm_cca_domain_state { struct page_info *realm_sro_pages[ARM_CCA_MAX_SRO_DONATION_PAGES]; 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Realm exits carry GPR state in RecRun, not in guest_cpu_user_regs(). Signed-off-by: Koichiro Den --- xen/arch/arm/include/asm/mmio.h | 11 ++++ xen/arch/arm/io.c | 99 +++++++++++++++++++++++++-------- 2 files changed, 88 insertions(+), 22 deletions(-) diff --git a/xen/arch/arm/include/asm/mmio.h b/xen/arch/arm/include/asm/mmio.h index b22cfdac5be9..b8a640dc6ee7 100644 --- a/xen/arch/arm/include/asm/mmio.h +++ b/xen/arch/arm/include/asm/mmio.h @@ -62,6 +62,14 @@ typedef int (*mmio_read_t)(struct vcpu *v, mmio_info_t *info, typedef int (*mmio_write_t)(struct vcpu *v, mmio_info_t *info, register_t r, void *priv); +typedef register_t (*mmio_reg_read_t)(void *ctxt, int reg); +typedef void (*mmio_reg_write_t)(void *ctxt, int reg, register_t value); + +struct mmio_regops { + mmio_reg_read_t read; + mmio_reg_write_t write; +}; + struct mmio_handler_ops { mmio_read_t read; mmio_write_t write; @@ -83,6 +91,9 @@ struct vmmio { enum io_state try_handle_mmio(struct cpu_user_regs *regs, mmio_info_t *info); +enum io_state try_handle_mmio_regops(struct vcpu *v, mmio_info_t *info, + const struct mmio_regops *regops, + void *ctxt); void register_mmio_handler(struct domain *d, const struct mmio_handler_ops *ops, paddr_t addr, paddr_t size, void *priv); diff --git a/xen/arch/arm/io.c b/xen/arch/arm/io.c index 9707cadcf80e..9ce9fe1c1528 100644 --- a/xen/arch/arm/io.c +++ b/xen/arch/arm/io.c @@ -47,12 +47,36 @@ static const struct mmio_handler unmapped_handler = { .ops = &unmapped_ops }; +struct mmio_guest_regs { + struct cpu_user_regs *regs; +}; + +static register_t mmio_guest_read_reg(void *ctxt, int reg) +{ + struct mmio_guest_regs *guest = ctxt; + + return get_user_reg(guest->regs, reg); +} + +static void mmio_guest_write_reg(void *ctxt, int reg, register_t value) +{ + struct mmio_guest_regs *guest = ctxt; + + set_user_reg(guest->regs, reg, value); +} + +static const struct mmio_regops mmio_guest_regops = { + .read = mmio_guest_read_reg, + .write = mmio_guest_write_reg, +}; + static enum io_state handle_read(const struct mmio_handler *handler, struct vcpu *v, - mmio_info_t *info) + mmio_info_t *info, + const struct mmio_regops *regops, + void *ctxt) { const struct hsr_dabt dabt = info->dabt; - struct cpu_user_regs *regs = guest_cpu_user_regs(); /* * Initialize to zero to avoid leaking data if there is an * implementation error in the emulation (such as not correctly @@ -66,22 +90,24 @@ static enum io_state handle_read(const struct mmio_handler *handler, ASSERT((r & ~GENMASK((1U << info->dabt.size) * 8 - 1, 0)) == 0); r = sign_extend(dabt, r); - - set_user_reg(regs, dabt.reg, r); + regops->write(ctxt, dabt.reg, r); return IO_HANDLED; } static enum io_state handle_write(const struct mmio_handler *handler, struct vcpu *v, - mmio_info_t *info) + mmio_info_t *info, + const struct mmio_regops *regops, + void *ctxt) { const struct hsr_dabt dabt = info->dabt; - struct cpu_user_regs *regs = guest_cpu_user_regs(); + register_t value; int ret; - ret = handler->ops->write(v, info, get_user_reg(regs, dabt.reg), - handler->priv); + value = regops->read(ctxt, dabt.reg); + ret = handler->ops->write(v, info, value, handler->priv); + return ret ? IO_HANDLED : IO_ABORT; } @@ -183,10 +209,13 @@ void try_decode_instruction(const struct cpu_user_regs *regs, } } -enum io_state try_handle_mmio(struct cpu_user_regs *regs, - mmio_info_t *info) +static enum io_state __try_handle_mmio(struct vcpu *v, + struct cpu_user_regs *regs, + mmio_info_t *info, + const struct mmio_regops *regops, + void *ctxt, + bool allow_ioreq) { - struct vcpu *v = current; const struct mmio_handler *handler = NULL; int rc; @@ -202,17 +231,22 @@ enum io_state try_handle_mmio(struct cpu_user_regs *regs, if ( !handler ) { bool trap_unmapped = v->domain->options & - XEN_DOMCTL_CDF_trap_unmapped_accesses; - rc = try_fwd_ioserv(regs, v, info); - if ( rc == IO_HANDLED ) - return handle_ioserv(regs, v); - else if ( rc == IO_UNHANDLED && !trap_unmapped ) + XEN_DOMCTL_CDF_trap_unmapped_accesses; + + if ( allow_ioreq ) { - /* Fallback to the unmapped handler. */ - handler = &unmapped_handler; - } else { - return rc; + rc = try_fwd_ioserv(regs, v, info); + if ( rc == IO_HANDLED ) + return handle_ioserv(regs, v); + else if ( rc != IO_UNHANDLED ) + return rc; } + + if ( trap_unmapped ) + return IO_UNHANDLED; + + /* Fallback to the unmapped handler. */ + handler = &unmapped_handler; } /* @@ -228,9 +262,30 @@ enum io_state try_handle_mmio(struct cpu_user_regs *regs, * instruction on the emulated MMIO region. */ if ( info->dabt.write ) - return handle_write(handler, v, info); + return handle_write(handler, v, info, regops, ctxt); else - return handle_read(handler, v, info); + return handle_read(handler, v, info, regops, ctxt); +} + +enum io_state try_handle_mmio(struct cpu_user_regs *regs, + mmio_info_t *info) +{ + struct mmio_guest_regs guest = { .regs = regs }; + + return __try_handle_mmio(current, regs, info, &mmio_guest_regops, + &guest, true); +} + +enum io_state try_handle_mmio_regops(struct vcpu *v, mmio_info_t *info, + const struct mmio_regops *regops, + void *ctxt) +{ + ASSERT(v != NULL); + ASSERT(regops != NULL); + ASSERT(regops->read != NULL); + ASSERT(regops->write != NULL); + + return __try_handle_mmio(v, NULL, info, regops, ctxt, false); } void register_mmio_handler(struct domain *d, -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309425.1580478 (Exim 4.92) (envelope-from ) id 1wNjtq-0000gK-1U; Fri, 15 May 2026 04:11:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309425.1580478; Fri, 15 May 2026 04:11:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjtp-0000ev-PH; Fri, 15 May 2026 04:11:45 +0000 Received: by outflank-mailman (input) for mailman id 1309425; Fri, 15 May 2026 04:11:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjto-0000bb-HW for xen-devel@lists.xenproject.org; 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Signed-off-by: Koichiro Den --- xen/arch/arm/include/asm/vgic.h | 10 ++++++++++ xen/arch/arm/vgic-v3.c | 4 +++- 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/vgic.h b/xen/arch/arm/include/asm/vgic.h index 6f9ab1c98c1c..93f5e3ba40fc 100644 --- a/xen/arch/arm/include/asm/vgic.h +++ b/xen/arch/arm/include/asm/vgic.h @@ -336,6 +336,9 @@ extern void vgic_set_irqs_pending(struct vcpu *v, uint32_t r, extern void register_vgic_ops(struct domain *d, const struct vgic_ops *ops); int vgic_v2_init(struct domain *d, unsigned int *mmio_count); int vgic_v3_init(struct domain *d, unsigned int *mmio_count); +#ifdef CONFIG_GICV3 +bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir); +#endif extern bool vgic_to_sgi(struct vcpu *v, register_t sgir, enum gic_sgi_mode irqmode, int virq, @@ -346,6 +349,13 @@ extern void vgic_check_inflight_irqs_pending(struct vcpu *v, #endif /* !CONFIG_NEW_VGIC */ +#if defined(CONFIG_NEW_VGIC) || !defined(CONFIG_GICV3) +static inline bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir) +{ + return false; +} +#endif + /*** Common VGIC functions used by Xen arch code ****/ /* diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77517c303061..9cb1495bba97 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1600,13 +1600,15 @@ write_reserved: return 1; } -static bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir) +bool vgic_v3_to_sgi(struct vcpu *v, uint64_t sgir) { int virq; int irqmode; enum gic_sgi_mode sgi_mode; struct sgi_target target; + ASSERT(v == current); + sgi_target_init(&target); irqmode = (sgir >> ICH_SGI_IRQMODE_SHIFT) & ICH_SGI_IRQMODE_MASK; virq = (sgir >> ICH_SGI_IRQ_SHIFT ) & ICH_SGI_IRQ_MASK; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309427.1580492 (Exim 4.92) (envelope-from ) id 1wNjtr-000137-8w; Fri, 15 May 2026 04:11:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309427.1580492; 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Handle host events, vGIC/timer sync, WFI/WFE, MMIO and PSCI exits. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/rec.c | 672 +++++++++++++++++++++++++++ xen/arch/arm/domain.c | 4 + xen/arch/arm/include/asm/arm64/hsr.h | 1 + xen/arch/arm/include/asm/hsr.h | 4 + 4 files changed, 681 insertions(+) diff --git a/xen/arch/arm/cca/rec.c b/xen/arch/arm/cca/rec.c index 8314a7a45d95..efff7fa48745 100644 --- a/xen/arch/arm/cca/rec.c +++ b/xen/arch/arm/cca/rec.c @@ -1,14 +1,56 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Dedicated Realm REC execution path for Xen/Arm. + * + * Key points: + * - The Realm executes under RMM. When it accesses emulated devices, the RMM + * causes a REC exit and provides ESR/FAR/HPFAR plus exit metadata in the REC + * exit buffer. With RMI v2.0, vGIC LR state is exchanged through the real + * ICH registers rather than REC run-buffer fields (unlike RMI v1.x). + * - Xen bridges such exits into the existing Arm MMIO emulation backend + * (try_handle_mmio_regops), which already services vGIC and other emulated + * devices for non-Realm guests. The emulation reads the guest GPRs and may + * return a value to the guest. We propagate that value back to the RMM on + * the next REC enter using the RMI REC_ENTER flags/gpr0 contract. + * - Around REC enter/exit, Xen synchronizes the vGIC directly with the ICH + * registers and feeds the REC exit timer snapshot into Realm-specific + * timer state. + */ +#include +#include #include #include +#include #include #include #include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include #include #include +#include + +#include "rmi.h" + +struct arm_cca_mmio_ctxt { + const struct arm_cca_rmi_rec_exit *exit; + register_t result; +}; + struct arm_cca_timer { struct vcpu *v; unsigned int irq; @@ -23,6 +65,13 @@ struct arm_cca_vcpu_timers { struct timer wfx; }; +/* + * Keep Realm guests on the GICv3 sysreg CPU interface. This vGIC path has no + * IRQ/FIQ bypass, so ICC_SRE_EL1 is exposed as a fixed SRE|DFB|DIB value. + */ +#define ARM_CCA_ICC_SRE_EL1_VALUE \ + (GICC_SRE_EL2_SRE | GICC_SRE_EL2_DFB | GICC_SRE_EL2_DIB) + static void arm_cca_timer_update_irq(struct arm_cca_timer *timer) { register_t ctl = timer->ctl; @@ -88,3 +137,626 @@ void arm_cca_vcpu_timer_destroy(struct vcpu *v) kill_timer(&timers->wfx); XFREE(v->arch.cca.timers); } + +static void arm_cca_timer_program(struct arm_cca_timer *timer) +{ + s_time_t expires; + + migrate_timer(&timer->timer, timer->v->processor); + + if ( timer->ctl & CNTx_CTL_ENABLE ) + { + expires = (timer->cval > boot_count) + ? ticks_to_ns(timer->cval - boot_count) + : 0; + set_timer(&timer->timer, expires); + } + else + stop_timer(&timer->timer); +} + +static void arm_cca_timer_sync(struct arm_cca_timer *timer, + register_t ctl, uint64_t cval) +{ + timer->ctl = ctl; + timer->cval = cval; + + arm_cca_timer_program(timer); + arm_cca_timer_update_irq(timer); +} + +static register_t arm_cca_mmio_read_reg(void *ctxt, int reg) +{ + struct arm_cca_mmio_ctxt *mmio = ctxt; + + /* + * This callback is used only when Xen's MMIO core emulates a write and + * asks for the store data. For a Realm emulatable Data Abort, the RMM ABI + * does not provide a full guest GPR file indexed by ESR_EL2.ISS.SRT. + * Instead, the write data is provided in run.exit.gprs[0]. + * + * For an emulated read, arm_cca_mmio_write_reg() below captures the value + * produced by the device model and arm_cca_set_mmio_result() returns it to + * the RMM in run.enter.gprs[0]. The RMM then writes it back to the + * faulting guest register selected by ESR_EL2.ISS.SRT. + */ + return mmio->exit->gprs[0]; +} + +static void arm_cca_mmio_write_reg(void *ctxt, int reg, register_t value) +{ + struct arm_cca_mmio_ctxt *mmio = ctxt; + + mmio->result = value; +} + +static const struct mmio_regops arm_cca_mmio_regops = { + .read = arm_cca_mmio_read_reg, + .write = arm_cca_mmio_write_reg, +}; + +static void check_for_pcpu_work(void) +{ + ASSERT(!local_irq_is_enabled()); + + while ( softirq_pending(smp_processor_id()) ) + { + local_irq_enable(); + do_softirq(); + local_irq_disable(); + } +} + +static void arm_cca_service_host_events(void) +{ + ASSERT(!local_irq_is_enabled()); + + local_irq_enable(); + local_irq_disable(); + check_for_pcpu_work(); +} + +static void arm_cca_check_for_vcpu_work(struct vcpu *v) +{ + if ( likely(!v->arch.need_flush_to_ram) ) + return; + + check_for_pcpu_work(); + + local_irq_enable(); + p2m_flush_vm(v); + local_irq_disable(); +} + +static void noreturn arm_cca_wait_forever(struct vcpu *v) +{ + for ( ; ; ) + { + /* Scheduler helpers expect local IRQs enabled when taking locks */ + local_irq_enable(); + vcpu_block(); + local_irq_disable(); + arm_cca_service_host_events(); + } +} + +static void arm_cca_wait_until_online(struct vcpu *v) +{ + while ( test_bit(_VPF_down, &v->pause_flags) ) + { + /* Scheduler helpers expect local IRQs enabled when taking locks */ + local_irq_enable(); + vcpu_block(); + local_irq_disable(); + arm_cca_service_host_events(); + } +} + +static bool arm_cca_wfxt_expired(register_t timeout) +{ + return (int64_t)(get_cycles() - timeout) >= 0; +} + +static void arm_cca_wait_until_wfxt_timeout(struct vcpu *v, + register_t timeout) +{ + s_time_t expires; + + ASSERT(!local_irq_is_enabled()); + + if ( arm_cca_wfxt_expired(timeout) ) + return; + + expires = (timeout > boot_count) ? ticks_to_ns(timeout - boot_count) : 0; + + set_bit(_VPF_blocked, &v->pause_flags); + smp_mb__after_atomic(); + + arch_vcpu_block(v); + + if ( local_events_need_delivery_nomask() || arm_cca_wfxt_expired(timeout) ) + { + clear_bit(_VPF_blocked, &v->pause_flags); + return; + } + + migrate_timer(&v->arch.cca.timers->wfx, v->processor); + set_timer(&v->arch.cca.timers->wfx, expires); + + raise_softirq(SCHEDULE_SOFTIRQ); + + /* Let the scheduler softirq run while the WFxT timer can unblock us. */ + local_irq_enable(); + local_irq_disable(); + + stop_timer(&v->arch.cca.timers->wfx); + arm_cca_service_host_events(); +} + +static void noreturn arm_cca_domain_crash(struct vcpu *v) +{ + domain_crash(v->domain); + arm_cca_wait_forever(v); +} + +/* DEN0137 2.0-bet1 - D1.6.1 Interrupt flow. */ +static void arm_cca_prepare_rec_enter(struct arm_cca_rmi_rec_run *run, + unsigned long entry_flags, + const register_t *entry_gprs) +{ + register_t hcr; + + memset(&run->enter, 0, sizeof(run->enter)); + run->enter.flags = entry_flags; + memcpy(run->enter.gprs, entry_gprs, sizeof(run->enter.gprs)); + + /* + * RMI v2.0 removes the run-buffer GIC fields. The RMM validates and + * consumes the real ICH_LR_EL2 state left by the Host, so flush Xen's + * vGIC model directly into hardware before REC_ENTER. + */ + vgic_sync_to_lrs(); + + /* + * DEN0137 A6.1 requires ICH_HCR_EL2.En to be clear on REC exit. Re-enable + * the virtual CPU interface for the next Realm entry while preserving the + * rest of the GIC CPU interface state carried in ICH_HCR_EL2. + */ + hcr = READ_SYSREG(ICH_HCR_EL2); + WRITE_SYSREG(hcr | GICH_HCR_EN, ICH_HCR_EL2); + isb(); +} + +/* DEN0137 2.0-bet1 - D1.6.1 Interrupt flow. */ +static void arm_cca_sync_vgic_exit(struct vcpu *v) +{ + /* + * In RMI v2.0 the RMM leaves the GIC owner Plane state in the hardware + * ICH registers on REC exit. Consume it directly through Xen's generic + * vGIC LR sync path. + */ + isb(); + vgic_sync_from_lrs(v); +} + +/* + * DEN0137 2.0-bet1 - D1.6.2 Timer interrupt delivery flow. + * Keep the REC exit timer snapshot in Realm-specific state. The normal + * v->arch.{phys,virt}_timer state is tied to non-Realm EL1 context switch + * save/restore and must not be overwritten with RMM-owned timer state. + */ +static void arm_cca_sync_rec_exit(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit) +{ + arm_cca_sync_vgic_exit(v); + arm_cca_timer_sync(&v->arch.cca.timers->phys, + exit->cntp_ctl, exit->cntp_cval); + arm_cca_timer_sync(&v->arch.cca.timers->virt, + exit->cntv_ctl, exit->cntv_cval); +} + +static paddr_t arm_cca_mmio_lookup_gpa(paddr_t ipa) +{ + /* + * Realm creation currently sets RmiRealmParams::s2sz to p2m_ipa_bits. + * Use the Realm's own s2sz here if that becomes per-domain later. + */ + unsigned int ipa_bits = p2m_ipa_bits; + paddr_t mask; + paddr_t prot_bit; + + if ( ipa_bits == 0 || ipa_bits > sizeof(paddr_t) * 8 ) + return ipa; + + mask = GENMASK_ULL(ipa_bits - 1, 0); + + ipa &= mask; + + /* + * DEN0137 2.0-bet1 - A5.2.1 Realm IPA space and D2.1 Realm shared + * memory protocol description. + * + * RMM reports the IPA which caused the REC exit. In Realm IPA + * space, bit[s2sz - 1] is the protection attribute; if it is set, + * the access is to the Unprotected alias. Xen's MMIO handlers are + * registered against the ordinary guest physical address, so use the + * lower alias as the lookup key rather than retrying after failure. + */ + prot_bit = (paddr_t)1 << (ipa_bits - 1); + if ( ipa & prot_bit ) + { + ipa &= ~prot_bit; + } + + return ipa; +} + +static void arm_cca_set_mmio_result(unsigned long *entry_flags, + register_t *entry_gprs, + register_t value) +{ + *entry_flags |= ARM_CCA_RMI_REC_ENTER_FLAG_EMUL_MMIO; + entry_gprs[0] = value; +} + +static void arm_cca_request_sea(unsigned long *entry_flags, + register_t *entry_gprs) +{ + *entry_flags |= ARM_CCA_RMI_REC_ENTER_FLAG_INJECT_SEA; + entry_gprs[0] = 0; +} + +static bool +arm_cca_rec_enter_failed_after_shutdown(const struct vcpu *v, + const struct arm_smccc_res *res) +{ + return v->domain->is_shutting_down && + arm_cca_rmi_status_is(arm_cca_rmi_result(res), + ARM_CCA_RMI_ERROR_REALM); +} + +/* DEN0137 2.0-bet1 - D1.3.4 MMIO emulation flow. */ +static void arm_cca_handle_mmio(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit, + unsigned long *entry_flags, + register_t *entry_gprs) +{ + union hsr hsr = { .bits = exit->esr }; + paddr_t raw_gpa = ((paddr_t)(exit->hpfar & HPFAR_MASK) << (12 - 4)) | + (exit->far & ~PAGE_MASK); + mmio_info_t info = { + .dabt = hsr.dabt, + .gpa = raw_gpa, + }; + struct arm_cca_mmio_ctxt ctxt = { + .exit = exit, + .result = 0, + }; + enum io_state state; + + if ( !hsr.dabt.valid ) + { + gprintk(XENLOG_INFO, + "ARM CCA: MMIO abort without valid syndrome esr=%#lx far=%#llx hpfar=%#llx\n", + exit->esr, + (unsigned long long)exit->far, + (unsigned long long)exit->hpfar); + arm_cca_request_sea(entry_flags, entry_gprs); + return; + } + + info.dabt_instr.state = INSTR_VALID; + info.gpa = arm_cca_mmio_lookup_gpa(raw_gpa); + + state = try_handle_mmio_regops(v, &info, &arm_cca_mmio_regops, &ctxt); + + if ( state == IO_HANDLED ) + { + arm_cca_set_mmio_result(entry_flags, entry_gprs, ctxt.result); + } + else + { + gprintk(XENLOG_INFO, + "ARM CCA: MMIO emulation failed state=%d raw_gpa=%#llx gpa=%#llx esr=%#lx\n", + state, + (unsigned long long)raw_gpa, + (unsigned long long)info.gpa, + exit->esr); + arm_cca_request_sea(entry_flags, entry_gprs); + } +} + +/* + * DEN0137 2.0-bet1 - D1.4.1 PSCI_CPU_ON flow. + * Xen reuses the same completion hook for related PSCI exits. + */ +static void +arm_cca_handle_psci_complete(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit) +{ + unsigned int target = vaffinity_to_vcpuid(exit->gprs[1]); + struct vcpu *target_vcpu; + struct arm_smccc_res res; + bool wake = false; + int rc; + + if ( target >= v->domain->max_vcpus ) + { + gprintk(XENLOG_ERR, "ARM CCA: invalid PSCI target vCPU %u\n", + target); + arm_cca_domain_crash(v); + } + + target_vcpu = v->domain->vcpu[target]; + if ( target_vcpu == NULL || target_vcpu->arch.cca.rec == INVALID_PADDR ) + { + gprintk(XENLOG_ERR, + "ARM CCA: missing target REC for PSCI target vCPU %u\n", + target); + arm_cca_domain_crash(v); + } + + rc = arm_cca_rmi_psci_complete(v->arch.cca.rec, target_vcpu->arch.cca.rec, + PSCI_SUCCESS, &res); + if ( rc != 0 ) + { + gprintk(XENLOG_ERR, + "ARM CCA: RMI_PSCI_COMPLETE failed status=%#x data=%#lx\n", + arm_cca_rmi_status_code(arm_cca_rmi_result(&res)), + (unsigned long)arm_cca_rmi_result_data( + arm_cca_rmi_result(&res))); + arm_cca_domain_crash(v); + } + + if ( exit->gprs[0] == PSCI_0_2_FN32_CPU_ON || + exit->gprs[0] == PSCI_0_2_FN64_CPU_ON ) + { + wake = test_and_clear_bit(_VPF_down, &target_vcpu->pause_flags); + if ( wake ) + vcpu_wake(target_vcpu); + } +} + +static void arm_cca_handle_psci_exit(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit) +{ + switch ( exit->gprs[0] ) + { + case PSCI_0_2_FN32_CPU_SUSPEND: + case PSCI_0_2_FN64_CPU_SUSPEND: + /* Scheduler helpers expect local IRQs enabled when taking locks */ + local_irq_enable(); + vcpu_block_unless_event_pending(v); + local_irq_disable(); + arm_cca_service_host_events(); + break; + + case PSCI_0_2_FN32_CPU_OFF: + if ( !test_and_set_bit(_VPF_down, &v->pause_flags) ) + vcpu_sleep_nosync(v); + arm_cca_wait_until_online(v); + break; + + case PSCI_0_2_FN32_CPU_ON: + case PSCI_0_2_FN64_CPU_ON: + case PSCI_0_2_FN32_AFFINITY_INFO: + case PSCI_0_2_FN64_AFFINITY_INFO: + arm_cca_handle_psci_complete(v, exit); + break; + + case PSCI_0_2_FN32_SYSTEM_OFF: + domain_shutdown(v->domain, SHUTDOWN_poweroff); + arm_cca_wait_forever(v); + + case PSCI_0_2_FN32_SYSTEM_RESET: + domain_shutdown(v->domain, SHUTDOWN_reboot); + arm_cca_wait_forever(v); + + default: + gprintk(XENLOG_ERR, + "ARM CCA: unsupported PSCI exit fid=%#lx\n", + exit->gprs[0]); + arm_cca_domain_crash(v); + } +} + + +/* + * DEN0137 2.0-bet1 - D1.3.3 REC exit due to Data Abort fault flow. + */ +static void arm_cca_handle_sync_exit(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit, + unsigned long *entry_flags, + register_t *entry_gprs) +{ + union hsr hsr = { .bits = exit->esr }; + + switch ( hsr.ec ) + { + case HSR_EC_WFI_WFE: + /* + * DEN0137 2.0-bet1 - A4.3.4.1 REC exit due to WFI or WFE. + * WFET/WFIT exits provide the timeout value in rec_exit.gprs[0]. + * Treat a non-zero timeout as authoritative because the same section + * only guarantees ESR.ISS.TI for this exit class. + */ + if ( (hsr.bits & HSR_WFI_WFE_WFXT) || exit->gprs[0] ) + { + arm_cca_wait_until_wfxt_timeout(v, exit->gprs[0]); + break; + } + + /* Scheduler helpers expect local IRQs enabled when taking locks */ + local_irq_enable(); + if ( hsr.bits & HSR_WFI_WFE_WFE ) + vcpu_yield(); + else + vcpu_block_unless_event_pending(v); + + local_irq_disable(); + arm_cca_service_host_events(); + break; + + case HSR_EC_DATA_ABORT_LOWER_EL: + /* vGIC MMIO paths expect local IRQs enabled for spin_lock_irq */ + local_irq_enable(); + arm_cca_handle_mmio(v, exit, entry_flags, entry_gprs); + local_irq_disable(); + break; + + default: + gprintk(XENLOG_ERR, + "ARM CCA: unsupported REC sync exit ec=%#x esr=%#lx\n", + hsr.ec, exit->esr); + arm_cca_domain_crash(v); + } +} + +/* DEN0137 2.0-bet1 - D1.3.1 Realm entry and exit flow. */ +void noreturn arm_cca_vcpu_run(struct vcpu *v) +{ + struct arm_cca_rmi_rec_run *run; + struct arm_smccc_res res; + unsigned long entry_flags; + register_t entry_gprs[ARM_CCA_RMI_REC_NR_GPRS]; + int rc; + + ASSERT(v == current); + ASSERT(!is_idle_vcpu(v)); + + if ( !is_vcpu_realm(v) ) + { + gprintk(XENLOG_ERR, + "ARM CCA: entered Realm run loop for non-Realm vCPU\n"); + arm_cca_domain_crash(v); + } + + if ( v->domain->arch.vgic.version != GIC_V3 ) + { + gprintk(XENLOG_ERR, + "ARM CCA: only GICv3 Realms are supported\n"); + arm_cca_domain_crash(v); + } + + if ( v->arch.cca.run == NULL || v->arch.cca.timers == NULL || + v->arch.cca.run_pa == INVALID_PADDR ) + { + gprintk(XENLOG_ERR, + "ARM CCA: REC runtime state is not bound\n"); + arm_cca_domain_crash(v); + } + + if ( v->arch.cca.rec == INVALID_PADDR ) + { + gprintk(XENLOG_ERR, "ARM CCA: REC is not bound\n"); + arm_cca_domain_crash(v); + } + + run = v->arch.cca.run; + entry_flags = ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFI | + ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFE; + memset(entry_gprs, 0, sizeof(entry_gprs)); + + local_irq_disable(); + for ( ; ; ) + { + arm_cca_check_for_vcpu_work(v); + arm_cca_service_host_events(); + + arm_cca_prepare_rec_enter(run, entry_flags, entry_gprs); + entry_flags = ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFI | + ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFE; + memset(entry_gprs, 0, sizeof(entry_gprs)); + rc = arm_cca_rmi_rec_enter(v->arch.cca.rec, v->arch.cca.run_pa, &res); + if ( rc != 0 ) + { + if ( arm_cca_rec_enter_failed_after_shutdown(v, &res) ) + { + gprintk(XENLOG_INFO, + "ARM CCA: Realm domain is shutting down; " + "stopping vCPU\n"); + arm_cca_wait_forever(v); + } + + gprintk(XENLOG_ERR, + "ARM CCA: RMI_REC_ENTER failed status=%#x data=%#lx\n", + arm_cca_rmi_status_code(arm_cca_rmi_result(&res)), + (unsigned long)arm_cca_rmi_result_data( + arm_cca_rmi_result(&res))); + arm_cca_domain_crash(v); + } + + arm_cca_sync_rec_exit(v, &run->exit); + + switch ( run->exit.exit_reason ) + { + case ARM_CCA_RMI_EXIT_IRQ: + case ARM_CCA_RMI_EXIT_FIQ: + arm_cca_service_host_events(); + break; + + case ARM_CCA_RMI_EXIT_PSCI: + arm_cca_handle_psci_exit(v, &run->exit); + break; + + case ARM_CCA_RMI_EXIT_RIPAS_CHANGE: + gprintk(XENLOG_ERR, + "ARM CCA: RIPAS change exits are unsupported\n"); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_SYNC: + arm_cca_handle_sync_exit(v, &run->exit, &entry_flags, + entry_gprs); + break; + + case ARM_CCA_RMI_EXIT_HOST_CALL: + gprintk(XENLOG_ERR, + "ARM CCA: Host call exits are unsupported (imm=%#x)\n", + (unsigned int)run->exit.imm); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_SERROR: + gprintk(XENLOG_ERR, + "ARM CCA: SError exit from Realm REC\n"); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_S2AP_CHANGE: + gprintk(XENLOG_ERR, + "ARM CCA: S2AP change exits are unsupported " + "range=%#lx-%#lx\n", + (unsigned long)run->exit.s2ap_base, + (unsigned long)run->exit.s2ap_top); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_VDEV_REQUEST: + gprintk(XENLOG_ERR, + "ARM CCA: VDEV request exits are unsupported " + "id=%#lx:%#lx\n", + (unsigned long)run->exit.vdev_id_1, + (unsigned long)run->exit.vdev_id_2); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_VDEV_VALIDATE_MAPPING: + gprintk(XENLOG_ERR, + "ARM CCA: VDEV mapping validation exits are unsupported " + "range=%#lx-%#lx pa=%#lx\n", + (unsigned long)run->exit.dev_mem_base, + (unsigned long)run->exit.dev_mem_top, + (unsigned long)run->exit.dev_mem_pa); + arm_cca_domain_crash(v); + + case ARM_CCA_RMI_EXIT_VSMMU_COMMAND: + gprintk(XENLOG_ERR, + "ARM CCA: VSMMU command exits are unsupported " + "vsmmu=%#lx\n", + (unsigned long)run->exit.vsmmu); + arm_cca_domain_crash(v); + + default: + gprintk(XENLOG_ERR, + "ARM CCA: unknown REC exit reason %#x\n", + (unsigned int)run->exit.exit_reason); + arm_cca_domain_crash(v); + } + } +} diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index d2ee90248a44..c8330e7c969c 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -302,6 +302,10 @@ static void noreturn continue_new_vcpu(struct vcpu *prev) if ( is_idle_vcpu(current) ) reset_stack_and_jump(idle_loop); +#ifdef CONFIG_ARM_CCA + else if ( is_vcpu_realm(current) ) + arm_cca_vcpu_run(current); +#endif else if ( is_32bit_domain(current->domain) ) /* check_wakeup_from_wait(); */ reset_stack_and_jump(return_to_new_vcpu32); diff --git a/xen/arch/arm/include/asm/arm64/hsr.h b/xen/arch/arm/include/asm/arm64/hsr.h index 1495ccddeab6..7cdddd6ae903 100644 --- a/xen/arch/arm/include/asm/arm64/hsr.h +++ b/xen/arch/arm/include/asm/arm64/hsr.h @@ -86,6 +86,7 @@ #define HSR_SYSREG_PMINTENCLR_EL1 HSR_SYSREG(3,0,c9,c14,2) #define HSR_SYSREG_MAIR_EL1 HSR_SYSREG(3,0,c10,c2,0) #define HSR_SYSREG_AMAIR_EL1 HSR_SYSREG(3,0,c10,c3,0) +#define HSR_SYSREG_ICC_DIR_EL1 HSR_SYSREG(3,0,c12,c11,1) #define HSR_SYSREG_ICC_SGI1R_EL1 HSR_SYSREG(3,0,c12,c11,5) #define HSR_SYSREG_ICC_ASGI1R_EL1 HSR_SYSREG(3,1,c12,c11,6) #define HSR_SYSREG_ICC_SGI0R_EL1 HSR_SYSREG(3,2,c12,c11,7) diff --git a/xen/arch/arm/include/asm/hsr.h b/xen/arch/arm/include/asm/hsr.h index 9b91b28c48e3..29a91bf866f1 100644 --- a/xen/arch/arm/include/asm/hsr.h +++ b/xen/arch/arm/include/asm/hsr.h @@ -168,6 +168,10 @@ union hsr { #endif }; +/* HSR.EC == HSR_EC_WFI_WFE */ +#define HSR_WFI_WFE_WFE (_AC(1, UL) << 0) +#define HSR_WFI_WFE_WFXT (_AC(1, UL) << 1) + /* HSR.EC == HSR_CP{15,14,10}_32 */ #define HSR_CP32_OP2_MASK (0x000e0000) #define HSR_CP32_OP2_SHIFT (17) -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309429.1580501 (Exim 4.92) (envelope-from ) id 1wNjts-0001Mb-Ma; Fri, 15 May 2026 04:11:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309429.1580501; Fri, 15 May 2026 04:11:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjts-0001MN-IW; Fri, 15 May 2026 04:11:48 +0000 Received: by outflank-mailman (input) for mailman id 1309429; Fri, 15 May 2026 04:11:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjtq-0000ts-Qa for xen-devel@lists.xenproject.org; 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From: Koichiro Den To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 23/26] xen/arm/cca: handle Realm RIPAS and GIC sysreg exits Date: Fri, 15 May 2026 13:08:09 +0900 Message-ID: <20260515040812.983626-24-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYWPR01CA0023.jpnprd01.prod.outlook.com (2603:1096:400:aa::10) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYCP286MB3682:EE_ X-MS-Office365-Filtering-Correlation-Id: b2261427-5b75-45f1-8765-08deb237a34a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|366016|376014|7416014|56012099003|3023799003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: kKzqrQuiXntSMHlRULX9ohEW5gS0/Yqvl12mkFR5/s5V91S7VGC2Ugpvvm+28UOmz173JNZntmzvE2QrEQ98cFiFcgna7kdSPM6YGUjnM0xqi5R3CJcKFyBtN0dV/Dp4rNQGAyILXwz39mttyy4kRZNRDRl5dPBfuO9ry3oPw2b8vDktHYdrPtrzCO9bQyze7x0fyuOY48fD6gH8IpC/bZ0KYm2lnB6VMGwQw+gYs5Da12RgptpUYVoa+bppGLhDoKRI8FDD4wdL9HFMOf+LfiExyknbCwjI6vOd75gnZd7OAcEVLqItd1aucq9rGQmxYiGtlqtL2r+Y4cGKjTbojMJPfoCoXD1I2ejNvYrq6wajjGcw/OICmMB3/25tCN3pLWnOJHE4SKTAcvXTK5+EGHEhC5xkG2m/l+w6cVEtM6omKR+qxY7pCKmI2GdtIweaq5JQTX8depB5LgP1hAOtFQ1/rKiHIdPc0WCfi6DaRQhdu6X0eCFYt7UxkYZFboWRfloJVpqkJWvsP9+WFtpXHx3+i/TFPHaaGDjqM96It9gkK8IkNkN+22er7pC0MIK07epxjkP3SH/V6XvC8gvnKFlGq6CkaJwNbLvnFKHf32JbXfOZHm9QOEa91x/WzDxYpv1o/mpbtqCFeD/5IicP3A8+mmQViDwgj4SIUJIVQXgWfYs2ixTVA0rvacfxJs8H X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(366016)(376014)(7416014)(56012099003)(3023799003)(22082099003)(18002099003);DIR:OUT;SFP:1102; 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RIPAS work runs before the next REC entry, and sysreg transfers use ESR_EL2.ISS.Rt. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/rec.c | 209 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 206 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/cca/rec.c b/xen/arch/arm/cca/rec.c index efff7fa48745..7959fb767e11 100644 --- a/xen/arch/arm/cca/rec.c +++ b/xen/arch/arm/cca/rec.c @@ -399,6 +399,66 @@ static void arm_cca_set_mmio_result(unsigned long *entry_flags, entry_gprs[0] = value; } +static register_t +arm_cca_rec_exit_gpr(const struct arm_cca_rmi_rec_exit *exit, + unsigned int reg) +{ + return reg < ARM_CCA_RMI_REC_NR_GPRS ? exit->gprs[reg] : 0; +} + +static void arm_cca_rec_enter_set_gpr(register_t *entry_gprs, + unsigned int reg, + register_t value) +{ + if ( reg < ARM_CCA_RMI_REC_NR_GPRS ) + entry_gprs[reg] = value; +} + +static bool arm_cca_vgic_emulate_sgi1r(struct vcpu *v, register_t sgir) +{ + return vgic_v3_to_sgi(v, sgir); +} + +static bool arm_cca_vgic_emulate_dir(struct vcpu *v, register_t dir) +{ + unsigned int virq = dir & GICC_IAR_INTID_MASK; + struct gic_lr lr; + unsigned int i; + + /* + * RMM may exit to Xen for Realm ICC_DIR_EL1 accesses. Handle the + * deactivation locally when Xen can find a matching software LR. + * DEN0137 2.0-bet1 - A6.1 Realm interrupts. + */ + if ( virq >= vgic_num_irqs(v->domain) ) + return true; + + for ( i = 0; i < gic_get_nr_lrs(); i++ ) + { + gic_hw_ops->read_lr(i, &lr); + + if ( lr.virq != virq || !lr.active ) + continue; + + if ( lr.hw_status ) + { + gprintk(XENLOG_ERR, + "ARM CCA: ICC_DIR_EL1 on hw-backed vIRQ %u is unsupported\n", + virq); + return false; + } + + lr.active = false; + gic_hw_ops->write_lr(i, &lr); + isb(); + vgic_sync_from_lrs(v); + + return true; + } + + return true; +} + static void arm_cca_request_sea(unsigned long *entry_flags, register_t *entry_gprs) { @@ -560,6 +620,87 @@ static void arm_cca_handle_psci_exit(struct vcpu *v, } } +/* + * DEN0137 2.0-bet1 - D1.5.3 RIPAS change flow. + * RIPAS_EMPTY and RIPAS_RAM changes are applied with RMI_RTT_SET_RIPAS. + * RIPAS_DEV requires VDEV mapping validation support, while RIPAS_DESTROYED + * is not a Realm-requested target state. + */ +static void +arm_cca_handle_ripas_change(struct vcpu *v, + const struct arm_cca_rmi_rec_exit *exit, + unsigned long *entry_flags) +{ + struct arm_smccc_res res; + paddr_t base = exit->ripas_base; + paddr_t top = exit->ripas_top; + int rc; + + if ( v->domain->arch.cca.rd == INVALID_PADDR ) + { + gprintk(XENLOG_ERR, + "ARM CCA: missing RD for RIPAS completion\n"); + arm_cca_domain_crash(v); + } + + switch ( exit->ripas_value ) + { + case ARM_CCA_RMI_RIPAS_EMPTY: + case ARM_CCA_RMI_RIPAS_RAM: + break; + + default: + gprintk(XENLOG_ERR, + "ARM CCA: unsupported RIPAS change value=%u " + "range=%#lx-%#lx\n", + (unsigned int)exit->ripas_value, + (unsigned long)base, (unsigned long)top); + arm_cca_domain_crash(v); + } + + /* + * Note that RMI_RTT_SET_RIPAS uses the pending request recorded in the + * REC, so the Host does not pass the target RIPAS value explicitly here. + * + * Xen accepts the request while progress is possible. If a RIPAS_RAM + * request reaches a point the RMM cannot change, report Host rejection on + * the next REC_ENTER so the Realm sees the normal RSI response. + */ + while ( base < top ) + { + rc = arm_cca_rmi_rtt_set_ripas(v->domain->arch.cca.rd, + v->arch.cca.rec, + base, top, &res); + if ( rc != 0 ) + { + if ( exit->ripas_value == ARM_CCA_RMI_RIPAS_RAM && + arm_cca_rmi_status_is(arm_cca_rmi_result(&res), + ARM_CCA_RMI_ERROR_RTT) ) + { + /* The RIPAS response flag value 1 means Host reject. */ + *entry_flags |= ARM_CCA_RMI_REC_ENTER_FLAG_RIPAS_RESPONSE; + return; + } + + gprintk(XENLOG_ERR, + "ARM CCA: RMI_RTT_SET_RIPAS failed status=%#x data=%#lx\n", + arm_cca_rmi_status_code(arm_cca_rmi_result(&res)), + (unsigned long)arm_cca_rmi_result_data( + arm_cca_rmi_result(&res))); + arm_cca_domain_crash(v); + } + + if ( res.a1 <= base || res.a1 > top ) + { + gprintk(XENLOG_ERR, + "ARM CCA: invalid RIPAS progress %#lx -> %#lx (top %#lx)\n", + (unsigned long)base, res.a1, (unsigned long)top); + arm_cca_domain_crash(v); + } + + base = res.a1; + } +} /* * DEN0137 2.0-bet1 - D1.3.3 REC exit due to Data Abort fault flow. @@ -573,6 +714,55 @@ static void arm_cca_handle_sync_exit(struct vcpu *v, switch ( hsr.ec ) { + case HSR_EC_SYSREG: + { + unsigned int rt = hsr.sysreg.reg; + register_t val = arm_cca_rec_exit_gpr(exit, rt); + + /* + * Realm guests use the GICv3 sysreg CPU interface: + * - Linux expects ICC_SRE_EL1.SRE to read as enabled. + * - SGI generation and explicit deactivate stay in Xen's vGIC path. + * + * DEN0137 2.0-bet1 A6.1 makes ICC_* traps System register exits, + * but A4.3.4.4 only guarantees ESR. Use the Rt encoded in ESR_EL2.ISS + * for the transfer GPR. Current TF-RMM clears Rt for these exits, + * making this equivalent to its gprs[0] convention. + */ + switch ( hsr.bits & HSR_SYSREG_REGS_MASK ) + { + case HSR_SYSREG_ICC_SRE_EL1: + arm_cca_rec_enter_set_gpr(entry_gprs, rt, + ARM_CCA_ICC_SRE_EL1_VALUE); + break; + case HSR_SYSREG_ICC_DIR_EL1: + if ( hsr.sysreg.read || + !arm_cca_vgic_emulate_dir(v, val) ) + { + gprintk(XENLOG_ERR, + "ARM CCA: unsupported ICC_DIR_EL1 access read=%u val=%#lx\n", + hsr.sysreg.read, val); + arm_cca_domain_crash(v); + } + break; + case HSR_SYSREG_ICC_SGI1R_EL1: + if ( hsr.sysreg.read || + !arm_cca_vgic_emulate_sgi1r(v, val) ) + { + gprintk(XENLOG_ERR, + "ARM CCA: unsupported ICC_SGI1R_EL1 access read=%u val=%#lx\n", + hsr.sysreg.read, val); + arm_cca_domain_crash(v); + } + break; + default: + gprintk(XENLOG_ERR, + "ARM CCA: unsupported SYSREG ec=%#x sysreg=%#lx\n", + hsr.ec, (unsigned long)(hsr.bits & HSR_SYSREG_REGS_MASK)); + arm_cca_domain_crash(v); + } + break; + } case HSR_EC_WFI_WFE: /* * DEN0137 2.0-bet1 - A4.3.4.1 REC exit due to WFI or WFE. @@ -619,6 +809,7 @@ void noreturn arm_cca_vcpu_run(struct vcpu *v) struct arm_smccc_res res; unsigned long entry_flags; register_t entry_gprs[ARM_CCA_RMI_REC_NR_GPRS]; + bool pending_ripas = false; int rc; ASSERT(v == current); @@ -663,6 +854,19 @@ void noreturn arm_cca_vcpu_run(struct vcpu *v) arm_cca_check_for_vcpu_work(v); arm_cca_service_host_events(); + /* + * RMI_RTT_SET_RIPAS can cover a large range. The REC exit buffer + * remains valid until the next REC_ENTER, so complete the request + * here with IRQs enabled rather than in the exit dispatch path. + */ + if ( pending_ripas ) + { + local_irq_enable(); + arm_cca_handle_ripas_change(v, &run->exit, &entry_flags); + local_irq_disable(); + pending_ripas = false; + } + arm_cca_prepare_rec_enter(run, entry_flags, entry_gprs); entry_flags = ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFI | ARM_CCA_RMI_REC_ENTER_FLAG_TRAP_WFE; @@ -700,9 +904,8 @@ void noreturn arm_cca_vcpu_run(struct vcpu *v) break; case ARM_CCA_RMI_EXIT_RIPAS_CHANGE: - gprintk(XENLOG_ERR, - "ARM CCA: RIPAS change exits are unsupported\n"); - arm_cca_domain_crash(v); + pending_ripas = true; + break; case ARM_CCA_RMI_EXIT_SYNC: arm_cca_handle_sync_exit(v, &run->exit, &entry_flags, -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309432.1580510 (Exim 4.92) (envelope-from ) id 1wNjtt-0001c4-VT; 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Signed-off-by: Koichiro Den --- docs/hypervisor-guide/arm/cca-realm.rst | 83 +++++++++++++++++++++++++ docs/hypervisor-guide/arm/index.rst | 1 + 2 files changed, 84 insertions(+) create mode 100644 docs/hypervisor-guide/arm/cca-realm.rst diff --git a/docs/hypervisor-guide/arm/cca-realm.rst b/docs/hypervisor-guide/arm/cca-realm.rst new file mode 100644 index 000000000000..9a0a63220bfb --- /dev/null +++ b/docs/hypervisor-guide/arm/cca-realm.rst @@ -0,0 +1,83 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +====================== +Arm CCA Realm support +====================== + +Overview +======== + +Xen can create Arm CCA Realm guests and run their vCPUs with +``RMI_REC_ENTER``. + +The initial support implements the DEN0137 2.0-bet1 Realm lifecycle: Xen +creates the RD and RTTs, initializes RIPAS, populates measured DATA granules, +creates RECs, and activates the Realm. + +Guest creation model +==================== + +Realm guest creation is exposed through ``libxl`` with ``realm=true``. + +Realm guests are currently restricted to: + +* 64-bit Arm PVH +* GICv3 +* a Xen-generated device tree +* guest RAM fully contained within the first guest RAM bank + +When ``realm=true`` is selected, Realm DTBs set the PSCI method to ``"smc"`` +and do not include the Xen hypervisor node, because Xen PV interfaces are not +exposed to Realm guests. The only supported virtual console is +``vuart="sbsa_uart"``. + +This VUART is a host-visible clear-text debug channel. It is accepted only when +``CONFIG_ARM_CCA_REALM_DEBUG_VUART=y`` and is not suitable for +confidentiality-oriented Realm deployments. + +Runtime model +============= + +Each Realm vCPU has a REC and a ``RecRun`` buffer shared between Xen and the +RMM in non-secure memory. Xen enters the Realm with ``RMI_REC_ENTER``. On +return, the RMM provides an ``RmiRecExit`` describing why the REC stopped. + +Before handling an exit, Xen synchronizes the Realm-side vGIC and timer state +needed by the host model. The current path handles the exits needed by this +series: host interrupt returns, emulatable MMIO, a small GICv3 sysreg subset, +``WFI/WFE``, PSCI, and RIPAS changes. Other exits are treated as unsupported. + +Current implementation notes +============================ + +* Initial Realm RAM population currently measures all populated DATA + granules. There is no separate interface for passing measured ranges + from the toolstack. + +* Xen tracks up to 64 accepted donation pages for one memory-transferring + SRO. This is a Xen implementation cap, not an RMI limit. + +* Xen checks that host RAM is fine-tracked conventional memory and ensures + GPT L1s exist before it creates Realms. + +Known limitations +================= + +The initial support is small in scope. + +* No Dom0less Realm launch at Xen boot +* No Xen PV, grant-table based, or virtio device exposure to Realm guests +* No passthrough or Realm device assignment, including VDEV/VSMMU handling +* No ACPI support +* No Multi-Plane Realms or S2AP change exits +* No Realm LPA2, SVE, or PMU support +* Fixed Live Firmware Activation policy, ``RMI_LFA_DISALLOW`` +* Shared MEC policy only +* Fixed zero Realm Personalization Value +* No non-4KB RMI granule or non-1GB tracking-region configuration support +* No Realm shared-memory mappings via + ``RMI_RTT_UNPROT_MAP`` / ``RMI_RTT_UNPROT_UNMAP`` +* No ``RMI_EXIT_HOST_CALL`` handling +* No hardware-backed vIRQ deactivation in the ``ICC_DIR_EL1`` emulation path + +This document should be updated as the Xen/Arm Realm feature set expands. diff --git a/docs/hypervisor-guide/arm/index.rst b/docs/hypervisor-guide/arm/index.rst index 7aae4a0a0301..feac2b4230c3 100644 --- a/docs/hypervisor-guide/arm/index.rst +++ b/docs/hypervisor-guide/arm/index.rst @@ -6,4 +6,5 @@ ARM .. toctree:: :maxdepth: 2 + cca-realm firmware/arm-scmi -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:11:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:11:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309435.1580518 (Exim 4.92) (envelope-from ) id 1wNjtw-0001z3-G3; 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 25/26] libxl/arm: add and validate Realm guest support Date: Fri, 15 May 2026 13:08:11 +0900 Message-ID: <20260515040812.983626-26-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYWPR01CA0030.jpnprd01.prod.outlook.com (2603:1096:400:aa::17) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYCP286MB3682:EE_ X-MS-Office365-Filtering-Correlation-Id: 951d4835-653b-4b40-954d-08deb237a440 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|366016|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: xyVH9c1JnYSO8Iq457ifJbqmB9wu/Ow82h3fCkxDUhQnx4XaNu3xFC4EEMars0sNMlB43ljs72aEdjhwPxbug3tWPjGyRFXdyRqe0sjQ29jEJuGVm4tu7tpEkz+cpDFVpQdGYC8iqrKbWu/nnGB+S6NsTkXJdUbf8rKFFatwedSZE1P8UsL0dKgTIia3UFZvWHVDFGmurZiloztiHsOuwrLgv2lMaH/EnH8Ganne9SOYxYXj1nhaFHykPGT4svG8JZuMZSif6qGI4RvSDntiyPGgE+hMUqMDUbsRodSeyrODa+I8mRslMVCkv/sA86gN5zqphHwvUnSbIiJxX/tx4/HT51mhW7gVXQqIyZYgJ5WGKBywqlbbz5byuj9hhrv4nK4/bS8pewT3a4r0aOrMO5wkoITfXWucX6WS5iQmGagv+xlYl9LgbOsyjoSoKW/KRDYS6iyb27efNEW3amzlcLC1ga0MYWjy+dOQZJR73/AnqxEAQttJxph6mzfNkXdcxduMOfYoHN4w29XKH0JOI2+vAubexFAevdqnktXkMvjTbMkXtBcNgzbZalAlKoVgjfrKiBJo0IvzWg34AA2iZ09tRitBplvr9nK41D18YWnbQV81+/MUX48PvDsGtk/a1WOGANskXdAUcxdjajYvrVna3kbzvq2HdX2kfoNt1ebkG+/2nF7Y0FKH6gLD3TrXDgc5o6fCptQ/MTGqoBFFBQ== X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(366016)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1102; 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Signed-off-by: Koichiro Den --- docs/man/xl.cfg.5.pod.in | 46 +++++++++- tools/include/libxl.h | 5 ++ tools/libs/light/libxl_arm.c | 140 ++++++++++++++++++++++++++----- tools/libs/light/libxl_create.c | 2 + tools/libs/light/libxl_types.idl | 1 + tools/xl/xl_parse.c | 2 + 6 files changed, 173 insertions(+), 23 deletions(-) diff --git a/docs/man/xl.cfg.5.pod.in b/docs/man/xl.cfg.5.pod.in index 2f77016ecfae..7ca7dba4d29d 100644 --- a/docs/man/xl.cfg.5.pod.in +++ b/docs/man/xl.cfg.5.pod.in @@ -1704,6 +1704,47 @@ i.e. enable grants if backend-domid != 0. =back +=item B + +B Create the guest as an Arm CCA Realm guest. + +Realm guests use the Arm PVH guest model and currently support only a +minimal configuration: + +=over 4 + +=item * + +type=EpvhE + +=item * + +guest RAM fully contained within the first guest RAM bank + +=item * + +GICv3 only + +=item * + +Xen-generated device tree only + +=item * + +no passthrough, no virtio, no Xen grant or IOMMU exposure to the guest, +and no ACPI + +=back + +When B, Realm DTBs set the PSCI method to B<"smc">. They do +not expose the Xen hypervisor node because this series does not provide +Xen PV interfaces for Realm guests. + +Realm guests may use B only when Xen was built with +B. This is a host-visible clear-text +debug console for Realm debug access, not a confidentiality-oriented guest +access path. + =item B B Set TEE type for the guest. TEE is a Trusted Execution @@ -3096,6 +3137,10 @@ vuart = "sbsa_uart" Currently, only the "sbsa_uart" model is supported for ARM. +For Realm guests, B is supported with the same device +model only when B. The guest kernel should +use C. + =back =over 4 @@ -3249,4 +3294,3 @@ documentation. Patches to improve incomplete items (or any other item) are gratefully received on the xen-devel@lists.xenproject.org mailing list. Please see L for information on how to submit a patch to Xen. - diff --git a/tools/include/libxl.h b/tools/include/libxl.h index 7c098edab663..9b9398401029 100644 --- a/tools/include/libxl.h +++ b/tools/include/libxl.h @@ -293,6 +293,11 @@ */ #define LIBXL_HAVE_BUILDINFO_ARM_GIC_VERSION 1 +/* + * libxl_domain_build_info has the realm field. + */ +#define LIBXL_HAVE_BUILDINFO_ARM_REALM 1 + /* * libxl_domain_build_info has the arch_arm.tee field. */ diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 7e9f8a1bc366..fa13703bb98b 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -80,6 +80,70 @@ static const char *gicv_to_string(libxl_gic_version gic_version) } } +static bool arm_guest_is_realm(const libxl_domain_build_info *info) +{ + return libxl_defbool_val(info->realm); +} + +static int arm_realm_reject(libxl__gc *gc, const char *what) +{ + LOG(ERROR, "Realm guests do not support %s", what); + return ERROR_INVAL; +} + +static int arm_realm_check_config(libxl__gc *gc, + const libxl_domain_config *d_config) +{ + const libxl_domain_build_info *const info = &d_config->b_info; + const uint64_t bank0_memkb = GUEST_RAM0_SIZE >> 10; + + if ( !arm_guest_is_realm(info) ) + return 0; + + if ( info->type != LIBXL_DOMAIN_TYPE_PVH ) + return arm_realm_reject(gc, "non-PVH build types"); + + if ( info->target_memkb > bank0_memkb || info->max_memkb > bank0_memkb ) + return arm_realm_reject(gc, "guest RAM beyond the first RAM bank"); + + if ( info->device_tree ) + return arm_realm_reject(gc, "partial device trees"); + + if ( libxl_defbool_val(info->acpi) ) + return arm_realm_reject(gc, "ACPI"); + + if ( info->arch_arm.gic_version != LIBXL_GIC_VERSION_V3 ) + return arm_realm_reject(gc, "non-GICv3 interrupt controllers"); + + if ( info->tee != LIBXL_TEE_TYPE_NONE ) + return arm_realm_reject(gc, "TEE/FF-A plumbing"); + + if ( info->num_irqs || info->num_iomem ) + return arm_realm_reject(gc, "IRQ/IOMEM passthrough"); + + if ( info->num_vnuma_nodes ) + return arm_realm_reject(gc, "vNUMA"); + + if ( d_config->c_info.passthrough != LIBXL_PASSTHROUGH_DISABLED ) + return arm_realm_reject(gc, "passthrough mode"); + + if ( d_config->num_pcidevs || d_config->num_dtdevs ) + return arm_realm_reject(gc, "passthrough devices"); + + if ( d_config->num_disks || d_config->num_nics || + d_config->num_virtios || d_config->num_vkbs || + d_config->num_p9s || d_config->num_pvcallsifs ) + return arm_realm_reject(gc, "frontend/backend devices"); + + if ( d_config->num_vtpms || d_config->num_vfbs || + d_config->num_vdispls || d_config->num_vsnds || + d_config->num_channels || d_config->num_usbctrls || + d_config->num_usbdevs ) + return arm_realm_reject(gc, "auxiliary frontend devices"); + + return 0; +} + int libxl__arch_domain_prepare_config(libxl__gc *gc, libxl_domain_config *d_config, struct xen_domctl_createdomain *config) @@ -92,6 +156,10 @@ int libxl__arch_domain_prepare_config(libxl__gc *gc, uint32_t virtio_mmio_irq = GUEST_VIRTIO_MMIO_SPI_FIRST; int rc; + rc = arm_realm_check_config(gc, d_config); + if ( rc ) + return rc; + /* * If pl011 vuart is enabled then increment the nr_spis to allow allocation * of SPI VIRQ for pl011. @@ -617,7 +685,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, return 0; } -static int make_psci_node(libxl__gc *gc, void *fdt) +static int make_psci_node(libxl__gc *gc, void *fdt, bool realm) { int res; @@ -628,7 +696,7 @@ static int make_psci_node(libxl__gc *gc, void *fdt) "arm,psci-0.2", "arm,psci"); if (res) return res; - res = fdt_property_string(fdt, "method", "hvc"); + res = fdt_property_string(fdt, "method", realm ? "smc" : "hvc"); if (res) return res; res = fdt_property_cell(fdt, "cpu_off", PSCI_cpu_off); @@ -1363,7 +1431,7 @@ next_resize: FDT( make_root_properties(gc, vers, fdt) ); FDT( make_chosen_node(gc, fdt, !!dom->modules[0].blob, state, info) ); FDT( make_cpus_node(gc, fdt, info->max_vcpus, ainfo) ); - FDT( make_psci_node(gc, fdt) ); + FDT( make_psci_node(gc, fdt, arm_guest_is_realm(info)) ); FDT( make_memory_nodes(gc, fdt, dom) ); @@ -1384,7 +1452,13 @@ next_resize: } FDT( make_timer_node(gc, fdt, ainfo, state->clock_frequency) ); - FDT( make_hypervisor_node(gc, fdt, vers) ); + /* + * Common domain creation may still allocate grant-table resources, + * but this is the guest-visible path to them. Realm guests + * deliberately omit Xen PV interfaces, including grant-table space. + */ + if (!arm_guest_is_realm(info)) + FDT( make_hypervisor_node(gc, fdt, vers) ); if (info->arch_arm.vuart == LIBXL_VUART_TYPE_SBSA_UART) FDT( make_vpl011_uart_node(gc, fdt, ainfo, dom) ); @@ -1427,7 +1501,7 @@ next_resize: * The iommu node should be created only once for all virtio-mmio * devices. */ - if (iommu_needed) + if (iommu_needed && !arm_guest_is_realm(info)) FDT( make_xen_iommu_node(gc, fdt) ); if (pfdt) @@ -1559,6 +1633,9 @@ static int finalize_hypervisor_node(libxl__gc *gc, libxl_dominfo info; int offset, rc; + if ( arm_guest_is_realm(b_info) ) + return 0; + offset = fdt_path_offset(fdt, "/hypervisor"); if (offset < 0) return offset; @@ -1732,31 +1809,50 @@ int libxl__arch_domain_finalise_hw_description(libxl__gc *gc, return 0; } +static int arm_realm_finalize_guest(libxl__gc *gc, struct xc_dom_image *dom) +{ + int rc; + + if (dom->rambank_size[1] != 0) { + LOG(ERROR, "Realm guests must fit entirely within the first RAM bank"); + return ERROR_INVAL; + } + + rc = xc_arm_cca_init_realm(CTX->xch, dom->guest_domid, + GUEST_RAM_BASE >> XC_PAGE_SHIFT, + dom->rambank_size[0]); + if (rc < 0) { + LOGE(ERROR, "xc_arm_cca_init_realm failed"); + return ERROR_FAIL; + } + + return 0; +} + int libxl__arch_build_dom_finish(libxl__gc *gc, libxl_domain_build_info *info, struct xc_dom_image *dom, libxl__domain_build_state *state) { - int rc = 0, ret; - - if (info->arch_arm.vuart != LIBXL_VUART_TYPE_SBSA_UART) { - rc = 0; - goto out; + int ret; + + if (info->arch_arm.vuart == LIBXL_VUART_TYPE_SBSA_UART) { + ret = xc_dom_vuart_init(CTX->xch, + XEN_DOMCTL_VUART_TYPE_VPL011, + dom->guest_domid, + dom->console_domid, + dom->vuart_gfn, + &state->vuart_port); + if (ret < 0) { + LOG(ERROR, "xc_dom_vuart_init failed\n"); + return ERROR_FAIL; + } } - ret = xc_dom_vuart_init(CTX->xch, - XEN_DOMCTL_VUART_TYPE_VPL011, - dom->guest_domid, - dom->console_domid, - dom->vuart_gfn, - &state->vuart_port); - if (ret < 0) { - rc = ERROR_FAIL; - LOG(ERROR, "xc_dom_vuart_init failed\n"); - } + if (arm_guest_is_realm(info)) + return arm_realm_finalize_guest(gc, dom); -out: - return rc; + return 0; } int libxl__arch_vnuma_build_vmemrange(libxl__gc *gc, diff --git a/tools/libs/light/libxl_create.c b/tools/libs/light/libxl_create.c index bfc9149096a3..1401697ab1d4 100644 --- a/tools/libs/light/libxl_create.c +++ b/tools/libs/light/libxl_create.c @@ -407,6 +407,8 @@ int libxl__domain_build_info_setdefault(libxl__gc *gc, libxl_defbool_setdefault(&b_info->nested_hvm, false); } + libxl_defbool_setdefault(&b_info->realm, false); + if (b_info->max_grant_version == LIBXL_MAX_GRANT_DEFAULT) { if (info.cap_gnttab_v2) b_info->max_grant_version = 2; diff --git a/tools/libs/light/libxl_types.idl b/tools/libs/light/libxl_types.idl index a7893460f013..d2fa3535ab18 100644 --- a/tools/libs/light/libxl_types.idl +++ b/tools/libs/light/libxl_types.idl @@ -657,6 +657,7 @@ libxl_domain_build_info = Struct("domain_build_info",[ ("apic", libxl_defbool), ("dm_restrict", libxl_defbool), ("tee", libxl_tee_type), + ("realm", libxl_defbool), ("u", KeyedUnion(None, libxl_domain_type, "type", [("hvm", Struct(None, [("firmware", string), ("bios", libxl_bios_type), diff --git a/tools/xl/xl_parse.c b/tools/xl/xl_parse.c index 48c72dce9c6d..742c203a0326 100644 --- a/tools/xl/xl_parse.c +++ b/tools/xl/xl_parse.c @@ -3058,6 +3058,8 @@ skip_usbdev: } } + xlu_cfg_get_defbool(config, "realm", &b_info->realm, 0); + if (!xlu_cfg_get_string (config, "sve", &buf, 1)) { e = libxl_sve_type_from_string(buf, &b_info->arch_arm.sve_vl); if (e) { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:12:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:12:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309486.1580528 (Exim 4.92) (envelope-from ) id 1wNjub-0003wA-Qk; Fri, 15 May 2026 04:12:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309486.1580528; Fri, 15 May 2026 04:12:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjub-0003w3-Nu; Fri, 15 May 2026 04:12:33 +0000 Received: by outflank-mailman (input) for mailman id 1309486; Fri, 15 May 2026 04:12:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjua-0003vI-Ig for xen-devel@lists.xenproject.org; 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From: Koichiro Den To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , "Daniel P. Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 11/26] xen/arm/cca: terminate and destroy Realms on relinquish Date: Fri, 15 May 2026 13:07:57 +0900 Message-ID: <20260515040812.983626-12-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0222.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:3c5::9) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYYP286MB3981:EE_ X-MS-Office365-Filtering-Correlation-Id: a7a94171-427a-45da-6252-08deb2379dce X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|376014|366016|10070799003|18002099003|22082099003|56012099003; X-Microsoft-Antispam-Message-Info: sKcxBNa+IElQZkLoN1w9kxi7M7X+Sm3J/j1xx0ZgnkKIvKBg+cOLFhV3bnjyyemrCaalhWBitQNhfP83JlTqxRNSCjLZiPJT69LpgQ1ZnQmupz0whS5lE6E1BOgS8OkJk0q0JIhmisvlwNKhxcbWmqSVs79u6uwV0618M1WLt+3+FGFeqoYYFMCEO4Gj7UHFJlqDa+11U9/d4GABsANmcKNsPkeV65RmqQqhPyCJ8ZcXcnZdNDo+PlWmCTiu99rp62OUug5a7O2J2l54ZQHsiEoTjJZ9yCjE1TBJ9vvBRNNA+A3F8QZuKWJa41RyiZcsQ/Jo4NKV02gkwCHGka3NBafAdnCBBnu5eaHhjPFQF6/cHyB6ps5aSwwtK42gVReHBXVyphUUAgJmN3soNFDxaw8JDw+TWmaH6+yY1VQXmVxYECTD+HS056RGSxg/bB+xDRX8EgvTIEzvfkgLd69DPXGsMNlf+Qhv7mY6QpaD0ncovvzWqRv15ZRUplkv4OzcvI3EdjbEBF/lNLP98EEcxpI23oto1xKBZm7Vun5l2YJh5CyF3/Jfni492dqrQ6csTi5FoVPV3qeLP0s3sHnzK3IXG3cIcx7PxHQg5qwoPH9dVh8PzenFou8RGav6vtG2t5bwO9BG5B7JIpSXPtGnFTb8pRFcVD7LVDl/4qEku9EEPRvaff3O7LcrfbNa/T7U X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(376014)(366016)(10070799003)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1102; 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Keep the metadata until RMM ownership has really ended. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/state.c | 119 ++++++++++++++++++++++++++++++++- xen/arch/arm/include/asm/cca.h | 3 + 2 files changed, 121 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index 3646948eb11c..e58e261265f3 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -3,10 +3,12 @@ #include #include #include +#include #include #include "rmi.h" +#include "sro.h" static void arm_cca_reset_domain_state(struct domain *d) { @@ -24,6 +26,7 @@ static void arm_cca_reset_domain_state(struct domain *d) d->arch.cca.nr_rtts = 0; d->arch.cca.data_pages = NULL; d->arch.cca.nr_data_pages = 0; + d->arch.cca.realm_terminate_done = false; for ( i = 0; i < ARRAY_SIZE(d->arch.cca.realm_sro_pages); ++i ) d->arch.cca.realm_sro_pages[i] = NULL; @@ -48,8 +51,20 @@ void arm_cca_domain_init(struct domain *d) arm_cca_reset_domain_state(d); } +static void arm_cca_domain_free_metadata(struct domain *d) +{ + xfree(d->arch.cca.data_pages); + xfree(d->arch.cca.rtts); +} + +/* + * RMI teardown is returnable and runs from + * arm_cca_domain_relinquish_resources(). The final domain hook only releases + * metadata if an earlier setup path left it behind. + */ void arm_cca_domain_destroy(struct domain *d) { + arm_cca_domain_free_metadata(d); arm_cca_reset_domain_state(d); } @@ -71,9 +86,111 @@ static int arm_cca_relinquish_abandoned_pages(struct domain *d) return 0; } +static int arm_cca_rmi_realm_destroy_complete(struct domain *d) +{ + struct arm_cca_sro_mem_xfer xfer = { + .pages = d->arch.cca.realm_sro_pages, + .nr_pages = &d->arch.cca.nr_realm_sro_pages, + .abandoned_pages = &d->arch.cca.abandoned_pages, + }; + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_realm_destroy(d->arch.cca.rd, &res); + rc = arm_cca_sro_complete_mem_transfer(rc, &res, &xfer); + if ( rc == 0 && d->arch.cca.nr_realm_sro_pages != 0 ) + rc = -EIO; + + return rc; +} + +static int arm_cca_terminate_realm(struct domain *d) +{ + struct arm_smccc_res res; + int rc; + + if ( d->arch.cca.rd == INVALID_PADDR || d->arch.cca.realm_terminate_done ) + return 0; + + /* + * DEN0137 2.0-bet1 - D1.2.5 starts Realm destruction by terminating the + * Realm. Remember success because later host-side undelegation may fail + * and force a retry. + */ + rc = arm_cca_rmi_realm_terminate(d->arch.cca.rd, &res); + if ( rc != 0 ) + return rc; + + d->arch.cca.realm_terminate_done = true; + + return 0; +} + +static int arm_cca_destroy_realm(struct domain *d) +{ + int rc; + + if ( d->arch.cca.rd != INVALID_PADDR ) + { + rc = arm_cca_rmi_realm_destroy_complete(d); + if ( rc != 0 ) + return rc; + + d->arch.cca.rd = INVALID_PADDR; + d->arch.cca.realm_active = false; + } + + if ( d->arch.cca.rtt_root_page ) + { + rc = arm_cca_undelegate_granule( + page_to_maddr(d->arch.cca.rtt_root_page)); + if ( rc != 0 ) + return rc; + + free_domheap_page(d->arch.cca.rtt_root_page); + d->arch.cca.rtt_root_page = NULL; + } + + if ( d->arch.cca.rd_page ) + { + rc = arm_cca_undelegate_granule(page_to_maddr(d->arch.cca.rd_page)); + if ( rc != 0 ) + return rc; + + free_domheap_page(d->arch.cca.rd_page); + d->arch.cca.rd_page = NULL; + } + + return 0; +} + +/* + * DEN0137 2.0-bet1 - D1.2.5 Realm destruction flow. + * + * RMI teardown runs in the returnable relinquish path so Xen can retry + * incomplete destruction and avoid resource leaks. Realm-associated objects + * can be destroyed in any order. + */ int arm_cca_domain_relinquish_resources(struct domain *d) { - return arm_cca_relinquish_abandoned_pages(d); + int rc; + + rc = arm_cca_terminate_realm(d); + if ( rc != 0 ) + return rc; + + rc = arm_cca_destroy_realm(d); + if ( rc != 0 ) + return rc; + + rc = arm_cca_relinquish_abandoned_pages(d); + if ( rc != 0 ) + return rc; + + arm_cca_domain_free_metadata(d); + arm_cca_reset_domain_state(d); + + return 0; } void arm_cca_vcpu_init(struct vcpu *v) diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index 9b53c80b5bba..b135dd176751 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -66,6 +66,9 @@ struct arm_cca_domain_state { struct arm_cca_data_page_record *data_pages; unsigned long nr_data_pages; + + /* Realm destruction state for domain_relinquish_resources(). */ + bool realm_terminate_done; }; struct arm_cca_vcpu_state { -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:12:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:12:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309487.1580538 (Exim 4.92) (envelope-from ) id 1wNjud-0004AU-79; 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/state.c | 151 +++++++++++++++++++++++++++++++++ xen/arch/arm/include/asm/cca.h | 1 + 2 files changed, 152 insertions(+) diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index e58e261265f3..c85ef56a1297 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -1,15 +1,19 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include #include #include #include #include +#include #include "rmi.h" #include "sro.h" +#define ARM_CCA_RTT_DATA_UNMAP_BATCH 1024UL + static void arm_cca_reset_domain_state(struct domain *d) { unsigned int i; @@ -26,6 +30,7 @@ static void arm_cca_reset_domain_state(struct domain *d) d->arch.cca.nr_rtts = 0; d->arch.cca.data_pages = NULL; d->arch.cca.nr_data_pages = 0; + d->arch.cca.relinquish_data_idx = 0; d->arch.cca.realm_terminate_done = false; for ( i = 0; i < ARRAY_SIZE(d->arch.cca.realm_sro_pages); ++i ) @@ -51,6 +56,37 @@ void arm_cca_domain_init(struct domain *d) arm_cca_reset_domain_state(d); } +static int +arm_cca_rtt_data_unmap_4k(paddr_t rd, + const struct arm_cca_data_page_record *rec) +{ + struct arm_smccc_res res; + paddr_t top = rec->ipa + PAGE_SIZE; + uint64_t desc; + int rc; + + /* + * DEN0137 2.0-bet1 marks SINGLE oaddr as SBZ, and TF-RMM does not use it, + * so keep X5 zero here. + */ + rc = arm_cca_rmi_rtt_data_unmap(rd, rec->ipa, top, + ARM_CCA_RMI_ADDR_TYPE_SINGLE, 0, &res); + if ( rc != 0 ) + return rc; + + desc = res.a2; + + if ( res.a1 != top || + arm_cca_rmi_addr_desc_4k_pa(desc) != rec->pa || + arm_cca_rmi_addr_desc_4k_size(desc) != ARM_CCA_RMI_PAGE_L3 || + arm_cca_rmi_addr_desc_4k_count(desc) != 1 || + arm_cca_rmi_addr_desc_4k_state(desc) != + ARM_CCA_RMI_OP_MEM_DELEGATED ) + return -EIO; + + return 0; +} + static void arm_cca_domain_free_metadata(struct domain *d) { xfree(d->arch.cca.data_pages); @@ -104,6 +140,68 @@ static int arm_cca_rmi_realm_destroy_complete(struct domain *d) return rc; } +static int arm_cca_teardown_data_pages(struct domain *d) +{ + unsigned long i; + int rc; + + if ( !d->arch.cca.data_pages ) + return 0; + + for ( i = d->arch.cca.relinquish_data_idx; + i < d->arch.cca.nr_data_pages; ++i ) + { + struct arm_cca_data_page_record *rec = &d->arch.cca.data_pages[i]; + + if ( rec->pa == INVALID_PADDR ) + continue; + + if ( rec->ipa != INVALID_PADDR ) + { + if ( d->arch.cca.rd == INVALID_PADDR ) + return -EIO; + + rc = arm_cca_rtt_data_unmap_4k(d->arch.cca.rd, rec); + if ( rc != 0 ) + { + d->arch.cca.relinquish_data_idx = i; + return rc; + } + + /* + * The RTTE no longer owns this DATA granule. Keep rec->pa so a + * later retry can finish the host-side undelegation. + */ + rec->ipa = INVALID_PADDR; + } + + rc = arm_cca_undelegate_granule(rec->pa); + if ( rc != 0 ) + { + d->arch.cca.relinquish_data_idx = i; + return rc; + } + + /* + * The page remains owned by the domain and on d->page_list so the + * generic relinquish path can free it later. + */ + rec->pa = INVALID_PADDR; + + if ( ((i + 1) % ARM_CCA_RTT_DATA_UNMAP_BATCH) == 0 && + hypercall_preempt_check() ) + { + d->arch.cca.relinquish_data_idx = i + 1; + return -ERESTART; + } + } + + d->arch.cca.nr_data_pages = 0; + d->arch.cca.relinquish_data_idx = 0; + + return 0; +} + static int arm_cca_terminate_realm(struct domain *d) { struct arm_smccc_res res; @@ -126,6 +224,51 @@ static int arm_cca_terminate_realm(struct domain *d) return 0; } +static int arm_cca_teardown_rtts(struct domain *d) +{ + struct arm_smccc_res res; + int rc; + + while ( d->arch.cca.nr_rtts != 0 ) + { + struct arm_cca_rtt_record *rec = + &d->arch.cca.rtts[d->arch.cca.nr_rtts - 1]; + + if ( rec->pa == INVALID_PADDR ) + { + d->arch.cca.nr_rtts--; + continue; + } + + if ( rec->ipa != INVALID_PADDR ) + { + if ( d->arch.cca.rd == INVALID_PADDR ) + return -EIO; + + rc = arm_cca_rmi_rtt_destroy(d->arch.cca.rd, rec->ipa, + rec->level, &res); + if ( rc != 0 ) + return rc; + + /* + * The RMM object is gone. Keep rec->pa so a later retry can + * finish the host-side undelegation. + */ + rec->ipa = INVALID_PADDR; + } + + rc = arm_cca_undelegate_granule(rec->pa); + if ( rc != 0 ) + return rc; + + free_domheap_page(maddr_to_page(rec->pa)); + rec->pa = INVALID_PADDR; + d->arch.cca.nr_rtts--; + } + + return 0; +} + static int arm_cca_destroy_realm(struct domain *d) { int rc; @@ -179,6 +322,14 @@ int arm_cca_domain_relinquish_resources(struct domain *d) if ( rc != 0 ) return rc; + rc = arm_cca_teardown_data_pages(d); + if ( rc != 0 ) + return rc; + + rc = arm_cca_teardown_rtts(d); + if ( rc != 0 ) + return rc; + rc = arm_cca_destroy_realm(d); if ( rc != 0 ) return rc; diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index b135dd176751..d69e95a10010 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -68,6 +68,7 @@ struct arm_cca_domain_state { unsigned long nr_data_pages; /* Realm destruction state for domain_relinquish_resources(). */ + unsigned long relinquish_data_idx; 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/state.c | 81 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index c85ef56a1297..72dbb83841d7 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -122,6 +122,22 @@ static int arm_cca_relinquish_abandoned_pages(struct domain *d) return 0; } +static int arm_cca_rmi_rec_destroy_complete(struct vcpu *v) +{ + struct arm_cca_sro_mem_xfer xfer = { + .pages = v->arch.cca.aux_pages, + .nr_pages = &v->arch.cca.nr_aux, + .abandoned_pages = &v->domain->arch.cca.abandoned_pages, + }; + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_rec_destroy(v->arch.cca.rec, &res); + rc = arm_cca_sro_complete_mem_transfer(rc, &res, &xfer); + + return rc; +} + static int arm_cca_rmi_realm_destroy_complete(struct domain *d) { struct arm_cca_sro_mem_xfer xfer = { @@ -269,6 +285,67 @@ static int arm_cca_teardown_rtts(struct domain *d) return 0; } +static int arm_cca_vcpu_free_rec_page(struct vcpu *v) +{ + int rc; + + if ( !v->arch.cca.rec_page ) + return 0; + + rc = arm_cca_undelegate_granule(page_to_maddr(v->arch.cca.rec_page)); + if ( rc != 0 ) + return rc; + + free_domheap_page(v->arch.cca.rec_page); + v->arch.cca.rec_page = NULL; + + return 0; +} + +static int arm_cca_vcpu_relinquish_resources(struct vcpu *v) +{ + int rc; + + if ( v->arch.cca.rec != INVALID_PADDR ) + { + rc = arm_cca_rmi_rec_destroy_complete(v); + if ( rc != 0 ) + return rc; + + v->arch.cca.rec = INVALID_PADDR; + } + + /* + * arm_cca_sro_complete_mem_transfer() consumes REC_DESTROY reclaim + * requests. Remaining REC auxiliary pages would mean Xen cannot prove + * that the granules have been returned by the RMM. + */ + if ( v->arch.cca.nr_aux != 0 ) + return -EIO; + + return arm_cca_vcpu_free_rec_page(v); +} + +static int arm_cca_teardown_recs(struct domain *d) +{ + unsigned int i; + int rc; + + for ( i = 0; i < d->max_vcpus; ++i ) + { + struct vcpu *v = d->vcpu[i]; + + if ( v == NULL ) + continue; + + rc = arm_cca_vcpu_relinquish_resources(v); + if ( rc != 0 ) + return rc; + } + + return 0; +} + static int arm_cca_destroy_realm(struct domain *d) { int rc; @@ -330,6 +407,10 @@ int arm_cca_domain_relinquish_resources(struct domain *d) if ( rc != 0 ) return rc; + rc = arm_cca_teardown_recs(d); + if ( rc != 0 ) + return rc; + rc = arm_cca_destroy_realm(d); if ( rc != 0 ) return rc; -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:12:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:12:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309489.1580555 (Exim 4.92) (envelope-from ) id 1wNjue-0004cK-O5; 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Record the delegated pages straight away so abort cleanup can find them. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/build.c | 116 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 116 insertions(+) diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c index f333813e10a0..66d9c88da161 100644 --- a/xen/arch/arm/cca/build.c +++ b/xen/arch/arm/cca/build.c @@ -409,3 +409,119 @@ static int arm_cca_validate_realm_features(struct domain *d) return arm_cca_validate_realm_features1(d); } + +static int arm_cca_rmi_realm_create_complete(struct domain *d, paddr_t rd, + paddr_t params, + uint64_t *rmi_result) +{ + struct arm_cca_sro_mem_xfer xfer = { + .pages = d->arch.cca.realm_sro_pages, + .nr_pages = &d->arch.cca.nr_realm_sro_pages, + .max_pages = ARRAY_SIZE(d->arch.cca.realm_sro_pages), + .abandoned_pages = &d->arch.cca.abandoned_pages, + }; + struct arm_smccc_res res; + int rc; + + rc = arm_cca_rmi_realm_create(rd, params, &res); + rc = arm_cca_sro_complete_mem_transfer(rc, &res, &xfer); + rc = arm_cca_build_record_rmi_failure(rmi_result, rc, &res); + + if ( rc != 0 && d->arch.cca.nr_realm_sro_pages != 0 ) + d->arch.cca.build_unrecoverable = true; + + return rc; +} + +/* DEN0137 2.0-bet1 - D1.2.1 Realm creation flow. */ +static int arm_cca_create_realm(struct domain *d, uint64_t *rmi_result) +{ + struct arm_cca_rmi_realm_params *params; + struct page_info *params_pg = NULL; + struct page_info *rd_pg = NULL; + struct page_info *rtt_root_pg = NULL; + bool rd_delegated = false, rtt_root_delegated = false; + void *va; + int rc = -ENOMEM; + + rc = arm_cca_validate_realm_features(d); + if ( rc != 0 ) + return rc; + + rd_pg = arm_cca_alloc_host_page(); + if ( !rd_pg ) + goto out; + + rtt_root_pg = arm_cca_alloc_host_page(); + if ( !rtt_root_pg ) + goto out; + + params_pg = arm_cca_alloc_host_page(); + if ( !params_pg ) + goto out; + + rc = arm_cca_delegate_granule(page_to_maddr(rd_pg)); + if ( rc != 0 ) + goto out; + rd_delegated = true; + d->arch.cca.rd_page = rd_pg; + + rc = arm_cca_delegate_granule(page_to_maddr(rtt_root_pg)); + if ( rc != 0 ) + goto out; + rtt_root_delegated = true; + d->arch.cca.rtt_root_page = rtt_root_pg; + + va = map_domain_page(page_to_mfn(params_pg)); + params = va; + arm_cca_realm_params_init(params); + /* + * Initial Xen CCA supports only shared MEC Realms. Set the policy + * explicitly even though RMI_MEC_POLICY_SHARED is encoded as zero. + */ + params->flags0 = ARM_CCA_RMI_REALM_FLAGS0_MEC_POLICY( + ARM_CCA_RMI_MEC_POLICY_SHARED); + params->s2sz = p2m_ipa_bits; + params->hash_algo = ARM_CCA_RMI_HASH_SHA_256; + params->num_bps = arm_cca_feature_field( + d->arch.cca.rmi_features0, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_BPS_WIDTH); + params->num_wps = arm_cca_feature_field( + d->arch.cca.rmi_features0, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_SHIFT, + ARM_CCA_RMI_FEATURE_REGISTER_0_NUM_WPS_WIDTH); + params->sve_vl = 0; + params->rtt_base = page_to_maddr(rtt_root_pg); + params->rtt_level_start = 0; + params->rtt_num_start = 1; + unmap_domain_page(va); + + d->arch.cca.rd = page_to_maddr(rd_pg); + + rc = arm_cca_rmi_realm_create_complete(d, d->arch.cca.rd, + page_to_maddr(params_pg), + rmi_result); + if ( rc != 0 ) + goto out; + + rc = 0; + +out: + if ( params_pg ) + free_domheap_page(params_pg); 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/build.c | 139 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 139 insertions(+) diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c index 66d9c88da161..10f61b5038ef 100644 --- a/xen/arch/arm/cca/build.c +++ b/xen/arch/arm/cca/build.c @@ -525,3 +525,142 @@ out: return rc; } + +static int arm_cca_create_rtt_table(struct domain *d, paddr_t ipa, + unsigned int level, + uint64_t *rmi_result) +{ + struct page_info *pg; + struct arm_smccc_res res; + int rc; + unsigned int idx = d->arch.cca.nr_rtts; + + pg = arm_cca_alloc_host_page(); + if ( !pg ) + return -ENOMEM; + + rc = arm_cca_delegate_granule(page_to_maddr(pg)); + if ( rc != 0 ) + goto err_free_page; + + rc = arm_cca_rmi_rtt_create(d->arch.cca.rd, page_to_maddr(pg), ipa, + level, &res); + rc = arm_cca_build_record_rmi_failure(rmi_result, rc, &res); + if ( rc != 0 ) + goto err_undelegate; + + d->arch.cca.rtts[idx].ipa = ipa; + d->arch.cca.rtts[idx].pa = page_to_maddr(pg); + d->arch.cca.rtts[idx].level = level; + d->arch.cca.nr_rtts++; + + return 0; + +err_undelegate: + arm_cca_free_or_abandon_build_page(d, pg, true); + return rc; +err_free_page: + free_domheap_page(pg); + return rc; +} + +static paddr_t arm_cca_rtt_span(unsigned int level) +{ + switch ( level ) + { + case 1: + return ARM_CCA_L0_TABLE_SPAN; + case 2: + return ARM_CCA_L1_TABLE_SPAN; + case 3: + return ARM_CCA_L2_TABLE_SPAN; + default: + return 0; + } +} + +static paddr_t arm_cca_rtt_start(paddr_t base, unsigned int level) +{ + return ROUNDDOWN(base, arm_cca_rtt_span(level)); +} + +static unsigned int arm_cca_count_rtt_tables(paddr_t base, paddr_t end) +{ + unsigned int level, nr_tables = 0; + + for ( level = 1; level <= 3; level++ ) + { + paddr_t span = arm_cca_rtt_span(level); + + nr_tables += (unsigned int)((ROUNDUP(end, span) - + ROUNDDOWN(base, span)) / span); + } + + return nr_tables; +} + +static bool arm_cca_build_should_preempt(unsigned long work, + unsigned long soft_limit, + unsigned long hard_limit) +{ + if ( work < soft_limit ) + return false; + + return hypercall_preempt_check() || work >= hard_limit; +} + +/* + * DEN0137 2.0-bet1 - D1.2.2 Realm Translation Table creation flow. + */ +static int arm_cca_build_rtts(struct domain *d, paddr_t base, + unsigned long nr_pages, + uint64_t *rmi_result) +{ + paddr_t end = base + nr_pages * PAGE_SIZE; + unsigned long work = 0; + int rc; + + if ( !d->arch.cca.rtts ) + { + unsigned int nr_tables = arm_cca_count_rtt_tables(base, end); + + d->arch.cca.rtts = xzalloc_array(struct arm_cca_rtt_record, nr_tables); + if ( !d->arch.cca.rtts ) + return -ENOMEM; + + d->arch.cca.build_rtt_level = 1; + d->arch.cca.build_next_ipa = arm_cca_rtt_start(base, 1); + } + + while ( d->arch.cca.build_rtt_level <= 3 ) + { + unsigned int level = d->arch.cca.build_rtt_level; + paddr_t span = arm_cca_rtt_span(level); + paddr_t ipa = d->arch.cca.build_next_ipa; + + if ( ipa >= end ) + { + level++; + d->arch.cca.build_rtt_level = level; + if ( level <= 3 ) + d->arch.cca.build_next_ipa = arm_cca_rtt_start(base, level); + continue; + } + + rc = arm_cca_create_rtt_table(d, ipa, level, rmi_result); + if ( rc != 0 ) + return rc; + + d->arch.cca.build_next_ipa = ipa + span; + + if ( arm_cca_build_should_preempt(++work, + ARM_CCA_BUILD_PREEMPT_TABLES, + ARM_CCA_BUILD_FORCE_PREEMPT_TABLES) ) + return -ERESTART; + } + + d->arch.cca.build_next_ipa = INVALID_PADDR; + d->arch.cca.build_rtt_level = 0; + + return 0; +} -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:12:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:12:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309492.1580570 (Exim 4.92) (envelope-from ) id 1wNjuj-00053N-NW; Fri, 15 May 2026 04:12:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309492.1580570; Fri, 15 May 2026 04:12:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjuj-00052z-GI; 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Signed-off-by: Koichiro Den --- xen/arch/arm/cca/build.c | 124 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 124 insertions(+) diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c index 10f61b5038ef..8e607e97b99c 100644 --- a/xen/arch/arm/cca/build.c +++ b/xen/arch/arm/cca/build.c @@ -664,3 +664,127 @@ static int arm_cca_build_rtts(struct domain *d, paddr_t base, return 0; } + +/* + * DEN0137 2.0-bet1 - D1.2.3 Initialize memory of New Realm flow. + */ +static int arm_cca_create_data_pages(struct domain *d, gfn_t base_gfn, + unsigned long nr_pages, + uint64_t *rmi_result) +{ + struct page_info *scratch_pg; + void *scratch; + unsigned long i, work = 0; + int rc = 0; + + if ( !d->arch.cca.data_pages ) + { + d->arch.cca.data_pages = xzalloc_array(struct arm_cca_data_page_record, + nr_pages); + if ( !d->arch.cca.data_pages ) + return -ENOMEM; + } + + scratch_pg = arm_cca_alloc_host_page(); + if ( !scratch_pg ) + return -ENOMEM; + + scratch = map_domain_page(page_to_mfn(scratch_pg)); + + for ( i = d->arch.cca.nr_data_pages; i < nr_pages; ++i ) + { + paddr_t ipa = gfn_to_gaddr(gfn_add(base_gfn, i)); + struct page_info *page; + p2m_type_t p2mt; + mfn_t mfn; + void *src; + struct arm_smccc_res res; + bool removed = false, delegated = false; + + page = get_page_from_gfn(d, gfn_x(gfn_add(base_gfn, i)), &p2mt, + P2M_ALLOC); + if ( !page ) + { + rc = -ENOENT; + break; + } + + if ( p2mt != p2m_ram_rw ) + { + put_page(page); + rc = -EINVAL; + break; + } + + mfn = page_to_mfn(page); + src = map_domain_page(mfn); + memcpy(scratch, src, PAGE_SIZE); + unmap_domain_page(src); + + rc = guest_physmap_remove_page(d, gfn_add(base_gfn, i), mfn, 0); + if ( rc != 0 ) + { + put_page(page); + break; + } + removed = true; + d->arch.cca.build_unrecoverable = true; + + rc = arm_cca_delegate_granule(page_to_maddr(page)); + if ( rc != 0 ) + goto err_page; + delegated = true; + + /* + * TODO: If plain RAM should be left out of RIM, have the toolstack + * pass explicit measured ranges (kernel, initrd, DTB, etc.) and use + * DATA_MAP outside those ranges. Do not infer this from page contents. + */ + rc = arm_cca_rmi_rtt_data_map_init( + d->arch.cca.rd, page_to_maddr(page), ipa, + page_to_maddr(scratch_pg), + ARM_CCA_RMI_DATA_FLAGS_MEASURE_CONTENT, &res); + rc = arm_cca_build_record_rmi_failure(rmi_result, rc, &res); + if ( rc != 0 ) + goto err_page; + + d->arch.cca.data_pages[i].ipa = ipa; + d->arch.cca.data_pages[i].pa = mfn_to_maddr(mfn); + d->arch.cca.nr_data_pages++; + + put_page(page); + + if ( arm_cca_build_should_preempt(++work, + ARM_CCA_BUILD_PREEMPT_PAGES, + ARM_CCA_BUILD_FORCE_PREEMPT_PAGES) ) + { + rc = -ERESTART; + break; + } + + continue; + +err_page: + if ( delegated ) + { + if ( arm_cca_undelegate_build_page(d, page) ) + delegated = false; + else + { + d->arch.cca.data_pages[i].ipa = INVALID_PADDR; + d->arch.cca.data_pages[i].pa = page_to_maddr(page); + d->arch.cca.nr_data_pages++; + } + } + + put_page(page); + if ( removed && !delegated ) + free_domheap_page(page); + break; + } + + unmap_domain_page(scratch); + free_domheap_page(scratch_pg); + + return rc; +} -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 04:12:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 04:12:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309494.1580582 (Exim 4.92) (envelope-from ) id 1wNjum-0005X5-1p; Fri, 15 May 2026 04:12:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309494.1580582; Fri, 15 May 2026 04:12:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjul-0005We-Tb; Fri, 15 May 2026 04:12:43 +0000 Received: by outflank-mailman (input) for mailman id 1309494; Fri, 15 May 2026 04:12:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNjuk-0005Ho-Hl for xen-devel@lists.xenproject.org; Fri, 15 May 2026 04:12:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNjuj-0052Pz-U0 for xen-devel@lists.xenproject.org; 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk Subject: [RFC PATCH v1 21/26] xen/arm/cca: add Realm vCPU timer state Date: Fri, 15 May 2026 13:08:07 +0900 Message-ID: <20260515040812.983626-22-den@valinux.co.jp> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20260515040812.983626-1-den@valinux.co.jp> References: <20260515040812.983626-1-den@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0199.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:385::17) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:38f::10) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: TY7P286MB7722:EE_|TYCP286MB3682:EE_ X-MS-Office365-Filtering-Correlation-Id: b07babc4-817c-4a47-4075-08deb237a25e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|366016|376014|7416014|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: gCxWD0qqo83L5Ufb2aAHhhXJw0kiaYADHGww+IabmlnXTxhy3aVL4CQ1WY6Cr+sj4MpjQc+1zB0bC4cneapY/64uqg053ohGQppVd6n5Fvh/Wk3dRIP//CZNnyyAxHH/k6YEStx77USHkrzjkX1AmGeDQQoNbySs1inVMZOe34GxkCQL87JXqnobZVt+uVBDHiI8q+XZiEziRvWehquITQBVXxuF3KPy1t0azSJ+G+y6JP3WKYVAqs5SDiJ95VM8D+7Bt1XDfu93jY69B15pb6lDnQbAY8hVbdLOMEAIkpNVESfQ+aplFegzQ4AqGNbiFBURZFnHox/dc5qIG4wFTv5A/2yZUneAdKm4gja68Sedmb305RKKSiwWJej/PrdryjxH+sHlMnNPjDODbc4V11B3X7ZgDTGFFJY1eeZecemg6BUbVutnE0SnK4B4REWsXY6tOPrXmgyHTWh0Mg8a384VRf8krMNkJb5l5qc880uAp8C9n77+QiGLi2KHmkHE8Q4S3O6rDn6x5p4krd8xjPZUSbbl22R/8IJd+sxzqMzMygnCYix8ScznIGSGutnatvUpfQHNv0IUWJcKxyRbtZVIgi68Z1jchW/WblCQJZ+4UBZbj5vtEEIb3gNksx7AONj+mp+97ZPpywhiM5tC3lbNUaBXDC1FB1r9X85UHKM9HDR/EKH+UevJ9sMwxjcZ X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(1800799024)(10070799003)(366016)(376014)(7416014)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1102; 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The RMM reports timer snapshots on REC exit. Signed-off-by: Koichiro Den --- xen/arch/arm/cca/Makefile | 1 + xen/arch/arm/cca/build.c | 10 +++- xen/arch/arm/cca/rec.c | 90 ++++++++++++++++++++++++++++++++++ xen/arch/arm/cca/state.c | 3 ++ xen/arch/arm/domain.c | 6 ++- xen/arch/arm/include/asm/cca.h | 5 ++ 6 files changed, 112 insertions(+), 3 deletions(-) create mode 100644 xen/arch/arm/cca/rec.c diff --git a/xen/arch/arm/cca/Makefile b/xen/arch/arm/cca/Makefile index 0e66280012b7..b473132c1a67 100644 --- a/xen/arch/arm/cca/Makefile +++ b/xen/arch/arm/cca/Makefile @@ -4,3 +4,4 @@ obj-y += rmi.o obj-y += sro.o obj-y += state.o obj-y += build.o +obj-y += rec.o diff --git a/xen/arch/arm/cca/build.c b/xen/arch/arm/cca/build.c index 29eb0c6057b0..18e825eec83a 100644 --- a/xen/arch/arm/cca/build.c +++ b/xen/arch/arm/cca/build.c @@ -851,7 +851,7 @@ static int arm_cca_create_rec(struct domain *d, struct vcpu *v, bool runnable, struct arm_cca_rmi_rec_params *params; struct page_info *rec_pg = NULL; struct page_info *params_pg = NULL; - bool rec_delegated = false, run_created = false; + bool rec_delegated = false, run_created = false, timers_created = false; void *va; int rc = -ENOMEM; @@ -872,6 +872,11 @@ static int arm_cca_create_rec(struct domain *d, struct vcpu *v, bool runnable, run_created = true; } + rc = arm_cca_vcpu_timer_init(v); + if ( rc != 0 ) + goto out; + timers_created = true; + rc = arm_cca_delegate_granule(page_to_maddr(rec_pg)); if ( rc != 0 ) goto out; @@ -913,6 +918,9 @@ out: if ( rc != 0 && rec_pg ) arm_cca_free_or_abandon_build_page(d, rec_pg, rec_delegated); + if ( rc != 0 && timers_created ) + arm_cca_vcpu_timer_destroy(v); + if ( rc != 0 && run_created ) { arm_cca_free_rec_run(v->arch.cca.run); diff --git a/xen/arch/arm/cca/rec.c b/xen/arch/arm/cca/rec.c new file mode 100644 index 000000000000..8314a7a45d95 --- /dev/null +++ b/xen/arch/arm/cca/rec.c @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include + +#include +#include +#include + +struct arm_cca_timer { + struct vcpu *v; + unsigned int irq; + struct timer timer; + register_t ctl; + uint64_t cval; +}; + +struct arm_cca_vcpu_timers { + struct arm_cca_timer phys; + struct arm_cca_timer virt; + struct timer wfx; +}; + +static void arm_cca_timer_update_irq(struct arm_cca_timer *timer) +{ + register_t ctl = timer->ctl; + bool level; + + ctl &= (CNTx_CTL_ENABLE | CNTx_CTL_PENDING | CNTx_CTL_MASK); + level = (ctl == (CNTx_CTL_ENABLE | CNTx_CTL_PENDING)); + + vgic_inject_irq(timer->v->domain, timer->v, timer->irq, level); +} + +static void arm_cca_timer_expired(void *data) +{ + struct arm_cca_timer *timer = data; + + timer->ctl |= CNTx_CTL_PENDING; + arm_cca_timer_update_irq(timer); +} + +static void arm_cca_wfx_timer_expired(void *data) +{ + vcpu_unblock(data); +} + +static void arm_cca_timer_init(struct vcpu *v, struct arm_cca_timer *timer, + unsigned int irq) +{ + init_timer(&timer->timer, arm_cca_timer_expired, timer, v->processor); + timer->v = v; + timer->irq = irq; + timer->ctl = 0; + timer->cval = 0; +} + +int arm_cca_vcpu_timer_init(struct vcpu *v) +{ + struct arm_cca_vcpu_timers *timers; + + ASSERT(!v->arch.cca.timers); + + timers = xzalloc(struct arm_cca_vcpu_timers); + if ( !timers ) + return -ENOMEM; + + v->arch.cca.timers = timers; + + arm_cca_timer_init(v, &timers->phys, GUEST_TIMER_PHYS_NS_PPI); + arm_cca_timer_init(v, &timers->virt, GUEST_TIMER_VIRT_PPI); + init_timer(&timers->wfx, arm_cca_wfx_timer_expired, v, v->processor); + + return 0; +} + +void arm_cca_vcpu_timer_destroy(struct vcpu *v) +{ + struct arm_cca_vcpu_timers *timers = v->arch.cca.timers; + + if ( !timers ) + return; + + kill_timer(&timers->phys.timer); + kill_timer(&timers->virt.timer); + kill_timer(&timers->wfx); + XFREE(v->arch.cca.timers); +} diff --git a/xen/arch/arm/cca/state.c b/xen/arch/arm/cca/state.c index d85a20a9e7d2..03e0d1d2382b 100644 --- a/xen/arch/arm/cca/state.c +++ b/xen/arch/arm/cca/state.c @@ -51,6 +51,7 @@ static void arm_cca_reset_vcpu_state(struct vcpu *v) v->arch.cca.rec = INVALID_PADDR; v->arch.cca.run = NULL; v->arch.cca.run_pa = INVALID_PADDR; + v->arch.cca.timers = NULL; v->arch.cca.rec_page = NULL; v->arch.cca.nr_aux = 0; @@ -439,6 +440,8 @@ void arm_cca_vcpu_init(struct vcpu *v) void arm_cca_vcpu_destroy(struct vcpu *v) { + arm_cca_vcpu_timer_destroy(v); + if ( v->arch.cca.run ) arm_cca_free_rec_run(v->arch.cca.run); diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c index 2d9469f388c6..d2ee90248a44 100644 --- a/xen/arch/arm/domain.c +++ b/xen/arch/arm/domain.c @@ -113,7 +113,8 @@ static void ctxt_switch_from(struct vcpu *p) /* Arch timer */ p->arch.cntkctl = READ_SYSREG(CNTKCTL_EL1); - virt_timer_save(p); + if ( !is_vcpu_realm(p) ) + virt_timer_save(p); #ifdef CONFIG_ARM_32 p->arch.joscr = READ_CP32(JOSCR); @@ -265,7 +266,8 @@ static void ctxt_switch_to(struct vcpu *n) /* This is could trigger an hardware interrupt from the virtual * timer. The interrupt needs to be injected into the guest. */ WRITE_SYSREG(n->arch.cntkctl, CNTKCTL_EL1); - virt_timer_restore(n); + if ( !is_vcpu_realm(n) ) + virt_timer_restore(n); WRITE_SYSREG(n->arch.mdcr_el2, MDCR_EL2); } diff --git a/xen/arch/arm/include/asm/cca.h b/xen/arch/arm/include/asm/cca.h index 5e6b11a3693d..323988b379ba 100644 --- a/xen/arch/arm/include/asm/cca.h +++ b/xen/arch/arm/include/asm/cca.h @@ -29,6 +29,7 @@ struct vcpu; struct arm_cca_rmi_realm_params; struct arm_cca_rmi_rec_params; struct arm_cca_rmi_rec_run; +struct arm_cca_vcpu_timers; struct page_info; struct arm_cca_rtt_record { @@ -99,6 +100,8 @@ struct arm_cca_vcpu_state { void *run; paddr_t run_pa; + struct arm_cca_vcpu_timers *timers; + struct page_info *rec_page; struct page_info *aux_pages[ARM_CCA_MAX_REC_AUX]; unsigned int nr_aux; @@ -114,6 +117,8 @@ int arm_cca_domain_finalize(struct domain *d, gfn_t base_gfn, void arm_cca_vcpu_init(struct vcpu *v); void noreturn arm_cca_vcpu_run(struct vcpu *v); void arm_cca_vcpu_destroy(struct vcpu *v); +int arm_cca_vcpu_timer_init(struct vcpu *v); +void arm_cca_vcpu_timer_destroy(struct vcpu *v); void *arm_cca_alloc_rec_run(void); void arm_cca_free_rec_run(void *run); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 05:57:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 05:57:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309554.1580591 (Exim 4.92) (envelope-from ) id 1wNlXb-0002WP-68; Fri, 15 May 2026 05:56:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309554.1580591; Fri, 15 May 2026 05:56:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNlXb-0002WI-31; Fri, 15 May 2026 05:56:55 +0000 Received: by outflank-mailman (input) for mailman id 1309554; Fri, 15 May 2026 05:56:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNlXa-0002WC-0W for xen-devel@lists.xenproject.org; Fri, 15 May 2026 05:56:54 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNlXX-009VN7-IS for xen-devel@lists.xenproject.org; Fri, 15 May 2026 07:56:51 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06b596-5cb7-0a2a0a5109dd-0a2a4506b5be-26 for ; Fri, 15 May 2026 07:56:51 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06b5a3-7371-0a2a45060019-d155802cd92b-3 for ; Fri, 15 May 2026 07:56:51 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-48e82c23840so46373165e9.3 for ; Thu, 14 May 2026 22:56:51 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , Juergen Gross , Bertrand Marquis , Volodymyr Babchuk , xen-devel@lists.xenproject.org References: <20260515040812.983626-1-den@valinux.co.jp> <20260515040812.983626-25-den@valinux.co.jp> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260515040812.983626-25-den@valinux.co.jp> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778824611-8CE79D75-D9BA651B/0/0 X-purgate-type: clean X-purgate-size: 1744 On 15.05.2026 06:08, Koichiro Den wrote: > --- a/xen/include/public/domctl.h > +++ b/xen/include/public/domctl.h > @@ -1201,6 +1201,16 @@ struct xen_domctl_vuart_op { > */ > }; > > +/* XEN_DOMCTL_arm_cca_op */ > +struct xen_domctl_arm_cca_op { > +#define XEN_DOMCTL_ARM_CCA_OP_INIT_REALM 0 > + uint32_t cmd; /* IN - XEN_DOMCTL_ARM_CCA_OP_* */ > + uint32_t flags; /* IN - reserved, must be zero */ > + uint64_aligned_t base_gfn; /* IN - first guest RAM gfn to protect */ > + uint64_aligned_t nr_pages; /* IN - number of 4K pages to protect */ > + uint64_aligned_t rmi_result; /* OUT - raw RMI result on -EIO */ > +}; > + > /* XEN_DOMCTL_vmtrace_op: Perform VM tracing operations. */ > struct xen_domctl_vmtrace_op { > uint32_t cmd; /* IN */ > @@ -1368,6 +1378,7 @@ struct xen_domctl { > #define XEN_DOMCTL_gsi_permission 88 > #define XEN_DOMCTL_set_llc_colors 89 > #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ > +#define XEN_DOMCTL_arm_cca_op 91 If this is to be Arm only (as the name implies), ... > @@ -1429,6 +1440,7 @@ struct xen_domctl { > struct xen_domctl_monitor_op monitor_op; > struct xen_domctl_psr_alloc psr_alloc; > struct xen_domctl_vuart_op vuart_op; > + struct xen_domctl_arm_cca_op arm_cca_op; ... this wants to move ... > struct xen_domctl_vmtrace_op vmtrace_op; > struct xen_domctl_paging_mempool paging_mempool; > #if defined(__arm__) || defined(__aarch64__) ... into this #if. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1f8c7aef-1432-4026-b97a-acf9a3d06330@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1778825464-B715BFF4-CCFF9FD9/0/0 X-purgate-type: clean X-purgate-size: 1975 On 14.05.2026 20:11, Andrew Cooper wrote: > On 13/05/2026 3:01 pm, Jan Beulich wrote: >> ... ("All declarations of an object or function shall use the same names >> and type qualifiers"). Bring declarations in line with the corresponding >> definitions, accepting the use of the being-phased-out u types. While >> we don't define NEED_RIJNDAEL_DECRYPT, cover rijndaelKeySetupDec() as >> well for completeness. >> >> Signed-off-by: Jan Beulich >> >> --- a/xen/include/crypto/rijndael.h >> +++ b/xen/include/crypto/rijndael.h >> @@ -50,9 +50,8 @@ int rijndael_set_key_enc_only(rijndael_c >> void rijndael_decrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); >> void rijndael_encrypt(rijndael_ctx *ctx, const unsigned char *src, unsigned char *dst); >> >> -int rijndaelKeySetupEnc(unsigned int rk[], const unsigned char cipherKey[], int keyBits); >> -int rijndaelKeySetupDec(unsigned int rk[], const unsigned char cipkerKey[], int keyBits); >> -void rijndaelEncrypt(const unsigned int rk[], int Nr, const unsigned char pt[16], >> - unsigned char ct[16]); >> +int rijndaelKeySetupEnc(u32 rk[], const u8 cipherKey[], int keyBits); >> +int rijndaelKeySetupDec(u32 rk[], const u8 cipkerKey[], int keyBits); >> +void rijndaelEncrypt(const u32 rk[], int Nr, const u8 pt[16], u8 ct[16]); >> >> #endif /* __RIJNDAEL_H */ >> > > Hmm. > > The rijndael_encrypt() in context is a trivial wrapper of > rijndaelEncrypt() using rijndael_ctx.  The only user is VMAC which > defines aes_encryption() in terms of rijndaelEncrypt(), making > rijndael_encrypt() dead code.  The decrypt side is even deader code. > > It might be worth taking this patch in the short term, but I think we > could get away with a lot of deletion. Well, really this whole piece of code would likely better be replaced by something structured, assuming it's going to be needed at all anymore after TBOOT deletion. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 06:15:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 06:15:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309569.1580608 (Exim 4.92) (envelope-from ) id 1wNlpi-0007gn-Qi; Fri, 15 May 2026 06:15:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309569.1580608; Fri, 15 May 2026 06:15:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNlpi-0007gg-Nq; Fri, 15 May 2026 06:15:38 +0000 Received: by outflank-mailman (input) for mailman id 1309569; Fri, 15 May 2026 06:15:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNlph-0007ga-CX for xen-devel@lists.xenproject.org; Fri, 15 May 2026 06:15:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNlpg-00CAhQ-Op for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:15:36 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06b9ff-e002-0a2a0a5209dd-0a2a4504cb6c-12 for ; Fri, 15 May 2026 08:15:36 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06ba08-1dec-0a2a45040019-d1558034e8b7-3 for ; Fri, 15 May 2026 08:15:36 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488ff90d6c7so76404275e9.2 for ; Thu, 14 May 2026 23:15:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 14 May 2026 23:15:36 -0700 (PDT) Message-ID: <0ae5ac5e-49e5-48f6-9966-b77aef8596f4@suse.com> Date: Fri, 15 May 2026 08:15:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 4/5] x86/shadow: split a nested max() invocation To: Nicola Vetrini Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Stefano Stabellini References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> <146d214c-e766-4b3f-bc50-0b9beee50473@suse.com> <337dd83065dae7555dfecb2163241ead@bugseng.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <337dd83065dae7555dfecb2163241ead@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1778825736-437693FF-6C0E48A2/0/0 X-purgate-type: clean X-purgate-size: 1975 On 14.05.2026 07:08, Nicola Vetrini wrote: > On 2026-05-13 13:46, Jan Beulich wrote: >> Such nesting causes the inner instance to shadow the outer instance's >> macro-local variables, thus violating Misra C:2012 rule 5.3 ("An >> identifier declared in an inner scope shall not hide an identifier >> declared in an outer scope"). Use an intermediate variable for the >> inner invocation. No difference in generated code. >> >> Signed-off-by: Jan Beulich >> --- >> Supposedly this case is deviated (rules.rst). Does that deviation not >> work >> quite right? Actually, am I mis-reading deviations.ecl or is the >> respective setting only covering the combination of min() and max(), >> but >> not multiple use of the same macro? Furthermore, why would e.g. >> min(max_t(), ...) need a deviation? Even more generally, aren't those >> expressions too permissive? > > Yeah, it does cover only mixing max(_t)?/min(_t)? because that was the > only pattern that emerged in the safety scope originally. the _t is not > there for mixing e.g. min(max_t(...), ...) but rather for > min_t(max_t(...), ...) and viceversa; could be split if you think it's > worth it. Yes, I think they would better be split. We shouldn't deviate max(min_t(), ...) and alike. > These expressions are a tad broad, because it's way more > complicated to express the condition: "ignore overlapping only beetween > identifiers defined in the expansion of max/min when used together". I understand the "more complicated" aspect, but from an assessor's pov being too broad (lax) in deviations might easily be a negative point. > Perhaps it could be done, but then if you are already implicitly using > shadowing in those instances maybe that's not as serious a concern? > > In any case, the patch looks ok to me, so > > Reviewed-by: Nicola Vetrini Thanks, also for all the other reviews you did. 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AFNElJ96L1MJwwLV6a4SFz+ZHhPrpr95Eva8djh1RK9XxJIfD909mv3GnU4o+qkSzF29GvlHejyQs9+RRf4=@lists.xenproject.org X-Gm-Message-State: AOJu0YwduQR7KXdbxgRMEsMTO3S1nL7blb0qWaZ32riFRMSyynaYM1XU cYMyjjpSc1RSc6J96Cfk+AlOuIgxB7ZFpWKfUJdtROd3BfKZSvvERBmWJZjOYJg+zg== X-Gm-Gg: Acq92OGvpDpG18fm7jihyo5YRfGtZV7DAle+H/96URwyyySWWDmMGRIGY9dq8y/YXK+ X2obWCYPN3W+42xhOF1eK46izaWUu8Fp1aTaiv6ufaJU3sWlDDCmbH9grV2Cep1ouFQTbh//NZG E24btVEGCpUOapkZZFAkh4tSnANy67EV6wXyGKPB3mJpiGcIqkE+Guoa+gk3R/2RHX3HBz/FAsk 3v34XBq9FFOs5/+LW5Nhi1TTkY7wgdgHL9vl4TXH4bRV5LWqlLZEK/tgqvyfxehgynU/+hB8Di/ gvWCYInjkS/GOeA0GzV48j2W8DTWcOdXx7SZ/JUBmH/uGLpeHvwxtIbZ4aZ3WeBtRT4+sOn6owo NcjHkbmDwztqAiPwZUUqZpkijdmsbUzZHwOCk8tJilQi/R+gdGztqf621isqtF18qlMoKt2zVGC +wzVHLg+g+xtbhIGH6i9qDHKdOobBiNvHUvZsQK8OXx8H/MyaOuySa+rR4+qmHCwDylP6KlGshK qbk2LaC8dHjxJY= X-Received: by 2002:a05:600c:37ca:b0:489:1a63:509c with SMTP id 5b1f17b1804b1-48fe59b05b2mr35557655e9.0.1778826384299; Thu, 14 May 2026 23:26:24 -0700 (PDT) Message-ID: Date: Fri, 15 May 2026 08:26:22 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , "xen-devel@lists.xenproject.org" References: <8ef5af19-7660-4ee9-9cf6-094c744abd0c@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8ef5af19-7660-4ee9-9cf6-094c744abd0c@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778826384-8316D161-681DAAD9/0/0 X-purgate-type: clean X-purgate-size: 785 On 13.05.2026 19:00, Andrew Cooper wrote: > On 13/05/2026 3:03 pm, Jan Beulich wrote: >> --- a/xen/arch/x86/cpu/mcheck/mce.c >> +++ b/xen/arch/x86/cpu/mcheck/mce.c >> @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ >> >> #if BITS_PER_LONG == 64 >> >> -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) >> +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) > > The interface here is horrible, because we're passing a pointer to a > uint64_t to userspace and back. Indeed. > But, can't we just cast through unsigned long instead?  The compiler is > happy, and that feels safer than using a pointer type. I can check if that also helps. Casting to void * let's us, aiui, get away without leveraging any custom deviations that we have. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 06:29:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 06:29:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309588.1580627 (Exim 4.92) (envelope-from ) id 1wNm2h-0002ic-8A; Fri, 15 May 2026 06:29:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309588.1580627; Fri, 15 May 2026 06:29:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNm2h-0002iV-5A; Fri, 15 May 2026 06:29:03 +0000 Received: by outflank-mailman (input) for mailman id 1309588; Fri, 15 May 2026 06:29:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNm2f-0002iP-A5 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 06:29:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNm2e-00GsWT-MN for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:29:00 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06bd1c-2eae-0a2a0a5409dd-0a2a4508d95e-44 for ; Fri, 15 May 2026 08:29:00 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06bd2c-63b5-0a2a45080019-d1558034adb6-3 for ; Fri, 15 May 2026 08:29:00 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4891c0620bcso59914825e9.1 for ; Thu, 14 May 2026 23:29:00 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 14 May 2026 23:29:00 -0700 (PDT) Message-ID: <5dc8ae7f-3aed-4e25-b2b8-6bb0feb7f61a@suse.com> Date: Fri, 15 May 2026 08:28:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 To: Nicola Vetrini Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <36723a55f4465ab1a99041b8bb0575c4@bugseng.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <36723a55f4465ab1a99041b8bb0575c4@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1778826540-B6975DB1-097DE2A3/0/0 X-purgate-type: clean X-purgate-size: 1174 On 13.05.2026 22:47, Nicola Vetrini wrote: > On 2026-05-13 16:03, Jan Beulich wrote: >> ... ("Conversions shall not be performed between a pointer to an >> incomplete type and any other type"): Add an intermediate cat to void >> *. >> >> Signed-off-by: Jan Beulich >> --- >> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 >> (covering more than just this) >> >> --- a/xen/arch/x86/cpu/mcheck/mce.c >> +++ b/xen/arch/x86/cpu/mcheck/mce.c >> @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ >> >> #if BITS_PER_LONG == 64 >> >> -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) >> +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) > > Notwithstanding the comment from Andrew, I think a comment here could be > nice to explain what it going on, otherwise the double cast looks quite > odd. I've added /* Two layers of casting to cover Misra C:2012 rule 11.2. */ > Unrelated: why not contextually marking this rule as clean to prevent > regressions? Isn't this rule (and the others my patches were targeting) marked as clean already, hence why the allcode job fails? Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 06:32:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 06:32:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309597.1580636 (Exim 4.92) (envelope-from ) id 1wNm6I-0004XV-Mx; Fri, 15 May 2026 06:32:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309597.1580636; Fri, 15 May 2026 06:32:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNm6I-0004XO-Ja; Fri, 15 May 2026 06:32:46 +0000 Received: by outflank-mailman (input) for mailman id 1309597; Fri, 15 May 2026 06:32:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNm6I-0004XI-28 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 06:32:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNm6H-009baf-AX for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:32:45 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06be07-bab6-0a2a0a5309dd-0a2a450ab714-18 for ; Fri, 15 May 2026 08:32:45 +0200 Received: from [209.85.221.48] (helo=mail-wr1-f48.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06be0d-56b3-0a2a450a0019-d155dd30e4c9-3 for ; Fri, 15 May 2026 08:32:45 +0200 Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-45d96d21e82so986157f8f.0 for ; Thu, 14 May 2026 23:32:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7ef99f0e-2847-49d8-8701-8243e4b073ed@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1778826765-7236B8B7-EFC504A4/0/0 X-purgate-type: clean X-purgate-size: 825 On 14.05.2026 20:07, Andrew Cooper wrote: > On 13/05/2026 4:51 pm, Jan Beulich wrote: >> ... ("The function argument corresponding to a parameter declared to have >> an array type shall have an appropriate number of elements"). Instead of >> casts, (ab)use unions. >> >> Signed-off-by: Jan Beulich > > The Rule 17.5 violations aren't reported against this function. The report is against uses of aes_encryption() from this function. >  They look to be addressed by one of your other patches. I don't think so. That other patch is independent. > Which rules is this addressing?  I can't locate anything referencing > this function. It's still very much 17.5, which the job runs also confirm (the other patch didn't eliminate the violations here, while this patch does). Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 06:40:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 06:40:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309605.1580644 (Exim 4.92) (envelope-from ) id 1wNmDw-0006cN-Dq; Fri, 15 May 2026 06:40:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309605.1580644; Fri, 15 May 2026 06:40:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmDw-0006cG-AV; Fri, 15 May 2026 06:40:40 +0000 Received: by outflank-mailman (input) for mailman id 1309605; Fri, 15 May 2026 06:40:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmDv-0006cA-Id for xen-devel@lists.xenproject.org; Fri, 15 May 2026 06:40:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNmDu-005L8B-Fv for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:40:38 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06bfe1-5cb7-0a2a0a5109dd-0a2a45058c72-42 for ; Fri, 15 May 2026 08:40:38 +0200 Received: from [209.85.221.46] (helo=mail-wr1-f46.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06bfe6-aaa8-0a2a45050019-d155dd2eb430-3 for ; Fri, 15 May 2026 08:40:38 +0200 Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-449d6c68ed8so7673335f8f.0 for ; Thu, 14 May 2026 23:40:38 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 14 May 2026 23:40:37 -0700 (PDT) Message-ID: Date: Fri, 15 May 2026 08:40:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] x86/time: move BCD_TO_BIN() uses To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <2c5af8f9-05f6-43c4-afb4-a50cbacd2d49@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1778827238-D8B78443-D4E11181/0/0 X-purgate-type: clean X-purgate-size: 3132 On 13.05.2026 21:08, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 05:15:41PM +0200, Jan Beulich wrote: >> On 13.05.2026 16:58, Roger Pau Monné wrote: >>> On Wed, May 13, 2026 at 12:39:46PM +0200, Jan Beulich wrote: >>>> On 13.05.2026 10:56, Roger Pau Monné wrote: >>>>> On Tue, May 12, 2026 at 04:59:03PM +0200, Jan Beulich wrote: >>>>>> --- >>>>>> How come RTC_ALWAYS_BCD is compile-time constant 1? And then even with an >>>>>> inverted comment? Looks like we've inherited this from Linux, and even in >>>>>> Linus'es current tree it's still this same way. Yet all half-way recent >>>>>> chipsets I'm aware of properly implement the DM bit in reg B. Might this >>>>>> be another 32-bit leftover? >>>>> >>>>> *shrugs* I don't know. Seems like Linux is still doing it, so it's >>>>> likely safer for us to continue doing it also? We had no reports of >>>>> it being problematic, albeit one could argue it would be best to >>>>> prevent such reports by doing the right thing. >>>> >>>> That's my point. If we did this as specified, we'd unbreak systems with the >>>> DM bit set correctly, but we'd break (hypothetical) systems with it bogusly >>>> set. Like with a few other fixes, perhaps we should correct it, but provide >>>> a command line option to restore old behavior? >>> >>> Possibly, but I would do after 4.22 has branched, just in case. >> >> Of course. >> >>> One thing I've noticed, is that Xen don't attempts to set >>> RTC_DM_BINARY in REG_B, shouldn't it try to set the bit when probing >>> for the CMOS? Since it assumes BCD mode it should at least try to set >>> it? >> >> For one - don't you mean "clear it"? But then - no, that bit is purely >> informational aiui. Changing it won't alter what the date/time registers >> hold (only how they're updated). Hence by fiddling with it we'd corrupt >> information (breaking OSes which properly respect the bit). > > Yes, sorry, clear it. The (possibly very outdated) specification I > have contains: > > DM – The data mode (DM) bit indicates whether time > and calendar updates are to use binary or BCD formats. The > DM bit is written by the processor program and maybe read > by the program, but is not modified by any internal functions > or RESET. A "1" in DM signifies binary data, while a "0" in > DM specifies binary-coded-decimal (BCD) data. > > To me the "DM bit is written by the processor program" reads as if it > could be set by the OS, but maybe that just means the bit is writable, > but it doesn't affect the format of the field really. Well, it does affect the format of the field, but not right when the bit is written. Aiui it will have an effect when the next update cycle runs, as then the right kind of arithmetic (BCD or binary) need to be applied by the chip (or what was a separate chip back at the time when those specs were written). (The other "written by the processor program" of course applies when date/time are fully updated. At that point the OS can pick DM to its liking, and it would then better store the date/time fields in the respective format.) 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778827379-23175C48-0E074580/10/73395122804 X-purgate-type: spam X-purgate-size: 665 On 14.05.2026 09:27, Oleksii Kurochko wrote: > On 5/12/26 4:58 PM, Jan Beulich wrote: >> Without this the present logic will misbehave from 2070 onwards. >> >> Signed-off-by: Jan Beulich > > Generally it looks like 4.22 won't be used in 2070 or higher (I am > curious do we have similar use cases now that very old Xen version is > used nowadays?) but the patch looks pretty straightforward: > Release-Acked-by: Oleksii Kurochko Thanks. The concern towards 4.22 isn't year 2070, but that we're over 25 years late in doing this work (field introduction which was associated with Y2K iirc). Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 06:43:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 06:43:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309613.1580663 (Exim 4.92) (envelope-from ) id 1wNmGJ-0007Ox-3w; Fri, 15 May 2026 06:43:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309613.1580663; Fri, 15 May 2026 06:43:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmGJ-0007Oq-1E; Fri, 15 May 2026 06:43:07 +0000 Received: by outflank-mailman (input) for mailman id 1309613; Fri, 15 May 2026 06:43:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmGI-0007NT-2T for xen-devel@lists.xenproject.org; Fri, 15 May 2026 06:43:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNmGH-00CEa8-Em for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:43:05 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06c06d-e002-0a2a0a5209dd-0a2a4506c85a-24 for ; Fri, 15 May 2026 08:43:05 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06be20-7371-0a2a45060019-a237832fcabc-3 for ; Fri, 15 May 2026 08:33:04 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 4D9394EE3D7A; Fri, 15 May 2026 08:33:04 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1778826784; b=okWlmnKyooXt5GyZzL7aaqBl1tdG/FuIPD89EaJg1D+HDFiUdHXwDTwZTju13LrHBtLc qHBoWJbq+VLWG2oALOpnx6CcCNi0yoxkCOyhK/HLdCeFDk3hPblgxRq7lV0fmZwhzdzNP Ayh//6zG0osCkExElQ0D0We46Lb2Myd1JwjQpnyduGSwq4lykJLnWNLpskHTps9wID3kr /eesnToQD/gPf3Okepul4cobMNh2L8yrJCCfZJRE/OM40Zre0AhOyPwlAPgykdk1frkw+ qY/PFf+NYbSTdDGACPVT8i2SPGpbFWt23ZTmZTACRUdniMbGPYqZW56ljOXXpRYh1/tWl X2yp70MKBjBhlACV2t5RKvP1itdtD1oHOkc8drYfL/oioH/DHjnRiXn3XrnXI9dB6lMaY I1ZHsJ6ielp+hFS5vDhgrFyasMMrRG8qWGF13B8Mp6ptJEyKVAGwpxhkTbZa9/XpoMnta ZoDxAhgROgyQkCFWB1XswRL43vgc/F/830mFuZl/Ivaob/bjMnTYaHXeERsxzjPM0FA9t D2cinOaQ+lwU5BRGT+V/p3xitK9nfY35SZ3V5PcY7iZ86Tior1oT7JjhMWflAQoWfty0M Be4MQfX5s+hDcPSjdUNWdsAj109hqYL9nylaMrl5fURS9iIcAIGJ42/VoCBQPvw= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1778826784; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=74libaaE1OF76LkVcaOCBRfEKpsiBmcVPvzkbmWj3cY=; b=DWrxfYmH02AZAV0PFfCkMaKI0QfJDGYbe9IjnyovZQJBulL6nsavk5kBbSlPWQXMvti2 R3hwUZLPXJuIUPr6yV3eI9Bz3Tb6zFo2RfRG36KQ/ZBkaKNeUxlj8J2fNbW7HqiD5FlHm 4CEcH+nyxIq3P4oPpgcmYbf51b1lRfxLh0+LEi73Uc0R2aPWx44YhbxtG+6ZKAAzKk2il 358+CxZBPnFDP4+MdOyQsp4JKgHVQ8zpaWE4afSdc8Ki+QFqEmSDuwi/IIST0hJd1EAVF cI6B/NMXH2ZRsKviXwIRyJ+oY2taUGFng1a2/Hhbk7xdxjyZ8tyql2ONZ/D4Nbtmqv4ml VOM2gM7DoXqtp9PqOaYAZznhWi5rqPRXznwzHppqwlS8SAptspwcJ+06Fuyv2mIXOgAzh kxtulNCdSLCHGnov3IKCgH7QNtO9jXUssh9ZQX0UoMGWkNQUdD0utX8Q6vZQQzykHmBPj 22VtdclKXKHr4tGF5SzyLksfAy/wjB/QSDim5/Y09WN7APLJ/8SRihWbyIAn9SRMlA9s/ +ka/VHE6fTJSzvJUSamrzLHscrK9I384pdzfd7SaIHUnWyOOGkrQNn4Z/ojI7jEkn+7nO 8Ja8Z6YaGM6JM9k0iFcElmnsRNOqDNaO0e6Pqy+uUpozd/hKZmkIsnGkNkIRv+I= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Fri, 15 May 2026 08:33:04 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 In-Reply-To: <5dc8ae7f-3aed-4e25-b2b8-6bb0feb7f61a@suse.com> References: <36723a55f4465ab1a99041b8bb0575c4@bugseng.com> <5dc8ae7f-3aed-4e25-b2b8-6bb0feb7f61a@suse.com> Message-ID: X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1778826784-8FD7AD75-B4A2ECA5/13/0 X-purgate-type: clean X-purgate-size: 1467 On 2026-05-15 08:28, Jan Beulich wrote: > On 13.05.2026 22:47, Nicola Vetrini wrote: >> On 2026-05-13 16:03, Jan Beulich wrote: >>> ... ("Conversions shall not be performed between a pointer to an >>> incomplete type and any other type"): Add an intermediate cat to void >>> *. >>> >>> Signed-off-by: Jan Beulich >>> --- >>> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 >>> (covering more than just this) >>> >>> --- a/xen/arch/x86/cpu/mcheck/mce.c >>> +++ b/xen/arch/x86/cpu/mcheck/mce.c >>> @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ >>> >>> #if BITS_PER_LONG == 64 >>> >>> -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) >>> +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) >> >> Notwithstanding the comment from Andrew, I think a comment here could >> be >> nice to explain what it going on, otherwise the double cast looks >> quite >> odd. > > I've added > > /* Two layers of casting to cover Misra C:2012 rule 11.2. */ > Sounds good >> Unrelated: why not contextually marking this rule as clean to prevent >> regressions? > > Isn't this rule (and the others my patches were targeting) marked as > clean > already, hence why the allcode job fails? > Oh, you are right, I didn't check. -- Nicola Vetrini, B.Sc. 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Thu, 14 May 2026 23:52:04 -0700 (PDT) Message-ID: <242237a9-6b9e-4580-8936-aa61be6b0636@suse.com> Date: Fri, 15 May 2026 08:52:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 3/5] x86/vRTC: support century field To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> <439d03f4-4ebb-4bbf-a1ea-324156bff9f0@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778827925-37D7FA53-554CB6E2/0/0 X-purgate-type: clean X-purgate-size: 3278 On 13.05.2026 21:40, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 05:24:13PM +0200, Jan Beulich wrote: >> On 13.05.2026 17:14, Roger Pau Monné wrote: >>> On Wed, May 13, 2026 at 04:58:57PM +0200, Jan Beulich wrote: >>>> On 13.05.2026 16:24, Roger Pau Monné wrote: >>>>> On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: >>>>>> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque >>>>>> /* Fetch the current time and update just this field. */ >>>>>> s->current_tm = gmtime(get_localtime(d)); >>>>>> rtc_copy_date(s); >>>>>> - s->hw.cmos_data[s->hw.cmos_index] = data; >>>>>> + if ( s->hw.cmos_index != RTC_CENTURY ) >>>>>> + s->hw.cmos_data[s->hw.cmos_index] = data; >>>>>> + else >>>>>> + s->hw.century = data; >>>>>> rtc_set_time(s); >>>>>> } >>>>>> alarm_timer_update(s); >>>>> >>>>> Don't you need to adjust the tail return of rtc_ioport_write() (below >>>>> the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so >>>>> the set value is also propagated to the DM, and not only the index? >>>> >>>> I don't think so. The case of us not handling RTC_CENTURY is dealt with >>>> earlier in the function. Whereas when we handle the field, we don't want >>>> to forward (like for all the other RTC fields). >>> >>> Right, so then you also want to adjust the top part of >>> rtc_ioport_write() to not propagate the write to the 0x70 IO port when >>> data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, >>> but not the read/write to port 0x71? >> >> I can't, as whether to forward depends on the data subsequently written. >> Propagating the index "just in case" is the only workable model that I >> can think of. And as guests can do any number of successive port 70 >> writes, the DM needs to cope with this anyway. > > Hm, I see, the newly written value to port 0x71 is taken into account > to decide whether to forward to the DM or not. > > I wonder: would it be simpler to extend the size of the hvm_hw_rtc > structure so that Xen can detect whether the incoming VM has support > for the century field, and then avoid having to play heuristics > with the value itself? It would surely be possible (and we may need to do so anyway for the alarm date/month fields), but I wanted to get away without doing so here. And it seemed pretty reasonable to leverage the padding field for this. > We would know ahead of starting the guest > whether RTC_CENTURY is supposed to be handled by Xen or forwarded to > the DM, and we won't be limited to use 0 as the sentinel value for not > exposing RTC_CENTURY. These are the positive aspects. The negative one is that "backwards" migration would break with the larger record size. Whereas with the padding field used, it won't: The guest likely won't notice that the value at 0x32 isn't updated anymore, i.e. stays at value 20. Somebody would need to artificially change time across century boundaries for this to become noticeable. (Note that this aspect is different for alarm date/month: If either of those fields was in use, backwards migration indeed needs to fail.) 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Thu, 14 May 2026 23:57:45 -0700 (PDT) Message-ID: <5fdd68ea-a413-4f8e-a50a-b0d7d821e904@suse.com> Date: Fri, 15 May 2026 08:57:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2 7/8] x86/mwait-idle: Add cmdline option to adjust C-states table To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> <8c46fedd-f1f3-4cad-91fb-1b3b8d58db50@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1778828266-19F6EF3B-7862A595/0/0 X-purgate-type: clean X-purgate-size: 6124 On 14.05.2026 17:18, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 05:38:08PM +0200, Jan Beulich wrote: >> From: Artem Bityutskiy >> >> Add a new module parameter that allows adjusting the C-states table used by >> the driver. >> >> Currently, the C-states table is hardcoded in the driver based on the CPU >> model. The goal is to have good enough defaults for most users. >> >> However, C-state characteristics, such as exit latency and residency, can >> vary between different variants of the same CPU model and BIOS settings. >> Moreover, different platform usage models and user preferences may benefit >> from different C-state target_residency values. >> >> Provide a way for users to adjust the C-states table via a module parameter >> "table". The general format is: >> "state1:latency1:target_residency1,state2:latency2:target_residency2,..." >> >> In other words, represent each C-state by its name, exit latency (in >> microseconds), and target residency (in microseconds), separated by colons. >> Separate multiple C-states by commas. >> >> For example, suppose a CPU has 3 C-states with the following >> characteristics: >> C1: exit_latency=1, target_residency=2 >> C1E: exit_latency=10, target_residency=10 >> C6: exit_latency=100, target_residency=500 >> >> Users can specify a custom C-states table as follows: >> >> 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" >> Result: C1: exit_latency=2, target_residency=2 >> C1E: exit_latency=5, target_residency=20 >> C6: exit_latency=150, target_residency=600 >> 2. intel_idle.table="C6::400" >> Result: C1: exit_latency=1, target_residency=2 (unchanged) >> C1E: exit_latency=10, target_residency=10 (unchanged) >> C6: exit_latency=100, target_residency=400 >> (only target_residency changed) >> >> Signed-off-by: Artem Bityutskiy >> Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com >> Signed-off-by: Rafael J. Wysocki >> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 >> >> Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. >> Other adjustments to fit our env. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> +/** >> + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. >> + * >> + * Adjust the C-states table with data from the 'mwait-idle.table' parameter >> + * (if specified). >> + */ >> +static void __init cmdline_table_adjust(void) >> +{ >> + char *args = cmdline_table_str; >> + struct cpuidle_state *state; >> + unsigned int i, state_count; >> + >> + if (args[0] == '\0') >> + /* The 'mwait-idle.table' module parameter was not specified */ >> + return; >> + >> + /* Create a copy of the C-states table */ >> + for (i = 0; >> + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; >> + i++) >> + cmdline_states[i] = icpu.state_table[i]; >> + >> + state_count = i; >> + >> + /* >> + * Adjust the C-states table copy with data from the 'mwait-idle.table' >> + * module parameter. >> + */ >> + while (args) { >> + char *fields, *name, *val; >> + >> + /* >> + * Get the next C-state definition, which is expected to be >> + * '::'. Treat "empty" >> + * fields as unchanged. For example, >> + * '::' leaves the latency unchanged. >> + */ >> + args = get_cmdline_field(args, &fields, ','); >> + >> + /* name */ >> + fields = get_cmdline_field(fields, &name, ':'); >> + if (!fields) >> + goto error; >> + >> + /* Find the C-state by its name */ >> + state = NULL; >> + for (i = 0; i < state_count; i++) { >> + if (!strcmp(name, cmdline_states[i].name)) { >> + state = &cmdline_states[i]; >> + break; >> + } >> + } >> + >> + if (!state) { >> + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", >> + name); >> + continue; >> + } >> + >> + /* Latency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + goto error; >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->exit_latency = n; >> + if (*end || state->exit_latency != n) >> + goto error; >> + } >> + >> + /* Target residency */ >> + fields = get_cmdline_field(fields, &val, ':'); >> + >> + if (*val) { >> + const char *end; >> + unsigned long n = simple_strtoul(val, &end, 0); >> + >> + state->target_residency = n; >> + if (*end || state->target_residency != n) >> + goto error; >> + } >> + >> + /* >> + * Allow for 3 more fields, but ignore them. Helps to make >> + * possible future extensions of the cmdline format backward >> + * compatible. >> + */ >> + for (i = 0; fields && i < 3; i++) { >> + fields = get_cmdline_field(fields, &val, ':'); >> + if (!fields) >> + break; >> + } >> + >> + if (fields) { >> + printk(XENLOG_ERR PREFIX >> + "Too many fields for C-state '%s'\n", >> + state->name); >> + goto error; >> + } >> + >> + printk(XENLOG_INFO PREFIX >> + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", >> + state->name, state->exit_latency, state->target_residency); >> + } >> + >> + /* Copy the adjusted C-states table back */ >> + for (i = 0; i < state_count; i++) >> + icpu.state_table[i] = cmdline_states[i]; >> + >> + printk(XENLOG_INFO PREFIX >> + "Adjusted C-states with data from 'mwait-idle.table'\n"); >> + return; >> + >> + error: >> + printk(PREFIX > > XENLOG_ERR ahead of the prefix maybe? I did already raise the level from info to warning, compared to the Linux original. I didn't want to go yet farther with this, hence why I'd prefer to leave out XENLOG_* altogether here. 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Fri, 15 May 2026 00:01:09 -0700 (PDT) Message-ID: Date: Fri, 15 May 2026 09:01:08 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2 8/8] x86/mwait-idle: Add C-states validation To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1778828470-37F4A938-FE7E7C88/13/0 X-purgate-type: clean X-purgate-size: 1456 On 14.05.2026 17:30, Roger Pau Monné wrote: > On Tue, May 12, 2026 at 05:38:32PM +0200, Jan Beulich wrote: >> From: Artem Bityutskiy >> >> Add validation for C-states specified via the "table=" module parameter. >> Treat this module parameter as untrusted input and validate it thoroughly. >> >> Signed-off-by: Artem Bityutskiy >> Link: https://patch.msgid.link/20251216080402.156988-4-dedekind1@gmail.com >> Signed-off-by: Rafael J. Wysocki >> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git be6a150829b3 >> >> Add __init to validate_cmdline_cstate(). Other adjustments to fit our env. >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. >> @@ -1697,6 +1737,21 @@ static void __init cmdline_table_adjust( >> state->name, state->exit_latency, state->target_residency); >> } >> >> + /* Validate the adjusted C-states */ >> + for (i = 0; i < state_count; i++) { >> + struct cpuidle_state *prev_state; > > const? Oh, yes, I should have done that with the other v2 change. > FWIW, you could also init the field at definition, but I > understand this might diverge too much from the Linux code. Right, hence why I left it. Generally I agree that using initializers is preferable over separate assignments. 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NpKxWektACUWTI2rInbPZE8tmq3g1eIBGsXX7RafbvQaJav7evp24ZVlvEBMEwiXOv8/jjX4/Cf6M1fHF5oJJW83Kvs9u6TUiMdF1+n2RqbyRoLvXlE+UlLNa/mbg8skbfCGczwXUs1vaufuoT8llVI3ul87P7A5Es+HLXZKFEBHSNKWuojnfGIWeEAJh/ArxTaWL7bDPFy/HjCe3sRkOkjKIx82m1CKCGq4kGIXr+d7IuFnWot8Ram2wG+FKXIdnG/JXieGcHNukVOXAqGtwzgSR/dtjUOrv2lvUk5JYiIzzkjrpxLVzlUzzIqu9W958c5aj+B9iRm1GZ0PIexuUGAiTCcJ5G8hRGDRl9RxD+bkLGB/NhXRfowH/tUBfahZhbzS86o2VepPi5siSDH6qUUPhjNTDjb+6aOEDdLY0kOa9Dly5POWvh5t/erZLLgJ X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 07:05:26.4200 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9f960d25-7d95-4968-562d-08deb250574f X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A68.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS2PR08MB9943 X-purgate-ID: tlsNG-ef75cf/1778828731-09969C48-52178B3D/0/0 X-purgate-type: clean X-purgate-size: 971 Hi Mykola, > On 12 May 2026, at 18:07, Mykola Kvach wrote: >=20 > From: Mirela Simonovic >=20 > Invoke PSCI SYSTEM_SUSPEND to finalize Xen's suspend sequence on ARM64 > platforms. Pass the Xen resume entry point (hyp_resume) to EL3 together > with a zero context ID, matching Linux. >=20 > This patch wires up only the host-side PSCI SYSTEM_SUSPEND invocation. > The resume trampoline and context restore are provided by earlier patches > in the series. >=20 > Only enable this path when CONFIG_SYSTEM_SUSPEND is set and PSCI > advertises SYSTEM_SUSPEND via PSCI_FEATURES. >=20 > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 15 07:15:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 07:15:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309662.1580707 (Exim 4.92) (envelope-from ) id 1wNmls-0006gE-DP; Fri, 15 May 2026 07:15:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309662.1580707; Fri, 15 May 2026 07:15:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmls-0006g7-Ae; Fri, 15 May 2026 07:15:44 +0000 Received: by outflank-mailman (input) for mailman id 1309662; Fri, 15 May 2026 07:15:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNmlq-0006g1-IZ for xen-devel@lists.xenproject.org; Fri, 15 May 2026 07:15:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNmlp-005RNb-Ux for xen-devel@lists.xenproject.org; Fri, 15 May 2026 09:15:41 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06c7fd-5cb7-0a2a0a5109dd-0a2a4502a79c-28 for ; Fri, 15 May 2026 09:15:41 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06c81d-af86-0a2a45020019-d1558032d4af-3 for ; Fri, 15 May 2026 09:15:41 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48e6db3ff7eso37932165e9.0 for ; Fri, 15 May 2026 00:15:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 15 May 2026 00:15:41 -0700 (PDT) Message-ID: <8fbab1f4-3078-4ac3-b147-84d1b5f5abd1@suse.com> Date: Fri, 15 May 2026 09:15:40 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 RFC] x86/time: avoid early uses of NOW() to return zero To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <68b1607a-f2a1-4f53-84c5-43c61eeb1869@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1778829341-81F76161-44E4E2E4/0/0 X-purgate-type: clean X-purgate-size: 3446 On 14.05.2026 17:56, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 08:44:46AM +0200, Jan Beulich wrote: >> Waiting loops like the one in flush_command_buffer() will degenerate to >> infinite ones when used early enough for NOW() to still return constant >> zero. Make sure the returned value at least monotonically increases. When >> available, use nominal frequency values as initial approximation. >> >> Do this only in get_s_time(), as producing a sane value in >> get_s_time_fixed() for non-zero inputs won't be reasonably possible. >> Put an assertion there. >> >> Reported-by: Roger Pau Monné >> Signed-off-by: Jan Beulich >> --- >> RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which >> checks for NOW() returning 0 (falling back to TSM_RAW in this case). >> For now I have no idea how to avoid this; perhaps that's tolerable at >> least in the case where we put in place an early estimate? Should we >> maybe weaken the fallback condition to take effect for any value >> below 1μs? > > Maybe it's fine to print cycles unconditionally until we reach > SYS_STATE_smp_boot when we know the per-cpu scale is correctly set? I remain of the opinion (as said in reply to your similar v1 comment) that this isn't very desirable. Tying to SYS_STATE_smp_boot also would feel pretty arbitrary. Other ports may have NOW() properly working much earlier. If anything we may want to add a global indicator of NOW() properly working. >> RFC: While generally the mentioned waiting loops will take longer to time >> out, on a very fast CPU tight loops may time out too early. >> >> RFC: For the AMD/Hygon case, if the "nominal" value isn't available, we >> could use the "high" one. That would cause NOW() to run too slowly >> (until the scale is properly set), but maybe that's still better than >> it returning 0? (As it stands, I can't really test the new code >> there, as my Rome system only supplies the lo/hi pair of values.) > > Using the "high" frequency would seem fine to me. Okay, will do then for v3. Related aspect: With these family/model specific additions for AMD, we could also separate out intel_log_freq()'s model specific part, to leverage from here as well. >> @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) >> return 0; >> } >> >> +/* BSP-only function to pre-set an approximate TSC scale. */ >> +void __init preset_tsc_scale(unsigned long freq) >> +{ >> + struct cpu_time *t = &this_cpu(cpu_time); >> + >> + /* >> + * The incoming frequency is only approximate (nominal). Increase it by >> + * 1% to make NOW() output rather a little too slow than too fast, thus >> + * avoiding a possible backwards jump once the final scale is set. >> + */ >> + freq += DIV_ROUND_UP(freq, 100); > > To avoid such possible jump backwards, won't it safer to also update > the ->local_stime and ->local_tsc fields at the time the new scale is > set? Updatign those ahead of setting the new scale should avoid any > backward jumps. ->stamp.local_tsc does get updated; you merely dropped that line from reply context. As to local_stime - how could we possibly set that, when we didn't get through init_platform_timer() yet? Leaving it at 0 is the correct match for setting local_tsc to boot_tsc_stamp. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 07:30:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 07:30:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309674.1580729 (Exim 4.92) (envelope-from ) id 1wNn06-0001qt-Pe; Fri, 15 May 2026 07:30:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309674.1580729; Fri, 15 May 2026 07:30:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNn06-0001qm-Mj; Fri, 15 May 2026 07:30:26 +0000 Received: by outflank-mailman (input) for mailman id 1309674; Fri, 15 May 2026 07:30:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNn05-0001qg-C4 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 07:30:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNn04-00CNoC-6x for xen-devel@lists.xenproject.org; Fri, 15 May 2026 09:30:24 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a06cb8f-e002-0a2a0a5209dd-0a2a4507dfae-4 for ; Fri, 15 May 2026 09:30:24 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a06cb83-229c-0a2a45070019-d155802bb09d-3 for ; Fri, 15 May 2026 09:30:11 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-48d102471a4so86411965e9.2 for ; Fri, 15 May 2026 00:30:11 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260513171553.1772095-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778830211-08B60C48-28D0073E/0/0 X-purgate-type: clean X-purgate-size: 1070 On 13.05.2026 19:15, Andrew Cooper wrote: > The CR8_LEGACY feature was introduced in the K8 Revision F. It doesn't exist > in prior revisions of the K8. > > Furthermore, from APM Vol2 3.1.5 CR8 (Task Priority Register, TPR): > > The AMD64 architecture introduces a new control register, CR8, defined as > the task priority register (TPR). > > Additionally, from APM Vol3 4 System Instructions MOV CRn: > > CR8 can be read and written in 64-bit mode, using a REX prefix. CR8 can be > read and written in all modes using a LOCK prefix instead of a REX prefix to > specify the additional opcode bit. > > i.e. the LOCK prefix serves as an alternative encoding for REX.R. > > Switch decode_twobyte() from += 8 to |= 8 to better match the description > given. Other indications that the encoding isn't additive are that the CR > intercepts stop at 15, and that LOCK MOV CR8 generates #UD rather than > becoming a CR0 access. > > Signed-off-by: Andrew Cooper Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Fri May 15 07:59:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 07:59:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309691.1580746 (Exim 4.92) (envelope-from ) id 1wNnSW-0005xA-9u; Fri, 15 May 2026 07:59:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309691.1580746; Fri, 15 May 2026 07:59:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNnSW-0005x3-6z; Fri, 15 May 2026 07:59:48 +0000 Received: by outflank-mailman (input) for mailman id 1309691; Fri, 15 May 2026 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tlsNG-ef75cf/1778831985-0B77AC48-680304CB/0/0 X-purgate-type: clean X-purgate-size: 6734 On Fri, May 15, 2026 at 08:57:45AM +0200, Jan Beulich wrote: > On 14.05.2026 17:18, Roger Pau Monné wrote: > > On Tue, May 12, 2026 at 05:38:08PM +0200, Jan Beulich wrote: > >> From: Artem Bityutskiy > >> > >> Add a new module parameter that allows adjusting the C-states table used by > >> the driver. > >> > >> Currently, the C-states table is hardcoded in the driver based on the CPU > >> model. The goal is to have good enough defaults for most users. > >> > >> However, C-state characteristics, such as exit latency and residency, can > >> vary between different variants of the same CPU model and BIOS settings. > >> Moreover, different platform usage models and user preferences may benefit > >> from different C-state target_residency values. > >> > >> Provide a way for users to adjust the C-states table via a module parameter > >> "table". The general format is: > >> "state1:latency1:target_residency1,state2:latency2:target_residency2,..." > >> > >> In other words, represent each C-state by its name, exit latency (in > >> microseconds), and target residency (in microseconds), separated by colons. > >> Separate multiple C-states by commas. > >> > >> For example, suppose a CPU has 3 C-states with the following > >> characteristics: > >> C1: exit_latency=1, target_residency=2 > >> C1E: exit_latency=10, target_residency=10 > >> C6: exit_latency=100, target_residency=500 > >> > >> Users can specify a custom C-states table as follows: > >> > >> 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" > >> Result: C1: exit_latency=2, target_residency=2 > >> C1E: exit_latency=5, target_residency=20 > >> C6: exit_latency=150, target_residency=600 > >> 2. intel_idle.table="C6::400" > >> Result: C1: exit_latency=1, target_residency=2 (unchanged) > >> C1E: exit_latency=10, target_residency=10 (unchanged) > >> C6: exit_latency=100, target_residency=400 > >> (only target_residency changed) > >> > >> Signed-off-by: Artem Bityutskiy > >> Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com > >> Signed-off-by: Rafael J. Wysocki > >> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 > >> > >> Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. > >> Other adjustments to fit our env. > >> > >> Signed-off-by: Jan Beulich > > > > Acked-by: Roger Pau Monné > > Thanks. > > >> +/** > >> + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. > >> + * > >> + * Adjust the C-states table with data from the 'mwait-idle.table' parameter > >> + * (if specified). > >> + */ > >> +static void __init cmdline_table_adjust(void) > >> +{ > >> + char *args = cmdline_table_str; > >> + struct cpuidle_state *state; > >> + unsigned int i, state_count; > >> + > >> + if (args[0] == '\0') > >> + /* The 'mwait-idle.table' module parameter was not specified */ > >> + return; > >> + > >> + /* Create a copy of the C-states table */ > >> + for (i = 0; > >> + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; > >> + i++) > >> + cmdline_states[i] = icpu.state_table[i]; > >> + > >> + state_count = i; > >> + > >> + /* > >> + * Adjust the C-states table copy with data from the 'mwait-idle.table' > >> + * module parameter. > >> + */ > >> + while (args) { > >> + char *fields, *name, *val; > >> + > >> + /* > >> + * Get the next C-state definition, which is expected to be > >> + * '::'. Treat "empty" > >> + * fields as unchanged. For example, > >> + * '::' leaves the latency unchanged. > >> + */ > >> + args = get_cmdline_field(args, &fields, ','); > >> + > >> + /* name */ > >> + fields = get_cmdline_field(fields, &name, ':'); > >> + if (!fields) > >> + goto error; > >> + > >> + /* Find the C-state by its name */ > >> + state = NULL; > >> + for (i = 0; i < state_count; i++) { > >> + if (!strcmp(name, cmdline_states[i].name)) { > >> + state = &cmdline_states[i]; > >> + break; > >> + } > >> + } > >> + > >> + if (!state) { > >> + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", > >> + name); > >> + continue; > >> + } > >> + > >> + /* Latency */ > >> + fields = get_cmdline_field(fields, &val, ':'); > >> + if (!fields) > >> + goto error; > >> + > >> + if (*val) { > >> + const char *end; > >> + unsigned long n = simple_strtoul(val, &end, 0); > >> + > >> + state->exit_latency = n; > >> + if (*end || state->exit_latency != n) > >> + goto error; > >> + } > >> + > >> + /* Target residency */ > >> + fields = get_cmdline_field(fields, &val, ':'); > >> + > >> + if (*val) { > >> + const char *end; > >> + unsigned long n = simple_strtoul(val, &end, 0); > >> + > >> + state->target_residency = n; > >> + if (*end || state->target_residency != n) > >> + goto error; > >> + } > >> + > >> + /* > >> + * Allow for 3 more fields, but ignore them. Helps to make > >> + * possible future extensions of the cmdline format backward > >> + * compatible. > >> + */ > >> + for (i = 0; fields && i < 3; i++) { > >> + fields = get_cmdline_field(fields, &val, ':'); > >> + if (!fields) > >> + break; > >> + } > >> + > >> + if (fields) { > >> + printk(XENLOG_ERR PREFIX > >> + "Too many fields for C-state '%s'\n", > >> + state->name); > >> + goto error; > >> + } > >> + > >> + printk(XENLOG_INFO PREFIX > >> + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", > >> + state->name, state->exit_latency, state->target_residency); > >> + } > >> + > >> + /* Copy the adjusted C-states table back */ > >> + for (i = 0; i < state_count; i++) > >> + icpu.state_table[i] = cmdline_states[i]; > >> + > >> + printk(XENLOG_INFO PREFIX > >> + "Adjusted C-states with data from 'mwait-idle.table'\n"); > >> + return; > >> + > >> + error: > >> + printk(PREFIX > > > > XENLOG_ERR ahead of the prefix maybe? > > I did already raise the level from info to warning, compared to the Linux > original. I didn't want to go yet farther with this, hence why I'd prefer > to leave out XENLOG_* altogether here. It seems like the outlier to me. All other printk() instances in the function use an explicit prefix, so I would think it might be best to also add an explicit prefix here. Thanks, Roger. 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Fri, 15 May 2026 00:59:36 -0700 (PDT) MIME-Version: 1.0 References: <613c8d67a66924ea62c2436dac14708d939f6784.1778605274.git.mykola_kvach@epam.com> <8E531A25-5AB5-41CD-AB61-C426C58C8E1C@arm.com> In-Reply-To: <8E531A25-5AB5-41CD-AB61-C426C58C8E1C@arm.com> From: Mykola Kvach Date: Fri, 15 May 2026 10:59:24 +0300 X-Gm-Features: AVHnY4JzqS1e-GDRhrtCpflAyrSxxjQjzE7jFpqNOb8CSWUw8EOHczoJG15eeNQ Message-ID: Subject: Re: [PATCH v9 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1778831977-88D76A53-50F340EA/0/0 X-purgate-type: clean X-purgate-size: 5207 Hi Luca, Thank you for the detailed review. On Wed, May 13, 2026 at 5:09=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > + > > +static void gicv2_resume(void) > > +{ > > + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32); > > + > > + gicv2_cpu_disable(); > > + /* Disable distributor */ > > + writel_gicd(0, GICD_CTLR); > > + > > + for ( i =3D 0; i < blocks; i++ ) > > + { > > + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > > + size_t j, off =3D i * sizeof(irqs->isenabler); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); > > + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); > > + > > + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); > > + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); > > + > > + off =3D i * sizeof(irqs->ipriorityr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > > + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j= * 4); > > apologies for spotting these only now, in case gicv2_info.nr_lines is 102= 0, > here and below for GICD_ITARGETSR we are going to save also IDs 1020-1023 > which are reserved. > > Could we assume irqs->ipriorityr and irqs->itargetsr have the same size a= nd implement > some cap logic which might cap the last loop (eventually): > > for ( i =3D 0; i < blocks; i++ ) > { > struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > size_t j, off =3D i * sizeof(irqs->isenabler); > size_t nr_regs =3D ARRAY_SIZE(irqs->ipriorityr); > > if ( i =3D=3D blocks - 1 ) > nr_regs =3D DIV_ROUND_UP(gicv2_info.nr_lines - i * 32, 4); > > [=E2=80=A6] > > off =3D i * sizeof(irqs->ipriorityr); > for ( j =3D 0; j < nr_regs; j++ ) > writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j * = 4); > > /* > * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: > * they are read-only on multiprocessor implementations and RAZ/W= I > * on uniprocessor implementations. > */ > if ( i ) > { > off =3D i * sizeof(irqs->itargetsr); > for ( j =3D 0; j < nr_regs; j++ ) > writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j = * 4); > } > > [=E2=80=A6] > } This was intentional to keep the logic simpler. For the 1020-interrupt case, the extra word would correspond to interrupt IDs 1020-1023. My reading of ARM IHI 0048B.b is that this is architecturally harmless: section 4.1.2 says that reserved Distributor register addresses are RAZ/WI, and Table 4-1 marks GICD_IPRIORITYR offset 0x7fc and GICD_ITARGETSR offset 0xbfc as Reserved. Would you be OK with keeping this as-is, or would you prefer me to add the cap logic anyway? > > > + > > + /* > > + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to sav= e: > > + * they are read-only on multiprocessor implementations and RA= Z/WI > > + * on uniprocessor implementations. > > + */ > > + if ( i ) > > + { > > + off =3D i * sizeof(irqs->itargetsr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) > > + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off += j * 4); > > + } > > + > > + off =3D i * sizeof(irqs->icfgr); > > + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > > + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > > in the GICv2 specs the usage constraints > of GICD_ICFGR says: =E2=80=9CBefore changing the value of a programmable = Int_config field, > software must disable the corresponding interrupt, otherwise GIC behavior= is > UNPREDICTABLE" > > ARM IHI 0048B.b, 4.3.13. > > I think we should move this restore just after GICD_ICENABLER write, befo= re writing > GICD_ISENABLER. Good catch, I agree. I will move the GICD_ICFGR restore after the GICD_ICENABLER writes and before restoring GICD_ISENABLER, so that programmable Int_config fields are restored while the corresponding interrupts are disabled. I will also check whether it makes sense to move the other configuration restores before GICD_ISENABLER as well. The spec does not seem to impose the same strict requirement there, but keeping all configuration restores before re-enabling the interrupts might make the ordering clearer. > > And also the section says that the GICD_ICFGR0 is read-only. For GICD_ICFGR0, my intention was to keep the restore loop uniform. There should be no useful SGI state to restore here: section 4.3.13 says that SGI Int_config[1] is not programmable and RAO/WI, while Int_config[0] is reserved. Also, the value written is the value previously read from the same register. So I do not expect this write to affect the architected SGI configuration. However, if you prefer avoiding the write to GICD_ICFGR0 explicitly, I will skip it in the next version of this series. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Fri May 15 08:18:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 08:18:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309716.1580767 (Exim 4.92) (envelope-from ) id 1wNnkg-0001in-4J; Fri, 15 May 2026 08:18:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309716.1580767; Fri, 15 May 2026 08:18:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNnkg-0001ig-1f; Fri, 15 May 2026 08:18:34 +0000 Received: by outflank-mailman (input) for mailman id 1309716; Fri, 15 May 2026 08:18:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNnke-0001iV-ED for xen-devel@lists.xenproject.org; Fri, 15 May 2026 08:18:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNnkd-007mzf-Nb for xen-devel@lists.xenproject.org; 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> > > old_pirq = domain_irq_to_pirq(d, irq); > > > > > > if ( (old_irq > 0 && (old_irq != irq) ) || > > > (old_pirq && (old_pirq != pirq)) ) > > > { > > > dprintk(XENLOG_G_WARNING, > > > "dom%d: pirq %d or irq %d already mapped (%d,%d)\n", > > > d->domain_id, pirq, irq, old_pirq, old_irq); > > > return 0; > > > } > > > > > > Why do we return 0 instead of -EEXIST? Since the pirq is not updated, the > > > caller doesn't know that pirq won't fire - only old_pirq. For > > > allocate_and_map_gsi_pirq(), the new pirq is still returned to the caller. > > > I would expect old_pirq to be returned so the caller knows what to use. Am > > > I missing something? > > > > Looking at bfc341a65cfb2 it seems like this might have been an attempt > > to keep the previous logic in ioapic_guest_write() that didn't return > > an error when attempting to add/move an in use IRQ, while switching > > ioapic_guest_write() to use map_domain_pirq()? > > > > The commit description is not very helpful sadly. I think the mention > > of "And this patch also makes broken NetBSD dom0 work again." is > > relevant. AFAICT NetBSD will do PHYSDEVOP_apic_read -> modify RTE (ie: > > set mask bit for example) -> PHYSDEVOP_apic_write. However the > > semantics of those hypercalls is not symmetric. PHYSDEVOP_apic_read > > will return the vector used by Xen in the RTE, while > > PHYSDEVOP_apic_write expects the vector field of the RTE to contain > > the pIRQ. I think this is why map_domain_pirq() was adjusted in such > > a weird way, to ignore requests with bogus pIRQs and still succeed, so > > that PHYSDEVOP_apic_write would also succeed. Ideally the interface > > should have been adjusted so that read/modify/write cycles using > > PHYSDEVOP_apic_{read,write} would work as expected (iow: > > PHYSDEVOP_apic_read should have returned the pIRQ in the vector > > field). > > > > In the context of GSIs, I think we aim for Xen to always identity map > > them (so IRQ == pIRQ), but there might be (or might have been) > > hypercalls that could allow you to create non-identity mappings > > between GSIs and pIRQs. > > To support non-PCI passthrough with Hyperlaunch, we added code to map a GSI > to a vIOAPIC. It does not require identity mapping, and that works. It was > while testing conditions that I expected to fail that I found the behavior. > > First map: > machine A -> guest B > Then map: > machine A -> guest C "success" from the return 0 > > > Explicitly looking at allocate_and_map_gsi_pirq() do you know what > > causes the domain_irq_to_pirq() in allocate_pirq() to not return the > > already allocated pIRQ that matches the passed IRQ? > > Well, it's PVH and I'm making up a "PIRQ" for the vIOAPIC. Yeah, the vIO-APIC auto-map interface in vioapic_hwdom_map_gsi() for PVH hwdom does use identity mappings between GSIs and pIRQs, but if you use the side-band physdev interface you can certainly create non-identity mappings between GSIs and pIRQs. That was introduced as part of the PCI-passthrough work for PVH dom0 IIRC. In fact what we do in vioapic_hwdom_map_gsi() might be dangerous now that we allow a PVH dom0 to allocate and map GSIs using hypercalls also. Using the hypercall interface a domain could introduce non-identity GSI relations, which would then cause vioapic_hwdom_map_gsi() to fail. It might be best to adjust the pirq hint to be -1 in vioapic_hwdom_map_gsi() instead of gsi, and give up on identity mappings GSIs to pIRQs on PVH hwdom from the vIO-APIC. > > Overall we should likely adjust map_domain_pirq() to return -EEIXST, > > and then fix ioapic_guest_write() to shallow such error so we can keep > > the current behavior for that specific interface. > Having been focused on PVH, I didn't look much at the PV behavior. But it > was still surprising to see the "no-op" success. Indeed, I think we want to contain that behavior to ioapic_guest_write() exclusively. AFAICT the success is an unintended effect of bfc341a65cfb2, which should have been limited to ioapic_guest_write() exclusively. Regards, Roger. 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> >>>>>> rtc_copy_date(s); > >>>>>> - s->hw.cmos_data[s->hw.cmos_index] = data; > >>>>>> + if ( s->hw.cmos_index != RTC_CENTURY ) > >>>>>> + s->hw.cmos_data[s->hw.cmos_index] = data; > >>>>>> + else > >>>>>> + s->hw.century = data; > >>>>>> rtc_set_time(s); > >>>>>> } > >>>>>> alarm_timer_update(s); > >>>>> > >>>>> Don't you need to adjust the tail return of rtc_ioport_write() (below > >>>>> the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so > >>>>> the set value is also propagated to the DM, and not only the index? > >>>> > >>>> I don't think so. The case of us not handling RTC_CENTURY is dealt with > >>>> earlier in the function. Whereas when we handle the field, we don't want > >>>> to forward (like for all the other RTC fields). > >>> > >>> Right, so then you also want to adjust the top part of > >>> rtc_ioport_write() to not propagate the write to the 0x70 IO port when > >>> data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, > >>> but not the read/write to port 0x71? > >> > >> I can't, as whether to forward depends on the data subsequently written. > >> Propagating the index "just in case" is the only workable model that I > >> can think of. And as guests can do any number of successive port 70 > >> writes, the DM needs to cope with this anyway. > > > > Hm, I see, the newly written value to port 0x71 is taken into account > > to decide whether to forward to the DM or not. > > > > I wonder: would it be simpler to extend the size of the hvm_hw_rtc > > structure so that Xen can detect whether the incoming VM has support > > for the century field, and then avoid having to play heuristics > > with the value itself? > > It would surely be possible (and we may need to do so anyway for the alarm > date/month fields), but I wanted to get away without doing so here. And it > seemed pretty reasonable to leverage the padding field for this. > > > We would know ahead of starting the guest > > whether RTC_CENTURY is supposed to be handled by Xen or forwarded to > > the DM, and we won't be limited to use 0 as the sentinel value for not > > exposing RTC_CENTURY. > > These are the positive aspects. The negative one is that "backwards" > migration would break with the larger record size. Whereas with the padding > field used, it won't: The guest likely won't notice that the value at 0x32 > isn't updated anymore, i.e. stays at value 20. Sorry, maybe I'm confused, but when migrating backwards the access won't be handled by Xen anymore, and hence we don't know what it would return, it's up to the catch-all device model. I don't think it's safe to migrate backwards, as the century value won't be preserved correctly. IOW: we might want to actively prevent such scenario? Thanks, Roger. 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> } >=20 > +void set_init_ttbr(lpae_t *root); Since this is MMU only, shall we move it to asm/mmu/mm.h? with that fixed: Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 15 08:49:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 08:49:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309754.1580804 (Exim 4.92) (envelope-from ) id 1wNoEB-00084Q-Af; Fri, 15 May 2026 08:49:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309754.1580804; Fri, 15 May 2026 08:49:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNoEB-00084J-7T; Fri, 15 May 2026 08:49:03 +0000 Received: by outflank-mailman (input) for mailman id 1309754; Fri, 15 May 2026 08:49:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNoE9-00084D-6z for xen-devel@lists.xenproject.org; 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Fri, 15 May 2026 01:48:59 -0700 (PDT) Message-ID: <83427254-9e8e-4905-8bbc-c65874a863d2@suse.com> Date: Fri, 15 May 2026 10:48:58 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 3/5] x86/vRTC: support century field To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie , Oleksii Kurochko References: <383355d1-7032-4445-8a06-cb4411ea797e@suse.com> <17a25f0e-91e3-4e09-92ad-21e7dc0ebe62@suse.com> <439d03f4-4ebb-4bbf-a1ea-324156bff9f0@suse.com> <242237a9-6b9e-4580-8936-aa61be6b0636@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1778834940-4156BA53-E47EDF13/0/0 X-purgate-type: clean X-purgate-size: 3555 On 15.05.2026 10:42, Roger Pau Monné wrote: > On Fri, May 15, 2026 at 08:52:03AM +0200, Jan Beulich wrote: >> On 13.05.2026 21:40, Roger Pau Monné wrote: >>> On Wed, May 13, 2026 at 05:24:13PM +0200, Jan Beulich wrote: >>>> On 13.05.2026 17:14, Roger Pau Monné wrote: >>>>> On Wed, May 13, 2026 at 04:58:57PM +0200, Jan Beulich wrote: >>>>>> On 13.05.2026 16:24, Roger Pau Monné wrote: >>>>>>> On Tue, May 12, 2026 at 04:59:35PM +0200, Jan Beulich wrote: >>>>>>>> @@ -515,7 +538,10 @@ static int rtc_ioport_write(void *opaque >>>>>>>> /* Fetch the current time and update just this field. */ >>>>>>>> s->current_tm = gmtime(get_localtime(d)); >>>>>>>> rtc_copy_date(s); >>>>>>>> - s->hw.cmos_data[s->hw.cmos_index] = data; >>>>>>>> + if ( s->hw.cmos_index != RTC_CENTURY ) >>>>>>>> + s->hw.cmos_data[s->hw.cmos_index] = data; >>>>>>>> + else >>>>>>>> + s->hw.century = data; >>>>>>>> rtc_set_time(s); >>>>>>>> } >>>>>>>> alarm_timer_update(s); >>>>>>> >>>>>>> Don't you need to adjust the tail return of rtc_ioport_write() (below >>>>>>> the context here) to return 0 when s->hw.cmos_index == RTC_CENTURY, so >>>>>>> the set value is also propagated to the DM, and not only the index? >>>>>> >>>>>> I don't think so. The case of us not handling RTC_CENTURY is dealt with >>>>>> earlier in the function. Whereas when we handle the field, we don't want >>>>>> to forward (like for all the other RTC fields). >>>>> >>>>> Right, so then you also want to adjust the top part of >>>>> rtc_ioport_write() to not propagate the write to the 0x70 IO port when >>>>> data is RTC_CENTURY? Otherwise you propagate the write to port 0x70, >>>>> but not the read/write to port 0x71? >>>> >>>> I can't, as whether to forward depends on the data subsequently written. >>>> Propagating the index "just in case" is the only workable model that I >>>> can think of. And as guests can do any number of successive port 70 >>>> writes, the DM needs to cope with this anyway. >>> >>> Hm, I see, the newly written value to port 0x71 is taken into account >>> to decide whether to forward to the DM or not. >>> >>> I wonder: would it be simpler to extend the size of the hvm_hw_rtc >>> structure so that Xen can detect whether the incoming VM has support >>> for the century field, and then avoid having to play heuristics >>> with the value itself? >> >> It would surely be possible (and we may need to do so anyway for the alarm >> date/month fields), but I wanted to get away without doing so here. And it >> seemed pretty reasonable to leverage the padding field for this. >> >>> We would know ahead of starting the guest >>> whether RTC_CENTURY is supposed to be handled by Xen or forwarded to >>> the DM, and we won't be limited to use 0 as the sentinel value for not >>> exposing RTC_CENTURY. >> >> These are the positive aspects. The negative one is that "backwards" >> migration would break with the larger record size. Whereas with the padding >> field used, it won't: The guest likely won't notice that the value at 0x32 >> isn't updated anymore, i.e. stays at value 20. > > Sorry, maybe I'm confused, but when migrating backwards the access > won't be handled by Xen anymore, and hence we don't know what it would > return, it's up to the catch-all device model. Oh, you're right of course. The value returned would be whatever the DM deems appropriate. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 09:20:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 09:20:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309765.1580812 (Exim 4.92) (envelope-from ) id 1wNoie-0005IH-IC; Fri, 15 May 2026 09:20:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309765.1580812; Fri, 15 May 2026 09:20:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNoie-0005IA-FO; Fri, 15 May 2026 09:20:32 +0000 Received: by outflank-mailman (input) for mailman id 1309765; Fri, 15 May 2026 09:20:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wNoic-0005I4-KI for xen-devel@lists.xenproject.org; Fri, 15 May 2026 09:20:31 +0000 Received: from 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, Jason Andryuk , Oleksii Kurochko References: <20260514175623.1869042-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz LnRlY2g+wsENBBMBCAA3FiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmn5sK8FCQWjmoACGwME CwkIBwUVCAkKCwUWAgMBAAAKCRBmD6nRAsvP0ID6DACGOktArFbLKHNzuyOVCskwfUZPla6Z pd3GZ8r61SrAKePIr2BnpgPkd0hV3bSRkRLIrgjzR2NRCzfp0x0HfuhcYfAYPR46XHTvjaJE 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spam X-purgate-size: 14119 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------r0mjTP4Oij12D8dvz8orKq6m Content-Type: multipart/mixed; boundary="------------aPrWUFvmXbGpjde2gSNJP9CV"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , Xen-devel Cc: Abdelkareem Abdelsaamad , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk , Oleksii Kurochko Message-ID: Subject: Re: [PATCH for-4.22 v6] x86/svm: Support vNMI on capable hardware References: <20260514175623.1869042-1-andrew.cooper3@citrix.com> In-Reply-To: <20260514175623.1869042-1-andrew.cooper3@citrix.com> --------------aPrWUFvmXbGpjde2gSNJP9CV Content-Type: multipart/mixed; boundary="------------a96RPmdQMuETDhowlGMZXEjv" --------------a96RPmdQMuETDhowlGMZXEjv Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 TGUgMTQvMDUvMjAyNiDDoCAxOTo1OSwgQW5kcmV3IENvb3BlciBhIMOpY3JpdMKgOg0KPiBG cm9tOiBBYmRlbGthcmVlbSBBYmRlbHNhYW1hZCA8YWJkZWxrYXJlZW0uYWJkZWxzYWFtYWRA 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2026 11:30:17 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/emul: Adjust handling of CR8_LEGACY To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260513171553.1772095-1-andrew.cooper3@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz 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boundary="------------zWX35ZY3buMbB3rg6TvzTSuS" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778837418127 X-purgate-ID: tlsNG-720697/1778837422-8137C161-CB629B4E/0/0 X-purgate-type: clean X-purgate-size: 7932 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------zWX35ZY3buMbB3rg6TvzTSuS Content-Type: multipart/mixed; boundary="------------xCGkNzhQKMsfsQQfhjU99e0L"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , Xen-devel Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: <6becf2c3-625f-43aa-8f87-5a8ad0ff0fc1@vates.tech> Subject: Re: [PATCH v2] x86/emul: Adjust handling of CR8_LEGACY References: <20260513171553.1772095-1-andrew.cooper3@citrix.com> In-Reply-To: <20260513171553.1772095-1-andrew.cooper3@citrix.com> --------------xCGkNzhQKMsfsQQfhjU99e0L Content-Type: multipart/mixed; boundary="------------heR2UuPmG24aVC945nuMx6iC" --------------heR2UuPmG24aVC945nuMx6iC Content-Type: text/plain; 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2026 11:32:13 +0200 From: Anthony PERARD To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Roger Pau =?iso-8859-1?Q?Monn=E9?= , Teddy Astie Subject: Re: [PATCH 5/5] tools/xen-hvmctx: shorten various format strings a little References: <4bcd76e9-1bd5-4a2c-8d75-7d29b9dfa31f@suse.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4bcd76e9-1bd5-4a2c-8d75-7d29b9dfa31f@suse.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.c5a.f45f64b97bdcb137.19e2afab675.6e4fa590aafa495=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1778837534325 X-purgate-ID: tlsNG-d62444/1778837538-B5947FF4-D4146F17/0/0 X-purgate-type: clean X-purgate-size: 887 ---=Part.c5a.f45f64b97bdcb137.19e2afab675.6e4fa590aafa495=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Tue, May 12, 2026 at 05:00:43PM +0200, Jan Beulich wrote: > %4=2E4x and alike format specifiers can be expressed shorter as %04x or,= as > e=2Eg=2E dump_ioapic() has it, %=2E4x=2E >=20 > In dump_fpu()'s XMM register dumping, also move away from showing bogus > xmm03 and alike=2E The proper register name is xmm3 for that particular > example=2E >=20 > Also strip trailing whitespace from lines touched=2E >=20 > Signed-off-by: Jan Beulich Acked-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.c5a.f45f64b97bdcb137.19e2afab675.6e4fa590aafa495=--- From xen-devel-bounces@lists.xenproject.org Fri May 15 09:45:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 09:45:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309795.1580840 (Exim 4.92) (envelope-from ) id 1wNp6V-0001A4-Vg; Fri, 15 May 2026 09:45:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 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Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner Non-cacheable) describe non-cacheable accesses to the command queue. its_map_cbaser() only checked whether the shifted field was zero, so an ITS that reports Normal Inner Non-cacheable would not set HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with the unshifted enum value, matching the handling of ITS BASER tables and GICR_PROPBASER. Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer") Signed-off-by: Mykola Kvach --- xen/arch/arm/gic-v3-its.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 9005ce8ce5..7560d46c6d 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its) * If the command queue memory is mapped as uncached, we need to flush * it on every access. */ - if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) ) + if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <= + GIC_BASER_CACHE_nC ) { its->flags |= HOST_ITS_FLUSH_CMD_QUEUE; printk(XENLOG_WARNING "using non-cacheable ITS command queue\n"); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 15 09:53:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 09:53:32 +0000 Received: from list by lists.xenproject.org with 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=?utf-8?B?SkJxSWp5bVdmOE5TbTMwNnNsYkE2YjdMd0NZaVQ2UFNCVnZhQmV1bFNRL2hR?= =?utf-8?Q?R//lMyndTzVRRfsc=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: f5c965e2-f57f-405f-153d-08deb26d524d X-MS-Exchange-CrossTenant-AuthSource: IA1PR03MB8288.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 10:32:53.6131 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: q0Uv9yAl/98t5jcUgz+yO5AZoANt/UIGXljjrnM/IoTdYRrLBGjlQEb617pup6+GneCtJX9/TMij/yWa/NyvZTqbHTeJMT4AiVEhdwoFKlQ= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR03MB7204 X-purgate-ID: tlsNG-16d1c6/1778841239-8E78DD75-943CCC4C/10/73395122804 X-purgate-type: spam X-purgate-size: 3534 On 15/05/2026 10:20 am, Teddy Astie wrote: > Le 14/05/2026 à 19:59, Andrew Cooper a écrit : >> From: Abdelkareem Abdelsaamad >> >> Starting with Zen4, AMD CPUs can virtualise NMIs for a guest.  On older >> hardware, determining when an NMI is safe to deliver is a challenge >> and Xen >> does not handle all corner cases correctly. >> >> With vNMI, there is an enablement bit and two new bits of state in >> the VMCB; a >> pending bit, and a blocked bit.  These directly map to the CPU state for >> handling NMIs, and are maintained by hardware during the running of >> the vCPU. >> >> When vNMI is enabled, have svm_{get,set}set_interrupt_shadow() work >> in terms >> of the vnmi_blocking bit rather than the IRET intercept.  This allows an >> emulated IRET instruction to re-enable NMIs. >> >> When injecting a new NMI, simply set the vnmi_pending bit; hardware will >> deliver the NMI to the guest at the next suitable juncture. >> >> One complication is that, when delivering a second NMI before the >> first has >> completed, the mix between common HVM logic and SVM specific logic >> will try to >> open an NMI window, malfunctioning as it does so.  When vNMI is >> enabled, short >> circuit this to not consider NMIs blocked. >> >> Signed-off-by: Abdelkareem Abdelsaamad >> >> Signed-off-by: Andrew Cooper >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> CC: Teddy Astie >> CC: Jason Andryuk >> CC: Oleksii Kurochko >> >> For 4.22.  This is somewhat overdue and makes a concrete improvement >> to NMI >> handling on recent AMD hardware. >> >> v6: >>   * Plumb through svm_{get,set}set_interrupt_shadow() so that >> emulated IRET >>     works, as requested several times during review of earlier >> revisions. >>   * Expand the commit message >> >> The !vNMI case is even more broken than I'd realised.  Besides the >> "what if >> the IRET faults?" problem, svm_enable_intr_window() basically ignores >> the NMI >> case and simply re-enters the VM.  This causes the pending NMI to >> only be >> injected next time there is a VMExit. > > Does that happens often in practice ? Which? VMs don't tend to make as much use of NMIs as native does. IRET faulting is mostly relegated to misbehaving userspace.  E.g. one thread uses SYSCALL_modify_ldt to invalidate the %ss/%cs that another thread was running on, at which point the next reload of that segment (generally the next IRET) will fault.  But to attack this, userspace needs to hit the IRET of the NMI handler with this race, and avoid the IRET of all other interrupts and exceptions.  Perf counters is the typically the only way userspace has to influence this, and we don't have PMU available to guests by default. Then we get into differences between Intel and AMD.  Intel unblocks NMIs even if the IRET faults.  AMD unblocks NMIs only in the IRET completes. With Xen's current SVM code and without vNMI, IRETs get Intel-like behaviour WRT faulting, and already pending NMIs get delayed.  Software needs to cope with the former, and the latter (while far from ideal) is generally indistinguishable from the NMI being slightly later than it was in practice.   > Reviewed-by: Teddy Astie Thanks. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 15 11:00:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:00:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309842.1580866 (Exim 4.92) (envelope-from ) id 1wNqHR-00054q-NR; Fri, 15 May 2026 11:00:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309842.1580866; Fri, 15 May 2026 11:00:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNqHR-00054i-Kk; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: fUaehOpfVv6TlMKDQ+zmywKJ+xkWKo6gcQq03DDmmmFktyf1S9klSnj5YPZyUhLZA+m7LoMH995u/v/gnerNmyZgqUfdLAlfnvF738TGWxNhR/s9+0QH3SddT/hlrzBe3K0WXCe2qYi5BHdn6RHcJdw6gF0VbKmLvQdJFdyOMG6VQ8eco+J37aWPIFi2IzP8dWOZbxmrDCrqhrWPeJNTCuhwWEjKplwjtsI7ucPWeSHpwazXHSlp18Bv97Xv3Rc+8YtNwLK9C6aDuLs40vdzc7185ABG7Ywj15mAlFKZpvQuNzcOa9/cYeDlIVoV6cdy6np1fr0YyBM5HvcxtMZPgLV4P1msKcZJ4zJb/Cj9Nm7eH+5oQCkzUtJiFzgFoM8nd+S7fEiiIiMSzLO2P5H61dpuC/gG5wiWIH44cdQdFkrZpQtmtR6mEQbaaRNUKxSv X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 11:14:20.9993 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8012e0c0-adfc-497a-e94d-08deb2731d03 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DU2PEPF0001E9C1.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR08MB6021 X-purgate-ID: tlsNG-720697/1778843665-80979161-8E87BF86/0/0 X-purgate-type: clean X-purgate-size: 1127 Hi Mykola, > On 14 May 2026, at 10:08, Mykola Kvach wrote: >=20 > From: Mykola Kvach >=20 > gicv3_do_wait_for_rwp() is used for both distributor and > redistributor writes. The CTLR register is at offset 0 for both, > but the RWP bit is not in the same position. >=20 > For GICD_CTLR, RWP is bit 31. For GICR_CTLR, bit 31 is UWP, > while RWP is bit 3. The redistributor wait path was therefore > polling UWP instead of RWP. >=20 > UWP covers upstream writes, including Generate SGI packets, and is > not a substitute for redistributor register write completion. The > existing redistributor callers need RWP semantics for redistributor > register writes such as GICR_ICENABLER0 and GICR_CTLR updates. >=20 > Add GICR_CTLR_RWP and pass the expected RWP bit to the shared > helper. >=20 > Fixes: bc183a0235e ("xen/arm: Add support for GIC v3") > Reported-by: Luca Fancellu > Signed-off-by: Mykola Kvach > --- This looks ok to me Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 15 11:51:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:51:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309879.1580886 (Exim 4.92) (envelope-from ) id 1wNr4V-0004KY-PV; Fri, 15 May 2026 11:51:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309879.1580886; Fri, 15 May 2026 11:51:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNr4V-0004KR-Lc; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: A0tQ/q9mvNGCia6DXwqb+itA3FU7WYvHxrcr8rkRIAVotRilcaqd20E0+c4tCgEO/hbEmnJo4nFiD5Fx2EVWLftiHQuOrY0KRUjej2ainsy2m8dG0Wbz13pCetk0NaLhduOcVa6Rn/kQfHdC+/P7U+3WS3yJub0qF5euDYucZ1yUjMN8SeaCcru+kT6euC9i2IhEAn9MpOfd8za1zKl4a9GPI14cycmt+xfBQLICAMPm1Kdy/1/14r/ZeSGN/gbxGAfhS9dmuIgc8H1ZjH2p2ZCtJaX2j34VNVYFgY+fJRa58x2hSFdqlQ5cYK2Me1qHTiyDY7I47HtzXfab95al1ecR71m3uiSqByX6BKsHzjp37MA3PTDYrNAMMXjJqd4PRSNWGmdmaVlaHUk5Q8sxGuKu+6pYz9pgEgieWeEE2vjlpYk38j/d8q7YA6opzxVk X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 11:51:08.8157 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c6b9f931-d409-4282-18fd-08deb27840fb X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: DB5PEPF00014B97.eurprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB4PR08MB9216 X-purgate-ID: tlsNG-4011c0/1778845872-7C07C8B7-8AA42EB8/0/0 X-purgate-type: clean X-purgate-size: 2100 Hi Mykola, > On 4 May 2026, at 10:19, Mykola Kvach wrote: >=20 > From: Mykola Kvach >=20 > get_llc_way_size() currently scans CLIDR_EL1 Ctype fields from the > highest level downwards and stops at the first unified cache it finds. >=20 > However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. > Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a > Ctype value of 0b000 while reading from Ctype1 upwards, no caches > manageable by the architected set/way maintenance instructions exist at > further-out levels, and the higher Ctype fields must be ignored. >=20 > The current reverse scan can therefore select a unified cache level from > a Ctype field above the first no-cache level. Such a field is not part of > the architecturally described CLIDR/CCSIDR cache hierarchy and should not > be used for selecting the CCSIDR level. >=20 > Scan Ctype fields from L1 upwards, stop at the first no-cache level, and > keep the outermost unified cache observed before that point. >=20 > This preserves the result for regular cache hierarchies, while avoiding > selection of an architecturally ignored Ctype field. >=20 > Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on ar= m64") > Signed-off-by: Mykola Kvach > --- > This patch follows the xen-devel discussion: > https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.htm= l >=20 > In that thread, Michal noted that the reverse scan was a simplification > rather than an intentional requirement, and that changing the > implementation would be fine. >=20 > Testing performed: > - standalone synthetic CLIDR tests covered both regular and pathological > Ctype sequences and showed that the forward scan ignores unified cache > levels above the first Ctype =3D=3D 0b000 while the reverse scan can pic= k > them > - Renesas H3ULCB booted with llc-coloring=3Don > --- The changes looks ok to me Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309888.1580894 (Exim 4.92) (envelope-from ) id 1wNr88-0004sa-8S; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 70baa64c-cfd1-4f20-56ea-08deb278c804 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:55.4295 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: RbomSVczeP+7bPb4H/dr0K+3jXAsJ4nDeH3xXaVOSzBjz/KHsP0sZH8Ane6LAWwfYP9Kl+kQoFf3GjaCMnverQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6926 X-purgate-ID: tlsNG-4011c0/1778846097-725748B7-3F2BA681/0/0 X-purgate-type: clean X-purgate-size: 2385 This series implements support for CPU hotplug/unplug on Arm. To achieve th= is, several things need to be done: 1. XEN_SYSCTL_CPU_HOTPLUG_* calls implemented on Arm64. 2. Enabled building of xen-hptool. 3. Migration of irqs from dying CPUs implemented. Tested on QEMU and R-Car Gen5 HW. v7->v8: * see individual patches v6->v7: * new patch "Kconfig: Make cpu hotplug configurable v5->v6: * see individual patches v4->v5: * drop merged patches * combine "smp: Move cpu_up/down helpers to common code" with=20 "arm/sysctl: Implement cpu hotplug ops" * see individual patches v3->v4: * add irq migration patches * see individual patches v2->v3: * add docs v1->v2: * see individual patches Mykyta Poturai (6): arm/irq: Keep track of irq affinities arm/irq: Migrate IRQs during CPU up/down operations Kconfig: Make cpu hotplug configurable arm/sysctl: Implement cpu hotplug ops tools: Allow building xen-hptool without CONFIG_MIGRATE docs: Document CPU hotplug docs/misc/cpu-hotplug.txt | 97 ++++++++++ tools/misc/Makefile | 8 +- tools/misc/xen-hptool-x86.c | 277 ++++++++++++++++++++++++++++ tools/misc/xen-hptool.c | 293 ++---------------------------- tools/misc/xen-hptool.h | 14 ++ xen/arch/arm/gic-vgic.c | 2 + xen/arch/arm/include/asm/irq.h | 6 + xen/arch/arm/irq.c | 69 ++++++- xen/arch/arm/smp.c | 9 + xen/arch/arm/smpboot.c | 7 + xen/arch/arm/vgic.c | 14 +- xen/arch/arm/vgic/vgic-mmio-v2.c | 11 +- xen/arch/arm/vgic/vgic.c | 21 ++- xen/arch/ppc/stubs.c | 4 + xen/arch/riscv/stubs.c | 5 + xen/arch/x86/include/asm/smp.h | 3 - xen/arch/x86/platform_hypercall.c | 12 ++ xen/arch/x86/smp.c | 35 +--- xen/arch/x86/sysctl.c | 25 ++- xen/common/Kconfig | 8 + xen/common/smp.c | 35 ++++ xen/common/sysctl.c | 42 +++++ xen/include/xen/smp.h | 4 + xen/xsm/flask/hooks.c | 2 - 24 files changed, 660 insertions(+), 343 deletions(-) create mode 100644 docs/misc/cpu-hotplug.txt create mode 100644 tools/misc/xen-hptool-x86.c create mode 100644 tools/misc/xen-hptool.h --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309889.1580899 (Exim 4.92) (envelope-from ) id 1wNr88-0004vl-G2; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4ee603f3-306f-4d06-2e97-08deb278c83e X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:55.8111 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 7VH8yQHnDiXEazKaq/MnALjWxTFEsshPBt/VlZWgTZQpJr+0+vlYBr3aeQRg2rX7guF/ew7YpfSjAJwtNX0riA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6926 X-purgate-ID: tlsNG-4011c0/1778846098-7236B8B7-D21091B9/0/0 X-purgate-type: clean X-purgate-size: 7495 Currently on Arm the desc->affinity mask of an irq is never updated, which makes it hard to know the actual affinity of an interrupt. Fix this by updating the field in irq_set_affinity. Changing desc->affinity requires desc->lock to be held, so add an assertion to ensure that callers of irq_set_affinity are doing so correctly. With desc->lock now being required for irq_set_affinity, add locking around calls to it where it was missing. Signed-off-by: Mykyta Poturai Reviewed-by: Bertrand Marquis --- v6->v7: * update commit message * fix possible locking on null desc * collect RBs v5->v6: * add missing locking around irq_set_affinity calls v4->v5: * add locking v3->v4: * patch introduced --- xen/arch/arm/gic-vgic.c | 2 ++ xen/arch/arm/irq.c | 9 +++++++-- xen/arch/arm/vgic.c | 14 ++++++++++++-- xen/arch/arm/vgic/vgic-mmio-v2.c | 11 +++++------ xen/arch/arm/vgic/vgic.c | 21 +++++++++++++-------- 5 files changed, 39 insertions(+), 18 deletions(-) diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vgic.c index fae80e6cd2..28ad4903b4 100644 --- a/xen/arch/arm/gic-vgic.c +++ b/xen/arch/arm/gic-vgic.c @@ -232,7 +232,9 @@ static void gic_update_one_lr(struct vcpu *v, int i) if ( test_bit(GIC_IRQ_GUEST_MIGRATING, &p->status) ) { struct vcpu *v_target =3D vgic_get_target_vcpu(v, irq); + spin_lock(&p->desc->lock); irq_set_affinity(p->desc, cpumask_of(v_target->processor))= ; + spin_unlock(&p->desc->lock); clear_bit(GIC_IRQ_GUEST_MIGRATING, &p->status); } } diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 73e58a5108..7204bc2b68 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -216,10 +216,15 @@ static inline struct domain *irq_get_domain(struct ir= q_desc *desc) return irq_get_guest_info(desc)->d; } =20 +/* Must be called with desc->lock held */ void irq_set_affinity(struct irq_desc *desc, const cpumask_t *mask) { - if ( desc !=3D NULL ) - desc->handler->set_affinity(desc, mask); + if ( desc =3D=3D NULL ) + return; + + ASSERT(spin_is_locked(&desc->lock)); + cpumask_copy(desc->affinity, mask); + desc->handler->set_affinity(desc, mask); } =20 int request_irq(unsigned int irq, unsigned int irqflags, diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 6647071ad4..c59f6873db 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -445,7 +445,9 @@ bool vgic_migrate_irq(struct vcpu *old, struct vcpu *ne= w, unsigned int irq) =20 if ( list_empty(&p->inflight) ) { + spin_lock(&p->desc->lock); irq_set_affinity(p->desc, cpumask_of(new->processor)); + spin_unlock(&p->desc->lock); spin_unlock_irqrestore(&old->arch.vgic.lock, flags); return true; } @@ -453,7 +455,9 @@ bool vgic_migrate_irq(struct vcpu *old, struct vcpu *ne= w, unsigned int irq) if ( !list_empty(&p->lr_queue) ) { vgic_remove_irq_from_queues(old, p); + spin_lock(&p->desc->lock); irq_set_affinity(p->desc, cpumask_of(new->processor)); + spin_unlock(&p->desc->lock); spin_unlock_irqrestore(&old->arch.vgic.lock, flags); vgic_inject_irq(new->domain, new, irq, true); return true; @@ -473,6 +477,7 @@ void arch_move_irqs(struct vcpu *v) struct domain *d =3D v->domain; struct pending_irq *p; struct vcpu *v_target; + unsigned long flags; int i; =20 /* @@ -494,7 +499,13 @@ void arch_move_irqs(struct vcpu *v) p =3D irq_to_pending(v_target, virq); =20 if ( v_target =3D=3D v && !test_bit(GIC_IRQ_GUEST_MIGRATING, &p->s= tatus) ) + { + if ( !p->desc ) + continue; + spin_lock_irqsave(&p->desc->lock, flags); irq_set_affinity(p->desc, cpu_mask); + spin_unlock_irqrestore(&p->desc->lock, flags); + } } } =20 @@ -574,8 +585,8 @@ void vgic_enable_irqs(struct vcpu *v, uint32_t r, unsig= ned int n) spin_unlock_irqrestore(&v_target->arch.vgic.lock, flags); if ( p->desc !=3D NULL ) { - irq_set_affinity(p->desc, cpumask_of(v_target->processor)); spin_lock_irqsave(&p->desc->lock, flags); + irq_set_affinity(p->desc, cpumask_of(v_target->processor)); /* * The irq cannot be a PPI, we only support delivery of SPIs * to guests. @@ -944,4 +955,3 @@ void vgic_check_inflight_irqs_pending(struct vcpu *v, u= nsigned int rank, uint32_ * indent-tabs-mode: nil * End: */ - diff --git a/xen/arch/arm/vgic/vgic-mmio-v2.c b/xen/arch/arm/vgic/vgic-mmio= -v2.c index b7c2d7ce99..fc04741ca1 100644 --- a/xen/arch/arm/vgic/vgic-mmio-v2.c +++ b/xen/arch/arm/vgic/vgic-mmio-v2.c @@ -159,24 +159,23 @@ static void vgic_mmio_write_target(struct vcpu *vcpu, for ( i =3D 0; i < len; i++ ) { struct vgic_irq *irq =3D vgic_get_irq(vcpu->domain, NULL, intid + = i); + struct irq_desc *desc =3D irq_to_desc(irq->hwintid); =20 - spin_lock_irqsave(&irq->irq_lock, flags); + spin_lock_irqsave(&desc->lock, flags); + spin_lock(&irq->irq_lock); =20 irq->targets =3D (val >> (i * 8)) & cpu_mask; if ( irq->targets ) { irq->target_vcpu =3D vcpu->domain->vcpu[ffs(irq->targets) - 1]= ; if ( irq->hw ) - { - struct irq_desc *desc =3D irq_to_desc(irq->hwintid); - irq_set_affinity(desc, cpumask_of(irq->target_vcpu->proces= sor)); - } } else irq->target_vcpu =3D NULL; =20 - spin_unlock_irqrestore(&irq->irq_lock, flags); + spin_unlock(&irq->irq_lock); + spin_unlock_irqrestore(&desc->lock, flags); vgic_put_irq(vcpu->domain, irq); } } diff --git a/xen/arch/arm/vgic/vgic.c b/xen/arch/arm/vgic/vgic.c index b2c0e1873a..1c44236c4f 100644 --- a/xen/arch/arm/vgic/vgic.c +++ b/xen/arch/arm/vgic/vgic.c @@ -812,22 +812,27 @@ void arch_move_irqs(struct vcpu *v) { struct vgic_irq *irq =3D vgic_get_irq(d, NULL, i + VGIC_NR_PRIVATE= _IRQS); unsigned long flags; + irq_desc_t *desc; =20 if ( !irq ) continue; =20 - spin_lock_irqsave(&irq->irq_lock, flags); - - /* Only hardware mapped vIRQs that are targeting this vCPU. */ - if ( irq->hw && irq->target_vcpu =3D=3D v) + if ( !irq->hw ) { - irq_desc_t *desc =3D irq_to_desc(irq->hwintid); + vgic_put_irq(d, irq); + continue; + } =20 + desc =3D irq_to_desc(irq->hwintid); + spin_lock_irqsave(&desc->lock, flags); + spin_lock(&irq->irq_lock); + + /* Only hardware mapped vIRQs that are targeting this vCPU. */ + if ( irq->target_vcpu =3D=3D v ) irq_set_affinity(desc, cpumask_of(v->processor)); - } =20 - spin_unlock_irqrestore(&irq->irq_lock, flags); - vgic_put_irq(d, irq); + spin_unlock(&irq->irq_lock); + spin_unlock_irqrestore(&desc->lock, flags); } } =20 --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309890.1580905 (Exim 4.92) (envelope-from ) id 1wNr88-0004ym-RA; Fri, 15 May 2026 11:55:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309890.1580905; Fri, 15 May 2026 11:55:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNr88-0004y3-JM; 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b=ogQHrI0t0C+4Pzkr508gXqPpaZVHFssvZ27UiQtMREmwKYDd1nYzmwobL96Vk/V0ThBUF/ZECHrHrTb/8gG7G0leWYxX2tbYfaV92Su1PU8c4lO1zNl7dNz1Dn55IMESzLJwT9hnKjdNBIdUKlecl+4fI3CV7kz5aOf28smt9GlfIUxoDX5eB8aFqaeeR6Jv7C+HvwGwI58AqgbwVLcw+urrFC2qsA55wDQZSuBenIMtcQIEexaulMSnG3l0z2qsVm11/RHuxpzvnYhXs3CmdWgobAHpZ5szq9E/UmvYQlDx/2iZiZW4rKJo932lwRGZw8ELowlq8dkJGDbXSRV6ig== From: Mykyta Poturai To: "xen-devel@lists.xenproject.org" CC: Mykyta Poturai , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v8 2/6] arm/irq: Migrate IRQs during CPU up/down operations Thread-Topic: [PATCH v8 2/6] arm/irq: Migrate IRQs during CPU up/down operations Thread-Index: AQHc5GGlK0DQjFAl6k27RpjLW7wtUQ== Date: Fri, 15 May 2026 11:54:56 +0000 Message-ID: <664ea82ceb9890d421b201c8963dd164aa1d81c7.1778845596.git.mykyta_poturai@epam.com> References: In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5c592cc3-aa6c-4f8c-f0dc-08deb278c870 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:56.1661 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: pSGkombaLSxW5NLWBxNQYfpLtYHi/eE5Tqem/zfcHp2Bw2EQQRq0hvnQxEhZuEG5tmjC/RNJ8rakvNONEIsbkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6926 X-purgate-ID: tlsNG-4011c0/1778846098-7F1948B7-B4EECD98/0/0 X-purgate-type: clean X-purgate-size: 4850 Move IRQs from dying CPU to the online ones when a CPU is getting offlined. When onlining, rebalance all IRQs in a round-robin fashion. Guest-bound IRQs are already handled by scheduler in the process of moving vCPUs to active pCPUs, so we only need to handle IRQs used by Xen itself. Signed-off-by: Mykyta Poturai --- v7->v8: * check only existings ESPIs v6->v7: * replace ifdef with IS_ENABLED v5->v6: * don't do any balancing on boot * only do balancing when cpu hotplug is enabled v4->v5: * handle CPU onlining as well * more comments * fix crash when ESPI is disabled * don't assume CPU 0 is a boot CPU * use insigned int for irq number * remove assumption that all irqs a bound to CPU 0 by default from the commit message v3->v4: * patch introduced --- xen/arch/arm/include/asm/irq.h | 6 ++++ xen/arch/arm/irq.c | 60 ++++++++++++++++++++++++++++++++++ xen/arch/arm/smpboot.c | 7 ++++ 3 files changed, 73 insertions(+) diff --git a/xen/arch/arm/include/asm/irq.h b/xen/arch/arm/include/asm/irq.= h index 09788dbfeb..3ed55e02c3 100644 --- a/xen/arch/arm/include/asm/irq.h +++ b/xen/arch/arm/include/asm/irq.h @@ -126,6 +126,12 @@ bool irq_type_set_by_domain(const struct domain *d); void irq_end_none(struct irq_desc *irq); #define irq_end_none irq_end_none =20 +#ifdef CONFIG_CPU_HOTPLUG +void rebalance_irqs(unsigned int from, bool up); +#else +static inline void rebalance_irqs(unsigned int from, bool up) {} +#endif + #endif /* _ASM_HW_IRQ_H */ /* * Local variables: diff --git a/xen/arch/arm/irq.c b/xen/arch/arm/irq.c index 7204bc2b68..44df7efd6b 100644 --- a/xen/arch/arm/irq.c +++ b/xen/arch/arm/irq.c @@ -158,6 +158,61 @@ static int init_local_irq_data(unsigned int cpu) return 0; } =20 +#ifdef CONFIG_CPU_HOTPLUG +static int cpu_next; + +static void balance_irq(int irq, unsigned int from, bool up) +{ + struct irq_desc *desc =3D irq_to_desc(irq); + unsigned long flags; + + ASSERT(!cpumask_empty(&cpu_online_map)); + + spin_lock_irqsave(&desc->lock, flags); + if ( likely(!desc->action) ) + goto out; + + if ( likely(test_bit(_IRQ_GUEST, &desc->status) || + test_bit(_IRQ_MOVE_PENDING, &desc->status)) ) + goto out; + + /* + * Setting affinity to a mask of multiple CPUs causes the GIC drivers = to + * select one CPU from that mask. If the dying CPU was included in the= IRQ's + * affinity mask, we cannot determine exactly which CPU the interrupt = is + * currently routed to, as GIC drivers lack a concrete get_affinity AP= I. So + * to be safe we must reroute it to a new, definitely online, CPU. In = the + * case of CPU going down, we move only the interrupt that could resid= e on + * it. Otherwise, we rearrange all interrupts in a round-robin fashion= . + */ + if ( !up && !cpumask_test_cpu(from, desc->affinity) ) + goto out; + + cpu_next =3D cpumask_cycle(cpu_next, &cpu_online_map); + irq_set_affinity(desc, cpumask_of(cpu_next)); + +out: + spin_unlock_irqrestore(&desc->lock, flags); +} + +void rebalance_irqs(unsigned int from, bool up) +{ + int irq; + + if ( cpumask_empty(&cpu_online_map) ) + return; + + for ( irq =3D NR_LOCAL_IRQS; irq < NR_IRQS; irq++ ) + balance_irq(irq, from, up); + +#ifdef CONFIG_GICV3_ESPI + for ( irq =3D ESPI_BASE_INTID; irq < ESPI_BASE_INTID + gic_number_espi= s(); + irq++ ) + balance_irq(irq, from, up); +#endif +} +#endif /* CONFIG_CPU_HOTPLUG */ + static int cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) { @@ -172,6 +227,11 @@ static int cpu_callback(struct notifier_block *nfb, un= signed long action, printk(XENLOG_ERR "Unable to allocate local IRQ for CPU%u\n", cpu); break; + case CPU_ONLINE: + if ( IS_ENABLED(CONFIG_CPU_HOTPLUG) && + system_state >=3D SYS_STATE_active ) + rebalance_irqs(cpu, true); + break; } =20 return notifier_from_errno(rc); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 7f3cfa812e..7d877179c0 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -425,6 +425,13 @@ void __cpu_disable(void) =20 smp_mb(); =20 + /* + * Now that the interrupts are cleared and the CPU marked as offline, + * move interrupts out of it + */ + if ( IS_ENABLED(CONFIG_CPU_HOTPLUG) ) + rebalance_irqs(cpu, false); + /* Return to caller; eventually the IPI mechanism will unwind and the= =20 * scheduler will drop to the idle loop, which will call stop_cpu(). *= / } --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309891.1580909 (Exim 4.92) (envelope-from ) id 1wNr89-00056o-5j; Fri, 15 May 2026 11:55:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309891.1580909; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 34844db3-f29f-4267-c1ba-08deb278c8a1 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:56.4896 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: wDvD/2sxQ2a9hMIN7H3whw4EPhPCOQHd17BnlX88ZgCNYF8wRzjB+Rgccw1riB8fkoZ3Nu75gEHi64vwmK15rA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR03MB6926 X-purgate-ID: tlsNG-4011c0/1778846098-7CA798B7-9CD0E7F2/0/0 X-purgate-type: clean X-purgate-size: 3571 For the purposes of certification, we want as little code as possible to be unconditionally compiled in. Make CPU hotplug and SMT operations configurable to ease the process. This will also help with introducing CPU hotplug on Arm, where it needs to be configurable. Signed-off-by: Mykyta Poturai --- v7->v8: * fix style * s/CPU_HOTPLUG/CPU_ONLINE_OFFLINE/ v6->v7: * new patch --- xen/arch/x86/platform_hypercall.c | 12 ++++++++++++ xen/arch/x86/smp.c | 3 +++ xen/arch/x86/sysctl.c | 12 ++++++++++++ xen/common/Kconfig | 8 ++++++++ 4 files changed, 35 insertions(+) diff --git a/xen/arch/x86/platform_hypercall.c b/xen/arch/x86/platform_hype= rcall.c index 0431f875af..3f6789c8b7 100644 --- a/xen/arch/x86/platform_hypercall.c +++ b/xen/arch/x86/platform_hypercall.c @@ -735,6 +735,12 @@ ret_t do_platform_op( { int cpu =3D op->u.cpu_ol.cpuid; =20 + if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) + { + ret =3D -EOPNOTSUPP; + break; + } + ret =3D xsm_resource_plug_core(XSM_HOOK); if ( ret ) break; @@ -761,6 +767,12 @@ ret_t do_platform_op( { int cpu =3D op->u.cpu_ol.cpuid; =20 + if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) + { + ret =3D -EOPNOTSUPP; + break; + } + ret =3D xsm_resource_unplug_core(XSM_HOOK); if ( ret ) break; diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 7936294f5f..9046c826f8 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -418,6 +418,7 @@ void cf_check call_function_interrupt(void) smp_call_function_interrupt(); } =20 +#ifdef CONFIG_CPU_ONLINE_OFFLINE long cf_check cpu_up_helper(void *data) { unsigned int cpu =3D (unsigned long)data; @@ -445,8 +446,10 @@ long cf_check cpu_down_helper(void *data) { int cpu =3D (unsigned long)data; int ret =3D cpu_down(cpu); + /* Have one more go on EBUSY. */ if ( ret =3D=3D -EBUSY ) ret =3D cpu_down(cpu); return ret; } +#endif diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 0fbbdd8b28..1d0857b502 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -53,6 +53,12 @@ static long cf_check smt_up_down_helper(void *data) unsigned int cpu, sibling_mask =3D boot_cpu_data.x86_num_siblings - 1; int ret =3D 0; =20 + if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) + { + ASSERT_UNREACHABLE(); + return -EOPNOTSUPP; + } + opt_smt =3D up; =20 for_each_present_cpu ( cpu ) @@ -121,6 +127,12 @@ long arch_do_sysctl( long (*fn)(void *data); void *hcpu; =20 + if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) + { + ret =3D -EOPNOTSUPP; + break; + } + switch ( op ) { case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 0a20aa0a12..9fc53fde48 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -636,6 +636,14 @@ config SYSTEM_SUSPEND =20 If unsure, say N. =20 +config CPU_ONLINE_OFFLINE + bool "CPU online/offline support" + depends on X86 + default y + help + Enable support for bringing CPUs online and offline at runtime. On + X86 this is required for disabling SMT. + menu "Supported hypercall interfaces" visible if EXPERT =20 --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309892.1580930 (Exim 4.92) (envelope-from ) id 1wNr8B-0005mY-SF; Fri, 15 May 2026 11:55:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309892.1580930; Fri, 15 May 2026 11:55:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNr8B-0005mP-Nk; Fri, 15 May 2026 11:55:03 +0000 Received: by outflank-mailman (input) for mailman id 1309892; Fri, 15 May 2026 11:55:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNr88-0004sR-7a for xen-devel@lists.xenproject.org; Fri, 15 May 2026 11:55:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNr87-006N3i-Jt for xen-devel@lists.xenproject.org; Fri, 15 May 2026 13:54:59 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a07098e-bab6-0a2a0a5309dd-0a2a450ce7ce-16 for ; Fri, 15 May 2026 13:54:59 +0200 Received: from [52.101.66.95] (helo=DUZPR83CU001.outbound.protection.outlook.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a070993-62f1-0a2a450c0019-3465425fdad9-3 for ; Fri, 15 May 2026 13:54:59 +0200 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com (2603:10a6:102:30d::12) by PAWPR03MB10041.eurprd03.prod.outlook.com (2603:10a6:102:359::6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9913.12; Fri, 15 May 2026 11:54:57 +0000 Received: from PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb]) by PAVPR03MB10102.eurprd03.prod.outlook.com ([fe80::b8c6:f37a:987a:beb%5]) with mapi id 15.20.9913.009; Fri, 15 May 2026 11:54:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=epam.com header.i="@epam.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:x-ms-exchange-senderadcheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=enfz1r+A15bXfyLnYX15d67jorGSZMCqDatlkUGoae+RivOvcA3P1ZND+By+XXgeqvEigM+vnR52HdjljAbX3Xgiz7zAHHQh+Vv2izLMXy7rOPBqXkVCLEm1WbB/cTtoOwU3GrQVVw4MqDOBZ6mEX4whozoGNL58YrLWRncdoPmzcsniKC5Ae0na7anFf3d3L+62Uanej/SeNf9WpVwesXFQW4TaPjfdR8p84NUZO85kZhvdOJ/hijnMoCX31Z3zUPXxxK0Qrwo4EGkdAHGLWjeDJlSxTkKyg+VXokG/3Uh6tGRKtaXakoZHiXKnMcBkp9vkzDdgzs7Kp21gHrvk2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gvITBzfviWpLjYTwWhEQQ0njuortD3PdC0Fl/d0a490=; b=YtKMgkEiOWyzu5dJarAXEmZYMC/djMGcFy2KgP5R6Ud8gnkO7qhBRvAfzsiZj8EPwkKJnVprq7JC/IJBVAsVlAjlVsu+k2MYM98pN62Z0CV96exNNtuDwun6Do30fXI/GGdg0xVr9hjJ1BjDLKURYifLm/NJQWBTxSTrLRhIUz2qNX0UJFPPBD5wDxyAD+m7V7pE62PvaCoKMBcuT6165fwJqfKlSUBW4kOduVBxT4sAiWkLFBLBFvj8Y2cDZ+vF65TpFQOSkAqqfipe/L05P9o7czFIVFhmDgYcdqx7bP/OfaYSDWGDzCpAGusX/inkbZuLx4KOlKSnI2lI/8QovA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=epam.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=gvITBzfviWpLjYTwWhEQQ0njuortD3PdC0Fl/d0a490=; b=T6wymfmj3/BSMTExzjdLyHiKtcGy5xwL61KZDe+YR3UJxBdKSA/tYAcxRrgLxYKylme9C/Frn2taNCewLRBbVvfuNI6GcPiIipNhUN3dkuzpYW+ad+yoUNAJW6kw1oPX6w6JAGBikJPx0JfrkgEkDaFGu2Mb1vvX5IWkzMSnIU7xuUvTwSsOBRVG1A0F1bB6Zp61F378B5gG9MbScWKC4ztHLOEF71ZKsc1Cchw40xrCKFWaWo9cptRj+UXPpzJh8smxioaiyKcuvWHbSuiSxD1NyKY8hU4jazcm6ojJWvwdTOxp8RYPQKfZ7qiFhK270ArZgHl9B2SaGMXnkNxcgg== From: Mykyta Poturai To: "xen-devel@lists.xenproject.org" CC: Mykyta Poturai , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?iso-8859-1?Q?Roger_Pau_Monn=E9?= , Timothy Pearson , Alistair Francis , Connor Davis , Oleksii Kurochko , Teddy Astie , "Daniel P. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 95452295-8d7c-4470-96ea-08deb278c8ee X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:56.9040 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: DAC9miL50YGTAZN4wHdnLXlqmrrnhjmL+RvzJYvjw50oe4HI0Vrk3tEminoZp80aTH/XCnGR+6T6tVE+CxLFrg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB10041 X-purgate-ID: tlsNG-d25034/1778846099-F5784CF5-F899FB53/0/0 X-purgate-type: clean X-purgate-size: 10700 SMT-disable enforcement check is moved into a separate architecture-specific function. For now this operations only support Arm64. For proper Arm32 support, there needs to be a mechanism to free per-cpu page tables, allocated in init_domheap_mappings. Also, hotplug is not supported if ITS enabled, and partially supported FFA, or TEE is enabled, as they use non-static IRQ actions. Remove ifdef guards for x86 in flask, as cpu hotplug is now supported on more architectures. Signed-off-by: Mykyta Poturai --- v7->v8: * simplify dependencies of config CPU_ONLINE_OFFLINE v6->v7: * use IS_ENABLED istead of ifdef in more places * remove unneded variables * more explicit fallthrough in do_sysctl v5->v6: * fix style issues * rename arch_smt_cpu_disable -> arch_cpu_can_stay_online and invert the logic * use IS_ENABLED istead of ifdef * remove explicit list af arch-specific SYSCTL_CPU_HOTPLUG_* options from the common handler * fix flask issue v4->v5: * move handling to common code * rename config to CPU_HOTPUG * merge with "smp: Move cpu_up/down helpers to common code" v3->v4: * don't reimplement cpu_up/down helpers * add Kconfig option * fixup formatting v2->v3: * no changes v1->v2: * remove SMT ops * remove cpu =3D=3D 0 checks * add XSM hooks * only implement for 64bit Arm Signed-off-by: Mykyta Poturai --- xen/arch/arm/smp.c | 9 ++++++++ xen/arch/ppc/stubs.c | 4 ++++ xen/arch/riscv/stubs.c | 5 ++++ xen/arch/x86/include/asm/smp.h | 3 --- xen/arch/x86/smp.c | 34 +++------------------------ xen/arch/x86/sysctl.c | 13 ++++------- xen/common/Kconfig | 6 ++--- xen/common/smp.c | 35 ++++++++++++++++++++++++++++ xen/common/sysctl.c | 42 ++++++++++++++++++++++++++++++++++ xen/include/xen/smp.h | 4 ++++ xen/xsm/flask/hooks.c | 2 -- 11 files changed, 109 insertions(+), 48 deletions(-) diff --git a/xen/arch/arm/smp.c b/xen/arch/arm/smp.c index b372472188..0ea64d2ee1 100644 --- a/xen/arch/arm/smp.c +++ b/xen/arch/arm/smp.c @@ -44,6 +44,15 @@ void smp_send_call_function_mask(const cpumask_t *mask) } } =20 +/* + * We currently don't support SMT on ARM so we don't need any special logi= c for + * CPU disabling + */ +inline bool arch_cpu_can_stay_online(unsigned int cpu) +{ + return true; +} + /* * Local variables: * mode: C diff --git a/xen/arch/ppc/stubs.c b/xen/arch/ppc/stubs.c index a333f06119..8f280ba080 100644 --- a/xen/arch/ppc/stubs.c +++ b/xen/arch/ppc/stubs.c @@ -101,6 +101,10 @@ void smp_send_call_function_mask(const cpumask_t *mask= ) BUG_ON("unimplemented"); } =20 +bool arch_cpu_can_stay_online(unsigned int cpu) +{ + BUG_ON("unimplemented"); +} /* irq.c */ =20 void irq_ack_none(struct irq_desc *desc) diff --git a/xen/arch/riscv/stubs.c b/xen/arch/riscv/stubs.c index acbb5b9123..e051f0fb3f 100644 --- a/xen/arch/riscv/stubs.c +++ b/xen/arch/riscv/stubs.c @@ -65,6 +65,11 @@ void smp_send_call_function_mask(const cpumask_t *mask) BUG_ON("unimplemented"); } =20 +bool arch_cpu_can_stay_online(unsigned int cpu) +{ + BUG_ON("unimplemented"); +} + /* irq.c */ =20 void irq_ack_none(struct irq_desc *desc) diff --git a/xen/arch/x86/include/asm/smp.h b/xen/arch/x86/include/asm/smp.= h index 3f16e62696..cb3e0fed19 100644 --- a/xen/arch/x86/include/asm/smp.h +++ b/xen/arch/x86/include/asm/smp.h @@ -50,9 +50,6 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t = pxm); =20 void __stop_this_cpu(void); =20 -long cf_check cpu_up_helper(void *data); -long cf_check cpu_down_helper(void *data); - long cf_check core_parking_helper(void *data); bool core_parking_remove(unsigned int cpu); uint32_t get_cur_idle_nums(void); diff --git a/xen/arch/x86/smp.c b/xen/arch/x86/smp.c index 9046c826f8..caf4411705 100644 --- a/xen/arch/x86/smp.c +++ b/xen/arch/x86/smp.c @@ -419,37 +419,9 @@ void cf_check call_function_interrupt(void) } =20 #ifdef CONFIG_CPU_ONLINE_OFFLINE -long cf_check cpu_up_helper(void *data) +bool arch_cpu_can_stay_online(unsigned int cpu) { - unsigned int cpu =3D (unsigned long)data; - int ret =3D cpu_up(cpu); - - /* Have one more go on EBUSY. */ - if ( ret =3D=3D -EBUSY ) - ret =3D cpu_up(cpu); - - if ( !ret && !opt_smt && - cpu_data[cpu].compute_unit_id =3D=3D INVALID_CUID && - cpumask_weight(per_cpu(cpu_sibling_mask, cpu)) > 1 ) - { - ret =3D cpu_down_helper(data); - if ( ret ) - printk("Could not re-offline CPU%u (%d)\n", cpu, ret); - else - ret =3D -EPERM; - } - - return ret; -} - -long cf_check cpu_down_helper(void *data) -{ - int cpu =3D (unsigned long)data; - int ret =3D cpu_down(cpu); - - /* Have one more go on EBUSY. */ - if ( ret =3D=3D -EBUSY ) - ret =3D cpu_down(cpu); - return ret; + return opt_smt || cpu_data[cpu].compute_unit_id !=3D INVALID_CUID || + cpumask_weight(per_cpu(cpu_sibling_mask, cpu)) <=3D 1; } #endif diff --git a/xen/arch/x86/sysctl.c b/xen/arch/x86/sysctl.c index 1d0857b502..7a88ec7d7b 100644 --- a/xen/arch/x86/sysctl.c +++ b/xen/arch/x86/sysctl.c @@ -121,7 +121,6 @@ long arch_do_sysctl( =20 case XEN_SYSCTL_cpu_hotplug: { - unsigned int cpu =3D sysctl->u.cpu_hotplug.cpu; unsigned int op =3D sysctl->u.cpu_hotplug.op; bool plug; long (*fn)(void *data); @@ -129,6 +128,7 @@ long arch_do_sysctl( =20 if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) { + ASSERT_UNREACHABLE(); ret =3D -EOPNOTSUPP; break; } @@ -136,15 +136,10 @@ long arch_do_sysctl( switch ( op ) { case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: - plug =3D true; - fn =3D cpu_up_helper; - hcpu =3D _p(cpu); - break; - case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: - plug =3D false; - fn =3D cpu_down_helper; - hcpu =3D _p(cpu); + /* Handled by common code */ + ASSERT_UNREACHABLE(); + ret =3D -EOPNOTSUPP; break; =20 case XEN_SYSCTL_CPU_HOTPLUG_SMT_ENABLE: diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 9fc53fde48..d0b8aa8d1c 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -637,9 +637,9 @@ config SYSTEM_SUSPEND If unsure, say N. =20 config CPU_ONLINE_OFFLINE - bool "CPU online/offline support" - depends on X86 - default y + bool "CPU online/offline support" if EXPERT + depends on X86 || (ARM_64 && !HAS_ITS) + default X86 help Enable support for bringing CPUs online and offline at runtime. On X86 this is required for disabling SMT. diff --git a/xen/common/smp.c b/xen/common/smp.c index a011f541f1..16f4ed2d4e 100644 --- a/xen/common/smp.c +++ b/xen/common/smp.c @@ -16,6 +16,7 @@ * GNU General Public License for more details. */ =20 +#include #include #include #include @@ -104,6 +105,40 @@ void smp_call_function_interrupt(void) irq_exit(); } =20 +#ifdef CONFIG_CPU_ONLINE_OFFLINE +long cf_check cpu_up_helper(void *data) +{ + unsigned int cpu =3D (unsigned long)data; + int ret =3D cpu_up(cpu); + + /* Have one more go on EBUSY. */ + if ( ret =3D=3D -EBUSY ) + ret =3D cpu_up(cpu); + + if ( !ret && !arch_cpu_can_stay_online(cpu) ) + { + ret =3D cpu_down_helper(data); + if ( ret ) + printk("Could not re-offline CPU%u (%d)\n", cpu, ret); + else + ret =3D -EPERM; + } + + return ret; +} + +long cf_check cpu_down_helper(void *data) +{ + unsigned int cpu =3D (unsigned long)data; + int ret =3D cpu_down(cpu); + + /* Have one more go on EBUSY. */ + if ( ret =3D=3D -EBUSY ) + ret =3D cpu_down(cpu); + return ret; +} +#endif /* CONFIG_CPU_ONLINE_OFFLINE */ + /* * Local variables: * mode: C diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c index 5207664252..f06aecb6f6 100644 --- a/xen/common/sysctl.c +++ b/xen/common/sysctl.c @@ -483,6 +483,48 @@ long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_= sysctl) copyback =3D 1; break; =20 + case XEN_SYSCTL_cpu_hotplug: + { + unsigned int hp_op =3D op->u.cpu_hotplug.op; + bool plug; + long (*fn)(void *data); + void *hcpu =3D _p(op->u.cpu_hotplug.cpu); + + ret =3D -EOPNOTSUPP; + if ( !IS_ENABLED(CONFIG_CPU_ONLINE_OFFLINE) ) + break; + + switch ( hp_op ) + { + case XEN_SYSCTL_CPU_HOTPLUG_ONLINE: + plug =3D true; + fn =3D cpu_up_helper; + break; + + case XEN_SYSCTL_CPU_HOTPLUG_OFFLINE: + plug =3D false; + fn =3D cpu_down_helper; + break; + + default: + fn =3D NULL; + break; + } + + if ( fn ) + { + ret =3D plug ? xsm_resource_plug_core(XSM_HOOK) + : xsm_resource_unplug_core(XSM_HOOK); + + if ( !ret ) + ret =3D continue_hypercall_on_cpu(0, fn, hcpu); + + break; + } + } + + /* Use the arch handler for cases not handled here */ + fallthrough; default: ret =3D arch_do_sysctl(op, u_sysctl); copyback =3D 0; diff --git a/xen/include/xen/smp.h b/xen/include/xen/smp.h index 2ca9ff1bfc..04530738c9 100644 --- a/xen/include/xen/smp.h +++ b/xen/include/xen/smp.h @@ -76,4 +76,8 @@ extern void *stack_base[NR_CPUS]; void initialize_cpu_data(unsigned int cpu); int setup_cpu_root_pgt(unsigned int cpu); =20 +bool arch_cpu_can_stay_online(unsigned int cpu); +long cf_check cpu_up_helper(void *data); +long cf_check cpu_down_helper(void *data); + #endif /* __XEN_SMP_H__ */ diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 28522dcbd2..4ee68231ce 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -835,9 +835,7 @@ static int cf_check flask_sysctl(int cmd) case XEN_SYSCTL_getdomaininfolist: case XEN_SYSCTL_page_offline_op: case XEN_SYSCTL_scheduler_op: -#ifdef CONFIG_X86 case XEN_SYSCTL_cpu_hotplug: -#endif return 0; =20 case XEN_SYSCTL_tbuf_op: --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 11:55:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 11:55:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309893.1580936 (Exim 4.92) (envelope-from ) id 1wNr8C-0005q6-7i; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 971da0c4-8372-455f-daec-08deb278c94b X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:54:57.2987 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: Em5Z4175Po9cYd5nT6hZFmLNrY35+Hjjdlm+jA01GOrlA6k4hZLo9CEePTu2VNKqG0ccAN8uivs+rnscxIMGLA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB10041 X-purgate-ID: tlsNG-d25034/1778846099-F5983CF5-4968DD1C/0/0 X-purgate-type: clean X-purgate-size: 24276 With CPU hotplug sysctls implemented on Arm it becomes useful to have a tool for calling them. According to the commit history it seems that putting hptool under config MIGRATE was a measure to fix IA64 build. As IA64 is no longer supported it can now be brought back. So build it unconditionally. Operations specific to x86 architecture are moved into a separate file and = only built on x86. Signed-off-by: Mykyta Poturai --- v7->v8: * move x86 specific function into a separate file v6->v7: * no changes v5->v6: * don't change order in Makefile v4->v5: * make hptool always build v3->v4: * no changes v2->v3: * no changes v1->v2: * switch to configure from legacy config --- tools/misc/Makefile | 8 +- tools/misc/xen-hptool-x86.c | 277 ++++++++++++++++++++++++++++++++++ tools/misc/xen-hptool.c | 293 ++---------------------------------- tools/misc/xen-hptool.h | 14 ++ 4 files changed, 311 insertions(+), 281 deletions(-) create mode 100644 tools/misc/xen-hptool-x86.c create mode 100644 tools/misc/xen-hptool.h diff --git a/tools/misc/Makefile b/tools/misc/Makefile index 6ee783f43e..645819e455 100644 --- a/tools/misc/Makefile +++ b/tools/misc/Makefile @@ -16,7 +16,7 @@ INSTALL_BIN +=3D xencov_split INSTALL_BIN +=3D $(INSTALL_BIN-y) =20 # Everything to be installed in regular sbin/ -INSTALL_SBIN-$(CONFIG_MIGRATE) +=3D xen-hptool +INSTALL_SBIN +=3D xen-hptool INSTALL_SBIN-$(CONFIG_X86) +=3D xen-hvmcrash INSTALL_SBIN-$(CONFIG_X86) +=3D xen-hvmctx INSTALL_SBIN-$(CONFIG_X86) +=3D xen-lowmemd @@ -104,8 +104,10 @@ xenhypfs: xenhypfs.o xenlockprof: xenlockprof.o $(CC) $(LDFLAGS) -o $@ $< $(LDLIBS_libxenctrl) $(APPEND_LDFLAGS) =20 -xen-hptool: xen-hptool.o - $(CC) $(LDFLAGS) -o $@ $< $(LDLIBS_libxenevtchn) $(LDLIBS_libxenctrl) $(L= DLIBS_libxenguest) $(LDLIBS_libxenstore) $(APPEND_LDFLAGS) +HPTOOL_OBJS-$(CONFIG_MIGRATE) +=3D xen-hptool-x86.o + +xen-hptool: xen-hptool.o $(HPTOOL_OBJS-y) + $(CC) $(LDFLAGS) -o $@ $^ $(LDLIBS_libxenevtchn) $(LDLIBS_libxenctrl) $(L= DLIBS_libxenguest) $(LDLIBS_libxenstore) $(APPEND_LDFLAGS) =20 xenhypfs.o: CFLAGS +=3D $(CFLAGS_libxenhypfs) =20 diff --git a/tools/misc/xen-hptool-x86.c b/tools/misc/xen-hptool-x86.c new file mode 100644 index 0000000000..9336f30f1f --- /dev/null +++ b/tools/misc/xen-hptool-x86.c @@ -0,0 +1,277 @@ +#include +#include +#include +#include +#include +#include +#include +#include "xen-hptool.h" + +int hp_mem_online_func(int argc, char *argv[], xc_interface *xch) +{ + uint32_t status; + int ret; + unsigned long mfn; + + if (argc !=3D 1) + { + show_help(); + return -1; + } + + sscanf(argv[0], "%lx", &mfn); + printf("Prepare to online MEMORY mfn %lx\n", mfn); + + ret =3D xc_mark_page_online(xch, mfn, mfn, &status); + + if (ret < 0) + fprintf(stderr, "Onlining page mfn %lx failed, error %x\n", mfn, e= rrno); + else if (status & (PG_ONLINE_FAILED |PG_ONLINE_BROKEN)) { + fprintf(stderr, "Onlining page mfn %lx is broken, " + "Memory online failed\n", mfn); + ret =3D -1; + } + else if (status & PG_ONLINE_ONLINED) + printf("Memory mfn %lx onlined successfully\n", mfn); + else + printf("Memory is already onlined!\n"); + + return ret; +} + +int hp_mem_query_func(int argc, char *argv[], xc_interface *xch) +{ + uint32_t status; + int ret; + unsigned long mfn; + + if (argc !=3D 1) + { + show_help(); + return -1; + } + + sscanf(argv[0], "%lx", &mfn); + printf("Querying MEMORY mfn %lx status\n", mfn); + ret =3D xc_query_page_offline_status(xch, mfn, mfn, &status); + + if (ret < 0) + fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn, e= rrno); + else + { + printf("Memory Status %x: [", status); + if ( status & PG_OFFLINE_STATUS_OFFLINE_PENDING) + printf(" PAGE_OFFLINE_PENDING "); + if ( status & PG_OFFLINE_STATUS_BROKEN ) + printf(" PAGE_BROKEND "); + if ( status & PG_OFFLINE_STATUS_OFFLINED ) + printf(" PAGE_OFFLINED "); + else + printf(" PAGE_ONLINED "); + printf("]\n"); + } + + return ret; +} + +static int suspend_guest(xc_interface *xch, xenevtchn_handle *xce, int dom= id, + int *evtchn, int *lockfd) +{ + int port, rc, suspend_evtchn =3D -1; + + *lockfd =3D -1; + + if (!evtchn) + return -1; + + port =3D xs_suspend_evtchn_port(domid); + if (port < 0) + { + fprintf(stderr, "DOM%d: No suspend port, try live migration\n", do= mid); + goto failed; + } + suspend_evtchn =3D xc_suspend_evtchn_init_exclusive(xch, xce, domid, + port, lockfd); + if (suspend_evtchn < 0) + { + fprintf(stderr, "Suspend evtchn initialization failed\n"); + goto failed; + } + *evtchn =3D suspend_evtchn; + + rc =3D xenevtchn_notify(xce, suspend_evtchn); + if (rc < 0) + { + fprintf(stderr, "Failed to notify suspend channel: errno %d\n", rc= ); + goto failed; + } + if (xc_await_suspend(xch, xce, suspend_evtchn) < 0) + { + fprintf(stderr, "Suspend Failed\n"); + goto failed; + } + return 0; + +failed: + if (suspend_evtchn !=3D -1) + xc_suspend_evtchn_release(xch, xce, domid, + suspend_evtchn, lockfd); + + return -1; +} + +int hp_mem_offline_func(int argc, char *argv[], xc_interface *xch) +{ + uint32_t status, domid; + int ret; + unsigned long mfn; + + if (argc !=3D 1) + { + show_help(); + return -1; + } + + sscanf(argv[0], "%lx", &mfn); + printf("Prepare to offline MEMORY mfn %lx\n", mfn); + ret =3D xc_mark_page_offline(xch, mfn, mfn, &status); + if (ret < 0) { + fprintf(stderr, "Offlining page mfn %lx failed, error %x\n", mfn, = errno); + if (status & (PG_OFFLINE_XENPAGE | PG_OFFLINE_FAILED)) + fprintf(stderr, "XEN_PAGE is not permitted be offlined\n"); + else if (status & (PG_OFFLINE_FAILED | PG_OFFLINE_NOT_CONV_RAM)) + fprintf(stderr, "RESERVED RAM is not permitted to be offlined\= n"); + } + else + { + switch(status & PG_OFFLINE_STATUS_MASK) + { + case PG_OFFLINE_OFFLINED: + { + printf("Memory mfn %lx offlined successfully, current stat= e is" + " [PG_OFFLINE_OFFLINED]\n", mfn); + if (status & PG_OFFLINE_BROKEN) + printf("And this offlined PAGE is already marked broke= n" + " before!\n"); + break; + } + case PG_OFFLINE_FAILED: + { + fprintf(stderr, "Memory mfn %lx offline failed\n", mfn); + if ( status & PG_OFFLINE_ANONYMOUS) + fprintf(stderr, "the memory is an anonymous page!\n"); + ret =3D -1; + break; + } + case PG_OFFLINE_PENDING: + { + if (status & PG_OFFLINE_XENPAGE) { + ret =3D -1; + fprintf(stderr, "Memory mfn %lx offlined succssefully,= " + "this page is xen page, current state is" + " [PG_OFFLINE_PENDING, PG_OFFLINE_XENPAGE]\n",= mfn); + } + else if (status & PG_OFFLINE_OWNED) + { + int result, suspend_evtchn =3D -1, suspend_lockfd =3D = -1; + xenevtchn_handle *xce; + xce =3D xenevtchn_open(NULL, 0); + + if (xce =3D=3D NULL) + { + fprintf(stderr, "When exchange page, fail" + " to open evtchn\n"); + return -1; + } + + domid =3D status >> PG_OFFLINE_OWNER_SHIFT; + if (suspend_guest(xch, xce, domid, + &suspend_evtchn, &suspend_lockfd)) + { + fprintf(stderr, "Failed to suspend guest %d for" + " mfn %lx\n", domid, mfn); + xenevtchn_close(xce); + return -1; + } + + result =3D xc_exchange_page(xch, domid, mfn); + + /* Exchange page successfully */ + if (result =3D=3D 0) + printf("Memory mfn %lx offlined successfully, this= " + "page is DOM%d page and being swapped " + "successfully, current state is " + "[PG_OFFLINE_OFFLINED, PG_OFFLINE_OWNED]\n= ", + mfn, domid); + else { + ret =3D -1; + fprintf(stderr, "Memory mfn %lx offlined successfu= lly" + " , this page is DOM%d page yet failed to = be " + "exchanged. current state is " + "[PG_OFFLINE_PENDING, PG_OFFLINE_OWNED]\n"= , + mfn, domid); + } + xc_domain_resume(xch, domid, 1); + xc_suspend_evtchn_release(xch, xce, domid, + suspend_evtchn, &suspend_loc= kfd); + xenevtchn_close(xce); + } + break; + } + }//end of switch + }//end of if + + return ret; +} + +int main_smt_enable(int argc, char *argv[], xc_interface *xch) +{ + int ret; + + if ( argc ) + { + show_help(); + return -1; + } + + for ( ;; ) + { + ret =3D xc_smt_enable(xch); + if ( (ret >=3D 0) || (errno !=3D EBUSY) ) + break; + } + + if ( ret < 0 ) + fprintf(stderr, "Unable to enable SMT: errno %d, %s\n", + errno, strerror(errno)); + else + printf("Enabled SMT\n"); + + return ret; +} + +int main_smt_disable(int argc, char *argv[], xc_interface *xch) +{ + int ret; + + if ( argc ) + { + show_help(); + return -1; + } + + for ( ;; ) + { + ret =3D xc_smt_disable(xch); + if ( (ret >=3D 0) || (errno !=3D EBUSY) ) + break; + } + + if ( ret < 0 ) + fprintf(stderr, "Unable to disable SMT: errno %d, %s\n", + errno, strerror(errno)); + else + printf("Disabled SMT\n"); + + return ret; +} diff --git a/tools/misc/xen-hptool.c b/tools/misc/xen-hptool.c index 590810b6eb..7b886e2304 100644 --- a/tools/misc/xen-hptool.c +++ b/tools/misc/xen-hptool.c @@ -6,8 +6,8 @@ #include #include #include +#include "xen-hptool.h" =20 -static xc_interface *xch; =20 void show_help(void) { @@ -18,239 +18,25 @@ void show_help(void) " help display this help\n" " cpu-online online CPU \n" " cpu-offline offline CPU \n" +#if defined(__i386__) || defined(__x86_64__) " mem-online online MEMORY \n" " mem-offline offline MEMORY \n" " mem-status query Memory status\n" " smt-enable onlines all SMT threads\n" " smt-disable offlines all SMT threads\n" +#endif ); } =20 /* wrapper function */ -static int help_func(int argc, char *argv[]) +static int help_func(int argc, char *argv[], xc_interface *xch) { show_help(); return 0; } =20 -static int hp_mem_online_func(int argc, char *argv[]) -{ - uint32_t status; - int ret; - unsigned long mfn; - - if (argc !=3D 1) - { - show_help(); - return -1; - } - - sscanf(argv[0], "%lx", &mfn); - printf("Prepare to online MEMORY mfn %lx\n", mfn); - - ret =3D xc_mark_page_online(xch, mfn, mfn, &status); - - if (ret < 0) - fprintf(stderr, "Onlining page mfn %lx failed, error %x\n", mfn, e= rrno); - else if (status & (PG_ONLINE_FAILED |PG_ONLINE_BROKEN)) { - fprintf(stderr, "Onlining page mfn %lx is broken, " - "Memory online failed\n", mfn); - ret =3D -1; - } - else if (status & PG_ONLINE_ONLINED) - printf("Memory mfn %lx onlined successfully\n", mfn); - else - printf("Memory is already onlined!\n"); - - return ret; -} - -static int hp_mem_query_func(int argc, char *argv[]) -{ - uint32_t status; - int ret; - unsigned long mfn; - - if (argc !=3D 1) - { - show_help(); - return -1; - } - - sscanf(argv[0], "%lx", &mfn); - printf("Querying MEMORY mfn %lx status\n", mfn); - ret =3D xc_query_page_offline_status(xch, mfn, mfn, &status); - - if (ret < 0) - fprintf(stderr, "Querying page mfn %lx failed, error %x\n", mfn, e= rrno); - else - { - printf("Memory Status %x: [", status); - if ( status & PG_OFFLINE_STATUS_OFFLINE_PENDING) - printf(" PAGE_OFFLINE_PENDING "); - if ( status & PG_OFFLINE_STATUS_BROKEN ) - printf(" PAGE_BROKEND "); - if ( status & PG_OFFLINE_STATUS_OFFLINED ) - printf(" PAGE_OFFLINED "); - else - printf(" PAGE_ONLINED "); - printf("]\n"); - } - - return ret; -} - -static int suspend_guest(xc_interface *xch, xenevtchn_handle *xce, int dom= id, - int *evtchn, int *lockfd) -{ - int port, rc, suspend_evtchn =3D -1; - - *lockfd =3D -1; - - if (!evtchn) - return -1; - - port =3D xs_suspend_evtchn_port(domid); - if (port < 0) - { - fprintf(stderr, "DOM%d: No suspend port, try live migration\n", do= mid); - goto failed; - } - suspend_evtchn =3D xc_suspend_evtchn_init_exclusive(xch, xce, domid, - port, lockfd); - if (suspend_evtchn < 0) - { - fprintf(stderr, "Suspend evtchn initialization failed\n"); - goto failed; - } - *evtchn =3D suspend_evtchn; - - rc =3D xenevtchn_notify(xce, suspend_evtchn); - if (rc < 0) - { - fprintf(stderr, "Failed to notify suspend channel: errno %d\n", rc= ); - goto failed; - } - if (xc_await_suspend(xch, xce, suspend_evtchn) < 0) - { - fprintf(stderr, "Suspend Failed\n"); - goto failed; - } - return 0; - -failed: - if (suspend_evtchn !=3D -1) - xc_suspend_evtchn_release(xch, xce, domid, - suspend_evtchn, lockfd); - - return -1; -} - -static int hp_mem_offline_func(int argc, char *argv[]) -{ - uint32_t status, domid; - int ret; - unsigned long mfn; - - if (argc !=3D 1) - { - show_help(); - return -1; - } - - sscanf(argv[0], "%lx", &mfn); - printf("Prepare to offline MEMORY mfn %lx\n", mfn); - ret =3D xc_mark_page_offline(xch, mfn, mfn, &status); - if (ret < 0) { - fprintf(stderr, "Offlining page mfn %lx failed, error %x\n", mfn, = errno); - if (status & (PG_OFFLINE_XENPAGE | PG_OFFLINE_FAILED)) - fprintf(stderr, "XEN_PAGE is not permitted be offlined\n"); - else if (status & (PG_OFFLINE_FAILED | PG_OFFLINE_NOT_CONV_RAM)) - fprintf(stderr, "RESERVED RAM is not permitted to be offlined\= n"); - } - else - { - switch(status & PG_OFFLINE_STATUS_MASK) - { - case PG_OFFLINE_OFFLINED: - { - printf("Memory mfn %lx offlined successfully, current stat= e is" - " [PG_OFFLINE_OFFLINED]\n", mfn); - if (status & PG_OFFLINE_BROKEN) - printf("And this offlined PAGE is already marked broke= n" - " before!\n"); - break; - } - case PG_OFFLINE_FAILED: - { - fprintf(stderr, "Memory mfn %lx offline failed\n", mfn); - if ( status & PG_OFFLINE_ANONYMOUS) - fprintf(stderr, "the memory is an anonymous page!\n"); - ret =3D -1; - break; - } - case PG_OFFLINE_PENDING: - { - if (status & PG_OFFLINE_XENPAGE) { - ret =3D -1; - fprintf(stderr, "Memory mfn %lx offlined succssefully,= " - "this page is xen page, current state is" - " [PG_OFFLINE_PENDING, PG_OFFLINE_XENPAGE]\n",= mfn); - } - else if (status & PG_OFFLINE_OWNED) - { - int result, suspend_evtchn =3D -1, suspend_lockfd =3D = -1; - xenevtchn_handle *xce; - xce =3D xenevtchn_open(NULL, 0); - - if (xce =3D=3D NULL) - { - fprintf(stderr, "When exchange page, fail" - " to open evtchn\n"); - return -1; - } - - domid =3D status >> PG_OFFLINE_OWNER_SHIFT; - if (suspend_guest(xch, xce, domid, - &suspend_evtchn, &suspend_lockfd)) - { - fprintf(stderr, "Failed to suspend guest %d for" - " mfn %lx\n", domid, mfn); - xenevtchn_close(xce); - return -1; - } - - result =3D xc_exchange_page(xch, domid, mfn); - - /* Exchange page successfully */ - if (result =3D=3D 0) - printf("Memory mfn %lx offlined successfully, this= " - "page is DOM%d page and being swapped " - "successfully, current state is " - "[PG_OFFLINE_OFFLINED, PG_OFFLINE_OWNED]\n= ", - mfn, domid); - else { - ret =3D -1; - fprintf(stderr, "Memory mfn %lx offlined successfu= lly" - " , this page is DOM%d page yet failed to = be " - "exchanged. current state is " - "[PG_OFFLINE_PENDING, PG_OFFLINE_OWNED]\n"= , - mfn, domid); - } - xc_domain_resume(xch, domid, 1); - xc_suspend_evtchn_release(xch, xce, domid, - suspend_evtchn, &suspend_loc= kfd); - xenevtchn_close(xce); - } - break; - } - }//end of switch - }//end of if - - return ret; -} - -static int exec_cpu_hp_fn(int (*hp_fn)(xc_interface *, int), int cpu) +static int exec_cpu_hp_fn(int (*hp_fn)(xc_interface *, int), int cpu, + xc_interface *xch) { int ret; =20 @@ -265,7 +51,7 @@ static int exec_cpu_hp_fn(int (*hp_fn)(xc_interface *, i= nt), int cpu) return ret; } =20 -static int hp_cpu_online_func(int argc, char *argv[]) +static int hp_cpu_online_func(int argc, char *argv[], xc_interface *xch) { int cpu, ret; =20 @@ -277,7 +63,7 @@ static int hp_cpu_online_func(int argc, char *argv[]) =20 cpu =3D atoi(argv[0]); printf("Prepare to online CPU %d\n", cpu); - ret =3D exec_cpu_hp_fn(xc_cpu_online, cpu); + ret =3D exec_cpu_hp_fn(xc_cpu_online, cpu, xch); if (ret < 0) fprintf(stderr, "CPU %d online failed (error %d: %s)\n", cpu, errno, strerror(errno)); @@ -287,7 +73,7 @@ static int hp_cpu_online_func(int argc, char *argv[]) return ret; =20 } -static int hp_cpu_offline_func(int argc, char *argv[]) +static int hp_cpu_offline_func(int argc, char *argv[], xc_interface *xch) { int cpu, ret; =20 @@ -298,7 +84,7 @@ static int hp_cpu_offline_func(int argc, char *argv[]) } cpu =3D atoi(argv[0]); printf("Prepare to offline CPU %d\n", cpu); - ret =3D exec_cpu_hp_fn(xc_cpu_offline, cpu); + ret =3D exec_cpu_hp_fn(xc_cpu_offline, cpu, xch); if (ret < 0) fprintf(stderr, "CPU %d offline failed (error %d: %s)\n", cpu, errno, strerror(errno)); @@ -308,76 +94,27 @@ static int hp_cpu_offline_func(int argc, char *argv[]) return ret; } =20 -static int main_smt_enable(int argc, char *argv[]) -{ - int ret; - - if ( argc ) - { - show_help(); - return -1; - } - - for ( ;; ) - { - ret =3D xc_smt_enable(xch); - if ( (ret >=3D 0) || (errno !=3D EBUSY) ) - break; - } - - if ( ret < 0 ) - fprintf(stderr, "Unable to enable SMT: errno %d, %s\n", - errno, strerror(errno)); - else - printf("Enabled SMT\n"); - - return ret; -} - -static int main_smt_disable(int argc, char *argv[]) -{ - int ret; - - if ( argc ) - { - show_help(); - return -1; - } - - for ( ;; ) - { - ret =3D xc_smt_disable(xch); - if ( (ret >=3D 0) || (errno !=3D EBUSY) ) - break; - } - - if ( ret < 0 ) - fprintf(stderr, "Unable to disable SMT: errno %d, %s\n", - errno, strerror(errno)); - else - printf("Disabled SMT\n"); - - return ret; -} - struct { const char *name; - int (*function)(int argc, char *argv[]); + int (*function)(int argc, char *argv[], xc_interface *xch); } main_options[] =3D { { "help", help_func }, { "cpu-online", hp_cpu_online_func }, { "cpu-offline", hp_cpu_offline_func }, +#if defined(__i386__) || defined(__x86_64__) { "mem-status", hp_mem_query_func}, { "mem-online", hp_mem_online_func}, { "mem-offline", hp_mem_offline_func}, { "smt-enable", main_smt_enable }, { "smt-disable", main_smt_disable }, +#endif }; =20 =20 int main(int argc, char *argv[]) { int i, ret; + xc_interface *xch; =20 if (argc < 2) { @@ -402,7 +139,7 @@ int main(int argc, char *argv[]) return 1; } =20 - ret =3D main_options[i].function(argc -2, argv + 2); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 879b4254-ce83-4198-b073-08deb278cad0 X-MS-Exchange-CrossTenant-originalarrivaltime: 15 May 2026 11:55:00.1201 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: I24eQVDuQILocZ5jvkxOiD8pQHl/xdbrOURYhqJY/woe5SNjXBjyVDrbjNn0RI3IFJqxJUVG8OM6K0ApyVwASQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAWPR03MB10041 X-purgate-ID: tlsNG-16d1c6/1778846102-8E98AD75-2C7EFC66/0/0 X-purgate-type: clean X-purgate-size: 4040 Signed-off-by: Mykyta Poturai --- v7->v8: * remove support status update * update config option name v6->v7: * add testing and limitations v5->v6: * no changes v4->v5: * s/supported/implemented/ * update SUPPORT.md v3->v4: * update configuration section v2->v3: * patch introduced --- docs/misc/cpu-hotplug.txt | 97 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 docs/misc/cpu-hotplug.txt diff --git a/docs/misc/cpu-hotplug.txt b/docs/misc/cpu-hotplug.txt new file mode 100644 index 0000000000..d2ed1d6b8b --- /dev/null +++ b/docs/misc/cpu-hotplug.txt @@ -0,0 +1,97 @@ +CPU Hotplug +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +CPU hotplug is a feature that allows pCPU cores to be added to or removed = from a +running system without requiring a reboot. It is implemented on x86 and Ar= m64 +architectures. + +Implementation Details +---------------------- + +CPU hotplug is implemented through the `XEN_SYSCTL_CPU_HOTPLUG_*` sysctl c= alls. +The specific calls are: + +- `XEN_SYSCTL_CPU_HOTPLUG_ONLINE`: Brings a pCPU online +- `XEN_SYSCTL_CPU_HOTPLUG_OFFLINE`: Takes a pCPU offline +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_ENABLE`: Enables SMT threads (x86 only) +- `XEN_SYSCTL_CPU_HOTPLUG_SMT_DISABLE`: Disables SMT threads (x86 only) + +All cores can be disabled, assuming hardware support, except for the boot = core. +Sysctl calls are routed to the boot core before doing any actual up/down +operations on other cores. + +If there are Xen-bound interrupts pinned to the pCPU being offlined, they = will +be automatically migrated to other online pCPUs. Interrupts used by guest +domains are handled by the scheduler when it reschedules the vCPUs to a ne= w, +online, pCPU. When a pCPU is being onlined, some Xen-bound interrupts will= get +redistributed to the newly onlined pCPU to prevent imbalance. + +If pCPU being offlined has some vCPUs pinned to it, they will be automatic= ally +unpinned and migrated to other online pCPUs. + +Limitations +----------- + +On Arm64 cpu hotplug is currently not compatible with ITS, due to an issue= s with +the redistributor assignment. + +On Arm64 there can be problems with FFA if secure FW support notification = ABI. + +Configuration +------------- + +The presence of the feature is controlled by CONFIG_CPU_ONLINE_OFFLINE opt= ion. +It is enabled by default on x86 architecture. On Arm64, the option is disa= bled +by default and marked as EXPERT. xen-hptool userspace tool is built +unconditionally. + +Usage +----- + +Disable core: + +$ xen-hptool cpu-offline 2 +Prepare to offline CPU 2 +(XEN) Removing cpu 2 from runqueue 0 +CPU 2 offlined successfully + +Enable core: + +$ xen-hptool cpu-online 2 +Prepare to online CPU 2 +(XEN) Bringing up CPU2 +(XEN) GICv3: CPU2: Found redistributor in region 0 @00000a004005c000 +(XEN) CPU2: Guest atomics will try 1 times before pausing the domain +(XEN) CPU 2 booted. +(XEN) Adding cpu 2 to runqueue 0 +CPU 2 onlined successfully + +Disabling a core with pinned vCPUs: + +$ xl vcpu-pin 0 3 3 3 +$ xl vcpu-pin 0 2 3 3 +$ xl vcpu-pin 0 1 3 3 +$ xl vcpu-pin 0 0 3 3 +$ xen-hptool cpu-offline 3 +Prepare to offline CPU 3 +(XEN) Breaking affinity for d0v0 +(XEN) Breaking affinity for d0v1 +(XEN) Breaking affinity for d0v2 +(XEN) Breaking affinity for d0v3 +(XEN) Removing cpu 3 from runqueue 0 +CPU 3 offlined successfully + +Testing +------- + +The CPU hotplug feature has been tested on both x86 and Arm64 QEMU setups = and on +R-Car Gen5 (Arm64) hardware. + +The tests included: +- Offlining and onlining cores with no pinned vCPUs +- Offlining cores with pinned vCPUs +- Offlining cores with Xen-bound interrupts +- Offlining all cores except the boot core +- Offlining the boot core (expected to fail) +- Enabling and disabling SMT threads (x86 only) +- Ofllining cores to which guests with passthrough devices are pinned --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Fri May 15 12:03:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 12:03:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309947.1580957 (Exim 4.92) (envelope-from ) id 1wNrGL-0001iQ-1Y; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: oVR79mBo8BOro7h/ScE2XKUrbGn5xgv8tfjGv3uG7gSACcmAYFM4gx0OrywMWG7te+4SZdqanC6DRYwaMe/zsYH/x3K2Ut1yvgdqTsXygTO2qOZPmeni5r4DLj9QvnNy9Vmecn1P+zKhW/6iFW0Y1LkZM4IQer2xiDVxmIOSneXTMpRU6amyKG0pNQq2XCkdhbBqat7/VjQoSB2rD/1cCXf+T8vMKgT+Nqi4tSgUEKjZJsinwSbpDbqUA7dVVDHKmhajn/WRD62/ldQ93M2llyJHg4/wgFwA3NIFI6xmR5vs2HvnARpfoQ8MCUcxt/e2e6GWXifSsK6BGC0Vhf+lNOeRt6BxH3DI5PnsQMD+BwUgTfZWOdgwOeJe9+XWaGSzqeFWa/bsmYge0pYkyXm1dxU5UlH58PzvKimhbBZ+W10Tw6O87e8AGbf/Ofr83yZA X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 May 2026 12:03:23.8660 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d4a51058-a965-4eae-3140-08deb279f719 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF0000004E.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6308 X-purgate-ID: tlsNG-ebf023/1778846606-2AB633FF-941374B9/0/0 X-purgate-type: clean X-purgate-size: 1673 Hi Mykola, > On 15 May 2026, at 10:40, Mykola Kvach wrote: >=20 > From: Mykola Kvach >=20 > GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding. > Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner > Non-cacheable) describe non-cacheable accesses to the command queue. >=20 > its_map_cbaser() only checked whether the shifted field was zero, > so an ITS that reports Normal Inner Non-cacheable would not set > HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with > the unshifted enum value, matching the handling of ITS BASER tables > and GICR_PROPBASER. >=20 > Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer") > Signed-off-by: Mykola Kvach > --- > xen/arch/arm/gic-v3-its.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) >=20 > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > index 9005ce8ce5..7560d46c6d 100644 > --- a/xen/arch/arm/gic-v3-its.c > +++ b/xen/arch/arm/gic-v3-its.c > @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its) > * If the command queue memory is mapped as uncached, we need to flus= h > * it on every access. > */ > - if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) ) > + if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <=3D > + GIC_BASER_CACHE_nC ) > { > its->flags |=3D HOST_ITS_FLUSH_CMD_QUEUE; > printk(XENLOG_WARNING "using non-cacheable ITS command queue\n"); > --=20 > 2.43.0 >=20 >=20 Looks ok to me Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 15 12:18:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 12:18:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309963.1580965 (Exim 4.92) (envelope-from ) id 1wNrUV-0004FP-6J; Fri, 15 May 2026 12:18:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309963.1580965; Fri, 15 May 2026 12:18:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrUV-0004FI-3V; Fri, 15 May 2026 12:18:07 +0000 Received: by outflank-mailman (input) for mailman id 1309963; Fri, 15 May 2026 12:18:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrUU-0004Dx-07 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 12:18:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNrUT-008VmL-Bk for xen-devel@lists.xenproject.org; Fri, 15 May 2026 14:18:05 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a070ef4-e002-0a2a0a5209dd-0a2a4507c44a-18 for ; Fri, 15 May 2026 14:18:05 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a070efd-229c-0a2a45070019-d155802db418-3 for ; Fri, 15 May 2026 14:18:05 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488af96f6b2so107044145e9.0 for ; Fri, 15 May 2026 05:18:05 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , "xen-devel@lists.xenproject.org" References: <8d0d4f74ef5730edf59ff21fe8ab2aead6a7f1c6.1778845596.git.mykyta_poturai@epam.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8d0d4f74ef5730edf59ff21fe8ab2aead6a7f1c6.1778845596.git.mykyta_poturai@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1778847485-20961C48-2B2FA5C9/0/0 X-purgate-type: clean X-purgate-size: 1750 On 15.05.2026 13:54, Mykyta Poturai wrote: > SMT-disable enforcement check is moved into a separate > architecture-specific function. > > For now this operations only support Arm64. For proper Arm32 support, > there needs to be a mechanism to free per-cpu page tables, allocated in > init_domheap_mappings. Also, hotplug is not supported if ITS enabled, > and partially supported FFA, or TEE is enabled, as they use non-static > IRQ actions. > > Remove ifdef guards for x86 in flask, as cpu hotplug is now > supported on more architectures. > > Signed-off-by: Mykyta Poturai > > --- > v7->v8: > * simplify dependencies of config CPU_ONLINE_OFFLINE Which now raises the question of ... > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -637,9 +637,9 @@ config SYSTEM_SUSPEND > If unsure, say N. > > config CPU_ONLINE_OFFLINE > - bool "CPU online/offline support" > - depends on X86 > - default y > + bool "CPU online/offline support" if EXPERT > + depends on X86 || (ARM_64 && !HAS_ITS) ... this being overly strict towards other architectures. Typically we'd allow them to express such via select-ing a respective HAS_* control. In the absence of that, couldn't the above be further simplified to depends on !HAS_ITS Alternatively, to make exclusions more explicit, and to not preclude other ports to use HAS_ITS for something entirely different (just with the same acronym), maybe depends on !ARM || !HAS_ITS ? Then, if RISC-V and/or PPC really want to opt out of supporting this, they'd add themselves here. Yes as said, expressing such via HAS_* scales better. > + default X86 This, I agree, wants to stay as is. At least for now. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 12:21:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 12:21:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309970.1580975 (Exim 4.92) (envelope-from ) id 1wNrXx-0005rB-KY; Fri, 15 May 2026 12:21:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309970.1580975; Fri, 15 May 2026 12:21:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrXx-0005r4-HF; Fri, 15 May 2026 12:21:41 +0000 Received: by outflank-mailman (input) for mailman id 1309970; Fri, 15 May 2026 12:21:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrXw-0005qy-0Z for xen-devel@lists.xenproject.org; Fri, 15 May 2026 12:21:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNrXv-00D45C-9Q for xen-devel@lists.xenproject.org; Fri, 15 May 2026 14:21:39 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a070fb9-e002-0a2a0a5209dd-0a2a45058ea2-48 for ; Fri, 15 May 2026 14:21:39 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a070fd3-aaa8-0a2a45050019-d1558030d849-3 for ; Fri, 15 May 2026 14:21:39 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891c00e7aeso74780905e9.2 for ; Fri, 15 May 2026 05:21:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1778847699-D8D7F443-852CF885/0/0 X-purgate-type: clean X-purgate-size: 370 On 15.05.2026 13:54, Mykyta Poturai wrote: > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -636,6 +636,14 @@ config SYSTEM_SUSPEND > > If unsure, say N. > > +config CPU_ONLINE_OFFLINE > + bool "CPU online/offline support" The "if EXPERT" that the next patch adds wants to move here. Then: Acked-by: Jan Beulich Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 12:29:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 12:29:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309982.1580985 (Exim 4.92) (envelope-from ) id 1wNrfC-0006yH-Eq; Fri, 15 May 2026 12:29:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309982.1580985; Fri, 15 May 2026 12:29:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrfC-0006yA-Ay; Fri, 15 May 2026 12:29:10 +0000 Received: by outflank-mailman (input) for mailman id 1309982; Fri, 15 May 2026 12:29:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNrfA-0006y4-QD for xen-devel@lists.xenproject.org; Fri, 15 May 2026 12:29:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNrfA-000OoB-5a for xen-devel@lists.xenproject.org; Fri, 15 May 2026 14:29:08 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a071190-2eae-0a2a0a5409dd-0a2a450b92a0-16 for ; Fri, 15 May 2026 14:29:08 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a071193-212f-0a2a450b0019-d155dd32e0ca-3 for ; Fri, 15 May 2026 14:29:08 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-449de065cb3so8362989f8f.2 for ; Fri, 15 May 2026 05:29:07 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778848148-22B8EF3B-0442CAD8/0/0 X-purgate-type: clean X-purgate-size: 991 On 15.05.2026 13:54, Mykyta Poturai wrote: > @@ -104,8 +104,10 @@ xenhypfs: xenhypfs.o > xenlockprof: xenlockprof.o > $(CC) $(LDFLAGS) -o $@ $< $(LDLIBS_libxenctrl) $(APPEND_LDFLAGS) > > -xen-hptool: xen-hptool.o > - $(CC) $(LDFLAGS) -o $@ $< $(LDLIBS_libxenevtchn) $(LDLIBS_libxenctrl) $(LDLIBS_libxenguest) $(LDLIBS_libxenstore) $(APPEND_LDFLAGS) > +HPTOOL_OBJS-$(CONFIG_MIGRATE) += xen-hptool-x86.o > + > +xen-hptool: xen-hptool.o $(HPTOOL_OBJS-y) I'm not a maintainer of this, but imo this wants to be HPTOOL-OBJS-y := xen-hptool.o HPTOOL-OBJS-$(CONFIG_MIGRATE) += xen-hptool-x86.o xen-hptool: $(HPTOOL-OBJS-y) Whether $(CONFIG_MIGRATE) is actually appropriate to use here (and not CONFIG_X86) is a separate question. What's moved into that new file is not only migration related stuff, after all. Whether an almost-all-caps variable name is okay to use here is yet another (style) question. In the hypervisor we prefer lowercase forms, I think. Jan From xen-devel-bounces@lists.xenproject.org Fri May 15 13:00:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 13:00:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1309993.1580992 (Exim 4.92) (envelope-from ) id 1wNs9A-0004IC-KE; Fri, 15 May 2026 13:00:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1309993.1580992; Fri, 15 May 2026 13:00:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNs9A-0004I5-He; Fri, 15 May 2026 13:00:08 +0000 Received: by outflank-mailman (input) for mailman id 1309993; Fri, 15 May 2026 13:00:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNs99-0004C7-3h for xen-devel@lists.xenproject.org; Fri, 15 May 2026 13:00:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNs98-008bvJ-8z for xen-devel@lists.xenproject.org; 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Fri, 15 May 2026 13:00:05 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id IVHnCdUYB2qATQAAD6G6ig (envelope-from ); Fri, 15 May 2026 13:00:05 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778850005; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=fGLVgn9Q1bMVXvQUOe97ySXM/CiVTvt4tuaV2FX7IzM=; b=sthPDOjhzCNfEekl01yEq935Na1bIY42n3wShAZxhE+X8J/4h3594iUdKJC6GfoX0R1ldw RB2AsjYXy8dGTxLvgpNPMPoP9J689Ke+TRHXaRAHq6X2LSfg/13KpSwobalw7/nyDqciFR BYpkF5SM6S8WO42U2ZL9sXXNPEpIDDA= Authentication-Results: smtp-out1.suse.de; dkim=pass header.d=suse.com header.s=susede1 header.b=sthPDOjh DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1778850005; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=fGLVgn9Q1bMVXvQUOe97ySXM/CiVTvt4tuaV2FX7IzM=; b=sthPDOjhzCNfEekl01yEq935Na1bIY42n3wShAZxhE+X8J/4h3594iUdKJC6GfoX0R1ldw RB2AsjYXy8dGTxLvgpNPMPoP9J689Ke+TRHXaRAHq6X2LSfg/13KpSwobalw7/nyDqciFR BYpkF5SM6S8WO42U2ZL9sXXNPEpIDDA= From: Juergen Gross To: torvalds@linux-foundation.org Cc: linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org Subject: [GIT PULL] xen: branch for v7.1-rc4 Date: Fri, 15 May 2026 15:00:04 +0200 Message-ID: <20260515130004.1571139-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Rspamd-Action: no action X-Spamd-Result: default: False [-3.01 / 50.00]; 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Juergen arch/x86/xen/mmu_pv.c | 8 ++++++-- arch/x86/xen/setup.c | 2 +- include/xen/arm/interface.h | 2 +- 3 files changed, 8 insertions(+), 4 deletions(-) Juergen Gross (2): x86/xen: Fix xen_e820_swap_entry_with_ram() x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving Thomas Huth (1): xen/arm: Replace __ASSEMBLY__ with __ASSEMBLER__ in interface.h From xen-devel-bounces@lists.xenproject.org Fri May 15 13:13:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 13:13:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310008.1581001 (Exim 4.92) (envelope-from ) id 1wNsLg-0006DJ-Mj; Fri, 15 May 2026 13:13:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310008.1581001; Fri, 15 May 2026 13:13:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNsLg-0006DC-Jd; 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Make sure the returned value at least monotonically increases. When > >> available, use nominal frequency values as initial approximation. > >> > >> Do this only in get_s_time(), as producing a sane value in > >> get_s_time_fixed() for non-zero inputs won't be reasonably possible. > >> Put an assertion there. > >> > >> Reported-by: Roger Pau Monné > >> Signed-off-by: Jan Beulich > >> --- > >> RFC: This breaks at least the TSM_BOOT case printk_start_of_line(), which > >> checks for NOW() returning 0 (falling back to TSM_RAW in this case). > >> For now I have no idea how to avoid this; perhaps that's tolerable at > >> least in the case where we put in place an early estimate? Should we > >> maybe weaken the fallback condition to take effect for any value > >> below 1μs? > > > > Maybe it's fine to print cycles unconditionally until we reach > > SYS_STATE_smp_boot when we know the per-cpu scale is correctly set? > > I remain of the opinion (as said in reply to your similar v1 comment) that > this isn't very desirable. Tying to SYS_STATE_smp_boot also would feel > pretty arbitrary. Other ports may have NOW() properly working much earlier. > If anything we may want to add a global indicator of NOW() properly working. I would be fine with such indicator. > >> RFC: While generally the mentioned waiting loops will take longer to time > >> out, on a very fast CPU tight loops may time out too early. > >> > >> RFC: For the AMD/Hygon case, if the "nominal" value isn't available, we > >> could use the "high" one. That would cause NOW() to run too slowly > >> (until the scale is properly set), but maybe that's still better than > >> it returning 0? (As it stands, I can't really test the new code > >> there, as my Rome system only supplies the lo/hi pair of values.) > > > > Using the "high" frequency would seem fine to me. > > Okay, will do then for v3. > > Related aspect: With these family/model specific additions for AMD, we could > also separate out intel_log_freq()'s model specific part, to leverage from > here as well. Hm, yes, that would reduce the duplication of the added logic. > >> @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) > >> return 0; > >> } > >> > >> +/* BSP-only function to pre-set an approximate TSC scale. */ > >> +void __init preset_tsc_scale(unsigned long freq) > >> +{ > >> + struct cpu_time *t = &this_cpu(cpu_time); > >> + > >> + /* > >> + * The incoming frequency is only approximate (nominal). Increase it by > >> + * 1% to make NOW() output rather a little too slow than too fast, thus > >> + * avoiding a possible backwards jump once the final scale is set. > >> + */ > >> + freq += DIV_ROUND_UP(freq, 100); > > > > To avoid such possible jump backwards, won't it safer to also update > > the ->local_stime and ->local_tsc fields at the time the new scale is > > set? Updatign those ahead of setting the new scale should avoid any > > backward jumps. > > ->stamp.local_tsc does get updated; you merely dropped that line from reply > context. As to local_stime - how could we possibly set that, when we didn't > get through init_platform_timer() yet? Leaving it at 0 is the correct > match for setting local_tsc to boot_tsc_stamp. Please bear with me, maybe I'm not understanding exactly to what the code comment refers to as "possible backwards jump once the final scale is set". I assume you refer to the setting of scale early_time_init()? The ->stamp.local_tsc value also gets updated at that point, so it's not possible for the timer going backwards? This changed with the addition of the init_percpu_time() call in early_time_init(), and makes the setting of "t->stamp.local_tsc = boot_tsc_stamp" pointless, as it will get overwritten by the logic in init_percpu_time() a couple of lines after? Thanks, _Roger. From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310174.1581011 (Exim 4.92) (envelope-from ) id 1wNy4z-0005A1-2N; Fri, 15 May 2026 19:20:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310174.1581011; Fri, 15 May 2026 19:20:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy4y-00059i-SH; Fri, 15 May 2026 19:20:12 +0000 Received: by outflank-mailman (input) for mailman id 1310174; Fri, 15 May 2026 19:20:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <353EHagYKCUAugcpleiqqing.eqozgp-fgxgnnkuvu.zgprtqlgev.qti@flex--seanjc.bounces.google.com>) id 1wNy4x-00059W-17 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 19:20:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNy4w-00BX6R-Cy for xen-devel@lists.xenproject.org; Fri, 15 May 2026 21:20:10 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <353EHagYKCUAugcpleiqqing.eqozgp-fgxgnnkuvu.zgprtqlgev.qti@flex--seanjc.bounces.google.com>) id 6a0771d8-5cb7-0a2a0a5109dd-0a2a450aade8-22 for ; Fri, 15 May 2026 21:20:10 +0200 Received: from [209.85.215.201] (helo=mail-pg1-f201.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <353EHagYKCUAugcpleiqqing.eqozgp-fgxgnnkuvu.zgprtqlgev.qti@flex--seanjc.bounces.google.com>) id 6a0771e8-56b3-0a2a450a0019-d155d7c9cce9-3 for ; Fri, 15 May 2026 21:20:10 +0200 Received: by mail-pg1-f201.google.com with SMTP id 41be03b00d2f7-c82bd90afbbso184383a12.0 for ; Fri, 15 May 2026 12:20:09 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Cc:To:From:Subject:Message-ID:Mime-Version:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778872808; x=1779477608; darn=lists.xenproject.org; h=cc:to:from:subject:message-id:mime-version:date:reply-to:from:to:cc :subject:date:message-id:reply-to; bh=n6Bo/RhEQ+ohQ2bSS/OTKsKl1FaExY7Ds1WzHI7v1C0=; b=tIQlCw72CdnN83Bio8mqAjXcQhO64QeqKGYxFx+fyajkUA2iz47h4zIzPo1qD65LnI QHgWhGikARyaWo0RAyrQgincyNy3bLOmJ8WymfgcPZyqJAJhcH1qZv2VJraURRadZKQ2 nljMTDwfUPo1WD7VfKuJE+x2vu+qfTYr4CzH6N2kHtQ4IdPgkHnjXIWaXHZm9Xr1tdkH GCCnzhyGECg5Jr2IT+amCno4CdpHUu1suPmmsQIVvfaX8wdPwmQ765sb+AmCEFo/HyN7 q1wHfSzEk8obmJ9t4qxGFE9hmYpx0h//UExqNuoOuzHAyCndtq4yEOYVJ32TlWQkKGy7 OSOw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778872808; x=1779477608; h=cc:to:from:subject:message-id:mime-version:date:reply-to :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=n6Bo/RhEQ+ohQ2bSS/OTKsKl1FaExY7Ds1WzHI7v1C0=; b=egl/pO/0IehFemDG/rs6ToPInQ24WgmdseXkoaB9WP+CLKG5jkq3ae2gTg9JHYJxMY dCTw20Rd30TU70EdUNrJPK5xIfoZ96170+9+HD8jxlno+Lcs26pz/v26TuZ1xYGSYg3B ypuFMAhrrbDSjxifMEiMJhGGLZl2rtvXGRiBhCnsGW6ptXOjSRuOGZ9USvC6KvzxXxYe N2firZQ778gZ9xvhSHeXTtE1sulNd/l8Peq4n8FpYCjuvb0mjIYPeRDoxULKN+Ci7NB7 zmoUBms2xSbw9gKdGacmQYASso3girA4At290cMQQmPgGQYJE8/qFJEJymgNMmz+3Npi 8duA== X-Forwarded-Encrypted: i=1; AFNElJ9hu4l5VT08sOSexenV+ulGQ1WpQeH6VnWpaIeQxm4LT6fYzObTSmpl5MmHD6kjG5H4wttdV8OQR+A=@lists.xenproject.org X-Gm-Message-State: AOJu0Yz3LI9kZ3uIxl4OYDw6XASXgbtblzbVJXOjYYkU8obKGmM7ZK6p uFEG9vKul1gNbRMbK9HkJdrDNJ1J5URX6ZoJ4MnB9g6YcaxTQaTeeQHMYZh/Ptq8JeSxkhyPQbX hIfUVVQ== X-Received: from pgbcq13.prod.google.com ([2002:a05:6a02:408d:b0:c80:26d4:20ea]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:1595:b0:398:7df5:2dae with SMTP id adf61e73a8af0-3b22e67bbfbmr6212145637.9.1778872807764; Fri, 15 May 2026 12:20:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:01 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-1-seanjc@google.com> Subject: [PATCH v3 00/41] x86: Try to wrangle PV clocks vs. TSC From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872810-7EB898B7-290D3FC3/0/0 X-purgate-type: clean X-purgate-size: 7912 Dave/Thomas/Peter/Boris, what's the going rate for bribes to take something like this through the tip tree? The bulk of the changes are in kvmclock and TSC, but pretty much every hypervisor's guest-side code gets touched at some point. I am reaonsably confident in the correctness of the KVM changes. Michael tested Hyper-V in v2, and while there were conflicts when rebasing, they were largely superficial (and I've just jinxed myself). For all other hypervisors, assume the code is compile-tested only, but those changes are all quite small and straightforward. The only changes that are questionable/contentious are the last two patches, which have KVM-as-a-guest use CPUID 0x16 to get the CPU frequency, even on AMD (that's the dubious part). I very deliberately put them last, so that they can be dropped at will (I don't care terribly if those patches land). To merge them, I would want explicit Acks from Paolo and David W. So, except for the last two patches, to get the stuff I really care about landed, I think/hope it's just the TSC and guest-side CoCo changes that need reviews/acks? The primary goal of this series is (or at least was, when I started) to fix flaws with SNP and TDX guests where a PV clock provided by the untrusted hypervisor is used instead of the secure/trusted TSC that is controlled by trusted firmware. The secondary goal is to draft off of the SNP and TDX changes to slightly modernize running under KVM. Currently, KVM guests will use TSC for clocksource, but not sched_clock. And they ignore Intel's CPUID-based TSC and CPU frequency enumeration, even when using the TSC instead of kvmclock. And if the host provides the core crystal frequency in CPUID.0x15, then KVM guests can use that for the APIC timer period instead of manually calibrating the frequency. The tertiary goal is to clean up all of the PV clock code to deduplicate logic across hypervisors, and to hopefully make it all easier to maintain going forward. Lots more background on the SNP/TDX motiviation: https://lore.kernel.org/all/20250106124633.1418972-13-nikunj@amd.com Note, I deliberately omitted: jailhouse-dev@googlegroups.com from the To/Cc, as those emails bounced on v1, AFAICT nothing has changed, and I have zero desire to get 41 emails telling me an email couldn't be delivered. v3: - Collect reviews. [Michael, Thomas] - Use Hyper-V reference counter / refcounter instead of Hyper-V timer. [Michael] - Use the paravirt CPUID interface first proposed by VMware for KVM's "official" mechanism for communicating frequency to KVM-aware guests, instead of abusing Intel's CPUID leafs. [David] - Deal with paravirt code being moved into asm/timers.h and arch/x86/kernel/tsc.c. v2: - https://lore.kernel.org/all/Z8YWttWDtvkyCtdJ@google.com - Add struct to hold the TSC CPUID output. [Boris] - Don't pointlessly inline the TSC CPUID helpers. [Boris] - Fix a variable goof in a helper, hopefully for real this time. [Dan] - Collect reviews. [Nikunj] - Override the sched_clock save/restore hooks if and only if a PV clock is successfully registered. - During resome, restore clocksources before reading persistent time. - Clean up more warts created by kvmclock. - Fix more bugs in kvmclock's suspend/resume handling. - Try to harden kvmclock against future bugs. v1: https://lore.kernel.org/all/20250201021718.699411-1-seanjc@google.com David Woodhouse (2): KVM: x86: Officially define CPUID 0x40000010 as PV Timing Info (TSC and Bus) x86/kvmclock: Obtain TSC frequency from CPUID if present Sean Christopherson (39): x86/tsc: Add a standalone helpers for getting TSC info from CPUID.0x15 x86/tsc: Add helper to register CPU and TSC freq calibration routines x86/sev: Mark TSC as reliable when configuring Secure TSC x86/sev: Move check for SNP Secure TSC support to tsc_early_init() x86/tdx: Override PV calibration routines with CPUID-based calibration x86/acrn: Mark TSC frequency as known when using ACRN for calibration clocksource: hyper-v: Register sched_clock save/restore iff it's necessary clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock x86/kvmclock: Setup kvmclock for secondary CPUs iff CONFIG_SMP=y x86/kvm: Don't disable kvmclock on BSP in syscore_suspend() x86/paravirt: Remove unnecessary PARAVIRT=n stub for paravirt_set_sched_clock() x86/paravirt: Move handling of unstable PV clocks into paravirt_set_sched_clock() x86/kvmclock: Move sched_clock save/restore helpers up in kvmclock.c x86/xen/time: Nullify x86_platform's sched_clock save/restore hooks x86/vmware: Nullify save/restore hooks when using VMware's sched_clock x86/tsc: WARN if TSC sched_clock save/restore used with PV sched_clock x86/paravirt: Pass sched_clock save/restore helpers during registration x86/kvmclock: Move kvm_sched_clock_init() down in kvmclock.c x86/xen/time: Mark xen_setup_vsyscall_time_info() as __init x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init x86/pvclock: WARN if pvclock's valid_flags are overwritten x86/kvmclock: Refactor handling of PVCLOCK_TSC_STABLE_BIT during kvmclock_init() timekeeping: Resume clocksources before reading persistent clock x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock x86/kvmclock: WARN if wall clock is read while kvmclock is suspended x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock x86/paravirt: Mark __paravirt_set_sched_clock() as __init x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() x86/paravirt: Don't use a PV sched_clock in CoCo guests with trusted TSC x86/tsc: Pass KNOWN_FREQ and RELIABLE as params to registration x86/tsc: Rejects attempts to override TSC calibration with lesser routine x86/kvmclock: Mark TSC as reliable when it's constant and nonstop x86/kvmclock: Get local APIC bus frequency from PV CPUID Timing Info x86/kvmclock: Use TSC for sched_clock if it's constant and non-stop x86/paravirt: kvmclock: Setup kvmclock early iff it's sched_clock x86/paravirt: Move using_native_sched_clock() stub into timer.h x86/tsc: Add standalone helper for getting CPU frequency from CPUID x86/kvmclock: Get CPU base frequency from CPUID when it's available Documentation/virt/kvm/x86/cpuid.rst | 12 ++ arch/x86/coco/sev/core.c | 9 +- arch/x86/coco/tdx/tdx.c | 27 ++- arch/x86/include/asm/kvm_para.h | 12 +- arch/x86/include/asm/tdx.h | 2 + arch/x86/include/asm/timer.h | 18 +- arch/x86/include/asm/tsc.h | 20 +++ arch/x86/include/asm/x86_init.h | 2 - arch/x86/include/uapi/asm/kvm_para.h | 11 ++ arch/x86/kernel/cpu/acrn.c | 5 +- arch/x86/kernel/cpu/mshyperv.c | 69 +------- arch/x86/kernel/cpu/vmware.c | 11 +- arch/x86/kernel/jailhouse.c | 6 +- arch/x86/kernel/kvm.c | 62 +++++-- arch/x86/kernel/kvmclock.c | 250 +++++++++++++++++++-------- arch/x86/kernel/pvclock.c | 9 +- arch/x86/kernel/smpboot.c | 3 +- arch/x86/kernel/tsc.c | 184 +++++++++++++++----- arch/x86/kernel/x86_init.c | 1 - arch/x86/mm/mem_encrypt_amd.c | 3 - arch/x86/xen/time.c | 13 +- drivers/clocksource/hyperv_timer.c | 38 ++-- include/clocksource/hyperv_timer.h | 2 - kernel/time/timekeeping.c | 9 +- 24 files changed, 537 insertions(+), 241 deletions(-) base-commit: 1196e304db58189264bb5953b4e8da7e90cda615 -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310175.1581020 (Exim 4.92) (envelope-from ) id 1wNy50-0005L5-Av; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d62444/1778872811-AED59FF4-9655EA66/0/0 X-purgate-type: clean X-purgate-size: 5244 Extract retrieval of TSC frequency information from CPUID into standalone helpers so that TDX guest support can reuse the logic. Provide a version that includes the multiplier math as TDX does NOT want to use native_calibrate_tsc()'s fallback logic that derives the TSC frequency based on CPUID.0x16, when the core crystal frequency isn't known. Opportunsitically drop native_calibrate_tsc()'s "== 0" and "!= 0" checks in favor of the kernel's preferred style. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 9 +++++ arch/x86/kernel/tsc.c | 67 +++++++++++++++++++++++++------------- 2 files changed, 53 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 4f7f09f50552..0c57fadc4a39 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -83,6 +83,15 @@ static inline cycles_t get_cycles(void) } #define get_cycles get_cycles +struct cpuid_tsc_info { + unsigned int denominator; + unsigned int numerator; + unsigned int crystal_khz; + unsigned int tsc_khz; +}; +extern int cpuid_get_tsc_info(struct cpuid_tsc_info *info); +extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); + extern void tsc_early_init(void); extern void tsc_init(void); extern void mark_tsc_unstable(char *reason); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index c5110eb554bc..f92236f40cbc 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -658,46 +658,67 @@ static unsigned long quick_pit_calibrate(void) return delta; } +int cpuid_get_tsc_info(struct cpuid_tsc_info *info) +{ + unsigned int ecx_hz, edx; + + memset(info, 0, sizeof(*info)); + + if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC) + return -ENOENT; + + /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ + cpuid(CPUID_LEAF_TSC, &info->denominator, &info->numerator, &ecx_hz, &edx); + + if (!info->denominator || !info->numerator) + return -ENOENT; + + /* + * Note, some CPUs provide the multiplier information, but not the core + * crystal frequency. The multiplier information is still useful for + * such CPUs, as the crystal frequency can be gleaned from CPUID.0x16. + */ + info->crystal_khz = ecx_hz / 1000; + return 0; +} + +int cpuid_get_tsc_freq(struct cpuid_tsc_info *info) +{ + if (cpuid_get_tsc_info(info) || !info->crystal_khz) + return -ENOENT; + + info->tsc_khz = info->crystal_khz * info->numerator / info->denominator; + return 0; +} + /** * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. */ unsigned long native_calibrate_tsc(void) { - unsigned int eax_denominator, ebx_numerator, ecx_hz, edx; - unsigned int crystal_khz; + struct cpuid_tsc_info info; if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return 0; - if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC) + if (cpuid_get_tsc_info(&info)) return 0; - eax_denominator = ebx_numerator = ecx_hz = edx = 0; - - /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ - cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx); - - if (ebx_numerator == 0 || eax_denominator == 0) - return 0; - - crystal_khz = ecx_hz / 1000; - /* * Denverton SoCs don't report crystal clock, and also don't support * CPUID_LEAF_FREQ for the calculation below, so hardcode the 25MHz * crystal clock. */ - if (crystal_khz == 0 && - boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D) - crystal_khz = 25000; + if (!info.crystal_khz && boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D) + info.crystal_khz = 25000; /* * TSC frequency reported directly by CPUID is a "hardware reported" * frequency and is the most accurate one so far we have. This * is considered a known frequency. */ - if (crystal_khz != 0) + if (info.crystal_khz) setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); /* @@ -705,15 +726,15 @@ unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { + if (!info.crystal_khz && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { unsigned int eax_base_mhz, ebx, ecx, edx; cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); - crystal_khz = eax_base_mhz * 1000 * - eax_denominator / ebx_numerator; + info.crystal_khz = eax_base_mhz * 1000 * + info.denominator / info.numerator; } - if (crystal_khz == 0) + if (!info.crystal_khz) return 0; /* @@ -730,10 +751,10 @@ unsigned long native_calibrate_tsc(void) * lapic_timer_period here to avoid having to calibrate the APIC * timer later. */ - lapic_timer_period = crystal_khz * 1000 / HZ; + lapic_timer_period = info.crystal_khz * 1000 / HZ; #endif - return crystal_khz * ebx_numerator / eax_denominator; + return info.crystal_khz * info.numerator / info.denominator; } static unsigned long cpu_khz_from_cpuid(void) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310179.1581029 (Exim 4.92) (envelope-from ) id 1wNy5G-0005kt-Ho; Fri, 15 May 2026 19:20:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310179.1581029; Fri, 15 May 2026 19:20:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5G-0005km-Eo; Fri, 15 May 2026 19:20:30 +0000 Received: by outflank-mailman (input) for mailman id 1310179; Fri, 15 May 2026 19:20:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3-nEHagYKCVMDzv84x19916z.x97Iz8-yzGz663DED.Iz8AC94zxE.9C1@flex--seanjc.bounces.google.com>) id 1wNy5F-0005js-K6 for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1778872828-41197938-34A5FFC6/0/0 X-purgate-type: clean X-purgate-size: 7499 Add a helper to register non-native, i.e. PV and CoCo, CPU and TSC frequency calibration routines. This will allow consolidating handling of common TSC properties that are forced by hypervisor (PV routines), and will also allow adding sanity checks to guard against overriding a TSC calibration routine with a routine that is less robust/trusted. Make the CPU calibration routine optional, as Xen (very sanely) doesn't assume the CPU runs as the same frequency as the TSC. Wrap the helper in an #ifdef to document that the kernel overrides the native routines when running as a VM, and to guard against unwanted usage. Add a TODO to call out that AMD_MEM_ENCRYPT is a mess and doesn't depend on HYPERVISOR_GUEST because it gates both guest and host code. No functional change intended. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 4 ++-- arch/x86/include/asm/tsc.h | 4 ++++ arch/x86/kernel/cpu/acrn.c | 4 ++-- arch/x86/kernel/cpu/mshyperv.c | 3 +-- arch/x86/kernel/cpu/vmware.c | 4 ++-- arch/x86/kernel/jailhouse.c | 4 ++-- arch/x86/kernel/kvmclock.c | 4 ++-- arch/x86/kernel/tsc.c | 17 +++++++++++++++++ arch/x86/xen/time.c | 2 +- 9 files changed, 33 insertions(+), 13 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 7ed3da998489..d27cf8f8b025 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2048,8 +2048,8 @@ void __init snp_secure_tsc_init(void) snp_tsc_freq_khz = SNP_SCALE_TSC_FREQ(tsc_freq_mhz * 1000, secrets->tsc_factor); - x86_platform.calibrate_cpu = securetsc_get_tsc_khz; - x86_platform.calibrate_tsc = securetsc_get_tsc_khz; + tsc_register_calibration_routines(securetsc_get_tsc_khz, + securetsc_get_tsc_khz); early_memunmap(mem, PAGE_SIZE); } diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 0c57fadc4a39..bae709f5f44d 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -94,6 +94,10 @@ extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); extern void tsc_early_init(void); extern void tsc_init(void); +#if defined(CONFIG_HYPERVISOR_GUEST) || defined(CONFIG_AMD_MEM_ENCRYPT) +extern void tsc_register_calibration_routines(unsigned long (*calibrate_tsc)(void), + unsigned long (*calibrate_cpu)(void)); +#endif extern void mark_tsc_unstable(char *reason); extern int unsynchronized_tsc(void); extern int check_tsc_unstable(void); diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 2c5b51aad91a..c1506cb87d8c 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -29,8 +29,8 @@ static void __init acrn_init_platform(void) /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); - x86_platform.calibrate_tsc = acrn_get_tsc_khz; - x86_platform.calibrate_cpu = acrn_get_tsc_khz; + tsc_register_calibration_routines(acrn_get_tsc_khz, + acrn_get_tsc_khz); } static bool acrn_x2apic_available(void) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 640e6b223c2d..8d2401be420c 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -573,8 +573,7 @@ static void __init ms_hyperv_init_platform(void) if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { - x86_platform.calibrate_tsc = hv_get_tsc_khz; - x86_platform.calibrate_cpu = hv_get_tsc_khz; + tsc_register_calibration_routines(hv_get_tsc_khz, hv_get_tsc_khz); setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 34b73573b108..b88d9ca01202 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -419,8 +419,8 @@ static void __init vmware_platform_setup(void) } vmware_tsc_khz = tsc_khz; - x86_platform.calibrate_tsc = vmware_get_tsc_khz; - x86_platform.calibrate_cpu = vmware_get_tsc_khz; + tsc_register_calibration_routines(vmware_get_tsc_khz, + vmware_get_tsc_khz); #ifdef CONFIG_X86_LOCAL_APIC /* Skip lapic calibration since we know the bus frequency. */ diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index f58ce9220e0f..db8f31fdb480 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -210,8 +210,6 @@ static void __init jailhouse_init_platform(void) x86_init.mpparse.parse_smp_cfg = jailhouse_parse_smp_config; x86_init.pci.arch_init = jailhouse_pci_arch_init; - x86_platform.calibrate_cpu = jailhouse_get_tsc; - x86_platform.calibrate_tsc = jailhouse_get_tsc; x86_platform.get_wallclock = jailhouse_get_wallclock; x86_platform.legacy.rtc = 0; x86_platform.legacy.warm_reset = 0; @@ -221,6 +219,8 @@ static void __init jailhouse_init_platform(void) machine_ops.emergency_restart = jailhouse_no_restart; + tsc_register_calibration_routines(jailhouse_get_tsc, jailhouse_get_tsc); + while (pa_data) { mapping = early_memremap(pa_data, sizeof(header)); memcpy(&header, mapping, sizeof(header)); diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b5991d53fc0e..e9e7394140dd 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -321,8 +321,8 @@ void __init kvmclock_init(void) flags = pvclock_read_flags(&hv_clock_boot[0].pvti); kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); - x86_platform.calibrate_tsc = kvm_get_tsc_khz; - x86_platform.calibrate_cpu = kvm_get_tsc_khz; + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz); + x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; #ifdef CONFIG_X86_LOCAL_APIC diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index f92236f40cbc..7e639c0a94a2 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1281,6 +1281,23 @@ static void __init check_system_tsc_reliable(void) tsc_disable_clocksource_watchdog(); } +/* + * TODO: Disentangle AMD_MEM_ENCRYPT and make SEV guest support depend on + * HYPERVISOR_GUEST. + */ +#if defined(CONFIG_HYPERVISOR_GUEST) || defined(CONFIG_AMD_MEM_ENCRYPT) +void tsc_register_calibration_routines(unsigned long (*calibrate_tsc)(void), + unsigned long (*calibrate_cpu)(void)) +{ + if (WARN_ON_ONCE(!calibrate_tsc)) + return; + + x86_platform.calibrate_tsc = calibrate_tsc; + if (calibrate_cpu) + x86_platform.calibrate_cpu = calibrate_cpu; +} +#endif + /* * Make an educated guess if the TSC is trustworthy and synchronized * over all CPUs. diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index d62c14334b35..3d3165eef821 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -569,7 +569,7 @@ static void __init xen_init_time_common(void) static_call_update(pv_steal_clock, xen_steal_clock); paravirt_set_sched_clock(xen_sched_clock); - x86_platform.calibrate_tsc = xen_tsc_khz; + tsc_register_calibration_routines(xen_tsc_khz, NULL); x86_platform.get_wallclock = xen_get_wallclock; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1778872829-4046D938-E33DD438/0/0 X-purgate-type: clean X-purgate-size: 1673 Move the code to mark the TSC as reliable from sme_early_init() to snp_secure_tsc_init(). The only reader of TSC_RELIABLE is the aptly named check_system_tsc_reliable(), which runs in tsc_init(), i.e. after snp_secure_tsc_init(). This will allow consolidating the handling of TSC_KNOWN_FREQ and TSC_RELIABLE when overriding the TSC calibration routine. Cc: Tom Lendacky Reviewed-by: Nikunj A Dadhania Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 2 ++ arch/x86/mm/mem_encrypt_amd.c | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index d27cf8f8b025..14ced854cd83 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2041,6 +2041,8 @@ void __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); /* Extract the GUEST TSC MHZ from BIT[17:0], rest is reserved space */ diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index 2f8c32173972..6c3af974c7c2 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -535,9 +535,6 @@ void __init sme_early_init(void) */ x86_init.resources.dmi_setup = snp_dmi_setup; } - - if (sev_status & MSR_AMD64_SNP_SECURE_TSC) - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); } void __init mem_encrypt_free_decrypted_mem(void) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310183.1581047 (Exim 4.92) (envelope-from ) id 1wNy5K-0006IK-6X; Fri, 15 May 2026 19:20:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310183.1581047; Fri, 15 May 2026 19:20:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5K-0006IA-3D; Fri, 15 May 2026 19:20:34 +0000 Received: by outflank-mailman (input) for mailman id 1310183; Fri, 15 May 2026 19:20:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3_XEHagYKCVYG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 1wNy5I-0006B6-OX for xen-devel@lists.xenproject.org; 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bh=uYn60803QiVrZ6qwk1MLFZ7C4I/KRQoL9rhTP31HXeM=; b=GIqR99XojRpu6Inmhgf4SCBQA89fPZ6x9n19f4uT6uyDONJ9yYoP6w/sDmCl4Bnb8t IdPYBmbKnE3mohSuhs6NMpEFxo3HMEnBVrmJHUgQ7vPCME64HqwMlkkN8CNxSCwXBvqx A0CzGOX2vJtAREQZ+OG2iuFc1FZ7gYHvcNkH1jGKy8NsE4YbtvFpssma2hCs7JU6zWNG Z2wGfxRJYV30wBSO8uRXtuE+Tv8miua0PBiy23l1H6DZQooEVLbS9u8pTi3El7+6Pn40 7YvmlkjPw/3NA2Sp/E4EFrA/4kIV/ZDeU/w3EQLhx3Yswl4xoeP2Jq53eoCm/1W+4cwa a0SA== X-Forwarded-Encrypted: i=1; AFNElJ9JL9qJhsK3pyNFw4P+fuyEeiQsOqKZ22FuOuv24tlNEAWhbly4WgxZC91poTKBuy1U4mYffIp29ZM=@lists.xenproject.org X-Gm-Message-State: AOJu0Yzv435ZwrLrTEGT6wkKfdTwQoWPRl/u/NA/iwRTCfqa+kBBYLvo OUrVwbBDsya0XvUEOXtd6LU7YMb12qvLgLKUp9+l5LJCwyEi3FdxD5Zn/MjHlHDdx1QCwvv4iIm o6A44yw== X-Received: from plkj6.prod.google.com ([2002:a17:902:6906:b0:2bd:a0e6:1a81]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:3843:b0:2b0:6068:4c5f with SMTP id d9443c01a7336-2bd526ed865mr87328355ad.8.1778872829653; Fri, 15 May 2026 12:20:29 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:06 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-6-seanjc@google.com> Subject: [PATCH v3 05/41] x86/tdx: Override PV calibration routines with CPUID-based calibration From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1778872832-F407FCF5-9E674668/0/0 X-purgate-type: clean X-purgate-size: 5002 When running as a TDX guest, explicitly override the TSC frequency calibration routine with CPUID-based calibration instead of potentially relying on a hypervisor-controlled PV routine. For TDX guests, CPUID.0x15 is always emulated by the TDX-Module, i.e. the information from CPUID is more trustworthy than the information provided by the hypervisor. To maintain backwards compatibility with TDX guest kernels that use native calibration, and because it's the least awful option, retain native_calibrate_tsc()'s stuffing of the local APIC bus period using the core crystal frequency. While it's entirely possible for the hypervisor to emulate the APIC timer at a different frequency than the core crystal frequency, the commonly accepted interpretation of Intel's SDM is that APIC timer runs at the core crystal frequency when that latter is enumerated via CPUID: The APIC timer frequency will be the processor=E2=80=99s bus clock or cor= e crystal clock frequency (when TSC/core crystal clock ratio is enumerated in CPUID leaf 0x15). If the hypervisor is malicious and deliberately runs the APIC timer at the wrong frequency, nothing would stop the hypervisor from modifying the frequency at any time, i.e. attempting to manually calibrate the frequency out of paranoia would be futile. Deliberately leave the CPU frequency calibration routine as is, since the TDX-Module doesn't provide any guarantees with respect to CPUID.0x16. Opportunistically add a comment explaining that CoCo TSC initialization needs to come after hypervisor specific initialization. Cc: Kirill A. Shutemov Signed-off-by: Sean Christopherson --- arch/x86/coco/tdx/tdx.c | 30 +++++++++++++++++++++++++++--- arch/x86/include/asm/tdx.h | 2 ++ arch/x86/kernel/tsc.c | 8 ++++++++ 3 files changed, 37 insertions(+), 3 deletions(-) diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 29b6f1ed59ec..26890cea790b 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -1123,9 +1124,6 @@ void __init tdx_early_init(void) =20 setup_force_cpu_cap(X86_FEATURE_TDX_GUEST); =20 - /* TSC is the only reliable clock in TDX guest */ - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - cc_vendor =3D CC_VENDOR_INTEL; =20 /* Configure the TD */ @@ -1195,3 +1193,29 @@ void __init tdx_early_init(void) =20 tdx_announce(); } + +static unsigned long tdx_get_tsc_khz(void) +{ + struct cpuid_tsc_info info; + + if (WARN_ON_ONCE(cpuid_get_tsc_freq(&info))) + return 0; + + lapic_timer_period =3D info.crystal_khz * 1000 / HZ; + + return info.tsc_khz; +} + +void __init tdx_tsc_init(void) +{ + /* TSC is the only reliable clock in TDX guest */ + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + + /* + * Override the PV calibration routines (if set) with more trustworthy + * CPUID-based calibration. The TDX module emulates CPUID, whereas any + * PV information is provided by the hypervisor. + */ + tsc_register_calibration_routines(tdx_get_tsc_khz, NULL); +} diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h index 15eac89b0afb..60deab0ed979 100644 --- a/arch/x86/include/asm/tdx.h +++ b/arch/x86/include/asm/tdx.h @@ -57,6 +57,7 @@ struct ve_info { #ifdef CONFIG_INTEL_TDX_GUEST =20 void __init tdx_early_init(void); +void __init tdx_tsc_init(void); =20 void tdx_get_ve_info(struct ve_info *ve); =20 @@ -78,6 +79,7 @@ void __init tdx_dump_td_ctls(u64 td_ctls); #else =20 static inline void tdx_early_init(void) { }; +static inline void tdx_tsc_init(void) { } static inline void tdx_halt(void) { }; =20 static inline bool tdx_early_handle_ve(struct pt_regs *regs) { return fals= e; } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 243999692aea..e00f53e3dd8d 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -34,6 +34,7 @@ #include #include #include +#include =20 unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ EXPORT_SYMBOL(cpu_khz); @@ -1559,8 +1560,15 @@ void __init tsc_early_init(void) if (is_early_uv_system()) return; =20 + /* + * Do CoCo specific "secure" TSC initialization *after* hypervisor + * platform initialization so that the secure variant can override the + * hypervisor's PV calibration routine with a more trusted method. + */ if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) snp_secure_tsc_init(); + else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) + tdx_tsc_init(); =20 if (!determine_cpu_tsc_frequencies(true)) return; --=20 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310184.1581052 (Exim 4.92) (envelope-from ) id 1wNy5K-0006LE-IS; Fri, 15 May 2026 19:20:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310184.1581052; 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AFNElJ/v8fklv3MCI598bFORUqa5jb9KyUB8ECtvQPiwBdZDCxabIcp0bCi7pxmiv8stihT3ikf+6jdJs34=@lists.xenproject.org X-Gm-Message-State: AOJu0YydalLHPiNji+gaSu12owcMwnKoCGOB+Cziwf2f2U5L/dpNBwq6 GYx+gkxnCzvkelWpfXGn8nf7lXxqxb/oUdZyenw/5Y0Ne0aGz8PlkrefYbNKlOyKz7dls3KTtK9 zczR0bA== X-Received: from pfbgg10.prod.google.com ([2002:a05:6a00:630a:b0:83a:d498:99fb]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:a907:b0:835:447b:a2ac with SMTP id d2e1a72fcca58-83f18d5b8f5mr8777489b3a.5.1778872828431; Fri, 15 May 2026 12:20:28 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:05 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-5-seanjc@google.com> Subject: [PATCH v3 04/41] x86/sev: Move check for SNP Secure TSC support to tsc_early_init() From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1778872831-A9B70161-310994C1/0/0 X-purgate-type: clean X-purgate-size: 1533 Move the check on having a Secure TSC to the common tsc_early_init() so that it's obvious that having a Secure TSC is conditional, and to prepare for adding TDX to the mix (blindly initializing *both* SNP and TDX TSC logic looks especially weird). No functional change intended. Cc: Tom Lendacky Reviewed-by: Nikunj A Dadhania Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 3 --- arch/x86/kernel/tsc.c | 3 ++- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 14ced854cd83..39fb50697542 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2029,9 +2029,6 @@ void __init snp_secure_tsc_init(void) unsigned long tsc_freq_mhz; void *mem; - if (!cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) - return; - mem = early_memremap_encrypted(sev_secrets_pa, PAGE_SIZE); if (!mem) { pr_err("Unable to get TSC_FACTOR: failed to map the SNP secrets page.\n"); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 7e639c0a94a2..243999692aea 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1559,7 +1559,8 @@ void __init tsc_early_init(void) if (is_early_uv_system()) return; - snp_secure_tsc_init(); + if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) + snp_secure_tsc_init(); if (!determine_cpu_tsc_frequencies(true)) return; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310185.1581065 (Exim 4.92) (envelope-from ) id 1wNy5L-0006ju-Pq; Fri, 15 May 2026 19:20:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310185.1581065; Fri, 15 May 2026 19:20:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5L-0006hv-KD; Fri, 15 May 2026 19:20:35 +0000 Received: by outflank-mailman (input) for mailman id 1310185; Fri, 15 May 2026 19:20:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3_nEHagYKCVcH3zC815DD5A3.1DBM3C-23K3AA7HIH.M3CEGD831I.DG5@flex--seanjc.bounces.google.com>) id 1wNy5J-0006Ho-QS for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872833-DBF7ACF5-46DFD8C9/0/0 X-purgate-type: clean X-purgate-size: 901 Mark the TSC frequency as known when using ACRN's PV CPUID information. Per commit 81a71f51b89e ("x86/acrn: Set up timekeeping") and common sense, the TSC freq is explicitly provided by the hypervisor. Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/acrn.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index c1506cb87d8c..2da3de4d470e 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -29,6 +29,7 @@ static void __init acrn_init_platform(void) /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); tsc_register_calibration_routines(acrn_get_tsc_khz, acrn_get_tsc_khz); } -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310187.1581073 (Exim 4.92) (envelope-from ) id 1wNy5N-00070g-45; Fri, 15 May 2026 19:20:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310187.1581073; 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AFNElJ91SuZG0rcNNJo8rZI46rqNF9ssToksy8Ma4evjUstEW/eRft1Izln9Hl94TF1WlLf58Xk8b3lneb8=@lists.xenproject.org X-Gm-Message-State: AOJu0YzaoTD2VPVgJMsqhiVeYeoAPEYOcLLLTbqH8+LvAD1U/eBGuH2x ZVTyRlmHYnZ0XcVED51INHPWnP4x6KSRZnJAAZZ/3s2dhzUJR2VSuF6rGXPcYhOR/VYq8UYk82Z RsPSWaQ== X-Received: from pfbfk26.prod.google.com ([2002:a05:6a00:3a9a:b0:83e:fb05:9740]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:3689:b0:837:7e7d:3c8 with SMTP id d2e1a72fcca58-83f33df5086mr5912339b3a.39.1778872831848; Fri, 15 May 2026 12:20:31 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:08 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-8-seanjc@google.com> Subject: [PATCH v3 07/41] clocksource: hyper-v: Register sched_clock save/restore iff it's necessary From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1778872834-82D6F161-6BB0CF91/0/0 X-purgate-type: clean X-purgate-size: 6563 Register the Hyper-V reference counter (refcounter) callbacks for saving and restoring its PV sched_clock, if and only if the refcounter is actually being used for sched_clock. Currently, Hyper-V overrides the save/restore hooks if the reference TSC available, whereas the Hyper-V refcounter code only overrides sched_clock if the reference TSC is available *and* it's not invariant. The flaw is effectively papered over by invoking the "old" save/restore callbacks as part of save/restore, but that's unnecessary and fragile. To avoid introducing more complexity, and to allow for additional cleanups of the PV sched_clock code, move the save/restore hooks and logic into hyperv_timer.c and simply wire up the hooks when overriding sched_clock itself. Note, while the Hyper-V refcounter code is intended to be architecture neutral, CONFIG_PARAVIRT is firmly x86-only, i.e. adding a small amount of x86 specific code (which will be reduced in future cleanups) doesn't meaningfully pollute generic code. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/mshyperv.c | 58 ------------------------------ drivers/clocksource/hyperv_timer.c | 50 ++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 58 deletions(-) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 8d2401be420c..5ca139ae50b4 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -275,63 +275,6 @@ static void hv_guest_crash_shutdown(struct pt_regs *regs) } #endif /* CONFIG_CRASH_DUMP */ -static u64 hv_ref_counter_at_suspend; -static void (*old_save_sched_clock_state)(void); -static void (*old_restore_sched_clock_state)(void); - -/* - * Hyper-V clock counter resets during hibernation. Save and restore clock - * offset during suspend/resume, while also considering the time passed - * before suspend. This is to make sure that sched_clock using hv tsc page - * based clocksource, proceeds from where it left off during suspend and - * it shows correct time for the timestamps of kernel messages after resume. - */ -static void save_hv_clock_tsc_state(void) -{ - hv_ref_counter_at_suspend = hv_read_reference_counter(); -} - -static void restore_hv_clock_tsc_state(void) -{ - /* - * Adjust the offsets used by hv tsc clocksource to - * account for the time spent before hibernation. - * adjusted value = reference counter (time) at suspend - * - reference counter (time) now. - */ - hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); -} - -/* - * Functions to override save_sched_clock_state and restore_sched_clock_state - * functions of x86_platform. The Hyper-V clock counter is reset during - * suspend-resume and the offset used to measure time needs to be - * corrected, post resume. - */ -static void hv_save_sched_clock_state(void) -{ - old_save_sched_clock_state(); - save_hv_clock_tsc_state(); -} - -static void hv_restore_sched_clock_state(void) -{ - restore_hv_clock_tsc_state(); - old_restore_sched_clock_state(); -} - -static void __init x86_setup_ops_for_tsc_pg_clock(void) -{ - if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) - return; - - old_save_sched_clock_state = x86_platform.save_sched_clock_state; - x86_platform.save_sched_clock_state = hv_save_sched_clock_state; - - old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; - x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; -} - #ifdef CONFIG_X86_64 DEFINE_STATIC_CALL(hv_hypercall, hv_std_hypercall); EXPORT_STATIC_CALL_TRAMP_GPL(hv_hypercall); @@ -739,7 +682,6 @@ static void __init ms_hyperv_init_platform(void) /* Register Hyper-V specific clocksource */ hv_init_clocksource(); - x86_setup_ops_for_tsc_pg_clock(); hv_vtl_init_platform(); #endif /* diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index e9f5034a1bc8..72b966340a46 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -537,10 +537,60 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) #elif defined CONFIG_PARAVIRT #include +static u64 hv_ref_counter_at_suspend; +static void (*old_save_sched_clock_state)(void); +static void (*old_restore_sched_clock_state)(void); + +/* + * Hyper-V clock counter resets during hibernation. Save and restore clock + * offset during suspend/resume, while also considering the time passed + * before suspend. This is to make sure that sched_clock using hv tsc page + * based clocksource, proceeds from where it left off during suspend and + * it shows correct time for the timestamps of kernel messages after resume. + */ +static void save_hv_clock_tsc_state(void) +{ + hv_ref_counter_at_suspend = hv_read_reference_counter(); +} + +static void restore_hv_clock_tsc_state(void) +{ + /* + * Adjust the offsets used by hv tsc clocksource to + * account for the time spent before hibernation. + * adjusted value = reference counter (time) at suspend + * - reference counter (time) now. + */ + hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); +} +/* + * Functions to override save_sched_clock_state and restore_sched_clock_state + * functions of x86_platform. The Hyper-V clock counter is reset during + * suspend-resume and the offset used to measure time needs to be + * corrected, post resume. + */ +static void hv_save_sched_clock_state(void) +{ + old_save_sched_clock_state(); + save_hv_clock_tsc_state(); +} + +static void hv_restore_sched_clock_state(void) +{ + restore_hv_clock_tsc_state(); + old_restore_sched_clock_state(); +} + static __always_inline void hv_setup_sched_clock(void *sched_clock) { /* We're on x86/x64 *and* using PV ops */ paravirt_set_sched_clock(sched_clock); + + old_save_sched_clock_state = x86_platform.save_sched_clock_state; + x86_platform.save_sched_clock_state = hv_save_sched_clock_state; + + old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; + x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; } #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ static __always_inline void hv_setup_sched_clock(void *sched_clock) {} -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310188.1581080 (Exim 4.92) (envelope-from ) id 1wNy5N-00074F-Nl; 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AFNElJ//p85kLNn0Am3oRL3/mqiipytvsPSOYwd+5x1zBDA7YjDy5mX/ROW/NqEO7IE6HmYlXb5mZfbeDlg=@lists.xenproject.org X-Gm-Message-State: AOJu0YybZV5RVwj+rVcXuHWa9SUdHDXBPGE/l1NZKQJ2ut3iz6L0JUia QF91QghhmvEC2nqk56D31TQVjGUtCQGOnrivuUUG0z3q95KpBbJ05NFaIkPKm7JkI95yvpmt7AA Cla9pwg== X-Received: from pfbcg6.prod.google.com ([2002:a05:6a00:2906:b0:836:ed4a:203f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:72ab:b0:3a0:d88:6d6b with SMTP id adf61e73a8af0-3b22ecf592fmr6792680637.49.1778872833039; Fri, 15 May 2026 12:20:33 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:09 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-9-seanjc@google.com> Subject: [PATCH v3 08/41] clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1778872835-AB762161-EC9D79B5/0/0 X-purgate-type: clean X-purgate-size: 3392 Now that all of the Hyper-V reference counter sched_clock code is located in a single file, drop the superfluous wrappers for the save/restore flows. No functional change intended. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Signed-off-by: Sean Christopherson --- drivers/clocksource/hyperv_timer.c | 34 +++++------------------------- include/clocksource/hyperv_timer.h | 2 -- 2 files changed, 5 insertions(+), 31 deletions(-) diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index 72b966340a46..69c1c7264e5d 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -472,17 +472,6 @@ static void resume_hv_clock_tsc(struct clocksource *arg) hv_set_msr(HV_MSR_REFERENCE_TSC, tsc_msr.as_uint64); } -/* - * Called during resume from hibernation, from overridden - * x86_platform.restore_sched_clock_state routine. This is to adjust offsets - * used to calculate time for hv tsc page based sched_clock, to account for - * time spent before hibernation. - */ -void hv_adj_sched_clock_offset(u64 offset) -{ - hv_sched_clock_offset -= offset; -} - #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK static int hv_cs_enable(struct clocksource *cs) { @@ -548,12 +537,14 @@ static void (*old_restore_sched_clock_state)(void); * based clocksource, proceeds from where it left off during suspend and * it shows correct time for the timestamps of kernel messages after resume. */ -static void save_hv_clock_tsc_state(void) +static void hv_save_sched_clock_state(void) { + old_save_sched_clock_state(); + hv_ref_counter_at_suspend = hv_read_reference_counter(); } -static void restore_hv_clock_tsc_state(void) +static void hv_restore_sched_clock_state(void) { /* * Adjust the offsets used by hv tsc clocksource to @@ -561,23 +552,8 @@ static void restore_hv_clock_tsc_state(void) * adjusted value = reference counter (time) at suspend * - reference counter (time) now. */ - hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); -} -/* - * Functions to override save_sched_clock_state and restore_sched_clock_state - * functions of x86_platform. The Hyper-V clock counter is reset during - * suspend-resume and the offset used to measure time needs to be - * corrected, post resume. - */ -static void hv_save_sched_clock_state(void) -{ - old_save_sched_clock_state(); - save_hv_clock_tsc_state(); -} + hv_sched_clock_offset -= (hv_ref_counter_at_suspend - hv_read_reference_counter()); -static void hv_restore_sched_clock_state(void) -{ - restore_hv_clock_tsc_state(); old_restore_sched_clock_state(); } diff --git a/include/clocksource/hyperv_timer.h b/include/clocksource/hyperv_timer.h index d48dd4176fd3..a4c81a60f53d 100644 --- a/include/clocksource/hyperv_timer.h +++ b/include/clocksource/hyperv_timer.h @@ -38,8 +38,6 @@ extern void hv_remap_tsc_clocksource(void); extern unsigned long hv_get_tsc_pfn(void); extern struct ms_hyperv_tsc_page *hv_get_tsc_page(void); -extern void hv_adj_sched_clock_offset(u64 offset); - static __always_inline bool hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg, u64 *cur_tsc, u64 *time) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310189.1581092 (Exim 4.92) (envelope-from ) id 1wNy5P-0007US-BV; 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AFNElJ8Y3zrGQAJGCUlex9xaBqdkncVN/sKXo3myNte7870y/VmG7MsVFoH3wCascPPOE3aPE5vSdi9ptDQ=@lists.xenproject.org X-Gm-Message-State: AOJu0YwusXfNfNw/+LRE5kOaBAjP8FvgBIYQbOr1Sp4E3bfXgAJ6LtDr jnB1YyHcZNpV5DGAPN7myN8iQbAKTCGMPO9FzhRB1RMuavquOwO3Y5F207koAcVHlOzrlmEd3o4 AsHFP7Q== X-Received: from pfblg3.prod.google.com ([2002:a05:6a00:7083:b0:82f:bf29:61aa]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:1ca4:b0:82c:6b1b:7ad4 with SMTP id d2e1a72fcca58-83f33bc808emr5114483b3a.3.1778872834057; Fri, 15 May 2026 12:20:34 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:10 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-10-seanjc@google.com> Subject: [PATCH v3 09/41] clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1778872836-8276A161-31BF9B3C/0/0 X-purgate-type: clean X-purgate-size: 2673 Now that Hyper-V overrides the sched_clock save/restore hooks if and only sched_clock itself is set to the Hyper-V reference counter, drop the invocation of the "old" save/restore callbacks. When the registration of the PV sched_clock was done separately from overriding the save/restore hooks, it was possible for Hyper-V to clobber the TSC save/restore callbacks without actually switching to the Hyper-V refcounter. Enabling a PV sched_clock is a one-way street, i.e. the kernel will never revert to using TSC for sched_clock, and so there is no need to invoke the TSC save/restore hooks (and if there was, it belongs in common PV code). Reviewed-by: Michael Kelley Tested-by: Michael Kelley Signed-off-by: Sean Christopherson --- drivers/clocksource/hyperv_timer.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index 69c1c7264e5d..ac1d9f9c381c 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -527,9 +527,6 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) #include static u64 hv_ref_counter_at_suspend; -static void (*old_save_sched_clock_state)(void); -static void (*old_restore_sched_clock_state)(void); - /* * Hyper-V clock counter resets during hibernation. Save and restore clock * offset during suspend/resume, while also considering the time passed @@ -539,8 +536,6 @@ static void (*old_restore_sched_clock_state)(void); */ static void hv_save_sched_clock_state(void) { - old_save_sched_clock_state(); - hv_ref_counter_at_suspend = hv_read_reference_counter(); } @@ -553,8 +548,6 @@ static void hv_restore_sched_clock_state(void) * - reference counter (time) now. */ hv_sched_clock_offset -= (hv_ref_counter_at_suspend - hv_read_reference_counter()); - - old_restore_sched_clock_state(); } static __always_inline void hv_setup_sched_clock(void *sched_clock) @@ -562,10 +555,7 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) /* We're on x86/x64 *and* using PV ops */ paravirt_set_sched_clock(sched_clock); - old_save_sched_clock_state = x86_platform.save_sched_clock_state; x86_platform.save_sched_clock_state = hv_save_sched_clock_state; - - old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; } #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310191.1581096 (Exim 4.92) (envelope-from ) id 1wNy5P-0007Z2-N7; Fri, 15 May 2026 19:20:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310191.1581096; Fri, 15 May 2026 19:20:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5P-0007Xm-EZ; Fri, 15 May 2026 19:20:39 +0000 Received: by outflank-mailman (input) for mailman id 1310191; Fri, 15 May 2026 19:20:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3A3IHagYKCVwM84HD6AIIAF8.6IGR8H-78P8FFCMNM.R8HJLID86N.ILA@flex--seanjc.bounces.google.com>) id 1wNy5O-0007HD-DJ for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ebf023/1778872837-2997A3FF-61D3BE28/0/0 X-purgate-type: clean X-purgate-size: 1325 Gate kvmclock's secondary CPU code on CONFIG_SMP, not CONFIG_X86_LOCAL_APIC. Originally, kvmclock piggybacked PV APIC ops to setup secondary CPUs. When that wart was fixed by commit df156f90a0f9 ("x86: Introduce x86_cpuinit.early_percpu_clock_init hook"), the dependency on a local APIC got carried forward unnecessarily. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index e9e7394140dd..df95516a9d89 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -187,7 +187,7 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } -#ifdef CONFIG_X86_LOCAL_APIC +#ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { kvm_register_clock("secondary cpu clock"); @@ -325,7 +325,7 @@ void __init kvmclock_init(void) x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; -#ifdef CONFIG_X86_LOCAL_APIC +#ifdef CONFIG_SMP x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; #endif x86_platform.save_sched_clock_state = kvm_save_sched_clock_state; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310199.1581109 (Exim 4.92) (envelope-from ) id 1wNy5X-0008VR-0C; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872844-7216A8B7-DE72885C/0/0 X-purgate-type: clean X-purgate-size: 5352 Don't disable kvmclock on the BSP during syscore_suspend(), as the BSP's clock is NOT restored during syscore_resume(), but is instead restored earlier via the sched_clock restore callback. If suspend is aborted, e.g. due to a late wakeup, the BSP will run without its clock enabled, which "works" only because KVM-the-hypervisor is kind enough to not clobber the shared memory when the clock is disabled. But over time, the BSP's view of time will drift from APs. Plumb in an "action" to KVM-as-a-guest and kvmclock code in preparation for additional cleanups to kvmclock's suspend/resume logic. Fixes: c02027b5742b ("x86/kvm: Disable kvmclock on all CPUs on shutdown") Cc: stable@vger.kernel.org Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 8 +++++++- arch/x86/kernel/kvm.c | 15 ++++++++------- arch/x86/kernel/kvmclock.c | 31 +++++++++++++++++++++++++------ 3 files changed, 40 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 4a47c16e2df8..2adba2aff539 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -118,8 +118,14 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, } #ifdef CONFIG_KVM_GUEST +enum kvm_guest_cpu_action { + KVM_GUEST_BSP_SUSPEND, + KVM_GUEST_AP_OFFLINE, + KVM_GUEST_SHUTDOWN, +}; + void kvmclock_init(void); -void kvmclock_disable(void); +void kvmclock_cpu_action(enum kvm_guest_cpu_action action); bool kvm_para_available(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 06534e16cfb5..0131bc1cb459 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -457,7 +457,7 @@ static void __init sev_map_percpu_data(void) } } -static void kvm_guest_cpu_offline(bool shutdown) +static void kvm_guest_cpu_offline(enum kvm_guest_cpu_action action) { kvm_disable_steal_time(); if (kvm_para_has_feature(KVM_FEATURE_PV_EOI)) @@ -465,9 +465,10 @@ static void kvm_guest_cpu_offline(bool shutdown) if (kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL)) wrmsrq(MSR_KVM_MIGRATION_CONTROL, 0); kvm_pv_disable_apf(); - if (!shutdown) + if (action != KVM_GUEST_SHUTDOWN) apf_task_wake_all(); - kvmclock_disable(); + + kvmclock_cpu_action(action); } static int kvm_cpu_online(unsigned int cpu) @@ -723,7 +724,7 @@ static int kvm_cpu_down_prepare(unsigned int cpu) unsigned long flags; local_irq_save(flags); - kvm_guest_cpu_offline(false); + kvm_guest_cpu_offline(KVM_GUEST_AP_OFFLINE); local_irq_restore(flags); return 0; } @@ -734,7 +735,7 @@ static int kvm_suspend(void *data) { u64 val = 0; - kvm_guest_cpu_offline(false); + kvm_guest_cpu_offline(KVM_GUEST_BSP_SUSPEND); #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL)) @@ -765,7 +766,7 @@ static struct syscore kvm_syscore = { static void kvm_pv_guest_cpu_reboot(void *unused) { - kvm_guest_cpu_offline(true); + kvm_guest_cpu_offline(KVM_GUEST_SHUTDOWN); } static int kvm_pv_reboot_notify(struct notifier_block *nb, @@ -789,7 +790,7 @@ static struct notifier_block kvm_pv_reboot_nb = { #ifdef CONFIG_CRASH_DUMP static void kvm_crash_shutdown(struct pt_regs *regs) { - kvm_guest_cpu_offline(true); + kvm_guest_cpu_offline(KVM_GUEST_SHUTDOWN); native_machine_crash_shutdown(regs); } #endif diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index df95516a9d89..006e3a13500b 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -178,8 +178,22 @@ static void kvm_register_clock(char *txt) pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); } +static void kvmclock_disable(void) +{ + if (msr_kvm_system_time) + native_write_msr(msr_kvm_system_time, 0); +} + static void kvm_save_sched_clock_state(void) { + /* + * Stop host writes to kvmclock immediately prior to suspend/hibernate. + * If the system is hibernating, then kvmclock will likely reside at a + * different physical address when the system awakens, and host writes + * to the old address prior to reconfiguring kvmclock would clobber + * random memory. + */ + kvmclock_disable(); } static void kvm_restore_sched_clock_state(void) @@ -187,6 +201,17 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } +void kvmclock_cpu_action(enum kvm_guest_cpu_action action) +{ + /* + * Don't disable kvmclock on the BSP during suspend. If kvmclock is + * being used for sched_clock, then it needs to be kept alive until the + * last minute, and restored as quickly as possible after resume. + */ + if (action != KVM_GUEST_BSP_SUSPEND) + kvmclock_disable(); +} + #ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { @@ -194,12 +219,6 @@ static void kvm_setup_secondary_clock(void) } #endif -void kvmclock_disable(void) -{ - if (msr_kvm_system_time) - native_write_msr(msr_kvm_system_time, 0); -} - static void __init kvmclock_init_mem(void) { unsigned long ncpus; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310204.1581116 (Exim 4.92) (envelope-from ) id 1wNy5X-0000Cq-Sk; Fri, 15 May 2026 19:20:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310204.1581116; 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AFNElJ+drciCkDdNpRMKel2ADecGw6T1Ytj+2jHsKvkOyHkTvTdG56AbjwIQKkjikV08KW/9XuHSUG9Fi24=@lists.xenproject.org X-Gm-Message-State: AOJu0YyQOUKw5p6qWqbcyyrBsA2usuWuFEPFip3K4T29U33Ibm7XF7wM Mo/q8wRfxaLjo3AsOb8/PwGrVqut+lG8/fCu8j0UJL/PPBGgkbajwdBF+PDkuk0QDwUxDvzxXGp XO0SGfg== X-Received: from pfbg4.prod.google.com ([2002:a05:6a00:ae04:b0:82f:c34b:9799]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:4193:b0:83e:eeab:aff8 with SMTP id d2e1a72fcca58-83f33d24d7cmr6075416b3a.25.1778872843406; Fri, 15 May 2026 12:20:43 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:13 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-13-seanjc@google.com> Subject: [PATCH v3 12/41] x86/paravirt: Remove unnecessary PARAVIRT=n stub for paravirt_set_sched_clock() From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-bad1c0/1778872845-88970A53-64006DA5/0/0 X-purgate-type: clean X-purgate-size: 1520 Remove the unnecessary paravirt_set_sched_clock() stub for PARAVIRT=n, as all callers are gated by PARAVIRT=y. Eliminating the stub will avoid a pile of pointless churn as the "real" implementation evolves. No functional change intended. Fixes: 39965afb1151 ("x86/paravirt: Move paravirt_sched_clock() related code into tsc.c") Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 3 +++ arch/x86/kernel/tsc.c | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index fda18bcb19b4..c71b466d6ace 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -12,7 +12,10 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; extern bool using_native_sched_clock(void); + +#ifdef CONFIG_PARAVIRT void paravirt_set_sched_clock(u64 (*func)(void)); +#endif /* * We use the full linear equation: f(x) = a + b*x, in order to allow diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index e00f53e3dd8d..021612c22b84 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -288,7 +288,6 @@ void paravirt_set_sched_clock(u64 (*func)(void)) u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); bool using_native_sched_clock(void) { return true; } -void paravirt_set_sched_clock(u64 (*func)(void)) { } #endif notrace u64 sched_clock(void) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310207.1581128 (Exim 4.92) (envelope-from ) id 1wNy5a-0000pU-9F; Fri, 15 May 2026 19:20:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310207.1581128; Fri, 15 May 2026 19:20:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5a-0000nv-1V; Fri, 15 May 2026 19:20:50 +0000 Received: by outflank-mailman (input) for mailman id 1310207; Fri, 15 May 2026 19:20:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3DHIHagYKCWUVHDQMFJRRJOH.FRPaHQ-GHYHOOLVWV.aHQSURMHFW.RUJ@flex--seanjc.bounces.google.com>) id 1wNy5X-0000C1-Op for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1778872847-8C07ED75-AE88070B/0/0 X-purgate-type: clean X-purgate-size: 2517 Move the handling of unstable PV clocks, of which kvmclock is the only example, into paravirt_set_sched_clock(). This will allow modifying paravirt_set_sched_clock() to keep using the TSC for sched_clock in certain scenarios without unintentionally marking the TSC-based clock as unstable. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 7 ++++++- arch/x86/kernel/kvmclock.c | 5 +---- arch/x86/kernel/tsc.c | 5 ++++- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index c71b466d6ace..fe41d40a9ae6 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,7 +14,12 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void paravirt_set_sched_clock(u64 (*func)(void)); +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable); + +static inline void paravirt_set_sched_clock(u64 (*func)(void)) +{ + __paravirt_set_sched_clock(func, true); +} #endif /* diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 006e3a13500b..1cbdb48e5503 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -94,10 +93,8 @@ static noinstr u64 kvm_sched_clock_read(void) static inline void kvm_sched_clock_init(bool stable) { - if (!stable) - clear_sched_clock_stable(); kvm_sched_clock_offset = kvm_clock_read(); - paravirt_set_sched_clock(kvm_sched_clock_read); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable); pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 021612c22b84..567d30b30a5a 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,11 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void paravirt_set_sched_clock(u64 (*func)(void)) +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable) { + if (!stable) + clear_sched_clock_stable(); + static_call_update(pv_sched_clock, func); } #else -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310210.1581132 (Exim 4.92) (envelope-from ) id 1wNy5b-0000uc-2p; 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AFNElJ/6k2ez1Oh5CrVrpazNc4k0boIy6VES/Uc7+Yj4vh8xtjHL5BDooZjnQ4CyL+xYLmYtIN7G18E0//o=@lists.xenproject.org X-Gm-Message-State: AOJu0Yy5oA+b8UTuFcTP/w6nSR3QXCtKKwT+m2a2jqgzSOOGqiW8f8dV qTznuAvXnHmKe8rGYzYErYF7fy4/wRDkXsVyrlGc/xSeszDUeES6JsfeQOBr6d2+9fGcfCrQgf4 s/RHnng== X-Received: from pgc15.prod.google.com ([2002:a05:6a02:2f8f:b0:c74:497:507e]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:5488:b0:368:7398:df8a with SMTP id 98e67ed59e1d1-369233192aamr8411686a91.4.1778872845655; Fri, 15 May 2026 12:20:45 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:15 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-15-seanjc@google.com> Subject: [PATCH v3 14/41] x86/kvmclock: Move sched_clock save/restore helpers up in kvmclock.c From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872848-71D688B7-43C29C7C/0/0 X-purgate-type: clean X-purgate-size: 4368 Move kvmclock's sched_clock save/restore helper "up" so that they can (eventually) be referenced by kvm_sched_clock_init(). No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 108 ++++++++++++++++++------------------- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 1cbdb48e5503..800c3d65f0af 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -71,6 +71,25 @@ static int kvm_set_wallclock(const struct timespec64 *now) return -ENODEV; } +static void kvm_register_clock(char *txt) +{ + struct pvclock_vsyscall_time_info *src = this_cpu_hvclock(); + u64 pa; + + if (!src) + return; + + pa = slow_virt_to_phys(&src->pvti) | 0x01ULL; + wrmsrq(msr_kvm_system_time, pa); + pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); +} + +static void kvmclock_disable(void) +{ + if (msr_kvm_system_time) + native_write_msr(msr_kvm_system_time, 0); +} + static u64 kvm_clock_read(void) { u64 ret; @@ -91,6 +110,30 @@ static noinstr u64 kvm_sched_clock_read(void) return pvclock_clocksource_read_nowd(this_cpu_pvti()) - kvm_sched_clock_offset; } +static void kvm_save_sched_clock_state(void) +{ + /* + * Stop host writes to kvmclock immediately prior to suspend/hibernate. + * If the system is hibernating, then kvmclock will likely reside at a + * different physical address when the system awakens, and host writes + * to the old address prior to reconfiguring kvmclock would clobber + * random memory. + */ + kvmclock_disable(); +} + +#ifdef CONFIG_SMP +static void kvm_setup_secondary_clock(void) +{ + kvm_register_clock("secondary cpu clock"); +} +#endif + +static void kvm_restore_sched_clock_state(void) +{ + kvm_register_clock("primary cpu clock, resume"); +} + static inline void kvm_sched_clock_init(bool stable) { kvm_sched_clock_offset = kvm_clock_read(); @@ -103,6 +146,17 @@ static inline void kvm_sched_clock_init(bool stable) sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); } +void kvmclock_cpu_action(enum kvm_guest_cpu_action action) +{ + /* + * Don't disable kvmclock on the BSP during suspend. If kvmclock is + * being used for sched_clock, then it needs to be kept alive until the + * last minute, and restored as quickly as possible after resume. + */ + if (action != KVM_GUEST_BSP_SUSPEND) + kvmclock_disable(); +} + /* * If we don't do that, there is the possibility that the guest * will calibrate under heavy load - thus, getting a lower lpj - @@ -162,60 +216,6 @@ static struct clocksource kvm_clock = { .enable = kvm_cs_enable, }; -static void kvm_register_clock(char *txt) -{ - struct pvclock_vsyscall_time_info *src = this_cpu_hvclock(); - u64 pa; - - if (!src) - return; - - pa = slow_virt_to_phys(&src->pvti) | 0x01ULL; - wrmsrq(msr_kvm_system_time, pa); - pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); -} - -static void kvmclock_disable(void) -{ - if (msr_kvm_system_time) - native_write_msr(msr_kvm_system_time, 0); -} - -static void kvm_save_sched_clock_state(void) -{ - /* - * Stop host writes to kvmclock immediately prior to suspend/hibernate. - * If the system is hibernating, then kvmclock will likely reside at a - * different physical address when the system awakens, and host writes - * to the old address prior to reconfiguring kvmclock would clobber - * random memory. - */ - kvmclock_disable(); -} - -static void kvm_restore_sched_clock_state(void) -{ - kvm_register_clock("primary cpu clock, resume"); -} - -void kvmclock_cpu_action(enum kvm_guest_cpu_action action) -{ - /* - * Don't disable kvmclock on the BSP during suspend. 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Fri, 15 May 2026 12:20:46 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:16 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-16-seanjc@google.com> Subject: [PATCH v3 15/41] x86/xen/time: Nullify x86_platform's sched_clock save/restore hooks From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872849-E0F62CF5-2456AD60/0/0 X-purgate-type: clean X-purgate-size: 1097 Nullify the x86_platform sched_clock save/restore hooks when setting up Xen's PV clock to make it somewhat obvious the hooks aren't used when running as a Xen guest (Xen uses a paravirtualized suspend/resume flow). Signed-off-by: Sean Christopherson --- arch/x86/xen/time.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 3d3165eef821..21d366d01985 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -568,6 +568,12 @@ static void __init xen_init_time_common(void) xen_sched_clock_offset = xen_clocksource_read(); static_call_update(pv_steal_clock, xen_steal_clock); paravirt_set_sched_clock(xen_sched_clock); + /* + * Xen has paravirtualized suspend/resume and so doesn't use the common + * x86 sched_clock save/restore hooks. + */ + x86_platform.save_sched_clock_state = NULL; + x86_platform.restore_sched_clock_state = NULL; tsc_register_calibration_routines(xen_tsc_khz, NULL); x86_platform.get_wallclock = xen_get_wallclock; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310217.1581147 (Exim 4.92) (envelope-from ) id 1wNy5e-0001XO-2o; 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AFNElJ+m67F4FARiBorh4cIEIOKL4Cf33wJrQmc5vSawfilhfc6VwA8VZ8wCAX6tR/34wtH2kJmeFfllqh0=@lists.xenproject.org X-Gm-Message-State: AOJu0YwfNF7vd1i15zarfpiFGomvf+gNm98MR58qbjW49yeI8uryyk9Z G7+uzeNnRUQcoZovw6M70Oc8PZFQAd3RZpIlgliniaVQsZgB/zJtdfwKpGWOn4ZYnkni7ysPvJs 0pd59uA== X-Received: from pfbff26.prod.google.com ([2002:a05:6a00:2f5a:b0:83e:dfc6:971]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:1908:b0:82f:50cd:e586 with SMTP id d2e1a72fcca58-83f33cb2c40mr5886442b3a.13.1778872848066; Fri, 15 May 2026 12:20:48 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:17 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-17-seanjc@google.com> Subject: [PATCH v3 16/41] x86/vmware: Nullify save/restore hooks when using VMware's sched_clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872850-7C67F8B7-2B5C773B/0/0 X-purgate-type: clean X-purgate-size: 1195 Nullify the sched_clock save/restore hooks when using VMware's version of sched_clock. This will allow extending paravirt_set_sched_clock() to set the save/restore hooks, without having to simultaneously change the behavior of VMware guests. Note, it's not at all obvious that it's safe/correct for VMware guests to do nothing on suspend/resume, but that's a pre-existing problem. Leave it for a VMware expert to sort out. Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/vmware.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index b88d9ca01202..b5cb66ca022b 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -347,8 +347,11 @@ static void __init vmware_paravirt_ops_setup(void) vmware_cyc2ns_setup(); - if (vmw_sched_clock) + if (vmw_sched_clock) { paravirt_set_sched_clock(vmware_sched_clock); + x86_platform.save_sched_clock_state = NULL; + x86_platform.restore_sched_clock_state = NULL; + } if (vmware_is_stealclock_available()) { has_steal_clock = true; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310226.1581162 (Exim 4.92) (envelope-from ) id 1wNy5h-0002N1-JY; Fri, 15 May 2026 19:20:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310226.1581162; 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AFNElJ+X7Km+X0YA+XbiJpiSsG2SgcY7pqjUR5hu/B44ozwCZThSXyaUuT2qkIzcXd8RQ5FGNjnBonse2xQ=@lists.xenproject.org X-Gm-Message-State: AOJu0Yy2Q/hHRx00miaSmbOg03Oy3pKUNf2q7heOc0a9UPPeU4ONJiwV s48VzmU9Zz1YpQHtu/uvSPc5TAsva0WE2wpx/HFOgBObXxbW6/rXybvF7HkSdFu5VAZsP0RGO4k e4JpTnw== X-Received: from pfblj16.prod.google.com ([2002:a05:6a00:71d0:b0:83f:22c:66ee]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:801b:b0:835:51fd:b7e9 with SMTP id d2e1a72fcca58-83f18e75ed2mr8194934b3a.20.1778872851317; Fri, 15 May 2026 12:20:51 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:20 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-20-seanjc@google.com> Subject: [PATCH v3 19/41] x86/kvmclock: Move kvm_sched_clock_init() down in kvmclock.c From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1778872853-1B979F3B-88B752FE/0/0 X-purgate-type: clean X-purgate-size: 2236 Move kvm_sched_clock_init() "down" so that it can reference the global kvm_clock structure without needing a forward declaration. Opportunistically mark the helper as "__init" instead of "inline" to make its usage more obvious; modern compilers don't need a hint to inline a single-use function, and an extra CALL+RET pair during boot is a complete non-issue. And, if the compiler ignores the hint and does NOT inline the function, the resulting code may not get discarded after boot due lack of an __init annotation. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 962b6fcb5c60..8df6adcd6cd8 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -134,20 +134,6 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } -static inline void kvm_sched_clock_init(bool stable) -{ - kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable, - kvm_save_sched_clock_state, - kvm_restore_sched_clock_state); - - pr_info("kvm-clock: using sched offset of %llu cycles", - kvm_sched_clock_offset); - - BUILD_BUG_ON(sizeof(kvm_sched_clock_offset) > - sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); -} - void kvmclock_cpu_action(enum kvm_guest_cpu_action action) { /* @@ -304,6 +290,20 @@ static int kvmclock_setup_percpu(unsigned int cpu) return p ? 0 : -ENOMEM; } +static __init void kvm_sched_clock_init(bool stable) +{ + kvm_sched_clock_offset = kvm_clock_read(); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state); + + pr_info("kvm-clock: using sched offset of %llu cycles", + kvm_sched_clock_offset); + + BUILD_BUG_ON(sizeof(kvm_sched_clock_offset) > + sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); +} + void __init kvmclock_init(void) { u8 flags; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:20:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:20:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310234.1581169 (Exim 4.92) (envelope-from ) id 1wNy5i-0002Uj-Ak; Fri, 15 May 2026 19:20:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310234.1581169; Fri, 15 May 2026 19:20:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5h-0002Sh-Qa; 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Fri, 15 May 2026 12:20:53 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:22 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-22-seanjc@google.com> Subject: [PATCH v3 21/41] x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1778872855-1B374F3B-647E0ED2/0/0 X-purgate-type: clean X-purgate-size: 1334 Now that Xen PV clock and kvmclock explicitly do setup only during init, tag the common PV clock flags/vsyscall variables and their mutators with __init. Signed-off-by: Sean Christopherson --- arch/x86/kernel/pvclock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index b3f81379c2fc..a51adce67f92 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c @@ -16,10 +16,10 @@ #include #include -static u8 valid_flags __read_mostly = 0; -static struct pvclock_vsyscall_time_info *pvti_cpu0_va __read_mostly; +static u8 valid_flags __ro_after_init = 0; +static struct pvclock_vsyscall_time_info *pvti_cpu0_va __ro_after_init; -void pvclock_set_flags(u8 flags) +void __init pvclock_set_flags(u8 flags) { valid_flags = flags; } @@ -153,7 +153,7 @@ void pvclock_read_wallclock(struct pvclock_wall_clock *wall_clock, set_normalized_timespec64(ts, now.tv_sec, now.tv_nsec); } -void pvclock_set_pvti_cpu0_va(struct pvclock_vsyscall_time_info *pvti) +void __init pvclock_set_pvti_cpu0_va(struct pvclock_vsyscall_time_info *pvti) { WARN_ON(vclock_was_used(VDSO_CLOCKMODE_PVCLOCK)); pvti_cpu0_va = pvti; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:21:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:21:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310265.1581182 (Exim 4.92) (envelope-from ) id 1wNy5u-0004Jn-R1; Fri, 15 May 2026 19:21:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310265.1581182; Fri, 15 May 2026 19:21:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy5u-0004Im-L4; Fri, 15 May 2026 19:21:10 +0000 Received: by outflank-mailman (input) for mailman id 1310265; Fri, 15 May 2026 19:21:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3InIHagYKCXsrdZmibfnnfkd.bnlwdm-cdudkkhrsr.wdmoqnidbs.nqf@flex--seanjc.bounces.google.com>) id 1wNy5u-0004Dh-5d for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1778872869-8DF81D75-27A9D64E/0/0 X-purgate-type: clean X-purgate-size: 2018 Annotate __paravirt_set_sched_clock() as __init, and make its wrapper __always_inline to ensure sanitizers don't result in a non-inline version hanging around. All callers run during __init, and changing sched_clock after boot would be all kinds of crazy. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 10 +++++----- arch/x86/kernel/tsc.c | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index e97cd1ae03d1..96ae7feac47c 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,12 +14,12 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)); +void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); -static inline void paravirt_set_sched_clock(u64 (*func)(void), - void (*save)(void), - void (*restore)(void)) +static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), + void (*save)(void), + void (*restore)(void)) { __paravirt_set_sched_clock(func, true, save, restore); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 0114c63dfdd9..4a48b8ba5bea 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,8 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; 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Fri, 15 May 2026 12:21:13 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:35 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-35-seanjc@google.com> Subject: [PATCH v3 34/41] KVM: x86: Officially define CPUID 0x40000010 as PV Timing Info (TSC and Bus) From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c1860d/1778872875-B7F7ADB1-66344C55/0/0 X-purgate-type: clean X-purgate-size: 3798 From: David Woodhouse Formally define and document CPUID 0x40000010 as providing TSC and local APIC bus frequency information for KVM's PV CPUID range. Way back in 2008, VMware proposed (https://lkml.org/lkml/2008/10/1/246) carving out a range of CPUID leaves for use by hypervisors. While the broader proposal from VMware was mostly shot down in flames, use of CPUID 0x40000010 to provide TSC and local APIC bus frequency information survived and made it's way into multiple guest operating systems. XNU unconditionally assumes CPUID 0x40000010 contains the frequency information, if it's present on any hypervisor: https://github.com/apple/darwin-xnu/blob/main/osfmk/i386/cpuid.c As does FreeBSD: https://github.com/freebsd/freebsd-src/commit/4a432614f68 More importantly, QEMU (the de facto "reference" VMM for KVM) has conditionally provided timing information in CPUID 0x40000010 for almost 9 years, since commit 9954a1582e ("x86-KVM: Supply TSC and APIC clock rates to guest like VMWare"). So at this point it would be daft for KVM (or any hypervisor) to expose 0x40000010 for any *other* content. Officially carve out and define the CPUID leaf so that Linux-as-a-guest can follow suit and pull TSC and Local APIC Bus frequency information from CPUID. Defer providing userspace with the necessary information needed to precisely and accurately enumerate the _actual_ configured TSC frequency to the guest (that exact information, along with the scaled ratio, isn't exposed to userspace). As evidenced by QEMU, providing CPUID 0x40000010 without help from KVM is entirely possible, just not ideal. Link: https://lore.kernel.org/all/ea0d7f43d910cee9600b254e303f468722fa355b.camel@infradead.org Signed-off-by: David Woodhouse [sean: drop KVM filling of CPUID, add documentation, massage changelog] Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/x86/cpuid.rst | 12 ++++++++++++ arch/x86/include/uapi/asm/kvm_para.h | 11 +++++++++++ 2 files changed, 23 insertions(+) diff --git a/Documentation/virt/kvm/x86/cpuid.rst b/Documentation/virt/kvm/x86/cpuid.rst index bda3e3e737d7..f02e395cfa9b 100644 --- a/Documentation/virt/kvm/x86/cpuid.rst +++ b/Documentation/virt/kvm/x86/cpuid.rst @@ -122,3 +122,15 @@ KVM_HINTS_REALTIME 0 guest checks this feature bit to preempted for an unlimited time allowing optimizations ================== ============ ================================= + +function: KVM_CPUID_TIMING_INFO (0x40000010) + +returns:: + + eax = (Virtual) TSC frequency in kHz + ebx = (Virtual) Bus (local APIC timer) frequency in kHz + ecx = 0 (Reserved) + edx = 0 (Reserved) + +Note, KVM only defines the semantics of KVM_CPUID_TIMING_INFO; KVM does NOT +advertise support via KVM_GET_SUPPORTED_CPUID. \ No newline at end of file diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h index a1efa7907a0b..c3a384711f3a 100644 --- a/arch/x86/include/uapi/asm/kvm_para.h +++ b/arch/x86/include/uapi/asm/kvm_para.h @@ -44,6 +44,17 @@ */ #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 +/* + * The timing information leaf provides TSC and local APIC timer frequency + * information to the guest. Note, userspace is responsible for filling the + * leaf with the correct information. + * + * # EAX: (Virtual) TSC frequency in kHz. + * # EBX: (Virtual) Bus (local APIC timer) frequency in kHz. + * # ECX, EDX: Reserved (must be zero). + */ +#define KVM_CPUID_TIMING_INFO 0x40000010 + #define MSR_KVM_WALL_CLOCK 0x11 #define MSR_KVM_SYSTEM_TIME 0x12 -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:21:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:21:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310281.1581200 (Exim 4.92) (envelope-from ) id 1wNy64-0005Yl-Gy; Fri, 15 May 2026 19:21:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310281.1581200; Fri, 15 May 2026 19:21:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy64-0005YY-D0; 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Fri, 15 May 2026 12:21:15 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:37 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-37-seanjc@google.com> Subject: [PATCH v3 36/41] x86/kvmclock: Get local APIC bus frequency from PV CPUID Timing Info From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-bad1c0/1778872878-40B60A53-AA9B544E/0/0 X-purgate-type: clean X-purgate-size: 2961 When running as a KVM guest with kvmclock support enabled, stuff the APIC timer period/frequency with the local APIC bus frequency reported in CPUID.0x40000010.EBX instead of trying to calibrate/guess the frequency. See Documentation/virt/kvm/x86/cpuid.rst for details. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/kernel/kvm.c | 19 ++++++++++++++++--- arch/x86/kernel/kvmclock.c | 13 +++++++++++-- 3 files changed, 28 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 3f7f558b5b24..381d029b72e7 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -130,6 +130,7 @@ void kvmclock_init(void); void kvmclock_cpu_action(enum kvm_guest_cpu_action action); bool kvm_para_available(void); unsigned int kvm_para_tsc_khz(void); +unsigned int kvm_para_apic_bus_khz(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); void kvm_async_pf_task_wait_schedule(u32 token); diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 5cd92a0b156a..bfe36e361b3c 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -918,12 +918,25 @@ bool kvm_para_available(void) } EXPORT_SYMBOL_GPL(kvm_para_available); -unsigned int kvm_para_tsc_khz(void) +static bool kvm_cpuid_has_timing_info(void) { u32 base = kvm_cpuid_base(); - if (cpuid_eax(base) >= (base | KVM_CPUID_TIMING_INFO)) - return cpuid_eax(base | KVM_CPUID_TIMING_INFO); + return cpuid_eax(base) >= (base | KVM_CPUID_TIMING_INFO); +} + +unsigned int kvm_para_tsc_khz(void) +{ + if (kvm_cpuid_has_timing_info()) + return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_TIMING_INFO); + + return 0; +} + +unsigned int kvm_para_apic_bus_khz(void) +{ + if (kvm_cpuid_has_timing_info()) + return cpuid_ebx(kvm_cpuid_base() | KVM_CPUID_TIMING_INFO); return 0; } diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 5ceba4f3836c..abcc5b36ea1d 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -200,10 +200,19 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action action) */ static unsigned long kvm_get_tsc_khz(void) { +#ifdef CONFIG_X86_LOCAL_APIC + u32 apic_khz = kvm_para_apic_bus_khz(); + /* - * If KVM advertises the frequency directly in CPUID, use that - * instead of reverse-calculating it from the KVM clock data. + * Use the TSC frequency from KVM's (and other hypervisors') PV CPUID + * leaf when available, instead of reverse-calculating it from the KVM + * clock data. As a bonus, the CPUID leaf also includes the local APIC + * bus/timer frequency. */ + if (apic_khz) + lapic_timer_period = apic_khz; +#endif + return kvm_para_tsc_khz() ? : pvclock_tsc_khz(this_cpu_pvti()); } -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:21:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:21:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310294.1581209 (Exim 4.92) (envelope-from ) id 1wNy6C-00066m-Q8; Fri, 15 May 2026 19:21:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310294.1581209; Fri, 15 May 2026 19:21:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy6C-00066d-Lx; Fri, 15 May 2026 19:21:28 +0000 Received: by outflank-mailman (input) for mailman id 1310294; Fri, 15 May 2026 19:21:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3NHIHagYKCY09vr40tx55x2v.t53Ev4-uvCv22z9A9.Ev46850vtA.58x@flex--seanjc.bounces.google.com>) id 1wNy6B-00064U-Hv for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1778872886-28C7DC48-DEB56334/0/0 X-purgate-type: clean X-purgate-size: 1663 If CPUID.0x16 is present and valid, use the CPU frequency provided by CPUID instead of assuming that the virtual CPU runs at the same frequency as TSC and/or kvmclock. Back before constant TSCs were a thing, treating the TSC and CPU frequencies as one and the same was somewhat reasonable, but now it's nonsensical, especially if the hypervisor explicitly enumerates the CPU frequency. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 62c8ea2e6769..7607920ae386 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -190,6 +190,20 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action action) } } +static unsigned long kvm_get_cpu_khz(void) +{ + unsigned int cpu_khz; + + /* + * Prefer CPUID over kvmclock when possible, as the base CPU frequency + * isn't necessarily the same as the kvmlock "TSC" frequency. + */ + if (!cpuid_get_cpu_freq(&cpu_khz)) + return cpu_khz; + + return pvclock_tsc_khz(this_cpu_pvti()); +} + /* * If we don't do that, there is the possibility that the guest * will calibrate under heavy load - thus, getting a lower lpj - @@ -434,7 +448,7 @@ void __init kvmclock_init(void) kvm_sched_clock_init(stable); } - tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz, + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_cpu_khz, tsc_properties); x86_platform.get_wallclock = kvm_get_wallclock; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:23:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:23:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310323.1581217 (Exim 4.92) (envelope-from ) id 1wNy7z-0007hK-3m; Fri, 15 May 2026 19:23:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310323.1581217; Fri, 15 May 2026 19:23:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy7z-0007hD-1E; Fri, 15 May 2026 19:23:19 +0000 Received: by outflank-mailman (input) for mailman id 1310323; Fri, 15 May 2026 19:23:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3KnIHagYKCYMzlhuqjnvvnsl.jvt4lu-kl2lsspz0z.4luwyvqlj0.vyn@flex--seanjc.bounces.google.com>) id 1wNy7x-0007h0-NY for xen-devel@lists.xenproject.org; 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dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778872875; x=1779477675; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:from:to:cc:subject:date :message-id:reply-to; bh=Zm1yasCgCkYBCfOrXX2peIQ68HcxfozY1zg+bDbrsDM=; b=fJMaZqYuZHOm8AKMt/L4KC1jrHSoFoCrfYd41E17aRPoZygM5ZOuhNyb2j4KgGtLsI DR923adDfISkAXLywvY0teblMRdkiFxOMS5JKcuzJ+EZvSBHC3NxjsA6wn74zEQiXEDa HW0IY2dplFeFx0hWbdz4NT4il5ftgkVw4QO/EnBszLwRxO8Umc7fcgGzGjkTM+Nukd3Y jHA9mjLLfszLzXlRrf8SOScp+IeRAXTY2OSiVdvNSMJI+NiN4ht+ifs9UESLRxOnHE+W MBUoIY3cRYoch2V7SKvoo+ylKAhPik/r7GBhcx0v01C7GGMOQnL5fNZzFNAKgIFFveyL jImg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778872875; x=1779477675; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:reply-to:x-gm-message-state:from:to :cc:subject:date:message-id:reply-to; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1778872876-AE342FF4-BB56FD61/0/0 X-purgate-type: clean X-purgate-size: 3211 From: David Woodhouse In https://lkml.org/lkml/2008/10/1/246 a proposal was made for generic CPUID conventions across hypervisors. It was mostly shot down in flames, but the leaf at 0x40000010 containing timing information didn't die. It's used by XNU and FreeBSD guests under all hypervisors=C2=B9=C2=B2 to de= termine the TSC frequency, and also exposed by the EC2 Nitro hypervisor (as well as, presumably, VMware). FreeBSD's Bhyve is probably just about to start exposing it too. Use it under KVM to obtain the TSC frequency more accurately, instead of reverse-calculating the frequency from the mul/shift values in the KVM clock. Before: [ 0.000020] tsc: Detected 2900.014 MHz processor After: [ 0.000020] tsc: Detected 2900.015 MHz processor $ cpuid -1 -l 0x40000010 CPU: hypervisor generic timing information (0x40000010): TSC frequency (Hz) =3D 2900015 bus frequency (Hz) =3D 1000000 =C2=B9 https://github.com/apple/darwin-xnu/blob/main/osfmk/i386/cpuid.c =C2=B2 https://github.com/freebsd/freebsd-src/commit/4a432614f68 Signed-off-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 1 + arch/x86/kernel/kvm.c | 10 ++++++++++ arch/x86/kernel/kvmclock.c | 6 +++++- 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_par= a.h index 17053d2bf270..3f7f558b5b24 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -129,6 +129,7 @@ enum kvm_guest_cpu_action { void kvmclock_init(void); void kvmclock_cpu_action(enum kvm_guest_cpu_action action); bool kvm_para_available(void); +unsigned int kvm_para_tsc_khz(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); void kvm_async_pf_task_wait_schedule(u32 token); diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 65c787b1ea03..5cd92a0b156a 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -918,6 +918,16 @@ bool kvm_para_available(void) } EXPORT_SYMBOL_GPL(kvm_para_available); =20 +unsigned int kvm_para_tsc_khz(void) +{ + u32 base =3D kvm_cpuid_base(); + + if (cpuid_eax(base) >=3D (base | KVM_CPUID_TIMING_INFO)) + return cpuid_eax(base | KVM_CPUID_TIMING_INFO); + + return 0; +} + unsigned int kvm_arch_para_features(void) { return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES); diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 47f7df1e81a0..5ceba4f3836c 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -200,7 +200,11 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action act= ion) */ static unsigned long kvm_get_tsc_khz(void) { - return pvclock_tsc_khz(this_cpu_pvti()); + /* + * If KVM advertises the frequency directly in CPUID, use that + * instead of reverse-calculating it from the KVM clock data. + */ + return kvm_para_tsc_khz() ? : pvclock_tsc_khz(this_cpu_pvti()); } =20 static void __init kvm_get_preset_lpj(void) --=20 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:23:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:23:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310326.1581227 (Exim 4.92) (envelope-from ) id 1wNy81-0007vZ-HH; Fri, 15 May 2026 19:23:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310326.1581227; Fri, 15 May 2026 19:23:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy81-0007vP-EN; Fri, 15 May 2026 19:23:21 +0000 Received: by outflank-mailman (input) for mailman id 1310326; Fri, 15 May 2026 19:23:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3LHIHagYKCYU1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 1wNy80-0007t0-9z for xen-devel@lists.xenproject.org; Fri, 15 May 2026 19:23:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wNy7z-00BXOc-ML for xen-devel@lists.xenproject.org; Fri, 15 May 2026 21:23:19 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <3LHIHagYKCYU1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 6a077266-e002-0a2a0a5209dd-0a2a450194e6-18 for ; Fri, 15 May 2026 21:23:19 +0200 Received: from [209.85.210.201] (helo=mail-pf1-f201.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <3LHIHagYKCYU1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 6a07722d-c1f2-0a2a45010019-d155d2c9c0c4-3 for ; Fri, 15 May 2026 21:21:19 +0200 Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-82fa366fb79so248873b3a.2 for ; Fri, 15 May 2026 12:21:18 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778872877; x=1779477677; darn=lists.xenproject.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=E3je6rXVDqS2RblPlDEIDkn7XwnxqvqokNa5l9m4jL4=; b=jCRGSSzOMIM8eYzD8bf9U0wBuML9xvXgjhm4Tn9iuZTR2fUtqK56qocXP/wrT33Q8y wgg4E1t5SuHuL/01z3eoe0s5qLytZd4KzPfacgD3qAr5ielKTKvyJO2+MrafH9b3m4HF L29mvl2Y/6VCm4SZK1CtKG3K1G1V+nzzqwkpVAZEi+7+yEGqtJ0l0vwqCYdVdL3CDq7+ dsp//bx9AWw2SnaRF40SetkA4N5D10cZhtWb9IAo63gMwig6qEUkR+zs+76TWa4rLvSw 3UHImTuAuAABkIF/CHmkD2LnZNCcsb24kOSkUlsn84BM2j7I/Wl5KUcSTVVXz9JgAWGS taYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778872877; x=1779477677; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=E3je6rXVDqS2RblPlDEIDkn7XwnxqvqokNa5l9m4jL4=; b=VokH/GFA4ebM65nF68M/Mx3FcFZn+Fm7gQGr7lNuof5rFEWkk44Q4T4XeK4w+PoSTm /IDc0N6MYrIqjhiCDeRciL6raH0eHjXsfOFltZ6u7aGu1rEtX6f2iYoOAjK1PdNBM5px 5kzw2TQ/SJ5wOTNzjGefdUSMsDg+t0svqd5vQJjBgbENiCOyZ+moTbWNQUfcTTUvIJ0c d9ypwYVi6YyMpESnq1ozr2lkx7oITFQTXB2q1dh5tXHmAwETi0f4hiUPjWQxW9HUM4GS vY93Q2ybdXb9gwamLdKFvHOA9pgi2VnnOMsKOc+QVOndjum6Cd2cp+31FisICK4FzEVU VsKQ== X-Forwarded-Encrypted: i=1; AFNElJ9ssbRxC7B417iLYLvw7U9S5Y1PK73hx4Lgmo0jIzc9JWfuQQ2ZADSvh54fdT1RU6InxVOlb20YWqk=@lists.xenproject.org X-Gm-Message-State: AOJu0YyOPi1F+0fYxHof5LQ8Hi8IMXK/mVnY3+LKBSn1cGFbLUSmU24l CZdY6QN0yKGO5sVZT8x1OED0rGpMRsmUhcXbQsDvCtq6Dvfjs81ZwdCIy7RJEoSw2W3VObTVZUy lcrLkdA== X-Received: from pfbmd16.prod.google.com ([2002:a05:6a00:7710:b0:82f:c134:e67c]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:8d1:b0:82c:6aee:b21a with SMTP id d2e1a72fcca58-83f33f2a54fmr5839384b3a.45.1778872876956; Fri, 15 May 2026 12:21:16 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:38 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-38-seanjc@google.com> Subject: [PATCH v3 37/41] x86/kvmclock: Use TSC for sched_clock if it's constant and non-stop From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d62444/1778872879-AD9A9FF4-37EB073F/0/0 X-purgate-type: clean X-purgate-size: 2868 Prefer the TSC over kvmclock for sched_clock if the TSC is constant, nonstop, and not marked unstable via command line. I.e. use the same criteria as tweaking the clocksource rating so that TSC is preferred over kvmclock. Per the below comment from native_sched_clock(), sched_clock is more tolerant of slop than clocksource; using TSC for clocksource but not sched_clock makes little to no sense, especially now that KVM CoCo guests with a trusted TSC use TSC, not kvmclock. /* * Fall back to jiffies if there's no TSC available: * ( But note that we still use it if the TSC is marked * unstable. We do this because unlike Time Of Day, * the scheduler clock tolerates small errors and it's * very important for it to be as fast as the platform * can achieve it. ) */ The only advantage of using kvmclock is that doing so allows for early and common detection of PVCLOCK_GUEST_STOPPED, but that code has been broken for over two years with nary a complaint, i.e. it can't be _that_ valuable. And as above, certain types of KVM guests are losing the functionality regardless, i.e. acknowledging PVCLOCK_GUEST_STOPPED needs to be decoupled from sched_clock() no matter what. Link: https://lore.kernel.org/all/Z4hDK27OV7wK572A@google.com Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index abcc5b36ea1d..0578bc448b1b 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -416,22 +416,22 @@ void __init kvmclock_init(void) } /* - * X86_FEATURE_NONSTOP_TSC is TSC runs at constant rate - * with P/T states and does not stop in deep C-states. - * - * Invariant TSC exposed by host means kvmclock is not necessary: - * can use TSC as clocksource. - * + * If the TSC counts at a constant frequency across P/T states, counts + * in deep C-states, and the TSC hasn't been marked unstable, prefer + * the TSC over kvmclock for sched_clock and drop kvmclock's rating so + * that TSC is chosen as the clocksource. Note, the TSC unstable check + * exists purely to honor the TSC being marked unstable via command + * line, any runtime detection of an unstable will happen after this. */ if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && !check_tsc_unstable()) { kvm_clock.rating = 299; tsc_properties = TSC_FREQ_KNOWN_AND_RELIABLE; + } else { + kvm_sched_clock_init(stable); } - kvm_sched_clock_init(stable); - tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz, tsc_properties); -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310360.1581245 (Exim 4.92) (envelope-from ) id 1wNy9j-00010c-4e; Fri, 15 May 2026 19:25:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310360.1581245; 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AFNElJ/93G2hSnj7VOfNmvQo4WjZjARe0j6wciqWrVE0fA2qXGVCc+8KCrjpcj/z7b/1GQTn9VzRpWKMKXE=@lists.xenproject.org X-Gm-Message-State: AOJu0YwYzp71XmAZZuWkos5xi3cTgvkvAHvRavpRP7yG1jokCGewlY5y FnvUA7F8XBYxGsZbx+T9kZcHI/DKrJzzF5QLImQNb9lJS6X5u0NbKzSjkZfHTnJoJL8wDxCWXzS XBh3mXQ== X-Received: from pfbeq3.prod.google.com ([2002:a05:6a00:37c3:b0:82f:ad57:40bb]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:44c3:b0:82c:6da7:2d3d with SMTP id d2e1a72fcca58-83f33c2a8fdmr5145208b3a.11.1778872862416; Fri, 15 May 2026 12:21:02 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:26 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-26-seanjc@google.com> Subject: [PATCH v3 25/41] x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872865-E397DCF5-4CC97177/0/0 X-purgate-type: clean X-purgate-size: 1980 Save/restore kvmclock across suspend/resume via clocksource hooks when kvmclock isn't being used for sched_clock. This will allow using kvmclock as a clocksource (or for wallclock!) without also using it for sched_clock. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ccb2aff89b2f..655037949446 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -131,7 +131,17 @@ static void kvm_setup_secondary_clock(void) static void kvm_restore_sched_clock_state(void) { - kvm_register_clock("primary cpu clock, resume"); + kvm_register_clock("primary cpu, sched_clock resume"); +} + +static void kvmclock_suspend(struct clocksource *cs) +{ + kvmclock_disable(); +} + +static void kvmclock_resume(struct clocksource *cs) +{ + kvm_register_clock("primary cpu, clocksource resume"); } void kvmclock_cpu_action(enum kvm_guest_cpu_action action) @@ -202,6 +212,8 @@ static struct clocksource kvm_clock = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, .id = CSID_X86_KVM_CLK, .enable = kvm_cs_enable, + .suspend = kvmclock_suspend, + .resume = kvmclock_resume, }; static void __init kvmclock_init_mem(void) @@ -297,6 +309,15 @@ static __init void kvm_sched_clock_init(bool stable) kvm_save_sched_clock_state, kvm_restore_sched_clock_state); + /* + * The BSP's clock is managed via dedicated sched_clock save/restore + * hooks when kvmclock is used as sched_clock, as sched_clock needs to + * be kept alive until the very end of suspend entry, and restored as + * quickly as possible after resume. + */ + kvm_clock.suspend = NULL; + kvm_clock.resume = NULL; + pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310358.1581237 (Exim 4.92) (envelope-from ) id 1wNy9h-0000ng-VC; Fri, 15 May 2026 19:25:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310358.1581237; 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AFNElJ9iI1xANLdCR6EDwmDmDegvFO7HglOA4uRPgXilmUPXi1yMsFKsmvJ6dXAIOmU7Qggsf1QfaT2VMa0=@lists.xenproject.org X-Gm-Message-State: AOJu0Yy+C6osWBzBrwx6skeKIQF3vCD2YkbykNeO9FoXHP8E7KOLBOB0 KFjdWSh4zK3xjurz/ztDkR7b5C7K1g1j5nyk0GtRfTv7LHKrfyer1RaZAoXn2EjXX5B4AZdZi/A 8WkP5Iw== X-Received: from pfje16.prod.google.com ([2002:a05:6a00:d0:b0:82f:6eb4:9793]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:a20e:b0:82c:e1aa:21e3 with SMTP id d2e1a72fcca58-83f33bca81dmr5806035b3a.10.1778872860340; Fri, 15 May 2026 12:21:00 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:25 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-25-seanjc@google.com> Subject: [PATCH v3 24/41] timekeeping: Resume clocksources before reading persistent clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872862-DA776CF5-7070AF1E/0/0 X-purgate-type: clean X-purgate-size: 1617 When resuming timekeeping after suspend, restore clocksources prior to reading the persistent clock. Paravirt clocks, e.g. kvmclock, tie the validity of a PV persistent clock to a clocksource, i.e. reading the PV persistent clock will return garbage if the underlying PV clocksource hasn't been enabled. The flaw has gone unnoticed because kvmclock is a mess and uses its own suspend/resume hooks instead of the clocksource suspend/resume hooks, which happens to work by sheer dumb luck (the kvmclock resume hook runs before timekeeping_resume()). Note, there is no evidence that any clocksource supported by the kernel depends on a persistent clock. Reviewed-by: Thomas Gleixner Signed-off-by: Sean Christopherson --- kernel/time/timekeeping.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index c493a4010305..26f3291a814d 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -2098,11 +2098,16 @@ void timekeeping_resume(void) u64 cycle_now, nsec; unsigned long flags; - read_persistent_clock64(&ts_new); - clockevents_resume(); clocksource_resume(); + /* + * Read persistent time after clocksources have been resumed. Paravirt + * clocks have a nasty habit of piggybacking a persistent clock on a + * system clock, and may return garbage if the system clock is suspended. + */ + read_persistent_clock64(&ts_new); + raw_spin_lock_irqsave(&tk_core.lock, flags); /* -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310361.1581253 (Exim 4.92) (envelope-from ) id 1wNy9k-0001Eo-B9; Fri, 15 May 2026 19:25:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310361.1581253; Fri, 15 May 2026 19:25:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy9k-0001Eh-80; Fri, 15 May 2026 19:25:08 +0000 Received: by outflank-mailman (input) for mailman id 1310361; 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Fri, 15 May 2026 12:21:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:27 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-27-seanjc@google.com> Subject: [PATCH v3 26/41] x86/kvmclock: WARN if wall clock is read while kvmclock is suspended From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1778872866-E2790443-D5EAD5DA/0/0 X-purgate-type: clean X-purgate-size: 2015 WARN if kvmclock is still suspended when its wallclock is read, i.e. when the kernel reads its persistent clock. The wallclock subtly depends on the BSP's kvmclock being enabled, and returns garbage if kvmclock is disabled. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 655037949446..e7250d21c672 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -53,6 +53,8 @@ static struct pvclock_vsyscall_time_info *hvclock_mem; DEFINE_PER_CPU(struct pvclock_vsyscall_time_info *, hv_clock_per_cpu); EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu); +static bool kvmclock_suspended; + /* * The wallclock is the time of day when we booted. Since then, some time may * have elapsed since the hypervisor wrote the data. So we try to account for @@ -60,6 +62,7 @@ EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu); */ static void kvm_get_wallclock(struct timespec64 *now) { + WARN_ON_ONCE(kvmclock_suspended); wrmsrq(msr_kvm_wall_clock, slow_virt_to_phys(&wall_clock)); preempt_disable(); pvclock_read_wallclock(&wall_clock, this_cpu_pvti(), now); @@ -119,6 +122,7 @@ static void kvm_save_sched_clock_state(void) * to the old address prior to reconfiguring kvmclock would clobber * random memory. */ + kvmclock_suspended = true; kvmclock_disable(); } @@ -131,16 +135,19 @@ static void kvm_setup_secondary_clock(void) static void kvm_restore_sched_clock_state(void) { + kvmclock_suspended = false; kvm_register_clock("primary cpu, sched_clock resume"); } static void kvmclock_suspend(struct clocksource *cs) { + kvmclock_suspended = true; kvmclock_disable(); } static void kvmclock_resume(struct clocksource *cs) { + kvmclock_suspended = false; kvm_register_clock("primary cpu, clocksource resume"); } -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310362.1581263 (Exim 4.92) (envelope-from ) id 1wNy9l-0001Tg-S1; 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AFNElJ+PYE+GA0jSRff/UirJ1W1S07gKblXK0q6BBXwBCgvB4Ol/kjYpCwAhKA+2Q9g74stdAdnCq39GqfI=@lists.xenproject.org X-Gm-Message-State: AOJu0YxYESKefmz+cg17aTQxwakaqolsCTwRB1eoRvaC68RfU4nm5wI6 1sw38ZBdvE91qtOJNrRuZD19CulkhjDnerVsiN1Km1sX404/tQJN3EVg30hq3nWLfFU0y7ADHZ4 Dwc3GeQ== X-Received: from plnq2.prod.google.com ([2002:a17:902:f782:b0:2bd:7c8c:4ef4]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:bc8:b0:2ba:30fb:d777 with SMTP id d9443c01a7336-2bd7e86c408mr40874505ad.6.1778872864946; Fri, 15 May 2026 12:21:04 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:28 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-28-seanjc@google.com> Subject: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ebf023/1778872867-40B733FF-99FDC4C8/0/0 X-purgate-type: clean X-purgate-size: 6195 In anticipation of making x86_cpuinit.early_percpu_clock_init(), i.e. kvm_setup_secondary_clock(), a dedicated sched_clock hook that will be invoked if and only if kvmclock is set as sched_clock, ensure APs enable their kvmclock during CPU online. While a redundant write to the MSR is technically ok, skip the registration when kvmclock is sched_clock so that it's somewhat obvious that kvmclock *needs* to be enabled during early bringup when it's being used as sched_clock. Plumb in the BSP's resume path purely for documentation purposes. Both KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, and it's not super obvious that using KVM's hooks would be flawed. E.g. it would work today, because KVM's hooks happen to run after/before timekeeping's hooks during suspend/resume, but that's sheer dumb luck as the order in which syscore_ops are invoked depends entirely on when a subsystem is initialized and thus registers its hooks. Opportunsitically make the registration messages more precise to help debug issues where kvmclock is enabled too late. Opportunstically WARN in kvmclock_{suspend,resume}() to harden against future bugs. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 2 ++ arch/x86/kernel/kvm.c | 24 +++++++++++------- arch/x86/kernel/kvmclock.c | 44 +++++++++++++++++++++++++++------ 3 files changed, 53 insertions(+), 17 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 2adba2aff539..17053d2bf270 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -120,6 +120,8 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, #ifdef CONFIG_KVM_GUEST enum kvm_guest_cpu_action { KVM_GUEST_BSP_SUSPEND, + KVM_GUEST_BSP_RESUME, + KVM_GUEST_AP_ONLINE, KVM_GUEST_AP_OFFLINE, KVM_GUEST_SHUTDOWN, }; diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 0131bc1cb459..65c787b1ea03 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -471,18 +471,24 @@ static void kvm_guest_cpu_offline(enum kvm_guest_cpu_action action) kvmclock_cpu_action(action); } +static int __kvm_cpu_online(unsigned int cpu, enum kvm_guest_cpu_action action) +{ + unsigned long flags; + + local_irq_save(flags); + kvmclock_cpu_action(action); + kvm_guest_cpu_init(); + local_irq_restore(flags); + return 0; +} + +#ifdef CONFIG_SMP + static int kvm_cpu_online(unsigned int cpu) { - unsigned long flags; - - local_irq_save(flags); - kvm_guest_cpu_init(); - local_irq_restore(flags); - return 0; + return __kvm_cpu_online(cpu, KVM_GUEST_AP_ONLINE); } -#ifdef CONFIG_SMP - static DEFINE_PER_CPU(cpumask_var_t, __pv_cpu_mask); static bool pv_tlb_flush_supported(void) @@ -747,7 +753,7 @@ static int kvm_suspend(void *data) static void kvm_resume(void *data) { - kvm_cpu_online(raw_smp_processor_id()); + __kvm_cpu_online(raw_smp_processor_id(), KVM_GUEST_BSP_RESUME); #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL) && has_guest_poll) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index e7250d21c672..d3bb281c0805 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -53,6 +53,7 @@ static struct pvclock_vsyscall_time_info *hvclock_mem; DEFINE_PER_CPU(struct pvclock_vsyscall_time_info *, hv_clock_per_cpu); EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu); +static bool kvmclock_is_sched_clock; static bool kvmclock_suspended; /* @@ -129,7 +130,7 @@ static void kvm_save_sched_clock_state(void) #ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { - kvm_register_clock("secondary cpu clock"); + kvm_register_clock("secondary cpu, sched_clock setup"); } #endif @@ -141,25 +142,51 @@ static void kvm_restore_sched_clock_state(void) static void kvmclock_suspend(struct clocksource *cs) { + if (WARN_ON_ONCE(kvmclock_is_sched_clock)) + return; + kvmclock_suspended = true; kvmclock_disable(); } static void kvmclock_resume(struct clocksource *cs) { + if (WARN_ON_ONCE(kvmclock_is_sched_clock)) + return; + kvmclock_suspended = false; kvm_register_clock("primary cpu, clocksource resume"); } void kvmclock_cpu_action(enum kvm_guest_cpu_action action) { - /* - * Don't disable kvmclock on the BSP during suspend. If kvmclock is - * being used for sched_clock, then it needs to be kept alive until the - * last minute, and restored as quickly as possible after resume. - */ - if (action != KVM_GUEST_BSP_SUSPEND) + switch (action) { + /* + * The BSP's clock is managed via clocksource suspend/resume, + * to ensure it's enabled/disabled when timekeeping needs it + * to be, e.g. before reading wallclock (which uses kvmclock). + */ + case KVM_GUEST_BSP_SUSPEND: + case KVM_GUEST_BSP_RESUME: + break; + case KVM_GUEST_AP_ONLINE: + /* + * Secondary CPUs use dedicated sched_clock hooks to enable + * kvmclock early during bringup, there's nothing to be done + * when during CPU online. + */ + if (kvmclock_is_sched_clock) + break; + kvm_register_clock("secondary cpu, online"); + break; + case KVM_GUEST_AP_OFFLINE: + case KVM_GUEST_SHUTDOWN: kvmclock_disable(); + break; + default: + WARN_ON_ONCE(1); + break; + } } /* @@ -315,6 +342,7 @@ static __init void kvm_sched_clock_init(bool stable) __paravirt_set_sched_clock(kvm_sched_clock_read, stable, kvm_save_sched_clock_state, kvm_restore_sched_clock_state); + kvmclock_is_sched_clock = true; /* * The BSP's clock is managed via dedicated sched_clock save/restore @@ -358,7 +386,7 @@ void __init kvmclock_init(void) msr_kvm_system_time, msr_kvm_wall_clock); this_cpu_write(hv_clock_per_cpu, &hv_clock_boot[0]); - kvm_register_clock("primary cpu clock"); + kvm_register_clock("primary cpu, online"); pvclock_set_pvti_cpu0_va(hv_clock_boot); if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) { -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310363.1581271 (Exim 4.92) (envelope-from ) id 1wNy9p-0001mn-6E; Fri, 15 May 2026 19:25:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310363.1581271; Fri, 15 May 2026 19:25:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNy9p-0001mb-1G; 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Fri, 15 May 2026 12:21:07 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:30 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-30-seanjc@google.com> Subject: [PATCH v3 29/41] x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1778872870-DAB68443-4877E1E7/0/0 X-purgate-type: clean X-purgate-size: 3204 Add a return code to __paravirt_set_sched_clock() so that the kernel can reject attempts to use a PV sched_clock without breaking the caller. E.g. when running as a CoCo VM with a secure TSC, using a PV clock is generally undesirable. Note, kvmclock is the only PV clock that does anything "extra" beyond simply registering itself as sched_clock, i.e. is the only caller that needs to check the new return value. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 6 +++--- arch/x86/kernel/kvmclock.c | 8 +++++--- arch/x86/kernel/tsc.c | 5 +++-- 3 files changed, 11 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 96ae7feac47c..ca5c95d48c03 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,14 +14,14 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)); +int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), void (*save)(void), void (*restore)(void)) { - __paravirt_set_sched_clock(func, true, save, restore); + (void)__paravirt_set_sched_clock(func, true, save, restore); } #endif diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index d3bb281c0805..9b3d1ed1a96d 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -338,10 +338,12 @@ static int kvmclock_setup_percpu(unsigned int cpu) static __init void kvm_sched_clock_init(bool stable) { + if (__paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state)) + return; + kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable, - kvm_save_sched_clock_state, - kvm_restore_sched_clock_state); kvmclock_is_sched_clock = true; /* diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 4a48b8ba5bea..3c15fc10e501 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,8 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)) +int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)) { if (!stable) clear_sched_clock_stable(); @@ -289,6 +289,7 @@ void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, static_call_update(pv_sched_clock, func); x86_platform.save_sched_clock_state = save; x86_platform.restore_sched_clock_state = restore; + return 0; } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1778872871-AAB68161-F7D7A97F/0/0 X-purgate-type: clean X-purgate-size: 1285 Silently ignore attempts to switch to a paravirt sched_clock when running as a CoCo guest with trusted TSC. In hand-wavy theory, a misbehaving hypervisor could attack the guest by manipulating the PV clock to affect guest scheduling in some weird and/or predictable way. More importantly, reading TSC on such platforms is faster than any PV clock, and sched_clock is all about speed. Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 3c15fc10e501..ac4abfec1f05 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -283,6 +283,15 @@ bool using_native_sched_clock(void) int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, void (*save)(void), void (*restore)(void)) { + /* + * Don't replace TSC with a PV clock when running as a CoCo guest and + * the TSC is secure/trusted; PV clocks are emulated by the hypervisor, + * which isn't in the guest's TCB. + */ + if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC) || + boot_cpu_has(X86_FEATURE_TDX_GUEST)) + return -EPERM; + if (!stable) clear_sched_clock_stable(); -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310366.1581288 (Exim 4.92) (envelope-from ) id 1wNy9q-0002Cn-V6; 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AFNElJ/lI2T5VdEKY/RVp6hlEa1Em/NbdDLqFZ/+2Uvpu8QshjeYgeX7tTZeY1EDEHGsU2xPYMlM0PqNPE0=@lists.xenproject.org X-Gm-Message-State: AOJu0YxPDQxr0mdM5g4S4d3fbjObULocyxf2EGyy4+WXmPangsA6GNk1 vg6MNQRZQGd/g71MI8znvuhXvqUG9ab7PSRmVg7pzV1S+k+9KaSCNHGc04GzA9s3q3EUuGR3y/m kB/b93A== X-Received: from pgbfm5.prod.google.com ([2002:a05:6a02:4985:b0:c82:7df9:8c21]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:9985:b0:39b:e1e5:a101 with SMTP id adf61e73a8af0-3b22ec7d04bmr6317771637.43.1778872870066; Fri, 15 May 2026 12:21:10 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:32 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-32-seanjc@google.com> Subject: [PATCH v3 31/41] x86/tsc: Pass KNOWN_FREQ and RELIABLE as params to registration From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1778872872-36B44938-E47EB53F/13/0 X-purgate-type: clean X-purgate-size: 10407 Add a "tsc_properties" set of flags and use it to annotate whether the TSC operates at a known and/or reliable frequency when registering a paravirtual TSC calibration routine. Currently, each PV flow manually sets the associated feature flags, but often in haphazard fashion that makes it difficult for unfamiliar readers to see the properties of the TSC when running under a particular hypervisor. The other, bigger issue with manually setting the feature flags is that it decouples the flags from the calibration routine. E.g. in theory, PV code could mark the TSC as having a known frequency, but then have its PV calibration discarded in favor of a method that doesn't use that known frequency. Passing the TSC properties along with the calibration routine will allow adding sanity checks to guard against replacing a "better" calibration routine with a "worse" routine. As a bonus, the flags also give developers working on new PV code a heads up that they should at least mark the TSC as having a known frequency. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 6 ++---- arch/x86/coco/tdx/tdx.c | 7 ++----- arch/x86/include/asm/tsc.h | 8 +++++++- arch/x86/kernel/cpu/acrn.c | 4 ++-- arch/x86/kernel/cpu/mshyperv.c | 10 +++++++--- arch/x86/kernel/cpu/vmware.c | 7 ++++--- arch/x86/kernel/jailhouse.c | 4 ++-- arch/x86/kernel/kvmclock.c | 4 ++-- arch/x86/kernel/tsc.c | 8 +++++++- arch/x86/xen/time.c | 4 ++-- 10 files changed, 37 insertions(+), 25 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 39fb50697542..822a2a0f1a2f 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2037,9 +2037,6 @@ void __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); /* Extract the GUEST TSC MHZ from BIT[17:0], rest is reserved space */ @@ -2048,7 +2045,8 @@ void __init snp_secure_tsc_init(void) snp_tsc_freq_khz = SNP_SCALE_TSC_FREQ(tsc_freq_mhz * 1000, secrets->tsc_factor); tsc_register_calibration_routines(securetsc_get_tsc_khz, - securetsc_get_tsc_khz); + securetsc_get_tsc_khz, + TSC_FREQ_KNOWN_AND_RELIABLE); early_memunmap(mem, PAGE_SIZE); } diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 26890cea790b..7050f3ee6593 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -1208,14 +1208,11 @@ static unsigned long tdx_get_tsc_khz(void) void __init tdx_tsc_init(void) { - /* TSC is the only reliable clock in TDX guest */ - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); - /* * Override the PV calibration routines (if set) with more trustworthy * CPUID-based calibration. The TDX module emulates CPUID, whereas any * PV information is provided by the hypervisor. */ - tsc_register_calibration_routines(tdx_get_tsc_khz, NULL); + tsc_register_calibration_routines(tdx_get_tsc_khz, NULL, + TSC_FREQ_KNOWN_AND_RELIABLE); } diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index bae709f5f44d..f458be688512 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -95,8 +95,14 @@ extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); extern void tsc_early_init(void); extern void tsc_init(void); #if defined(CONFIG_HYPERVISOR_GUEST) || defined(CONFIG_AMD_MEM_ENCRYPT) +enum tsc_properties { + TSC_FREQUENCY_KNOWN = BIT(0), + TSC_RELIABLE = BIT(1), + TSC_FREQ_KNOWN_AND_RELIABLE = TSC_FREQUENCY_KNOWN | TSC_RELIABLE, +}; extern void tsc_register_calibration_routines(unsigned long (*calibrate_tsc)(void), - unsigned long (*calibrate_cpu)(void)); + unsigned long (*calibrate_cpu)(void), + enum tsc_properties properties); #endif extern void mark_tsc_unstable(char *reason); extern int unsynchronized_tsc(void); diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 2da3de4d470e..4f2f4f7ec334 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -29,9 +29,9 @@ static void __init acrn_init_platform(void) /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); tsc_register_calibration_routines(acrn_get_tsc_khz, - acrn_get_tsc_khz); + acrn_get_tsc_khz, + TSC_FREQUENCY_KNOWN); } static bool acrn_x2apic_available(void) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 5ca139ae50b4..734d79c10ae5 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -516,8 +516,13 @@ static void __init ms_hyperv_init_platform(void) if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { - tsc_register_calibration_routines(hv_get_tsc_khz, hv_get_tsc_khz); - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + enum tsc_properties tsc_properties = TSC_FREQUENCY_KNOWN; + + if (ms_hyperv.features & HV_ACCESS_TSC_INVARIANT) + tsc_properties = TSC_FREQ_KNOWN_AND_RELIABLE; + + tsc_register_calibration_routines(hv_get_tsc_khz, hv_get_tsc_khz, + tsc_properties); } if (ms_hyperv.priv_high & HV_ISOLATION) { @@ -629,7 +634,6 @@ static void __init ms_hyperv_init_platform(void) * is called. */ wrmsrq(HV_X64_MSR_TSC_INVARIANT_CONTROL, HV_EXPOSE_INVARIANT_TSC); - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); } /* diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 968de002975f..c19fa4471800 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -388,10 +388,10 @@ static void __init vmware_paravirt_ops_setup(void) */ static void __init vmware_set_capabilities(void) { + /* TSC is non-stop and reliable even if the frequency isn't known. */ setup_force_cpu_cap(X86_FEATURE_CONSTANT_TSC); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - if (vmware_tsc_khz) - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMCALL) setup_force_cpu_cap(X86_FEATURE_VMCALL); else if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMMCALL) @@ -420,7 +420,8 @@ static void __init vmware_platform_setup(void) vmware_tsc_khz = tsc_khz; tsc_register_calibration_routines(vmware_get_tsc_khz, - vmware_get_tsc_khz); + vmware_get_tsc_khz, + TSC_FREQ_KNOWN_AND_RELIABLE); #ifdef CONFIG_X86_LOCAL_APIC /* Skip lapic calibration since we know the bus frequency. */ diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index db8f31fdb480..1bdc9ab321e0 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -219,7 +219,8 @@ static void __init jailhouse_init_platform(void) machine_ops.emergency_restart = jailhouse_no_restart; - tsc_register_calibration_routines(jailhouse_get_tsc, jailhouse_get_tsc); + tsc_register_calibration_routines(jailhouse_get_tsc, jailhouse_get_tsc, + TSC_FREQUENCY_KNOWN); while (pa_data) { mapping = early_memremap(pa_data, sizeof(header)); @@ -257,7 +258,6 @@ static void __init jailhouse_init_platform(void) pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport); precalibrated_tsc_khz = setup_data.v1.tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); pci_probe = 0; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 9b3d1ed1a96d..b6b2018c51db 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -200,7 +200,6 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action action) */ static unsigned long kvm_get_tsc_khz(void) { - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(this_cpu_pvti()); } @@ -404,7 +403,8 @@ void __init kvmclock_init(void) kvm_sched_clock_init(stable); - tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz); + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz, + TSC_FREQUENCY_KNOWN); x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index ac4abfec1f05..98bef1d06fa9 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1311,11 +1311,17 @@ static void __init check_system_tsc_reliable(void) */ #if defined(CONFIG_HYPERVISOR_GUEST) || defined(CONFIG_AMD_MEM_ENCRYPT) void tsc_register_calibration_routines(unsigned long (*calibrate_tsc)(void), - unsigned long (*calibrate_cpu)(void)) + unsigned long (*calibrate_cpu)(void), + enum tsc_properties properties) { if (WARN_ON_ONCE(!calibrate_tsc)) return; + if (properties & TSC_FREQUENCY_KNOWN) + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + if (properties & TSC_RELIABLE) + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + x86_platform.calibrate_tsc = calibrate_tsc; if (calibrate_cpu) x86_platform.calibrate_cpu = calibrate_cpu; diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index f087bb76457d..c04548641558 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -43,7 +43,6 @@ static unsigned long xen_tsc_khz(void) struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; 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Fri, 15 May 2026 12:21:11 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:33 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-33-seanjc@google.com> Subject: [PATCH v3 32/41] x86/tsc: Rejects attempts to override TSC calibration with lesser routine From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ebf023/1778872873-43B6B3FF-241EF507/13/0 X-purgate-type: clean X-purgate-size: 1550 When registering a TSC frequency calibration routine, sanity check that the incoming routine is as robust as the outgoing routine, and reject the incoming routine if the sanity check fails. Because native calibration routines only mark the TSC frequency as known and reliable when they actually run, the effective progression of capabilities is: None (native) => Known and maybe Reliable (PV) => Known and Reliable (CoCo). Violating that progression for a PV override is relatively benign, but messing up the progression when CoCo is involved is more problematic, as it likely means a trusted source of information (hardware/firmware) is being discarded in favor of a less trusted source (hypervisor). Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 98bef1d06fa9..7a261214fa3e 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1319,8 +1319,13 @@ void tsc_register_calibration_routines(unsigned long (*calibrate_tsc)(void), if (properties & TSC_FREQUENCY_KNOWN) setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + else if (WARN_ON(boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ))) + return; + if (properties & TSC_RELIABLE) setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + else if (WARN_ON(boot_cpu_has(X86_FEATURE_TSC_RELIABLE))) + return; x86_platform.calibrate_tsc = calibrate_tsc; if (calibrate_cpu) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310368.1581303 (Exim 4.92) (envelope-from ) id 1wNy9t-0002cp-5m; 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AFNElJ84nQ2RL6C0NDIT4ynusZbA3xIjMQA/49n2Tfd+CuGknWPMx3sQJznBjkY4fpo88PDAxxzmJ1ZXpFI=@lists.xenproject.org X-Gm-Message-State: AOJu0Yw2NT49vXD2H1WY9yKpV/VBjrBAcNWSI7oOX3Dw8wT+1WCZJxLY POjFjOiFgreiHMtpqBeR68LEJTJSsgUjcN7pWS83Bt3CG8LeLoN3Vu//U9ThT8cEDflTUNa2LLM 7KvMnoA== X-Received: from pgla17.prod.google.com ([2002:a63:b51:0:b0:c82:2e5b:8f33]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3505:b0:364:edd2:812 with SMTP id 98e67ed59e1d1-36951cb3086mr5037302a91.25.1778872872299; Fri, 15 May 2026 12:21:12 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:34 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-34-seanjc@google.com> Subject: [PATCH v3 33/41] x86/kvmclock: Mark TSC as reliable when it's constant and nonstop From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1778872874-7FB7DD75-844FEDFF/0/0 X-purgate-type: clean X-purgate-size: 2828 Mark the TSC as reliable if the hypervisor (KVM) has enumerated the TSC as constant and nonstop, and the admin hasn't explicitly marked the TSC as unstable. Like most (all?) virtualization setups, any secondary clocksource that's used as a watchdog is guaranteed to be less reliable than a constant, nonstop TSC, as all clocksources the kernel uses as a watchdog are all but guaranteed to be emulated when running as a KVM guest. I.e. any observed discrepancies between the TSC and watchdog will be due to jitter in the watchdog. This is especially true for KVM, as the watchdog clocksource is usually emulated in host userspace, i.e. reading the clock incurs a roundtrip cost of thousands of cycles. Marking the TSC reliable addresses a flaw where the TSC will occasionally be marked unstable if the host is under moderate/heavy load. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 29 ++++++++++++++++------------- 1 file changed, 16 insertions(+), 13 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b6b2018c51db..47f7df1e81a0 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -363,6 +363,7 @@ static __init void kvm_sched_clock_init(bool stable) void __init kvmclock_init(void) { + enum tsc_properties tsc_properties = TSC_FREQUENCY_KNOWN; bool stable = false; if (!kvm_para_available() || !kvmclock) @@ -401,18 +402,6 @@ void __init kvmclock_init(void) PVCLOCK_TSC_STABLE_BIT; } - kvm_sched_clock_init(stable); - - tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz, - TSC_FREQUENCY_KNOWN); - - x86_platform.get_wallclock = kvm_get_wallclock; - x86_platform.set_wallclock = kvm_set_wallclock; -#ifdef CONFIG_SMP - x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; -#endif - kvm_get_preset_lpj(); - /* * X86_FEATURE_NONSTOP_TSC is TSC runs at constant rate * with P/T states and does not stop in deep C-states. @@ -423,8 +412,22 @@ void __init kvmclock_init(void) */ if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && - !check_tsc_unstable()) + !check_tsc_unstable()) { kvm_clock.rating = 299; + tsc_properties = TSC_FREQ_KNOWN_AND_RELIABLE; + } + + kvm_sched_clock_init(stable); + + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz, + tsc_properties); + + x86_platform.get_wallclock = kvm_get_wallclock; + x86_platform.set_wallclock = kvm_set_wallclock; +#ifdef CONFIG_SMP + x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; +#endif + kvm_get_preset_lpj(); clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); pv_info.name = "KVM"; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310391.1581322 (Exim 4.92) (envelope-from ) id 1wNyA2-0003ou-NX; Fri, 15 May 2026 19:25:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310391.1581322; Fri, 15 May 2026 19:25:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyA2-0003nZ-Fx; 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Fri, 15 May 2026 12:21:21 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:40 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-40-seanjc@google.com> Subject: [PATCH v3 39/41] x86/paravirt: Move using_native_sched_clock() stub into timer.h From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1778872884-8C87AD75-6B0CE198/0/0 X-purgate-type: clean X-purgate-size: 1740 Now that timer.h ended up with CONFIG_PARAVIRT #ifdeffery anyways, move the PARAVIRT=n using_native_sched_clock() stub into timer.h as a "free" optimization. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 5 +++-- arch/x86/kernel/tsc.c | 2 -- 2 files changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index ab1271bd9c3b..d8cb9c84f2c7 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -11,9 +11,9 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; -extern bool using_native_sched_clock(void); - #ifdef CONFIG_PARAVIRT +extern bool using_native_sched_clock(void); + int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, void (*save)(void), void (*restore)(void), void (*start_secondary)); @@ -27,6 +27,7 @@ static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), void paravirt_sched_clock_start_secondary(void); #else static inline void paravirt_sched_clock_start_secondary(void) { } +static inline bool using_native_sched_clock(void) { return true; } #endif /* diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index f78e86494dec..1b569954ae5e 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -316,8 +316,6 @@ int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); - -bool using_native_sched_clock(void) { return true; } #endif notrace u64 sched_clock(void) -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310386.1581317 (Exim 4.92) (envelope-from ) id 1wNyA2-0003ka-9B; Fri, 15 May 2026 19:25:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310386.1581317; Fri, 15 May 2026 19:25:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyA2-0003kG-4r; Fri, 15 May 2026 19:25:26 +0000 Received: by outflank-mailman (input) for mailman id 1310386; Fri, 15 May 2026 19:25:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3MHIHagYKCYk5rn0wpt11tyr.p1zAr0-qr8ryyv565.Ar0241wrp6.14t@flex--seanjc.bounces.google.com>) id 1wNyA0-0003bh-Du for xen-devel@lists.xenproject.org; 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dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1778872881; x=1779477681; darn=lists.xenproject.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=rGCW9kF5gS8wHa+YnUvDY3DL62KvWmhRkotZ7eduTfw=; b=GsR+04cvbRlBhziiw8jqNxR98tTcwQIJHhEEoK5+uJrZ+PqD0zm7Vp5/+n9oP1aKix YG+8eCanHgG8BKl6CfvjaGXQJ5W1CfL8lFKuJrF6Z0bai67spIbE98X1IN2xw8CUcw2R VcocUIaLd0X32x7+P7XGBB75vASngjbqzylvxKiq3o+P04hluG2scGC/bEa4lQO6wnEY jOf4UC9dPB51Kt7RchgykcHuN1C8bN+NSg0yM/7rvsR60OFl/3B6USf9aXeN8FALI5/E XRtYcnRJcv8Az+B6vytymcSykdr5eNYXVGbMYjVuT2swImK8LGFDKSq4oY5tMiVEgbfO zdJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1778872881; x=1779477681; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1778872883-D9D77443-5B95A635/0/0 X-purgate-type: clean X-purgate-size: 6218 Rework the seemingly generic x86_cpuinit_ops.early_percpu_clock_init hook into a dedicated PV sched_clock hook, as the only reason the hook exists is to allow kvmclock to enable its PV clock on secondary CPUs before the kernel tries to reference sched_clock, e.g. when grabbing a timestamp for printk. Rearranging the hook doesn't exactly reduce complexity; arguably it does the opposite. But as-is, it's practically impossible to understand *why* kvmclock needs to do early configuration. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 8 ++++++-- arch/x86/include/asm/x86_init.h | 2 -- arch/x86/kernel/kvmclock.c | 13 ++++++------- arch/x86/kernel/smpboot.c | 3 ++- arch/x86/kernel/tsc.c | 16 +++++++++++++++- arch/x86/kernel/x86_init.c | 1 - 6 files changed, 29 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index ca5c95d48c03..ab1271bd9c3b 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -15,14 +15,18 @@ extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)); + void (*save)(void), void (*restore)(void), + void (*start_secondary)); static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), void (*save)(void), void (*restore)(void)) { - (void)__paravirt_set_sched_clock(func, true, save, restore); + (void)__paravirt_set_sched_clock(func, true, save, restore, NULL); } +void paravirt_sched_clock_start_secondary(void); +#else +static inline void paravirt_sched_clock_start_secondary(void) { } #endif /* diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index 6c8a6ead84f6..d1b3f18ea41f 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -187,13 +187,11 @@ struct x86_init_ops { /** * struct x86_cpuinit_ops - platform specific cpu hotplug setups * @setup_percpu_clockev: set up the per cpu clock event device - * @early_percpu_clock_init: early init of the per cpu clock event device * @fixup_cpu_id: fixup function for cpuinfo_x86::topo.pkg_id * @parallel_bringup: Parallel bringup control */ struct x86_cpuinit_ops { void (*setup_percpu_clockev)(void); - void (*early_percpu_clock_init)(void); void (*fixup_cpu_id)(struct cpuinfo_x86 *c, int node); bool parallel_bringup; }; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 0578bc448b1b..62c8ea2e6769 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -127,12 +127,13 @@ static void kvm_save_sched_clock_state(void) kvmclock_disable(); } -#ifdef CONFIG_SMP -static void kvm_setup_secondary_clock(void) +static void kvm_setup_secondary_sched_clock(void) { + if (WARN_ON_ONCE(!IS_ENABLED(CONFIG_SMP))) + return; + kvm_register_clock("secondary cpu, sched_clock setup"); } -#endif static void kvm_restore_sched_clock_state(void) { @@ -352,7 +353,8 @@ static __init void kvm_sched_clock_init(bool stable) { if (__paravirt_set_sched_clock(kvm_sched_clock_read, stable, kvm_save_sched_clock_state, - kvm_restore_sched_clock_state)) + kvm_restore_sched_clock_state, + kvm_setup_secondary_sched_clock)) return; kvm_sched_clock_offset = kvm_clock_read(); @@ -437,9 +439,6 @@ void __init kvmclock_init(void) x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; -#ifdef CONFIG_SMP - x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; -#endif kvm_get_preset_lpj(); clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c index 294a8ea60298..318ae70e5e7b 100644 --- a/arch/x86/kernel/smpboot.c +++ b/arch/x86/kernel/smpboot.c @@ -78,6 +78,7 @@ #include #include #include +#include #include #include #include @@ -275,7 +276,7 @@ static void notrace __noendbr start_secondary(void *unused) cpu_init(); fpu__init_cpu(); rcutree_report_cpu_starting(raw_smp_processor_id()); - x86_cpuinit.early_percpu_clock_init(); + paravirt_sched_clock_start_secondary(); ap_starting(); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 7a261214fa3e..f78e86494dec 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,19 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } +#ifdef CONFIG_SMP +static void (*pv_sched_clock_start_secondary)(void) __ro_after_init; + +void paravirt_sched_clock_start_secondary(void) +{ + if (pv_sched_clock_start_secondary) + pv_sched_clock_start_secondary(); +} +#endif + int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)) + void (*save)(void), void (*restore)(void), + void (*start_secondary)) { /* * Don't replace TSC with a PV clock when running as a CoCo guest and @@ -298,6 +309,9 @@ int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, static_call_update(pv_sched_clock, func); x86_platform.save_sched_clock_state = save; x86_platform.restore_sched_clock_state = restore; +#ifdef CONFIG_SMP + pv_sched_clock_start_secondary = start_secondary; +#endif return 0; } #else diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index ebefb77c37bb..cbb5ee613ed5 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -128,7 +128,6 @@ struct x86_init_ops x86_init __initdata = { }; struct x86_cpuinit_ops x86_cpuinit = { - .early_percpu_clock_init = x86_init_noop, .setup_percpu_clockev = setup_secondary_APIC_clock, .parallel_bringup = true, }; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310392.1581335 (Exim 4.92) (envelope-from ) id 1wNyA4-0004IK-RP; Fri, 15 May 2026 19:25:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310392.1581335; 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AFNElJ8FtqMckfkJNHUJFzcZLaWw3rtQxLZsbsfoVFAbrSrUfzFb5AfAnVedu5lmXdVWm5CBQYwGIy0TKmk=@lists.xenproject.org X-Gm-Message-State: AOJu0YwyuaDbtNgspGBH2SSRggtR19ODpVpqd4PYdkyuEZI58YWKiYXA UY+KPwbgAXAen8g58sD7ELd9Uofji1w/EFzOGPNF0uaiR+n/y1zh25/GMCvqJLAX8ZWEsLEqOs9 fC7wBYg== X-Received: from pfdc18.prod.google.com ([2002:aa7:8c12:0:b0:834:df9e:8e02]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:194f:b0:82f:355a:857e with SMTP id d2e1a72fcca58-83f33d0398emr5462972b3a.47.1778872883144; Fri, 15 May 2026 12:21:23 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:41 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-41-seanjc@google.com> Subject: [PATCH v3 40/41] x86/tsc: Add standalone helper for getting CPU frequency from CPUID From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872885-E1161CF5-7BEA6DCF/0/0 X-purgate-type: clean X-purgate-size: 3014 Extract the guts of cpu_khz_from_cpuid() to a standalone helper that doesn't restrict the usage to Intel CPUs. This will allow sharing the core logic with kvmclock, as (a) CPUID.0x16 may be enumerated alongside kvmclock, and (b) KVM generally doesn't restrict CPUID based on vendor. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 1 + arch/x86/kernel/tsc.c | 37 +++++++++++++++++++++++-------------- 2 files changed, 24 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index f458be688512..c145f5707b52 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -91,6 +91,7 @@ struct cpuid_tsc_info { }; extern int cpuid_get_tsc_info(struct cpuid_tsc_info *info); extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); +extern int cpuid_get_cpu_freq(unsigned int *cpu_khz); extern void tsc_early_init(void); extern void tsc_init(void); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 1b569954ae5e..745fa2052c74 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -719,6 +719,24 @@ int cpuid_get_tsc_freq(struct cpuid_tsc_info *info) return 0; } +int cpuid_get_cpu_freq(unsigned int *cpu_khz) +{ + unsigned int eax_base_mhz, ebx, ecx, edx; + + *cpu_khz = 0; + + if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) + return -ENOENT; + + cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); + + if (!eax_base_mhz) + return -ENOENT; + + *cpu_khz = eax_base_mhz * 1000; + return 0; +} + /** * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. @@ -754,13 +772,8 @@ unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (!info.crystal_khz && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { - unsigned int eax_base_mhz, ebx, ecx, edx; - - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); - info.crystal_khz = eax_base_mhz * 1000 * - info.denominator / info.numerator; - } + if (!info.crystal_khz && !cpuid_get_cpu_freq(&cpu_khz)) + info.crystal_khz = cpu_khz * info.denominator / info.numerator; if (!info.crystal_khz) return 0; @@ -787,19 +800,15 @@ unsigned long native_calibrate_tsc(void) static unsigned long cpu_khz_from_cpuid(void) { - unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx; 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Fri, 15 May 2026 12:20:49 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:18 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-18-seanjc@google.com> Subject: [PATCH v3 17/41] x86/tsc: WARN if TSC sched_clock save/restore used with PV sched_clock From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872851-7236B8B7-28DCF8B3/0/0 X-purgate-type: clean X-purgate-size: 1339 Now that all PV clocksources override the sched_clock save/restore hooks when overriding sched_clock, WARN if the "default" TSC hooks are invoked when using a PV sched_clock, e.g. to guard against regressions. Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 567d30b30a5a..b14c4ada89a3 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -984,9 +984,17 @@ EXPORT_SYMBOL_GPL(recalibrate_cpu_khz); static unsigned long long cyc2ns_suspend; +static __always_inline bool tsc_is_save_restore_needed(void) +{ + if (WARN_ON_ONCE(!using_native_sched_clock())) + return false; + + return static_branch_likely(&__use_tsc) || sched_clock_stable(); +} + void tsc_save_sched_clock_state(void) { - if (!static_branch_likely(&__use_tsc) && !sched_clock_stable()) + if (!tsc_is_save_restore_needed()) return; cyc2ns_suspend = sched_clock(); @@ -1006,7 +1014,7 @@ void tsc_restore_sched_clock_state(void) unsigned long flags; int cpu; - if (!static_branch_likely(&__use_tsc) && !sched_clock_stable()) + if (!tsc_is_save_restore_needed()) return; local_irq_save(flags); -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310444.1581348 (Exim 4.92) (envelope-from ) id 1wNyAU-0006OJ-8M; Fri, 15 May 2026 19:25:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310444.1581348; Fri, 15 May 2026 19:25:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyAU-0006NF-2k; Fri, 15 May 2026 19:25:54 +0000 Received: by outflank-mailman (input) for mailman id 1310444; Fri, 15 May 2026 19:25:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3EnIHagYKCWsbNJWSLPXXPUN.LXVgNW-MNeNUURbcb.gNWYaXSNLc.XaP@flex--seanjc.bounces.google.com>) id 1wNyAT-0006KA-It for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872852-7D1848B7-56E99130/0/0 X-purgate-type: clean X-purgate-size: 5585 Pass in a PV clock's save/restore helpers when configuring sched_clock instead of relying on each PV clock to manually set the save/restore hooks. In addition to bringing sanity to the code, this will allow gracefully "rejecting" a PV sched_clock, e.g. when running as a CoCo guest that has access to a "secure" TSC. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 9 ++++++--- arch/x86/kernel/cpu/vmware.c | 7 ++----- arch/x86/kernel/kvmclock.c | 6 +++--- arch/x86/kernel/tsc.c | 5 ++++- arch/x86/xen/time.c | 5 ++--- drivers/clocksource/hyperv_timer.c | 6 ++---- 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index fe41d40a9ae6..e97cd1ae03d1 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,11 +14,14 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable); +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); -static inline void paravirt_set_sched_clock(u64 (*func)(void)) +static inline void paravirt_set_sched_clock(u64 (*func)(void), + void (*save)(void), + void (*restore)(void)) { - __paravirt_set_sched_clock(func, true); + __paravirt_set_sched_clock(func, true, save, restore); } #endif diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index b5cb66ca022b..968de002975f 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -347,11 +347,8 @@ static void __init vmware_paravirt_ops_setup(void) vmware_cyc2ns_setup(); - if (vmw_sched_clock) { - paravirt_set_sched_clock(vmware_sched_clock); - x86_platform.save_sched_clock_state = NULL; - x86_platform.restore_sched_clock_state = NULL; - } + if (vmw_sched_clock) + paravirt_set_sched_clock(vmware_sched_clock, NULL, NULL); if (vmware_is_stealclock_available()) { has_steal_clock = true; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 800c3d65f0af..962b6fcb5c60 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -137,7 +137,9 @@ static void kvm_restore_sched_clock_state(void) static inline void kvm_sched_clock_init(bool stable) { kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state); pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); @@ -344,8 +346,6 @@ void __init kvmclock_init(void) #ifdef CONFIG_SMP x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; #endif - x86_platform.save_sched_clock_state = kvm_save_sched_clock_state; - x86_platform.restore_sched_clock_state = kvm_restore_sched_clock_state; kvm_get_preset_lpj(); /* diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index b14c4ada89a3..0114c63dfdd9 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,12 +280,15 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable) +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)) { if (!stable) clear_sched_clock_stable(); static_call_update(pv_sched_clock, func); + x86_platform.save_sched_clock_state = save; + x86_platform.restore_sched_clock_state = restore; } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 21d366d01985..ee7095febfd1 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -567,13 +567,12 @@ static void __init xen_init_time_common(void) { xen_sched_clock_offset = xen_clocksource_read(); static_call_update(pv_steal_clock, xen_steal_clock); - paravirt_set_sched_clock(xen_sched_clock); + /* * Xen has paravirtualized suspend/resume and so doesn't use the common * x86 sched_clock save/restore hooks. */ - x86_platform.save_sched_clock_state = NULL; - x86_platform.restore_sched_clock_state = NULL; + paravirt_set_sched_clock(xen_sched_clock, NULL, NULL); tsc_register_calibration_routines(xen_tsc_khz, NULL); x86_platform.get_wallclock = xen_get_wallclock; diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index ac1d9f9c381c..dee59ce61c29 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -553,10 +553,8 @@ static void hv_restore_sched_clock_state(void) static __always_inline void hv_setup_sched_clock(void *sched_clock) { /* We're on x86/x64 *and* using PV ops */ - paravirt_set_sched_clock(sched_clock); - - x86_platform.save_sched_clock_state = hv_save_sched_clock_state; - x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; + paravirt_set_sched_clock(sched_clock, hv_save_sched_clock_state, + hv_restore_sched_clock_state); } #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ static __always_inline void hv_setup_sched_clock(void *sched_clock) {} -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310445.1581363 (Exim 4.92) (envelope-from ) id 1wNyAW-0006pM-JG; Fri, 15 May 2026 19:25:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310445.1581363; Fri, 15 May 2026 19:25:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyAW-0006p7-Ee; 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Fri, 15 May 2026 12:20:52 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:21 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-21-seanjc@google.com> Subject: [PATCH v3 20/41] x86/xen/time: Mark xen_setup_vsyscall_time_info() as __init From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1778872854-E3171CF5-6E1AC557/0/0 X-purgate-type: clean X-purgate-size: 829 Annotate xen_setup_vsyscall_time_info() as being used only during kernel initialization; it's called only by xen_time_init(), which is already tagged __init. Signed-off-by: Sean Christopherson --- arch/x86/xen/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index ee7095febfd1..f087bb76457d 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -444,7 +444,7 @@ void xen_restore_time_memory_area(void) xen_sched_clock_offset = xen_clocksource_read() - xen_clock_value_saved; } -static void xen_setup_vsyscall_time_info(void) +static void __init xen_setup_vsyscall_time_info(void) { struct vcpu_register_time_memory_area t; struct pvclock_vsyscall_time_info *ti; -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:25:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:25:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310447.1581372 (Exim 4.92) (envelope-from ) id 1wNyAZ-00077c-25; Fri, 15 May 2026 19:25:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310447.1581372; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1778872856-7357C8B7-20A91D32/13/0 X-purgate-type: clean X-purgate-size: 730 WARN if the common PV clock valid_flags are overwritten; all PV clocks expect that they are the one and only PV clock, i.e. don't guard against another PV clock having modified the flags. Signed-off-by: Sean Christopherson --- arch/x86/kernel/pvclock.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index a51adce67f92..8d098841a225 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c @@ -21,6 +21,7 @@ static struct pvclock_vsyscall_time_info *pvti_cpu0_va __ro_after_init; void __init pvclock_set_flags(u8 flags) { + WARN_ON(valid_flags); valid_flags = flags; } -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 19:26:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 19:26:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310449.1581380 (Exim 4.92) (envelope-from ) id 1wNyAb-0007UP-9S; Fri, 15 May 2026 19:26:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310449.1581380; Fri, 15 May 2026 19:26:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyAb-0007UB-4i; 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Fri, 15 May 2026 12:20:55 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 15 May 2026 12:19:24 -0700 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.563.g4f69b47b94-goog Message-ID: <20260515191942.1892718-24-seanjc@google.com> Subject: [PATCH v3 23/41] x86/kvmclock: Refactor handling of PVCLOCK_TSC_STABLE_BIT during kvmclock_init() From: Sean Christopherson To: Kiryl Shutsemau , Paolo Bonzini , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1778872858-41794938-29D1E97F/0/0 X-purgate-type: clean X-purgate-size: 1806 Clean up the setting of PVCLOCK_TSC_STABLE_BIT during kvmclock init to make it somewhat obvious that pvclock_read_flags() must be called *after* pvclock_set_flags(). Note, in theory, a different PV clock could have set PVCLOCK_TSC_STABLE_BIT in the supported flags, i.e. reading flags only if KVM_FEATURE_CLOCKSOURCE_STABLE_BIT is set could very, very theoretically result in a change in behavior. In practice, the kernel only supports a single PV clock. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 8df6adcd6cd8..ccb2aff89b2f 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -306,7 +306,7 @@ static __init void kvm_sched_clock_init(bool stable) void __init kvmclock_init(void) { - u8 flags; + bool stable = false; if (!kvm_para_available() || !kvmclock) return; @@ -333,11 +333,18 @@ void __init kvmclock_init(void) kvm_register_clock("primary cpu clock"); pvclock_set_pvti_cpu0_va(hv_clock_boot); - if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) + if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) { pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT); - flags = pvclock_read_flags(&hv_clock_boot[0].pvti); - kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); + /* + * Check if the clock is stable *after* marking TSC_STABLE as a + * valid flag. + */ + stable = pvclock_read_flags(&hv_clock_boot[0].pvti) & + PVCLOCK_TSC_STABLE_BIT; + } + + kvm_sched_clock_init(stable); tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz); -- 2.54.0.563.g4f69b47b94-goog From xen-devel-bounces@lists.xenproject.org Fri May 15 20:10:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 20:10:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310529.1581389 (Exim 4.92) (envelope-from ) id 1wNyr6-0006R1-E6; Fri, 15 May 2026 20:09:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310529.1581389; Fri, 15 May 2026 20:09:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyr6-0006Qu-Ac; Fri, 15 May 2026 20:09:56 +0000 Received: by outflank-mailman (input) for mailman id 1310529; Fri, 15 May 2026 20:09:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wNyr5-0006Qm-G7 for xen-devel@lists.xenproject.org; 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Fri, 15 May 2026 20:10:07 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Subject:From:In-Reply-To:References:Date:To:Cc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778875792; bh=Jpo5cAcPIqiEuvJJmcqYaYUh19IoUNTWvZHKdkp974U=; h=Subject:From:In-Reply-To:References:Date:To:Cc:From; b=ETFxj9DfueE9AXQ3v0RpmbNNfi0V/7HmOc8V3BRwgvnU4sHdxcIcRQtvONSvufx96 +LVoQ83ONgdFIQ7/9fJJrdk/A3HdtFM7KzDDAKPlyVtkLPIKc1aLTsWKbYFqNx3vBa r3AvxSL1QHVXgDBXw0e++Y0pGLCXR0FxIGo/wvnvkLBreo1GY7qdcU25Y+EvPnoYUC PB09Wf8TKRsNWLT+TR6MaOFXY/a8sqKy6AyfINQxNNe12I+7+9YP5KNwHz0l66ctdq 3gS67VPduUnbdCFWiaKUgmaYFUsGoy5rLscTgoPJci7bc+jUmYmwcKef9wzbbiHD0b Zoqf8BYcpXnwA== Subject: Re: [GIT PULL] xen: branch for v7.1-rc4 From: pr-tracker-bot@kernel.org In-Reply-To: <20260515130004.1571139-1-jgross@suse.com> References: <20260515130004.1571139-1-jgross@suse.com> X-PR-Tracked-List-Id: Xen developer discussion X-PR-Tracked-Message-Id: <20260515130004.1571139-1-jgross@suse.com> X-PR-Tracked-Remote: git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.1b-rc4-tag X-PR-Tracked-Commit-Id: 4594437880ce347ac8438758fd91543f70da1aa9 X-PR-Merge-Tree: torvalds/linux.git X-PR-Merge-Refname: refs/heads/master X-PR-Merge-Commit-Id: 4844e7c4c2697afe63f2b925e2384e0c724cb2be Message-Id: <177887580600.138467.1546973588089628432.pr-tracker-bot@kernel.org> Date: Fri, 15 May 2026 20:10:06 +0000 To: Juergen Gross Cc: torvalds@linux-foundation.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, sstabellini@kernel.org X-purgate-ID: tlsNG-d62444/1778875794-AFB56FF4-0289A142/0/0 X-purgate-type: clean X-purgate-size: 363 The pull request you sent on Fri, 15 May 2026 15:00:04 +0200: > git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip.git for-linus-7.1b-rc4-tag has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/4844e7c4c2697afe63f2b925e2384e0c724cb2be Thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/prtracker.html From xen-devel-bounces@lists.xenproject.org Fri May 15 21:26:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 21:26:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310557.1581397 (Exim 4.92) (envelope-from ) id 1wO02X-00067G-D9; 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s=k20201202; t=1778880346; bh=GhW4Dk2BgygGXnxKS9gHnxr20HQ2i5f7n46m6kjDIEk=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=t+qUiEUEkNnz2SZyftvVKlnyhn5hFUtZo4glrBGv83wT4DxIpRAazqVPnyZLzmA30 zYy5ielb0nGV0LBSpJ8JGMPPukToEup398D/P5eTBrxs4h+w2NmvpuJidiW8Pgqz00 dSRM24lOhccSg+Wsj/MUfV2eBMwirT2V3SaJAFB8f/K2Q78n74Opbs6xlcrDhD5y4/ qPJh8sMgVGgc8jqRk2wN5twAiCUoDHyfMrENFbmdP0OQkC2XQCxwYueLB0FnDzkYGE LvjZQNjdWRbPacm1W7cOBbrX5rv7N2SsY+NKgbUUet+5qs8HF8AcmCq/w5AOzY1uDm oUw1HWM1JiLbw== Date: Fri, 15 May 2026 14:25:41 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Oleksii Kurochko cc: dmukhin@ford.com, xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, anthony.perard@vates.tech Subject: Re: [PATCH v8] xen/domain: introduce DOMID_ANY In-Reply-To: <1778680300.8631fc262581453bbf619ec5b2062170.19e219b849d000f373@vates.tech> Message-ID: References: <20260507202840.293269-1-dmukhin@ford.com> <1778680300.8631fc262581453bbf619ec5b2062170.19e219b849d000f373@vates.tech> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-ebf023/1778880347-2BD6C3FF-C6A3EBE2/0/0 X-purgate-type: clean X-purgate-size: 1572 This patch has been around for a long time and has gone through the ci-loop multiple times. I think it is low risk. Oleksii, can we have a release ack for this? On Wed, 13 May 2026, Anthony PERARD wrote: > On Thu, May 07, 2026 at 01:28:40PM -0700, dmukhin@ford.com wrote: > > From: Denis Mukhin > > > > Add a new symbol DOMID_ANY to improve the readability of the code. > > > > Update all relevant domid_alloc() call sites and harden the domid_alloc() > > input value check. > > > > Also, fix problem with passing invalid domain IDs in > > XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) > > uses 0xffff as domain ID. > > > > Fix failing tools tests too. > > > > Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") > > Signed-off-by: Denis Mukhin > > --- > > Changes since v7: > > - aligned the DOMID_ANY comment with another patch sent separately to > > unblock xenstore series: https://lore.kernel.org/xen-devel/20260429120619.1013440-2-jgross@suse.com/ > > - added fixups to mem-claim, paging-mempool, resource and tsx tests. > > - Link to v7: https://lore.kernel.org/xen-devel/20260408234046.1314021-1-dmukhin@ford.com/ > > - Link to full CI: https://gitlab.com/xen-project/people/sstabellini/xen/-/pipelines/2508345752 > > For the tools part: > Reviewed-by: Anthony PERARD > > Thanks, > > > -- > Anthony Perard | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Fri May 15 21:35:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 21:35:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310565.1581408 (Exim 4.92) (envelope-from ) id 1wO0Bo-0007vT-7K; Fri, 15 May 2026 21:35:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310565.1581408; Fri, 15 May 2026 21:35:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO0Bo-0007vM-3X; Fri, 15 May 2026 21:35:24 +0000 Received: by outflank-mailman (input) for mailman id 1310565; Fri, 15 May 2026 21:35:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO0Bn-0007vG-02 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 21:35:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wO0Bj-009dCH-84 for xen-devel@lists.xenproject.org; Fri, 15 May 2026 23:35:19 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a07915d-e002-0a2a0a5209dd-0a2a4502ca5c-30 for ; Fri, 15 May 2026 23:35:19 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a079195-af86-0a2a45020019-aceafc1f8bfe-3 for ; Fri, 15 May 2026 23:35:19 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id EE03F42AA5; Fri, 15 May 2026 21:35:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8470BC2BCB0; Fri, 15 May 2026 21:35:16 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778880916; bh=ftlewtpiRRoR/qom8h5/jd2k/GrWT6YH1B/pN2hcQqI=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=pTU9a3SiwqlhBWPW9w1mwn2zAJA7nimm3DoniIaNSHThP9BctlZntIDAIiQcYWREK AOnJ+bdIQ6pzEQICCH2/+ZLTuyrVVuwQL8fpJh/DEgBxON0P4rXySiudU1QII3xexH LCGtf8zbMOv298GvxsZzMWKPQ1yD1Sih5NLiYGPFlmmUCaucULzvWijkkh1D7OiMFh Q1A/wjyFCl9JW8qME65CtYIOJHEGIkQwJSGxY8DzB1gyXUZyc3aGwEOuN2GIx3C5Er gAg7TSKcOogYK7IykI6+eSJbl+EfzcOa4LSdkGrb3Lzs9fbQg56U5IYkGPXQxDmwHd hdGbA9GcHPuzQ== Date: Fri, 15 May 2026 14:35:15 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Mykola Kvach , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , oleksii.kurochko@gmail.com Subject: Re: [PATCH] arm/gicv3: Detect normal NC ITS command queues In-Reply-To: <05997446-AB81-433D-84D9-48A5FBE1D62D@arm.com> Message-ID: References: <4d72da78b9c30f5da62c8e03c3b03a01c24101eb.1778836836.git.mykola_kvach@epam.com> <05997446-AB81-433D-84D9-48A5FBE1D62D@arm.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-720697/1778880919-8057B161-A0FE682A/0/0 X-purgate-type: clean X-purgate-size: 1813 Oleksii, can we have a release ack on this fix? On Fri, 15 May 2026, Luca Fancellu wrote: > Hi Mykola, > > > On 15 May 2026, at 10:40, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding. > > Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner > > Non-cacheable) describe non-cacheable accesses to the command queue. > > > > its_map_cbaser() only checked whether the shifted field was zero, > > so an ITS that reports Normal Inner Non-cacheable would not set > > HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with > > the unshifted enum value, matching the handling of ITS BASER tables > > and GICR_PROPBASER. > > > > Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer") > > Signed-off-by: Mykola Kvach > > --- > > xen/arch/arm/gic-v3-its.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index 9005ce8ce5..7560d46c6d 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its) > > * If the command queue memory is mapped as uncached, we need to flush > > * it on every access. > > */ > > - if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) ) > > + if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <= > > + GIC_BASER_CACHE_nC ) > > { > > its->flags |= HOST_ITS_FLUSH_CMD_QUEUE; > > printk(XENLOG_WARNING "using non-cacheable ITS command queue\n"); > > -- > > 2.43.0 > > > > > > Looks ok to me > > Reviewed-by: Luca Fancellu From xen-devel-bounces@lists.xenproject.org Fri May 15 21:36:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 15 May 2026 21:36:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310571.1581416 (Exim 4.92) (envelope-from ) id 1wO0DI-0008Q3-GQ; Fri, 15 May 2026 21:36:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310571.1581416; Fri, 15 May 2026 21:36:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO0DI-0008Pw-DR; Fri, 15 May 2026 21:36:56 +0000 Received: by outflank-mailman (input) for mailman id 1310571; Fri, 15 May 2026 21:36:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO0DH-0008Po-3Q for xen-devel@lists.xenproject.org; Fri, 15 May 2026 21:36:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wO0DG-002BwX-CK for xen-devel@lists.xenproject.org; Fri, 15 May 2026 23:36:54 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0791c8-5cb7-0a2a0a5109dd-0a2a4502deda-14 for ; Fri, 15 May 2026 23:36:54 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0791f5-af86-0a2a45020019-ac6904fea8a2-3 for ; Fri, 15 May 2026 23:36:54 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id C468C60154; Fri, 15 May 2026 21:36:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 29F7FC2BCB0; Fri, 15 May 2026 21:36:52 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1778881012; bh=0yI/Ou+ei5OsZY0tsbVqoyZGFwt4ifG4mR08ru/hFn0=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=CzxMEKWtmGG6Y9ylpTeXWvoaqzM+HYBRlzTXUSTVE0lg2W4iaSOo9ztc5iAiLspFA t3pJULCWhyP0EQ4D7AHKoTwSNzzB0HvvQpfihpCMP1l2qDDSqTDDLiz0NGvJr5dfvv WcwVVvVlmXFm+ElvXapwPwo89sXLQwfQnfQjQHx1CoXYZQ0+Ha0xg4gZZrukSVguVF X9IUW6VQ1hTH7Qh9vBfCDNX0fmmiArYiqwFuA132TOkTqEXQegBTa+Vmvl5DbsCRfZ ec890Pok/kPjdldxXv7MwRLNj5cEq8VFXpLBf6u2nqtmHaLAbFqy2idOdZA22fMEkc mUQ94bVgHvjKw== Date: Fri, 15 May 2026 14:36:51 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Luca Fancellu cc: Mykola Kvach , "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , oleksii.kurochko@gmail.com Subject: Re: [PATCH] xen/arm: gic-v3: Wait for redistributor RWP using the right bit In-Reply-To: Message-ID: References: <0fc5e4d297b8dde66ea36be3ebd60a68dea2562d.1778749474.git.mykola_kvach@epam.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-720697/1778881014-AA374161-F65D886F/0/0 X-purgate-type: clean X-purgate-size: 1278 Oleksii, can we have a release ack for this fix? On Fri, 15 May 2026, Luca Fancellu wrote: > Hi Mykola, > > > On 14 May 2026, at 10:08, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > gicv3_do_wait_for_rwp() is used for both distributor and > > redistributor writes. The CTLR register is at offset 0 for both, > > but the RWP bit is not in the same position. > > > > For GICD_CTLR, RWP is bit 31. For GICR_CTLR, bit 31 is UWP, > > while RWP is bit 3. The redistributor wait path was therefore > > polling UWP instead of RWP. > > > > UWP covers upstream writes, including Generate SGI packets, and is > > not a substitute for redistributor register write completion. The > > existing redistributor callers need RWP semantics for redistributor > > register writes such as GICR_ICENABLER0 and GICR_CTLR updates. > > > > Add GICR_CTLR_RWP and pass the expected RWP bit to the shared > > helper. > > > > Fixes: bc183a0235e ("xen/arm: Add support for GIC v3") > > Reported-by: Luca Fancellu > > Signed-off-by: Mykola Kvach > > --- > > This looks ok to me > > Reviewed-by: Luca Fancellu > > Cheers, > Luca > From xen-devel-bounces@lists.xenproject.org Sat May 16 07:43:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 16 May 2026 07:43:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310706.1581425 (Exim 4.92) (envelope-from ) id 1wO9fa-0006xQ-NO; Sat, 16 May 2026 07:42:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310706.1581425; Sat, 16 May 2026 07:42:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO9fa-0006xJ-Kj; Sat, 16 May 2026 07:42:46 +0000 Received: by outflank-mailman (input) for mailman id 1310706; Sat, 16 May 2026 07:42:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wO9fZ-0006xD-9H for xen-devel@lists.xenproject.org; Sat, 16 May 2026 07:42:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wO9fY-00CepP-AR for xen-devel@lists.xenproject.org; Sat, 16 May 2026 09:42:44 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a081fca-e002-0a2a0a5209dd-0a2a450bd0be-16 for ; Sat, 16 May 2026 09:42:44 +0200 Received: from [170.10.129.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a081ff2-212f-0a2a450b0019-aa0a817ce189-3 for ; Sat, 16 May 2026 09:42:43 +0200 Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-111-C2qozkjxOF6c4Hglw-NMVQ-1; Sat, 16 May 2026 03:42:38 -0400 Received: from mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.111]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 39F2518005B2; Sat, 16 May 2026 07:42:34 +0000 (UTC) Received: from [10.44.32.24] (unknown [10.44.32.24]) by mx-prod-int-08.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTP id 0353F180034E; Sat, 16 May 2026 07:42:22 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References:Autocrypt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1778917362; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references:autocrypt:autocrypt; bh=ZuYuwk7J/15Ge1PYKnSZO6EKNDeWPqqx6skfRaS0DUA=; b=Y4yle8ABpHncRfbAYwgDeECEjKnVSAGjBsC54sB/92rJi0m7+j+xcewE34gbVa6nsajkKR Z6Z+jdPc88uHC3r1JJQw4GmmD20DI9kCCYbQ0/bFUx5Y7k3gc/JCqZ81wjIke21z/VC31E eNBWIA5AfmjSBjxVoY+YF1BqOTmg/UA= X-MC-Unique: C2qozkjxOF6c4Hglw-NMVQ-1 X-Mimecast-MFC-AGG-ID: C2qozkjxOF6c4Hglw-NMVQ_1778917355 Message-ID: <3cb683b4-973a-4b3e-a5d5-a8baa8a70eb0@redhat.com> Date: Sat, 16 May 2026 09:42:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 40/41] x86/tsc: Add standalone helper for getting CPU frequency from CPUID To: Sean Christopherson , Kiryl Shutsemau , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-41-seanjc@google.com> From: Paolo Bonzini Autocrypt: addr=pbonzini@redhat.com; keydata= xsEhBFRCcBIBDqDGsz4K0zZun3jh+U6Z9wNGLKQ0kSFyjN38gMqU1SfP+TUNQepFHb/Gc0E2 CxXPkIBTvYY+ZPkoTh5xF9oS1jqI8iRLzouzF8yXs3QjQIZ2SfuCxSVwlV65jotcjD2FTN04 hVopm9llFijNZpVIOGUTqzM4U55sdsCcZUluWM6x4HSOdw5F5Utxfp1wOjD/v92Lrax0hjiX DResHSt48q+8FrZzY+AUbkUS+Jm34qjswdrgsC5uxeVcLkBgWLmov2kMaMROT0YmFY6A3m1S P/kXmHDXxhe23gKb3dgwxUTpENDBGcfEzrzilWueOeUWiOcWuFOed/C3SyijBx3Av/lbCsHU Vx6pMycNTdzU1BuAroB+Y3mNEuW56Yd44jlInzG2UOwt9XjjdKkJZ1g0P9dwptwLEgTEd3Fo UdhAQyRXGYO8oROiuh+RZ1lXp6AQ4ZjoyH8WLfTLf5g1EKCTc4C1sy1vQSdzIRu3rBIjAvnC tGZADei1IExLqB3uzXKzZ1BZ+Z8hnt2og9hb7H0y8diYfEk2w3R7wEr+Ehk5NQsT2MPI2QBd wEv1/Aj1DgUHZAHzG1QN9S8wNWQ6K9DqHZTBnI1hUlkp22zCSHK/6FwUCuYp1zcAEQEAAc0j UGFvbG8gQm9uemluaSA8cGJvbnppbmlAcmVkaGF0LmNvbT7CwU0EEwECACMFAlRCcBICGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRB+FRAMzTZpsbceDp9IIN6BIA0Ol7MoB15E 11kRz/ewzryFY54tQlMnd4xxfH8MTQ/mm9I482YoSwPMdcWFAKnUX6Yo30tbLiNB8hzaHeRj jx12K+ptqYbg+cevgOtbLAlL9kNgLLcsGqC2829jBCUTVeMSZDrzS97ole/YEez2qFpPnTV0 VrRWClWVfYh+JfzpXmgyhbkuwUxNFk421s4Ajp3d8nPPFUGgBG5HOxzkAm7xb1cjAuJ+oi/K CHfkuN+fLZl/u3E/fw7vvOESApLU5o0icVXeakfSz0LsygEnekDbxPnE5af/9FEkXJD5EoYG SEahaEtgNrR4qsyxyAGYgZlS70vkSSYJ+iT2rrwEiDlo31MzRo6Ba2FfHBSJ7lcYdPT7bbk9 AO3hlNMhNdUhoQv7M5HsnqZ6unvSHOKmReNaS9egAGdRN0/GPDWr9wroyJ65ZNQsHl9nXBqE AukZNr5oJO5vxrYiAuuTSd6UI/xFkjtkzltG3mw5ao2bBpk/V/YuePrJsnPFHG7NhizrxttB nTuOSCMo45pfHQ+XYd5K1+Cv/NzZFNWscm5htJ0HznY+oOsZvHTyGz3v91pn51dkRYN0otqr bQ4tlFFuVjArBZcapSIe6NV8C4cEiSTOwE0EVEJx7gEIAMeHcVzuv2bp9HlWDp6+RkZe+vtl KwAHplb/WH59j2wyG8V6i33+6MlSSJMOFnYUCCL77bucx9uImI5nX24PIlqT+zasVEEVGSRF m8dgkcJDB7Tps0IkNrUi4yof3B3shR+vMY3i3Ip0e41zKx0CvlAhMOo6otaHmcxr35sWq1Jk tLkbn3wG+fPQCVudJJECvVQ//UAthSSEklA50QtD2sBkmQ14ZryEyTHQ+E42K3j2IUmOLriF dNr9NvE1QGmGyIcbw2NIVEBOK/GWxkS5+dmxM2iD4Jdaf2nSn3jlHjEXoPwpMs0KZsgdU0pP JQzMUMwmB1wM8JxovFlPYrhNT9MAEQEAAcLBMwQYAQIACQUCVEJx7gIbDAAKCRB+FRAMzTZp sadRDqCctLmYICZu4GSnie4lKXl+HqlLanpVMOoFNnWs9oRP47MbE2wv8OaYh5pNR9VVgyhD OG0AU7oidG36OeUlrFDTfnPYYSF/mPCxHttosyt8O5kabxnIPv2URuAxDByz+iVbL+RjKaGM GDph56ZTswlx75nZVtIukqzLAQ5fa8OALSGum0cFi4ptZUOhDNz1onz61klD6z3MODi0sBZN Aj6guB2L/+2ZwElZEeRBERRd/uommlYuToAXfNRdUwrwl9gRMiA0WSyTb190zneRRDfpSK5d usXnM/O+kr3Dm+Ui+UioPf6wgbn3T0o6I5BhVhs4h4hWmIW7iNhPjX1iybXfmb1gAFfjtHfL xRUr64svXpyfJMScIQtBAm0ihWPltXkyITA92ngCmPdHa6M1hMh4RDX+Jf1fiWubzp1voAg0 JBrdmNZSQDz0iKmSrx8xkoXYfA3bgtFN8WJH2xgFL28XnqY4M6dLhJwV3z08tPSRqYFm4NMP dRsn0/7oymhneL8RthIvjDDQ5ktUjMe8LtHr70OZE/TT88qvEdhiIVUogHdo4qBrk41+gGQh b906Dudw5YhTJFU3nC6bbF2nrLlB4C/XSiH76ZvqzV0Z/cAMBo5NF/w= In-Reply-To: <20260515191942.1892718-41-seanjc@google.com> X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.111 X-Mimecast-MFC-PROC-ID: ibwQT72NlQgiYDuBQhexYWejXBhRkpwrdJ5xW0dr9mw_1778917355 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1778917364-1BF7EF3B-4DB72D10/0/0 X-purgate-type: clean X-purgate-size: 3678 On 5/15/26 21:19, Sean Christopherson wrote: > Extract the guts of cpu_khz_from_cpuid() to a standalone helper that > doesn't restrict the usage to Intel CPUs. This will allow sharing the > core logic with kvmclock, as (a) CPUID.0x16 may be enumerated alongside > kvmclock, and (b) KVM generally doesn't restrict CPUID based on vendor. Even for native there's no real reason to restrict to Intel, I think. native_calibrate_tsc() only limits itself because historically (prior to commit 604dc9170f24, "x86/tsc: Use CPUID.0x16 to calculate missing crystal frequency", 2019-05-09) it used a hardcoded table of crystal frequencies. Of course paranoia applies, but for virtualization, if the leaf exists there is no reason not to trust it. Thanks, Paolo > No functional change intended. > > Signed-off-by: Sean Christopherson > --- > arch/x86/include/asm/tsc.h | 1 + > arch/x86/kernel/tsc.c | 37 +++++++++++++++++++++++-------------- > 2 files changed, 24 insertions(+), 14 deletions(-) > > diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h > index f458be688512..c145f5707b52 100644 > --- a/arch/x86/include/asm/tsc.h > +++ b/arch/x86/include/asm/tsc.h > @@ -91,6 +91,7 @@ struct cpuid_tsc_info { > }; > extern int cpuid_get_tsc_info(struct cpuid_tsc_info *info); > extern int cpuid_get_tsc_freq(struct cpuid_tsc_info *info); > +extern int cpuid_get_cpu_freq(unsigned int *cpu_khz); > > extern void tsc_early_init(void); > extern void tsc_init(void); > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > index 1b569954ae5e..745fa2052c74 100644 > --- a/arch/x86/kernel/tsc.c > +++ b/arch/x86/kernel/tsc.c > @@ -719,6 +719,24 @@ int cpuid_get_tsc_freq(struct cpuid_tsc_info *info) > return 0; > } > > +int cpuid_get_cpu_freq(unsigned int *cpu_khz) > +{ > + unsigned int eax_base_mhz, ebx, ecx, edx; > + > + *cpu_khz = 0; > + > + if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) > + return -ENOENT; > + > + cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); > + > + if (!eax_base_mhz) > + return -ENOENT; > + > + *cpu_khz = eax_base_mhz * 1000; > + return 0; > +} > + > /** > * native_calibrate_tsc - determine TSC frequency > * Determine TSC frequency via CPUID, else return 0. > @@ -754,13 +772,8 @@ unsigned long native_calibrate_tsc(void) > * clock, but we can easily calculate it to a high degree of accuracy > * by considering the crystal ratio and the CPU speed. > */ > - if (!info.crystal_khz && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { > - unsigned int eax_base_mhz, ebx, ecx, edx; > - > - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); > - info.crystal_khz = eax_base_mhz * 1000 * > - info.denominator / info.numerator; > - } > + if (!info.crystal_khz && !cpuid_get_cpu_freq(&cpu_khz)) > + info.crystal_khz = cpu_khz * info.denominator / info.numerator; > > if (!info.crystal_khz) > return 0; > @@ -787,19 +800,15 @@ unsigned long native_calibrate_tsc(void) > > static unsigned long cpu_khz_from_cpuid(void) > { > - unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx; > + unsigned int cpu_khz; > > if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) > return 0; > > - if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) > + if (cpuid_get_cpu_freq(&cpu_khz)) > return 0; > > - eax_base_mhz = ebx_max_mhz = ecx_bus_mhz = edx = 0; > - > - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx_max_mhz, &ecx_bus_mhz, &edx); > - > - return eax_base_mhz * 1000; > + return cpu_khz; > } > > /* From xen-devel-bounces@lists.xenproject.org Sat May 16 15:05:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 16 May 2026 15:05:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310869.1581434 (Exim 4.92) (envelope-from ) id 1wOGZy-0007bI-LW; Sat, 16 May 2026 15:05:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310869.1581434; Sat, 16 May 2026 15:05:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGZy-0007bA-G5; Sat, 16 May 2026 15:05:26 +0000 Received: by outflank-mailman (input) for mailman id 1310869; Sat, 16 May 2026 15:05:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGZx-0007b4-9O for xen-devel@lists.xenproject.org; Sat, 16 May 2026 15:05:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOGZw-000zny-Lw for xen-devel@lists.xenproject.org; Sat, 16 May 2026 17:05:24 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a08879f-bab6-0a2a0a5309dd-0a2a4502ed64-14 for ; Sat, 16 May 2026 17:05:24 +0200 Received: from [209.85.208.49] (helo=mail-ed1-f49.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0887b4-af86-0a2a45020019-d155d031dd14-3 for ; Sat, 16 May 2026 17:05:24 +0200 Received: by mail-ed1-f49.google.com with SMTP id 4fb4d7f45d1cf-67f7caa33easo1902124a12.1 for ; Sat, 16 May 2026 08:05:24 -0700 (PDT) Received: from EPUAKYIW02F7.. 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The first patch makes parse failures leave the caller-visible color count at zero. This prevents a rejected command-line value from leaving a partially parsed configuration behind for later init paths to consume. The second patch rejects empty color tokens. Previously, delimiters in places where a color value was expected could be interpreted as color 0, because simple_strtoul() returns zero without advancing the input pointer. The patch checks that each parsed color value consumed input. It also adds the missing newline to the DT color parsing error message. Mykola Kvach (2): xen/common: llc-coloring: clear color count on parse failure xen/common: llc-coloring: reject empty color tokens xen/common/llc-coloring.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sat May 16 15:05:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 16 May 2026 15:05:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310871.1581453 (Exim 4.92) (envelope-from ) id 1wOGa2-00081N-2k; Sat, 16 May 2026 15:05:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310871.1581453; Sat, 16 May 2026 15:05:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGa1-00081G-Tl; Sat, 16 May 2026 15:05:29 +0000 Received: by outflank-mailman (input) for mailman id 1310871; Sat, 16 May 2026 15:05:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGa0-0007yz-Mw for xen-devel@lists.xenproject.org; Sat, 16 May 2026 15:05:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOGa0-000ziQ-38 for xen-devel@lists.xenproject.org; Sat, 16 May 2026 17:05:28 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0887a1-e002-0a2a0a5209dd-0a2a4501bb9e-10 for ; Sat, 16 May 2026 17:05:28 +0200 Received: from [209.85.208.47] (helo=mail-ed1-f47.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0887b7-c1f2-0a2a45010019-d155d02feda3-3 for ; Sat, 16 May 2026 17:05:28 +0200 Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-676a89de629so1519912a12.1 for ; Sat, 16 May 2026 08:05:28 -0700 (PDT) Received: from EPUAKYIW02F7.. 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This makes strings such as ",2-6", "-10,19-20" or "1,,2" look as if an empty value was color 0. Also add the missing newline to the DT color parsing error message. Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") Signed-off-by: Mykola Kvach --- xen/common/llc-coloring.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c index 2606cb0977..5d00d4b40e 100644 --- a/xen/common/llc-coloring.c +++ b/xen/common/llc-coloring.c @@ -64,14 +64,21 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], while ( *s != '\0' ) { + const char *endp; unsigned int color, start, end; - start = simple_strtoul(s, &s, 0); + start = simple_strtoul(s, &endp, 0); + if ( endp == s ) + goto fail; + s = endp; if ( *s == '-' ) /* Range */ { s++; - end = simple_strtoul(s, &s, 0); + end = simple_strtoul(s, &endp, 0); + if ( endp == s ) + goto fail; + s = endp; } else /* Single value */ end = start; @@ -334,7 +341,7 @@ int __init domain_set_llc_colors_from_str(struct domain *d, const char *str) err = parse_color_config(str, colors, max_nr_colors, &num_colors); if ( err ) { - printk(XENLOG_ERR "Error parsing LLC color configuration"); + printk(XENLOG_ERR "Error parsing LLC color configuration\n"); xfree(colors); return err; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sat May 16 15:05:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 16 May 2026 15:05:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1310870.1581444 (Exim 4.92) (envelope-from ) id 1wOGZz-0007mW-Ss; Sat, 16 May 2026 15:05:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1310870.1581444; Sat, 16 May 2026 15:05:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGZz-0007mL-Mx; Sat, 16 May 2026 15:05:27 +0000 Received: by outflank-mailman (input) for mailman id 1310870; Sat, 16 May 2026 15:05:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOGZz-0007fa-6X for xen-devel@lists.xenproject.org; Sat, 16 May 2026 15:05:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOGZy-000zny-J8 for xen-devel@lists.xenproject.org; Sat, 16 May 2026 17:05:26 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0887b6-bab6-0a2a0a5309dd-0a2a4509ea70-2 for ; Sat, 16 May 2026 17:05:26 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0887b6-2497-0a2a45090019-d155d02da55f-3 for ; Sat, 16 May 2026 17:05:26 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-678a16429c6so1733006a12.1 for ; Sat, 16 May 2026 08:05:26 -0700 (PDT) Received: from EPUAKYIW02F7.. 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If parsing later fails, leave the count at zero so callers do not consume a partially parsed configuration. Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") Signed-off-by: Mykola Kvach --- xen/common/llc-coloring.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c index 6dc614739a..2606cb0977 100644 --- a/xen/common/llc-coloring.c +++ b/xen/common/llc-coloring.c @@ -79,7 +79,7 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], if ( end >= NR_LLC_COLORS || start > end || (end - start) >= (UINT_MAX - *num_colors) || (*num_colors + (end - start)) >= max_num_colors ) - return -EINVAL; + goto fail; /* Colors are range checked in check_colors() */ for ( color = start; color <= end; color++ ) @@ -91,7 +91,14 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], break; } - return *s ? -EINVAL : 0; + if ( *s ) + goto fail; + + return 0; + + fail: + *num_colors = 0; + return -EINVAL; } static int __init parse_dom0_colors(const char *s) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 17 13:00:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 17 May 2026 13:00:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311222.1581461 (Exim 4.92) (envelope-from ) id 1wOb6X-0006zH-0u; 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Sun, 17 May 2026 06:00:22 -0700 (PDT) Message-ID: <8bdaa98b-94cb-43a7-a02d-d2ec1e899fb9@gmail.com> Date: Sun, 17 May 2026 16:00:20 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 13/13] xen/arm: Add host system suspend backend To: Mykola Kvach , xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <2268857aa7eef95444169564c17f7e9a6f59b1c5.1778605274.git.mykola_kvach@epam.com> Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: <2268857aa7eef95444169564c17f7e9a6f59b1c5.1778605274.git.mykola_kvach@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779022823-D9772443-DB3BB4D0/0/0 X-purgate-type: clean X-purgate-size: 11165 On 5/12/26 20:07, Mykola Kvach wrote: Hello Mykola > From: Mirela Simonovic > > Add the Xen-wide suspend/resume backend used after a control-domain > vPSCI SYSTEM_SUSPEND request has been accepted. The vPSCI policy, > runtime driver blockers and control-domain sequencing checks are handled > by the preceding commit; this change adds the code that actually drives > the host suspend attempt. > > The backend runs from a tasklet scheduled on pCPU0, because non-boot CPUs > are disabled during suspend. It freezes domains, disables the scheduler > and then disables non-boot CPUs. > > Host-side suspend participants are handled in phases. IOMMU and console > state are suspended first. Local IRQs are then disabled before suspending > timer and GIC state. On resume or failure, the completed suspend phases > are unwound in reverse: GIC and timer state are restored while IRQs are > still disabled, local IRQs are restored, and then console and IOMMU state > are restored. > > On boot, init_ttbr is normally initialized during secondary CPU hotplug. > On uniprocessor systems this can leave init_ttbr uninitialized, so set it > from the boot CPU before entering suspend. > > Note: the code is behind CONFIG_HAS_SYSTEM_SUSPEND, which is currently > only selected when UNSUPPORTED is set and MPU is not set. > > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach Patch looks good to me, just one question to clarify ... > --- > Changes in V9: > - Split vPSCI availability policy, runtime host-suspend blockers and the > domain-readiness precheck into the preceding commit. > - Trigger the host suspend backend from the control-domain SYSTEM_SUSPEND > path. > - Reorder the host suspend/resume phases so the timer is suspended with > local IRQs disabled and local IRQs are restored after the GIC and timer > resume paths, before the console and IOMMU resume paths. > - Move HAS_HWDOM_SYSTEM_SUSPEND and related logic to policy patch. > > Changes in V8: > - Add a pre-suspend check in system_suspend() after scheduler_disable() to > require all domains to be in the shut down state with SHUTDOWN_suspend > before proceeding with the global suspend flow. > - Drop the common-level depends on !ARM_64 || !SYSTEM_SUSPEND from > CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND and model the ARM64 suspend case > with an arch-selected capability instead. > - Rename CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND to > CONFIG_HAS_HWDOM_SYSTEM_SUSPEND. > - Rename need_hwdom_shutdown() to want_hwdom_shutdown(). > > Changes in V7: > - Control domain is responsible for host suspend. > - Add an empty inline host_system_suspend() function when SYSTEM_SUSPEND > config is disabled. > - Use IS_ENABLED() for config checking instead of #ifdef. > - Replace #ifdef checks in domain_shutdown() with IS_ENABLED() to simplify > control flow. > - Factor hardware domain shutdown condition into a helper > (need_hwdom_shutdown()) to avoid preprocessor directives inside the > function. > - Squash with iommu suspend/resume commit. > --- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/include/asm/mm.h | 2 + > xen/arch/arm/include/asm/suspend.h | 2 + > xen/arch/arm/mmu/smpboot.c | 2 +- > xen/arch/arm/suspend.c | 140 +++++++++++++++++++++++++++++ > xen/arch/arm/vpsci.c | 10 ++- > 6 files changed, 154 insertions(+), 3 deletions(-) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 54a5bfb9ae..119bc00674 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -9,6 +9,7 @@ config ARM_64 > select 64BIT > select HAS_DOMAIN_TYPE > select HAS_FAST_MULTIPLY > + select HAS_SYSTEM_SUSPEND if !MPU && UNSUPPORTED > select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH > > config ARM > diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/mm.h > index 2eb8465aa9..de119cad3a 100644 > --- a/xen/arch/arm/include/asm/mm.h > +++ b/xen/arch/arm/include/asm/mm.h > @@ -360,6 +360,8 @@ static inline void page_set_xenheap_gfn(struct page_info *p, gfn_t gfn) > } while ( (y = cmpxchg(&p->u.inuse.type_info, x, nx)) != x ); > } > > +void set_init_ttbr(lpae_t *root); > + > #endif /* __ARCH_ARM_MM__ */ > /* > * Local variables: > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h > index 87db12eac3..a194dbb21a 100644 > --- a/xen/arch/arm/include/asm/suspend.h > +++ b/xen/arch/arm/include/asm/suspend.h > @@ -40,11 +40,13 @@ int prepare_resume_ctx(void); > void hyp_resume(void); > bool host_system_suspend_allowed(void); > void host_system_suspend_disable(const char *reason); > +void host_system_suspend(struct domain *d); > > #else /* !CONFIG_SYSTEM_SUSPEND */ > > static inline bool host_system_suspend_allowed(void) { return false; } > static inline void host_system_suspend_disable(const char *reason) {} > +static inline void host_system_suspend(struct domain *d) {} > > #endif > > diff --git a/xen/arch/arm/mmu/smpboot.c b/xen/arch/arm/mmu/smpboot.c > index 37e91d72b7..ff508ecf40 100644 > --- a/xen/arch/arm/mmu/smpboot.c > +++ b/xen/arch/arm/mmu/smpboot.c > @@ -72,7 +72,7 @@ static void clear_boot_pagetables(void) > clear_table(boot_third); > } > > -static void set_init_ttbr(lpae_t *root) > +void set_init_ttbr(lpae_t *root) > { > /* > * init_ttbr is part of the identity mapping which is read-only. So > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > index a571035d2c..b1cc67fbdb 100644 > --- a/xen/arch/arm/suspend.c > +++ b/xen/arch/arm/suspend.c > @@ -1,10 +1,16 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > #include > #include > > +#include > +#include > +#include > #include > +#include > #include > +#include > > struct resume_cpu_context resume_cpu_context; > > @@ -44,6 +50,140 @@ void host_system_suspend_disable(const char *reason) > reason ? reason : "unsupported suspend/resume path"); > } > > +/* Xen suspend. data identifies the domain that initiated suspend. */ > +static void system_suspend(void *data) > +{ > + int status; > + unsigned long flags; > + struct domain *d = (struct domain *)data; > + > + BUG_ON(system_state != SYS_STATE_active); > + > + system_state = SYS_STATE_suspend; > + > + printk("Xen suspending...\n"); > + > + freeze_domains(); > + scheduler_disable(); > + > + /* > + * Non-boot CPUs have to be disabled on suspend and enabled on resume > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to PSCI > + * CPU_OFF to be called by each non-boot CPU. Depending on the underlying > + * platform capabilities, this may lead to the physical powering down of > + * CPUs. > + */ > + status = disable_nonboot_cpus(); > + if ( status ) > + { > + system_state = SYS_STATE_resume; > + goto resume_nonboot_cpus; > + } > + > + console_start_sync(); > + status = iommu_suspend(); > + if ( status ) > + { > + system_state = SYS_STATE_resume; > + goto resume_end_sync; > + } > + > + status = console_suspend(); > + if ( status ) > + { > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=%d\n", status); > + system_state = SYS_STATE_resume; > + goto resume_iommu; > + } > + > + local_irq_save(flags); > + > + time_suspend(); > + > + status = gic_suspend(); > + if ( status ) > + { > + system_state = SYS_STATE_resume; > + goto resume_time; > + } > + > + set_init_ttbr(xen_pgtable); > + > + /* > + * Enable identity mapping before entering suspend to simplify > + * the resume path > + */ > + update_boot_mapping(true); > + > + if ( prepare_resume_ctx() ) > + { > + status = call_psci_system_suspend(); > + /* > + * If suspend is finalized properly by above system suspend PSCI call, > + * the code below in this 'if' branch will never execute. Execution > + * will continue from hyp_resume which is the hypervisor's resume point. > + * In hyp_resume CPU context will be restored and since link-register is > + * restored as well, it will appear to return from prepare_resume_ctx. > + * The difference in returning from prepare_resume_ctx on system suspend > + * versus resume is in function's return value: on suspend, the return > + * value is a non-zero value, on resume it is zero. That is why the > + * control flow will not re-enter this 'if' branch on resume. > + */ > + if ( status ) > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err=%d\n", > + status); > + } ... unless I am mistaken, the boot CPU appears to bypass errata checks on resume. Non-boot (secondary) CPUs: before suspending, Xen calls disable_nonboot_cpus(). Upon resume, it calls enable_nonboot_cpus(), which utilizes the standard secondary CPU bring-up path. Secondary CPUs boot through init_secondary() -> start_secondary(), where Xen explicitly calls functions such as check_local_cpu_errata(), etc. So, secondary CPUs are fine. Boot CPU: when CPU0 wakes up from SYSTEM_SUSPEND, it enters hyp_resume(), calls cpu_init(), and branches directly back into the middle of system_suspend(), where it resumes the GIC, timer, IOMMU, etc. At no point in hyp_resume() or system_suspend() does CPU0 call check_local_cpu_errata(). Could you, please, clarify why this is OK? > + > + system_state = SYS_STATE_resume; > + update_boot_mapping(false); > + > + gic_resume(); > + > + resume_time: > + time_resume(); > + > + local_irq_restore(flags); > + > + console_resume(); > + > + resume_iommu: > + iommu_resume(); > + > + resume_end_sync: > + console_end_sync(); > + > + resume_nonboot_cpus: > + /* > + * The rcu_barrier() has to be added to ensure that the per cpu area is > + * freed before a non-boot CPU tries to initialize it (_free_percpu_area() > + * has to be called before the init_percpu_area()). This scenario occurs > + * when non-boot CPUs are hot-unplugged on suspend and hotplugged on resume. > + */ > + rcu_barrier(); > + enable_nonboot_cpus(); > + > + scheduler_enable(); > + thaw_domains(); > + > + system_state = SYS_STATE_active; > + > + printk("Resume (status %d)\n", status); > + > + domain_resume(d); > +} [snip] From xen-devel-bounces@lists.xenproject.org Sun May 17 14:38:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 17 May 2026 14:38:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311264.1581470 (Exim 4.92) (envelope-from ) id 1wOccw-0002II-J9; Sun, 17 May 2026 14:37:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311264.1581470; Sun, 17 May 2026 14:37:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOccw-0002IA-Fc; Sun, 17 May 2026 14:37:58 +0000 Received: by outflank-mailman (input) for mailman id 1311264; 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Sun, 17 May 2026 07:37:54 -0700 (PDT) Message-ID: Date: Sun, 17 May 2026 17:37:51 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 12/13] xen/arm: Add vPSCI SYSTEM_SUSPEND policy To: Mykola Kvach , xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh References: <06448a30ef6694a55ac85d4c8c78ca2d71342430.1778605274.git.mykola_kvach@epam.com> Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: <06448a30ef6694a55ac85d4c8c78ca2d71342430.1778605274.git.mykola_kvach@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779028676-B5F6ADB1-14C3213E/0/0 X-purgate-type: clean X-purgate-size: 19353 On 5/12/26 20:07, Mykola Kvach wrote: > From: Mykola Kvach Hello Mykola > > Introduce CONFIG_HAS_HWDOM_SYSTEM_SUSPEND as an architecture-selected > capability for platforms where the hardware domain can be parked with > SHUTDOWN_suspend without calling hwdom_shutdown(). > > Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For > non-control domains, including the hardware domain when it is not acting as a > control domain, the call is handled as a guest/domain suspend request and > parks the domain in SHUTDOWN_suspend. > > Control domains need additional sequencing because their SYSTEM_SUSPEND > request is used to coordinate host-wide suspend. A non-last awake control > domain may be parked in SHUTDOWN_suspend without requiring the host suspend > path to be available. The last awake control domain is treated as the point > where the request becomes a host-suspend request, and it may only proceed > when all non-control domains are already in SHUTDOWN_suspend and the host > suspend path is available. > > Keep the control-domain sequencing and domain-readiness checks out of > PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI > function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and > enforce the sequencing policy in the call handler. > > Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so > that SHUTDOWN_suspend from the hardware domain can be treated as a domain > suspend state rather than as a hardware-domain initiated host shutdown. This > does not by itself imply that host-wide suspend is available. > > Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND > capability with runtime blockers reported by Xen-owned subsystems. Add > runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths > lacking suspend/resume support. These blockers are runtime based, so they > only apply to drivers or paths that Xen actually uses on the platform. For > SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, > since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. > > Signed-off-by: Mykola Kvach Apart from Jan's and Luca's findings, patch looks good to me. Just a few questions to clarify, apologies if these have already been discussed elsewhere. > --- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/gic.c | 6 ++ > xen/arch/arm/include/asm/psci.h | 3 + > xen/arch/arm/include/asm/suspend.h | 10 ++- > xen/arch/arm/psci.c | 7 ++ > xen/arch/arm/suspend.c | 40 +++++++++ > xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- > xen/common/Kconfig | 3 + > xen/common/domain.c | 7 +- > xen/drivers/char/serial.c | 12 +++ > xen/drivers/passthrough/arm/iommu.c | 4 + > xen/drivers/passthrough/arm/smmu-v3.c | 4 + > xen/include/xen/serial.h | 1 + > xen/include/xen/suspend.h | 2 + > 14 files changed, 201 insertions(+), 13 deletions(-) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 79622b46a1..54a5bfb9ae 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -19,6 +19,7 @@ config ARM > select HAS_ALTERNATIVE if HAS_VMAP > select HAS_DEVICE_TREE_DISCOVERY > select HAS_DOM0LESS > + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU > select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE > select HAS_STACK_PROTECTOR > select HAS_UBSAN > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 7727ffed5a..a5efcaeb4c 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -26,6 +26,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) > void register_gic_ops(const struct gic_hw_operations *ops) > { > gic_hw_ops = ops; > + > +#ifdef CONFIG_SYSTEM_SUSPEND > + if ( !ops->suspend || !ops->resume ) > + host_system_suspend_disable("GIC driver lacks suspend/resume support"); > +#endif > } > > static void clear_cpu_lr_mask(void) > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h > index bb3c73496e..142fa1bfe5 100644 > --- a/xen/arch/arm/include/asm/psci.h > +++ b/xen/arch/arm/include/asm/psci.h > @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); > void call_psci_system_off(void); > void call_psci_system_reset(void); > int call_psci_system_suspend(void); > +#ifdef CONFIG_SYSTEM_SUSPEND > +bool psci_system_suspend_allowed(void); > +#endif > > /* Range of allocated PSCI function numbers */ > #define PSCI_FNUM_MIN_VALUE _AC(0,U) > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h > index 2d9fc331fc..87db12eac3 100644 > --- a/xen/arch/arm/include/asm/suspend.h > +++ b/xen/arch/arm/include/asm/suspend.h > @@ -38,7 +38,15 @@ extern struct resume_cpu_context resume_cpu_context; > > int prepare_resume_ctx(void); > void hyp_resume(void); > -#endif /* CONFIG_SYSTEM_SUSPEND */ > +bool host_system_suspend_allowed(void); > +void host_system_suspend_disable(const char *reason); > + > +#else /* !CONFIG_SYSTEM_SUSPEND */ > + > +static inline bool host_system_suspend_allowed(void) { return false; } > +static inline void host_system_suspend_disable(const char *reason) {} > + > +#endif > > #endif /* ARM_SUSPEND_H */ > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > index e05dae1133..e9d78668fd 100644 > --- a/xen/arch/arm/psci.c > +++ b/xen/arch/arm/psci.c > @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; > > #define PSCI_RET(res) ((int32_t)(res).a0) > > +#ifdef CONFIG_SYSTEM_SUSPEND > +bool psci_system_suspend_allowed(void) > +{ > + return has_psci_system_suspend; > +} > +#endif > + > int call_psci_cpu_on(int cpu) > { > struct arm_smccc_res res; > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > index 6ea4a0f9cc..a571035d2c 100644 > --- a/xen/arch/arm/suspend.c > +++ b/xen/arch/arm/suspend.c > @@ -1,9 +1,49 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > #include > > +#include > +#include > + > struct resume_cpu_context resume_cpu_context; > > +/* > + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI > + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid > + * suspend/resume path. > + * > + * This gate is checked only when the last awake control domain attempts to > + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. > + */ > +static bool host_system_suspend_runtime_allowed = true; > + > +static bool host_serial_suspend_allowed(void) > +{ > + if ( serial_suspend_supported() ) > + return true; > + > + printk_once(XENLOG_INFO > + "Host SYSTEM_SUSPEND blocked: serial driver lacks suspend/resume support\n"); > + > + return false; > +} > + > +bool host_system_suspend_allowed(void) > +{ > + return psci_system_suspend_allowed() && > + host_serial_suspend_allowed() && > + host_system_suspend_runtime_allowed; > +} > + > +void host_system_suspend_disable(const char *reason) > +{ > + host_system_suspend_runtime_allowed = false; > + > + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", > + reason ? reason : "unsupported suspend/resume path"); > +} > + > /* > * Local variables: > * mode: C > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > index ac6af6118f..48a963ae3e 100644 > --- a/xen/arch/arm/vpsci.c > +++ b/xen/arch/arm/vpsci.c > @@ -5,6 +5,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) > domain_shutdown(d,SHUTDOWN_reboot); > } > > +/* > + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, > + * so multiple control domains cannot all observe each other as still awake. > + */ > +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); > + > +static bool domain_in_suspend_state(struct domain *d) > +{ > + bool suspended; > + > + spin_lock(&d->shutdown_lock); > + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; > + spin_unlock(&d->shutdown_lock); > + > + return suspended; > +} > + > +static int32_t domain_psci_system_suspend_policy(struct domain *d) > +{ > + struct domain *other; > + bool last_awake_control_domain = true; > + bool awake_non_control_domain = false; > + > + /* Only control domains participate in sequencing policy. */ > + if ( !is_control_domain(d) ) > + return 0; > + > + rcu_read_lock(&domlist_read_lock); > + > + for_each_domain ( other ) > + { > + bool suspended; > + > + if ( other == d ) > + continue; > + > + suspended = domain_in_suspend_state(other); > + if ( suspended ) > + continue; > + > + if ( is_control_domain(other) ) > + { > + last_awake_control_domain = false; > + break; > + } > + > + awake_non_control_domain = true; > + } > + > + rcu_read_unlock(&domlist_read_lock); > + > + /* > + * Another control domain is still awake. This request is only the first > + * phase of the sequencing: park this control domain and leave the host > + * running. Host-wide suspend gates must not block this intermediate state. > + */ > + if ( !last_awake_control_domain ) > + return 0; > + > + /* > + * This is the last awake control domain. It must not be parked unless the > + * request can proceed as a host-suspend request; otherwise Xen would lose > + * the last domain that can coordinate the system suspend. > + */ > + if ( awake_non_control_domain ) > + { > + printk(XENLOG_DEBUG > + "SYSTEM_SUSPEND denied: last awake control domain dom%u requested host suspend while non-control domains are still awake\n", > + d->domain_id); > + return PSCI_DENIED; > + } > + > + /* > + * Host-wide gates are relevant only for the last-control-domain case. They > + * must not block parking of a non-last control domain, but they must reject > + * the last control domain when host suspend is not available. > + */ > + if ( !host_system_suspend_allowed() ) > + return PSCI_NOT_SUPPORTED; In do_psci_1_0_features(), the guest is told that SYSTEM_SUSPEND is implemented: case PSCI_1_0_FN64_SYSTEM_SUSPEND: return 0; /* "This function IS implemented" */ However, when the guest actually calls SYSTEM_SUSPEND, the policy check above can reject it by return PSCI_NOT_SUPPORTED; /* "This function is NOT implemented" */ These two responses are contradictory. The guest probes via PSCI_FEATURES, is told suspend is available, and then gets PSCI_NOT_SUPPORTED when it attempts to use it (if let's say the SMMUv3 driver has blocked suspend). From Arm Power State Coordination Interface (DEN0022F.b): 5.3.2 Implementation responsibilities ... Any function that is not implemented must return NOT_SUPPORTED in accordance with the SMC Calling Conventions [4]. In addition, PSCI_FEATURES must also return NOT_SUPPORTED for any non-implemented function... My questing is should do_psci_1_0_features() consult the same policy so that the feature is only advertised when it can actually be used? Or am I missing something here? > + > + return 0; > +} > + > static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > { > int32_t rc; > @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > if ( is_64bit_domain(d) && is_thumb ) > return PSCI_INVALID_ADDRESS; > > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ > - if ( is_hardware_domain(d) ) > - return PSCI_NOT_SUPPORTED; > - > /* Ensure that all CPUs other than the calling one are offline */ > domain_lock(d); > for_each_vcpu ( d, v ) > @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > if ( rc ) > return PSCI_DENIED; > > - rc = domain_shutdown(d, SHUTDOWN_suspend); > + spin_lock(&vpsci_system_suspend_lock); > + > + rc = domain_psci_system_suspend_policy(d); > + if ( !rc ) > + { > + rc = domain_shutdown(d, SHUTDOWN_suspend); > + if ( rc ) > + rc = PSCI_DENIED; > + else > + { > + rctx->ctxt = ctxt; > + rctx->wake_cpu = current; > + } > + } > + > + spin_unlock(&vpsci_system_suspend_lock); > + > if ( rc ) > { > free_vcpu_guest_context(ctxt); > - return PSCI_DENIED; > + return rc; > } > > - rctx->ctxt = ctxt; > - rctx->wake_cpu = current; > - > gprintk(XENLOG_DEBUG, > "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", > epoint, cid); > @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) > case PSCI_0_2_FN32_SYSTEM_RESET: > case PSCI_1_0_FN32_PSCI_FEATURES: > case ARM_SMCCC_VERSION_FID: > - return 0; > case PSCI_1_0_FN32_SYSTEM_SUSPEND: > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; > + return 0; > default: > return PSCI_NOT_SUPPORTED; > } > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > index 5ff71480ee..816a1a4ecb 100644 > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -140,6 +140,9 @@ config HAS_EX_TABLE > config HAS_FAST_MULTIPLY > bool > > +config HAS_HWDOM_SYSTEM_SUSPEND > + bool > + > config HAS_IOPORTS > bool > > diff --git a/xen/common/domain.c b/xen/common/domain.c > index bb9e210c28..d3edfb2a13 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) > domain_shutdown(d, SHUTDOWN_crash); > } > > +static inline bool want_hwdom_shutdown(uint8_t reason) > +{ > + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || > + reason != SHUTDOWN_suspend; > +} > > int domain_shutdown(struct domain *d, u8 reason) > { > @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) > d->shutdown_code = reason; > reason = d->shutdown_code; > > - if ( is_hardware_domain(d) ) > + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) > hwdom_shutdown(reason); > > if ( d->is_shutting_down ) > diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c > index adb312d796..cc2b5b5dee 100644 > --- a/xen/drivers/char/serial.c > +++ b/xen/drivers/char/serial.c > @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) > > #ifdef CONFIG_SYSTEM_SUSPEND > > +static bool __read_mostly serial_suspend_available = true; > + > void serial_suspend(void) > { > int i; > @@ -513,6 +515,11 @@ void serial_resume(void) > com[i].driver->resume(&com[i]); > } > > +bool serial_suspend_supported(void) > +{ > + return serial_suspend_available; > +} > + > #endif /* CONFIG_SYSTEM_SUSPEND */ > > void __init serial_register_uart(int idx, struct uart_driver *driver, > @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, > /* Store UART-specific info. */ > com[idx].driver = driver; > com[idx].uart = uart; > + > +#ifdef CONFIG_SYSTEM_SUSPEND > + if ( !driver->suspend || !driver->resume ) > + serial_suspend_available = false; I wonder why different suspend-blocker API are used for serial vs other subsystems (GIC, IOMMU). Why serial_register_uart() could not simply call host_system_suspend_disable() like every other subsystem? This would avoid adding three unnecessary symbols (serial_suspend_available, serial_suspend_supported(), host_serial_suspend_allowed()). Or am I missing something here? > +#endif > } > > void __init serial_async_transmit(struct serial_port *port) > diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/arm/iommu.c > index 100545e23f..420b9fbdf0 100644 > --- a/xen/drivers/passthrough/arm/iommu.c > +++ b/xen/drivers/passthrough/arm/iommu.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > #include > > @@ -46,6 +47,9 @@ void __init iommu_set_ops(const struct iommu_ops *ops) > } > > iommu_ops = ops; > + > + if ( !ops->suspend || !ops->resume ) > + host_system_suspend_disable("IOMMU driver lacks suspend/resume support"); > } > > int __init iommu_hardware_setup(void) > diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c > index 82c8ead979..443dd0e893 100644 > --- a/xen/drivers/passthrough/arm/smmu-v3.c > +++ b/xen/drivers/passthrough/arm/smmu-v3.c > @@ -91,6 +91,7 @@ > #include > #include > #include > +#include > > #include "smmu-v3.h" > > @@ -1903,6 +1904,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) > } > } > > + host_system_suspend_disable( > + "SMMUv3 MSI IRQ path is unsupported for host suspend"); > + > /* Add callback to free MSIs on teardown */ > devm_add_action(dev, arm_smmu_free_msis, dev); > } > diff --git a/xen/include/xen/serial.h b/xen/include/xen/serial.h > index 8e18445552..418b00ead0 100644 > --- a/xen/include/xen/serial.h > +++ b/xen/include/xen/serial.h > @@ -137,6 +137,7 @@ const struct vuart_info* serial_vuart_info(int idx); > /* Serial suspend/resume. */ > void serial_suspend(void); > void serial_resume(void); > +bool serial_suspend_supported(void); > #endif > > /* > diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h > index 6f94fd53b0..a941331035 100644 > --- a/xen/include/xen/suspend.h > +++ b/xen/include/xen/suspend.h > @@ -6,6 +6,8 @@ > #if __has_include() > #include > #else > +struct domain; > + > static inline void arch_domain_resume(struct domain *d) {} > #endif > From xen-devel-bounces@lists.xenproject.org Sun May 17 15:13:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 17 May 2026 15:13:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311281.1581479 (Exim 4.92) (envelope-from ) id 1wOdAl-0007dg-7Q; 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Sun, 17 May 2026 08:12:51 -0700 (PDT) Message-ID: <636cda11-bc98-44e9-a333-5a61cc86e0dd@gmail.com> Date: Sun, 17 May 2026 18:12:48 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 08/13] iommu/ipmmu-vmsa: Implement suspend/resume callbacks To: Luca Fancellu , Mykola Kvach Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <4162aa58c351677a4a267fe85989c6d4e07487d8.1778605274.git.mykola_kvach@epam.com> <28587F96-D8A1-46FA-91B0-D9A30E55EFC9@arm.com> Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: <28587F96-D8A1-46FA-91B0-D9A30E55EFC9@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779030772-41165A53-7D061DD8/0/0 X-purgate-type: clean X-purgate-size: 8134 On 5/14/26 18:57, Luca Fancellu wrote: > Hi Mykola, Hello Luca and Mykola > >> >> diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c >> index fa9ab9cb13..e1b47a5824 100644 >> --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c >> +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c >> @@ -71,6 +71,8 @@ >> }) >> #endif >> >> +#define dev_dbg(dev, fmt, ...) \ >> + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) >> #define dev_info(dev, fmt, ...) \ >> dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) >> #define dev_warn(dev, fmt, ...) \ >> @@ -130,6 +132,24 @@ struct ipmmu_features { >> unsigned int imuctr_ttsel_mask; >> }; >> >> +#ifdef CONFIG_SYSTEM_SUSPEND >> + >> +struct ipmmu_reg_ctx { >> + unsigned int imttlbr0; >> + unsigned int imttubr0; >> + unsigned int imttbcr; >> + unsigned int imctr; >> +}; >> + >> +struct ipmmu_vmsa_backup { >> + struct device *dev; >> + unsigned int *utlbs_val; >> + unsigned int *asids_val; >> + struct list_head list; >> +}; >> + >> +#endif >> + >> /* Root/Cache IPMMU device's information */ >> struct ipmmu_vmsa_device { >> struct device *dev; >> @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { >> struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; >> unsigned int utlb_refcount[IPMMU_UTLB_MAX]; >> const struct ipmmu_features *features; >> +#ifdef CONFIG_SYSTEM_SUSPEND >> + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; >> +#endif >> }; >> >> /* >> @@ -547,6 +570,245 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, >> spin_unlock_irqrestore(&mmu->lock, flags); >> } >> >> +#ifdef CONFIG_SYSTEM_SUSPEND >> + >> +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); >> +static LIST_HEAD(ipmmu_devices_backup); >> + >> +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; >> + >> +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, >> + unsigned int utlb) >> +{ >> + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); >> +} >> + >> +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) >> +{ >> + struct ipmmu_vmsa_backup *backup_data; >> + >> + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); >> + >> + spin_lock(&ipmmu_devices_backup_lock); >> + >> + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) >> + { >> + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); >> + unsigned int i; >> + >> + if ( to_ipmmu(backup_data->dev) != mmu ) >> + continue; >> + >> + for ( i = 0; i < fwspec->num_ids; i++ ) >> + { >> + unsigned int utlb = fwspec->ids[i]; >> + >> + backup_data->asids_val[i] = ipmmu_imuasid_read(mmu, utlb); >> + backup_data->utlbs_val[i] = ipmmu_imuctr_read(mmu, utlb); >> + } >> + } >> + >> + spin_unlock(&ipmmu_devices_backup_lock); >> +} >> + >> +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) >> +{ >> + struct ipmmu_vmsa_backup *backup_data; >> + >> + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); >> + >> + spin_lock(&ipmmu_devices_backup_lock); >> + >> + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) >> + { >> + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); >> + unsigned int i; >> + >> + if ( to_ipmmu(backup_data->dev) != mmu ) >> + continue; >> + >> + for ( i = 0; i < fwspec->num_ids; i++ ) >> + { >> + unsigned int utlb = fwspec->ids[i]; >> + >> + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); >> + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); >> + } >> + } >> + >> + spin_unlock(&ipmmu_devices_backup_lock); >> +} >> + >> +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *domain) >> +{ >> + struct ipmmu_vmsa_device *mmu = domain->mmu->root; >> + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; >> + >> + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->context_id); >> + >> + regs->imttlbr0 = ipmmu_ctx_read_root(domain, IMTTLBR0); >> + regs->imttubr0 = ipmmu_ctx_read_root(domain, IMTTUBR0); >> + regs->imttbcr = ipmmu_ctx_read_root(domain, IMTTBCR); >> + regs->imctr = ipmmu_ctx_read_root(domain, IMCTR); >> +} >> + >> +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *domain) >> +{ >> + struct ipmmu_vmsa_device *mmu = domain->mmu->root; >> + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; > > NIT: There is a double space before the `=` > >> + >> + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->context_id); >> + >> + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); >> + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); >> + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); >> + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); > > I see in ipmmu_tlb_invalidate() we do: > dsb(sy); > ipmmu_tlb_sync(domain); > > Is it safe to omit them here? Luca, good question, thanks. Below my understanding (which might be wrong): The IMCTR_FLUSH bit here is not an explicit TLB invalidation request — it is required by the HW whenever context registers are modified (regardless of whether an actual TLB flush is the intent). For example, ipmmu_domain_init_context() similarly writes: ipmmu_ctx_write_root(domain, IMCTR, IMCTR_VA64 | IMCTR_INTEN | IMCTR_FLUSH | IMCTR_MMUEN); and does not follow it with dsb(sy) / ipmmu_tlb_sync(). In contrast, ipmmu_tlb_invalidate() does include the sync because it is an explicit flush request from the P2M framework, and we need a guarantee that the invalidation has completed before proceeding. Here, we are simply restoring context registers after resume, there is no caller waiting on flush completion, so the additional synchronization is not necessary from my PoV. > >> +} >> + >> +/* >> + * Xen: Unlike Linux implementation, Xen uses a single driver instance >> + * for handling all IPMMUs. There is no framework for ipmmu_suspend/resume >> + * callbacks to be invoked for each IPMMU device. So, we need to iterate >> + * through all registered IPMMUs performing required actions. >> + * >> + * Also take care of restoring special settings, such as translation >> + * table format, etc. >> + */ >> +static int __must_check ipmmu_suspend(void) >> +{ >> + struct ipmmu_vmsa_device *mmu; >> + >> + if ( !iommu_enabled ) >> + return 0; >> + >> + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); >> + >> + spin_lock(&ipmmu_devices_lock); >> + >> + list_for_each_entry( mmu, &ipmmu_devices, list ) >> + { >> + if ( ipmmu_is_root(mmu) ) >> + { >> + unsigned int i; >> + >> + for ( i = 0; i < mmu->num_ctx; i++ ) >> + { >> + if ( !mmu->domains[i] ) >> + continue; >> + ipmmu_domain_backup_context(mmu->domains[i]); >> + } >> + } >> + else >> + ipmmu_utlbs_backup(mmu); >> + } >> + >> + spin_unlock(&ipmmu_devices_lock); >> + >> + return 0; >> +} >> + >> +static void ipmmu_resume(void) >> +{ >> + struct ipmmu_vmsa_device *mmu; >> + >> + if ( !iommu_enabled ) >> + return; >> + >> + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); >> + >> + spin_lock(&ipmmu_devices_lock); >> + >> + list_for_each_entry( mmu, &ipmmu_devices, list ) > > This loop has an ordering problem because we can run ipmmu_utlbs_restore() before > the root ipmmu is restored (ipmmu_probe() uses `list_add()`). > Maybe going twice on the list, restoring first the root and in the second round the rest > should work. > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Sun May 17 15:53:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 17 May 2026 15:53:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311234.1581488 (Exim 4.92) (envelope-from ) id 1wOdnv-0004wY-1C; Sun, 17 May 2026 15:53:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311234.1581488; Sun, 17 May 2026 15:53:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOdnu-0004wR-UE; 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Signed-off-by: Yash Suthar --- drivers/xen/xen-balloon.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/xen/xen-balloon.c b/drivers/xen/xen-balloon.c index b293d7652f15..67b0e2dbe84a 100644 --- a/drivers/xen/xen-balloon.c +++ b/drivers/xen/xen-balloon.c @@ -138,7 +138,7 @@ EXPORT_SYMBOL_GPL(xen_balloon_init); struct device_attribute *attr, \ char *buf) \ { \ - return sprintf(buf, format, ##args); \ + return sysfs_emit(buf, format, ##args); \ } \ static DEVICE_ATTR_RO(name) @@ -155,7 +155,7 @@ static DEVICE_BOOL_ATTR(scrub_pages, 0644, xen_scrub_pages); static ssize_t target_kb_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%lu\n", PAGES2KB(balloon_stats.target_pages)); + return sysfs_emit(buf, "%lu\n", PAGES2KB(balloon_stats.target_pages)); } static ssize_t target_kb_store(struct device *dev, @@ -180,7 +180,7 @@ static DEVICE_ATTR_RW(target_kb); static ssize_t target_show(struct device *dev, struct device_attribute *attr, char *buf) { - return sprintf(buf, "%llu\n", + return sysfs_emit(buf, "%llu\n", (unsigned long long)balloon_stats.target_pages << PAGE_SHIFT); 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Sun, 17 May 2026 10:28:16 -0700 (PDT) Message-ID: Date: Sun, 17 May 2026 20:28:13 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v9 10/13] xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND To: Luca Fancellu , Mykola Kvach Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <46bbc9e008a65dd86fb2b368e4751eb7d2014afa.1778605274.git.mykola_kvach@epam.com> <7254EEC1-315F-41EB-B623-5CACAD7255E9@arm.com> Content-Language: en-US From: Oleksandr Tyshchenko In-Reply-To: <7254EEC1-315F-41EB-B623-5CACAD7255E9@arm.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779038897-B6975DB1-D2455346/0/0 X-purgate-type: clean X-purgate-size: 3168 On 5/14/26 20:20, Luca Fancellu wrote: > Hi Mykola, Hello Mykola and Luca Mykola, I have no further comments on this patch, but I think Luca has raised a valid point. Once that is resolved (or clarified why no change is needed), feel free to add my: Reviewed-by: Oleksandr Tyshchenko see below > >> >> +#ifdef CONFIG_SYSTEM_SUSPEND >> +/* >> + * int prepare_resume_ctx(void) >> + * >> + * CPU context saved here will be restored on resume in hyp_resume function. >> + * prepare_resume_ctx shall return a non-zero value. Upon restoring context >> + * hyp_resume shall return value zero instead. From C code that invokes >> + * prepare_resume_ctx, the return value is interpreted to determine whether >> + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). >> + */ >> +FUNC(prepare_resume_ctx) >> + ldr x0, =resume_cpu_context >> + >> + /* Store callee-saved registers */ >> + stp x19, x20, [x0, #RESUME_CTX_X19] >> + stp x21, x22, [x0, #RESUME_CTX_X21] >> + stp x23, x24, [x0, #RESUME_CTX_X23] >> + stp x25, x26, [x0, #RESUME_CTX_X25] >> + stp x27, x28, [x0, #RESUME_CTX_X27] >> + stp x29, lr, [x0, #RESUME_CTX_X29] >> + >> + /* Store stack-pointer */ >> + mov x2, sp >> + str x2, [x0, #RESUME_CTX_SP] >> + >> + /* Store system control registers */ >> + mrs x2, VBAR_EL2 >> + str x2, [x0, #RESUME_CTX_VBAR_EL2] >> + mrs x2, VTCR_EL2 >> + str x2, [x0, #RESUME_CTX_VTCR_EL2] >> + mrs x2, VTTBR_EL2 >> + str x2, [x0, #RESUME_CTX_VTTBR_EL2] >> + mrs x2, TPIDR_EL2 >> + str x2, [x0, #RESUME_CTX_TPIDR_EL2] >> + mrs x2, MDCR_EL2 >> + str x2, [x0, #RESUME_CTX_MDCR_EL2] >> + mrs x2, HSTR_EL2 >> + str x2, [x0, #RESUME_CTX_HSTR_EL2] >> + mrs x2, CPTR_EL2 >> + str x2, [x0, #RESUME_CTX_CPTR_EL2] >> + mrs x2, HCR_EL2 >> + str x2, [x0, #RESUME_CTX_HCR_EL2] > > Do you think we should save also CNTHCTL_EL2? Apologies it escaped my first review, > but I see we program it in the boot cpu path + secondary cpu path: init_timer_interrupt(). Yes, CNTHCTL_EL2 is programmed by init_timer_interrupt() during the initialization of both boot and secondary CPUs. Whether it needs to be saved here depends on the resume path: - If the resume handler (after prepare_resume_ctx() returns 0) re-invokes timer initialization, it is already covered. - If not, CNTHCTL_EL2 should be added to struct resume_cpu_context and included in the save/restore assembly. If I understand the current flow correctly: - Secondary CPUs wake up via hotplug, so they execute start_secondary()->init_timer_interrupt() and configure CNTHCTL_EL2. - The boot CPU wakes up via hyp_resume() and jumps straight back to C code, which appears to bypass init_timer_interrupt() call. At least I have not spotted where system_suspend() would re-invoke it. > > The rest looks ok. > > Cheers, > Luca > > From xen-devel-bounces@lists.xenproject.org Sun May 17 18:19:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 17 May 2026 18:19:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311331.1581505 (Exim 4.92) (envelope-from ) id 1wOg5U-0007Nz-2N; Sun, 17 May 2026 18:19:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311331.1581505; Sun, 17 May 2026 18:19:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOg5T-0007Ns-Vt; Sun, 17 May 2026 18:19:39 +0000 Received: by outflank-mailman (input) for mailman id 1311331; Sun, 17 May 2026 18:19:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOg5S-0007Nm-7x for xen-devel@lists.xenproject.org; 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Sun, 17 May 2026 11:19:36 -0700 (PDT) MIME-Version: 1.0 References: <613c8d67a66924ea62c2436dac14708d939f6784.1778605274.git.mykola_kvach@epam.com> <8E531A25-5AB5-41CD-AB61-C426C58C8E1C@arm.com> <1142B5E5-961F-4CD1-B70F-88630F0DA8F7@arm.com> In-Reply-To: <1142B5E5-961F-4CD1-B70F-88630F0DA8F7@arm.com> From: Mykola Kvach Date: Sun, 17 May 2026 21:19:25 +0300 X-Gm-Features: AVHnY4J9xrdUtScx0AsbAllwzduE8OhEVZGnNClr5nX5BwoBG_obnEJB7O7T9Io Message-ID: Subject: Re: [PATCH v9 02/13] xen/arm: gic-v2: Implement GIC suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1779041977-BEB74DB1-48E914A2/0/0 X-purgate-type: clean X-purgate-size: 6353 On Fri, May 15, 2026 at 12:53=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 15 May 2026, at 08:59, Mykola Kvach wrote: > > > > Hi Luca, > > > > Thank you for the detailed review. > > > > On Wed, May 13, 2026 at 5:09=E2=80=AFPM Luca Fancellu wrote: > >> > >> Hi Mykola, > >> > >>> + > >>> +static void gicv2_resume(void) > >>> +{ > >>> + unsigned int i, blocks =3D DIV_ROUND_UP(gicv2_info.nr_lines, 32)= ; > >>> + > >>> + gicv2_cpu_disable(); > >>> + /* Disable distributor */ > >>> + writel_gicd(0, GICD_CTLR); > >>> + > >>> + for ( i =3D 0; i < blocks; i++ ) > >>> + { > >>> + struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > >>> + size_t j, off =3D i * sizeof(irqs->isenabler); > >>> + > >>> + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); > >>> + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); > >>> + > >>> + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); > >>> + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); > >>> + > >>> + off =3D i * sizeof(irqs->ipriorityr); > >>> + for ( j =3D 0; j < ARRAY_SIZE(irqs->ipriorityr); j++ ) > >>> + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off += j * 4); > >> > >> apologies for spotting these only now, in case gicv2_info.nr_lines is = 1020, > >> here and below for GICD_ITARGETSR we are going to save also IDs 1020-1= 023 > >> which are reserved. > >> > >> Could we assume irqs->ipriorityr and irqs->itargetsr have the same siz= e and implement > >> some cap logic which might cap the last loop (eventually): > >> > >> for ( i =3D 0; i < blocks; i++ ) > >> { > >> struct irq_block *irqs =3D gic_ctx.dist.irqs + i; > >> size_t j, off =3D i * sizeof(irqs->isenabler); > >> size_t nr_regs =3D ARRAY_SIZE(irqs->ipriorityr); > >> > >> if ( i =3D=3D blocks - 1 ) > >> nr_regs =3D DIV_ROUND_UP(gicv2_info.nr_lines - i * 32, 4); > >> > >> [=E2=80=A6] > >> > >> off =3D i * sizeof(irqs->ipriorityr); > >> for ( j =3D 0; j < nr_regs; j++ ) > >> writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j = * 4); > >> > >> /* > >> * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save= : > >> * they are read-only on multiprocessor implementations and RAZ= /WI > >> * on uniprocessor implementations. > >> */ > >> if ( i ) > >> { > >> off =3D i * sizeof(irqs->itargetsr); > >> for ( j =3D 0; j < nr_regs; j++ ) > >> writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + = j * 4); > >> } > >> > >> [=E2=80=A6] > >> } > > > > This was intentional to keep the logic simpler. > > > > For the 1020-interrupt case, the extra word would correspond to > > interrupt IDs 1020-1023. My reading of ARM IHI 0048B.b is that this > > is architecturally harmless: section 4.1.2 says that reserved > > Distributor register addresses are RAZ/WI, and Table 4-1 marks > > GICD_IPRIORITYR offset 0x7fc and GICD_ITARGETSR offset 0xbfc as > > Reserved. > > > > Would you be OK with keeping this as-is, or would you prefer me to add > > the cap logic anyway? > > I think this would be the only part in the driver that does that, also Li= nux is avoiding > to touch these reserved parts > (https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/= drivers/irqchip/irq-gic.c?h=3Dv7.1-rc3#n582) > My preference would be to be consistent. Ack. I'll add the cap logic. > > > > >> > >>> + > >>> + /* > >>> + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to s= ave: > >>> + * they are read-only on multiprocessor implementations and = RAZ/WI > >>> + * on uniprocessor implementations. > >>> + */ > >>> + if ( i ) > >>> + { > >>> + off =3D i * sizeof(irqs->itargetsr); > >>> + for ( j =3D 0; j < ARRAY_SIZE(irqs->itargetsr); j++ ) > >>> + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off= + j * 4); > >>> + } > >>> + > >>> + off =3D i * sizeof(irqs->icfgr); > >>> + for ( j =3D 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) > >>> + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); > >> > >> in the GICv2 specs the usage constraints > >> of GICD_ICFGR says: =E2=80=9CBefore changing the value of a programmab= le Int_config field, > >> software must disable the corresponding interrupt, otherwise GIC behav= ior is > >> UNPREDICTABLE" > >> > >> ARM IHI 0048B.b, 4.3.13. > >> > >> I think we should move this restore just after GICD_ICENABLER write, b= efore writing > >> GICD_ISENABLER. > > > > Good catch, I agree. > > > > I will move the GICD_ICFGR restore after the GICD_ICENABLER writes > > and before restoring GICD_ISENABLER, so that programmable Int_config > > fields are restored while the corresponding interrupts are disabled. > > > > I will also check whether it makes sense to move the other > > configuration restores before GICD_ISENABLER as well. The spec does > > not seem to impose the same strict requirement there, but keeping all > > configuration restores before re-enabling the interrupts might make > > the ordering clearer. > > > >> > >> And also the section says that the GICD_ICFGR0 is read-only. > > > > For GICD_ICFGR0, my intention was to keep the restore loop uniform. > > There should be no useful SGI state to restore here: section 4.3.13 > > says that SGI Int_config[1] is not programmable and RAO/WI, while > > Int_config[0] is reserved. Also, the value written is the value > > previously read from the same register. > > > > So I do not expect this write to affect the architected SGI > > configuration. However, if you prefer avoiding the write to > > GICD_ICFGR0 explicitly, I will skip it in the next version of > > this series. > > I think also Linux =E2=80=9Crestores=E2=80=9D it, so I=E2=80=99m ok to ke= ep the code as it is, in fact it=E2=80=99s read-only > and not marked as reserved, my bad! Ack. I'll keep this part as-is here. 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Smith" Subject: [RFC PATCH] device-tree: size first hwdom bank for boot modules Date: Sun, 17 May 2026 23:57:56 +0300 Message-ID: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779051613-E3589443-5950C84A/0/0 X-purgate-type: clean X-purgate-size: 10312 From: Mykola Kvach With LLC coloring enabled, the hardware domain memory comes from allocate_hwdom_memory(), not from the fixed direct-map banks used when coloring is off. Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") made that allocator sort free host regions by ascending address so Dom0 gets DMA-capable low memory first. The first bank filter still only required 128MB. That can select a low region which is large enough for the heuristic, but not large enough for place_modules() to put the Dom0 kernel, generated DTB and initrd contiguously in bank 0. Ask arch code for any additional first-bank size requirement. On Arm, compute it from the actual Dom0 kernel placement, rounded initrd size and generated DTB size hint. For 64-bit Image kernels, include the text offset from the candidate bank start, because the returned requirement is compared with a bank size measured from that start. The hint covers both the normal Device Tree path and the minimal DTB created for ACPI boot. Check the first-bank threshold against the size which will actually be assigned to Dom0, after capping the host region by the remaining unassigned Dom0 memory. Otherwise a large host region could pass the test but still produce a first guest bank too small for place_modules(). Use the typed min()/max() helpers for this normal allocation arithmetic; MIN()/MAX() are intended for preprocessor-style contexts and skip the type checking provided by the lowercase helpers. This keeps the DMA-oriented allocation policy from de99f3263555 while preventing a too-small bank 0 from reaching place_modules(). Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") Signed-off-by: Mykola Kvach --- Test/setup notes: The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) arm64 board booted through U-Boot/TFTP and using huge initrd. Relevant Xen command line excerpt: dom0_mem=2048M llc-coloring=on Boot module layout from Xen: MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy The initrd is about 168MB. With LLC coloring enabled and the low-address allocation policy from de99f3263555, Dom0 can receive a 192MB first bank: d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) That bank satisfies the old 128MB minimum but is too small for the rounded Dom0 kernel, generated DTB and initrd placement. The observed failure before this patch was: Panic on CPU 0: Not enough memory in the first bank for the kernel+dtb+initrd With this patch, the same boot skips the too-small low region for bank 0 and reaches Dom0: d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) d0: extended region 0: 0x48000000->0x54000000 Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 Loading d0 DTB to 0x5f000000-0x5f011c80 Linux version 5.10.194-yocto-standard --- xen/arch/arm/acpi/domain_build.c | 2 -- xen/arch/arm/domain_build.c | 8 ++++++ xen/arch/arm/include/asm/domain_build.h | 4 +++ xen/arch/arm/include/asm/kernel.h | 8 ++++++ xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- xen/include/xen/fdt-kernel.h | 8 ++++++ 7 files changed, 83 insertions(+), 9 deletions(-) diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c index 249d899c33..db16f7fa94 100644 --- a/xen/arch/arm/acpi/domain_build.c +++ b/xen/arch/arm/acpi/domain_build.c @@ -26,8 +26,6 @@ #undef virt_to_mfn #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) -#define ACPI_DOM0_FDT_MIN_SIZE 4096 - static int __init acpi_iomem_deny_access(struct domain *d) { acpi_status status; diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 1efddc60ef..226e053c68 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, const char *e) (IS_ENABLED(CONFIG_STATIC_SHM) ? \ (NR_SHMEM_BANKS * (160 + 16)) : 0)) +paddr_t __init dom0_get_fdt_size_hint(void) +{ + if ( !acpi_disabled ) + return ACPI_DOM0_FDT_MIN_SIZE; + + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; +} + unsigned int __init dom0_max_vcpus(void) { if ( opt_dom0_max_vcpus == 0 ) diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index df8b361b3d..45687c5d6f 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,10 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#define ACPI_DOM0_FDT_MIN_SIZE 4096 + +paddr_t dom0_get_fdt_size_hint(void); + #if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) /* Utility function to determine if an Armv8-R processor supports VMSA. */ bool has_v8r_vmsa_support(void); diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h index 21f4273fa1..17c5b9bce4 100644 --- a/xen/arch/arm/include/asm/kernel.h +++ b/xen/arch/arm/include/asm/kernel.h @@ -8,12 +8,20 @@ #include +#include + +struct kernel_info; + struct arch_kernel_info { /* Enable pl011 emulation */ bool vpl011; }; +#define arch_get_min_first_bank_size arch_get_min_first_bank_size +paddr_t arch_get_min_first_bank_size(struct kernel_info *info, + paddr_t bank_start); + #endif /* #ifdef __ARCH_ARM_KERNEL_H__ */ /* diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index b72585b7fe..3644663e2f 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) return load_addr; } +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t len) +{ + return ROUNDUP(load_addr + len, MB(2)) - load_addr; +} + +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, + paddr_t bank_start) +{ + const struct boot_module *mod = info->bd.initrd; + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); + const paddr_t dtb_len = ROUNDUP(dom0_get_fdt_size_hint(), MB(2)); + paddr_t kernsize; + +#ifdef CONFIG_HAS_DOMAIN_TYPE + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) + { + paddr_t load_addr = bank_start + info->image.text_offset; + + /* + * The caller compares this value with a size measured from + * bank_start, so include the text offset before the kernel. + */ + kernsize = ROUNDUP(load_addr + info->image.len, MB(2)) - bank_start; + return kernsize + initrd_len + dtb_len; + } +#endif + + if ( info->image.start == 0 ) + kernsize = ROUNDUP(info->image.len, MB(2)); + else + kernsize = kernel_placement_size(info->image.start, info->image.len); + + return kernsize + initrd_len + dtb_len; +} + static void __init kernel_zimage_load(struct kernel_info *info) { paddr_t load_addr = kernel_zimage_place(info); diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 2a760b007b..d8865db259 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -299,20 +299,33 @@ static bool __init allocate_hwdom_memory(struct kernel_info *kinfo) for ( i = 0; (kinfo->unassigned_mem > 0) && (i < nr_banks); i++ ) { - paddr_t bank_size; + const paddr_t bank_start = hwdom_free_mem->bank[i].start; + paddr_t bank_size = hwdom_free_mem->bank[i].size; + + /* + * Check the size that would actually be assigned, not just the size + * of the host region. + */ + bank_size = min(bank_size, kinfo->unassigned_mem); /* * The first bank must be large enough for place_modules() to * fit the kernel, DTB and initrd. Skip small regions to avoid * ending up with a tiny first bank. */ - if ( !mem->nr_banks && (hwdom_free_mem->bank[i].size < min_bank_size) ) - continue; + if ( !mem->nr_banks ) + { + paddr_t arch_min_size; + paddr_t required_first_bank_size; + + arch_min_size = arch_get_min_first_bank_size(kinfo, bank_start); + required_first_bank_size = max(min_bank_size, arch_min_size); + + if ( bank_size < required_first_bank_size ) + continue; + } - bank_size = MIN(hwdom_free_mem->bank[i].size, kinfo->unassigned_mem); - if ( !allocate_bank_memory(kinfo, - gaddr_to_gfn(hwdom_free_mem->bank[i].start), - bank_size) ) + if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), bank_size) ) { xfree(hwdom_free_mem); return false; diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 8cd1670c2c..931b3e1686 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -86,6 +86,14 @@ kernel_info_get_mem_const(const struct kernel_info *kinfo) return container_of(&kinfo->mem.common, const struct membanks, common); } +#ifndef arch_get_min_first_bank_size +static inline paddr_t arch_get_min_first_bank_size(struct kernel_info *info, + paddr_t bank_start) +{ + return 0; +} +#endif + #ifndef KERNEL_INFO_SHM_MEM_INIT #ifdef CONFIG_STATIC_SHM -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 00:17:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 00:17:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311378.1581524 (Exim 4.92) (envelope-from ) id 1wOlfc-0002D6-Il; Mon, 18 May 2026 00:17:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311378.1581524; Mon, 18 May 2026 00:17:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOlfc-0002Cy-Cx; Mon, 18 May 2026 00:17:20 +0000 Received: by outflank-mailman (input) for mailman id 1311378; Mon, 18 May 2026 00:17:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOlfa-0002Bw-Om for xen-devel@lists.xenproject.org; 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Message-ID: Date: Mon, 18 May 2026 02:17:07 +0200 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 08/23] xen/arm: vsmmuv3: Add support for registers emulation To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Rahul Singh , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <25adb33c4be3932c2d946cf7757c933eb042476c.1774918270.git.milan_djokic@epam.com> Content-Language: en-US From: Milan Djokic In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-ClientProxiedBy: VIYP296CA0009.AUTP296.PROD.OUTLOOK.COM (2603:10a6:800:29d::8) To AS2PR03MB9587.eurprd03.prod.outlook.com (2603:10a6:20b:595::7) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS2PR03MB9587:EE_|AS1PR03MB8174:EE_ X-MS-Office365-Filtering-Correlation-Id: f2aa06f7-7645-464d-a445-08deb472cc9b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|366016|56012099003|22082099003|18002099003|11063799003|4143699003; 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>> + uint64_t reg; >> + uint32_t reg32; >> + >> + switch ( info->gpa & 0xffff ) >> + { >> + case VREG32(ARM_SMMU_CR0): >> + reg32 = smmu->cr[0]; >> + vreg_reg32_update(®32, r, info); >> + smmu->cr[0] = reg32; >> + smmu->cr0ack = reg32 & ~CR0_RESERVED; >> + break; >> + >> + case VREG32(ARM_SMMU_CR1): >> + reg32 = smmu->cr[1]; >> + vreg_reg32_update(®32, r, info); >> + smmu->cr[1] = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_CR2): >> + reg32 = smmu->cr[2]; >> + vreg_reg32_update(®32, r, info); >> + smmu->cr[2] = reg32; >> + break; >> + >> + case VREG64(ARM_SMMU_STRTAB_BASE): >> + reg = smmu->strtab_base; >> + vreg_reg64_update(®, r, info); >> + smmu->strtab_base = reg; >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE_CFG): >> + reg32 = smmu->strtab_base_cfg; >> + vreg_reg32_update(®32, r, info); >> + smmu->strtab_base_cfg = reg32; >> + >> + smmu->sid_split = FIELD_GET(STRTAB_BASE_CFG_SPLIT, reg32); >> + smmu->features |= STRTAB_BASE_CFG_FMT_2LVL; >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_BASE): > > I think this needs to be VREG64 > >> + reg = smmu->cmdq.q_base; >> + vreg_reg64_update(®, r, info); >> + smmu->cmdq.q_base = reg; >> + smmu->cmdq.max_n_shift = FIELD_GET(Q_BASE_LOG2SIZE, smmu->cmdq.q_base); >> + if ( smmu->cmdq.max_n_shift > SMMU_CMDQS ) >> + smmu->cmdq.max_n_shift = SMMU_CMDQS; >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_PROD): >> + reg32 = smmu->cmdq.prod; >> + vreg_reg32_update(®32, r, info); >> + smmu->cmdq.prod = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_CONS): >> + reg32 = smmu->cmdq.cons; >> + vreg_reg32_update(®32, r, info); >> + smmu->cmdq.cons = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_BASE): > > And also this one VREG64 > >> + reg = smmu->evtq.q_base; >> + vreg_reg64_update(®, r, info); >> + smmu->evtq.q_base = reg; >> + smmu->evtq.max_n_shift = FIELD_GET(Q_BASE_LOG2SIZE, smmu->evtq.q_base); >> + if ( smmu->cmdq.max_n_shift > SMMU_EVTQS ) >> + smmu->cmdq.max_n_shift = SMMU_EVTQS; > > This seems a typo, I think here we want to modify the evtq, not the cmdq? > So in case both condition and assignment needs to change. > >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_PROD): >> + reg32 = smmu->evtq.prod; >> + vreg_reg32_update(®32, r, info); >> + smmu->evtq.prod = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_CONS): >> + reg32 = smmu->evtq.cons; >> + vreg_reg32_update(®32, r, info); >> + smmu->evtq.cons = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_IRQ_CTRL): >> + reg32 = smmu->irq_ctrl; >> + vreg_reg32_update(®32, r, info); >> + smmu->irq_ctrl = reg32; >> + break; >> + >> + case VREG64(ARM_SMMU_GERROR_IRQ_CFG0): >> + reg = smmu->gerror_irq_cfg0; >> + vreg_reg64_update(®, r, info); >> + smmu->gerror_irq_cfg0 = reg; >> + break; >> + >> + case VREG64(ARM_SMMU_EVTQ_IRQ_CFG0): >> + reg = smmu->evtq_irq_cfg0; >> + vreg_reg64_update(®, r, info); >> + smmu->evtq_irq_cfg0 = reg; >> + break; >> + >> + case VREG32(ARM_SMMU_GERRORN): >> + reg = smmu->gerrorn; >> + vreg_reg64_update(®, r, info); > > this should be vreg_reg32_update > >> + smmu->gerrorn = reg; >> + break; >> + >> + default: >> + printk(XENLOG_G_ERR >> + "%pv: vSMMUv3: unhandled write r%d offset %"PRIpaddr"\n", >> + v, info->dabt.reg, (unsigned long)info->gpa & 0xffff); >> + return IO_ABORT; >> + } >> + >> return IO_HANDLED; >> } >> >> static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> register_t *r, void *priv) >> { >> + struct virt_smmu *smmu = priv; >> + uint64_t reg; >> + >> + switch ( info->gpa & 0xffff ) >> + { >> + case VREG32(ARM_SMMU_IDR0): >> + reg = FIELD_PREP(IDR0_S1P, 1) | FIELD_PREP(IDR0_TTF, 2) | >> + FIELD_PREP(IDR0_COHACC, 0) | FIELD_PREP(IDR0_ASID16, 1) | >> + FIELD_PREP(IDR0_TTENDIAN, 0) | FIELD_PREP(IDR0_STALL_MODEL, 1) | >> + FIELD_PREP(IDR0_ST_LVL, 1) | FIELD_PREP(IDR0_TERM_MODEL, 1); >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IDR1): >> + reg = FIELD_PREP(IDR1_SIDSIZE, SMMU_IDR1_SIDSIZE) | >> + FIELD_PREP(IDR1_CMDQS, SMMU_CMDQS) | >> + FIELD_PREP(IDR1_EVTQS, SMMU_EVTQS); >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IDR2): >> + goto read_reserved; >> + >> + case VREG32(ARM_SMMU_IDR3): >> + reg = FIELD_PREP(IDR3_RIL, 0); >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IDR4): >> + goto read_impl_defined; >> + >> + case VREG32(ARM_SMMU_IDR5): >> + reg = FIELD_PREP(IDR5_GRAN4K, 1) | FIELD_PREP(IDR5_GRAN16K, 1) | >> + FIELD_PREP(IDR5_GRAN64K, 1) | FIELD_PREP(IDR5_OAS, IDR5_OAS_48_BIT); >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IIDR): >> + *r = vreg_reg32_extract(ARM_SMMU_IIDR_VAL, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR0): >> + *r = vreg_reg32_extract(smmu->cr[0], info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR0ACK): >> + *r = vreg_reg32_extract(smmu->cr0ack, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR1): >> + *r = vreg_reg32_extract(smmu->cr[1], info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR2): >> + *r = vreg_reg32_extract(smmu->cr[2], info); >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE): > > this needs to be VREG64 I think > >> + *r = vreg_reg64_extract(smmu->strtab_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE_CFG): >> + *r = vreg_reg32_extract(smmu->strtab_base_cfg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_BASE): > > VREG64 > >> + *r = vreg_reg64_extract(smmu->cmdq.q_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_PROD): >> + *r = vreg_reg32_extract(smmu->cmdq.prod, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_CONS): >> + *r = vreg_reg32_extract(smmu->cmdq.cons, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_BASE): > > VREG64 > >> + *r = vreg_reg64_extract(smmu->evtq.q_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_PROD): >> + *r = vreg_reg32_extract(smmu->evtq.prod, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_CONS): >> + *r = vreg_reg32_extract(smmu->evtq.cons, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IRQ_CTRL): >> + case VREG32(ARM_SMMU_IRQ_CTRLACK): >> + *r = vreg_reg32_extract(smmu->irq_ctrl, info); >> + break; >> + >> + case VREG64(ARM_SMMU_GERROR_IRQ_CFG0): >> + *r = vreg_reg64_extract(smmu->gerror_irq_cfg0, info); >> + break; >> + >> + case VREG64(ARM_SMMU_EVTQ_IRQ_CFG0): >> + *r = vreg_reg64_extract(smmu->evtq_irq_cfg0, info); >> + break; >> + >> + case VREG32(ARM_SMMU_GERROR): >> + *r = vreg_reg64_extract(smmu->gerror, info); > > vreg_reg32_extract > >> + break; >> + >> + case VREG32(ARM_SMMU_GERRORN): >> + *r = vreg_reg64_extract(smmu->gerrorn, info); > > vreg_reg32_extract > Yes, these are all mismatches. I'll fix them in the next revision. >> + break; >> + >> + default: >> + printk(XENLOG_G_ERR >> + "%pv: vSMMUv3: unhandled read r%d offset %"PRIpaddr"\n", >> + v, info->dabt.reg, (unsigned long)info->gpa & 0xffff); >> + return IO_ABORT; >> + } >> + >> + return IO_HANDLED; >> + >> + read_impl_defined: >> + printk(XENLOG_G_DEBUG >> + "%pv: vSMMUv3: RAZ on implementation defined register offset %"PRIpaddr"\n", >> + v, info->gpa & 0xffff); >> + *r = 0; >> + return IO_HANDLED; >> + >> + read_reserved: >> + printk(XENLOG_G_DEBUG >> + "%pv: vSMMUv3: RAZ on reserved register offset %"PRIpaddr"\n", >> + v, info->gpa & 0xffff); >> + *r = 0; >> return IO_HANDLED; >> } > > Cheers, > Luca > BR, Milan From xen-devel-bounces@lists.xenproject.org Mon May 18 00:17:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 00:17:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311379.1581533 (Exim 4.92) (envelope-from ) id 1wOlfg-0002Qt-SO; Mon, 18 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=?utf-8?B?aHhFQ2FNOVZFeGRMd1pHWHlUaVF4Sk5sVUlncW5OcWoxUXVqTWhnZz09?= X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-Network-Message-Id: f95340a8-03d7-4680-0383-08deb472d43c X-MS-Exchange-CrossTenant-AuthSource: AS2PR03MB9587.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 00:17:21.4063 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ZbHputbP4OTs0Flaa/fMIKc3+k3u3K0MmPIbPHvwVfVL3WdN2Hf6B/fY39NAGhNBTN4MjaIB55EQqc5xnJVaBQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR03MB8174 X-purgate-ID: tlsNG-4011c0/1779063442-70F618B7-760BD7E7/0/0 X-purgate-type: clean X-purgate-size: 19399 Hi Julien, On 4/14/26 10:10, Julien Grall wrote: > Hi Milan, > > On 31/03/2026 10:52, Milan Djokic wrote: >> From: Rahul Singh >> >> Add initial support for various emulated registers for virtual SMMUv3 >> for guests and also add support for virtual cmdq and eventq. >> >> Signed-off-by: Rahul Singh >> Signed-off-by: Milan Djokic >> --- >> xen/drivers/passthrough/arm/smmu-v3.h | 6 + >> xen/drivers/passthrough/arm/vsmmu-v3.c | 286 +++++++++++++++++++++++++ >> 2 files changed, 292 insertions(+) >> >> diff --git a/xen/drivers/passthrough/arm/smmu-v3.h b/xen/drivers/passthrough/arm/smmu-v3.h >> index 3fb13b7e21..fab4fd5a26 100644 >> --- a/xen/drivers/passthrough/arm/smmu-v3.h >> +++ b/xen/drivers/passthrough/arm/smmu-v3.h >> @@ -60,6 +60,12 @@ >> #define IDR5_VAX GENMASK(11, 10) >> #define IDR5_VAX_52_BIT 1 >> >> +#define ARM_SMMU_IIDR 0x18 >> +#define IIDR_PRODUCTID GENMASK(31, 20) >> +#define IIDR_VARIANT GENMASK(19, 16) >> +#define IIDR_REVISION GENMASK(15, 12) >> +#define IIDR_IMPLEMENTER GENMASK(11, 0) >> + >> #define ARM_SMMU_CR0 0x20 >> #define CR0_ATSCHK (1 << 4) >> #define CR0_CMDQEN (1 << 3) >> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/passthrough/arm/vsmmu-v3.c >> index e36f200ba5..3ae1e62a50 100644 >> --- a/xen/drivers/passthrough/arm/vsmmu-v3.c >> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >> @@ -3,25 +3,307 @@ >> #include >> #include >> #include >> +#include > > vgic-emul.h is intended to only be used in the vGIC code. I am fine if > you want to use it in vsmmu-v3.c but it needs to be renamed. Maybe to > vdev-emul.h. > Sure, I'll rename it >> #include >> +#include >> + >> +#include "smmu-v3.h" >> + >> +/* Register Definition */ >> +#define ARM_SMMU_IDR2 0x8 >> +#define ARM_SMMU_IDR3 0xc >> +#define ARM_SMMU_IDR4 0x10 >> +#define IDR0_TERM_MODEL (1 << 26) >> +#define IDR3_RIL (1 << 10) >> +#define CR0_RESERVED 0xFFFFFC20 > > AFAIU, this is covering all the bits defined by the SMMU spec. But some > of them are optional. Does this mean we will expose those optional features? > Right now only mandatory features are supported (SMMU_EN, CMDQ, EVTQ). Most of the optional features are not advertised in the IDR registers, so guests are not expected to enable or use them via CR0. >> +#define SMMU_IDR1_SIDSIZE 16 >> +#define SMMU_CMDQS 19 > > Can you add some details how you decided the size of the command and ... > >> +#define SMMU_EVTQS 19 > > ... even queues? > The CMDQ/EVTQ sizes are currently set to the architectural maximum. Since there is no direct dependency on the underlying hardware queue sizes, using the maximum supported value seemed like the simplest option. >> +#define DWORDS_BYTES 8 >> +#define ARM_SMMU_IIDR_VAL 0x12 > > I am not sure which implementer this is referring to. But how do you > plan to handle errata? Are we sure they can always be handled by Xen? > This is currently a dummy value used to avoid triggering guest driver errata/quirk paths. I will replace it with a more meaningful value. Using the Arm implementer ID with the remaining fields cleared should be sufficient. My expectation is that errata handling should remain in Xen rather than the guest. Exposing real implementer/product IDs could cause the guest driver to enable errata workarounds that may not apply correctly due to the vSMMU emulation layer. For the current implementation this seems sufficient, although there might be some updates in the future in this regard. >> >> /* Struct to hold the vIOMMU ops and vIOMMU type */ >> extern const struct viommu_desc __read_mostly *cur_viommu; >> >> +/* virtual smmu queue */ >> +struct arm_vsmmu_queue { >> + uint64_t q_base; /* base register */ >> + uint32_t prod; >> + uint32_t cons; >> + uint8_t ent_size; >> + uint8_t max_n_shift; >> +}; >> + >> struct virt_smmu { >> struct domain *d; >> struct list_head viommu_list; >> + uint8_t sid_split; >> + uint32_t features; >> + uint32_t cr[3]; >> + uint32_t cr0ack; >> + uint32_t gerror; >> + uint32_t gerrorn; >> + uint32_t strtab_base_cfg; >> + uint64_t strtab_base; >> + uint32_t irq_ctrl; >> + uint64_t gerror_irq_cfg0; >> + uint64_t evtq_irq_cfg0; >> + struct arm_vsmmu_queue evtq, cmdq; >> }; >> >> static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >> register_t r, void *priv) >> { >> + struct virt_smmu *smmu = priv; >> + uint64_t reg; >> + uint32_t reg32; > > Looking at this helper and the read one, I am bit surprised there is no > lock taken nor we check the access size. Can you explain why? > > For instance, we should not allow 64-bit access on 32-bit register. The > rest of the size (8-bit and 16-bit) is IMP DEFINED so it may be easier > just not allow them. > Most of the configuration registers are expected to be accessed in a serialized manner by the guest driver, during driver initialization. So I think that only queue and error reporting registers should be protected. Only command queue handling is protected currently. I will do the same for the event queue and gerror, this is missing. As for the access size checks, yes, this needs to be implemented. I will add it. >> + >> + switch ( info->gpa & 0xffff ) >> + { >> + case VREG32(ARM_SMMU_CR0): > > + reg32 = smmu->cr[0];> + vreg_reg32_update(®32, r, > info); >> + smmu->cr[0] = reg32; >> + smmu->cr0ack = reg32 & ~CR0_RESERVED; >> + break; >> + >> + case VREG32(ARM_SMMU_CR1): >> + reg32 = smmu->cr[1]; >> + vreg_reg32_update(®32, r, info); >> + smmu->cr[1] = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_CR2): >> + reg32 = smmu->cr[2]; >> + vreg_reg32_update(®32, r, info); >> + smmu->cr[2] = reg32; >> + break; >> + >> + case VREG64(ARM_SMMU_STRTAB_BASE): > > Looking at the SMMU spec (6.3.24 in ARM IHI 0070 H.a), the behavior of > writing to the register is constrained unpredictable before SMMUv3.2, > but after it should be ignored if SMMU_CR0.SMMUEN == 1. > > So this implementation would not be valid for SMMUv3.2 and later. For > convenience it would be best to just ignore the write (which is also > valid for SMMUv3.1 and ealier). > >> + reg = smmu->strtab_base; >> + vreg_reg64_update(®, r, info); >> + smmu->strtab_base = reg; >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE_CFG): > > Similar to above, there are some conditions when this field can be > written (see 6.3.25). > Yes, both writes should be guarded by SMMU_CR0.SMMUEN. I will add this. >> + reg32 = smmu->strtab_base_cfg; >> + vreg_reg32_update(®32, r, info); >> + smmu->strtab_base_cfg = reg32; >> + >> + smmu->sid_split = FIELD_GET(STRTAB_BASE_CFG_SPLIT, reg32); > > The information for sid_split is already stored in > ``smmu->strtab_base_cfg``. So why do we need to store it differently? > No specific need for a separate structure field, I will remove it and extract the SID split from ``smmu->strtab_base_cfg`` >> + smmu->features |= STRTAB_BASE_CFG_FMT_2LVL; > > I haven't checked the rest of the code yet. But from the name, I would > assume it indicates whether 2-level stream table is supported. From my > understanding of the specification, this is selectable by the guest OS. > So why is this unconditionally set? > I think this is a leftover from the initial implementation where the value was hardcoded. I will fix this and derive the field from the guest-provided configuration instead. >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_BASE): > > Similar to above, there are some condition when this field is RO. > >> + reg = smmu->cmdq.q_base; >> + vreg_reg64_update(®, r, info); >> + smmu->cmdq.q_base = reg; >> + smmu->cmdq.max_n_shift = FIELD_GET(Q_BASE_LOG2SIZE, smmu->cmdq.q_base); >> + if ( smmu->cmdq.max_n_shift > SMMU_CMDQS ) >> + smmu->cmdq.max_n_shift = SMMU_CMDQS; >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_PROD): >> + reg32 = smmu->cmdq.prod; >> + vreg_reg32_update(®32, r, info); >> + smmu->cmdq.prod = reg32; > > AFAIU, this implementation is not yet complete. If so, it would be good > to mark it as such with a comment of BUG_ON("Not yet implemented"). Same > for everywhere in this file and the rest of the series. > >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_CONS): >> + reg32 = smmu->cmdq.cons; >> + vreg_reg32_update(®32, r, info); >> + smmu->cmdq.cons = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_BASE): >> + reg = smmu->evtq.q_base; >> + vreg_reg64_update(®, r, info); >> + smmu->evtq.q_base = reg; >> + smmu->evtq.max_n_shift = FIELD_GET(Q_BASE_LOG2SIZE, smmu->evtq.q_base); >> + if ( smmu->cmdq.max_n_shift > SMMU_EVTQS ) >> + smmu->cmdq.max_n_shift = SMMU_EVTQS; >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_PROD): >> + reg32 = smmu->evtq.prod; >> + vreg_reg32_update(®32, r, info); >> + smmu->evtq.prod = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_CONS): >> + reg32 = smmu->evtq.cons; >> + vreg_reg32_update(®32, r, info); >> + smmu->evtq.cons = reg32; >> + break; >> + >> + case VREG32(ARM_SMMU_IRQ_CTRL): >> + reg32 = smmu->irq_ctrl; >> + vreg_reg32_update(®32, r, info); >> + smmu->irq_ctrl = reg32; >> + break; >> + >> + case VREG64(ARM_SMMU_GERROR_IRQ_CFG0): >> + reg = smmu->gerror_irq_cfg0; >> + vreg_reg64_update(®, r, info); >> + smmu->gerror_irq_cfg0 = reg; >> + break; >> + >> + case VREG64(ARM_SMMU_EVTQ_IRQ_CFG0): >> + reg = smmu->evtq_irq_cfg0; >> + vreg_reg64_update(®, r, info); >> + smmu->evtq_irq_cfg0 = reg; >> + break; >> + >> + case VREG32(ARM_SMMU_GERRORN): >> + reg = smmu->gerrorn; >> + vreg_reg64_update(®, r, info); >> + smmu->gerrorn = reg; >> + break; >> + >> + default: >> + printk(XENLOG_G_ERR >> + "%pv: vSMMUv3: unhandled write r%d offset %"PRIpaddr"\n", > > NIT: The vIOMMU is per-domain so it is sufficient to print "%pd". > >> + v, info->dabt.reg, (unsigned long)info->gpa & 0xffff); >> + return IO_ABORT; > > Per section 6 of the SMMU: > > " > For all pages except Page 1, undefined register locations are RES0. For > Page 1, access to undefined/Reserved > register locations is CONSTRAINED UNPREDICTABLE and an implementation > has one of the following behaviors: > [...] > " > > Here you seem to implement page0 so the default case should be write > ignore and therefore IO_HANDLED should be returned. BTW, you don't seem > to handle page1. Is this going to be handled later on? > From page1, right now only EVTQ registers are emulated. PRI is not supported, but might be needed in the future for the PCI support (PRI queue registers also belong to page1, but not emulated atm) So I think that page1 will be handled when PCI support is completed. >> + } >> + >> return IO_HANDLED; >> } >> >> static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >> register_t *r, void *priv) >> { >> + struct virt_smmu *smmu = priv; >> + uint64_t reg; >> + >> + switch ( info->gpa & 0xffff ) >> + { >> + case VREG32(ARM_SMMU_IDR0): >> + reg = FIELD_PREP(IDR0_S1P, 1) | FIELD_PREP(IDR0_TTF, 2) | > > As the page-table will be used by the HW, shouldn't TTF reflect what the > HW supports? This would allow the vIOMMU to work for 32-bit domains. > If my understanding is correct, Xen SMMU driver only supports AArch64 table format, so I think that we can't advertise 32-bit table format in the emulation layer even if the hardware supports it. >> + FIELD_PREP(IDR0_COHACC, 0) | FIELD_PREP(IDR0_ASID16, 1) | > > Here you set COHACC to 0 which means the guest OS will have to clean the > cache every time. This is safe everywhere, but it will have an impact on > performance. I am not asking to allow COHACC when the HW supports it, > but I think a TODO would be worth. > Sure, I will add comments for this. > For ASID16, shouldn't the value be based on the HW? > Yes, this is wrong since it could advertise it when not supported. I'll update this. > As an aside, I guess we don't allow BTM because we only expose a single > vSMMU? > Yes, since only a single instance is exposed, BTM support does not make much sense. >> + FIELD_PREP(IDR0_TTENDIAN, 0) | FIELD_PREP(IDR0_STALL_MODEL, 1) | > > For TTENDIAN, it is the same as above. > > For STALL_MODEL, I think 1 is ok. > >> + FIELD_PREP(IDR0_ST_LVL, 1) | FIELD_PREP(IDR0_TERM_MODEL, 1); > > Overall, it feels the value set in IDR0 and IDR1 (below) needs some comment. > >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IDR1): >> + reg = FIELD_PREP(IDR1_SIDSIZE, SMMU_IDR1_SIDSIZE) | >> + FIELD_PREP(IDR1_CMDQS, SMMU_CMDQS) | >> + FIELD_PREP(IDR1_EVTQS, SMMU_EVTQS); >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IDR2): >> + goto read_reserved; >> + >> + case VREG32(ARM_SMMU_IDR3): >> + reg = FIELD_PREP(IDR3_RIL, 0); > > I am not sure why we explicitely need to set RIL but not the other fields? > This is not necessary. I will update this with the regsiter cleared to 0 only. > > + *r = vreg_reg32_extract(reg, info);> + break; >> + >> + case VREG32(ARM_SMMU_IDR4): >> + goto read_impl_defined; >> + >> + case VREG32(ARM_SMMU_IDR5): >> + reg = FIELD_PREP(IDR5_GRAN4K, 1) | FIELD_PREP(IDR5_GRAN16K, 1) | >> + FIELD_PREP(IDR5_GRAN64K, 1) | FIELD_PREP(IDR5_OAS, IDR5_OAS_48_BIT); > > Similar to the other fields in IDR0, isn't this based on what the HW > supports? > Yes, this definitely needs to reflect the underlying hardware support. I'll update it. To summarize for the IDR registers, the intention was to preset the capabilities to a common configuration matching the features currently supported by the emulation layer. I will revisit the hardcoded fields and derive the values from the underlying hardware where appropriate. Thank you for the comments and insights on this. >> + *r = vreg_reg32_extract(reg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IIDR): >> + *r = vreg_reg32_extract(ARM_SMMU_IIDR_VAL, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR0): >> + *r = vreg_reg32_extract(smmu->cr[0], info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR0ACK): >> + *r = vreg_reg32_extract(smmu->cr0ack, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR1): >> + *r = vreg_reg32_extract(smmu->cr[1], info); >> + break; >> + >> + case VREG32(ARM_SMMU_CR2): >> + *r = vreg_reg32_extract(smmu->cr[2], info); >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE): >> + *r = vreg_reg64_extract(smmu->strtab_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_STRTAB_BASE_CFG): >> + *r = vreg_reg32_extract(smmu->strtab_base_cfg, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_BASE): >> + *r = vreg_reg64_extract(smmu->cmdq.q_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_PROD): >> + *r = vreg_reg32_extract(smmu->cmdq.prod, info); >> + break; >> + >> + case VREG32(ARM_SMMU_CMDQ_CONS): >> + *r = vreg_reg32_extract(smmu->cmdq.cons, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_BASE): >> + *r = vreg_reg64_extract(smmu->evtq.q_base, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_PROD): >> + *r = vreg_reg32_extract(smmu->evtq.prod, info); >> + break; >> + >> + case VREG32(ARM_SMMU_EVTQ_CONS): >> + *r = vreg_reg32_extract(smmu->evtq.cons, info); >> + break; >> + >> + case VREG32(ARM_SMMU_IRQ_CTRL): >> + case VREG32(ARM_SMMU_IRQ_CTRLACK): >> + *r = vreg_reg32_extract(smmu->irq_ctrl, info); >> + break; >> + >> + case VREG64(ARM_SMMU_GERROR_IRQ_CFG0): >> + *r = vreg_reg64_extract(smmu->gerror_irq_cfg0, info); >> + break; >> + >> + case VREG64(ARM_SMMU_EVTQ_IRQ_CFG0): >> + *r = vreg_reg64_extract(smmu->evtq_irq_cfg0, info); >> + break; >> + >> + case VREG32(ARM_SMMU_GERROR): >> + *r = vreg_reg64_extract(smmu->gerror, info); >> + break; >> + >> + case VREG32(ARM_SMMU_GERRORN): >> + *r = vreg_reg64_extract(smmu->gerrorn, info); >> + break; >> + >> + default: >> + printk(XENLOG_G_ERR >> + "%pv: vSMMUv3: unhandled read r%d offset %"PRIpaddr"\n", >> + v, info->dabt.reg, (unsigned long)info->gpa & 0xffff); >> + return IO_ABORT; >> + } >> + >> + return IO_HANDLED; >> + >> + read_impl_defined: >> + printk(XENLOG_G_DEBUG >> + "%pv: vSMMUv3: RAZ on implementation defined register offset %"PRIpaddr"\n", >> + v, info->gpa & 0xffff); >> + *r = 0; >> + return IO_HANDLED; >> + >> + read_reserved: >> + printk(XENLOG_G_DEBUG >> + "%pv: vSMMUv3: RAZ on reserved register offset %"PRIpaddr"\n", >> + v, info->gpa & 0xffff); >> + *r = 0; >> return IO_HANDLED; >> } >> >> @@ -39,6 +321,10 @@ static int vsmmuv3_init_single(struct domain *d, paddr_t addr, paddr_t size) >> return -ENOMEM; >> >> smmu->d = d; >> + smmu->cmdq.q_base = FIELD_PREP(Q_BASE_LOG2SIZE, SMMU_CMDQS); >> + smmu->cmdq.ent_size = CMDQ_ENT_DWORDS * DWORDS_BYTES; >> + smmu->evtq.q_base = FIELD_PREP(Q_BASE_LOG2SIZE, SMMU_EVTQS); >> + smmu->evtq.ent_size = EVTQ_ENT_DWORDS * DWORDS_BYTES; > > I understand why we initialize ent_size. But I am not sure to understand > why we need to initialize q_base. Can you clarify? > Actually there's no need to initialize q_base fields, these will be set during configuration. I will remove this. >> >> register_mmio_handler(d, &vsmmuv3_mmio_handler, addr, size, smmu); >> > > Cheers, > Best regards, Milan From xen-devel-bounces@lists.xenproject.org Mon May 18 04:40:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 04:40:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311417.1581542 (Exim 4.92) (envelope-from ) id 1wOpmJ-0002qT-QE; Mon, 18 May 2026 04:40:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311417.1581542; Mon, 18 May 2026 04:40:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOpmJ-0002qL-MG; Mon, 18 May 2026 04:40:31 +0000 Received: by outflank-mailman (input) for mailman id 1311417; Mon, 18 May 2026 04:40:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOpmH-0002qF-AI for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <771c8c64-2743-4a49-bd11-55fb6feec2ba@amd.com> Date: Mon, 18 May 2026 06:40:19 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: gic-v3: Wait for redistributor RWP using the right bit To: Mykola Kvach , CC: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Luca Fancellu References: <0fc5e4d297b8dde66ea36be3ebd60a68dea2562d.1778749474.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0fc5e4d297b8dde66ea36be3ebd60a68dea2562d.1778749474.git.mykola_kvach@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000075F0:EE_|BL4PR12MB9723:EE_ X-MS-Office365-Filtering-Correlation-Id: 8d97f8db-e986-4562-406c-08deb4979369 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|36860700016|13003099007|56012099003|18002099003|11063799003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: yDy8X+QK3lP0tu0OWUEHRwMoHNwJkqkoI+JNVS7MDPbKql/MtToDPphOqqRyztGQgxPUwPeq/DQYeAnIIqN2OABtD57qa7ZJn1InOM5EDGq0dHfMdTrhsabrL2GNvrtPcoOX0tjGAj7SSWIL+XO/STjX49RtRNeI9ZAKeIb+9DNH0/KLIEdIknc8Kz4SaosAd0F+taJ4MNlzFN+FS8LKbt2JaWh9bNoFPJ50ucpIXLWjnllXB2XDLDhTQVVONXHlTGv4hu+YX7hrZ+UolCwIkGZD5am3BZCji/2KPWZaqDDcVRuaqicGtOWx6AFc64zbixsqNKyLSa7ad4/GbU8B8bmr0RjhMILFJ1l4Wx7nzk2eZr5RZCVYBWpSYjFImEGEw+YiQgnp/v3qwe0PLkd1R1owhNoRLfax8edTFolyCSyNXni3EJ637OVz42UoNaYe X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 04:40:23.8085 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8d97f8db-e986-4562-406c-08deb4979369 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000075F0.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL4PR12MB9723 X-purgate-ID: tlsNG-720697/1779079228-81B70161-6648E6E8/0/0 X-purgate-type: clean X-purgate-size: 1171 On 14-May-26 11:08, Mykola Kvach wrote: > From: Mykola Kvach > > gicv3_do_wait_for_rwp() is used for both distributor and > redistributor writes. The CTLR register is at offset 0 for both, > but the RWP bit is not in the same position. > > For GICD_CTLR, RWP is bit 31. For GICR_CTLR, bit 31 is UWP, > while RWP is bit 3. The redistributor wait path was therefore > polling UWP instead of RWP. > > UWP covers upstream writes, including Generate SGI packets, and is > not a substitute for redistributor register write completion. The > existing redistributor callers need RWP semantics for redistributor > register writes such as GICR_ICENABLER0 and GICR_CTLR updates. > > Add GICR_CTLR_RWP and pass the expected RWP bit to the shared > helper. > > Fixes: bc183a0235e ("xen/arm: Add support for GIC v3") > Reported-by: Luca Fancellu > Signed-off-by: Mykola Kvach Good, now it matches what Linux did a few years ago: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=0df6664 Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 18 04:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 04:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311424.1581551 (Exim 4.92) (envelope-from ) id 1wOppP-0003Pe-At; Mon, 18 May 2026 04:43:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311424.1581551; Mon, 18 May 2026 04:43:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOppP-0003PX-7e; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: RMmWtHv2/Zk1SMPAVTIcUQ8iTgEfbokafRgi6cFs+oJVS61Lcd7TH5My8f6P3atwcy/O9f79OcQ37ibia8wKrlH96Q1WYfJFE/3g+GrppPe04uYT45/PgS4HRIj7Qjj01NAjIR6HcNILvsu0Qmpn25gUCtBbtRqCj0Bozp8ozuZpNvqEnDBHRmTD19sm147KyrvDAqz7oVHTrPLdTGfKk8/wilmcBdOWkj2Cm1d7irrmcAdKHXwYYEruepaWsZ8Z/0VMAkqr5TDN8QcE/q2pK5juO1OBuUJ79y6E7zr6o4CooX+6B62VH5nNjDfdFpRiot2pP34PdE7pp9T+3lQLIc9r9LzCCQnsRgbCct7d+Csv7kLKS3388cJDAGmovyj+bi8fjgWMHikIOOFEnmN0URytcY7Hyf3A7AelX9FSuTD6SiD5XgyERyDauq1X85E5 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 04:43:35.2128 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9faa458d-8a73-4008-8eec-08deb4980578 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE36.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB6581 X-purgate-ID: tlsNG-16d1c6/1779079421-84767D75-DA9A6CCC/0/0 X-purgate-type: clean X-purgate-size: 782 On 15-May-26 11:40, Mykola Kvach wrote: > From: Mykola Kvach > > GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding. > Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner > Non-cacheable) describe non-cacheable accesses to the command queue. > > its_map_cbaser() only checked whether the shifted field was zero, > so an ITS that reports Normal Inner Non-cacheable would not set > HOST_ITS_FLUSH_CMD_QUEUE. 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Sun, 17 May 2026 12:44:58 -0700 (PDT) From: =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= Subject: [PATCH] arm64/mmu: Fix PT_PT table descriptor value and comment Date: Sun, 17 May 2026 21:44:43 +0200 Message-ID: <20260517194443.59134-1-gabi.qs.mail@gmail.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779047098-7C8788B7-2F081F06/0/0 X-purgate-type: clean X-purgate-size: 1746 PT_PT is used to create table descriptors in create_table_entry_from_paddr. The previous value (0xf7f) and comment incorrectly included attribute fields (nG, SH, AP, NS, ATTR) that only exist in block/page descriptors, not in table descriptors. Per the ARMv8-A Architecture Reference Manual (DDI0487, Section D8.3.1), table descriptors only define: - Bits [63:12]: Next-level table address - Bit [11]: Ignored - Bit [10]: AF (Access Flag, ARMv8.1+) - Bits [9:2]: Ignored or reserved for extensions - Bit [1]: Descriptor type (1 = Table) - Bit [0]: Valid bit (1 = Valid) Update to 0x743 with only the relevant bits set: - Bit [10]: AF (Access Flag, ARMv8.1+) - Bits [9:8]: Reserved/extension bits - Bit [6]: SKL (ARMv9) - Bits [5:2]: Cleared (ignored by hardware) - Bit [1]: Table descriptor type - Bit [0]: Valid Compile-tested and boot-tested in QEMU ARM64 (virt machine, cortex-a57). Signed-off-by: Gabriel Quintáns Souto --- xen/arch/arm/arm64/mmu/head.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/arm64/mmu/head.S b/xen/arch/arm/arm64/mmu/head.S index d14780ad19..c3cb262e88 100644 --- a/xen/arch/arm/arm64/mmu/head.S +++ b/xen/arch/arm/arm64/mmu/head.S @@ -8,7 +8,7 @@ #include #include -#define PT_PT 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ +#define PT_PT 0x743 /* AF=1 RES=11 SKL=1 IGN=0000 T=1 P=1 */ #define PT_MEM 0xf7d /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=0 P=1 */ #define PT_MEM_L3 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ #define PT_DEV 0xe71 /* nG=1 AF=1 SH=10 AP=01 NS=1 ATTR=100 T=0 P=1 */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 05:12:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 05:12:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311445.1581569 (Exim 4.92) (envelope-from ) id 1wOqHK-0000Ct-MR; Mon, 18 May 2026 05:12:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311445.1581569; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: xyy0fbfAG5EqoF/3y14X+RXi9A/rCDL7VoWBS7UCb+nLzD3CrlACyEPH5qBGNPHq9AtRAhgJY8i2sf504ELHf3vNfqWLwuT3IsOgc+QjAkv5Vw/ymvePngaCfvucP+aoT4aNWXKzsE6tMwdJKuigdDiTEI/IF2SaNaqMqHiGUtPZkm6tpX4P1ipXc+8THYxYSazqONwb+SWATjpk9r8p1SUI03jqtPcK3wV6FcSfGO5eZ/xSkwFZBnoE9uwXWYiVj3Y86+yNQNuNvgASLqRttNLAINrky2ql9eJSLzJGkKraoybO3oqFwqORqB+evJwEKZMSmJWMEle3Kee++vfKJioshYYwApItce+Ve5gz0aLrGBrIu1YXptvaWUcNIEa5BBHvkDJ6fROmJ56SPeA+0kSlDH6ZoV654Xqv0JuWKcO63ge6w6C7pvgWM8pkd9Ke X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 05:12:23.8459 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48917d7f-47e0-4f31-1469-08deb49c0bca X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B36E.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY3PR12MB9703 X-purgate-ID: tlsNG-42698a/1779081151-19D6FF3B-C18C3A41/0/0 X-purgate-type: clean X-purgate-size: 2286 On 17-May-26 21:44, Gabriel Quintáns Souto wrote: > PT_PT is used to create table descriptors in create_table_entry_from_paddr. > The previous value (0xf7f) and comment incorrectly included attribute fields > (nG, SH, AP, NS, ATTR) that only exist in block/page descriptors, not in > table descriptors. > > Per the ARMv8-A Architecture Reference Manual (DDI0487, Section D8.3.1), > table descriptors only define: > - Bits [63:12]: Next-level table address > - Bit [11]: Ignored > - Bit [10]: AF (Access Flag, ARMv8.1+) > - Bits [9:2]: Ignored or reserved for extensions > - Bit [1]: Descriptor type (1 = Table) > - Bit [0]: Valid bit (1 = Valid) > > Update to 0x743 with only the relevant bits set: > - Bit [10]: AF (Access Flag, ARMv8.1+) > - Bits [9:8]: Reserved/extension bits > - Bit [6]: SKL (ARMv9) > - Bits [5:2]: Cleared (ignored by hardware) > - Bit [1]: Table descriptor type > - Bit [0]: Valid > > Compile-tested and boot-tested in QEMU ARM64 (virt machine, cortex-a57). > > Signed-off-by: Gabriel Quintáns Souto > --- > xen/arch/arm/arm64/mmu/head.S | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/arm64/mmu/head.S b/xen/arch/arm/arm64/mmu/head.S > index d14780ad19..c3cb262e88 100644 > --- a/xen/arch/arm/arm64/mmu/head.S > +++ b/xen/arch/arm/arm64/mmu/head.S > @@ -8,7 +8,7 @@ > #include > #include > > -#define PT_PT 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ > +#define PT_PT 0x743 /* AF=1 RES=11 SKL=1 IGN=0000 T=1 P=1 */ Looking at ARMv8A ARM M.a, figure D8-12 bits [11:2] of a VMSAv8-64 table descriptor are IGNORED by hardware (see xen/arch/arm/include/asm/lpae.h as well). The change therefore has no functional effect on ARMv8-A hardware Xen runs on. The arm32 head.S has the identical misleading definition and comment; the ARMv7 LPAE table-descriptor format shares the "ignored in table entries" property. After this patch the two siblings diverge. Update arm32 to match, or leave both alone. If the goal is "only relevant bits set", the minimum is 0x3 (T=1 P=1). 0x403 if you want AF as future-proofing for FEAT_HAFT (ARMv9 I believe). ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 18 05:42:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 05:42:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311458.1581578 (Exim 4.92) (envelope-from ) id 1wOqkL-0004Un-TC; Mon, 18 May 2026 05:42:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311458.1581578; Mon, 18 May 2026 05:42:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOqkL-0004Ug-QI; Mon, 18 May 2026 05:42:33 +0000 Received: by outflank-mailman (input) for mailman id 1311458; Mon, 18 May 2026 05:42:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOqkK-0004UY-43 for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <7f5c613a-33f6-481f-b3f3-d627833a461e@amd.com> Date: Mon, 18 May 2026 07:42:20 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] xen/common: llc-coloring: clear color count on parse failure To: Mykola Kvach , CC: Mykola Kvach , Andrew Cooper , Anthony PERARD , "Jan Beulich" , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A3:EE_|CH3PR12MB9099:EE_ X-MS-Office365-Filtering-Correlation-Id: 359ac5b5-1c48-409e-687e-08deb4a03c91 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|1800799024|4143699003|11063799003|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5fdViT7kNeKzesb0QTdBdYa2YWeEDaCivev3Z80JcjnrAnBxeyOCaLxDsR5oj2f/UwxqWlDRzSE880VZcj5mOjVR5S15J7XrrO4ApzvqYhYZ8N9dQYjobbKu0RxxMrnZUe7f+vDpRjMxuDTYhXcKgnpjRf/kSEvgNMM8ygSxT/2b102ckR/e4MPl+Y6WosZvMncJdFP63wNIT1nKB0m7ybVi/Kavp6CDKZe+tZhOps9NEXA6qqsBL89dCqSqsHY5MAqQZz0kZWgwDSeTIngsChY1LcJieJ9aXU2bWtY8Xk0deYsglOTpMzqzumpKZ5TVUgM/pnbZJt1IjCqa6q2FRBRM0oVncMEgCKzwLVZMAZObADl4zZFq6K58NipFokVgM28uJzUvAN/Tf/FqagBkeUNPdDNIz+ZNPv4/YdCJ0mQKzieKFJO6OQGfv60W6o0S X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 05:42:23.6701 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 359ac5b5-1c48-409e-687e-08deb4a03c91 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A3.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9099 X-purgate-ID: tlsNG-c201ff/1779082950-D8B78443-3C2496B7/0/0 X-purgate-type: clean X-purgate-size: 756 On 16-May-26 17:03, Mykola Kvach wrote: > From: Mykola Kvach > > parse_color_config() updates the caller-provided color count while > parsing. If parsing later fails, leave the count at zero so callers > do not consume a partially parsed configuration. I would also add for clarity: The bug is reachable in practice: cmdline_parse() ignores the -EINVAL from a custom_param callback, so boot continues with the partial xen_num_colors / dom0_num_colors that llc_coloring_init() and dom0_set_llc_colors() then consume. > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 18 06:07:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 06:07:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311472.1581586 (Exim 4.92) (envelope-from ) id 1wOr8a-0007mr-Rz; Mon, 18 May 2026 06:07:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311472.1581586; Mon, 18 May 2026 06:07:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOr8a-0007mk-PP; Mon, 18 May 2026 06:07:36 +0000 Received: by outflank-mailman (input) for mailman id 1311472; Mon, 18 May 2026 06:07:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOr8Z-0007mY-9Y for xen-devel@lists.xenproject.org; Mon, 18 May 2026 06:07:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOr8Y-004X7Y-IH for xen-devel@lists.xenproject.org; Mon, 18 May 2026 08:07:34 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0aac8b-2eae-0a2a0a5409dd-0a2a4509bb26-44 for ; Mon, 18 May 2026 08:07:34 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0aaca6-2497-0a2a45090019-d155802ab8f5-3 for ; Mon, 18 May 2026 08:07:34 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so21614215e9.2 for ; Sun, 17 May 2026 23:07:34 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Sun, 17 May 2026 23:07:33 -0700 (PDT) Message-ID: <9e5b4c6a-308b-4d4b-8383-dffcffab6f58@suse.com> Date: Mon, 18 May 2026 08:07:33 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2 7/8] x86/mwait-idle: Add cmdline option to adjust C-states table To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <178739fe-fa41-4ff7-b16e-67c4b2a99b38@suse.com> <8c46fedd-f1f3-4cad-91fb-1b3b8d58db50@suse.com> <5fdd68ea-a413-4f8e-a50a-b0d7d821e904@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779084454-8A589A53-AB34A9D1/0/0 X-purgate-type: clean X-purgate-size: 6825 On 15.05.2026 09:59, Roger Pau Monné wrote: > On Fri, May 15, 2026 at 08:57:45AM +0200, Jan Beulich wrote: >> On 14.05.2026 17:18, Roger Pau Monné wrote: >>> On Tue, May 12, 2026 at 05:38:08PM +0200, Jan Beulich wrote: >>>> From: Artem Bityutskiy >>>> >>>> Add a new module parameter that allows adjusting the C-states table used by >>>> the driver. >>>> >>>> Currently, the C-states table is hardcoded in the driver based on the CPU >>>> model. The goal is to have good enough defaults for most users. >>>> >>>> However, C-state characteristics, such as exit latency and residency, can >>>> vary between different variants of the same CPU model and BIOS settings. >>>> Moreover, different platform usage models and user preferences may benefit >>>> from different C-state target_residency values. >>>> >>>> Provide a way for users to adjust the C-states table via a module parameter >>>> "table". The general format is: >>>> "state1:latency1:target_residency1,state2:latency2:target_residency2,..." >>>> >>>> In other words, represent each C-state by its name, exit latency (in >>>> microseconds), and target residency (in microseconds), separated by colons. >>>> Separate multiple C-states by commas. >>>> >>>> For example, suppose a CPU has 3 C-states with the following >>>> characteristics: >>>> C1: exit_latency=1, target_residency=2 >>>> C1E: exit_latency=10, target_residency=10 >>>> C6: exit_latency=100, target_residency=500 >>>> >>>> Users can specify a custom C-states table as follows: >>>> >>>> 1. intel_idle.table="C1:2:2,C1E:5:20,C6:150:600" >>>> Result: C1: exit_latency=2, target_residency=2 >>>> C1E: exit_latency=5, target_residency=20 >>>> C6: exit_latency=150, target_residency=600 >>>> 2. intel_idle.table="C6::400" >>>> Result: C1: exit_latency=1, target_residency=2 (unchanged) >>>> C1E: exit_latency=10, target_residency=10 (unchanged) >>>> C6: exit_latency=100, target_residency=400 >>>> (only target_residency changed) >>>> >>>> Signed-off-by: Artem Bityutskiy >>>> Link: https://patch.msgid.link/20251216080402.156988-3-dedekind1@gmail.com >>>> Signed-off-by: Rafael J. Wysocki >>>> Origin: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git 111f77a23348 >>>> >>>> Add __init to get_cmdline_field(). Put cmdline_table_str[] in .init.data. >>>> Other adjustments to fit our env. >>>> >>>> Signed-off-by: Jan Beulich >>> >>> Acked-by: Roger Pau Monné >> >> Thanks. >> >>>> +/** >>>> + * cmdline_table_adjust - Adjust the C-states table with data from cmdline. >>>> + * >>>> + * Adjust the C-states table with data from the 'mwait-idle.table' parameter >>>> + * (if specified). >>>> + */ >>>> +static void __init cmdline_table_adjust(void) >>>> +{ >>>> + char *args = cmdline_table_str; >>>> + struct cpuidle_state *state; >>>> + unsigned int i, state_count; >>>> + >>>> + if (args[0] == '\0') >>>> + /* The 'mwait-idle.table' module parameter was not specified */ >>>> + return; >>>> + >>>> + /* Create a copy of the C-states table */ >>>> + for (i = 0; >>>> + i < ARRAY_SIZE(cmdline_states) && icpu.state_table[i].name[0]; >>>> + i++) >>>> + cmdline_states[i] = icpu.state_table[i]; >>>> + >>>> + state_count = i; >>>> + >>>> + /* >>>> + * Adjust the C-states table copy with data from the 'mwait-idle.table' >>>> + * module parameter. >>>> + */ >>>> + while (args) { >>>> + char *fields, *name, *val; >>>> + >>>> + /* >>>> + * Get the next C-state definition, which is expected to be >>>> + * '::'. Treat "empty" >>>> + * fields as unchanged. For example, >>>> + * '::' leaves the latency unchanged. >>>> + */ >>>> + args = get_cmdline_field(args, &fields, ','); >>>> + >>>> + /* name */ >>>> + fields = get_cmdline_field(fields, &name, ':'); >>>> + if (!fields) >>>> + goto error; >>>> + >>>> + /* Find the C-state by its name */ >>>> + state = NULL; >>>> + for (i = 0; i < state_count; i++) { >>>> + if (!strcmp(name, cmdline_states[i].name)) { >>>> + state = &cmdline_states[i]; >>>> + break; >>>> + } >>>> + } >>>> + >>>> + if (!state) { >>>> + printk(XENLOG_ERR PREFIX "C-state '%s' was not found\n", >>>> + name); >>>> + continue; >>>> + } >>>> + >>>> + /* Latency */ >>>> + fields = get_cmdline_field(fields, &val, ':'); >>>> + if (!fields) >>>> + goto error; >>>> + >>>> + if (*val) { >>>> + const char *end; >>>> + unsigned long n = simple_strtoul(val, &end, 0); >>>> + >>>> + state->exit_latency = n; >>>> + if (*end || state->exit_latency != n) >>>> + goto error; >>>> + } >>>> + >>>> + /* Target residency */ >>>> + fields = get_cmdline_field(fields, &val, ':'); >>>> + >>>> + if (*val) { >>>> + const char *end; >>>> + unsigned long n = simple_strtoul(val, &end, 0); >>>> + >>>> + state->target_residency = n; >>>> + if (*end || state->target_residency != n) >>>> + goto error; >>>> + } >>>> + >>>> + /* >>>> + * Allow for 3 more fields, but ignore them. Helps to make >>>> + * possible future extensions of the cmdline format backward >>>> + * compatible. >>>> + */ >>>> + for (i = 0; fields && i < 3; i++) { >>>> + fields = get_cmdline_field(fields, &val, ':'); >>>> + if (!fields) >>>> + break; >>>> + } >>>> + >>>> + if (fields) { >>>> + printk(XENLOG_ERR PREFIX >>>> + "Too many fields for C-state '%s'\n", >>>> + state->name); >>>> + goto error; >>>> + } >>>> + >>>> + printk(XENLOG_INFO PREFIX >>>> + "C-state from cmdline: name=%s, latency=%u, residency=%u\n", >>>> + state->name, state->exit_latency, state->target_residency); >>>> + } >>>> + >>>> + /* Copy the adjusted C-states table back */ >>>> + for (i = 0; i < state_count; i++) >>>> + icpu.state_table[i] = cmdline_states[i]; >>>> + >>>> + printk(XENLOG_INFO PREFIX >>>> + "Adjusted C-states with data from 'mwait-idle.table'\n"); >>>> + return; >>>> + >>>> + error: >>>> + printk(PREFIX >>> >>> XENLOG_ERR ahead of the prefix maybe? >> >> I did already raise the level from info to warning, compared to the Linux >> original. I didn't want to go yet farther with this, hence why I'd prefer >> to leave out XENLOG_* altogether here. > > It seems like the outlier to me. All other printk() instances in the > function use an explicit prefix, so I would think it might be best to > also add an explicit prefix here. Okay, I added one (warning, not error). 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779085246-1AF76F3B-5F0008A6/0/0 X-purgate-type: clean X-purgate-size: 1320 On 16.05.2026 17:03, Mykola Kvach wrote: > This small series fixes two issues in parse_color_config(). > > The first patch makes parse failures leave the caller-visible color count > at zero. This prevents a rejected command-line value from leaving a > partially parsed configuration behind for later init paths to consume. > > The second patch rejects empty color tokens. Previously, delimiters in > places where a color value was expected could be interpreted as color 0, > because simple_strtoul() returns zero without advancing the input pointer. > The patch checks that each parsed color value consumed input. It also > adds the missing newline to the DT color parsing error message. > > Mykola Kvach (2): > xen/common: llc-coloring: clear color count on parse failure > xen/common: llc-coloring: reject empty color tokens For both of these, a question which isn't even considered in the reasoning is whether the present behavior may be intentional. Especially for the 2nd ISTR Stefano(?) not so long ago indicating that the behavior is indeed intended to be this way. That may have been somewhere on Matrix rather than on the list, though. In any event, you didn't Cc the authors of the patch, without which it seems unlikely that they might even notice the submission. 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This makes strings such as ",2-6", "-10,19-20" or > "1,,2" look as if an empty value was color 0. > > Also add the missing newline to the DT color parsing error message. > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > Signed-off-by: Mykola Kvach > --- > xen/common/llc-coloring.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index 2606cb0977..5d00d4b40e 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -64,14 +64,21 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], > > while ( *s != '\0' ) > { > + const char *endp; > unsigned int color, start, end; > > - start = simple_strtoul(s, &s, 0); > + start = simple_strtoul(s, &endp, 0); > + if ( endp == s ) > + goto fail; > + s = endp; > > if ( *s == '-' ) /* Range */ > { > s++; > - end = simple_strtoul(s, &s, 0); > + end = simple_strtoul(s, &endp, 0); > + if ( endp == s ) > + goto fail; > + s = endp; > } > else /* Single value */ > end = start; > @@ -334,7 +341,7 @@ int __init domain_set_llc_colors_from_str(struct domain *d, const char *str) > err = parse_color_config(str, colors, max_nr_colors, &num_colors); > if ( err ) > { > - printk(XENLOG_ERR "Error parsing LLC color configuration"); > + printk(XENLOG_ERR "Error parsing LLC color configuration\n"); While here, add domain ID to the printout similarly to `if ( !check_colors(..) )` processing below? > xfree(colors); > return err; > } > -- > 2.43.0 > > From xen-devel-bounces@lists.xenproject.org Mon May 18 06:41:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 06:41:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311496.1581615 (Exim 4.92) (envelope-from ) id 1wOrf7-0005ir-TR; Mon, 18 May 2026 06:41:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311496.1581615; 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If parsing later fails, leave the count at zero so callers > do not consume a partially parsed configuration. > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > Signed-off-by: Mykola Kvach Please consider Reviewed-by: Denis Mukhin > --- > xen/common/llc-coloring.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index 6dc614739a..2606cb0977 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -79,7 +79,7 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], > if ( end >= NR_LLC_COLORS || start > end || > (end - start) >= (UINT_MAX - *num_colors) || > (*num_colors + (end - start)) >= max_num_colors ) > - return -EINVAL; > + goto fail; > > /* Colors are range checked in check_colors() */ > for ( color = start; color <= end; color++ ) > @@ -91,7 +91,14 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], > break; > } > > - return *s ? -EINVAL : 0; > + if ( *s ) > + goto fail; > + > + return 0; > + > + fail: > + *num_colors = 0; > + return -EINVAL; > } > > static int __init parse_dom0_colors(const char *s) > -- > 2.43.0 > > From xen-devel-bounces@lists.xenproject.org Mon May 18 06:43:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 06:43:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311506.1581622 (Exim 4.92) (envelope-from ) id 1wOrh0-0006K2-6B; Mon, 18 May 2026 06:43:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311506.1581622; Mon, 18 May 2026 06:43:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrh0-0006Jv-3L; Mon, 18 May 2026 06:43:10 +0000 Received: by outflank-mailman (input) for mailman id 1311506; Mon, 18 May 2026 06:43:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrgy-0006J0-AF for xen-devel@lists.xenproject.org; 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Sun, 17 May 2026 23:43:06 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 09:42:55 +0300 X-Gm-Features: AVHnY4IfOaZU2yCaJSiIf6SUy8Thk4rK4xNuqdjA_EFbRKLFjKWY0fkuYkloZcA Message-ID: Subject: Re: [PATCH 0/2] xen/common: llc-coloring parser fixes To: Jan Beulich Cc: Mykola Kvach , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Carlo Nonato , Marco Solieri Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1779086587-BE368DB1-9A1CE30E/0/0 X-purgate-type: clean X-purgate-size: 2889 Hi Jan, Thank you for the feedback. On Mon, May 18, 2026 at 9:20=E2=80=AFAM Jan Beulich wro= te: > > On 16.05.2026 17:03, Mykola Kvach wrote: > > This small series fixes two issues in parse_color_config(). > > > > The first patch makes parse failures leave the caller-visible color cou= nt > > at zero. This prevents a rejected command-line value from leaving a > > partially parsed configuration behind for later init paths to consume. > > > > The second patch rejects empty color tokens. Previously, delimiters in > > places where a color value was expected could be interpreted as color 0= , > > because simple_strtoul() returns zero without advancing the input point= er. > > The patch checks that each parsed color value consumed input. It also > > adds the missing newline to the DT color parsing error message. > > > > Mykola Kvach (2): > > xen/common: llc-coloring: clear color count on parse failure > > xen/common: llc-coloring: reject empty color tokens > > For both of these, a question which isn't even considered in the reasonin= g > is whether the present behavior may be intentional. Especially for the 2n= d > ISTR Stefano(?) not so long ago indicating that the behavior is indeed > intended to be this way. That may have been somewhere on Matrix rather th= an > on the list, though. Thank you for pointing this out. For the first patch, my reasoning was that returning an error while leaving a partially parsed caller-visible color count behind looks surprising. If the value is rejected, I think later init paths should not be able to consume the partially parsed state. For the second patch, my reasoning was that the current behavior looks accidental rather than an intentional extension of the syntax. The parser comment says: COLOR_CONFIGURATION ::=3D COLOR | RANGE,...,COLOR | RANGE RANGE ::=3D COLOR-COLOR The user guide also describes this as a comma-separated list of colors or ranges, with ranges written as hyphen-separated inclusive intervals. I don't see an empty-token production there. If empty tokens are intended to mean color 0, then I agree the second patch should be dropped or reworked, and the syntax should be documented explicitly instead. From the current in-code and user-facing docs, rejecting them looked more consistent to me. > > In any event, you didn't Cc the authors of the patch, without which it > seems unlikely that they might even notice the submission. On Cc: I followed the submission workflow from the Xen Project documentation, including the add_maintainers.pl. The documentation says that, when following those steps, the scripts will add the correct people automatically. Apparently that was not sufficient in this case. I will add the original authors explicitly if there is a next posting. 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pr=C Message-ID: <09274238-3874-4114-99e1-efd587498a8b@amd.com> Date: Mon, 18 May 2026 08:49:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] xen/common: llc-coloring: reject empty color tokens To: Mykola Kvach , CC: Mykola Kvach , Andrew Cooper , Anthony PERARD , "Jan Beulich" , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Carlo Nonato , "Miccio, Luca" , Marco Solieri References: <0820f91dd0499e5f66f8961b5e27fe0a0ff9be35.1778925998.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0820f91dd0499e5f66f8961b5e27fe0a0ff9be35.1778925998.git.mykola_kvach@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EE34:EE_|SA1PR12MB6948:EE_ X-MS-Office365-Filtering-Correlation-Id: 1e311160-ddfd-4ca5-6e29-08deb4a9a43e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|30052699003|36860700016|7416014|376014|11063799003|4143699003|22082099003|56012099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XcD0HDLX+RrXoKtcMt6cuTYexBQqbp5N9TccUCCD92rObKjI84t8syYSbLn2aK//nHoGniTYPHlpmsZBy5mz7vg3Cvy9i4WHaWsuFXDu85TKPaK1Rfh4Jg4XoyYiVMPWxZ8U/bdjcdkx3qQOufLZ9o/P34kf0LrFXGR7hgHsYvcHEnTdUCXaPPEQXm340RAJn5UkobB8GFvBcywurV/0Rc3SWgQnrTqqa+WYKLBdWxjQHqI7PL3Q64n7T2FWEn5hRHN5/Ked75mPW/QsvP86OIoBMuupLKGMW3PSMlSOyINDkdPtgkz0dnU5ojXRE/ItA9D8IYPGxpEXVevbW/mUb4zAi9gA9tDxc1GQVqZL5ZTBw7XtJTAk6UlrqdKITy3Qjh8rxEyNTwDWOLl9htG2IxTSbQ19vK/CmjKbdJ/fyy/Klj48g9/VM5ob2Q8a9AcA X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 06:49:43.0399 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1e311160-ddfd-4ca5-6e29-08deb4a9a43e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EE34.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6948 X-purgate-ID: tlsNG-33051d/1779086990-42F62938-322199E5/0/0 X-purgate-type: clean X-purgate-size: 2313 +cc Carlo, Marco, Luca On 16-May-26 17:03, Mykola Kvach wrote: > From: Mykola Kvach > > parse_color_config() currently accepts delimiters where a color value > is expected because simple_strtoul() returns zero without advancing the > input pointer. This makes strings such as ",2-6", "-10,19-20" or > "1,,2" look as if an empty value was color 0. > > Also add the missing newline to the DT color parsing error message. > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > Signed-off-by: Mykola Kvach I don't see anything in the user facing docs that would make me think the current behavior is intentional, therefore: Reviewed-by: Michal Orzel I will still give a chance for the original authors to chime in if needed. ~Michal > --- > xen/common/llc-coloring.c | 13 ++++++++++--- > 1 file changed, 10 insertions(+), 3 deletions(-) > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > index 2606cb0977..5d00d4b40e 100644 > --- a/xen/common/llc-coloring.c > +++ b/xen/common/llc-coloring.c > @@ -64,14 +64,21 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], > > while ( *s != '\0' ) > { > + const char *endp; > unsigned int color, start, end; > > - start = simple_strtoul(s, &s, 0); > + start = simple_strtoul(s, &endp, 0); > + if ( endp == s ) > + goto fail; > + s = endp; > > if ( *s == '-' ) /* Range */ > { > s++; > - end = simple_strtoul(s, &s, 0); > + end = simple_strtoul(s, &endp, 0); > + if ( endp == s ) > + goto fail; > + s = endp; > } > else /* Single value */ > end = start; > @@ -334,7 +341,7 @@ int __init domain_set_llc_colors_from_str(struct domain *d, const char *str) > err = parse_color_config(str, colors, max_nr_colors, &num_colors); > if ( err ) > { > - printk(XENLOG_ERR "Error parsing LLC color configuration"); > + printk(XENLOG_ERR "Error parsing LLC color configuration\n"); > xfree(colors); > return err; > } From xen-devel-bounces@lists.xenproject.org Mon May 18 06:52:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 06:52:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311528.1581641 (Exim 4.92) (envelope-from ) id 1wOrpo-0000Kq-Ad; Mon, 18 May 2026 06:52:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311528.1581641; Mon, 18 May 2026 06:52:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrpo-0000Kj-7R; Mon, 18 May 2026 06:52:16 +0000 Received: by outflank-mailman (input) for mailman id 1311528; Mon, 18 May 2026 06:52:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrpm-0000Kd-Kn for xen-devel@lists.xenproject.org; Mon, 18 May 2026 06:52:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOrpl-0076WH-TQ for xen-devel@lists.xenproject.org; Mon, 18 May 2026 08:52:13 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ab70c-e002-0a2a0a5209dd-0a2a450b8414-46 for ; Mon, 18 May 2026 08:52:13 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ab71d-212f-0a2a450b0019-d155dd29c803-3 for ; Mon, 18 May 2026 08:52:13 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-43d77f6092eso885343f8f.2 for ; Sun, 17 May 2026 23:52:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779087133-21F84F3B-178D6048/0/0 X-purgate-type: clean X-purgate-size: 2425 On 18.05.2026 08:42, Mykola Kvach wrote: > On Mon, May 18, 2026 at 9:20 AM Jan Beulich wrote: >> On 16.05.2026 17:03, Mykola Kvach wrote: >>> This small series fixes two issues in parse_color_config(). >>> >>> The first patch makes parse failures leave the caller-visible color count >>> at zero. This prevents a rejected command-line value from leaving a >>> partially parsed configuration behind for later init paths to consume. >>> >>> The second patch rejects empty color tokens. Previously, delimiters in >>> places where a color value was expected could be interpreted as color 0, >>> because simple_strtoul() returns zero without advancing the input pointer. >>> The patch checks that each parsed color value consumed input. It also >>> adds the missing newline to the DT color parsing error message. >>> >>> Mykola Kvach (2): >>> xen/common: llc-coloring: clear color count on parse failure >>> xen/common: llc-coloring: reject empty color tokens >> >> For both of these, a question which isn't even considered in the reasoning >> is whether the present behavior may be intentional. Especially for the 2nd >> ISTR Stefano(?) not so long ago indicating that the behavior is indeed >> intended to be this way. That may have been somewhere on Matrix rather than >> on the list, though. > > Thank you for pointing this out. > > For the first patch, my reasoning was that returning an error while > leaving a partially parsed caller-visible color count behind looks > surprising. If the value is rejected, I think later init paths should > not be able to consume the partially parsed state. > > For the second patch, my reasoning was that the current behavior looks > accidental rather than an intentional extension of the syntax. That was my impression as well, hence why I had raised the question back then. > The parser comment says: > > COLOR_CONFIGURATION ::= COLOR | RANGE,...,COLOR | RANGE > RANGE ::= COLOR-COLOR > > The user guide also describes this as a comma-separated list of colors > or ranges, with ranges written as hyphen-separated inclusive intervals. > I don't see an empty-token production there. What you quote is insufficient to determine: COLOR may be allowed to be . Iirc the reasoning went in particular towards a range with merely the upper end specified being something (halfway) meaningful. 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Sun, 17 May 2026 23:53:05 -0700 (PDT) MIME-Version: 1.0 References: <0820f91dd0499e5f66f8961b5e27fe0a0ff9be35.1778925998.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 09:52:54 +0300 X-Gm-Features: AVHnY4KYcUnx3q16dhJDjq3tuGgE7Vn5k2ZtZ4inlzBM6DKf72XHMvqWQ-vwv7M Message-ID: Subject: Re: [PATCH 2/2] xen/common: llc-coloring: reject empty color tokens To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779087186-40B733FF-2BA4BFA0/0/0 X-purgate-type: clean X-purgate-size: 2486 Hi Denis, Thank you for the review. On Mon, May 18, 2026 at 9:40=E2=80=AFAM wrote: > > On Sat, May 16, 2026 at 06:03:12PM +0300, Mykola Kvach wrote: > > From: Mykola Kvach > > > > parse_color_config() currently accepts delimiters where a color value > > is expected because simple_strtoul() returns zero without advancing the > > input pointer. This makes strings such as ",2-6", "-10,19-20" or > > "1,,2" look as if an empty value was color 0. > > > > Also add the missing newline to the DT color parsing error message. > > > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > > Signed-off-by: Mykola Kvach > > --- > > xen/common/llc-coloring.c | 13 ++++++++++--- > > 1 file changed, 10 insertions(+), 3 deletions(-) > > > > diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c > > index 2606cb0977..5d00d4b40e 100644 > > --- a/xen/common/llc-coloring.c > > +++ b/xen/common/llc-coloring.c > > @@ -64,14 +64,21 @@ static int __init parse_color_config(const char *bu= f, unsigned int colors[], > > > > while ( *s !=3D '\0' ) > > { > > + const char *endp; > > unsigned int color, start, end; > > > > - start =3D simple_strtoul(s, &s, 0); > > + start =3D simple_strtoul(s, &endp, 0); > > + if ( endp =3D=3D s ) > > + goto fail; > > + s =3D endp; > > > > if ( *s =3D=3D '-' ) /* Range */ > > { > > s++; > > - end =3D simple_strtoul(s, &s, 0); > > + end =3D simple_strtoul(s, &endp, 0); > > + if ( endp =3D=3D s ) > > + goto fail; > > + s =3D endp; > > } > > else /* Single value */ > > end =3D start; > > @@ -334,7 +341,7 @@ int __init domain_set_llc_colors_from_str(struct do= main *d, const char *str) > > err =3D parse_color_config(str, colors, max_nr_colors, &num_colors= ); > > if ( err ) > > { > > - printk(XENLOG_ERR "Error parsing LLC color configuration"); > > + printk(XENLOG_ERR "Error parsing LLC color configuration\n"); > > While here, add domain ID to the printout similarly to > `if ( !check_colors(..) )` processing below? Yes, that makes sense. If this patch goes forward, I will add the domain ID to this error message in the next version. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 07:02:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:02:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311545.1581658 (Exim 4.92) (envelope-from ) id 1wOrzM-0002hg-Bq; Mon, 18 May 2026 07:02:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311545.1581658; Mon, 18 May 2026 07:02:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrzM-0002hZ-9H; Mon, 18 May 2026 07:02:08 +0000 Received: by outflank-mailman (input) for mailman id 1311545; Mon, 18 May 2026 07:02:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOrzK-0002hT-Lg for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:02:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOrzI-008fGW-D6 for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 00:02:03 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 10:01:51 +0300 X-Gm-Features: AVHnY4Il-7plXvdnaNWH4cvOEinsjaCQG5yoBNwLoJYksIrFr_kF7vQmHArWgw4 Message-ID: Subject: Re: [PATCH 0/2] xen/common: llc-coloring parser fixes To: Jan Beulich Cc: Mykola Kvach , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Carlo Nonato , Marco Solieri Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1779087724-E0567CF5-94D462E1/0/0 X-purgate-type: clean X-purgate-size: 3051 On Mon, May 18, 2026 at 9:52=E2=80=AFAM Jan Beulich wro= te: > > On 18.05.2026 08:42, Mykola Kvach wrote: > > On Mon, May 18, 2026 at 9:20=E2=80=AFAM Jan Beulich = wrote: > >> On 16.05.2026 17:03, Mykola Kvach wrote: > >>> This small series fixes two issues in parse_color_config(). > >>> > >>> The first patch makes parse failures leave the caller-visible color c= ount > >>> at zero. This prevents a rejected command-line value from leaving a > >>> partially parsed configuration behind for later init paths to consume= . > >>> > >>> The second patch rejects empty color tokens. Previously, delimiters = in > >>> places where a color value was expected could be interpreted as color= 0, > >>> because simple_strtoul() returns zero without advancing the input poi= nter. > >>> The patch checks that each parsed color value consumed input. It als= o > >>> adds the missing newline to the DT color parsing error message. > >>> > >>> Mykola Kvach (2): > >>> xen/common: llc-coloring: clear color count on parse failure > >>> xen/common: llc-coloring: reject empty color tokens > >> > >> For both of these, a question which isn't even considered in the reaso= ning > >> is whether the present behavior may be intentional. Especially for the= 2nd > >> ISTR Stefano(?) not so long ago indicating that the behavior is indeed > >> intended to be this way. That may have been somewhere on Matrix rather= than > >> on the list, though. > > > > Thank you for pointing this out. > > > > For the first patch, my reasoning was that returning an error while > > leaving a partially parsed caller-visible color count behind looks > > surprising. If the value is rejected, I think later init paths should > > not be able to consume the partially parsed state. > > > > For the second patch, my reasoning was that the current behavior looks > > accidental rather than an intentional extension of the syntax. > > That was my impression as well, hence why I had raised the question back > then. > > > The parser comment says: > > > > COLOR_CONFIGURATION ::=3D COLOR | RANGE,...,COLOR | RANGE > > RANGE ::=3D COLOR-COLOR > > > > The user guide also describes this as a comma-separated list of colors > > or ranges, with ranges written as hyphen-separated inclusive intervals. > > I don't see an empty-token production there. > > What you quote is insufficient to determine: COLOR may be allowed to be > . Iirc the reasoning went in particular towards a range with > merely the upper end specified being something (halfway) meaningful. Right, I see your point. The grammar does not define COLOR explicitly, so it does not by itself prove that an empty token is invalid. I was implicitly reading COLOR as a numeric color value, partly because all examples seem to use numeric values, but I agree that this is not stated there. If this behavior is intentional, then I agree the second patch should not go in as-is. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 07:05:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:05:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311553.1581669 (Exim 4.92) (envelope-from ) id 1wOs2l-0003GI-RF; Mon, 18 May 2026 07:05:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311553.1581669; Mon, 18 May 2026 07:05:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOs2l-0003GB-N4; Mon, 18 May 2026 07:05:39 +0000 Received: by outflank-mailman (input) for mailman id 1311553; Mon, 18 May 2026 07:05:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOs2k-0003G5-55 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:05:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOs2j-001ud6-HE for xen-devel@lists.xenproject.org; Mon, 18 May 2026 09:05:37 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0aba3d-e002-0a2a0a5209dd-0a2a4508d59e-18 for ; Mon, 18 May 2026 09:05:37 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a0aba40-63b5-0a2a45080019-d98c6eacd6f2-1 for ; Mon, 18 May 2026 09:05:36 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B765445BF; Mon, 18 May 2026 00:05:30 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0E34B3F85F; Mon, 18 May 2026 00:05:34 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779087935; bh=cagP/lu5HxqlLYxu0yTLdLWRdQYKnbIua195LoF4ZVE=; h=From:To:Cc:Subject:Date:From; b=Et0KtNd1ibeWJ3jCwReWPy1CNjtvAYNeRpZ09mEU+MZJ3C5Yjck6btU9ff2R07i0V +tCdr1DerW10EcLujZzzmgmOjXK5DCaGDcs/yg9NZZjPGbDJoQ632iXgOtJFQOp1p0 ylnMqSI+xBKKXiKg7ovGMdbNZ/lfsMfow10bKA7E= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH] xen/arm: gic-v3: Fix redistributor wakeup polling Date: Mon, 18 May 2026 08:05:24 +0100 Message-Id: <20260518070524.19813-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779087937-BF171DB1-F11F92C7/0/0 X-purgate-type: clean X-purgate-size: 1447 gicv3_enable_redist() clears GICR_WAKER.ProcessorSleep and then waits for GICR_WAKER.ChildrenAsleep to clear, as required after waking a redistributor. However, the polling loop currently uses "while ( timeout )". Since timeout is initially false, the loop runs only once unless the timeout path has already been reached. As a result, Xen can continue before the redistributor has completed wakeup. Use an unconditional loop, matching the surrounding timeout/break pattern, so the code polls until either ChildrenAsleep is clear or the deadline is reached. While there, also fix the timeout message. This path polls GICR_WAKER.ChildrenAsleep, not an RWP bit, so "RWP timeout" is misleading. Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") Signed-off-by: Luca Fancellu --- xen/arch/arm/gic-v3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9df..bb946dc11375 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -828,11 +828,11 @@ static int gicv3_enable_redist(void) } cpu_relax(); udelay(1); - } while ( timeout ); + } while ( 1 ); if ( timeout ) { - dprintk(XENLOG_ERR, "GICv3: Redist enable RWP timeout\n"); + dprintk(XENLOG_ERR, "GICv3: Redist wakeup timeout\n"); return 1; } -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Mon May 18 07:14:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:14:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311565.1581676 (Exim 4.92) (envelope-from ) id 1wOsAp-0005FO-Js; Mon, 18 May 2026 07:13:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311565.1581676; Mon, 18 May 2026 07:13:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsAp-0005FH-Gh; Mon, 18 May 2026 07:13:59 +0000 Received: by outflank-mailman (input) for mailman id 1311565; Mon, 18 May 2026 07:13:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsAo-0005FA-Ok for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:13:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOsAn-008ig2-M6 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 09:13:57 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0abc33-e002-0a2a0a5209dd-0a2a4501aaaa-4 for ; Mon, 18 May 2026 09:13:57 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0aba90-c1f2-0a2a45010019-d1558033a450-3 for ; Mon, 18 May 2026 09:06:57 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48fde648a71so11420245e9.0 for ; Mon, 18 May 2026 00:06:57 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779088017-AE342FF4-DBE55B11/13/0 X-purgate-type: clean X-purgate-size: 3206 On 18.05.2026 09:01, Mykola Kvach wrote: > On Mon, May 18, 2026 at 9:52 AM Jan Beulich wrote: >> >> On 18.05.2026 08:42, Mykola Kvach wrote: >>> On Mon, May 18, 2026 at 9:20 AM Jan Beulich wrote: >>>> On 16.05.2026 17:03, Mykola Kvach wrote: >>>>> This small series fixes two issues in parse_color_config(). >>>>> >>>>> The first patch makes parse failures leave the caller-visible color count >>>>> at zero. This prevents a rejected command-line value from leaving a >>>>> partially parsed configuration behind for later init paths to consume. >>>>> >>>>> The second patch rejects empty color tokens. Previously, delimiters in >>>>> places where a color value was expected could be interpreted as color 0, >>>>> because simple_strtoul() returns zero without advancing the input pointer. >>>>> The patch checks that each parsed color value consumed input. It also >>>>> adds the missing newline to the DT color parsing error message. >>>>> >>>>> Mykola Kvach (2): >>>>> xen/common: llc-coloring: clear color count on parse failure >>>>> xen/common: llc-coloring: reject empty color tokens >>>> >>>> For both of these, a question which isn't even considered in the reasoning >>>> is whether the present behavior may be intentional. Especially for the 2nd >>>> ISTR Stefano(?) not so long ago indicating that the behavior is indeed >>>> intended to be this way. That may have been somewhere on Matrix rather than >>>> on the list, though. >>> >>> Thank you for pointing this out. >>> >>> For the first patch, my reasoning was that returning an error while >>> leaving a partially parsed caller-visible color count behind looks >>> surprising. If the value is rejected, I think later init paths should >>> not be able to consume the partially parsed state. >>> >>> For the second patch, my reasoning was that the current behavior looks >>> accidental rather than an intentional extension of the syntax. >> >> That was my impression as well, hence why I had raised the question back >> then. >> >>> The parser comment says: >>> >>> COLOR_CONFIGURATION ::= COLOR | RANGE,...,COLOR | RANGE >>> RANGE ::= COLOR-COLOR >>> >>> The user guide also describes this as a comma-separated list of colors >>> or ranges, with ranges written as hyphen-separated inclusive intervals. >>> I don't see an empty-token production there. >> >> What you quote is insufficient to determine: COLOR may be allowed to be >> . Iirc the reasoning went in particular towards a range with >> merely the upper end specified being something (halfway) meaningful. > > Right, I see your point. > > The grammar does not define COLOR explicitly, so it does not by itself > prove that an empty token is invalid. I was implicitly reading COLOR as > a numeric color value, partly because all examples seem to use numeric > values, but I agree that this is not stated there. > > If this behavior is intentional, then I agree the second patch should > not go in as-is. Just to mention: Something like "-5" won't be interpreted as "0-5" even right now. Instead it's taken as a single color with value -5U, afaict. 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Mon, 18 May 2026 00:19:47 -0700 (PDT) MIME-Version: 1.0 References: <22edbeb3-4b0b-48d4-9873-76bfa31b970d@suse.com> In-Reply-To: <22edbeb3-4b0b-48d4-9873-76bfa31b970d@suse.com> From: Mykola Kvach Date: Mon, 18 May 2026 10:19:36 +0300 X-Gm-Features: AVHnY4Lv3pVlfuck1gY7G0IBtYWJgoNUyOjGgPF-y08xcl4h2KigeBkfm2LufmE Message-ID: Subject: Re: [PATCH 0/2] xen/common: llc-coloring parser fixes To: Jan Beulich Cc: Mykola Kvach , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Carlo Nonato , Marco Solieri Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-42698a/1779088788-13175F3B-01CE4FEC/0/0 X-purgate-type: clean X-purgate-size: 4131 On Mon, May 18, 2026 at 10:06=E2=80=AFAM Jan Beulich wr= ote: > > On 18.05.2026 09:01, Mykola Kvach wrote: > > On Mon, May 18, 2026 at 9:52=E2=80=AFAM Jan Beulich = wrote: > >> > >> On 18.05.2026 08:42, Mykola Kvach wrote: > >>> On Mon, May 18, 2026 at 9:20=E2=80=AFAM Jan Beulich wrote: > >>>> On 16.05.2026 17:03, Mykola Kvach wrote: > >>>>> This small series fixes two issues in parse_color_config(). > >>>>> > >>>>> The first patch makes parse failures leave the caller-visible color= count > >>>>> at zero. This prevents a rejected command-line value from leaving = a > >>>>> partially parsed configuration behind for later init paths to consu= me. > >>>>> > >>>>> The second patch rejects empty color tokens. Previously, delimiter= s in > >>>>> places where a color value was expected could be interpreted as col= or 0, > >>>>> because simple_strtoul() returns zero without advancing the input p= ointer. > >>>>> The patch checks that each parsed color value consumed input. It a= lso > >>>>> adds the missing newline to the DT color parsing error message. > >>>>> > >>>>> Mykola Kvach (2): > >>>>> xen/common: llc-coloring: clear color count on parse failure > >>>>> xen/common: llc-coloring: reject empty color tokens > >>>> > >>>> For both of these, a question which isn't even considered in the rea= soning > >>>> is whether the present behavior may be intentional. Especially for t= he 2nd > >>>> ISTR Stefano(?) not so long ago indicating that the behavior is inde= ed > >>>> intended to be this way. That may have been somewhere on Matrix rath= er than > >>>> on the list, though. > >>> > >>> Thank you for pointing this out. > >>> > >>> For the first patch, my reasoning was that returning an error while > >>> leaving a partially parsed caller-visible color count behind looks > >>> surprising. If the value is rejected, I think later init paths should > >>> not be able to consume the partially parsed state. > >>> > >>> For the second patch, my reasoning was that the current behavior look= s > >>> accidental rather than an intentional extension of the syntax. > >> > >> That was my impression as well, hence why I had raised the question ba= ck > >> then. > >> > >>> The parser comment says: > >>> > >>> COLOR_CONFIGURATION ::=3D COLOR | RANGE,...,COLOR | RANGE > >>> RANGE ::=3D COLOR-COLOR > >>> > >>> The user guide also describes this as a comma-separated list of color= s > >>> or ranges, with ranges written as hyphen-separated inclusive interval= s. > >>> I don't see an empty-token production there. > >> > >> What you quote is insufficient to determine: COLOR may be allowed to b= e > >> . Iirc the reasoning went in particular towards a range with > >> merely the upper end specified being something (halfway) meaningful. > > > > Right, I see your point. > > > > The grammar does not define COLOR explicitly, so it does not by itself > > prove that an empty token is invalid. I was implicitly reading COLOR as > > a numeric color value, partly because all examples seem to use numeric > > values, but I agree that this is not stated there. > > > > If this behavior is intentional, then I agree the second patch should > > not go in as-is. > > Just to mention: Something like "-5" won't be interpreted as "0-5" even > right now. Instead it's taken as a single color with value -5U, afaict. I don't think that is what happens with the current parser. I tested this without the patches from this series: (XEN) Command line: dom0_mem=3D2048M console=3Ddtuart dtuart=3Dserial0 (XEN) loglvl=3Dall console_timestamps=3Dboot llc-coloring=3Don (XEN) xen-llc-colors=3D-5 ... (XEN) LLC coloring info: (XEN) Number of LLC colors supported: 32 (XEN) Xen LLC colors (6): { 0-5 } So "-5" is currently interpreted as "0-5", not as a single color with value -5U. That seems to happen because simple_strtoul() does not consume the leading '-', so start remains 0 and the parser then takes the range path. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 07:30:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:30:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311585.1581694 (Exim 4.92) (envelope-from ) id 1wOsQV-0000bC-0b; Mon, 18 May 2026 07:30:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311585.1581694; Mon, 18 May 2026 07:30:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsQU-0000b5-UI; Mon, 18 May 2026 07:30:10 +0000 Received: by outflank-mailman (input) for mailman id 1311585; Mon, 18 May 2026 07:30:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsQU-0000az-14 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:30:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOsQT-008mgc-DJ for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 00:30:08 -0700 (PDT) MIME-Version: 1.0 References: <20260518070524.19813-1-luca.fancellu@arm.com> In-Reply-To: <20260518070524.19813-1-luca.fancellu@arm.com> From: Mykola Kvach Date: Mon, 18 May 2026 10:29:57 +0300 X-Gm-Features: AVHnY4Ii4E0urLp1QprBh4czoFh0poZJ63kuZ7e6h6SWp5ENyorLcNGjFhVduas Message-ID: Subject: Re: [PATCH] xen/arm: gic-v3: Fix redistributor wakeup polling To: Luca Fancellu Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1779089409-2176AC48-EA80748B/0/0 X-purgate-type: clean X-purgate-size: 1702 On Mon, May 18, 2026 at 10:05=E2=80=AFAM Luca Fancellu wrote: > > gicv3_enable_redist() clears GICR_WAKER.ProcessorSleep and then waits for > GICR_WAKER.ChildrenAsleep to clear, as required after waking a > redistributor. > > However, the polling loop currently uses "while ( timeout )". Since > timeout is initially false, the loop runs only once unless the timeout > path has already been reached. As a result, Xen can continue before the > redistributor has completed wakeup. > > Use an unconditional loop, matching the surrounding timeout/break pattern= , > so the code polls until either ChildrenAsleep is clear or the deadline is > reached. > > While there, also fix the timeout message. This path polls > GICR_WAKER.ChildrenAsleep, not an RWP bit, so "RWP timeout" is misleading= . > > Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") > Signed-off-by: Luca Fancellu > --- > xen/arch/arm/gic-v3.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 7f365cdbe9df..bb946dc11375 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -828,11 +828,11 @@ static int gicv3_enable_redist(void) > } > cpu_relax(); > udelay(1); > - } while ( timeout ); > + } while ( 1 ); > > if ( timeout ) > { > - dprintk(XENLOG_ERR, "GICv3: Redist enable RWP timeout\n"); > + dprintk(XENLOG_ERR, "GICv3: Redist wakeup timeout\n"); > return 1; > } > > -- > 2.34.1 > > Reviewed-by: Mykola Kvach Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 07:35:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:35:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311592.1581703 (Exim 4.92) (envelope-from ) id 1wOsVy-0001Ae-Jw; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: PAVPR03MB10102.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: cf85fec4-c2ba-4fc7-214a-08deb4b0119f X-MS-Exchange-CrossTenant-originalarrivaltime: 18 May 2026 07:35:43.5685 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: wEuAqv6UBiA1stwYNIba0/ovrjY107sxvNtVZD87XYnNSOrYYSFqONVWAbVFRccNfndk1/84IsDGc9Rftn7Kcw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS8PR03MB9437 X-purgate-ID: tlsNG-16d1c6/1779089748-86369D75-06FA5243/0/0 X-purgate-type: clean X-purgate-size: 581 Init helpers sometimes fail to rebuild after switching branches, which results in runtime faults. Fix this by adding missing DEPS_INCLUDE to the Makefile. Signed-off-by: Mykyta Poturai --- tools/helpers/Makefile | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tools/helpers/Makefile b/tools/helpers/Makefile index 8262d9e75a..11db7d8982 100644 --- a/tools/helpers/Makefile +++ b/tools/helpers/Makefile @@ -64,3 +64,5 @@ clean: $(RM) *.o $(TARGETS) $(DEPS_RM) =20 distclean: clean + +-include $(DEPS_INCLUDE) --=20 2.51.2 From xen-devel-bounces@lists.xenproject.org Mon May 18 07:43:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:43:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311602.1581713 (Exim 4.92) (envelope-from ) id 1wOscz-00034F-ED; Mon, 18 May 2026 07:43:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311602.1581713; Mon, 18 May 2026 07:43:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOscz-000348-BC; Mon, 18 May 2026 07:43:05 +0000 Received: by outflank-mailman (input) for mailman id 1311602; Mon, 18 May 2026 07:43:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOscx-00033w-61 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:43:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOscw-008pwP-Ef for xen-devel@lists.xenproject.org; Mon, 18 May 2026 09:43:02 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ac302-bab6-0a2a0a5309dd-0a2a450aec3e-8 for ; Mon, 18 May 2026 09:43:02 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ac306-56b3-0a2a450a0019-d155802fe474-3 for ; Mon, 18 May 2026 09:43:02 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488ad135063so12742675e9.0 for ; Mon, 18 May 2026 00:43:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779090182-7D3858B7-A2147A74/0/0 X-purgate-type: clean X-purgate-size: 4312 On 18.05.2026 09:19, Mykola Kvach wrote: > On Mon, May 18, 2026 at 10:06 AM Jan Beulich wrote: >> On 18.05.2026 09:01, Mykola Kvach wrote: >>> On Mon, May 18, 2026 at 9:52 AM Jan Beulich wrote: >>>> On 18.05.2026 08:42, Mykola Kvach wrote: >>>>> On Mon, May 18, 2026 at 9:20 AM Jan Beulich wrote: >>>>>> On 16.05.2026 17:03, Mykola Kvach wrote: >>>>>>> This small series fixes two issues in parse_color_config(). >>>>>>> >>>>>>> The first patch makes parse failures leave the caller-visible color count >>>>>>> at zero. This prevents a rejected command-line value from leaving a >>>>>>> partially parsed configuration behind for later init paths to consume. >>>>>>> >>>>>>> The second patch rejects empty color tokens. Previously, delimiters in >>>>>>> places where a color value was expected could be interpreted as color 0, >>>>>>> because simple_strtoul() returns zero without advancing the input pointer. >>>>>>> The patch checks that each parsed color value consumed input. It also >>>>>>> adds the missing newline to the DT color parsing error message. >>>>>>> >>>>>>> Mykola Kvach (2): >>>>>>> xen/common: llc-coloring: clear color count on parse failure >>>>>>> xen/common: llc-coloring: reject empty color tokens >>>>>> >>>>>> For both of these, a question which isn't even considered in the reasoning >>>>>> is whether the present behavior may be intentional. Especially for the 2nd >>>>>> ISTR Stefano(?) not so long ago indicating that the behavior is indeed >>>>>> intended to be this way. That may have been somewhere on Matrix rather than >>>>>> on the list, though. >>>>> >>>>> Thank you for pointing this out. >>>>> >>>>> For the first patch, my reasoning was that returning an error while >>>>> leaving a partially parsed caller-visible color count behind looks >>>>> surprising. If the value is rejected, I think later init paths should >>>>> not be able to consume the partially parsed state. >>>>> >>>>> For the second patch, my reasoning was that the current behavior looks >>>>> accidental rather than an intentional extension of the syntax. >>>> >>>> That was my impression as well, hence why I had raised the question back >>>> then. >>>> >>>>> The parser comment says: >>>>> >>>>> COLOR_CONFIGURATION ::= COLOR | RANGE,...,COLOR | RANGE >>>>> RANGE ::= COLOR-COLOR >>>>> >>>>> The user guide also describes this as a comma-separated list of colors >>>>> or ranges, with ranges written as hyphen-separated inclusive intervals. >>>>> I don't see an empty-token production there. >>>> >>>> What you quote is insufficient to determine: COLOR may be allowed to be >>>> . Iirc the reasoning went in particular towards a range with >>>> merely the upper end specified being something (halfway) meaningful. >>> >>> Right, I see your point. >>> >>> The grammar does not define COLOR explicitly, so it does not by itself >>> prove that an empty token is invalid. I was implicitly reading COLOR as >>> a numeric color value, partly because all examples seem to use numeric >>> values, but I agree that this is not stated there. >>> >>> If this behavior is intentional, then I agree the second patch should >>> not go in as-is. >> >> Just to mention: Something like "-5" won't be interpreted as "0-5" even >> right now. Instead it's taken as a single color with value -5U, afaict. > > I don't think that is what happens with the current parser. > > I tested this without the patches from this series: > > (XEN) Command line: dom0_mem=2048M console=dtuart dtuart=serial0 > (XEN) loglvl=all console_timestamps=boot llc-coloring=on > (XEN) xen-llc-colors=-5 > ... > (XEN) LLC coloring info: > (XEN) Number of LLC colors supported: 32 > (XEN) Xen LLC colors (6): { 0-5 } > > So "-5" is currently interpreted as "0-5", not as a single color with > value -5U. > > That seems to happen because simple_strtoul() does not consume the > leading '-', so start remains 0 and the parser then takes the range > path. Oh, I didn't recall this incompatibility with strtoul(). We also don't permit a leading + there. IOW the behavior of the color parsing would change if we made the functions (more) compatible with the standard. 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X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: wH1lDYpEJ3gWHo+5FldKzMrDc5UYtShZGes6OXNM1rtZb2EVCdYzzpk0498X3Nh4YFEfgKN/wCbPXEOybRQaRQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR10MB6875 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-18_02,2026-05-15_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 malwarescore=0 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 mlxlogscore=999 adultscore=0 lowpriorityscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2605130000 definitions=main-2605180074 X-Authority-Analysis: v=2.4 cv=UOjt2ify c=1 sm=1 tr=0 ts=6a0ac535 b=1 cx=c_pps a=zPCbziy225d3KhSqZt3L1A==:117 a=zPCbziy225d3KhSqZt3L1A==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22 a=3I1J8UUJPc9JN9BFgKH3:22 a=vggBfdFIAAAA:8 a=pBOR-ozoAAAA:8 a=mLnsDVdbAAAA:8 a=yPCof4ZbAAAA:8 a=RXWFDia8kwHKEAyOmR0A:9 a=QEXdDO2ut3YA:10 a=xnp1pY6zelCj5OLna2To:22 a=5yU3S35YU4bGjq-dph-N:22 a=Bho9c0fBagfJEIQBS7DQ:22 cc=ntf awl=host:12298 X-Proofpoint-ORIG-GUID: H9fT60eQHa0s8depqHRz7ThOIQXgNtd9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE4MDA3NCBTYWx0ZWRfX52PZ4ZTH9UK0 /nOm4s7e5/YNkHzURQavpkWDkyE3+T4RwBNsIKmx4upscp/Z/tvak5LSSfhpGJ8+X/TdweaoAwt LN/Wp6Iak+77F6uUTTk9MEWqtjFgWebxlkzvRBgHTaCMVc+x3NyOROpByrP7RALVxloOFjDoz4d dLnS8i620cvyJhd0gsLpfQqPVpI2kWoyLpDBBzaUGi9P51tpxz35FTLIlDI8U4QODO6GCL+Y9uv B+Fwu1PFDRxe0ulpmUCAU+ctWnNtz3K1lzatFbbNk61+Evajj6PPduwLs6b9aGkHs1Vpou0ch3Y wDzlko4GmDI/ggy4l6qubcflAzV8SZ1GzV0bT0xgxvzwSlPyTormmtMJiFgwokXvHTFgLDHXStz J0Rp71Q9FRk7HEEQefpozHQ2vW1dK3UnDE0mIutbOWgbJtyp9fr3TSh4vCeHmB6mxXgB0G2cjek Lc9mVxmgQg2vW5IbQm0ukzWlZ40WXuTuHFYW+Hqk= X-Proofpoint-GUID: H9fT60eQHa0s8depqHRz7ThOIQXgNtd9 X-purgate-ID: tlsNG-16d1c6/1779090776-84D62D75-207BCD71/0/0 X-purgate-type: clean X-purgate-size: 12409 On 5/9/26 3:46 PM, David Woodhouse wrote: > From: Jack Allister > > In the common case (where kvm->arch.use_master_clock is true), the KVM > clock is defined as a simple arithmetic function of the guest TSC, based > on a reference point stored in kvm->arch.master_kernel_ns and > kvm->arch.master_cycle_now. > > The existing KVM_[GS]ET_CLOCK functionality does not allow for this > relationship to be precisely saved and restored by userspace. All it can > currently do is set the KVM clock at a given UTC reference time, which > is necessarily imprecise. > > So on live update, the guest TSC can remain cycle accurate at precisely > the same offset from the host TSC, but there is no way for userspace to > restore the KVM clock accurately. > > Even on live migration to a new host, where the accuracy of the guest > time-keeping is fundamentally limited by the accuracy of wallclock > synchronization between the source and destination hosts, the clock jump > experienced by the guest's TSC and its KVM clock should at least be > *consistent*. Even when the guest TSC suffers a discontinuity, its KVM > clock should still remain the *same* arithmetic function of the guest > TSC, and not suffer an *additional* discontinuity. > > To allow for accurate migration of the KVM clock, add per-vCPU ioctls > which save and restore the actual PV clock info in > pvclock_vcpu_time_info. > > The restoration in KVM_SET_CLOCK_GUEST works by creating a new reference > point in time just as kvm_update_masterclock() does, and calculating the > corresponding guest TSC value. This guest TSC value is then passed > through the user-provided pvclock structure to generate the *intended* > KVM clock value at that point in time, and through the *actual* KVM > clock calculation. Then kvm->arch.kvmclock_offset is adjusted to > eliminate the difference. > > Where kvm->arch.use_master_clock is false (because the host TSC is > unreliable, or the guest TSCs are configured strangely), the KVM clock > is *not* defined as a function of the guest TSC so KVM_GET_CLOCK_GUEST > returns an error. In this case, as documented, userspace shall use the > legacy KVM_GET_CLOCK ioctl. The loss of precision is acceptable in this The description here confused me a little. It sounds like userspace should call KVM_SET_CLOCK if KVM_SET_CLOCK_GUEST fails. However, I assume it actually means that userspace should do nothing extra if KVM_SET_CLOCK_GUEST fails, and simply rely on the prior KVM_SET_CLOCK and KVM_VCPU_TSC_OFFSET workflow described in patch 07. Is that correct? > case since the clocks are imprecise in this mode anyway. > > On *restoration*, if kvm->arch.use_master_clock is false, an error is > returned for similar reasons and userspace shall fall back to using > KVM_SET_CLOCK. This does mean that, as documented, userspace needs to > use *both* KVM_GET_CLOCK_GUEST and KVM_GET_CLOCK and send both results > with the migration data (unless the intent is to refuse to resume on a > host with bad TSC). > > Co-developed-by: David Woodhouse > Signed-off-by: David Woodhouse > Signed-off-by: Jack Allister > Reviewed-by: Paul Durrant > Cc: Dongli Zhang > --- > Documentation/virt/kvm/api.rst | 37 ++++++++ > arch/x86/kvm/x86.c | 151 +++++++++++++++++++++++++++++++++ > include/uapi/linux/kvm.h | 3 + > 3 files changed, 191 insertions(+) > > diff --git a/Documentation/virt/kvm/api.rst b/Documentation/virt/kvm/api.rst > index 52bbbb553ce1..2268b4442df6 100644 > --- a/Documentation/virt/kvm/api.rst > +++ b/Documentation/virt/kvm/api.rst > @@ -6553,6 +6553,43 @@ KVM_S390_KEYOP_SSKE > Sets the storage key for the guest address ``guest_addr`` to the key > specified in ``key``, returning the previous value in ``key``. > > +4.145 KVM_GET_CLOCK_GUEST > +---------------------------- > + > +:Capability: none > +:Architectures: x86_64 > +:Type: vcpu ioctl > +:Parameters: struct pvclock_vcpu_time_info (out) > +:Returns: 0 on success, <0 on error > + > +Retrieves the current time information structure used for KVM/PV clocks, > +in precisely the form advertised to the guest vCPU, which gives parameters > +for a direct conversion from a guest TSC value to nanoseconds. > + > +When the KVM clock is not in "master clock" mode, for example because the > +host TSC is unreliable or the guest TSCs are oddly configured, the KVM clock > +is actually defined by the host CLOCK_MONOTONIC_RAW instead of the guest TSC. > +In this case, the KVM_GET_CLOCK_GUEST ioctl returns -EINVAL. > + > +4.146 KVM_SET_CLOCK_GUEST > +---------------------------- > + > +:Capability: none Do we need a KVM_CHECK_EXTENSION capability for this? If userspace wants to support the new API, should it detect availability via KVM_CHECK_EXTENSION, or simply try the ioctl and handle failure? > +:Architectures: x86_64 > +:Type: vcpu ioctl > +:Parameters: struct pvclock_vcpu_time_info (in) > +:Returns: 0 on success, <0 on error > + > +Sets the KVM clock (for the whole VM) in terms of the vCPU TSC, using the > +pvclock structure as returned by KVM_GET_CLOCK_GUEST. This allows the precise > +arithmetic relationship between guest TSC and KVM clock to be preserved by > +userspace across migration. > + > +When the KVM clock is not in "master clock" mode, and the KVM clock is actually > +defined by the host CLOCK_MONOTONIC_RAW, this ioctl returns -EINVAL. Userspace > +may choose to set the clock using the less precise KVM_SET_CLOCK ioctl, or may > +choose to fail, denying migration to a host whose TSC is misbehaving. > + > .. _kvm_run: > > 5. The kvm_run structure > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index d9ef165df6a1..d1327d5fba3f 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -6205,6 +6205,149 @@ static int kvm_get_reg_list(struct kvm_vcpu *vcpu, > return 0; > } > > +#ifdef CONFIG_X86_64 > +static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) > +{ > + struct pvclock_vcpu_time_info hv_clock = {}; > + struct kvm_vcpu_arch *vcpu = &v->arch; > + struct kvm_arch *ka = &v->kvm->arch; > + unsigned int seq; > + > + /* > + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the pvclock > + * has never been generated at all, call kvm_guest_time_update(). > + */ > + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, v) || !vcpu->hw_tsc_hz) { This was flagged by AI, and I am still checking whether it is a real issue. What happens if KVM_REQ_MASTERCLOCK_UPDATE and KVM_REQ_CLOCK_UPDATE are both pending? >From my perspective, I am also curious how we should reason about this in other scenarios in the future. Specifically, when do we need to process KVM_REQ_MASTERCLOCK_UPDATE before KVM_REQ_CLOCK_UPDATE, and when is it acceptable not to? I noticed that kvm_cpuid() already processes only KVM_REQ_CLOCK_UPDATE. > + int idx = srcu_read_lock(&v->kvm->srcu); > + int ret = kvm_guest_time_update(v); > + > + srcu_read_unlock(&v->kvm->srcu, idx); > + if (ret) > + return -EINVAL; > + } > + > + /* > + * Reconstruct the pvclock from the master clock state, matching > + * exactly what kvm_guest_time_update() writes to the guest. > + */ > + do { > + seq = read_seqcount_begin(&ka->pvclock_sc); > + > + if (!ka->use_master_clock) > + return -EINVAL; > + > + hv_clock.tsc_timestamp = kvm_read_l1_tsc(v, ka->master_cycle_now); > + hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset; > + } while (read_seqcount_retry(&ka->pvclock_sc, seq)); > + > + hv_clock.tsc_shift = vcpu->pvclock_tsc_shift; > + hv_clock.tsc_to_system_mul = vcpu->pvclock_tsc_mul; > + hv_clock.flags = PVCLOCK_TSC_STABLE_BIT; > + > + if (copy_to_user(argp, &hv_clock, sizeof(hv_clock))) > + return -EFAULT; > + > + return 0; > +} > + > +/* > + * Reverse the calculation in the hv_clock definition. > + * > + * time_ns = ( (cycles << shift) * mul ) >> 32; > + * (although shift can be negative, so that's bad C) > + * > + * So for a single second, > + * NSEC_PER_SEC = ( ( FREQ_HZ << shift) * mul ) >> 32 > + * NSEC_PER_SEC << 32 = ( FREQ_HZ << shift ) * mul > + * ( NSEC_PER_SEC << 32 ) / mul = FREQ_HZ << shift > + * ( NSEC_PER_SEC << 32 ) / mul ) >> shift = FREQ_HZ > + */ > +static u64 hvclock_to_hz(u32 mul, s8 shift) > +{ > + u64 tm = NSEC_PER_SEC << 32; > + > + /* Maximise precision. Shift right until the top bit is set */ > + tm <<= 2; > + shift += 2; > + > + /* While 'mul' is even, increase the shift *after* the division */ > + while (!(mul & 1)) { > + shift++; > + mul >>= 1; > + } > + > + tm /= mul; > + > + if (shift > 0) > + return tm >> shift; > + else > + return tm << -shift; > +} > + > +static int kvm_vcpu_ioctl_set_clock_guest(struct kvm_vcpu *v, void __user *argp) > +{ > + struct pvclock_vcpu_time_info user_hv_clock; > + struct kvm *kvm = v->kvm; > + struct kvm_arch *ka = &kvm->arch; > + u64 curr_tsc_hz, user_tsc_hz; > + u64 user_clk_ns; > + u64 guest_tsc; > + int rc = 0; > + > + if (copy_from_user(&user_hv_clock, argp, sizeof(user_hv_clock))) > + return -EFAULT; > + > + if (!user_hv_clock.tsc_to_system_mul) > + return -EINVAL; > + > + user_tsc_hz = hvclock_to_hz(user_hv_clock.tsc_to_system_mul, > + user_hv_clock.tsc_shift); > + > + kvm_hv_request_tsc_page_update(kvm); > + kvm_start_pvclock_update(kvm); > + pvclock_update_vm_gtod_copy(kvm); > + > + if (!ka->use_master_clock) { > + rc = -EINVAL; > + goto out; > + } > + > + curr_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; > + if (unlikely(curr_tsc_hz == 0)) { > + rc = -EINVAL; > + goto out; > + } > + > + if (kvm_caps.has_tsc_control) > + curr_tsc_hz = kvm_scale_tsc(curr_tsc_hz, > + v->arch.l1_tsc_scaling_ratio); > + > + /* > + * Allow for a discrepancy of 1 kHz either way between the TSC > + * frequency used to generate the user's pvclock and the current > + * host's measured frequency, since they may not precisely match. > + */ > + if (user_tsc_hz < curr_tsc_hz - 1000 || > + user_tsc_hz > curr_tsc_hz + 1000) { > + rc = -ERANGE; > + goto out; > + } > + > + /* > + * Calculate the guest TSC at the new reference point, and the > + * corresponding KVM clock value according to user_hv_clock. > + * Adjust kvmclock_offset so both definitions agree. > + */ > + guest_tsc = kvm_read_l1_tsc(v, ka->master_cycle_now); > + user_clk_ns = __pvclock_read_cycles(&user_hv_clock, guest_tsc); > + ka->kvmclock_offset = user_clk_ns - ka->master_kernel_ns; I used to explore adjusting ka->kvmclock_offset in KVM_SET_CLOCK based on the old hv_clock and the new hv_clock long time ago. At that time, my concern was what would happen if userspace provided bogus values. Theoretically, this is possible with any ioctl. My concern may be unnecessary. Would it be helpful to validate that the delta is within a reasonable range, e.g. that the drift can never be more than five minutes (forward or backward)? Thank you very much! Dongli Zhang > + > +out: > + kvm_end_pvclock_update(kvm); > + return rc; > +} > +#endif > + > long kvm_arch_vcpu_ioctl(struct file *filp, > unsigned int ioctl, unsigned long arg) > { > @@ -6605,6 +6748,14 @@ long kvm_arch_vcpu_ioctl(struct file *filp, > srcu_read_unlock(&vcpu->kvm->srcu, idx); > break; > } > +#ifdef CONFIG_X86_64 > + case KVM_SET_CLOCK_GUEST: > + r = kvm_vcpu_ioctl_set_clock_guest(vcpu, argp); > + break; > + case KVM_GET_CLOCK_GUEST: > + r = kvm_vcpu_ioctl_get_clock_guest(vcpu, argp); > + break; > +#endif > #ifdef CONFIG_KVM_HYPERV > case KVM_GET_SUPPORTED_HV_CPUID: > r = kvm_ioctl_get_supported_hv_cpuid(vcpu, argp); > diff --git a/include/uapi/linux/kvm.h b/include/uapi/linux/kvm.h > index 6c8afa2047bf..9b50191b859c 100644 > --- a/include/uapi/linux/kvm.h > +++ b/include/uapi/linux/kvm.h > @@ -1669,4 +1669,7 @@ struct kvm_pre_fault_memory { > __u64 padding[5]; > }; > > +#define KVM_SET_CLOCK_GUEST _IOW(KVMIO, 0xd6, struct pvclock_vcpu_time_info) > +#define KVM_GET_CLOCK_GUEST _IOR(KVMIO, 0xd7, struct pvclock_vcpu_time_info) > + > #endif /* __LINUX_KVM_H */ From xen-devel-bounces@lists.xenproject.org Mon May 18 07:53:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 07:53:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311618.1581730 (Exim 4.92) (envelope-from ) id 1wOsmp-0005BV-MA; Mon, 18 May 2026 07:53:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311618.1581730; Mon, 18 May 2026 07:53:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsmp-0005BO-JL; Mon, 18 May 2026 07:53:15 +0000 Received: by outflank-mailman (input) for mailman id 1311618; Mon, 18 May 2026 07:53:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsmo-0005Ak-DH for xen-devel@lists.xenproject.org; Mon, 18 May 2026 07:53:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOsmn-00HDrG-P4 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 09:53:13 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ac569-2eae-0a2a0a5409dd-0a2a4509c564-0 for ; Mon, 18 May 2026 09:53:13 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ac569-2497-0a2a45090019-d1558030b9b4-3 for ; Mon, 18 May 2026 09:53:13 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-48ff4f8ef0dso22018765e9.3 for ; Mon, 18 May 2026 00:53:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260514175623.1869042-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779090793-37D7FA53-26E40D05/0/0 X-purgate-type: clean X-purgate-size: 1114 On 14.05.2026 19:56, Andrew Cooper wrote: > --- a/xen/arch/x86/hvm/svm/intr.c > +++ b/xen/arch/x86/hvm/svm/intr.c > @@ -33,6 +33,12 @@ static void svm_inject_nmi(struct vcpu *v) > u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); > intinfo_t event; > > + if ( vmcb->_vintr.fields.vnmi_enable ) > + { > + vmcb->_vintr.fields.vnmi_pending = true; > + return; > + } How does all of this work during migration to a vNMI-incapable host? The hw feature is used ... > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -185,6 +185,8 @@ static int construct_vmcb(struct vcpu *v) > if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) > v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; > > + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; ... unconditionally when available (i.e. the feature not being there won't prevent the migration), yet the vnmi_{pend,block}ing fields are lost during migration (aiui). Are building on the fact that all of this state is already getting lost while migrating? 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> > > > +/* XEN_DOMCTL_arm_cca_op */ > > +struct xen_domctl_arm_cca_op { > > +#define XEN_DOMCTL_ARM_CCA_OP_INIT_REALM 0 > > + uint32_t cmd; /* IN - XEN_DOMCTL_ARM_CCA_OP_* */ > > + uint32_t flags; /* IN - reserved, must be zero */ > > + uint64_aligned_t base_gfn; /* IN - first guest RAM gfn to protect */ > > + uint64_aligned_t nr_pages; /* IN - number of 4K pages to protect */ > > + uint64_aligned_t rmi_result; /* OUT - raw RMI result on -EIO */ > > +}; > > + > > /* XEN_DOMCTL_vmtrace_op: Perform VM tracing operations. */ > > struct xen_domctl_vmtrace_op { > > uint32_t cmd; /* IN */ > > @@ -1368,6 +1378,7 @@ struct xen_domctl { > > #define XEN_DOMCTL_gsi_permission 88 > > #define XEN_DOMCTL_set_llc_colors 89 > > #define XEN_DOMCTL_get_domain_state 90 /* stable interface */ > > +#define XEN_DOMCTL_arm_cca_op 91 > > If this is to be Arm only (as the name implies), ... > > > @@ -1429,6 +1440,7 @@ struct xen_domctl { > > struct xen_domctl_monitor_op monitor_op; > > struct xen_domctl_psr_alloc psr_alloc; > > struct xen_domctl_vuart_op vuart_op; > > + struct xen_domctl_arm_cca_op arm_cca_op; > > ... this wants to move ... > > > struct xen_domctl_vmtrace_op vmtrace_op; > > struct xen_domctl_paging_mempool paging_mempool; > > #if defined(__arm__) || defined(__aarch64__) > > ... into this #if. Hi Jan, Thanks for catching this. I'll move the arm_cca_op union member into the #if block in v2. Best regards, Koichiro > > Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 08:04:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 08:04:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311650.1581748 (Exim 4.92) (envelope-from ) id 1wOsy0-0008S0-8o; Mon, 18 May 2026 08:04:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311650.1581748; Mon, 18 May 2026 08:04:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsy0-0008Rt-5v; Mon, 18 May 2026 08:04:48 +0000 Received: by outflank-mailman (input) for mailman id 1311650; Mon, 18 May 2026 08:04:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsxz-0008Rn-5M for xen-devel@lists.xenproject.org; Mon, 18 May 2026 08:04:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOsxx-0086Yv-3N for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 01:04:43 -0700 (PDT) MIME-Version: 1.0 References: <22edbeb3-4b0b-48d4-9873-76bfa31b970d@suse.com> <8156a887-9069-4f9b-8107-b4dbd2cbdb69@suse.com> In-Reply-To: <8156a887-9069-4f9b-8107-b4dbd2cbdb69@suse.com> From: Mykola Kvach Date: Mon, 18 May 2026 11:04:31 +0300 X-Gm-Features: AVHnY4LfGIDas6J3skibMPTS4jw3vrdQzXnBkyoTRuNl13LeOcMwLgJS1osVSm0 Message-ID: Subject: Re: [PATCH 0/2] xen/common: llc-coloring parser fixes To: Jan Beulich Cc: Mykola Kvach , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Carlo Nonato , Marco Solieri Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779091484-437693FF-537EA9FA/0/0 X-purgate-type: clean X-purgate-size: 4957 On Mon, May 18, 2026 at 10:43=E2=80=AFAM Jan Beulich wr= ote: > > On 18.05.2026 09:19, Mykola Kvach wrote: > > On Mon, May 18, 2026 at 10:06=E2=80=AFAM Jan Beulich wrote: > >> On 18.05.2026 09:01, Mykola Kvach wrote: > >>> On Mon, May 18, 2026 at 9:52=E2=80=AFAM Jan Beulich wrote: > >>>> On 18.05.2026 08:42, Mykola Kvach wrote: > >>>>> On Mon, May 18, 2026 at 9:20=E2=80=AFAM Jan Beulich wrote: > >>>>>> On 16.05.2026 17:03, Mykola Kvach wrote: > >>>>>>> This small series fixes two issues in parse_color_config(). > >>>>>>> > >>>>>>> The first patch makes parse failures leave the caller-visible col= or count > >>>>>>> at zero. This prevents a rejected command-line value from leavin= g a > >>>>>>> partially parsed configuration behind for later init paths to con= sume. > >>>>>>> > >>>>>>> The second patch rejects empty color tokens. Previously, delimit= ers in > >>>>>>> places where a color value was expected could be interpreted as c= olor 0, > >>>>>>> because simple_strtoul() returns zero without advancing the input= pointer. > >>>>>>> The patch checks that each parsed color value consumed input. It= also > >>>>>>> adds the missing newline to the DT color parsing error message. > >>>>>>> > >>>>>>> Mykola Kvach (2): > >>>>>>> xen/common: llc-coloring: clear color count on parse failure > >>>>>>> xen/common: llc-coloring: reject empty color tokens > >>>>>> > >>>>>> For both of these, a question which isn't even considered in the r= easoning > >>>>>> is whether the present behavior may be intentional. Especially for= the 2nd > >>>>>> ISTR Stefano(?) not so long ago indicating that the behavior is in= deed > >>>>>> intended to be this way. That may have been somewhere on Matrix ra= ther than > >>>>>> on the list, though. > >>>>> > >>>>> Thank you for pointing this out. > >>>>> > >>>>> For the first patch, my reasoning was that returning an error while > >>>>> leaving a partially parsed caller-visible color count behind looks > >>>>> surprising. If the value is rejected, I think later init paths shou= ld > >>>>> not be able to consume the partially parsed state. > >>>>> > >>>>> For the second patch, my reasoning was that the current behavior lo= oks > >>>>> accidental rather than an intentional extension of the syntax. > >>>> > >>>> That was my impression as well, hence why I had raised the question = back > >>>> then. > >>>> > >>>>> The parser comment says: > >>>>> > >>>>> COLOR_CONFIGURATION ::=3D COLOR | RANGE,...,COLOR | RANGE > >>>>> RANGE ::=3D COLOR-COLOR > >>>>> > >>>>> The user guide also describes this as a comma-separated list of col= ors > >>>>> or ranges, with ranges written as hyphen-separated inclusive interv= als. > >>>>> I don't see an empty-token production there. > >>>> > >>>> What you quote is insufficient to determine: COLOR may be allowed to= be > >>>> . Iirc the reasoning went in particular towards a range wit= h > >>>> merely the upper end specified being something (halfway) meaningful. > >>> > >>> Right, I see your point. > >>> > >>> The grammar does not define COLOR explicitly, so it does not by itsel= f > >>> prove that an empty token is invalid. I was implicitly reading COLOR = as > >>> a numeric color value, partly because all examples seem to use numeri= c > >>> values, but I agree that this is not stated there. > >>> > >>> If this behavior is intentional, then I agree the second patch should > >>> not go in as-is. > >> > >> Just to mention: Something like "-5" won't be interpreted as "0-5" eve= n > >> right now. Instead it's taken as a single color with value -5U, afaict= . > > > > I don't think that is what happens with the current parser. > > > > I tested this without the patches from this series: > > > > (XEN) Command line: dom0_mem=3D2048M console=3Ddtuart dtuart=3Dserial0 > > (XEN) loglvl=3Dall console_timestamps=3Dboot llc-coloring=3Don > > (XEN) xen-llc-colors=3D-5 > > ... > > (XEN) LLC coloring info: > > (XEN) Number of LLC colors supported: 32 > > (XEN) Xen LLC colors (6): { 0-5 } > > > > So "-5" is currently interpreted as "0-5", not as a single color with > > value -5U. > > > > That seems to happen because simple_strtoul() does not consume the > > leading '-', so start remains 0 and the parser then takes the range > > path. > > Oh, I didn't recall this incompatibility with strtoul(). We also don't > permit a leading + there. IOW the behavior of the color parsing would > change if we made the functions (more) compatible with the standard. Right. The patch makes this explicit in one direction: a COLOR must consume input. If "-N" is intended to be valid syntax, then I think it should be handled as a separate explicit case, rather than relying on simple_strtoul() stopping at '-'. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 08:05:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 08:05:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311658.1581757 (Exim 4.92) (envelope-from ) id 1wOsyt-0000XZ-KG; Mon, 18 May 2026 08:05:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311658.1581757; Mon, 18 May 2026 08:05:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsyt-0000XS-Hh; Mon, 18 May 2026 08:05:43 +0000 Received: by outflank-mailman (input) for mailman id 1311658; Mon, 18 May 2026 08:05:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOsys-0000XI-5B for xen-devel@lists.xenproject.org; Mon, 18 May 2026 08:05:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOsyr-004sNf-HO for xen-devel@lists.xenproject.org; Mon, 18 May 2026 10:05:41 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ac852-2eae-0a2a0a5409dd-0a2a450499ae-16 for ; Mon, 18 May 2026 10:05:41 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ac855-1dec-0a2a45040019-d155802ee9f0-3 for ; Mon, 18 May 2026 10:05:41 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-4891d7164ddso10249095e9.3 for ; Mon, 18 May 2026 01:05:41 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 18 May 2026 01:05:40 -0700 (PDT) Message-ID: <547161b2-2fea-4576-a635-62838ffa2d33@suse.com> Date: Mon, 18 May 2026 10:05:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 RFC] x86/time: avoid early uses of NOW() to return zero To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <68b1607a-f2a1-4f53-84c5-43c61eeb1869@suse.com> <8fbab1f4-3078-4ac3-b147-84d1b5f5abd1@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1779091541-433673FF-707F29AB/0/0 X-purgate-type: clean X-purgate-size: 2424 On 15.05.2026 15:12, Roger Pau Monné wrote: > On Fri, May 15, 2026 at 09:15:40AM +0200, Jan Beulich wrote: >> On 14.05.2026 17:56, Roger Pau Monné wrote: >>> On Wed, May 13, 2026 at 08:44:46AM +0200, Jan Beulich wrote: >>>> @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) >>>> return 0; >>>> } >>>> >>>> +/* BSP-only function to pre-set an approximate TSC scale. */ >>>> +void __init preset_tsc_scale(unsigned long freq) >>>> +{ >>>> + struct cpu_time *t = &this_cpu(cpu_time); >>>> + >>>> + /* >>>> + * The incoming frequency is only approximate (nominal). Increase it by >>>> + * 1% to make NOW() output rather a little too slow than too fast, thus >>>> + * avoiding a possible backwards jump once the final scale is set. >>>> + */ >>>> + freq += DIV_ROUND_UP(freq, 100); >>> >>> To avoid such possible jump backwards, won't it safer to also update >>> the ->local_stime and ->local_tsc fields at the time the new scale is >>> set? Updatign those ahead of setting the new scale should avoid any >>> backward jumps. >> >> ->stamp.local_tsc does get updated; you merely dropped that line from reply >> context. As to local_stime - how could we possibly set that, when we didn't >> get through init_platform_timer() yet? Leaving it at 0 is the correct >> match for setting local_tsc to boot_tsc_stamp. > > Please bear with me, maybe I'm not understanding exactly to what the > code comment refers to as "possible backwards jump once the final > scale is set". I assume you refer to the setting of scale > early_time_init()? The ->stamp.local_tsc value also gets updated at > that point, so it's not possible for the timer going backwards? It is updated there, but only to boot_tsc_stamp. I.e. no change at all if preset_tsc_scale() set the field already. > This changed with the addition of the init_percpu_time() call in > early_time_init(), and makes the setting of "t->stamp.local_tsc = > boot_tsc_stamp" pointless, as it will get overwritten by the logic in > init_percpu_time() a couple of lines after? When making these changes, I first thought so too. But no, that write isn't pointless: In case preset_tsc_scale() wasn't called, leaving the field at 0 would break the use of get_s_time_fixed() out of init_percpu_time(). (Iirc I only noticed this because of having put debug printk()s there for other purposes.) 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Mon, 18 May 2026 01:11:37 -0700 (PDT) MIME-Version: 1.0 References: <7f5c613a-33f6-481f-b3f3-d627833a461e@amd.com> In-Reply-To: <7f5c613a-33f6-481f-b3f3-d627833a461e@amd.com> From: Mykola Kvach Date: Mon, 18 May 2026 11:11:25 +0300 X-Gm-Features: AVHnY4Ijom0BVbo0-UfPuVV3hywafJ1wCi1RS-fVVRFYdoT0qzxDvqgkP_nEdjY Message-ID: Subject: Re: [PATCH 1/2] xen/common: llc-coloring: clear color count on parse failure To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Andrew Cooper , Anthony PERARD , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779091898-8E98AD75-583BA2BA/0/0 X-purgate-type: clean X-purgate-size: 1002 Hi Michal, Thank you for the review. On Mon, May 18, 2026 at 8:42=E2=80=AFAM Orzel, Michal wrote: > > > > On 16-May-26 17:03, Mykola Kvach wrote: > > From: Mykola Kvach > > > > parse_color_config() updates the caller-provided color count while > > parsing. If parsing later fails, leave the count at zero so callers > > do not consume a partially parsed configuration. > I would also add for clarity: > The bug is reachable in practice: cmdline_parse() ignores the -EINVAL > from a custom_param callback, so boot continues with the partial > xen_num_colors / dom0_num_colors that llc_coloring_init() and > dom0_set_llc_colors() then consume. Ack, I will add this to the commit message in the next version. > > > > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > > Signed-off-by: Mykola Kvach > Reviewed-by: Michal Orzel Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 08:49:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 08:49:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311701.1581831 (Exim 4.92) (envelope-from ) id 1wOtf5-0000eJ-E6; Mon, 18 May 2026 08:49:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311701.1581831; Mon, 18 May 2026 08:49:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOtf5-0000eC-BR; Mon, 18 May 2026 08:49:19 +0000 Received: by outflank-mailman (input) for mailman id 1311701; Mon, 18 May 2026 08:49:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOtf3-0000e0-3z for xen-devel@lists.xenproject.org; Mon, 18 May 2026 08:49:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOtf2-00HRTB-0q; Mon, 18 May 2026 10:49:16 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ad289-2eae-0a2a0a5409dd-0a2a45078f28-4 for ; Mon, 18 May 2026 10:49:15 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ad288-229c-0a2a45070019-5a9b3222de68-3 for ; Mon, 18 May 2026 10:49:12 +0200 Received: from 54-240-197-233.amazon.com ([54.240.197.233] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wOtej-00000004XhK-32Yc; Mon, 18 May 2026 08:48:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=g1+eVz8k9W+ci4EcKfxUg7T4Q5pV1mWJW3UUNSLBkTE=; b=OKRaAom10YDl6l9nhetetvzXGk UAyRyLCYa3RV3coaFntWB6FvzbaNUq1VEr+HMIEHITv0/ixgYmORJn2Vm/ONJYtS0cidesb6jsqGT O7d4+9ujI7VaRzqQsARrrr7B/q5PiZ2D+5kUP4Evay4MKItS+WQaqM4o+jZtzT/w0x9HErlzQY6V2 z1uE/nSsmPdEpg58I1CY4+4l/LoomUOEUv+q0+P1wmUdk8jSq8dUAfg2VFG0IwDOl1e4DcUEh7Zco IQAnQTe2UcariMDSpLtgiI9Ujf2z9ctjsQzxo9LYWq8mcETml5cKdgrf8cQ61ZoOia4KpKkH9Pimj uqHORrgg==; Message-ID: Subject: Re: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration From: David Woodhouse To: Dongli Zhang , kvm@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Sean Christopherson , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Mon, 18 May 2026 09:48:56 +0100 In-Reply-To: <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-5-dwmw2@infradead.org> <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-PC39DHWiBkFfVKw6GO8r" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1779094154-09364C48-CAC50AD7/0/0 X-purgate-type: clean X-purgate-size: 13934 --=-PC39DHWiBkFfVKw6GO8r Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2026-05-18 at 00:52 -0700, Dongli Zhang wrote: > On 5/9/26 3:46 PM, David Woodhouse wrote: Huh, I didn't write that then; it isn't September yet. Did you mean 2026-05-09? We aren't all in the US...=20 Strictly speaking, you just misattributed a quote of mine, which is very poor form :) What mailer are you using? Can it be fixed? > > From: Jack Allister > >=20 > > Where kvm->arch.use_master_clock is false (because the host TSC is > > unreliable, or the guest TSCs are configured strangely), the KVM clock > > is *not* defined as a function of the guest TSC so KVM_GET_CLOCK_GUEST > > returns an error. In this case, as documented, userspace shall use the > > legacy KVM_GET_CLOCK ioctl. The loss of precision is acceptable in this >=20 > The description here confused me a little. It sounds like userspace shoul= d call > KVM_SET_CLOCK if KVM_SET_CLOCK_GUEST fails. However, I assume it actually= means > that userspace should do nothing extra if KVM_SET_CLOCK_GUEST fails, and = simply > rely on the prior KVM_SET_CLOCK and KVM_VCPU_TSC_OFFSET workflow describe= d in > patch 07. Is that correct? Yes. If KVM_SET_CLOCK_GUEST doesn't work (which might be because KVM_GET_CLOCK_GUEST didn't work so userspace doesn't have the data in the first place, or because the actual ioctl returns failure), then userspace should rely on the old method using KVM_SET_CLOCK imprecisely instead. That includes on a migration from an older kernel that *lacks* KVM_GET_CLOCK_GUEST, of course. I don't think it strictly matters whether userspace does KVM_SET_CLOCK first, then *tries* KVM_SET_CLOCK_GUEST, or whether it tries KVM_SET_CLOCK_GUEST and then only calls KVM_SET_CLOCK on failure? I'd probably be inclined not to use KVM_SET_CLOCK at all unless it is known to be needed? > > +4.145 KVM_GET_CLOCK_GUEST > > +---------------------------- > > + > > +:Capability: none > > +:Architectures: x86_64 > > +:Type: vcpu ioctl > > +:Parameters: struct pvclock_vcpu_time_info (out) > > +:Returns: 0 on success, <0 on error > > + > > +Retrieves the current time information structure used for KVM/PV clock= s, > > +in precisely the form advertised to the guest vCPU, which gives parame= ters > > +for a direct conversion from a guest TSC value to nanoseconds. > > + > > +When the KVM clock is not in "master clock" mode, for example because = the > > +host TSC is unreliable or the guest TSCs are oddly configured, the KVM= clock > > +is actually defined by the host CLOCK_MONOTONIC_RAW instead of the gue= st TSC. > > +In this case, the KVM_GET_CLOCK_GUEST ioctl returns -EINVAL. > > + > > +4.146 KVM_SET_CLOCK_GUEST > > +---------------------------- > > + > > +:Capability: none >=20 > Do we need a KVM_CHECK_EXTENSION capability for this? If userspace wants = to > support the new API, should it detect availability via KVM_CHECK_EXTENSIO= N, or > simply try the ioctl and handle failure? That might be conventional, I suppose. But I suspect Jack's thinking was that userspace is going to have to *try* it anyway, and still might have to fall back to what KVM_SET_CLOCK can manage, so userspace probably wouldn't even bother to check that capability; it doesn't matter. Since then, we've added some more attributes in this series though, and it probably is worth adding a cap which advertises them *all*? Something like KVM_CAP_CLOCK_PRECISION_API? > > +#ifdef CONFIG_X86_64 > > +static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __u= ser *argp) > > +{ > > + struct pvclock_vcpu_time_info hv_clock =3D {}; > > + struct kvm_vcpu_arch *vcpu =3D &v->arch; > > + struct kvm_arch *ka =3D &v->kvm->arch; > > + unsigned int seq; > > + > > + /* > > + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the pvclock > > + * has never been generated at all, call kvm_guest_time_update(). > > + */ > > + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, v) || !vcpu->hw_tsc_hz) { >=20 > This was flagged by AI, and I am still checking whether it is a real issu= e. >=20 > What happens if KVM_REQ_MASTERCLOCK_UPDATE and KVM_REQ_CLOCK_UPDATE are b= oth > pending? >=20 > From my perspective, I am also curious how we should reason about this in= other > scenarios in the future. Specifically, when do we need to process > KVM_REQ_MASTERCLOCK_UPDATE before KVM_REQ_CLOCK_UPDATE, and when is it > acceptable not to? I noticed that kvm_cpuid() already processes only > KVM_REQ_CLOCK_UPDATE. The way I've been thinking about it =E2=80=94 and I'm only two cups of coff= ee into Monday so take those words literally and don't think of them as British understatement of something I believe is absolute truth =E2=80=94 i= s that MASTERCLOCK_UPDATE is updating the actual clock for the whole VM, while CLOCK_UPDATE is about *putting* that information into the per- vCPU pvclock structures. So after a MASTERCLOCK_UPDATE, we need to do a CLOCK_UPDATE on all vCPUs to disseminate the result. Which means that if CLOCK_UPDATE is already pending before a MASTERCLOCK_UPDATE, it's probably redundant and might as well be cleared because it's only going to get set *again* in kvm_end_pvclock_update()?=20 > > + /* > > + * Calculate the guest TSC at the new reference point, and the > > + * corresponding KVM clock value according to user_hv_clock. > > + * Adjust kvmclock_offset so both definitions agree. > > + */ > > + guest_tsc =3D kvm_read_l1_tsc(v, ka->master_cycle_now); > > + user_clk_ns =3D __pvclock_read_cycles(&user_hv_clock, guest_tsc); > > + ka->kvmclock_offset =3D user_clk_ns - ka->master_kernel_ns; >=20 > I used to explore adjusting ka->kvmclock_offset in KVM_SET_CLOCK based on= the > old hv_clock and the new hv_clock long time ago. At that time, my concern= was > what would happen if userspace provided bogus values. Theoretically, this= is > possible with any ioctl. My concern may be unnecessary. >=20 > Would it be helpful to validate that the delta is within a reasonable ran= ge, > e.g. that the drift can never be more than five minutes (forward or backw= ard)? Setting confidential guests aside, which have their own way of trusting the TSC and should never even *consider* using kvmclock, surely this is supposed to be *entirely* under the control of the VMM? The kernel has no business deciding what is 'bogus'? If a guest has been running for months on a previous host and is migrated to a new host, don't we expect that the KVM clock of the new VM on the new host is tweaked from its default near-zero after creation, to some large amount? --=-PC39DHWiBkFfVKw6GO8r Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et 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AFNElJ9M7OIkfInCPcuoZxX92XEQx0l9iqnoNcby7cPDQCL1+VRbH2sBj+lKkHrO3Ha6lefw1AxTlAhX0EI=@lists.xenproject.org X-Gm-Message-State: AOJu0Yx/EB865yb/GdrJQGeyo26/+imky6dzQwaFKwwC7B6VejcSvyhi ZnZHZ+2kySWXSGtezar0MC06E7YWvHVdypr2odFeyE5v6Mzlzlal9k0a1xC+TQq4Wg== X-Gm-Gg: Acq92OEFYMzVkbacx7lu2H6yVZM9lC59tMt2JvPtovBe8LpnzYqMg/t/VCIsVHzfK/U Jong+eAMHsQTeotBIoZweq/id0fSDQhZML0LBzlfBWr80AXv1H6qoI7AuNoh7u0LqlTGS2Wgi+Q 6YJemrIvj18XGUkLYKZ9cF/rtYOAvAohJZ3b0yvt2SDqVHNa8JHj4g/j1ygRvaLB7gMRFAmE5SP YCeje4oRLG1UgWPy4as36XCTHBZgxzwrFLIvfS3sfJYKgyVzryJrGrQYJXYWrGN3/6jJNrsnDh4 6Z7sS/C5mArcKlCDIbkrc0oF22DGv3SSBcfigqwxnXCgSCxz+RYd/Ett+u57ALbV4teaDU8ChrW cEvg+TBlK0qrkf+m3uy9XK1pCkMJuLjycQXMYyGVC/lNW4VlTvyQj2bF3NBLBQdlLDKQ1qshhMf OFLQs3S7iL0naRnpnXBbcQHI/uiAj3ArWtZATImUdxapFZVNeCUjhJ8phKGPqTmvJ7hf6nPai9+ HIPmwn0u36yxVJcgCwHdz3rzQ== X-Received: by 2002:a05:600c:c4a7:b0:48a:53cb:8604 with SMTP id 5b1f17b1804b1-48fe539519dmr209155345e9.14.1779097729021; Mon, 18 May 2026 02:48:49 -0700 (PDT) Message-ID: <784e95e0-1a77-46eb-a4ef-bc8be8c9b176@suse.com> Date: Mon, 18 May 2026 11:48:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 To: Andrew Cooper Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , "xen-devel@lists.xenproject.org" References: <8ef5af19-7660-4ee9-9cf6-094c744abd0c@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8ef5af19-7660-4ee9-9cf6-094c744abd0c@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779097729-7D9808B7-8E4CF4B9/0/0 X-purgate-type: clean X-purgate-size: 1080 On 13.05.2026 19:00, Andrew Cooper wrote: > On 13/05/2026 3:03 pm, Jan Beulich wrote: >> ... ("Conversions shall not be performed between a pointer to an >> incomplete type and any other type"): Add an intermediate cat to void *. > > cast > >> Signed-off-by: Jan Beulich >> --- >> https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14351897188 >> (covering more than just this) >> >> --- a/xen/arch/x86/cpu/mcheck/mce.c >> +++ b/xen/arch/x86/cpu/mcheck/mce.c >> @@ -1264,7 +1264,7 @@ static void cf_check __maybe_unused x86_ >> >> #if BITS_PER_LONG == 64 >> >> -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) >> +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) > > The interface here is horrible, because we're passing a pointer to a > uint64_t to userspace and back. > > But, can't we just cast through unsigned long instead?  The compiler is > happy, and that feels safer than using a pointer type. As per https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14416863057 that doesn't work. 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("Conversions shall not be performed between a pointer to an incomplete type and any other type"): Add an intermediate cast to unsigned long. Signed-off-by: Jan Beulich --- v2: Add comment. --- a/xen/arch/x86/cpu/mcheck/mce.c +++ b/xen/arch/x86/cpu/mcheck/mce.c @@ -1264,7 +1264,8 @@ static void cf_check __maybe_unused x86_ #if BITS_PER_LONG == 64 -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) +/* Two layers of casting to cover Misra C:2012 rule 11.2. */ +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) #define COOKIE2ID(c) ((uint64_t)(c)) #elif defined(BITS_PER_LONG) From xen-devel-bounces@lists.xenproject.org Mon May 18 10:58:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 10:58:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311765.1581911 (Exim 4.92) (envelope-from ) id 1wOvfi-00041z-UX; Mon, 18 May 2026 10:58:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311765.1581911; Mon, 18 May 2026 10:58:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOvfi-00041r-QV; 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Mon, 18 May 2026 03:58:03 -0700 (PDT) MIME-Version: 1.0 References: <8973fc6bf69d8b20cebb61289c1b8596b1a09900.1778605274.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 13:57:52 +0300 X-Gm-Features: AVHnY4JIQPONCjjmKRJsEdQBFTYJgXXhCyzRS5OaDDBSDz37fWZ0avdzJM1muVQ Message-ID: Subject: Re: [PATCH v9 04/13] xen/arm: gic-v3: Implement GICv3 suspend/resume functions To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1779101884-0A573C48-CD234429/0/0 X-purgate-type: clean X-purgate-size: 9698 Hi Luca, Thank you for the detailed review. On Wed, May 13, 2026 at 7:12=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > +} > > + > > +static int gicv3_disable_redist(void) > > +{ > > + void __iomem *waker =3D GICD_RDIST_BASE + GICR_WAKER; > > + s_time_t deadline; > > + > > + /* > > + * Avoid infinite loop if Non-secure does not have access to GICR_= WAKER. > > + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: > > + * When GICD_CTLR.DS =3D=3D 0 and an access is Non-secure acce= sses to this > > + * register are RAZ/WI. > > + */ > > + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) > > + return 0; > > + > > + deadline =3D NOW() + MILLISECS(1000); > > + > > + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, w= aker); > > + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) =3D=3D = 0 ) > > + { > > + if ( NOW() > deadline ) > > + { > > + printk("GICv3: Timeout waiting for redistributor to sleep\= n"); > > I think here we should clear GICR_WAKER_ProcessorSleep, the Arm IHI 0069H= .b, section > 11.1 says that > > =E2=80=9C=E2=80=9D" > When GICR_WAKER.ProcessorSleep =3D=3D 1 or GICR_WAKER.ChildrenAsleep =3D= =3D 1 then a write to any GICC_*, > GICV_*, GICH_*, ICC_*, ICV_*, or ICH_* registers, other than those in the= following list, is unpredictable: > =E2=80=A2 ICC_SRE_EL1. > =E2=80=A2 ICC_SRE_EL2. > =E2=80=A2 ICC_SRE_EL3 > =E2=80=9C"" > But in the error path used in gicv3_suspend() we are writing ICH_HCR_EL2 = and ICC_IGRPEN1_EL1. Agreed. I will fix the abort path by calling gicv3_enable_redist() before restoring the CPU/virtual interface state. > > > + return -ETIMEDOUT; > > + } > > + cpu_relax(); > > + udelay(10); > > + } > > + > > + return 0; > > +} > > + > > +#define GET_SPI_REG_OFFSET(name, is_espi) \ > > + ((is_espi) ? GICD_##name##nE : GICD_##name) > > + > > +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + irqs->icfgr[0] =3D readl_relaxed(base); > > + irqs->icfgr[1] =3D readl_relaxed(base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + irqs->ipriorityr[irq] =3D readl_relaxed(base + 4 * irq); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + irqs->irouter[irq] =3D readq_relaxed_non_atomic(base + 8 * irq= ); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + irqs->isactiver =3D readl_relaxed(base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + irqs->isenabler =3D readl_relaxed(base); > > +} > > + > > +static void gicv3_restore_spi_irq_config(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(ir= qs->icfgr); > > + writel_relaxed(irqs->icfgr[0], base); > > + writel_relaxed(irqs->icfgr[1], base + 4); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); > > + base +=3D i * sizeof(irqs->ipriorityr); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->ipriorityr); irq++ ) > > + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); > > +} > > + > > +static void gicv3_restore_spi_irq_routing(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi= ) > > +{ > > + void __iomem *base; > > + unsigned int irq; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); > > + base +=3D i * sizeof(irqs->irouter); > > + for ( irq =3D 0; irq < ARRAY_SIZE(irqs->irouter); irq++ ) > > + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); > > +} > > + > > +static void gicv3_restore_spi_irq_state(struct dist_irq_block *irqs, > > + unsigned int i, bool is_espi) > > +{ > > + void __iomem *base; > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); > > + base +=3D i * sizeof(irqs->isenabler); > > + writel_relaxed(irqs->isenabler, base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; > > + writel_relaxed(GENMASK(31, 0), base); > > + > > + base =3D GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); > > + base +=3D i * sizeof(irqs->isactiver); > > + writel_relaxed(irqs->isactiver, base); > > +} > > + > > +static int gicv3_suspend(void) > > +{ > > + unsigned int i; > > + void __iomem *base; > > + int ret; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + /* Save GICC configuration */ > > + gicv3_ctx.cpu.ctlr =3D READ_SYSREG(ICC_CTLR_EL1); > > + gicv3_ctx.cpu.pmr =3D READ_SYSREG(ICC_PMR_EL1); > > + gicv3_ctx.cpu.bpr =3D READ_SYSREG(ICC_BPR1_EL1); > > + gicv3_ctx.cpu.sre_el2 =3D READ_SYSREG(ICC_SRE_EL2); > > + gicv3_ctx.cpu.grpen =3D READ_SYSREG(ICC_IGRPEN1_EL1); > > + > > + gicv3_disable_interface(); > > Should we check that ICC_AP1R_EL1 =3D=3D 0 before continuing our > suspend? Like we do in the GICv2? Yes, I agree. This is the GICv3 equivalent of the GICv2 GICC_APR check for the physical CPU interface active-priority state. I will use ICH_VTR_EL2.PREbits to decide which AP1R registers are implemented, so we do not read an unimplemented ICC_AP1R_EL1 register. > > > + > > + ret =3D gicv3_disable_redist(); > > + if ( ret ) > > + goto out_enable_iface; > > + > > + /* Save GICR configuration */ > > + gicv3_redist_wait_for_rwp(); > > + > > + base =3D GICD_RDIST_BASE; > > + > > + rdist->ctlr =3D readl_relaxed(base + GICR_CTLR); > > + > > + rdist->propbase =3D readq_relaxed(base + GICR_PROPBASER); > > + rdist->pendbase =3D readq_relaxed(base + GICR_PENDBASER); > > + > > + base =3D GICD_RDIST_SGI_BASE; > > + > > + /* Save priority on PPI and SGI interrupts */ > > + for ( i =3D 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) > > + rdist->ipriorityr[i] =3D readl_relaxed(base + GICR_IPRIORITYR0= + 4 * i); > > + > > + rdist->isactiver =3D readl_relaxed(base + GICR_ISACTIVER0); > > + rdist->isenabler =3D readl_relaxed(base + GICR_ISENABLER0); > > + rdist->igroupr =3D readl_relaxed(base + GICR_IGROUPR0); > > + rdist->icfgr =3D readl_relaxed(base + GICR_ICFGR1); > > + > > + /* Save GICD configuration */ > > + gicv3_dist_wait_for_rwp(); > > + gicv3_ctx.dist.ctlr =3D readl_relaxed(GICD + GICD_CTLR); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, fals= e); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, tru= e); > > +#endif > > + > > + return 0; > > + > > + out_enable_iface: > > + gicv3_hyp_enable(true); > > + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); > > + isb(); > > + > > + return ret; > > +} > > + > > +static void gicv3_resume(void) > > +{ > > + int ret; > > + unsigned int i; > > + uint32_t dist_ctlr; > > + void __iomem *base; > > + struct redist_ctx *rdist =3D &gicv3_ctx.rdist; > > + > > + writel_relaxed(0, GICD + GICD_CTLR); > > + > > + for ( i =3D NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i +=3D 32 = ) > > + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) = * 4); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) > > + gicv3_restore_spi_irq_config(gicv3_ctx.dist.irqs + i - 1, i, f= alse); > > + > > +#ifdef CONFIG_GICV3_ESPI > > + for ( i =3D 0; i < gic_number_espis() / 32; i++ ) > > + { > > + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPRnE + i * 4); > > + gicv3_restore_spi_irq_config(gicv3_ctx.dist.espi_irqs + i, i, = true); > > + } > > +#endif > > + > > + dist_ctlr =3D gicv3_ctx.dist.ctlr & GICD_CTLR_ARE_NS; > > + if ( dist_ctlr ) > > + { > > + writel_relaxed(dist_ctlr, GICD + GICD_CTLR); > > + gicv3_dist_wait_for_rwp(); > > + > > + for ( i =3D 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ = ) > > + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.irqs + i - 1,= i, > > + false); > > I think we have an issue in this loop as we are accessing GICD_IROUTER<10= 20=E2=80=A61023> > and GICD_IPRIORITYR255, while the specs says 1020=E2=80=A61023 are reserv= ed and > GICD_IPRIORITYR goes from 0 to 254. here and in the gicv3_suspend() Ack. I will fix this. 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>> intinfo_t event; >> >> + if ( vmcb->_vintr.fields.vnmi_enable ) >> + { >> + vmcb->_vintr.fields.vnmi_pending = true; >> + return; >> + } > How does all of this work during migration to a vNMI-incapable host? The > hw feature is used ... > >> --- a/xen/arch/x86/hvm/svm/vmcb.c >> +++ b/xen/arch/x86/hvm/svm/vmcb.c >> @@ -185,6 +185,8 @@ static int construct_vmcb(struct vcpu *v) >> if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) >> v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; >> >> + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; > ... unconditionally when available (i.e. the feature not being there > won't prevent the migration), yet the vnmi_{pend,block}ing fields are > lost during migration (aiui). Are building on the fact that all of this > state is already getting lost while migrating? I can't quite parse the final sentence, but yes; migration has always lost the NMI state. This goes largely unnoticed because guests don't issue their final suspend from NMI context. ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 18 11:42:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 11:42:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311789.1581929 (Exim 4.92) (envelope-from ) id 1wOwMI-0002l8-BK; Mon, 18 May 2026 11:42:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311789.1581929; Mon, 18 May 2026 11:42:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOwMI-0002l0-88; Mon, 18 May 2026 11:42:06 +0000 Received: by outflank-mailman (input) for mailman id 1311789; Mon, 18 May 2026 11:42:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOwMG-0002ks-0s for xen-devel@lists.xenproject.org; Mon, 18 May 2026 11:42:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOwME-008VEC-TM for xen-devel@lists.xenproject.org; Mon, 18 May 2026 13:42:02 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0afb02-2eae-0a2a0a5409dd-0a2a4503b51c-28 for ; Mon, 18 May 2026 13:42:02 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0afb0a-672d-0a2a45030019-d1558035cc35-3 for ; Mon, 18 May 2026 13:42:02 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so23672315e9.0 for ; Mon, 18 May 2026 04:42:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 18 May 2026 04:42:02 -0700 (PDT) Message-ID: Date: Mon, 18 May 2026 13:42:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH v2] x86/shim: adjust for Misra C:2012 rule 20.12 To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; 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("A macro parameter used as an operand to the `#' or `##' operators, which is itself subject to further macro replacement, shall only be used as an operand to these operators"). Leverage the SAF-6 annotation we have available. Signed-off-by: Jan Beulich --- As per the placement in arm/tee/ffa.c two instances of the SAF comment (ahead of the macro definitions) should suffice. Eclair demands one instance per macro use here, however (much like we have it in x86/dom{ain,ctl}.c). --- v2: Use SAF-6 annotations. --- a/xen/arch/x86/pv/shim.c +++ b/xen/arch/x86/pv/shim.c @@ -124,8 +124,10 @@ void __init pv_shim_fixup_e820(void) ASSERT(i < ARRAY_SIZE(reserved_pages)); \ reserved_pages[i++].mfn = pfn; \ }) + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ MARK_PARAM_RAM(HVM_PARAM_STORE_PFN); if ( !pv_console ) + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ MARK_PARAM_RAM(HVM_PARAM_CONSOLE_PFN); #undef MARK_PARAM_RAM } @@ -207,10 +209,14 @@ void __init pv_shim_setup_dom(struct dom evtchn_reserve(d, param); \ } \ }) + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ SET_AND_MAP_PARAM(HVM_PARAM_STORE_PFN, si->store_mfn, store_va); + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ SET_AND_MAP_PARAM(HVM_PARAM_STORE_EVTCHN, si->store_evtchn, 0); + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_EVTCHN, si->console.domU.evtchn, 0); if ( !pv_console ) + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_PFN, si->console.domU.mfn, console_va); #undef SET_AND_MAP_PARAM From xen-devel-bounces@lists.xenproject.org Mon May 18 11:46:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 11:46:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311798.1581939 (Exim 4.92) (envelope-from ) id 1wOwQi-0003Iw-SF; Mon, 18 May 2026 11:46:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311798.1581939; Mon, 18 May 2026 11:46:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOwQi-0003Ip-OA; Mon, 18 May 2026 11:46:40 +0000 Received: by outflank-mailman (input) for mailman id 1311798; Mon, 18 May 2026 11:46:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOwQh-0003Ij-GK for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 04:46:24 -0700 (PDT) From: =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= Subject: [PATCH v2] arm: Fix PT_PT table descriptor value and comment Date: Mon, 18 May 2026 13:45:52 +0200 Message-ID: <20260518114552.29687-1-gabi.qs.mail@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <2ef09a6a-f78f-47a5-8ffb-cd03cb51fc1b@amd.com> References: <2ef09a6a-f78f-47a5-8ffb-cd03cb51fc1b@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779104786-3B360938-8F9F34D4/0/0 X-purgate-type: clean X-purgate-size: 2246 Per ARMv7-A/ARMv8-A ARM, bits [11:2] of table descriptors are ignored by hardware. The original comment incorrectly described block/page descriptor fields (nG, SH, AP, NS, ATTR) which do not exist in the table descriptor format. Set PT_PT to 0x403: - Bit 0 (P): Valid bit (required) - Bit 1 (T): Table descriptor type (required) - Bit 10 (AF): Access flag (future-proof for FEAT_HAFT) Hardware ignores bits [11:2] but setting AF prepares for ARMv9's FEAT_HAFT. Using 0x403 rather than minimal 0x3 provides forward compatibility while avoiding unnecessary reserved bits. This updates both arm32 and arm64 for consistency. Signed-off-by: Gabriel Quintáns Souto --- Changes in v2: - Apply fix to both arm32 and arm64 - Use 0x403 instead of 0x743 --- xen/arch/arm/arm32/mmu/head.S | 2 +- xen/arch/arm/arm64/mmu/head.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm32/mmu/head.S b/xen/arch/arm/arm32/mmu/head.S index 5032e6c075..cab7be0621 100644 --- a/xen/arch/arm/arm32/mmu/head.S +++ b/xen/arch/arm/arm32/mmu/head.S @@ -8,7 +8,7 @@ #include #include -#define PT_PT 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ +#define PT_PT 0x403 /* AF=1 T=1 P=1 (bits [11:2] ignored in table descriptors) */ #define PT_MEM 0xf7d /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=0 P=1 */ #define PT_MEM_L3 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ #define PT_DEV 0xe71 /* nG=1 AF=1 SH=10 AP=01 NS=1 ATTR=100 T=0 P=1 */ diff --git a/xen/arch/arm/arm64/mmu/head.S b/xen/arch/arm/arm64/mmu/head.S index c3cb262e88..375d703d9b 100644 --- a/xen/arch/arm/arm64/mmu/head.S +++ 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iommu/ipmmu-vmsa: Implement suspend/resume callbacks To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779106672-B695FFF4-25BDDE76/0/0 X-purgate-type: clean X-purgate-size: 7739 Hi Luca, Thank you for the review. On Thu, May 14, 2026 at 6:58=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/pas= sthrough/arm/ipmmu-vmsa.c > > index fa9ab9cb13..e1b47a5824 100644 > > --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c > > @@ -71,6 +71,8 @@ > > }) > > #endif > > > > +#define dev_dbg(dev, fmt, ...) \ > > + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) > > #define dev_info(dev, fmt, ...) \ > > dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) > > #define dev_warn(dev, fmt, ...) \ > > @@ -130,6 +132,24 @@ struct ipmmu_features { > > unsigned int imuctr_ttsel_mask; > > }; > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +struct ipmmu_reg_ctx { > > + unsigned int imttlbr0; > > + unsigned int imttubr0; > > + unsigned int imttbcr; > > + unsigned int imctr; > > +}; > > + > > +struct ipmmu_vmsa_backup { > > + struct device *dev; > > + unsigned int *utlbs_val; > > + unsigned int *asids_val; > > + struct list_head list; > > +}; > > + > > +#endif > > + > > /* Root/Cache IPMMU device's information */ > > struct ipmmu_vmsa_device { > > struct device *dev; > > @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { > > struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; > > unsigned int utlb_refcount[IPMMU_UTLB_MAX]; > > const struct ipmmu_features *features; > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; > > +#endif > > }; > > > > /* > > @@ -547,6 +570,245 @@ static void ipmmu_domain_free_context(struct ipmm= u_vmsa_device *mmu, > > spin_unlock_irqrestore(&mmu->lock, flags); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); > > +static LIST_HEAD(ipmmu_devices_backup); > > + > > +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; > > + > > +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, > > + unsigned int utlb) > > +{ > > + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); > > +} > > + > > +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) > > +{ > > + struct ipmmu_vmsa_backup *backup_data; > > + > > + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); > > + > > + spin_lock(&ipmmu_devices_backup_lock); > > + > > + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) > > + { > > + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(backup_da= ta->dev); > > + unsigned int i; > > + > > + if ( to_ipmmu(backup_data->dev) !=3D mmu ) > > + continue; > > + > > + for ( i =3D 0; i < fwspec->num_ids; i++ ) > > + { > > + unsigned int utlb =3D fwspec->ids[i]; > > + > > + backup_data->asids_val[i] =3D ipmmu_imuasid_read(mmu, utlb= ); > > + backup_data->utlbs_val[i] =3D ipmmu_imuctr_read(mmu, utlb)= ; > > + } > > + } > > + > > + spin_unlock(&ipmmu_devices_backup_lock); > > +} > > + > > +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) > > +{ > > + struct ipmmu_vmsa_backup *backup_data; > > + > > + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); > > + > > + spin_lock(&ipmmu_devices_backup_lock); > > + > > + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) > > + { > > + struct iommu_fwspec *fwspec =3D dev_iommu_fwspec_get(backup_da= ta->dev); > > + unsigned int i; > > + > > + if ( to_ipmmu(backup_data->dev) !=3D mmu ) > > + continue; > > + > > + for ( i =3D 0; i < fwspec->num_ids; i++ ) > > + { > > + unsigned int utlb =3D fwspec->ids[i]; > > + > > + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); > > + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); > > + } > > + } > > + > > + spin_unlock(&ipmmu_devices_backup_lock); > > +} > > + > > +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *doma= in) > > +{ > > + struct ipmmu_vmsa_device *mmu =3D domain->mmu->root; > > + struct ipmmu_reg_ctx *regs =3D mmu->reg_backup[domain->context_id]= ; > > + > > + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->con= text_id); > > + > > + regs->imttlbr0 =3D ipmmu_ctx_read_root(domain, IMTTLBR0); > > + regs->imttubr0 =3D ipmmu_ctx_read_root(domain, IMTTUBR0); > > + regs->imttbcr =3D ipmmu_ctx_read_root(domain, IMTTBCR); > > + regs->imctr =3D ipmmu_ctx_read_root(domain, IMCTR); > > +} > > + > > +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *dom= ain) > > +{ > > + struct ipmmu_vmsa_device *mmu =3D domain->mmu->root; > > + struct ipmmu_reg_ctx *regs =3D mmu->reg_backup[domain->context_id= ]; > > NIT: There is a double space before the `=3D` Ack. > > > + > > + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->co= ntext_id); > > + > > + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); > > + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); > > + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); > > + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); > > I see in ipmmu_tlb_invalidate() we do: > dsb(sy); > ipmmu_tlb_sync(domain); > > Is it safe to omit them here? > > > +} > > + > > +/* > > + * Xen: Unlike Linux implementation, Xen uses a single driver instance > > + * for handling all IPMMUs. There is no framework for ipmmu_suspend/re= sume > > + * callbacks to be invoked for each IPMMU device. So, we need to itera= te > > + * through all registered IPMMUs performing required actions. > > + * > > + * Also take care of restoring special settings, such as translation > > + * table format, etc. > > + */ > > +static int __must_check ipmmu_suspend(void) > > +{ > > + struct ipmmu_vmsa_device *mmu; > > + > > + if ( !iommu_enabled ) > > + return 0; > > + > > + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); > > + > > + spin_lock(&ipmmu_devices_lock); > > + > > + list_for_each_entry( mmu, &ipmmu_devices, list ) > > + { > > + if ( ipmmu_is_root(mmu) ) > > + { > > + unsigned int i; > > + > > + for ( i =3D 0; i < mmu->num_ctx; i++ ) > > + { > > + if ( !mmu->domains[i] ) > > + continue; > > + ipmmu_domain_backup_context(mmu->domains[i]); > > + } > > + } > > + else > > + ipmmu_utlbs_backup(mmu); > > + } > > + > > + spin_unlock(&ipmmu_devices_lock); > > + > > + return 0; > > +} > > + > > +static void ipmmu_resume(void) > > +{ > > + struct ipmmu_vmsa_device *mmu; > > + > > + if ( !iommu_enabled ) > > + return; > > + > > + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); > > + > > + spin_lock(&ipmmu_devices_lock); > > + > > + list_for_each_entry( mmu, &ipmmu_devices, list ) > > This loop has an ordering problem because we can run ipmmu_utlbs_restore(= ) before > the root ipmmu is restored (ipmmu_probe() uses `list_add()`). > Maybe going twice on the list, restoring first the root and in the second= round the rest > should work. Ack, good point. I will split the resume path into two passes: restore the Root IPMMU contex= t state first, then restore the micro-TLB state on Cache IPMMUs afterwards. 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Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/emulate.c | 4 +++- xen/arch/x86/hvm/hvm.c | 2 +- xen/arch/x86/hvm/io.c | 6 +++--- xen/arch/x86/hvm/ioreq.c | 2 +- xen/arch/x86/hvm/svm/emulate.c | 4 ++-- xen/arch/x86/hvm/vmx/realmode.c | 2 +- xen/arch/x86/include/asm/hvm/emulate.h | 2 ++ 7 files changed, 13 insertions(+), 9 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index bb1bb03ac4e9..a96d7814f91c 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2868,7 +2868,7 @@ void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, struct hvm_emulate_ctxt ctx = {}; int rc; - hvm_emulate_init_once(&ctx, NULL, guest_cpu_user_regs()); + hvm_emulate_init_once(&ctx, NULL, NULL, guest_cpu_user_regs()); switch ( kind ) { @@ -2929,6 +2929,7 @@ void hvm_emulate_one_vm_event(enum emul_kind kind, unsigned int trapnr, void hvm_emulate_init_once( struct hvm_emulate_ctxt *hvmemul_ctxt, hvm_emulate_validate_t *validate, + const char *descr, struct cpu_user_regs *regs) { struct vcpu *curr = current; @@ -2941,6 +2942,7 @@ void hvm_emulate_init_once( hvmemul_get_seg_reg(x86_seg_ss, hvmemul_ctxt); hvmemul_ctxt->validate = validate; + hvmemul_ctxt->descr = descr; hvmemul_ctxt->ctxt.regs = regs; hvmemul_ctxt->ctxt.cpu_policy = curr->domain->arch.cpu_policy; hvmemul_ctxt->ctxt.force_writeback = true; diff --git a/xen/arch/x86/hvm/hvm.c b/xen/arch/x86/hvm/hvm.c index f759a397c557..de399bd9024a 100644 --- a/xen/arch/x86/hvm/hvm.c +++ b/xen/arch/x86/hvm/hvm.c @@ -3835,7 +3835,7 @@ void hvm_ud_intercept(struct cpu_user_regs *regs) bool should_emulate = false; struct hvm_emulate_ctxt ctxt; - hvm_emulate_init_once(&ctxt, NULL, regs); + hvm_emulate_init_once(&ctxt, NULL, NULL, regs); if ( opt_hvm_fep ) { diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index 23a5ea0e6197..d9838c36d330 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -55,16 +55,16 @@ bool hvm_emulate_one_insn(hvm_emulate_validate_t *validate, const char *descr) struct hvm_emulate_ctxt ctxt; int rc; - hvm_emulate_init_once(&ctxt, validate, guest_cpu_user_regs()); + hvm_emulate_init_once(&ctxt, validate, descr, guest_cpu_user_regs()); switch ( rc = hvm_emulate_one(&ctxt, VIO_no_completion) ) { case X86EMUL_UNHANDLEABLE: - hvm_dump_emulation_state(XENLOG_G_WARNING, descr, &ctxt, rc); + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); return false; case X86EMUL_UNRECOGNIZED: - hvm_dump_emulation_state(XENLOG_G_WARNING, descr, &ctxt, rc); + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; diff --git a/xen/arch/x86/hvm/ioreq.c b/xen/arch/x86/hvm/ioreq.c index a5fa97e149ba..42ff796c6cb9 100644 --- a/xen/arch/x86/hvm/ioreq.c +++ b/xen/arch/x86/hvm/ioreq.c @@ -39,7 +39,7 @@ bool arch_vcpu_ioreq_completion(enum vio_completion completion) { struct hvm_emulate_ctxt ctxt; - hvm_emulate_init_once(&ctxt, NULL, guest_cpu_user_regs()); + hvm_emulate_init_once(&ctxt, NULL, NULL, guest_cpu_user_regs()); vmx_realmode_emulate_one(&ctxt); hvm_emulate_writeback(&ctxt); diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 1f5436c8ea5d..1dd830a31bd7 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -71,7 +71,7 @@ unsigned int svm_get_insn_len(struct vcpu *v, unsigned int instr_enc) #endif ASSERT(v == current); - hvm_emulate_init_once(&ctxt, NULL, guest_cpu_user_regs()); + hvm_emulate_init_once(&ctxt, NULL, NULL, guest_cpu_user_regs()); hvm_emulate_init_per_insn(&ctxt, NULL, 0); state = x86_decode_insn(&ctxt.ctxt, hvmemul_insn_fetch); if ( IS_ERR_OR_NULL(state) ) @@ -116,7 +116,7 @@ unsigned int svm_get_task_switch_insn_len(void) struct x86_emulate_state *state; unsigned int emul_len, modrm_reg; - hvm_emulate_init_once(&ctxt, NULL, guest_cpu_user_regs()); + hvm_emulate_init_once(&ctxt, NULL, NULL, guest_cpu_user_regs()); hvm_emulate_init_per_insn(&ctxt, NULL, 0); state = x86_decode_insn(&ctxt.ctxt, hvmemul_insn_fetch); if ( IS_ERR_OR_NULL(state) ) diff --git a/xen/arch/x86/hvm/vmx/realmode.c b/xen/arch/x86/hvm/vmx/realmode.c index ff44ddcfa627..9879533280d0 100644 --- a/xen/arch/x86/hvm/vmx/realmode.c +++ b/xen/arch/x86/hvm/vmx/realmode.c @@ -163,7 +163,7 @@ void vmx_realmode(struct cpu_user_regs *regs) if ( intr_info & INTR_INFO_VALID_MASK ) __vmwrite(VM_ENTRY_INTR_INFO, 0); - hvm_emulate_init_once(&hvmemul_ctxt, NULL, regs); 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This can result in subtle bugs, e.g. injecting #GP with trap rather than fault semantics. When using nested virt, these bugs may become security issues if it allows L2 to attack L1 (because L0 has done something unexpected). To fix this, we plan to unify the VMEXIT (fast) path and emulated instruction paths with everything going through the emulator but the fast path short-circuiting some parts. This patch series adds the basic infrastructure and converts two SVM VMEXITs: halt and read/write CR The other motivation to do this work is to arrange it so that there is only a single place where Xen needs to consider whether an instruction/event is something that L1 cares about. This is very much an RFC at this point so I'm mainly looking for feedback on the overall approach. Thanks, Ross Ross Lagerwall (7): x86/hvm: Move description into hvm_emulate_ctxt x86/hvm: Introduce hvm_emulate_one_ctxt x86/emul: Separate out instruction completion x86/hvm: Support a fast path during emulation x86/hvm: Move INSTR_* constants to hvm.h x86/svm: Use the emulator path for VMEXIT_HLT x86/svm: Use the emulator path for VMEXIT_CR* xen/arch/x86/hvm/emulate.c | 180 +++++++++++++++++++------ xen/arch/x86/hvm/hvm.c | 2 +- xen/arch/x86/hvm/io.c | 19 ++- xen/arch/x86/hvm/ioreq.c | 2 +- xen/arch/x86/hvm/svm/emulate.c | 6 +- xen/arch/x86/hvm/svm/svm.c | 52 +++---- xen/arch/x86/hvm/svm/svm.h | 30 +---- xen/arch/x86/hvm/vmx/realmode.c | 2 +- xen/arch/x86/include/asm/hvm/emulate.h | 13 ++ xen/arch/x86/include/asm/hvm/hvm.h | 31 +++++ xen/arch/x86/x86_emulate/x86_emulate.c | 48 ++++--- xen/arch/x86/x86_emulate/x86_emulate.h | 3 + 12 files changed, 252 insertions(+), 136 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 13:14:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 13:14:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311844.1581983 (Exim 4.92) (envelope-from ) id 1wOxng-00007g-0U; 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This will be needed to merge the instruction emulator and VMEXIT fast paths. Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/io.c | 17 +++++++++++------ xen/arch/x86/include/asm/hvm/emulate.h | 1 + 2 files changed, 12 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/io.c b/xen/arch/x86/hvm/io.c index d9838c36d330..7dc6f64b646e 100644 --- a/xen/arch/x86/hvm/io.c +++ b/xen/arch/x86/hvm/io.c @@ -53,27 +53,32 @@ void send_timeoffset_req(unsigned long timeoff) bool hvm_emulate_one_insn(hvm_emulate_validate_t *validate, const char *descr) { struct hvm_emulate_ctxt ctxt; - int rc; hvm_emulate_init_once(&ctxt, validate, descr, guest_cpu_user_regs()); + return hvm_emulate_one_ctxt(&ctxt); +} - switch ( rc = hvm_emulate_one(&ctxt, VIO_no_completion) ) +bool hvm_emulate_one_ctxt(struct hvm_emulate_ctxt *ctxt) +{ + int rc = hvm_emulate_one(ctxt, VIO_no_completion); + + switch ( rc ) { case X86EMUL_UNHANDLEABLE: - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); return false; case X86EMUL_UNRECOGNIZED: - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); break; case X86EMUL_EXCEPTION: - hvm_inject_event(&ctxt.ctxt.event); + hvm_inject_event(&ctxt->ctxt.event); break; } - hvm_emulate_writeback(&ctxt); + hvm_emulate_writeback(ctxt); return true; } diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h index 2801d14d5455..084e2bd90588 100644 --- a/xen/arch/x86/include/asm/hvm/emulate.h +++ b/xen/arch/x86/include/asm/hvm/emulate.h @@ -65,6 +65,7 @@ enum emul_kind { bool __nonnull(1, 2) hvm_emulate_one_insn( hvm_emulate_validate_t *validate, const char *descr); +bool hvm_emulate_one_ctxt(struct hvm_emulate_ctxt *ctxt); int hvm_emulate_one( struct hvm_emulate_ctxt *hvmemul_ctxt, enum vio_completion completion); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 13:14:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 13:14:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311845.1581992 (Exim 4.92) (envelope-from ) id 1wOxni-0000Ng-8m; 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Signed-off-by: Ross Lagerwall --- xen/arch/x86/x86_emulate/x86_emulate.c | 48 +++++++++++++++----------- xen/arch/x86/x86_emulate/x86_emulate.h | 3 ++ 2 files changed, 30 insertions(+), 21 deletions(-) diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c b/xen/arch/x86/x86_emulate/x86_emulate.c index 364e6c092ded..76fbebf96b4d 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.c +++ b/xen/arch/x86/x86_emulate/x86_emulate.c @@ -320,7 +320,7 @@ do { \ rc = ops->insn_fetch(ip, NULL, 0, ctxt); \ if ( rc ) goto done; \ _regs.r(ip) = ip; \ - singlestep = _regs.eflags & X86_EFLAGS_TF; \ + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; \ } while (0) #define validate_far_branch(cs, ip) ({ \ @@ -337,7 +337,7 @@ do { \ ({ \ validate_far_branch(cs, newip); \ _regs.r(ip) = (newip); \ - singlestep = _regs.eflags & X86_EFLAGS_TF; \ + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; \ }), \ ops->write_segment(x86_seg_cs, cs, ctxt) \ ) @@ -1234,6 +1234,22 @@ int cf_check x86emul_unhandleable_rw( return X86EMUL_UNHANDLEABLE; } +void x86_emulate_complete(struct x86_emulate_ctxt *ctxt, int rc) +{ + /* Zero the upper 32 bits of %rip if not in 64-bit mode. */ + if ( !mode_64bit() ) + ctxt->regs->r(ip) = (uint32_t)ctxt->regs->r(ip); + + /* Should a singlestep #DB be raised? */ + if ( rc == X86EMUL_OKAY && ctxt->singlestep && !ctxt->retire.mov_ss ) + { + ctxt->retire.singlestep = true; + ctxt->retire.sti = false; + } + + ctxt->regs->eflags &= ~X86_EFLAGS_RF; +} + /* Helper definitions. */ #define op_bytes (state->op_bytes) #define ad_bytes (state->ad_bytes) @@ -1265,8 +1281,6 @@ x86_emulate( uint8_t b, d, *opc = NULL; unsigned int first_byte = 0, elem_bytes, insn_bytes = 0; uint64_t op_mask = ~0ULL; - bool singlestep = (_regs.eflags & X86_EFLAGS_TF) && - !is_branch_step(ctxt, ops); bool sfence = false, fault_suppression = false; struct operand src = { .reg = PTR_POISON }; struct operand dst = { .reg = PTR_POISON }; @@ -1280,6 +1294,9 @@ x86_emulate( init_context(ctxt); + ctxt->singlestep = (_regs.eflags & X86_EFLAGS_TF) && + !is_branch_step(ctxt, ops); + generate_exception_if((mode_vif() && (_regs.eflags & X86_EFLAGS_VIF) && (_regs.eflags & X86_EFLAGS_VIP)), @@ -2064,7 +2081,7 @@ x86_emulate( goto done; _regs.r(ip) = imm1; - singlestep = _regs.eflags & X86_EFLAGS_TF; + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; break; #ifndef X86EMUL_NO_FPU @@ -3103,7 +3120,7 @@ x86_emulate( * Their only mitigation is to use a task gate for handling * #DB (or to not use enable EFER.SCE to start with). */ - singlestep = _regs.eflags & X86_EFLAGS_TF; + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; break; case X86EMUL_OPC(0x0f, 0x06): /* clts */ @@ -3189,7 +3206,7 @@ x86_emulate( ctxt)) != X86EMUL_OKAY ) goto done; - singlestep = _regs.eflags & X86_EFLAGS_TF; + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; break; case X86EMUL_OPC(0x0f, 0x08): /* invd */ @@ -3918,7 +3935,7 @@ x86_emulate( /* In particular mode_64bit() needs to return true from here on. */ ctxt->addr_size = ctxt->sp_size = 64; - singlestep = _regs.eflags & X86_EFLAGS_TF; + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; break; case X86EMUL_OPC(0x0f, 0x35): /* sysexit */ @@ -3958,7 +3975,7 @@ x86_emulate( _regs.r(ip) = op_bytes == 8 ? _regs.r(dx) : _regs.edx; _regs.r(sp) = op_bytes == 8 ? _regs.r(cx) : _regs.ecx; - singlestep = _regs.eflags & X86_EFLAGS_TF; + ctxt->singlestep = _regs.eflags & X86_EFLAGS_TF; break; case X86EMUL_OPC(0x0f, 0x40) ... X86EMUL_OPC(0x0f, 0x4f): /* cmovcc */ @@ -8347,17 +8364,6 @@ x86_emulate( put_fpu(fpu_type, false, state, ctxt, ops); fpu_type = X86EMUL_FPU_none; - /* Zero the upper 32 bits of %rip if not in 64-bit mode. */ - if ( !mode_64bit() ) - _regs.r(ip) = (uint32_t)_regs.r(ip); - - /* Should a singlestep #DB be raised? */ - if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss ) - { - ctxt->retire.singlestep = true; - ctxt->retire.sti = false; - } - if ( rc != X86EMUL_DONE ) *ctxt->regs = _regs; else @@ -8366,7 +8372,7 @@ x86_emulate( rc = X86EMUL_OKAY; } - ctxt->regs->eflags &= ~X86_EFLAGS_RF; + x86_emulate_complete(ctxt, rc); done: put_fpu(fpu_type, insn_bytes > 0 && dst.type == OP_MEM, state, ctxt, ops); diff --git a/xen/arch/x86/x86_emulate/x86_emulate.h b/xen/arch/x86/x86_emulate/x86_emulate.h index 0fd20747dc43..17bf14455cf3 100644 --- a/xen/arch/x86/x86_emulate/x86_emulate.h +++ b/xen/arch/x86/x86_emulate/x86_emulate.h @@ -594,6 +594,7 @@ struct x86_emulate_ctxt } retire; bool event_pending; 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Add a fast path during emulation to use this information and avoid going through the full x86 emulator. Plumbing the fast path through the emulator ensures consistent behaviour. Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/emulate.c | 160 ++++++++++++++++++------- xen/arch/x86/include/asm/hvm/emulate.h | 3 + 2 files changed, 123 insertions(+), 40 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index a96d7814f91c..c9553cd28238 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2724,6 +2724,52 @@ static const struct x86_emulate_ops hvm_emulate_ops = { .vmfunc = hvmemul_vmfunc, }; +static int hvm_emulate_insn_len(struct hvm_emulate_ctxt *hvmemul_ctxt) +{ + struct x86_emulate_state *state; + unsigned long emul_len; + unsigned int instr_opcode, instr_modrm; + unsigned int modrm_rm, modrm_reg; + int modrm_mod; + + state = x86_decode_insn(&hvmemul_ctxt->ctxt, hvmemul_insn_fetch); + if ( IS_ERR_OR_NULL(state) ) + return X86EMUL_EXCEPTION; + + emul_len = x86_insn_length(state, &hvmemul_ctxt->ctxt); + modrm_mod = x86_insn_modrm(state, &modrm_rm, &modrm_reg); + x86_emulate_free_state(state); + + /* Extract components from instr_enc. */ + instr_modrm = hvmemul_ctxt->insn & 0xff; + instr_opcode = hvmemul_ctxt->insn >> 8; + + if ( instr_opcode == hvmemul_ctxt->ctxt.opcode ) + { + if ( !instr_modrm ) + { + hvmemul_ctxt->insn_len = emul_len; + return X86EMUL_OKAY; + } + + if ( modrm_mod == MASK_EXTR(instr_modrm, 0300) && /* octal-ok */ + (modrm_reg & 7) == MASK_EXTR(instr_modrm, 0070) && /* octal-ok */ + (modrm_rm & 7) == MASK_EXTR(instr_modrm, 0007) ) /* octal-ok */ + { + hvmemul_ctxt->insn_len = emul_len; + return X86EMUL_OKAY; + } + } + + printk(XENLOG_G_WARNING + "Insn mismatch: Expected opcode %#x, modrm %#x, got emul_len %lu\n", + instr_opcode, instr_modrm, emul_len); + hvm_dump_emulation_state(XENLOG_G_WARNING, "Insn len", + hvmemul_ctxt, X86EMUL_UNHANDLEABLE); + + return X86EMUL_EXCEPTION; +} + /* * Note that passing VIO_no_completion into this function serves as kind * of (but not fully) an "auto select completion" indicator. When there's @@ -2733,63 +2779,97 @@ static int _hvm_emulate_one(struct hvm_emulate_ctxt *hvmemul_ctxt, const struct x86_emulate_ops *ops, enum vio_completion completion) { - const struct cpu_user_regs *regs = hvmemul_ctxt->ctxt.regs; + struct cpu_user_regs *regs = hvmemul_ctxt->ctxt.regs; struct vcpu *curr = current; uint32_t new_intr_shadow; struct hvm_vcpu_io *hvio = &curr->arch.hvm.hvm_io; int rc; - /* - * Enable caching if it's currently disabled, but leave the cache - * untouched if it's already enabled, for re-execution to consume - * entries populated by an earlier pass. - */ - if ( hvio->cache->num_ents > hvio->cache->max_ents ) + if ( hvmemul_ctxt->insn ) { - ASSERT(curr->io.req.state == STATE_IOREQ_NONE); - hvio->cache->num_ents = 0; + hvm_emulate_init_per_insn(hvmemul_ctxt, NULL, 0); + if ( !hvmemul_ctxt->insn_len ) + { + rc = hvm_emulate_insn_len(hvmemul_ctxt); + if ( rc == X86EMUL_EXCEPTION ) + { + x86_emul_hw_exception(X86_EXC_GP, 0, &hvmemul_ctxt->ctxt); + goto complete_insn; + } + } + + switch ( hvmemul_ctxt->insn ) + { + default: + ASSERT_UNREACHABLE(); + rc = X86EMUL_UNHANDLEABLE; + break; + } + + if ( rc == X86EMUL_OKAY ) + { + regs->rip += hvmemul_ctxt->insn_len; + hvmemul_ctxt->ctxt.singlestep = regs->eflags & X86_EFLAGS_TF; + x86_emulate_complete(&hvmemul_ctxt->ctxt, rc); + } } else - ASSERT(curr->io.req.state == STATE_IORESP_READY); + { + /* No fast path. Go through full emulator */ + /* + * Enable caching if it's currently disabled, but leave the cache + * untouched if it's already enabled, for re-execution to consume + * entries populated by an earlier pass. + */ + if ( hvio->cache->num_ents > hvio->cache->max_ents ) + { + ASSERT(curr->io.req.state == STATE_IOREQ_NONE); + hvio->cache->num_ents = 0; + } + else + ASSERT(curr->io.req.state == STATE_IORESP_READY); - hvm_emulate_init_per_insn(hvmemul_ctxt, hvio->mmio_insn, - hvio->mmio_insn_bytes); + hvm_emulate_init_per_insn(hvmemul_ctxt, hvio->mmio_insn, + hvio->mmio_insn_bytes); - hvio->mmio_retry = 0; + hvio->mmio_retry = 0; - rc = x86_emulate(&hvmemul_ctxt->ctxt, ops); - if ( rc == X86EMUL_OKAY && hvio->mmio_retry ) - rc = X86EMUL_RETRY; + rc = x86_emulate(&hvmemul_ctxt->ctxt, ops); + if ( rc == X86EMUL_OKAY && hvio->mmio_retry ) + rc = X86EMUL_RETRY; - if ( !ioreq_needs_completion(&curr->io.req) ) - completion = VIO_no_completion; - else if ( completion == VIO_no_completion ) - completion = (curr->io.req.type != IOREQ_TYPE_PIO || - hvmemul_ctxt->is_mem_access) ? VIO_mmio_completion - : VIO_pio_completion; + if ( !ioreq_needs_completion(&curr->io.req) ) + completion = VIO_no_completion; + else if ( completion == VIO_no_completion ) + completion = (curr->io.req.type != IOREQ_TYPE_PIO || + hvmemul_ctxt->is_mem_access) ? VIO_mmio_completion + : VIO_pio_completion; - switch ( curr->io.completion = completion ) - { - case VIO_no_completion: - case VIO_pio_completion: - hvio->mmio_cache_count = 0; - hvio->mmio_insn_bytes = 0; - hvio->mmio_access = (struct npfec){}; - hvmemul_cache_disable(curr); - break; + switch ( curr->io.completion = completion ) + { + case VIO_no_completion: + case VIO_pio_completion: + hvio->mmio_cache_count = 0; + hvio->mmio_insn_bytes = 0; + hvio->mmio_access = (struct npfec){}; + hvmemul_cache_disable(curr); + break; - case VIO_mmio_completion: - case VIO_realmode_completion: - BUILD_BUG_ON(sizeof(hvio->mmio_insn) < sizeof(hvmemul_ctxt->insn_buf)); - hvio->mmio_insn_bytes = hvmemul_ctxt->insn_buf_bytes; - memcpy(hvio->mmio_insn, hvmemul_ctxt->insn_buf, hvio->mmio_insn_bytes); - break; + case VIO_mmio_completion: + case VIO_realmode_completion: + BUILD_BUG_ON(sizeof(hvio->mmio_insn) < sizeof(hvmemul_ctxt->insn_buf)); + hvio->mmio_insn_bytes = hvmemul_ctxt->insn_buf_bytes; + memcpy(hvio->mmio_insn, hvmemul_ctxt->insn_buf, hvio->mmio_insn_bytes); + break; - default: - ASSERT_UNREACHABLE(); - return X86EMUL_UNHANDLEABLE; + default: + ASSERT_UNREACHABLE(); + return X86EMUL_UNHANDLEABLE; + } } + complete_insn: + if ( hvmemul_ctxt->ctxt.retire.singlestep ) hvm_inject_hw_exception(X86_EXC_DB, X86_EVENT_NO_EC); diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h index 084e2bd90588..1e626f8af8f2 100644 --- a/xen/arch/x86/include/asm/hvm/emulate.h +++ b/xen/arch/x86/include/asm/hvm/emulate.h @@ -53,6 +53,9 @@ struct hvm_emulate_ctxt { bool is_mem_access; bool set_context; + + unsigned int insn; + unsigned int insn_len; }; enum emul_kind { -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 13:14:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 13:14:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311849.1582010 (Exim 4.92) (envelope-from ) id 1wOxnr-00016I-VM; Mon, 18 May 2026 13:14:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311849.1582010; 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Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/svm.h | 29 ----------------------------- xen/arch/x86/include/asm/hvm/hvm.h | 29 +++++++++++++++++++++++++++++ 2 files changed, 29 insertions(+), 29 deletions(-) diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index cfa411ad5ae1..f75bca7c5f66 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -36,35 +36,6 @@ static inline void svm_invlpga(unsigned long linear, uint32_t asid) asm volatile ( "invlpga" :: "a" (linear), "c" (asid) ); } -/* - * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main - * opcode, shifted left to make room for the ModRM byte. - * - * The Grp7 instructions have their ModRM byte expressed in octal for easier - * cross referencing with the opcode extension table. - */ -#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) - -#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) -#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) -#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) -#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) -#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ -#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ -#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ -#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ -#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ -#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ -#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ -#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ -#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ -#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) -#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) -#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) -#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) -#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) -#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) - unsigned int svm_get_insn_len(struct vcpu *v, unsigned int instr_enc); unsigned int svm_get_task_switch_insn_len(void); diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index e7c1364802f8..a9b64814ca71 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -851,6 +851,35 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) alternative_vcall(hvm_funcs.sync_pir_to_irr, v); } +/* + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main + * opcode, shifted left to make room for the ModRM byte. + * + * The Grp7 instructions have their ModRM byte expressed in octal for easier + * cross referencing with the opcode extension table. + */ +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) + +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) + #else /* CONFIG_HVM */ #define hvm_enabled false -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 13:14:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 13:14:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311851.1582018 (Exim 4.92) (envelope-from ) id 1wOxnt-0001Kk-6E; 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+ rc = X86EMUL_OKAY; + break; + default: ASSERT_UNREACHABLE(); rc = X86EMUL_UNHANDLEABLE; diff --git a/xen/arch/x86/hvm/svm/emulate.c b/xen/arch/x86/hvm/svm/emulate.c index 1dd830a31bd7..31f3cd88a858 100644 --- a/xen/arch/x86/hvm/svm/emulate.c +++ b/xen/arch/x86/hvm/svm/emulate.c @@ -16,7 +16,7 @@ #include "svm.h" #include "vmcb.h" -static unsigned long svm_nextrip_insn_length(struct vcpu *v) +unsigned long svm_nextrip_insn_length(struct vcpu *v) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index f49d2ebbfdd5..2d6022d6238c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2051,18 +2051,6 @@ static void svm_do_msr_access(struct cpu_user_regs *regs) hvm_inject_hw_exception(X86_EXC_GP, 0); } -static void svm_vmexit_do_hlt(struct vmcb_struct *vmcb, - struct cpu_user_regs *regs) -{ - unsigned int inst_len; - - if ( (inst_len = svm_get_insn_len(current, INSTR_HLT)) == 0 ) - return; - __update_guest_eip(regs, inst_len); - - hvm_hlt(regs->eflags); -} - static void svm_vmexit_do_rdtsc(struct cpu_user_regs *regs, bool rdtscp) { struct vcpu *curr = current; @@ -2363,6 +2351,13 @@ static void cf_check svm_set_reg(struct vcpu *v, unsigned int reg, uint64_t val) } } +static void svm_emulate_one(struct hvm_emulate_ctxt *ctxt) +{ + ctxt->insn_len = svm_nextrip_insn_length(current); + if ( !hvm_emulate_one_ctxt(ctxt) ) + hvm_inject_hw_exception(X86_EXC_GP, 0); +} + static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .name = "SVM", .cpu_up_prepare = svm_cpu_up_prepare, @@ -2496,6 +2491,7 @@ void asmlinkage svm_vmexit_handler(void) vintr_t intr; bool vcpu_guestmode = false; struct vlapic *vlapic = vcpu_vlapic(v); + struct hvm_emulate_ctxt ctxt; regs->rax = vmcb->rax; regs->rip = vmcb->rip; @@ -2840,7 +2836,9 @@ void asmlinkage svm_vmexit_handler(void) } case VMEXIT_HLT: - svm_vmexit_do_hlt(vmcb, regs); + hvm_emulate_init_once(&ctxt, NULL, NULL, regs); + ctxt.insn = INSTR_HLT; + svm_emulate_one(&ctxt); break; case VMEXIT_IOIO: diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index f75bca7c5f66..9422dbd38a78 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -36,6 +36,7 @@ static inline void svm_invlpga(unsigned long linear, uint32_t asid) asm volatile ( "invlpga" :: "a" (linear), "c" (asid) ); } +unsigned long svm_nextrip_insn_length(struct vcpu *v); unsigned int svm_get_insn_len(struct vcpu *v, unsigned int instr_enc); unsigned int svm_get_task_switch_insn_len(void); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 13:14:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 13:14:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311858.1582028 (Exim 4.92) (envelope-from ) id 1wOxny-0001tf-EA; Mon, 18 May 2026 13:14:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311858.1582028; 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The hvmemul_{read,write}_cr callbacks are used for consistent behaviour between emulated and fast paths. Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/emulate.c | 11 ++++++++++ xen/arch/x86/hvm/svm/svm.c | 28 +++++++++----------------- xen/arch/x86/include/asm/hvm/emulate.h | 7 +++++++ xen/arch/x86/include/asm/hvm/hvm.h | 2 ++ 4 files changed, 29 insertions(+), 19 deletions(-) diff --git a/xen/arch/x86/hvm/emulate.c b/xen/arch/x86/hvm/emulate.c index 471c032c1e9c..0f7507575884 100644 --- a/xen/arch/x86/hvm/emulate.c +++ b/xen/arch/x86/hvm/emulate.c @@ -2804,6 +2804,17 @@ static int _hvm_emulate_one(struct hvm_emulate_ctxt *hvmemul_ctxt, hvmemul_ctxt->ctxt.retire.hlt = true; rc = X86EMUL_OKAY; break; + case INSTR_MOV_FROM_CR: + case INSTR_MOV_TO_CR: + { + unsigned long *val = decode_gpr(regs, hvmemul_ctxt->u.cr.gp); + + if ( hvmemul_ctxt->insn == INSTR_MOV_TO_CR ) + rc = hvmemul_write_cr(hvmemul_ctxt->u.cr.cr, *val, &hvmemul_ctxt->ctxt); + else + rc = hvmemul_read_cr(hvmemul_ctxt->u.cr.cr, val, &hvmemul_ctxt->ctxt); + break; + } default: ASSERT_UNREACHABLE(); diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 2d6022d6238c..3ba852f52666 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1625,22 +1625,6 @@ static void svm_do_nested_pgfault(struct vcpu *v, domain_crash(v->domain); } -static void svm_vmexit_do_cr_access( - struct vmcb_struct *vmcb, struct cpu_user_regs *regs) -{ - int gp, cr, dir, rc; - - cr = vmcb->exitcode - VMEXIT_CR0_READ; - dir = (cr > 15); - cr &= 0xf; - gp = vmcb->ei.mov_cr.gpr; - - rc = dir ? hvm_mov_to_cr(cr, gp) : hvm_mov_from_cr(cr, gp); - - if ( rc == X86EMUL_OKAY ) - __update_guest_eip(regs, vmcb->nextrip - vmcb->rip); -} - static void svm_dr_access(struct vcpu *v, struct cpu_user_regs *regs) { struct vmcb_struct *vmcb = vcpu_nestedhvm(v).nv_n1vmcx; @@ -2869,10 +2853,16 @@ void asmlinkage svm_vmexit_handler(void) case VMEXIT_CR0_READ ... VMEXIT_CR15_READ: case VMEXIT_CR0_WRITE ... VMEXIT_CR15_WRITE: + hvm_emulate_init_once(&ctxt, x86_insn_is_cr_access, "CR access", regs); + if ( cpu_has_svm_decode && vmcb->ei.mov_cr.mov_insn ) - svm_vmexit_do_cr_access(vmcb, regs); - else if ( !hvm_emulate_one_insn(x86_insn_is_cr_access, "CR access") ) - hvm_inject_hw_exception(X86_EXC_GP, 0); + { + ctxt.u.cr.cr = vmcb->exitcode - VMEXIT_CR0_READ; + ctxt.insn = (ctxt.u.cr.cr > 15) ? INSTR_MOV_TO_CR : INSTR_MOV_FROM_CR; + ctxt.u.cr.cr = ctxt.u.cr.cr & 0xf; + ctxt.u.cr.gp = vmcb->ei.mov_cr.gpr; + } + svm_emulate_one(&ctxt); break; case VMEXIT_INVLPG: diff --git a/xen/arch/x86/include/asm/hvm/emulate.h b/xen/arch/x86/include/asm/hvm/emulate.h index 1e626f8af8f2..3661ca28d6f4 100644 --- a/xen/arch/x86/include/asm/hvm/emulate.h +++ b/xen/arch/x86/include/asm/hvm/emulate.h @@ -56,6 +56,13 @@ struct hvm_emulate_ctxt { unsigned int insn; unsigned int insn_len; + + union { + struct { + int cr; + int gp; + } cr; + } u; }; enum emul_kind { diff --git a/xen/arch/x86/include/asm/hvm/hvm.h b/xen/arch/x86/include/asm/hvm/hvm.h index a9b64814ca71..7732217e279a 100644 --- a/xen/arch/x86/include/asm/hvm/hvm.h +++ b/xen/arch/x86/include/asm/hvm/hvm.h @@ -879,6 +879,8 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) #define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) #define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) #define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) +#define INSTR_MOV_FROM_CR INSTR_ENC(X86EMUL_OPC(0x0f, 0x20), 0) +#define INSTR_MOV_TO_CR INSTR_ENC(X86EMUL_OPC(0x0f, 0x22), 0) #else /* CONFIG_HVM */ -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 14:06:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:06:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311915.1582037 (Exim 4.92) (envelope-from ) id 1wOybP-0002OA-4i; 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Mon, 18 May 2026 07:05:47 -0700 (PDT) MIME-Version: 1.0 References: <46bbc9e008a65dd86fb2b368e4751eb7d2014afa.1778605274.git.mykola_kvach@epam.com> <7254EEC1-315F-41EB-B623-5CACAD7255E9@arm.com> In-Reply-To: <7254EEC1-315F-41EB-B623-5CACAD7255E9@arm.com> From: Mykola Kvach Date: Mon, 18 May 2026 17:05:36 +0300 X-Gm-Features: AVHnY4KUKNsRyhScqxIEaQvzHCFhvZMM_7XpNiooU8kyV5_ae1spewjS8cYIQUs Message-ID: Subject: Re: [PATCH v9 10/13] xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779113148-B4D49FF4-68DF4E1F/0/0 X-purgate-type: clean X-purgate-size: 2603 Hi Luca, Thank you for the detailed review. On Thu, May 14, 2026 at 8:22=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +/* > > + * int prepare_resume_ctx(void) > > + * > > + * CPU context saved here will be restored on resume in hyp_resume fun= ction. > > + * prepare_resume_ctx shall return a non-zero value. Upon restoring co= ntext > > + * hyp_resume shall return value zero instead. From C code that invoke= s > > + * prepare_resume_ctx, the return value is interpreted to determine wh= ether > > + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). > > + */ > > +FUNC(prepare_resume_ctx) > > + ldr x0, =3Dresume_cpu_context > > + > > + /* Store callee-saved registers */ > > + stp x19, x20, [x0, #RESUME_CTX_X19] > > + stp x21, x22, [x0, #RESUME_CTX_X21] > > + stp x23, x24, [x0, #RESUME_CTX_X23] > > + stp x25, x26, [x0, #RESUME_CTX_X25] > > + stp x27, x28, [x0, #RESUME_CTX_X27] > > + stp x29, lr, [x0, #RESUME_CTX_X29] > > + > > + /* Store stack-pointer */ > > + mov x2, sp > > + str x2, [x0, #RESUME_CTX_SP] > > + > > + /* Store system control registers */ > > + mrs x2, VBAR_EL2 > > + str x2, [x0, #RESUME_CTX_VBAR_EL2] > > + mrs x2, VTCR_EL2 > > + str x2, [x0, #RESUME_CTX_VTCR_EL2] > > + mrs x2, VTTBR_EL2 > > + str x2, [x0, #RESUME_CTX_VTTBR_EL2] > > + mrs x2, TPIDR_EL2 > > + str x2, [x0, #RESUME_CTX_TPIDR_EL2] > > + mrs x2, MDCR_EL2 > > + str x2, [x0, #RESUME_CTX_MDCR_EL2] > > + mrs x2, HSTR_EL2 > > + str x2, [x0, #RESUME_CTX_HSTR_EL2] > > + mrs x2, CPTR_EL2 > > + str x2, [x0, #RESUME_CTX_CPTR_EL2] > > + mrs x2, HCR_EL2 > > + str x2, [x0, #RESUME_CTX_HCR_EL2] > > Do you think we should save also CNTHCTL_EL2? Apologies it escaped my fir= st review, > but I see we program it in the boot cpu path + secondary cpu path: init_t= imer_interrupt(). > > The rest looks ok. Ack. Good catch, thanks. CNTHCTL_EL2 is programmed from init_timer_interrupt() for both the boot CPU and secondary CPUs, so it should be part of the EL2 context saved and restored across SYSTEM_SUSPEND. I will add save/restore for it. I will also re-audit the context save/restore list against the current boot path to check whether any other EL2 system registers are missing. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 14:16:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:16:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311925.1582046 (Exim 4.92) (envelope-from ) id 1wOylg-0004Am-1Y; Mon, 18 May 2026 14:16:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311925.1582046; Mon, 18 May 2026 14:16:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOylf-0004Af-Uf; Mon, 18 May 2026 14:16:27 +0000 Received: by outflank-mailman (input) for mailman id 1311925; Mon, 18 May 2026 14:16:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOyle-0004AZ-Fk for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:16:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOyld-00EkGj-Rv for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 07:16:24 -0700 (PDT) MIME-Version: 1.0 References: <06448a30ef6694a55ac85d4c8c78ca2d71342430.1778605274.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 17:16:13 +0300 X-Gm-Features: AVHnY4JaraBJcBj3bPe4VM9QdrQguSh8l0rXdLUhU9mPY2RnZ62qAwrt5-duwdo Message-ID: Subject: Re: [PATCH v9 12/13] xen/arm: Add vPSCI SYSTEM_SUSPEND policy To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Rahul Singh Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779113785-B4B4EFF4-2FB592D6/0/0 X-purgate-type: clean X-purgate-size: 19916 Hi Oleksandr, Thank you for the review. On Sun, May 17, 2026 at 5:37=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 5/12/26 20:07, Mykola Kvach wrote: > > From: Mykola Kvach > > > Hello Mykola > > > > > Introduce CONFIG_HAS_HWDOM_SYSTEM_SUSPEND as an architecture-selected > > capability for platforms where the hardware domain can be parked with > > SHUTDOWN_suspend without calling hwdom_shutdown(). > > > > Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For > > non-control domains, including the hardware domain when it is not actin= g as a > > control domain, the call is handled as a guest/domain suspend request a= nd > > parks the domain in SHUTDOWN_suspend. > > > > Control domains need additional sequencing because their SYSTEM_SUSPEND > > request is used to coordinate host-wide suspend. A non-last awake contr= ol > > domain may be parked in SHUTDOWN_suspend without requiring the host sus= pend > > path to be available. The last awake control domain is treated as the p= oint > > where the request becomes a host-suspend request, and it may only proce= ed > > when all non-control domains are already in SHUTDOWN_suspend and the ho= st > > suspend path is available. > > > > Keep the control-domain sequencing and domain-readiness checks out of > > PSCI_FEATURES. They are per-attempt runtime conditions rather than stab= le PSCI > > function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI= and > > enforce the sequencing policy in the call handler. > > > > Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEN= D so > > that SHUTDOWN_suspend from the hardware domain can be treated as a doma= in > > suspend state rather than as a hardware-domain initiated host shutdown.= This > > does not by itself imply that host-wide suspend is available. > > > > Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPE= ND > > capability with runtime blockers reported by Xen-owned subsystems. Add > > runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ p= aths > > lacking suspend/resume support. These blockers are runtime based, so th= ey > > only apply to drivers or paths that Xen actually uses on the platform. = For > > SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ pat= h, > > since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. > > > > Signed-off-by: Mykola Kvach > > Apart from Jan's and Luca's findings, patch looks good to me. Just a few > questions to clarify, apologies if these have already been discussed > elsewhere. > > > --- > > xen/arch/arm/Kconfig | 1 + > > xen/arch/arm/gic.c | 6 ++ > > xen/arch/arm/include/asm/psci.h | 3 + > > xen/arch/arm/include/asm/suspend.h | 10 ++- > > xen/arch/arm/psci.c | 7 ++ > > xen/arch/arm/suspend.c | 40 +++++++++ > > xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--= - > > xen/common/Kconfig | 3 + > > xen/common/domain.c | 7 +- > > xen/drivers/char/serial.c | 12 +++ > > xen/drivers/passthrough/arm/iommu.c | 4 + > > xen/drivers/passthrough/arm/smmu-v3.c | 4 + > > xen/include/xen/serial.h | 1 + > > xen/include/xen/suspend.h | 2 + > > 14 files changed, 201 insertions(+), 13 deletions(-) > > > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > > index 79622b46a1..54a5bfb9ae 100644 > > --- a/xen/arch/arm/Kconfig > > +++ b/xen/arch/arm/Kconfig > > @@ -19,6 +19,7 @@ config ARM > > select HAS_ALTERNATIVE if HAS_VMAP > > select HAS_DEVICE_TREE_DISCOVERY > > select HAS_DOM0LESS > > + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU > > select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE > > select HAS_STACK_PROTECTOR > > select HAS_UBSAN > > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > > index 7727ffed5a..a5efcaeb4c 100644 > > --- a/xen/arch/arm/gic.c > > +++ b/xen/arch/arm/gic.c > > @@ -26,6 +26,7 @@ > > #include > > #include > > #include > > +#include > > #include > > #include > > > > @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(v= oid) > > void register_gic_ops(const struct gic_hw_operations *ops) > > { > > gic_hw_ops =3D ops; > > + > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + if ( !ops->suspend || !ops->resume ) > > + host_system_suspend_disable("GIC driver lacks suspend/resume s= upport"); > > +#endif > > } > > > > static void clear_cpu_lr_mask(void) > > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm= /psci.h > > index bb3c73496e..142fa1bfe5 100644 > > --- a/xen/arch/arm/include/asm/psci.h > > +++ b/xen/arch/arm/include/asm/psci.h > > @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); > > void call_psci_system_off(void); > > void call_psci_system_reset(void); > > int call_psci_system_suspend(void); > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +bool psci_system_suspend_allowed(void); > > +#endif > > > > /* Range of allocated PSCI function numbers */ > > #define PSCI_FNUM_MIN_VALUE _AC(0,U) > > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/= asm/suspend.h > > index 2d9fc331fc..87db12eac3 100644 > > --- a/xen/arch/arm/include/asm/suspend.h > > +++ b/xen/arch/arm/include/asm/suspend.h > > @@ -38,7 +38,15 @@ extern struct resume_cpu_context resume_cpu_context; > > > > int prepare_resume_ctx(void); > > void hyp_resume(void); > > -#endif /* CONFIG_SYSTEM_SUSPEND */ > > +bool host_system_suspend_allowed(void); > > +void host_system_suspend_disable(const char *reason); > > + > > +#else /* !CONFIG_SYSTEM_SUSPEND */ > > + > > +static inline bool host_system_suspend_allowed(void) { return false; } > > +static inline void host_system_suspend_disable(const char *reason) {} > > + > > +#endif > > > > #endif /* ARM_SUSPEND_H */ > > > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > > index e05dae1133..e9d78668fd 100644 > > --- a/xen/arch/arm/psci.c > > +++ b/xen/arch/arm/psci.c > > @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; > > > > #define PSCI_RET(res) ((int32_t)(res).a0) > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +bool psci_system_suspend_allowed(void) > > +{ > > + return has_psci_system_suspend; > > +} > > +#endif > > + > > int call_psci_cpu_on(int cpu) > > { > > struct arm_smccc_res res; > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > index 6ea4a0f9cc..a571035d2c 100644 > > --- a/xen/arch/arm/suspend.c > > +++ b/xen/arch/arm/suspend.c > > @@ -1,9 +1,49 @@ > > /* SPDX-License-Identifier: GPL-2.0-only */ > > > > +#include > > #include > > > > +#include > > +#include > > + > > struct resume_cpu_context resume_cpu_context; > > > > +/* > > + * Non-PSCI infrastructure can make host suspend impossible even when = the PSCI > > + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has= no valid > > + * suspend/resume path. > > + * > > + * This gate is checked only when the last awake control domain attemp= ts to > > + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. > > + */ > > +static bool host_system_suspend_runtime_allowed =3D true; > > + > > +static bool host_serial_suspend_allowed(void) > > +{ > > + if ( serial_suspend_supported() ) > > + return true; > > + > > + printk_once(XENLOG_INFO > > + "Host SYSTEM_SUSPEND blocked: serial driver lacks susp= end/resume support\n"); > > + > > + return false; > > +} > > + > > +bool host_system_suspend_allowed(void) > > +{ > > + return psci_system_suspend_allowed() && > > + host_serial_suspend_allowed() && > > + host_system_suspend_runtime_allowed; > > +} > > + > > +void host_system_suspend_disable(const char *reason) > > +{ > > + host_system_suspend_runtime_allowed =3D false; > > + > > + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", > > + reason ? reason : "unsupported suspend/resume path"); > > +} > > + > > /* > > * Local variables: > > * mode: C > > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > > index ac6af6118f..48a963ae3e 100644 > > --- a/xen/arch/arm/vpsci.c > > +++ b/xen/arch/arm/vpsci.c > > @@ -5,6 +5,7 @@ > > > > #include > > #include > > +#include > > #include > > #include > > #include > > @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) > > domain_shutdown(d,SHUTDOWN_reboot); > > } > > > > +/* > > + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend t= ransition, > > + * so multiple control domains cannot all observe each other as still = awake. > > + */ > > +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); > > + > > +static bool domain_in_suspend_state(struct domain *d) > > +{ > > + bool suspended; > > + > > + spin_lock(&d->shutdown_lock); > > + suspended =3D d->is_shut_down && d->shutdown_code =3D=3D SHUTDOWN_= suspend; > > + spin_unlock(&d->shutdown_lock); > > + > > + return suspended; > > +} > > + > > +static int32_t domain_psci_system_suspend_policy(struct domain *d) > > +{ > > + struct domain *other; > > + bool last_awake_control_domain =3D true; > > + bool awake_non_control_domain =3D false; > > + > > + /* Only control domains participate in sequencing policy. */ > > + if ( !is_control_domain(d) ) > > + return 0; > > + > > + rcu_read_lock(&domlist_read_lock); > > + > > + for_each_domain ( other ) > > + { > > + bool suspended; > > + > > + if ( other =3D=3D d ) > > + continue; > > + > > + suspended =3D domain_in_suspend_state(other); > > + if ( suspended ) > > + continue; > > + > > + if ( is_control_domain(other) ) > > + { > > + last_awake_control_domain =3D false; > > + break; > > + } > > + > > + awake_non_control_domain =3D true; > > + } > > + > > + rcu_read_unlock(&domlist_read_lock); > > + > > + /* > > + * Another control domain is still awake. This request is only the= first > > + * phase of the sequencing: park this control domain and leave the= host > > + * running. Host-wide suspend gates must not block this intermedia= te state. > > + */ > > + if ( !last_awake_control_domain ) > > + return 0; > > + > > + /* > > + * This is the last awake control domain. It must not be parked un= less the > > + * request can proceed as a host-suspend request; otherwise Xen wo= uld lose > > + * the last domain that can coordinate the system suspend. > > + */ > > + if ( awake_non_control_domain ) > > + { > > + printk(XENLOG_DEBUG > > + "SYSTEM_SUSPEND denied: last awake control domain dom%u= requested host suspend while non-control domains are still awake\n", > > + d->domain_id); > > + return PSCI_DENIED; > > + } > > + > > + /* > > + * Host-wide gates are relevant only for the last-control-domain c= ase. They > > + * must not block parking of a non-last control domain, but they m= ust reject > > + * the last control domain when host suspend is not available. > > + */ > > + if ( !host_system_suspend_allowed() ) > > + return PSCI_NOT_SUPPORTED; > > In do_psci_1_0_features(), the guest is told that SYSTEM_SUSPEND is > implemented: > > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > return 0; /* "This function IS implemented" */ > > However, when the guest actually calls SYSTEM_SUSPEND, the policy check > above can reject it by return PSCI_NOT_SUPPORTED; /* "This function is > NOT implemented" */ > > These two responses are contradictory. The guest probes via > PSCI_FEATURES, is told suspend is available, and then gets > PSCI_NOT_SUPPORTED when it attempts to use it (if let's say the SMMUv3 > driver has blocked suspend). > > From Arm Power State Coordination Interface (DEN0022F.b): > > 5.3.2 Implementation responsibilities > ... Any function that is not implemented must return NOT_SUPPORTED in > accordance with the SMC Calling Conventions [4]. In addition, > PSCI_FEATURES must also return NOT_SUPPORTED for any non-implemented > function... > > My questing is should do_psci_1_0_features() consult the same policy so > that the feature is only advertised when it can actually be used? > > Or am I missing something here? For the PSCI_FEATURES part, I agree there is a problem with returning PSCI_NOT_SUPPORTED after advertising SYSTEM_SUSPEND as implemented. I would still prefer not to make PSCI_FEATURES depend on the full domain_psci_system_suspend_policy(), because that policy depends on runtime state: whether this is the last awake control domain and whether other non-control domains are still awake. Reporting the feature as available or unavailable based on that state would make PSCI_FEATURES unstable between attempts. However, once vPSCI advertises SYSTEM_SUSPEND as implemented, the call handler should not return PSCI_NOT_SUPPORTED for an attempt-time policy failure. I think PSCI_DENIED is a better fit for the last-control-domain case when the request cannot proceed as host suspend because Xen currently cannot support the host-wide suspend path. I will rework that part. > > > + > > + return 0; > > +} > > + > > static int32_t do_psci_1_0_system_suspend(register_t epoint, register= _t cid) > > { > > int32_t rc; > > @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register= _t epoint, register_t cid) > > if ( is_64bit_domain(d) && is_thumb ) > > return PSCI_INVALID_ADDRESS; > > > > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ > > - if ( is_hardware_domain(d) ) > > - return PSCI_NOT_SUPPORTED; > > - > > /* Ensure that all CPUs other than the calling one are offline */ > > domain_lock(d); > > for_each_vcpu ( d, v ) > > @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(registe= r_t epoint, register_t cid) > > if ( rc ) > > return PSCI_DENIED; > > > > - rc =3D domain_shutdown(d, SHUTDOWN_suspend); > > + spin_lock(&vpsci_system_suspend_lock); > > + > > + rc =3D domain_psci_system_suspend_policy(d); > > + if ( !rc ) > > + { > > + rc =3D domain_shutdown(d, SHUTDOWN_suspend); > > + if ( rc ) > > + rc =3D PSCI_DENIED; > > + else > > + { > > + rctx->ctxt =3D ctxt; > > + rctx->wake_cpu =3D current; > > + } > > + } > > + > > + spin_unlock(&vpsci_system_suspend_lock); > > + > > if ( rc ) > > { > > free_vcpu_guest_context(ctxt); > > - return PSCI_DENIED; > > + return rc; > > } > > > > - rctx->ctxt =3D ctxt; > > - rctx->wake_cpu =3D current; > > - > > gprintk(XENLOG_DEBUG, > > "SYSTEM_SUSPEND requested, epoint=3D%#"PRIregister", cid= =3D%#"PRIregister"\n", > > epoint, cid); > > @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_= func_id) > > case PSCI_0_2_FN32_SYSTEM_RESET: > > case PSCI_1_0_FN32_PSCI_FEATURES: > > case ARM_SMCCC_VERSION_FID: > > - return 0; > > case PSCI_1_0_FN32_SYSTEM_SUSPEND: > > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > > - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTE= D : 0; > > + return 0; > > default: > > return PSCI_NOT_SUPPORTED; > > } > > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > > index 5ff71480ee..816a1a4ecb 100644 > > --- a/xen/common/Kconfig > > +++ b/xen/common/Kconfig > > @@ -140,6 +140,9 @@ config HAS_EX_TABLE > > config HAS_FAST_MULTIPLY > > bool > > > > +config HAS_HWDOM_SYSTEM_SUSPEND > > + bool > > + > > config HAS_IOPORTS > > bool > > > > diff --git a/xen/common/domain.c b/xen/common/domain.c > > index bb9e210c28..d3edfb2a13 100644 > > --- a/xen/common/domain.c > > +++ b/xen/common/domain.c > > @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) > > domain_shutdown(d, SHUTDOWN_crash); > > } > > > > +static inline bool want_hwdom_shutdown(uint8_t reason) > > +{ > > + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || > > + reason !=3D SHUTDOWN_suspend; > > +} > > > > int domain_shutdown(struct domain *d, u8 reason) > > { > > @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) > > d->shutdown_code =3D reason; > > reason =3D d->shutdown_code; > > > > - if ( is_hardware_domain(d) ) > > + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) > > hwdom_shutdown(reason); > > > > if ( d->is_shutting_down ) > > diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c > > index adb312d796..cc2b5b5dee 100644 > > --- a/xen/drivers/char/serial.c > > +++ b/xen/drivers/char/serial.c > > @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) > > > > #ifdef CONFIG_SYSTEM_SUSPEND > > > > +static bool __read_mostly serial_suspend_available =3D true; > > + > > void serial_suspend(void) > > { > > int i; > > @@ -513,6 +515,11 @@ void serial_resume(void) > > com[i].driver->resume(&com[i]); > > } > > > > +bool serial_suspend_supported(void) > > +{ > > + return serial_suspend_available; > > +} > > + > > #endif /* CONFIG_SYSTEM_SUSPEND */ > > > > void __init serial_register_uart(int idx, struct uart_driver *driver, > > @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct u= art_driver *driver, > > /* Store UART-specific info. */ > > com[idx].driver =3D driver; > > com[idx].uart =3D uart; > > + > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + if ( !driver->suspend || !driver->resume ) > > + serial_suspend_available =3D false; > > > I wonder why different suspend-blocker API are used for serial vs other > subsystems (GIC, IOMMU). Why serial_register_uart() could not simply > call host_system_suspend_disable() like every other subsystem? > > This would avoid adding three unnecessary symbols > (serial_suspend_available, serial_suspend_supported(), > host_serial_suspend_allowed()). > > Or am I missing something here? For the serial case, the split was intentional. The other callers are in Arm-specific code, while serial.c is common code. I wanted to avoid making the common serial layer call an Arm host-suspend policy helper directly, or requiring arch-specific stub(s) only for this case. So the current shape keeps serial.c exposing only whether the registered UART drivers have suspend/resume callbacks, while the Arm host suspend policy decides whether that blocks host SYSTEM_SUSPEND. That said, if the preferred direction is to make host_system_suspend_disabl= e() a generic suspend helper with no-op stub(s) for architectures that do not u= se it, I can rework serial_register_uart() to call it directly and drop the extra serial_suspend_supported() path. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 14:20:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:20:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311935.1582054 (Exim 4.92) (envelope-from ) id 1wOypb-0005x5-Iw; Mon, 18 May 2026 14:20:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311935.1582054; Mon, 18 May 2026 14:20:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOypb-0005wy-G8; Mon, 18 May 2026 14:20:31 +0000 Received: by outflank-mailman (input) for mailman id 1311935; Mon, 18 May 2026 14:20:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOypa-0005wr-6g for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:20:30 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOypZ-00AHTM-IY for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 07:20:28 -0700 (PDT) MIME-Version: 1.0 References: <2268857aa7eef95444169564c17f7e9a6f59b1c5.1778605274.git.mykola_kvach@epam.com> <14563498-D318-4419-A07C-DDFDCC8FECA8@arm.com> In-Reply-To: <14563498-D318-4419-A07C-DDFDCC8FECA8@arm.com> From: Mykola Kvach Date: Mon, 18 May 2026 17:20:17 +0300 X-Gm-Features: AVHnY4IuA9qa_b9i4olnJCPZMr3FuAXdTR50P_x3gBTWoMdk0y5xjTW885MrMiQ Message-ID: Subject: Re: [PATCH v9 13/13] xen/arm: Add host system suspend backend To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779114029-B5D41FF4-B78E6DFC/0/0 X-purgate-type: clean X-purgate-size: 765 Hi Luca, Thank you for the feedback. On Fri, May 15, 2026 at 11:45=E2=80=AFAM Luca Fancellu wrote: > > Hi Mykola, > > > diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/m= m.h > > index 2eb8465aa9..de119cad3a 100644 > > --- a/xen/arch/arm/include/asm/mm.h > > +++ b/xen/arch/arm/include/asm/mm.h > > @@ -360,6 +360,8 @@ static inline void page_set_xenheap_gfn(struct page= _info *p, gfn_t gfn) > > } while ( (y =3D cmpxchg(&p->u.inuse.type_info, x, nx)) !=3D x ); > > } > > > > +void set_init_ttbr(lpae_t *root); > > Since this is MMU only, shall we move it to asm/mmu/mm.h? Ack. set_init_ttbr() is MMU-specific, so I will move the declaration to asm/mmu/mm.h. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 14:33:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:33:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311944.1582064 (Exim 4.92) (envelope-from ) id 1wOz25-0007q6-Ll; Mon, 18 May 2026 14:33:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311944.1582064; Mon, 18 May 2026 14:33:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz25-0007pz-Iv; Mon, 18 May 2026 14:33:25 +0000 Received: by outflank-mailman (input) for mailman id 1311944; Mon, 18 May 2026 14:33:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz24-0007pt-Gk for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:33:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOz23-0092FU-PT for xen-devel@lists.xenproject.org; Mon, 18 May 2026 16:33:23 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b232d-2eae-0a2a0a5409dd-0a2a45058cf6-18 for ; Mon, 18 May 2026 16:33:23 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b2333-aaa8-0a2a45050019-a237832f9944-3 for ; Mon, 18 May 2026 16:33:23 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 5DD7C4EE3C71; Mon, 18 May 2026 16:33:23 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779114803; b=zM1cam5UnbwEIFgpMrLQi/1p7NIsxD6QUcGRP3AKJ7WCC8U71vVutumxIWgdnOauSdv6 tSekD85K8F/wmq0q8XG8btHVgdHPSGaaxGT+JW5MKyv0wT+zQ3ZFWoDGDInYFDo1hc94J D2hjAbz1MR/E+cXFg+yMjI2D5grnQO+IZWQsdEyPnY6o2BdYJJklaBBfRtr1XKjx/1WEf k0y8RKj8eeY7Q7NWWIgN5heCWiIygBrlsKEkfBK18zgtIH8dmvGVKzyxzI1K0ZxH/Jk08 YfAILxV07gNVWe1ykYeLvOUhvtRHy6U9tf0Rrr+HPIjZE+JGRzU63yna/RKe/GD2IKhpc KDu9s1VZ7I0OLNmKW81WhXVzGul7RBbRwxjFvG/6VKW2Sz5acF9fJaNtAUi1HuwZfEdZE ujBJpMFO6x2FU2+ptFXM0wZ1CyByg5PP/qtvYtPkHp/v7l8RbRhvy1D9wLsai8PLNUFnG olrPsgC12V91MRGpv26DuImDlSU3hJMsn7UCOXyMOZMR0uGRBHJxjaPL3hxfIYJbNx/4H zyuZWnJ9VHsavrgRRGdUg3cmUaCclJcXmTvfKc8iKjpvuQRrfmjnCQdojaYClKagmh5JT iVf8X70pXglh3jSsUILnXe68EjYCe8UGC226eeIM0LHgTTf/MNN7XKntNQmhiSM= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1779114803; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=Dd2ARLc2Z+Ur//usrJ76J0MSevPdvxnzlrXcmxl7Hi8=; b=W/Bn/PhnzR5cFjU0i6He8g+dsTElHsy3qbk79GGgMgUhyVf7F3FO0MzRTpDXMam48bQ2 Zv6fevnnkWS591gY9gKMY/4r5Qpvdj3yNmhl38GRwCEsid+tr00KLEb3+gYU/lPqtyOM/ rfoFytERfY3ax4+6zdRu33aPDzVGsjul+GWLV7kMbS3QTU6QIKj7AAKG2rcg0eVS8XuJe eyEtzMnlggM/Asa7NggXlD9wANKf0EkUEakme3tPFJfNCJDWq/zNzbi+gf16Y7XnXriAH Jowc65egdl7VcCs1H+2SviUAKlLYn3Iz3hyqVmgj6WpIV2uN6upscOdKUIfafBWl3PvU9 leM5jmbtP9z7q+KlGt+JpCcXTeaCKIjElyheeTii91NcwY79kX34LVMCJPK7XXhr0g6Tb egT6pw1q+BcBkHVGh22ew5Nd/rHf70vOTVjsiNSzixaMsawy4PX/vu9hToRrtS+/1qC5T FoUmz2ugMrTqT+1K+4cFB7UI1q7P6ONbInXmRnyo/ke+hxe4ul693wLPY99kP6hCSD+Oh hNXQzqFs1+IsDumT96CZQanOktvOXzxtvou2fIXO2qvf7GYO5W9FlOHSw+UEP6FJBM5F1 7NV3K4I6mHDr9B1pffkcfmSdJI8MMRARrIK0/QPVl0KNgzvevEtYAR6wE/vo0y0= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Mon, 18 May 2026 16:33:23 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH v2] x86/shim: adjust for Misra C:2012 rule 20.12 In-Reply-To: References: Message-ID: <8fc9b5efd6c83bc2aadbe058eed83615@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779114803-D917D443-ED6A177B/0/0 X-purgate-type: clean X-purgate-size: 2306 On 2026-05-18 13:42, Jan Beulich wrote: > ... ("A macro parameter used as an operand to the `#' or `##' > operators, > which is itself subject to further macro replacement, shall only be > used > as an operand to these operators"). Leverage the SAF-6 annotation we > have > available. > > Signed-off-by: Jan Beulich Reviewed-by: Nicola Vetrini > --- > As per the placement in arm/tee/ffa.c two instances of the SAF comment > (ahead of the macro definitions) should suffice. Eclair demands one > instance per macro use here, however (much like we have it in > x86/dom{ain,ctl}.c). > --- > v2: Use SAF-6 annotations. > > --- a/xen/arch/x86/pv/shim.c > +++ b/xen/arch/x86/pv/shim.c > @@ -124,8 +124,10 @@ void __init pv_shim_fixup_e820(void) > ASSERT(i < ARRAY_SIZE(reserved_pages)); \ > reserved_pages[i++].mfn = pfn; \ > }) > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > MARK_PARAM_RAM(HVM_PARAM_STORE_PFN); > if ( !pv_console ) > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > MARK_PARAM_RAM(HVM_PARAM_CONSOLE_PFN); > #undef MARK_PARAM_RAM > } > @@ -207,10 +209,14 @@ void __init pv_shim_setup_dom(struct dom > evtchn_reserve(d, param); > \ > } > \ > }) > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > SET_AND_MAP_PARAM(HVM_PARAM_STORE_PFN, si->store_mfn, store_va); > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > SET_AND_MAP_PARAM(HVM_PARAM_STORE_EVTCHN, si->store_evtchn, 0); > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_EVTCHN, > si->console.domU.evtchn, 0); > if ( !pv_console ) > + /* SAF-6-safe Rule 20.12 expansion of macros HVM_PARAM_*. */ > SET_AND_MAP_PARAM(HVM_PARAM_CONSOLE_PFN, si->console.domU.mfn, > console_va); > #undef SET_AND_MAP_PARAM -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Mon May 18 14:34:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:34:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311950.1582073 (Exim 4.92) (envelope-from ) id 1wOz3Z-0008Jg-VB; Mon, 18 May 2026 14:34:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311950.1582073; Mon, 18 May 2026 14:34:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz3Z-0008JZ-S6; Mon, 18 May 2026 14:34:57 +0000 Received: by outflank-mailman (input) for mailman id 1311950; Mon, 18 May 2026 14:34:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz3X-0008JR-RC for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:34:56 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOz3W-00ALOd-Vm for xen-devel@lists.xenproject.org; Mon, 18 May 2026 16:34:55 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b238c-bab6-0a2a0a5309dd-0a2a4505958c-4 for ; Mon, 18 May 2026 16:34:53 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a0b238c-aaa8-0a2a45050019-d98c6eacb590-1 for ; Mon, 18 May 2026 16:34:53 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A280E1C01; Mon, 18 May 2026 07:34:46 -0700 (PDT) Received: from [10.57.34.29] (unknown [10.57.34.29]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D83FA3F85F; Mon, 18 May 2026 07:34:47 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="Date:Subject:To:Cc:References:From:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779114891; bh=E15tHTNDpPdXPrfZ/GjSgBlqQkUxfFvGZeYUSNVaEFs=; h=Date:Subject:To:Cc:References:From:In-Reply-To:From; b=FfFlZJz/BHU+RUZ+zar+T1XTybkuBlKG+zBJN9Lc0p2TtnrRSAXTy5gi7FXOzeQ11 mY/Lo4+ipdrf3BbwBgP0ZI1ULhXto98trvgvBFvkPDWQ8krOYIxKhkK0OF6SXRXSVc 9yRJlTlnM4EQjE/fv7eFTPVUaa4T8aERFuxVxXy0= Message-ID: <10d4eaed-eaee-47b7-9ccf-7f1931b26b02@arm.com> Date: Mon, 18 May 2026 16:34:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/xen: Tolerate nested XEN_LAZY_MMU entering/leaving To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , linux-kernel@vger.kernel.org, x86@kernel.org Cc: marmarek@invisiblethingslab.com, Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org References: <20260508143933.493013-1-jgross@suse.com> <362bc938-18ea-4f6a-938a-893dfb1c956d@arm.com> <36fc4317-d7a0-410c-9d95-28858018053c@suse.com> From: Kevin Brodsky Content-Language: en-GB In-Reply-To: <36fc4317-d7a0-410c-9d95-28858018053c@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779114893-DBF66443-FA9BA2F1/0/0 X-purgate-type: clean X-purgate-size: 1732 On 09/05/2026 08:32, Jürgen Groß wrote: > On 08.05.26 22:54, Kevin Brodsky wrote: >> On 08/05/2026 16:39, Juergen Gross wrote: >>> With the support of nested lazy mmu sections it can happen that >>> arch_enter_lazy_mmu_mode() is being called twice without a call of >>> arch_leave_lazy_mmu_mode() in between, as the lazy_mmu_*() helpers >>> are not disabling preemption when checking for nested lazy mmu >>> sections. >> >> I think this is a correct description of the issue, i.e. potentially we >> have arch_enter_lazy_mmu_mode() called twice *sequentially*. Therefore I >> don't think that disabling preemption inside arch_enter_lazy_mmu_mode() >> is enough - we have a problem with preemption occurring inside >> lazy_mmu_mode_enable() generally, not necessarily inside >> arch_enter_lazy_mmu_mode(). >> >> Preemption shouldn't matter if commit 291b3abed657 is reverted. AFAICT >> this is the only easy fix. > The description wasn't really complete, I think. > > The double call will only be possible if arch_end_context_switch() is > calling arch_enter_lazy_mmu_mode(), and this is happening for Xen PV > only. > arch_end_context_switch() is a nop for all other cases. Right, agreed. Would be good to update the commit message. > > So this can be handled completely internal of Xen (otherwise a revert of > 291b3abed657 wouldn't help), and it is easy to do so as my patch is > showing. > > As said, I'd like to get rid of the extra tracking by Xen regarding > lazy mode. Got it, that would be best. This patch should ensure that xen_lazy_mode always has the correct value regardless of preemption, which is what matters for Xen. Reviewed-by: Kevin Brodsky From xen-devel-bounces@lists.xenproject.org Mon May 18 14:36:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:36:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311957.1582081 (Exim 4.92) (envelope-from ) id 1wOz4d-0000NP-7Q; Mon, 18 May 2026 14:36:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311957.1582081; Mon, 18 May 2026 14:36:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz4d-0000NI-4s; Mon, 18 May 2026 14:36:03 +0000 Received: by outflank-mailman (input) for mailman id 1311957; Mon, 18 May 2026 14:36:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOz4b-0000Mt-78 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:36:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOz4a-0014ju-90 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 16:36:00 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b23d0-bab6-0a2a0a5309dd-0a2a450b95f6-0 for ; Mon, 18 May 2026 16:36:00 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b23d0-212f-0a2a450b0019-a237832faa16-3 for ; Mon, 18 May 2026 16:36:00 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id F25944EE3C71; Mon, 18 May 2026 16:35:59 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779114960; b=mBVM5EVKupG5nuvs6O2D3qHJGff4FZm2LKTSBzFho6I0/eqV3dEiVmqkL4Ne9w9EWfxJ RGKgZKtzH1baJTtfMikZMjYns+dxe7g8XAyZSpEWLjlQeuTtkaIBlkE2E1gIW4gJBGeN+ XR8mURFsR/+bJIExSJXkSBlJ2oAMMaZU41oTC8rgXYRBBzcdZtcd+L4tpVMmbr1WezKbF 5KigB2RAicQaBTVv3s+E8mwxNzeeEjFP+cAT9+fYVboD6lijbqbiHVvmGX83NYCeNtzjO eD5PmsgY/ZcknMUYOJdBAPAO4WUeAALPZD6A/7VBHA/5+yNjq11VTsdvX3XJ++u/ldlhW yd1EHuyeAovCuo+6aghhXAhVom5+9EGPEfulf2Pm5HtiCAVZPv8l9jbzIOiDtDZKgaZxk eSBI0vPxA9Z4FB3mZYA4V9lgUeVH2vKvBabByvHOqDnEmF6sdyvx63YNnPA+/IWcT6Vt2 F7+m5PlFAFyNkVMHy0LXlVQjYpLBfrBOm1GRnqKaMrwU6Mo0ZX5E4AVmCAgVyjMaDFtli SxvigNrnJRbZSwJ4+2eoYFiJXrNPH9AMfFq4Tnsr2QCLGngAWClM9iFx+KGtHGM9GZ2I+ qdYDby6/iGn1e/2wf2eT7zoVS+fFp7qZrcxaWhjavl3JOXDY80iXEcyTNY2P+Iw= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1779114960; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=5kvEkR+x1Zrs5LIJVh7DFk9j7lKLX5Qk/Ynk9sx/Yr8=; b=qJF95nK1lyw3CCtxA5XxlNHQHiAMsG5wTfy62HI10HtqyYpjA1t/bAegUF86yhfw3vD2 Ky6x3Lw2Zenb+okYHaaNTTSXkIWHRoifeOnt5beVPlRR93UIZEEMk1k+XrNmdyFgQ4spE 2da/DAsTUIvkSPYpQaKpCsTstZjoGBLOB1jNoxzzTSKNoyuCQ5lXoG5oXEdnnCE7knCEt Gef9egb6pbnT1YZPoi9dfI2QL9hR/Tfg3nSoF7meNz7vMNZt5OLiq1IPFGW6iDu768sYm 2IoEV+nTgDAqoSkr1Ec3ufk+rWQtpAZ8KJsYPSo6S1xwwYHEnBt019rIsQvBuMMkmidNj K4ItOEnTvufsDPG1zDD1Z6h8gTIaw/qD1WfcgL8IkayFlas7O1v1Gk6cpv614SLdkbjOe HXuWELdBqGLIThbENmVeO7sBzwqtxbyoNNpswyBJeGMxCCFQz3RLSJp5i46pip/gisJLj 5kdTpPDHAis8FyvB2sIgo69csaN6nqpif5bOLlfeM6TGPP9+hq0v8eeHygWPkTUYLL3aH mexYchmXLk6lXl3R284RhLKydCUMMnBALV0Dp7W9yHZXr8i9Sz87S/VjnYpgv3xCVcmHk +bfNdmviC+73z07rOkMNpYjhEMdWF8ghv5IiZ1/MUjt+eX27hqSZ90B5s0YROTE= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Mon, 18 May 2026 16:35:59 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH v2] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 In-Reply-To: References: Message-ID: <0f3b4071c849c17b1150eeb3fa084639@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779114960-12B70F3B-966F51F7/0/0 X-purgate-type: clean X-purgate-size: 946 On 2026-05-18 11:51, Jan Beulich wrote: > ... ("Conversions shall not be performed between a pointer to an > incomplete type and any other type"): Add an intermediate cast to > unsigned long. > Stale comment I presume. > Signed-off-by: Jan Beulich Reviewed-by: Nicola Vetrini > --- > v2: Add comment. > > --- a/xen/arch/x86/cpu/mcheck/mce.c > +++ b/xen/arch/x86/cpu/mcheck/mce.c > @@ -1264,7 +1264,8 @@ static void cf_check __maybe_unused x86_ > > #if BITS_PER_LONG == 64 > > -#define ID2COOKIE(id) ((mctelem_cookie_t)(id)) > +/* Two layers of casting to cover Misra C:2012 rule 11.2. */ > +#define ID2COOKIE(id) ((mctelem_cookie_t)(void *)(id)) > #define COOKIE2ID(c) ((uint64_t)(c)) > > #elif defined(BITS_PER_LONG) -- Nicola Vetrini, B.Sc. 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Mon, 18 May 2026 07:58:25 -0700 (PDT) Message-ID: <51437c77-f622-4934-aa81-682fa06be3fb@suse.com> Date: Mon, 18 May 2026 16:58:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/shim: adjust for Misra C:2012 rule 20.12 To: Nicola Vetrini Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <8fc9b5efd6c83bc2aadbe058eed83615@bugseng.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8fc9b5efd6c83bc2aadbe058eed83615@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779116305-B7171DB1-097A4195/0/0 X-purgate-type: clean X-purgate-size: 794 On 18.05.2026 16:33, Nicola Vetrini wrote: > On 2026-05-18 13:42, Jan Beulich wrote: >> ... ("A macro parameter used as an operand to the `#' or `##' >> operators, >> which is itself subject to further macro replacement, shall only be >> used >> as an operand to these operators"). Leverage the SAF-6 annotation we >> have >> available. >> >> Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini Thanks. >> --- >> As per the placement in arm/tee/ffa.c two instances of the SAF comment >> (ahead of the macro definitions) should suffice. Eclair demands one >> instance per macro use here, however (much like we have it in >> x86/dom{ain,ctl}.c). Do you perhaps have any insight on this (apparent?) anomaly? Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 14:59:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 14:59:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1311991.1582155 (Exim 4.92) (envelope-from ) id 1wOzRa-0004nj-R6; Mon, 18 May 2026 14:59:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1311991.1582155; Mon, 18 May 2026 14:59:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOzRa-0004nc-OL; Mon, 18 May 2026 14:59:46 +0000 Received: by outflank-mailman (input) for mailman id 1311991; Mon, 18 May 2026 14:59:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOzRZ-0004nU-A6 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 14:59:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOzRY-00AOzl-MR for xen-devel@lists.xenproject.org; Mon, 18 May 2026 16:59:44 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b295a-2eae-0a2a0a5409dd-0a2a4506855c-2 for ; Mon, 18 May 2026 16:59:44 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b2960-7371-0a2a45060019-d155dd35f1f4-3 for ; Mon, 18 May 2026 16:59:44 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-452169ae568so1547807f8f.3 for ; Mon, 18 May 2026 07:59:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 18 May 2026 07:59:44 -0700 (PDT) Message-ID: <93e1e5a0-95b0-4494-b661-b6d583864c16@suse.com> Date: Mon, 18 May 2026 16:59:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] x86/MCE: adjust ID2COOKIE() for Misra C:2012 rule 11.2 To: Nicola Vetrini Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <0f3b4071c849c17b1150eeb3fa084639@bugseng.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0f3b4071c849c17b1150eeb3fa084639@bugseng.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779116384-8C87AD75-EC539A68/0/0 X-purgate-type: clean X-purgate-size: 469 On 18.05.2026 16:35, Nicola Vetrini wrote: > On 2026-05-18 11:51, Jan Beulich wrote: >> ... ("Conversions shall not be performed between a pointer to an >> incomplete type and any other type"): Add an intermediate cast to >> unsigned long. > > Stale comment I presume. Indeed, forgot to edit it again after the failed attempt. >> Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini Thanks. Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 15:08:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:08:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312001.1582165 (Exim 4.92) (envelope-from ) id 1wOzZx-0006av-If; Mon, 18 May 2026 15:08:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312001.1582165; Mon, 18 May 2026 15:08:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOzZx-0006ao-Fo; Mon, 18 May 2026 15:08:25 +0000 Received: by outflank-mailman (input) for mailman id 1312001; Mon, 18 May 2026 15:08:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOzZw-0006ai-AC for xen-devel@lists.xenproject.org; Mon, 18 May 2026 15:08:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOzZv-00GaMg-86 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 17:08:23 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b2b5d-bab6-0a2a0a5309dd-0a2a4506e7f0-40 for ; Mon, 18 May 2026 17:08:23 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b2b66-7371-0a2a45060019-d1558030dd43-3 for ; Mon, 18 May 2026 17:08:23 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891b0786beso17328005e9.1 for ; Mon, 18 May 2026 08:08:23 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Mon, 18 May 2026 08:08:22 -0700 (PDT) Message-ID: <41d236ba-a93d-446a-b29a-449a1c5f8972@suse.com> Date: Mon, 18 May 2026 17:08:21 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: Dario Faggioli , Meng Xu Cc: "xen-devel@lists.xenproject.org" , Oleksii Moisieiev From: Jan Beulich Subject: RTDS scheduler patches Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1779116903-7F77FD75-4CD0A066/0/0 X-purgate-type: clean X-purgate-size: 526 Hello, would you mind taking a look at two patches, both of which were reviewed by Jürgen and hence hopefully should be relatively straightforward to given an ack for: https://lists.xen.org/archives/html/xen-devel/2026-03/msg01341.html https://lists.xen.org/archives/html/xen-devel/2026-04/msg00162.html In case of continued lack of response, I guess I'm going to commit the patches as-is towards the end of this week. Oleksii, fyi: Generally it is the submitter's responsibility to chase acks. Thanks, Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 15:13:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:13:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312008.1582173 (Exim 4.92) (envelope-from ) id 1wOzf3-000883-5C; Mon, 18 May 2026 15:13:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312008.1582173; Mon, 18 May 2026 15:13:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOzf3-00087w-2C; Mon, 18 May 2026 15:13:41 +0000 Received: by outflank-mailman (input) for mailman id 1312008; Mon, 18 May 2026 15:13:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wOzf2-00087q-Kg for xen-devel@lists.xenproject.org; Mon, 18 May 2026 15:13:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOzf1-003hkX-SA for xen-devel@lists.xenproject.org; Mon, 18 May 2026 17:13:39 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b2c94-5cb7-0a2a0a5109dd-0a2a450ca68a-36 for ; Mon, 18 May 2026 17:13:39 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b2ca3-62f1-0a2a450c0019-d1558029ac72-3 for ; Mon, 18 May 2026 17:13:39 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488a14c31eeso14654895e9.0 for ; Mon, 18 May 2026 08:13:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1779117219-DB57FCF5-B0F7B8C4/10/73395122804 X-purgate-type: spam X-purgate-size: 1620 On 08.05.2026 16:43, Oleksii Kurochko wrote: > The p2m_freelist is used to allocate pages for the P2M. To initialize > this list, domain_p2m_set_allocation() may be called from construct_domU() > in the common Dom0less code, so RISC-V provides an implementation and > enables CONFIG_ARCH_PAGING_MEMPOOL unconditionally. > > Additionally, implement arch_{set,get}_paging_mempool_size(). They are > not directly used yet, but are required to support the > XEN_DOMCTL_{get,set}_paging_mempool_size hypercalls. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich with ... > --- a/xen/arch/riscv/p2m.c > +++ b/xen/arch/riscv/p2m.c > @@ -1606,3 +1606,27 @@ struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, > > return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); > } > + > +int arch_set_paging_mempool_size(struct domain *d, uint64_t size) > +{ > + unsigned long pages = PFN_DOWN(size); > + int rc; > + > + /* Non page-sized request or 32-bit overflow? */ > + if ( pfn_to_paddr(pages) != size ) > + return -EINVAL; > + > + spin_lock(&d->arch.paging.lock); > + rc = p2m_set_allocation(d, pages, true); > + spin_unlock(&d->arch.paging.lock); > + > + return rc; > +} > + > +/* Return the size of the pool, in bytes. */ > +int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) > +{ > + *size = pfn_to_paddr(ACCESS_ONCE(d->arch.paging.total_pages)); ... the stray blank dropped from here. Will take care of this when committing. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779117568-38149938-86D0F5B5/10/73395122804 X-purgate-type: spam X-purgate-size: 714 On 07.05.2026 10:58, Oleksii Kurochko wrote: > Introduce support for loading a Linux kernel Image which is got by > uncompressing of Image.gz on RISC-V. > > kernel_image_load() and place_modules() currently call panic() on > failure rather than returning an error. This is because the common > kernel_load() in common/device-tree/kernel.c does not expect a > return code. Handling errors gracefully would require a separate > refactor. > > The implementation is based on the Xen Arm kernel loading code. > > text_offset is available for both 32-bit and 64-bit Image, so fix > that. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312024.1582191 (Exim 4.92) (envelope-from ) id 1wOznT-00024x-7o; Mon, 18 May 2026 15:22:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312024.1582191; Mon, 18 May 2026 15:22:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wOznT-00024q-4f; Mon, 18 May 2026 15:22:23 +0000 Received: by outflank-mailman (input) for mailman id 1312024; Mon, 18 May 2026 15:22:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wOznS-00024k-0t for xen-devel@lists.xenproject.org; Mon, 18 May 2026 15:22:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wOznR-00EwqX-D6 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 17:22:21 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b2ead-e002-0a2a0a5209dd-0a2a45019328-0 for ; Mon, 18 May 2026 17:22:21 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b2ead-c1f2-0a2a45010019-d1558030b48e-3 for ; Mon, 18 May 2026 17:22:21 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488af96f6b2so27171865e9.0 for ; Mon, 18 May 2026 08:22:21 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5a48ba01dad3a54b404524956fb39e7e3e673a93.1778140240.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1779117741-ACC53FF4-66348244/10/73395122804 X-purgate-type: spam X-purgate-size: 2661 On 07.05.2026 10:58, Oleksii Kurochko wrote: > Rework G-stage mode handling to make the selected mode descriptor > reusable outside of p2m initialization, both for filling CPU nodes in > the device tree passed to dom0less guests and for per-domain G-stage > mode selection at domain creation time. > > Promote gstage_modes[] from a local __initconst variable inside > gstage_mode_detect() to a file-scope static const array, and convert > max_gstage_mode from an embedded struct (assigned by value) to a global > const pointer into gstage_modes[]. This allows referencing both the mode > identifier and the mode name after init without copying the descriptor. > Remove get_max_supported_mode(); its callers now dereference > max_gstage_mode->mode directly. > > Change struct p2m_domain::mode from an embedded gstage_mode_desc to a > const pointer into gstage_modes[], so each domain shares the descriptor > rather than carrying its own copy. > > Adjust the gstage_modes[] entries in three ways: > - Use lowercase names without the "x4" suffix (e.g. "sv39" instead of > "Sv39x4"). The DT mmu-type binding [1] does not include the suffix, > so the name can now be passed directly to the guest without > transformation. The suffix is appended only in the diagnostic > printk, where it remains informative. > - Use "none" for Bare mode (HGATP_MODE_OFF) to match the DT binding. > - Change paging_levels to represent the root page-table level index > (i.e. total paging levels minus one) rather than the total count. > P2M_ROOT_LEVEL() now returns the correct VPN index directly, without > requiring callers to subtract one or use hardcoded offsets. > > Add gstage_mode to xen_arch_domainconfig so the toolstack can > request a specific G-stage mode at domain creation time. Introduce > find_gstage_mode() to resolve a mode descriptor by HGATP_MODE_*, > capping the result at max_gstage_mode to prevent requesting a mode > the hardware does not support. Update p2m_init() to accept a > xen_domctl_createdomain pointer and call find_gstage_mode() > instead of hardcoding Sv39x4. > > Add arch_parse_dom0less_node() in a new dom0less-build.c to read the > "mmu-type" DT property from a guest domain node and store it in > boot_domain::create_cfg.arch.gstage_mode, falling back to maximum > supported mode when the property is absent. > > [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/riscv/cpus.yaml?h=v6.19-rc3#n82 > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312030.1582202 (Exim 4.92) (envelope-from ) id 1wOznp-0002Ts-Fb; Mon, 18 May 2026 15:22:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312030.1582202; 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Mon, 18 May 2026 17:22:42 +0200 Received: from mail2.vates.fr ([37.26.189.201] mail2.vates.fr) (Authenticated sender: 8631fc262581453bbf619ec5b2062170/smtp/7773de5a-2839-4720-82ee-e06722ae1d3e) by prod-mta-13.swg-srv.net (ZoneMTA - prod-mta-13) with ESMTPSA id 19e3bae951e000f373.006 for (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Mon, 18 May 2026 15:22:37 +0000 Received: from localhost.localdomain (88-175-170-134.subs.proxad.net [88.175.170.134]) (Authenticated sender: teddy.astie@vates.tech) by mail2.vates.fr (Postfix) with ESMTPSA id 0AC5F8661A; Mon, 18 May 2026 17:22:37 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=eY2fdw+gmvQcsbHIwQEVTX0BWf+Umr3H4vi3FSP+vPs=; h=from:subject:date:message-id:to:cc:mime-version:content-type:feedback-id; b=mrZSNL15/2otbQ+Cc7U2CURUdyavKWBFjvCttg6Yy9el0TJGzG15c8jgzq4DIY4+pIXqMamHp CPAIPzNqxtdAuc1b+XY/5Xr5Zpk2HPEXJaPSS49p0oFhdDAAFRCOQOQiXjPeopC21u1vRsYNGKa HtMBYfR2OZzPCy9Q/PtiRNLoT1CjVpKDZFcn0XVYOXJLAjFvhdlnGNltHRlacEflTWZCAf9DMAl FDvu9mUD5Eag5Oqh5FI6RttRWaD8yOt6Tc88RpCXKpvPXrtFC6pq1jEhXnXK552wl+PLsik8g9K c+Zbn/4Pd6Cg6dH8/XCnEWFRPKJ4fn+eL9rO8AivMaGw== X-Zone-Loop: f7968938d8e7a305757c45ce51c9015bfb0ad428f836 x-campaign-type: default x-transaction-id: 7dda9839-6225-433d-a97f-942a0b3ee0e7 x-swg-uid: 01-cd6c7802-fc5a-42ff-be83-ccce10616db6 X-Mailer: Sweego Message-ID: <1779117757.8631fc262581453bbf619ec5b2062170.19e3bae951e000f373@vates.tech> x-swg-bid: 1779117757.8631fc262581453bbf619ec5b2062170.19e3bae951e000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk Subject: [PATCH 0/5] Small PCI refactoring Date: Mon, 18 May 2026 17:21:24 +0200 MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.e0f.e56d5032f9a0f31f.19e3bae9324.438d1bb93da6ab6f=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117757225 X-purgate-ID: tlsNG-bad1c0/1779117763-89D85A53-CA40CAD9/0/0 X-purgate-type: clean X-purgate-size: 4492 ---=Part.e0f.e56d5032f9a0f31f.19e3bae9324.438d1bb93da6ab6f=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable The goal of this series is to make some refactoring of some pci primitives to improve codegen and make code less verbose=2E A big chunk of it is converting many places where (seg, bus, dev, fn) is split into multiples variables and convert it into being just pci_sbdf_t, in particular in some PCI function parameters to reduce parameter count which usually translate into less registers to pass to the function=2E Moreover, we also avoid translating back and forth between pci_sbdf_t and individual (seg, bus, dev, fn)=2E Latest patch attempts to improve codegen of pci_conf_{read,write}N() by making them inline specialized variants of pci_mmcfg_{read,write}() in order to eliminate a particular `switch (len)` at compile time=2E No intended functional change, aside some parts of the codebase that will now correctly handle PCI segment when parsed while it was previously ignored (e=2Eg dbgp)=2E Bloat-o-meter is pretty telling add/remove: 4/2 grow/shrink: 11/14 up/down: 529/-1470 (-941) Function old new delta pci_mmcfg_base - 106 +106 parse_pci_sbdf_seg - 88 +88 parse_pci_sbdf - 85 +85 pci_dev_base - 56 +56 pci_conf_read16 92 118 +26 pci_conf_read8 92 117 +25 ehci_dbgp_init 629 652 +23 pci_conf_read32 94 116 +22 pci_conf_write32 88 109 +21 symbols_names 106435 106452 +17 symbols_sorted_offsets 59672 59688 +16 pci_conf_write16 94 109 +15 pci_conf_write8 94 108 +14 reserve_unity_map_for_device 434 445 +11 symbols_offsets 31920 31924 +4 mmcfg_intercept_write 194 193 -1 add_one_user_rmrr 653 644 -9 __find_dbgp 87 60 -27 pci_device_detect 89 55 -34 pci_mmcfg_write 197 152 -45 _scan_pci_devices 286 241 -45 parse_ivrs_ioapic 292 235 -57 parse_rmrr_param 484 420 -64 register_one_rmrr 389 324 -65 parse_ivrs_hpet 249 184 -65 parse_ivmd_param 651 570 -81 acpi_parse_dmar 2625 2520 -105 get_virt 106 - -106 pci_mmcfg_read 189 - -189 ns16550_init 3205 3002 -203 acpi_parse_dev_scope 1465 1091 -374 Teddy Astie (5): pci: Introduce parse_pci_sbdf{_seg}() vtd: Use pci_sbdf_t in acpi_parse_dev_scope() pci: Use pci_sbdf_t in pci_device_detect() pci: Parse into pci_sbdf_t directly RFC: pci: Migrate pci_mmcfg_{read,write}() to pci=2Ec xen/arch/x86/pv/ro-page-fault=2Ec | 3 +- xen/arch/x86/x86_64/mmconfig=2Eh | 43 -------- xen/arch/x86/x86_64/mmconfig_64=2Ec | 106 ++++---------------- xen/arch/x86/x86_64/pci=2Ec | 122 +++++++++++++++++++++-- xen/drivers/char/ehci-dbgp=2Ec | 35 +++---- xen/drivers/char/ns16550=2Ec | 24 ++--- xen/drivers/char/xhci-dbc=2Ec | 6 +- xen/drivers/passthrough/amd/iommu_acpi=2Ec | 26 ++--- xen/drivers/passthrough/pci=2Ec | 16 +-- xen/drivers/passthrough/vtd/dmar=2Ec | 80 ++++++--------- xen/drivers/pci/pci=2Ec | 18 ++++ xen/include/xen/pci=2Eh | 11 +- 12 files changed, 243 insertions(+), 247 deletions(-) --=20 2=2E52=2E0 -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vate= s=2Etech ---=Part.e0f.e56d5032f9a0f31f.19e3bae9324.438d1bb93da6ab6f=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312032.1582210 (Exim 4.92) (envelope-from ) id 1wOznq-0002hG-KU; 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boundary="-=Part.e10.d9fc5c64d1b2dcab.19e3bae9dc2.30edf48ed9c9f35b=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117759939 X-purgate-ID: tlsNG-bad1c0/1779117764-43B78A53-5C9ECE71/0/0 X-purgate-type: clean X-purgate-size: 2325 ---=Part.e10.d9fc5c64d1b2dcab.19e3bae9dc2.30edf48ed9c9f35b=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable In many places, we're parsing a PCI string into individual parts (seg, bus, dev, fn) and then transform it into a pci_sbdf_t using PCI_SBDF macro=2E Rather than converting from parts to pci_sbdf_t and vice versa, introduce a new function that parses a PCI string into a pci_sbdf_t struct= ure directly=2E Signed-off-by: Teddy Astie --- xen/drivers/pci/pci=2Ec | 18 ++++++++++++++++++ xen/include/xen/pci=2Eh | 3 +++ 2 files changed, 21 insertions(+) diff --git a/xen/drivers/pci/pci=2Ec b/xen/drivers/pci/pci=2Ec index 084be3880c=2E=2E1d06cb035b 100644 --- a/xen/drivers/pci/pci=2Ec +++ b/xen/drivers/pci/pci=2Ec @@ -202,3 +202,21 @@ const char *__init parse_pci_seg(const char *s, unsig= ned int *seg_p, =20 return s; } + +const char *parse_pci_sbdf(const char *s, pci_sbdf_t *sbdf) +{ + unsigned int seg, bus, dev, func; + const char *out =3D parse_pci(s, &seg, &bus, &dev, &func); + + *sbdf =3D PCI_SBDF(seg, bus, dev, func); + return out; +} + +const char *parse_pci_sbdf_seg(const char *s, pci_sbdf_t *sbdf, bool *def= _seg) +{ + unsigned int seg, bus, dev, func; + const char *out =3D parse_pci_seg(s, &seg, &bus, &dev, &func, def_seg= ); + + *sbdf =3D PCI_SBDF(seg, bus, dev, func); + return out; +} diff --git a/xen/include/xen/pci=2Eh b/xen/include/xen/pci=2Eh index afb6bbf50d=2E=2E7bfc59cd75 100644 --- a/xen/include/xen/pci=2Eh +++ b/xen/include/xen/pci=2Eh @@ -280,6 +280,9 @@ const char *parse_pci_seg(const char *s, unsigned int = *seg_p, unsigned int *bus_p, unsigned int *dev_p, unsigned int *func_p, bool *def_seg); =20 +const char *parse_pci_sbdf(const char *s, pci_sbdf_t *sbdf); +const char *parse_pci_sbdf_seg(const char *s, pci_sbdf_t *sbdf, bool *def= _seg); + #define PCI_BAR_VF (1u << 0) #define PCI_BAR_LAST (1u << 1) #define PCI_BAR_ROM (1u << 2) --=20 2=2E52=2E0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.e10.d9fc5c64d1b2dcab.19e3bae9dc2.30edf48ed9c9f35b=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312033.1582218 (Exim 4.92) (envelope-from ) id 1wOzns-0002x9-Qv; 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boundary="-=Part.e11.3c2322387242062c.19e3baea229.9e26cb71c0c8c4a4=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117761065 X-purgate-ID: tlsNG-bad1c0/1779117766-40762A53-2671C2FB/0/0 X-purgate-type: clean X-purgate-size: 6252 ---=Part.e11.3c2322387242062c.19e3baea229.9e26cb71c0c8c4a4=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Use a dedicated pci_sbdf_t struct that we update instead of recreating one each time we need it=2E Signed-off-by: Teddy Astie --- xen/drivers/passthrough/vtd/dmar=2Ec | 42 ++++++++++++------------------ 1 file changed, 16 insertions(+), 26 deletions(-) diff --git a/xen/drivers/passthrough/vtd/dmar=2Ec b/xen/drivers/passthroug= h/vtd/dmar=2Ec index 2a756831a6=2E=2Ec36f4bbd7b 100644 --- a/xen/drivers/passthrough/vtd/dmar=2Ec +++ b/xen/drivers/passthrough/vtd/dmar=2Ec @@ -310,7 +310,7 @@ static int __init acpi_parse_dev_scope( { struct acpi_ioapic_unit *acpi_ioapic_unit; const struct acpi_dmar_device_scope *acpi_scope; - u16 bus, sub_bus, sec_bus; + u16 sub_bus, sec_bus; const struct acpi_dmar_pci_path *path; struct acpi_drhd_unit *drhd =3D type =3D=3D DMAR_TYPE ? container_of(scope, struct acpi_drhd_unit, scope) : NULL; @@ -332,29 +332,26 @@ static int __init acpi_parse_dev_scope( =20 while ( start < end ) { + pci_sbdf_t dev_sbdf; acpi_scope =3D start; path =3D (const void *)(acpi_scope + 1); depth =3D (acpi_scope->length - sizeof(*acpi_scope)) / sizeof(*pa= th); - bus =3D acpi_scope->bus; + dev_sbdf =3D PCI_SBDF(seg, acpi_scope->bus, path->dev, path->fn); =20 while ( --depth > 0 ) { - bus =3D pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn= ), - PCI_SECONDARY_BUS); + dev_sbdf=2Ebus =3D pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS= ); path++; } =20 switch ( acpi_scope->entry_type ) { case ACPI_DMAR_SCOPE_TYPE_BRIDGE: - sec_bus =3D pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path= ->fn), - PCI_SECONDARY_BUS); - sub_bus =3D pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path= ->fn), - PCI_SUBORDINATE_BUS); + sec_bus =3D pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS); + sub_bus =3D pci_conf_read8(dev_sbdf, PCI_SUBORDINATE_BUS); if ( iommu_verbose ) printk(VTDPREFIX " bridge: %pp start=3D%x sec=3D%x sub=3D= %x\n", - &PCI_SBDF(seg, bus, path->dev, path->fn), - acpi_scope->bus, sec_bus, sub_bus); + &dev_sbdf, acpi_scope->bus, sec_bus, sub_bus); =20 dmar_scope_add_buses(scope, sec_bus, sub_bus); gfx_only =3D false; @@ -362,8 +359,7 @@ static int __init acpi_parse_dev_scope( =20 case ACPI_DMAR_SCOPE_TYPE_HPET: if ( iommu_verbose ) - printk(VTDPREFIX " MSI HPET: %pp\n", - &PCI_SBDF(seg, bus, path->dev, path->fn)); + printk(VTDPREFIX " MSI HPET: %pp\n", &dev_sbdf); =20 if ( drhd ) { @@ -374,9 +370,7 @@ static int __init acpi_parse_dev_scope( if ( !acpi_hpet_unit ) goto out; acpi_hpet_unit->id =3D acpi_scope->enumeration_id; - acpi_hpet_unit->bus =3D bus; - acpi_hpet_unit->dev =3D path->dev; - acpi_hpet_unit->func =3D path->fn; + acpi_hpet_unit->bdf =3D dev_sbdf=2Ebdf; list_add(&acpi_hpet_unit->list, &drhd->hpet_list); =20 gfx_only =3D false; @@ -386,16 +380,15 @@ static int __init acpi_parse_dev_scope( =20 case ACPI_DMAR_SCOPE_TYPE_ENDPOINT: if ( iommu_verbose ) - printk(VTDPREFIX " endpoint: %pp\n", - &PCI_SBDF(seg, bus, path->dev, path->fn)); + printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); =20 - if ( drhd && pci_device_detect(seg, bus, path->dev, path->fn)= ) + if ( drhd && pci_device_detect(seg, dev_sbdf=2Ebus, dev_sbdf= =2Edev, dev_sbdf=2Efn) ) { - if ( pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->f= n), + if ( pci_conf_read8(dev_sbdf, PCI_CLASS_DEVICE + 1) !=3D 0x03 /* PCI_BASE_CLASS_DISPLAY */ ) gfx_only =3D false; - else if ( !seg && !bus && path->dev =3D=3D 2 && !path->fn= ) + else if ( !seg && !dev_sbdf=2Ebus && path->dev =3D=3D 2 &= & !path->fn ) igd_drhd_address =3D drhd->address; } =20 @@ -403,8 +396,7 @@ static int __init acpi_parse_dev_scope( =20 case ACPI_DMAR_SCOPE_TYPE_IOAPIC: if ( iommu_verbose ) - printk(VTDPREFIX " IOAPIC: %pp\n", - &PCI_SBDF(seg, bus, path->dev, path->fn)); + printk(VTDPREFIX " IOAPIC: %pp\n", &dev_sbdf); =20 if ( drhd ) { @@ -413,9 +405,7 @@ static int __init acpi_parse_dev_scope( if ( !acpi_ioapic_unit ) goto out; acpi_ioapic_unit->apic_id =3D acpi_scope->enumeration_id; - acpi_ioapic_unit->ioapic=2Ebdf=2Ebus =3D bus; - acpi_ioapic_unit->ioapic=2Ebdf=2Edev =3D path->dev; - acpi_ioapic_unit->ioapic=2Ebdf=2Efunc =3D path->fn; + acpi_ioapic_unit->ioapic=2Einfo =3D dev_sbdf=2Ebdf; list_add(&acpi_ioapic_unit->list, &drhd->ioapic_list); =20 gfx_only =3D false; @@ -431,7 +421,7 @@ static int __init acpi_parse_dev_scope( gfx_only =3D false; continue; } - scope->devices[didx++] =3D PCI_BDF(bus, path->dev, path->fn); + scope->devices[didx++] =3D dev_sbdf=2Ebdf; start +=3D acpi_scope->length; } =20 --=20 2=2E52=2E0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.e11.3c2322387242062c.19e3baea229.9e26cb71c0c8c4a4=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312034.1582228 (Exim 4.92) (envelope-from ) id 1wOznv-0003DF-84; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=O6ocY0J81NVJcReSQBFthd8sYgfa3BLGnk02uzct2iw=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=ZrZPJ3s/fleYX/xAysYJ6HoF8iTG+nxLxXGyBOyWze9EpmaheIRgzg7xUVJcAT7XpNRe7/Pvj nPqkPggKwizR6iCYMTUDzHaoWj9G8a4fGQx0U6Hzib+wWfiW6YhjRipYIzHaDUW6RpFl+SlE8EK cFqJciEuoyRIyo7AjMyOj3+7TjjvueZ7Og9t6kAawQjo+zZv9OeGQKHd4JNBP8FazAyKZiUQM+l 0xTTl2bD6DVC3gFsdZLYqnkg7OMcPUD107ITIFkpgJirbPbP3lZ2ywfjZbx/vdD1vc5vymA4Lhj OPUEtYTXexGhN67R2ybkLpRKeU7tXgKj55l0X8p0gC2Q== X-Zone-Loop: 2c2c7f5aebc096ebbb0e05f1a44c4488354743e3b1d5 x-campaign-type: default x-transaction-id: 8e04ef81-ca38-477e-a597-392152684044 x-swg-uid: 01-acdefb6b-ad92-4dfd-a095-c0c107a09548 X-Mailer: Sweego Message-ID: <1779117762.8631fc262581453bbf619ec5b2062170.19e3baea7d1000f373@vates.tech> x-swg-bid: 1779117762.8631fc262581453bbf619ec5b2062170.19e3baea7d1000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 3/5] pci: Use pci_sbdf_t in pci_device_detect() Date: Mon, 18 May 2026 17:21:27 +0200 In-Reply-To: References: MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.e12.78b7f5f2db119c52.19e3baea65b.9c8c7b9182c5f9=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117762139 X-purgate-ID: tlsNG-bad1c0/1779117769-4015DA53-E145900E/0/0 X-purgate-type: clean X-purgate-size: 10736 ---=Part.e12.78b7f5f2db119c52.19e3baea65b.9c8c7b9182c5f9=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Use a single pci_sbdf_t instead of each of its part as individual parameter= s=2E Signed-off-by: Teddy Astie --- xen/drivers/char/ehci-dbgp=2Ec | 35 ++++++++++++++---------------- xen/drivers/passthrough/pci=2Ec | 16 +++++++------- xen/drivers/passthrough/vtd/dmar=2Ec | 33 +++++++++++----------------- xen/include/xen/pci=2Eh | 2 +- 4 files changed, 38 insertions(+), 48 deletions(-) diff --git a/xen/drivers/char/ehci-dbgp=2Ec b/xen/drivers/char/ehci-dbgp= =2Ec index a5c79f56fc=2E=2E39a047eb3f 100644 --- a/xen/drivers/char/ehci-dbgp=2Ec +++ b/xen/drivers/char/ehci-dbgp=2Ec @@ -681,16 +681,14 @@ static int dbgp_control_msg(struct ehci_dbgp *dbgp, = unsigned int devnum, return ret; } =20 -static unsigned int __init __find_dbgp(u8 bus, u8 slot, u8 func) +static unsigned int __init __find_dbgp(pci_sbdf_t sbdf) { - uint32_t class =3D pci_conf_read32(PCI_SBDF(0, bus, slot, func), - PCI_CLASS_REVISION); + uint32_t class =3D pci_conf_read32(sbdf, PCI_CLASS_REVISION); =20 if ( (class >> 8) !=3D PCI_CLASS_SERIAL_USB_EHCI ) return 0; =20 - return pci_find_cap_offset(PCI_SBDF(0, bus, slot, func), - PCI_CAP_ID_EHCI_DEBUG); + return pci_find_cap_offset(sbdf, PCI_CAP_ID_EHCI_DEBUG); } =20 static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp, @@ -704,20 +702,20 @@ static unsigned int __init find_dbgp(struct ehci_dbg= p *dbgp, { for ( func =3D 0; func < 8; func++ ) { + pci_sbdf_t sbdf =3D PCI_SBDF(0, bus, slot, func); unsigned int cap; =20 - if ( !pci_device_detect(0, bus, slot, func) ) + if ( !pci_device_detect(sbdf) ) { if ( !func ) break; continue; } =20 - cap =3D __find_dbgp(bus, slot, func); + cap =3D __find_dbgp(sbdf); if ( !cap || ehci_num-- ) { - if ( !func && !(pci_conf_read8(PCI_SBDF(0, bus, slot,= func), - PCI_HEADER_TYPE) & 0x8= 0) ) + if ( !func && !(pci_conf_read8(sbdf, PCI_HEADER_TYPE)= & 0x80) ) break; continue; } @@ -1510,25 +1508,24 @@ void __init ehci_dbgp_init(void) } else if ( strncmp(opt_dbgp + 4, "@pci", 4) =3D=3D 0 ) { - unsigned int bus, slot, func; - - e =3D parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func); + pci_sbdf_t sbdf =3D PCI_SBDF(0, 0, 0, 0); + =20 + e =3D parse_pci_sbdf(opt_dbgp + 8, &sbdf); if ( !e || *e ) return; =20 - dbgp->bus =3D bus; - dbgp->slot =3D slot; - dbgp->func =3D func; + dbgp->bus =3D sbdf=2Ebus; + dbgp->slot =3D sbdf=2Edev; + dbgp->func =3D sbdf=2Efn; =20 - if ( !pci_device_detect(0, bus, slot, func) ) + if ( !pci_device_detect(sbdf) ) return; =20 - dbgp->cap =3D __find_dbgp(bus, slot, func); + dbgp->cap =3D __find_dbgp(sbdf); if ( !dbgp->cap ) return; =20 - dbgp_printk("Using EHCI debug port on %02x:%02x=2E%u\n", - bus, slot, func); + dbgp_printk("Using EHCI debug port on %pp\n", &sbdf); } else return; diff --git a/xen/drivers/passthrough/pci=2Ec b/xen/drivers/passthrough/pci= =2Ec index 464bb0fee4=2E=2E7b2898bd5a 100644 --- a/xen/drivers/passthrough/pci=2Ec +++ b/xen/drivers/passthrough/pci=2Ec @@ -1166,11 +1166,11 @@ out: return ret; } =20 -bool __init pci_device_detect(u16 seg, u8 bus, u8 dev, u8 func) +bool __init pci_device_detect(pci_sbdf_t sbdf) { u32 vendor; =20 - vendor =3D pci_conf_read32(PCI_SBDF(seg, bus, dev, func), PCI_VENDOR_= ID); + vendor =3D pci_conf_read32(sbdf, PCI_VENDOR_ID); /* some broken boards return 0 or ~0 if a slot is empty: */ if ( (vendor =3D=3D 0xffffffffU) || (vendor =3D=3D 0x00000000U) || (vendor =3D=3D 0x0000ffffU) || (vendor =3D=3D 0xffff0000U) ) @@ -1221,24 +1221,24 @@ static int __init cf_check _scan_pci_devices(struc= t pci_seg *pseg, void *arg) { for ( func =3D 0; func < 8; func++ ) { - if ( !pci_device_detect(pseg->nr, bus, dev, func) ) + pci_sbdf_t sbdf =3D PCI_SBDF(pseg->nr, bus, dev, func); + + if ( !pci_device_detect(sbdf) ) { if ( !func ) break; continue; } =20 - pdev =3D alloc_pdev(pseg, bus, PCI_DEVFN(dev, func)); + pdev =3D alloc_pdev(pseg, bus, sbdf=2Edevfn); if ( !pdev ) { printk(XENLOG_WARNING "%pp: alloc_pdev failed\n", - &PCI_SBDF(pseg->nr, bus, dev, func)); + &sbdf); return -ENOMEM; } =20 - if ( !func && !(pci_conf_read8(PCI_SBDF(pseg->nr, bus, de= v, - func), - PCI_HEADER_TYPE) & 0x80) ) + if ( !func && !(pci_conf_read8(sbdf, PCI_HEADER_TYPE) & 0= x80) ) break; } } diff --git a/xen/drivers/passthrough/vtd/dmar=2Ec b/xen/drivers/passthroug= h/vtd/dmar=2Ec index c36f4bbd7b=2E=2E9f9b639eba 100644 --- a/xen/drivers/passthrough/vtd/dmar=2Ec +++ b/xen/drivers/passthrough/vtd/dmar=2Ec @@ -382,7 +382,7 @@ static int __init acpi_parse_dev_scope( if ( iommu_verbose ) printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); =20 - if ( drhd && pci_device_detect(seg, dev_sbdf=2Ebus, dev_sbdf= =2Edev, dev_sbdf=2Efn) ) + if ( drhd && pci_device_detect(dev_sbdf) ) { if ( pci_conf_read8(dev_sbdf, PCI_CLASS_DEVICE + 1) !=3D 0x03 @@ -505,7 +505,6 @@ acpi_parse_one_drhd(struct acpi_dmar_header *header) acpi_register_drhd_unit(dmaru); else { - u8 b, d, f; unsigned int i =3D 0; union { const void *raw; @@ -519,18 +518,16 @@ acpi_parse_one_drhd(struct acpi_dmar_header *header) for ( p=2Eraw =3D dev_scope_start; i < dmaru->scope=2Edevices_cnt= ; i++, p=2Eraw +=3D p=2Escope->length ) { + pci_sbdf_t sbdf =3D PCI_SBDF(drhd->segment, dmaru->scope=2Ede= vices[i]); + if ( p=2Escope->entry_type =3D=3D ACPI_DMAR_SCOPE_TYPE_IOAPIC= || p=2Escope->entry_type =3D=3D ACPI_DMAR_SCOPE_TYPE_HPET ) continue; =20 - b =3D PCI_BUS(dmaru->scope=2Edevices[i]); - d =3D PCI_SLOT(dmaru->scope=2Edevices[i]); - f =3D PCI_FUNC(dmaru->scope=2Edevices[i]); - - if ( !pci_device_detect(drhd->segment, b, d, f) ) + if ( !pci_device_detect(sbdf) ) printk(XENLOG_WARNING VTDPREFIX " Non-existent device (%pp) in this DRHD's scope!\= n", - &PCI_SBDF(drhd->segment, b, d, f)); + &sbdf); } =20 acpi_register_drhd_unit(dmaru); @@ -559,17 +556,14 @@ static int __init register_one_rmrr(struct acpi_rmrr= _unit *rmrru) =20 for ( ; i < rmrru->scope=2Edevices_cnt; i++ ) { - u8 b =3D PCI_BUS(rmrru->scope=2Edevices[i]); - u8 d =3D PCI_SLOT(rmrru->scope=2Edevices[i]); - u8 f =3D PCI_FUNC(rmrru->scope=2Edevices[i]); + pci_sbdf_t sbdf =3D PCI_SBDF(rmrru->segment, rmrru->scope=2Edevic= es[i]); =20 - if ( pci_device_detect(rmrru->segment, b, d, f) =3D=3D 0 ) + if ( pci_device_detect(sbdf) =3D=3D 0 ) { dprintk(XENLOG_WARNING VTDPREFIX, " Non-existent device (%pp) is reported" " in RMRR [%"PRIx64", %"PRIx64"]'s scope!\n", - &PCI_SBDF(rmrru->segment, b, d, f), - rmrru->base_address, rmrru->end_address); + &sbdf, rmrru->base_address, rmrru->end_address); ignore =3D true; } else @@ -753,15 +747,13 @@ static int __init register_one_satc(struct acpi_satc= _unit *satcu) =20 for ( ; i < satcu->scope=2Edevices_cnt; i++ ) { - uint8_t b =3D PCI_BUS(satcu->scope=2Edevices[i]); - uint8_t d =3D PCI_SLOT(satcu->scope=2Edevices[i]); - uint8_t f =3D PCI_FUNC(satcu->scope=2Edevices[i]); + pci_sbdf_t sbdf =3D PCI_SBDF(satcu->segment, satcu->scope=2Edevic= es[i]); =20 - if ( !pci_device_detect(satcu->segment, b, d, f) ) + if ( !pci_device_detect(sbdf) ) { dprintk(XENLOG_WARNING VTDPREFIX, " Non-existent device (%pp) is reported in SATC scope= !\n", - &PCI_SBDF(satcu->segment, b, d, f)); + &sbdf); ignore =3D true; } else @@ -1184,8 +1176,9 @@ int cf_check intel_iommu_get_reserved_device_memory( static int __init cf_check parse_rmrr_param(const char *str) { const char *s =3D str, *cur, *stmp; - unsigned int seg, bus, dev, func, dev_count; + unsigned int dev_count; unsigned long start, end; + pci_sbdf_t sbdf; =20 do { if ( nr_rmrr >=3D MAX_USER_RMRR ) diff --git a/xen/include/xen/pci=2Eh b/xen/include/xen/pci=2Eh index 7bfc59cd75=2E=2Ed816dcad05 100644 --- a/xen/include/xen/pci=2Eh +++ b/xen/include/xen/pci=2Eh @@ -218,7 +218,7 @@ static always_inline bool pcidevs_trylock(void) #endif =20 bool pci_known_segment(u16 seg); -bool pci_device_detect(u16 seg, u8 bus, u8 dev, u8 func); +bool pci_device_detect(pci_sbdf_t sbdf); int scan_pci_devices(void); enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn); int find_upstream_bridge(u16 seg, u8 *bus, u8 *devfn, u8 *secbus); --=20 2=2E52=2E0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.e12.78b7f5f2db119c52.19e3baea65b.9c8c7b9182c5f9=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312036.1582237 (Exim 4.92) (envelope-from ) id 1wOznz-0003YD-FG; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=lCuB8OipHgX7QjdQDTipGB47RFvpJl4Bz4q0RfmxJBs=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=hd9rHajzEWY8wNJdy32McJlSpsmZH1RhuUBwriwGo8dXVbzUxDs+3/VrwtNxSaN63Lj8HRQjd QXxoLePCqjCMEJc+qXL4mEZbB60ZAweyHu5x0ZEBCfWGUvnfW1S6BswrfFO6i/2Rk91npC5HDgr y+HcXqw1/uW4OGkcXVdwMNHj2Qjr+ikJGKcx+NuJEuAySuMnJxoh/rkEVC8vbFzt6lfO5IbRvOi St/gN7WEqpl5dxjY4BhQYIAf9GOqDvuciO3/D2qn2pWaHxXlzV2lWONGkPgRNH2WD5mHntmhGEA +SB6y5zOUkm4nLovGyb09ZJV5bovDbSIlogrhlEGw72w== X-Zone-Loop: 8591f7294167705024c8cd2dfe97522cd371b033b7a3 x-campaign-type: default x-transaction-id: 834ff78e-68be-46b5-b992-e9341c612e6d x-swg-uid: 01-57342fb2-2da4-44a0-a703-05dace5f91f6 X-Mailer: Sweego Message-ID: <1779117763.8631fc262581453bbf619ec5b2062170.19e3baeac47000f373@vates.tech> x-swg-bid: 1779117763.8631fc262581453bbf619ec5b2062170.19e3baeac47000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk Subject: [PATCH 4/5] pci: Parse into pci_sbdf_t directly Date: Mon, 18 May 2026 17:21:28 +0200 In-Reply-To: References: MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.e13.6ca638ed955f5b82.19e3baeaa36.1a70f84ed571b8b4=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117763126 X-purgate-ID: tlsNG-bad1c0/1779117773-40B60A53-503FCAF6/0/0 X-purgate-type: clean X-purgate-size: 9094 ---=Part.e13.6ca638ed955f5b82.19e3baeaa36.1a70f84ed571b8b4=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Use the newly introduced parse_pci_sbdf() and parse_pci_sbdf_seg() in order to parse into a pci_sbdf_t directly instead of reconstructing it afterward= =2E Signed-off-by: Teddy Astie --- xen/drivers/char/ns16550=2Ec | 24 +++++++++++----------- xen/drivers/char/xhci-dbc=2Ec | 6 +++--- xen/drivers/passthrough/amd/iommu_acpi=2Ec | 26 ++++++++++++------------ xen/drivers/passthrough/vtd/dmar=2Ec | 7 +++---- 4 files changed, 31 insertions(+), 32 deletions(-) diff --git a/xen/drivers/char/ns16550=2Ec b/xen/drivers/char/ns16550=2Ec index 878da27f2e=2E=2Efa2d0e5991 100644 --- a/xen/drivers/char/ns16550=2Ec +++ b/xen/drivers/char/ns16550=2Ec @@ -1572,22 +1572,22 @@ static bool __init parse_positional(struct ns16550= *uart, char **str) #ifdef CONFIG_HAS_PCI if ( *conf =3D=3D ',' && *++conf !=3D ',' ) { - unsigned int b, d, f; + pci_sbdf_t sbdf; =20 - conf =3D parse_pci(conf, NULL, &b, &d, &f); + conf =3D parse_pci_sbdf(conf, &sbdf); if ( !conf ) PARSE_ERR_RET("Bad port PCI coordinates"); - uart->pci_device =3D PCI_SBDF(0, b, d, f); + uart->pci_device =3D sbdf; uart->ps_bdf_enable =3D true; } =20 if ( *conf =3D=3D ',' && *++conf !=3D ',' ) { - unsigned int b, d, f; + pci_sbdf_t sbdf; =20 - if ( !parse_pci(conf, NULL, &b, &d, &f) ) + if ( !parse_pci_sbdf(conf, &sbdf) ) PARSE_ERR_RET("Bad bridge PCI coordinates"); - uart->pci_bridge =3D PCI_SBDF(0, b, d, f); + uart->pci_bridge =3D sbdf; uart->pb_bdf_enable =3D true; } #endif @@ -1671,22 +1671,22 @@ static bool __init parse_namevalue_pairs(char *str= , struct ns16550 *uart) =20 case port_bdf: { - unsigned int b, d, f; + pci_sbdf_t sbdf; =20 - if ( !parse_pci(param_value, NULL, &b, &d, &f) ) + if ( !parse_pci_sbdf(param_value, &sbdf) ) PARSE_ERR_RET("Bad port PCI coordinates\n"); - uart->pci_device =3D PCI_SBDF(0, b, d, f); + uart->pci_device =3D sbdf; uart->ps_bdf_enable =3D true; break; } =20 case bridge_bdf: { - unsigned int b, d, f; + pci_sbdf_t sbdf; =20 - if ( !parse_pci(param_value, NULL, &b, &d, &f) ) + if ( !parse_pci_sbdf(param_value, &sbdf) ) PARSE_ERR_RET("Bad bridge PCI coordinates\n"); - uart->pci_bridge =3D PCI_SBDF(0, b, d, f); + uart->pci_bridge =3D sbdf; uart->pb_bdf_enable =3D true; break; } diff --git a/xen/drivers/char/xhci-dbc=2Ec b/xen/drivers/char/xhci-dbc=2Ec index c1ff528de6=2E=2Ec7fd554be0 100644 --- a/xen/drivers/char/xhci-dbc=2Ec +++ b/xen/drivers/char/xhci-dbc=2Ec @@ -1357,9 +1357,9 @@ static int __init cf_check xhci_parse_dbgp(const cha= r *opt_dbgp) } else if ( strncmp(opt_dbgp + 4, "@pci", 4) =3D=3D 0 ) { - unsigned int bus, slot, func; + pci_sbdf_t sbdf; =20 - e =3D parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func); + e =3D parse_pci_sbdf(opt_dbgp + 8, &sbdf); if ( !e || (*e && *e !=3D ',') ) { printk(XENLOG_ERR @@ -1368,7 +1368,7 @@ static int __init cf_check xhci_parse_dbgp(const cha= r *opt_dbgp) return -EINVAL; } =20 - dbc->sbdf =3D PCI_SBDF(0, bus, slot, func); + dbc->sbdf =3D sbdf; } opt =3D e; =20 diff --git a/xen/drivers/passthrough/amd/iommu_acpi=2Ec b/xen/drivers/pass= through/amd/iommu_acpi=2Ec index 39ae637959=2E=2E7b40da33ae 100644 --- a/xen/drivers/passthrough/amd/iommu_acpi=2Ec +++ b/xen/drivers/passthrough/amd/iommu_acpi=2Ec @@ -682,8 +682,8 @@ static int __init cf_check parse_ivrs_ioapic(const cha= r *str) { const char *s =3D str; unsigned long id; - unsigned int seg, bus, dev, func; unsigned int idx; + pci_sbdf_t sbdf; =20 if ( *s !=3D '[' ) return -EINVAL; @@ -692,7 +692,7 @@ static int __init cf_check parse_ivrs_ioapic(const cha= r *str) if ( *s !=3D ']' || *++s !=3D '=3D' ) return -EINVAL; =20 - s =3D parse_pci(s + 1, &seg, &bus, &dev, &func); + s =3D parse_pci_sbdf(s + 1, &sbdf); if ( !s || *s ) return -EINVAL; =20 @@ -707,7 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const cha= r *str) } } =20 - ioapic_sbdf[idx]=2Esbdf =3D PCI_SBDF(seg, bus, dev, func); + ioapic_sbdf[idx]=2Esbdf =3D sbdf; ioapic_sbdf[idx]=2Eid =3D id; ioapic_sbdf[idx]=2Ecmdline =3D true; =20 @@ -719,7 +719,7 @@ static int __init cf_check parse_ivrs_hpet(const char = *str) { const char *s =3D str; unsigned long id; - unsigned int seg, bus, dev, func; + pci_sbdf_t sbdf; =20 if ( *s !=3D '[' ) return -EINVAL; @@ -728,12 +728,12 @@ static int __init cf_check parse_ivrs_hpet(const cha= r *str) if ( id !=3D (typeof(hpet_sbdf=2Eid))id || *s !=3D ']' || *++s !=3D '= =3D' ) return -EINVAL; =20 - s =3D parse_pci(s + 1, &seg, &bus, &dev, &func); + s =3D parse_pci_sbdf(s + 1, &sbdf); if ( !s || *s ) return -EINVAL; =20 hpet_sbdf=2Eid =3D id; - hpet_sbdf=2Esbdf =3D PCI_SBDF(seg, bus, dev, func); + hpet_sbdf=2Esbdf =3D sbdf; hpet_sbdf=2Einit =3D HPET_CMDL; =20 return 0; @@ -1399,13 +1399,13 @@ static int __init cf_check parse_ivmd_param(const = char *s) } =20 do { - unsigned int seg, bus, dev, func; + pci_sbdf_t sbdf; =20 if ( nr_ivmd >=3D ARRAY_SIZE(user_ivmds) ) return -E2BIG; =20 - s =3D parse_pci(s + 1, &seg, &bus, &dev, &func); - if ( !s || seg ) + s =3D parse_pci_sbdf(s + 1, &sbdf); + if ( !s || sbdf=2Eseg ) return -EINVAL; =20 user_ivmds[nr_ivmd]=2Estart_address =3D start << PAGE_SHIFT; @@ -1413,16 +1413,16 @@ static int __init cf_check parse_ivmd_param(const = char *s) user_ivmds[nr_ivmd]=2Eheader=2Eflags =3D ACPI_IVMD_UNITY | ACPI_IVMD_READ | ACPI_IVMD= _WRITE; user_ivmds[nr_ivmd]=2Eheader=2Elength =3D sizeof(*user_ivmds)= ; - user_ivmds[nr_ivmd]=2Eheader=2Edevice_id =3D PCI_BDF(bus, dev= , func); + user_ivmds[nr_ivmd]=2Eheader=2Edevice_id =3D sbdf=2Ebdf; user_ivmds[nr_ivmd]=2Eheader=2Etype =3D ACPI_IVRS_TYPE_MEMORY= _ONE; =20 if ( *s =3D=3D '-' ) { - s =3D parse_pci(s + 1, &seg, &bus, &dev, &func); - if ( !s || seg ) + s =3D parse_pci_sbdf(s + 1, &sbdf); + if ( !s || sbdf=2Eseg ) return -EINVAL; =20 - user_ivmds[nr_ivmd]=2Eaux_data =3D PCI_BDF(bus, dev, func= ); + user_ivmds[nr_ivmd]=2Eaux_data =3D sbdf=2Ebdf; if ( user_ivmds[nr_ivmd]=2Eaux_data < user_ivmds[nr_ivmd]=2Eheader=2Edevice_id ) return -EINVAL; diff --git a/xen/drivers/passthrough/vtd/dmar=2Ec b/xen/drivers/passthroug= h/vtd/dmar=2Ec index 9f9b639eba=2E=2Edafe1b62f6 100644 --- a/xen/drivers/passthrough/vtd/dmar=2Ec +++ b/xen/drivers/passthrough/vtd/dmar=2Ec @@ -1215,7 +1215,7 @@ static int __init cf_check parse_rmrr_param(const ch= ar *str) do { bool def_seg =3D false; =20 - stmp =3D parse_pci_seg(s + 1, &seg, &bus, &dev, &func, &def_s= eg); + stmp =3D parse_pci_sbdf_seg(s + 1, &sbdf, &def_seg); if ( !stmp ) return -EINVAL; =20 @@ -1224,12 +1224,11 @@ static int __init cf_check parse_rmrr_param(const = char *str) * Segment will be replaced with one from first device=2E */ if ( user_rmrrs[nr_rmrr]=2Edev_count && def_seg ) - seg =3D PCI_SEG(user_rmrrs[nr_rmrr]=2Esbdf[0]); + sbdf=2Eseg =3D PCI_SEG(user_rmrrs[nr_rmrr]=2Esbdf[0]); =20 /* Keep sbdf's even if they differ and later report an error= =2E */ dev_count =3D user_rmrrs[nr_rmrr]=2Edev_count; - user_rmrrs[nr_rmrr]=2Esbdf[dev_count] =3D - PCI_SBDF(seg, bus, dev, func)=2Esbdf; + user_rmrrs[nr_rmrr]=2Esbdf[dev_count] =3D sbdf=2Esbdf; =20 user_rmrrs[nr_rmrr]=2Edev_count++; s =3D stmp; --=20 2=2E52=2E0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.e13.6ca638ed955f5b82.19e3baeaa36.1a70f84ed571b8b4=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:22:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:22:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312038.1582246 (Exim 4.92) (envelope-from ) id 1wOzo1-0003pd-Ot; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=FjIJ0qn6YXT/MB4DavtiFr+GFFMvwouh5zyGyQ5hzYk=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=fQkTP4aNqatXkzLmnlzYgfTSCHJRk+GW+qpb64hDtyf6yVhAhSo34c8qaVvHFqTywe1AhBq2y vMFYGoC1ly3m/4gOEOGA+s1nTbZG8diMzSczi5aPEPNgbQBBNGvYu0N5/t4T1WTKfOsbpS52VBb 3zQFtMHxMCR+hnagoS/Kl/8DI/vfzF5p4079bs9qimW+nCPkvZxQ+mwhrqkDAb1pDQxCnGpHEf3 weFLK0RHZ36ppLBAl+gFVhoUOGLyn3K02gl9hnvQN1cQlVytLcHwIiteByi8vhehtnpX98pXPhJ 7+Z+tMETYoBOs4BtQ03qMrrCowysRdvNw0XZcX4SgVRw== X-Zone-Loop: 991f01706a5dd5a03324978a5c43df3809a4e90e3850 x-campaign-type: default x-transaction-id: 885ea2e3-dc9b-4a16-b479-8f55638b1b54 x-swg-uid: 01-4f558138-cff9-40f0-910f-f83b480e3e1c X-Mailer: Sweego Message-ID: <1779117765.8631fc262581453bbf619ec5b2062170.19e3baeb295000f373@vates.tech> x-swg-bid: 1779117765.8631fc262581453bbf619ec5b2062170.19e3baeb295000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Subject: [PATCH 5/5] RFC: pci: Migrate pci_mmcfg_{read,write} to pci.c Date: Mon, 18 May 2026 17:21:29 +0200 In-Reply-To: References: MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.e14.e5f1b60d69208c0d.19e3baeb0f7.8800be35dc06f22b=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779117764855 X-purgate-ID: tlsNG-bad1c0/1779117775-88F71A53-7813A008/0/0 X-purgate-type: clean X-purgate-size: 16473 ---=Part.e14.e5f1b60d69208c0d.19e3baeb0f7.8800be35dc06f22b=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Key parts of MMCFG access bits are in mmconfig_64=2Ec (in particular pci_mmcfg_{read,write}()) while PCI configuration primitives (used accross= the codebase) are in pci=2Ec=2E This leads to situations where the compiler cannot optimize the `switch (l= en)` for MMCFG access for all pci_conf_{read,write}N(), because they are not fr= om the same file=2E Move the pci_mmcfg_{read,write} in pci=2Ec and hint the compiler to inline= these functions such that it's more likely that the compiler eliminates the `switch (len)``=2E Also take the opportunity to migrate to pci_sbdf_t to reduce the parameter= count and drop many parameter domains checks=2E On GCC 16=2E1, this leads to codegen where pci_conf_{read,write}N() doesn'= t call pci_mmcfg_{read,write}() anymore and directly perform the MMIO RW=2E : 55 push %rbp 48 89 e5 mov %rsp,%rbp 53 push %rbx 89 f8 mov %edi,%eax 89 f3 mov %esi,%ebx c1 ef 10 shr $0x10,%edi 81 fe ff 00 00 00 cmp $0xff,%esi 77 26 ja ffff82d040301fab 85 ff test %edi,%edi 75 22 jne ffff82d040301fab 0f b7 f8 movzwl %ax,%edi c1 e7 08 shl $0x8,%edi 83 e3 fc and $0xfffffffc,%ebx 09 df or %ebx,%edi 81 cf 00 00 00 80 or $0x80000000,%edi ba 04 00 00 00 mov $0x4,%edx be 00 00 00 00 mov $0x0,%esi e8 2a 1c 03 00 call ffff82d040333bd3 eb 22 jmp ffff82d040301fcd 81 fb ff 0f 00 00 cmp $0xfff,%ebx 77 24 ja ffff82d040301fd7 0f b6 d0 movzbl %al,%edx 0f b6 f4 movzbl %ah,%esi 0f b7 ff movzwl %di,%edi e8 f5 fd ff ff call ffff82d040301db6 48 85 c0 test %rax,%rax 74 18 je ffff82d040301fde 89 db mov %ebx,%ebx 48 01 d8 add %rbx,%rax 8b 00 mov (%rax),%eax 48 8b 5d f8 mov -0x8(%rbp),%rbx c9 leave e9 89 12 f0 ff jmp ffff82d040203260 <__x86_return_thunk= > b8 ff ff ff ff mov $0xffffffff,%eax eb ef jmp ffff82d040301fcd b8 ff ff ff ff mov $0xffffffff,%eax eb e8 jmp ffff82d040301fcd Signed-off-by: Teddy Astie --- xen/arch/x86/pv/ro-page-fault=2Ec | 3 +- xen/arch/x86/x86_64/mmconfig=2Eh | 43 ----------- xen/arch/x86/x86_64/mmconfig_64=2Ec | 106 +++++--------------------- xen/arch/x86/x86_64/pci=2Ec | 122 ++++++++++++++++++++++++++++-- xen/include/xen/pci=2Eh | 6 +- 5 files changed, 138 insertions(+), 142 deletions(-) diff --git a/xen/arch/x86/pv/ro-page-fault=2Ec b/xen/arch/x86/pv/ro-page-f= ault=2Ec index d89306d34f=2E=2E647041560f 100644 --- a/xen/arch/x86/pv/ro-page-fault=2Ec +++ b/xen/arch/x86/pv/ro-page-fault=2Ec @@ -331,8 +331,7 @@ static int cf_check mmcfg_intercept_write( offset &=3D 0xfff; if ( pci_conf_write_intercept(mmio_ctxt->seg, mmio_ctxt->bdf, offset, bytes, p_data) >=3D 0 ) - pci_mmcfg_write(mmio_ctxt->seg, PCI_BUS(mmio_ctxt->bdf), - PCI_DEVFN(mmio_ctxt->bdf), offset, bytes, + pci_mmcfg_write(PCI_SBDF(mmio_ctxt->seg, mmio_ctxt->bdf), offset,= bytes, *(uint32_t *)p_data); =20 return X86EMUL_OKAY; diff --git a/xen/arch/x86/x86_64/mmconfig=2Eh b/xen/arch/x86/x86_64/mmconf= ig=2Eh index 27c0ae5cb1=2E=2Ec1786a3ceb 100644 --- a/xen/arch/x86/x86_64/mmconfig=2Eh +++ b/xen/arch/x86/x86_64/mmconfig=2Eh @@ -23,49 +23,6 @@ =20 extern unsigned int pci_probe; =20 -/* - * AMD Fam10h CPUs are buggy, and cannot access MMIO config space - * on their northbrige except through the * %eax register=2E As such, you= MUST - * NOT use normal IOMEM accesses, you need to only use the magic mmio-con= fig - * accessor functions=2E - * In fact just use pci_config_*, nothing else please=2E - */ -static inline unsigned char mmio_config_readb(void __iomem *pos) -{ - u8 val; - asm volatile("movb (%1),%%al" : "=3Da" (val) : "r" (pos)); - return val; -} - -static inline unsigned short mmio_config_readw(void __iomem *pos) -{ - u16 val; - asm volatile("movw (%1),%%ax" : "=3Da" (val) : "r" (pos)); - return val; -} - -static inline unsigned int mmio_config_readl(void __iomem *pos) -{ - u32 val; - asm volatile("movl (%1),%%eax" : "=3Da" (val) : "r" (pos)); - return val; -} - -static inline void mmio_config_writeb(void __iomem *pos, u8 val) -{ - asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writew(void __iomem *pos, u16 val) -{ - asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - -static inline void mmio_config_writel(void __iomem *pos, u32 val) -{ - asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory"); -} - /* function prototypes */ struct acpi_table_header; int cf_check acpi_parse_mcfg(struct acpi_table_header *header); diff --git a/xen/arch/x86/x86_64/mmconfig_64=2Ec b/xen/arch/x86/x86_64/mmc= onfig_64=2Ec index 940cf6d747=2E=2E483dff9c2c 100644 --- a/xen/arch/x86/x86_64/mmconfig_64=2Ec +++ b/xen/arch/x86/x86_64/mmconfig_64=2Ec @@ -26,93 +26,6 @@ struct mmcfg_virt { static struct mmcfg_virt *pci_mmcfg_virt; static unsigned int mmcfg_pci_segment_shift; =20 -static char __iomem *get_virt(unsigned int seg, unsigned int *bus) -{ - struct acpi_mcfg_allocation *cfg; - int cfg_num; - - for (cfg_num =3D 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { - cfg =3D pci_mmcfg_virt[cfg_num]=2Ecfg; - if (cfg->pci_segment =3D=3D seg && - (cfg->start_bus_number <=3D *bus) && - (cfg->end_bus_number >=3D *bus)) { - *bus -=3D cfg->start_bus_number; - return pci_mmcfg_virt[cfg_num]=2Evirt; - } - } - - /* Fall back to type 0 */ - return NULL; -} - -static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, uns= igned int devfn) -{ - char __iomem *addr; - - addr =3D get_virt(seg, &bus); - if (!addr) - return NULL; - return addr + ((bus << 20) | (devfn << 12)); -} - -int pci_mmcfg_read(unsigned int seg, unsigned int bus, - unsigned int devfn, int reg, int len, u32 *value) -{ - char __iomem *addr; - - /* Why do we have this when nobody checks it=2E How about a BUG()!? -= AK */ - if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { -err: *value =3D -1; - return -EINVAL; - } - - addr =3D pci_dev_base(seg, bus, devfn); - if (!addr) - goto err; - - switch (len) { - case 1: - *value =3D mmio_config_readb(addr + reg); - break; - case 2: - *value =3D mmio_config_readw(addr + reg); - break; - case 4: - *value =3D mmio_config_readl(addr + reg); - break; - } - - return 0; -} - -int pci_mmcfg_write(unsigned int seg, unsigned int bus, - unsigned int devfn, int reg, int len, u32 value) -{ - char __iomem *addr; - - /* Why do we have this when nobody checks it=2E How about a BUG()!? -= AK */ - if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) - return -EINVAL; - - addr =3D pci_dev_base(seg, bus, devfn); - if (!addr) - return -EINVAL; - - switch (len) { - case 1: - mmio_config_writeb(addr + reg, value); - break; - case 2: - mmio_config_writew(addr + reg, value); - break; - case 4: - mmio_config_writel(addr + reg, value); - break; - } - - return 0; -} - static void __iomem *mcfg_ioremap(const struct acpi_mcfg_allocation *cfg, unsigned long idx, unsigned int prot) { @@ -133,6 +46,25 @@ static void __iomem *mcfg_ioremap(const struct acpi_mc= fg_allocation *cfg, return (void __iomem *) virt; } =20 +char __iomem *pci_mmcfg_base(unsigned int seg, unsigned int *bus) +{ + struct acpi_mcfg_allocation *cfg; + int cfg_num; + + for (cfg_num =3D 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { + cfg =3D pci_mmcfg_virt[cfg_num]=2Ecfg; + if (cfg->pci_segment =3D=3D seg && + (cfg->start_bus_number <=3D *bus) && + (cfg->end_bus_number >=3D *bus)) { + *bus -=3D cfg->start_bus_number; + return pci_mmcfg_virt[cfg_num]=2Evirt; + } + } + + /* Fall back to type 0 */ + return NULL; +} + int pci_mmcfg_arch_enable(unsigned int idx) { const typeof(pci_mmcfg_config[0]) *cfg =3D pci_mmcfg_virt[idx]=2Ecfg; diff --git a/xen/arch/x86/x86_64/pci=2Ec b/xen/arch/x86/x86_64/pci=2Ec index 8d33429103=2E=2Ec37e3edade 100644 --- a/xen/arch/x86/x86_64/pci=2Ec +++ b/xen/arch/x86/x86_64/pci=2Ec @@ -11,13 +11,123 @@ #define PCI_CONF_ADDRESS(sbdf, reg) \ (0x80000000U | ((sbdf)=2Ebdf << 8) | ((reg) & ~3)) =20 +/* + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space + * on their northbrige except through the * %eax register=2E As such, you= MUST + * NOT use normal IOMEM accesses, you need to only use the magic mmio-con= fig + * accessor functions=2E + * In fact just use pci_config_*, nothing else please=2E + */ +static inline unsigned char mmio_config_readb(void __iomem *pos) +{ + u8 val; + asm volatile("movb (%1),%%al" : "=3Da" (val) : "r" (pos)); + return val; +} + +static inline unsigned short mmio_config_readw(void __iomem *pos) +{ + u16 val; + asm volatile("movw (%1),%%ax" : "=3Da" (val) : "r" (pos)); + return val; +} + +static inline unsigned int mmio_config_readl(void __iomem *pos) +{ + u32 val; + asm volatile("movl (%1),%%eax" : "=3Da" (val) : "r" (pos)); + return val; +} + +static inline void mmio_config_writeb(void __iomem *pos, u8 val) +{ + asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writew(void __iomem *pos, u16 val) +{ + asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory"); +} + +static inline void mmio_config_writel(void __iomem *pos, u32 val) +{ + asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory"); +} + +static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, uns= igned int devfn) +{ + char __iomem *addr; + + addr =3D pci_mmcfg_base(seg, &bus); + if (!addr) + return NULL; + return addr + ((bus << 20) | (devfn << 12)); +} + +static inline +int pci_mmcfg_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, u= 32 *value) +{ + char __iomem *addr; + + /* Why do we have this when nobody checks it=2E How about a BUG()!? -= AK */ + if (unlikely(reg > 4095)) { +err: *value =3D -1; + return -EINVAL; + } + + addr =3D pci_dev_base(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn); + if (!addr) + goto err; + + switch (len) { + case 1: + *value =3D mmio_config_readb(addr + reg); + break; + case 2: + *value =3D mmio_config_readw(addr + reg); + break; + case 4: + *value =3D mmio_config_readl(addr + reg); + break; + } + + return 0; +} + +inline int pci_mmcfg_write(pci_sbdf_t sbdf, unsigned int reg, unsigned in= t len, u32 value) +{ + char __iomem *addr; + + /* Why do we have this when nobody checks it=2E How about a BUG()!? -= AK */ + if (unlikely(reg > 4095)) + return -EINVAL; + + addr =3D pci_dev_base(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn); + if (!addr) + return -EINVAL; + + switch (len) { + case 1: + mmio_config_writeb(addr + reg, value); + break; + case 2: + mmio_config_writew(addr + reg, value); + break; + case 4: + mmio_config_writel(addr + reg, value); + break; + } + + return 0; +} + uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg) { uint32_t value; =20 if ( sbdf=2Eseg || reg > 255 ) { - pci_mmcfg_read(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 1, &val= ue); + pci_mmcfg_read(sbdf, reg, 1, &value); return value; } =20 @@ -30,7 +140,7 @@ uint16_t pci_conf_read16(pci_sbdf_t sbdf, unsigned int = reg) { uint32_t value; =20 - pci_mmcfg_read(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 2, &val= ue); + pci_mmcfg_read(sbdf, reg, 2, &value); return value; } =20 @@ -43,7 +153,7 @@ uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int = reg) { uint32_t value; =20 - pci_mmcfg_read(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 4, &val= ue); + pci_mmcfg_read(sbdf, reg, 4, &value); return value; } =20 @@ -53,7 +163,7 @@ uint32_t pci_conf_read32(pci_sbdf_t sbdf, unsigned int = reg) void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg, uint8_t data) { if ( sbdf=2Eseg || reg > 255 ) - pci_mmcfg_write(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 1, dat= a); + pci_mmcfg_write(sbdf, reg, 1, data); else pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 3, 1, data); } @@ -61,7 +171,7 @@ void pci_conf_write8(pci_sbdf_t sbdf, unsigned int reg,= uint8_t data) void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg, uint16_t data) { if ( sbdf=2Eseg || reg > 255 ) - pci_mmcfg_write(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 2, dat= a); + pci_mmcfg_write(sbdf, reg, 2, data); else pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), reg & 2, 2, data); } @@ -69,7 +179,7 @@ void pci_conf_write16(pci_sbdf_t sbdf, unsigned int reg= , uint16_t data) void pci_conf_write32(pci_sbdf_t sbdf, unsigned int reg, uint32_t data) { if ( sbdf=2Eseg || reg > 255 ) - pci_mmcfg_write(sbdf=2Eseg, sbdf=2Ebus, sbdf=2Edevfn, reg, 4, dat= a); + pci_mmcfg_write(sbdf, reg, 4, data); else pci_conf_write(PCI_CONF_ADDRESS(sbdf, reg), 0, 4, data); } diff --git a/xen/include/xen/pci=2Eh b/xen/include/xen/pci=2Eh index d816dcad05=2E=2Eb3c91fea9c 100644 --- a/xen/include/xen/pci=2Eh +++ b/xen/include/xen/pci=2Eh @@ -258,10 +258,8 @@ void pci_conf_write16(pci_sbdf_t sbdf, unsigned int r= eg, uint16_t data); void pci_conf_write32(pci_sbdf_t sbdf, unsigned int reg, uint32_t data); uint32_t pci_conf_read(uint32_t cf8, uint8_t offset, uint8_t bytes); void pci_conf_write(uint32_t cf8, uint8_t offset, uint8_t bytes, uint32_t= data); -int pci_mmcfg_read(unsigned int seg, unsigned int bus, - unsigned int devfn, int reg, int len, u32 *value); -int pci_mmcfg_write(unsigned int seg, unsigned int bus, - unsigned int devfn, int reg, int len, u32 value); +char *pci_mmcfg_base(unsigned int seg, unsigned int *bus); +int pci_mmcfg_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, = u32 value); unsigned int pci_find_cap_offset(pci_sbdf_t sbdf, unsigned int cap); unsigned int pci_find_next_cap_ttl(pci_sbdf_t sbdf, unsigned int pos, const unsigned int caps[], unsigned in= t n, --=20 2=2E52=2E0 -- Teddy Astie | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vates s= olutions web: https://vates=2Etech ---=Part.e14.e5f1b60d69208c0d.19e3baeb0f7.8800be35dc06f22b=--- From xen-devel-bounces@lists.xenproject.org Mon May 18 15:33:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:33:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312085.1582254 (Exim 4.92) (envelope-from ) id 1wOzyW-00078y-0K; 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <3b1c60095c8a963e7df3ca5025e637e678f5ee71.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779118426-23B78C48-187BEEBB/10/73395122804 X-purgate-type: spam X-purgate-size: 1944 On 08.05.2026 16:43, Oleksii Kurochko wrote: > Implement construct_domain() function for RISC-V, which performs initial setup > for the domain's first vCPU, loads the kernel, initrd, and device tree, > and sets up guest CPU registers for boot. > > It also creates additional vCPUs up to max_vcpus and assigns the device tree > address and boot cpuid in registers. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich with ... > --- /dev/null > +++ b/xen/arch/riscv/domain-build.c > @@ -0,0 +1,52 @@ > +/* SPDX-License-Identifier: GPL-2.0-or-later */ > + > +#include > +#include > +#include > +#include > + > +#include > +#include > + > +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) > +{ > + struct vcpu *v = d->vcpu[0]; > + struct cpu_user_regs *regs = vcpu_guest_cpu_user_regs(v); > + > + BUG_ON(v->is_initialised); > + > + /* > + * At the moment *_load() don't return value and will just panic() > + * inside. > + * TODO: it will be good to change that. > + */ > + kernel_load(kinfo); > + initrd_load(kinfo, copy_to_guest_phys); > + dtb_load(kinfo, copy_to_guest_phys); > + > + regs->sepc = kinfo->entry; > + > + /* Guest boot cpuid = 0 */ > + regs->a0 = 0; > + regs->a1 = kinfo->dtb_paddr; > + > + for ( unsigned int i = 1; i < d->max_vcpus; i++ ) > + { > + const struct vcpu *tmp_v = vcpu_create(d, i); > + > + if ( !tmp_v ) > + { > + printk("Failed to allocate %pd v%d\n", d, i); ... %u used here and ... > + break; > + } > + > + dprintk(XENLOG_INFO, "Created vcpu %pv\n", tmp_v); ... this line preferably dropped. Can do when committing, provided you agree. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1779118706-2BB6B3FF-4F94A824/0/0 X-purgate-type: clean X-purgate-size: 691 On 08.05.2026 16:43, Oleksii Kurochko wrote: > This patch series reprensent a bunch of patches necessary to enable common part > of Dom0less. > The stuff necessary to start/launch domains will be introduced separately. > > This patch series is based on [1], but a lot of patch could go even without > it. What do I do with this kind of statement? This still leaves it to the committer to figure out which ones could go in earlier. What helps in this specific case it that ... > [1] https://lore.kernel.org/xen-devel/cover.1778140240.git.oleksii.kurochko@gmail.com/T/#t ... the remainder of this looks to be ready to go in now (and I intend to commit that tomorrow). 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1779118981-7E78F8B7-ECB80F71/0/0 X-purgate-type: clean X-purgate-size: 957 On 08.05.2026 16:43, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/domain.c > +++ b/xen/arch/riscv/domain.c > @@ -289,6 +289,31 @@ void sync_vcpu_execstate(struct vcpu *v) > /* Nothing to do -- no lazy switching */ > } > > +int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) > +{ > + return 0; > +} > + > +int arch_domain_create(struct domain *d, > + struct xen_domctl_createdomain *config, > + unsigned int flags) > +{ > + int rc = 0; > + > + if ( is_idle_domain(d) ) > + return 0; > + > + if ( (rc = p2m_init(d, config)) != 0) > + goto fail; > + > + return rc; > + > + fail: > + d->is_dying = DOMDYING_dead; domain_create() does this as well. Is it really needed here? > + arch_domain_destroy(d); This continues to be a stub, i.e. upon encountering any kind of error one would hit the BUG_ON() there. Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 15:51:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 15:51:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312111.1582283 (Exim 4.92) (envelope-from ) id 1wP0Fu-00032g-Sr; Mon, 18 May 2026 15:51:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312111.1582283; Mon, 18 May 2026 15:51:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP0Fu-00032Y-P1; Mon, 18 May 2026 15:51:46 +0000 Received: by outflank-mailman (input) for mailman id 1312111; Mon, 18 May 2026 15:51:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP0Ft-00032S-Ep for xen-devel@lists.xenproject.org; Mon, 18 May 2026 15:51:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP0Fs-00F2NS-Fv for xen-devel@lists.xenproject.org; Mon, 18 May 2026 17:51:44 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b3580-5cb7-0a2a0a5109dd-0a2a450b93ea-30 for ; Mon, 18 May 2026 17:51:44 +0200 Received: from [209.85.221.46] (helo=mail-wr1-f46.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b3590-212f-0a2a450b0019-d155dd2ea447-3 for ; Mon, 18 May 2026 17:51:44 +0200 Received: by mail-wr1-f46.google.com with SMTP id ffacd0b85a97d-43d734223e4so1543777f8f.0 for ; Mon, 18 May 2026 08:51:44 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779119504-1AD77F3B-D24F6471/0/0 X-purgate-type: clean X-purgate-size: 2567 On 08.05.2026 16:43, Oleksii Kurochko wrote: > @@ -480,6 +488,53 @@ bool riscv_isa_extension_available(const unsigned long *isa_bitmap, > return test_bit(id, isa_bitmap); > } > > +int init_guest_isa(struct domain *d) > +{ > + char *buf = d->arch.guest_isa_str; > + size_t len = sizeof(d->arch.guest_isa_str); Seeing these uses: Is the "guest" prefix really of much use here? > + bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, > + RISCV_ISA_EXT_MAX); Same question here, clearly. > +#if defined(CONFIG_RISCV_32) > + if ( snprintf(buf, len, "rv32") >= len ) > + return -ENOBUFS; > +#elif defined(CONFIG_RISCV_64) > + if ( snprintf(buf, len, "rv64") >= len ) > + return -ENOBUFS; > +#else > +# error "Unsupported RISC-V bitness" > +#endif > + > + for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) > + { > + const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; > + > + if ( !riscv_isa_extension_available(d->arch.guest_isa, ext->id) ) > + continue; > + > + if ( ext->id >= RISCV_ISA_EXT_BASE && strlcat(buf, "_", len) >= len ) > + return -ENOBUFS; > + > + if ( strlcat(buf, ext->name, len) >= len ) > + return -ENOBUFS; > + } > + > + return 0; > +} > + > +static void __init init_guest_unsupp(void) > +{ > + set_bit(RISCV_ISA_EXT_f, guest_unsupp); > + set_bit(RISCV_ISA_EXT_d, guest_unsupp); > + set_bit(RISCV_ISA_EXT_q, guest_unsupp); > + set_bit(RISCV_ISA_EXT_v, guest_unsupp); > + set_bit(RISCV_ISA_EXT_h, guest_unsupp); > + set_bit(RISCV_ISA_EXT_sstc, guest_unsupp); > + set_bit(RISCV_ISA_EXT_svade, guest_unsupp); > + set_bit(RISCV_ISA_EXT_svpbmt, guest_unsupp); > +} These don't need to be atomic, do they? I.e. __set_bit() would suffice. > --- a/xen/arch/riscv/include/asm/cpufeature.h > +++ b/xen/arch/riscv/include/asm/cpufeature.h > @@ -17,6 +17,8 @@ > */ > #define RISCV_ISA_EXT_BASE 26 > > +#define RISCV_GUEST_ISA_STR_MAX 256 This looks like it won't be good for very long, seeing how long ISA strings can get. I wonder anyway whether ... > @@ -94,6 +95,9 @@ struct arch_domain { > struct p2m_domain p2m; > > struct paging_domain paging; > + > + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); > + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; ... a compile-time sized buffer is suitable here. Can't you allocate a buffer just large enough to hold the string? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <69d2dd26b7c2d00c9d28f898f041f6d1be145e0d.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1779120013-2997A3FF-FD8DDBA0/0/0 X-purgate-type: clean X-purgate-size: 3825 On 08.05.2026 16:43, Oleksii Kurochko wrote: > @@ -50,3 +52,107 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) > > return 0; > } > +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) Nit: Blank line above here, please. > +{ > + int res; > + const struct dt_device_node *cpus = dt_find_node_by_path("/cpus"); > + unsigned int cpu; > + uint32_t timebase_frequency; > + bool frequency_valid; > + void *fdt = kinfo->fdt; > + > + dt_dprintk("Create cpus node\n"); > + > + if ( !cpus ) > + { > + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); > + return -ENOENT; > + } > + > + frequency_valid = dt_property_read_u32(cpus, "timebase-frequency", > + &timebase_frequency); > + > + res = fdt_begin_node(fdt, "cpus"); > + if ( res ) > + return res; > + > + res = fdt_property_cell(fdt, "#address-cells", 1); > + if ( res ) > + return res; > + > + res = fdt_property_cell(fdt, "#size-cells", 0); > + if ( res ) > + return res; > + > + if ( frequency_valid ) > + res = fdt_property_cell(fdt, "timebase-frequency", timebase_frequency); > + > + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) Limit cpu's scope to this loop? > + { > + char buf[64]; > + uint32_t reg = cpu_to_fdt32(cpu); Isn't this a byte-order adjustment? If so, how come ... > + snprintf(buf, sizeof(buf), "cpu@%u", cpu); ... the result is passed to an entirely non-FDT function? (Most pre-existing uses of the function that I can spot store something in memory, i.e. adjusting byte- order makes sense there.) > + res = fdt_begin_node(fdt, buf); > + if ( res ) > + return res; > + > + res = fdt_property(fdt, "reg", ®, sizeof(reg)); > + if ( res ) > + return res; > + > + res = fdt_property_string(fdt, "status", "okay"); > + if ( res ) > + return res; > + > + res = fdt_property_string(fdt, "compatible", "riscv"); > + if ( res ) > + return res; > + > + BUILD_BUG_ON((sizeof("riscv,") + > + sizeof_field(struct gstage_mode_desc, name)) >= sizeof(buf)); > + snprintf(buf, sizeof(buf), "riscv,%s", max_gstage_mode->name); > + res = fdt_property_string(fdt, "mmu-type", buf); > + if ( res ) > + return res; > + > + res = fdt_property_string(fdt, "riscv,isa", d->arch.guest_isa_str); > + if ( res ) > + return res; > + > + res = fdt_property_string(fdt, "device_type", "cpu"); > + if ( res ) > + return res; > + > + res = fdt_begin_node(fdt, "interrupt-controller"); > + if ( res ) > + return res; > + > + res = fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); > + if ( res ) > + return res; > + > + res = fdt_property_cell(fdt, "#interrupt-cells", 1); > + if ( res ) > + return res; > + > + res = fdt_property(fdt, "interrupt-controller", NULL, 0); > + if ( res ) > + return res; > + > + res = fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); > + if ( res ) > + return res; > + > + /* end of interrupt-controller */ Nit: Comment style. Also such a comment pretty clearly calls for a counterpart at the start. > + res = fdt_end_node(fdt); > + if ( res ) > + return res; > + > + res = fdt_end_node(fdt); > + if ( res ) > + return res; > + } > + > + return fdt_end_node(fdt); > +} From xen-devel-bounces@lists.xenproject.org Mon May 18 16:05:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 16:05:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312130.1582299 (Exim 4.92) (envelope-from ) id 1wP0T3-00069G-8C; Mon, 18 May 2026 16:05:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312130.1582299; Mon, 18 May 2026 16:05:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP0T3-000699-5W; Mon, 18 May 2026 16:05:21 +0000 Received: by outflank-mailman (input) for mailman id 1312130; Mon, 18 May 2026 16:05:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP0T1-000693-RA for xen-devel@lists.xenproject.org; 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Message-ID: <07643fba-5e1b-449c-955b-949ef38bdb61@epam.com> Date: Mon, 18 May 2026 19:05:14 +0300 User-Agent: Mozilla Thunderbird Subject: Re: RTDS scheduler patches To: Jan Beulich , Dario Faggioli , Meng Xu Cc: "xen-devel@lists.xenproject.org" References: <41d236ba-a93d-446a-b29a-449a1c5f8972@suse.com> Content-Language: en-US From: Oleksii Moisieiev In-Reply-To: <41d236ba-a93d-446a-b29a-449a1c5f8972@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-ClientProxiedBy: VI1P194CA0049.EURP194.PROD.OUTLOOK.COM (2603:10a6:803:3c::38) To DU5PR03MB10263.eurprd03.prod.outlook.com (2603:10a6:10:519::5) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU5PR03MB10263:EE_|AS2PR03MB9467:EE_ X-MS-Office365-Filtering-Correlation-Id: 6e382cd2-d0f0-400d-9942-08deb4f7400f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|11063799003|4133799003|22082099003|56012099003|18002099003; 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Will do it tomorrow. Also I found another bug in RTDS. Still need some extra checks to be done. I planning to post it tomorrow as well. Oleksii. On 18/05/2026 18:08, Jan Beulich wrote: > Hello, > > would you mind taking a look at two patches, both of which were reviewed by > Jürgen and hence hopefully should be relatively straightforward to given an > ack for: > https://lists.xen.org/archives/html/xen-devel/2026-03/msg01341.html > https://lists.xen.org/archives/html/xen-devel/2026-04/msg00162.html > > In case of continued lack of response, I guess I'm going to commit the > patches as-is towards the end of this week. > > Oleksii, fyi: Generally it is the submitter's responsibility to chase acks. > > Thanks, Jan From xen-devel-bounces@lists.xenproject.org Mon May 18 16:08:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 16:08:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312138.1582309 (Exim 4.92) (envelope-from ) id 1wP0W2-00073L-Mk; Mon, 18 May 2026 16:08:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312138.1582309; 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Mon, 18 May 2026 09:08:23 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Mon, 18 May 2026 19:08:12 +0300 X-Gm-Features: AVHnY4KvoH9vaDd8jAi1fl1JDyx0ETxOKyJq8oUfbWZiGZBzl4yiv0xTMr0Zcks Message-ID: Subject: Re: [PATCH v9 09/13] xen/arm: smmu-v3: add suspend/resume handlers To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Bertrand Marquis , Rahul Singh , Stefano Stabellini , Julien Grall , Michal Orzel , Volodymyr Babchuk , Pranjal Shrivastava Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1779120505-A9D77161-15EFF6CE/0/0 X-purgate-type: clean X-purgate-size: 5935 Hi Luca, Thank you for the review. On Thu, May 14, 2026 at 7:42=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > > > +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) > > +{ > > + int ret; > > + u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > + > > + if ( smmu->features & ARM_SMMU_FEAT_PRI ) > > + irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > + > > + /* Enable interrupt generation on the SMMU */ > > + ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > + if ( ret ) > > + { > > + dev_warn(smmu->dev, "failed to enable irqs\n"); > > + return ret; > > + } > > + > > + return 0; > > +} > > + > > +/* > > + * Probe-time only: request host IRQs and, when available, program the= SMMU's > > + * MSI doorbells. Resume does not restore the SMMU *_IRQ_CFGn MSI regi= sters, > > + * so any host suspend support must treat the active MSI IRQ path as > > + * unsupported until that restore path exists. > > + */ > > static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) > > { > > int ret, irq; > > - u32 irqen_flags =3D IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; > > > > /* Disable IRQs first */ > > ret =3D arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, > > @@ -2028,22 +2052,7 @@ static int __init arm_smmu_setup_irqs(struct arm= _smmu_device *smmu) > > } > > } > > > > - if (smmu->features & ARM_SMMU_FEAT_PRI) > > - irqen_flags |=3D IRQ_CTRL_PRIQ_IRQEN; > > - > > - /* Enable interrupt generation on the SMMU */ > > - ret =3D arm_smmu_write_reg_sync(smmu, irqen_flags, > > - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); > > - if (ret) { > > - dev_warn(smmu->dev, "failed to enable irqs\n"); > > - goto err_free_irqs; > > - } > > - > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_disable(struct arm_smmu_device *smmu) > > @@ -2057,7 +2066,7 @@ static int arm_smmu_device_disable(struct arm_smm= u_device *smmu) > > return ret; > > } > > > > -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) > > +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) > > { > > int ret; > > u32 reg, enables; > > @@ -2163,17 +2172,9 @@ static int __init arm_smmu_device_reset(struct a= rm_smmu_device *smmu) > > } > > } > > > > - ret =3D arm_smmu_setup_irqs(smmu); > > - if (ret) { > > - dev_err(smmu->dev, "failed to setup irqs\n"); > > + ret =3D arm_smmu_enable_irqs(smmu); > > + if ( ret ) > > return ret; > > - } > > - > > - /* Initialize tasklets for threaded IRQs*/ > > - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > - smmu); > > > > /* Enable the SMMU interface, or ensure bypass */ > > if (disable_bypass) { > > @@ -2181,20 +2182,16 @@ static int __init arm_smmu_device_reset(struct = arm_smmu_device *smmu) > > } else { > > ret =3D arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); > > if (ret) > > - goto err_free_irqs; > > + return ret; > > } > > ret =3D arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, > > ARM_SMMU_CR0ACK); > > if (ret) { > > dev_err(smmu->dev, "failed to enable SMMU interface\n"); > > - goto err_free_irqs; > > + return ret; > > } > > > > return 0; > > - > > -err_free_irqs: > > - arm_smmu_free_irqs(smmu); > > - return ret; > > } > > > > static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) > > @@ -2558,10 +2555,23 @@ static int __init arm_smmu_device_probe(struct = platform_device *pdev) > > if (ret) > > goto out_free; > > > > + ret =3D arm_smmu_setup_irqs(smmu); > > + if ( ret ) > > + { > > + dev_err(smmu->dev, "failed to setup irqs\n"); > > + goto out_free; > > + } > > + > > + /* Initialize tasklets for threaded IRQs*/ > > + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); > > + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); > > + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_taskl= et, > > + smmu); > > + > > /* Reset the device */ > > ret =3D arm_smmu_device_reset(smmu); > > if (ret) > > - goto out_free; > > + goto out_free_irqs; > > > > /* > > * Keep a list of all probed devices. This will be used to query > > @@ -2575,6 +2585,8 @@ static int __init arm_smmu_device_probe(struct pl= atform_device *pdev) > > > > return 0; > > > > +out_free_irqs: > > + arm_smmu_free_irqs(smmu); > > > > out_free: > > arm_smmu_free_structures(smmu); > > @@ -2855,6 +2867,96 @@ static void arm_smmu_iommu_xen_domain_teardown(s= truct domain *d) > > xfree(xen_domain); > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > + > > +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device= *smmu) > > +{ > > + int ret =3D arm_smmu_device_reset(smmu); > > + > > + if ( ret ) > > + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", > > + ret); > > +} > > + > > +static int arm_smmu_suspend(void) > > +{ > > + struct arm_smmu_device *smmu; > > + int ret =3D 0; > > + > > + list_for_each_entry(smmu, &arm_smmu_devices, devices) > > + { > > + /* Abort all transactions before disable to avoid spurious bypass */ > > + ret =3D arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); > > + if ( ret ) > > + goto fail; > > Should we have this here as the restore path calls arm_smmu_enable_irqs()= ? > > ret =3D arm_smmu_write_reg_sync(smmu, 0, > ARM_SMMU_IRQ_CTRL, > ARM_SMMU_IRQ_CTRLACK); > if ( ret ) > goto fail; Yes, I agree. I will add the IRQ_CTRL disable here, after setting GBPA.ABORT and before disabling the SMMU. Thanks, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 16:19:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 16:19:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312148.1582317 (Exim 4.92) (envelope-from ) id 1wP0fy-0000Y8-OO; Mon, 18 May 2026 16:18:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312148.1582317; Mon, 18 May 2026 16:18:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP0fy-0000Y1-LQ; Mon, 18 May 2026 16:18:42 +0000 Received: by outflank-mailman (input) for mailman id 1312148; Mon, 18 May 2026 16:18:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wP0fw-0000Xv-Sb for xen-devel@lists.xenproject.org; Mon, 18 May 2026 16:18:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP0fv-001IkX-CI for xen-devel@lists.xenproject.org; Mon, 18 May 2026 18:18:39 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b3bdc-2eae-0a2a0a5409dd-0a2a450495a0-12 for ; Mon, 18 May 2026 18:18:39 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b3bde-1dec-0a2a45040019-d155802fdd3f-3 for ; Mon, 18 May 2026 18:18:39 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-4891b0786beso17971385e9.1 for ; Mon, 18 May 2026 09:18:39 -0700 (PDT) Received: from [10.2.5.24] (wl.mlade.cb.wlnet.cz. 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------6vKDRpy0r0xguvdHwOlq6kGT" X-purgate-ID: tlsNG-ebf023/1779121119-29B7B3FF-DB875C19/10/73395122804 X-purgate-type: spam X-purgate-size: 12457 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------6vKDRpy0r0xguvdHwOlq6kGT Content-Type: multipart/mixed; boundary="------------Wb1oIGPfuMai8FvQltbG2Axn"; protected-headers="v1" From: Juergen Gross To: Oleksii Kurochko , xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Message-ID: <8b37000c-1b44-4ae8-acf4-5ea3e4f069d9@suse.com> Subject: Re: [PATCH v2 0/4] tools/xenstore: fix issue related to XSA-417 References: <20260429120619.1013440-1-jgross@suse.com> <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> In-Reply-To: <7a911029-57ba-421d-9657-03762dfe1109@gmail.com> Autocrypt-Gossip: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJ3BBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AAIQkQoDSui/t3IH4WIQQ+pJkfkcoLMCa4X6CgNK6L+3cgfgn7AJ9DmMd0SMJE ePbc7/m22D2v04iu7ACffXTdZQhNl557tJuDXZSBxDmW/tLOwU0EWTecRBAIAIK5OMKMU5R2 Lk2bbjgX7vyQuCFFyKf9rC/4itNwhYWFSlKzVj3WJBDsoi2KvPm7AI+XB6NIkNAkshL5C0kd pcNd5Xo0jRR5/WE/bT7LyrJ0OJWS/qUit5eNNvsO+SxGAk28KRa1ieVLeZi9D03NL0+HIAtZ tecfqwgl3Y72UpLUyt+r7LQhcI/XR5IUUaD4C/chB4Vq2QkDKO7Q8+2HJOrFIjiVli4lU+Sf OBp64m//Y1xys++Z4ODoKh7tkh5DxiO3QBHG7bHK0CSQsJ6XUvPVYubAuy1XfSDzSeSBl//C v78Fclb+gi9GWidSTG/4hsEzd1fY5XwCZG/XJJY9M/sAAwUH/09Ar9W2U1Qm+DwZeP2ii3Ou 14Z9VlVVPhcEmR/AFykL9dw/OV2O/7cdi52+l00reUu6Nd4Dl8s4f5n8b1YFzmkVVIyhwjvU jxtPyUgDOt6DRa+RaDlXZZmxQyWcMv2anAgYWGVszeB8Myzsw8y7xhBEVV1S+1KloCzw4V8Z DSJrcsZlyMDoiTb7FyqxwQnM0f6qHxWbmOOnbzJmBqpNpFuDcz/4xNsymJylm6oXiucHQBAP Xb/cE1YNHpuaH4SRhIxwQilCYEznWowQphNAbJtEKOmcocY7EbSt8VjXTzmYENkIfkrHRyXQ dUm5AoL51XZljkCqNwrADGkTvkwsWSvCSQQYEQIACQUCWTecRAIbDAAKCRCgNK6L+3cgfuef AJ9wlZQNQUp0KwEf8Tl37RmcxCL4bQCcC5alCSMzUBJ5DBIcR4BY+CyQFAs= --------------Wb1oIGPfuMai8FvQltbG2Axn Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoLO9wFAwAAAAAACgkQsN6d1ii/Ey+R lAf8CmigA9dldr+ZO/QQ3kXy8ZId5XZ0EzjAcKKwwKl/oub9/W0Uzo8vcNOatmBmcBzL0ZUs4Mm6 SLsNQDgfC5C5ZhPOBBBgKEoPKmVGW4NN5D4/kvP+uy3PggKxtsIfSo2ZfOZmSSpwyAzTYVWx1Zbc RDmYjOBC/4FPpJC+DNDr3/H8FV0sCEAm57oCa4IDIWWebQReEDwwW7W6hFZxE4iKMP0FQjrdhAYZ D3fwj7uVUeHCiOQ5PclPCo64B2RlcHCezekOPGEKdHmHF7hs69z085i7OHfms9oiWyoiqnK9pweS tdZd6eFmM5FoXY0Br8VEvxvfEeh/t9OK3MI+rdlawQ== =X0YZ -----END PGP SIGNATURE----- --------------6vKDRpy0r0xguvdHwOlq6kGT-- From xen-devel-bounces@lists.xenproject.org Mon May 18 16:49:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 16:49:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312160.1582327 (Exim 4.92) (envelope-from ) id 1wP1A4-00056j-Vw; Mon, 18 May 2026 16:49:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312160.1582327; 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Mon, 18 May 2026 09:49:44 -0700 (PDT) MIME-Version: 1.0 References: <2268857aa7eef95444169564c17f7e9a6f59b1c5.1778605274.git.mykola_kvach@epam.com> <8bdaa98b-94cb-43a7-a02d-d2ec1e899fb9@gmail.com> In-Reply-To: <8bdaa98b-94cb-43a7-a02d-d2ec1e899fb9@gmail.com> From: Mykola Kvach Date: Mon, 18 May 2026 19:49:33 +0300 X-Gm-Features: AVHnY4IYJOC8Bgg9Ct-BK3EGHlPnRUZKmBydfbolZI9I0alg-kxqmjx27zl3lWQ Message-ID: Subject: Re: [PATCH v9 13/13] xen/arm: Add host system suspend backend To: Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ef75cf/1779122985-20563C48-885141D0/0/0 X-purgate-type: clean X-purgate-size: 11451 Hi Oleksandr, Thank you for the review. On Sun, May 17, 2026 at 4:00=E2=80=AFPM Oleksandr Tyshchenko wrote: > > > > On 5/12/26 20:07, Mykola Kvach wrote: > > Hello Mykola > > > From: Mirela Simonovic > > > > Add the Xen-wide suspend/resume backend used after a control-domain > > vPSCI SYSTEM_SUSPEND request has been accepted. The vPSCI policy, > > runtime driver blockers and control-domain sequencing checks are handle= d > > by the preceding commit; this change adds the code that actually drives > > the host suspend attempt. > > > > The backend runs from a tasklet scheduled on pCPU0, because non-boot CP= Us > > are disabled during suspend. It freezes domains, disables the scheduler > > and then disables non-boot CPUs. > > > > Host-side suspend participants are handled in phases. IOMMU and console > > state are suspended first. Local IRQs are then disabled before suspendi= ng > > timer and GIC state. On resume or failure, the completed suspend phases > > are unwound in reverse: GIC and timer state are restored while IRQs are > > still disabled, local IRQs are restored, and then console and IOMMU sta= te > > are restored. > > > > On boot, init_ttbr is normally initialized during secondary CPU hotplug= . > > On uniprocessor systems this can leave init_ttbr uninitialized, so set = it > > from the boot CPU before entering suspend. > > > > Note: the code is behind CONFIG_HAS_SYSTEM_SUSPEND, which is currently > > only selected when UNSUPPORTED is set and MPU is not set. > > > > Signed-off-by: Mirela Simonovic > > Signed-off-by: Saeed Nowshadi > > Signed-off-by: Mykyta Poturai > > Signed-off-by: Mykola Kvach > > > Patch looks good to me, just one question to clarify ... > > > > --- > > Changes in V9: > > - Split vPSCI availability policy, runtime host-suspend blockers and th= e > > domain-readiness precheck into the preceding commit. > > - Trigger the host suspend backend from the control-domain SYSTEM_SUSPE= ND > > path. > > - Reorder the host suspend/resume phases so the timer is suspended with > > local IRQs disabled and local IRQs are restored after the GIC and ti= mer > > resume paths, before the console and IOMMU resume paths. > > - Move HAS_HWDOM_SYSTEM_SUSPEND and related logic to policy patch. > > > > Changes in V8: > > - Add a pre-suspend check in system_suspend() after scheduler_disable()= to > > require all domains to be in the shut down state with SHUTDOWN_suspe= nd > > before proceeding with the global suspend flow. > > - Drop the common-level depends on !ARM_64 || !SYSTEM_SUSPEND from > > CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND and model the ARM64 suspend cas= e > > with an arch-selected capability instead. > > - Rename CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND to > > CONFIG_HAS_HWDOM_SYSTEM_SUSPEND. > > - Rename need_hwdom_shutdown() to want_hwdom_shutdown(). > > > > Changes in V7: > > - Control domain is responsible for host suspend. > > - Add an empty inline host_system_suspend() function when SYSTEM_SUSPEN= D > > config is disabled. > > - Use IS_ENABLED() for config checking instead of #ifdef. > > - Replace #ifdef checks in domain_shutdown() with IS_ENABLED() to simpl= ify > > control flow. > > - Factor hardware domain shutdown condition into a helper > > (need_hwdom_shutdown()) to avoid preprocessor directives inside the > > function. > > - Squash with iommu suspend/resume commit. > > --- > > xen/arch/arm/Kconfig | 1 + > > xen/arch/arm/include/asm/mm.h | 2 + > > xen/arch/arm/include/asm/suspend.h | 2 + > > xen/arch/arm/mmu/smpboot.c | 2 +- > > xen/arch/arm/suspend.c | 140 ++++++++++++++++++++++++++++= + > > xen/arch/arm/vpsci.c | 10 ++- > > 6 files changed, 154 insertions(+), 3 deletions(-) > > > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > > index 54a5bfb9ae..119bc00674 100644 > > --- a/xen/arch/arm/Kconfig > > +++ b/xen/arch/arm/Kconfig > > @@ -9,6 +9,7 @@ config ARM_64 > > select 64BIT > > select HAS_DOMAIN_TYPE > > select HAS_FAST_MULTIPLY > > + select HAS_SYSTEM_SUSPEND if !MPU && UNSUPPORTED > > select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH > > > > config ARM > > diff --git a/xen/arch/arm/include/asm/mm.h b/xen/arch/arm/include/asm/m= m.h > > index 2eb8465aa9..de119cad3a 100644 > > --- a/xen/arch/arm/include/asm/mm.h > > +++ b/xen/arch/arm/include/asm/mm.h > > @@ -360,6 +360,8 @@ static inline void page_set_xenheap_gfn(struct page= _info *p, gfn_t gfn) > > } while ( (y =3D cmpxchg(&p->u.inuse.type_info, x, nx)) !=3D x ); > > } > > > > +void set_init_ttbr(lpae_t *root); > > + > > #endif /* __ARCH_ARM_MM__ */ > > /* > > * Local variables: > > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/= asm/suspend.h > > index 87db12eac3..a194dbb21a 100644 > > --- a/xen/arch/arm/include/asm/suspend.h > > +++ b/xen/arch/arm/include/asm/suspend.h > > @@ -40,11 +40,13 @@ int prepare_resume_ctx(void); > > void hyp_resume(void); > > bool host_system_suspend_allowed(void); > > void host_system_suspend_disable(const char *reason); > > +void host_system_suspend(struct domain *d); > > > > #else /* !CONFIG_SYSTEM_SUSPEND */ > > > > static inline bool host_system_suspend_allowed(void) { return false; = } > > static inline void host_system_suspend_disable(const char *reason) {} > > +static inline void host_system_suspend(struct domain *d) {} > > > > #endif > > > > diff --git a/xen/arch/arm/mmu/smpboot.c b/xen/arch/arm/mmu/smpboot.c > > index 37e91d72b7..ff508ecf40 100644 > > --- a/xen/arch/arm/mmu/smpboot.c > > +++ b/xen/arch/arm/mmu/smpboot.c > > @@ -72,7 +72,7 @@ static void clear_boot_pagetables(void) > > clear_table(boot_third); > > } > > > > -static void set_init_ttbr(lpae_t *root) > > +void set_init_ttbr(lpae_t *root) > > { > > /* > > * init_ttbr is part of the identity mapping which is read-only. = So > > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > > index a571035d2c..b1cc67fbdb 100644 > > --- a/xen/arch/arm/suspend.c > > +++ b/xen/arch/arm/suspend.c > > @@ -1,10 +1,16 @@ > > /* SPDX-License-Identifier: GPL-2.0-only */ > > > > +#include > > #include > > #include > > > > +#include > > +#include > > +#include > > #include > > +#include > > #include > > +#include > > > > struct resume_cpu_context resume_cpu_context; > > > > @@ -44,6 +50,140 @@ void host_system_suspend_disable(const char *reason= ) > > reason ? reason : "unsupported suspend/resume path"); > > } > > > > +/* Xen suspend. data identifies the domain that initiated suspend. */ > > +static void system_suspend(void *data) > > +{ > > + int status; > > + unsigned long flags; > > + struct domain *d =3D (struct domain *)data; > > + > > + BUG_ON(system_state !=3D SYS_STATE_active); > > + > > + system_state =3D SYS_STATE_suspend; > > + > > + printk("Xen suspending...\n"); > > + > > + freeze_domains(); > > + scheduler_disable(); > > + > > + /* > > + * Non-boot CPUs have to be disabled on suspend and enabled on res= ume > > + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to= PSCI > > + * CPU_OFF to be called by each non-boot CPU. Depending on the und= erlying > > + * platform capabilities, this may lead to the physical powering d= own of > > + * CPUs. > > + */ > > + status =3D disable_nonboot_cpus(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_nonboot_cpus; > > + } > > + > > + console_start_sync(); > > + status =3D iommu_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_end_sync; > > + } > > + > > + status =3D console_suspend(); > > + if ( status ) > > + { > > + dprintk(XENLOG_ERR, "Failed to suspend the console, err=3D%d\n= ", status); > > + system_state =3D SYS_STATE_resume; > > + goto resume_iommu; > > + } > > + > > + local_irq_save(flags); > > + > > + time_suspend(); > > + > > + status =3D gic_suspend(); > > + if ( status ) > > + { > > + system_state =3D SYS_STATE_resume; > > + goto resume_time; > > + } > > + > > + set_init_ttbr(xen_pgtable); > > + > > + /* > > + * Enable identity mapping before entering suspend to simplify > > + * the resume path > > + */ > > + update_boot_mapping(true); > > + > > + if ( prepare_resume_ctx() ) > > + { > > + status =3D call_psci_system_suspend(); > > + /* > > + * If suspend is finalized properly by above system suspend PS= CI call, > > + * the code below in this 'if' branch will never execute. Exec= ution > > + * will continue from hyp_resume which is the hypervisor's res= ume point. > > + * In hyp_resume CPU context will be restored and since link-r= egister is > > + * restored as well, it will appear to return from prepare_res= ume_ctx. > > + * The difference in returning from prepare_resume_ctx on syst= em suspend > > + * versus resume is in function's return value: on suspend, th= e return > > + * value is a non-zero value, on resume it is zero. That is wh= y the > > + * control flow will not re-enter this 'if' branch on resume. > > + */ > > + if ( status ) > > + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err= =3D%d\n", > > + status); > > + } > > > > ... unless I am mistaken, the boot CPU appears to bypass errata checks > on resume. > > Non-boot (secondary) CPUs: before suspending, Xen calls > disable_nonboot_cpus(). Upon resume, it calls enable_nonboot_cpus(), > which utilizes the standard secondary CPU bring-up path. Secondary CPUs > boot through init_secondary() -> start_secondary(), where Xen explicitly > calls functions such as check_local_cpu_errata(), etc. So, secondary > CPUs are fine. > > Boot CPU: when CPU0 wakes up from SYSTEM_SUSPEND, it enters > hyp_resume(), calls cpu_init(), and branches directly back into the > middle of system_suspend(), where it resumes the GIC, timer, IOMMU, etc. > At no point in hyp_resume() or system_suspend() does CPU0 call > check_local_cpu_errata(). > > Could you, please, clarify why this is OK? Good catch, thanks. I agree there is a gap here. Secondary CPUs go through the normal secondary bring-up path after resume, so they run the local CPU errata/workaround handling again. The boot CPU, however, resumes through hyp_resume() and returns directly to the suspend path. I will rework this so that the boot CPU also re-applies the relevant local CPU errata/workaround handling after SYSTEM_SUSPEND, before continuing with the rest of the resume sequence. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 17:20:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 17:20:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312173.1582335 (Exim 4.92) (envelope-from ) id 1wP1df-0002Oe-AX; Mon, 18 May 2026 17:20:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312173.1582335; Mon, 18 May 2026 17:20:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP1df-0002OX-7y; Mon, 18 May 2026 17:20:23 +0000 Received: by outflank-mailman (input) for mailman id 1312173; Mon, 18 May 2026 17:20:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP1de-0002OR-H1 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 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Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk References: Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz LnRlY2g+wsENBBMBCAA3FiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmn5sK8FCQWjmoACGwME CwkIBwUVCAkKCwUWAgMBAAAKCRBmD6nRAsvP0ID6DACGOktArFbLKHNzuyOVCskwfUZPla6Z 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X-purgate-type: clean X-purgate-size: 11125 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------wsDScAUdj85lIBzS7DRc1Uw9 Content-Type: multipart/mixed; boundary="------------eViBguofPDE0pRtXSMXpjhGo"; protected-headers="v1" From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk Message-ID: <70b597da-e564-4f97-b22d-a647b6497a0d@vates.tech> Subject: Re: [PATCH 0/5] Small PCI refactoring References: In-Reply-To: --------------eViBguofPDE0pRtXSMXpjhGo Content-Type: multipart/mixed; boundary="------------zvnv6f4a0PpngRFwpPYNjlmx" --------------zvnv6f4a0PpngRFwpPYNjlmx Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 TGUgMTgvMDUvMjAyNiDDoCAxNzoyMiwgVGVkZHkgQXN0aWUgYSDDqWNyaXTCoDoNCj4gVGhl IGdvYWwgb2YgdGhpcyBzZXJpZXMgaXMgdG8gbWFrZSBzb21lIHJlZmFjdG9yaW5nIG9mIHNv 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=?utf-8?B?YmpwMU9nenF5K3dxQ3pWT1grRDlpdzhhZGU0eHFaQ2JTaG16Vm9NNUkrZlpI?= =?utf-8?B?V0ZSWVAzV0cvR3dXLzVrQ3BIY1h1TnhSS2lKbVF5NTJ2S0Q2QjBsaVM2U3hi?= =?utf-8?B?L3JKcU9uQldaTU5OWW1paVdLVVhyN2JzbzJnZWhuQVMzcHd3M0NvWEI1aFhI?= =?utf-8?B?VnBKSnU0MkhNNUtNSll2TkorUzJuT1RoTkwxVDVrWkNoVE5nYUhGNE1IT3B1?= =?utf-8?Q?HMjnotgiOh7cHfo4=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4dc2d8a6-5837-471e-da9e-08deb503e7c6 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 17:35:51.2438 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PG0QQktzQmKYDBHVpiCtqF9fBRX+U5N/Vse9fBYeHUTOzywbim5E34rBLWrogyQ+NAuuBD4HW3aGxcRwNyhiJfcZSbP80dyOb/ZLeedPW34= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA2PR03MB5881 X-purgate-ID: tlsNG-d25034/1779125756-D996DCF5-CF2E183E/0/0 X-purgate-type: clean X-purgate-size: 10709 On 18/05/2026 4:21 pm, Teddy Astie wrote: > Key parts of MMCFG access bits are in mmconfig_64.c (in particular > pci_mmcfg_{read,write}()) while PCI configuration primitives (used accross the > codebase) are in pci.c. > This leads to situations where the compiler cannot optimize the `switch (len)` > for MMCFG access for all pci_conf_{read,write}N(), because they are not from > the same file. > > Move the pci_mmcfg_{read,write} in pci.c and hint the compiler to inline these > functions such that it's more likely that the compiler eliminates the > `switch (len)``. > > Also take the opportunity to migrate to pci_sbdf_t to reduce the parameter count > and drop many parameter domains checks. > > On GCC 16.1, this leads to codegen where pci_conf_{read,write}N() doesn't call > pci_mmcfg_{read,write}() anymore and directly perform the MMIO RW. > > : > 55 push %rbp > 48 89 e5 mov %rsp,%rbp > 53 push %rbx > 89 f8 mov %edi,%eax > 89 f3 mov %esi,%ebx > c1 ef 10 shr $0x10,%edi > 81 fe ff 00 00 00 cmp $0xff,%esi > 77 26 ja ffff82d040301fab > 85 ff test %edi,%edi > 75 22 jne ffff82d040301fab > 0f b7 f8 movzwl %ax,%edi > c1 e7 08 shl $0x8,%edi > 83 e3 fc and $0xfffffffc,%ebx > 09 df or %ebx,%edi > 81 cf 00 00 00 80 or $0x80000000,%edi > ba 04 00 00 00 mov $0x4,%edx > be 00 00 00 00 mov $0x0,%esi > e8 2a 1c 03 00 call ffff82d040333bd3 > eb 22 jmp ffff82d040301fcd > 81 fb ff 0f 00 00 cmp $0xfff,%ebx > 77 24 ja ffff82d040301fd7 > 0f b6 d0 movzbl %al,%edx > 0f b6 f4 movzbl %ah,%esi > 0f b7 ff movzwl %di,%edi > e8 f5 fd ff ff call ffff82d040301db6 > 48 85 c0 test %rax,%rax > 74 18 je ffff82d040301fde > 89 db mov %ebx,%ebx > 48 01 d8 add %rbx,%rax > 8b 00 mov (%rax),%eax > 48 8b 5d f8 mov -0x8(%rbp),%rbx > c9 leave > e9 89 12 f0 ff jmp ffff82d040203260 <__x86_return_thunk> > b8 ff ff ff ff mov $0xffffffff,%eax > eb ef jmp ffff82d040301fcd > b8 ff ff ff ff mov $0xffffffff,%eax > eb e8 jmp ffff82d040301fcd This is not the whole function because it's missing a pop %rbx.  Also, right at the bottom here are the -1's from bad error paths (discussed later). But, this should be after the ---.  Disassembly this long isn't interesting to stay in the commit message. > diff --git a/xen/arch/x86/x86_64/mmconfig_64.c b/xen/arch/x86/x86_64/mmconfig_64.c > index 940cf6d747..483dff9c2c 100644 > --- a/xen/arch/x86/x86_64/mmconfig_64.c > +++ b/xen/arch/x86/x86_64/mmconfig_64.c > @@ -133,6 +46,25 @@ static void __iomem *mcfg_ioremap(const struct acpi_mcfg_allocation *cfg, > return (void __iomem *) virt; > } > > +char __iomem *pci_mmcfg_base(unsigned int seg, unsigned int *bus) > +{ > + struct acpi_mcfg_allocation *cfg; > + int cfg_num; > + > + for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { > + cfg = pci_mmcfg_virt[cfg_num].cfg; > + if (cfg->pci_segment == seg && > + (cfg->start_bus_number <= *bus) && > + (cfg->end_bus_number >= *bus)) { > + *bus -= cfg->start_bus_number; > + return pci_mmcfg_virt[cfg_num].virt; > + } > + } > + > + /* Fall back to type 0 */ > + return NULL; > +} This is a horrid function.  Accessing and modifying bus like that causes poor code generation, and by now having this in a separate translation unit, the optimiser can't fold it into it's single caller and undo the poor decisions which went into writing this function. Instead, you want: void __iomem *pci_mmcfg_base(pci_sbdf_t sbdf) {     ... } base which takes care of the bus adjustment internally.  This can be broken out into a separate patch, and take the opportunity to write it to Xen style. > diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c > index 8d33429103..c37e3edade 100644 > --- a/xen/arch/x86/x86_64/pci.c > +++ b/xen/arch/x86/x86_64/pci.c > @@ -11,13 +11,123 @@ > #define PCI_CONF_ADDRESS(sbdf, reg) \ > (0x80000000U | ((sbdf).bdf << 8) | ((reg) & ~3)) > > +/* > + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space > + * on their northbrige except through the * %eax register. As such, you MUST > + * NOT use normal IOMEM accesses, you need to only use the magic mmio-config > + * accessor functions. > + * In fact just use pci_config_*, nothing else please. I know you're just copying an existing comment, but it's mostly an opinion and not terribly helpful in place. "AMD Fam10h CPUs can only make MMCFG accesses via MOV %eax/%ax/%al", would be better, except... ... this claim cannot be true.  It's been made since the K8 RevF BKWG and exists even into the latest PPRs, but that's simply not how load/store ops work in the pipeline. It was added to Linux in https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=3320ad994afb2c44ad34b3b34c3c5cf0da297331 but without adequate justification.  I've made some enquiries. > + */ > +static inline unsigned char mmio_config_readb(void __iomem *pos) > +{ > + u8 val; > + asm volatile("movb (%1),%%al" : "=a" (val) : "r" (pos)); > + return val; > +} These need corrections, either in this patch or a followup. Switch to Xen types, and correct the memory operand constraint to be "m" (*(uint8_t *)ptr). The Fam10h BKWG states that any memory encoding is acceptable, and this allows the optimiser more flexibility (which will get used). > + > +static inline unsigned short mmio_config_readw(void __iomem *pos) > +{ > + u16 val; > + asm volatile("movw (%1),%%ax" : "=a" (val) : "r" (pos)); > + return val; > +} > + > +static inline unsigned int mmio_config_readl(void __iomem *pos) > +{ > + u32 val; > + asm volatile("movl (%1),%%eax" : "=a" (val) : "r" (pos)); > + return val; > +} > + > +static inline void mmio_config_writeb(void __iomem *pos, u8 val) > +{ > + asm volatile("movb %%al,(%1)" :: "a" (val), "r" (pos) : "memory"); > +} > + > +static inline void mmio_config_writew(void __iomem *pos, u16 val) > +{ > + asm volatile("movw %%ax,(%1)" :: "a" (val), "r" (pos) : "memory"); > +} > + > +static inline void mmio_config_writel(void __iomem *pos, u32 val) > +{ > + asm volatile("movl %%eax,(%1)" :: "a" (val), "r" (pos) : "memory"); > +} > + > +static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) > +{ > + char __iomem *addr; > + > + addr = pci_mmcfg_base(seg, &bus); > + if (!addr) > + return NULL; > + return addr + ((bus << 20) | (devfn << 12)); > +} > + > +static inline > +int pci_mmcfg_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, u32 *value) > +{ > + char __iomem *addr; > + > + /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ > + if (unlikely(reg > 4095)) { > +err: *value = -1; > + return -EINVAL; > + } > + > + addr = pci_dev_base(sbdf.seg, sbdf.bus, sbdf.devfn); > + if (!addr) > + goto err; > + > + switch (len) { > + case 1: > + *value = mmio_config_readb(addr + reg); > + break; > + case 2: > + *value = mmio_config_readw(addr + reg); > + break; > + case 4: > + *value = mmio_config_readl(addr + reg); > + break; > + } > + > + return 0; > +} Again, for this patch or a later cleanup, drop the output-by-pointer and return value directly.  The optimiser is hopefully doing this already but it also makes the function simpler. At best, we want ASSERT_UNREACHBLE()'s in the error paths (including no mapping), and to consistently return -1.  Returning 0 for a bad length is bogus. Strictly speaking we also need to check reg & (len - 1) because accesses must be naturally aligned, but even with ASSERT_UNREACHABLE() and a failsafe -1, that's still logic emitted and I'm not sure if it's worth having.  Amongst other things you really need to know that len is 1, 2 or 4 before the alignment check reads correctly. > + > +inline int pci_mmcfg_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, u32 value) > +{ > + char __iomem *addr; > + > + /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ > + if (unlikely(reg > 4095)) > + return -EINVAL; > + > + addr = pci_dev_base(sbdf.seg, sbdf.bus, sbdf.devfn); > + if (!addr) > + return -EINVAL; > + > + switch (len) { > + case 1: > + mmio_config_writeb(addr + reg, value); > + break; > + case 2: > + mmio_config_writew(addr + reg, value); > + break; > + case 4: > + mmio_config_writel(addr + reg, value); > + break; > + } > + > + return 0; > +} > + > uint8_t pci_conf_read8(pci_sbdf_t sbdf, unsigned int reg) > { > uint32_t value; > > if ( sbdf.seg || reg > 255 ) > { > - pci_mmcfg_read(sbdf.seg, sbdf.bus, sbdf.devfn, reg, 1, &value); > + pci_mmcfg_read(sbdf, reg, 1, &value); > return value; > } Not for this patch, but we also need to junk the if() condition here and elsewhere. We should be using MMCFG unilaterally if it's available; the IO port pairs require use of a global spinlock, and behind the scenes all the CPU is doing is translating it back into MMCFG-like accesses. At this juncture we should probably change it at the start of the 4.23 dev window to give it maximum time to settle before getting into a release, so probably best to tack it on as a final commit in this series? ~Andrew From xen-devel-bounces@lists.xenproject.org Mon May 18 18:00:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 18:00:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312198.1582354 (Exim 4.92) (envelope-from ) id 1wP2GV-0000MO-Gn; Mon, 18 May 2026 18:00:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312198.1582354; Mon, 18 May 2026 18:00:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP2GV-0000MH-E0; Mon, 18 May 2026 18:00:31 +0000 Received: by outflank-mailman (input) for mailman id 1312198; Mon, 18 May 2026 18:00:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP2GT-0000MB-Ot for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <93e15ff8-a313-4f19-84f1-2906cb2ade1b@amd.com> Date: Mon, 18 May 2026 20:00:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22(?) v2] gnttab: simplify (really: drop) gnttab_set_frame_gfn() To: Jan Beulich , "xen-devel@lists.xenproject.org" CC: Julien Grall , Stefano Stabellini , Volodymyr Babchuk , Bertrand Marquis , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Rafal Wojtczuk , Oleksii Kurochko References: <6e3dbb4f-5849-4525-8f8b-a2818c39da2d@suse.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <6e3dbb4f-5849-4525-8f8b-a2818c39da2d@suse.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB04.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000FCC1:EE_|CH3PR12MB8329:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ef4b2fc-257f-4ea6-c40a-08deb507526e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|376014|36860700016|1800799024|3023799003|11063799003|56012099003|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: IFTcY4BtDlLg23cDFlld26jxelyI1kXZEtx6UuBc7Uuecq0bkJiySmwQcSvrbbQ2FGTbCIiTNLsF7ZwSPAcKnGJcidsDgKcCMI2yBNNWUAKzCz7lHgTbcrXRjIsFq6mgbcQui/P7Q5xkwfymbSa9SFjlCMvmM+6kcCAuebI88d3f+kinR2/Y9VIL1/j8EX+804Si814FFpH3UEVOQe0QvGs3xxVCKQgHEmao/9uMU/YMXV3QCK7UhNGr5IGxBVI1KjFI0KtvjCk8TL+t7/UWajYtfw2miozteSsPtAWmbULZ0glajrEfosI94X+mkuX+Slz6W146Pv9awKwHWElRzZwGvduZ70CKGia/EI7m5UGrmf978tfRVJjc9e3kH74vGOYljHhUW+S+oP01ad8D+xL84nBUheihjYYgqnHefoX4Cvf14wZSKHGEogB9jjyL X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 18:00:18.4696 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9ef4b2fc-257f-4ea6-c40a-08deb507526e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000FCC1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8329 X-purgate-ID: tlsNG-ef75cf/1779127228-0AD77C48-E6836939/0/0 X-purgate-type: clean X-purgate-size: 3526 On 12-May-26 16:46, Jan Beulich wrote: > It's not really doing anything for valid GFNs, which renders its one use > site pretty pointless. The other isn't so much about setting anything, but > rather about clearing. > > The main point here, however, is about Rafal spotting the double > fetching of the GFN (first in gnttab_unpopulate_status_frames(), then > again in gnttab_set_frame_gfn()). Re-purpose the macro parameter to pass > in the already fetched GFN, while dropping the no longer used parameters. > > As the result is a mere wrapper around guest_physmap_remove_page(), drop > the hook altogether. > > Suggested-by: Rafal Wojtczuk > Signed-off-by: Jan Beulich > --- > v2: Drop hook altogether. > > --- a/xen/arch/arm/include/asm/grant_table.h > +++ b/xen/arch/arm/include/asm/grant_table.h > @@ -50,13 +50,6 @@ int replace_grant_host_mapping(uint64_t > #define gnttab_dom0_frames() \ > min_t(unsigned int, opt_max_grant_frames, PFN_DOWN(_etext - _stext)) > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0) > - > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > (st) ? gnttab_status_gfn(NULL, gt, idx) \ > : gnttab_shared_gfn(NULL, gt, idx); \ > --- a/xen/arch/x86/include/asm/grant_table.h > +++ b/xen/arch/x86/include/asm/grant_table.h > @@ -32,12 +32,6 @@ static inline int replace_grant_host_map > return replace_grant_pv_mapping(addr, frame, new_addr, flags); > } > > -#define gnttab_set_frame_gfn(gt, st, idx, gfn, mfn) \ > - (gfn_eq(gfn, INVALID_GFN) \ > - ? guest_physmap_remove_page((gt)->domain, \ > - gnttab_get_frame_gfn(gt, st, idx), \ > - mfn, 0) \ > - : 0 /* Handled in add_to_physmap_one(). */) > #define gnttab_get_frame_gfn(gt, st, idx) ({ \ > mfn_t mfn_ = (st) ? gnttab_status_mfn(gt, idx) \ > : gnttab_shared_mfn(gt, idx); \ > --- a/xen/common/grant_table.c > +++ b/xen/common/grant_table.c > @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d > { > int rc = gfn_eq(gfn, INVALID_GFN) > ? 0 > - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, > - page_to_mfn(pg)); > + : guest_physmap_remove_page(d, gfn, page_to_mfn(pg), 0); > > if ( rc ) > { > @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( > */ > if ( !get_page(pg, d) ) > rc = -EBUSY; > - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) status is now a variable that is set but never read. Remove it. With that: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 18 18:14:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 18:14:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312206.1582363 (Exim 4.92) (envelope-from ) id 1wP2UE-0002Ar-M1; Mon, 18 May 2026 18:14:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312206.1582363; Mon, 18 May 2026 18:14:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP2UE-0002Ak-J7; Mon, 18 May 2026 18:14:42 +0000 Received: by outflank-mailman (input) for mailman id 1312206; Mon, 18 May 2026 18:14:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP2UC-0002Ae-HN for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 18 May 2026 20:14:27 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] arm: Fix PT_PT table descriptor value and comment To: =?UTF-8?Q?Gabriel_Quint=C3=A1ns_Souto?= , CC: , , References: <2ef09a6a-f78f-47a5-8ffb-cd03cb51fc1b@amd.com> <20260518114552.29687-1-gabi.qs.mail@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260518114552.29687-1-gabi.qs.mail@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636C:EE_|SA1PR12MB7441:EE_ X-MS-Office365-Filtering-Correlation-Id: ac2ac0df-5705-4f7b-82a3-08deb5094f66 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700016|376014|18002099003|56012099003|22082099003|4143699003|11063799003; X-Microsoft-Antispam-Message-Info: QXWtIJK7LaC/bQmjAbpu7k65IV9NR+Zsq1RHAYeSIzRgyw65iJLACrfHQm6sa0Vg0OaZoV6i0VKPHzQowY/k4MS9/WY3ZgoaIG6TBBw0zI+rEmH9AA/DOt3t2wSAgkfwCtBM80SgOUiGVxZgBMqvqS7fzCNvz/GrjSPmPv/6oGK2uSE8HjxJaOunHuXKf0YYcJsIvD5A8bUwI/33kYmmoJ3MxCdPQ9sKKFXMTeheyR6EOFPASDsnAT6nduQ7PDtwFou2hfonxbeXlEA0A1p1dtd521IrBWJHsVcH8uS3sD0a/dxCi5fPkkvMvzV+rI3XHdAnsM8yiZxnd+cMqCFfJK6zqR38QOdrosCHjHGzhw524oEYVh84bxsvftFlG8tw7N7TJaKyGndgd+mfc1H/0DjlJP7A8xP3CsCHZumMzpGJ1Bv+zQ3QUr2yt3LMkSw+t4bcsgVItYKgouVsraITeKUSoVCcucGI+KsOvqLS+e5u1t5nu3ml5CIbUmTpAvi2uYYbek6ALovJpA9hBtLi/C7ZKQEFWKgFNX52rpxWX6uZvnOYVMcvngmLU94/idMoqOcoeh9aKUKgAsqDWOPL9HNvLhOPnUG6qSiD9oJCwpzUSDBAFEvsqs3e3oKx3pNFElz66Uz4Mg8T/ZagkfB7NO2zE270PlrVUHMSzs+yOQDmvUEa5QDqm0fakXXan8vz5zyls1/9wFEs35RJywOiov7NJqbcBtOr/yhaTnn8Kug= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(1800799024)(36860700016)(376014)(18002099003)(56012099003)(22082099003)(4143699003)(11063799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YLn8/RLCOaGEIIEt5pKo8CiyfEkReVjt0XXEFal3bwlV5YovvPiTql/+Jj4c8b6UnCeRmlMSgNth4pV5V2pG+0pdnrDwwBQdKlR3eDKZj9i+wAr9heWrdziV1Y9PYX3/LAgo+nSdHplvyNulaxyAzF5fBVRhZsp0HluZjFA3QD45SellFsVXxx9aJH/s3pCeIr5JBtswHZwgw5IOl2TCbfLQVHktSzcp3xfRSMNtvsyUR/Ln2yvIwq/3WEnd/03bMMxi3k4WBwyM2gC3slwPAaxwhSP6Rux7rCRkNnGlU9f+vJR2IAsASDwG94+/JgRQG/ciqBNxH8vNG3mnf8kGMGcOi33mrG5fk1PTrNFwDIsrsIXFRwlPmFwGhMOThMXso520RMUnUa28vmdKLyTDqLr5f1Awz8O/5sahBw3m4MED8kpsHLZ7G8xvuoXA1lDV X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 18:14:32.3994 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac2ac0df-5705-4f7b-82a3-08deb5094f66 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB7441 X-purgate-ID: tlsNG-ebf023/1779128079-417793FF-486A0B71/0/0 X-purgate-type: clean X-purgate-size: 1953 On 18-May-26 13:45, Gabriel Quintáns Souto wrote: > Per ARMv7-A/ARMv8-A ARM, bits [11:2] of table descriptors are ignored by hardware. The original comment incorrectly described block/page descriptor fields (nG, SH, AP, NS, ATTR) which do not Please trim lines to 80 chars exist in the table descriptor format. > > Set PT_PT to 0x403: > - Bit 0 (P): Valid bit (required) > - Bit 1 (T): Table descriptor type (required) > - Bit 10 (AF): Access flag (future-proof for FEAT_HAFT) There's no FEAT_HAFT on AArch32, bit 10 is purely ignored, so why setting it also for arm32? On arm32 it should be 0x3. On arm64, thinking more about it, setting AF for table descriptor would make sense only if we enable HAFT in TCR which we don't. Therefore, for consistency you should use 0x3 for both arm32 and arm64. > > Hardware ignores bits [11:2] but setting AF prepares for ARMv9's FEAT_HAFT. Using 0x403 rather than minimal 0x3 provides forward compatibility while avoiding unnecessary reserved bits. > > This updates both arm32 and arm64 for consistency. > > Signed-off-by: Gabriel Quintáns Souto > > --- > Changes in v2: > - Apply fix to both arm32 and arm64 > - Use 0x403 instead of 0x743 > --- > xen/arch/arm/arm32/mmu/head.S | 2 +- > xen/arch/arm/arm64/mmu/head.S | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/arm/arm32/mmu/head.S b/xen/arch/arm/arm32/mmu/head.S > index 5032e6c075..cab7be0621 100644 > --- a/xen/arch/arm/arm32/mmu/head.S > +++ b/xen/arch/arm/arm32/mmu/head.S > @@ -8,7 +8,7 @@ > #include > #include > > -#define PT_PT 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ > +#define PT_PT 0x403 /* AF=1 T=1 P=1 (bits [11:2] ignored in table descriptors) */ Don't exceed 80 chars line length. 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Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-42698a/1779137575-21780F3B-DB1EF56B/0/0 X-purgate-type: clean X-purgate-size: 460 On Mon, May 18, 2026, David Woodhouse wrote: > On Mon, 2026-05-18 at 00:52 -0700, Dongli Zhang wrote: > > On 5/9/26 3:46 PM, David Woodhouse wrote: > > Huh, I didn't write that then; it isn't September yet. Did you mean > 2026-05-09? We aren't all in the US... > > Strictly speaking, you just misattributed a quote of mine, which is > very poor form :) But also pretty darn hilarious given that the thread is all about accurate timekeeping :-) From xen-devel-bounces@lists.xenproject.org Mon May 18 21:05:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 21:05:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312239.1582381 (Exim 4.92) (envelope-from ) id 1wP59M-0007Gd-EV; Mon, 18 May 2026 21:05:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312239.1582381; Mon, 18 May 2026 21:05:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP59M-0007GW-Bd; Mon, 18 May 2026 21:05:20 +0000 Received: by outflank-mailman (input) for mailman id 1312239; Mon, 18 May 2026 21:05:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP59K-0007GQ-Ln for xen-devel@lists.xenproject.org; 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Mon, 18 May 2026 14:05:16 -0700 (PDT) From: =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, =?UTF-8?q?Gabriel=20Quint=C3=A1ns=20Souto?= Subject: [PATCH v3] arm: Fix PT_PT table descriptor value and comment Date: Mon, 18 May 2026 23:00:08 +0200 Message-ID: <20260518210340.81347-1-gabi.qs.mail@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1779138317-28F753FF-7C68DAAE/0/0 X-purgate-type: clean X-purgate-size: 1929 Per ARMv7-A/ARMv8-A ARM, bits [11:2] of table descriptors are ignored by hardware. The original comment incorrectly described block/page descriptor fields which are not present in table descriptors. Use the minimal valid encoding for table descriptors by setting PT_PT to 0x3. This updates both arm32 and arm64 for consistency. Signed-off-by: Gabriel Quintáns Souto --- Changes in v3: - Use 0x3 instead of 0x403 Changes in v2: - Apply fix to both arm32 and arm64 - Use 0x403 instead of 0x743 --- xen/arch/arm/arm32/mmu/head.S | 2 +- xen/arch/arm/arm64/mmu/head.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/arm32/mmu/head.S b/xen/arch/arm/arm32/mmu/head.S index cab7be0621..3731322f7e 100644 --- a/xen/arch/arm/arm32/mmu/head.S +++ b/xen/arch/arm/arm32/mmu/head.S @@ -8,7 +8,7 @@ #include #include -#define PT_PT 0x403 /* AF=1 T=1 P=1 (bits [11:2] ignored in table descriptors) */ +#define PT_PT 0x3 /* T=1 P=1 */ #define PT_MEM 0xf7d /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=0 P=1 */ #define PT_MEM_L3 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ #define PT_DEV 0xe71 /* nG=1 AF=1 SH=10 AP=01 NS=1 ATTR=100 T=0 P=1 */ diff --git a/xen/arch/arm/arm64/mmu/head.S b/xen/arch/arm/arm64/mmu/head.S index 375d703d9b..8e514d2114 100644 --- a/xen/arch/arm/arm64/mmu/head.S +++ b/xen/arch/arm/arm64/mmu/head.S @@ -8,7 +8,7 @@ #include #include -#define PT_PT 0x403 /* AF=1 T=1 P=1 (bits [11:2] ignored in table descriptors) */ +#define PT_PT 0x3 /* T=1 P=1 */ #define PT_MEM 0xf7d /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=0 P=1 */ #define PT_MEM_L3 0xf7f /* nG=1 AF=1 SH=11 AP=01 NS=1 ATTR=111 T=1 P=1 */ #define PT_DEV 0xe71 /* nG=1 AF=1 SH=10 AP=01 NS=1 ATTR=100 T=0 P=1 */ -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 21:11:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 21:11:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312248.1582391 (Exim 4.92) (envelope-from ) id 1wP5Fe-0000aP-76; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-c201ff/1779138707-E0A66443-D63935C1/0/0 X-purgate-type: clean X-purgate-size: 1577 On Fri, May 15, 2026, Sean Christopherson wrote: > Dave/Thomas/Peter/Boris, what's the going rate for bribes to take something > like this through the tip tree? > > The bulk of the changes are in kvmclock and TSC, but pretty much every > hypervisor's guest-side code gets touched at some point. I am reaonsably > confident in the correctness of the KVM changes. Michael tested Hyper-V in > v2, and while there were conflicts when rebasing, they were largely > superficial (and I've just jinxed myself). For all other hypervisors, assume > the code is compile-tested only, but those changes are all quite small and > straightforward. > > The only changes that are questionable/contentious are the last two patches, > which have KVM-as-a-guest use CPUID 0x16 to get the CPU frequency, even on > AMD (that's the dubious part). I very deliberately put them last, so that > they can be dropped at will (I don't care terribly if those patches land). > To merge them, I would want explicit Acks from Paolo and David W. > > So, except for the last two patches, to get the stuff I really care about > landed, I think/hope it's just the TSC and guest-side CoCo changes that need > reviews/acks? FYI, don't bother reviewing this version. Sashiko found several glaring flaws, but I just realized that sashiko-bot's emails are only being sent to myself and linux-hyperv@vger.kernel.org. I'll make sure to highlight the changes in the next version. In the meantime, Sashiko's feedback is archived on lore if you want to see me get torched by AI :-) From xen-devel-bounces@lists.xenproject.org Mon May 18 22:00:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 22:00:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312262.1582400 (Exim 4.92) (envelope-from ) id 1wP60H-0006Su-O2; Mon, 18 May 2026 22:00:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312262.1582400; Mon, 18 May 2026 22:00:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP60H-0006SN-Ib; Mon, 18 May 2026 22:00:01 +0000 Received: by outflank-mailman (input) for mailman id 1312262; Mon, 18 May 2026 22:00:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP60G-0006Kf-JN for xen-devel@lists.xenproject.org; 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dkim=pass header.s=amazoncorp2 header.d=amazon.co.uk header.i="@amazon.co.uk" header.h="From:To:CC:Subject:Date:Message-ID:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazoncorp2; t=1779141596; x=1810677596; h=from:to:cc:subject:date:message-id:references: in-reply-to; bh=UY4px7obefDkFSqtaMX8W1nqhkHCToXgPd5bqMLXMUU=; b=s034rcmGp4TIFYSid6n8PJcuq2IX2/8c04vw2V/3r3bm5BJuzAqXeg+E cbR2cgDi1wt0eSUid0wu52PSZ+XVpjzonR60EhZZz9tFfzryw18rdGWHc KyOTViQ+rmVh+1xybtq/JpUgjwf38BBPH7J8mXY9poVcCwM5SvqxAkmOo Dn4k3mN9FwxMHP+l/VtGwfzCM7DqRDa7LPBE6IJ6U6dKqHQy73wgstkCG g+YqJJcXqCJWHQfRaVuFfBsWjcfChpGGQU0Q882rPY4DzvS5o5oK7UsLh pCQZpgAl92ZE4ljGlWKayZfyr5eSCfDoUwGeNozRKDeWkrZNggzfv96Oc Q==; X-CSE-ConnectionGUID: gTMEk/4WTCen/jZTSjFtkg== X-CSE-MsgGUID: 8tZ40CHMRQSBVjZo5QI3zg== X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="6.23,242,1770595200"; d="p7s'346?scan'346,208,346";a="18989139" Content-Type: multipart/mixed; boundary="===============4007323092883351321==" MIME-Version: 1.0 X-Farcaster-Flow-ID: 7fef345e-b796-4a43-8663-485108bc2c9b From: "Woodhouse, David" To: "tglx@kernel.org" , "longli@microsoft.com" , "luto@kernel.org" , "alexey.makhalov@broadcom.com" , "jstultz@google.com" , "dave.hansen@linux.intel.com" , "ajay.kaher@broadcom.com" , "jan.kiszka@siemens.com" , "haiyangz@microsoft.com" , "kas@kernel.org" , "seanjc@google.com" , "pbonzini@redhat.com" , "kys@microsoft.com" , "decui@microsoft.com" , "daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" CC: "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines Thread-Topic: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines Thread-Index: AQHc5xGmpbVPXJqKvE66awyRkPGU2A== Date: Mon, 18 May 2026 21:59:51 +0000 Message-ID: <949e39aec749f019b18fa41c2a42bcc9231288b9.camel@amazon.co.uk> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-3-seanjc@google.com> In-Reply-To: <20260515191942.1892718-3-seanjc@google.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.106.83.21] MIME-Version: 1.0 X-purgate-ID: tlsNG-d25034/1779141596-F4C79CF5-E0AA7E1A/21/137 X-purgate-type: clean X-purgate-size: 10730 --===============4007323092883351321== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/pkcs7-signature"; boundary="=-6Tz0T5TstgWdynDqmecj" --=-6Tz0T5TstgWdynDqmecj Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: >=20 > --- a/arch/x86/xen/time.c > +++ b/arch/x86/xen/time.c > @@ -569,7 +569,7 @@ static void __init xen_init_time_common(void) > =C2=A0 static_call_update(pv_steal_clock, xen_steal_clock); > =C2=A0 paravirt_set_sched_clock(xen_sched_clock); > =C2=A0 > - x86_platform.calibrate_tsc =3D xen_tsc_khz; > + tsc_register_calibration_routines(xen_tsc_khz, NULL); > =C2=A0 x86_platform.get_wallclock =3D xen_get_wallclock; > =C2=A0} > =C2=A0 xen_tsc_khz() doesn't use CPUID but really *should*. Care to pull in https://lore.kernel.org/all/20260509224824.3264567-31-dwmw2@infradead.org/ to your next round please? (Without the misplaced changes in kvm/x86.c that should have been in two different prior commits, and are now folded into those correctly in my kvmclock5 branch ready for the next posting of that). I'll drop that patch, and the similar x86/kvm one which you *have* already taken in this series, from my next posting. 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Mon, 18 May 2026 15:36:39 -0700 (PDT) MIME-Version: 1.0 References: <5323B63C-7F37-418C-97C6-0A94F9D03B4F@arm.com> In-Reply-To: <5323B63C-7F37-418C-97C6-0A94F9D03B4F@arm.com> From: Mykola Kvach Date: Tue, 19 May 2026 01:36:27 +0300 X-Gm-Features: AVHnY4Ku4LoE7n8DvxKqiqS6D51-CFgb9rxrL3rIPk1MoKeL7dmPSVikAsYebDE Message-ID: Subject: Re: [PATCH v9 05/13] xen/arm: gic-v3: add ITS suspend/resume support To: Luca Fancellu Cc: "xen-devel@lists.xenproject.org" , Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779143799-2B5683FF-DB206C5E/0/0 X-purgate-type: clean X-purgate-size: 7917 Hi Luca, Thank you for the detailed review. On Thu, May 14, 2026 at 5:46=E2=80=AFPM Luca Fancellu wrote: > > Hi Mykola, > > > On 12 May 2026, at 18:07, Mykola Kvach wrote: > > > > From: Mykola Kvach > > > > Handle system suspend/resume for GICv3 with an ITS present so LPIs keep > > working after firmware powers the GIC down. Save and restore the ITS > > CTLR, CBASER and BASER registers, and re-establish the collection mappi= ng > > on resume. > > > > Add list_for_each_entry_continue_reverse() in list.h for the ITS suspen= d > > error path that needs to roll back partially saved state. > > > > Based on Linux commit dba0bc7b76dc: > > "irqchip/gic-v3-its: Add ability to save/restore ITS state". > > Signed-off-by: Mykola Kvach > > --- > > Changes in V9: > > - fix the ITS suspend/resume coding-style nits; > > - preserve the saved GITS_CTLR state while masking the read-only > > QUIESCENT bit. > > > > Changes in V8: > > - Reword the CBASER/CWRITER comment to match Xen and drop the stale Lin= ux > > cmd_write reference. > > - Clarify the list_for_each_entry_continue_reverse() comment. > > - Factor out per-ITS helpers for collection setup and resume. > > - Restore each ITS and re-establish its collection mapping in the same > > loop, so a failed ITS resume is not followed by MAPC/SYNC on that > > un-restored instance. > > - panic in case when resume of an ITS failed > > - cleanup baser cache during suspend > > --- > > xen/arch/arm/gic-v3-its.c | 133 ++++++++++++++++++++++++-- > > xen/arch/arm/gic-v3.c | 11 ++- > > xen/arch/arm/include/asm/gic_v3_its.h | 23 +++++ > > xen/include/xen/list.h | 14 +++ > > 4 files changed, 171 insertions(+), 10 deletions(-) > > > > diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c > > index 9005ce8ce5..582c26d964 100644 > > --- a/xen/arch/arm/gic-v3-its.c > > +++ b/xen/arch/arm/gic-v3-its.c > > @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, > > return its_send_command(its, cmd); > > } > > > > +static int gicv3_its_setup_collection_single(struct host_its *its, > > + unsigned int cpu) > > +{ > > + int ret; > > + > > + ret =3D its_send_cmd_mapc(its, cpu, cpu); > > + if ( ret ) > > + return ret; > > + > > + ret =3D its_send_cmd_sync(its, cpu); > > + if ( ret ) > > + return ret; > > + > > + return gicv3_its_wait_commands(its); > > +} > > + > > /* Set up the (1:1) collection mapping for the given host CPU. */ > > int gicv3_its_setup_collection(unsigned int cpu) > > { > > @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) > > > > list_for_each_entry(its, &host_its_list, entry) > > { > > - ret =3D its_send_cmd_mapc(its, cpu, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D its_send_cmd_sync(its, cpu); > > - if ( ret ) > > - return ret; > > - > > - ret =3D gicv3_its_wait_commands(its); > > + ret =3D gicv3_its_setup_collection_single(its, cpu); > > if ( ret ) > > return ret; > > } > > @@ -1210,6 +1218,113 @@ int gicv3_its_init(void) > > return 0; > > } > > > > +#ifdef CONFIG_SYSTEM_SUSPEND > > +int gicv3_its_suspend(void) > > +{ > > + struct host_its *its; > > + int ret; > > + > > + list_for_each_entry( its, &host_its_list, entry ) > > + { > > + unsigned int i; > > + void __iomem *base =3D its->its_base; > > + > > + /* > > + * By the time Xen reaches gic_suspend(), every domain is alre= ady in > > + * SHUTDOWN_suspend, so ITS-targeting interrupt sources are ex= pected > > + * to have been quiesced by the owning OS before SYSTEM_SUSPEN= D. > > + */ > > + /* Preserve saved GITS_CTLR state, excluding read-only QUIESCE= NT. */ > > + its->suspend_ctx.ctlr =3D readl_relaxed(base + GITS_CTLR) & > > + ~GITS_CTLR_QUIESCENT; > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + { > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + goto err; > > + } > > + > > + its->suspend_ctx.cbaser =3D readq_relaxed(base + GITS_CBASER); > > + > > + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > > + { > > + uint64_t baser =3D readq_relaxed(base + GITS_BASER0 + i * = 8); > > + > > + its->suspend_ctx.baser[i] =3D 0; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + its->suspend_ctx.baser[i] =3D baser; > > + } > > + } > > + > > + return 0; > > + > > + err: > > + list_for_each_entry_continue_reverse( its, &host_its_list, entry ) > > + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTL= R); > > + > > + return ret; > > +} > > + > > +static int gicv3_its_resume_single(struct host_its *its, unsigned int = cpu) > > +{ > > + void __iomem *base =3D its->its_base; > > + unsigned int i; > > + int ret; > > + > > + /* > > + * Make sure that the ITS is disabled. If it fails to quiesce, > > + * don't restore it since writing to CBASER or BASER > > + * registers is undefined according to the GIC v3 ITS > > s/undefined/unpredictable/ ? Ack. > > > + * Specification. > > + */ > > + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); > > + ret =3D gicv3_disable_its(its); > > + if ( ret ) > > + return ret; > > + > > + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); > > + > > + /* > > + * Writing CBASER resets CREADR to 0, so reset CWRITER to > > + * keep the command queue pointers aligned. > > + */ > > + writeq_relaxed(0, base + GITS_CWRITER); > > + > > + /* Restore GITS_BASER from the value cache. */ > > + for ( i =3D 0; i < GITS_BASER_NR_REGS; i++ ) > > + { > > + uint64_t baser =3D its->suspend_ctx.baser[i]; > > + > > + if ( !(baser & GITS_VALID_BIT) ) > > + continue; > > + > > + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); > > + } > > + > > + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); > > + > > + return gicv3_its_setup_collection_single(its, cpu); > > This will always issue a MAPC V=3D1, in the section 5.3.9 it sais it=E2= =80=99s "unpredictable > if there are interrupts that are mapped to the specified collection and t= he > collection is currently mapped to a Redistributor, unless MAPC is followe= d by MOVALL=E2=80=9D, > in this case the redistributor is the same but the specs don=E2=80=99t sa= y anything about this case, > it=E2=80=99s generally unpredictable if we are remapping an already-live = collection. > > I see Linux reply the MAPC V=3D1 only if the collection is stored in the = ITS (not memory backed), > our col_id is `cpu`, which I believe that for the suspend path is always = zero (?), so by looking into > HCC we could check if we need to issue the MAPC or not. > > if ( cpu < GITS_TYPER_HCC(readq_relaxed(base + GITS_TYPER)) ) > return gicv3_its_setup_collection_single(its, cpu); > > return 0; > Good point, I agree. Replaying MAPC unconditionally is not needed here and may be unsafe for memory-backed collections. Since Xen currently uses col_id =3D=3D cpu, I wi= ll add the HCC check before calling gicv3_its_setup_collection_single(), as you suggested. I will also add a short comment to make clear that the check is about the CollectionID being ITS-held. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 18 22:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 22:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312280.1582418 (Exim 4.92) (envelope-from ) id 1wP6jq-0004u0-8e; Mon, 18 May 2026 22:47:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312280.1582418; Mon, 18 May 2026 22:47:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP6jq-0004tt-4q; Mon, 18 May 2026 22:47:06 +0000 Received: by outflank-mailman (input) for mailman id 1312280; Mon, 18 May 2026 22:47:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP6jo-0004tm-RT for xen-devel@lists.xenproject.org; Mon, 18 May 2026 22:47:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP6jn-00FpFG-Pc for xen-devel@lists.xenproject.org; Tue, 19 May 2026 00:47:03 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b969d-5cb7-0a2a0a5109dd-0a2a450aecd4-16 for ; Tue, 19 May 2026 00:47:03 +0200 Received: from [209.85.167.43] (helo=mail-lf1-f43.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b96e7-56b3-0a2a450a0019-d155a72be199-3 for ; Tue, 19 May 2026 00:47:03 +0200 Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-5a8d1f43432so5188872e87.3 for ; Mon, 18 May 2026 15:47:03 -0700 (PDT) Received: from gmail.com (213-67-3-247-no600.tbcn.telia.com. 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Iglesias" To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com Subject: [PATCH v1 0/1] xen/arm: gic-v3: Fix wake-up loop in gicv3_enable_redist Date: Tue, 19 May 2026 00:46:51 +0200 Message-ID: <20260518224652.422864-1-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779144423-733738B7-9887B7AE/0/0 X-purgate-type: clean X-purgate-size: 417 From: "Edgar E. Iglesias" Hi, I ran into this issue with a poll loop in gicv3_enable_redist while exploring QEMU fault-injection techniques in the context of safety certification. Cheers, Edgar Edgar E. Iglesias (1): xen/arm: gic-v3: Fix wake-up loop in gicv3_enable_redist xen/arch/arm/gic-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 22:47:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 22:47:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312281.1582426 (Exim 4.92) (envelope-from ) id 1wP6jt-000576-FK; Mon, 18 May 2026 22:47:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312281.1582426; Mon, 18 May 2026 22:47:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP6jt-00056z-Br; Mon, 18 May 2026 22:47:09 +0000 Received: by outflank-mailman (input) for mailman id 1312281; Mon, 18 May 2026 22:47:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP6js-00056m-H4 for xen-devel@lists.xenproject.org; Mon, 18 May 2026 22:47:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP6jr-004ZjV-TO for xen-devel@lists.xenproject.org; Tue, 19 May 2026 00:47:07 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0b969b-e002-0a2a0a5209dd-0a2a4503a918-40 for ; Tue, 19 May 2026 00:47:07 +0200 Received: from [209.85.167.45] (helo=mail-lf1-f45.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0b96eb-672d-0a2a45030019-d155a72dd8e4-3 for ; Tue, 19 May 2026 00:47:07 +0200 Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-5a8fbe18b1dso4771316e87.2 for ; Mon, 18 May 2026 15:47:07 -0700 (PDT) Received: from gmail.com (213-67-3-247-no600.tbcn.telia.com. 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Iglesias" To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com Subject: [PATCH v1 1/1] xen/arm: gic-v3: Fix wake-up loop in gicv3_enable_redist Date: Tue, 19 May 2026 00:46:52 +0200 Message-ID: <20260518224652.422864-2-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518224652.422864-1-edgar.iglesias@gmail.com> References: <20260518224652.422864-1-edgar.iglesias@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779144427-3B56F938-E1191340/0/0 X-purgate-type: clean X-purgate-size: 849 From: "Edgar E. Iglesias" timeout starts as false and is only set on the timeout break, so the loop always exits after one iteration and a stuck redistributor is silently treated as woken. Use while ( 1 ) to match the sibling gicv3_do_wait_for_rwp(). Fixes: bc183a0235 ("xen/arm: Add support for GIC v3") Signed-off-by: Edgar E. Iglesias --- xen/arch/arm/gic-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9..f03217282e 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -828,7 +828,7 @@ static int gicv3_enable_redist(void) } cpu_relax(); udelay(1); - } while ( timeout ); + } while ( 1 ); if ( timeout ) { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 23:38:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 23:38:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312304.1582434 (Exim 4.92) (envelope-from ) id 1wP7Xf-00047s-5d; Mon, 18 May 2026 23:38:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312304.1582434; Mon, 18 May 2026 23:38:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP7Xf-00047l-2N; Mon, 18 May 2026 23:38:35 +0000 Received: by outflank-mailman (input) for mailman id 1312304; Mon, 18 May 2026 23:38:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP7Xa-00047e-9L for xen-devel@lists.xenproject.org; Mon, 18 May 2026 23:38:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP7XZ-00A6xQ-LF for xen-devel@lists.xenproject.org; Tue, 19 May 2026 01:38:29 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ba2ec-bab6-0a2a0a5309dd-0a2a4509affa-6 for ; Tue, 19 May 2026 01:38:28 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ba2f3-2497-0a2a45090019-5a9b3222c666-3 for ; Tue, 19 May 2026 01:38:27 +0200 Received: from 54-240-197-225.amazon.com ([54.240.197.225] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wP7XL-00000005GUS-2sDo; Mon, 18 May 2026 23:38:15 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=ybRa/FKcrPbhXiFoMzbhw3eRNrNHkp49lvJnD4jyFgA=; b=dtdG+4Gdeg84QaH+8VNriJYoBT WyboTRG7NvCI0iX/6Bh8KJOFRRhm3RzTgBjF+Md6KFnV5ODJhXyUBICKCBGFZZbW+f5VOiOihaK4p Dx48fZ9qPlQhHdU4VhwMXWSngojfty/OM4XQ31H/+/VLzJp4RPfaQB5G9e9xzqnJj8txjasWjfdBu vqtGwP+FW1dxS+GwNI76wn9utdQyT8VMRMsIkA5+LOKG5EYz0lTId0nHb9QuQigjq1WzcPHfGLWg/ 7iT5QG4j5VP7zfEZprEQRdrxpJd2Y4/MKHfxTYHCUbiPvEozcoXvsnsTgh9gDubohNxpI3LjyPeju IroO6uTQ==; Message-ID: <7260682b21c28d1299e58400b9a2f4b8d23bd434.camel@infradead.org> Subject: Re: [PATCH v3 00/41] x86: Try to wrangle PV clocks vs. TSC From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Tue, 19 May 2026 00:38:13 +0100 In-Reply-To: <20260515191942.1892718-1-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-sVYMF3zPsR6TVbl8qGQi" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1779147508-3777AA53-0135CA1A/0/0 X-purgate-type: clean X-purgate-size: 11024 --=-sVYMF3zPsR6TVbl8qGQi Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Dave/Thomas/Peter/Boris, what's the going rate for bribes to take somethi= ng > like this through the tip tree? >=20 > The bulk of the changes are in kvmclock and TSC, but pretty much every > hypervisor's guest-side code gets touched at some point.=C2=A0 I am reaon= sably > confident in the correctness of the KVM changes.=C2=A0 Michael tested Hyp= er-V in > v2, and while there were conflicts when rebasing, they were largely > superficial (and I've just jinxed myself).=C2=A0 For all other hypervisor= s, assume > the code is compile-tested only, but those changes are all quite small an= d > straightforward. >=20 > The only changes that are questionable/contentious are the last two patch= es, > which have KVM-as-a-guest use CPUID 0x16 to get the CPU frequency, even o= n > AMD (that's the dubious part).=C2=A0 I very deliberately put them last, s= o that > they can be dropped at will (I don't care terribly if those patches land)= . > To merge them, I would want explicit Acks from Paolo and David W. >=20 > So, except for the last two patches, to get the stuff I really care about > landed, I think/hope it's just the TSC and guest-side CoCo changes that n= eed > reviews/acks? >=20 > The primary goal of this series is (or at least was, when I started) to > fix flaws with SNP and TDX guests where a PV clock provided by the untrus= ted > hypervisor is used instead of the secure/trusted TSC that is controlled b= y > trusted firmware. >=20 > The secondary goal is to draft off of the SNP and TDX changes to slightly > modernize running under KVM.=C2=A0 Currently, KVM guests will use TSC for > clocksource, but not sched_clock.=C2=A0 And they ignore Intel's CPUID-bas= ed TSC > and CPU frequency enumeration, even when using the TSC instead of kvmcloc= k. > And if the host provides the core crystal frequency in CPUID.0x15, then K= VM > guests can use that for the APIC timer period instead of manually calibra= ting > the frequency. >=20 > The tertiary goal is to clean up all of the PV clock code to deduplicate = logic > across hypervisors, and to hopefully make it all easier to maintain going > forward. I booted this in qemu with -cpu host,+invtsc,+vmware-cpuid-freq I was expecting to see it eschew the kvmclock and use *only* the TSC. Is there even any need for 'tsc-early' given that it's *told* the TSC frequency in CPUID? Shouldn't it have detected that the TSC is known before init_tsc_clocksource() runs? And then it even spent some time at boot actually using the kvmclock as clocksource... when ideally I don't think it would even have *enabled* it at all? [ 0.000000] clocksource: kvm-clock: mask: 0xffffffffffffffff max_cycles:= 0x1cd42e4dffb, max_idle_ns: 881590591483 ns [ 0.000000] tsc: Detected 2400.000 MHz processor [ 0.008205] TSC deadline timer available [ 0.008270] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0= xffffffff, max_idle_ns: 1910969940391419 ns [ 0.159085] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff, = max_idle_ns: 19112604467 ns [ 0.164074] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles:= 0x22983777dd9, max_idle_ns: 440795300422 ns [ 0.229087] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xfffffff= f, max_idle_ns: 1911260446275000 ns [ 0.337095] clocksource: Switched to clocksource kvm-clock [ 0.345246] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff, m= ax_idle_ns: 2085701024 ns [ 0.356201] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x229= 83777dd9, max_idle_ns: 440795300422 ns [ 0.360560] clocksource: Switched to clocksource tsc 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header.from=amd.com; From: "Edgar E. Iglesias" To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com Subject: [PATCH v1 1/1] arm64: Fix strrchr() matching of null terminator Date: Tue, 19 May 2026 01:43:53 +0200 Message-ID: <20260518234353.453193-2-edgar.iglesias@amd.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260518234353.453193-1-edgar.iglesias@amd.com> References: <20260518234353.453193-1-edgar.iglesias@amd.com> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: CPAP307CA0001.DNKP307.PROD.OUTLOOK.COM (2603:10a6:380:3::10) To SN7PR12MB6839.namprd12.prod.outlook.com (2603:10b6:806:265::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR12MB6839:EE_|SJ5PPFCB5E1B8F5:EE_ X-MS-Office365-Filtering-Correlation-Id: 85b7c497-cb8b-4c24-1e07-08deb537558d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|22082099003|18002099003|56012099003|3023799003|11063799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?sl6faaC22LTiQTpXYfJIVQeAl/QGu8nGbCQiP4dWVB5HQU2tFYFatfaBaNgG?= =?us-ascii?Q?1jXoft3+AtZOyQ3qdYDY/1HKvETHqeOJCfiTJ32TkHDIW4I2zsF40mbWnpWJ?= =?us-ascii?Q?iVUYGCQs0rW8M3Ap6VwqgSXHYkESt5dVJQfneD7ZnVcFiYSm9e+QNJPARkys?= =?us-ascii?Q?lJ4yJj9cspWzHsPZXfW2JCSCjybxzFlXH9RdZ+lenTJFthWKJ5sKOkOIL3Pv?= =?us-ascii?Q?jSffyP7InN/3hk6GTBcwLTVs0wnQqpcf1oLQ/QV+3feKot9BhS8wKI08h+Iv?= =?us-ascii?Q?cXip1kKrO/GKt18EtIFqukF27f13HjUXv7g5ErxOXNyJ2PA1Ou+9TmqrfRwv?= =?us-ascii?Q?MRrjIrVj7yHKoufpcQFtMy0SRGoNCusYPBOJ5e+frSiu16IpER9MZSoleoTL?= =?us-ascii?Q?0MUJDm4hyvDYmgGtbkdnVYBHPwO6PLf8fAsVcE9QrOATnrCLIS+LdKNIs8Ek?= =?us-ascii?Q?SLxF279NO8sOyZPXqrfMS8B9Zp1UuI7ov3WYmt0nkjea1babZvCmderlAt21?= =?us-ascii?Q?qlrLjUfNec+EH+PVh7kwRvIR8ULaIVCPaOyBnwQceavSQWHzUvNgoGbMydGA?= =?us-ascii?Q?/rkNmLoHxZDTTlYptzLH8Jb8VenynpmEP8YUe+GhThQuJ05M1vv+yIB8bCO6?= =?us-ascii?Q?ile3Ma5549k2sdHk2QjlPGgQ2FdUj3RzjO9XhY5qp8fzPmAjCS4GnUtM9kVI?= =?us-ascii?Q?Hehf4NlAVSC9OW/PVp1B/BM+3QdrzT4Z2goadWEhey4O67ALUrZlrAPUHaD6?= =?us-ascii?Q?AjUrln+4PvH0sUXx88pXqIwQbY7bhXeSLW4TXTtE322qjhq1z9Ry0QcKzR3L?= =?us-ascii?Q?IM675rQj9AF5HHMsfWXqPn5/i5jncpf2hs17OS8Rd/mYiu8eYFwiR/fuxyE1?= =?us-ascii?Q?qmMXXVvpEnnJXKV6cJyVuuVpK1um0fQjfSVnMpltSBWpWwJBnYBRLXjv/fHW?= =?us-ascii?Q?BusHbK17rhqOmecQZJkPCw3dVnUJ+HpLhFskVEKQ+tJZrxRCyNL7BLdx7kWb?= =?us-ascii?Q?fQ2VgyJyAnXWJDKCtHtybc2A8KoSilA/EYUnP9WwbEYJUM19+ystCVjrpzSl?= =?us-ascii?Q?G23WEk3ShfRGfKPoOoF8bSinXzBjQwXmrvIDadT6/6vDFwxRdluiNJHhfhAz?= =?us-ascii?Q?ETPRTy++dHnHogl2ZtXlqCauiDg5JaKxHzGEX7w7mo9G6tPCJCNLm46eOyT4?= =?us-ascii?Q?J3oIzLkK/se0T2sgrO8afNJ/CTldYJTyRQDMiTCiGG20zPmES1t9ubf8s4bI?= =?us-ascii?Q?Qh7kcoE8uxiPyk6uFvEnaLM4lufRm+hhb7JuO+MupFltzEW1MSb4SY53tXVJ?= =?us-ascii?Q?rrqjP/lQ+BuQ9/AybytEffc63jGDsuOCStGBTFjF79AiP2DXoKledro2DhDH?= =?us-ascii?Q?04MCjq4wH0qyoLMj2OFlGKjmavzimK8TpRHaRKnMP7KOcqEi+tL8k2PzRSPD?= =?us-ascii?Q?Eagw5AjO97rakcRrDecXyD6m4VlattWFlfzWAMSO/FWk53Z6taDlv9SbD01g?= =?us-ascii?Q?poRyO+ky3/w+clo2AW1bL1CAZqPH8/y2J7kd5vbTvj7sbRo74wDCrZGh3LB+?= =?us-ascii?Q?WxLyCUiDlCk6EoJ35R/SmvD+f4F6YsfiIKp6AYN+7kli0n8oqpqJtFFLboXw?= =?us-ascii?Q?MSappbzvhJcKitJKBa5VGpX4LgQ7hoA2TJy+xoYk9864yQPwZ1asCljrsNJD?= =?us-ascii?Q?IUlqiIHV8dHeH+NI9s3WDviQ6qvV06RjeNheLiHn9hmtEQBw?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 85b7c497-cb8b-4c24-1e07-08deb537558d X-MS-Exchange-CrossTenant-AuthSource: SN7PR12MB6839.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 23:43:59.7508 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NZz5uhwQOVsMX6YNoqhbS3WNkl3uGAmzBbsrf1ozXDBeoSvER8NcCxTJbtoq77RY X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPFCB5E1B8F5 X-purgate-ID: tlsNG-d62444/1779147846-AC457FF4-796B972A/0/0 X-purgate-type: clean X-purgate-size: 1187 The generic Xen strrchr() implementation returns a pointer to the string terminator when searching for '\0', matching the standard C semantics. The ARM64 assembly version stopped as soon as it loaded the terminator and returned the previous match pointer instead. This made strrchr("", '\0') return NULL. Compare the loaded byte against the requested character before deciding whether to stop at the terminator, so the terminator itself can be returned when it is the requested character. Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") Signed-off-by: Edgar E. Iglesias --- xen/arch/arm/arm64/lib/strrchr.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/arm64/lib/strrchr.S b/xen/arch/arm/arm64/lib/strrchr.S index 81033c0822..31f304b183 100644 --- a/xen/arch/arm/arm64/lib/strrchr.S +++ b/xen/arch/arm/arm64/lib/strrchr.S @@ -30,11 +30,10 @@ FUNC(strrchr) mov x3, #0 and w1, w1, #0xff 1: ldrb w2, [x0], #1 - cbz w2, 2f cmp w2, w1 - b.ne 1b + b.ne 2f sub x3, x0, #1 - b 1b -2: mov x0, x3 +2: cbnz w2, 1b + mov x0, x3 ret END(strrchr) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 18 23:44:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 18 May 2026 23:44:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312311.1582444 (Exim 4.92) (envelope-from ) id 1wP7d2-0005di-NV; Mon, 18 May 2026 23:44:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312311.1582444; Mon, 18 May 2026 23:44:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP7d2-0005db-KR; Mon, 18 May 2026 23:44:08 +0000 Received: by outflank-mailman (input) for mailman id 1312311; Mon, 18 May 2026 23:44:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP7d0-0005dP-AX for xen-devel@lists.xenproject.org; Mon, 18 May 2026 23:44:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP7cz-009rrh-J8 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 01:44:05 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ba42c-5cb7-0a2a0a5109dd-0a2a4501dea6-18 for ; Tue, 19 May 2026 01:44:05 +0200 Received: from [40.107.208.71] (helo=PH0PR06CU001.outbound.protection.outlook.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ba443-c1f2-0a2a45010019-286bd0477965-3 for ; Tue, 19 May 2026 01:44:04 +0200 Received: from SN7PR12MB6839.namprd12.prod.outlook.com (2603:10b6:806:265::21) by SJ5PPFCB5E1B8F5.namprd12.prod.outlook.com (2603:10b6:a0f:fc02::9a1) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9891.21; Mon, 18 May 2026 23:43:59 +0000 Received: from SN7PR12MB6839.namprd12.prod.outlook.com ([fe80::ae79:f50b:b7a6:4cd8]) by SN7PR12MB6839.namprd12.prod.outlook.com ([fe80::ae79:f50b:b7a6:4cd8%5]) with mapi id 15.21.0025.016; Mon, 18 May 2026 23:43:56 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=amd.com header.i="@amd.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=U+RUe5ElVWAARF0FaoJ1Ao/GhrwMQo4TJN5SYIHl5qD+tb9tedt8Y86nuoGTO+iVWrA1NghdV2qnIZNl0OhF7r30e8VuR+kqBlAWafwCYGuvHqDJunpsYHaYe0WMKX49nErwwPYGzVlgdlh2ovasyMICD0FzHVThx7wGt0qtGcsJqanTzEIK1ybG2vN9lduQggIZZ7JpxA8hhDx8GdlV506UCaZsNGC+b2lMb67Vxsuhr5OwYNlFYYS3YYVgRiTIysROQJ/L8LxSLlNlrc8YE8u+GQdMVpcyyQ3PlsYJiiXF7XdHAcRHwS0Ksp4HrJ1+CnJBR+FAd545t983I8NUIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=e6B15qfuEE6W4dJidFJsAPg+nOkXdcykrC9g9nGa02g=; b=EZUfZBocrPpaErQ8Ko2dxW8rwiTllLPHgV9Ap4E6ZIYPVmpXy40ukV+N5vp8j1yXliG+Sn0BGTVh3z0YI6/yfCk39ATzfk5AjfEBD/jTLE7ouhAzNkM2qHKRWXlnM5ESk+1mpZy8MfxyVaqYOYNyOxDbmvVDyJhlDX4iTSSjJf2eL4DX5bDyVvhVp92Bg0pSmYGofbez/p5AVfHtUrxjQnGGwCqSSdVejqKq5R3JQHRlbZjFdetRqWkErKykg28WTOtv/FlxDol+W8TS3euH8P27HPHrbITloZY6bo87Ajbj4xoZ1tcCZ5gkxuatlPH0ZSMg0f9TP47ydw3SzinN9g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=e6B15qfuEE6W4dJidFJsAPg+nOkXdcykrC9g9nGa02g=; b=s5Ug1JGf8+B1MLBeg9OBHEd3ngZ7AWjZor8fhmiDNzfkB27GPljVvRca4b7WbSDcRhE4sKCxgJNeUjxgCye/6fp8Va5zZHWeaYD9BeCSV60unqSb4f/gvAAYbfUy1AOLcGRHiAQpF6dQBG/9ZiRol1tLjbakRn1x+jX9lhl9Kdc= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; From: "Edgar E. Iglesias" To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com Subject: [PATCH v1 0/1] arm64: Fix strrchr() matching of null terminator Date: Tue, 19 May 2026 01:43:52 +0200 Message-ID: <20260518234353.453193-1-edgar.iglesias@amd.com> X-Mailer: git-send-email 2.43.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: CPCP307CA0012.DNKP307.PROD.OUTLOOK.COM (2603:10a6:380::13) To SN7PR12MB6839.namprd12.prod.outlook.com (2603:10b6:806:265::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR12MB6839:EE_|SJ5PPFCB5E1B8F5:EE_ X-MS-Office365-Filtering-Correlation-Id: e5265474-c593-4d77-b5d8-08deb53753b5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|366016|1800799024|18002099003|56012099003|3023799003|11063799003; X-Microsoft-Antispam-Message-Info: 4dTzfZZLzpF0J199sDyPz3X1kFcEeSBWbQdUytrXvrQC3zQxqpvxpYzLiZVTso67Gw66ePGWLOhc5tNF0u7F3jQbcF4B7NJl1iveGrEe3eIxIRtOHg04j8/URSS755EhzulOgPvumkQTaBO/xHArl1h5/hhS2OK/+izKqlF76FnhAT0CzO/v7TxR7fZFxcKVoyrDkfNJtk9e6fJcyWChKOb8mwz1HmE3PokjSHWX5O4e5rZiwiptUOLPlvCyWqmCJQ4Nmdvi0Fh7KBCTfcTYL683T7odLq6yed2SkBQsGaCkcir8W7FpwOdXUIFNwNWFdyjkqyp3Jw5FtZcz63Iueb6XPCxuzD6U7DA+69TQI2zK0/kE2vc9+wKn0rJx+lOB/3QYgzMpNrnHI5/CtQF7hoWU5qR/5B/Mk8BLQp6y+o0+VSnmxF5E92AZyVAmJhjl6aXu7Jbjqq1vjPK5y7gXSEFtQfytuXeZVXJmmV84HshTjKtUjlqrbUfY8ivpj2n2ZhrZUCZhkf567QHgd/rR9ULToQMITXndflQOLEk5uwHiv1OcbrYHgUCDyoornaK3MKODEoEVO4pVhTKZAAfD18VcjbOspKtChyNJDhHLjkFuun9d0oSyF99uZQRVnCRKzUuaOv0LKnTMWYmmtEbe4jQQURG9ZY3GM7gne6rTaroli0UyTX/0W2VvzujqMuGk X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:SN7PR12MB6839.namprd12.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(366016)(1800799024)(18002099003)(56012099003)(3023799003)(11063799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?mzKWru31fXblGvVUWCM1G2eqcA8ApK/NBTumM9BDlyPukplYX6dGU6oVElfO?= =?us-ascii?Q?8L5LiFypVwSSrWpDUdHxdAJjeai/CTxoIsGx1OaGafD2sfQbrD2Pu3lXJEfh?= =?us-ascii?Q?n0x4UUZx8b/R3gk/WPY9Kg7LTK2Pd0xNG/w+jjzY/kSrFYy78VVW2TgpvP01?= =?us-ascii?Q?qflNThwnViV03vXeqqZzEdTwfxMl7N5ZUoPN2+vFR0JoKORm41StrNssFLTT?= =?us-ascii?Q?R0dIWF6IJrxac/mTHtjLzCqUMHt76gGfjvpXNflXCVWtN508GvVEkHn319w9?= =?us-ascii?Q?iCPtBjLOQZ7iVywSApKWB+sdYDRg/EUmxJ0IitXQ/NOECByD9KYcRfMRQz1L?= =?us-ascii?Q?lhce/4Pz87UND+brPySBQZYUSQD7LUWloLIzRl5/14ggtEW0zCZolH3banGW?= =?us-ascii?Q?fGHjgjvO60OV2wNE3Cv+wAhEmzbI3kLs7QqqFrYWcyZdmBVfFM85puoaEVSn?= =?us-ascii?Q?U3sqdBWigPLWzMcFwEyK2m7nc7BdDmwoF1gUasr/MXnSX5XkeemCcsR8ngAR?= =?us-ascii?Q?PDsL1njPhL8DQ2H5keruNNO6p1FFyQPQCsX8QVG50O/hJ1oU4WYIgFwdHlvq?= =?us-ascii?Q?R4qSXUX12nyoNaVcZQZDvyuevizpEcIOAPVKWNwMhRZAbzuaOms5EN5oYbc2?= =?us-ascii?Q?/297LNdXrt8O4McbLhFwOFl1BvT4zDPpRA5xEWjcr0EoxSTILlfC7MkQw+sH?= =?us-ascii?Q?fHaxa3d/oo7cOH4CpUTAywTfKzqKK96O0LTZFuczFh5e28oeThsYkKTKiFe5?= =?us-ascii?Q?Rl8xJUbKktD1+AsYhkCWWFZILtm9cfQF6zb0v7j2qnuIbChoZJUWLteOcBTC?= =?us-ascii?Q?2Pw+AKYdkNZK5SMVZXjaRLBTvGpaj8jAGZ+kmY2nF4+ZLIogvbWCl1T6HE5U?= =?us-ascii?Q?rMbURjbMeY1zePObiTFezOCTOg7k6Mn7rVplL1mrlsqapyfdC0JHzGpq/wS2?= =?us-ascii?Q?xwX+4FnzR/QwPmU5F2KOQkDXzJZr6/lj7ano1cIiOtSlyycC/VBMQiVohxto?= =?us-ascii?Q?7jAGbsMNMMT860ail0r/Re1quhEHAtoAtjveYE+b3SdgaGQtkP2NPEnn1ElY?= =?us-ascii?Q?MWzqLfXrrqDS4jD2/0FCkXbNskcIZMDVUvA7upxDGJib3BZQ89tGRRGSIaJ+?= =?us-ascii?Q?xNdQPzqcFQePeCSKSlw5ceephimYMVAFfUSKx7ZRTG/6qKKUfTqDzeT7sVG5?= =?us-ascii?Q?LxjnuzpkZczhzZc58RFI8PTwk6HE2mrCa4cZe3GI3ayL32uupS1phI2rLAtM?= =?us-ascii?Q?EFaJ5roSaP6evx6K++sBkbDigtdhYtrJdmdXNB5jmgSV0kSI+zC2F8WzOOHM?= =?us-ascii?Q?MU1nOyIRwcRoS4yZN5ylRpiDVTS9eI3+z/3Od8wwLQfc2E5G+v0q1Ik32Ugr?= =?us-ascii?Q?OnUsDqh+1+9nkl3k/DMc19SxTHg2LZk1jPM6yh5XLgX02Bj3ZSxbayQZB/QW?= =?us-ascii?Q?ZL5XAi3imNQpB9pPmYgjvCP41v7ttDSPiOJqSQsxZvqMOnByS5u/H0FTMDTA?= =?us-ascii?Q?psz0YzbhSDnNOiXZxtRKEkDZM/XRYzXTertX24ko3TkTrXwzWbdUeOKe6zwg?= =?us-ascii?Q?4WuILkmwR7kbpjoKVwWAz376TxIn5KnO3oyZ/6JSOUeDk/96JSvSZJIoZSn7?= =?us-ascii?Q?Mm+Z499YagJJ2ExZ1DJL+86NDGsONW+dEvjkmXibDn1O+7tB0Hv2gYkbmg4H?= =?us-ascii?Q?eqW5HkmSRX5RO0rEvDV5CytYXr6u8JkPtKRDua4e94y7c8xu?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: e5265474-c593-4d77-b5d8-08deb53753b5 X-MS-Exchange-CrossTenant-AuthSource: SN7PR12MB6839.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 May 2026 23:43:56.6285 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: GNIN2ZjpC0y653CDOf9dtJ42F0bl0g3ziGEph7hWgRZpbIAJT8xj58eYiusTX3sE X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ5PPFCB5E1B8F5 X-purgate-ID: tlsNG-d62444/1779147845-B4F48FF4-878D859E/0/0 X-purgate-type: clean X-purgate-size: 384 Found a problem with strrchr("", '\0') returning NULL when searching for the terminating null byte. This fixes it. Found while GDB-fuzzing xen/lib helpers under QEMU. Cheers, Edgar Edgar E. Iglesias (1): arm64: Fix strrchr() matching of null terminator xen/arch/arm/arm64/lib/strrchr.S | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 00:23:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 00:23:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312330.1582463 (Exim 4.92) (envelope-from ) id 1wP8Em-0003zr-Pk; Tue, 19 May 2026 00:23:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312330.1582463; Tue, 19 May 2026 00:23:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP8Em-0003zk-LD; Tue, 19 May 2026 00:23:08 +0000 Received: by outflank-mailman (input) for mailman id 1312330; Tue, 19 May 2026 00:23:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP8Ek-0003ze-UP for xen-devel@lists.xenproject.org; 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH] x86/irq: Return -EEXIST from map_domain_pirq() Date: Mon, 18 May 2026 20:15:59 -0400 Message-ID: <20260519001559.28129-1-jason.andryuk@amd.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001D1:EE_|DS7PR12MB8232:EE_ X-MS-Office365-Filtering-Correlation-Id: b8ca9e19-53ba-46f9-8785-08deb53cc81e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|1800799024|56012099003|11063799003|18002099003; X-Microsoft-Antispam-Message-Info: hQW8wzDyLnsXIsE2+Q3H6kC/wMp+4BvRzXYzpqTHr1R5Z9EDgw8MRPF1uBmECxAvhaydBpxzvACFVle8Qq8Beu1lJCXtH8BLMHcqqhFzi3Yxszes4fVp/JoFJVP7S26yW2pfger5hI6TTNBEREe8nkvxTHjbaKDSh64dShmenMLO22LvpGB5CUSueshD4oqo/NAStf/3eXfYbCh8HLYzoYy8lZdMHrKijfMYu1+of5c8a9Pxey5v6TnB9r4GD0vmNpjqH2wXNgKoPxxWWYLyBfhlEkgvIOXVUzjiRmzxPpQ4brV4i0ubactK3tpPyI8Aa0wKwTrf5OeSiRf/H4KkqmLOPD5QzJUnLi8/t9seLZlk5U/sQI3N096np8eamCn1S6IpTMsSoq8m+/EAhtuBqtLzEAvKYlScVy0WZA+5DBY/03RX4E8UEQSTZjdPRwGWGMMNdNBPdH4X6exnpjh20dmOSuSvOP4TkMCnwsE635gatdu5RXtA8Fnl3lYJFA3LaNZO1Q06rXKD8oMQOrG9j8n80Hlf0DAOxiowM4COJs8Z+cjSaK3UX/m9utbAaQWbaT7a1LYsDhmxC4nL1J4gu6pNaUtCIlFD9J8V4gS8ehjGSlq0tmo9vAXEPSehp5FqNkMXIopQR0TGkJIVD0Raf1dpNGfbAnODbbjRKmc+7aRr43sr9PFxp7YSxXq3IwmVFDY/2CmWOSi1CUAQkI5szsKK+pRtlXUqOqK/qFruAEM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(1800799024)(56012099003)(11063799003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: BnonSPGH5efWJWj0U/LsDp8cAkQ7J+DDzz0XAAgpB6BzW3UqmNjJnrw3hJnOC3N9Em36nbc79HvG/NeEnU+wk8u5p/EU77r390O0w7rob+zkFMjkA8MmcI+Cn03uHJSvecyfhSDcuVEUBw4DP6jV08yj4Cv0dv7LIqKFGDW4b5OgDITGI+/O/mTUlY5u6tYTe1uHV4XYGK5bA7GwoVzpts9xFfCREWfNzYKg14Mt2g9wGdVNKtgxyy/9CWdBWFhFLY5strbMRrcINzP0stC0ukW/GD2bVq72LHbvgJ33dlNAahSyav9dhGLZyciJnWjjyJA/+B2V7ZyD79rriefaLWdZCv6AN8+bYqECCFRS+7oIMjBeDfknivs9d7YBYW0T3JGIENbO20xNEZ+YxKMK37vEo5jGIEhAQ8Rl9pHxdwQV5Fq7aFqzoKoZWbnTp6lz X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 00:22:59.2194 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b8ca9e19-53ba-46f9-8785-08deb53cc81e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001D1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB8232 X-purgate-ID: tlsNG-4011c0/1779150185-709668B7-F7AC5490/0/0 X-purgate-type: clean X-purgate-size: 2041 commit bfc341a65cfb ("x86: Make the hypercall PHYSDEVOP_alloc_irq_vector hypercall dummy.") modified map_domain_pirq() to return 0 when an irq or pirq is already mapped, when it previously returned -EINVAL. This occured when moving map_domain_pirq()'s call from PHYSDEVOP_alloc_irq_vector into PHYSDEVOP_apic_write. However, this means other callers cannot detect when a pirq or irq is already mapped. Since success is returned but the pirq is not connected, it will never fire. Modify map_domain_pirq() to return -EEXIST. -EINVAL is already returned elsewhere in map_domain_pirq(), so -EEXIST allows identifying this case. With that, squash -EEXIST in ioapic_guest_write() so the behavior does not change. Signed-off-by: Jason Andryuk --- I'm not sure whether or not this warrants a Fixes. Nothing in tree today is broken, so I did not add one. xen/arch/x86/io_apic.c | 2 ++ xen/arch/x86/irq.c | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index 46c2a43dac..2b928fc236 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -2315,6 +2315,8 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val) ret = map_domain_pirq(hardware_domain, pirq, irq, MAP_PIRQ_TYPE_GSI, NULL); write_unlock(&hardware_domain->event_lock); + if ( ret == -EEXIST ) + ret = 0; if ( ret < 0 ) return ret; } diff --git a/xen/arch/x86/irq.c b/xen/arch/x86/irq.c index 739fc04bd1..938cca6203 100644 --- a/xen/arch/x86/irq.c +++ b/xen/arch/x86/irq.c @@ -2210,7 +2210,7 @@ int map_domain_pirq( dprintk(XENLOG_G_WARNING, "dom%d: pirq %d or irq %d already mapped (%d,%d)\n", d->domain_id, pirq, irq, old_pirq, old_irq); - return 0; + return -EEXIST; } ret = xsm_map_domain_irq(XSM_HOOK, d, irq, data); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 00:39:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 00:39:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312339.1582470 (Exim 4.92) (envelope-from ) id 1wP8Um-000611-0a; Tue, 19 May 2026 00:39:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312339.1582470; Tue, 19 May 2026 00:39:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP8Ul-00060u-U5; Tue, 19 May 2026 00:39:39 +0000 Received: by outflank-mailman (input) for mailman id 1312339; Tue, 19 May 2026 00:39:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP8Ul-00060V-C1 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 00:39:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wP8Uk-004kWS-9J for xen-devel@lists.xenproject.org; Tue, 19 May 2026 02:39:38 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0bb12d-5cb7-0a2a0a5109dd-0a2a450ae87c-8 for ; Tue, 19 May 2026 02:39:38 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0bb149-56b3-0a2a450a0019-ac6904fec070-3 for ; Tue, 19 May 2026 02:39:38 +0200 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id A57B8600CB; Tue, 19 May 2026 00:39:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 14AB4C2BCB7; Tue, 19 May 2026 00:39:36 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20201202 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1779151176; bh=OgTVBZMDJzowQNma/1uscbb5FY7vAb8YvSLafcgHqkE=; h=Date:From:To:cc:Subject:In-Reply-To:References:From; b=pMXVcplrrsYyMTuGrEOJOUDbcFsL7uHltYlFEKlrnec3Eaprvahp5yH2laM/3YJyp 3NLSakpi9drNa2z6Ouz4a0WsYCW0tAZDt9czUPs5Vmh31uWXwAoMSafxJUs4A1brL/ o2mqbg2snuer73tpImp32Y6DO8IRiaT2EXR8Diky48rxvdMj99KVH52C8xSmYuzvh7 UVHOl6xb3V1uA2waMw0S+TQvB+0b0kwdLJ/Jg0cUQHY+VoRghj884YoFLQI9SJet16 UwujxuF1o4DazoTwU7pXjXd/INZP18sTtywBHBIhAQ/z3SEqI5+A029sG0t9bHH4Pe KKinQFiD7OSPQ== Date: Mon, 18 May 2026 17:39:32 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: "Edgar E. Iglesias" cc: xen-devel@lists.xenproject.org, sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com, oleksii.kurochko@gmail.com Subject: Re: [PATCH v1 1/1] xen/arm: gic-v3: Fix wake-up loop in gicv3_enable_redist In-Reply-To: <20260518224652.422864-2-edgar.iglesias@gmail.com> Message-ID: References: <20260518224652.422864-1-edgar.iglesias@gmail.com> <20260518224652.422864-2-edgar.iglesias@gmail.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-4011c0/1779151178-7CA798B7-373C4B9A/0/0 X-purgate-type: clean X-purgate-size: 1018 On Tue, 19 May 2026, Edgar E. Iglesias wrote: > From: "Edgar E. Iglesias" > > timeout starts as false and is only set on the timeout break, so the > loop always exits after one iteration and a stuck redistributor is > silently treated as woken. Use while ( 1 ) to match the sibling > gicv3_do_wait_for_rwp(). > > Fixes: bc183a0235 ("xen/arm: Add support for GIC v3") > Signed-off-by: Edgar E. Iglesias Reviewed-by: Stefano Stabellini > --- > xen/arch/arm/gic-v3.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > index 7f365cdbe9..f03217282e 100644 > --- a/xen/arch/arm/gic-v3.c > +++ b/xen/arch/arm/gic-v3.c > @@ -828,7 +828,7 @@ static int gicv3_enable_redist(void) > } > cpu_relax(); > udelay(1); > - } while ( timeout ); > + } while ( 1 ); > > if ( timeout ) > { > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Tue May 19 00:58:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 00:58:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312345.1582480 (Exim 4.92) (envelope-from ) id 1wP8mw-0000YK-FQ; Tue, 19 May 2026 00:58:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312345.1582480; Tue, 19 May 2026 00:58:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wP8mw-0000YD-Bm; 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tlsNG-bad1c0/1779152300-40B60A53-813BB41D/0/0 X-purgate-type: clean X-purgate-size: 11000 On 2026-05-18 1:48 AM, David Woodhouse wrote: > On Mon, 2026-05-18 at 00:52 -0700, Dongli Zhang wrote: >> On 5/9/26 3:46 PM, David Woodhouse wrote: > > Huh, I didn't write that then; it isn't September yet. Did you mean > 2026-05-09? We aren't all in the US... > > Strictly speaking, you just misattributed a quote of mine, which is > very poor form :) > > What mailer are you using? Can it be fixed? Thunderbird. I have fixed the Thunderbird configuration. Does it look better to you? > >>> From: Jack Allister >>> >>> Where kvm->arch.use_master_clock is false (because the host TSC is >>> unreliable, or the guest TSCs are configured strangely), the KVM clock >>> is *not* defined as a function of the guest TSC so KVM_GET_CLOCK_GUEST >>> returns an error. In this case, as documented, userspace shall use the >>> legacy KVM_GET_CLOCK ioctl. The loss of precision is acceptable in this >> >> The description here confused me a little. It sounds like userspace should call >> KVM_SET_CLOCK if KVM_SET_CLOCK_GUEST fails. However, I assume it actually means >> that userspace should do nothing extra if KVM_SET_CLOCK_GUEST fails, and simply >> rely on the prior KVM_SET_CLOCK and KVM_VCPU_TSC_OFFSET workflow described in >> patch 07. Is that correct? > > Yes. If KVM_SET_CLOCK_GUEST doesn't work (which might be because > KVM_GET_CLOCK_GUEST didn't work so userspace doesn't have the data in > the first place, or because the actual ioctl returns failure), then > userspace should rely on the old method using KVM_SET_CLOCK imprecisely > instead. That includes on a migration from an older kernel that *lacks* > KVM_GET_CLOCK_GUEST, of course. > > I don't think it strictly matters whether userspace does KVM_SET_CLOCK > first, then *tries* KVM_SET_CLOCK_GUEST, or whether it tries > KVM_SET_CLOCK_GUEST and then only calls KVM_SET_CLOCK on failure? I'd > probably be inclined not to use KVM_SET_CLOCK at all unless it is known > to be needed? I really appreciate guidelines like the ones below. https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org Assuming I am a user of the new API, I feel confused about whether the goal is to replace KVM_SET_CLOCK with KVM_SET_CLOCK_GUEST, or whether the latter is meant to supplement the former. If we are going to use KVM_SET_CLOCK_GUEST when KVM_SET_CLOCK is not needed, I would appreciate it if the API could carry more data in addition to struct pvclock_vcpu_time_info. +#define KVM_SET_CLOCK_GUEST _IOW(KVMIO, 0xd6, struct pvclock_vcpu_time_info) +#define KVM_GET_CLOCK_GUEST _IOR(KVMIO, 0xd7, struct pvclock_vcpu_time_info) In the future, if we need to carry additional data, we could simply reuse the padding fields instead of introducing another KVM_SET_CLOCK_GUEST2. The following is an example of how additional data could be carried. KVM: x86: Report host tsc and realtime values in KVM_GET_CLOCK https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=c68dc1b577eabd5605c6c7c08f3e07ae18d30d5d So far, I believe this guideline resolves most of my concerns. https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org > >>> +4.145 KVM_GET_CLOCK_GUEST >>> +---------------------------- >>> + >>> +:Capability: none >>> +:Architectures: x86_64 >>> +:Type: vcpu ioctl >>> +:Parameters: struct pvclock_vcpu_time_info (out) >>> +:Returns: 0 on success, <0 on error >>> + >>> +Retrieves the current time information structure used for KVM/PV clocks, >>> +in precisely the form advertised to the guest vCPU, which gives parameters >>> +for a direct conversion from a guest TSC value to nanoseconds. >>> + >>> +When the KVM clock is not in "master clock" mode, for example because the >>> +host TSC is unreliable or the guest TSCs are oddly configured, the KVM clock >>> +is actually defined by the host CLOCK_MONOTONIC_RAW instead of the guest TSC. >>> +In this case, the KVM_GET_CLOCK_GUEST ioctl returns -EINVAL. >>> + >>> +4.146 KVM_SET_CLOCK_GUEST >>> +---------------------------- >>> + >>> +:Capability: none >> >> Do we need a KVM_CHECK_EXTENSION capability for this? If userspace wants to >> support the new API, should it detect availability via KVM_CHECK_EXTENSION, or >> simply try the ioctl and handle failure? > > That might be conventional, I suppose. But I suspect Jack's thinking > was that userspace is going to have to *try* it anyway, and still might > have to fall back to what KVM_SET_CLOCK can manage, so userspace > probably wouldn't even bother to check that capability; it doesn't > matter. > > Since then, we've added some more attributes in this series though, and > it probably is worth adding a cap which advertises them *all*? > Something like KVM_CAP_CLOCK_PRECISION_API? >From an API user's perspective, userspace may need to distinguish between an API failure and the API not being available. I don't see any existing "Capability: none" entries in Documentation/virt/kvm/api.rst. > >>> +#ifdef CONFIG_X86_64 >>> +static int kvm_vcpu_ioctl_get_clock_guest(struct kvm_vcpu *v, void __user *argp) >>> +{ >>> + struct pvclock_vcpu_time_info hv_clock = {}; >>> + struct kvm_vcpu_arch *vcpu = &v->arch; >>> + struct kvm_arch *ka = &v->kvm->arch; >>> + unsigned int seq; >>> + >>> + /* >>> + * If KVM_REQ_CLOCK_UPDATE is already pending, or if the pvclock >>> + * has never been generated at all, call kvm_guest_time_update(). >>> + */ >>> + if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, v) || !vcpu->hw_tsc_hz) { >> >> This was flagged by AI, and I am still checking whether it is a real issue. >> >> What happens if KVM_REQ_MASTERCLOCK_UPDATE and KVM_REQ_CLOCK_UPDATE are both >> pending? >> >> From my perspective, I am also curious how we should reason about this in other >> scenarios in the future. Specifically, when do we need to process >> KVM_REQ_MASTERCLOCK_UPDATE before KVM_REQ_CLOCK_UPDATE, and when is it >> acceptable not to? I noticed that kvm_cpuid() already processes only >> KVM_REQ_CLOCK_UPDATE. > > The way I've been thinking about it — and I'm only two cups of coffee > into Monday so take those words literally and don't think of them as > British understatement of something I believe is absolute truth — is > that MASTERCLOCK_UPDATE is updating the actual clock for the whole VM, > while CLOCK_UPDATE is about *putting* that information into the per- > vCPU pvclock structures. > > So after a MASTERCLOCK_UPDATE, we need to do a CLOCK_UPDATE on all > vCPUs to disseminate the result. Which means that if CLOCK_UPDATE is > already pending before a MASTERCLOCK_UPDATE, it's probably redundant > and might as well be cleared because it's only going to get set *again* > in kvm_end_pvclock_update()? Another scenario is when only MASTERCLOCK_UPDATE is pending and there is no pending CLOCK_UPDATE. In this scenario, is it fine to skip processing MASTERCLOCK_UPDATE before saving pvclock_vcpu_time_info? This should be a very rare scenario. Although it is not mandatory, I think most users call these APIs only when the VM is already stopped. I am just curious how I should handle this in the future if I am implementing similar code, that is, processing a pending request outside vcpu_enter_guest(). > > >>> + /* >>> + * Calculate the guest TSC at the new reference point, and the >>> + * corresponding KVM clock value according to user_hv_clock. >>> + * Adjust kvmclock_offset so both definitions agree. >>> + */ >>> + guest_tsc = kvm_read_l1_tsc(v, ka->master_cycle_now); >>> + user_clk_ns = __pvclock_read_cycles(&user_hv_clock, guest_tsc); >>> + ka->kvmclock_offset = user_clk_ns - ka->master_kernel_ns; >> >> I used to explore adjusting ka->kvmclock_offset in KVM_SET_CLOCK based on the >> old hv_clock and the new hv_clock long time ago. At that time, my concern was >> what would happen if userspace provided bogus values. Theoretically, this is >> possible with any ioctl. My concern may be unnecessary. >> >> Would it be helpful to validate that the delta is within a reasonable range, >> e.g. that the drift can never be more than five minutes (forward or backward)? > > Setting confidential guests aside, which have their own way of trusting > the TSC and should never even *consider* using kvmclock, surely this is > supposed to be *entirely* under the control of the VMM? The kernel has > no business deciding what is 'bogus'? Yes, I both think and agree that this is supposed to be entirely under the control of the VMM. Sometimes security researchers use fuzzing tools to interact with APIs in an attempt to leak data or crash the hypervisor in order to turn it into a CVE. My understanding is that, in the worst-case scenario here, the guest clock would simply get stuck. > > If a guest has been running for months on a previous host and is > migrated to a new host, don't we expect that the KVM clock of the new > VM on the new host is tweaked from its default near-zero after > creation, to some large amount? > Regarding live migration, my own investigation does not show a proportional relationship between VM uptime and the amount of drift. Just taking QEMU + KVM as an example: suppose TSC scaling is inactive, the amount of drift does not depend on how long the VM has been running before live migration. Instead, it depends on the delta between when we call MSR_IA32_TSC and KVM_GET_CLOCK, and between MSR_IA32_TSC and KVM_SET_CLOCK. The guest TSC stops at P1 and resumes at P3. The kvmclock stops at P2 and resumes at P4. We expect P1 == P2 and P3 == P4. On source host. - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=0 ===> P1 - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=1 - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=2 - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3 - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=4 ... ... - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=N - KVM_GET_CLOCK ===> P2 On target host. - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=1 ===> P3 - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=2 - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3 - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=4 - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=5 ... ... - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=N - KVM_SET_CLOCK ====> P4 Here is my equiation to predict the drift. T1_ns = P2 - P1 (nanoseconds) T2_tsc = P4 - P3 (cycles) T2_ns = pvclock_scale_delta(T2_tsc, old_hv_clock_src.tsc_to_system_mul, old_hv_clock_src.tsc_shift) if (T2_ns > T1_ns) backward drift: T2_ns - T1_ns else if (T1_ns > T2_ns) forward drift: T1_ns - T2_ns Theoretically, if P1 == P2 and P3 == P4, we won't encounter any kvm-clock drift. Thank you very much! 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Mon, 18 May 2026 22:01:38 -0700 (PDT) MIME-Version: 1.0 References: <20260518224652.422864-1-edgar.iglesias@gmail.com> <20260518224652.422864-2-edgar.iglesias@gmail.com> In-Reply-To: From: Mykola Kvach Date: Tue, 19 May 2026 08:01:27 +0300 X-Gm-Features: AVHnY4LRTH3a7URg3wiw53yOPEIfh1D9K5AvWikCQZvFc3s-s-o2DeunEzVJnMc Message-ID: Subject: Re: [PATCH v1 1/1] xen/arm: gic-v3: Fix wake-up loop in gicv3_enable_redist To: Stefano Stabellini , Luca Fancellu Cc: "Edgar E. Iglesias" , xen-devel@lists.xenproject.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, edgar.iglesias@amd.com, oleksii.kurochko@gmail.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1779166899-8B193A53-1F950A3F/0/0 X-purgate-type: clean X-purgate-size: 1347 Hi all, I think this issue is already covered by Luca's patch, currently under review: xen/arm: gic-v3: Fix redistributor wakeup polling Best regards, Mykola On Tue, May 19, 2026 at 3:47=E2=80=AFAM Stefano Stabellini wrote: > > On Tue, 19 May 2026, Edgar E. Iglesias wrote: > > From: "Edgar E. Iglesias" > > > > timeout starts as false and is only set on the timeout break, so the > > loop always exits after one iteration and a stuck redistributor is > > silently treated as woken. Use while ( 1 ) to match the sibling > > gicv3_do_wait_for_rwp(). > > > > Fixes: bc183a0235 ("xen/arm: Add support for GIC v3") > > Signed-off-by: Edgar E. Iglesias > > Reviewed-by: Stefano Stabellini > > > > --- > > xen/arch/arm/gic-v3.c | 2 +- > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c > > index 7f365cdbe9..f03217282e 100644 > > --- a/xen/arch/arm/gic-v3.c > > +++ b/xen/arch/arm/gic-v3.c > > @@ -828,7 +828,7 @@ static int gicv3_enable_redist(void) > > } > > cpu_relax(); > > udelay(1); > > - } while ( timeout ); > > + } while ( 1 ); > > > > if ( timeout ) > > { > > -- > > 2.43.0 > > > From xen-devel-bounces@lists.xenproject.org Tue May 19 06:02:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 06:02:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312399.1582497 (Exim 4.92) (envelope-from ) id 1wPDX5-0006cz-Us; Tue, 19 May 2026 06:02:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312399.1582497; Tue, 19 May 2026 06:02:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPDX5-0006cr-Ru; Tue, 19 May 2026 06:02:23 +0000 Received: by outflank-mailman (input) for mailman id 1312399; Tue, 19 May 2026 06:02:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPDX4-0006cl-0g for xen-devel@lists.xenproject.org; Tue, 19 May 2026 06:02:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPDX1-00Bx6e-VH for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:02:20 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0bfceb-bab6-0a2a0a5309dd-0a2a450adbc6-6 for ; Tue, 19 May 2026 08:02:19 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0bfceb-56b3-0a2a450a0019-d1558033bdc2-3 for ; Tue, 19 May 2026 08:02:19 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488b0046078so27696835e9.1 for ; Mon, 18 May 2026 23:02:19 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <7ac53569-acca-44f7-a129-99b5dcb97500@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779170539-7CE7B8B7-51AB3EEE/0/0 X-purgate-type: clean X-purgate-size: 4300 On 18.05.2026 19:35, Andrew Cooper wrote: > On 18/05/2026 4:21 pm, Teddy Astie wrote: >> --- a/xen/arch/x86/x86_64/mmconfig_64.c >> +++ b/xen/arch/x86/x86_64/mmconfig_64.c >> @@ -133,6 +46,25 @@ static void __iomem *mcfg_ioremap(const struct acpi_mcfg_allocation *cfg, >> return (void __iomem *) virt; >> } >> >> +char __iomem *pci_mmcfg_base(unsigned int seg, unsigned int *bus) >> +{ >> + struct acpi_mcfg_allocation *cfg; >> + int cfg_num; >> + >> + for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { >> + cfg = pci_mmcfg_virt[cfg_num].cfg; >> + if (cfg->pci_segment == seg && >> + (cfg->start_bus_number <= *bus) && >> + (cfg->end_bus_number >= *bus)) { >> + *bus -= cfg->start_bus_number; >> + return pci_mmcfg_virt[cfg_num].virt; >> + } >> + } >> + >> + /* Fall back to type 0 */ >> + return NULL; >> +} > > This is a horrid function.  Accessing and modifying bus like that causes > poor code generation, and by now having this in a separate translation > unit, the optimiser can't fold it into it's single caller and undo the > poor decisions which went into writing this function. > > Instead, you want: > > void __iomem *pci_mmcfg_base(pci_sbdf_t sbdf) > { >     ... > } > > base which takes care of the bus adjustment internally. If the updated bus number need passing back to the caller, what do you mean by this? With two values to pass back, and without resorting to returning a larger struct by value, one pointer parameter is going to be needed, isn't it? >> diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c >> index 8d33429103..c37e3edade 100644 >> --- a/xen/arch/x86/x86_64/pci.c >> +++ b/xen/arch/x86/x86_64/pci.c >> @@ -11,13 +11,123 @@ >> #define PCI_CONF_ADDRESS(sbdf, reg) \ >> (0x80000000U | ((sbdf).bdf << 8) | ((reg) & ~3)) >> >> +/* >> + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space >> + * on their northbrige except through the * %eax register. As such, you MUST >> + * NOT use normal IOMEM accesses, you need to only use the magic mmio-config >> + * accessor functions. >> + * In fact just use pci_config_*, nothing else please. > > I know you're just copying an existing comment, but it's mostly an > opinion and not terribly helpful in place. > > "AMD Fam10h CPUs can only make MMCFG accesses via MOV %eax/%ax/%al", > would be better, except... > > ... this claim cannot be true.  It's been made since the K8 RevF BKWG > and exists even into the latest PPRs, but that's simply not how > load/store ops work in the pipeline. How do you know what special casing there exists (or has existed), or what (e.g.) bogus(?) SMM intercepts there may be? I'm pretty sure the Linux change was in response to things indeed not working otherwise. >> +static inline >> +int pci_mmcfg_read(pci_sbdf_t sbdf, unsigned int reg, unsigned int len, u32 *value) >> +{ >> + char __iomem *addr; >> + >> + /* Why do we have this when nobody checks it. How about a BUG()!? -AK */ >> + if (unlikely(reg > 4095)) { >> +err: *value = -1; Nit: Style. Yet as the comment suggests: Perhaps time to drop or replace by ASSERT() / BUG_ON()? >> + return -EINVAL; >> + } >> + >> + addr = pci_dev_base(sbdf.seg, sbdf.bus, sbdf.devfn); >> + if (!addr) >> + goto err; >> + >> + switch (len) { >> + case 1: >> + *value = mmio_config_readb(addr + reg); >> + break; >> + case 2: >> + *value = mmio_config_readw(addr + reg); >> + break; >> + case 4: >> + *value = mmio_config_readl(addr + reg); >> + break; >> + } >> + >> + return 0; >> +} > > Again, for this patch or a later cleanup, drop the output-by-pointer and > return value directly.  The optimiser is hopefully doing this already > but it also makes the function simpler. > > At best, we want ASSERT_UNREACHBLE()'s in the error paths (including no > mapping), and to consistently return -1.  Returning 0 for a bad length > is bogus. This looks to contradict the earlier paragraph: Do you want to return the value, or do you want to return a success indicator? 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Iglesias" Cc: sstabellini@kernel.org, julien@xen.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, xen-devel@lists.xenproject.org References: <20260518234353.453193-1-edgar.iglesias@amd.com> <20260518234353.453193-2-edgar.iglesias@amd.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260518234353.453193-2-edgar.iglesias@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779172856-21165C48-D50F316C/0/0 X-purgate-type: clean X-purgate-size: 1693 On 19.05.2026 01:43, Edgar E. Iglesias wrote: > The generic Xen strrchr() implementation returns a pointer to the string > terminator when searching for '\0', matching the standard C semantics. > > The ARM64 assembly version stopped as soon as it loaded the terminator and > returned the previous match pointer instead. This made strrchr("", '\0') > return NULL. I wonder though: Why would one pass '\0' to strrchr()? If you want to find the end of a string, more efficient (at least in the general case) options exist (strchr(), memchr(), strlen()). > Compare the loaded byte against the requested character before deciding > whether to stop at the terminator, so the terminator itself can be returned > when it is the requested character. Nit: "..., so a pointer to the terminator ...". > Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") > Signed-off-by: Edgar E. Iglesias Reviewed-by: Jan Beulich However, the function having come from Linux, imo the patch wants to go to Linux (ideally first, but at the very least also). Additionally, looking at strchr() - couldn't the code here be written in a similar way, allowing to get away with just a single branch? (Arm32's pair of functions is also pretty similar in this regard.) Jan > --- a/xen/arch/arm/arm64/lib/strrchr.S > +++ b/xen/arch/arm/arm64/lib/strrchr.S > @@ -30,11 +30,10 @@ FUNC(strrchr) > mov x3, #0 > and w1, w1, #0xff > 1: ldrb w2, [x0], #1 > - cbz w2, 2f > cmp w2, w1 > - b.ne 1b > + b.ne 2f > sub x3, x0, #1 > - b 1b > -2: mov x0, x3 > +2: cbnz w2, 1b > + mov x0, x3 > ret > END(strrchr) From xen-devel-bounces@lists.xenproject.org Tue May 19 06:54:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 06:54:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312426.1582515 (Exim 4.92) (envelope-from ) id 1wPELX-0005Mb-QJ; Tue, 19 May 2026 06:54:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312426.1582515; Tue, 19 May 2026 06:54:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPELX-0005MU-Nl; Tue, 19 May 2026 06:54:31 +0000 Received: by outflank-mailman (input) for mailman id 1312426; Tue, 19 May 2026 06:54:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPELW-0005MO-Sf for xen-devel@lists.xenproject.org; Tue, 19 May 2026 06:54:30 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPELW-002sa1-8g for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:54:30 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c0910-2eae-0a2a0a5409dd-0a2a45078e26-18 for ; Tue, 19 May 2026 08:54:30 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c0925-229c-0a2a45070019-d155802bbd4c-3 for ; Tue, 19 May 2026 08:54:30 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488b0046078so28142595e9.1 for ; Mon, 18 May 2026 23:54:30 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <93e15ff8-a313-4f19-84f1-2906cb2ade1b@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779173670-2176AC48-810B261D/0/0 X-purgate-type: clean X-purgate-size: 1007 On 18.05.2026 20:00, Orzel, Michal wrote: > On 12-May-26 16:46, Jan Beulich wrote: >> --- a/xen/common/grant_table.c >> +++ b/xen/common/grant_table.c >> @@ -1844,8 +1844,7 @@ gnttab_unpopulate_status_frames(struct d >> { >> int rc = gfn_eq(gfn, INVALID_GFN) >> ? 0 >> - : gnttab_set_frame_gfn(gt, true, i, INVALID_GFN, >> - page_to_mfn(pg)); >> + : guest_physmap_remove_page(d, gfn, page_to_mfn(pg), 0); >> >> if ( rc ) >> { >> @@ -4285,8 +4284,6 @@ int gnttab_map_frame_begin( >> */ >> if ( !get_page(pg, d) ) >> rc = -EBUSY; >> - else if ( (rc = gnttab_set_frame_gfn(gt, status, idx, gfn, *mfn)) ) > status is now a variable that is set but never read. Remove it. Oh, good point. Thanks for spotting. > With that: > Reviewed-by: Michal Orzel Thanks. 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pr=C Message-ID: Date: Tue, 19 May 2026 09:18:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm: Fix PT_PT table descriptor value and comment To: =?UTF-8?Q?Gabriel_Quint=C3=A1ns_Souto?= , CC: , , References: <20260518210340.81347-1-gabi.qs.mail@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260518210340.81347-1-gabi.qs.mail@gmail.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MWH0EPF000C6185:EE_|CH1PR12MB9720:EE_ X-MS-Office365-Filtering-Correlation-Id: 2df34451-e763-4e05-6e96-08deb576c5ed X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|82310400026|376014|1800799024|18002099003|56012099003|22082099003|11063799003|4143699003; X-Microsoft-Antispam-Message-Info: UwEq6pqGuPamofkJuQsL57uE5bEJ6WMqkkcuMW4cNnY3O13Gzwo5Q8iQOnVS+/TTgVglbJErKa2rNJHVArxMaw0HEuRHENWeDT9gzuVSQNJlXAZGWoCxj74TkF7dwzsL5rOBUw00Ba2TLWSJu/YSxZtcC04XWaiJmoDDURMUHgHGDePTTrpAjM9406cPwGyYAcT7QQAI7kugUSLLbrqhVdc3x6I3wCqjIf+fhGa26TfUq1gHQ/LFIJEBO3+096/rTDNDX2k2Mu3Lng5H/RMT/AEdTmCCOdAojOIktXNsZe05rBE2NX0GDYdYppHrBBerC7mxFxoD33qgR42KsD2e/O9ICXaRsP6XMPmlmaGSgDW8YYFPQvJobmLkPnGzT6rTcQfQXqSyVmut1Vqp9zxzs4LFRWSMvdcVPvkG3TQMEgU3nxwBeSU22wOB01h4XozUhys0x1WvCwF13JV7CQSW5YXxZefgNSqZZQ5PX5XTvebP3E0eFfV6eCBX+MxN68VVgX+jfLRrrPn3wfL14YRvIbsrf9f0d6k0029mYvKh+tncaF99ZFCMBa5Qc8rc/hOkGMHu54fsNI3rqpDkS9rgNY/uPCaabWSgHh4xBxWRTAbGGtGQUnhMJQaxC2BZpBp7t13GoyQwb0qDanvDJSDDDeZcdRUqyvJysl0WQ9rf981SOynIXcCk0TP5jRZE7GCCnQEaqYusKRLgXBTjrGL9NwZ15C5kxKPCzDE0XcjEtJQ= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(82310400026)(376014)(1800799024)(18002099003)(56012099003)(22082099003)(11063799003)(4143699003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: LnTbfsHVqKZDXaA0LLaFPS+YWMU4FWcWAmPGdUX38iE/grma0ODqQw4yGWC3CGDE1CjPlvnhKXvQPdBrGgIDgWh7ruxhCI0FZyingkKzU4fXTVVV1WeQJvipytea4q6Rh/tjzuK6iOVjjtO1ENUXMhbcOH9EdE+6Gqm0z2ECT8iQVQkfJG3QU9pTxwEuvt4qztVeQ+hyoU4O4tM2e+iXRiVaivsSJkSXSs2ctmCLbDGbA7LDlP9quZoiTlErhxCkA0av4Ookj9GNRWh0ntwKiH/+1FwFkqSHiZuyxiQcvWFe2evP2QC+KCkgz6sVX5cZO9f++88oJr9f1GBdSa2fzsa5Hl1kAqTHeUmrGRzGrxbJYiTxwiyoFCfOHtNzekLnbQFyT0uLOgtyzVrp5pyyKiY/MH5+uvrM84X8AHQ+aO5Tkz3rCb4JlnnwcRO8eFe/ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 07:18:06.3277 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2df34451-e763-4e05-6e96-08deb576c5ed X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MWH0EPF000C6185.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH1PR12MB9720 X-purgate-ID: tlsNG-720697/1779175092-A8D7F161-A19976C4/0/0 X-purgate-type: clean X-purgate-size: 547 On 18-May-26 23:00, Gabriel Quintáns Souto wrote: > Per ARMv7-A/ARMv8-A ARM, bits [11:2] of table descriptors are > ignored by hardware. The original comment incorrectly described > block/page descriptor fields which are not present in table > descriptors. > > Use the minimal valid encoding for table descriptors by setting > PT_PT to 0x3. > > This updates both arm32 and arm64 for consistency. > > Signed-off-by: Gabriel Quintáns Souto Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 19 07:20:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:20:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312449.1582535 (Exim 4.92) (envelope-from ) id 1wPEkX-0001jx-3g; Tue, 19 May 2026 07:20:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312449.1582535; Tue, 19 May 2026 07:20:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPEkW-0001jq-Vp; Tue, 19 May 2026 07:20:20 +0000 Received: by outflank-mailman (input) for mailman id 1312449; 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pr=C Message-ID: <64094528-9c9c-47d4-98b6-640df0a9df3b@amd.com> Date: Tue, 19 May 2026 09:19:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: gic-v3: Fix redistributor wakeup polling To: Luca Fancellu , CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260518070524.19813-1-luca.fancellu@arm.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <20260518070524.19813-1-luca.fancellu@arm.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF00012E84:EE_|DM3PR12MB9391:EE_ X-MS-Office365-Filtering-Correlation-Id: 2a0367f1-186a-4c68-73d3-08deb5771046 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|22082099003|56012099003|18002099003|11063799003; X-Microsoft-Antispam-Message-Info: 2W3i1qeab+QYwrAZLReEpOsxJzQ2O2un6CPdH0CdJZ6Xy/gL8pw2ruKpeIK1a657Zcxu/UhSC0PAiFQaRkYbW3jcOW2ZPp0qA58gYY9zMPfg/EyvafvLApLmNWERynW6VDTU6z0hDOAVa9XU0iyenHqV4tCgUZuW7y839fHbCV+fqNh1Kz/hyKi+Y0PLwyK77vX9D5H1TRInv8MxMZZM/ezoTfG6STrRe0glFa2GEAbSBf8IN/tXz3JlNCpvpLgFbNlOeuWpn4CrFmhlA+O0xHmBlhrZxpUY7I4lDtDUcXe+aMfyXHbWbavbfmny9ZUwW+qwpTbd0NQlYn1/HxUSgLy8xKxvzRtQNOM5DJNooeoU6rXaosFPsdsptGMtgem2THtHGe9DxG9GQ99JURG3RN5S8VhvcFPRhtZNwKoIgJfjccV4TlTtpXIqMmUF8Osd/HhlxF9pBavrkKehT31mzbbmej0243GP7kzxTOD0ZZUITAxedukKR+zS7ITcF0YdBxWX2VZ4zRENE95TPFaErvSUBm1kDEPYVkmVfsYqndHBhSpQY/CVsjnQRkCADuHG6C8KjfMz9caUpo8BnCtDE6OwOnu4lKhgTzppIrAIjYAV8pMYBx8g2TfjNopl4AYRx/WvCKPEROquj2IlSpZuPdSvgvep1KknVnIsl5y6YV1ov83dLhNV+qxmvhEbPgz6YidqSNYg1rlXRBYs7rApw4WYf6Cs4jyOBBJPWlwHh/0= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(376014)(36860700016)(1800799024)(22082099003)(56012099003)(18002099003)(11063799003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: mAqnxGS7cBy3QlpbAZwULSwesazYpXzub6bLJWx0M/fW8h2WyhbatBQ9mCl9H4ZTRoPehGjI/Og6MXc2AD2SUrvYzzyia96pG6t5ztJRl9IL+to+YrhjfredKIHX8njRc5/YiJhKm8o3ciXYWgY9F9MXF2JdbklLGCNbkl0rhDrM7x6fR5pl7o5g5ZgifyQYA1Je3FTdpAFv17G43I60DirxsCfoo+bjJkSXXMvg1W+t15lpF+M73oXJu1R3pd8vgupQ7ugvHxRfZRFC4jynjqgaNlqnB2wlodoUw+xgtqvEfahWVQODBcxJdIq9SKe3Pfk3qidVtcX0dtZVzumRLGPrssd4AWDP/j7/FPgWT1Y6d/fx1Ro+lE9MiAY1pwcbNHPYfnn0tgvDaPX6Ca2WEtY6H5AT/fIjWtEIxVgdeNnmLFRsnKJw/Dc5EWJEaWYX X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 07:20:11.0637 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2a0367f1-186a-4c68-73d3-08deb5771046 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF00012E84.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9391 X-purgate-ID: tlsNG-42698a/1779175218-13F7EF3B-BB960D17/0/0 X-purgate-type: clean X-purgate-size: 967 On 18-May-26 09:05, Luca Fancellu wrote: > gicv3_enable_redist() clears GICR_WAKER.ProcessorSleep and then waits for > GICR_WAKER.ChildrenAsleep to clear, as required after waking a > redistributor. > > However, the polling loop currently uses "while ( timeout )". Since > timeout is initially false, the loop runs only once unless the timeout > path has already been reached. As a result, Xen can continue before the > redistributor has completed wakeup. > > Use an unconditional loop, matching the surrounding timeout/break pattern, > so the code polls until either ChildrenAsleep is clear or the deadline is > reached. > > While there, also fix the timeout message. This path polls > GICR_WAKER.ChildrenAsleep, not an RWP bit, so "RWP timeout" is misleading. > > Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") > Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 19 07:21:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:21:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312454.1582543 (Exim 4.92) (envelope-from ) id 1wPElT-0002CT-Bk; Tue, 19 May 2026 07:21:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312454.1582543; Tue, 19 May 2026 07:21:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPElT-0002CM-83; Tue, 19 May 2026 07:21:19 +0000 Received: by outflank-mailman (input) for mailman id 1312454; Tue, 19 May 2026 07:21:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPElR-0002CC-Um for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:21:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPElR-00BOEf-Ac for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:21:17 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c0f62-bab6-0a2a0a5309dd-0a2a45099b7e-44 for ; Tue, 19 May 2026 09:21:17 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c0f6d-2497-0a2a45090019-d155802aa561-3 for ; Tue, 19 May 2026 09:21:17 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so18089605e9.1 for ; Tue, 19 May 2026 00:21:17 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260519001559.28129-1-jason.andryuk@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779175277-40D67A53-29D3986F/0/0 X-purgate-type: clean X-purgate-size: 1840 On 19.05.2026 02:15, Jason Andryuk wrote: > commit bfc341a65cfb ("x86: Make the hypercall PHYSDEVOP_alloc_irq_vector > hypercall dummy.") modified map_domain_pirq() to return 0 when an irq or > pirq is already mapped, when it previously returned -EINVAL. This > occured when moving map_domain_pirq()'s call from > PHYSDEVOP_alloc_irq_vector into PHYSDEVOP_apic_write. > > However, this means other callers cannot detect when a pirq or irq is > already mapped. Since success is returned but the pirq is not > connected, it will never fire. > > Modify map_domain_pirq() to return -EEXIST. -EINVAL is already returned > elsewhere in map_domain_pirq(), so -EEXIST allows identifying this case. > With that, squash -EEXIST in ioapic_guest_write() so the behavior does not > change. What about the function's uses from allocate_and_map_[gm]si_pirq()? Don't they then also need to cope with getting back -EEXIST to keep externally visible behavior unaltered? Else those cases want discussing in the description, I suppose. > Signed-off-by: Jason Andryuk > --- > I'm not sure whether or not this warrants a Fixes. Nothing in tree > today is broken, so I did not add one. In which case this then also isn't 4.22 material, I guess? > --- a/xen/arch/x86/io_apic.c > +++ b/xen/arch/x86/io_apic.c > @@ -2315,6 +2315,8 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val) > ret = map_domain_pirq(hardware_domain, pirq, irq, > MAP_PIRQ_TYPE_GSI, NULL); > write_unlock(&hardware_domain->event_lock); > + if ( ret == -EEXIST ) > + ret = 0; > if ( ret < 0 ) > return ret; Slightly shorter if ( ret < 0 && ret != -EEXIST ) return ret; ? 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In order not to make it easy for a domU >>> to query existence of a domid, adding permission for a non-existing >>> domain is not rejected by Xenstore. The XSA-417 patches solved that >>> problem by adding a flag to a permission entry referencing a not >>> existing domain, indicating that the permission should not be >>> effective for Xenstore. >>> >>> One corner case was not handled: >>> >>> Consider guest 1 and guest 2 running. Guest 1 adds guest 2 to be able >>> to access a Xenstore entry. Now guest 2 is removed from the system and >>> a new guest 3 with the same domid as guest 2 had is being created. >>> >>> When guest 3 would try now to access the Xenstore entry, it would fail, >>> as Xenstore would see that the Xenstore entry is older than guest 3. >>> >>> But if guest 1 is modifying the permissions of the Xenstore entry >>> again, e.g. by adding another domain, the permission entry for guest 2 >>> would lose its "special flag", resulting in guest 3 now really gaining >>> access to the Xenstore entry. >>> >>> This series is fixing this problem by the following means: >>> >>> - In order to allow guests to know that a Xenstore entry permission >>>    might have gone stale, allow unprivileged guests to receive >>>    @releaseDomain watch events. This doesn't open a security hole, as >>>    the only knowledge which can by gathered from that change is that a >>>    domain is gone, not that a domain with a specific domid is existing. >>> >>> - When a domain is removed, remove all permissions relating to this >>>    domain from all Xenstore entries. >>> >>> Note that this issue was discussed by the Xen security team and we >>> decided not to issue an XSA, as there are no known use cases where one >>> unprivileged guest would grant access to its Xenstore nodes to more >>> than one other unprivileged guests. >>> >>> We decided to delay this patch series until the watch depth feature has >>> been committed, as with that feature available it is now possible for >>> a guest to handle the death of a specific domain in a sane way. >>> >>> Changes in V2: >>> - some minor comments addressed >>> >>> Denis Mukhin (1): >>>    xen/public: introduce DOMID_ANY >>> >>> Juergen Gross (3): >>>    tools/xenstored: add support for "all domains" node permission >>>    tools/xenstored: allow @releaseDomain watch for all domains >>>    tools/xenstored: remove permissions related to dead domain >>> >>>   docs/man/xl.cfg.5.pod.in        |  4 ++ >>>   tools/xenstored/core.c          | 45 ++++++++++++++----- >>>   tools/xenstored/domain.c        | 78 +++++++++++++++++++++------------ >>>   tools/xenstored/domain.h        |  3 +- >>>   xen/include/public/io/xs_wire.h |  2 + >>>   xen/include/public/xen.h        |  7 +++ >>>   6 files changed, 100 insertions(+), 39 deletions(-) >>> >> >> Release-Acked-by: Oleksii Kurochko > > I believe this series can be committed now, as Stefano has Ack-ed patch 1? Yes, it can be committed now. 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4/cFeBB0NYMWVHL1B5pPb/7zTSu9MN8f74XOclhtlbrPDol83dSU9rwHT5SgUtAawTUDiUlEAvG L6mgdvmyDb2h2kJw8qfsuEExIQZjBpDY77IoPDb90s8JknR5Q2dWyTENlUGGbyg5Di5dZ+AjWzC e8v4c6cnOPNmyt20OTzJV/iWX4RdM6b3/MvTYGac= X-Proofpoint-GUID: njjRGzj4jrV7Dq1lzpyR1DT_67iOLPa4 X-purgate-ID: tlsNG-ebf023/1779176157-429623FF-F9494337/0/0 X-purgate-type: clean X-purgate-size: 4478 I have encountered below build warning. Perhaps it is because of PATCH 03? In file included from ./include/linux/types.h:5, from ./arch/x86/include/uapi/asm/pvclock-abi.h:5, from ./arch/x86/include/asm/xen/interface.h:197, from ./include/xen/interface/xen.h:13, from : ./include/uapi/linux/types.h:10:2: warning: #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders" [-Wcpp] 10 | #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders" | ^~~~~~~ In file included from ./include/linux/types.h:5, from ./arch/x86/include/uapi/asm/pvclock-abi.h:5, from ./arch/x86/include/asm/xen/interface.h:197, from ./include/xen/interface/xen.h:13, from ./include/xen/interface/xenpmu.h:5, from : ./include/uapi/linux/types.h:10:2: warning: #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders" [-Wcpp] 10 | #warning "Attempt to use kernel headers from user space, see https://kernelnewbies.org/KernelHeaders" | ^~~~~~~ Thank you very much! Dongli Zhang On 2026-05-09 3:46 PM, David Woodhouse wrote: > From: Jack Allister > > A subsequent commit will provide a new KVM interface for performing a > fixup/correction of the KVM clock against the reference TSC. The > KVM_[GS]ET_CLOCK_GUEST API requires a pvclock_vcpu_time_info, as such > the caller must know about this definition. > > Move the definition to the UAPI folder so that it is exported to > usermode and also change the type definitions to use the standard for > UAPI exports. > > Signed-off-by: Jack Allister > Signed-off-by: David Woodhouse > Reviewed-by: Paul Durrant > --- > MAINTAINERS | 4 +-- > arch/x86/include/{ => uapi}/asm/pvclock-abi.h | 27 ++++++++++--------- > 2 files changed, 17 insertions(+), 14 deletions(-) > rename arch/x86/include/{ => uapi}/asm/pvclock-abi.h (82%) > > diff --git a/MAINTAINERS b/MAINTAINERS > index e0b307b2108c..e49676955c0c 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -14406,7 +14406,7 @@ S: Supported > T: git git://git.kernel.org/pub/scm/virt/kvm/kvm.git > F: arch/um/include/asm/kvm_para.h > F: arch/x86/include/asm/kvm_para.h > -F: arch/x86/include/asm/pvclock-abi.h > +F: arch/x86/include/uapi/asm/pvclock-abi.h > F: arch/x86/include/uapi/asm/kvm_para.h > F: arch/x86/kernel/kvm.c > F: arch/x86/kernel/kvmclock.c > @@ -29087,7 +29087,7 @@ R: Boris Ostrovsky > L: xen-devel@lists.xenproject.org (moderated for non-subscribers) > S: Supported > F: arch/x86/configs/xen.config > -F: arch/x86/include/asm/pvclock-abi.h > +F: arch/x86/include/uapi/asm/pvclock-abi.h > F: arch/x86/include/asm/xen/ > F: arch/x86/platform/pvh/ > F: arch/x86/xen/ > diff --git a/arch/x86/include/asm/pvclock-abi.h b/arch/x86/include/uapi/asm/pvclock-abi.h > similarity index 82% > rename from arch/x86/include/asm/pvclock-abi.h > rename to arch/x86/include/uapi/asm/pvclock-abi.h > index b9fece5fc96d..6d70cf640362 100644 > --- a/arch/x86/include/asm/pvclock-abi.h > +++ b/arch/x86/include/uapi/asm/pvclock-abi.h > @@ -1,6 +1,9 @@ > -/* SPDX-License-Identifier: GPL-2.0 */ > +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ > #ifndef _ASM_X86_PVCLOCK_ABI_H > #define _ASM_X86_PVCLOCK_ABI_H > + > +#include > + > #ifndef __ASSEMBLER__ > > /* > @@ -24,20 +27,20 @@ > */ > > struct pvclock_vcpu_time_info { > - u32 version; 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bh=wVMIqXlaDGVHOYRt4HeJrHuQKFcLBAC9G+SLJY6E7yg=; b=fg1+UwAgKZj+KiJI4xl4D26N7PCdXy1lKxuqKTCy0Cs8OoMKLDcJCJT2j99pCC62XQsP+znfbocjQKUI0Jx2CNtREqDGovuFJri2/H1EHdVCScPll6G+2Ct/a6t2WGA3nj9lqnJOkaOtwigSj1JIcCwW5lt+DteSBJNld2h77Kw= Message-ID: Date: Tue, 19 May 2026 00:38:00 -0700 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v4 16/30] KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling To: David Woodhouse , kvm@vger.kernel.org References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-17-dwmw2@infradead.org> Content-Language: en-US Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. 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5193 I have encountered this build error with this patch. Perhaps it is because all usage of "flags" are removed. $ make -j32 > /dev/null arch/x86/kvm/x86.c: In function ‘kvm_guest_time_update’: arch/x86/kvm/x86.c:3359:23: error: unused variable ‘flags’ [-Werror=unused-variable] 3359 | unsigned long flags; | ^~~~~ cc1: all warnings being treated as errors make[4]: *** [scripts/Makefile.build:289: arch/x86/kvm/x86.o] Error 1 make[3]: *** [scripts/Makefile.build:548: arch/x86/kvm] Error 2 make[2]: *** [scripts/Makefile.build:548: arch/x86] Error 2 make[1]: *** [/home/opc/ext4/mainline-linux/Makefile:2143: .] Error 2 make: *** [Makefile:248: __sub-make] Error 2 Thank you very much! Dongli Zhang On 2026-05-09 3:46 PM, David Woodhouse wrote: > From: David Woodhouse > > Restructure kvm_guest_time_update() so that kernel_ns/host_tsc are > always "now" when doing TSC catchup, then swap in the master clock > reference values afterward for the hv_clock. > > This makes the TSC upscaling code considerably simpler: the catchup > adjustment is computed as the delta between what the guest TSC *should* > be at "now" and what it actually is, rather than mixing "now" and > "master clock reference" timestamps. > > The seqcount loop now also contains the kvm_get_time_and_clockread() > call (matching get_kvmclock's pattern), with the same WARN for > unexpected failure. > > Based on a suggestion by Sean Christopherson. > > Signed-off-by: David Woodhouse > --- > arch/x86/kvm/x86.c | 67 ++++++++++++++++++++++++++++++++-------------- > 1 file changed, 47 insertions(+), 20 deletions(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index e281c49561fa..8e4993ef4f6b 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -3363,39 +3363,51 @@ int kvm_guest_time_update(struct kvm_vcpu *v) > struct kvm_arch *ka = &v->kvm->arch; > s64 kernel_ns; > u64 tsc_timestamp, host_tsc; > + u64 master_host_tsc = 0; > + s64 master_kernel_ns = 0; > bool use_master_clock; > > - kernel_ns = 0; > - host_tsc = 0; > - > /* > * If the host uses TSC clock, then passthrough TSC as stable > * to the guest. > */ > do { > seq = read_seqcount_begin(&ka->pvclock_sc); > + > use_master_clock = ka->use_master_clock; > - if (use_master_clock) { > - host_tsc = ka->master_cycle_now; > - kernel_ns = ka->master_kernel_ns; > - } > + > + /* > + * The TSC read and the call to get_cpu_tsc_khz() must happen > + * on the same CPU. > + */ > + get_cpu(); > + > + tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; > + > + if (use_master_clock && > + !kvm_get_time_and_clockread(&kernel_ns, &host_tsc) && > + WARN_ON_ONCE(!read_seqcount_retry(&ka->pvclock_sc, seq))) > + use_master_clock = false; > + > + put_cpu(); > + > + if (!use_master_clock) > + break; > + > + master_host_tsc = ka->master_cycle_now; > + master_kernel_ns = ka->master_kernel_ns; > } while (read_seqcount_retry(&ka->pvclock_sc, seq)); > > - /* Keep irq disabled to prevent changes to the clock */ > - local_irq_save(flags); > - tgt_tsc_hz = (u64)get_cpu_tsc_khz() * 1000; > if (unlikely(tgt_tsc_hz == 0)) { > - local_irq_restore(flags); > kvm_make_request(KVM_REQ_CLOCK_UPDATE, v); > return 1; > } > + > if (!use_master_clock) { > host_tsc = rdtsc(); > kernel_ns = get_kvmclock_base_ns(); > } > > - tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); > - > /* > * We may have to catch up the TSC to match elapsed wall clock > * time for two reasons, even if kvmclock is used. > @@ -3404,17 +3416,32 @@ int kvm_guest_time_update(struct kvm_vcpu *v) > * entry to avoid unknown leaps of TSC even when running > * again on the same CPU. This may cause apparent elapsed > * time to disappear, and the guest to stand still or run > - * very slowly. > + * very slowly. > */ > if (vcpu->tsc_catchup) { > - u64 tsc = compute_guest_tsc(v, kernel_ns); > - if (tsc > tsc_timestamp) { > - adjust_tsc_offset_guest(v, tsc - tsc_timestamp); > - tsc_timestamp = tsc; > - } > + s64 adjustment; > + > + /* > + * Calculate the delta between what the guest TSC *should* be > + * and what it actually is according to kvm_read_l1_tsc(). > + */ > + adjustment = compute_guest_tsc(v, kernel_ns) - > + kvm_read_l1_tsc(v, host_tsc); > + if (adjustment > 0) > + adjust_tsc_offset_guest(v, adjustment); > } > > - local_irq_restore(flags); > + /* > + * Now that TSC upscaling is out of the way, the remaining calculations > + * are all relative to the reference time that's placed in hv_clock. > + * If the master clock is NOT in use, the reference time is "now". If > + * master clock is in use, the reference time comes from there. > + */ > + if (use_master_clock) { > + host_tsc = master_host_tsc; > + kernel_ns = master_kernel_ns; > + } > + tsc_timestamp = kvm_read_l1_tsc(v, host_tsc); > > /* With all the info we got, fill in the values */ > From xen-devel-bounces@lists.xenproject.org Tue May 19 07:39:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:39:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312490.1582578 (Exim 4.92) (envelope-from ) id 1wPF3J-0005yt-Ic; Tue, 19 May 2026 07:39:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312490.1582578; Tue, 19 May 2026 07:39:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPF3J-0005ym-Fl; Tue, 19 May 2026 07:39:45 +0000 Received: by outflank-mailman (input) for mailman id 1312490; Tue, 19 May 2026 07:39:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPF3H-0005yD-Lu for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:39:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPF3H-0034kA-1d for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:39:43 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c13b7-5cb7-0a2a0a5109dd-0a2a4503aa8e-44 for ; Tue, 19 May 2026 09:39:43 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c13be-672d-0a2a45030019-d155da32c85a-3 for ; Tue, 19 May 2026 09:39:42 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-bd394f4a931so698721766b.2 for ; Tue, 19 May 2026 00:39:42 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I think it is low risk. > > Oleksii, can we have a release ack for this? It looks low risk so we can consider to have it in 4.22: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii > > > On Wed, 13 May 2026, Anthony PERARD wrote: >> On Thu, May 07, 2026 at 01:28:40PM -0700, dmukhin@ford.com wrote: >>> From: Denis Mukhin >>> >>> Add a new symbol DOMID_ANY to improve the readability of the code. >>> >>> Update all relevant domid_alloc() call sites and harden the domid_alloc() >>> input value check. >>> >>> Also, fix problem with passing invalid domain IDs in >>> XEN_DOMCTL_createdomain: turns out libxl__domain_make() (toolstack) >>> uses 0xffff as domain ID. >>> >>> Fix failing tools tests too. >>> >>> Amends: 2d5065060710 ("xen/domain: unify domain ID allocation") >>> Signed-off-by: Denis Mukhin >>> --- >>> Changes since v7: >>> - aligned the DOMID_ANY comment with another patch sent separately to >>> unblock xenstore series: https://lore.kernel.org/xen-devel/20260429120619.1013440-2-jgross@suse.com/ >>> - added fixups to mem-claim, paging-mempool, resource and tsx tests. >>> - Link to v7: https://lore.kernel.org/xen-devel/20260408234046.1314021-1-dmukhin@ford.com/ >>> - Link to full CI: https://gitlab.com/xen-project/people/sstabellini/xen/-/pipelines/2508345752 >> >> For the tools part: >> Reviewed-by: Anthony PERARD >> >> Thanks, >> >> >> -- >> Anthony Perard | Vates XCP-ng Developer >> >> XCP-ng & Xen Orchestra - Vates solutions >> >> web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Tue May 19 07:42:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:42:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312498.1582587 (Exim 4.92) (envelope-from ) id 1wPF6G-0007Xb-VR; Tue, 19 May 2026 07:42:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312498.1582587; Tue, 19 May 2026 07:42:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPF6G-0007XU-SH; Tue, 19 May 2026 07:42:48 +0000 Received: by outflank-mailman (input) for mailman id 1312498; Tue, 19 May 2026 07:42:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPF6F-0007XO-91 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:42:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPF6E-008MlH-He for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:42:46 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c1472-5cb7-0a2a0a5109dd-0a2a45018dd8-4 for ; Tue, 19 May 2026 09:42:46 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c1476-c1f2-0a2a45010019-d155802ba838-3 for ; Tue, 19 May 2026 09:42:46 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4890d945eb4so22515305e9.0 for ; Tue, 19 May 2026 00:42:46 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Sure, fixes could go until Hard Code freeze is started. Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii > > On Fri, 15 May 2026, Luca Fancellu wrote: >> Hi Mykola, >> >>> On 15 May 2026, at 10:40, Mykola Kvach wrote: >>> >>> From: Mykola Kvach >>> >>> GITS_CBASER.InnerCache uses the GIC BASER cacheability encoding. >>> Both 0b000 (Device-nGnRnE) and 0b001 (Normal Inner >>> Non-cacheable) describe non-cacheable accesses to the command queue. >>> >>> its_map_cbaser() only checked whether the shifted field was zero, >>> so an ITS that reports Normal Inner Non-cacheable would not set >>> HOST_ITS_FLUSH_CMD_QUEUE. Decode the field before comparing it with >>> the unshifted enum value, matching the handling of ITS BASER tables >>> and GICR_PROPBASER. >>> >>> Fixes: 8ed8d21373be ("ARM: GICv3 ITS: map ITS command buffer") >>> Signed-off-by: Mykola Kvach >>> --- >>> xen/arch/arm/gic-v3-its.c | 3 ++- >>> 1 file changed, 2 insertions(+), 1 deletion(-) >>> >>> diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c >>> index 9005ce8ce5..7560d46c6d 100644 >>> --- a/xen/arch/arm/gic-v3-its.c >>> +++ b/xen/arch/arm/gic-v3-its.c >>> @@ -424,7 +424,8 @@ static void *its_map_cbaser(struct host_its *its) >>> * If the command queue memory is mapped as uncached, we need to flush >>> * it on every access. >>> */ >>> - if ( !(reg & GITS_BASER_INNER_CACHEABILITY_MASK) ) >>> + if ( MASK_EXTR(reg, GITS_BASER_INNER_CACHEABILITY_MASK) <= >>> + GIC_BASER_CACHE_nC ) >>> { >>> its->flags |= HOST_ITS_FLUSH_CMD_QUEUE; >>> printk(XENLOG_WARNING "using non-cacheable ITS command queue\n"); >>> -- >>> 2.43.0 >>> >>> >> >> Looks ok to me >> >> Reviewed-by: Luca Fancellu > From xen-devel-bounces@lists.xenproject.org Tue May 19 07:43:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:43:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312502.1582596 (Exim 4.92) (envelope-from ) id 1wPF6r-0007yb-6m; Tue, 19 May 2026 07:43:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312502.1582596; Tue, 19 May 2026 07:43:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPF6r-0007yU-45; Tue, 19 May 2026 07:43:25 +0000 Received: by outflank-mailman (input) for mailman id 1312502; Tue, 19 May 2026 07:43:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPF6q-0007yL-Fg for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:43:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPF6p-00BRVh-Rm for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:43:23 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c148f-5cb7-0a2a0a5109dd-0a2a45078b64-18 for ; Tue, 19 May 2026 09:43:23 +0200 Received: from [209.85.208.44] (helo=mail-ed1-f44.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c149b-229c-0a2a45070019-d155d02ccd14-3 for ; Tue, 19 May 2026 09:43:23 +0200 Received: by mail-ed1-f44.google.com with SMTP id 4fb4d7f45d1cf-67c1e0229acso5338770a12.1 for ; Tue, 19 May 2026 00:43:23 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii > > On Fri, 15 May 2026, Luca Fancellu wrote: >> Hi Mykola, >> >>> On 14 May 2026, at 10:08, Mykola Kvach wrote: >>> >>> From: Mykola Kvach >>> >>> gicv3_do_wait_for_rwp() is used for both distributor and >>> redistributor writes. The CTLR register is at offset 0 for both, >>> but the RWP bit is not in the same position. >>> >>> For GICD_CTLR, RWP is bit 31. For GICR_CTLR, bit 31 is UWP, >>> while RWP is bit 3. The redistributor wait path was therefore >>> polling UWP instead of RWP. >>> >>> UWP covers upstream writes, including Generate SGI packets, and is >>> not a substitute for redistributor register write completion. The >>> existing redistributor callers need RWP semantics for redistributor >>> register writes such as GICR_ICENABLER0 and GICR_CTLR updates. >>> >>> Add GICR_CTLR_RWP and pass the expected RWP bit to the shared >>> helper. >>> >>> Fixes: bc183a0235e ("xen/arm: Add support for GIC v3") >>> Reported-by: Luca Fancellu >>> Signed-off-by: Mykola Kvach >>> --- >> >> This looks ok to me >> >> Reviewed-by: Luca Fancellu >> >> Cheers, >> Luca >> From xen-devel-bounces@lists.xenproject.org Tue May 19 07:47:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:47:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312512.1582605 (Exim 4.92) (envelope-from ) id 1wPFAi-00008C-L9; Tue, 19 May 2026 07:47:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312512.1582605; Tue, 19 May 2026 07:47:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFAi-000080-Id; Tue, 19 May 2026 07:47:24 +0000 Received: by outflank-mailman (input) for mailman id 1312512; Tue, 19 May 2026 07:47:24 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFAi-00007s-0D for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:47:24 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wPFAe-00D46j-0p; Tue, 19 May 2026 07:47:20 +0000 Received: from [2a02:8012:3a1:0:f5d8:254d:983d:8dea] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wPFAd-00DiS6-32; Tue, 19 May 2026 07:47:20 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=yh1h2dw5VVpYebt6+Cbjk9VKND33+605S00u7+5X/Yk=; b=xK+9RhjC70r6phNB9wMTq1ySb3 yrfEchn6VpxutqrgK2fFGFBDPRlZRZuOXGvR5Iu6H4imMBCG1P3acDiWLX4XdKptmb+q9TUk8XQE4 Ll/ned0c2eFn40nhShmktAKY0rPrvM4hSrPh8p9LCpY2ZS8l8tab8M0MytzDhQnegHmk=; Message-ID: <3d1001c8-6761-41ba-83df-42c83a453f3e@xen.org> Date: Tue, 19 May 2026 08:47:17 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 1/1] arm64: Fix strrchr() matching of null terminator Content-Language: en-GB To: Jan Beulich , "Edgar E. Iglesias" Cc: sstabellini@kernel.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, xen-devel@lists.xenproject.org References: <20260518234353.453193-1-edgar.iglesias@amd.com> <20260518234353.453193-2-edgar.iglesias@amd.com> <9b8ec97f-02ae-4a1a-9abe-59873d574a64@suse.com> From: Julien Grall In-Reply-To: <9b8ec97f-02ae-4a1a-9abe-59873d574a64@suse.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Edgar and Jan, On 19/05/2026 07:40, Jan Beulich wrote: > On 19.05.2026 01:43, Edgar E. Iglesias wrote: >> The generic Xen strrchr() implementation returns a pointer to the string >> terminator when searching for '\0', matching the standard C semantics. >>>> The ARM64 assembly version stopped as soon as it loaded the terminator and >> returned the previous match pointer instead. This made strrchr("", '\0') >> return NULL. > > I wonder though: Why would one pass '\0' to strrchr()? If you want to find > the end of a string, more efficient (at least in the general case) options > exist (strchr(), memchr(), strlen()). +1 I am interested to know the use-case for this change. Is this for compliance or real issue? If the latter, can we add some details. It might also be worth to write a selftest to avoid any regression (in particular if we decide to diverge from Linux). > >> Compare the loaded byte against the requested character before deciding >> whether to stop at the terminator, so the terminator itself can be returned >> when it is the requested character. > > Nit: "..., so a pointer to the terminator ...". > >> Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") >> Signed-off-by: Edgar E. Iglesias > > Reviewed-by: Jan Beulich > > However, the function having come from Linux, imo the patch wants to go to > Linux (ideally first, but at the very least also). We are trying to keep the core implementation in lib the same as linux (see arch/arm/README.LinuxPrimitives). I would prefer if this is also first committed to Linux and then backported. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue May 19 07:51:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 07:51:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312519.1582615 (Exim 4.92) (envelope-from ) id 1wPFEF-0001wc-3P; Tue, 19 May 2026 07:51:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312519.1582615; Tue, 19 May 2026 07:51:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFEF-0001wV-0Q; Tue, 19 May 2026 07:51:03 +0000 Received: by outflank-mailman (input) for mailman id 1312519; Tue, 19 May 2026 07:51:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFEC-0001wP-GM for xen-devel@lists.xenproject.org; Tue, 19 May 2026 07:51:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPFEB-005j5g-SU; Tue, 19 May 2026 09:50:59 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c1662-bab6-0a2a0a5309dd-0a2a450281a2-6 for ; Tue, 19 May 2026 09:50:59 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c1661-af86-0a2a45020019-5a9b3222b55e-3 for ; Tue, 19 May 2026 09:50:58 +0200 Received: from 54-240-197-233.amazon.com ([54.240.197.233] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPFDt-00000005dE2-2vSi; Tue, 19 May 2026 07:50:42 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2I20zy7pvCfvCrda6zbAyknDlpOfiA0ggmXaaJwhbRE=; b=jYbCwqTSVywpKDxG1FmH+Adqcw w6GggxLY7YanY4TEBm+Mt2T5jofi8uAT6c/QiFEUhFTx5WmWVieLRrSkByHHxgXoMvQZhJUvQcDsT jcpH9HKlG5fEM84xv6ESE14tZmaIutcWzIQzdkHebkfzsOpq7itycL43tvT31y/jjLwExK2/76GsU 6+vD23HY1HYOnL36nmVxMRB0C7sOTU/UQercN4uAfZS4OFLhugLw2VxKLfVV1zH22Zr4PN4RLFQk8 3dqSAFuGkZgs0KHIMNz3sEIkO3XlyRFupIo0FQajd4g+cYdZne+LOpbR8rtF1lK/FMwO6dvrbRV/v /1QQEAYQ==; Message-ID: Subject: Re: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration From: David Woodhouse To: Dongli Zhang , kvm@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Sean Christopherson , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Tue, 19 May 2026 08:50:39 +0100 In-Reply-To: <935312be-9a86-49fd-8bb4-2c998a68e2df@oracle.com> References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-5-dwmw2@infradead.org> <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> <935312be-9a86-49fd-8bb4-2c998a68e2df@oracle.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-boRirr429Da0AX+mV+GN" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1779177058-8077A161-3EE05FE6/0/0 X-purgate-type: clean X-purgate-size: 17600 --=-boRirr429Da0AX+mV+GN Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Mon, 2026-05-18 at 17:57 -0700, Dongli Zhang wrote: > On 2026-05-18 1:48 AM, David Woodhouse wrote: > > ... >=20 > I have fixed the Thunderbird configuration. Does it look better to you? The date is certainly better, thank you. But although I *was* up late that night frowning at clocks, I didn't think I was up *quite* as late (almost 2am) as it suggests. But I suspect that getting *that* right is beyond the limit of Thunderbird's configurability. Thanks :) > I really appreciate guidelines like the ones below. >=20 > https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org >=20 > Assuming I am a user of the new API, I feel confused about whether the go= al is > to replace KVM_SET_CLOCK with KVM_SET_CLOCK_GUEST, or whether the latter = is > meant to supplement the former. The issue is that KVM_SET_CLOCK_GUEST can only be used in 'masterclock' mode, when the TSC is reliable and the guest TSCs are all in sync. Which ought to be *all* of the time, on modern hardware and sane configurations. And in this series, I don't even let the *guest* screw that over by setting different TSC offsets on different vCPUs any more (we stay in masterclock mode in that case now). But the VMM can cause its guest to come out of masterclock mode, by setting different TSC *speeds* on different vCPUs. So there remain some pathological cases where the kvmclock actually still has a justification to exist, and those are the cases where it needs to be set in its own right as a function of host time (KVM_SET_CLOCK), not purely as a function of the guest TSC (KVM_SET_CLOCK_GUEST). >=20 > If we are going to use KVM_SET_CLOCK_GUEST when KVM_SET_CLOCK is not need= ed, I > would appreciate it if the API could carry more data in addition to struc= t > pvclock_vcpu_time_info. >=20 > +#define KVM_SET_CLOCK_GUEST=C2=A0=C2=A0=C2=A0 _IOW(KVMIO, 0xd6, struct p= vclock_vcpu_time_info) > +#define KVM_GET_CLOCK_GUEST=C2=A0=C2=A0=C2=A0 _IOR(KVMIO, 0xd7, struct p= vclock_vcpu_time_info) >=20 >=20 > In the future, if we need to carry additional data, we could simply reuse= the > padding fields instead of introducing another KVM_SET_CLOCK_GUEST2. >=20 > The following is an example of how additional data could be carried. >=20 > KVM: x86: Report host tsc and realtime values in KVM_GET_CLOCK > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit= /?id=3Dc68dc1b577eabd5605c6c7c08f3e07ae18d30d5d I'm not very keen on the way that KVM_[GS]ET_CLOCK threw extra time references in over the years without any of them ever actually making *sense*, which makes me reluctant.=C2=A0 KVM_[GS]ET_CLOCK_GUEST on the other hand does *one* thing: it exports the relationship between the guest TSC and kvmclock. We don't *need* to litter it with time values from other clocks willy-nilly. But yes, you are right in principle. And in fact, the other part of this conversation has really drawn my attention to the ugliness of the "try KVM_SET_CLOCK_GUEST and if that doesn't take then fall back to KVM_SET_CLOCK" which we are pushing onto userspace. Yes, I covered it in the guidelines: but we should always abide by the mantra, "if it *needs* documenting, fix it first". So perhaps we could build a variant which does both at once. It provides the guest clock as a function of guest TSC for the sane masterclock case, but *also* includes CLOCK_TAI at the same moment, in case it needs to fall back to that. Although... the actual reference time part of the existing pvclock might be significantly in the past, especially with all the MASTERCLOCK_UPDATE elimination that we've been doing. And we'd have to regenerate it to get a simultaneous realtime reading, wouldn't we? > >=20 > > > Do we need a KVM_CHECK_EXTENSION capability for this? If userspace wa= nts to > > > support the new API, should it detect availability via KVM_CHECK_EXTE= NSION, or > > > simply try the ioctl and handle failure? > >=20 > > That might be conventional, I suppose. But I suspect Jack's thinking > > was that userspace is going to have to *try* it anyway, and still might > > have to fall back to what KVM_SET_CLOCK can manage, so userspace > > probably wouldn't even bother to check that capability; it doesn't > > matter. > >=20 > > Since then, we've added some more attributes in this series though, and > > it probably is worth adding a cap which advertises them *all*? > > Something like KVM_CAP_CLOCK_PRECISION_API? >=20 > From an API user's perspective, userspace may need to distinguish between= an API > failure and the API not being available. That's -ENOTTY vs. -EINVAL for the ioctl, isn't it? And isn't there something similarly unambiguous for the attributes? But I have no objection to adding a capability. The lack of it was more oversight than intent. > > >=20 > > > From my perspective, I am also curious how we should reason about thi= s in other > > > scenarios in the future. Specifically, when do we need to process > > > KVM_REQ_MASTERCLOCK_UPDATE before KVM_REQ_CLOCK_UPDATE, and when is i= t > > > acceptable not to? I noticed that kvm_cpuid() already processes only > > > KVM_REQ_CLOCK_UPDATE. > >=20 > > The way I've been thinking about it =E2=80=94 and I'm only two cups of = coffee > > into Monday so take those words literally and don't think of them as > > British understatement of something I believe is absolute truth =E2=80= =94 is > > that MASTERCLOCK_UPDATE is updating the actual clock for the whole VM, > > while CLOCK_UPDATE is about *putting* that information into the per- > > vCPU pvclock structures. > >=20 > > So after a MASTERCLOCK_UPDATE, we need to do a CLOCK_UPDATE on all > > vCPUs to disseminate the result. Which means that if CLOCK_UPDATE is > > already pending before a MASTERCLOCK_UPDATE, it's probably redundant > > and might as well be cleared because it's only going to get set *again* > > in kvm_end_pvclock_update()?=20 >=20 > Another scenario is when only MASTERCLOCK_UPDATE is pending and there is = no > pending CLOCK_UPDATE. >=20 > In this scenario, is it fine to skip processing MASTERCLOCK_UPDATE before= saving > pvclock_vcpu_time_info? >=20 I'm not sure I understand that scenario.=20 MASTERCLOCK_UPDATE means we have to actually recalculate the master clock (which really *should* be rare, now!). And then any time we do that, we also have to do a CLOCK_UPDATE on every vCPU to disseminate the new information. Which is why kvm_end_pvclock_update() does exactly that. So your "MASTERCLOCK_UPDATE is pending and there is no pending CLOCK_UPDATE" doesn't make much sense to me. If MASTERCLOCK_UPDATE is pending, then there *will* be a CLOCK_UPDATE pending. > > >=20 > > > Would it be helpful to validate that the delta is within a reasonable= range, > > > e.g. that the drift can never be more than five minutes (forward or b= ackward)? > >=20 > > If a guest has been running for months on a previous host and is > > migrated to a new host, don't we expect that the KVM clock of the new > > VM on the new host is tweaked from its default near-zero after > > creation, to some large amount? > >=20 >=20 > Regarding live migration, my own investigation does not show a proportion= al > relationship between VM uptime and the amount of drift. You're comparing the VM on the source host, with the VM on the destination post-migration. Perhaps I misunderstood, but I thought your suggested validation of a 'reasonable range' would also apply when adjusting the kvmclock of the nascent VM on the destination host, from "newly created" to "has been running for months" while migrating the state of the actual guest onto a clean new slate. > Just taking QEMU + KVM as an example: suppose TSC scaling is inactive, th= e > amount of drift does not depend on how long the VM has been running befor= e live > migration. >=20 > Instead, it depends on the delta between when we call MSR_IA32_TSC and > KVM_GET_CLOCK, and between MSR_IA32_TSC and KVM_SET_CLOCK. >=20 > The guest TSC stops at P1 and resumes at P3. > The kvmclock stops at P2 and resumes at P4. >=20 > We expect P1 =3D=3D P2 and P3 =3D=3D P4. >=20 > On source host. >=20 > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3D0 =3D=3D=3D> P1 Here's where it all starts going wrong. Line 1. Any API which lets you get a single time value in isolation, and thus which is already out of date by the time the system call even returns, is fundamentally unsuitable for migration. > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3D1 > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3D2 > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3D3 > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3D4 > ... ... > - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3DN > - KVM_GET_CLOCK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D=3D=3D> P2 >=20 > On target host. >=20 > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3D1 =3D=3D=3D> P3 > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3D2 At this point, the nasty hack in the kernel steps in, realises that the value you're setting on vCPU 2 is within a second or so of the value you had previously set on vCPU 1, and snaps it back to be precisely the same. To work around the fundamental brokenness of this method. > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3D3 > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3D4 > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3D5 > ... ... > - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3DN > - KVM_SET_CLOCK=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D=3D=3D=3D> P4 >=20 >=20 > Here is my equiation to predict the drift. I'm sure you're right, but I didn't get that far when looking at this. I'd already thrown up in my mouth a little bit by line one. Here's my equation to predict the drift of a live update done correctly on the same host using the method I've now put in the documentation: 0. :) --=-boRirr429Da0AX+mV+GN Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 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2026 07:54:55 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=kxDnhCMFukfGQTD0OCV8H6wDlq4JqmueGtLA8tc8FP8=; b=mjb4kKbrJ/Q2zXDIIGOJ32SVgA DHLYAdYPhjAoxXZy7N0ZI8Edf1UZAuPPXAUb9agUSue0Duv0Gt4PgYUDfQCgc+W6hV9tFdBKlM2WQ b9aNQqdrK5IR8mOFWDK7V/QimpZKdP3wlIViNxfg4i+BplaqX+RTukA+OnED0AK0xwupT6Ng+h0GU egUFRMVtVbC7k82tm6K4hWla+J+GsF2YVLZxf/19Gf5e+vouR3euCUlxO5Hc4AO7BxTWzyKJ0pKpe O6VlubjrBvUuklOMdEi+gcj7mMvGlZHEU/JpGTvMX59tTi5W2wQnd7gm+DScuDx1fj9ZnD2Zh7lZh vsET8LIg==; Message-ID: Subject: Re: [PATCH v4 16/30] KVM: x86: Restructure kvm_guest_time_update() for TSC upscaling From: David Woodhouse To: Dongli Zhang , kvm@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Tue, 19 May 2026 08:54:53 +0100 In-Reply-To: References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-17-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-fhzFy9YA8yde6QYEuqnv" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1779177305-89174A53-D6D1CF7C/0/0 X-purgate-type: clean X-purgate-size: 8868 --=-fhzFy9YA8yde6QYEuqnv Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2026-05-19 at 00:38 -0700, Dongli Zhang wrote: > I have encountered this build error with this patch. >=20 > Perhaps it is because all usage of "flags" are removed. >=20 > $ make -j32 > /dev/null > arch/x86/kvm/x86.c: In function =E2=80=98kvm_guest_time_update=E2=80=99: > arch/x86/kvm/x86.c:3359:23: error: unused variable =E2=80=98flags=E2=80= =99 [-Werror=3Dunused-variable] > =C2=A03359 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned lon= g flags; > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 ^~~~~ > cc1: all warnings being treated as errors > make[4]: *** [scripts/Makefile.build:289: arch/x86/kvm/x86.o] Error 1 > make[3]: *** [scripts/Makefile.build:548: arch/x86/kvm] Error 2 > make[2]: *** [scripts/Makefile.build:548: arch/x86] Error 2 > make[1]: *** [/home/opc/ext4/mainline-linux/Makefile:2143: .] Error 2 > make: *** [Makefile:248: __sub-make] Error 2 >=20 > Thank you very much! >=20 > Dongli Zhang Yes, in all the refactoring/rebasing, somehow the line which should have removed 'flags' there ended up in https://lore.kernel.org/all/20260509224824.3264567-31-dwmw2@infradead.org/ along with another one-liner that should have been in a different previous commit and breaks bisectability of that too. Sorry about that. Should all be fixed in https://git.infradead.org/?p=3Dusers/dwmw2/linux.git;a=3Dshortlog;h=3Drefs/= heads/kvmclock5 where I'm accumulating various fixes in preparation to post a v5. --=-fhzFy9YA8yde6QYEuqnv Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 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List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=ADc5/F5SW02jKw3O+12IEV33qq97n+QupUWW2H0ph9U=; b=gOBtdpJ/AvfWP0NgQomiE146a7 gSDF9DTtww/Gxad4YmdfymFRKOVQf8WXascrfGZTx3tBTY6RCIUSspBoKR7JXJ+ad0X6CAOkG1Tr+ QTCckLnBLfUxVZeUjGD3jCkDzQBoWpLask3YpY9f0mDxdMDW04MeK0Kk2B6T7hESWCag=; Message-ID: <3783f629-c658-4f04-a1c0-f1429b84726e@xen.org> Date: Tue, 19 May 2026 09:05:12 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3] arm: Fix PT_PT table descriptor value and comment Content-Language: en-GB To: =?UTF-8?Q?Gabriel_Quint=C3=A1ns_Souto?= , xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, bertrand.marquis@arm.com, michal.orzel@amd.com References: <20260518210340.81347-1-gabi.qs.mail@gmail.com> From: Julien Grall In-Reply-To: <20260518210340.81347-1-gabi.qs.mail@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Gabriel, For the future, when sending a new version, please create a new thread rather than in reply to the latest response. On 18/05/2026 22:00, Gabriel Quintáns Souto wrote: > Per ARMv7-A/ARMv8-A ARM, bits [11:2] of table descriptors are > ignored by hardware. The original comment incorrectly described > block/page descriptor fields which are not present in table > descriptors. Do you have more details why this change? Is this to strictly follow the Arm Arm? In the ideal situation we should have the page table descriptors consistent between the assembly and the C version (see mfn_to_xen_entry()). They were diverging before and this is still diverging. If we are concerned about setting AF here, then we ought to modify the C versions as well. It could be done separately though. > > Use the minimal valid encoding for table descriptors by setting > PT_PT to 0x3. > > This updates both arm32 and arm64 for consistency. > > Signed-off-by: Gabriel Quintáns Souto Reviewed-by: Julien Grall Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Tue May 19 08:39:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 08:39:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312578.1582661 (Exim 4.92) (envelope-from ) id 1wPFzL-0001yZ-C3; Tue, 19 May 2026 08:39:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312578.1582661; Tue, 19 May 2026 08:39:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFzL-0001wD-8P; Tue, 19 May 2026 08:39:43 +0000 Received: by outflank-mailman (input) for mailman id 1312578; Tue, 19 May 2026 08:39:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPFzK-0001lU-Bl for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:39:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPFzJ-00CbtC-Nx for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:39:41 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c21ca-bab6-0a2a0a5309dd-0a2a45018a9a-28 for ; Tue, 19 May 2026 10:39:41 +0200 Received: from [209.85.218.43] (helo=mail-ej1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c21cd-c1f2-0a2a45010019-d155da2bc5c1-3 for ; Tue, 19 May 2026 10:39:41 +0200 Received: by mail-ej1-f43.google.com with SMTP id a640c23a62f3a-bd85ebb368fso379873466b.1 for ; Tue, 19 May 2026 01:39:41 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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However, it does not guard against d->shared_info being NULL. The shared_info() macro expands to a member access through d->shared_info, so when an architecture does not allocate a shared_info page the dereference triggers UBSAN: UBSAN: Undefined behaviour in common/domain.c:325:10 member access within null pointer of type 'struct shared_info_t' Extend the existing fallback condition to also cover the case where no shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info instead. This is the correct behaviour: dummy_vcpu_info already serves as the safe stand-in for vcpus that have no usable shared_info slot. Fixes: 295514ff75506 ("common: convert vCPU info area registration") Signed-off-by: Oleksii Kurochko Reviewed-by: Baptiste Le Duc --- RISC-V does not allocate a shared_info page at the momemnt because its guests run in dom0less mode and do not use the Xen PV ABI, so d->shared_info remains NULL throughout domain lifetime. --- --- xen/common/domain.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..e64b7df9b704 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -320,7 +320,7 @@ void vcpu_info_reset(struct vcpu *v) struct domain *d = v->domain; v->vcpu_info_area.map = - ((v->vcpu_id < XEN_LEGACY_MAX_VCPUS) + ((v->vcpu_id < XEN_LEGACY_MAX_VCPUS && d->shared_info) ? (vcpu_info_t *)&shared_info(d, vcpu_info[v->vcpu_id]) : &dummy_vcpu_info); } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 08:39:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 08:39:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312576.1582651 (Exim 4.92) (envelope-from ) id 1wPFzK-0001li-Nl; Tue, 19 May 2026 08:39:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312576.1582651; Tue, 19 May 2026 08:39:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFzK-0001la-KZ; Tue, 19 May 2026 08:39:42 +0000 Received: by outflank-mailman (input) for mailman id 1312576; Tue, 19 May 2026 08:39:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPFzI-0001lI-R8 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:39:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPFzI-008Zic-6v for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:39:40 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c21c8-2eae-0a2a0a5409dd-0a2a45039dac-8 for ; Tue, 19 May 2026 10:39:40 +0200 Received: from [209.85.218.49] (helo=mail-ej1-f49.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c21ca-672d-0a2a45030019-d155da31b5d0-3 for ; Tue, 19 May 2026 10:39:38 +0200 Received: by mail-ej1-f49.google.com with SMTP id a640c23a62f3a-bd8f9889a8cso192657366b.1 for ; Tue, 19 May 2026 01:39:38 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This patch series resolves the found issues. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2536470604 Oleksii Kurochko (3): xen/riscv: fix switch_stack_and_jump() xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() xen/libfdt: fix UBSAN null pointer in fdt_property() xen/arch/riscv/include/asm/current.h | 10 +++++----- xen/common/domain.c | 2 +- xen/common/libfdt/fdt_sw.c | 3 ++- 3 files changed, 8 insertions(+), 7 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 08:39:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 08:39:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312577.1582655 (Exim 4.92) (envelope-from ) id 1wPFzK-0001od-VK; Tue, 19 May 2026 08:39:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312577.1582655; Tue, 19 May 2026 08:39:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFzK-0001oV-RS; Tue, 19 May 2026 08:39:42 +0000 Received: by outflank-mailman (input) for mailman id 1312577; Tue, 19 May 2026 08:39:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPFzJ-0001lN-4T for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:39:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPFzI-00CbtC-Fy for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:39:40 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c21ca-bab6-0a2a0a5309dd-0a2a45018a9a-22 for ; Tue, 19 May 2026 10:39:40 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c21cc-c1f2-0a2a45010019-d155da35a5c4-3 for ; Tue, 19 May 2026 10:39:40 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bd2e8931915so818301366b.1 for ; Tue, 19 May 2026 01:39:40 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bd4f4c2a0dasm689854066b.19.2026.05.19.01.39.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 19 May 2026 01:39:39 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779179980; x=1779784780; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mN0HIj7hPfFykJ64wvxm1nWm1JGJKJwdvn0hxtsjuhM=; b=ETaQEUEnQZUyQAs3rbO/Sg1DIHp6rgLcdAfF4Oh2H6bt1neKJNtVK7Fv8p7JQg6608 pvNl+0cCyc7A7RHkyJ6B8sWUN40i5sAZQzNEmYPR7t0vb151FQQDU3n2hW/OefxaJO2g Pawgtw8JWSvISqIgO48R+TttryKZi40wBxAvyWGsIvniqbShj6wNj54O4D6R5zdC4rEJ UnZMydGh0wSr0JWQmDTuC64IVcyEAEULll6qs2c9SQzHWZ3SdUkYaLJguGBG6L5rEYHH oaFpGwxxPzZ/wnEbSTm/v+AkSpBwaT32tlBaP7k4rn+REV9KzDMyvcWwpmcjJ+uZyqkj +kag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779179980; x=1779784780; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mN0HIj7hPfFykJ64wvxm1nWm1JGJKJwdvn0hxtsjuhM=; b=pslW0qkHtLj7Lgt/tYiz2pibtcN1bG24nxKkRsatVerya4xyYgkNVuIGtTfM7mURFO Lis28+5lGPq0Zwj4ZVvx9mvn3tNQ4ieYheUDdNUW0480JzqSMZTnl3DeKRyKaMdmEmC1 9bkRn6NTo06lZC3TBD6/KlbCz3GziU4N7IeBNBhkdS+kmib3RSs0bmY/ONy9a7JNoC6B I1XLuVDaKp7chrW4MQOJ1NTTTB5No9vsDAFoh4w/pD04AM29YdJFieZauM2CchN67zys onrEhxc4ZsbmZpV/uiMXLS9meGh32nLjA1S6hVpxMku7Ake8yNkZPx7Ci1VOnJbn1Uhi kvgA== X-Gm-Message-State: AOJu0YwwyPXL4Yq3sQRMy7cbAgeiL36thEs98W/MJ7bTMENZnpksxQET 7ibb5z7TVogvI5KBt2c8IEncgPwgVGHyckpNrue5B89IgRksP7lz9826wQqKqw== X-Gm-Gg: Acq92OGmOrK2LjzXJ/ATcYSVrWi1RsvyY69JC0vgmEfJedaS/d5AZeWoj95r+Kws/2/ zWabYVXx1EGMkLd4/gvJJ9h0aHxNvnsJI4zz5B2Qn8m2FIzqlrdZT3jvJnjf95+CFTuOyI5/IJU SLnqFIFrm8tSTHnIU11MnIQn+RqC9mBJ6qkdfbtvKiN9cTpwzzS/TYyLODSoEpBwXiE8XhACoVy lwjkFTEIzBChoUWLtNo/DR3V4krOlc6ajEtAunHUXQV2J7ZE613sjJ4aZKjYn03rqlEny9s6idl 3JqEkvRJ9Wqjn2UzRE1LOdO4SV8mUseiocrxv7MaBHTzrqHaYV3iHGz6y4BuULi8DCJ6GG1SNAG xAX0vSOz2b+qW/w5nEstDYt1DtYSyWT6ek+BaXsx/iv0hatMtQk4xJNcxaYIKZUYORi/rlfR4Px hGTZs/imkmztMX10p5+7wqkC3Pb49ZA2Tgc8lxrxb3zdfno7kUtBrc9jKrTRN0oA5lbQ== X-Received: by 2002:a17:907:940d:b0:bd4:f2c7:25e2 with SMTP id a640c23a62f3a-bd51534c830mr839814166b.5.1779179979517; Tue, 19 May 2026 01:39:39 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Baptiste Le Duc , Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v1 1/3] xen/riscv: fix switch_stack_and_jump() Date: Tue, 19 May 2026 10:39:26 +0200 Message-ID: <1ac102874c8f7190ea09787a035692b03e4b46cf.1779179301.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779179980-B6143FF4-F7C4C7EB/10/73395122804 X-purgate-type: spam X-purgate-size: 2802 The following compilation issue occurs when UBSAN related stuff is enabled: prelink.o: in function `smp_processor_id': /build/xen/./arch/riscv/include/asm/current.h:46:(.init.text+0x274e2): relocation truncated to fit: R_RISCV_JAL against `init_done' make[2]: *** [arch/riscv/Makefile:45: xen-syms] Error 1 The switch_stack_and_jump macro uses "j " #fn which assembles to JAL x0, init_done is a RISC-V J-type instruction with only ±1MB range. Without UBSAN, .init.text is small enough that init_done (which lives in .text, not .init.text) is within 1MB of the JAL. With UBSAN enabled, all the instrumentation calls bloat .init.text well past 1MB, so init_done is now >1MB away from the JAL. The linker tries to truncate the 20-bit J-type offset and fails. The linker confusingly attributes the error to smp_processor_id:46 because the compiler inlines that function into the same init function that ends with switch_stack_and_jump, and the debug info places the JAL within that inlined scope. Note that the `tail` instruction looks more natural here, but the `jr` instruction is chosen instead to avoid depending on how the assembler expands the `tail` instruction and which register it uses as a scratch area (`t1` in the case of GAS), which would then need to be listed in the clobber section of `asm volatile`. Fixes: e66003e7be199 ("xen/riscv: introduce setup_initial_pages") Signed-off-by: Oleksii Kurochko Reviewed-by: Baptiste Le Duc --- xen/arch/riscv/include/asm/current.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 5fbee8182caa..cc004670d18c 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -51,11 +51,11 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define vcpu_guest_cpu_user_regs(vcpu) \ (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) -#define switch_stack_and_jump(stack, fn) do { \ - asm volatile ( \ - "mv sp, %0\n" \ - "j " #fn :: "r" (stack), "X" (fn) : "memory" ); \ - unreachable(); \ +#define switch_stack_and_jump(stack, fn) do { \ + asm volatile ( \ + "mv sp, %0\n" \ + "jr %1" :: "r" (stack), "r" (fn) : "memory" ); \ + unreachable(); \ } while ( false ) #define get_per_cpu_offset() __per_cpu_offset[smp_processor_id()] -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 08:39:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 08:39:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312579.1582678 (Exim 4.92) (envelope-from ) id 1wPFzM-0002ON-JV; Tue, 19 May 2026 08:39:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312579.1582678; Tue, 19 May 2026 08:39:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPFzM-0002OG-Fn; Tue, 19 May 2026 08:39:44 +0000 Received: by outflank-mailman (input) for mailman id 1312579; Tue, 19 May 2026 08:39:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPFzL-0001ss-9p for xen-devel@lists.xenproject.org; Tue, 19 May 2026 08:39:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPFzK-008Zic-Lu for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:39:42 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c21bd-2eae-0a2a0a5409dd-0a2a450ab5b8-44 for ; Tue, 19 May 2026 10:39:42 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c21ce-56b3-0a2a450a0019-d155da2fd44c-3 for ; Tue, 19 May 2026 10:39:42 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bd9a71b565aso58907866b.0 for ; Tue, 19 May 2026 01:39:42 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This is a legitimate calling convention for adding empty FDT properties such as "interrupt-controller", which carry no payload. In Xen, memcpy() maps to __builtin_memcpy(). The compiler treats __builtin_memcpy as nonnull on its pointer arguments, so UBSAN fires before it can observe that len is zero: UBSAN: Undefined behaviour in common/libfdt/fdt_sw.c:333:2 null pointer passed as argument 2, declared with nonnull attribute Guard the memcpy() with a check on len so it is skipped entirely when there is no payload to copy, bringing the code in line with the nonnull contract. Fixes: f0ea06558068 ("libfdt: add version 1.3.0") Signed-off-by: Oleksii Kurochko Reviewed-by: Baptiste Le Duc --- xen/common/libfdt/fdt_sw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/common/libfdt/fdt_sw.c b/xen/common/libfdt/fdt_sw.c index 4c569ee7eb0d..96d4cf571319 100644 --- a/xen/common/libfdt/fdt_sw.c +++ b/xen/common/libfdt/fdt_sw.c @@ -330,7 +330,8 @@ int fdt_property(void *fdt, const char *name, const void *val, int len) ret = fdt_property_placeholder(fdt, name, len, &ptr); if (ret) return ret; - memcpy(ptr, val, len); + if (len) + memcpy(ptr, val, len); return 0; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 08:49:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 08:49:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312610.1582687 (Exim 4.92) (envelope-from ) id 1wPG8a-00057G-El; Tue, 19 May 2026 08:49:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312610.1582687; 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bh=CdU8KP8Law14UPZzsFBMa2+++QIUhEUyVlkbL0ovslo=; b=bt8ZVBK3SKaTc5B9P/vysZrFb7AQeDkFmg1p8Nu+xRxQzMH4Htcgh4LiDFmwzbMQyIUED5sFH5/37Sd+IGAaKAaTU4aexTKMNswZ23vZLYj+qGM6QQapEO59NL6HqwTqsnuFOiSbjraTV7R6zeZpOtDWY0jMs+1BICpGU6sWb98= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Tue, 19 May 2026 10:49:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/3] xen/libfdt: fix UBSAN null pointer in fdt_property() To: Oleksii Kurochko , CC: Baptiste Le Duc , Stefano Stabellini , Julien Grall , Bertrand Marquis References: <0addc679de64cb59b28cf49ba3d39d17443d1ac8.1779179301.git.oleksii.kurochko@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0addc679de64cb59b28cf49ba3d39d17443d1ac8.1779179301.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 3ARutpuTfTNvNt6VMfDLk+VvM+s8uwl8GTZMfLNh1DkuYpB12XoowRTarbYZuGtDC4I+xiXtzGwhHNIFq6L2MWz9b43H7rKNrSoezu5XFesL+hKNcsqWWkxseHwRmO6s0VwS1eUNmGaBHwPg9osB3ELnWGISmMm3ZsbMb5PmBFBl+axHc10yUtVvLJJ53scpt+9I1XwxJHB4s3DT55/t53Rar9U9LVdTJ4bDDzRTN/YRDQCQ/eHIu6FHqA/zhlxyPRRLmUZMWu9XsA8jdaLVdowSTZjcorSrobrUvyclTRdhJhKqTRq2TI4SX0A09VaJPRbQDdz+bvn3H2QyY8CB0inS4R75wG7dSdGvKaHeP7NIqwZGC4tynlIsRU8fiEx/w0AcvuBWEDeGmgGY5q7W/eu93qfAeEtkX8kuJtnsq506QWuuKCKg4gmixu1PD9V/ X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 08:49:09.2464 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2cdca3c5-9351-4cd9-409d-08deb5837e08 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF00000148.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB9740 X-purgate-ID: tlsNG-42698a/1779180553-1BF7EF3B-7A759B5C/10/73395122804 X-purgate-type: spam X-purgate-size: 1775 Hi Oleksii, We treat libfdt as external library and we don't accept any edits here prior to first sending a fix to libfdt and then cherry-picking a patch (in fact, afacit we then do the libfdt version update). ~Michal On 19-May-26 10:39, Oleksii Kurochko wrote: > fdt_property() unconditionally calls memcpy(ptr, val, len) even when > len is zero and val is NULL. This is a legitimate calling convention > for adding empty FDT properties such as "interrupt-controller", which > carry no payload. > > In Xen, memcpy() maps to __builtin_memcpy(). The compiler treats > __builtin_memcpy as nonnull on its pointer arguments, so UBSAN fires > before it can observe that len is zero: > UBSAN: Undefined behaviour in common/libfdt/fdt_sw.c:333:2 > null pointer passed as argument 2, declared with nonnull > attribute > > Guard the memcpy() with a check on len so it is skipped entirely when > there is no payload to copy, bringing the code in line with the > nonnull contract. > > Fixes: f0ea06558068 ("libfdt: add version 1.3.0") > Signed-off-by: Oleksii Kurochko > Reviewed-by: Baptiste Le Duc > --- > xen/common/libfdt/fdt_sw.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/xen/common/libfdt/fdt_sw.c b/xen/common/libfdt/fdt_sw.c > index 4c569ee7eb0d..96d4cf571319 100644 > --- a/xen/common/libfdt/fdt_sw.c > +++ b/xen/common/libfdt/fdt_sw.c > @@ -330,7 +330,8 @@ int fdt_property(void *fdt, const char *name, const void *val, int len) > ret = fdt_property_placeholder(fdt, name, len, &ptr); > if (ret) > return ret; > - memcpy(ptr, val, len); > + if (len) > + memcpy(ptr, val, len); > return 0; > } > From xen-devel-bounces@lists.xenproject.org Tue May 19 09:17:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:17:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312623.1582696 (Exim 4.92) (envelope-from ) id 1wPGZP-00013X-KW; Tue, 19 May 2026 09:16:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312623.1582696; Tue, 19 May 2026 09:16:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGZP-00013Q-Hd; Tue, 19 May 2026 09:16:59 +0000 Received: by outflank-mailman (input) for mailman id 1312623; Tue, 19 May 2026 09:16:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPGZO-00013K-AV for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:16:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPGZN-0063tq-M8 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:16:57 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c2a81-5cb7-0a2a0a5109dd-0a2a4508a894-26 for ; Tue, 19 May 2026 11:16:57 +0200 Received: from [209.85.218.52] (helo=mail-ej1-f52.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c2a89-63b5-0a2a45080019-d155da34a5d4-3 for ; Tue, 19 May 2026 11:16:57 +0200 Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-bd2e8931915so827525166b.1 for ; Tue, 19 May 2026 02:16:57 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Thanks for clarifying that. Just to be sure I don't confuse something. According to the commit ...: commit ad9cf6bde5b90d4c1e5a79a2803e98d6344c27d7 Author: Vikram Garhwal Date: Thu Nov 11 23:27:20 2021 -0800 Update libfdt to v1.6.1 Update libfdt to v1.6.1 of libfdt taken from git://github.com/dgibson/dtc. This update is done to support device tree overlays. ... I have to send this patch to git://github.com/dgibson/dtc, right? ~ Oleksii > On 19-May-26 10:39, Oleksii Kurochko wrote: >> fdt_property() unconditionally calls memcpy(ptr, val, len) even when >> len is zero and val is NULL. This is a legitimate calling convention >> for adding empty FDT properties such as "interrupt-controller", which >> carry no payload. >> >> In Xen, memcpy() maps to __builtin_memcpy(). The compiler treats >> __builtin_memcpy as nonnull on its pointer arguments, so UBSAN fires >> before it can observe that len is zero: >> UBSAN: Undefined behaviour in common/libfdt/fdt_sw.c:333:2 >> null pointer passed as argument 2, declared with nonnull >> attribute >> >> Guard the memcpy() with a check on len so it is skipped entirely when >> there is no payload to copy, bringing the code in line with the >> nonnull contract. >> >> Fixes: f0ea06558068 ("libfdt: add version 1.3.0") >> Signed-off-by: Oleksii Kurochko >> Reviewed-by: Baptiste Le Duc >> --- >> xen/common/libfdt/fdt_sw.c | 3 ++- >> 1 file changed, 2 insertions(+), 1 deletion(-) >> >> diff --git a/xen/common/libfdt/fdt_sw.c b/xen/common/libfdt/fdt_sw.c >> index 4c569ee7eb0d..96d4cf571319 100644 >> --- a/xen/common/libfdt/fdt_sw.c >> +++ b/xen/common/libfdt/fdt_sw.c >> @@ -330,7 +330,8 @@ int fdt_property(void *fdt, const char *name, const void *val, int len) >> ret = fdt_property_placeholder(fdt, name, len, &ptr); >> if (ret) >> return ret; >> - memcpy(ptr, val, len); >> + if (len) >> + memcpy(ptr, val, len); >> return 0; >> } >> > From xen-devel-bounces@lists.xenproject.org Tue May 19 09:27:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:27:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312638.1582705 (Exim 4.92) (envelope-from ) id 1wPGj0-0002sO-I9; Tue, 19 May 2026 09:26:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312638.1582705; Tue, 19 May 2026 09:26:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGj0-0002sH-Dc; Tue, 19 May 2026 09:26:54 +0000 Received: by outflank-mailman (input) for mailman id 1312638; Tue, 19 May 2026 09:26:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPGiz-0002sB-Cv for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:26:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPGiy-001Q1N-P6 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:26:52 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c2cce-2eae-0a2a0a5409dd-0a2a4509e726-42 for ; Tue, 19 May 2026 11:26:52 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c2cdc-2497-0a2a45090019-d155d036c9e3-3 for ; Tue, 19 May 2026 11:26:52 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-670ab084a39so7057140a12.3 for ; Tue, 19 May 2026 02:26:52 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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This still leaves it to the committer > to figure out which ones could go in earlier. What helps in this specific case > it that ... > >> [1] https://lore.kernel.org/xen-devel/cover.1778140240.git.oleksii.kurochko@gmail.com/T/#t > ... the remainder of this looks to be ready to go in now (and I intend to commit > that tomorrow). I will be more specific in the future and specify which patches can go in without waiting for the dependency patch series to be fully merged. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 09:27:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:27:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312643.1582713 (Exim 4.92) (envelope-from ) id 1wPGjs-0003Us-Os; Tue, 19 May 2026 09:27:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312643.1582713; Tue, 19 May 2026 09:27:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGjs-0003Ul-M9; Tue, 19 May 2026 09:27:48 +0000 Received: by outflank-mailman (input) for mailman id 1312643; Tue, 19 May 2026 09:27:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPGjr-0003PG-HM for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:27:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPGjq-00BKH8-Pt for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:27:46 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c2d11-bab6-0a2a0a5309dd-0a2a45099874-6 for ; Tue, 19 May 2026 11:27:46 +0200 Received: from [209.85.208.43] (helo=mail-ed1-f43.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c2d12-2497-0a2a45090019-d155d02badbe-3 for ; Tue, 19 May 2026 11:27:46 +0200 Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-6804e24803bso7498683a12.1 for ; Tue, 19 May 2026 02:27:46 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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To initialize >> this list, domain_p2m_set_allocation() may be called from construct_domU() >> in the common Dom0less code, so RISC-V provides an implementation and >> enables CONFIG_ARCH_PAGING_MEMPOOL unconditionally. >> >> Additionally, implement arch_{set,get}_paging_mempool_size(). They are >> not directly used yet, but are required to support the >> XEN_DOMCTL_{get,set}_paging_mempool_size hypercalls. >> >> Signed-off-by: Oleksii Kurochko > > Acked-by: Jan Beulich > with ... > >> --- a/xen/arch/riscv/p2m.c >> +++ b/xen/arch/riscv/p2m.c >> @@ -1606,3 +1606,27 @@ struct page_info *get_page_from_gfn(struct domain *d, unsigned long gfn, >> >> return p2m_get_page_from_gfn(p2m_get_hostp2m(d), _gfn(gfn), t); >> } >> + >> +int arch_set_paging_mempool_size(struct domain *d, uint64_t size) >> +{ >> + unsigned long pages = PFN_DOWN(size); >> + int rc; >> + >> + /* Non page-sized request or 32-bit overflow? */ >> + if ( pfn_to_paddr(pages) != size ) >> + return -EINVAL; >> + >> + spin_lock(&d->arch.paging.lock); >> + rc = p2m_set_allocation(d, pages, true); >> + spin_unlock(&d->arch.paging.lock); >> + >> + return rc; >> +} >> + >> +/* Return the size of the pool, in bytes. */ >> +int arch_get_paging_mempool_size(struct domain *d, uint64_t *size) >> +{ >> + *size = pfn_to_paddr(ACCESS_ONCE(d->arch.paging.total_pages)); > > ... the stray blank dropped from here. Will take care of this when committing. I would be happy with that. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 09:28:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:28:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312650.1582722 (Exim 4.92) (envelope-from ) id 1wPGkE-00043w-07; Tue, 19 May 2026 09:28:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312650.1582722; Tue, 19 May 2026 09:28:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGkD-00042t-So; Tue, 19 May 2026 09:28:09 +0000 Received: by outflank-mailman (input) for mailman id 1312650; Tue, 19 May 2026 09:28:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGkD-00042a-4h for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:28:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPGkC-00Cpd9-G8 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:28:08 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c2d13-2eae-0a2a0a5409dd-0a2a4501930a-48 for ; Tue, 19 May 2026 11:28:08 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c2d27-c1f2-0a2a45010019-d1558033ec05-3 for ; Tue, 19 May 2026 11:28:08 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48a7fe4f40bso40611415e9.0 for ; Tue, 19 May 2026 02:28:08 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779182888-AE143FF4-9F3BE07F/0/0 X-purgate-type: clean X-purgate-size: 1193 On 19.05.2026 10:39, Oleksii Kurochko wrote: > The following compilation issue occurs when UBSAN related stuff is enabled: > prelink.o: in function `smp_processor_id': > /build/xen/./arch/riscv/include/asm/current.h:46:(.init.text+0x274e2): > relocation truncated to fit: R_RISCV_JAL against `init_done' > make[2]: *** [arch/riscv/Makefile:45: xen-syms] Error 1 There's no init_done() as of yet. > The switch_stack_and_jump macro uses "j " #fn which assembles to > JAL x0, init_done is a RISC-V J-type instruction with only ±1MB range. > > Without UBSAN, .init.text is small enough that init_done (which lives in > .text, not .init.text) is within 1MB of the JAL. With UBSAN enabled, all > the instrumentation calls bloat .init.text well past 1MB, so init_done > is now >1MB away from the JAL. The linker tries to truncate the 20-bit > J-type offset and fails. .init.text is well below 64k right now. Are you telling us that it grows by more than a factor of 16 when UBSAN is enabled? IOW while the change may indeed be needed, I question this explanation. .text growth may matter as well, and e.g. .rodata (living between both sections) might also grow. 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1779182939-A9573161-27225067/10/73395122804 X-purgate-type: spam X-purgate-size: 2114 On 5/18/26 5:33 PM, Jan Beulich wrote: > On 08.05.2026 16:43, Oleksii Kurochko wrote: >> Implement construct_domain() function for RISC-V, which performs initial setup >> for the domain's first vCPU, loads the kernel, initrd, and device tree, >> and sets up guest CPU registers for boot. >> >> It also creates additional vCPUs up to max_vcpus and assigns the device tree >> address and boot cpuid in registers. >> >> Signed-off-by: Oleksii Kurochko > > Acked-by: Jan Beulich > with ... > >> --- /dev/null >> +++ b/xen/arch/riscv/domain-build.c >> @@ -0,0 +1,52 @@ >> +/* SPDX-License-Identifier: GPL-2.0-or-later */ >> + >> +#include >> +#include >> +#include >> +#include >> + >> +#include >> +#include >> + >> +int __init construct_domain(struct domain *d, struct kernel_info *kinfo) >> +{ >> + struct vcpu *v = d->vcpu[0]; >> + struct cpu_user_regs *regs = vcpu_guest_cpu_user_regs(v); >> + >> + BUG_ON(v->is_initialised); >> + >> + /* >> + * At the moment *_load() don't return value and will just panic() >> + * inside. >> + * TODO: it will be good to change that. >> + */ >> + kernel_load(kinfo); >> + initrd_load(kinfo, copy_to_guest_phys); >> + dtb_load(kinfo, copy_to_guest_phys); >> + >> + regs->sepc = kinfo->entry; >> + >> + /* Guest boot cpuid = 0 */ >> + regs->a0 = 0; >> + regs->a1 = kinfo->dtb_paddr; >> + >> + for ( unsigned int i = 1; i < d->max_vcpus; i++ ) >> + { >> + const struct vcpu *tmp_v = vcpu_create(d, i); >> + >> + if ( !tmp_v ) >> + { >> + printk("Failed to allocate %pd v%d\n", d, i); > > ... %u used here and ... > >> + break; >> + } >> + >> + dprintk(XENLOG_INFO, "Created vcpu %pv\n", tmp_v); > > ... this line preferably dropped. Can do when committing, provided you agree. I agree with these changes. Thanks a lot. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 09:37:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:37:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312675.1582750 (Exim 4.92) (envelope-from ) id 1wPGtU-0006nk-Cg; Tue, 19 May 2026 09:37:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312675.1582750; Tue, 19 May 2026 09:37:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPGtU-0006na-8D; Tue, 19 May 2026 09:37:44 +0000 Received: by outflank-mailman (input) for mailman id 1312675; Tue, 19 May 2026 09:37:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPGtT-0006nF-71 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:37:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPGtS-00BMV2-JC for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:37:42 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c2f52-2eae-0a2a0a5409dd-0a2a4503e3e8-40 for ; Tue, 19 May 2026 11:37:42 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c2f66-672d-0a2a45030019-d155802bb8ba-3 for ; Tue, 19 May 2026 11:37:42 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so39363405e9.2 for ; Tue, 19 May 2026 02:37:42 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779183462-36F42938-45DFF5D3/10/73395122804 X-purgate-type: spam X-purgate-size: 1792 On 19.05.2026 10:39, Oleksii Kurochko wrote: > vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside > the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, > and falls back to dummy_vcpu_info for vcpus beyond that limit. > > However, it does not guard against d->shared_info being NULL. The > shared_info() macro expands to a member access through d->shared_info, > so when an architecture does not allocate a shared_info page the > dereference triggers UBSAN: > UBSAN: Undefined behaviour in common/domain.c:325:10 > member access within null pointer of type 'struct shared_info_t' > > Extend the existing fallback condition to also cover the case where no > shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info > instead. This is the correct behaviour: dummy_vcpu_info already serves > as the safe stand-in for vcpus that have no usable shared_info slot. > > Fixes: 295514ff75506 ("common: convert vCPU info area registration") I question this, largely (but not only) because I also ... > Signed-off-by: Oleksii Kurochko > Reviewed-by: Baptiste Le Duc > --- > RISC-V does not allocate a shared_info page at the momemnt because its > guests run in dom0less mode and do not use the Xen PV ABI, so > d->shared_info remains NULL throughout domain lifetime. ... question this mode of operation. Yes, you may (for now) be able to get away without, but e.g. event channels will want supporting at some point. Which will require a shared info page. Better put that in place right away, even if the guests you test with don't use it (yet). Certain other common code also assumes d->shared_info to never be NULL for an alive domain. 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pr=C Message-ID: <8ade5ff1-a702-4a91-b596-a98833716c20@amd.com> Date: Tue, 19 May 2026 11:37:29 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 3/3] xen/libfdt: fix UBSAN null pointer in fdt_property() To: Oleksii Kurochko , CC: Baptiste Le Duc , Stefano Stabellini , Julien Grall , Bertrand Marquis References: <0addc679de64cb59b28cf49ba3d39d17443d1ac8.1779179301.git.oleksii.kurochko@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B073:EE_|LV2PR12MB5870:EE_ X-MS-Office365-Filtering-Correlation-Id: 9291a555-0827-45d4-f68f-08deb58a3fd0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|36860700016|376014|82310400026|11063799006|4143699003|56012099003|22082099003|18002099003; X-Microsoft-Antispam-Message-Info: ZXDNwONUXgX3WCI94RFD7QNb773TI00wjEn2fntZ71nmveAd6wmOsCadeB6sTrMX6x6vtdD6k7Uo6pNjfay2egSfs9/q+3oAc+Zawl5GaIVEv3YHUA0DQp6IpEl1DFBoNV5lYmSwXZI8T2t75OhYqar9hbqxrLkSdob/qY4R0+4JiXH05EiizGxtN/bJX82ABgg9ck2Z+fJ9mKRIV24yU5FC/ZvhI/gdMDKS8u/txIqibHDJ86ioKbRDCCdPUG4FfmmTGvZCDEzxYEZLrBjS+OBw3sFD5c7CBF6ra1D+VKyi7kwFLo4ezEPAZnkatjzofxg/AVmLkb3NEq1eiDyChZycPYCdZMq3ivXjPrhFhohAlDkaNKZFam+knuvk71wzAMezLj3cD2MdbDm80ABFQXzMcgB76r9gcKCJDGNYDEVbhIBLXerqskLD5izo9BuS6y684lKFWUzwPeAAOGjutLAJesv1Eq60DBaXBqgYEFowgYgmTKWgJpIkvbQBNtRZ9EUayqncjdJnS25cXxPuTNM2+Rl+MSm0K3x2n+E7vMc8V2O/AK29mE2NOhnc5Ll2E9l0xBruCMO4HokDBR9JqhUjtH2NM4fgJELBfA5H5X9oE3Tht0j+sZ2JYOQBtgtjMYd6t2wPhgt/Jl+GRjCSGDG2wz1LfF6s3uHX7yifNHwyNLL2ZvM/3AKy+CO28BfVWSyWoQ1qbfJVge5eAsqPitgGSZDCGEFRekHR9XjTzDs= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(36860700016)(376014)(82310400026)(11063799006)(4143699003)(56012099003)(22082099003)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: U2ecZosUZaRwz4eSkkMNz9I3LOWFcdMpxSvwA25KDFg5M790w1f/qSGajbwkXOyYwratZRmxmmqa88pjuGcoLCsbQAW0z19IkqPTjkko58kz1+8y97MTRZmNk7JKJunCcCZLml1uBu1N/aLcJ0XiSDY5m/KPuORHT/dImLxRz0EWSBoRdoIBxBeLkmcIE1pyfsmu+FpM7mUoTFHe2AAJxzdelw2kyEiNy2sS9fEdYW7Qx06yaZVsZdVCfmEzxz8gjXrd+SxuXbZgqN/AiLrV2m5jp9oc87NUBHRr4ATdtRA5Rngv01JJaES7txoGp5vSC13VOMUU2IRfegMXJA7MPlD8wPA6e7QBwdMNcb3Wl42klxYU6PRyuaRMucP2eUfqZ2Gyq2N864eaJMgJr+2F+moUqpNQ3+ppOW6x+A4rXfc6OKdPHoBfWDPlGimE6nhr X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 09:37:31.3540 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 9291a555-0827-45d4-f68f-08deb58a3fd0 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B073.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5870 X-purgate-ID: tlsNG-c1860d/1779183456-BC766DB1-240C7391/0/0 X-purgate-type: clean X-purgate-size: 929 On 19-May-26 11:16, Oleksii Kurochko wrote: > Hi Michal, > > On 5/19/26 10:49 AM, Orzel, Michal wrote: >> Hi Oleksii, >> >> We treat libfdt as external library and we don't accept any edits here prior to >> first sending a fix to libfdt and then cherry-picking a patch (in fact, afacit >> we then do the libfdt version update). > > Thanks for clarifying that. > > Just to be sure I don't confuse something. > According to the commit ...: > > commit ad9cf6bde5b90d4c1e5a79a2803e98d6344c27d7 > Author: Vikram Garhwal > Date: Thu Nov 11 23:27:20 2021 -0800 > > Update libfdt to v1.6.1 > > Update libfdt to v1.6.1 of libfdt taken from > git://github.com/dgibson/dtc. > This update is done to support device tree overlays. > > ... I have to send this patch to git://github.com/dgibson/dtc, right? Yes, that's the main DTC/libfdt repository. ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 19 09:49:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:49:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312693.1582758 (Exim 4.92) (envelope-from ) id 1wPH4p-0000ac-Al; Tue, 19 May 2026 09:49:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312693.1582758; Tue, 19 May 2026 09:49:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPH4p-0000aV-8B; Tue, 19 May 2026 09:49:27 +0000 Received: by outflank-mailman (input) for mailman id 1312693; Tue, 19 May 2026 09:49:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPH4o-0000aP-HN for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:49:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPH4n-003buL-S4 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:49:25 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c321e-bab6-0a2a0a5309dd-0a2a4507e37a-42 for ; Tue, 19 May 2026 11:49:25 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c3225-229c-0a2a45070019-d1558036b92a-3 for ; Tue, 19 May 2026 11:49:25 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-48ff4f8ef0dso37744925e9.3 for ; Tue, 19 May 2026 02:49:25 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260518131404.3716969-6-ross.lagerwall@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779184165-2236CC48-77160299/0/0 X-purgate-type: clean X-purgate-size: 4088 On 18.05.2026 15:14, Ross Lagerwall wrote: > These aren't specific to SVM and will be used for emulator fast path so > move them to hvm.h. Some are SVM-specific, e.g. ... > --- a/xen/arch/x86/hvm/svm/svm.h > +++ b/xen/arch/x86/hvm/svm/svm.h > @@ -36,35 +36,6 @@ static inline void svm_invlpga(unsigned long linear, uint32_t asid) > asm volatile ( "invlpga" :: "a" (linear), "c" (asid) ); > } > > -/* > - * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main > - * opcode, shifted left to make room for the ModRM byte. > - * > - * The Grp7 instructions have their ModRM byte expressed in octal for easier > - * cross referencing with the opcode extension table. > - */ > -#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) > - > -#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) > -#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) > -#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) > -#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) > -#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ > -#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ > -#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ > -#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ > -#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ > -#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ > -#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ > -#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ ... the 7 ones above. > --- a/xen/arch/x86/include/asm/hvm/hvm.h > +++ b/xen/arch/x86/include/asm/hvm/hvm.h > @@ -851,6 +851,35 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) > alternative_vcall(hvm_funcs.sync_pir_to_irr, v); > } > > +/* > + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main > + * opcode, shifted left to make room for the ModRM byte. With all of this moved, the comment wants adjusting, at the very least by putting "e.g." in front of the function name. > + * The Grp7 instructions have their ModRM byte expressed in octal for easier > + * cross referencing with the opcode extension table. > + */ > +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) > + > +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) > +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) > +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) > +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) > +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ > +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ > +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ > +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ > +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ > +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ > +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ > +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ > +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ > +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) > +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) > +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) > +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) > +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) > +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) > + > #else /* CONFIG_HVM */ I further wonder whether putting this in hvm.h is a good idea. Is there anything wrong with using a brand new header, e.g. instr-enc.h? Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 09:54:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 09:54:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312703.1582768 (Exim 4.92) (envelope-from ) id 1wPHA3-0002AW-1d; Tue, 19 May 2026 09:54:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312703.1582768; Tue, 19 May 2026 09:54:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHA2-0002AP-V4; Tue, 19 May 2026 09:54:50 +0000 Received: by outflank-mailman (input) for mailman id 1312703; Tue, 19 May 2026 09:54:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHA1-0002AJ-C0 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 09:54:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPHA0-00BQ55-NR for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:54:48 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c335b-5cb7-0a2a0a5109dd-0a2a4507cffc-32 for ; Tue, 19 May 2026 11:54:48 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c3368-229c-0a2a45070019-d155802fb84a-3 for ; Tue, 19 May 2026 11:54:48 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488a88aeec9so39577045e9.2 for ; Tue, 19 May 2026 02:54:48 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260518131404.3716969-3-ross.lagerwall@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779184488-21364C48-AD335BCA/0/0 X-purgate-type: clean X-purgate-size: 1797 On 18.05.2026 15:13, Ross Lagerwall wrote: > This is like hvm_emulate_one_insn() but takes an existing > hvm_emulate_ctxt as a parameter. This will be needed to merge the > instruction emulator and VMEXIT fast paths. I'm yet to understand why this is necessary, but I'm afraid I don't consider the name very descriptive. Even hvm_emulate_one_insn2() or hvm_emulate_one_insn_ex() would come closer: You don't "emulate a context". > --- a/xen/arch/x86/hvm/io.c > +++ b/xen/arch/x86/hvm/io.c > @@ -53,27 +53,32 @@ void send_timeoffset_req(unsigned long timeoff) > bool hvm_emulate_one_insn(hvm_emulate_validate_t *validate, const char *descr) > { > struct hvm_emulate_ctxt ctxt; > - int rc; > > hvm_emulate_init_once(&ctxt, validate, descr, guest_cpu_user_regs()); > + return hvm_emulate_one_ctxt(&ctxt); > +} > > - switch ( rc = hvm_emulate_one(&ctxt, VIO_no_completion) ) > +bool hvm_emulate_one_ctxt(struct hvm_emulate_ctxt *ctxt) > +{ > + int rc = hvm_emulate_one(ctxt, VIO_no_completion); > + > + switch ( rc ) > { > case X86EMUL_UNHANDLEABLE: > - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); > + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); > return false; > > case X86EMUL_UNRECOGNIZED: > - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); > + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); > hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); > break; These two lines were already touched by patch 1. Afaict leaving the change out there will be fine, and hence will be overall less churn (plus following the lines' histories will be one step shorter). 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779185297-8AB8EA53-BDC9F6AE/0/0 X-purgate-type: clean X-purgate-size: 1741 On 18.05.2026 15:14, Ross Lagerwall wrote: > To support merging the emulated instruction and VMEXIT paths, split out > instruction completion from the core x86 emulation so it can be called > separately. You don't mean to use a full-fledged struct x86_emulate_ctxt on the VMEXIT paths, do you? > @@ -1265,8 +1281,6 @@ x86_emulate( > uint8_t b, d, *opc = NULL; > unsigned int first_byte = 0, elem_bytes, insn_bytes = 0; > uint64_t op_mask = ~0ULL; > - bool singlestep = (_regs.eflags & X86_EFLAGS_TF) && > - !is_branch_step(ctxt, ops); Nit: Yes, indentation was screwed here. Please ... > @@ -1280,6 +1294,9 @@ x86_emulate( > > init_context(ctxt); > > + ctxt->singlestep = (_regs.eflags & X86_EFLAGS_TF) && > + !is_branch_step(ctxt, ops); ... correct such when moving code around. > @@ -8347,17 +8364,6 @@ x86_emulate( > put_fpu(fpu_type, false, state, ctxt, ops); > fpu_type = X86EMUL_FPU_none; > > - /* Zero the upper 32 bits of %rip if not in 64-bit mode. */ > - if ( !mode_64bit() ) > - _regs.r(ip) = (uint32_t)_regs.r(ip); While, because you have the new helper update ctxt->regs, the removal of this update of _regs looks technically okay, ... > - /* Should a singlestep #DB be raised? */ > - if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss ) > - { > - ctxt->retire.singlestep = true; > - ctxt->retire.sti = false; > - } > - > if ( rc != X86EMUL_DONE ) > *ctxt->regs = _regs; ... further uses of _regs here (not this one, but in general) would be at risk of no longer working as expected (yet only in a corner case, so possibly not covered by testing). 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This ensures the selected architecture value is correctly propagated. No functional changes. Signed-off-by: Dmytro Prokopchuk --- automation/eclair_analysis/prepare.sh | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/automation/eclair_analysis/prepare.sh b/automation/eclair_anal= ysis/prepare.sh index e941e6edc4..fde83c2d2d 100755 --- a/automation/eclair_analysis/prepare.sh +++ b/automation/eclair_analysis/prepare.sh @@ -22,12 +22,10 @@ if [ $# -ne 1 ]; then exit 1 fi =20 -export XEN_TARGET_ARCH - if [ "$1" =3D "X86_64" ]; then - XEN_TARGET_ARCH=3Dx86_64 + export XEN_TARGET_ARCH=3Dx86_64 elif [ "$1" =3D "ARM64" ]; then - XEN_TARGET_ARCH=3Darm64 + export XEN_TARGET_ARCH=3Darm64 else fatal "Unknown configuration: $1" fi --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 10:32:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 10:32:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312736.1582826 (Exim 4.92) (envelope-from ) id 1wPHkZ-00013q-IB; Tue, 19 May 2026 10:32:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312736.1582826; Tue, 19 May 2026 10:32:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHkZ-00013j-FG; Tue, 19 May 2026 10:32:35 +0000 Received: by outflank-mailman (input) for mailman id 1312736; Tue, 19 May 2026 10:32:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHkY-00013X-GV for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:32:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPHkX-001efs-Or for xen-devel@lists.xenproject.org; Tue, 19 May 2026 12:32:33 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c3c3b-5cb7-0a2a0a5109dd-0a2a45049a84-42 for ; Tue, 19 May 2026 12:32:33 +0200 Received: from [209.85.221.47] (helo=mail-wr1-f47.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c3c41-1dec-0a2a45040019-d155dd2feccd-3 for ; Tue, 19 May 2026 12:32:33 +0200 Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-44a14580111so2484419f8f.0 for ; Tue, 19 May 2026 03:32:33 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8b3120f7302e591b2828cb77c5f903c84149d498.1779186401.git.dmytro_prokopchuk1@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1779186753-491763FF-4167DEF8/0/0 X-purgate-type: clean X-purgate-size: 985 On 19.05.2026 12:27, Dmytro Prokopchuk1 wrote: > Move XEN_TARGET_ARCH export into the architecture selection > branches instead of exporting the variable before assignment. > This ensures the selected architecture value is correctly > propagated. This reads as if something is being corrected, while ... > No functional changes. ... this says the opposite. Is the whole purpose ... > --- a/automation/eclair_analysis/prepare.sh > +++ b/automation/eclair_analysis/prepare.sh > @@ -22,12 +22,10 @@ if [ $# -ne 1 ]; then > exit 1 > fi > > -export XEN_TARGET_ARCH > - > if [ "$1" = "X86_64" ]; then > - XEN_TARGET_ARCH=x86_64 > + export XEN_TARGET_ARCH=x86_64 > elif [ "$1" = "ARM64" ]; then > - XEN_TARGET_ARCH=arm64 > + export XEN_TARGET_ARCH=arm64 > else > fatal "Unknown configuration: $1" > fi ... the reduction in line count then (at the expense of some redundancy, which would increase when further arches get put here)? Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 10:45:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 10:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312745.1582836 (Exim 4.92) (envelope-from ) id 1wPHws-00032S-Pt; Tue, 19 May 2026 10:45:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312745.1582836; Tue, 19 May 2026 10:45:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHws-00032L-Mz; Tue, 19 May 2026 10:45:18 +0000 Received: by outflank-mailman (input) for mailman id 1312745; Tue, 19 May 2026 10:45:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPHwr-00032F-0e for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:45:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPHwo-00Bb98-1k for xen-devel@lists.xenproject.org; Tue, 19 May 2026 12:45:14 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c3f33-2eae-0a2a0a5409dd-0a2a45038bda-26 for ; Tue, 19 May 2026 12:45:13 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c3f39-672d-0a2a45030019-a237832f88aa-3 for ; Tue, 19 May 2026 12:45:13 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 7B6764EE3CE1; Tue, 19 May 2026 12:45:13 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779187513; b=oYPeEcgGPUgB0qDvE2MeLkxbCXzkg1BwjUB3D0E6At9TNqJt8hPnMqVbpgWsNXhyIM8u rIKP03XE6xV+o+QtOYV/l4aA5Ju+euW//KL61gzQAJpflWejGN363kR4zdTxpRGk06R03 t55sz1VG1wq9hXzUKPwaKoxJPg3aeOesaUJMtNO1NMTeMIY+pCjDaSCMZomgBDHwXiS29 NK6Zx470cgUUDNskBjBjogHeEdV34Q8vZGwi6SPXNSZVvlhGUlGCo4wGOfl6kileq4hXi 9xcCpOz3rSco9Uma6bG9CqtxTYG+Wvtt0CrtnZYi3tbExsBGBxxoQYfn93Pl8v/HUkmbd l0gydEqOMYJGYEGM6ULjJIH9Xe4dTM0fka6+WxSKgjfbZhZOLSYtSydYr1RKFqIM0xVVA NSsts9XM9kH8xLb/uwb6QrzfJ48IFs+aofXWegp8hy1E9lcT0JgTMHJ/PLGUyZxi+lpKt WQYgU6Iu26fRX87KFCeOD5KDRCukwoWZyNj9ab7uDMGiipfylXafzR64oKPIME4SeJdEo yo7FVZii5w4cHXkTvGN2oIBe+7qp/0grmH8Sny/x5TvWVrBS6pCH7/7hMuo+8ftcbipuz Gm7ZgrqRHd18DDrv587saNCimczJqz2SSsfLR8nuSA9XhEAGeL3Be1il+XNJNZ0= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1779187513; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=l+pWLWhZltNhxfkU1Tbvx1ofcBWtjiktpSBSBMEySK4=; b=5tm1fckGJ377BtVajf74/ShqvWHVRI6lMFjWVS+JLTRAqdoiGUoLanQSWOfS0jio/1rz 1q2Iq3algm6F7fvuH1Fj5Domna5sEfnk6nlAvofLCulnq+Cr4RvxWiW462ysIzcfywVva 6MzkOLT5VpH1tg7RH5ZisoBFucwQfCA76cbrxLyLmJ5RmCvffQjFYTmPhA+9yR39I/SzT ggmHAMCr7g6BU+0Y/SdvxEZicG1c0UJ0ZWE1nCPKYSMlXYlTTcarhN1gQPqDiFJypjYrO DsfieXLBGa3K3wX97tVRb+PAOfH2/aruTleU0TvvS1bmYZlQ3lQkRwFYp9eAqsruGUD7k VjJV7uiMWCw4Rujf/N2eTg7v7k0pwjKrkT8eb5lyv9Nkbgh3dckiqJp6utURtTIV3I+1q eUq9c3VpbvJRZdwZgMAG2RezC4d2BdpaFxG8DaD12a2fud/6DzW56TgnH52Q4kdEX9f53 0ZvJ8+KWEE2WBT2hwljnARXjfAOAm1V2e6mIXFhf5QDFQtNzeRC2oEiw3G5aZfzeVdMaB LeKNYljg/bWDxJXYkF0xWajN3X+C0jFtTbhrWFCConXWvbXKsZyuszHNtatJf8RIoLLhg li0ArbQtMRns8ovB+lTLmiTPOOMRRgkUlCXcOF0c9bocuii9LCRPhRDyc1B4cPM= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Tue, 19 May 2026 12:45:13 +0200 From: Nicola Vetrini To: Dmytro Prokopchuk1 Cc: xen-devel@lists.xenproject.org, Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH] automation/eclair: export XEN_TARGET_ARCH during assignment In-Reply-To: <8b3120f7302e591b2828cb77c5f903c84149d498.1779186401.git.dmytro_prokopchuk1@epam.com> References: <8b3120f7302e591b2828cb77c5f903c84149d498.1779186401.git.dmytro_prokopchuk1@epam.com> Message-ID: <0700a54389d4071c7308b8eb3a52c9ab@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779187513-36F42938-9A059A16/0/0 X-purgate-type: clean X-purgate-size: 1429 On 2026-05-19 12:27, Dmytro Prokopchuk1 wrote: > Move XEN_TARGET_ARCH export into the architecture selection > branches instead of exporting the variable before assignment. > This ensures the selected architecture value is correctly > propagated. > Did you see a case where this is not correctly propagated? As far as I understand, the value of XEN_TARGET_ARCH seen by subprocesses is the last value set for the variable, regardless of where the export command is placed. > No functional changes. > > Signed-off-by: Dmytro Prokopchuk > --- > automation/eclair_analysis/prepare.sh | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/automation/eclair_analysis/prepare.sh > b/automation/eclair_analysis/prepare.sh > index e941e6edc4..fde83c2d2d 100755 > --- a/automation/eclair_analysis/prepare.sh > +++ b/automation/eclair_analysis/prepare.sh > @@ -22,12 +22,10 @@ if [ $# -ne 1 ]; then > exit 1 > fi > > -export XEN_TARGET_ARCH > - > if [ "$1" = "X86_64" ]; then > - XEN_TARGET_ARCH=x86_64 > + export XEN_TARGET_ARCH=x86_64 > elif [ "$1" = "ARM64" ]; then > - XEN_TARGET_ARCH=arm64 > + export XEN_TARGET_ARCH=arm64 > else > fatal "Unknown configuration: $1" > fi -- Nicola Vetrini, B.Sc. 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It was found based on downstream version of RISC-V port. > >> The switch_stack_and_jump macro uses "j " #fn which assembles to >> JAL x0, init_done is a RISC-V J-type instruction with only ±1MB range. >> >> Without UBSAN, .init.text is small enough that init_done (which lives in >> .text, not .init.text) is within 1MB of the JAL. With UBSAN enabled, all >> the instrumentation calls bloat .init.text well past 1MB, so init_done >> is now >1MB away from the JAL. The linker tries to truncate the 20-bit >> J-type offset and fails. > > .init.text is well below 64k right now. Are you telling us that it grows > by more than a factor of 16 when UBSAN is enabled? IOW while the change > may indeed be needed, I question this explanation. .text growth may matter > as well, and e.g. .rodata (living between both sections) might also grow. No, it won't grow so much. With UBSAN enabled: $ objdump -h xen/prelink.o xen/prelink.o: file format elf64-little Sections: Idx Name Size VMA LMA File off 0 .text 0011c79e 0000000000000000 0000000000000000 00000040 CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE 1 .init.text 000285fe 0000000000000000 0000000000000000 0011c7de CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE With UBSAN, .text itself is 0x11c79e ≈ 1.11 MiB — already exceeding the JAL range on its own. Even if .init.text directly followed .text (which it doesn't), a call from .init.text to a symbol near the start of .text would be ~1.11 MiB away. init_done likely sits somewhere specific within .text rather than at its very end, but add the .rodata + .data sections on top and the gap is comfortably past ±1 MiB. As a result, the target symbol init_done may end up outside the range supported by the R_RISCV_JAL relocation, which is limited to approximately ±1 MiB. Without UBSAN enabled: xen/prelink.o: file format elf64-little Sections: Idx Name Size VMA LMA File off 0 .text 00044618 0000000000000000 0000000000000000 00000040 CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE 1 .init.text 00012c72 0000000000000000 0000000000000000 00044658 CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE Does it make sense now? I can use the text above for commit message instead of what is mentioned now for more accuracy. Would it be better to send this patch when this issue will occur in upstream? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 10:55:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 10:55:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312760.1582854 (Exim 4.92) (envelope-from ) id 1wPI6S-0005Ol-Rv; Tue, 19 May 2026 10:55:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312760.1582854; Tue, 19 May 2026 10:55:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPI6S-0005Oe-P3; Tue, 19 May 2026 10:55:12 +0000 Received: by outflank-mailman (input) for mailman id 1312760; Tue, 19 May 2026 10:55:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPI6R-0005OY-NV for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:55:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPI6R-00CCcZ-3N for xen-devel@lists.xenproject.org; Tue, 19 May 2026 12:55:11 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c418c-5cb7-0a2a0a5109dd-0a2a4502d260-12 for ; Tue, 19 May 2026 12:55:11 +0200 Received: from [209.85.208.53] (helo=mail-ed1-f53.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c418e-af86-0a2a45020019-d155d035c1c8-3 for ; Tue, 19 May 2026 12:55:11 +0200 Received: by mail-ed1-f53.google.com with SMTP id 4fb4d7f45d1cf-6802f9c5debso8166411a12.3 for ; Tue, 19 May 2026 03:55:11 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The >> shared_info() macro expands to a member access through d->shared_info, >> so when an architecture does not allocate a shared_info page the >> dereference triggers UBSAN: >> UBSAN: Undefined behaviour in common/domain.c:325:10 >> member access within null pointer of type 'struct shared_info_t' >> >> Extend the existing fallback condition to also cover the case where no >> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >> instead. This is the correct behaviour: dummy_vcpu_info already serves >> as the safe stand-in for vcpus that have no usable shared_info slot. >> >> Fixes: 295514ff75506 ("common: convert vCPU info area registration") > > I question this, largely (but not only) because I also ... > >> Signed-off-by: Oleksii Kurochko >> Reviewed-by: Baptiste Le Duc >> --- >> RISC-V does not allocate a shared_info page at the momemnt because its >> guests run in dom0less mode and do not use the Xen PV ABI, so >> d->shared_info remains NULL throughout domain lifetime. > > ... question this mode of operation. Yes, you may (for now) be able to get > away without, but e.g. event channels will want supporting at some point. > Which will require a shared info page. Better put that in place right away, > even if the guests you test with don't use it (yet). Certain other common > code also assumes d->shared_info to never be NULL for an alive domain. > Would it be fine than to allocate it in arch_domain_create() ... : if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) goto fail; clear_page(d->shared_info); ... but without calling share_xen_page_with_guest() after that allocation as share_xen_page_with_guest() isn't implemented at the moment? Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 10:55:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 10:55:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312765.1582863 (Exim 4.92) (envelope-from ) id 1wPI78-0005qm-40; Tue, 19 May 2026 10:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312765.1582863; Tue, 19 May 2026 10:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPI78-0005qe-0j; Tue, 19 May 2026 10:55:54 +0000 Received: by outflank-mailman (input) for mailman id 1312765; Tue, 19 May 2026 10:55:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPI77-0005qY-67 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 10:55:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPI76-00BpU3-CR for xen-devel@lists.xenproject.org; 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On one of my builds > I've seen: > > DW_AT_name : (indirect string, offset: 0x3c45): exception_table_entry > DW_AT_declaration : 1 > <1>: Abbrev Number: 5 (DW_TAG_const_type) > DW_AT_type : <0xb617> > <1>: Abbrev Number: 14 (DW_TAG_pointer_type) > DW_AT_byte_size : 8 > > Instead of assuming such order, explicitly search for the DW_AT_byte_size tag > when a match in the DW_AT_name one is found. > > Signed-off-by: Roger Pau Monné Reviewed-by: Ross Lagerwall Thanks From xen-devel-bounces@lists.xenproject.org Tue May 19 11:03:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:03:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312778.1582872 (Exim 4.92) (envelope-from ) id 1wPIE5-0007vG-Sd; Tue, 19 May 2026 11:03:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312778.1582872; Tue, 19 May 2026 11:03:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIE5-0007v9-Q2; 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arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Tue, 19 May 2026 13:09:31 +0200 From: Nicola Vetrini To: Dmytro Prokopchuk1 Cc: xen-devel@lists.xenproject.org, Doug Goldstein , Stefano Stabellini Subject: Re: [PATCH] automation/eclair: export XEN_TARGET_ARCH during assignment In-Reply-To: <50f31733-3048-4512-af12-50dd9ba3cf8c@epam.com> References: <8b3120f7302e591b2828cb77c5f903c84149d498.1779186401.git.dmytro_prokopchuk1@epam.com> <0700a54389d4071c7308b8eb3a52c9ab@bugseng.com> <50f31733-3048-4512-af12-50dd9ba3cf8c@epam.com> Message-ID: <40a468313da350be8b60df32a7c58083@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779188972-B474CFF4-FD1ED1B9/0/0 X-purgate-type: clean X-purgate-size: 2002 On 2026-05-19 13:03, Dmytro Prokopchuk1 wrote: > Hello Nicola, > > On 5/19/26 13:45, Nicola Vetrini wrote: >> On 2026-05-19 12:27, Dmytro Prokopchuk1 wrote: >>> Move XEN_TARGET_ARCH export into the architecture selection >>> branches instead of exporting the variable before assignment. >>> This ensures the selected architecture value is correctly >>> propagated. >>> >> >> Did you see a case where this is not correctly propagated? As far as I > I didn't see a case. >> understand, the value of XEN_TARGET_ARCH seen by subprocesses is the >> last value set for the variable, regardless of where the export >> command >> is placed. > Yes, you are right. It works in that way. > IMO, exporting empty variable looks strange... > > Anyway up to you to judge if this patch is needed or not. > Indeed it is a bit strange. To avoid this we should perhaps move the export after the if, so that it is obvious that it contains the correct value > BR, Dmytro. >>> No functional changes. >>> >>> Signed-off-by: Dmytro Prokopchuk >>> --- >>>  automation/eclair_analysis/prepare.sh | 6 ++---- >>>  1 file changed, 2 insertions(+), 4 deletions(-) >>> >>> diff --git a/automation/eclair_analysis/prepare.sh b/automation/ >>> eclair_analysis/prepare.sh >>> index e941e6edc4..fde83c2d2d 100755 >>> --- a/automation/eclair_analysis/prepare.sh >>> +++ b/automation/eclair_analysis/prepare.sh >>> @@ -22,12 +22,10 @@ if [ $# -ne 1 ]; then >>>    exit 1 >>>  fi >>> >>> -export XEN_TARGET_ARCH >>> - >>>  if [ "$1" = "X86_64" ]; then >>> -  XEN_TARGET_ARCH=x86_64 >>> +  export XEN_TARGET_ARCH=x86_64 >>>  elif [ "$1" = "ARM64" ]; then >>> -  XEN_TARGET_ARCH=arm64 >>> +  export XEN_TARGET_ARCH=arm64 >>>  else >>>    fatal "Unknown configuration: $1" >>>  fi >> -- Nicola Vetrini, B.Sc. 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-68310b4069dsm6303182a12.1.2026.05.19.04.22.38 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 19 May 2026 04:22:39 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:Content-Language:References:Cc:To:From:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779189760; x=1779794560; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id:from:to :cc:subject:date:message-id:reply-to; bh=PgFiqEWjNufsJ8px8sHsLEdCGgRsHES8u9NiutjzCzc=; b=H2/BMQ+Kwpo5E6XgYL2ocLNcvRcXzZp3lRAnjBhGLrBE7Y22hQ7e6WZb69FdNg0Edx WOHrmpjvQWSEyPfWOMz6rga+jA39REcDR+6smwPaiSzWf9E4fUSeb/YjljdUCFHpGWl0 oPLUd5iuXkggtsjJS+Twm9w7HxlURQ987GIYGgrZ0bjW1g5AeTrXPZsDUOxYu8NclP80 X0+bQwhfHb7+HEtShBjmXIVhMjQk/YopPXqMZuqxk7kOwuSRnYunv4afXCb4HyyfitP4 GA3+OTlZRdUbCz2fulSUpjibAUijrfEVeQzeokf/w6K6Qh1FuU5Ucu2uAHCca9MTmEeR JNwA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779189760; x=1779794560; h=content-transfer-encoding:in-reply-to:content-language:references :cc:to:from:subject:user-agent:mime-version:date:message-id:x-gm-gg :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=PgFiqEWjNufsJ8px8sHsLEdCGgRsHES8u9NiutjzCzc=; b=Uoi1gGT5ILwL+jw1NaKIkEW5Po7pP4m2j6XOzqpePu9XOysvQS6SG6MiQen5USari9 AQBVPDcWhYCjXXy6J6QHOlYx7PztOesvvomkg3KQLzd5P2L7+lLFj8dcADBIslh/Jwf/ PQxdQD43wMA5VdhLqDk9IMZTTK/Q5wqUGkjVPwDvFGdutolLseCWkPIBPmgYqmCkole6 oe3rkqOU0XjdeUmKAF0WBiUWC1JEQtuTHAqV87jsE/oIRfkEBaNPvTgWkJVKMJzLTzJt WFCUSsN6ffe3y0HWtYVIZx8zp1BD9Id95+c8iMBHcPvMerBx8Qn21/ZboN9L8sJPlwoT LYEw== X-Forwarded-Encrypted: i=1; AFNElJ/sXss/O1O+1Fy0hFCi82VidNXsz5rbZmarlTn0AvlJbBZqXyuwLSE7hC3C+f2uZTnhsEjGEcroeck=@lists.xenproject.org X-Gm-Message-State: AOJu0YyqM8ARy7xXhZkMCWwfsDCmVhLMv7wAp1ENWhdxU50S33SSEVPp 7HsiAOneGbqDarPeER9F11CmO5vebCV6u/7nURkbrAt9jptzhUHL4Lo2 X-Gm-Gg: Acq92OFOLRMKIc5Tc/SHQ2mXT/sWA7UBSYl0Uhhi2Ov1DCc6yZgR6t1QgOJa/nYfQ18 zI+1CHaJM/blUfZ9D5yCx6foEsP3h2gYiQHPAvpQIumexu9+banpiQSryn0MiiZZ+TQnPWlnuEA oVFd+611uMYN0ttLtCds3DtMsbxt/RfKi0nhm9BIuO5Pj8uMVyVXlfCUuXi4Pdbud5lSqTRp3cZ s+MjWf6nYi8HR8YwrDoVc4nm87BebBIG4A/tqSYeMf9FsewkQKO1B6T6QbPuYtET2BkB22PEUAT DSCwHEN0TKUJrY2jz/CDsi1W8OqnSLKmB+0hNBXxK4aYShhw7XVNlYoPVISBk+8b9qVDRSvFXsE bB4nYB1fPIIEhRGfRcDaNvuCcGA38x3vIaRiLsG1oqZMCVFmI28gVmmVd+vqvFsDBIvR1tbCBnZ grYAyAmMs4cMMpEFzAs3zESPa5niQ2bAe7U8AUVOMrJn9Gz+hynKJNT7g4ulEnumOM8TnN4luE4 08= X-Received: by 2002:a05:6402:3241:b0:681:5b59:648a with SMTP id 4fb4d7f45d1cf-683bc6b7ed1mr7201586a12.11.1779189759888; Tue, 19 May 2026 04:22:39 -0700 (PDT) Message-ID: Date: Tue, 19 May 2026 13:22:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() From: Oleksii Kurochko To: Jan Beulich Cc: Baptiste Le Duc , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> <2be07ba3-879b-4c79-8103-b4951ab4cf53@suse.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779189760-8A18BA53-3B91C3CE/10/73395122804 X-purgate-type: spam X-purgate-size: 2640 On 5/19/26 12:55 PM, Oleksii Kurochko wrote: > > > On 5/19/26 11:37 AM, Jan Beulich wrote: >> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>> >>> However, it does not guard against d->shared_info being NULL.  The >>> shared_info() macro expands to a member access through d->shared_info, >>> so when an architecture does not allocate a shared_info page the >>> dereference triggers UBSAN: >>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>    member access within null pointer of type 'struct shared_info_t' >>> >>> Extend the existing fallback condition to also cover the case where no >>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>> as the safe stand-in for vcpus that have no usable shared_info slot. >>> >>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >> >> I question this, largely (but not only) because I also ... >> >>> Signed-off-by: Oleksii Kurochko >>> Reviewed-by: Baptiste Le Duc >>> --- >>> RISC-V does not allocate a shared_info page at the momemnt because its >>> guests run in dom0less mode and do not use the Xen PV ABI, so >>> d->shared_info remains NULL throughout domain lifetime. >> >> ... question this mode of operation. Yes, you may (for now) be able to >> get >> away without, but e.g. event channels will want supporting at some point. >> Which will require a shared info page. Better put that in place right >> away, >> even if the guests you test with don't use it (yet). Certain other common >> code also assumes d->shared_info to never be NULL for an alive domain. >> > > Would it be fine than to allocate it in arch_domain_create() ... : > >     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >         goto fail; > >     clear_page(d->shared_info); > > ... but without calling share_xen_page_with_guest() after that > allocation as share_xen_page_with_guest() isn't implemented at the moment? Or could it be an option for all arch-s move allocation of d->shared_info to domain_create() in common just after arch_domain_create()? The only question if share_xen_page_with_guest() could be ifdef-ed somehow so not to block new ports to implement it from the start. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 11:32:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:32:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312802.1582898 (Exim 4.92) (envelope-from ) id 1wPIga-00059U-Ck; Tue, 19 May 2026 11:32:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312802.1582898; Tue, 19 May 2026 11:32:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIga-00059N-AD; Tue, 19 May 2026 11:32:32 +0000 Received: by outflank-mailman (input) for mailman id 1312802; Tue, 19 May 2026 11:32:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPIgZ-00059G-CX for xen-devel@lists.xenproject.org; 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Message-ID: Date: Tue, 19 May 2026 12:32:22 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Baptiste Le Duc , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 2/3] xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() To: Oleksii Kurochko , Jan Beulich References: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> <2be07ba3-879b-4c79-8103-b4951ab4cf53@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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This is the correct behaviour: dummy_vcpu_info already serves >>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>> >>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>> >>> I question this, largely (but not only) because I also ... >>> >>>> Signed-off-by: Oleksii Kurochko >>>> Reviewed-by: Baptiste Le Duc >>>> --- >>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>> d->shared_info remains NULL throughout domain lifetime. >>> >>> ... question this mode of operation. Yes, you may (for now) be able >>> to get >>> away without, but e.g. event channels will want supporting at some >>> point. >>> Which will require a shared info page. Better put that in place >>> right away, >>> even if the guests you test with don't use it (yet). Certain other >>> common >>> code also assumes d->shared_info to never be NULL for an alive domain. >>> >> >> Would it be fine than to allocate it in arch_domain_create() ... : >> >>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>          goto fail; >> >>      clear_page(d->shared_info); >> >> ... but without calling share_xen_page_with_guest() after that >> allocation as share_xen_page_with_guest() isn't implemented at the >> moment? > > Or could it be an option for all arch-s move allocation of > d->shared_info to domain_create() in common just after > arch_domain_create()? > > The only question if share_xen_page_with_guest() could be ifdef-ed > somehow so not to block new ports to implement it from the start. shared_info is an x86-PV-ism which escaped into HVM and then infected ARM too. Sadly it's ABI there, but this is one of many areas where I really want RISC-V not to inherit the mistakes of prior ports. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 11:33:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:33:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312811.1582908 (Exim 4.92) (envelope-from ) id 1wPIhj-0005gc-Qt; Tue, 19 May 2026 11:33:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312811.1582908; Tue, 19 May 2026 11:33:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIhj-0005gV-OF; Tue, 19 May 2026 11:33:43 +0000 Received: by outflank-mailman (input) for mailman id 1312811; Tue, 19 May 2026 11:33:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPIhi-0005gN-LC for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:33:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPIhi-00DHkX-11 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:33:42 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c4a95-5cb7-0a2a0a5109dd-0a2a450485be-8 for ; Tue, 19 May 2026 13:33:41 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c4a95-1dec-0a2a45040019-d155da2dcd64-3 for ; Tue, 19 May 2026 13:33:41 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-bcd0111ea98so530516966b.1 for ; Tue, 19 May 2026 04:33:41 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Is it really needed here? Considering that domain wasn't created and thereby scheduled that nothing will use d->is_dying and so it could be dropped or moved to arch_domain_destroy(). > >> + arch_domain_destroy(d); > > This continues to be a stub, i.e. upon encountering any kind of error one > would hit the BUG_ON() there. I think that for current stage of development it is fine. Would it be better change BUG_ON() to printk()? And add proper implementation a little bit later? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 11:47:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:47:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312843.1583001 (Exim 4.92) (envelope-from ) id 1wPIv2-0008R8-Qz; Tue, 19 May 2026 11:47:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312843.1583001; Tue, 19 May 2026 11:47:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIv2-0008R1-Nh; Tue, 19 May 2026 11:47:28 +0000 Received: by outflank-mailman (input) for mailman id 1312843; Tue, 19 May 2026 11:47:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIv1-0008PR-Vo for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:47:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPIuz-009FXO-C5 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:47:25 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c4dc8-bab6-0a2a0a5309dd-0a2a4501e64c-12 for ; Tue, 19 May 2026 13:47:25 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c4dcd-c1f2-0a2a45010019-d155dd31e15c-3 for ; Tue, 19 May 2026 13:47:25 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-4585a116a4aso2811367f8f.3 for ; Tue, 19 May 2026 04:47:25 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <244209c6-f707-4418-9513-1ef65d1d97db@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1779191245-B7754FF4-E3099893/0/0 X-purgate-type: clean X-purgate-size: 1503 On 19.05.2026 13:33, Oleksii Kurochko wrote: > On 5/18/26 5:43 PM, Jan Beulich wrote: >> On 08.05.2026 16:43, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/domain.c >>> +++ b/xen/arch/riscv/domain.c >>> @@ -289,6 +289,31 @@ void sync_vcpu_execstate(struct vcpu *v) >>> /* Nothing to do -- no lazy switching */ >>> } >>> >>> +int arch_sanitise_domain_config(struct xen_domctl_createdomain *config) >>> +{ >>> + return 0; >>> +} >>> + >>> +int arch_domain_create(struct domain *d, >>> + struct xen_domctl_createdomain *config, >>> + unsigned int flags) >>> +{ >>> + int rc = 0; >>> + >>> + if ( is_idle_domain(d) ) >>> + return 0; >>> + >>> + if ( (rc = p2m_init(d, config)) != 0) >>> + goto fail; >>> + >>> + return rc; >>> + >>> + fail: >>> + d->is_dying = DOMDYING_dead; >> >> domain_create() does this as well. Is it really needed here? > > Considering that domain wasn't created and thereby scheduled that > nothing will use d->is_dying and so it could be dropped or moved to > arch_domain_destroy(). > >> >>> + arch_domain_destroy(d); >> >> This continues to be a stub, i.e. upon encountering any kind of error one >> would hit the BUG_ON() there. > > I think that for current stage of development it is fine. > > Would it be better change BUG_ON() to printk()? And add proper > implementation a little bit later? That may be acceptable, yes. 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This is the correct behaviour: dummy_vcpu_info already serves >>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>> >>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>> >>>> I question this, largely (but not only) because I also ... >>>> >>>>> Signed-off-by: Oleksii Kurochko >>>>> Reviewed-by: Baptiste Le Duc >>>>> --- >>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>> d->shared_info remains NULL throughout domain lifetime. >>>> >>>> ... question this mode of operation. Yes, you may (for now) be able >>>> to get >>>> away without, but e.g. event channels will want supporting at some >>>> point. >>>> Which will require a shared info page. Better put that in place >>>> right away, >>>> even if the guests you test with don't use it (yet). Certain other >>>> common >>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>> >>> >>> Would it be fine than to allocate it in arch_domain_create() ... : >>> >>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>          goto fail; >>> >>>      clear_page(d->shared_info); >>> >>> ... but without calling share_xen_page_with_guest() after that >>> allocation as share_xen_page_with_guest() isn't implemented at the >>> moment? >> >> Or could it be an option for all arch-s move allocation of >> d->shared_info to domain_create() in common just after >> arch_domain_create()? >> >> The only question if share_xen_page_with_guest() could be ifdef-ed >> somehow so not to block new ports to implement it from the start. > > shared_info is an x86-PV-ism which escaped into HVM and then infected > ARM too. > > Sadly it's ABI there, but this is one of many areas where I really want > RISC-V not to inherit the mistakes of prior ports. > Could you please clarify what could be done better now? It seems like shared_info is used in a lot of places in common code base and it is needed for event channel stuff for example. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 11:48:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:48:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312848.1583010 (Exim 4.92) (envelope-from ) id 1wPIwQ-0000ly-4f; Tue, 19 May 2026 11:48:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312848.1583010; Tue, 19 May 2026 11:48:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIwQ-0000lr-1E; Tue, 19 May 2026 11:48:54 +0000 Received: by outflank-mailman (input) for mailman id 1312848; Tue, 19 May 2026 11:48:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIwO-0000lf-KV for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:48:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPIwO-001v21-00 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:48:52 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c4e20-bab6-0a2a0a5309dd-0a2a4507b1c4-10 for ; Tue, 19 May 2026 13:48:51 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c4e23-229c-0a2a45070019-d1558033f114-3 for ; Tue, 19 May 2026 13:48:51 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso35861235e9.3 for ; Tue, 19 May 2026 04:48:51 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <5c348320-099e-4511-842b-4d352d641c10@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1779191331-0B374C48-E5C0CB79/0/0 X-purgate-type: clean X-purgate-size: 3378 On 19.05.2026 12:50, Oleksii Kurochko wrote: > > > On 5/19/26 11:28 AM, Jan Beulich wrote: >> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>> The following compilation issue occurs when UBSAN related stuff is enabled: >>> prelink.o: in function `smp_processor_id': >>> /build/xen/./arch/riscv/include/asm/current.h:46:(.init.text+0x274e2): >>> relocation truncated to fit: R_RISCV_JAL against `init_done' >>> make[2]: *** [arch/riscv/Makefile:45: xen-syms] Error 1 >> >> There's no init_done() as of yet. > > It was found based on downstream version of RISC-V port. > >> >>> The switch_stack_and_jump macro uses "j " #fn which assembles to >>> JAL x0, init_done is a RISC-V J-type instruction with only ±1MB range. >>> >>> Without UBSAN, .init.text is small enough that init_done (which lives in >>> .text, not .init.text) is within 1MB of the JAL. With UBSAN enabled, all >>> the instrumentation calls bloat .init.text well past 1MB, so init_done >>> is now >1MB away from the JAL. The linker tries to truncate the 20-bit >>> J-type offset and fails. >> >> .init.text is well below 64k right now. Are you telling us that it grows >> by more than a factor of 16 when UBSAN is enabled? IOW while the change >> may indeed be needed, I question this explanation. .text growth may matter >> as well, and e.g. .rodata (living between both sections) might also grow. > > No, it won't grow so much. > > With UBSAN enabled: > > $ objdump -h xen/prelink.o > > xen/prelink.o: file format elf64-little > > Sections: > Idx Name Size VMA LMA File off > 0 .text 0011c79e 0000000000000000 0000000000000000 00000040 > CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > 1 .init.text 000285fe 0000000000000000 0000000000000000 0011c7de > CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > > With UBSAN, .text itself is 0x11c79e ≈ 1.11 MiB — already exceeding the > JAL range on its own. Even if .init.text directly followed .text (which > it doesn't), a call from .init.text to a symbol near the start of .text > would be ~1.11 MiB away. init_done likely sits somewhere specific within > .text rather than at its very end, but add the .rodata + .data sections > on top and the gap is comfortably past ±1 MiB. > > As a result, the target symbol init_done may end up outside the range > supported by the R_RISCV_JAL relocation, which is limited to > approximately ±1 MiB. > > Without UBSAN enabled: > > xen/prelink.o: file format elf64-little > > Sections: > Idx Name Size VMA LMA File off > 0 .text 00044618 0000000000000000 0000000000000000 00000040 > CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > 1 .init.text 00012c72 0000000000000000 0000000000000000 00044658 > CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > > Does it make sense now? I can use the text above for commit message > instead of what is mentioned now for more accuracy. > > Would it be better to send this patch when this issue will occur in > upstream? Having the change right away is fine, but the description needs to match what's presently upstream (i.e. mention any non-upstream aspect as such). Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 11:50:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:50:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312862.1583028 (Exim 4.92) (envelope-from ) id 1wPIxy-0002ld-OI; Tue, 19 May 2026 11:50:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312862.1583028; Tue, 19 May 2026 11:50:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIxy-0002lW-KW; Tue, 19 May 2026 11:50:30 +0000 Received: by outflank-mailman (input) for mailman id 1312862; Tue, 19 May 2026 11:50:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIxw-0002lB-HK for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:50:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPIxv-006cBs-S7 for xen-devel@lists.xenproject.org; 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With UBSAN enabled, >>> all >>> the instrumentation calls bloat .init.text well past 1MB, so init_done >>> is now >1MB away from the JAL. The linker tries to truncate the 20-bit >>> J-type offset and fails. >> >> .init.text is well below 64k right now. Are you telling us that it grows >> by more than a factor of 16 when UBSAN is enabled? IOW while the change >> may indeed be needed, I question this explanation. .text growth may >> matter >> as well, and e.g. .rodata (living between both sections) might also >> grow. > > No, it won't grow so much. > > With UBSAN enabled: > > $ objdump -h xen/prelink.o > > xen/prelink.o:     file format elf64-little > > Sections: > Idx Name          Size      VMA               LMA               File off >   0 .text         0011c79e  0000000000000000  0000000000000000  00000040 >                   CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE >   1 .init.text    000285fe  0000000000000000  0000000000000000  0011c7de >                   CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > > With UBSAN, .text itself is 0x11c79e ≈ 1.11 MiB — already exceeding > the JAL range on its own. Even if .init.text directly followed .text > (which it doesn't), a call from .init.text to a symbol near the start > of .text would be ~1.11 MiB away. init_done likely sits somewhere > specific within .text rather than at its very end, but add the .rodata > + .data sections on top and the gap is comfortably past ±1 MiB. > > As a result, the target symbol init_done may end up outside the range > supported by the R_RISCV_JAL relocation, which is limited to > approximately ±1 MiB. > > Without UBSAN enabled: > > xen/prelink.o:     file format elf64-little > > Sections: > Idx Name          Size      VMA               LMA               File off >   0 .text         00044618  0000000000000000  0000000000000000  00000040 >                   CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE >   1 .init.text    00012c72  0000000000000000  0000000000000000  00044658 >                   CONTENTS, ALLOC, LOAD, RELOC, READONLY, CODE > > Does it make sense now? I can use the text above for commit message > instead of what is mentioned now for more accuracy. > > Would it be better to send this patch when this issue will occur in > upstream? You want to make the commit message less specific. The problem here is that JAL only has a +- 1M range, and that this can be exceeded in some configurations. The fact it's init_done(), and indeed that it's also UBSAN, are rather incidental.  It's useful to state once, (including "found in a downstream branch"), but don't focus on init_done(). Also the subject should be "fix switch_stack_and_jump() for range beyond 1M" or similar.  "fix" on it's own could be one of many things. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 11:51:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 11:51:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312871.1583036 (Exim 4.92) (envelope-from ) id 1wPIyi-0003En-Vo; Tue, 19 May 2026 11:51:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312871.1583036; Tue, 19 May 2026 11:51:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPIyi-0003Eg-TG; Tue, 19 May 2026 11:51:16 +0000 Received: by outflank-mailman (input) for mailman id 1312871; Tue, 19 May 2026 11:51:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPIyh-0003EQ-GI for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:51:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPIyg-006cPi-Sc for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:51:14 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c4ea5-bab6-0a2a0a5309dd-0a2a4505d0ca-24 for ; Tue, 19 May 2026 13:51:14 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c4eb2-aaa8-0a2a45050019-d155dd31c900-3 for ; Tue, 19 May 2026 13:51:14 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44c350a5b87so2057047f8f.3 for ; Tue, 19 May 2026 04:51:14 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779191474-DB36C443-73C3705A/10/73395122804 X-purgate-type: spam X-purgate-size: 3203 On 19.05.2026 13:32, Andrew Cooper wrote: > On 19/05/2026 12:22 pm, Oleksii Kurochko wrote: >> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot >>>>> inside >>>>> the domain's shared_info page for vcpus with id < >>>>> XEN_LEGACY_MAX_VCPUS, >>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>> >>>>> However, it does not guard against d->shared_info being NULL.  The >>>>> shared_info() macro expands to a member access through d->shared_info, >>>>> so when an architecture does not allocate a shared_info page the >>>>> dereference triggers UBSAN: >>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>    member access within null pointer of type 'struct shared_info_t' >>>>> >>>>> Extend the existing fallback condition to also cover the case where no >>>>> shared_info page has been allocated, mapping the vcpu to >>>>> dummy_vcpu_info >>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>> >>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>> >>>> I question this, largely (but not only) because I also ... >>>> >>>>> Signed-off-by: Oleksii Kurochko >>>>> Reviewed-by: Baptiste Le Duc >>>>> --- >>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>> d->shared_info remains NULL throughout domain lifetime. >>>> >>>> ... question this mode of operation. Yes, you may (for now) be able >>>> to get >>>> away without, but e.g. event channels will want supporting at some >>>> point. >>>> Which will require a shared info page. Better put that in place >>>> right away, >>>> even if the guests you test with don't use it (yet). Certain other >>>> common >>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>> >>> >>> Would it be fine than to allocate it in arch_domain_create() ... : >>> >>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>          goto fail; >>> >>>      clear_page(d->shared_info); >>> >>> ... but without calling share_xen_page_with_guest() after that >>> allocation as share_xen_page_with_guest() isn't implemented at the >>> moment? >> >> Or could it be an option for all arch-s move allocation of >> d->shared_info to domain_create() in common just after >> arch_domain_create()? >> >> The only question if share_xen_page_with_guest() could be ifdef-ed >> somehow so not to block new ports to implement it from the start. > > shared_info is an x86-PV-ism which escaped into HVM and then infected > ARM too. > > Sadly it's ABI there, but this is one of many areas where I really want > RISC-V not to inherit the mistakes of prior ports. In which case, how do you propose e.g. event channels to be handled in whatever is going to be the alternative? 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779191641-DB77ECF5-2A63CC90/10/73395122804 X-purgate-type: spam X-purgate-size: 2940 On 19.05.2026 13:22, Oleksii Kurochko wrote: > On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >> On 5/19/26 11:37 AM, Jan Beulich wrote: >>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>> >>>> However, it does not guard against d->shared_info being NULL.  The >>>> shared_info() macro expands to a member access through d->shared_info, >>>> so when an architecture does not allocate a shared_info page the >>>> dereference triggers UBSAN: >>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>    member access within null pointer of type 'struct shared_info_t' >>>> >>>> Extend the existing fallback condition to also cover the case where no >>>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>> >>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>> >>> I question this, largely (but not only) because I also ... >>> >>>> Signed-off-by: Oleksii Kurochko >>>> Reviewed-by: Baptiste Le Duc >>>> --- >>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>> d->shared_info remains NULL throughout domain lifetime. >>> >>> ... question this mode of operation. Yes, you may (for now) be able to >>> get >>> away without, but e.g. event channels will want supporting at some point. >>> Which will require a shared info page. Better put that in place right >>> away, >>> even if the guests you test with don't use it (yet). Certain other common >>> code also assumes d->shared_info to never be NULL for an alive domain. >>> >> >> Would it be fine than to allocate it in arch_domain_create() ... : >> >>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>         goto fail; >> >>     clear_page(d->shared_info); >> >> ... but without calling share_xen_page_with_guest() after that >> allocation as share_xen_page_with_guest() isn't implemented at the moment? I would have said "yes" here, but ... > Or could it be an option for all arch-s move allocation of > d->shared_info to domain_create() in common just after arch_domain_create()? ... Andrew's reply pretty much rules out not only this option, but the shared-info-page concept as a whole (for RISC-V). See my reply there. In the meantime, the change as suggested may then indeed be what we want to go with, albeit (a) with a better description and (b) perhaps covering all d->shared_info uses. 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This is the correct behaviour: dummy_vcpu_info already serves >>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>> >>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>> I question this, largely (but not only) because I also ... >>>>> >>>>>> Signed-off-by: Oleksii Kurochko >>>>>> Reviewed-by: Baptiste Le Duc >>>>>> --- >>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>> ... question this mode of operation. Yes, you may (for now) be able >>>>> to get >>>>> away without, but e.g. event channels will want supporting at some >>>>> point. >>>>> Which will require a shared info page. Better put that in place >>>>> right away, >>>>> even if the guests you test with don't use it (yet). Certain other >>>>> common >>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>> >>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>> >>>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>          goto fail; >>>> >>>>      clear_page(d->shared_info); >>>> >>>> ... but without calling share_xen_page_with_guest() after that >>>> allocation as share_xen_page_with_guest() isn't implemented at the >>>> moment? >>> Or could it be an option for all arch-s move allocation of >>> d->shared_info to domain_create() in common just after >>> arch_domain_create()? >>> >>> The only question if share_xen_page_with_guest() could be ifdef-ed >>> somehow so not to block new ports to implement it from the start. >> shared_info is an x86-PV-ism which escaped into HVM and then infected >> ARM too. >> >> Sadly it's ABI there, but this is one of many areas where I really want >> RISC-V not to inherit the mistakes of prior ports. > In which case, how do you propose e.g. event channels to be handled in > whatever is going to be the alternative? Implement proper enumeration of virtual capabilities (to be retrofitted to x86/ARM too), and only offer the FIFO ABI (which is superior in every way to the 2L ABI). ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 12:00:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 12:00:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312917.1583096 (Exim 4.92) (envelope-from ) id 1wPJ7A-0005l9-Jr; Tue, 19 May 2026 12:00:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312917.1583096; Tue, 19 May 2026 12:00:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPJ7A-0005l2-Gf; Tue, 19 May 2026 12:00:00 +0000 Received: by outflank-mailman (input) for mailman id 1312917; Tue, 19 May 2026 11:59:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPJ78-0005kw-QZ for xen-devel@lists.xenproject.org; Tue, 19 May 2026 11:59:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPJ78-001xhr-6O for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:59:58 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c50b3-bab6-0a2a0a5309dd-0a2a45099b62-26 for ; Tue, 19 May 2026 13:59:58 +0200 Received: from [209.85.221.42] (helo=mail-wr1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c50be-2497-0a2a45090019-d155dd2ac1af-3 for ; Tue, 19 May 2026 13:59:58 +0200 Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-43eb05b1875so1911312f8f.3 for ; Tue, 19 May 2026 04:59:58 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I will drop "guest" prefix for "d->arch.guest_isa_str". > >> +#if defined(CONFIG_RISCV_32) >> + if ( snprintf(buf, len, "rv32") >= len ) >> + return -ENOBUFS; >> +#elif defined(CONFIG_RISCV_64) >> + if ( snprintf(buf, len, "rv64") >= len ) >> + return -ENOBUFS; >> +#else >> +# error "Unsupported RISC-V bitness" >> +#endif >> + >> + for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) >> + { >> + const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; >> + >> + if ( !riscv_isa_extension_available(d->arch.guest_isa, ext->id) ) >> + continue; >> + >> + if ( ext->id >= RISCV_ISA_EXT_BASE && strlcat(buf, "_", len) >= len ) >> + return -ENOBUFS; >> + >> + if ( strlcat(buf, ext->name, len) >= len ) >> + return -ENOBUFS; >> + } >> + >> + return 0; >> +} >> + >> +static void __init init_guest_unsupp(void) >> +{ >> + set_bit(RISCV_ISA_EXT_f, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_d, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_q, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_v, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_h, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_sstc, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_svade, guest_unsupp); >> + set_bit(RISCV_ISA_EXT_svpbmt, guest_unsupp); >> +} > > These don't need to be atomic, do they? I.e. __set_bit() would suffice. Agree, __set_bit() would be enough. > >> --- a/xen/arch/riscv/include/asm/cpufeature.h >> +++ b/xen/arch/riscv/include/asm/cpufeature.h >> @@ -17,6 +17,8 @@ >> */ >> #define RISCV_ISA_EXT_BASE 26 >> >> +#define RISCV_GUEST_ISA_STR_MAX 256 > > This looks like it won't be good for very long, seeing how long ISA strings can > get. I wonder anyway whether ... > >> @@ -94,6 +95,9 @@ struct arch_domain { >> struct p2m_domain p2m; >> >> struct paging_domain paging; >> + >> + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); >> + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; > > ... a compile-time sized buffer is suitable here. Can't you allocate a buffer > just large enough to hold the string? It could be allocated dynamically. Does it make sense to evaluate in run-time what should be a buffer size? For this case I can't find analogue of realloc() in Xen. Or it would be fine just to take something bigger as a const (lets say 2048) and use it for dynamic allocation? Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 12:06:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 12:06:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312926.1583106 (Exim 4.92) (envelope-from ) id 1wPJDC-0007Om-D4; Tue, 19 May 2026 12:06:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312926.1583106; Tue, 19 May 2026 12:06:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPJDC-0007Of-9K; Tue, 19 May 2026 12:06:14 +0000 Received: by outflank-mailman (input) for mailman id 1312926; Tue, 19 May 2026 12:06:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPJDB-0007OZ-2B for xen-devel@lists.xenproject.org; Tue, 19 May 2026 12:06:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPJDA-00DQ9J-EE for xen-devel@lists.xenproject.org; Tue, 19 May 2026 14:06:12 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c5230-2eae-0a2a0a5409dd-0a2a4508a802-22 for ; Tue, 19 May 2026 14:06:12 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c5234-63b5-0a2a45080019-d155802dc4e9-3 for ; Tue, 19 May 2026 14:06:12 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48a563e4ef7so28636315e9.0 for ; Tue, 19 May 2026 05:06:12 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779192372-C487BDB1-D6C4DC5B/10/73395122804 X-purgate-type: spam X-purgate-size: 3662 On 19.05.2026 13:56, Andrew Cooper wrote: > On 19/05/2026 12:51 pm, Jan Beulich wrote: >> On 19.05.2026 13:32, Andrew Cooper wrote: >>> On 19/05/2026 12:22 pm, Oleksii Kurochko wrote: >>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot >>>>>>> inside >>>>>>> the domain's shared_info page for vcpus with id < >>>>>>> XEN_LEGACY_MAX_VCPUS, >>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>> >>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>> dereference triggers UBSAN: >>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>> >>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>> shared_info page has been allocated, mapping the vcpu to >>>>>>> dummy_vcpu_info >>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>> >>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>> I question this, largely (but not only) because I also ... >>>>>> >>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>> --- >>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>> ... question this mode of operation. Yes, you may (for now) be able >>>>>> to get >>>>>> away without, but e.g. event channels will want supporting at some >>>>>> point. >>>>>> Which will require a shared info page. Better put that in place >>>>>> right away, >>>>>> even if the guests you test with don't use it (yet). Certain other >>>>>> common >>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>> >>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>> >>>>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>          goto fail; >>>>> >>>>>      clear_page(d->shared_info); >>>>> >>>>> ... but without calling share_xen_page_with_guest() after that >>>>> allocation as share_xen_page_with_guest() isn't implemented at the >>>>> moment? >>>> Or could it be an option for all arch-s move allocation of >>>> d->shared_info to domain_create() in common just after >>>> arch_domain_create()? >>>> >>>> The only question if share_xen_page_with_guest() could be ifdef-ed >>>> somehow so not to block new ports to implement it from the start. >>> shared_info is an x86-PV-ism which escaped into HVM and then infected >>> ARM too. >>> >>> Sadly it's ABI there, but this is one of many areas where I really want >>> RISC-V not to inherit the mistakes of prior ports. >> In which case, how do you propose e.g. event channels to be handled in >> whatever is going to be the alternative? > > Implement proper enumeration of virtual capabilities (to be retrofitted > to x86/ARM too), and only offer the FIFO ABI (which is superior in every > way to the 2L ABI). What about the wc_* fields then? And about everything in struct arch_shared_info? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1779192729-41D7C3FF-FEAE8804/0/0 X-purgate-type: clean X-purgate-size: 1486 On 19.05.2026 13:59, Oleksii Kurochko wrote: > On 5/18/26 5:51 PM, Jan Beulich wrote: >> On 08.05.2026 16:43, Oleksii Kurochko wrote: >>> --- a/xen/arch/riscv/include/asm/cpufeature.h >>> +++ b/xen/arch/riscv/include/asm/cpufeature.h >>> @@ -17,6 +17,8 @@ >>> */ >>> #define RISCV_ISA_EXT_BASE 26 >>> >>> +#define RISCV_GUEST_ISA_STR_MAX 256 >> >> This looks like it won't be good for very long, seeing how long ISA strings can >> get. I wonder anyway whether ... >> >>> @@ -94,6 +95,9 @@ struct arch_domain { >>> struct p2m_domain p2m; >>> >>> struct paging_domain paging; >>> + >>> + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); >>> + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; >> >> ... a compile-time sized buffer is suitable here. Can't you allocate a buffer >> just large enough to hold the string? > > It could be allocated dynamically. > > Does it make sense to evaluate in run-time what should be a buffer size? > For this case I can't find analogue of realloc() in Xen. Hmm, I see xrealloc_array(), and surely we could gain xvrealloc_array() which we'll need anyway once xrealloc_array() uses get converted. (I also see x{,v}realloc_flex_struct(), but that's of no use here as it looks.) > Or it would be > fine just to take something bigger as a const (lets say 2048) and use it > for dynamic allocation? I'd rather not. Can't you determine how much space the string is going to occupy? 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Iglesias" , xen-devel@lists.xenproject.org References: <20260518234353.453193-1-edgar.iglesias@amd.com> <20260518234353.453193-2-edgar.iglesias@amd.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260518234353.453193-2-edgar.iglesias@amd.com> Content-Type: text/plain; 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Iglesias wrote: > The generic Xen strrchr() implementation returns a pointer to the string > terminator when searching for '\0', matching the standard C semantics. > > The ARM64 assembly version stopped as soon as it loaded the terminator and > returned the previous match pointer instead. This made strrchr("", '\0') > return NULL. > > Compare the loaded byte against the requested character before deciding > whether to stop at the terminator, so the terminator itself can be returned > when it is the requested character. > > Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") > Signed-off-by: Edgar E. Iglesias > --- > xen/arch/arm/arm64/lib/strrchr.S | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) A couple of tangential things. This file was inherited from Linux.  Does the same bug need fixing there?  What about the arm32 side? Looking at your example, it surely wasn't actually as simple as strrchr("", '\0') ?  I'd expect the optimiser to be able to turn that into a constant and not call out to the library implementation. Elsewhere, I've created xen/common/bitops.c to be CONFIG_SELF_TESTS for the bit operations including the arch-optimised variations, because they're subtle and easy to get wrong.  This looks like it's worth doing the same for the bits of libc we implement. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 12:54:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 12:54:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312962.1583132 (Exim 4.92) (envelope-from ) id 1wPJy8-000805-HO; Tue, 19 May 2026 12:54:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312962.1583132; Tue, 19 May 2026 12:54:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPJy8-0007zy-EA; Tue, 19 May 2026 12:54:44 +0000 Received: by outflank-mailman (input) for mailman id 1312962; Tue, 19 May 2026 12:54:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPJy7-0007zs-4R for xen-devel@lists.xenproject.org; Tue, 19 May 2026 12:54:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPJy5-006q17-2N for xen-devel@lists.xenproject.org; Tue, 19 May 2026 14:54:41 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c5d75-2eae-0a2a0a5409dd-0a2a45078838-48 for ; Tue, 19 May 2026 14:54:40 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c5d8f-229c-0a2a45070019-a0658309dcd8-3 for ; Tue, 19 May 2026 14:54:40 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id A8D8082044AB; Tue, 19 May 2026 08:53:29 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl Subject: [PATCH] tests/mem-claim: System test suite for NUMA-aware claim sets Date: Tue, 19 May 2026 13:53:08 +0100 Message-Id: <89ed55c313dff841ba7030bb7fa13ab248cb3ccd.1779193767.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1779195280-28678FE8-85430644/0/0 X-purgate-type: clean X-purgate-size: 94387 Add a comprehensive test suite for the xc_domain_claim_memory() API and the legacy xc_domain_claim_pages() API for regression testing and confirming interoperability that covers argument validation and the protection semantics of memory claims across domains and NUMA nodes. The suite verifies claim behaviour both host-wide and per-node, and checks how host-wide and node-specific claims interact with claim and allocation requests for other domains to ensure correct claims protection and claims invariant maintenance across all code paths. Key checks include: - Argument validation and correct errno handling for invalid inputs. - NUMA-aware claim sets, covering node-specific and global targets. - Replacement semantics after allocations (global and node-scoped). - Inter-domain protection and claim movement across NUMA nodes. Signed-off-by: Bernhard Kaindl --- Dear reviewers, this patch provides the system tests for the NUMA claims series v7: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html For reference, find an example of running it on a claims-v7 series Xen hypervisor (on a NUMA host in this case, UMA hosts skip some tests): $ git pull git@gitlab.com:bernhardkaindl/xen.git claims-system-test-v7 $ make -C tools/tests/mem-claim clean all $ tools/tests/mem-claim/test-claim-memory -h Usage: tools/tests/mem-claim/test-claim-memory [OPTIONS] Options: -l, --list List available test IDs and exit -t, --test ID Run only the specified test ID (repeatable) -v, --verbose Print per-step progress -h, --help Show this help text Available tests: A1-1 basic_node_claim A1-2 host_wide_replace_after_alloc A1-3 node_replace_after_alloc A1-4 legacy_host_wide_claim A1-5 move_claim_between_nodes A1-6 zero_claim_resets_claim A1-7 zero_claim_memory_reset A1-8 query_claim_memory_size I1-1 reject_non_present_node I1-2 reject_too_many_claims I1-3 reject_node_gt_uint8_max I1-4 reject_pages_gt_int32_max I1-5 reject_nonzero_pad I1-6 reject_zero_claim_count I1-7 null_claims_nonzero_count I1-8 zero_count_with_pointer I1-9 claim_pages_gt_free_enomem I2-1 claim_pages_causes_enomem I2-2 claim_memory_causes_enomem I2-3 claim_prima_causes_enomem $ tools/tests/mem-claim/test-claim-memory -v ========= testcase program: tools/tests/mem-claim/test-claim-memory ========== step 1: create primary domain step 2: set maxmem for primary domain step 3: create secondary domain step 4: set maxmem for secondary domain step 5: set basic node claim step 6: check node claim is reflected in outstanding pages step 7: destroy helper domain step 8: destroy primary domain step 9: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-1 PASSED (0.01 ms) step 10: create primary domain step 11: set maxmem for primary domain step 12: create secondary domain step 13: set maxmem for secondary domain step 14: install initial host-wide claim step 15: Allocate one extent to consume part of claim step 16: reduce host-wide claim after allocation step 17: release all claims with zero claim step 18: destroy helper domain step 19: destroy primary domain step 20: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-2 PASSED (0.04 ms) step 21: create primary domain step 22: set maxmem for primary domain step 23: create secondary domain step 24: set maxmem for secondary domain step 25: set initial node-specific replacement claim step 26: Allocate one extent to consume part of claim step 27: replace node claim with a new absolute target step 28: release all claims with zero claim step 29: destroy helper domain step 30: destroy primary domain step 31: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-3 PASSED (0.02 ms) step 32: create primary domain step 33: set maxmem for primary domain step 34: create secondary domain step 35: set maxmem for secondary domain step 36: set legacy host-wide claim step 37: claim is added the outstanding pages step 38: allocate extents to redeem a part of claim step 39: allocated against claim, outstanding pages reduced step 40: destroy helper domain step 41: destroy primary domain step 42: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-4 PASSED (0.03 ms) step 43: create primary domain step 44: set maxmem for primary domain step 45: create secondary domain step 46: set maxmem for secondary domain step 47: Claim most memory on source node. step 48: claim all except 10 pages on node 1 step 49: claim all pages except 10 pages on node 1 claim=23748599 free=23748609 step 50: The claim blocks the allocation on the source node. step 51: Move the claim to most memory on the destination node. step 52: claim all except 10 pages on node 0 step 53: claim all pages except 10 pages on node 0 claim=23526547 free=23526557 step 54: Moved claim no longer blocks allocs on source node. step 55: Moved claim now blocks allocs on destination node. step 56: release all claims with zero claim step 57: Claim released, allocs on destination node succeed. step 58: release all claims with zero claim step 59: destroy helper domain step 60: destroy primary domain step 61: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-5 PASSED (0.15 ms) step 62: create primary domain step 63: set maxmem for primary domain step 64: create secondary domain step 65: set maxmem for secondary domain step 66: zero claim to reset outstanding to baseline step 67: zero claim to reset outstanding to baseline step 68: check zero claim resets outstanding to baseline step 69: destroy helper domain step 70: destroy primary domain step 71: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-6 PASSED (0.01 ms) step 72: create primary domain step 73: set maxmem for primary domain step 74: create secondary domain step 75: set maxmem for secondary domain step 76: make a claim to move outstanding away from baseline step 77: set a zero claim to reset outstanding to baseline step 78: check zero claim resets outstanding to baseline step 79: destroy helper domain step 80: destroy primary domain step 81: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-7 PASSED (0.01 ms) step 82: create primary domain step 83: set maxmem for primary domain step 84: create secondary domain step 85: set maxmem for secondary domain step 86: Query claim-set size with nr_entries=0 and claim_set=NULL step 87: Fetch the claim set using the returned entry count step 88: destroy helper domain step 89: destroy primary domain step 90: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::A1-8 PASSED (0.00 ms) step 91: create primary domain step 92: set maxmem for primary domain step 93: create secondary domain step 94: set maxmem for secondary domain step 95: reject claim on a non-present NUMA node step 96: destroy helper domain step 97: destroy primary domain step 98: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-1 PASSED (0.00 ms) step 99: create primary domain step 100: set maxmem for primary domain step 101: create secondary domain step 102: set maxmem for secondary domain step 103: reject claim list larger than the supported maximum step 104: destroy helper domain step 105: destroy primary domain step 106: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-2 PASSED (0.03 ms) step 107: create primary domain step 108: set maxmem for primary domain step 109: create secondary domain step 110: set maxmem for secondary domain step 111: reject claim with node id above UINT8_MAX step 112: destroy helper domain step 113: destroy primary domain step 114: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-3 PASSED (0.00 ms) step 115: create primary domain step 116: set maxmem for primary domain step 117: create secondary domain step 118: set maxmem for secondary domain step 119: reject claim with pages larger than INT32_MAX step 120: destroy helper domain step 121: destroy primary domain step 122: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-4 PASSED (0.00 ms) step 123: create primary domain step 124: set maxmem for primary domain step 125: create secondary domain step 126: set maxmem for secondary domain step 127: reject claim with non-zero cmd step 128: destroy helper domain step 129: destroy primary domain step 130: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-5 PASSED (0.00 ms) step 131: create primary domain step 132: set maxmem for primary domain step 133: create secondary domain step 134: set maxmem for secondary domain step 135: reject xc_domain_claim_memory() with nr_claims == 0 step 136: destroy helper domain step 137: destroy primary domain step 138: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-6 [nr_claims=0] PASSED (0.00 ms) step 139: create primary domain step 140: set maxmem for primary domain step 141: create secondary domain step 142: set maxmem for secondary domain step 143: reject xc_domain_claim_memory() with claims=NULL and nr_claims == 1 step 144: destroy helper domain step 145: destroy primary domain step 146: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-7 [nr_claims=1 claims=NULL] PASSED (0.00 ms) step 147: create primary domain step 148: set maxmem for primary domain step 149: create secondary domain step 150: set maxmem for secondary domain step 151: reject xc_domain_claim_memory() with !nr_claims but a claims pointer step 152: destroy helper domain step 153: destroy primary domain step 154: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-8 [nr_claims=0 claims=valid node=1] PASSED (0.00 ms) step 155: create primary domain step 156: set maxmem for primary domain step 157: create secondary domain step 158: set maxmem for secondary domain step 159: reject xc_domain_claim_pages() with pages > total free pages step 160: reject claim_memory() with pages > total free pages step 161: reject claim_memory() with pages > node free pages step 162: destroy helper domain step 163: destroy primary domain step 164: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I1-9 [claim=47275120 free=47275119] PASSED (0.01 ms) step 165: create primary domain step 166: set maxmem for primary domain step 167: create secondary domain step 168: set maxmem for secondary domain step 169: dom_1: claim nearly all global memory with claim_pages step 170: expect ENOMEM for xc_domain_claim_pages() with claims > spare page step 171: expect ENOMEM for claim_memory() with claims > spare pages step 172: expect ENOMEM for claim_memory() with claims > spare pages step 173: destroy helper domain step 174: destroy primary domain step 175: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I2-1 [claim=47274872 free=47275072] PASSED (0.01 ms) step 176: create primary domain step 177: set maxmem for primary domain step 178: create secondary domain step 179: set maxmem for secondary domain step 180: claim all except 200 pages on host step 181: claim all pages except 200 pages on host claim=47274825 free=47275025 step 182: expect ENOMEM for xc_domain_claim_pages() with claims > spare page step 183: expect ENOMEM for claim_memory() with claims > spare pages step 184: expect ENOMEM for claim_memory() with claims > spare pages step 185: destroy helper domain step 186: destroy primary domain step 187: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I2-2 PASSED (0.01 ms) step 188: create primary domain step 189: set maxmem for primary domain step 190: create secondary domain step 191: set maxmem for secondary domain step 192: claim all except 200 pages on node 1 step 193: claim all pages except 200 pages on node 1 claim=23748361 free=23748561 step 194: expect ENOMEM for claim_memory() with claims > spare pages step 195: destroy helper domain step 196: destroy primary domain step 197: check cleanup restored baseline claimed pages tools/tests/mem-claim/test-claim-memory::I2-3 PASSED (0.01 ms) ================== short test summary info ================= PASSED A1-1 basic_node_claim PASSED A1-2 host_wide_replace_after_alloc PASSED A1-3 node_replace_after_alloc PASSED A1-4 legacy_host_wide_claim PASSED A1-5 move_claim_between_nodes PASSED A1-6 zero_claim_resets_claim PASSED A1-7 zero_claim_memory_reset PASSED A1-8 query_claim_memory_size PASSED I1-1 reject_non_present_node PASSED I1-2 reject_too_many_claims PASSED I1-3 reject_node_gt_uint8_max PASSED I1-4 reject_pages_gt_int32_max PASSED I1-5 reject_nonzero_pad PASSED I1-6 reject_zero_claim_count PASSED I1-7 null_claims_nonzero_count PASSED I1-8 zero_count_with_pointer PASSED I1-9 claim_pages_gt_free_enomem PASSED I2-1 claim_pages_causes_enomem PASSED I2-2 claim_memory_causes_enomem PASSED I2-3 claim_prima_causes_enomem ============ 20 passed, 0 failed, 0 skipped ============ Signed-off-by: Bernhard Kaindl --- tools/tests/mem-claim/.gitignore | 1 + tools/tests/mem-claim/Makefile | 35 +- tools/tests/mem-claim/accounting-1.h | 456 ++++++++++ tools/tests/mem-claim/input-phase1.h | 173 ++++ tools/tests/mem-claim/input-phase2.h | 96 +++ tools/tests/mem-claim/libtestclaims.c | 980 ++++++++++++++++++++++ tools/tests/mem-claim/libtestclaims.h | 203 +++++ tools/tests/mem-claim/test-claim-memory.c | 130 +++ 8 files changed, 2067 insertions(+), 7 deletions(-) create mode 100644 tools/tests/mem-claim/accounting-1.h create mode 100644 tools/tests/mem-claim/input-phase1.h create mode 100644 tools/tests/mem-claim/input-phase2.h create mode 100644 tools/tests/mem-claim/libtestclaims.c create mode 100644 tools/tests/mem-claim/libtestclaims.h create mode 100644 tools/tests/mem-claim/test-claim-memory.c diff --git a/tools/tests/mem-claim/.gitignore b/tools/tests/mem-claim/.gitignore index cfcee00b819b..08365576b22b 100644 --- a/tools/tests/mem-claim/.gitignore +++ b/tools/tests/mem-claim/.gitignore @@ -1 +1,2 @@ test-mem-claim +test-claim-memory diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile index 76ba3e3c8bef..5c090639553b 100644 --- a/tools/tests/mem-claim/Makefile +++ b/tools/tests/mem-claim/Makefile @@ -1,14 +1,34 @@ XEN_ROOT = $(CURDIR)/../../.. include $(XEN_ROOT)/tools/Rules.mk -TARGET := test-mem-claim +TARGETS := test-mem-claim test-claim-memory + +LIB_OBJ := libtestclaims.o .PHONY: all -all: $(TARGET) +all: $(TARGETS) + +# Can also be called with "make run-tests-mem-claim" from the toplevel. +.PHONY: run +run: $(TARGETS) +ifeq ($(CC),$(HOSTCC)) + set -e; \ + for test in $? ; do \ + ./$$test ; \ + done +else + $(warning HOSTCC != CC, will not run test) +endif + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: .PHONY: clean clean: - $(RM) -- *.o $(TARGET) $(DEPS_RM) + $(RM) -- *.o $(TARGETS) $(DEPS_RM) .PHONY: distclean distclean: clean @@ -17,11 +37,11 @@ distclean: clean .PHONY: install install: all $(INSTALL_DIR) $(DESTDIR)$(LIBEXEC)/tests - $(INSTALL_PROG) $(TARGET) $(DESTDIR)$(LIBEXEC)/tests + $(INSTALL_PROG) $(TARGETS) $(DESTDIR)$(LIBEXEC)/tests .PHONY: uninstall uninstall: - $(RM) -- $(DESTDIR)$(LIBEXEC)/tests/$(TARGET) + $(RM) -- $(patsubst %,$(DESTDIR)$(LIBEXEC)/tests/%,$(TARGETS)) CFLAGS += $(CFLAGS_xeninclude) CFLAGS += $(CFLAGS_libxenctrl) @@ -32,7 +52,8 @@ LDFLAGS += $(APPEND_LDFLAGS) %.o: Makefile -$(TARGET): test-mem-claim.o - $(CC) -o $@ $< $(LDFLAGS) + +$(TARGETS): %: %.o $(LIB_OBJ) + $(CC) -o $@ $^ $(LDFLAGS) -include $(DEPS_INCLUDE) diff --git a/tools/tests/mem-claim/accounting-1.h b/tools/tests/mem-claim/accounting-1.h new file mode 100644 index 000000000000..09b1fa69ce3d --- /dev/null +++ b/tools/tests/mem-claim/accounting-1.h @@ -0,0 +1,456 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * claim-memory-allocations.h - Test claiming memory and claims protection + * with NUMA-aware claim sets. + * + * Check claiming memory and allocation against claims with NUMA-aware + * claim sets, including: + * + * - Claim nearly all free memory on a node or host-wide, + * - Verify the claim is reflected in physinfo + * - Assert that memory can be allocated by redeeming the claim. + * - Exercise xc_domain_claim_memory() with different valid claim sets. + * - Exercise xc_domain_claim_pages() and verify that claims are reflected + * in the outstanding pages in Xen. + */ +#include "libtestclaims.h" + +/* + * A1-1: basic single-node claim is tracked in outstanding pages and released + * when the domain is destroyed. + * + * Smoke test: claims half the primary node's free pages, verifies they + * appear in physinfo.outstanding_pages, then returns. The fixture destroys + * the domain, which releases the claim, and verifies outstanding pages returns + * to the pre-test baseline. + * + * Skipped when NUMA is disabled (num_nodes == 1 and no per-node free pages) or + * when there are fewer than 2 free pages available on the primary node. + */ +static int test_basic_node_claim(struct test_ctx *ctx) +{ + uint64_t pre_existing_claims, free_pages; + xen_memory_claim_t claim; + + /* Get the free memory on the test node */ + ctx->target1 = ctx->env->primary_node; + lib_get_node_free_pages(ctx, ctx->target1, &free_pages, NULL); + + if ( free_pages < 2 ) + return lib_fail( + ctx, "need >= 2 free pages on node %" PRIu64 ", got %" PRIu64, + ctx->target1, free_pages); + + /* + * Leave one page of slack between the claim and the free pages + * so claim does not fail due to a small concurrent allocation. + */ + ctx->alloc_pages = free_pages - 1; + snprintf(ctx->result->params, sizeof(ctx->result->params), + "node=%" PRIu64 " claim_pages=%" PRIu64 " free_pages=%" PRIu64, + ctx->target1, ctx->alloc_pages, free_pages); + + /* + * Capture the baseline after domain creation (domain creation doesn't + * change outstanding pages, so this equals the fixture's baseline). + */ + rc = lib_get_total_claims(ctx, &pre_existing_claims); + if ( rc ) + return rc; + + claim = (xen_memory_claim_t){ + .pages = ctx->alloc_pages, + .target = ctx->target1 + }; + rc = lib_claim_memory(ctx, ctx->dom_1, 1, &claim, "set basic node claim"); + if ( rc ) + return rc; + + return lib_check_claim( + ctx, pre_existing_claims, ctx->alloc_pages, + "check node claim is reflected in outstanding pages"); + + /* Domain teardown releases claim; fixture verifies baseline is restored. */ +} + +/* + * A1-2: host-wide claim is replaced atomically after an allocation. + * + * Sets an initial host-wide claim, allocates one extent (consuming part of it), + * then sets a smaller replacement claim and verifies the outstanding count + * reflects the new absolute target. + */ +static int test_update_host_after_alloc(struct test_ctx *ctx) +{ + unsigned long free_pages; + unsigned long initial_pages; + + /* Get the total free memory for sizing the initial claim */ + lib_get_total_free_pages(ctx, &free_pages); + + if ( free_pages < 2 ) + return lib_fail(ctx, "need >= 2 free pages total, got %" PRIu64, + free_pages); + + /* + * This test needs two valid claim targets: an initial larger claim + * and a smaller replacement target after consuming one claimed page. + */ + initial_pages = free_pages; + ctx->alloc_pages = free_pages / 2; + + snprintf(ctx->result->params, sizeof(ctx->result->params), + "alloc_pages=%" PRIu64 " initial=%" PRIu64 " " + "replacement=%" PRIu64 " total free=%" PRIu64, + ctx->alloc_pages, initial_pages, ctx->alloc_pages, free_pages); + + rc = lib_claim_memory(ctx, ctx->dom_1, 1, /* one claim record */ + &(xen_memory_claim_t){ + .pages = initial_pages, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, + }, + "install initial host-wide claim"); + if ( rc ) + return rc; + + lib_set_step(ctx, "Allocate one extent to consume part of claim"); + rc = lib_populate_success(ctx, (lib_populate_args_t){ + .domid = ctx->dom_1, + .nr_extents = 1, + }); + if ( rc ) + return rc; + + rc = lib_claim_memory(ctx, ctx->dom_1, 1, /* one claim record */ + &(xen_memory_claim_t){ + .pages = ctx->alloc_pages, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, + }, + "reduce host-wide claim after allocation"); + if ( rc ) + return rc; + + return lib_release_all_claims(ctx, ctx->dom_1); +} + +/* + * A1-3: node-specific claim is replaced atomically after an allocation. + * + * Same as A1-2 but scoped to the primary NUMA node: + * Sets an initial node claim, allocates one extent (consuming part of it), + * then sets a smaller replacement claim and verifies the outstanding count + * reflects the new absolute target. + */ +static int test_node_replace_after_alloc(struct test_ctx *ctx) +{ + uint64_t free_pages, initial_pages; + + /* Node used for claim sizing, claiming and allocation */ + ctx->target1 = ctx->env->primary_node; + + /* Get the free memory on the test node for sizing the initial claim */ + lib_get_node_free_pages(ctx, ctx->target1, &free_pages, NULL); + if ( free_pages < 2 ) + return lib_skip_test( + ctx, "need >= 2 pages on node %" PRIu64 ", got %" PRIu64, + ctx->target1, free_pages); + /* + * This test needs two valid claim targets: an initial larger claim + * and a smaller replacement target after consuming one claimed page. + * + * Leave one page of slack between the claim and the free pages + * so claim does not fail due to a small concurrent allocation. + */ + initial_pages = free_pages - 1; + ctx->alloc_pages = free_pages / 2; + + /* Logging of test parameters */ + snprintf(ctx->result->params, sizeof(ctx->result->params), + "node=%" PRIu64 " init=%" PRIu64 " replacement=%" PRIu64 + " free=%" PRIu64, + ctx->target1, initial_pages, ctx->alloc_pages, free_pages); + + /* Create the claim with initial_pages */ + rc = lib_claim_memory(ctx, ctx->dom_1, 1, /* one claim */ + &(xen_memory_claim_t){ + .pages = initial_pages, + .target = ctx->target1, + }, + "set initial node-specific replacement claim"); + if ( rc ) + return rc; + + lib_set_step(ctx, "Allocate one extent to consume part of claim"); + rc = + lib_populate_success(ctx, (lib_populate_args_t){ + .domid = ctx->dom_1, + .nr_extents = 1, + .flags = XENMEMF_exact_node(ctx->target1), + }); + if ( rc ) + return rc; + + /* Update the claim with ctx->alloc_pages */ + rc = lib_claim_memory(ctx, ctx->dom_1, 1, /* one claim */ + &(xen_memory_claim_t){ + .pages = ctx->alloc_pages, + .target = ctx->target1, + }, + "replace node claim with a new absolute target"); + if ( rc ) + return rc; + + return lib_release_all_claims(ctx, ctx->dom_1); +} + +/* + * A1-4: legacy xc_domain_claim_pages() host-wide claim is tracked in outstanding + * pages, reduced by an allocation, and released when the domain is destroyed. + */ +static int test_legacy_host_wide_claim(struct test_ctx *ctx) +{ + uint64_t pre_existing_claims, free_pages; + + /* Get the total free memory for sizing the claim */ + lib_get_total_free_pages(ctx, &free_pages); + + ctx->alloc_pages = free_pages / 2; + snprintf(ctx->result->params, sizeof(ctx->result->params), "claim=%" PRIu64, + ctx->alloc_pages); + + rc = lib_get_total_claims(ctx, &pre_existing_claims); + if ( rc ) + return rc; + + rc = lib_claim_pages_legacy(ctx, ctx->dom_1, ctx->alloc_pages, + "set legacy host-wide claim"); + if ( rc ) + return rc; + + rc = lib_check_claim(ctx, pre_existing_claims, ctx->alloc_pages, + "claim is added the outstanding pages"); + if ( rc ) + return rc; + + lib_set_step(ctx, "allocate extents to redeem a part of claim"); + rc = lib_populate_success(ctx, (lib_populate_args_t){ + .domid = ctx->dom_1, + .nr_extents = 10, + }); + if ( rc ) + return rc; + + return lib_check_claim( + ctx, pre_existing_claims, ctx->alloc_pages - 10, + "allocated against claim, outstanding pages reduced"); + /* Teardown releases the claim; fixture verifies baseline is restored. */ +} + +/* + * A1-5: Test blocking allocation with claims and claim movement between nodes. + * + * This test performs a sequence of claims and allocations to verify that claims + * block allocations on the claimed node, that moving a claim to another node + * allows allocation on the original node, and that the new node is now blocked + * by the claim until it is released. + * + * To achieve this, the test creates a helper domain used for allocation + * attempts, then: + * + * Claims most free pages on the primary node, verifies allocation is blocked, + * then moves the claim to the secondary node, verifies the original allocation + * can now succeed on the primary node. + * + * It then verifies allocation is now blocked on the secondary node, + * releases the claim, and verifies the allocation can now succeed on the + * secondary node as well. + * + * Requires at least two online NUMA nodes. + */ +static int test_move_claim_between_nodes(struct test_ctx *ctx) +{ + uint64_t free_src, free_dst, spare_pages = 10; + + if ( !ctx->env->have_secondary_node ) + return lib_skip_test(ctx, "Requires at least two online NUMA nodes."); + + ctx->target1 = ctx->env->primary_node; + ctx->target2 = ctx->env->secondary_node; + + lib_get_node_free_pages(ctx, ctx->target1, &free_src, NULL); + lib_get_node_free_pages(ctx, ctx->target2, &free_dst, NULL); + + if ( free_src < spare_pages + 1 || free_dst < spare_pages + 1 ) + return lib_fail(ctx, "Need more pages, got %" PRIu64 "/%" PRIu64 ".", + free_src, free_dst); + + lib_set_step(ctx, "Claim most memory on source node."); + rc = lib_claim_all_on_node(ctx, ctx->dom_1, ctx->target1, spare_pages); + if ( rc ) + return rc; + + lib_set_step(ctx, "The claim blocks the allocation on the source node."); + rc = + lib_populate_failure(ctx, (lib_populate_args_t){ + .domid = ctx->dom_2, + .nr_extents = spare_pages * 2, + .flags = XENMEMF_exact_node(ctx->target1), + }); + if ( rc ) + return rc; + + lib_set_step(ctx, "Move the claim to most memory on the destination node."); + rc = lib_claim_all_on_node(ctx, ctx->dom_1, ctx->target2, spare_pages); + if ( rc ) + return rc; + + lib_set_step(ctx, "Moved claim no longer blocks allocs on source node."); + rc = + lib_populate_success(ctx, (lib_populate_args_t){ + .domid = ctx->dom_2, + .start = spare_pages * 2, + .nr_extents = spare_pages * 2, + .flags = XENMEMF_exact_node(ctx->target1), + }); + if ( rc ) + return rc; + + lib_set_step(ctx, "Moved claim now blocks allocs on destination node."); + rc = + lib_populate_failure(ctx, (lib_populate_args_t){ + .domid = ctx->dom_2, + .nr_extents = spare_pages * 2, + .flags = XENMEMF_exact_node(ctx->target2), + }); + if ( rc ) + return rc; + + rc = lib_release_all_claims(ctx, ctx->dom_1); + if ( rc ) + return rc; + + lib_set_step(ctx, "Claim released, allocs on destination node succeed."); + rc = + lib_populate_success(ctx, (lib_populate_args_t){ + .domid = ctx->dom_2, + .start = spare_pages * 2, + .nr_extents = spare_pages * 2, + .flags = XENMEMF_exact_node(ctx->target2), + }); + if ( rc ) + return rc; + + return lib_release_all_claims(ctx, ctx->dom_1); +} + +/* + * A1-6: Check that a calling xc_domain_claim_pages(claim_pages = 0) + * resets the claims to the baseline. + */ +static int test_zero_claim_resets_claim(struct test_ctx *ctx) +{ + uint64_t pre_existing_claims; + + rc = lib_get_total_claims(ctx, &pre_existing_claims); + if ( rc ) + return rc; + + /* Make a claim first to move outstanding away from the baseline. */ + rc = lib_claim_pages_legacy(ctx, ctx->dom_1, 8, + "zero claim to reset outstanding to baseline"); + if ( rc ) + return rc; + + /* Now set a zero claim to reset outstanding back to the baseline. */ + rc = lib_claim_pages_legacy(ctx, ctx->dom_1, 0, + "zero claim to reset outstanding to baseline"); + if ( rc ) + return rc; + + return lib_check_claim(ctx, pre_existing_claims, 0, + "check zero claim resets outstanding to baseline"); +} + +/* + * A1-7: Check that a calling xc_domain_claim_memory(claim_pages = 0) + * resets the claims to the baseline. + */ +static int test_zero_claim_memory_resets(struct test_ctx *ctx) +{ + uint64_t pre_existing_claims; + + rc = lib_get_total_claims(ctx, &pre_existing_claims); + if ( rc ) + return rc; + + /* Make a claim first to move outstanding away from the baseline. */ + rc = lib_claim_memory( + ctx, ctx->dom_1, 1, + &(xen_memory_claim_t){ .pages = 8, .target = ctx->env->primary_node }, + "make a claim to move outstanding away from baseline"); + if ( rc ) + return rc; + + /* Now set a zero claim to reset outstanding back to the baseline. */ + rc = lib_claim_memory( + ctx, ctx->dom_1, 1, + &(xen_memory_claim_t){ + .pages = 0, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST + }, + "set a zero claim to reset outstanding to baseline"); + if ( rc ) + return rc; + + return lib_check_claim(ctx, pre_existing_claims, 0, + "check zero claim resets outstanding to baseline"); +} + +/* + * A1-8: Check that xc_domain_claim_memory(GET) accepts nr_entries == 0 and + * claim_set == NULL to report the required claim-set size. + */ +static int test_query_claim_memory_size(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = {}; + uint32_t nr_entries = 0; + + snprintf(ctx->result->params, sizeof(ctx->result->params), + "mode=get nr_entries=0 claim_set=NULL"); + + lib_set_step(ctx, + "Query claim-set size with nr_entries=0 and claim_set=NULL"); + rc = xc_domain_claim_memory(ctx->env->xch, ctx->dom_1, + XEN_DOMCTL_CLAIM_MEMORY_GET, + &nr_entries, NULL); + if ( rc != -1 || errno != ERANGE ) + return lib_fail_with_errno( + ctx, errno, + "expected xc_domain_claim_memory(GET, nr_entries=0, claim_set=NULL) " + "to fail with ERANGE, got rc=%d and nr_entries=%u", + rc, nr_entries); + + if ( nr_entries != 1 ) + return lib_fail(ctx, "expected required claim-set size 1, got %u", + nr_entries); + + lib_set_step(ctx, "Fetch the claim set using the returned entry count"); + rc = xc_domain_claim_memory(ctx->env->xch, ctx->dom_1, + XEN_DOMCTL_CLAIM_MEMORY_GET, + &nr_entries, &claim); + if ( rc ) + return lib_fail_with_errno(ctx, errno, + "xc_domain_claim_memory(GET) failed"); + + if ( nr_entries != 1 ) + return lib_fail(ctx, "expected one returned claim record, got %u", + nr_entries); + + if ( claim.target != XEN_DOMCTL_CLAIM_MEMORY_HOST || claim.pages != 0 ) + return lib_fail(ctx, + "expected a single zero host-wide claim, got target=%#x" + " pages=%" PRIu64, + claim.target, (uint64_t)claim.pages); + + return 0; +} diff --git a/tools/tests/mem-claim/input-phase1.h b/tools/tests/mem-claim/input-phase1.h new file mode 100644 index 000000000000..b86517363b96 --- /dev/null +++ b/tools/tests/mem-claim/input-phase1.h @@ -0,0 +1,173 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * input-phase1.h - Test Phase 1 argument validation for memory claims, + * including invalid claim parameters and claiming more pages than are free. + * + * I1-1 - I1-9: invalid claims are rejected with appropriate error codes. + * + * This file contains test cases to validate argument handling when dealing + * with NUMA-aware claim sets. + * + * Tests various invalid claim parameters (non-present node, too many claims, + * node id above UINT8_MAX, pages above INT32_MAX, non-zero pad, zero claim + * count, null claims pointer with non-zero count, and non-null claims pointer + * with zero count) and verify they are rejected with the expected error code. + */ +#include "libtestclaims.h" + +static int test_reject_non_present_node(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = { + .pages = 1, .target = ctx->env->num_nodes, /* Out-of-range node id */ + }; + + ctx->target1 = ctx->env->primary_node; + snprintf(ctx->result->params, sizeof(ctx->result->params), + "node=%u num_nodes=%u", claim.target, ctx->env->num_nodes); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, &claim, ENOENT, + "reject claim on a non-present NUMA node"); +} + +static int test_reject_too_many_claims(struct test_ctx *ctx) +{ + const uint32_t nr_claims = 0x100; /* Xen does not support such nr_claims */ + xen_memory_claim_t claims[nr_claims]; + + ctx->target1 = ctx->env->primary_node; + for ( uint32_t i = 0; i < nr_claims; i++ ) + claims[i] = ((xen_memory_claim_t){ + .pages = 1, + .target = ctx->env->primary_node, + }); + + snprintf(ctx->result->params, sizeof(ctx->result->params), "nr_claims=%u", + nr_claims); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, nr_claims, claims, E2BIG, + "reject claim list larger than the supported maximum"); +} + +static int test_reject_node_gt_uint8_max(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = { + .pages = 1, + .target = UINT8_MAX + 1U, + }; + + ctx->target1 = ctx->env->primary_node; + snprintf(ctx->result->params, sizeof(ctx->result->params), "node=%u", + claim.target); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, &claim, ENOENT, + "reject claim with node id above UINT8_MAX"); +} + +static int test_reject_pages_gt_int32_max(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = { + .pages = INT32_MAX + 1UL, + .target = ctx->env->primary_node, + }; + + ctx->target1 = ctx->env->primary_node; + snprintf(ctx->result->params, sizeof(ctx->result->params), + "pages=%" PRIu64 " node=%u", claim.pages, claim.target); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, &claim, ENOMEM, + "reject claim with pages larger than INT32_MAX"); +} + +static int test_reject_nonzero_pad(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = { + .pages = 1, + .target = ctx->env->primary_node, + .cmd = 1, + }; + + ctx->target1 = ctx->env->primary_node; + snprintf(ctx->result->params, sizeof(ctx->result->params), "node=%u cmd=%u", + claim.target, claim.cmd); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, &claim, EINVAL, + "reject claim with non-zero cmd"); +} + +static int test_reject_zero_claim_count(struct test_ctx *ctx) +{ + snprintf(ctx->result->params, sizeof(ctx->result->params), "nr_claims=0"); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 0, NULL, EINVAL, + "reject xc_domain_claim_memory() with nr_claims == 0"); +} + +static int test_null_claims_nonzero_count(struct test_ctx *ctx) +{ + snprintf(ctx->result->params, sizeof(ctx->result->params), + "nr_claims=1 claims=NULL"); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, NULL, EFAULT, + "reject xc_domain_claim_memory() with claims=NULL and nr_claims == 1"); +} + +static int test_zero_count_valid_pointer(struct test_ctx *ctx) +{ + xen_memory_claim_t claim = { + .pages = 1, + .target = ctx->env->primary_node, + }; + + snprintf(ctx->result->params, sizeof(ctx->result->params), + "nr_claims=0 claims=valid node=%u", claim.target); + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 0, &claim, EINVAL, + "reject xc_domain_claim_memory() with !nr_claims but a claims pointer"); +} + +/* + * I1-9: Check both xc_domain_claim_pages() and xc_domain_claim_memory() + * with pages > free pages fail with ENOMEM. + */ +static int test_claim_pages_gt_free_enomem(struct test_ctx *ctx) +{ + uint64_t free_pages; + + /* Get the total free memory for sizing the claim */ + lib_get_total_free_pages(ctx, &free_pages); + ctx->alloc_pages = free_pages + 1; + + snprintf(ctx->result->params, sizeof(ctx->result->params), + "claim=%" PRIu64 " free=%" PRIu64, ctx->alloc_pages, free_pages); + + rc = lib_claim_pages_legacy_failure( + ctx, ctx->dom_1, ctx->alloc_pages, ENOMEM, + "reject xc_domain_claim_pages() with pages > total free pages"); + if ( rc ) + return rc; + + rc = lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, + &(xen_memory_claim_t){ .pages = ctx->alloc_pages, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST }, + ENOMEM, "reject claim_memory() with pages > total free pages"); + + /* Get the free pages on the primary node and fail to claim more than it */ + lib_get_node_free_pages(ctx, ctx->env->primary_node, &free_pages, NULL); + rc = lib_expect_claim_memory_failure( + ctx, ctx->dom_1, 1, + &(xen_memory_claim_t){ + .pages = free_pages + 1, + .target = ctx->env->primary_node + }, + ENOMEM, "reject claim_memory() with pages > node free pages"); + return rc; +} diff --git a/tools/tests/mem-claim/input-phase2.h b/tools/tests/mem-claim/input-phase2.h new file mode 100644 index 000000000000..c8c4fd94931b --- /dev/null +++ b/tools/tests/mem-claim/input-phase2.h @@ -0,0 +1,96 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * input-phase2.h - Test argument validation for memory claims + * + * This file contains test cases to validate argument handling when dealing + * with NUMA-aware claim sets. + */ +#include "libtestclaims.h" + +/* Helper to expect ENOMEM for host-wide claims */ +static int claim_expect_host_wide_enomem(struct test_ctx *ctx, uint64_t claims) +{ + rc = lib_claim_pages_legacy_failure( + ctx, ctx->dom_2, claims, ENOMEM, + "expect ENOMEM for xc_domain_claim_pages() with claims > spare page"); + if ( rc ) + return rc; + + return lib_expect_claim_memory_failure( + ctx, ctx->dom_2, 1, + /* Request more than the spare to ensure failure */ + &(xen_memory_claim_t){ + .pages = claims, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST + }, + ENOMEM, "expect ENOMEM for claim_memory() with claims > spare pages"); +} + +/* Helper to expect ENOMEM for node-specific claims */ +static int claim_expect_enomem_on_node(struct test_ctx *ctx, uint64_t claims) +{ + return lib_expect_claim_memory_failure( + ctx, ctx->dom_2, 1, + /* Request more than the spare to ensure failure */ + &(xen_memory_claim_t){ .pages = claims, .target = ctx->target1 }, + ENOMEM, + "expect ENOMEM for claim_memory() with claims > spare pages"); +} + +/* + * I2-1 + * + * Create a legacy claim for dom_1 using claim_pages and assert claim calls + * for dom_2 exceeding the unclaimed memory fail with ENOMEM. + */ +static int test_claim_pages_causes_enomem(struct test_ctx *ctx) +{ + uint64_t free_pages; + + /* Get the total free memory for sizing the claim */ + lib_get_total_free_pages(ctx, &free_pages); + ctx->alloc_pages = free_pages - SPARE_PAGES; + + snprintf(ctx->result->params, sizeof(ctx->result->params), + "claim=%" PRIu64 " free=%" PRIu64, ctx->alloc_pages, free_pages); + + rc = lib_claim_pages_legacy( + ctx, ctx->dom_1, ctx->alloc_pages, + "dom_1: claim nearly all global memory with claim_pages"); + if ( rc ) + return rc; + + rc = claim_expect_host_wide_enomem(ctx, SPARE_PAGES * 2); + if ( !rc ) + rc = claim_expect_enomem_on_node(ctx, SPARE_PAGES * 2); + return rc; +} + +/* + * I2-2 + * + * Create a host-wide claim for dom 1 using claim_memory and assert that + * claim calls for dom 2 that exceed the unclaimed memory fail with ENOMEM. + */ +static int test_host_overcommit_enomem(struct test_ctx *ctx) +{ + if ( lib_claim_all_on_host(ctx, ctx->dom_1, SPARE_PAGES) ) + return -1; + rc = claim_expect_host_wide_enomem(ctx, SPARE_PAGES * 2); + if ( !rc ) + rc = claim_expect_enomem_on_node(ctx, SPARE_PAGES * 2); + return rc; +} + +/* + * I2-3 + * + * Create a primary-node claim for dom 1 using claim_memory and assert that + * claim calls for dom 2 that exceed the unclaimed memory fail with ENOMEM. + */ +static int test_node_overcommit_enomem(struct test_ctx *ctx) +{ + if ( lib_claim_all_on_node(ctx, ctx->dom_1, ctx->target1, SPARE_PAGES) ) + return -1; + return claim_expect_enomem_on_node(ctx, SPARE_PAGES * 2); +} diff --git a/tools/tests/mem-claim/libtestclaims.c b/tools/tests/mem-claim/libtestclaims.c new file mode 100644 index 000000000000..c921956670e1 --- /dev/null +++ b/tools/tests/mem-claim/libtestclaims.c @@ -0,0 +1,980 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Functional system test framework for testing memory claims in Xen. + * + * See test-claim-memory.c for details on a test suite using this framework + * and the verifications it is designed to perform on behalf of a test suite. + * + * Besides providing the test suite with functionality to validate the + * effects of memory claims on the system, such as querying memory state, + * creating and destroying test domains, performing claim operations and + * populating memory, it also provides a consistent way to manage test + * state and record failures with detailed messages that include the + * current step, test parameters, and a snapshot of relevant memory + * state to aid in diagnosing issues when a test fails. + * + * It also provides the framework to select test cases, run them, and + * restore the system to a clean state after tests by destroying test + * domains to release populated memory and claims, even if a test fails + * partway through. + * + * The functions cover: + * + * - Managing the test_ctx structure which holds the test environment, + * configuration, and results. + * + * - Providing helper functions to: + * - Create and destroy domains for testing, which are needed to make claims + * - Query the system's memory state in terms of free pages and outstanding + * claims, which are used for sizing claims and verifying their effects. + * - Perform claim operations and check their effects on the system. + * - Populate memory to test the blocking effects of claims. + * - Record failures with detailed messages that include the current step, + * test parameters, and a snapshot of relevant memory state. + * + * - Cleanup the test environment by destroying domains after tests, ensuring + * that claims are released and the system is left in a clean state even + * if a test fails partway through. + * + * - Providing a consistent way to skip tests when preconditions are not met, + * such as insufficient free memory or lack of multiple NUMA nodes. + * + * - Ensuring that all interactions with Xen are checked for errors, and that + * any failures are reported with detailed diagnostics. + * + * - Test cases should use the provided helper functions to perform all + * operations that interact with Xen or manage test state to ensure + * consistent failure reporting and cleanup. + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "libtestclaims.h" + +int rc; +static int step; +static const struct option long_options[] = { + { "help", no_argument, NULL, 'h' }, + { "list", no_argument, NULL, 'l' }, + { "test", required_argument, NULL, 't' }, + { "verbose", no_argument, NULL, 'v' }, + { NULL, 0, NULL, 0 }, +}; + +/* --- diagnostics helpers --- */ + +/* Append formatted text to a buffer, ensuring it is always null-terminated. */ +void lib_appendf(char *buf, size_t size, const char *fmt, ...) +{ + va_list ap; + size_t used = strlen(buf); + + if ( used >= size ) + return; + + va_start(ap, fmt); + vsnprintf(buf + used, size - used, fmt, ap); + va_end(ap); +} + +/* Print debug information if verbose mode is enabled. */ +void lib_debugf(struct test_ctx *ctx, const char *fmt, ...) +{ + va_list ap; + + if ( !ctx->cfg->verbose ) + return; + + fputs(" debug: ", stdout); + + va_start(ap, fmt); + vprintf(fmt, ap); + va_end(ap); + + fputc('\n', stdout); +} + +/* + * Set the current test step description, which is included in failure reports. + * If verbose mode is enabled, also print the step to stdout. + */ +void lib_set_step(struct test_ctx *ctx, const char *fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + vsnprintf(ctx->step, sizeof(ctx->step), fmt, ap); + va_end(ap); + + if ( ctx->cfg->verbose ) + printf(" step %d: %s\n", ++step, ctx->step); +} + +/* + * Record a test failure with a formatted message and errno, and include the + * current step, test parameters, and a snapshot of relevant memory state in + * the details. + */ +static void append_snapshot(struct test_ctx *ctx) +{ + xc_physinfo_t physinfo; + unsigned int nodes[2] = { ctx->target1, ctx->target2 }; + + xc_physinfo(ctx->env->xch, &physinfo); + ctx_appendf(ctx, + "\n snapshot: free_pages=%" PRIu64 + ", outstanding_pages=%" PRIu64, + physinfo.free_pages, physinfo.outstanding_pages); + + /* Include their free/total pages at the time of failure in the snapshot. */ + for ( size_t i = 0; i < ARRAY_SIZE(nodes); i++ ) + { + unsigned long free_pages, total_pages; + unsigned int node = nodes[i]; + + if ( node == INVALID_NODE ) + continue; + if ( i == 1 && node == nodes[0] ) + continue; + + lib_get_node_free_pages(ctx, node, &free_pages, &total_pages); + ctx_appendf(ctx, "\n snapshot: node%u free=%lu total=%lu", node, + free_pages, total_pages); + } +} + +/* + * Record a test failure with a formatted message and the given errno. + * + * Include the current step, test parameters, and a snapshot of relevant + * memory state in the details. + */ +int lib_fail_with_errno(struct test_ctx *ctx, int errnum, const char *fmt, ...) +{ + va_list ap; + + ctx->result->status = TEST_FAILED; + ctx->result->details[0] = '\0'; + + ctx_appendf(ctx, "step=%s", ctx->step[0] ? ctx->step : "(not set)"); + ctx_appendf(ctx, "\n dom_1=%u dom_2=%u target1=%s target2=%s", + ctx->dom_1, ctx->dom_2, + ctx->target1 == INVALID_NODE ? "n/a" : "set", + ctx->target2 == INVALID_NODE ? "n/a" : "set"); + + if ( ctx->target1 != INVALID_NODE ) + ctx_appendf(ctx, " (%" PRIu64 ")", ctx->target1); + if ( ctx->target2 != INVALID_NODE ) + ctx_appendf(ctx, " (%" PRIu64 ")", ctx->target2); + + ctx_appendf(ctx, "\n alloc_pages=%lu", ctx->alloc_pages); + + ctx_appendf(ctx, "\n cause: "); + va_start(ap, fmt); + vsnprintf(ctx->result->details + strlen(ctx->result->details), + sizeof(ctx->result->details) - strlen(ctx->result->details), fmt, + ap); + va_end(ap); + + if ( errnum ) + ctx_appendf(ctx, "\n errno=%d (%s)", errnum, strerror(errnum)); + + append_snapshot(ctx); + return -1; +} + +/* + * Record a test failure with a formatted message and the current errno. + * + * Calls lib_fail_with_errno() to do the actual recording, passing the current + * errno. + */ +int lib_fail(struct test_ctx *ctx, const char *fmt, ...) +{ + va_list ap; + int saved_errno = errno; + char message[1024]; + + va_start(ap, fmt); + vsnprintf(message, sizeof(message), fmt, ap); + va_end(ap); + + return lib_fail_with_errno(ctx, saved_errno, "%s", message); +} + +/* + * Record that a test was skipped with a formatted message. + * + * Include the message in the details to explain why the test was skipped. + */ +int lib_skip_test(struct test_ctx *ctx, const char *fmt, ...) +{ + va_list ap; + + ctx->result->status = TEST_SKIPPED; + ctx->result->details[0] = '\0'; + + va_start(ap, fmt); + vsnprintf(ctx->result->details, sizeof(ctx->result->details), fmt, ap); + va_end(ap); + + return 1; +} + +/* --- memory-state queries --- */ + +/* Get the number of free and total pages for a specific NUMA node. */ +int lib_get_node_free_pages(struct test_ctx *ctx, unsigned int node, + uint64_t *free_pages, uint64_t *total_pages) +{ + struct test_env *env = ctx->env; + + if ( node >= env->num_nodes ) /* Check node validity */ + return lib_fail(ctx, "Invalid node %u/%u", node, env->num_nodes); + + if ( xc_numainfo(env->xch, &env->num_nodes, env->meminfo, NULL) ) + return lib_fail(ctx, "xc_numainfo failed to get node memory info"); + + *free_pages = env->meminfo[node].memfree / XC_PAGE_SIZE; + if ( total_pages ) + *total_pages = env->meminfo[node].memsize / XC_PAGE_SIZE; + return 0; +} + +/* Get the total number of free pages available across all nodes. */ +int lib_get_total_free_pages(struct test_ctx *ctx, uint64_t *free_pages) +{ + struct test_env *env = ctx->env; + uint64_t free_bytes; + + if ( xc_availheap(env->xch, 0, 0, -1, &free_bytes) ) + return lib_fail(ctx, "xc_availheap failed to get total free pages"); + + *free_pages = free_bytes / XC_PAGE_SIZE; + return 0; +} + +/* Get the current total number of outstanding claimed pages on the host. */ +int lib_get_total_claims(struct test_ctx *ctx, + uint64_t *outstanding_pages_total) +{ + xc_physinfo_t physinfo; + + if ( xc_physinfo(ctx->env->xch, &physinfo) ) + return lib_fail(ctx, "xc_physinfo failed to get outstanding pages"); + + *outstanding_pages_total = physinfo.outstanding_pages; + return 0; +} + +/* --- claim check operations --- */ + +/* Check the current outstanding pages against the expected value. */ +int lib_check_claim(struct test_ctx *ctx, uint64_t baseline_outstanding, + uint64_t expected_delta, const char *reason) +{ + xc_physinfo_t physinfo; + uint64_t expected = baseline_outstanding + expected_delta; + + lib_set_step(ctx, "%s", reason); + if ( xc_physinfo(ctx->env->xch, &physinfo) ) + return lib_fail(ctx, "xc_physinfo failed to get outstanding pages"); + + if ( physinfo.outstanding_pages != expected ) + return lib_fail_with_errno( + ctx, 0, "expected outstanding_pages=%" PRIu64 ", got %" PRIu64, + expected, physinfo.outstanding_pages); + return 0; +} + +/* --- domain lifecycle --- */ + +/* + * Create a domain with the specified configuration and label. + * Record a failure if the creation or maxmem setting fails. + * + * On success, the new domain ID is stored in *domid. + */ +int lib_create_domain(struct test_ctx *ctx, uint32_t *domid, const char *label) +{ + struct xen_domctl_createdomain create = ctx->env->create_template; + + lib_set_step(ctx, "create %s domain", label); + *domid = DOMID_INVALID; + if ( xc_domain_create(ctx->env->xch, domid, &create) ) + return lib_fail(ctx, "xc_domain_create(%s) failed", label); + + lib_set_step(ctx, "set maxmem for %s domain", label); + if ( xc_domain_setmaxmem(ctx->env->xch, *domid, -1) ) + { + lib_destroy_domain(ctx, domid, label); + return lib_fail(ctx, "xc_domain_setmaxmem(%s) failed", label); + } + + return 0; +} + +/* + * Destroy the specified domain, if it is valid. + * Add the destroy step with the given label to the current test description. + * Record a failure if the destroy operation fails. + * + * This should be called during test cleanup to ensure domains are destroyed + * and claims are released even if a test fails partway through. + */ +int lib_destroy_domain(struct test_ctx *ctx, uint32_t *domid, const char *label) +{ + if ( *domid == DOMID_INVALID ) + return 0; + + lib_set_step(ctx, "destroy %s domain", label); + rc = xc_domain_destroy(ctx->env->xch, *domid); + *domid = DOMID_INVALID; + if ( rc ) + { + if ( ctx->result->status == TEST_FAILED ) + { + ctx_appendf(ctx, + "\n cleanup: xc_domain_destroy(%s) failed: %d (%s)", + label, errno, strerror(errno)); + return -1; + } + + return lib_fail(ctx, "xc_domain_destroy(%s) failed", label); + } + + return 0; +} + +/* --- claim operations --- */ + +/* + * Attempt to claim memory with the specified parameters. + * Record the failure if the claim operation fails. + */ +int lib_claim_memory(struct test_ctx *ctx, uint32_t domid, uint32_t records, + xen_memory_claim_t *claim_set, const char *reason) +{ + lib_set_step(ctx, "%s", reason); + rc = xc_domain_claim_memory(ctx->env->xch, domid, + XEN_DOMCTL_CLAIM_MEMORY_SET, &records, + claim_set); + if ( rc ) + { + uint64_t outstanding_pages, node_free, total_pages; + + lib_get_node_free_pages(ctx, ctx->target1, &node_free, &total_pages); + lib_get_total_claims(ctx, &outstanding_pages); + + return lib_fail(ctx, + "xc_domain_claim_memory failed: node=%" PRIu64 + "\n total_outstanding: %" PRIu64 + "\n total_pages: %" PRIu64 + "\n node free_pages: %" PRIu64, + ctx->target1, outstanding_pages, total_pages, + node_free); + } + return rc; +} + +/* + * Attempt to claim memory with the specified parameters, expecting it to fail + * with the specified errno. Record a failure if it does not fail as expected. + */ +int lib_expect_claim_memory_failure(struct test_ctx *ctx, uint32_t domid, + uint32_t records, + xen_memory_claim_t *claim_set, + int expected_errno, const char *reason) +{ + lib_set_step(ctx, "%s", reason); + rc = xc_domain_claim_memory(ctx->env->xch, domid, + XEN_DOMCTL_CLAIM_MEMORY_SET, &records, + claim_set); + if ( rc == -1 && errno == expected_errno ) + return 0; + + return lib_fail_with_errno(ctx, errno, + "expected xc_domain_claim_memory() to fail with " + "errno=%d (%s), got rc=%d", + expected_errno, strerror(expected_errno), rc); +} + +/* + * Release all claims for the specified domain by setting a zero claim. + * Record the failure if the claim release operation fails. + */ +int lib_release_all_claims(struct test_ctx *ctx, uint32_t domid) +{ + uint32_t records = 1; + + lib_set_step(ctx, "release all claims with zero claim"); + rc = xc_domain_claim_memory(ctx->env->xch, domid, + XEN_DOMCTL_CLAIM_MEMORY_SET, &records, + &(xen_memory_claim_t){}); + if ( rc ) + return lib_fail(ctx, "xc_domain_claim_memory(..., pages=0) failed"); + return 0; +} + +/* + * Claim all available memory on the host except for a specified number + * of pages to spare. Record the failure if the claim operation fails. + */ +int lib_claim_all_on_host(struct test_ctx *ctx, uint32_t domid, + unsigned int spare) +{ + unsigned long free_pages; + unsigned long claim_pages = 0; + + lib_set_step(ctx, "claim all except %u pages on host", spare); + lib_get_total_free_pages(ctx, &free_pages); + if ( free_pages <= spare ) + return lib_fail(ctx, "Not enough free pages @ host, spare=%u, free=%lu", + spare, free_pages); + + claim_pages += free_pages - spare; + snprintf(ctx->result->params, sizeof(ctx->result->params), + "claim all pages except %u pages on host claim=%lu free=%lu", + spare, claim_pages, free_pages); + return lib_claim_memory( + ctx, domid, 1, + &(xen_memory_claim_t){ + .pages = claim_pages, + .target = XEN_DOMCTL_CLAIM_MEMORY_HOST + }, + ctx->result->params); +} + +/* + * Claim all available memory on the specified node, except for the given + * spare pages to tolerate minor fluctuations in free memory. + * + * Verify the domain's outstanding claims after installing the claim. + */ +int lib_claim_all_on_node(struct test_ctx *ctx, uint32_t domid, + unsigned int node, unsigned int spare) +{ + uint64_t global_before, global_after, free_pages, claim_pages = 0; + uint64_t dom_claims_before; + xc_domaininfo_t info; + + lib_set_step(ctx, "claim all except %u pages on node %u", spare, node); + lib_get_node_free_pages(ctx, node, &free_pages, NULL); + if ( free_pages <= spare ) + return lib_fail(ctx, "Not enough pages @ node %u, spare=%u, free=%lu", + node, spare, free_pages); + + claim_pages += free_pages - spare; + snprintf(ctx->result->params, sizeof(ctx->result->params), + "claim all pages except %u pages on node %u claim=%lu free=%lu", + spare, node, claim_pages, free_pages); + + /* + * For asserting the claims state after installing the claim, we need + * to know both the total outstanding claims and the domain's outstanding. + */ + lib_get_total_claims(ctx, &global_before); + if ( xc_domain_getinfo_single(ctx->env->xch, domid, &info) ) + return lib_fail(ctx, "xc_domain_getinfo failed to get domain claims"); + dom_claims_before = info.outstanding_pages; + + rc = lib_claim_memory( + ctx, domid, 1, + &(xen_memory_claim_t){ .pages = claim_pages, .target = node }, + ctx->result->params); + if ( rc ) + return rc; + lib_get_total_claims(ctx, &global_after); + + if ( xc_domain_getinfo_single(ctx->env->xch, domid, &info) ) + return lib_fail(ctx, "xc_domain_getinfo failed to get domain claims"); + + if ( info.outstanding_pages != claim_pages ) + return lib_fail(ctx, "unexpected claims installation: exp=%lu, got=%lu", + claim_pages, info.outstanding_pages); + + if ( global_after - global_before != claim_pages - dom_claims_before ) + return lib_fail(ctx, "unexpexcted delta @ node %u: exp=%lu, got=%lu", + node, claim_pages, global_before - global_after); + return 0; +} + +/* + * Attempt to claim memory with the legacy xc_domain_claim_pages() API. + * Record the failure if the claim operation fails. + */ +int lib_claim_pages_legacy(struct test_ctx *ctx, uint32_t domid, + unsigned long nr_pages, const char *reason) +{ + lib_set_step(ctx, "%s", reason); + rc = xc_domain_claim_pages(ctx->env->xch, domid, nr_pages); + if ( rc ) + return lib_fail(ctx, "xc_domain_claim_pages(%lu) failed", nr_pages); + return 0; +} + +/* + * Attempt to claim memory with the legacy xc_domain_claim_pages() API. + * Expect it to fail with the specified errno. + * Record a failure on success or if it fails with an unexpected errno. + */ +int lib_claim_pages_legacy_failure(struct test_ctx *ctx, uint32_t domid, + unsigned long request, int expected_errno, + const char *reason) +{ + uint64_t outstanding_claims, free_pages; + + /* + * Sanity check: Check that there are not enough free pages for installing + * the claim, as this is the only condition under which the claim install + * is expected to fail with ENOMEM. If this fails, the previous actions + * of the test did not properly set up the expected conditions for the + * claim to fail, so we record this as the cause of failure. + */ + lib_get_total_claims(ctx, &outstanding_claims); + lib_get_total_free_pages(ctx, &free_pages); + if ( request < free_pages - outstanding_claims ) + return lib_fail(ctx, + "too many unclaimed pages to expect ENOMEM: " + "request=%lu, free=%" PRIu64 " - claims=%" PRIu64 + "=%" PRIu64, + request, free_pages, outstanding_claims, + free_pages - outstanding_claims); + lib_set_step(ctx, "%s", reason); + rc = xc_domain_claim_pages(ctx->env->xch, domid, request); + if ( rc == -1 && errno == expected_errno ) + return 0; + + return lib_fail_with_errno(ctx, errno, + "expected xc_domain_claim_pages() to fail " + "with errno=%d(%s), got rc=%d", + expected_errno, strerror(expected_errno), rc); +} + +/* --- physmap population --- */ + +/* + * Private helper function to populate extents at the specified GPFN + * with the xc_domain_populate_physmap() API, and return the result code. + * + * Tests may use its callers lib_populate_success() or lib_populate_failure() + * which record the failure the actual result did not match the expectation. + */ +static int lib_populate_physmap(struct test_ctx *ctx, lib_populate_args_t args) +{ + xen_pfn_t *frames; + + frames = calloc(args.nr_extents, sizeof(*frames)); + if ( !frames ) + return lib_fail(ctx, "calloc(%lu) failed", args.nr_extents); + + for ( unsigned long i = 0; i < args.nr_extents; i++ ) + frames[i] = args.start + i; + + errno = 0; + rc = xc_domain_populate_physmap_exact(ctx->env->xch, args.domid, + args.nr_extents, args.order, + args.flags, frames); + free(frames); + return rc; +} + +/* + * Populate extents at the specified GPFN with checking if it + * succeeded. Record the failure with diagnostics if it did not. + */ +int lib_populate_success(struct test_ctx *ctx, lib_populate_args_t args) +{ + rc = lib_populate_physmap(ctx, args); + if ( rc ) + return lib_fail(ctx, "expected populate to succeed for node %u", + XENMEMF_get_node(args.flags)); + return 0; +} + +/* + * Attempt to populate extents at the specified GPFN with checking if it + * failed. Record a failure with diagnostics if it did not fail as expected. + */ +int lib_populate_failure(struct test_ctx *ctx, lib_populate_args_t args) +{ + rc = lib_populate_physmap(ctx, args); + if ( rc == 0 ) + return lib_fail_with_errno( + ctx, 0, "expected exact-node populate to fail for node %u", + XENMEMF_get_node(args.flags)); + return 0; +} + +/* --- test runner --- */ + +static double timespec_diff_ms(const struct timespec *start, + const struct timespec *end) +{ + double sec = (double)(end->tv_sec - start->tv_sec); + double nsec = (double)(end->tv_nsec - start->tv_nsec); + + return sec * 1000.0 + nsec / 1e6; +} + +static void usage(FILE *stream, const char *prog) +{ + fprintf(stream, + "Usage: %s [OPTIONS]\n\n" + "Options:\n" + " -l, --list List available test IDs and exit\n" + " -t, --test ID Run only the specified test ID (repeatable)\n" + " -v, --verbose Print per-step progress\n" + " -h, --help Show this help text\n", + prog); +} + +int lib_print_available_tests(const struct test_case *cases, size_t num_cases) +{ + puts("Available tests:"); + for ( size_t i = 0; i < num_cases; i++ ) + printf(" %s %s\n", cases[i].id, cases[i].name); + return 0; +} + +/* + * Parse command-line arguments to configure the test run. + * It populates the runtime_config struct with the parsed configuration, + * including test IDs and the verbose flag. + * + * It supports filtering tests by test ID and enabling verbose output. + * If --list is specified, prints available tests and exits. + * By default, all tests will be run with concise output. + * If cfg.list_only is set, the caller should exit after this function returns. + * + * Returns 0 on success, or 1 on failure (invalid arguments) + */ +int lib_parse_args(int argc, char *argv[], struct runtime_config *cfg) +{ + int opt; + + while ( (opt = getopt_long(argc, argv, "hlt:v", long_options, NULL)) != -1 ) + { + switch ( opt ) + { + case 'h': + usage(stdout, argv[0]); + case 'l': + cfg->list_only = true; + break; + + case 't': + if ( cfg->nr_selected_ids >= ARRAY_SIZE(cfg->selected_ids) ) + errx(1, "too many --test selectors (max %zu)", + ARRAY_SIZE(cfg->selected_ids)); + cfg->selected_ids[cfg->nr_selected_ids++] = optarg; + break; + + case 'v': + cfg->verbose = true; + break; + + default: + usage(stderr, argv[0]); + return 1; + } + } + + if ( cfg->list_only ) + return 0; + + printf("========= testcase program: %s ==========\n", argv[0]); + if ( cfg->nr_selected_ids ) + { + printf("Selected %zu test(s):\n", cfg->nr_selected_ids); + for ( size_t i = 0; i < cfg->nr_selected_ids; i++ ) + printf(" %s\n", cfg->selected_ids[i]); + } + return 0; +} + +/* + * Run a single test case, capturing results and ensuring cleanup. + * + * Outstanding claims are tracked baseline_outstanding are are checked + * to be reset to the baseline at the end of the test, ensuring that all + * claims are released after each test case. + * + * Returns 0 on success, or -1 on failure with result details populated. + */ +int lib_run_one_test(struct test_env *env, const struct runtime_config *cfg, + const struct test_case *test, struct test_result *result) +{ + struct test_ctx ctx = { + .env = env, + .cfg = cfg, + .result = result, + .dom_1 = DOMID_INVALID, + .dom_2 = DOMID_INVALID, + .target1 = env->primary_node, + .target2 = INVALID_NODE, + .alloc_pages = 0, + .step = "", + }; + uint64_t baseline_outstanding; + struct timespec start, end; + + if ( env->num_nodes >= 2 ) + ctx.target2 = env->secondary_node; + + result->test = test; + result->status = TEST_PASSED; + result->params[0] = '\0'; + result->details[0] = '\0'; + result->duration_ms = 0.0; + + /* + * Fixture: capture baseline, create the primary domain, run the test + * body, then always destroy any remaining test domains and verify + * outstanding pages returned to baseline. + */ + rc = lib_get_total_claims(&ctx, &baseline_outstanding); + if ( rc ) + goto out; + + rc = lib_create_domain(&ctx, &ctx.dom_1, "primary"); + if ( rc ) + goto out; + + rc = lib_create_domain(&ctx, &ctx.dom_2, "secondary"); + if ( rc ) + goto out; + + clock_gettime(CLOCK_MONOTONIC, &start); + + errno = 0; + rc = test->test(&ctx); /* Run the test body */ + + clock_gettime(CLOCK_MONOTONIC, &end); + result->duration_ms = timespec_diff_ms(&start, &end); + + if ( rc > 0 && result->status == TEST_SKIPPED ) + rc = 0; + + out: + /* Cleanup test domains without affecting the return code if rc != 0 */ + if ( lib_destroy_domain(&ctx, &ctx.dom_2, "helper") && !rc ) + rc = -1; + + if ( lib_destroy_domain(&ctx, &ctx.dom_1, "primary") && !rc ) + rc = -1; + + if ( !rc && + lib_check_claim(&ctx, baseline_outstanding, 0, + "check cleanup restored baseline claimed pages") ) + rc = -1; + + if ( rc < 0 ) + result->status = TEST_FAILED; + + return rc; +} + +/* + * Run all test cases, filtering based on the runtime configuration, and print + * results to stdout. Each test case is run with lib_run_one_test() which + * captures detailed diagnostics on failure. + */ +void lib_run_tests(struct test_env *env, char *argv0, + const struct runtime_config *cfg, + const struct test_case *test_cases, + unsigned int num_test_cases, struct test_result *results) +{ + for ( size_t i = 0; i < num_test_cases; i++ ) + { + struct test_result *result = &results[i]; + + if ( !test_is_selected(cfg, &test_cases[i]) ) + continue; + + lib_run_one_test(env, cfg, &test_cases[i], result); + + /* Print a summary: test, result, including parameters and duration. */ + printf("%s::%s [%s] %s (%.2f ms)\n", argv0, result->test->id, + result->params[0] ? result->params : "default", + status_name(result->status), result->duration_ms); + + if ( result->status == TEST_FAILED || result->status == TEST_SKIPPED ) + printf(" %s\n", result->details); + } +} + +/* + * Print a concise summary of test results, including counts of passed, failed, + * and skipped tests, and details for any failures or skips. + */ +int lib_summary(const struct test_result *results, unsigned int num_results) +{ + unsigned int passed = 0, failed = 0, skipped = 0; + + puts("================== short test summary info ================="); + for ( size_t i = 0; i < num_results; i++ ) + { + if ( !results[i].test ) + continue; + + printf("%s %s %s\n", status_name(results[i].status), + results[i].test->id, results[i].test->name); + + switch ( results[i].status ) + { + case TEST_PASSED: + passed++; + break; + case TEST_FAILED: + failed++; + printf(" %s\n", results[i].details); + break; + case TEST_SKIPPED: + skipped++; + printf(" %s\n", results[i].details); + break; + } + } + printf("============ %u passed, %u failed, %u skipped ============\n", + passed, failed, skipped); + return failed; +} + +/* Update the create_template structure based on the host's capabilities */ +static void fixup_create_template(struct xen_domctl_createdomain *create, + const xc_physinfo_t *physinfo) +{ +#if defined(__x86_64__) || defined(__i386__) + if ( !(physinfo->capabilities & XEN_SYSCTL_PHYSCAP_hap) ) + create->flags &= ~XEN_DOMCTL_CDF_hap; + + if ( !(physinfo->capabilities & + (XEN_SYSCTL_PHYSCAP_hap | XEN_SYSCTL_PHYSCAP_shadow)) || + !(physinfo->capabilities & XEN_SYSCTL_PHYSCAP_hvm) ) + { + create->flags &= ~XEN_DOMCTL_CDF_hvm; + create->arch.emulation_flags = 0; + } +#else + (void)physinfo; +#endif +} + +/* + * Initialise the test environment by opening the Xen control interface, + * querying the number of NUMA nodes, and populating memory information. + * Returns 0 on success, or -1 on failure with errno set. + */ +int lib_initialise_test_env(struct test_env *env) +{ + xc_physinfo_t physinfo; + + env->xch = xc_interface_open(NULL, NULL, 0); + if ( !env->xch ) + err(1, "xc_interface_open"); + + /* + * Get the number of nodes to allocate xc_meminfo_t structures for. + * If NUMA is disabled, this will return one node, so we can still + * run tests that don't require > 1 NUMA node on non-NUMA hosts. + */ + xc_numainfo(env->xch, &env->num_nodes, NULL, NULL); + + /* Allocate memory for xc_meminfo_t structures */ + env->meminfo = calloc(env->num_nodes, sizeof(*env->meminfo)); + if ( !env->meminfo ) + err(1, "calloc"); + + /* Populate meminfo structures with current data */ + xc_numainfo(env->xch, &env->num_nodes, env->meminfo, NULL); + xc_physinfo(env->xch, &physinfo); + + /* Initialise the create_template structure */ + env->create_template = (struct xen_domctl_createdomain){ + .flags = XEN_DOMCTL_CDF_hvm | XEN_DOMCTL_CDF_hap, + .max_vcpus = 1, + .max_grant_frames = 1, + .grant_opts = XEN_DOMCTL_GRANT_version(1), +#if defined(__x86_64__) || defined(__i386__) + .arch = { .emulation_flags = XEN_X86_EMU_LAPIC, }, +#endif + }; + /* Update the create_template structure based on the host's capabilities */ + fixup_create_template(&env->create_template, &physinfo); + + env->primary_node = 0; + env->secondary_node = 0; + env->have_secondary_node = false; + + /* + * Pick the node with the most free memory as the primary node, and if + * there's a second node, pick the one with the next most free memory as + * the secondary. + */ + for ( unsigned int i = 1; i < env->num_nodes; i++ ) + { + if ( env->meminfo[i].memfree > env->meminfo[env->primary_node].memfree ) + { + env->secondary_node = env->primary_node; + env->primary_node = i; + env->have_secondary_node = true; + } + else if ( !env->have_secondary_node || + env->meminfo[i].memfree > + env->meminfo[env->secondary_node].memfree ) + { + env->secondary_node = i; + env->have_secondary_node = true; + } + } + + if ( env->num_nodes < 2 ) + env->have_secondary_node = false; + else if ( env->secondary_node == env->primary_node ) + { + for ( unsigned int i = 0; i < env->num_nodes; i++ ) + { + if ( i != env->primary_node ) + { + env->secondary_node = i; + env->have_secondary_node = true; + break; + } + } + } + + return 0; +} + +/* Free allocated memory and close the Xen control interface */ +void lib_release_test_env(struct test_env *env) +{ + free(env->meminfo); + env->meminfo = NULL; + + if ( env->xch ) + { + xc_interface_close(env->xch); + env->xch = NULL; + } +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/tools/tests/mem-claim/libtestclaims.h b/tools/tests/mem-claim/libtestclaims.h new file mode 100644 index 000000000000..4fb171effd52 --- /dev/null +++ b/tools/tests/mem-claim/libtestclaims.h @@ -0,0 +1,203 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Header file for the functional system test framework + * testing for memory claims in the Xen hypervisor. + * + * This header declares the interface for the test framework implemented + * in libtestclaims.c. + * + * It includes the definitions of the test environment, test context, and + * helper functions for performing memory claim operations, querying memory + * state, managing test domains, and recording test results. + */ +#ifndef _LIBTEST_MEM_CLAIMS_ +#define _LIBTEST_MEM_CLAIMS_ + +#include +#include +#include +#include + +#include + +#define MAX_SELECTED_TESTS 32 +#define INVALID_NODE UINT_MAX +#define SPARE_PAGES 200 + +struct test_env { + xc_interface *xch; + struct xen_domctl_createdomain create_template; + unsigned int num_nodes; + unsigned int primary_node; + unsigned int secondary_node; + bool have_secondary_node; + xc_meminfo_t *meminfo; +}; + +struct runtime_config { + const char *selected_ids[MAX_SELECTED_TESTS]; + size_t nr_selected_ids; + bool list_only; + bool verbose; +}; + +enum test_status { + TEST_PASSED, + TEST_FAILED, + TEST_SKIPPED, +}; + +struct test_case; + +struct test_result { + const struct test_case *test; + enum test_status status; + char params[256]; + char details[4096]; + double duration_ms; +}; + +struct test_ctx { + struct test_env *env; + const struct runtime_config *cfg; + struct test_result *result; + uint32_t dom_1; + uint32_t dom_2; + uint64_t target1; + uint64_t target2; + uint64_t alloc_pages; + char step[160]; +}; + +struct lib_populate_physmap_args { + uint32_t domid; + xen_pfn_t start; + unsigned long nr_extents; + unsigned int order; + unsigned int flags; +}; +typedef struct lib_populate_physmap_args lib_populate_args_t; + +/* + * test_fn_t: the test body. Called after the fixture has created + * ctx->domid and captured a baseline outstanding-pages count. Tests needing + * extra domains should create and destroy them explicitly. + * Returns 0 on pass, -1 on fail, 1 on skip. + */ +typedef int (*test_fn_t)(struct test_ctx *ctx); + +struct test_case { + const char *id; + const char *name; + test_fn_t test; +}; + +/* --- diagnostics helpers --- */ +void lib_appendf(char *buf, size_t size, const char *fmt, ...) +__attribute__((format(printf, 3, 4))); + +/* Append a formatted string to ctx->result->details. */ +#define ctx_appendf(ctx, ...) \ + lib_appendf((ctx)->result->details, sizeof((ctx)->result->details), \ + __VA_ARGS__) +void lib_debugf(struct test_ctx *ctx, const char *fmt, ...) +__attribute__((format(printf, 2, 3))); +void lib_set_step(struct test_ctx *ctx, const char *fmt, ...) +__attribute__((format(printf, 2, 3))); +int lib_fail_with_errno(struct test_ctx *ctx, int errnum, const char *fmt, ...) +__attribute__((format(printf, 3, 4))); +int lib_fail(struct test_ctx *ctx, const char *fmt, ...) +__attribute__((format(printf, 2, 3))); +int lib_skip_test(struct test_ctx *ctx, const char *fmt, ...) +__attribute__((format(printf, 2, 3))); + +/* --- memory-state queries --- */ +int lib_get_node_free_pages(struct test_ctx *ctx, unsigned int node, + unsigned long *free_pages, + unsigned long *total_pages); +int lib_get_total_free_pages(struct test_ctx *ctx, unsigned long *free_pages); +int lib_get_total_claims(struct test_ctx *ctx, + uint64_t *outstanding_pages_global); +int lib_check_claim(struct test_ctx *ctx, uint64_t baseline_outstanding, + uint64_t expected_delta, const char *reason); + +/* --- domain lifecycle --- */ +int lib_create_domain(struct test_ctx *ctx, uint32_t *domid, const char *label); +int lib_destroy_domain(struct test_ctx *ctx, uint32_t *domid, + const char *label); + +/* --- claim operations --- */ +int lib_claim_memory(struct test_ctx *ctx, uint32_t domid, uint32_t nr_claims, + xen_memory_claim_t *claims, const char *reason); +int lib_expect_claim_memory_failure(struct test_ctx *ctx, uint32_t domid, + uint32_t nr_claims, + xen_memory_claim_t *claims, + int expected_errno, const char *reason); +int lib_release_all_claims(struct test_ctx *ctx, uint32_t domid); +int lib_claim_pages_legacy(struct test_ctx *ctx, uint32_t domid, + unsigned long nr_pages, const char *reason); +int lib_claim_pages_legacy_failure(struct test_ctx *ctx, uint32_t domid, + unsigned long nr_pages, int expected_errno, + const char *reason); +int lib_claim_all_on_host(struct test_ctx *ctx, uint32_t domid, + unsigned int spare); +int lib_claim_all_on_node(struct test_ctx *ctx, uint32_t domid, uint32_t node, + uint32_t spare); + +/* --- physmap --- */ +int lib_populate_success(struct test_ctx *ctx, lib_populate_args_t args); +int lib_populate_failure(struct test_ctx *ctx, lib_populate_args_t args); + +/* --- test runner --- */ +int lib_print_available_tests(const struct test_case *cases, size_t num_cases); +int lib_parse_args(int argc, char *argv[], struct runtime_config *cfg); +int lib_run_one_test(struct test_env *env, const struct runtime_config *cfg, + const struct test_case *test, struct test_result *result); +void lib_run_tests(struct test_env *env, char *argv0, + const struct runtime_config *cfg, + const struct test_case *test_cases, + unsigned int num_test_cases, struct test_result *results); +int lib_summary(const struct test_result *results, unsigned int num_results); +int lib_initialise_test_env(struct test_env *env); +void lib_release_test_env(struct test_env *env); +unsigned long lib_default_alloc_pages(unsigned long free_pages); + +extern int rc; + +static inline const char *status_name(enum test_status status) +{ + switch ( status ) + { + case TEST_PASSED: + return "PASSED"; + case TEST_FAILED: + return "FAILED"; + case TEST_SKIPPED: + return "SKIPPED"; + } + return "UNKNOWN"; +} + +static inline bool test_is_selected(const struct runtime_config *cfg, + const struct test_case *test) +{ + if ( !cfg->nr_selected_ids ) + return true; + + for ( size_t i = 0; i < cfg->nr_selected_ids; i++ ) + if ( !strcmp(cfg->selected_ids[i], test->id) ) + return true; + return false; +} + +#endif /* _LIBTEST_MEM_CLAIMS_ */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ diff --git a/tools/tests/mem-claim/test-claim-memory.c b/tools/tests/mem-claim/test-claim-memory.c new file mode 100644 index 000000000000..006b1f534e50 --- /dev/null +++ b/tools/tests/mem-claim/test-claim-memory.c @@ -0,0 +1,130 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Functional system test suite for testing memory claims in Xen. + * + * It is designed to test the xc_domain_claim_memory() API and + * to reconfirm the xc_domain_claim_pages() API and interacts + * with the running Xen hypervisor in Dom0 using libxenctrl. + * + * The verifications performed by the test cases include: + * + * - Validating that claims can be successfully made with valid parameters + * and that they have the expected effects on the system's memory state, + * such as increasing the number of outstanding claimed pages. + * + * - Validating that invalid claim attempts are rejected with the expected + * error codes, such as EINVAL for invalid parameters or ENOMEM when + * claiming more pages than are free. + * + * - Validating the effects of memory claims on the system, such as blocking + * effects when claiming more pages than are free or left unclaimed by + * other domains, and the guarantees provided by claims such as reserved + * claimed pages not being allocated to other domains. + * + * For the need to perform these verifications, the test cases interact + * with the Xen hypervisor to query the system's memory state, create and + * destroy test domains, perform claim operations, and populate memory to + * test the blocking effects of claims. + * + * As the act of testing the blocking effects of claims involves allocating + * memory from the system, other operations that interact with the system's + * memory state should be avoided or kept to a minimum during the test run + * to avoid interference with the test results. + * + * During these interactions, the test cases record successes and failures + * with detailed messages that include the current step, test parameters, + * and a snapshot of relevant memory state to aid in diagnosing issues + * when a test fails. + * + * The test suite also ensures that domains are destroyed after tests to + * clean up claims and leave the system in a clean state, even if a test + * fails partway through. + * + * Some test cases that require multiple NUMA nodes can be skipped if the + * system does not have a 2nd NUMA node, allowing the test suite to be run + * on single-node systems as well. + * + * It is designed to run on a quiet system as it stakes claims on the system's + * memory and verifies their effects, by allocating against the running system + * Xen hypervisor in Dom0 using libxenctrl. + */ +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "libtestclaims.h" +#include "accounting-1.h" +#include "input-phase1.h" +#include "input-phase2.h" + +/* Short helper to declare test cases more concisely. */ +#define CASE(ID, NAME, FN) \ + { \ + .id = (ID), .name = (NAME), .test = (FN) \ + } + +/* + * List of test cases. lib_run_tests() iterates over this list to run tests. + * + * Tests are identified by their id (e.g. "A1-1") and have a descriptive name + * and a function pointer to the test implementation. + */ +static const struct test_case cases[] = { + CASE("A1-1", "basic_node_claim", test_basic_node_claim), + CASE("A1-2", "host_wide_replace_after_alloc", test_update_host_after_alloc), + CASE("A1-3", "node_replace_after_alloc", test_node_replace_after_alloc), + CASE("A1-4", "legacy_host_wide_claim", test_legacy_host_wide_claim), + CASE("A1-5", "move_claim_between_nodes", test_move_claim_between_nodes), + CASE("A1-6", "zero_claim_resets_claim", test_zero_claim_resets_claim), + CASE("A1-7", "zero_claim_memory_reset", test_zero_claim_memory_resets), + CASE("A1-8", "query_claim_memory_size", test_query_claim_memory_size), + CASE("I1-1", "reject_non_present_node", test_reject_non_present_node), + CASE("I1-2", "reject_too_many_claims", test_reject_too_many_claims), + CASE("I1-3", "reject_node_gt_uint8_max", test_reject_node_gt_uint8_max), + CASE("I1-4", "reject_pages_gt_int32_max", test_reject_pages_gt_int32_max), + CASE("I1-5", "reject_nonzero_pad", test_reject_nonzero_pad), + CASE("I1-6", "reject_zero_claim_count", test_reject_zero_claim_count), + CASE("I1-7", "null_claims_nonzero_count", test_null_claims_nonzero_count), + CASE("I1-8", "zero_count_with_pointer", test_zero_count_valid_pointer), + CASE("I1-9", "claim_pages_gt_free_enomem", test_claim_pages_gt_free_enomem), + CASE("I2-1", "claim_pages_causes_enomem", test_claim_pages_causes_enomem), + CASE("I2-2", "claim_memory_causes_enomem", test_host_overcommit_enomem), + CASE("I2-3", "claim_prima_causes_enomem", test_node_overcommit_enomem), +}; + +/* Test entry point */ +int main(int argc, char **argv) +{ + struct test_result results[ARRAY_SIZE(cases)] = {}; + struct runtime_config cfg = {}; + struct test_env env = {}; + int retval; + + retval = lib_parse_args(argc, argv, &cfg); + if ( cfg.list_only ) + return lib_print_available_tests(cases, ARRAY_SIZE(cases)); + if ( !retval ) + { + lib_initialise_test_env(&env); + lib_run_tests(&env, argv[0], &cfg, cases, ARRAY_SIZE(cases), results); + retval = lib_summary(results, ARRAY_SIZE(results)); + lib_release_test_env(&env); + } + return retval ? EXIT_FAILURE : EXIT_SUCCESS; +} + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * tab-width: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Tue May 19 13:07:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:07:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1312991.1583141 (Exim 4.92) (envelope-from ) id 1wPKAh-0001lU-PX; Tue, 19 May 2026 13:07:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1312991.1583141; Tue, 19 May 2026 13:07:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKAh-0001lN-Lr; Tue, 19 May 2026 13:07:43 +0000 Received: by outflank-mailman (input) for mailman id 1312991; Tue, 19 May 2026 13:07:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKAf-0001ix-R7 for xen-devel@lists.xenproject.org; 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich Subject: [PATCH for-4.22] EFI: Fix boot from a device without a file system Date: Tue, 19 May 2026 15:06:57 +0200 Message-ID: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779196060-88D76A53-0AE0874E/0/0 X-purgate-type: clean X-purgate-size: 1737 When netbooting a unified Xen kernel image (via GRUB chainloader), the resulting loaded_image->DeviceHandle does not support SIMPLE_FILE_SYSTEM_PROTOCOL. Instead of crashing via noreturn PrintErrMesg(), print a message via PrintStr() and return NULL from get_parent_handle(). Signed-off-by: Szymon Acedański --- Tested on Intel Lunar Lake laptop via PXE-loaded GRUB chainloading the unified image including Xen built from upstream staging. Without the patch the boot aborts with: Couldn't obtain the File System Protocol Interface: ErrCode: 0x8000000000000003 (EFI_UNSUPPORTED, per UEFI spec Appendix D). With the patch, dom0 reaches login. xen/common/efi/boot.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index 9ea2183c0b..a6c3c371c6 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -471,6 +471,15 @@ static EFI_FILE_HANDLE __init get_parent_handle(const EFI_LOADED_IMAGE *loaded_i /* Get the file system interface. */ ret = efi_bs->HandleProtocol(loaded_image->DeviceHandle, &fs_protocol, (void **)&fio); + if ( ret == EFI_UNSUPPORTED ) + { + /* + * The image could come from a device without a file system, + * for example it could be a netbooted unified Xen kernel image. + */ + PrintStr(L"File System Protocol not supported on boot device\r\n"); + return NULL; + } if ( EFI_ERROR(ret) ) PrintErrMesg(L"Couldn't obtain the File System Protocol Interface", ret); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 13:24:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:24:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313003.1583150 (Exim 4.92) (envelope-from ) id 1wPKRA-0004kw-02; Tue, 19 May 2026 13:24:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313003.1583150; Tue, 19 May 2026 13:24:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKR9-0004kp-TX; Tue, 19 May 2026 13:24:43 +0000 Received: by outflank-mailman (input) for mailman id 1313003; Tue, 19 May 2026 13:24:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPKR8-0004kj-Jt for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:24:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKR7-00CAlK-Hm for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:24:41 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c6498-2eae-0a2a0a5409dd-0a2a4505abb8-2 for ; Tue, 19 May 2026 15:24:41 +0200 Received: from [209.85.208.181] (helo=mail-lj1-f181.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c6499-aaa8-0a2a45050019-d155d0b5b54e-3 for ; Tue, 19 May 2026 15:24:41 +0200 Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-393da8f389bso35100251fa.1 for ; Tue, 19 May 2026 06:24:41 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I wonder anyway whether ... >>> >>>> @@ -94,6 +95,9 @@ struct arch_domain { >>>> struct p2m_domain p2m; >>>> >>>> struct paging_domain paging; >>>> + >>>> + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); >>>> + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; >>> >>> ... a compile-time sized buffer is suitable here. Can't you allocate a buffer >>> just large enough to hold the string? >> >> It could be allocated dynamically. >> >> Does it make sense to evaluate in run-time what should be a buffer size? >> For this case I can't find analogue of realloc() in Xen. > > Hmm, I see xrealloc_array(), and surely we could gain xvrealloc_array() > which we'll need anyway once xrealloc_array() uses get converted. (I also > see x{,v}realloc_flex_struct(), but that's of no use here as it looks.) Oh, I missed to turned off "full match" during search... > >> Or it would be >> fine just to take something bigger as a const (lets say 2048) and use it >> for dynamic allocation? > > I'd rather not. Can't you determine how much space the string is going to > occupy? I thought about two options as alternatives: 1. Take as a length host RISC-V ISA string but theoretically we can emulate some extensions which aren't mentioned in host RISC-V ISA string so it could be longer. So not a good option. 2. Having two walks in init_guest_isa(): Introduce the following function: static size_t guest_isa_str_len(const unsigned long *isa_bitmap) { size_t len = 4; /* rvX prefix */ for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) { const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) continue; if ( ext->id >= RISCV_ISA_EXT_BASE ) len++; /* '_' separator */ len += strlen(ext->name); } return len + 1; /* NUL terminator */ } and then: int init_guest_isa(struct domain *d) { bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, RISCV_ISA_EXT_MAX); size_t len = guest_isa_str_len(d->arch.guest_isa); d->arch.guest_isa_str = xzalloc_array(char, len); if ( !d->arch.guest_isa_str ) return -ENOMEM; /* ... existing snprintf + strlcat loop unchanged ... */ } If approach 2 is a good one I can follow it. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 13:33:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:33:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313012.1583166 (Exim 4.92) (envelope-from ) id 1wPKZR-0006eQ-Qu; Tue, 19 May 2026 13:33:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313012.1583166; Tue, 19 May 2026 13:33:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKZR-0006eJ-Nx; Tue, 19 May 2026 13:33:17 +0000 Received: by outflank-mailman (input) for mailman id 1313012; Tue, 19 May 2026 13:33:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPKZR-0006dy-08 for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:33:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKZQ-006zNh-8b for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:33:16 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c6694-2eae-0a2a0a5409dd-0a2a4506865a-18 for ; Tue, 19 May 2026 15:33:16 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c669c-7371-0a2a45060019-d155da32c973-3 for ; Tue, 19 May 2026 15:33:16 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-bccd251d622so610272566b.3 for ; Tue, 19 May 2026 06:33:16 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779197596-87B7DD75-082C7119/10/73395122804 X-purgate-type: spam X-purgate-size: 4168 On 5/18/26 6:00 PM, Jan Beulich wrote: > On 08.05.2026 16:43, Oleksii Kurochko wrote: >> @@ -50,3 +52,107 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) >> >> return 0; >> } >> +int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) > > Nit: Blank line above here, please. > >> +{ >> + int res; >> + const struct dt_device_node *cpus = dt_find_node_by_path("/cpus"); >> + unsigned int cpu; >> + uint32_t timebase_frequency; >> + bool frequency_valid; >> + void *fdt = kinfo->fdt; >> + >> + dt_dprintk("Create cpus node\n"); >> + >> + if ( !cpus ) >> + { >> + dprintk(XENLOG_ERR, "Missing /cpus node in the device tree?\n"); >> + return -ENOENT; >> + } >> + >> + frequency_valid = dt_property_read_u32(cpus, "timebase-frequency", >> + &timebase_frequency); >> + >> + res = fdt_begin_node(fdt, "cpus"); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_cell(fdt, "#address-cells", 1); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_cell(fdt, "#size-cells", 0); >> + if ( res ) >> + return res; >> + >> + if ( frequency_valid ) >> + res = fdt_property_cell(fdt, "timebase-frequency", timebase_frequency); >> + >> + for ( cpu = 0; cpu < d->max_vcpus; cpu++ ) > > Limit cpu's scope to this loop? I will remove 'unsigned int cpu' from the function-level declarations and moved it into the for loop. > >> + { >> + char buf[64]; >> + uint32_t reg = cpu_to_fdt32(cpu); > > Isn't this a byte-order adjustment? If so, how come ... > >> + snprintf(buf, sizeof(buf), "cpu@%u", cpu); > > ... the result is passed to an entirely non-FDT function? (Most pre-existing uses > of the function that I can spot store something in memory, i.e. adjusting byte- > order makes sense there.) But here pure cpu is used instead of reg variable and reg variable is used here ... > >> + res = fdt_begin_node(fdt, buf); >> + if ( res ) >> + return res; >> + >> + res = fdt_property(fdt, "reg", ®, sizeof(reg)); >> + if ( res ) >> + return res; ... but it we could drop it and use just: res = fdt_property_cell(fdt, "reg", cpu); fdt_property_cell will take care if a byte-order adjustment. >> + >> + res = fdt_property_string(fdt, "status", "okay"); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_string(fdt, "compatible", "riscv"); >> + if ( res ) >> + return res; >> + >> + BUILD_BUG_ON((sizeof("riscv,") + >> + sizeof_field(struct gstage_mode_desc, name)) >= sizeof(buf)); >> + snprintf(buf, sizeof(buf), "riscv,%s", max_gstage_mode->name); >> + res = fdt_property_string(fdt, "mmu-type", buf); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_string(fdt, "riscv,isa", d->arch.guest_isa_str); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_string(fdt, "device_type", "cpu"); >> + if ( res ) >> + return res; >> + >> + res = fdt_begin_node(fdt, "interrupt-controller"); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_string(fdt, "compatible", "riscv,cpu-intc"); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_cell(fdt, "#interrupt-cells", 1); >> + if ( res ) >> + return res; >> + >> + res = fdt_property(fdt, "interrupt-controller", NULL, 0); >> + if ( res ) >> + return res; >> + >> + res = fdt_property_u32(fdt, "phandle", alloc_phandle(kinfo)); >> + if ( res ) >> + return res; >> + >> + /* end of interrupt-controller */ > > Nit: Comment style. Also such a comment pretty clearly calls for a counterpart > at the start. Sure, I will add one. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1779198023-B7957FF4-45845DE1/0/0 X-purgate-type: clean X-purgate-size: 3393 On 19.05.2026 15:24, Oleksii Kurochko wrote: > > > On 5/19/26 2:12 PM, Jan Beulich wrote: >> On 19.05.2026 13:59, Oleksii Kurochko wrote: >>> On 5/18/26 5:51 PM, Jan Beulich wrote: >>>> On 08.05.2026 16:43, Oleksii Kurochko wrote: >>>>> --- a/xen/arch/riscv/include/asm/cpufeature.h >>>>> +++ b/xen/arch/riscv/include/asm/cpufeature.h >>>>> @@ -17,6 +17,8 @@ >>>>> */ >>>>> #define RISCV_ISA_EXT_BASE 26 >>>>> >>>>> +#define RISCV_GUEST_ISA_STR_MAX 256 >>>> >>>> This looks like it won't be good for very long, seeing how long ISA strings can >>>> get. I wonder anyway whether ... >>>> >>>>> @@ -94,6 +95,9 @@ struct arch_domain { >>>>> struct p2m_domain p2m; >>>>> >>>>> struct paging_domain paging; >>>>> + >>>>> + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); >>>>> + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; >>>> >>>> ... a compile-time sized buffer is suitable here. Can't you allocate a buffer >>>> just large enough to hold the string? >>> >>> It could be allocated dynamically. >>> >>> Does it make sense to evaluate in run-time what should be a buffer size? >>> For this case I can't find analogue of realloc() in Xen. >> >> Hmm, I see xrealloc_array(), and surely we could gain xvrealloc_array() >> which we'll need anyway once xrealloc_array() uses get converted. (I also >> see x{,v}realloc_flex_struct(), but that's of no use here as it looks.) > > Oh, I missed to turned off "full match" during search... > >> >>> Or it would be >>> fine just to take something bigger as a const (lets say 2048) and use it >>> for dynamic allocation? >> >> I'd rather not. Can't you determine how much space the string is going to >> occupy? > > I thought about two options as alternatives: > > 1. Take as a length host RISC-V ISA string but theoretically we can > emulate some extensions which aren't mentioned in host RISC-V ISA string > so it could be longer. So not a good option. > > 2. Having two walks in init_guest_isa(): > Introduce the following function: > static size_t guest_isa_str_len(const unsigned long *isa_bitmap) > { > size_t len = 4; /* rvX prefix */ > > for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) > { > const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; > > if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) > continue; > > if ( ext->id >= RISCV_ISA_EXT_BASE ) > len++; /* '_' separator */ > > len += strlen(ext->name); > } > > return len + 1; /* NUL terminator */ > } > > and then: > > int init_guest_isa(struct domain *d) > { > bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, > RISCV_ISA_EXT_MAX); > > size_t len = guest_isa_str_len(d->arch.guest_isa); > d->arch.guest_isa_str = xzalloc_array(char, len); > if ( !d->arch.guest_isa_str ) > return -ENOMEM; > > /* ... existing snprintf + strlcat loop unchanged ... */ > } > > If approach 2 is a good one I can follow it. This might be yet better with only a single function. Otherwise the two are always at risk of going out of sync. After all you can use snprintf() to determine just the size needed; if you go look, there may even be an example or two in the tree. Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 13:41:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:41:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313034.1583216 (Exim 4.92) (envelope-from ) id 1wPKhU-0000kr-7P; Tue, 19 May 2026 13:41:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313034.1583216; Tue, 19 May 2026 13:41:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKhU-0000kk-4R; Tue, 19 May 2026 13:41:36 +0000 Received: by outflank-mailman (input) for mailman id 1313034; Tue, 19 May 2026 13:41:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKhS-0000ke-Iu for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:41:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKhR-00CPgz-T9 for xen-devel@lists.xenproject.org; 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Smith" , Jan Beulich , Oleksii Kurochko Subject: Re: [PATCH for-4.22] EFI: Fix boot from a device without a file system Message-ID: References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="KMQcbhd7BCExKLra" Content-Disposition: inline In-Reply-To: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> X-purgate-ID: tlsNG-c201ff/1779198093-DAB68443-7162175B/0/0 X-purgate-type: clean X-purgate-size: 4096 --KMQcbhd7BCExKLra Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 19 May 2026 15:41:28 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Szymon =?utf-8?Q?Aceda=C5=84ski?= Cc: xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Oleksii Kurochko Subject: Re: [PATCH for-4.22] EFI: Fix boot from a device without a file system On Tue, May 19, 2026 at 03:06:57PM +0200, Szymon Aceda=C5=84ski wrote: > When netbooting a unified Xen kernel image (via GRUB chainloader), > the resulting loaded_image->DeviceHandle does not support > SIMPLE_FILE_SYSTEM_PROTOCOL. >=20 > Instead of crashing via noreturn PrintErrMesg(), print a message > via PrintStr() and return NULL from get_parent_handle(). It's worth noting this isn't the first instance of returning NULL from get_parent_handle(). The return value is used only as an argument to read_file() (sometimes indirectly), and if it gets to be called with NULL, read_file() will terminate execution via PrintErrMesg(). But with unified Xen image, the intention is to not call read_file() at all, only read_section(), so tolerating get_parent_handle() failure in this case is desired. Keeping the message in place will ease debugging if read_file() will actually be called later. Acked-by: Marek Marczykowski-G=C3=B3recki As a side note, a slightly better approach would be to call get_parent_handle() lazily (on the first call to read_file()?). But it's a bigger change that I feel may be too late for in Xen 4.22. Also, adding cc: Oleksii for release ack. > Signed-off-by: Szymon Aceda=C5=84ski > --- > Tested on Intel Lunar Lake laptop via PXE-loaded GRUB chainloading > the unified image including Xen built from upstream staging. Without > the patch the boot aborts with: >=20 > Couldn't obtain the File System Protocol Interface: ErrCode: 0x80000000= 00000003 >=20 > (EFI_UNSUPPORTED, per UEFI spec Appendix D). With the patch, dom0 > reaches login. >=20 > xen/common/efi/boot.c | 9 +++++++++ > 1 file changed, 9 insertions(+) >=20 > diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c > index 9ea2183c0b..a6c3c371c6 100644 > --- a/xen/common/efi/boot.c > +++ b/xen/common/efi/boot.c > @@ -471,6 +471,15 @@ static EFI_FILE_HANDLE __init get_parent_handle(cons= t EFI_LOADED_IMAGE *loaded_i > /* Get the file system interface. */ > ret =3D efi_bs->HandleProtocol(loaded_image->DeviceHandle, > &fs_protocol, (void **)&fio); > + if ( ret =3D=3D EFI_UNSUPPORTED ) > + { > + /* > + * The image could come from a device without a file system, > + * for example it could be a netbooted unified Xen kernel im= age. > + */ > + PrintStr(L"File System Protocol not supported on boot device= \r\n"); > + return NULL; > + } > if ( EFI_ERROR(ret) ) > PrintErrMesg(L"Couldn't obtain the File System Protocol Inte= rface", > ret); > --=20 > 2.53.0 >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --KMQcbhd7BCExKLra Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmoMaIgACgkQ24/THMrX 1yzB8Af8Df9Pm7Jjg/ehsHDowBPmxPEyifkqDf+B3F7OMqvbaAGrVju3pxjmvpEY HVosTs6gfY/UVIAqkjxgCz7xsniVVqtrfWeg03xsDOrEc2qgKwTYwnzGihutV5NP JCjHE1DAiUi8nFzHlL17rCI3jboomHiDDoUCPAiMa7tsnzqNPi2FCU2GxUMvuNDB iMyrBsTz1wscBGkZOw7um0tH8au4wT510jyfLppTd7tDwFaSLd4Z2/F3lVWjVFe0 0+mLAH5b6zIYyV/NHr69D3YyAzwqmOVXzMlq46NAf1Mk0fiqrmIJO6022rc5pc2S sbG9vx7KRdbCuB32dF9cTRGo9+npPA== =dZcW -----END PGP SIGNATURE----- --KMQcbhd7BCExKLra-- From xen-devel-bounces@lists.xenproject.org Tue May 19 13:42:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:42:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313039.1583226 (Exim 4.92) (envelope-from ) id 1wPKi6-0001F2-EO; Tue, 19 May 2026 13:42:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313039.1583226; Tue, 19 May 2026 13:42:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKi6-0001Et-Bo; Tue, 19 May 2026 13:42:14 +0000 Received: by outflank-mailman (input) for mailman id 1313039; Tue, 19 May 2026 13:42:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKi5-0001Ed-0o for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:42:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKi4-00CoZq-CY for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:42:12 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c68ac-bab6-0a2a0a5309dd-0a2a4503d12a-36 for ; Tue, 19 May 2026 15:42:12 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c68b4-672d-0a2a45030019-d155802fac86-3 for ; Tue, 19 May 2026 15:42:12 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488a14c31eeso21891065e9.0 for ; Tue, 19 May 2026 06:42:12 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779198132-41197938-B6012480/0/0 X-purgate-type: clean X-purgate-size: 1128 On 19.05.2026 15:33, Oleksii Kurochko wrote: > On 5/18/26 6:00 PM, Jan Beulich wrote: >> On 08.05.2026 16:43, Oleksii Kurochko wrote: >>> + { >>> + char buf[64]; >>> + uint32_t reg = cpu_to_fdt32(cpu); >> >> Isn't this a byte-order adjustment? If so, how come ... >> >>> + snprintf(buf, sizeof(buf), "cpu@%u", cpu); >> >> ... the result is passed to an entirely non-FDT function? (Most pre-existing uses >> of the function that I can spot store something in memory, i.e. adjusting byte- >> order makes sense there.) > > But here pure cpu is used instead of reg variable and reg variable is > used here ... > >> >>> + res = fdt_begin_node(fdt, buf); >>> + if ( res ) >>> + return res; >>> + >>> + res = fdt_property(fdt, "reg", ®, sizeof(reg)); >>> + if ( res ) >>> + return res; > ... but it we could drop it and use just: > res = fdt_property_cell(fdt, "reg", cpu); > > fdt_property_cell will take care if a byte-order adjustment. I'm sorry, I clearly must have seen something that wasn't really there. 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[88.175.170.134]) (Authenticated sender: teddy.astie) by mail2.vates.fr (Postfix) with ESMTPSA id 75E2F867BD; Tue, 19 May 2026 15:42:47 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=KEoPz5th6bWUDP/HX0Q1Ht7UTeF5lemHQC98qjGPtpY=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=WkAm7Tock2C9Yi7DMFasmz5ku8Z8vePor0s1eek7IsZSWVL0igvJD46suvld5Ltlf95FropYL LU6KfzP1OSKrkJpDo0cu0SWc/rj7bk7Vpmodf139KwYAd1inMqI2LSQ6RQAGuG9HaDF4ENxc0QM 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Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini References: <1779117765.8631fc262581453bbf619ec5b2062170.19e3baeb295000f373@vates.tech> <7ac53569-acca-44f7-a129-99b5dcb97500@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 MXfQXZ3qt1Q01B1+sU0I8xsAEQEAAc0kVGVkZHkgQXN0aWUgPHRlZGR5LmFzdGllQHZhdGVz LnRlY2g+wsENBBMBCAA3FiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmn5sK8FCQWjmoACGwME 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4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779198167637 X-purgate-ID: tlsNG-16d1c6/1779198174-87F7BD75-10503653/0/0 X-purgate-type: clean X-purgate-size: 23040 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------bd92M9bACcL9fTUr80x3iKUy Content-Type: multipart/mixed; boundary="------------GEP22FFrtPRvDx6BJ8KMG4sg"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini Message-ID: Subject: Re: [PATCH 5/5] RFC: pci: Migrate pci_mmcfg_{read,write} to pci.c References: <1779117765.8631fc262581453bbf619ec5b2062170.19e3baeb295000f373@vates.tech> <7ac53569-acca-44f7-a129-99b5dcb97500@citrix.com> In-Reply-To: <7ac53569-acca-44f7-a129-99b5dcb97500@citrix.com> --------------GEP22FFrtPRvDx6BJ8KMG4sg Content-Type: multipart/mixed; boundary="------------kWoG8TOokTgd7YOP0vQi0rrU" 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wsD5BAABCAAjFiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmoMaNcFAwAAAAAACgkQZg+p0QLLz9DB 4wv5AZdxwQkt9s0zag8BpZxEHdkwwhXVo26hxgBBYr178v+25RlSQFu3zoJNVPpONEpmiwWZhldw 7yw5iKeOhuGy920OVvVSZoHxSasnVn93KcjgTOFu/7SKgUecmQPglzjrIAZoHq9Nn2to8mhjnP6q icHosIAbFPEm7cQJ3/jl7hqwnUVW3Ue6cQ2hsvMitt3CD5JO6JN8r9E7h497nONJcDP/aeDV6rOu 5NTknPW6YXeUvEF1zhXkSb2Dpjv6J0ht589Piuv2CIBITQmr6WX7unECgqiKPzU+2Mr7wIW38jd5 J942ck5evn9xykWvWpjl1TXla5IFglgGkOhR6x5i7TcrpKrHH1sPBezf9a0uak7lRL05NHP9vvBz 4gLgFgDns/7ZNvUvxnyghFsQhnQGgS/iwTec1lH3K0CebOZO2q0/LDjXL+nQj5+PTGFVAxv255UP A6YNg9PUSX1ERCsuRVi6JJWqkaD06mIyLsBX8I6jR9PejRpvHycUFlU39N3k =jZlc -----END PGP SIGNATURE----- --------------bd92M9bACcL9fTUr80x3iKUy-- From xen-devel-bounces@lists.xenproject.org Tue May 19 13:45:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:45:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313062.1583276 (Exim 4.92) (envelope-from ) id 1wPKl9-0002an-Gy; Tue, 19 May 2026 13:45:23 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action=none header.from=citrix.com; Message-ID: Date: Tue, 19 May 2026 14:45:13 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , xen-devel@lists.xenproject.org, "Daniel P. Smith" , Jan Beulich , Oleksii Kurochko Subject: Re: [PATCH for-4.22] EFI: Fix boot from a device without a file system To: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , =?UTF-8?Q?Szymon_Aceda=C5=84ski?= References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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The return value is used only as an argument > to read_file() (sometimes indirectly), and if it gets to be called with > NULL, read_file() will terminate execution via PrintErrMesg(). But with > unified Xen image, the intention is to not call read_file() at all, only > read_section(), so tolerating get_parent_handle() failure in this case > is desired. Keeping the message in place will ease debugging if > read_file() will actually be called later. > > Acked-by: Marek Marczykowski-Górecki > > As a side note, a slightly better approach would be to call > get_parent_handle() lazily (on the first call to read_file()?). But it's > a bigger change that I feel may be too late for in Xen 4.22. > > Also, adding cc: Oleksii for release ack. Bugfixes are still fine to go in. Personally, I think moving the call to get_parent_handle() is a better fix, and fine for 4.22 even at this juncture.  ARM already does something along these lines in allocate_module_file(). ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 13:50:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:50:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313074.1583297 (Exim 4.92) (envelope-from ) id 1wPKq1-0004d1-92; Tue, 19 May 2026 13:50:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313074.1583297; Tue, 19 May 2026 13:50:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKq1-0004cu-62; Tue, 19 May 2026 13:50:25 +0000 Received: by outflank-mailman (input) for mailman id 1313074; Tue, 19 May 2026 13:50:24 +0000 Received: from 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action=none header.from=citrix.com; Message-ID: Date: Tue, 19 May 2026 14:50:08 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Baptiste Le Duc , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org, Oleksii Kurochko Subject: Re: [PATCH v1 2/3] xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() To: Jan Beulich References: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> <2be07ba3-879b-4c79-8103-b4951ab4cf53@suse.com> <7aa7e06e-7a86-46ea-a7fe-bbb81c96d743@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E 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=?utf-8?B?bGFneTdaZy9JaGs2T2c1SjBITU5MQnlQS04xTW9UM3NXdzc4eGoxeEFwN05o?= =?utf-8?Q?PzoELhRdE40sWVqM=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1edeb523-b769-463c-1634-08deb5ad8c6c X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 13:50:12.4140 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: rcNxbF95PEwshwAFHDf5qL/Hjf55/ex27cQGg6m7s3FCulpQ5CybkdIDrDXRRfb8ho3pwAMgLmUt/FHIctVFJUUPiKa77joxFDPEnL5fojo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB6343 X-purgate-ID: tlsNG-c201ff/1779198623-E0E64443-568E9F1D/10/73395122804 X-purgate-type: spam X-purgate-size: 4240 On 19/05/2026 1:06 pm, Jan Beulich wrote: > On 19.05.2026 13:56, Andrew Cooper wrote: >> On 19/05/2026 12:51 pm, Jan Beulich wrote: >>> On 19.05.2026 13:32, Andrew Cooper wrote: >>>> On 19/05/2026 12:22 pm, Oleksii Kurochko wrote: >>>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot >>>>>>>> inside >>>>>>>> the domain's shared_info page for vcpus with id < >>>>>>>> XEN_LEGACY_MAX_VCPUS, >>>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>>> >>>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>>> dereference triggers UBSAN: >>>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>>> >>>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>>> shared_info page has been allocated, mapping the vcpu to >>>>>>>> dummy_vcpu_info >>>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>>> >>>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>>> I question this, largely (but not only) because I also ... >>>>>>> >>>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>>> --- >>>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>>> ... question this mode of operation. Yes, you may (for now) be able >>>>>>> to get >>>>>>> away without, but e.g. event channels will want supporting at some >>>>>>> point. >>>>>>> Which will require a shared info page. Better put that in place >>>>>>> right away, >>>>>>> even if the guests you test with don't use it (yet). Certain other >>>>>>> common >>>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>>> >>>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>>> >>>>>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>>          goto fail; >>>>>> >>>>>>      clear_page(d->shared_info); >>>>>> >>>>>> ... but without calling share_xen_page_with_guest() after that >>>>>> allocation as share_xen_page_with_guest() isn't implemented at the >>>>>> moment? >>>>> Or could it be an option for all arch-s move allocation of >>>>> d->shared_info to domain_create() in common just after >>>>> arch_domain_create()? >>>>> >>>>> The only question if share_xen_page_with_guest() could be ifdef-ed >>>>> somehow so not to block new ports to implement it from the start. >>>> shared_info is an x86-PV-ism which escaped into HVM and then infected >>>> ARM too. >>>> >>>> Sadly it's ABI there, but this is one of many areas where I really want >>>> RISC-V not to inherit the mistakes of prior ports. >>> In which case, how do you propose e.g. event channels to be handled in >>> whatever is going to be the alternative? >> Implement proper enumeration of virtual capabilities (to be retrofitted >> to x86/ARM too), and only offer the FIFO ABI (which is superior in every >> way to the 2L ABI). > What about the wc_* fields then? Well - ARM seems to have the right idea by entirely ignoring them and leaving it all 0. At least it's obviously got no data in it, as opposed to what we do on x86 where we pretend it's possible to use some stale value to determine the wallclock time without even a tied TSC reference. This is one of several things contributing to our in-guest timekeeping bugs. > And about everything in struct arch_shared_info? There is nothing else in any arch_shared_info applicable outside of PV guests. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 13:52:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:52:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313085.1583305 (Exim 4.92) (envelope-from ) id 1wPKsO-0005E5-Oy; Tue, 19 May 2026 13:52:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313085.1583305; Tue, 19 May 2026 13:52:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKsO-0005Dy-MC; Tue, 19 May 2026 13:52:52 +0000 Received: by outflank-mailman (input) for mailman id 1313085; Tue, 19 May 2026 13:52:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKsN-0005Ds-Cm for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:52:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKsM-00DnjS-Od for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:52:50 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c6b2c-e002-0a2a0a5209dd-0a2a450cc34e-16 for ; Tue, 19 May 2026 15:52:50 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c6b32-62f1-0a2a450c0019-d1558031e5c1-3 for ; Tue, 19 May 2026 15:52:50 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-48e8132c6d0so23625475e9.1 for ; Tue, 19 May 2026 06:52:50 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260519134417.16024-2-cody.zuschlag@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1779198770-E1F6ACF5-7A46D43B/0/0 X-purgate-type: clean X-purgate-size: 2633 On 19.05.2026 15:44, Cody Zuschlag wrote: > This patch adds lightweight guidance for AI-assisted patch > > attribution via an Assisted-by tag. > > The proposal is inspired by similar Linux kernel documentation, > > while keeping the Xen guidance intentionally minimal and aligned > > with the existing sending-patches documentation. > > Feedback welcome. Up to here it's kind of a cover letter in disguise? > docs/process: document AI-assisted patch tags > > Add documentation for the Assisted-by tag to clarify how > AI-assisted tooling may be disclosed in Xen patches. > > The guidance is inspired by similar work in the Linux kernel > documentation. > > Signed-off-by: Cody Zuschlag > --- > docs/process/sending-patches.pandoc | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > mode change 100644 => 100755 docs/process/sending-patches.pandoc This and hence ... > diff --git a/docs/process/sending-patches.pandoc b/docs/process/sending-patches.pandoc > old mode 100644 > new mode 100755 ... this looks unwanted. Looks okay beyond that. Jan > index 798ecceb..b61584f9 > --- a/docs/process/sending-patches.pandoc > +++ b/docs/process/sending-patches.pandoc > @@ -195,6 +195,25 @@ E.g.: > > Requested-by: Jane Doe > > +### Assisted-by: > + > +This optional tag can be used when AI-assisted tooling contributed to the > +preparation of a patch. It is in the format: > + > + Assisted-by: [:] [tool...] > + > +E.g.: > + > + Assisted-by: Claude:claude-3-opus coccinelle sparse > + Assisted-by: ChatGPT:gpt-5.5 > + > +Basic development tools, such as git, compilers, make, and editors, should > +not be listed. > + > +The person submitting the patch remains responsible for reviewing any > +AI-generated content and ensuring the contribution is correct, appropriate, > +and compliant with Xen's contribution and licensing requirements. > + > ### Signed-off-by: > > This mandatory tag specifies the author(s) of a patch (for each author a > @@ -209,6 +228,9 @@ E.g.: > The author must be a natural person (not a team or just a company) and the > `Signed-off-by:` tag must include the real name of the author (no pseudonym). > > +AI tools must not add `Signed-off-by:` tags, as only natural > +persons can certify the `Developer's Certificate of Origin`. > + > By signing the patch with her/his name the author explicitly confirms to have > made the contribution conforming to the `Developer's Certificate of Origin`: > From xen-devel-bounces@lists.xenproject.org Tue May 19 13:52:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 13:52:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313086.1583315 (Exim 4.92) (envelope-from ) id 1wPKsQ-0005RQ-W0; Tue, 19 May 2026 13:52:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313086.1583315; Tue, 19 May 2026 13:52:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPKsQ-0005RJ-Sf; Tue, 19 May 2026 13:52:54 +0000 Received: by outflank-mailman (input) for mailman id 1313086; Tue, 19 May 2026 13:52:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPKsP-0005Ql-Sn for xen-devel@lists.xenproject.org; Tue, 19 May 2026 13:52:54 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPKsP-00CrVd-8d for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:52:53 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c6b2b-bab6-0a2a0a5309dd-0a2a4505e706-34 for ; Tue, 19 May 2026 15:52:53 +0200 Received: from [209.85.208.43] (helo=mail-ed1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c6b35-aaa8-0a2a45050019-d155d02be5ae-3 for ; Tue, 19 May 2026 15:52:53 +0200 Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-67be41d5eeeso6300829a12.1 for ; Tue, 19 May 2026 06:52:53 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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AFNElJ8rEJyRJwK96aAapR95HIQoHOe4Bibo747HIIZIN53s8LDBkg1OcXRokDc5q+Ns+Vx8HrzUEeVzzC8=@lists.xenproject.org X-Gm-Message-State: AOJu0YzpFXIc1V0i3koExSUGcEzpIt7sg0OAhfhWRY+bgIAFqSEbF/5k wgFwrjc66gr43NSnGfmgRs8uqg9Q/aQY/AiFqsBr2tzrqgKzXp0fqAa6 X-Gm-Gg: Acq92OGeJw4Xyp5rI0dn7H2LvrG19TsHPvvL73msbtWZojbpNrTxJvuEDyMUhjJicqi rdP9755xD8ILnhvmDn7/ap3ZCxLblLcXSs785gpi2xt5tegQBHAKo2bxg6ueYFuQ44gp2ChCleP jdCyE/160WRnwsPYvavs47eTPsZT3rLiFHfwVL8FJd/nQEzGq611igTyFphecL9yuR18WB3NJZB TzlNWUvDgV1SbbS+sbMHLv1EiCzo5skVFOPbHfksrn3JE9LOnQxPGBS7R9DfBPwgVI8h+txBVBv 8VHFxNXYabWppsfITcLmlPixN9a1TVjoEaclzjhGzkVSurL/x/CJMi/d6eES/8zfSkbsJ/4opoo lTYMtvWAiwiybauhQIVar4JY4//l0Kua5frTr8N32TlFzLOZsLu/K3TZATza6+qGLQZOE/fuXQ1 VIRxnr7I9rjiVOi7ol0qubXcV3Y7DnmnKyNByZ2Y59cmq9RVaja0Yde4iYxjTMq3EwV65tiCQ/M Zc= X-Received: by 2002:a05:6402:428e:b0:683:e394:cc0c with SMTP id 4fb4d7f45d1cf-683e394ce69mr9374327a12.4.1779198772428; Tue, 19 May 2026 06:52:52 -0700 (PDT) Message-ID: Date: Tue, 19 May 2026 15:52:50 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() To: Andrew Cooper , Jan Beulich Cc: Baptiste Le Duc , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> <2be07ba3-879b-4c79-8103-b4951ab4cf53@suse.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779198773-D8145443-08A95838/10/73395122804 X-purgate-type: spam X-purgate-size: 4202 On 5/19/26 1:56 PM, Andrew Cooper wrote: > On 19/05/2026 12:51 pm, Jan Beulich wrote: >> On 19.05.2026 13:32, Andrew Cooper wrote: >>> On 19/05/2026 12:22 pm, Oleksii Kurochko wrote: >>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot >>>>>>> inside >>>>>>> the domain's shared_info page for vcpus with id < >>>>>>> XEN_LEGACY_MAX_VCPUS, >>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>> >>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>> dereference triggers UBSAN: >>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>> >>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>> shared_info page has been allocated, mapping the vcpu to >>>>>>> dummy_vcpu_info >>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>> >>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>> I question this, largely (but not only) because I also ... >>>>>> >>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>> --- >>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>> ... question this mode of operation. Yes, you may (for now) be able >>>>>> to get >>>>>> away without, but e.g. event channels will want supporting at some >>>>>> point. >>>>>> Which will require a shared info page. Better put that in place >>>>>> right away, >>>>>> even if the guests you test with don't use it (yet). Certain other >>>>>> common >>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>> >>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>> >>>>>      if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>          goto fail; >>>>> >>>>>      clear_page(d->shared_info); >>>>> >>>>> ... but without calling share_xen_page_with_guest() after that >>>>> allocation as share_xen_page_with_guest() isn't implemented at the >>>>> moment? >>>> Or could it be an option for all arch-s move allocation of >>>> d->shared_info to domain_create() in common just after >>>> arch_domain_create()? >>>> >>>> The only question if share_xen_page_with_guest() could be ifdef-ed >>>> somehow so not to block new ports to implement it from the start. >>> shared_info is an x86-PV-ism which escaped into HVM and then infected >>> ARM too. >>> >>> Sadly it's ABI there, but this is one of many areas where I really want >>> RISC-V not to inherit the mistakes of prior ports. >> In which case, how do you propose e.g. event channels to be handled in >> whatever is going to be the alternative? > > Implement proper enumeration of virtual capabilities (to be retrofitted > to x86/ARM too), and only offer the FIFO ABI (which is superior in every > way to the 2L ABI). I'm not familiar with the FIFO ABI, but after a quick look it seems d->shared_info is used here for example: static void setup_ports(struct domain *d, unsigned int prev_evtchns) { ... for ( port = 1; port < prev_evtchns; port++ ) { ... evtchn = evtchn_from_port(d, port); if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) ) evtchn->pending = true; evtchn_fifo_set_priority(d, evtchn, EVTCHN_FIFO_PRIORITY_DEFAULT); } } So shouldn't it be still allocated in arch_domain_create() or as I suggested in domain_create()? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 14:03:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 14:03:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313100.1583324 (Exim 4.92) (envelope-from ) id 1wPL2o-0007rw-Sj; Tue, 19 May 2026 14:03:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313100.1583324; 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See v3: [PATCH v3] xen/sched: rtds: assert replq is empty on timer (re-)init https://lists.xenproject.org/archives/html/xen-devel/2026-05/msg00078.html -- Oleskii On 18/05/2026 18:08, Jan Beulich wrote: > Hello, > > would you mind taking a look at two patches, both of which were reviewed by > Jürgen and hence hopefully should be relatively straightforward to given an > ack for: > https://lists.xen.org/archives/html/xen-devel/2026-03/msg01341.html > https://lists.xen.org/archives/html/xen-devel/2026-04/msg00162.html > > In case of continued lack of response, I guess I'm going to commit the > patches as-is towards the end of this week. > > Oleksii, fyi: Generally it is the submitter's responsibility to chase acks. > > Thanks, Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 14:10:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 14:10:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313107.1583332 (Exim 4.92) (envelope-from ) id 1wPL9L-0001Qk-Lm; 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Given that 6.18 is LTS, suggesting `Cc: stable@vger.kernel.org` > to get it backported. > Hi Jiaqing, So is the issue observed with the latest mainline kernel? Or only with v6.19 and before? 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It used to do this by writing 0 to GICD_CTLR. On a system where firmware has already enabled Non-secure affinity routing, a zero write clears the Non-secure view's GICD_CTLR.ARE_NS bit. Arm IHI 0069H.b, section 2.3.3 ("Changing affinity routing enables"), states that changing GICD_CTLR.ARE_NS from 1 to 0 is UNPREDICTABLE. The GICD_CTLR register description in section 12.9.4 carries the same rule for the ARE_NS field. Preserve ARE_NS while clearing the group enable bits. If firmware left ARE_NS clear, the value written is still 0, preserving the existing initialization flow. Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") Signed-off-by: Mykola Kvach --- xen/arch/arm/gic-v3.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 7f365cdbe9..dc00afc0ee 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -745,12 +745,17 @@ static void __init gicv3_dist_espi_init_aff(uint64_t affinity) { } static void __init gicv3_dist_init(void) { uint32_t type; + uint32_t ctlr; uint64_t affinity; unsigned int nr_lines; int i; - /* Disable the distributor */ - writel_relaxed(0, GICD + GICD_CTLR); + /* + * Disable the distributor without clearing ARE_NS. The GIC architecture + * makes changing ARE_NS from 1 to 0 UNPREDICTABLE. + */ + ctlr = readl_relaxed(GICD + GICD_CTLR); + writel_relaxed(ctlr & GICD_CTLR_ARE_NS, GICD + GICD_CTLR); type = readl_relaxed(GICD + GICD_TYPER); nr_lines = 32 * ((type & GICD_TYPE_LINES) + 1); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 14:50:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 14:50:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313132.1583350 (Exim 4.92) (envelope-from ) id 1wPLli-0007Pn-Qb; Tue, 19 May 2026 14:50:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313132.1583350; Tue, 19 May 2026 14:50:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPLli-0007PL-NM; Tue, 19 May 2026 14:50:02 +0000 Received: by outflank-mailman (input) for mailman id 1313132; Tue, 19 May 2026 14:50:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPLlh-0007DV-6x for xen-devel@lists.xenproject.org; Tue, 19 May 2026 14:50:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPLlg-000xE3-Io for xen-devel@lists.xenproject.org; Tue, 19 May 2026 16:50:00 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c7887-e002-0a2a0a5209dd-0a2a45038e60-34 for ; Tue, 19 May 2026 16:50:00 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c7898-672d-0a2a45030019-d155d036e937-3 for ; Tue, 19 May 2026 16:50:00 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-67c2b4809baso8323862a12.3 for ; Tue, 19 May 2026 07:50:00 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I wonder anyway whether ... >>>>> >>>>>> @@ -94,6 +95,9 @@ struct arch_domain { >>>>>> struct p2m_domain p2m; >>>>>> >>>>>> struct paging_domain paging; >>>>>> + >>>>>> + DECLARE_BITMAP(guest_isa, RISCV_ISA_EXT_MAX); >>>>>> + char guest_isa_str[RISCV_GUEST_ISA_STR_MAX]; >>>>> >>>>> ... a compile-time sized buffer is suitable here. Can't you allocate a buffer >>>>> just large enough to hold the string? >>>> >>>> It could be allocated dynamically. >>>> >>>> Does it make sense to evaluate in run-time what should be a buffer size? >>>> For this case I can't find analogue of realloc() in Xen. >>> >>> Hmm, I see xrealloc_array(), and surely we could gain xvrealloc_array() >>> which we'll need anyway once xrealloc_array() uses get converted. (I also >>> see x{,v}realloc_flex_struct(), but that's of no use here as it looks.) >> >> Oh, I missed to turned off "full match" during search... >> >>> >>>> Or it would be >>>> fine just to take something bigger as a const (lets say 2048) and use it >>>> for dynamic allocation? >>> >>> I'd rather not. Can't you determine how much space the string is going to >>> occupy? >> >> I thought about two options as alternatives: >> >> 1. Take as a length host RISC-V ISA string but theoretically we can >> emulate some extensions which aren't mentioned in host RISC-V ISA string >> so it could be longer. So not a good option. >> >> 2. Having two walks in init_guest_isa(): >> Introduce the following function: >> static size_t guest_isa_str_len(const unsigned long *isa_bitmap) >> { >> size_t len = 4; /* rvX prefix */ >> >> for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) >> { >> const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; >> >> if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) >> continue; >> >> if ( ext->id >= RISCV_ISA_EXT_BASE ) >> len++; /* '_' separator */ >> >> len += strlen(ext->name); >> } >> >> return len + 1; /* NUL terminator */ >> } >> >> and then: >> >> int init_guest_isa(struct domain *d) >> { >> bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, >> RISCV_ISA_EXT_MAX); >> >> size_t len = guest_isa_str_len(d->arch.guest_isa); >> d->arch.guest_isa_str = xzalloc_array(char, len); >> if ( !d->arch.guest_isa_str ) >> return -ENOMEM; >> >> /* ... existing snprintf + strlcat loop unchanged ... */ >> } >> >> If approach 2 is a good one I can follow it. > > This might be yet better with only a single function. Otherwise the two are > always at risk of going out of sync. After all you can use snprintf() to > determine just the size needed; if you go look, there may even be an > example or two in the tree. I will do than in the following way: static int build_guest_isa_str(char *buf, size_t size, const unsigned long *isa_bitmap) { int total = 0; int ret; #if defined(CONFIG_RISCV_32) ret = snprintf(buf, size, "rv32"); #elif defined(CONFIG_RISCV_64) ret = snprintf(buf, size, "rv64"); #else # error "Unsupported RISC-V bitness" #endif if ( ret < 0 ) return ret; total += ret; for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) { const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) continue; ret = snprintf(buf ? buf + total : NULL, buf ? size - total : 0, "%s%s", ext->id >= RISCV_ISA_EXT_BASE ? "_" : "", ext->name); if ( ret < 0 ) return ret; total += ret; } return total; } int init_guest_isa(struct domain *d) { int len; bitmap_andnot(d->arch.isa, riscv_isa, guest_unsupp, RISCV_ISA_EXT_MAX); len = build_guest_isa_str(NULL, 0, d->arch.isa); if ( len < 0 ) return len; d->arch.isa_str = xmalloc_array(char, len + 1); if ( !d->arch.isa_str ) return -ENOMEM; build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa); return 0; } Thanks for suggestion. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 14:53:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 14:53:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313139.1583361 (Exim 4.92) (envelope-from ) id 1wPLpJ-0000HW-9T; Tue, 19 May 2026 14:53:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313139.1583361; Tue, 19 May 2026 14:53:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPLpJ-0000HP-5f; Tue, 19 May 2026 14:53:45 +0000 Received: by outflank-mailman (input) for mailman id 1313139; Tue, 19 May 2026 14:53:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPLpH-0000HJ-UO for xen-devel@lists.xenproject.org; Tue, 19 May 2026 14:53:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPLpH-002awr-5f for xen-devel@lists.xenproject.org; Tue, 19 May 2026 16:53:43 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c7964-e002-0a2a0a5209dd-0a2a450b9060-36 for ; Tue, 19 May 2026 16:53:42 +0200 Received: from [209.85.221.41] (helo=mail-wr1-f41.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c7976-212f-0a2a450b0019-d155dd29e9d2-3 for ; Tue, 19 May 2026 16:53:42 +0200 Received: by mail-wr1-f41.google.com with SMTP id ffacd0b85a97d-44509921fbcso2280201f8f.3 for ; Tue, 19 May 2026 07:53:42 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779202422-20E7CF3B-B94340BD/0/0 X-purgate-type: clean X-purgate-size: 3666 On 19.05.2026 16:49, Oleksii Kurochko wrote: > On 5/19/26 3:40 PM, Jan Beulich wrote: >> On 19.05.2026 15:24, Oleksii Kurochko wrote: >>> I thought about two options as alternatives: >>> >>> 1. Take as a length host RISC-V ISA string but theoretically we can >>> emulate some extensions which aren't mentioned in host RISC-V ISA string >>> so it could be longer. So not a good option. >>> >>> 2. Having two walks in init_guest_isa(): >>> Introduce the following function: >>> static size_t guest_isa_str_len(const unsigned long *isa_bitmap) >>> { >>> size_t len = 4; /* rvX prefix */ >>> >>> for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) >>> { >>> const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; >>> >>> if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) >>> continue; >>> >>> if ( ext->id >= RISCV_ISA_EXT_BASE ) >>> len++; /* '_' separator */ >>> >>> len += strlen(ext->name); >>> } >>> >>> return len + 1; /* NUL terminator */ >>> } >>> >>> and then: >>> >>> int init_guest_isa(struct domain *d) >>> { >>> bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, >>> RISCV_ISA_EXT_MAX); >>> >>> size_t len = guest_isa_str_len(d->arch.guest_isa); >>> d->arch.guest_isa_str = xzalloc_array(char, len); >>> if ( !d->arch.guest_isa_str ) >>> return -ENOMEM; >>> >>> /* ... existing snprintf + strlcat loop unchanged ... */ >>> } >>> >>> If approach 2 is a good one I can follow it. >> >> This might be yet better with only a single function. Otherwise the two are >> always at risk of going out of sync. After all you can use snprintf() to >> determine just the size needed; if you go look, there may even be an >> example or two in the tree. > > I will do than in the following way: > > static int build_guest_isa_str(char *buf, size_t size, > const unsigned long *isa_bitmap) > { > int total = 0; > int ret; > > #if defined(CONFIG_RISCV_32) > ret = snprintf(buf, size, "rv32"); > #elif defined(CONFIG_RISCV_64) > ret = snprintf(buf, size, "rv64"); > #else > # error "Unsupported RISC-V bitness" > #endif > if ( ret < 0 ) > return ret; You can use total here right away, and limit ... > total += ret; > > for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) > { > const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; ... ret's scope to this loop. This then also justifies total to be of a signed type. > if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) > continue; > > ret = snprintf(buf ? buf + total : NULL, > buf ? size - total : 0, "%s%s", > ext->id >= RISCV_ISA_EXT_BASE ? "_" : "", > ext->name); > if ( ret < 0 ) > return ret; > total += ret; > } > > return total; > } > > int init_guest_isa(struct domain *d) > { > int len; > > bitmap_andnot(d->arch.isa, riscv_isa, guest_unsupp, > RISCV_ISA_EXT_MAX); > > len = build_guest_isa_str(NULL, 0, d->arch.isa); > if ( len < 0 ) > return len; > > d->arch.isa_str = xmalloc_array(char, len + 1); > if ( !d->arch.isa_str ) > return -ENOMEM; > > build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa); At least ASSERT() the success of this? Jan From xen-devel-bounces@lists.xenproject.org Tue May 19 15:17:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 15:17:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313148.1583368 (Exim 4.92) (envelope-from ) id 1wPMCF-0003kr-5o; Tue, 19 May 2026 15:17:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313148.1583368; Tue, 19 May 2026 15:17:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPMCF-0003kk-2r; Tue, 19 May 2026 15:17:27 +0000 Received: by outflank-mailman (input) for mailman id 1313148; Tue, 19 May 2026 15:17:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPMCD-0003kb-EV for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:17:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPMCB-00CiuL-JB for xen-devel@lists.xenproject.org; Tue, 19 May 2026 17:17:23 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c7ef6-5cb7-0a2a0a5109dd-0a2a4508b0fe-36 for ; Tue, 19 May 2026 17:17:23 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c7f03-63b5-0a2a45080019-d155da2fece0-3 for ; Tue, 19 May 2026 17:17:23 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bd22b2abaa4so655781366b.0 for ; Tue, 19 May 2026 08:17:23 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Take as a length host RISC-V ISA string but theoretically we can >>>> emulate some extensions which aren't mentioned in host RISC-V ISA string >>>> so it could be longer. So not a good option. >>>> >>>> 2. Having two walks in init_guest_isa(): >>>> Introduce the following function: >>>> static size_t guest_isa_str_len(const unsigned long *isa_bitmap) >>>> { >>>> size_t len = 4; /* rvX prefix */ >>>> >>>> for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) >>>> { >>>> const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; >>>> >>>> if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) >>>> continue; >>>> >>>> if ( ext->id >= RISCV_ISA_EXT_BASE ) >>>> len++; /* '_' separator */ >>>> >>>> len += strlen(ext->name); >>>> } >>>> >>>> return len + 1; /* NUL terminator */ >>>> } >>>> >>>> and then: >>>> >>>> int init_guest_isa(struct domain *d) >>>> { >>>> bitmap_andnot(d->arch.guest_isa, riscv_isa, guest_unsupp, >>>> RISCV_ISA_EXT_MAX); >>>> >>>> size_t len = guest_isa_str_len(d->arch.guest_isa); >>>> d->arch.guest_isa_str = xzalloc_array(char, len); >>>> if ( !d->arch.guest_isa_str ) >>>> return -ENOMEM; >>>> >>>> /* ... existing snprintf + strlcat loop unchanged ... */ >>>> } >>>> >>>> If approach 2 is a good one I can follow it. >>> >>> This might be yet better with only a single function. Otherwise the two are >>> always at risk of going out of sync. After all you can use snprintf() to >>> determine just the size needed; if you go look, there may even be an >>> example or two in the tree. >> >> I will do than in the following way: >> >> static int build_guest_isa_str(char *buf, size_t size, >> const unsigned long *isa_bitmap) >> { >> int total = 0; >> int ret; >> >> #if defined(CONFIG_RISCV_32) >> ret = snprintf(buf, size, "rv32"); >> #elif defined(CONFIG_RISCV_64) >> ret = snprintf(buf, size, "rv64"); >> #else >> # error "Unsupported RISC-V bitness" >> #endif >> if ( ret < 0 ) >> return ret; > > You can use total here right away, and limit ... > >> total += ret; >> >> for ( unsigned int i = 0; i < ARRAY_SIZE(riscv_isa_ext); i++ ) >> { >> const struct riscv_isa_ext_data *ext = &riscv_isa_ext[i]; > > ... ret's scope to this loop. This then also justifies total to be of a > signed type. It makes sense. > >> if ( !riscv_isa_extension_available(isa_bitmap, ext->id) ) >> continue; >> >> ret = snprintf(buf ? buf + total : NULL, >> buf ? size - total : 0, "%s%s", >> ext->id >= RISCV_ISA_EXT_BASE ? "_" : "", >> ext->name); >> if ( ret < 0 ) >> return ret; >> total += ret; >> } >> >> return total; >> } >> >> int init_guest_isa(struct domain *d) >> { >> int len; >> >> bitmap_andnot(d->arch.isa, riscv_isa, guest_unsupp, >> RISCV_ISA_EXT_MAX); >> >> len = build_guest_isa_str(NULL, 0, d->arch.isa); >> if ( len < 0 ) >> return len; >> >> d->arch.isa_str = xmalloc_array(char, len + 1); >> if ( !d->arch.isa_str ) >> return -ENOMEM; >> >> build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa); > > At least ASSERT() the success of this? I will add: ASSERT(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) == len); but I expect that we won't be here if len is incorrect or d->arch.isa_str wasn't allocated properly. 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Iglesias wrote: > > The generic Xen strrchr() implementation returns a pointer to the string > > terminator when searching for '\0', matching the standard C semantics. > > > > The ARM64 assembly version stopped as soon as it loaded the terminator and > > returned the previous match pointer instead. This made strrchr("", '\0') > > return NULL. > > I wonder though: Why would one pass '\0' to strrchr()? If you want to find > the end of a string, more efficient (at least in the general case) options > exist (strchr(), memchr(), strlen()). Right, this came from a fuzzer checking standard strrchr() behavior, not from an explicit end-of-string use case. I agree strlen() or strchr(s, '\0') would be better for that, but strrchr(s, '\0') is valid input, so we should handle it to avoid surprises for existing or future callers. > > > Compare the loaded byte against the requested character before deciding > > whether to stop at the terminator, so the terminator itself can be returned > > when it is the requested character. > > Nit: "..., so a pointer to the terminator ...". Updated, thanks. > > > Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") > > Signed-off-by: Edgar E. Iglesias > > Reviewed-by: Jan Beulich > > However, the function having come from Linux, imo the patch wants to go to > Linux (ideally first, but at the very least also). Yes, sounds good. > > Additionally, looking at strchr() - couldn't the code here be written in a > similar way, allowing to get away with just a single branch? (Arm32's pair > of functions is also pretty similar in this regard.) Hm, good point. I had a closer look and came up with a couple of options that look better. This one is not quite the same shape as strchr(), but it eliminates one branch and shortens the inner loop from 5 to 4 insns... FUNC(strrchr) mov x3, #0 /* Last match, or NULL */ sub x0, x0, #1 /* For the pre-indexed load */ and w1, w1, #0xff 1: ldrb w2, [x0, #1]! /* Load next byte */ cmp w2, w1 csel x3, x0, x3, eq /* Remember match */ cbnz w2, 1b /* Keep going until NUL */ mov x0, x3 ret END(strrchr) Cheers, Edgar > > Jan > > > --- a/xen/arch/arm/arm64/lib/strrchr.S > > +++ b/xen/arch/arm/arm64/lib/strrchr.S > > @@ -30,11 +30,10 @@ FUNC(strrchr) > > mov x3, #0 > > and w1, w1, #0xff > > 1: ldrb w2, [x0], #1 > > - cbz w2, 2f > > cmp w2, w1 > > - b.ne 1b > > + b.ne 2f > > sub x3, x0, #1 > > - b 1b > > -2: mov x0, x3 > > +2: cbnz w2, 1b > > + mov x0, x3 > > ret > > END(strrchr) > From xen-devel-bounces@lists.xenproject.org Tue May 19 15:28:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 15:28:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313164.1583387 (Exim 4.92) (envelope-from ) id 1wPMN2-0006N9-B9; Tue, 19 May 2026 15:28:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313164.1583387; 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Iglesias" To: Julien Grall Cc: Jan Beulich , sstabellini@kernel.org, bertrand.marquis@arm.com, michal.orzel@amd.com, Volodymyr_Babchuk@epam.com, xen-devel@lists.xenproject.org Subject: Re: [PATCH v1 1/1] arm64: Fix strrchr() matching of null terminator Message-ID: References: <20260518234353.453193-1-edgar.iglesias@amd.com> <20260518234353.453193-2-edgar.iglesias@amd.com> <9b8ec97f-02ae-4a1a-9abe-59873d574a64@suse.com> <3d1001c8-6761-41ba-83df-42c83a453f3e@xen.org> Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <3d1001c8-6761-41ba-83df-42c83a453f3e@xen.org> User-Agent: Mutt/2.2.14+84 (2efcabc4) (2026-01-25) X-ClientProxiedBy: CPCP307CA0004.DNKP307.PROD.OUTLOOK.COM (2603:10a6:380::17) To SN7PR12MB6839.namprd12.prod.outlook.com (2603:10b6:806:265::21) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN7PR12MB6839:EE_|IA0PR12MB8205:EE_ X-MS-Office365-Filtering-Correlation-Id: f67f9c87-520c-45e5-5378-08deb5bb43f0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|1800799024|376014|3023799003|4143699003|22082099003|56012099003|18002099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?PHVaY1qJLDGae23Sz+Z+g/asK5pATlVMZ9iXXHUsT/F0UH55T00hLlxeN8W+?= =?us-ascii?Q?ta3uW+mWSSBAZVRLhgxa0lJhQhjuh2VKcyNN9+Gf46jdbTMhFVJh0/epspL6?= =?us-ascii?Q?Sra/9eVpymGAGv5bJFWBjHpt2HxuXdVoKK6GhWSO4Giabm/8IXO9PbbpTcYR?= =?us-ascii?Q?yL9AAHi/z37w/1e5Cq2oNl0YyqH4eNTYUU0/CkYd6E/UtUqFG/hjH8Ynd0Vv?= =?us-ascii?Q?InDL6CLKH7RUtCvXbwc+dTR7cGU8WKjEydk3MxsRg7QvL7AgRDEBREcxTHdg?= =?us-ascii?Q?xjtOwH52aS0UL/GzlLU/wAqAgym6imDmWwEo7msQO4A7yQTd5U1S14PUi4MI?= =?us-ascii?Q?0FkBKGkm2ygTxgrcAcb6uWf0vyvzCLokPvV1XzNiBY4vJrMVCeBV6G/lKHyC?= =?us-ascii?Q?x/G/rAOp2wHVHsNqh71lwcdusWgaobVw5mxjBOwvpxNxmlh8AntAiStYuIN8?= =?us-ascii?Q?W5AMj6mGPLmH6VuSIpIKDqhpFE+wZaTYtTYHR8WcORZfRDVPevbz6ujczVvv?= =?us-ascii?Q?IdpLMXpk+em9nFDOjq1C3asX4xtOVkjQMe0viNAkyfkyVkl+jscEpUU1LDu7?= =?us-ascii?Q?PZlPUrWleWAj1BBaRP+2ttEHV6xFR0r7j935HGle8FicqiBmzFlfQuxWcVNs?= =?us-ascii?Q?5h7v7ToAZrDokLi47+C2zHWPmoK/M6DlcQBZYzjdWxdXyfOZO0Y124gnrmuP?= =?us-ascii?Q?u3Tbg67jlAKX3abkYkDfTKlc/ZZaIE8GRmYnBlQMNlzmtEbJ7OStKG7OHqvI?= =?us-ascii?Q?VLZynlOfaAlAIZxGWBxzqkXsO0TBMz7fs10bQZtJ/UxKlk52PcFTzeySdFu/?= =?us-ascii?Q?QgyNy/KVTwNzukRCd6Bu5YkYFBbT92l7ZB47+u6jEaOnJNKeSwtSiQd2jXce?= =?us-ascii?Q?EsiDfgn4gAM4SiSabfavAkuIG2OeQSW3Sn7Qw58Jc1TJ6S2RzTxI4OAAPN+X?= =?us-ascii?Q?fQ4gcWlWFLrBsF8qnv1vYagP2x9nSDKPizdAsPppuTbWHYewT61SPFpnPRKK?= =?us-ascii?Q?fNJHSeRupyPMQlzgNZHXu8DAvxnMhaAcwNWtFGJ+N5rZnwBjJjidMRSLqrqP?= =?us-ascii?Q?w8uJuB3yPeMfK0Ng3rSpovjRY8cQCLQc2wir0cxnCBXpJjbxgYd8XnxsWXsA?= =?us-ascii?Q?qsPdEDtT30jYlrnYkyXFfp2j/kgQpgZZYmZgS6fWgGTZVv0qtqK7ItLzigAf?= =?us-ascii?Q?RhIkE+1RzCtOprYuarjO4GZzW94B7OJptpsxrIUNjsBKTJ3LqilBltUhzym5?= =?us-ascii?Q?ETXyM36+iSDSh04mqMyAT98xHSa24ns/g91zQaLwvrqZSQOVEEUL/U92ChjV?= =?us-ascii?Q?GrGrjPyMwrEhIwHaND3ZP9azOyJh4dPq0+IdbqS829Yf8cYvemcPOe3N53SJ?= =?us-ascii?Q?Eo3EgLNvoOYYEm9dWRSTScCAq8+g3RocneNBbmgoF0xh5Y2DoEEjoWMqj+T1?= =?us-ascii?Q?RSURZhDDXziWNUabu+ATxrXhwe4DSgrgcZgW3IJJ6EVR8X0NHhipJbjEUkRi?= =?us-ascii?Q?p+U2k4gKaQupt04qG4hDfk3WGYvKGaeJBbWvfAGntMHfXW/yyAEHCb+8Ixmq?= =?us-ascii?Q?dIR7cHg7Da5cTnTamBvC2S0oEgvu7GeLq/NFzUAsA7E6c+91Gm/9tQiFTCMi?= =?us-ascii?Q?lfQInDWngONqOSCHgEqS4Ji3yeQOjjA1iiLcv2bs9JB3CsU8sgR2LJUAeGaQ?= =?us-ascii?Q?M7whSb3BxTEdW+nUxoSPOOX5uTPYk87hU4/003xos2Bc6gv4?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: f67f9c87-520c-45e5-5378-08deb5bb43f0 X-MS-Exchange-CrossTenant-AuthSource: SN7PR12MB6839.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 15:28:23.7600 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zOxuofKU5Q3D+zdTc1bMiGqtAzFlOV/hXn0rec08Qq5Zo9iqglaP2oW/AEqb1u7S X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA0PR12MB8205 X-purgate-ID: tlsNG-33051d/1779204514-3B360938-F3B59085/0/0 X-purgate-type: clean X-purgate-size: 1856 On Tue, May 19, 2026 at 08:47:17AM +0100, Julien Grall wrote: > Hi Edgar and Jan, > > On 19/05/2026 07:40, Jan Beulich wrote: > > On 19.05.2026 01:43, Edgar E. Iglesias wrote: > > > The generic Xen strrchr() implementation returns a pointer to the string > > > terminator when searching for '\0', matching the standard C semantics. > >>>> The ARM64 assembly version stopped as soon as it loaded the terminator > and > > > returned the previous match pointer instead. This made strrchr("", '\0') > > > return NULL. > > > > I wonder though: Why would one pass '\0' to strrchr()? If you want to find > > the end of a string, more efficient (at least in the general case) options > > exist (strchr(), memchr(), strlen()). > > +1 I am interested to know the use-case for this change. Is this for > compliance or real issue? If the latter, can we add some details. > > It might also be worth to write a selftest to avoid any regression (in > particular if we decide to diverge from Linux). > > > > > > Compare the loaded byte against the requested character before deciding > > > whether to stop at the terminator, so the terminator itself can be returned > > > when it is the requested character. > > > > Nit: "..., so a pointer to the terminator ...". > > > > > Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") > > > Signed-off-by: Edgar E. Iglesias > > > > Reviewed-by: Jan Beulich > > > > However, the function having come from Linux, imo the patch wants to go to > > Linux (ideally first, but at the very least also). > > We are trying to keep the core implementation in lib the same as linux (see > arch/arm/README.LinuxPrimitives). I would prefer if this is also first > committed to Linux and then backported. > Sounds good, thanks! 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CSR_VSTIMECMP is the VS-level timer comparator: the hardware fires a VS-timer interrupt whenever (time + htimedelta) >= vstimecmp. Writing to CSR_STIMECMP leaves CSR_VSTIMECMP uninitialized, so its reset value may immediately satisfy this condition, generating spurious VS-timer interrupts before any guest has programmed the timer. Fix this by writing the ULONG_MAX value to CSR_VSTIMECMP as intended. Signed-off-by: Baptiste Le Duc --- xen/arch/riscv/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 8769709e52..10b7e35f13 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -101,6 +101,6 @@ void __init preinit_xen_time(void) * Thereby to avoid spurious VS-timer irqs set vstimecmp CSR to * ULONG_MAX. */ - csr_write64(CSR_STIMECMP, ULONG_MAX); + csr_write64(CSR_VSTIMECMP, ULONG_MAX); } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 15:53:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 15:53:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313188.1583405 (Exim 4.92) (envelope-from ) id 1wPMlF-0002qZ-JZ; Tue, 19 May 2026 15:53:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313188.1583405; Tue, 19 May 2026 15:53:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPMlF-0002qS-Fh; Tue, 19 May 2026 15:53:37 +0000 Received: by outflank-mailman (input) for mailman id 1313188; Tue, 19 May 2026 15:53:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPMlE-0002qM-3z for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:53:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPMlD-0017HD-GS for xen-devel@lists.xenproject.org; Tue, 19 May 2026 17:53:35 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c875d-e002-0a2a0a5209dd-0a2a4506a894-38 for ; Tue, 19 May 2026 17:53:35 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c877e-7371-0a2a45060019-d155da29cc18-3 for ; Tue, 19 May 2026 17:53:34 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bcceb394417so471497766b.0 for ; Tue, 19 May 2026 08:53:34 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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It doesn't too much sense to write this as ... > > CSR_VSTIMECMP is the VS-level timer comparator: the hardware fires a > VS-timer interrupt whenever (time + htimedelta) >= vstimecmp. Writing > to CSR_STIMECMP leaves CSR_VSTIMECMP uninitialized, so its reset value > may immediately satisfy this condition, generating spurious VS-timer > interrupts before any guest has programmed the timer. It could be just "According to the comment above initializing of CSR_STIMECMP CSR_VSTIMECMP should be used instead of CSR_STIMECMP" or something like that as what is mentioned here is mentioned in the comment above csr_write64(CSR_STIMECMP, ULONG_MAX). > > Fix this by writing the ULONG_MAX value to CSR_VSTIMECMP as intended. > With what I mentioned above this could be dropped. ... it should be here: Fixes: 25e0327306903 ("xen/riscv: allow Xen to use SSTC while hiding it from guests"). > Signed-off-by: Baptiste Le Duc > --- > xen/arch/riscv/time.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c > index 8769709e52..10b7e35f13 100644 > --- a/xen/arch/riscv/time.c > +++ b/xen/arch/riscv/time.c > @@ -101,6 +101,6 @@ void __init preinit_xen_time(void) > * Thereby to avoid spurious VS-timer irqs set vstimecmp CSR to > * ULONG_MAX. > */ > - csr_write64(CSR_STIMECMP, ULONG_MAX); > + csr_write64(CSR_VSTIMECMP, ULONG_MAX); > } > } The change itself looks good to me. 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Thankyou for the patch.  We have a standard pattern for referring to other commits. For the referencing things in the main text, you want to write it as: Commit 25e032730690 ("xen/riscv: allow Xen to use SSTC while hiding it from guests") mistakenly ... Specifically, git log --abbrev=12 --pretty=format:'commit %h ("%s") and adjust the capitalisation as necessary. > CSR_VSTIMECMP is the VS-level timer comparator: the hardware fires a > VS-timer interrupt whenever (time + htimedelta) >= vstimecmp. Writing > to CSR_STIMECMP leaves CSR_VSTIMECMP uninitialized, so its reset value > may immediately satisfy this condition, generating spurious VS-timer > interrupts before any guest has programmed the timer. > > Fix this by writing the ULONG_MAX value to CSR_VSTIMECMP as intended. For bugfixes, we also have an explicit tag here just above you SoB Fixes: 25e032730690 ("xen/riscv: allow Xen to use SSTC while hiding it from guests") This helps us identify patches for backport. > Signed-off-by: Baptiste Le Duc From xen-devel-bounces@lists.xenproject.org Tue May 19 15:56:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 15:56:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313202.1583422 (Exim 4.92) (envelope-from ) id 1wPMoU-0003q3-7u; Tue, 19 May 2026 15:56:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313202.1583422; Tue, 19 May 2026 15:56:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPMoU-0003pw-5E; Tue, 19 May 2026 15:56:58 +0000 Received: by outflank-mailman (input) for mailman id 1313202; Tue, 19 May 2026 15:56:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPMoS-0003pq-UN for xen-devel@lists.xenproject.org; Tue, 19 May 2026 15:56:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPMoS-004f5R-6t for xen-devel@lists.xenproject.org; Tue, 19 May 2026 17:56:56 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c8845-2eae-0a2a0a5409dd-0a2a4507a8fe-6 for ; Tue, 19 May 2026 17:56:56 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c8847-229c-0a2a45070019-d155802bb0d6-3 for ; Tue, 19 May 2026 17:56:55 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-49021532ebdso7673685e9.2 for ; Tue, 19 May 2026 08:56:55 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <8472866e-49e6-45e8-8d86-3b6b09d2c177@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779206215-0B77AC48-E3E6A16F/0/0 X-purgate-type: clean X-purgate-size: 1017 On 19.05.2026 17:17, Oleksii Kurochko wrote: > On 5/19/26 4:53 PM, Jan Beulich wrote: >> On 19.05.2026 16:49, Oleksii Kurochko wrote: >>> int init_guest_isa(struct domain *d) >>> { >>> int len; >>> >>> bitmap_andnot(d->arch.isa, riscv_isa, guest_unsupp, >>> RISCV_ISA_EXT_MAX); >>> >>> len = build_guest_isa_str(NULL, 0, d->arch.isa); >>> if ( len < 0 ) >>> return len; >>> >>> d->arch.isa_str = xmalloc_array(char, len + 1); >>> if ( !d->arch.isa_str ) >>> return -ENOMEM; >>> >>> build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa); >> >> At least ASSERT() the success of this? > > I will add: > > ASSERT(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) == len); Ehem. Please check how ASSERT() works (and the difference to BUG_ON()). Jan > but I expect that we won't be here if len is incorrect or > d->arch.isa_str wasn't allocated properly. > > Thanks. > > ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 16:15:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 16:15:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313213.1583431 (Exim 4.92) (envelope-from ) id 1wPN6I-0007qY-OX; Tue, 19 May 2026 16:15:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313213.1583431; Tue, 19 May 2026 16:15:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPN6I-0007qR-M0; Tue, 19 May 2026 16:15:22 +0000 Received: by outflank-mailman (input) for mailman id 1313213; Tue, 19 May 2026 16:15:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPN6H-0007qK-7T for xen-devel@lists.xenproject.org; Tue, 19 May 2026 16:15:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPN6G-00DJsn-JY for xen-devel@lists.xenproject.org; Tue, 19 May 2026 18:15:20 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c8c97-5cb7-0a2a0a5109dd-0a2a450bd980-2 for ; Tue, 19 May 2026 18:15:20 +0200 Received: from [185.255.28.34] (helo=prod-mta-13.swg-srv.net) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c8c98-212f-0a2a450b0019-b9ff1c22b549-3 for ; Tue, 19 May 2026 18:15:20 +0200 Received: from mail2.vates.fr ([37.26.189.201] mail2.vates.fr) (Authenticated sender: 8631fc262581453bbf619ec5b2062170/smtp/7773de5a-2839-4720-82ee-e06722ae1d3e) by prod-mta-13.swg-srv.net (ZoneMTA - prod-mta-13) with ESMTPSA id 19e4105277b000f373.007 for (version=TLSv1.3 cipher=TLS_AES_256_GCM_SHA384); Tue, 19 May 2026 16:15:17 +0000 Received: from leducb (182.136.141.83.rev.sfr.net [83.141.136.182]) (Authenticated sender: baptiste.le-duc) by mail2.vates.fr (Postfix) with ESMTPSA id 926978684D; Tue, 19 May 2026 18:15:16 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=teqjXE3tkmZ9cojzz0pTGknvHaVWTahpc3tDyhhfebE=; h=from:subject:date:message-id:to:cc:mime-version:content-transfer-encoding:feedback-id; b=D+3lt53woS3bT1rUSSUt+d79+A/oodZnX9UdGtZJ51np80WsDsDjvYqoOoG8vGuJmgwj2dynn QB7Pfl/XPKDJG4zk9sOwyWRwZS4+Ma6v7MVA0HY4v20oDQZ83BSpZCwRzKDT4V1S+uo7OvRrzgr HggFRPj2+ejgGVQwlxwinsxgTAZlnSKDqwC99r6EMy/RWCWGa6lDRDNp5yfuopkQp0nMWCBR0KM DJXnrXaTqRmJlA44tNb+yOCG0OdPxWc59qEpN0QiApbXrZWqnZVFBjkQmplIXEM8xJCj4aXnxiQ lJUg9giB7GS/gB1szzHF2VFIkgiLsReT7VttpCdn6Rmw== X-Zone-Loop: 12082eaabae1ec0f85cdbbabbdd681f162d1904d40cb x-campaign-type: default x-transaction-id: 7e66f6f7-0931-4fe6-a605-f577e1eccb32 x-swg-uid: 01-594f6c10-167d-47ea-b3d1-dc147c62644c X-Mailer: Sweego Message-ID: <1779207317.8631fc262581453bbf619ec5b2062170.19e4105277b000f373@vates.tech> x-swg-bid: 1779207317.8631fc262581453bbf619ec5b2062170.19e4105277b000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Baptiste Le Duc To: xen-devel@lists.xenproject.org Cc: Baptiste Le Duc , Alistair Francis , Connor Davis , Oleksii Kurochko , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2] xen/riscv: fix sstc init to write vstimecmp instead of stimecmp Date: Tue, 19 May 2026 18:14:44 +0200 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779207316857 X-purgate-ID: tlsNG-42698a/1779207320-23374F3B-07CA67EE/0/0 X-purgate-type: clean X-purgate-size: 785 According to the comment above initializing of CSR_VSTIMECMP should be used instead of CSR_STIMECM. Fixes: 25e032730690 ("xen/riscv: allow Xen to use SSTC while hiding it from guests") Signed-off-by: Baptiste Le Duc --- xen/arch/riscv/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/riscv/time.c b/xen/arch/riscv/time.c index 8769709e52..10b7e35f13 100644 --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -101,6 +101,6 @@ void __init preinit_xen_time(void) * Thereby to avoid spurious VS-timer irqs set vstimecmp CSR to * ULONG_MAX. */ - csr_write64(CSR_STIMECMP, ULONG_MAX); + csr_write64(CSR_VSTIMECMP, ULONG_MAX); } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 19 16:22:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 16:22:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313222.1583441 (Exim 4.92) (envelope-from ) id 1wPNCa-0001qn-Bm; Tue, 19 May 2026 16:21:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313222.1583441; Tue, 19 May 2026 16:21:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPNCa-0001qg-8d; Tue, 19 May 2026 16:21:52 +0000 Received: by outflank-mailman (input) for mailman id 1313222; Tue, 19 May 2026 16:21:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPNCY-0001qa-Nq for xen-devel@lists.xenproject.org; Tue, 19 May 2026 16:21:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPNCY-001B6l-0G for xen-devel@lists.xenproject.org; Tue, 19 May 2026 18:21:50 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c8e1d-5cb7-0a2a0a5109dd-0a2a4509835e-0 for ; Tue, 19 May 2026 18:21:49 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c8e1d-2497-0a2a45090019-d155802be071-3 for ; Tue, 19 May 2026 18:21:49 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so56658615e9.2 for ; Tue, 19 May 2026 09:21:49 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Please check how ASSERT() works (and the difference to BUG_ON()). > Condition itself looks correct for ASSERT(). If build_guest_isa_str() returns value equal to len then assert_failed() shouldn't be called. Maybe do you mean that it will never fire in release build then yes it should be changed to BUG_ON() and the condition should be inverted: BUG_ON(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) != len); ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 16:27:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 16:27:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313231.1583450 (Exim 4.92) (envelope-from ) id 1wPNIA-0002kT-UV; Tue, 19 May 2026 16:27:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313231.1583450; Tue, 19 May 2026 16:27:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPNIA-0002kM-Qz; Tue, 19 May 2026 16:27:38 +0000 Received: by outflank-mailman (input) for mailman id 1313231; Tue, 19 May 2026 16:27:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPNI9-0002kG-1O for xen-devel@lists.xenproject.org; Tue, 19 May 2026 16:27:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPNI8-00ChOx-9w for xen-devel@lists.xenproject.org; Tue, 19 May 2026 18:27:36 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0c8f70-5cb7-0a2a0a5109dd-0a2a4504d4f6-6 for ; Tue, 19 May 2026 18:27:35 +0200 Received: from [52.101.46.68] (helo=CO1PR03CU002.outbound.protection.outlook.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0c8f76-1dec-0a2a45040019-34652e44fda8-3 for ; Tue, 19 May 2026 18:27:35 +0200 Received: from SN7PR12MB6839.namprd12.prod.outlook.com (2603:10b6:806:265::21) by CYYPR12MB8937.namprd12.prod.outlook.com (2603:10b6:930:cb::15) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.25.21; Tue, 19 May 2026 16:27:28 +0000 Received: from SN7PR12MB6839.namprd12.prod.outlook.com ([fe80::ae79:f50b:b7a6:4cd8]) by SN7PR12MB6839.namprd12.prod.outlook.com ([fe80::ae79:f50b:b7a6:4cd8%5]) with mapi id 15.21.0025.016; Tue, 19 May 2026 16:27:28 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=fail header.s=selector1 header.d=amd.com header.i="@amd.com" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ahsaF9qUZE1yBBYgpPmg8NvHbx5flWTnj/QgdnmPtTibhXokUyjG3hwv7JKGYbeUPJrkAlpGbiGoe494bw0Dzyv4j4sJyQh3gAslfz3/SBWrKM/XPzbhOyhGX5ik0k144DcOW2BO4/mQ2iC3UBdyKiG2o+FndzQC0Yn5XGZIOVSgaqUpMGLZ8nUcJLqE0l4S48qeofWVs4K1wXr4k6OdOwiTKsTItkgIGBrUhSNLGw4HUrVmP9U8x9hpep2okdAnb4ds/vWoBxlI9igFMnwlzxxL5vECtthOlZa2VOT8x8CccHOknwkWUQ+Dv8SOv01H1TfcNSon1lgJF3o3BGWTMw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Uh31kvedVf7+zuAc3TPNvVcej9QrdanV4BG58oldh2c=; b=eO8louH3RP1cYYvDv80DzcYdebAKlrBCCwB2oM1VTarvT41TYaZmIVMYP4tH6qD/NJLlqXgw/qgdhNIJSjp6OUwvogXSVs68EIFA3fTI3K2cpc/jTK/SXBsf3Gz6FHHKRc3Ci+o3E8owE8Wt7yVzWEZDsyxHHrlTrvBNGqoThq7wVOF0Kvzr11/Zuel551oobBqiyIAsuG17qJYtL26yTTr+HCEgq9uDMQuhybaCBlgY22mnnOT2wkeaT7VEbJGFPrgyJu0XLhHsOBJ2DgSyqCg0xuTPZ4jYFJ/Z1bhqdQsXKhZAvCw/W6UHx5+wyeyJxFJopMSpD50wzELrU5f0jQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amd.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=Uh31kvedVf7+zuAc3TPNvVcej9QrdanV4BG58oldh2c=; b=VctKwpFDp1iz+9mIl1WEIjmz14oPM1RY7ugqbdZMwmujbRqi0OWTj1gu+yr4MGkCLcVIx9zCSHCYKs5Sd3hylD9idLazWjDO1zINcdYt4c/BZ477VGxm/jnoNlug4tepO0lRFQKXlgfQ93B0BdujWXSYE2K6hXBGT7cDoiGTSN4= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com; Date: Tue, 19 May 2026 18:27:23 +0200 From: "Edgar E. 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Iglesias wrote: > > The generic Xen strrchr() implementation returns a pointer to the string > > terminator when searching for '\0', matching the standard C semantics. > > > > The ARM64 assembly version stopped as soon as it loaded the terminator and > > returned the previous match pointer instead. This made strrchr("", '\0') > > return NULL. > > > > Compare the loaded byte against the requested character before deciding > > whether to stop at the terminator, so the terminator itself can be returned > > when it is the requested character. > > > > Fixes: 42c4eb6a83 ("xen: arm64: assembly optimised mem* and str*") > > Signed-off-by: Edgar E. Iglesias > > --- > > xen/arch/arm/arm64/lib/strrchr.S | 7 +++---- > > 1 file changed, 3 insertions(+), 4 deletions(-) > > A couple of tangential things. > > This file was inherited from Linux. Does the same bug need fixing > there? What about the arm32 side? Yes, I'll have a look at Linux. Arm32 looks fine to me. > > Looking at your example, it surely wasn't actually as simple as > strrchr("", '\0') ? I'd expect the optimiser to be able to turn that > into a constant and not call out to the library implementation. > We ran into this while exploring a new QEMU based test framework, we had it do some fuzzing and it tripped over this. > Elsewhere, I've created xen/common/bitops.c to be CONFIG_SELF_TESTS for > the bit operations including the arch-optimised variations, because > they're subtle and easy to get wrong. This looks like it's worth doing > the same for the bits of libc we implement. > Yes, that looks like a good fit, thanks. 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Probably, it is something wrong with my e-mail app but this line looks long enough. I think we have to follow 80 chars per line. Nit: s/CSR_STIMECM/CSR_STIMECMP > > Fixes: 25e032730690 ("xen/riscv: allow Xen to use SSTC while hiding it from guests") Nit: there is no need for empty line between Fixes: and Signed-off-by. > > Signed-off-by: Baptiste Le Duc Nit: it also would be nice to put here what was changed, for example, --- Changes in v2: - Update the commit message. --- Please don't rush to send a new version of the patch. Probably committers will agree to make suggested fixes during commit. With fixes mentioned above: Reviewed-by: Oleksii Kurochko Thanks! ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 19 16:30:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 16:30:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313251.1583468 (Exim 4.92) (envelope-from ) id 1wPNLG-0004lM-Kb; Tue, 19 May 2026 16:30:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313251.1583468; Tue, 19 May 2026 16:30:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPNLG-0004lF-Hk; Tue, 19 May 2026 16:30:50 +0000 Received: by outflank-mailman (input) for mailman id 1313251; Tue, 19 May 2026 16:30:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPNLF-0004kt-KM for xen-devel@lists.xenproject.org; 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Message-ID: Date: Tue, 19 May 2026 17:30:39 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Alistair Francis , Connor Davis , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: Re: [PATCH v2] xen/riscv: fix sstc init to write vstimecmp instead of stimecmp To: Oleksii Kurochko , Baptiste Le Duc , xen-devel@lists.xenproject.org References: <1779207317.8631fc262581453bbf619ec5b2062170.19e4105277b000f373@vates.tech> <49d0cbe5-1366-4539-9754-371e9507a54d@gmail.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <49d0cbe5-1366-4539-9754-371e9507a54d@gmail.com> Content-Type: text/plain; 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Probably > committers will agree to make suggested fixes during commit. > > With fixes mentioned above: >  Reviewed-by: Oleksii Kurochko In this case, it's probably easiest for me to fix up on commit to produce a good example to follow. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 16:31:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 16:31:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313258.1583477 (Exim 4.92) (envelope-from ) id 1wPNLo-0005Ck-TI; Tue, 19 May 2026 16:31:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313258.1583477; Tue, 19 May 2026 16:31:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPNLo-0005Cd-QQ; Tue, 19 May 2026 16:31:24 +0000 Received: by outflank-mailman (input) for mailman id 1313258; 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b=R1vUdP0P9N7Fjn3gUfI8V/ZLc0y3sZ0LQg7L3DW/fOKe2XEQX10YlkbCQ8G++ocp4szgw7cx1GwsBsoWuyuTuYLv82uFL3LaJpuS95VVB8QDW2kxsmqdYbaGdBe5F3iBlLSnyYsYuciwSfWKzvqxAPttKuDyLpI1UnB4enAn8zZEP/RBzvRMym2cKHlup4VhgGomY7BhO9e4Wb8qgxc9nG0FWiDrLgNerFwML0s+nVITNm/HLufJ1Tg45VZA5aJYF4sjMqBuS+WM64AZDSs9hjK7QQvP4Y6xEGyInb73c2srkXqt74pQwqDdwhd2JuGkTF0bvMlRMyAY0Bzvhm6P4w== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=epam.com; Message-ID: <26f52f4a-a830-4430-b0c1-9ca7f761515e@epam.com> Date: Tue, 19 May 2026 19:31:15 +0300 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 0/6] xen/arm: scmi: introduce SCI SCMI SMC multi-agent support To: Stefano Stabellini , Julien Grall , Juergen Gross , Anthony PERARD Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Bertrand Marquis , Jan Beulich , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Volodymyr Babchuk , Grygorii Strashko References: Content-Language: en-US From: Oleksii Moisieiev In-Reply-To: Content-Type: text/plain; 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On 06/04/2026 19:39, Oleksii Moisieiev wrote: > Inroducing patch series which includes implementation of the SCI SCMI > SMC multi-agent support. > This patch series follows RFC v5 [3] series which was introducing both > SCMI single-agent and multi-agent support. After the discussion it was > decided to split features and upstream singe-agent support first. This > feature is merged for now to v4.21-rc2. > I'm starting this patch series from v6 to save the discussion history > and don't break changes log. > > Patch - xen/domctl: extend XEN_DOMCTL_assign_device to handle not > only iommu > - add chainged handling of assigned DT devices to support > access-controller functionality through SCI framework. > Change was done in two parts: > - call to sci_do_domctl() to do_domctl() > - update iommu_do_dt_domctl() to check for dt_device_is_protected() > and not fail if DT device is not protected by IOMMU > > Patch - xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver > - add Xen-specific SCMI container compatible `xen,sci` > under `/chosen/xen`; Xen binds only to the `arm,scmi-smc` inside it and > ignores other SCMI nodes (e.g. under `/firmware`). > - add `scmi-secondary-agents` and `#scmi-secondary-agents-cells` to describe > func_id/shmem/(optional agent_id) tuples for secondary agents. > - each guest using SCMI supplies its agent_id (dom0 via > `xem,dom0-sci-agent-id=` parameter in xen,sci compatible node, > toolstack via `arm_sci = "type=scmi_smc_multiagent,agent_id=..."`, dom0less > via `xen,sci_type` + `xen,sci-agent-id` in `xen,domain`). > - factor out SCMI generic definitions and shmem code. > - passthrough configuration for SCMI guests mirrors other HW passthrough. > > Patch - docs: arm: add SCI SCMI SMC multi-agent driver docs > - document the Xen SCMI container under `/chosen/xen/xen_scmi_config` and the > mediator’s binding rules; update examples accordingly. > > All Xen-specific SCMI configuration now lives under `/chosen/` > to keep host DT changes isolated while leaving the host `/firmware/scmi` > untouched for Dom0 consumption. > > Code can be found at: > https://github.com/oleksiimoisieiev/xen/tree/scmi_ma_upstrv6 > > [1] RFC v2: > http://patchwork.kernel.org/project/xen-devel/cover/cover.1644341635.git.oleksii_moisieiev@epam.com/ > [2] RFC v3: > https://patchwork.kernel.org/project/xen-devel/patch/20250311111618.1850927-1-grygorii_strashko@epam.com > [3] RFC v5: > https://lore.kernel.org/xen-devel/cover.1753184487.git.oleksii_moisieiev@epam.com/ > [4] SCMI single-agent: > https://lore.kernel.org/xen-devel/cover.1756995595.git.oleksii_moisieiev@epam.com/ > SCMI spec: > https://developer.arm.com/documentation/den0056/e/?lang=en > > SCMI bindings: > https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml > https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml > > Reference EL3 FW: > RPI5: https://github.com/xen-troops/arm-trusted-firmware/commits/rpi5_dev/ > Renesas v4h: > https://github.com/GrygiriiS/arm-trusted-firmware/commits/rcar_gen4_v2.7_v4x-scmi_upd/ > > base-commit: dbe60f244c (Update Xen to 4.21, 2025-02-21) > > Changes in v11: > - Fix agent_id documentation: clarify it applies to SCMI SMC > multi-agent support only, not plain SCMI SMC (reviewer feedback) > - Remove "non-zero" from agent_id description to match accepted > range [0..254] > - Remove "UINT8_MAX (255) is treated as invalid" from user > documentation as unnecessary implementation detail > - Add LIBXL_HAVE_SCMI_SMC_MULTIAGENT feature macro in libxl.h to > advertise the new scmi_smc_multiagent type and agent_id field > - Add agent_id validation in > libxl__arch_domain_build_info_setdefault() to reject invalid values at > the libxl level, not only in xl > > Changes in v10: > - remove unused sci_do_domctl stub from sci.h > - removed extra include in memcpy-{to/from}io.c files > - Fix tabs in MAINTAINERS file > - remove duplicate SPDX tag from scmi-shmem.c > - add cast to ARM_SMCCC_INVALID_PARAMETER to settle the sign since > ARM_SMCCC_INVALID_PARAMETER is -3 which is part of the spec and resp > is the default smccc call structure. > - update free_channel_list. Add spinlock to avoid race condition and > a comment with a description of the function work > - preserve error of smc_create_channel in scmi_probe > - check scmi shmem address alignment as wel as it is done for size > - check for d->arch.sci_data != NULL in scmi_handle_call > - use SCMI_SHMEM_MAPPED size for iomem_permit_access > - change len type to unsigned in shmem_{get|put}_message > - rename shmem_channel_is_free to shmem_channel_status > - add comment about skipping message status when getting message response > - Set correct agent_id ranges for dom0less and a toolstack. Agent_id 0 > is not binded for dom0 so can be reused. Also mentioned that > UINT8_MAX (255) is treated as invalid agent_id. > - Split hypervisor and toolstack changes into separate commits > - move init list and spin init after initial checks in probe call > - fix typo in comments > - clean resources when sci_register returns an error. > - Split hypervisor and toolstack changes into separate commits > - rephrase section about /firmware/scmi. Mentioned that this node is > taken from Host DT and copied unmodified. > - fix xen,reg address for secondary domains for Dom0less configuration > > Changes in v9: > - treat SCI as a gate for XEN_DOMCTL_*assign_device: abort before > IOMMU if sci_do_domctl() returns an error other than -ENXIO, instead > of trying to propagate SCI errors after a successful IOMMU > operation. This avoids partial success and the need for IOMMU rollback. > - remove early return from do_domctl() in the assign_device > path to keep RCU handling intact. > - change IS_ENABLED(*) to #ifdef in sci_do_domctl quard > - reword commit description to refer to memcpy_fromio and memcpy_toio > - ordering obj-y in Makefile > - rename ALL_LIBS to ARCH_LIBS > - drop io.h and move definitions to the common header, fix comments to > be arch neutral > - update comments for memcpy_{from/to}io implementation > - sort and refactor MAINTAINERS enties > - remove Spurious changes > - add extra check to avoid ASSERT when calling unmap_channel_memory > from assign device method > - set correct tx flag to SCMI_BASE_AGENT_PERMISSIONS_RESET when > freeing resources. Flag should be set to 1 according to the > section 4.2.2.12 [0]. > - fix dt node copmaring > - moved channel->shmem check from ASSERT in unmap_memory_channel to > "if" statement. This will prevent firing ASSERT if > unmap_channel_memory was called twice on the same channel. > > Changes in v8: > - check for CONFIG_ARM_SCI to be ebabled instead of COMFIG_ARM before > calling sci_do_domctl > - rework sci_do_domctl call to avoid extra checks, improved error > handling. > - do not propagate ret1 if sci_do_domctl returned positive ret > - updated comment in domctl.c code > - switched to ordered accessors to address the ordering and barrier > concerns. > - updated the documentation to match the implementation and explicitly > state the supported access sizes and granularity. > - rename memcpy_* implementation files to memcpu-* to follow naming > convension > - fix indentation to match Xen style > - fix intendation to match Xen style > - move memcpy-{from/to}io to more convenient library place > - update xen_scmi func_id in commit description > - updated documentation with the new DT format > - updated opt_dom0_scmi_agent_id setting to avoid it to be equal > SCMI_AGENT_ID_INVALID. > - changed SCMI_AGENT_ID_INVALID from 0xff to UINT8_MAX which makes > code more clear showing that UINT8_MAX is theated like invalid > agent_id and couldn't be used. Also excluded SCMI_AGENT_ID_INVALID > from acceptable value range > - remove outdated xen,config property ignore, added xen,sci compatible > to skip_matches in handle_node > - add documentation for pre-existing scmi-smc-passthrough command line > option in alphabetically correct location (in 's' section) > - add note to commit description about documentation for previously > undocumented scmi-smc-passthrough > - Fix SMC IDs in DT examples (Xen management uses 0x82000003, Dom0 uses 0x82000002) > - Add explicit note explaining why Dom0 and Xen channels do not conflict > - Document dom0less multi-agent configuration example (xen,sci_type / xen,sci-agent-id) > - Add scmi_xen node to agent-discovery example with #scmi-secondary-agents-cells = 2 > - Drop dom0=sci-agent-id command line handling; Dom0 SCMI is now enabled via > xen,dom0-sci-agent-id in the xen,sci DT container > - Refresh docs and examples to mention the DT property instead of the cmdline option > - update documentation to match the last DT format > - fixed RST: "... code-block:: dts" -> ".. code-block:: dts" > - update documentation with dom0less configuration example > - update documentation with new param xen,dom0-sci-agent-id > instead of the command line parameter > > Changes in v7: > - update domctl to build on both Arm and x86 platforms > - move ret1 declaration to the top of the function as required by code > style > - x86 guidance: removed the speculative note; header now just says > each arch supplies its own implementation or macro. > - name spacing: dropped the double-underscore; the helpers are now > memcpy_fromio / memcpy_toio. The header also explicitly allows an > arch to define these as macros before including it. > - updated io.c to keep 32-bit transfers safe on arm32 > - moved to __raw_read*/__raw_write* accessors to avoid endianness conversion. > - split the helpers into separate compilation units > - rework scmi nodes for xen to match on compatible string instead of > the direct path > - update documentation in section of the xen_scmi configuration which > is matched by "xen,sci" compatible instead of the direct path. > > Changes in v6: > - change iommu_do_domctl and sci_do_domctl command order and > call sci_do_domctl first which will produce cleaner code path. > Also dropped changing return code when iommu was disabled in > iommu_do_domctl. > - sorted objs in Makefile alhabetically > - added newline at the end of Makefile > - used uint{N}_t intead of u{N} > - add comment about why 32 bit IO operations were used > - updated cast opertaions to avoid dropping constness which is wrong > - move function definitions to generic place so the could be reused by > other arch > - add SPDX tag to io.c > - updated scmi-shmem to use io.h from generic location > - update scmi_agent_id parameter to be provided inside dom0= parameter > list and have the following format "dom0=sci-agent-id=0" > This change was done as a response for Stefano comment and > requires a lot of code changes, but produces much cleaner solution > that's why I've added it to the code. > - fix file comments and return codes > - fix lenght checks in shmem_{get,put}_message to use offsetof > - remove len member from scmi_channel structure as it is not used > - set scmi-secondary-agents property to be mandatory since if no > secondary agents were provided then there is no sence to enable scmi > when no secondary agents are populated to the Domains > - update documentation in booting.txt, added xen_scmi node to the > example > - adjust d->arch.sci_enabled value in scmi_domain_destroy > - fix lock management in smc_create_channel call > - avoid extra map_channel_memory command for Xen management channel > because collect_agent_id call unmaps memory if DOMID_XEN is not > set. So for Xen management channel we can init domain_id ad DOMID_XEN > before calling collect_agent_id so memory shouldn't be unmapped. > - remove all HVC mentions from the multi-agent doc > - update sci-agent-id parameter description in the documentation > - add missing Sign-of > - minor fixes across the document > > Changes in v5: > - return -EINVAL if mediator without assign_dt_device was provided > - invert return code check for iommu_do_domctl in > XEN_DOMCTL_assign_device domctl processing to make cleaner code > - change -ENOTSUPP error code to -ENXIO in sci_do_domctl > - handle -ENXIO return comde of iommu_do_domctl > - leave !dt_device_is_protected check in iommu_do_dt_domctl to make > code work the same way it's done in "handle_device" call while > creating hwdom(dom0) and "handle_passthrough_prop" call for dom0less > creation > - drop return check from sci_assign_dt_device call as not needed > - do not return EINVAL when addign_dt_device is not set. That is > because this callback is optional and not implemented in single-agent driver > - move memcpy_toio/fromio to the generic place > - fix device-tree example format in booting.txt, added ";" after "}". > - update define in scmi-proto.h > - update define in scmi-shmem.h file > - scmi_assign_device - do not ignore -EOPNOTSUPP return > code of the do_smc_xfer > - remove overwriting agent_channel->agent_id after > SCMI_BASE_DISCOVER_AGENT call > - add multi-agent files to the MAINTAINERS > - add SCMI multi-agent description to the SUPPORT.md > - handle ARM_SMCCC_INVALID_PARAMETER return code and return -EINVAL > for smc call > - updated collect_agents function. Set agent_id parameter as optional > in scmi-secondary-agents device-tree property > - introduce "#scmi-secondary-agents-cells" parameter to set if > agent_id was provided > - reanme xen,scmi-secondary-agents property to scmi-secondary-agents > - move memcpu_toio/fromio for the generic place > - update Xen to get management channel from /chosen/xen,config node > - get hypervisor channnel from node instead of using hardcoded > - update handling scmi and shmem nodes for the domain > - Set multi-agent driver to support only Arm64 > - rework multi-agent driver to leave Host Device-tree unmodified > > Changes in v4: > - toolstack comments from Anthony PERARD > - added dom0less support > - added doc for "xen,scmi-secondary-agents" > > Grygorii Strashko (2): > xen/domctl: chain SCI handling before IOMMU in assign_device domctl > docs: arm: add SCI SCMI SMC multi-agent driver docs > > Oleksii Moisieiev (4): > xen: arm: smccc: add INVALID_PARAMETER error code > lib/arm: Add I/O memory copy helpers > xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver > tools/xl/libxl: wire up SCMI SMC multi-agent configuration > > MAINTAINERS | 1 + > SUPPORT.md | 11 + > .../arm/firmware/arm-scmi.rst | 422 +++++++++ > docs/man/xl.cfg.5.pod.in | 13 + > docs/misc/arm/device-tree/booting.txt | 197 +++++ > tools/include/libxl.h | 8 + > tools/libs/light/libxl_arm.c | 13 + > tools/libs/light/libxl_types.idl | 4 +- > tools/xl/xl_parse.c | 12 + > xen/arch/arm/Makefile | 1 + > xen/arch/arm/arch.mk | 1 + > xen/arch/arm/dom0less-build.c | 11 + > xen/arch/arm/domain_build.c | 39 + > xen/arch/arm/firmware/Kconfig | 12 + > xen/arch/arm/firmware/Makefile | 1 + > xen/arch/arm/firmware/sci.c | 36 + > xen/arch/arm/firmware/scmi-proto.h | 164 ++++ > xen/arch/arm/firmware/scmi-shmem.c | 118 +++ > xen/arch/arm/firmware/scmi-shmem.h | 45 + > xen/arch/arm/firmware/scmi-smc-multiagent.c | 830 ++++++++++++++++++ > xen/arch/arm/include/asm/firmware/sci.h | 8 + > xen/arch/arm/include/asm/smccc.h | 1 + > xen/arch/arm/lib/Makefile | 2 + > xen/arch/arm/lib/memcpy-fromio.c | 55 ++ > xen/arch/arm/lib/memcpy-toio.c | 55 ++ > xen/common/domctl.c | 15 + > xen/drivers/passthrough/device_tree.c | 6 + > xen/include/public/arch-arm.h | 3 + > xen/include/xen/io.h | 10 + > 29 files changed, 2093 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/arm/firmware/scmi-proto.h > create mode 100644 xen/arch/arm/firmware/scmi-shmem.c > create mode 100644 xen/arch/arm/firmware/scmi-shmem.h > create mode 100644 xen/arch/arm/firmware/scmi-smc-multiagent.c > create mode 100644 xen/arch/arm/lib/Makefile > create mode 100644 xen/arch/arm/lib/memcpy-fromio.c > create mode 100644 xen/arch/arm/lib/memcpy-toio.c > From xen-devel-bounces@lists.xenproject.org Tue May 19 17:02:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 17:02:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313277.1583485 (Exim 4.92) (envelope-from ) id 1wPNpj-0001xK-At; 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Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=BGLoXKjW+QoctzuaXS2h2JIaLtIBtboZDXZmE8fkcSE=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=Ju25qRR9kZyAI2/uYddduxUAYe/8/YpB4CzLNgpDXmk8WElV0izkAqn00Xz/9pDssfGy9A8YQ ZskNSPqP+0AvvJd58Th0q1PVDP1i02SNDb6wFiO2lDCV1tKiFw002O3aezFKznQOrGXl8lrcLU+ 92EtU4BXDQdqzikp9YZJvE2xoGtwK6kOeszMMOxtqdJDMI368xBZj2uc22wYI8CMvsRbHCu6ACQ GLiw/YF44304MkMHRt30YJmCSU7d1WFhol39wGGWdaaKRPPsqd+1DXHM6tWcf0QPFIvk5WyFyIS sN0hKfkpOF+25c8zi3c0FACSsekvercfT+NpRaNBI9QQ== X-Zone-Loop: c8b5e218c58bfc1ddf4bc601eb7a8c5f773bc5eced15 x-campaign-type: default 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boundary="------------rH8w30eBaf70kN5g283p00Ix"; protected-headers="v1" From: Teddy Astie To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk Message-ID: <02ba0a06-2df2-4f27-9d72-4cf77fbe9149@vates.tech> Subject: Re: [RFC v1 6/7] x86/svm: Use the emulator path for VMEXIT_HLT References: <20260518131404.3716969-1-ross.lagerwall@citrix.com> <20260518131404.3716969-7-ross.lagerwall@citrix.com> In-Reply-To: <20260518131404.3716969-7-ross.lagerwall@citrix.com> --------------rH8w30eBaf70kN5g283p00Ix Content-Type: multipart/mixed; boundary="------------bhFvJUHuc3jXUnzYdCXeC0gT" --------------bhFvJUHuc3jXUnzYdCXeC0gT Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 SGVsbG8sDQoNCkhlcmUgaXMgbXkgZmVlZGJhY2sgZnJvbSBhIFNFVi1FUyBpbXBsZW1lbnRh dGlvbiBwZXJzcGVjdGl2ZSwgYXMgaXQgaGFzIA0Kc3BlY2lmaWMgbmVlZHMgcmVsYXRlZCB0 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=?utf-8?B?blRDK1VNQ1VXY20raS84SlNXYVgxOG4zaE1YeHBiR3JUa3pYUitzdHVCaHNz?= =?utf-8?Q?fw5Xs9fBWCuvun/w=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: c6a8983d-4a39-4d7c-bd10-08deb5ca36d3 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 17:15:24.2233 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ekrycfovhJlfxwV4I12wbtpmnv6x2Uj6T2Rdi9eX9mDo5WM4TycPTZAQwuXeLsmFe+eRZ0ZUT/JgUS1kqzo82OAJw05LrsbeHdtQKFtliaw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA6PR03MB7998 X-purgate-ID: tlsNG-d25034/1779210928-D9F6ACF5-BB9CEF8C/0/0 X-purgate-type: clean X-purgate-size: 5046 On 19/05/2026 7:02 am, Jan Beulich wrote: > On 18.05.2026 19:35, Andrew Cooper wrote: >> On 18/05/2026 4:21 pm, Teddy Astie wrote: >>> --- a/xen/arch/x86/x86_64/mmconfig_64.c >>> +++ b/xen/arch/x86/x86_64/mmconfig_64.c >>> @@ -133,6 +46,25 @@ static void __iomem *mcfg_ioremap(const struct acpi_mcfg_allocation *cfg, >>> return (void __iomem *) virt; >>> } >>> >>> +char __iomem *pci_mmcfg_base(unsigned int seg, unsigned int *bus) >>> +{ >>> + struct acpi_mcfg_allocation *cfg; >>> + int cfg_num; >>> + >>> + for (cfg_num = 0; cfg_num < pci_mmcfg_config_num; cfg_num++) { >>> + cfg = pci_mmcfg_virt[cfg_num].cfg; >>> + if (cfg->pci_segment == seg && >>> + (cfg->start_bus_number <= *bus) && >>> + (cfg->end_bus_number >= *bus)) { >>> + *bus -= cfg->start_bus_number; >>> + return pci_mmcfg_virt[cfg_num].virt; >>> + } >>> + } >>> + >>> + /* Fall back to type 0 */ >>> + return NULL; >>> +} >> This is a horrid function.  Accessing and modifying bus like that causes >> poor code generation, and by now having this in a separate translation >> unit, the optimiser can't fold it into it's single caller and undo the >> poor decisions which went into writing this function. >> >> Instead, you want: >> >> void __iomem *pci_mmcfg_base(pci_sbdf_t sbdf) >> { >>     ... >> } >> >> base which takes care of the bus adjustment internally. > If the updated bus number need passing back to the caller, what do you > mean by this? With two values to pass back, and without resorting to > returning a larger struct by value, one pointer parameter is going to > be needed, isn't it? With an API like this, the bus number does not need passing back.  The caller just accesses pci_mmcfg_base(sbdf) + reg (after the NULL check of course). Also, I'm pretty sure that it will be cleaner to merge the two functions than to leave them split. > >>> diff --git a/xen/arch/x86/x86_64/pci.c b/xen/arch/x86/x86_64/pci.c >>> index 8d33429103..c37e3edade 100644 >>> --- a/xen/arch/x86/x86_64/pci.c >>> +++ b/xen/arch/x86/x86_64/pci.c >>> @@ -11,13 +11,123 @@ >>> #define PCI_CONF_ADDRESS(sbdf, reg) \ >>> (0x80000000U | ((sbdf).bdf << 8) | ((reg) & ~3)) >>> >>> +/* >>> + * AMD Fam10h CPUs are buggy, and cannot access MMIO config space >>> + * on their northbrige except through the * %eax register. As such, you MUST >>> + * NOT use normal IOMEM accesses, you need to only use the magic mmio-config >>> + * accessor functions. >>> + * In fact just use pci_config_*, nothing else please. >> I know you're just copying an existing comment, but it's mostly an >> opinion and not terribly helpful in place. >> >> "AMD Fam10h CPUs can only make MMCFG accesses via MOV %eax/%ax/%al", >> would be better, except... >> >> ... this claim cannot be true.  It's been made since the K8 RevF BKWG >> and exists even into the latest PPRs, but that's simply not how >> load/store ops work in the pipeline. > How do you know what special casing there exists (or has existed), or > what (e.g.) bogus(?) SMM intercepts there may be? I'm pretty sure the > Linux change was in response to things indeed not working otherwise. I did see you elsewhere on the PR which merged this, but not on this patch specifically. I have it on good authority that AMD CPUs can't trap MMIO into SMM.  (I'm not aware of Intel CPUs being able to trap MMIO like this either, whereas both Intel and AMD explicitly can trap IO ports into SMM.) Hence the aformentioned enquiries. >>> + return -EINVAL; >>> + } >>> + >>> + addr = pci_dev_base(sbdf.seg, sbdf.bus, sbdf.devfn); >>> + if (!addr) >>> + goto err; >>> + >>> + switch (len) { >>> + case 1: >>> + *value = mmio_config_readb(addr + reg); >>> + break; >>> + case 2: >>> + *value = mmio_config_readw(addr + reg); >>> + break; >>> + case 4: >>> + *value = mmio_config_readl(addr + reg); >>> + break; >>> + } >>> + >>> + return 0; >>> +} >> Again, for this patch or a later cleanup, drop the output-by-pointer and >> return value directly.  The optimiser is hopefully doing this already >> but it also makes the function simpler. >> >> At best, we want ASSERT_UNREACHBLE()'s in the error paths (including no >> mapping), and to consistently return -1.  Returning 0 for a bad length >> is bogus. > This looks to contradict the earlier paragraph: Do you want to return the > value, or do you want to return a success indicator? Despite returning -EINVAL, the single callers don't look at the return value, and only take the *value value, which is generally -1. For a bad length, 0 is returned (indistinguishable from success if anyone were to care) and *value is left uninitialised. So yes, -1 on the failsafe real error path is fine; after all it can occur for many other non-error reasons too in PCI Config Space accesses. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 17:41:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 17:41:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313307.1583504 (Exim 4.92) (envelope-from ) id 1wPORr-0008PI-Fr; Tue, 19 May 2026 17:41:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313307.1583504; Tue, 19 May 2026 17:41:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPORr-0008PA-D3; Tue, 19 May 2026 17:41:43 +0000 Received: by outflank-mailman (input) for mailman id 1313307; Tue, 19 May 2026 17:41:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPORq-0008P4-16 for xen-devel@lists.xenproject.org; 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Message-ID: <340d782a-4720-4e67-baba-7b320de55a72@citrix.com> Date: Tue, 19 May 2026 18:41:32 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Jason Andryuk Subject: Re: [PATCH 0/5] Small PCI refactoring To: Teddy Astie , xen-devel@lists.xenproject.org References: <1779124816.8631fc262581453bbf619ec5b2062170.19e3c1a4a3e000f373@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1779124816.8631fc262581453bbf619ec5b2062170.19e3c1a4a3e000f373@vates.tech> Content-Type: text/plain; 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One of the two external callers of pci_conf_read() should be converted to pci_conf_read32 right away, and the other probably could do with turning into an if/else chain too. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 19 18:00:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 18:00:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313319.1583513 (Exim 4.92) (envelope-from ) id 1wPOjw-0003L8-VQ; Tue, 19 May 2026 18:00:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313319.1583513; Tue, 19 May 2026 18:00:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPOjw-0003L1-Rl; Tue, 19 May 2026 18:00:24 +0000 Received: by outflank-mailman (input) for mailman id 1313319; Tue, 19 May 2026 18:00:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPOjv-0003Kv-Ep for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <38dc7297-5107-4b41-8a28-daf631118912@amd.com> Date: Tue, 19 May 2026 14:00:07 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] x86/irq: Return -EEXIST from map_domain_pirq() To: Jan Beulich CC: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , References: <20260519001559.28129-1-jason.andryuk@amd.com> <0686cb4d-3020-4c2e-9231-f1a28c714c0c@suse.com> Content-Language: en-US From: Jason Andryuk In-Reply-To: <0686cb4d-3020-4c2e-9231-f1a28c714c0c@suse.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MW1PEPF00016159:EE_|BN7PPFA8145BD40:EE_ X-MS-Office365-Filtering-Correlation-Id: db656b06-ba4e-4244-b748-08deb5d07962 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|376014|36860700016|1800799024|22082099003|11063799006|18002099003|56012099003|5023799004|4143699003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: ocXy+tDomfhHCNIoq+dtKcCpRG3Lvw6ehqwCfP7fRmzt+n0CkKcC1XVhms7kgsUXgHjCsTsMUkj+gBmB9X/V5ayC2m98j3uAoVqKktZOwqx5yjqhPdh3BwqBgBr5/B/bBpX7L8BYhi0pF+b6LZC9gXVlDoAVUlXNGJ/pW/XZH+mZwIiqBs4lfvnMQJ2NjtwVG/1hO5skN+QGlv9fUGfgUcmeFGPXwusZWeyO+y8QeTeOQMe1xVrvL16vLU0U2KWDhl5y7UsauZjzPudu40DPUN/TDONQNSKK9kM5e1ohmtijIyvDAQzhEkUkyM2hvfcci92Pn5Yu4hQbVVUnkkEcVCgVO+l01KnQbZEFU1ZO9wMabF8swmVqVsmZdljuZJ5a6lR60yC8N9ghrWoKlMS4wTKS5uEK9gYqym0ACEvfSoC/wdPrOvg+hGpxH4KfpQ7H X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 May 2026 18:00:12.6698 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: db656b06-ba4e-4244-b748-08deb5d07962 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: MW1PEPF00016159.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN7PPFA8145BD40 X-purgate-ID: tlsNG-ef75cf/1779213619-0AB70C48-B60F94B3/0/0 X-purgate-type: clean X-purgate-size: 2353 On 2026-05-19 03:21, Jan Beulich wrote: > On 19.05.2026 02:15, Jason Andryuk wrote: >> commit bfc341a65cfb ("x86: Make the hypercall PHYSDEVOP_alloc_irq_vector >> hypercall dummy.") modified map_domain_pirq() to return 0 when an irq or >> pirq is already mapped, when it previously returned -EINVAL. This >> occured when moving map_domain_pirq()'s call from >> PHYSDEVOP_alloc_irq_vector into PHYSDEVOP_apic_write. >> >> However, this means other callers cannot detect when a pirq or irq is >> already mapped. Since success is returned but the pirq is not >> connected, it will never fire. >> >> Modify map_domain_pirq() to return -EEXIST. -EINVAL is already returned >> elsewhere in map_domain_pirq(), so -EEXIST allows identifying this case. >> With that, squash -EEXIST in ioapic_guest_write() so the behavior does not >> change. > > What about the function's uses from allocate_and_map_[gm]si_pirq()? Don't they > then also need to cope with getting back -EEXIST to keep externally visible > behavior unaltered? Else those cases want discussing in the description, I > suppose. For my use, I want allocate_and_map_gsi_pirq() to return -EEXIST. I'll have to look at everything again and update the description. >> Signed-off-by: Jason Andryuk >> --- >> I'm not sure whether or not this warrants a Fixes. Nothing in tree >> today is broken, so I did not add one. > > In which case this then also isn't 4.22 material, I guess? Probably not. >> --- a/xen/arch/x86/io_apic.c >> +++ b/xen/arch/x86/io_apic.c >> @@ -2315,6 +2315,8 @@ int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val) >> ret = map_domain_pirq(hardware_domain, pirq, irq, >> MAP_PIRQ_TYPE_GSI, NULL); >> write_unlock(&hardware_domain->event_lock); >> + if ( ret == -EEXIST ) >> + ret = 0; >> if ( ret < 0 ) >> return ret; > > Slightly shorter > > if ( ret < 0 && ret != -EEXIST ) > return ret; > > ? Well, I intentionally set ret = 0, so -EEXIST wasn't seen later in the function. Though double checking now, there aren't any further uses of ret, so your suggestion is okay. I just felt better overriding ret instead of leaving it. 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For >>> non-control domains, including the hardware domain when it is not acting as a >>> control domain, the call is handled as a guest/domain suspend request and >>> parks the domain in SHUTDOWN_suspend. >>> >>> Control domains need additional sequencing because their SYSTEM_SUSPEND >>> request is used to coordinate host-wide suspend. A non-last awake control >>> domain may be parked in SHUTDOWN_suspend without requiring the host suspend >>> path to be available. The last awake control domain is treated as the point >>> where the request becomes a host-suspend request, and it may only proceed >>> when all non-control domains are already in SHUTDOWN_suspend and the host >>> suspend path is available. >>> >>> Keep the control-domain sequencing and domain-readiness checks out of >>> PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI >>> function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and >>> enforce the sequencing policy in the call handler. >>> >>> Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so >>> that SHUTDOWN_suspend from the hardware domain can be treated as a domain >>> suspend state rather than as a hardware-domain initiated host shutdown. This >>> does not by itself imply that host-wide suspend is available. >>> >>> Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND >>> capability with runtime blockers reported by Xen-owned subsystems. Add >>> runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths >>> lacking suspend/resume support. These blockers are runtime based, so they >>> only apply to drivers or paths that Xen actually uses on the platform. For >>> SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, >>> since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. >>> >>> Signed-off-by: Mykola Kvach >> >> Apart from Jan's and Luca's findings, patch looks good to me. Just a few >> questions to clarify, apologies if these have already been discussed >> elsewhere. >> >>> --- >>> xen/arch/arm/Kconfig | 1 + >>> xen/arch/arm/gic.c | 6 ++ >>> xen/arch/arm/include/asm/psci.h | 3 + >>> xen/arch/arm/include/asm/suspend.h | 10 ++- >>> xen/arch/arm/psci.c | 7 ++ >>> xen/arch/arm/suspend.c | 40 +++++++++ >>> xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- >>> xen/common/Kconfig | 3 + >>> xen/common/domain.c | 7 +- >>> xen/drivers/char/serial.c | 12 +++ >>> xen/drivers/passthrough/arm/iommu.c | 4 + >>> xen/drivers/passthrough/arm/smmu-v3.c | 4 + >>> xen/include/xen/serial.h | 1 + >>> xen/include/xen/suspend.h | 2 + >>> 14 files changed, 201 insertions(+), 13 deletions(-) >>> >>> diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig >>> index 79622b46a1..54a5bfb9ae 100644 >>> --- a/xen/arch/arm/Kconfig >>> +++ b/xen/arch/arm/Kconfig >>> @@ -19,6 +19,7 @@ config ARM >>> select HAS_ALTERNATIVE if HAS_VMAP >>> select HAS_DEVICE_TREE_DISCOVERY >>> select HAS_DOM0LESS >>> + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU >>> select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE >>> select HAS_STACK_PROTECTOR >>> select HAS_UBSAN >>> diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c >>> index 7727ffed5a..a5efcaeb4c 100644 >>> --- a/xen/arch/arm/gic.c >>> +++ b/xen/arch/arm/gic.c >>> @@ -26,6 +26,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> #include >>> #include >>> >>> @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) >>> void register_gic_ops(const struct gic_hw_operations *ops) >>> { >>> gic_hw_ops = ops; >>> + >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + if ( !ops->suspend || !ops->resume ) >>> + host_system_suspend_disable("GIC driver lacks suspend/resume support"); >>> +#endif >>> } >>> >>> static void clear_cpu_lr_mask(void) >>> diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h >>> index bb3c73496e..142fa1bfe5 100644 >>> --- a/xen/arch/arm/include/asm/psci.h >>> +++ b/xen/arch/arm/include/asm/psci.h >>> @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); >>> void call_psci_system_off(void); >>> void call_psci_system_reset(void); >>> int call_psci_system_suspend(void); >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> +bool psci_system_suspend_allowed(void); >>> +#endif >>> >>> /* Range of allocated PSCI function numbers */ >>> #define PSCI_FNUM_MIN_VALUE _AC(0,U) >>> diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h >>> index 2d9fc331fc..87db12eac3 100644 >>> --- a/xen/arch/arm/include/asm/suspend.h >>> +++ b/xen/arch/arm/include/asm/suspend.h >>> @@ -38,7 +38,15 @@ extern struct resume_cpu_context resume_cpu_context; >>> >>> int prepare_resume_ctx(void); >>> void hyp_resume(void); >>> -#endif /* CONFIG_SYSTEM_SUSPEND */ >>> +bool host_system_suspend_allowed(void); >>> +void host_system_suspend_disable(const char *reason); >>> + >>> +#else /* !CONFIG_SYSTEM_SUSPEND */ >>> + >>> +static inline bool host_system_suspend_allowed(void) { return false; } >>> +static inline void host_system_suspend_disable(const char *reason) {} >>> + >>> +#endif >>> >>> #endif /* ARM_SUSPEND_H */ >>> >>> diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c >>> index e05dae1133..e9d78668fd 100644 >>> --- a/xen/arch/arm/psci.c >>> +++ b/xen/arch/arm/psci.c >>> @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; >>> >>> #define PSCI_RET(res) ((int32_t)(res).a0) >>> >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> +bool psci_system_suspend_allowed(void) >>> +{ >>> + return has_psci_system_suspend; >>> +} >>> +#endif >>> + >>> int call_psci_cpu_on(int cpu) >>> { >>> struct arm_smccc_res res; >>> diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c >>> index 6ea4a0f9cc..a571035d2c 100644 >>> --- a/xen/arch/arm/suspend.c >>> +++ b/xen/arch/arm/suspend.c >>> @@ -1,9 +1,49 @@ >>> /* SPDX-License-Identifier: GPL-2.0-only */ >>> >>> +#include >>> #include >>> >>> +#include >>> +#include >>> + >>> struct resume_cpu_context resume_cpu_context; >>> >>> +/* >>> + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI >>> + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid >>> + * suspend/resume path. >>> + * >>> + * This gate is checked only when the last awake control domain attempts to >>> + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. >>> + */ >>> +static bool host_system_suspend_runtime_allowed = true; >>> + >>> +static bool host_serial_suspend_allowed(void) >>> +{ >>> + if ( serial_suspend_supported() ) >>> + return true; >>> + >>> + printk_once(XENLOG_INFO >>> + "Host SYSTEM_SUSPEND blocked: serial driver lacks suspend/resume support\n"); >>> + >>> + return false; >>> +} >>> + >>> +bool host_system_suspend_allowed(void) >>> +{ >>> + return psci_system_suspend_allowed() && >>> + host_serial_suspend_allowed() && >>> + host_system_suspend_runtime_allowed; >>> +} >>> + >>> +void host_system_suspend_disable(const char *reason) >>> +{ >>> + host_system_suspend_runtime_allowed = false; >>> + >>> + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", >>> + reason ? reason : "unsupported suspend/resume path"); >>> +} >>> + >>> /* >>> * Local variables: >>> * mode: C >>> diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c >>> index ac6af6118f..48a963ae3e 100644 >>> --- a/xen/arch/arm/vpsci.c >>> +++ b/xen/arch/arm/vpsci.c >>> @@ -5,6 +5,7 @@ >>> >>> #include >>> #include >>> +#include >>> #include >>> #include >>> #include >>> @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) >>> domain_shutdown(d,SHUTDOWN_reboot); >>> } >>> >>> +/* >>> + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, >>> + * so multiple control domains cannot all observe each other as still awake. >>> + */ >>> +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); >>> + >>> +static bool domain_in_suspend_state(struct domain *d) >>> +{ >>> + bool suspended; >>> + >>> + spin_lock(&d->shutdown_lock); >>> + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; >>> + spin_unlock(&d->shutdown_lock); >>> + >>> + return suspended; >>> +} >>> + >>> +static int32_t domain_psci_system_suspend_policy(struct domain *d) >>> +{ >>> + struct domain *other; >>> + bool last_awake_control_domain = true; >>> + bool awake_non_control_domain = false; >>> + >>> + /* Only control domains participate in sequencing policy. */ >>> + if ( !is_control_domain(d) ) >>> + return 0; >>> + >>> + rcu_read_lock(&domlist_read_lock); >>> + >>> + for_each_domain ( other ) >>> + { >>> + bool suspended; >>> + >>> + if ( other == d ) >>> + continue; >>> + >>> + suspended = domain_in_suspend_state(other); >>> + if ( suspended ) >>> + continue; >>> + >>> + if ( is_control_domain(other) ) >>> + { >>> + last_awake_control_domain = false; >>> + break; >>> + } >>> + >>> + awake_non_control_domain = true; >>> + } >>> + >>> + rcu_read_unlock(&domlist_read_lock); >>> + >>> + /* >>> + * Another control domain is still awake. This request is only the first >>> + * phase of the sequencing: park this control domain and leave the host >>> + * running. Host-wide suspend gates must not block this intermediate state. >>> + */ >>> + if ( !last_awake_control_domain ) >>> + return 0; >>> + >>> + /* >>> + * This is the last awake control domain. It must not be parked unless the >>> + * request can proceed as a host-suspend request; otherwise Xen would lose >>> + * the last domain that can coordinate the system suspend. >>> + */ >>> + if ( awake_non_control_domain ) >>> + { >>> + printk(XENLOG_DEBUG >>> + "SYSTEM_SUSPEND denied: last awake control domain dom%u requested host suspend while non-control domains are still awake\n", >>> + d->domain_id); >>> + return PSCI_DENIED; >>> + } >>> + >>> + /* >>> + * Host-wide gates are relevant only for the last-control-domain case. They >>> + * must not block parking of a non-last control domain, but they must reject >>> + * the last control domain when host suspend is not available. >>> + */ >>> + if ( !host_system_suspend_allowed() ) >>> + return PSCI_NOT_SUPPORTED; >> >> In do_psci_1_0_features(), the guest is told that SYSTEM_SUSPEND is >> implemented: >> >> case PSCI_1_0_FN64_SYSTEM_SUSPEND: >> return 0; /* "This function IS implemented" */ >> >> However, when the guest actually calls SYSTEM_SUSPEND, the policy check >> above can reject it by return PSCI_NOT_SUPPORTED; /* "This function is >> NOT implemented" */ >> >> These two responses are contradictory. The guest probes via >> PSCI_FEATURES, is told suspend is available, and then gets >> PSCI_NOT_SUPPORTED when it attempts to use it (if let's say the SMMUv3 >> driver has blocked suspend). >> >> From Arm Power State Coordination Interface (DEN0022F.b): >> >> 5.3.2 Implementation responsibilities >> ... Any function that is not implemented must return NOT_SUPPORTED in >> accordance with the SMC Calling Conventions [4]. In addition, >> PSCI_FEATURES must also return NOT_SUPPORTED for any non-implemented >> function... >> >> My questing is should do_psci_1_0_features() consult the same policy so >> that the feature is only advertised when it can actually be used? >> >> Or am I missing something here? > > For the PSCI_FEATURES part, I agree there is a problem with returning > PSCI_NOT_SUPPORTED after advertising SYSTEM_SUSPEND as implemented. > > I would still prefer not to make PSCI_FEATURES depend on the full > domain_psci_system_suspend_policy(), because that policy depends on > runtime state: whether this is the last awake control domain and whether > other non-control domains are still awake. Reporting the feature as > available or unavailable based on that state would make PSCI_FEATURES > unstable between attempts. > > However, once vPSCI advertises SYSTEM_SUSPEND as implemented, the call > handler should not return PSCI_NOT_SUPPORTED for an attempt-time policy > failure. I think PSCI_DENIED is a better fit for the last-control-domain > case when the request cannot proceed as host suspend because Xen currently > cannot support the host-wide suspend path. I will rework that part. Thank you for the explanation, I agree. Returning PSCI_DENIED instead of NOT_SUPPORTED at call time is clearer than the current state and eliminates the contradiction with PSCI_FEATURES. > >> >>> + >>> + return 0; >>> +} >>> + >>> static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) >>> { >>> int32_t rc; >>> @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) >>> if ( is_64bit_domain(d) && is_thumb ) >>> return PSCI_INVALID_ADDRESS; >>> >>> - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ >>> - if ( is_hardware_domain(d) ) >>> - return PSCI_NOT_SUPPORTED; >>> - >>> /* Ensure that all CPUs other than the calling one are offline */ >>> domain_lock(d); >>> for_each_vcpu ( d, v ) >>> @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) >>> if ( rc ) >>> return PSCI_DENIED; >>> >>> - rc = domain_shutdown(d, SHUTDOWN_suspend); >>> + spin_lock(&vpsci_system_suspend_lock); >>> + >>> + rc = domain_psci_system_suspend_policy(d); >>> + if ( !rc ) >>> + { >>> + rc = domain_shutdown(d, SHUTDOWN_suspend); >>> + if ( rc ) >>> + rc = PSCI_DENIED; >>> + else >>> + { >>> + rctx->ctxt = ctxt; >>> + rctx->wake_cpu = current; >>> + } >>> + } >>> + >>> + spin_unlock(&vpsci_system_suspend_lock); >>> + >>> if ( rc ) >>> { >>> free_vcpu_guest_context(ctxt); >>> - return PSCI_DENIED; >>> + return rc; >>> } >>> >>> - rctx->ctxt = ctxt; >>> - rctx->wake_cpu = current; >>> - >>> gprintk(XENLOG_DEBUG, >>> "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", >>> epoint, cid); >>> @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) >>> case PSCI_0_2_FN32_SYSTEM_RESET: >>> case PSCI_1_0_FN32_PSCI_FEATURES: >>> case ARM_SMCCC_VERSION_FID: >>> - return 0; >>> case PSCI_1_0_FN32_SYSTEM_SUSPEND: >>> case PSCI_1_0_FN64_SYSTEM_SUSPEND: >>> - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; >>> + return 0; >>> default: >>> return PSCI_NOT_SUPPORTED; >>> } >>> diff --git a/xen/common/Kconfig b/xen/common/Kconfig >>> index 5ff71480ee..816a1a4ecb 100644 >>> --- a/xen/common/Kconfig >>> +++ b/xen/common/Kconfig >>> @@ -140,6 +140,9 @@ config HAS_EX_TABLE >>> config HAS_FAST_MULTIPLY >>> bool >>> >>> +config HAS_HWDOM_SYSTEM_SUSPEND >>> + bool >>> + >>> config HAS_IOPORTS >>> bool >>> >>> diff --git a/xen/common/domain.c b/xen/common/domain.c >>> index bb9e210c28..d3edfb2a13 100644 >>> --- a/xen/common/domain.c >>> +++ b/xen/common/domain.c >>> @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) >>> domain_shutdown(d, SHUTDOWN_crash); >>> } >>> >>> +static inline bool want_hwdom_shutdown(uint8_t reason) >>> +{ >>> + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || >>> + reason != SHUTDOWN_suspend; >>> +} >>> >>> int domain_shutdown(struct domain *d, u8 reason) >>> { >>> @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) >>> d->shutdown_code = reason; >>> reason = d->shutdown_code; >>> >>> - if ( is_hardware_domain(d) ) >>> + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) >>> hwdom_shutdown(reason); >>> >>> if ( d->is_shutting_down ) >>> diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c >>> index adb312d796..cc2b5b5dee 100644 >>> --- a/xen/drivers/char/serial.c >>> +++ b/xen/drivers/char/serial.c >>> @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) >>> >>> #ifdef CONFIG_SYSTEM_SUSPEND >>> >>> +static bool __read_mostly serial_suspend_available = true; >>> + >>> void serial_suspend(void) >>> { >>> int i; >>> @@ -513,6 +515,11 @@ void serial_resume(void) >>> com[i].driver->resume(&com[i]); >>> } >>> >>> +bool serial_suspend_supported(void) >>> +{ >>> + return serial_suspend_available; >>> +} >>> + >>> #endif /* CONFIG_SYSTEM_SUSPEND */ >>> >>> void __init serial_register_uart(int idx, struct uart_driver *driver, >>> @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, >>> /* Store UART-specific info. */ >>> com[idx].driver = driver; >>> com[idx].uart = uart; >>> + >>> +#ifdef CONFIG_SYSTEM_SUSPEND >>> + if ( !driver->suspend || !driver->resume ) >>> + serial_suspend_available = false; >> >> >> I wonder why different suspend-blocker API are used for serial vs other >> subsystems (GIC, IOMMU). Why serial_register_uart() could not simply >> call host_system_suspend_disable() like every other subsystem? >> >> This would avoid adding three unnecessary symbols >> (serial_suspend_available, serial_suspend_supported(), >> host_serial_suspend_allowed()). >> >> Or am I missing something here? > > For the serial case, the split was intentional. The other callers are in > Arm-specific code, while serial.c is common code. I wanted to avoid making > the common serial layer call an Arm host-suspend policy helper directly, > or requiring arch-specific stub(s) only for this case. > > So the current shape keeps serial.c exposing only whether the registered > UART drivers have suspend/resume callbacks, while the Arm host suspend > policy decides whether that blocks host SYSTEM_SUSPEND. > > That said, if the preferred direction is to make host_system_suspend_disable() > a generic suspend helper with no-op stub(s) for architectures that do not use > it, I can rework serial_register_uart() to call it directly and drop the > extra serial_suspend_supported() path. Thank you for the explanation, now it is clear why the approaches diverge. The concern about keeping serial.c free of arch-specific calls makes sense. That said, a single no-op stub for non-Arm arches might be simpler than maintaining three extra symbols and a separate pattern. But, I will leave it to you and the maintainers to decide which approach is preferred. > > Best regards, > Mykola From xen-devel-bounces@lists.xenproject.org Tue May 19 20:32:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 20:32:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313405.1583532 (Exim 4.92) (envelope-from ) id 1wPR72-0007i2-O6; Tue, 19 May 2026 20:32:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313405.1583532; Tue, 19 May 2026 20:32:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPR72-0007hv-Iw; Tue, 19 May 2026 20:32:24 +0000 Received: by outflank-mailman (input) for mailman id 1313405; Tue, 19 May 2026 20:32:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPR71-0007hp-8b for xen-devel@lists.xenproject.org; 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It used to do this by writing 0 to GICD_CTLR. >=20 > On a system where firmware has already enabled Non-secure affinity > routing, a zero write clears the Non-secure view's GICD_CTLR.ARE_NS bit. > Arm IHI 0069H.b, section 2.3.3 ("Changing affinity routing enables"), > states that changing GICD_CTLR.ARE_NS from 1 to 0 is UNPREDICTABLE. The > GICD_CTLR register description in section 12.9.4 carries the same rule > for the ARE_NS field. >=20 > Preserve ARE_NS while clearing the group enable bits. If firmware left > ARE_NS clear, the value written is still 0, preserving the existing > initialization flow. >=20 > Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") > Signed-off-by: Mykola Kvach > --- Looks ok to me and aligned to the specifications, bit 4 is preserved on bot= h Armv8-A (ARE_NS) and Armv8-R (ARE). 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Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-5-dwmw2@infradead.org> <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> <935312be-9a86-49fd-8bb4-2c998a68e2df@oracle.com> Content-Language: en-US From: Dongli Zhang In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: BYAPR11CA0107.namprd11.prod.outlook.com (2603:10b6:a03:f4::48) To BN0PR10MB5109.namprd10.prod.outlook.com (2603:10b6:408:124::23) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN0PR10MB5109:EE_|DS0PR10MB8055:EE_ X-MS-Office365-Filtering-Correlation-Id: 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a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22 a=7Gl3-_t3PgB9XO-mQDs3:22 a=VwQbUJbxAAAA:8 a=JfrnYn6hAAAA:8 a=WQdL3in-H15QQPj3npUA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=1CNFftbPRP8L7MoqJWF3:22 a=5yU3S35YU4bGjq-dph-N:22 a=Bho9c0fBagfJEIQBS7DQ:22 cc=ntf awl=host:12299 X-Proofpoint-GUID: xqRm56LB7JR1qKQpcvfXEuPz_bYa1o5h X-Proofpoint-ORIG-GUID: xqRm56LB7JR1qKQpcvfXEuPz_bYa1o5h X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDIxNCBTYWx0ZWRfX4kvqtleNLvz5 yloq7SS3LI9jjyohXeMf+72VfBooCt7XjHhZSh5XNdZashdIyh0IJNqBJEIO6IPg0F8D4t9v5R2 KcFVAH5jTcxiPFVg9mYNrEl/go0l9NnjZDHo//zXZPXu34ZbFEXIvP9M9StwpwmcXQVwIgK9voR krkLVxhhv/ay1pJbu+BnmY21kWStqi4LwAw7JUoA9ODW2/TatTit1hvRQ5Tbu9sSnpm7aDw14KT PWyAVoAuTPWzLA1m0WwyUzHn/fgnlKVvq89f9HCszOdxdE/m5svDQOZES0I3V9WI/YWP2Wzeb2m WMiDO8Vg7uN9uqplMNFX030/QZurLzftCwvPR4CNlIx0Rq4VjyUfdRx4wJUbnXSvIVco8yfezdp B3ZAEhnWfCokp9dMIdUP+u3zIgjwuD+4mXdMsuxhRJdWEvJUJqCtOZZtwkPSKGksd8tRx/d+/4W fict9eFY91EEdoCq/ABzJcXtlyvwwi/Ubgn1fnM8= X-purgate-ID: tlsNG-d25034/1779225904-E3B7CCF5-80412A9E/0/0 X-purgate-type: clean X-purgate-size: 9204 On 2026-05-19 12:50 AM, David Woodhouse wrote: > On Mon, 2026-05-18 at 17:57 -0700, Dongli Zhang wrote: >> On 2026-05-18 1:48 AM, David Woodhouse wrote: >>> ... >> >> I have fixed the Thunderbird configuration. Does it look better to you? > > The date is certainly better, thank you. But although I *was* up late > that night frowning at clocks, I didn't think I was up *quite* as late > (almost 2am) as it suggests. > > But I suspect that getting *that* right is beyond the limit of > Thunderbird's configurability. > > Thanks :) Let me continue exploring how to add a timezone, such as "17:57 -0700". > >> I really appreciate guidelines like the ones below. >> >> https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org >> >> Assuming I am a user of the new API, I feel confused about whether the goal is >> to replace KVM_SET_CLOCK with KVM_SET_CLOCK_GUEST, or whether the latter is >> meant to supplement the former. > > The issue is that KVM_SET_CLOCK_GUEST can only be used in 'masterclock' > mode, when the TSC is reliable and the guest TSCs are all in sync. > > Which ought to be *all* of the time, on modern hardware and sane > configurations. And in this series, I don't even let the *guest* screw > that over by setting different TSC offsets on different vCPUs any more > (we stay in masterclock mode in that case now). But the VMM can cause > its guest to come out of masterclock mode, by setting different TSC > *speeds* on different vCPUs. > > So there remain some pathological cases where the kvmclock actually > still has a justification to exist, and those are the cases where it > needs to be set in its own right as a function of host time > (KVM_SET_CLOCK), not purely as a function of the guest TSC > (KVM_SET_CLOCK_GUEST). I think I now understand why I feel like I am always asking weird questions. I have been thinking about how to account for downtime, so I see KVM_SET_CLOCK_GUEST as a supplement to KVM_SET_CLOCK. Suppose we are not going to account for any downtime. With KVM_SET_CLOCK_GUEST: 1. The masterclock is active, so gTSC is synchronized across vCPUs. All vCPUs share the same kvm_read_l1_tsc(v, ka->master_cycle_now). 2. Migrate the gTSC to the target VM however people want (either ablolute value or offset value). (Optional) Account for downtime in gTSC however people want, even with KVM_SET_CLOCK/KVM_CLOCK_REALTIME, which you may not like. 3. Adjust kvm-clock (that is, ka->kvmclock_offset) with KVM_SET_CLOCK_GUEST. That is why you think KVM_SET_CLOCK is no longer required if we have KVM_SET_CLOCK_GUEST. While I think KVM_SET_CLOCK is required because of KVM_CLOCK_REALTIME. It it isn't required to account any downtime for gTSC or if there is another way to do so, only KVM_SET_CLOCK_GUEST is enough. > > >> >> If we are going to use KVM_SET_CLOCK_GUEST when KVM_SET_CLOCK is not needed, I >> would appreciate it if the API could carry more data in addition to struct >> pvclock_vcpu_time_info. >> >> +#define KVM_SET_CLOCK_GUEST    _IOW(KVMIO, 0xd6, struct pvclock_vcpu_time_info) >> +#define KVM_GET_CLOCK_GUEST    _IOR(KVMIO, 0xd7, struct pvclock_vcpu_time_info) >> >> [snip] >> >> Another scenario is when only MASTERCLOCK_UPDATE is pending and there is no >> pending CLOCK_UPDATE. >> >> In this scenario, is it fine to skip processing MASTERCLOCK_UPDATE before saving >> pvclock_vcpu_time_info? >> > > I'm not sure I understand that scenario. > > MASTERCLOCK_UPDATE means we have to actually recalculate the master > clock (which really *should* be rare, now!). And then any time we do > that, we also have to do a CLOCK_UPDATE on every vCPU to disseminate > the new information. Which is why kvm_end_pvclock_update() does exactly > that. > > So your "MASTERCLOCK_UPDATE is pending and there is no pending > CLOCK_UPDATE" doesn't make much sense to me. If MASTERCLOCK_UPDATE is > pending, then there *will* be a CLOCK_UPDATE pending. Suppose the VM is stopped and the master clock is active. Suddenly, we change the host clocksource from TSC to HPET. pvclock_gtod_notify() may call pvclock_gtod_update_fn() to set a pending KVM_REQ_MASTERCLOCK_UPDATE for all vCPUs. Unless the pending KVM_REQ_MASTERCLOCK_UPDATE is processed by kvm_update_masterclock(), kvm_end_pvclock_update() will not set a pending KVM_REQ_CLOCK_UPDATE. Therefore, this is a scenario in which only KVM_REQ_MASTERCLOCK_UPDATE is pending. I do not think this scenario is important. I am just curious about the expected way to implement similar code in the future :) > > >>>> >>>> Would it be helpful to validate that the delta is within a reasonable range, >>>> e.g. that the drift can never be more than five minutes (forward or backward)? >>> >>> If a guest has been running for months on a previous host and is >>> migrated to a new host, don't we expect that the KVM clock of the new >>> VM on the new host is tweaked from its default near-zero after >>> creation, to some large amount? >>> >> >> Regarding live migration, my own investigation does not show a proportional >> relationship between VM uptime and the amount of drift. > > You're comparing the VM on the source host, with the VM on the > destination post-migration. Apologies for making it confusing. I was just trying to explain why I think the kvm-clock drift will not be large. We previously discussed the vCPU hotplug and kvm-clock drift issue. The longer the time interval between two vCPU hotplug events, the larger the drift. For live migration (with QEMU), I provided the equation to show that the drift will not be large, because it is determined by something else rather than by how long the VM has been running on the source server. For the previous vCPU hotplug and kvm-clock bug, if we add more vCPUs to a guest that has been running for three months, the drift will be relatively larger. For QEMU live migration, migrating a guest VM that has been running on the source host for *three months* versus one that has been running for *one day* will not cause much difference in kvm-clock drift. > > Perhaps I misunderstood, but I thought your suggested validation of a > 'reasonable range' would also apply when adjusting the kvmclock of the > nascent VM on the destination host, from "newly created" to "has been > running for months" while migrating the state of the actual guest onto > a clean new slate. > >> Just taking QEMU + KVM as an example: suppose TSC scaling is inactive, the >> amount of drift does not depend on how long the VM has been running before live >> migration. >> >> Instead, it depends on the delta between when we call MSR_IA32_TSC and >> KVM_GET_CLOCK, and between MSR_IA32_TSC and KVM_SET_CLOCK. >> >> The guest TSC stops at P1 and resumes at P3. >> The kvmclock stops at P2 and resumes at P4. >> >> We expect P1 == P2 and P3 == P4. >> >> On source host. >> >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=0 ===> P1 > > Here's where it all starts going wrong. Line 1. > > Any API which lets you get a single time value in isolation, and thus > which is already out of date by the time the system call even returns, > is fundamentally unsuitable for migration. > >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=1 >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=2 >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=3 >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=4 >> ... ... >> - kvm_get_msr_common(MSR_IA32_TSC) for vCPU=N >> - KVM_GET_CLOCK                               ===> P2 >> >> On target host. >> >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=1 ===> P3 >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=2 > > At this point, the nasty hack in the kernel steps in, realises that the > value you're setting on vCPU 2 is within a second or so of the value > you had previously set on vCPU 1, and snaps it back to be precisely the > same. To work around the fundamental brokenness of this method. > >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=3 >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=4 >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=5 >> ... ... >> - kvm_set_msr_common(MSR_IA32_TSC) for vCPU=N >> - KVM_SET_CLOCK                               ====> P4 >> >> >> Here is my equiation to predict the drift. > > I'm sure you're right, but I didn't get that far when looking at this. > I'd already thrown up in my mouth a little bit by line one. > > Here's my equation to predict the drift of a live update done correctly > on the same host using the method I've now put in the documentation: > > 0. For the ideal live update case (on the same host), there may be no need to adjust gTSC so that it keeps incrementing. In that case, KVM_SET_CLOCK_GUEST can be used to adjust kvm-clock based on gTSC. For the live migration scenario, the current QEMU implementation not only fails to account for downtime, but also has a drift issue. That is what I would like to address in QEMU. Thank you very much! Dongli Zhang From xen-devel-bounces@lists.xenproject.org Tue May 19 22:44:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 19 May 2026 22:44:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313438.1583567 (Exim 4.92) (envelope-from ) id 1wPTAB-0000mx-BL; Tue, 19 May 2026 22:43:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313438.1583567; Tue, 19 May 2026 22:43:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPTAB-0000mq-76; Tue, 19 May 2026 22:43:47 +0000 Received: by outflank-mailman (input) for mailman id 1313438; Tue, 19 May 2026 22:43:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPTA7-0000mk-Ie for xen-devel@lists.xenproject.org; Tue, 19 May 2026 22:43:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPTA5-00DdEQ-J3; Wed, 20 May 2026 00:43:42 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ce794-bab6-0a2a0a5309dd-0a2a450a8fda-12 for ; Wed, 20 May 2026 00:43:41 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ce79c-56b3-0a2a450a0019-5a9b3222885c-3 for ; Wed, 20 May 2026 00:43:40 +0200 Received: from 54-240-197-233.amazon.com ([54.240.197.233] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPT9u-00000006Ogz-2yWk; Tue, 19 May 2026 22:43:31 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=+WCIzdWes3UVgHCi8CWN6cps7bIrLmIXX90dePdofcg=; b=XZTxoahJXwWUNgdkc2NGwg+w0C 9grBLzjCxRxZt/Dw4831UwgeQh7kB3FwYkzBODyrZZp7PEziYcE75tP5JxV+4EBoEAHSXKW0Xt71O 1XdfN+I84K4HE7TOw6J9hgOsTuSlKHvJ99s4Z+JRpgVUp+lkdBYcFvKFSCboAzbeWS5iRLML9Q5rA sGb4WmwPjp/AGqYvnDSXWbIGoVL0HfAkTeMAR8b17QeFvtAUHEhd4rOL2Cjo3r2+R9VbqG0v6QEJC ijG6gU2ZgHHadxvqka+o/fMHrNc668yBdBd/uv1R02ESlxiNhvIT7BuTW6sPpFE0HexGKeLmNw8T1 EqsW6aaQ==; Message-ID: <32ca0a8da4bfb1e92013a7f75e0ff7541ebcd6a6.camel@infradead.org> Subject: Re: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration From: David Woodhouse To: Dongli Zhang , kvm@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Sean Christopherson , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Tue, 19 May 2026 23:43:29 +0100 In-Reply-To: References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-5-dwmw2@infradead.org> <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> <935312be-9a86-49fd-8bb4-2c998a68e2df@oracle.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-r8BxiHhSG54aOSyFfagN" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1779230621-72F718B7-D52F7678/0/0 X-purgate-type: clean X-purgate-size: 14660 --=-r8BxiHhSG54aOSyFfagN Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2026-05-19 at 14:23 -0700, Dongli Zhang wrote: > I think I now understand why I feel like I am always asking weird questio= ns. I > have been thinking about how to account for downtime, so I see > KVM_SET_CLOCK_GUEST as a supplement to KVM_SET_CLOCK. I do not believe in "downtime". There is no such thing. There is only "steal time". A CPU may be off in the weeds =E2=80=94 a vCPU suffering steal time, or eve= n a pCPU in SMM which is effectively the same thing =E2=80=94 but time doesn't stop, and neither does the TSC. > Suppose we are not going to account for any downtime. With KVM_SET_CLOCK_= GUEST: >=20 > 1. The masterclock is active, so gTSC is synchronized across vCPUs. All v= CPUs > share the same kvm_read_l1_tsc(v, ka->master_cycle_now). Strictly, by the time we get to the end of my series, masterclock is active *because* all the vCPUs are running at the same TSC rate (even if the guest set them to different offsets). But OK. > 2. Migrate the gTSC to the target VM however people want (either ablolute= value > or offset value). (Optional) Account for downtime in gTSC however people = want, > even with KVM_SET_CLOCK/KVM_CLOCK_REALTIME, which you may not like. > > 3. Adjust kvm-clock (that is, ka->kvmclock_offset) with KVM_SET_CLOCK_GUE= ST. >=20 > That is why you think KVM_SET_CLOCK is no longer required if we have > KVM_SET_CLOCK_GUEST. While I think KVM_SET_CLOCK is required because of > KVM_CLOCK_REALTIME. If I recall correctly what we described in https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org/ I don't think we actually needed KVM_SET_CLOCK at all, did we? We *abuse* KVM_GET_CLOCK to give us a tuple of {realtime, host TSC} because there's actually no other way for *userspace* to get that. We don't actually *care* about the KVM clock part. We use the {realtime, host TSC} pair to reconstitute the guest TSC values to correctly reflect the passing of time while the guest was in the ether. > It it isn't required to account any downtime for gTSC or if there is anot= her way > to do so, only KVM_SET_CLOCK_GUEST is enough. Right. If you only want the guest to come back with the *same* values in its TSC as before the migration, as if the TSC was *paused* during the migration, then you can just restore those values and use KVM_SET_CLOCK_GUEST. Assuming you are on modern hardware and have set all vCPUs to the same rate (and are using this series so the *guest* can't break masterclock for you, and you can trust the KVM_SET_CLOCK_GUEST will work). > >=20 > > > Another scenario is when only MASTERCLOCK_UPDATE is pending and there= is no > > > pending CLOCK_UPDATE. > > >=20 > > > In this scenario, is it fine to skip processing MASTERCLOCK_UPDATE be= fore saving > > > pvclock_vcpu_time_info? > > >=20 > >=20 > > I'm not sure I understand that scenario.=20 > >=20 > > MASTERCLOCK_UPDATE means we have to actually recalculate the master > > clock (which really *should* be rare, now!). And then any time we do > > that, we also have to do a CLOCK_UPDATE on every vCPU to disseminate > > the new information. Which is why kvm_end_pvclock_update() does exactly > > that. > >=20 > > So your "MASTERCLOCK_UPDATE is pending and there is no pending > > CLOCK_UPDATE" doesn't make much sense to me. If MASTERCLOCK_UPDATE is > > pending, then there *will* be a CLOCK_UPDATE pending. >=20 > Suppose the VM is stopped and the master clock is active. I don't know what it means for a VM to be 'stopped'. Do you mean that all vCPUs happen to be experiencing steal time at the present moment? > Suddenly, we change the host clocksource from TSC to HPET. pvclock_gtod_n= otify() > may call pvclock_gtod_update_fn() to set a pending KVM_REQ_MASTERCLOCK_UP= DATE > for all vCPUs. Unless the pending KVM_REQ_MASTERCLOCK_UPDATE is processed= by > kvm_update_masterclock(), kvm_end_pvclock_update() will not set a pending > KVM_REQ_CLOCK_UPDATE. You say 'Unless'... do you mean 'Until'? > Therefore, this is a scenario in which only KVM_REQ_MASTERCLOCK_UPDATE is= pending. >=20 > I do not think this scenario is important. I am just curious about the ex= pected > way to implement similar code in the future :) I think that's working correctly. Until the master clock has *actually* been updated, there's no point in setting CLOCK_UPDATE for each vCPU to disseminate the new information to its own pvclock? > >=20 > >=20 > > > > >=20 > > > > > Would it be helpful to validate that the delta is within a reason= able range, > > > > > e.g. that the drift can never be more than five minutes (forward = or backward)? > > > >=20 > > > > If a guest has been running for months on a previous host and is > > > > migrated to a new host, don't we expect that the KVM clock of the n= ew > > > > VM on the new host is tweaked from its default near-zero after > > > > creation, to some large amount? > > > >=20 > > >=20 > > > Regarding live migration, my own investigation does not show a propor= tional > > > relationship between VM uptime and the amount of drift. > >=20 > > You're comparing the VM on the source host, with the VM on the > > destination post-migration. >=20 > Apologies for making it confusing. I was just trying to explain why I thi= nk the > kvm-clock drift will not be large. Sure, but I don't care. If we have a sane API, the drift should be zero :) > We previously discussed the vCPU hotplug and kvm-clock drift issue. The l= onger > the time interval between two vCPU hotplug events, the larger the drift. >=20 > For live migration (with QEMU), I provided the equation to show that the = drift > will not be large, because it is determined by something else rather than= by how > long the VM has been running on the source server. >=20 >=20 > For the previous vCPU hotplug and kvm-clock bug, if we add more vCPUs to = a guest > that has been running for three months, the drift will be relatively larg= er. >=20 > For QEMU live migration, migrating a guest VM that has been running on th= e > source host for *three months* versus one that has been running for *one = day* > will not cause much difference in kvm-clock drift. Right. > For the ideal live update case (on the same host), there may be no need t= o > adjust gTSC so that it keeps incrementing. In that case, KVM_SET_CLOCK_GU= EST can > be used to adjust kvm-clock based on gTSC. Right. You restore the gTSC using its *offset* from the host TSC which hasn't stopped counting on the same host. Then use KVM_SET_CLOCK_GUEST to restore the kvmclock in terms of the gTSC. And you have an absolutely cycle-perfect migration. > For the live migration scenario, the current QEMU implementation not only= fails > to account for downtime, but also has a drift issue. That is what I would= like > to address in QEMU. Again, restore the gTSC as accurately as possible. Probably by working out for *yourself* the relationships of the source and destination host TSCs to real time, and then reconstituting on the destination using TSC offset just as for live migration. And then use KVM_SET_CLOCK_GUEST too. That's what I attempted to document in https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org/ and should probably revive. --=-r8BxiHhSG54aOSyFfagN Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 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X-MS-Exchange-CrossTenant-Id: 4e2c6054-71cb-48f1-bd6c-3a9705aca71b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 7mqZef0S6doLd1S9rVoSWnIRBGQ3BfyIO46ToKMMkCRs+VneLz/L9iNHbU5ckbNZqenzR7MC1PYica3/vk5I0w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR10MB5714 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_06,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 malwarescore=0 spamscore=0 adultscore=0 mlxlogscore=999 mlxscore=0 lowpriorityscore=0 bulkscore=0 phishscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2605130000 definitions=main-2605190235 X-Proofpoint-ORIG-GUID: 1On2-jH6s1HTS5W4K0QeBUWrqYw4DWEN X-Authority-Analysis: v=2.4 cv=aoKCzyZV c=1 sm=1 tr=0 ts=6a0cf3a2 b=1 cx=c_pps a=e1sVV491RgrpLwSTMOnk8w==:117 a=e1sVV491RgrpLwSTMOnk8w==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=z/mQ4Ysz8XfWz/Q5cLBRGdckG28=:19 a=lCpzRmAYbLLaTzLvsPZ7Mbvzbb8=:19 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=GoEa3M9JfhUA:10 a=VkNPw1HP01LnGYTKEx00:22 a=jiCTI4zE5U7BLdzWsZGv:22 a=o5oIOnhZENCTenyL_yNV:22 a=VwQbUJbxAAAA:8 a=JfrnYn6hAAAA:8 a=UsYC2ujuzK4GPOI29i0A:9 a=QEXdDO2ut3YA:10 a=1CNFftbPRP8L7MoqJWF3:22 a=5yU3S35YU4bGjq-dph-N:22 a=Bho9c0fBagfJEIQBS7DQ:22 cc=ntf awl=host:13839 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTE5MDIzNSBTYWx0ZWRfXzBIo1c2W/gqI nhqhVx1svmXEqRCiKtPLq+LnFMGeqVv6BPqyqgl3a9OM0REZD5w+OMylwPTlVEKWLpRc4nMFrNW 5CqFIQiUBcyGwAob79X4ArKXB32gaerm15y0qyexH5QRqONmLNB9MYEXzehkujeBLMexLTl/dVk RY8Bu8n+RGjTRdnyRn7IfXooisnRbKO1N+F+zR0c9kzEVqtio2wm5fL5eXpmO3UdAjaoCNXhcXL 24XCk5Y0FRsJFWyYG26mDUW6yfKKpb8cmOuVPh+dKJsOi4MQgOt0WGInlpQ6YvSBLUomAzvv/QT z5+dOyvBZ1HgQr1Zurxb505DePtWPyD/aNewe7mbVtNkRQnz15xtYMdrVui5ztOHUohMLI+ftuc LAjfGbyegdrDhU5OQoCdU/4EeDsHKchcLxa49w/VX2SN2f0Z7T2TlK+yQ8T6s3v2jNHoD+m5ix6 lRdJssS23/O+mSOXrs1S01lS1bqzN6q8JXZhxJOU= X-Proofpoint-GUID: 1On2-jH6s1HTS5W4K0QeBUWrqYw4DWEN X-purgate-ID: tlsNG-33051d/1779233726-38D73938-809F779F/0/0 X-purgate-type: clean X-purgate-size: 5246 On 2026-05-19 3:43 PM, David Woodhouse wrote: > On Tue, 2026-05-19 at 14:23 -0700, Dongli Zhang wrote: >> I think I now understand why I feel like I am always asking weird questions. I >> have been thinking about how to account for downtime, so I see >> KVM_SET_CLOCK_GUEST as a supplement to KVM_SET_CLOCK. > > I do not believe in "downtime". There is no such thing. > There is only "steal time". Or "leap seconds" as used in the document? https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org > > If I recall correctly what we described in > https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org/ > I don't think we actually needed KVM_SET_CLOCK at all, did we? Here I partially copied the content from the link. The 2nd step of destination VMM is to invoke KVM_SET_CLOCK ioctl. --- From the destination VMM process: -4. Invoke the KVM_SET_CLOCK ioctl, providing the source nanoseconds from - kvmclock (guest_src) and CLOCK_REALTIME (host_src) in their respective +4. Before creating the vCPUs, invoke the KVM_SET_TSC_KHZ ioctl on the VM, to + set the scaled frequency of the guest's TSC (freq). + +5. Invoke the KVM_SET_CLOCK ioctl, providing the source nanoseconds from + kvmclock (guest_src) and CLOCK_REALTIME (time_src) in their respective fields. Ensure that the KVM_CLOCK_REALTIME flag is set in the provided structure. - KVM will advance the VM's kvmclock to account for elapsed time since - recording the clock values. Note that this will cause problems in + KVM will restore the VM's kvmclock, accounting for elapsed time since + the clock values were recorded. Note that this will cause problems in the guest (e.g., timeouts) unless CLOCK_REALTIME is synchronized between the source and destination, and a reasonably short time passes - between the source pausing the VMs and the destination executing - steps 4-7. + between the source pausing the VMs and the destination resuming them. + Due to the KVM_[SG]ET_CLOCK API using CLOCK_REALTIME instead of + CLOCK_TAI, leap seconds during the migration may also introduce errors. -- >>> >>> So your "MASTERCLOCK_UPDATE is pending and there is no pending >>> CLOCK_UPDATE" doesn't make much sense to me. If MASTERCLOCK_UPDATE is >>> pending, then there *will* be a CLOCK_UPDATE pending. >> >> Suppose the VM is stopped and the master clock is active. > > I don't know what it means for a VM to be 'stopped'. Do you mean that > all vCPUs happen to be experiencing steal time at the present moment? Taking QEMU as an example, all vCPU threads remain asleep in host userspace without having a chance to invoke KVM_RUN. As a result, none of the vCPUs can enter KVM kernel mode to process any pending requests. This is the state before QEMU resumes from live migration or live update. (qemu) stop (qemu) info status VM status: paused According to my understanding, older KVM versions even required the userspace VMM to keep vCPUs in userspace to avoid racing with KVM_RUN. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/x86/kvm/x86.c?h=v5.15#n6090 case KVM_SET_CLOCK: { ... ... /* * TODO: userspace has to take care of races with VCPU_RUN, so * kvm_gen_update_masterclock() can be cut down to locked * pvclock_update_vm_gtod_copy(). */ > >> Suddenly, we change the host clocksource from TSC to HPET. pvclock_gtod_notify() >> may call pvclock_gtod_update_fn() to set a pending KVM_REQ_MASTERCLOCK_UPDATE >> for all vCPUs. Unless the pending KVM_REQ_MASTERCLOCK_UPDATE is processed by >> kvm_update_masterclock(), kvm_end_pvclock_update() will not set a pending >> KVM_REQ_CLOCK_UPDATE. > > You say 'Unless'... do you mean 'Until'? Until. > >> Therefore, this is a scenario in which only KVM_REQ_MASTERCLOCK_UPDATE is pending. >> >> I do not think this scenario is important. I am just curious about the expected >> way to implement similar code in the future :) > > I think that's working correctly. Until the master clock has *actually* > been updated, there's no point in setting CLOCK_UPDATE for each vCPU to > disseminate the new information to its own pvclock? Thank you very much for helping confirm this. > >> For the live migration scenario, the current QEMU implementation not only fails >> to account for downtime, but also has a drift issue. That is what I would like >> to address in QEMU. > > Again, restore the gTSC as accurately as possible. Probably by working > out for *yourself* the relationships of the source and destination host > TSCs to real time, and then reconstituting on the destination using TSC > offset just as for live migration. > > And then use KVM_SET_CLOCK_GUEST too. > > That's what I attempted to document in > https://lore.kernel.org/all/20240522001817.619072-8-dwmw2@infradead.org/ > and should probably revive. I would really appreciate it if this document could be revived. I don't see it in your most recent v4 PATCH 7. It is very helpful as a guideline for how userspace VMMs should take advantage of these APIs. Thank you very much! Dongli Zhang From xen-devel-bounces@lists.xenproject.org Wed May 20 01:55:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 01:55:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313485.1583585 (Exim 4.92) (envelope-from ) id 1wPW9O-0000uS-Ma; Wed, 20 May 2026 01:55:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313485.1583585; Wed, 20 May 2026 01:55:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPW9O-0000uK-Hx; Wed, 20 May 2026 01:55:10 +0000 Received: by outflank-mailman (input) for mailman id 1313485; Wed, 20 May 2026 01:55:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPW9M-0000uD-Vk for xen-devel@lists.xenproject.org; Wed, 20 May 2026 01:55:09 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X-purgate-ID: tlsNG-16d1c6/1779244777-7FB7DD75-230A6908/0/0 X-purgate-type: clean X-purgate-size: 2442 On Mon, May 18, 2026 at 05:21:25PM +0200, Teddy Astie wrote: > In many places, we're parsing a PCI string into individual parts > (seg, bus, dev, fn) and then transform it into a pci_sbdf_t using PCI_SBDF > macro. Rather than converting from parts to pci_sbdf_t and vice versa, > introduce a new function that parses a PCI string into a pci_sbdf_t structure > directly. > > Signed-off-by: Teddy Astie > --- > xen/drivers/pci/pci.c | 18 ++++++++++++++++++ > xen/include/xen/pci.h | 3 +++ > 2 files changed, 21 insertions(+) > > diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c > index 084be3880c..1d06cb035b 100644 > --- a/xen/drivers/pci/pci.c > +++ b/xen/drivers/pci/pci.c > @@ -202,3 +202,21 @@ const char *__init parse_pci_seg(const char *s, unsigned int *seg_p, > > return s; > } > + > +const char *parse_pci_sbdf(const char *s, pci_sbdf_t *sbdf) > +{ > + unsigned int seg, bus, dev, func; > + const char *out = parse_pci(s, &seg, &bus, &dev, &func); IMO, both parse_pci() and parse_pci_seg() should be merged into parse_pci_sbdf() and parse_pci_sbdf_seg() at the end of the series, since there will be no remaining consumers of the old APIs. What do you think? > + > + *sbdf = PCI_SBDF(seg, bus, dev, func); > + return out; > +} > + > +const char *parse_pci_sbdf_seg(const char *s, pci_sbdf_t *sbdf, bool *def_seg) > +{ > + unsigned int seg, bus, dev, func; > + const char *out = parse_pci_seg(s, &seg, &bus, &dev, &func, def_seg); > + > + *sbdf = PCI_SBDF(seg, bus, dev, func); > + return out; > +} > diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h > index afb6bbf50d..7bfc59cd75 100644 > --- a/xen/include/xen/pci.h > +++ b/xen/include/xen/pci.h > @@ -280,6 +280,9 @@ const char *parse_pci_seg(const char *s, unsigned int *seg_p, > unsigned int *bus_p, unsigned int *dev_p, > unsigned int *func_p, bool *def_seg); > > +const char *parse_pci_sbdf(const char *s, pci_sbdf_t *sbdf); > +const char *parse_pci_sbdf_seg(const char *s, pci_sbdf_t *sbdf, bool *def_seg); > + > #define PCI_BAR_VF (1u << 0) > #define PCI_BAR_LAST (1u << 1) > #define PCI_BAR_ROM (1u << 2) > -- > 2.52.0 > > > > -- > Teddy Astie | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed May 20 03:00:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 03:00:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313504.1583610 (Exim 4.92) (envelope-from ) id 1wPXAS-0002is-Ho; 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> const struct acpi_dmar_device_scope *acpi_scope; > - u16 bus, sub_bus, sec_bus; > + u16 sub_bus, sec_bus; > const struct acpi_dmar_pci_path *path; > struct acpi_drhd_unit *drhd = type == DMAR_TYPE ? > container_of(scope, struct acpi_drhd_unit, scope) : NULL; > @@ -332,29 +332,26 @@ static int __init acpi_parse_dev_scope( > > while ( start < end ) > { > + pci_sbdf_t dev_sbdf; > acpi_scope = start; > path = (const void *)(acpi_scope + 1); > depth = (acpi_scope->length - sizeof(*acpi_scope)) / sizeof(*path); > - bus = acpi_scope->bus; > + dev_sbdf = PCI_SBDF(seg, acpi_scope->bus, path->dev, path->fn); `dev_sbdf` calculation depends on `path` which is updated in `while()` loop below. > > while ( --depth > 0 ) > { > - bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > - PCI_SECONDARY_BUS); > + dev_sbdf.bus = pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS); > path++; > } > > switch ( acpi_scope->entry_type ) > { > case ACPI_DMAR_SCOPE_TYPE_BRIDGE: > - sec_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > - PCI_SECONDARY_BUS); > - sub_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > - PCI_SUBORDINATE_BUS); > + sec_bus = pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS); > + sub_bus = pci_conf_read8(dev_sbdf, PCI_SUBORDINATE_BUS); > if ( iommu_verbose ) > printk(VTDPREFIX " bridge: %pp start=%x sec=%x sub=%x\n", > - &PCI_SBDF(seg, bus, path->dev, path->fn), > - acpi_scope->bus, sec_bus, sub_bus); > + &dev_sbdf, acpi_scope->bus, sec_bus, sub_bus); > > dmar_scope_add_buses(scope, sec_bus, sub_bus); > gfx_only = false; > @@ -362,8 +359,7 @@ static int __init acpi_parse_dev_scope( > > case ACPI_DMAR_SCOPE_TYPE_HPET: > if ( iommu_verbose ) > - printk(VTDPREFIX " MSI HPET: %pp\n", > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > + printk(VTDPREFIX " MSI HPET: %pp\n", &dev_sbdf); > > if ( drhd ) > { > @@ -374,9 +370,7 @@ static int __init acpi_parse_dev_scope( > if ( !acpi_hpet_unit ) > goto out; > acpi_hpet_unit->id = acpi_scope->enumeration_id; > - acpi_hpet_unit->bus = bus; > - acpi_hpet_unit->dev = path->dev; > - acpi_hpet_unit->func = path->fn; > + acpi_hpet_unit->bdf = dev_sbdf.bdf; > list_add(&acpi_hpet_unit->list, &drhd->hpet_list); > > gfx_only = false; > @@ -386,16 +380,15 @@ static int __init acpi_parse_dev_scope( > > case ACPI_DMAR_SCOPE_TYPE_ENDPOINT: > if ( iommu_verbose ) > - printk(VTDPREFIX " endpoint: %pp\n", > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > + printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); > > - if ( drhd && pci_device_detect(seg, bus, path->dev, path->fn) ) > + if ( drhd && pci_device_detect(seg, dev_sbdf.bus, dev_sbdf.dev, dev_sbdf.fn) ) Looks like `pci_device_detect()` also needs some refactoring... (Probably out of scope for this series, though) > { > - if ( pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > + if ( pci_conf_read8(dev_sbdf, > PCI_CLASS_DEVICE + 1) != 0x03 > /* PCI_BASE_CLASS_DISPLAY */ ) > gfx_only = false; > - else if ( !seg && !bus && path->dev == 2 && !path->fn ) > + else if ( !seg && !dev_sbdf.bus && path->dev == 2 && !path->fn ) > igd_drhd_address = drhd->address; > } > > @@ -403,8 +396,7 @@ static int __init acpi_parse_dev_scope( > > case ACPI_DMAR_SCOPE_TYPE_IOAPIC: > if ( iommu_verbose ) > - printk(VTDPREFIX " IOAPIC: %pp\n", > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > + printk(VTDPREFIX " IOAPIC: %pp\n", &dev_sbdf); > > if ( drhd ) > { > @@ -413,9 +405,7 @@ static int __init acpi_parse_dev_scope( > if ( !acpi_ioapic_unit ) > goto out; > acpi_ioapic_unit->apic_id = acpi_scope->enumeration_id; > - acpi_ioapic_unit->ioapic.bdf.bus = bus; > - acpi_ioapic_unit->ioapic.bdf.dev = path->dev; > - acpi_ioapic_unit->ioapic.bdf.func = path->fn; > + acpi_ioapic_unit->ioapic.info = dev_sbdf.bdf; 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> } > > -static unsigned int __init __find_dbgp(u8 bus, u8 slot, u8 func) > +static unsigned int __init __find_dbgp(pci_sbdf_t sbdf) > { > - uint32_t class = pci_conf_read32(PCI_SBDF(0, bus, slot, func), > - PCI_CLASS_REVISION); > + uint32_t class = pci_conf_read32(sbdf, PCI_CLASS_REVISION); > > if ( (class >> 8) != PCI_CLASS_SERIAL_USB_EHCI ) > return 0; > > - return pci_find_cap_offset(PCI_SBDF(0, bus, slot, func), > - PCI_CAP_ID_EHCI_DEBUG); > + return pci_find_cap_offset(sbdf, PCI_CAP_ID_EHCI_DEBUG); > } > > static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp, > @@ -704,20 +702,20 @@ static unsigned int __init find_dbgp(struct ehci_dbgp *dbgp, > { > for ( func = 0; func < 8; func++ ) > { > + pci_sbdf_t sbdf = PCI_SBDF(0, bus, slot, func); > unsigned int cap; > > - if ( !pci_device_detect(0, bus, slot, func) ) > + if ( !pci_device_detect(sbdf) ) > { > if ( !func ) > break; > continue; > } > > - cap = __find_dbgp(bus, slot, func); > + cap = __find_dbgp(sbdf); > if ( !cap || ehci_num-- ) > { > - if ( !func && !(pci_conf_read8(PCI_SBDF(0, bus, slot, func), > - PCI_HEADER_TYPE) & 0x80) ) > + if ( !func && !(pci_conf_read8(sbdf, PCI_HEADER_TYPE) & 0x80) ) > break; > continue; > } > @@ -1510,25 +1508,24 @@ void __init ehci_dbgp_init(void) > } > else if ( strncmp(opt_dbgp + 4, "@pci", 4) == 0 ) > { > - unsigned int bus, slot, func; > - > - e = parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func); > + pci_sbdf_t sbdf = PCI_SBDF(0, 0, 0, 0); > + > + e = parse_pci_sbdf(opt_dbgp + 8, &sbdf); The original logic was ignoring PCI segment, now the full PCI address is allowed. Looks like docs/misc/xen-command-line.pandoc needs update; but the documentation also says that debug port should be in PCI segment 0... > if ( !e || *e ) > return; > > - dbgp->bus = bus; > - dbgp->slot = slot; > - dbgp->func = func; > + dbgp->bus = sbdf.bus; > + dbgp->slot = sbdf.dev; > + dbgp->func = sbdf.fn; > > - if ( !pci_device_detect(0, bus, slot, func) ) > + if ( !pci_device_detect(sbdf) ) > return; > > - dbgp->cap = __find_dbgp(bus, slot, func); > + dbgp->cap = __find_dbgp(sbdf); > if ( !dbgp->cap ) > return; > > - dbgp_printk("Using EHCI debug port on %02x:%02x.%u\n", > - bus, slot, func); > + dbgp_printk("Using EHCI debug port on %pp\n", &sbdf); > } > else > return; > diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c > index 464bb0fee4..7b2898bd5a 100644 > --- a/xen/drivers/passthrough/pci.c > +++ b/xen/drivers/passthrough/pci.c > @@ -1166,11 +1166,11 @@ out: > return ret; > } > > -bool __init pci_device_detect(u16 seg, u8 bus, u8 dev, u8 func) > +bool __init pci_device_detect(pci_sbdf_t sbdf) > { > u32 vendor; > > - vendor = pci_conf_read32(PCI_SBDF(seg, bus, dev, func), PCI_VENDOR_ID); > + vendor = pci_conf_read32(sbdf, PCI_VENDOR_ID); > /* some broken boards return 0 or ~0 if a slot is empty: */ > if ( (vendor == 0xffffffffU) || (vendor == 0x00000000U) || > (vendor == 0x0000ffffU) || (vendor == 0xffff0000U) ) > @@ -1221,24 +1221,24 @@ static int __init cf_check _scan_pci_devices(struct pci_seg *pseg, void *arg) > { > for ( func = 0; func < 8; func++ ) > { > - if ( !pci_device_detect(pseg->nr, bus, dev, func) ) > + pci_sbdf_t sbdf = PCI_SBDF(pseg->nr, bus, dev, func); > + > + if ( !pci_device_detect(sbdf) ) > { > if ( !func ) > break; > continue; > } > > - pdev = alloc_pdev(pseg, bus, PCI_DEVFN(dev, func)); > + pdev = alloc_pdev(pseg, bus, sbdf.devfn); > if ( !pdev ) > { > printk(XENLOG_WARNING "%pp: alloc_pdev failed\n", > - &PCI_SBDF(pseg->nr, bus, dev, func)); > + &sbdf); > return -ENOMEM; > } > > - if ( !func && !(pci_conf_read8(PCI_SBDF(pseg->nr, bus, dev, > - func), > - PCI_HEADER_TYPE) & 0x80) ) > + if ( !func && !(pci_conf_read8(sbdf, PCI_HEADER_TYPE) & 0x80) ) > break; > } > } > diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c > index c36f4bbd7b..9f9b639eba 100644 > --- a/xen/drivers/passthrough/vtd/dmar.c > +++ b/xen/drivers/passthrough/vtd/dmar.c > @@ -382,7 +382,7 @@ static int __init acpi_parse_dev_scope( > if ( iommu_verbose ) > printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); > > - if ( drhd && pci_device_detect(seg, dev_sbdf.bus, dev_sbdf.dev, dev_sbdf.fn) ) > + if ( drhd && pci_device_detect(dev_sbdf) ) > { > if ( pci_conf_read8(dev_sbdf, > PCI_CLASS_DEVICE + 1) != 0x03 > @@ -505,7 +505,6 @@ acpi_parse_one_drhd(struct acpi_dmar_header *header) > acpi_register_drhd_unit(dmaru); > else > { > - u8 b, d, f; > unsigned int i = 0; > union { > const void *raw; > @@ -519,18 +518,16 @@ acpi_parse_one_drhd(struct acpi_dmar_header *header) > for ( p.raw = dev_scope_start; i < dmaru->scope.devices_cnt; > i++, p.raw += p.scope->length ) > { > + pci_sbdf_t sbdf = PCI_SBDF(drhd->segment, dmaru->scope.devices[i]); > + > if ( p.scope->entry_type == ACPI_DMAR_SCOPE_TYPE_IOAPIC || > p.scope->entry_type == ACPI_DMAR_SCOPE_TYPE_HPET ) > continue; > > - b = PCI_BUS(dmaru->scope.devices[i]); > - d = PCI_SLOT(dmaru->scope.devices[i]); > - f = PCI_FUNC(dmaru->scope.devices[i]); > - > - if ( !pci_device_detect(drhd->segment, b, d, f) ) > + if ( !pci_device_detect(sbdf) ) > printk(XENLOG_WARNING VTDPREFIX > " Non-existent device (%pp) in this DRHD's scope!\n", > - &PCI_SBDF(drhd->segment, b, d, f)); > + &sbdf); > } > > acpi_register_drhd_unit(dmaru); > @@ -559,17 +556,14 @@ static int __init register_one_rmrr(struct acpi_rmrr_unit *rmrru) > > for ( ; i < rmrru->scope.devices_cnt; i++ ) > { > - u8 b = PCI_BUS(rmrru->scope.devices[i]); > - u8 d = PCI_SLOT(rmrru->scope.devices[i]); > - u8 f = PCI_FUNC(rmrru->scope.devices[i]); > + pci_sbdf_t sbdf = PCI_SBDF(rmrru->segment, rmrru->scope.devices[i]); > > - if ( pci_device_detect(rmrru->segment, b, d, f) == 0 ) > + if ( pci_device_detect(sbdf) == 0 ) > { > dprintk(XENLOG_WARNING VTDPREFIX, > " Non-existent device (%pp) is reported" > " in RMRR [%"PRIx64", %"PRIx64"]'s scope!\n", > - &PCI_SBDF(rmrru->segment, b, d, f), > - rmrru->base_address, rmrru->end_address); > + &sbdf, rmrru->base_address, rmrru->end_address); > ignore = true; > } > else > @@ -753,15 +747,13 @@ static int __init register_one_satc(struct acpi_satc_unit *satcu) > > for ( ; i < satcu->scope.devices_cnt; i++ ) > { > - uint8_t b = PCI_BUS(satcu->scope.devices[i]); > - uint8_t d = PCI_SLOT(satcu->scope.devices[i]); > - uint8_t f = PCI_FUNC(satcu->scope.devices[i]); > + pci_sbdf_t sbdf = PCI_SBDF(satcu->segment, satcu->scope.devices[i]); > > - if ( !pci_device_detect(satcu->segment, b, d, f) ) > + if ( !pci_device_detect(sbdf) ) > { > dprintk(XENLOG_WARNING VTDPREFIX, > " Non-existent device (%pp) is reported in SATC scope!\n", > - &PCI_SBDF(satcu->segment, b, d, f)); > + &sbdf); > ignore = true; > } > else > @@ -1184,8 +1176,9 @@ int cf_check intel_iommu_get_reserved_device_memory( > static int __init cf_check parse_rmrr_param(const char *str) > { > const char *s = str, *cur, *stmp; > - unsigned int seg, bus, dev, func, dev_count; > + unsigned int dev_count; > unsigned long start, end; > + pci_sbdf_t sbdf; > > do { > if ( nr_rmrr >= MAX_USER_RMRR ) > diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h > index 7bfc59cd75..d816dcad05 100644 > --- a/xen/include/xen/pci.h > +++ b/xen/include/xen/pci.h > @@ -218,7 +218,7 @@ static always_inline bool pcidevs_trylock(void) > #endif > > bool pci_known_segment(u16 seg); > -bool pci_device_detect(u16 seg, u8 bus, u8 dev, u8 func); > +bool pci_device_detect(pci_sbdf_t sbdf); > int scan_pci_devices(void); > enum pdev_type pdev_type(u16 seg, u8 bus, u8 devfn); > int find_upstream_bridge(u16 seg, u8 *bus, u8 *devfn, u8 *secbus); > -- > 2.52.0 > > > > -- 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AW1haW4tMjYwNTIwMDAzMCBTYWx0ZWRfX22efDvNYjqFo 2M1BJoAyEk3R0jIqlzqyZ1BFUHC8Fuz5t1bC6+62UiMY5ho4yfMfovq+OBt3E+iqRG2Ca0qWoi3 HuVr65nJJNxXyhA5QFd5kURQkti2en1dLd3fiO/Uhk4kvDq+c3dChFtiSlbwgfqlykvgjUZ254W jblHnUz6DCoP2tym2mnV0iGGvAieCXMFnN9o+45akbtcHsIU6hyvMBMKFXgpA3PXrSPQyf8eSqp EOG7mYs3o9KF8hzaGSdjJmjgcCIoeBqQjKttrheuKOzh18koIxtd7ao9wDP8M4Yize9xyTmfKP+ L+8UCPncWdUtS+bsdz/vuF3O42o/40gaO993uklK3ErD3u96iuHmJEMKcejEt74yJlT1RQqcym5 lMFEwO7wYUcTZhjE26/oO3HgBX92o/vYuL3pspgqbV8DPXuzuSYWFS8w/WdC3COCZlG8OnjCYlA wnQvy9T5jacxt65J0kA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-19_06,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 malwarescore=0 impostorscore=0 suspectscore=0 priorityscore=1501 phishscore=0 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200030 X-purgate-ID: tlsNG-c1860d/1779247426-BED73DB1-58E471ED/0/0 X-purgate-type: clean X-purgate-size: 6789 On Tue, May 19, 2026 at 08:00:07PM -0700, dmukhin@ford.com wrote: > On Mon, May 18, 2026 at 05:21:26PM +0200, Teddy Astie wrote: > > Use a dedicated pci_sbdf_t struct that we update instead of recreating > > one each time we need it. > > > > Signed-off-by: Teddy Astie > > --- > > xen/drivers/passthrough/vtd/dmar.c | 42 ++++++++++++------------------ > > 1 file changed, 16 insertions(+), 26 deletions(-) > > > > diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c > > index 2a756831a6..c36f4bbd7b 100644 > > --- a/xen/drivers/passthrough/vtd/dmar.c > > +++ b/xen/drivers/passthrough/vtd/dmar.c > > @@ -310,7 +310,7 @@ static int __init acpi_parse_dev_scope( > > { > > struct acpi_ioapic_unit *acpi_ioapic_unit; > > const struct acpi_dmar_device_scope *acpi_scope; > > - u16 bus, sub_bus, sec_bus; > > + u16 sub_bus, sec_bus; > > const struct acpi_dmar_pci_path *path; > > struct acpi_drhd_unit *drhd = type == DMAR_TYPE ? > > container_of(scope, struct acpi_drhd_unit, scope) : NULL; > > @@ -332,29 +332,26 @@ static int __init acpi_parse_dev_scope( > > > > while ( start < end ) > > { > > + pci_sbdf_t dev_sbdf; > > acpi_scope = start; > > path = (const void *)(acpi_scope + 1); > > depth = (acpi_scope->length - sizeof(*acpi_scope)) / sizeof(*path); > > - bus = acpi_scope->bus; > > + dev_sbdf = PCI_SBDF(seg, acpi_scope->bus, path->dev, path->fn); > > `dev_sbdf` calculation depends on `path` which is updated in `while()` loop > below. > > > > > while ( --depth > 0 ) > > { > > - bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > > - PCI_SECONDARY_BUS); > > + dev_sbdf.bus = pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS); > > path++; > > } > > > > switch ( acpi_scope->entry_type ) > > { > > case ACPI_DMAR_SCOPE_TYPE_BRIDGE: > > - sec_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > > - PCI_SECONDARY_BUS); > > - sub_bus = pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > > - PCI_SUBORDINATE_BUS); > > + sec_bus = pci_conf_read8(dev_sbdf, PCI_SECONDARY_BUS); > > + sub_bus = pci_conf_read8(dev_sbdf, PCI_SUBORDINATE_BUS); > > if ( iommu_verbose ) > > printk(VTDPREFIX " bridge: %pp start=%x sec=%x sub=%x\n", > > - &PCI_SBDF(seg, bus, path->dev, path->fn), > > - acpi_scope->bus, sec_bus, sub_bus); > > + &dev_sbdf, acpi_scope->bus, sec_bus, sub_bus); > > > > dmar_scope_add_buses(scope, sec_bus, sub_bus); > > gfx_only = false; > > @@ -362,8 +359,7 @@ static int __init acpi_parse_dev_scope( > > > > case ACPI_DMAR_SCOPE_TYPE_HPET: > > if ( iommu_verbose ) > > - printk(VTDPREFIX " MSI HPET: %pp\n", > > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > > + printk(VTDPREFIX " MSI HPET: %pp\n", &dev_sbdf); > > > > if ( drhd ) > > { > > @@ -374,9 +370,7 @@ static int __init acpi_parse_dev_scope( > > if ( !acpi_hpet_unit ) > > goto out; > > acpi_hpet_unit->id = acpi_scope->enumeration_id; > > - acpi_hpet_unit->bus = bus; > > - acpi_hpet_unit->dev = path->dev; > > - acpi_hpet_unit->func = path->fn; > > + acpi_hpet_unit->bdf = dev_sbdf.bdf; > > list_add(&acpi_hpet_unit->list, &drhd->hpet_list); > > > > gfx_only = false; > > @@ -386,16 +380,15 @@ static int __init acpi_parse_dev_scope( > > > > case ACPI_DMAR_SCOPE_TYPE_ENDPOINT: > > if ( iommu_verbose ) > > - printk(VTDPREFIX " endpoint: %pp\n", > > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > > + printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); > > > > - if ( drhd && pci_device_detect(seg, bus, path->dev, path->fn) ) > > + if ( drhd && pci_device_detect(seg, dev_sbdf.bus, dev_sbdf.dev, dev_sbdf.fn) ) > > Looks like `pci_device_detect()` also needs some refactoring... > (Probably out of scope for this series, though) Oh, cool, that is exactly patch 3/5 > > > { > > - if ( pci_conf_read8(PCI_SBDF(seg, bus, path->dev, path->fn), > > + if ( pci_conf_read8(dev_sbdf, > > PCI_CLASS_DEVICE + 1) != 0x03 > > /* PCI_BASE_CLASS_DISPLAY */ ) > > gfx_only = false; > > - else if ( !seg && !bus && path->dev == 2 && !path->fn ) > > + else if ( !seg && !dev_sbdf.bus && path->dev == 2 && !path->fn ) > > igd_drhd_address = drhd->address; > > } > > > > @@ -403,8 +396,7 @@ static int __init acpi_parse_dev_scope( > > > > case ACPI_DMAR_SCOPE_TYPE_IOAPIC: > > if ( iommu_verbose ) > > - printk(VTDPREFIX " IOAPIC: %pp\n", > > - &PCI_SBDF(seg, bus, path->dev, path->fn)); > > + printk(VTDPREFIX " IOAPIC: %pp\n", &dev_sbdf); > > > > if ( drhd ) > > { > > @@ -413,9 +405,7 @@ static int __init acpi_parse_dev_scope( > > if ( !acpi_ioapic_unit ) > > goto out; > > acpi_ioapic_unit->apic_id = acpi_scope->enumeration_id; > > - acpi_ioapic_unit->ioapic.bdf.bus = bus; > > - acpi_ioapic_unit->ioapic.bdf.dev = path->dev; > > - acpi_ioapic_unit->ioapic.bdf.func = path->fn; > > + acpi_ioapic_unit->ioapic.info = dev_sbdf.bdf; > > list_add(&acpi_ioapic_unit->list, &drhd->ioapic_list); > > > > gfx_only = false; > > @@ -431,7 +421,7 @@ static int __init acpi_parse_dev_scope( > > gfx_only = false; > > continue; > > } > > - scope->devices[didx++] = PCI_BDF(bus, path->dev, path->fn); > > + scope->devices[didx++] = dev_sbdf.bdf; > > start += acpi_scope->length; > > } > > > > -- > > 2.52.0 > > > > > > > > -- > > Teddy Astie | Vates XCP-ng Developer > > > > XCP-ng & Xen Orchestra - Vates solutions > > > > web: https://vates.tech > From xen-devel-bounces@lists.xenproject.org Wed May 20 03:32:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 03:32:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313525.1583637 (Exim 4.92) (envelope-from ) id 1wPXf2-00084F-BN; Wed, 20 May 2026 03:31:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313525.1583637; Wed, 20 May 2026 03:31:56 +0000 Received: from localhost ([127.0.0.1] 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b4yH8Zt4CGDeZ+i+wgQj5WL3hIGnq9xvP5MwD57fufyhTa0J9VApehr9F2qs+3rk cxDt0ENwuHo09wNwGTmhrngYOc6OOdq05ld0Nr/Lr4g8B5DysQ== X-Mailer: SER-76bead168636dc6ed1c9e51ce4dea80dbdd4163750742b614a4d871e565792b7 X-Cloudmark-MID: PXejwCy5KFYU6PXekwWqAg X-Proofpoint-CID: eb09f7eb-2dc2-34ab-a188-7b293c1db1fe From: dmukhin@ford.com Date: Tue, 19 May 2026 20:31:37 -0700 To: Teddy Astie Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , Roger Pau =?iso-8859-1?Q?Monn=E9?= , Stefano Stabellini , Jason Andryuk Subject: Re: [PATCH 4/5] pci: Parse into pci_sbdf_t directly Message-ID: References: <1779117763.8631fc262581453bbf619ec5b2062170.19e3baeac47000f373@vates.tech> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1779117763.8631fc262581453bbf619ec5b2062170.19e3baeac47000f373@vates.tech> PSER-M365-App: SER-APP X-Proofpoint-Virus-Version: vendor=baseguard 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X-purgate-ID: tlsNG-c1860d/1779247913-C5187DB1-F8952286/0/0 X-purgate-type: clean X-purgate-size: 9204 On Mon, May 18, 2026 at 05:21:28PM +0200, Teddy Astie wrote: > Use the newly introduced parse_pci_sbdf() and parse_pci_sbdf_seg() in order > to parse into a pci_sbdf_t directly instead of reconstructing it afterward. > > Signed-off-by: Teddy Astie > --- > xen/drivers/char/ns16550.c | 24 +++++++++++----------- > xen/drivers/char/xhci-dbc.c | 6 +++--- > xen/drivers/passthrough/amd/iommu_acpi.c | 26 ++++++++++++------------ > xen/drivers/passthrough/vtd/dmar.c | 7 +++---- > 4 files changed, 31 insertions(+), 32 deletions(-) > > diff --git a/xen/drivers/char/ns16550.c b/xen/drivers/char/ns16550.c > index 878da27f2e..fa2d0e5991 100644 > --- a/xen/drivers/char/ns16550.c > +++ b/xen/drivers/char/ns16550.c > @@ -1572,22 +1572,22 @@ static bool __init parse_positional(struct ns16550 *uart, char **str) > #ifdef CONFIG_HAS_PCI > if ( *conf == ',' && *++conf != ',' ) > { > - unsigned int b, d, f; > + pci_sbdf_t sbdf; > > - conf = parse_pci(conf, NULL, &b, &d, &f); > + conf = parse_pci_sbdf(conf, &sbdf); Original logic considered only devices from PCI segment 0, now all segments are allowed. I think docs should be updated. > if ( !conf ) > PARSE_ERR_RET("Bad port PCI coordinates"); Unrelated to the patch: I think it will be good to print the bad string value in the error message. > - uart->pci_device = PCI_SBDF(0, b, d, f); > + uart->pci_device = sbdf; > uart->ps_bdf_enable = true; > } > > if ( *conf == ',' && *++conf != ',' ) > { > - unsigned int b, d, f; > + pci_sbdf_t sbdf; > > - if ( !parse_pci(conf, NULL, &b, &d, &f) ) > + if ( !parse_pci_sbdf(conf, &sbdf) ) > PARSE_ERR_RET("Bad bridge PCI coordinates"); > - uart->pci_bridge = PCI_SBDF(0, b, d, f); > + uart->pci_bridge = sbdf; > uart->pb_bdf_enable = true; > } > #endif > @@ -1671,22 +1671,22 @@ static bool __init parse_namevalue_pairs(char *str, struct ns16550 *uart) > > case port_bdf: > { > - unsigned int b, d, f; > + pci_sbdf_t sbdf; > > - if ( !parse_pci(param_value, NULL, &b, &d, &f) ) > + if ( !parse_pci_sbdf(param_value, &sbdf) ) > PARSE_ERR_RET("Bad port PCI coordinates\n"); > - uart->pci_device = PCI_SBDF(0, b, d, f); > + uart->pci_device = sbdf; > uart->ps_bdf_enable = true; > break; > } > > case bridge_bdf: > { > - unsigned int b, d, f; > + pci_sbdf_t sbdf; > > - if ( !parse_pci(param_value, NULL, &b, &d, &f) ) > + if ( !parse_pci_sbdf(param_value, &sbdf) ) > PARSE_ERR_RET("Bad bridge PCI coordinates\n"); > - uart->pci_bridge = PCI_SBDF(0, b, d, f); > + uart->pci_bridge = sbdf; > uart->pb_bdf_enable = true; > break; > } > diff --git a/xen/drivers/char/xhci-dbc.c b/xen/drivers/char/xhci-dbc.c > index c1ff528de6..c7fd554be0 100644 > --- a/xen/drivers/char/xhci-dbc.c > +++ b/xen/drivers/char/xhci-dbc.c > @@ -1357,9 +1357,9 @@ static int __init cf_check xhci_parse_dbgp(const char *opt_dbgp) > } > else if ( strncmp(opt_dbgp + 4, "@pci", 4) == 0 ) > { > - unsigned int bus, slot, func; > + pci_sbdf_t sbdf; > > - e = parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func); > + e = parse_pci_sbdf(opt_dbgp + 8, &sbdf); > if ( !e || (*e && *e != ',') ) > { > printk(XENLOG_ERR > @@ -1368,7 +1368,7 @@ static int __init cf_check xhci_parse_dbgp(const char *opt_dbgp) > return -EINVAL; > } > > - dbc->sbdf = PCI_SBDF(0, bus, slot, func); > + dbc->sbdf = sbdf; > } > opt = e; > > diff --git a/xen/drivers/passthrough/amd/iommu_acpi.c b/xen/drivers/passthrough/amd/iommu_acpi.c > index 39ae637959..7b40da33ae 100644 > --- a/xen/drivers/passthrough/amd/iommu_acpi.c > +++ b/xen/drivers/passthrough/amd/iommu_acpi.c > @@ -682,8 +682,8 @@ static int __init cf_check parse_ivrs_ioapic(const char *str) > { > const char *s = str; > unsigned long id; > - unsigned int seg, bus, dev, func; > unsigned int idx; > + pci_sbdf_t sbdf; > > if ( *s != '[' ) > return -EINVAL; > @@ -692,7 +692,7 @@ static int __init cf_check parse_ivrs_ioapic(const char *str) > if ( *s != ']' || *++s != '=' ) > return -EINVAL; > > - s = parse_pci(s + 1, &seg, &bus, &dev, &func); > + s = parse_pci_sbdf(s + 1, &sbdf); > if ( !s || *s ) > return -EINVAL; > > @@ -707,7 +707,7 @@ static int __init cf_check parse_ivrs_ioapic(const char *str) > } > } > > - ioapic_sbdf[idx].sbdf = PCI_SBDF(seg, bus, dev, func); > + ioapic_sbdf[idx].sbdf = sbdf; > ioapic_sbdf[idx].id = id; > ioapic_sbdf[idx].cmdline = true; > > @@ -719,7 +719,7 @@ static int __init cf_check parse_ivrs_hpet(const char *str) > { > const char *s = str; > unsigned long id; > - unsigned int seg, bus, dev, func; > + pci_sbdf_t sbdf; > > if ( *s != '[' ) > return -EINVAL; > @@ -728,12 +728,12 @@ static int __init cf_check parse_ivrs_hpet(const char *str) > if ( id != (typeof(hpet_sbdf.id))id || *s != ']' || *++s != '=' ) > return -EINVAL; > > - s = parse_pci(s + 1, &seg, &bus, &dev, &func); > + s = parse_pci_sbdf(s + 1, &sbdf); > if ( !s || *s ) > return -EINVAL; > > hpet_sbdf.id = id; > - hpet_sbdf.sbdf = PCI_SBDF(seg, bus, dev, func); > + hpet_sbdf.sbdf = sbdf; > hpet_sbdf.init = HPET_CMDL; > > return 0; > @@ -1399,13 +1399,13 @@ static int __init cf_check parse_ivmd_param(const char *s) > } > > do { > - unsigned int seg, bus, dev, func; > + pci_sbdf_t sbdf; > > if ( nr_ivmd >= ARRAY_SIZE(user_ivmds) ) > return -E2BIG; > > - s = parse_pci(s + 1, &seg, &bus, &dev, &func); > - if ( !s || seg ) > + s = parse_pci_sbdf(s + 1, &sbdf); > + if ( !s || sbdf.seg ) > return -EINVAL; > > user_ivmds[nr_ivmd].start_address = start << PAGE_SHIFT; > @@ -1413,16 +1413,16 @@ static int __init cf_check parse_ivmd_param(const char *s) > user_ivmds[nr_ivmd].header.flags = ACPI_IVMD_UNITY | > ACPI_IVMD_READ | ACPI_IVMD_WRITE; > user_ivmds[nr_ivmd].header.length = sizeof(*user_ivmds); > - user_ivmds[nr_ivmd].header.device_id = PCI_BDF(bus, dev, func); > + user_ivmds[nr_ivmd].header.device_id = sbdf.bdf; > user_ivmds[nr_ivmd].header.type = ACPI_IVRS_TYPE_MEMORY_ONE; > > if ( *s == '-' ) > { > - s = parse_pci(s + 1, &seg, &bus, &dev, &func); > - if ( !s || seg ) > + s = parse_pci_sbdf(s + 1, &sbdf); > + if ( !s || sbdf.seg ) > return -EINVAL; > > - user_ivmds[nr_ivmd].aux_data = PCI_BDF(bus, dev, func); > + user_ivmds[nr_ivmd].aux_data = sbdf.bdf; > if ( user_ivmds[nr_ivmd].aux_data < > user_ivmds[nr_ivmd].header.device_id ) > return -EINVAL; > diff --git a/xen/drivers/passthrough/vtd/dmar.c b/xen/drivers/passthrough/vtd/dmar.c > index 9f9b639eba..dafe1b62f6 100644 > --- a/xen/drivers/passthrough/vtd/dmar.c > +++ b/xen/drivers/passthrough/vtd/dmar.c > @@ -1215,7 +1215,7 @@ static int __init cf_check parse_rmrr_param(const char *str) > do { > bool def_seg = false; > > - stmp = parse_pci_seg(s + 1, &seg, &bus, &dev, &func, &def_seg); > + stmp = parse_pci_sbdf_seg(s + 1, &sbdf, &def_seg); > if ( !stmp ) > return -EINVAL; > > @@ -1224,12 +1224,11 @@ static int __init cf_check parse_rmrr_param(const char *str) > * Segment will be replaced with one from first device. > */ > if ( user_rmrrs[nr_rmrr].dev_count && def_seg ) > - seg = PCI_SEG(user_rmrrs[nr_rmrr].sbdf[0]); > + sbdf.seg = PCI_SEG(user_rmrrs[nr_rmrr].sbdf[0]); > > /* Keep sbdf's even if they differ and later report an error. */ > dev_count = user_rmrrs[nr_rmrr].dev_count; > - user_rmrrs[nr_rmrr].sbdf[dev_count] = > - PCI_SBDF(seg, bus, dev, func).sbdf; > + user_rmrrs[nr_rmrr].sbdf[dev_count] = sbdf.sbdf; > > user_rmrrs[nr_rmrr].dev_count++; > s = stmp; > -- > 2.52.0 > > > > -- > Teddy Astie | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Wed May 20 03:34:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 03:34:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313533.1583646 (Exim 4.92) (envelope-from ) id 1wPXhf-0000Co-Sq; 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Moreover, we also avoid translating back and forth > > between pci_sbdf_t and individual (seg, bus, dev, fn). > > > > Latest patch attempts to improve codegen of pci_conf_{read,write}N() > > by making them inline specialized variants of pci_mmcfg_{read,write}() > > in order to eliminate a particular `switch (len)` at compile time. > > > > No intended functional change, aside some parts of the codebase that will > > now correctly handle PCI segment when parsed while it was previously > > ignored (e.g dbgp). > > I would schedule a full CI cycle against the series for smoke testing. -- Denis From xen-devel-bounces@lists.xenproject.org Wed May 20 04:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 04:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313117.1583660 (Exim 4.92) (envelope-from ) id 1wPYxG-0003Ap-Id; Wed, 20 May 2026 04:54:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313117.1583660; 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Tue, 19 May 2026 07:21:42 -0700 (PDT) From: Cody Zuschlag To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, Cody Zuschlag Subject: [PATCH v2] docs/process: document AI-assisted patch tags Date: Tue, 19 May 2026 16:20:12 +0200 Message-ID: <20260519142011.30276-2-cody.zuschlag@gmail.com> X-Mailer: git-send-email 2.45.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779200502-DB16D443-E9A5EB0D/0/0 X-purgate-type: clean X-purgate-size: 1900 Add documentation for the Assisted-by tag to clarify how AI-assisted tooling may be disclosed in Xen patches. The guidance is inspired by similar work in the Linux kernel documentation. Assisted-by: ChatGPT Signed-off-by: Cody Zuschlag --- docs/process/sending-patches.pandoc | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/docs/process/sending-patches.pandoc b/docs/process/sending-patches.pandoc index 798ecceb..b61584f9 100644 --- a/docs/process/sending-patches.pandoc +++ b/docs/process/sending-patches.pandoc @@ -195,6 +195,25 @@ E.g.: Requested-by: Jane Doe +### Assisted-by: + +This optional tag can be used when AI-assisted tooling contributed to the +preparation of a patch. It is in the format: + + Assisted-by: [:] [tool...] + +E.g.: + + Assisted-by: Claude:claude-3-opus coccinelle sparse + Assisted-by: ChatGPT:gpt-5.5 + +Basic development tools, such as git, compilers, make, and editors, should +not be listed. + +The person submitting the patch remains responsible for reviewing any +AI-generated content and ensuring the contribution is correct, appropriate, +and compliant with Xen's contribution and licensing requirements. + ### Signed-off-by: This mandatory tag specifies the author(s) of a patch (for each author a @@ -209,6 +228,9 @@ E.g.: The author must be a natural person (not a team or just a company) and the `Signed-off-by:` tag must include the real name of the author (no pseudonym). +AI tools must not add `Signed-off-by:` tags, as only natural +persons can certify the `Developer's Certificate of Origin`. + By signing the patch with her/his name the author explicitly confirms to have made the contribution conforming to the `Developer's Certificate of Origin`: -- 2.45.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 04:55:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 04:55:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313072.1583654 (Exim 4.92) (envelope-from ) id 1wPYxG-00037q-Ah; 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Tue, 19 May 2026 06:48:36 -0700 (PDT) From: Cody Zuschlag To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, Cody Zuschlag Subject: [PATCH] docs/process: document AI-assisted patch tags Date: Tue, 19 May 2026 15:44:18 +0200 Message-ID: <20260519134417.16024-2-cody.zuschlag@gmail.com> X-Mailer: git-send-email 2.45.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779198517-BC159DB1-A86A7BA2/0/0 X-purgate-type: clean X-purgate-size: 2332 This patch adds lightweight guidance for AI-assisted patch attribution via an Assisted-by tag. The proposal is inspired by similar Linux kernel documentation, while keeping the Xen guidance intentionally minimal and aligned with the existing sending-patches documentation. Feedback welcome. docs/process: document AI-assisted patch tags Add documentation for the Assisted-by tag to clarify how AI-assisted tooling may be disclosed in Xen patches. The guidance is inspired by similar work in the Linux kernel documentation. Signed-off-by: Cody Zuschlag --- docs/process/sending-patches.pandoc | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) mode change 100644 => 100755 docs/process/sending-patches.pandoc diff --git a/docs/process/sending-patches.pandoc b/docs/process/sending-patches.pandoc old mode 100644 new mode 100755 index 798ecceb..b61584f9 --- a/docs/process/sending-patches.pandoc +++ b/docs/process/sending-patches.pandoc @@ -195,6 +195,25 @@ E.g.: Requested-by: Jane Doe +### Assisted-by: + +This optional tag can be used when AI-assisted tooling contributed to the +preparation of a patch. It is in the format: + + Assisted-by: [:] [tool...] + +E.g.: + + Assisted-by: Claude:claude-3-opus coccinelle sparse + Assisted-by: ChatGPT:gpt-5.5 + +Basic development tools, such as git, compilers, make, and editors, should +not be listed. + +The person submitting the patch remains responsible for reviewing any +AI-generated content and ensuring the contribution is correct, appropriate, +and compliant with Xen's contribution and licensing requirements. + ### Signed-off-by: This mandatory tag specifies the author(s) of a patch (for each author a @@ -209,6 +228,9 @@ E.g.: The author must be a natural person (not a team or just a company) and the `Signed-off-by:` tag must include the real name of the author (no pseudonym). +AI tools must not add `Signed-off-by:` tags, as only natural +persons can certify the `Developer's Certificate of Origin`. + By signing the patch with her/his name the author explicitly confirms to have made the contribution conforming to the `Developer's Certificate of Origin`: -- 2.45.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 06:13:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 06:13:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313558.1583673 (Exim 4.92) (envelope-from ) id 1wPaBc-000693-2e; Wed, 20 May 2026 06:13:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313558.1583673; Wed, 20 May 2026 06:13:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaBb-00068w-Vu; Wed, 20 May 2026 06:13:43 +0000 Received: by outflank-mailman (input) for mailman id 1313558; Wed, 20 May 2026 06:13:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaBa-00068q-A3 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 06:13:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPaBZ-002hF0-7i for xen-devel@lists.xenproject.org; Wed, 20 May 2026 08:13:41 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d5108-5cb7-0a2a0a5109dd-0a2a450baec2-18 for ; Wed, 20 May 2026 08:13:41 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d5114-212f-0a2a450b0019-d155802ddc93-3 for ; Wed, 20 May 2026 08:13:40 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48909558b3aso46816655e9.0 for ; Tue, 19 May 2026 23:13:40 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779257620-13374F3B-3F931C7B/0/0 X-purgate-type: clean X-purgate-size: 1682 On 19.05.2026 18:21, Oleksii Kurochko wrote: > On 5/19/26 5:56 PM, Jan Beulich wrote: >> On 19.05.2026 17:17, Oleksii Kurochko wrote: >>> On 5/19/26 4:53 PM, Jan Beulich wrote: >>>> On 19.05.2026 16:49, Oleksii Kurochko wrote: >>>>> int init_guest_isa(struct domain *d) >>>>> { >>>>> int len; >>>>> >>>>> bitmap_andnot(d->arch.isa, riscv_isa, guest_unsupp, >>>>> RISCV_ISA_EXT_MAX); >>>>> >>>>> len = build_guest_isa_str(NULL, 0, d->arch.isa); >>>>> if ( len < 0 ) >>>>> return len; >>>>> >>>>> d->arch.isa_str = xmalloc_array(char, len + 1); >>>>> if ( !d->arch.isa_str ) >>>>> return -ENOMEM; >>>>> >>>>> build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa); >>>> >>>> At least ASSERT() the success of this? >>> >>> I will add: >>> >>> ASSERT(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) == len); >> >> Ehem. Please check how ASSERT() works (and the difference to BUG_ON()). > > Condition itself looks correct for ASSERT(). If build_guest_isa_str() > returns value equal to len then assert_failed() shouldn't be called. > > Maybe do you mean that it will never fire in release build then yes it > should be changed to BUG_ON() and the condition should be inverted: > BUG_ON(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) != len); No. Unlike in BUG_ON(), you can't use expressions with side effects (i.e. also function calls, unless they're const/pure) in ASSERT(). That's true for standard C's assert() as well, i.e. not Xen specific at all. (We do, however, diverge from assert() in another aspect.) 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Tue, 19 May 2026 23:23:50 -0700 (PDT) Message-ID: Date: Wed, 20 May 2026 08:23:49 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper From: Jan Beulich Subject: [PATCH] CI: collect certain intermediate files as artifacts (part 2) Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779258231-B7F7ADB1-C18EBFC0/0/0 X-purgate-type: clean X-purgate-size: 1328 Build issues may also surface for analysis jobs. Collect intermediate files (if any) there as well. Include xen/.config too, since it's not otherwise collected. Signed-off-by: Jan Beulich --- https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2536905486 --- a/automation/eclair_analysis/build.sh +++ b/automation/eclair_analysis/build.sh @@ -58,10 +58,21 @@ runtime_failures_docs() { ( runtime_failures_docs + ret=0 + mkdir -p intermediates make "-j${PROCESSORS}" "-l${PROCESSORS}.0" \ "CROSS_COMPILE=${CROSS_COMPILE}" \ "CC=${CC}" \ "CXX=${CXX}" \ "XEN_TARGET_ARCH=${XEN_TARGET_ARCH}" \ - -C xen + -C xen || ret=$? + + # Preserve Xen intermediate files. Some may be there only upon build failure. + for f in xen/.config xen/.xen-syms.* xen/.xen.efi.*; do + if [[ -f $f ]]; then + cp $f intermediates/ + fi + done + + exit $ret ) --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -18,6 +18,7 @@ - "${ECLAIR_OUTPUT_DIR}/*.txt" - '*.log' - '*.json' + - intermediates/ reports: codequality: gl-code-quality-report.json rules: From xen-devel-bounces@lists.xenproject.org Wed May 20 06:29:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 06:29:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313571.1583691 (Exim 4.92) (envelope-from ) id 1wPaQQ-0000JK-GM; Wed, 20 May 2026 06:29:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313571.1583691; Wed, 20 May 2026 06:29:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaQQ-0000JD-Cj; Wed, 20 May 2026 06:29:02 +0000 Received: by outflank-mailman (input) for mailman id 1313571; Wed, 20 May 2026 06:29:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaQP-0000J7-D8 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 06:29:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPaQO-002k04-I9 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 08:29:00 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d54a7-5cb7-0a2a0a5109dd-0a2a450b964e-14 for ; Wed, 20 May 2026 08:29:00 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d54ac-212f-0a2a450b0019-d155dd32b16b-3 for ; Wed, 20 May 2026 08:29:00 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-448528f4e69so2969407f8f.3 for ; Tue, 19 May 2026 23:29:00 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779258540-13D7FF3B-0C40AE67/0/0 X-purgate-type: clean X-purgate-size: 1456 On 19.05.2026 19:02, Teddy Astie wrote: > Le 18/05/2026 à 15:14, Ross Lagerwall a écrit : >> @@ -2496,6 +2491,7 @@ void asmlinkage svm_vmexit_handler(void) >> vintr_t intr; >> bool vcpu_guestmode = false; >> struct vlapic *vlapic = vcpu_vlapic(v); >> + struct hvm_emulate_ctxt ctxt; >> >> regs->rax = vmcb->rax; >> regs->rip = vmcb->rip; >> @@ -2840,7 +2836,9 @@ void asmlinkage svm_vmexit_handler(void) >> } >> >> case VMEXIT_HLT: >> - svm_vmexit_do_hlt(vmcb, regs); >> + hvm_emulate_init_once(&ctxt, NULL, NULL, regs); >> + ctxt.insn = INSTR_HLT; >> + svm_emulate_one(&ctxt); >> break; > > > In this case, most of the logic is hidden behind svm_emulate_one(); > however, SEV-ES changes some aspects of the VMEXIT_HLT behavior (this is > the same for e.g VMEXIT_PAUSE). > > With SEV-ES, we can't access the CPU registers anymore but hlt can still > be intercepted (it's a "Automatic Exit (AE)"), in this case, the CPU > increases RIP itself (this is documented in SEV-ES section of the APM), > and we just have to emulate the HLT behavior. How would that specific > behavior fit in this new design ? > > We can skip increasing rip in this specific case, but it's now common code. I guess we may need to somehow reflect fault vs trap semantics in the context, for RIP updating to only occur in the former case. Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 06:30:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 06:30:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313576.1583700 (Exim 4.92) (envelope-from ) id 1wPaRP-00014m-Na; Wed, 20 May 2026 06:30:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313576.1583700; Wed, 20 May 2026 06:30:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaRP-00014J-Kv; Wed, 20 May 2026 06:30:03 +0000 Received: by outflank-mailman (input) for mailman id 1313576; Wed, 20 May 2026 06:30:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaRO-0000r4-Jy for xen-devel@lists.xenproject.org; Wed, 20 May 2026 06:30:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPaRN-004OgP-VB for xen-devel@lists.xenproject.org; Wed, 20 May 2026 08:30:01 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d54e4-2eae-0a2a0a5409dd-0a2a4508d06e-12 for ; Wed, 20 May 2026 08:30:01 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d54e9-63b5-0a2a45080019-d1558030b9e3-3 for ; Wed, 20 May 2026 08:30:01 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-48ff4f8ef0dso49996005e9.3 for ; Tue, 19 May 2026 23:30:01 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 19 May 2026 23:33:00 -0700 (PDT) Message-ID: Date: Wed, 20 May 2026 08:32:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] vtd: Use pci_sbdf_t in acpi_parse_dev_scope() To: dmukhin@ford.com, Teddy Astie Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <1779117761.8631fc262581453bbf619ec5b2062170.19e3baea399000f373@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779258780-E2392443-D66771FA/0/0 X-purgate-type: clean X-purgate-size: 1018 On 20.05.2026 05:23, dmukhin@ford.com wrote: > On Tue, May 19, 2026 at 08:00:07PM -0700, dmukhin@ford.com wrote: >> On Mon, May 18, 2026 at 05:21:26PM +0200, Teddy Astie wrote: >>> @@ -386,16 +380,15 @@ static int __init acpi_parse_dev_scope( >>> >>> case ACPI_DMAR_SCOPE_TYPE_ENDPOINT: >>> if ( iommu_verbose ) >>> - printk(VTDPREFIX " endpoint: %pp\n", >>> - &PCI_SBDF(seg, bus, path->dev, path->fn)); >>> + printk(VTDPREFIX " endpoint: %pp\n", &dev_sbdf); >>> >>> - if ( drhd && pci_device_detect(seg, bus, path->dev, path->fn) ) >>> + if ( drhd && pci_device_detect(seg, dev_sbdf.bus, dev_sbdf.dev, dev_sbdf.fn) ) >> >> Looks like `pci_device_detect()` also needs some refactoring... >> (Probably out of scope for this series, though) > > Oh, cool, that is exactly patch 3/5 Might better be done the other way around. At least then there wouldn't be a line length issue here, afaict. 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pr=C Message-ID: <5a74b63a-0312-4992-abca-4ba54110426a@amd.com> Date: Wed, 20 May 2026 08:36:07 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v11 0/6] xen/arm: scmi: introduce SCI SCMI SMC multi-agent support To: Oleksii Moisieiev , Stefano Stabellini , Julien Grall , Juergen Gross , Anthony PERARD CC: "xen-devel@lists.xenproject.org" , Andrew Cooper , Bertrand Marquis , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Volodymyr Babchuk , Grygorii Strashko References: <26f52f4a-a830-4430-b0c1-9ca7f761515e@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <26f52f4a-a830-4430-b0c1-9ca7f761515e@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ5PEPF000001F3:EE_|DM4PR12MB6327:EE_ X-MS-Office365-Filtering-Correlation-Id: 8f528bcb-37b5-40d9-d6af-08deb63a157d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|376014|7416014|36860700016|13003099007|22082099003|56012099003|4143699003|18002099003|11063799006; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Z4gSF1VhMCmYzgw6j89VE8jPePDmfCSFSk+EMlw4vmvV2m5OZYGblBz5ZI/t4D80ltYFF7ASiT8w5MLUFzo5l3q33ROiNpQONExsWa5VvUh9PptX2egf1gP/eYOC0xkBCiCyh6A7sG4S0Fe5mv74VTDh0vF5U63NcgU4bPEgjs7ikFRLF+E22rPsZY/twGv4KBAK3rwXZGHiUOKc7fq9JvYAeeGmWF5RElRCOSRqgzHaOaGEpe9nxuP6KBRmxwzrgxmrjCHpzz6aVT4t9ZOt5whgPIyXXpr8FO1feLSp4vsgAH002ooGbWLIau/zK8a0YHlL4udcnKKrnk2IbBi/1ce0Tqj52ggXTGfAZ00k4qAX/9QN/a3lpq1lzvo5HroEr92B27QmJUPMbgwFY8Lo475uQ/0F5zeiTDFEx8qpWdnfc54iUFtiSnullB/nVzVB X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2026 06:36:11.7297 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8f528bcb-37b5-40d9-d6af-08deb63a157d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001F3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB6327 X-purgate-ID: tlsNG-c201ff/1779258983-D8F7E443-CAB49AC5/0/0 X-purgate-type: clean X-purgate-size: 17525 Hi Oleksii, On 19-May-26 18:31, Oleksii Moisieiev wrote: > Gentle ping for this patch series. We are past the feature freeze, so we now focus mostly on bug fixes that can still go in. Other series need to wait for a new dev cycle unless someone finds free time. ~Michal > > On 06/04/2026 19:39, Oleksii Moisieiev wrote: >> Inroducing patch series which includes implementation of the SCI SCMI >> SMC multi-agent support. >> This patch series follows RFC v5 [3] series which was introducing both >> SCMI single-agent and multi-agent support. After the discussion it was >> decided to split features and upstream singe-agent support first. This >> feature is merged for now to v4.21-rc2. >> I'm starting this patch series from v6 to save the discussion history >> and don't break changes log. >> >> Patch - xen/domctl: extend XEN_DOMCTL_assign_device to handle not >> only iommu >> - add chainged handling of assigned DT devices to support >> access-controller functionality through SCI framework. >> Change was done in two parts: >> - call to sci_do_domctl() to do_domctl() >> - update iommu_do_dt_domctl() to check for dt_device_is_protected() >> and not fail if DT device is not protected by IOMMU >> >> Patch - xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver >> - add Xen-specific SCMI container compatible `xen,sci` >> under `/chosen/xen`; Xen binds only to the `arm,scmi-smc` inside it and >> ignores other SCMI nodes (e.g. under `/firmware`). >> - add `scmi-secondary-agents` and `#scmi-secondary-agents-cells` to describe >> func_id/shmem/(optional agent_id) tuples for secondary agents. >> - each guest using SCMI supplies its agent_id (dom0 via >> `xem,dom0-sci-agent-id=` parameter in xen,sci compatible node, >> toolstack via `arm_sci = "type=scmi_smc_multiagent,agent_id=..."`, dom0less >> via `xen,sci_type` + `xen,sci-agent-id` in `xen,domain`). >> - factor out SCMI generic definitions and shmem code. >> - passthrough configuration for SCMI guests mirrors other HW passthrough. >> >> Patch - docs: arm: add SCI SCMI SMC multi-agent driver docs >> - document the Xen SCMI container under `/chosen/xen/xen_scmi_config` and the >> mediator’s binding rules; update examples accordingly. >> >> All Xen-specific SCMI configuration now lives under `/chosen/` >> to keep host DT changes isolated while leaving the host `/firmware/scmi` >> untouched for Dom0 consumption. >> >> Code can be found at: >> https://github.com/oleksiimoisieiev/xen/tree/scmi_ma_upstrv6 >> >> [1] RFC v2: >> http://patchwork.kernel.org/project/xen-devel/cover/cover.1644341635.git.oleksii_moisieiev@epam.com/ >> [2] RFC v3: >> https://patchwork.kernel.org/project/xen-devel/patch/20250311111618.1850927-1-grygorii_strashko@epam.com >> [3] RFC v5: >> https://lore.kernel.org/xen-devel/cover.1753184487.git.oleksii_moisieiev@epam.com/ >> [4] SCMI single-agent: >> https://lore.kernel.org/xen-devel/cover.1756995595.git.oleksii_moisieiev@epam.com/ >> SCMI spec: >> https://developer.arm.com/documentation/den0056/e/?lang=en >> >> SCMI bindings: >> https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/firmware/arm,scmi.yaml >> https://web.git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/access-controllers/access-controllers.yaml >> >> Reference EL3 FW: >> RPI5: https://github.com/xen-troops/arm-trusted-firmware/commits/rpi5_dev/ >> Renesas v4h: >> https://github.com/GrygiriiS/arm-trusted-firmware/commits/rcar_gen4_v2.7_v4x-scmi_upd/ >> >> base-commit: dbe60f244c (Update Xen to 4.21, 2025-02-21) >> >> Changes in v11: >> - Fix agent_id documentation: clarify it applies to SCMI SMC >> multi-agent support only, not plain SCMI SMC (reviewer feedback) >> - Remove "non-zero" from agent_id description to match accepted >> range [0..254] >> - Remove "UINT8_MAX (255) is treated as invalid" from user >> documentation as unnecessary implementation detail >> - Add LIBXL_HAVE_SCMI_SMC_MULTIAGENT feature macro in libxl.h to >> advertise the new scmi_smc_multiagent type and agent_id field >> - Add agent_id validation in >> libxl__arch_domain_build_info_setdefault() to reject invalid values at >> the libxl level, not only in xl >> >> Changes in v10: >> - remove unused sci_do_domctl stub from sci.h >> - removed extra include in memcpy-{to/from}io.c files >> - Fix tabs in MAINTAINERS file >> - remove duplicate SPDX tag from scmi-shmem.c >> - add cast to ARM_SMCCC_INVALID_PARAMETER to settle the sign since >> ARM_SMCCC_INVALID_PARAMETER is -3 which is part of the spec and resp >> is the default smccc call structure. >> - update free_channel_list. Add spinlock to avoid race condition and >> a comment with a description of the function work >> - preserve error of smc_create_channel in scmi_probe >> - check scmi shmem address alignment as wel as it is done for size >> - check for d->arch.sci_data != NULL in scmi_handle_call >> - use SCMI_SHMEM_MAPPED size for iomem_permit_access >> - change len type to unsigned in shmem_{get|put}_message >> - rename shmem_channel_is_free to shmem_channel_status >> - add comment about skipping message status when getting message response >> - Set correct agent_id ranges for dom0less and a toolstack. Agent_id 0 >> is not binded for dom0 so can be reused. Also mentioned that >> UINT8_MAX (255) is treated as invalid agent_id. >> - Split hypervisor and toolstack changes into separate commits >> - move init list and spin init after initial checks in probe call >> - fix typo in comments >> - clean resources when sci_register returns an error. >> - Split hypervisor and toolstack changes into separate commits >> - rephrase section about /firmware/scmi. Mentioned that this node is >> taken from Host DT and copied unmodified. >> - fix xen,reg address for secondary domains for Dom0less configuration >> >> Changes in v9: >> - treat SCI as a gate for XEN_DOMCTL_*assign_device: abort before >> IOMMU if sci_do_domctl() returns an error other than -ENXIO, instead >> of trying to propagate SCI errors after a successful IOMMU >> operation. This avoids partial success and the need for IOMMU rollback. >> - remove early return from do_domctl() in the assign_device >> path to keep RCU handling intact. >> - change IS_ENABLED(*) to #ifdef in sci_do_domctl quard >> - reword commit description to refer to memcpy_fromio and memcpy_toio >> - ordering obj-y in Makefile >> - rename ALL_LIBS to ARCH_LIBS >> - drop io.h and move definitions to the common header, fix comments to >> be arch neutral >> - update comments for memcpy_{from/to}io implementation >> - sort and refactor MAINTAINERS enties >> - remove Spurious changes >> - add extra check to avoid ASSERT when calling unmap_channel_memory >> from assign device method >> - set correct tx flag to SCMI_BASE_AGENT_PERMISSIONS_RESET when >> freeing resources. Flag should be set to 1 according to the >> section 4.2.2.12 [0]. >> - fix dt node copmaring >> - moved channel->shmem check from ASSERT in unmap_memory_channel to >> "if" statement. This will prevent firing ASSERT if >> unmap_channel_memory was called twice on the same channel. >> >> Changes in v8: >> - check for CONFIG_ARM_SCI to be ebabled instead of COMFIG_ARM before >> calling sci_do_domctl >> - rework sci_do_domctl call to avoid extra checks, improved error >> handling. >> - do not propagate ret1 if sci_do_domctl returned positive ret >> - updated comment in domctl.c code >> - switched to ordered accessors to address the ordering and barrier >> concerns. >> - updated the documentation to match the implementation and explicitly >> state the supported access sizes and granularity. >> - rename memcpy_* implementation files to memcpu-* to follow naming >> convension >> - fix indentation to match Xen style >> - fix intendation to match Xen style >> - move memcpy-{from/to}io to more convenient library place >> - update xen_scmi func_id in commit description >> - updated documentation with the new DT format >> - updated opt_dom0_scmi_agent_id setting to avoid it to be equal >> SCMI_AGENT_ID_INVALID. >> - changed SCMI_AGENT_ID_INVALID from 0xff to UINT8_MAX which makes >> code more clear showing that UINT8_MAX is theated like invalid >> agent_id and couldn't be used. Also excluded SCMI_AGENT_ID_INVALID >> from acceptable value range >> - remove outdated xen,config property ignore, added xen,sci compatible >> to skip_matches in handle_node >> - add documentation for pre-existing scmi-smc-passthrough command line >> option in alphabetically correct location (in 's' section) >> - add note to commit description about documentation for previously >> undocumented scmi-smc-passthrough >> - Fix SMC IDs in DT examples (Xen management uses 0x82000003, Dom0 uses 0x82000002) >> - Add explicit note explaining why Dom0 and Xen channels do not conflict >> - Document dom0less multi-agent configuration example (xen,sci_type / xen,sci-agent-id) >> - Add scmi_xen node to agent-discovery example with #scmi-secondary-agents-cells = 2 >> - Drop dom0=sci-agent-id command line handling; Dom0 SCMI is now enabled via >> xen,dom0-sci-agent-id in the xen,sci DT container >> - Refresh docs and examples to mention the DT property instead of the cmdline option >> - update documentation to match the last DT format >> - fixed RST: "... code-block:: dts" -> ".. code-block:: dts" >> - update documentation with dom0less configuration example >> - update documentation with new param xen,dom0-sci-agent-id >> instead of the command line parameter >> >> Changes in v7: >> - update domctl to build on both Arm and x86 platforms >> - move ret1 declaration to the top of the function as required by code >> style >> - x86 guidance: removed the speculative note; header now just says >> each arch supplies its own implementation or macro. >> - name spacing: dropped the double-underscore; the helpers are now >> memcpy_fromio / memcpy_toio. The header also explicitly allows an >> arch to define these as macros before including it. >> - updated io.c to keep 32-bit transfers safe on arm32 >> - moved to __raw_read*/__raw_write* accessors to avoid endianness conversion. >> - split the helpers into separate compilation units >> - rework scmi nodes for xen to match on compatible string instead of >> the direct path >> - update documentation in section of the xen_scmi configuration which >> is matched by "xen,sci" compatible instead of the direct path. >> >> Changes in v6: >> - change iommu_do_domctl and sci_do_domctl command order and >> call sci_do_domctl first which will produce cleaner code path. >> Also dropped changing return code when iommu was disabled in >> iommu_do_domctl. >> - sorted objs in Makefile alhabetically >> - added newline at the end of Makefile >> - used uint{N}_t intead of u{N} >> - add comment about why 32 bit IO operations were used >> - updated cast opertaions to avoid dropping constness which is wrong >> - move function definitions to generic place so the could be reused by >> other arch >> - add SPDX tag to io.c >> - updated scmi-shmem to use io.h from generic location >> - update scmi_agent_id parameter to be provided inside dom0= parameter >> list and have the following format "dom0=sci-agent-id=0" >> This change was done as a response for Stefano comment and >> requires a lot of code changes, but produces much cleaner solution >> that's why I've added it to the code. >> - fix file comments and return codes >> - fix lenght checks in shmem_{get,put}_message to use offsetof >> - remove len member from scmi_channel structure as it is not used >> - set scmi-secondary-agents property to be mandatory since if no >> secondary agents were provided then there is no sence to enable scmi >> when no secondary agents are populated to the Domains >> - update documentation in booting.txt, added xen_scmi node to the >> example >> - adjust d->arch.sci_enabled value in scmi_domain_destroy >> - fix lock management in smc_create_channel call >> - avoid extra map_channel_memory command for Xen management channel >> because collect_agent_id call unmaps memory if DOMID_XEN is not >> set. So for Xen management channel we can init domain_id ad DOMID_XEN >> before calling collect_agent_id so memory shouldn't be unmapped. >> - remove all HVC mentions from the multi-agent doc >> - update sci-agent-id parameter description in the documentation >> - add missing Sign-of >> - minor fixes across the document >> >> Changes in v5: >> - return -EINVAL if mediator without assign_dt_device was provided >> - invert return code check for iommu_do_domctl in >> XEN_DOMCTL_assign_device domctl processing to make cleaner code >> - change -ENOTSUPP error code to -ENXIO in sci_do_domctl >> - handle -ENXIO return comde of iommu_do_domctl >> - leave !dt_device_is_protected check in iommu_do_dt_domctl to make >> code work the same way it's done in "handle_device" call while >> creating hwdom(dom0) and "handle_passthrough_prop" call for dom0less >> creation >> - drop return check from sci_assign_dt_device call as not needed >> - do not return EINVAL when addign_dt_device is not set. That is >> because this callback is optional and not implemented in single-agent driver >> - move memcpy_toio/fromio to the generic place >> - fix device-tree example format in booting.txt, added ";" after "}". >> - update define in scmi-proto.h >> - update define in scmi-shmem.h file >> - scmi_assign_device - do not ignore -EOPNOTSUPP return >> code of the do_smc_xfer >> - remove overwriting agent_channel->agent_id after >> SCMI_BASE_DISCOVER_AGENT call >> - add multi-agent files to the MAINTAINERS >> - add SCMI multi-agent description to the SUPPORT.md >> - handle ARM_SMCCC_INVALID_PARAMETER return code and return -EINVAL >> for smc call >> - updated collect_agents function. Set agent_id parameter as optional >> in scmi-secondary-agents device-tree property >> - introduce "#scmi-secondary-agents-cells" parameter to set if >> agent_id was provided >> - reanme xen,scmi-secondary-agents property to scmi-secondary-agents >> - move memcpu_toio/fromio for the generic place >> - update Xen to get management channel from /chosen/xen,config node >> - get hypervisor channnel from node instead of using hardcoded >> - update handling scmi and shmem nodes for the domain >> - Set multi-agent driver to support only Arm64 >> - rework multi-agent driver to leave Host Device-tree unmodified >> >> Changes in v4: >> - toolstack comments from Anthony PERARD >> - added dom0less support >> - added doc for "xen,scmi-secondary-agents" >> >> Grygorii Strashko (2): >> xen/domctl: chain SCI handling before IOMMU in assign_device domctl >> docs: arm: add SCI SCMI SMC multi-agent driver docs >> >> Oleksii Moisieiev (4): >> xen: arm: smccc: add INVALID_PARAMETER error code >> lib/arm: Add I/O memory copy helpers >> xen/arm: scmi: introduce SCI SCMI SMC multi-agent driver >> tools/xl/libxl: wire up SCMI SMC multi-agent configuration >> >> MAINTAINERS | 1 + >> SUPPORT.md | 11 + >> .../arm/firmware/arm-scmi.rst | 422 +++++++++ >> docs/man/xl.cfg.5.pod.in | 13 + >> docs/misc/arm/device-tree/booting.txt | 197 +++++ >> tools/include/libxl.h | 8 + >> tools/libs/light/libxl_arm.c | 13 + >> tools/libs/light/libxl_types.idl | 4 +- >> tools/xl/xl_parse.c | 12 + >> xen/arch/arm/Makefile | 1 + >> xen/arch/arm/arch.mk | 1 + >> xen/arch/arm/dom0less-build.c | 11 + >> xen/arch/arm/domain_build.c | 39 + >> xen/arch/arm/firmware/Kconfig | 12 + >> xen/arch/arm/firmware/Makefile | 1 + >> xen/arch/arm/firmware/sci.c | 36 + >> xen/arch/arm/firmware/scmi-proto.h | 164 ++++ >> xen/arch/arm/firmware/scmi-shmem.c | 118 +++ >> xen/arch/arm/firmware/scmi-shmem.h | 45 + >> xen/arch/arm/firmware/scmi-smc-multiagent.c | 830 ++++++++++++++++++ >> xen/arch/arm/include/asm/firmware/sci.h | 8 + >> xen/arch/arm/include/asm/smccc.h | 1 + >> xen/arch/arm/lib/Makefile | 2 + >> xen/arch/arm/lib/memcpy-fromio.c | 55 ++ >> xen/arch/arm/lib/memcpy-toio.c | 55 ++ >> xen/common/domctl.c | 15 + >> xen/drivers/passthrough/device_tree.c | 6 + >> xen/include/public/arch-arm.h | 3 + >> xen/include/xen/io.h | 10 + >> 29 files changed, 2093 insertions(+), 1 deletion(-) >> create mode 100644 xen/arch/arm/firmware/scmi-proto.h >> create mode 100644 xen/arch/arm/firmware/scmi-shmem.c >> create mode 100644 xen/arch/arm/firmware/scmi-shmem.h >> create mode 100644 xen/arch/arm/firmware/scmi-smc-multiagent.c >> create mode 100644 xen/arch/arm/lib/Makefile >> create mode 100644 xen/arch/arm/lib/memcpy-fromio.c >> create mode 100644 xen/arch/arm/lib/memcpy-toio.c >> From xen-devel-bounces@lists.xenproject.org Wed May 20 06:37:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 06:37:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313598.1583726 (Exim 4.92) (envelope-from ) id 1wPaYk-0003cP-3H; Wed, 20 May 2026 06:37:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313598.1583726; Wed, 20 May 2026 06:37:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaYk-0003cI-0i; Wed, 20 May 2026 06:37:38 +0000 Received: by outflank-mailman (input) for mailman id 1313598; Wed, 20 May 2026 06:37:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPaYi-0003c9-Pu for xen-devel@lists.xenproject.org; Wed, 20 May 2026 06:37:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPaYi-004QKv-5g for xen-devel@lists.xenproject.org; Wed, 20 May 2026 08:37:36 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d56af-e002-0a2a0a5209dd-0a2a4505a774-4 for ; Wed, 20 May 2026 08:37:36 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d56af-aaa8-0a2a45050019-d155802cd91f-3 for ; Wed, 20 May 2026 08:37:35 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-48e82c23840so35782035e9.3 for ; Tue, 19 May 2026 23:37:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Tue, 19 May 2026 23:37:35 -0700 (PDT) Message-ID: <194504fb-686c-49d4-a962-44c407e39a74@suse.com> Date: Wed, 20 May 2026 08:37:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 3/5] pci: Use pci_sbdf_t in pci_device_detect() To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Teddy Astie References: <1779117762.8631fc262581453bbf619ec5b2062170.19e3baea7d1000f373@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779259055-DBB60443-DBA2172D/0/0 X-purgate-type: clean X-purgate-size: 761 On 20.05.2026 05:21, dmukhin@ford.com wrote: > On Mon, May 18, 2026 at 05:21:27PM +0200, Teddy Astie wrote: >> @@ -1510,25 +1508,24 @@ void __init ehci_dbgp_init(void) >> } >> else if ( strncmp(opt_dbgp + 4, "@pci", 4) == 0 ) >> { >> - unsigned int bus, slot, func; >> - >> - e = parse_pci(opt_dbgp + 8, NULL, &bus, &slot, &func); >> + pci_sbdf_t sbdf = PCI_SBDF(0, 0, 0, 0); >> + >> + e = parse_pci_sbdf(opt_dbgp + 8, &sbdf); > > The original logic was ignoring PCI segment, Not quite - it was demanding it to be either absent or 0. > now the full PCI address is allowed. This behavioral change (if indeed intended) definitely needs mentioning / justifying in the description. Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 06:40:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 06:40:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313603.1583736 (Exim 4.92) (envelope-from ) id 1wPab9-0005By-H5; Wed, 20 May 2026 06:40:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313603.1583736; Wed, 20 May 2026 06:40:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPab9-0005Bq-Cp; Wed, 20 May 2026 06:40:07 +0000 Received: by outflank-mailman (input) for mailman id 1313603; Wed, 20 May 2026 06:40:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPab8-00055r-5B for xen-devel@lists.xenproject.org; Wed, 20 May 2026 06:40:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPab7-0090oG-HJ for xen-devel@lists.xenproject.org; Wed, 20 May 2026 08:40:05 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d5735-bab6-0a2a0a5309dd-0a2a4509a7ba-42 for ; Wed, 20 May 2026 08:40:05 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d5745-2497-0a2a45090019-d1558035c079-3 for ; Wed, 20 May 2026 08:40:05 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-488a9033b2cso36067425e9.2 for ; Tue, 19 May 2026 23:40:05 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <49d0cbe5-1366-4539-9754-371e9507a54d@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779259205-8816CA53-E18902CE/0/0 X-purgate-type: clean X-purgate-size: 422 On 19.05.2026 18:28, Oleksii Kurochko wrote: > On 5/19/26 6:14 PM, Baptiste Le Duc wrote: >> According to the comment above initializing of CSR_VSTIMECMP should be used instead of CSR_STIMECM. > > Probably, it is something wrong with my e-mail app but this line looks > long enough. > > I think we have to follow 80 chars per line. Just to mention - for commit messages I think the limit is 75 or 76. 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Please check how ASSERT() works (and the difference to BUG_ON()). >> >> Condition itself looks correct for ASSERT(). If build_guest_isa_str() >> returns value equal to len then assert_failed() shouldn't be called. >> >> Maybe do you mean that it will never fire in release build then yes it >> should be changed to BUG_ON() and the condition should be inverted: >> BUG_ON(build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) != len); > > No. Unlike in BUG_ON(), you can't use expressions with side effects (i.e. > also function calls, unless they're const/pure) in ASSERT(). That's > true for standard C's assert() as well, i.e. not Xen specific at all. > (We do, however, diverge from assert() in another aspect.) Got you. Also it could be in release build that build_guest_isa_str() won't be called at all because of how ASSERT() is open-coded: if ( 0 && (p) ... Then probably it would be better to do in the following way: if ( build_guest_isa_str(d->arch.isa_str, len + 1, d->arch.isa) != len ) { XVFREE(d->arch.isa_str); return -EINVAL; } return 0; I am not sure that -EINVAL is the best one option but I don't see any better now. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 07:52:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 07:52:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313639.1583753 (Exim 4.92) (envelope-from ) id 1wPbie-0007FT-KY; Wed, 20 May 2026 07:51:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313639.1583753; Wed, 20 May 2026 07:51:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPbie-0007FM-HB; Wed, 20 May 2026 07:51:56 +0000 Received: by outflank-mailman (input) for mailman id 1313639; Wed, 20 May 2026 07:51:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPbid-0007Eu-9R for xen-devel@lists.xenproject.org; Wed, 20 May 2026 07:51:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPbic-00BwW4-I5 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 09:51:54 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0d681a-2eae-0a2a0a5409dd-0a2a450cce12-2 for ; Wed, 20 May 2026 09:51:54 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0d681a-62f1-0a2a450c0019-d1558033e99f-3 for ; Wed, 20 May 2026 09:51:54 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-4891d7164ddso25231775e9.3 for ; Wed, 20 May 2026 00:51:54 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I have to send this patch to git://github.com/dgibson/dtc, right? > Yes, that's the main DTC/libfdt repository. The patch to dtc repo was accepted and merged: https://github.com/dgibson/dtc/commit/f57e7df35df4a301961cbbf9433ba4e85c2ee5ed But current version of dtc is: $ cat https://github.com/dgibson/dtc/blob/main/VERSION.txt 1.7.2 Does it make sense to backport just one patch to Xen instead of updating update libfdt to 1.7.2 as it would be necessary to apply 61 patch on top of Xen's libfdt 1.6.1: $ git format-patch v1.6.1..main -- libfdt/ | wc -l 61 ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 07:56:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 07:56:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313650.1583762 (Exim 4.92) (envelope-from ) id 1wPbn2-0007sO-6Q; Wed, 20 May 2026 07:56:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313650.1583762; Wed, 20 May 2026 07:56:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPbn2-0007sH-3v; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zTYYu6yq6ZPFJtjxWZCJXl0gb0J3VljyDM/jMUchlsR9CaOHcJsH4yUFsK3+PWegnR/duUVVTieirAIDNjG8ZcO3z4u/bMeYNiApdpj5E7sHy9SWE7y1WMxQQaU+BEAr2g86zXf8n5LA0roexsjBQbx0HvfVJQ2OfhlwtXuQOV4/MUMOW9a4yqXOuX3/I/6RXJ9AZOCzLzZBjIPisiFueqRjxT//8luxKWgu70/0QDBQ3zy1DiQGnqMyMHM082gLY7GQVPkRp3GcGGP3whfJmcmd/dN2tMbJodNAkiQ3oTvhpoCb6Fbsn7fjthiQ86JdhcPLMiYjgEd9j6UK2BZ3g1qHtGHV/cXi0uU2zU04jNFtctnlqCPS5v7gdAgxkZP5s7xko8anKB9i1y/v8f3+AhVKZ788nIINo2G08mCk605CYWQOxQIuiSCDoSvTuW89 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2026 07:56:20.9368 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ac4ec057-90f4-4a21-3fe7-08deb6454800 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003444.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB9169 X-purgate-ID: tlsNG-720697/1779263785-AA56B161-A0CB02CD/0/0 X-purgate-type: clean X-purgate-size: 1415 On 20-May-26 09:51, Oleksii Kurochko wrote: > Hello Michal, > > On 5/19/26 11:37 AM, Orzel, Michal wrote: >>>> We treat libfdt as external library and we don't accept any edits here prior to >>>> first sending a fix to libfdt and then cherry-picking a patch (in fact, afacit >>>> we then do the libfdt version update). >>> >>> Thanks for clarifying that. >>> >>> Just to be sure I don't confuse something. >>> According to the commit ...: >>> >>> commit ad9cf6bde5b90d4c1e5a79a2803e98d6344c27d7 >>> Author: Vikram Garhwal >>> Date: Thu Nov 11 23:27:20 2021 -0800 >>> >>> Update libfdt to v1.6.1 >>> >>> Update libfdt to v1.6.1 of libfdt taken from >>> git://github.com/dgibson/dtc. >>> This update is done to support device tree overlays. >>> >>> ... I have to send this patch to git://github.com/dgibson/dtc, right? >> Yes, that's the main DTC/libfdt repository. > > The patch to dtc repo was accepted and merged: > https://github.com/dgibson/dtc/commit/f57e7df35df4a301961cbbf9433ba4e85c2ee5ed > > But current version of dtc is: > $ cat https://github.com/dgibson/dtc/blob/main/VERSION.txt > 1.7.2 > > Does it make sense to backport just one patch to Xen instead of updating We can backport this patch only the same way as for example here: d434dc4ac182 ("libfdt: overlay: change overlay_get_target()") ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 20 08:03:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 08:03:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313669.1583771 (Exim 4.92) (envelope-from ) id 1wPbtk-0001ub-E7; Wed, 20 May 2026 08:03:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313669.1583771; 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Wed, 20 May 2026 01:03:16 -0700 (PDT) From: Vijayanand Jitta Subject: [PATCH v15 0/3] of: parsing of multi #{iommu,msi}-cells in maps Date: Wed, 20 May 2026 13:32:39 +0530 Message-Id: <20260520-parse_iommu_cells-v15-0-b5f99ad4e7e8@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 8bit X-B4-Tracking: v=1; b=H4sIAJ9qDWoC/33QwU7DMAwA0F+ZcqZT7DSh4cR/IDS5jsMibetoW AWa+u+ku9BDysWSLftZ9l1lGZNk9bK7q1GmlNNwKQnYp53iI10+pEmhFBRqdNpoaK40Zjmk4Xy +HVhOp9wAG/PsOpK+J1XmrqPE9P1A395Lfkz5axh/Hjsmv1T/0ybf6KYN0LMIsxV4HXLef97ox KVrX4Ja0An0WvI1CXSh2GFkIksQui0KVhTaKgWFgiiRLGvpkLcoXFGmeh9goYJwDEZbEfJblPm jWt1VKVOoSB5BPDoH/RbVrihsq1S7UEFjBOgdm9qv5nn+BdtGt/ExAgAA X-Change-ID: 20260301-parse_iommu_cells-1c33768aebba To: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia Cc: linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Vijayanand Jitta , Charan Teja Kalla X-Mailer: b4 0.15.2 X-Developer-Signature: v=1; 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This typically does happen to be the case, but is not actually enforced (and the PCI msi-map binding even explicitly states support for 0 or 1 cells) - as a result we've now ended up with dodgy DTs out in the field which depend on this behaviour to map a 1-cell specifier for a 2-cell provider, despite that being bogus per the bindings themselves. Since there is some potential use[1] in being able to map at least single input IDs to multi-cell output specifiers (and properly support 0-cell outputs as well), add support for properly parsing and using the target nodes' #cells values, albeit with the unfortunate complication of still having to work around expectations of the old behaviour too. -- Robin. Unlike single #{}-cell, it is complex to establish a linear relation between input 'id' and output specifier for multi-cell properties, thus it is always expected that len never going to be > 1. These changes have been tested on QEMU for the arm64 architecture. Since, this would also need update in dt-schema, raised PR[2] for the same. [1] https://lore.kernel.org/all/20250627-video_cb-v3-0-51e18c0ffbce@quicinc.com/ [2] PR for iommu-map dtschema: https://github.com/devicetree-org/dt-schema/pull/184 V15: Address Sashiko AI review comments on v14: Patch 2: - [Critical] pci-imx6: pass &msi_filter (not NULL) to of_map_msi_id() so that of_map_id() returns -ENODEV when msi-map is absent, preventing the '!err_m && !msi_spec.np' path from incorrectly returning -EINVAL - [High] of_map_id(): explicitly set arg->np = NULL before any bypass path so callers can safely call of_node_put(arg->np) on all return paths - [Medium] of_msi_xlate(): pass msi_np directly to of_map_msi_id() and of_check_msi_parent() (removing the local_np/np indirection), and use 'break' (not 'continue') when msi_spec.np is NULL so that msi-parent bindings are still checked when msi-map is present but has no match - Guard 'id_out = msi_spec.args[0]' with 'args_count > 0' in of_msi_xlate() to correctly handle 0-cell MSI output specifiers - Use of_node_get() + unconditional of_node_put() in of_msi_xlate() for clearer reference ownership Patch 3: - [Critical] of_map_id(): add 'cells > MAX_PHANDLE_ARGS' check before using cells as an array index to prevent stack buffer overflow - [High] of_map_id(): the MAX_PHANDLE_ARGS bound on cells also prevents integer overflow in the '3 + cells' length check - [High] of_map_id(): fix misleading bad-map workaround message from "assuming extra cell of 0" to "treating as 1-cell output" to accurately describe the actual behavior - [Medium] of_msi_xlate(): guard 'id_out = msi_spec.args[0]' with 'args_count > 0' to preserve id_in for 0-cell MSI output specifiers Link to v14: https://patch.msgid.link/20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com V14: - Updated Patch 2 ("of: Factor arguments passed to of_map_id() into a struct") to fix below two issues in of_msi_xlate() that were introduced by the API refactoring: 1) The refactoring changed of_map_id()'s dual-purpose **target parameter to an explicit filter_np parameter. In of_msi_xlate(), this caused of_map_msi_id() to return 0 (pass-through) instead of -ENODEV when a node has no msi-map, terminating the device hierarchy walk prematurely before reaching the root complex node that has the msi-map. This broke MSI allocation for PCIe endpoint devices (e.g., wcn7850 Wi-Fi on ARM64). 2) Additionally, fsl_mc_get_msi_id() passes msi_np == NULL to of_msi_xlate(), which would dereference NULL with the new API. Link to v13: https://patch.msgid.link/20260408-parse_iommu_cells-v13-0-fa921e92661b@oss.qualcomm.com V13: - Fix bad_map handling in of_map_id(): 'cells' is re-initialized to 0 on each loop iteration, so the !bad_map guard was insufficient, cells stayed 0 for all entries after the first. Fix by explicitly setting cells=1 when bad_map is true on every iteration. - Collected Acked-by from Frank Li. Link to v12: https://patch.msgid.link/20260331-parse_iommu_cells-v12-0-decfd305eea9@oss.qualcomm.com V12: - Call of_node_put() unconditionally in imx_pcie_add_lut_by_rid() thereby addressing comments from Bjorn Helgaas. Link to v11: https://lore.kernel.org/r/20260325-parse_iommu_cells-v11-0-1fefa5c0e82c@oss.qualcomm.com V11: - Added explicit filter_np parameter to of_map_id() and of_map_msi_id() per Dmitry Baryshkov's review feedback, making the filter explicit instead of overloading arg->np as both input filter and output parameter. - Removed of_node_put() from inside of_map_id(), making the caller responsible for reference management. Updated of_msi_xlate() to properly handle reference counting. - Collected ACKed by tags, and fixed minor typos. Link to v10: https://lore.kernel.org/r/20260309-parse_iommu_cells-v10-0-c62fcaa5a1d8@oss.qualcomm.com V10: - Move of_map_iommu_id()/of_map_msi_id() from include/linux/of.h to drivers/of/base.c as out-of-line helpers per feedback from Marc Zyngier and Rob Herring. - Add kernel-doc to document both helpers for discoverability and usage clarity. - Fix of_map_msi_id() wrapper and all its callers (cdx_msi.c, irq-gic-its-msi-parent.c, drivers/of/irq.c) to correctly use the new struct of_phandle_args-based API with proper of_node_put() handling as per feeback from Dmitry. Link to v9: https://lore.kernel.org/r/20260301-parse_iommu_cells-v9-0-4d1bceecc5e1@oss.qualcomm.com V9: - Updated TO/CC list based on feedback to include all relevant maintainers. - No functional changes to the patches themselves. Link to V8: https://lore.kernel.org/all/20260226074245.3098486-1-vijayanand.jitta@oss.qualcomm.com/ V8: - Removed mentions of of_map_args from commit message to match code. Link to V7: https://lore.kernel.org/all/20260210101157.2145113-1-vijayanand.jitta@oss.qualcomm.com/ V7: - Removed of_map_id_args structure and replaced it with of_phandle_args as suggested by Dmitry. Link to V6: https://lore.kernel.org/all/20260121055400.937856-1-vijayanand.jitta@oss.qualcomm.com/ V6: - Fixed build error reported by kernel test bot. Link to V5: https://lore.kernel.org/all/20260118181125.1436036-1-vijayanand.jitta@oss.qualcomm.com/ V5: - Fixed Build Warnings. - Raised PR for iommu-map dtschema: https://github.com/devicetree-org/dt-schema/pull/184 Link to V4: https://lore.kernel.org/all/20251231114257.2382820-1-vijayanand.jitta@oss.qualcomm.com/ V4: - Added Reviewed-by tag. - Resolved warnings reported by kernel test bot, minor code reorganization. Link to V3: https://lore.kernel.org/all/20251221213602.2413124-1-vijayanand.jitta@oss.qualcomm.com/ V3: - Added Reviewed-by tag. - Updated of_map_id_args struct as a wrapper to of_phandle_args and added comment description as suggested by Rob Herring. Link to V2: https://lore.kernel.org/all/20251204095530.8627-1-vijayanand.jitta@oss.qualcomm.com/ V2: - Incorporated the patches from Robin that does the clean implementation. - Dropped the patches the were adding multi-map support from this series as suggested. V1: https://lore.kernel.org/all/cover.1762235099.git.charan.kalla@oss.qualcomm.com/ RFC: https://lore.kernel.org/all/20250928171718.436440-1-charan.kalla@oss.qualcomm.com/#r Signed-off-by: Vijayanand Jitta --- To: Nipun Gupta To: Nikhil Agarwal To: Joerg Roedel To: Will Deacon To: Robin Murphy To: Lorenzo Pieralisi To: Marc Zyngier To: Thomas Gleixner To: Rob Herring To: Saravana Kannan To: Richard Zhu To: Lucas Stach To: Krzysztof Wilczyński To: Manivannan Sadhasivam To: Bjorn Helgaas To: Frank Li To: Sascha Hauer To: Pengutronix Kernel Team To: Fabio Estevam To: Juergen Gross To: Stefano Stabellini To: Oleksandr Tyshchenko Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: iommu@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: imx@lists.linux.dev Cc: xen-devel@lists.xenproject.org --- To: Nipun Gupta To: Nikhil Agarwal To: Joerg Roedel To: Will Deacon To: Robin Murphy To: Lorenzo Pieralisi To: Marc Zyngier To: Thomas Gleixner To: Rob Herring To: Saravana Kannan To: Richard Zhu To: Lucas Stach To: Krzysztof Wilczyński To: Manivannan Sadhasivam To: Bjorn Helgaas To: Frank Li To: Sascha Hauer To: Pengutronix Kernel Team To: Fabio Estevam To: Juergen Gross To: Stefano Stabellini To: Oleksandr Tyshchenko Cc: linux-arm-msm@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: iommu@lists.linux.dev Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Cc: linux-pci@vger.kernel.org Cc: imx@lists.linux.dev Cc: xen-devel@lists.xenproject.org --- Charan Teja Kalla (1): of: Factor arguments passed to of_map_id() into a struct Robin Murphy (2): of: Add convenience wrappers for of_map_id() of: Respect #{iommu,msi}-cells in maps drivers/cdx/cdx_msi.c | 10 +- drivers/iommu/of_iommu.c | 6 +- drivers/irqchip/irq-gic-its-msi-parent.c | 10 +- drivers/of/base.c | 227 +++++++++++++++++++++++++------ drivers/of/irq.c | 25 +++- drivers/pci/controller/dwc/pci-imx6.c | 55 ++++---- drivers/pci/controller/pcie-apple.c | 6 +- drivers/xen/grant-dma-ops.c | 5 +- include/linux/of.h | 32 ++++- 9 files changed, 277 insertions(+), 99 deletions(-) --- base-commit: e98d21c170b01ddef366f023bbfcf6b31509fa83 change-id: 20260301-parse_iommu_cells-1c33768aebba Best regards, -- Vijayanand Jitta From xen-devel-bounces@lists.xenproject.org Wed May 20 08:03:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 08:03:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313671.1583781 (Exim 4.92) (envelope-from ) id 1wPbtt-0002BB-RE; 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This will also make it easier to then change of_map_id() to correctly account for specifier cells. Reviewed-by: Rob Herring (Arm) Reviewed-by: Frank Li Acked-by: Marc Zyngier Acked-by: Bjorn Helgaas Signed-off-by: Robin Murphy Signed-off-by: Vijayanand Jitta --- drivers/cdx/cdx_msi.c | 5 ++--- drivers/iommu/of_iommu.c | 4 +--- drivers/irqchip/irq-gic-its-msi-parent.c | 2 +- drivers/of/base.c | 38 ++++++++++++++++++++++++++++++++ drivers/of/irq.c | 3 +-- drivers/pci/controller/dwc/pci-imx6.c | 6 ++--- drivers/pci/controller/pcie-apple.c | 3 +-- drivers/xen/grant-dma-ops.c | 3 +-- include/linux/of.h | 18 +++++++++++++++ 9 files changed, 65 insertions(+), 17 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 91b95422b263..78edb7308856 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -128,10 +128,9 @@ static int cdx_msi_prepare(struct irq_domain *msi_domain, int ret; /* Retrieve device ID from requestor ID using parent device */ - ret = of_map_id(parent->of_node, cdx_dev->msi_dev_id, "msi-map", "msi-map-mask", - NULL, &dev_id); + ret = of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &dev_id); if (ret) { - dev_err(dev, "of_map_id failed for MSI: %d\n", ret); + dev_err(dev, "of_map_msi_id failed for MSI: %d\n", ret); return ret; } diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 6b989a62def2..a511ecf21fcd 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -48,9 +48,7 @@ static int of_iommu_configure_dev_id(struct device_node *master_np, struct of_phandle_args iommu_spec = { .args_count = 1 }; int err; - err = of_map_id(master_np, *id, "iommu-map", - "iommu-map-mask", &iommu_spec.np, - iommu_spec.args); + err = of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); if (err) return err; diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq-gic-its-msi-parent.c index d36b278ae66c..b63343a227a9 100644 --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -180,7 +180,7 @@ static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u struct device_node *msi_ctrl __free(device_node) = NULL; - return of_map_id(dev->of_node, dev->id, "msi-map", "msi-map-mask", &msi_ctrl, dev_id); + return of_map_msi_id(dev->of_node, dev->id, &msi_ctrl, dev_id); } static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev, diff --git a/drivers/of/base.c b/drivers/of/base.c index a650c91897cc..1e9b9692c0d9 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2221,3 +2221,41 @@ int of_map_id(const struct device_node *np, u32 id, return 0; } EXPORT_SYMBOL_GPL(of_map_id); + +/** + * of_map_iommu_id - Translate an ID using "iommu-map" bindings. + * @np: root complex device node. + * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform + * stream/device ID) used as the lookup key in the iommu-map table. + * @target: optional pointer to a target device node. + * @id_out: optional pointer to receive the translated ID. + * + * Convenience wrapper around of_map_id() using "iommu-map" and "iommu-map-mask". + * + * Return: 0 on success or a standard error code on failure. + */ +int of_map_iommu_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "iommu-map", "iommu-map-mask", target, id_out); +} +EXPORT_SYMBOL_GPL(of_map_iommu_id); + +/** + * of_map_msi_id - Translate an ID using "msi-map" bindings. + * @np: root complex device node. + * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform + * stream/device ID) used as the lookup key in the msi-map table. + * @target: optional pointer to a target device node. + * @id_out: optional pointer to receive the translated ID. + * + * Convenience wrapper around of_map_id() using "msi-map" and "msi-map-mask". + * + * Return: 0 on success or a standard error code on failure. + */ +int of_map_msi_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return of_map_id(np, id, "msi-map", "msi-map-mask", target, id_out); +} +EXPORT_SYMBOL_GPL(of_map_msi_id); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index 6367c67732d2..e37c1b3f8736 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -817,8 +817,7 @@ u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, u32 id_in) * "msi-map" or an "msi-parent" property. */ for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) { - if (!of_map_id(parent_dev->of_node, id_in, "msi-map", - "msi-map-mask", msi_np, &id_out)) + if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &id_out)) break; if (!of_check_msi_parent(parent_dev->of_node, msi_np)) break; diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 1034ac5c5f5c..c863c7b02289 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1128,8 +1128,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) u32 sid = 0; target = NULL; - err_i = of_map_id(dev->of_node, rid, "iommu-map", "iommu-map-mask", - &target, &sid_i); + err_i = of_map_iommu_id(dev->of_node, rid, &target, &sid_i); if (target) { of_node_put(target); } else { @@ -1142,8 +1141,7 @@ static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) } target = NULL; - err_m = of_map_id(dev->of_node, rid, "msi-map", "msi-map-mask", - &target, &sid_m); + err_m = of_map_msi_id(dev->of_node, rid, &target, &sid_m); /* * err_m target diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index 2d92fc79f6dd..a0937b7b3c4d 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -764,8 +764,7 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); - err = of_map_id(port->pcie->dev->of_node, rid, "iommu-map", - "iommu-map-mask", NULL, &sid); + err = of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); if (err) return err; diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index c2603e700178..1b7696b2d762 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -325,8 +325,7 @@ static int xen_dt_grant_init_backend_domid(struct device *dev, struct pci_dev *pdev = to_pci_dev(dev); u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn); - if (of_map_id(np, rid, "iommu-map", "iommu-map-mask", &iommu_spec.np, - iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index 959786f8f196..721525334b4b 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -468,6 +468,12 @@ int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, struct device_node **target, u32 *id_out); +int of_map_iommu_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out); + +int of_map_msi_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out); + phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); struct kimage; @@ -948,6 +954,18 @@ static inline int of_map_id(const struct device_node *np, u32 id, return -EINVAL; } +static inline int of_map_iommu_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return -EINVAL; +} + +static inline int of_map_msi_id(const struct device_node *np, u32 id, + struct device_node **target, u32 *id_out) +{ + return -EINVAL; +} + static inline phys_addr_t of_dma_get_max_cpu_address(struct device_node *np) { return PHYS_ADDR_MAX; -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 20 08:03:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 08:03:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313675.1583790 (Exim 4.92) (envelope-from ) id 1wPbu6-0002aO-2v; Wed, 20 May 2026 08:03:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313675.1583790; Wed, 20 May 2026 08:03:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPbu5-0002Zd-Vh; Wed, 20 May 2026 08:03:45 +0000 Received: by outflank-mailman (input) for mailman id 1313675; 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Update all callers accordingly. Add an explicit filter_np parameter to of_map_id() and of_map_msi_id() to separate the filter input from the output. Previously, the target parameter served dual purpose: as an input filter (if non-NULL, only match entries targeting that node) and as an output (receiving the matched node with a reference held). Now filter_np is the explicit input filter and arg->np is the pure output. Previously, of_map_id() would call of_node_put() on the matched node when a filter was provided, making reference ownership inconsistent. Remove this internal of_node_put() call so that of_map_id() now always transfers ownership of the matched node reference to the caller via arg->np. Callers are now consistently responsible for releasing this reference with of_node_put(arg->np) when done. Acked-by: Frank Li Suggested-by: Rob Herring (Arm) Suggested-by: Dmitry Baryshkov Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta --- drivers/cdx/cdx_msi.c | 7 ++-- drivers/iommu/of_iommu.c | 4 +- drivers/irqchip/irq-gic-its-msi-parent.c | 10 +++-- drivers/of/base.c | 71 ++++++++++++++++++-------------- drivers/of/irq.c | 24 ++++++++--- drivers/pci/controller/dwc/pci-imx6.c | 53 ++++++++++++------------ drivers/pci/controller/pcie-apple.c | 5 ++- drivers/xen/grant-dma-ops.c | 4 +- include/linux/of.h | 16 ++++--- 9 files changed, 114 insertions(+), 80 deletions(-) diff --git a/drivers/cdx/cdx_msi.c b/drivers/cdx/cdx_msi.c index 78edb7308856..c8d832b0b1f5 100644 --- a/drivers/cdx/cdx_msi.c +++ b/drivers/cdx/cdx_msi.c @@ -121,22 +121,23 @@ static int cdx_msi_prepare(struct irq_domain *msi_domain, struct device *dev, int nvec, msi_alloc_info_t *info) { + struct of_phandle_args msi_spec = {}; struct cdx_device *cdx_dev = to_cdx_device(dev); struct device *parent = cdx_dev->cdx->dev; struct msi_domain_info *msi_info; - u32 dev_id; int ret; /* Retrieve device ID from requestor ID using parent device */ - ret = of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &dev_id); + ret = of_map_msi_id(parent->of_node, cdx_dev->msi_dev_id, NULL, &msi_spec); if (ret) { dev_err(dev, "of_map_msi_id failed for MSI: %d\n", ret); return ret; } + of_node_put(msi_spec.np); #ifdef GENERIC_MSI_DOMAIN_OPS /* Set the device Id to be passed to the GIC-ITS */ - info->scratchpad[0].ul = dev_id; + info->scratchpad[0].ul = msi_spec.args[0]; #endif msi_info = msi_get_domain_info(msi_domain->parent); diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index a511ecf21fcd..a18bb60f6f3d 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -45,10 +45,10 @@ static int of_iommu_configure_dev_id(struct device_node *master_np, struct device *dev, const u32 *id) { - struct of_phandle_args iommu_spec = { .args_count = 1 }; + struct of_phandle_args iommu_spec = {}; int err; - err = of_map_iommu_id(master_np, *id, &iommu_spec.np, iommu_spec.args); + err = of_map_iommu_id(master_np, *id, &iommu_spec); if (err) return err; diff --git a/drivers/irqchip/irq-gic-its-msi-parent.c b/drivers/irqchip/irq-gic-its-msi-parent.c index b63343a227a9..b9257103a999 100644 --- a/drivers/irqchip/irq-gic-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-its-msi-parent.c @@ -152,6 +152,8 @@ static int its_v5_pci_msi_prepare(struct irq_domain *domain, struct device *dev, static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u32 *dev_id, phys_addr_t *pa) { + struct device_node *msi_ctrl = NULL; + struct of_phandle_args msi_spec = {}; struct of_phandle_iterator it; int ret; @@ -178,9 +180,11 @@ static int of_pmsi_get_msi_info(struct irq_domain *domain, struct device *dev, u } } - struct device_node *msi_ctrl __free(device_node) = NULL; - - return of_map_msi_id(dev->of_node, dev->id, &msi_ctrl, dev_id); + ret = of_map_msi_id(dev->of_node, dev->id, &msi_ctrl, &msi_spec); + if (!ret) + *dev_id = msi_spec.args[0]; + of_node_put(msi_spec.np); + return ret; } static int its_pmsi_prepare(struct irq_domain *domain, struct device *dev, diff --git a/drivers/of/base.c b/drivers/of/base.c index 1e9b9692c0d9..d658c2620135 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2122,36 +2122,40 @@ int of_find_last_cache_level(unsigned int cpu) * @id: device ID to map. * @map_name: property name of the map to use. * @map_mask_name: optional property name of the mask to use. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @filter_np: pointer to an optional filter node, or NULL to allow bypass. + * If non-NULL, the map property must exist (-ENODEV if absent). If + * *filter_np is also non-NULL, only entries targeting that node match. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] will contain the translated ID. If a map entry was + * matched, @arg->np will be set to the target node with a reference + * held that the caller must release with of_node_put(). * * Given a device ID, look up the appropriate implementation-defined * platform ID and/or the target device which receives transactions on that - * ID, as per the "iommu-map" and "msi-map" bindings. Either of @target or - * @id_out may be NULL if only the other is required. If @target points to - * a non-NULL device node pointer, only entries targeting that node will be - * matched; if it points to a NULL value, it will receive the device node of - * the first matching target phandle, with a reference held. + * ID, as per the "iommu-map" and "msi-map" bindings. * * Return: 0 on success or a standard error code on failure. */ int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct device_node * const *filter_np, struct of_phandle_args *arg) { u32 map_mask, masked_id; int map_len; const __be32 *map = NULL; - if (!np || !map_name || (!target && !id_out)) + if (!np || !map_name || !arg) return -EINVAL; + /* Ensure bypass/no-match success never returns a stale target node. */ + arg->np = NULL; map = of_get_property(np, map_name, &map_len); if (!map) { - if (target) + if (filter_np) return -ENODEV; /* Otherwise, no map implies no translation */ - *id_out = id; + arg->args[0] = id; + arg->args_count = 1; return 0; } @@ -2193,18 +2197,14 @@ int of_map_id(const struct device_node *np, u32 id, if (!phandle_node) return -ENODEV; - if (target) { - if (*target) - of_node_put(phandle_node); - else - *target = phandle_node; - - if (*target != phandle_node) - continue; + if (filter_np && *filter_np && *filter_np != phandle_node) { + of_node_put(phandle_node); + continue; } - if (id_out) - *id_out = masked_id - id_base + out_base; + arg->np = phandle_node; + arg->args[0] = masked_id - id_base + out_base; + arg->args_count = 1; pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, length: %08x, id: %08x -> %08x\n", np, map_name, map_mask, id_base, out_base, @@ -2213,11 +2213,11 @@ int of_map_id(const struct device_node *np, u32 id, } pr_info("%pOF: no %s translation for id 0x%x on %pOF\n", np, map_name, - id, target && *target ? *target : NULL); + id, filter_np && *filter_np ? *filter_np : NULL); /* Bypasses translation */ - if (id_out) - *id_out = id; + arg->args[0] = id; + arg->args_count = 1; return 0; } EXPORT_SYMBOL_GPL(of_map_id); @@ -2227,17 +2227,19 @@ EXPORT_SYMBOL_GPL(of_map_id); * @np: root complex device node. * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform * stream/device ID) used as the lookup key in the iommu-map table. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] contains the translated ID. If a map entry was matched, + * @arg->np holds a reference to the target node that the caller must + * release with of_node_put(). * * Convenience wrapper around of_map_id() using "iommu-map" and "iommu-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_phandle_args *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", target, id_out); + return of_map_id(np, id, "iommu-map", "iommu-map-mask", NULL, arg); } EXPORT_SYMBOL_GPL(of_map_iommu_id); @@ -2246,16 +2248,21 @@ EXPORT_SYMBOL_GPL(of_map_iommu_id); * @np: root complex device node. * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform * stream/device ID) used as the lookup key in the msi-map table. - * @target: optional pointer to a target device node. - * @id_out: optional pointer to receive the translated ID. + * @filter_np: pointer to an optional filter node, or NULL to allow bypass. + * If non-NULL, the map property must exist (-ENODEV if absent). If + * *filter_np is also non-NULL, only entries targeting that node match. + * @arg: pointer to a &struct of_phandle_args for the result. On success, + * @arg->args[0] contains the translated ID. If a map entry was matched, + * @arg->np holds a reference to the target node that the caller must + * release with of_node_put(). * * Convenience wrapper around of_map_id() using "msi-map" and "msi-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct device_node * const *filter_np, struct of_phandle_args *arg) { - return of_map_id(np, id, "msi-map", "msi-map-mask", target, id_out); + return of_map_id(np, id, "msi-map", "msi-map-mask", filter_np, arg); } EXPORT_SYMBOL_GPL(of_map_msi_id); diff --git a/drivers/of/irq.c b/drivers/of/irq.c index e37c1b3f8736..e63a43be6c4a 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -796,14 +796,15 @@ static int of_check_msi_parent(struct device_node *dev_node, struct device_node /** * of_msi_xlate - map a MSI ID and find relevant MSI controller node * @dev: device for which the mapping is to be done. - * @msi_np: Pointer to target MSI controller node + * @msi_np: Pointer to target MSI controller node, or NULL if the caller + * only needs the translated ID without receiving the controller node. + * If non-NULL and pointing to a non-NULL node, only entries targeting + * that node will be matched. If non-NULL and pointing to NULL, it will + * receive the first matching target node with a reference held. * @id_in: Device ID. * * Walk up the device hierarchy looking for devices with a "msi-map" * or "msi-parent" property. If found, apply the mapping to @id_in. - * If @msi_np points to a non-NULL device node pointer, only entries targeting - * that node will be matched; if it points to a NULL value, it will receive the - * device node of the first matching target phandle, with a reference held. * * Returns: The mapped MSI id. */ @@ -817,8 +818,21 @@ u32 of_msi_xlate(struct device *dev, struct device_node **msi_np, u32 id_in) * "msi-map" or an "msi-parent" property. */ for (parent_dev = dev; parent_dev; parent_dev = parent_dev->parent) { - if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &id_out)) + struct of_phandle_args msi_spec = {}; + + if (!of_map_msi_id(parent_dev->of_node, id_in, msi_np, &msi_spec)) { + if (msi_spec.np) { + /* msi-map matched: use the translated ID and target node */ + if (msi_spec.args_count > 0) + id_out = msi_spec.args[0]; + if (msi_np && !*msi_np) + *msi_np = of_node_get(msi_spec.np); + of_node_put(msi_spec.np); + } + /* msi-map present but no match → stop walking */ break; + } + /* -ENODEV: msi-map absent → check for msi-parent */ if (!of_check_msi_parent(parent_dev->of_node, msi_np)) break; } diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index c863c7b02289..105038c15aa8 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1121,41 +1121,42 @@ static void imx_pcie_remove_lut(struct imx_pcie *imx_pcie, u16 rid) static int imx_pcie_add_lut_by_rid(struct imx_pcie *imx_pcie, u32 rid) { + struct of_phandle_args iommu_spec = {}; + struct of_phandle_args msi_spec = {}; struct device *dev = imx_pcie->pci->dev; - struct device_node *target; + struct device_node *msi_filter = NULL; u32 sid_i, sid_m; int err_i, err_m; u32 sid = 0; - target = NULL; - err_i = of_map_iommu_id(dev->of_node, rid, &target, &sid_i); - if (target) { - of_node_put(target); - } else { - /* - * "target == NULL && err_i == 0" means RID out of map range. - * Use 1:1 map RID to streamID. Hardware can't support this - * because the streamID is only 6 bits - */ - err_i = -EINVAL; + err_i = of_map_iommu_id(dev->of_node, rid, &iommu_spec); + if (!err_i) { + if (!iommu_spec.np) + /* + * "iommu_spec.np == NULL && err_i == 0" means RID out of map + * range. Use 1:1 map RID to streamID. Hardware can't support + * this because the streamID is only 6 bits. + */ + err_i = -EINVAL; + else + sid_i = iommu_spec.args[0]; } + of_node_put(iommu_spec.np); - target = NULL; - err_m = of_map_msi_id(dev->of_node, rid, &target, &sid_m); - + err_m = of_map_msi_id(dev->of_node, rid, &msi_filter, &msi_spec); /* - * err_m target - * 0 NULL RID out of range. Use 1:1 map RID to - * streamID, Current hardware can't - * support it, so return -EINVAL. - * != 0 NULL msi-map does not exist, use built-in MSI - * 0 != NULL Get correct streamID from RID - * != 0 != NULL Invalid combination + * err_m msi_spec.np + * 0 != NULL Got correct streamID from RID via msi-map + * 0 NULL msi-map present but RID out of range + * -ENODEV NULL msi-map absent, use built-in MSI controller */ - if (!err_m && !target) - return -EINVAL; - else if (target) - of_node_put(target); /* Find streamID map entry for RID in msi-map */ + if (!err_m) { + if (!msi_spec.np) + /* msi-map present but RID out of range */ + return -EINVAL; + sid_m = msi_spec.args[0]; + } + of_node_put(msi_spec.np); /* * msi-map iommu-map diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c index a0937b7b3c4d..c2cffc0659f4 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -755,6 +755,7 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d { u32 sid, rid = pci_dev_id(pdev); struct apple_pcie_port *port; + struct of_phandle_args iommu_spec = {}; int idx, err; port = apple_pcie_get_port(pdev); @@ -764,10 +765,12 @@ static int apple_pcie_enable_device(struct pci_host_bridge *bridge, struct pci_d dev_dbg(&pdev->dev, "added to bus %s, index %d\n", pci_name(pdev->bus->self), port->idx); - err = of_map_iommu_id(port->pcie->dev->of_node, rid, NULL, &sid); + err = of_map_iommu_id(port->pcie->dev->of_node, rid, &iommu_spec); if (err) return err; + of_node_put(iommu_spec.np); + sid = iommu_spec.args[0]; mutex_lock(&port->pcie->lock); idx = bitmap_find_free_region(port->sid_map, port->sid_map_sz, 0); diff --git a/drivers/xen/grant-dma-ops.c b/drivers/xen/grant-dma-ops.c index 1b7696b2d762..2aa1a772a0ff 100644 --- a/drivers/xen/grant-dma-ops.c +++ b/drivers/xen/grant-dma-ops.c @@ -319,13 +319,13 @@ static int xen_dt_grant_init_backend_domid(struct device *dev, struct device_node *np, domid_t *backend_domid) { - struct of_phandle_args iommu_spec = { .args_count = 1 }; + struct of_phandle_args iommu_spec = {}; if (dev_is_pci(dev)) { struct pci_dev *pdev = to_pci_dev(dev); u32 rid = PCI_DEVID(pdev->bus->number, pdev->devfn); - if (of_map_iommu_id(np, rid, &iommu_spec.np, iommu_spec.args)) { + if (of_map_iommu_id(np, rid, &iommu_spec)) { dev_dbg(dev, "Cannot translate ID\n"); return -ESRCH; } diff --git a/include/linux/of.h b/include/linux/of.h index 721525334b4b..ea50b45d9ff7 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -466,13 +466,15 @@ bool of_console_check(const struct device_node *dn, char *name, int index); int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out); + struct device_node * const *filter_np, + struct of_phandle_args *arg); int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out); + struct of_phandle_args *arg); int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out); + struct device_node * const *filter_np, + struct of_phandle_args *arg); phys_addr_t of_dma_get_max_cpu_address(struct device_node *np); @@ -949,19 +951,21 @@ static inline void of_property_clear_flag(struct property *p, unsigned long flag static inline int of_map_id(const struct device_node *np, u32 id, const char *map_name, const char *map_mask_name, - struct device_node **target, u32 *id_out) + struct device_node * const *filter_np, + struct of_phandle_args *arg) { return -EINVAL; } static inline int of_map_iommu_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct of_phandle_args *arg) { return -EINVAL; } static inline int of_map_msi_id(const struct device_node *np, u32 id, - struct device_node **target, u32 *id_out) + struct device_node * const *filter_np, + struct of_phandle_args *arg) { return -EINVAL; } -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Wed May 20 08:03:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 08:03:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313680.1583798 (Exim 4.92) (envelope-from ) id 1wPbuG-00031B-CM; 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a=ed25519-sha256; t=1779264185; l=12523; i=vijayanand.jitta@oss.qualcomm.com; s=20260301; h=from:subject:message-id; bh=xwYkAEs+q6jRw+I3dHPltl1MmPPWsBwiOXNPNgKt/0c=; b=wcATq9lX5Bq1e8erTyBpni5Dih/s1c6wO9/NnG4qxR1ffvxl+OPEk6rtMC5rr4W4VoKcAWrsQ FdmlXhXN/pYDkytoi0wtNZgLMf9D1M6bGdq1x4YOiNvy+TxTUK7PV8y X-Developer-Key: i=vijayanand.jitta@oss.qualcomm.com; a=ed25519; pk=Lpi7Cs3wHe8KZtqvyci7FTOLzsKpEHKGCaPNZw+1zRI= X-Proofpoint-GUID: 29FMm-Cl_aVgQUlfrOW5VikvhV-mWiL9 X-Authority-Analysis: v=2.4 cv=LcMMLDfi c=1 sm=1 tr=0 ts=6a0d6ae8 cx=c_pps a=0uOsjrqzRL749jD1oC5vDA==:117 a=ZePRamnt/+rB5gQjfz0u9A==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22 a=7CQSdrXTAAAA:8 a=EUspDBNiAAAA:8 a=9707C7GnR82a18xSEiYA:9 a=QEXdDO2ut3YA:10 a=mQ_c8vxmzFEMiUWkPHU9:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: 29FMm-Cl_aVgQUlfrOW5VikvhV-mWiL9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIwMDA3NiBTYWx0ZWRfX3bwDKyymN2ei okqtmslm7SxvtwsxMosUHT9hQ5f2jFy70LzavHneOTkz5jctFC1XWpNK3w+eo9u0X3wZgVTxiU3 VWfKQ9snZUr4L/FcfMwWAXpFPmOnjhmlpcGgvgEFXpap3KXwiEHfr84VpmnHdwQAJzN1/Evqvks Kip1jwxlkX5Ucxh9X6M8WKhrcRZ6pBN1+YXSCMJj1hCJEsEr4g+5Kqe2IzGJfJxs34jrwgyRspE yOQYc4Vvm7d4u8TakyKUi52Cn5sZoE/HSUiYhQAp2WGxqkvDBWO9ZLA92ZqJNXLAEmxnz/AMIbQ npeZ2wSVvFmGgROyNSjoTn5/I9x3LPsTDaXwsPBz52TtNsrnKCcrYcFycnAe0pvKmxJ2GBU5ixN 0H+RwbdB9aKVZC+d3y/mUele9EGqvV/Nhtvezyfy9t6BaxoYTrJ/303i6ee0IfJRv3lDxGo8lC/ KM44pEWg1KvgHERbMzQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-20_01,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 phishscore=0 spamscore=0 priorityscore=1501 clxscore=1015 bulkscore=0 adultscore=0 malwarescore=0 lowpriorityscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605200076 X-purgate-ID: tlsNG-42698a/1779264234-21F84F3B-2466D821/0/0 X-purgate-type: clean X-purgate-size: 12570 From: Robin Murphy So far our parsing of {iommu,msi}-map properties has always blindly assumed that the output specifiers will always have exactly 1 cell. This typically does happen to be the case, but is not actually enforced (and the PCI msi-map binding even explicitly states support for 0 or 1 cells) - as a result we've now ended up with dodgy DTs out in the field which depend on this behaviour to map a 1-cell specifier for a 2-cell provider, despite that being bogus per the bindings themselves. Since there is some potential use in being able to map at least single input IDs to multi-cell output specifiers (and properly support 0-cell outputs as well), add support for properly parsing and using the target nodes' #cells values, albeit with the unfortunate complication of still having to work around expectations of the old behaviour too. Since there are multi-cell output specifiers, the callers of of_map_id() may need to get the exact cell output value for further processing. Update of_map_id() to set args_count in the output to reflect the actual number of output specifier cells. Signed-off-by: Robin Murphy Signed-off-by: Charan Teja Kalla Signed-off-by: Vijayanand Jitta --- drivers/of/base.c | 166 +++++++++++++++++++++++++++++++++++++++++------------ include/linux/of.h | 6 +- 2 files changed, 134 insertions(+), 38 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index d658c2620135..f436e2676381 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -2116,19 +2116,49 @@ int of_find_last_cache_level(unsigned int cpu) return cache_level; } +/* + * Some DTs have an iommu-map targeting a 2-cell IOMMU node while + * specifying only 1 cell. Fortunately they all consist of value '1' + * as the 2nd cell entry with the same target, so check for that pattern. + * + * Example: + * IOMMU node: + * #iommu-cells = <2>; + * + * Device node: + * iommu-map = <0x0000 &smmu 0x0000 0x1>, + * <0x0100 &smmu 0x0100 0x1>; + */ +static bool of_check_bad_map(const __be32 *map, int len) +{ + __be32 phandle = map[1]; + + if (len % 4) + return false; + for (int i = 0; i < len; i += 4) { + if (map[i + 1] != phandle || map[i + 3] != cpu_to_be32(1)) + return false; + } + return true; +} + /** * of_map_id - Translate an ID through a downstream mapping. * @np: root complex device node. * @id: device ID to map. * @map_name: property name of the map to use. + * @cells_name: property name of target specifier cells. * @map_mask_name: optional property name of the mask to use. * @filter_np: pointer to an optional filter node, or NULL to allow bypass. * If non-NULL, the map property must exist (-ENODEV if absent). If * *filter_np is also non-NULL, only entries targeting that node match. * @arg: pointer to a &struct of_phandle_args for the result. On success, - * @arg->args[0] will contain the translated ID. If a map entry was - * matched, @arg->np will be set to the target node with a reference - * held that the caller must release with of_node_put(). + * @arg->args_count will be set to the number of output specifier cells + * as defined by @cells_name in the target node, and + * @arg->args[0..args_count-1] will contain the translated output + * specifier values. If a map entry was matched, @arg->np will be set + * to the target node with a reference held that the caller must release + * with of_node_put(). * * Given a device ID, look up the appropriate implementation-defined * platform ID and/or the target device which receives transactions on that @@ -2137,11 +2167,13 @@ int of_find_last_cache_level(unsigned int cpu) * Return: 0 on success or a standard error code on failure. */ int of_map_id(const struct device_node *np, u32 id, - const char *map_name, const char *map_mask_name, + const char *map_name, const char *cells_name, + const char *map_mask_name, struct device_node * const *filter_np, struct of_phandle_args *arg) { u32 map_mask, masked_id; - int map_len; + int map_bytes, map_len, offset = 0; + bool bad_map = false; const __be32 *map = NULL; if (!np || !map_name || !arg) @@ -2149,7 +2181,7 @@ int of_map_id(const struct device_node *np, u32 id, /* Ensure bypass/no-match success never returns a stale target node. */ arg->np = NULL; - map = of_get_property(np, map_name, &map_len); + map = of_get_property(np, map_name, &map_bytes); if (!map) { if (filter_np) return -ENODEV; @@ -2159,11 +2191,9 @@ int of_map_id(const struct device_node *np, u32 id, return 0; } - if (!map_len || map_len % (4 * sizeof(*map))) { - pr_err("%pOF: Error: Bad %s length: %d\n", np, - map_name, map_len); - return -EINVAL; - } + if (map_bytes % sizeof(*map)) + goto err_map_len; + map_len = map_bytes / sizeof(*map); /* The default is to select all bits. */ map_mask = 0xffffffff; @@ -2176,39 +2206,93 @@ int of_map_id(const struct device_node *np, u32 id, of_property_read_u32(np, map_mask_name, &map_mask); masked_id = map_mask & id; - for ( ; map_len > 0; map_len -= 4 * sizeof(*map), map += 4) { + + while (offset < map_len) { struct device_node *phandle_node; - u32 id_base = be32_to_cpup(map + 0); - u32 phandle = be32_to_cpup(map + 1); - u32 out_base = be32_to_cpup(map + 2); - u32 id_len = be32_to_cpup(map + 3); + u32 id_base, phandle, id_len, id_off, cells = 0; + const __be32 *out_base; + + if (map_len - offset < 2) + goto err_map_len; + + id_base = be32_to_cpup(map + offset); if (id_base & ~map_mask) { - pr_err("%pOF: Invalid %s translation - %s-mask (0x%x) ignores id-base (0x%x)\n", - np, map_name, map_name, - map_mask, id_base); + pr_err("%pOF: Invalid %s translation - %s (0x%x) ignores id-base (0x%x)\n", + np, map_name, map_mask_name, map_mask, id_base); return -EFAULT; } - if (masked_id < id_base || masked_id >= id_base + id_len) - continue; - + phandle = be32_to_cpup(map + offset + 1); phandle_node = of_find_node_by_phandle(phandle); if (!phandle_node) return -ENODEV; + if (bad_map) { + cells = 1; + } else if (of_property_read_u32(phandle_node, cells_name, &cells)) { + pr_err("%pOF: missing %s property\n", phandle_node, cells_name); + of_node_put(phandle_node); + return -EINVAL; + } + + if (cells > MAX_PHANDLE_ARGS) { + pr_err("%pOF: %s cell count %d exceeds maximum\n", + phandle_node, cells_name, cells); + of_node_put(phandle_node); + return -EINVAL; + } + + if (offset == 0 && cells == 2) { + bad_map = of_check_bad_map(map, map_len); + if (bad_map) { + pr_warn_once("%pOF: %s has 1-cell entries targeting 2-cell %s, treating as 1-cell output\n", + np, map_name, cells_name); + cells = 1; + } + } + + if (map_len - offset < 3 + cells) { + of_node_put(phandle_node); + goto err_map_len; + } + + out_base = map + offset + 2; + offset += 3 + cells; + + id_len = be32_to_cpup(map + offset - 1); + id_off = masked_id - id_base; + if (masked_id < id_base || id_off >= id_len) { + of_node_put(phandle_node); + continue; + } + if (id_len > 1 && cells > 1) { + /* + * With 1 output cell we reasonably assume its value + * has a linear relationship to the input; with more, + * we'd need help from the provider to know what to do. + */ + pr_err("%pOF: Unsupported %s - cannot handle %d-ID range with %d-cell output specifier\n", + np, map_name, id_len, cells); + of_node_put(phandle_node); + return -EINVAL; + } + if (filter_np && *filter_np && *filter_np != phandle_node) { of_node_put(phandle_node); continue; } arg->np = phandle_node; - arg->args[0] = masked_id - id_base + out_base; - arg->args_count = 1; + for (int i = 0; i < cells; i++) + arg->args[i] = id_off + be32_to_cpu(out_base[i]); + arg->args_count = cells; pr_debug("%pOF: %s, using mask %08x, id-base: %08x, out-base: %08x, length: %08x, id: %08x -> %08x\n", - np, map_name, map_mask, id_base, out_base, - id_len, id, masked_id - id_base + out_base); + np, map_name, map_mask, id_base, + cells ? be32_to_cpup(out_base) : 0, + id_len, id, + cells ? id_off + be32_to_cpup(out_base) : id_off); return 0; } @@ -2219,6 +2303,10 @@ int of_map_id(const struct device_node *np, u32 id, arg->args[0] = id; arg->args_count = 1; return 0; + +err_map_len: + pr_err("%pOF: Error: Bad %s length: %d\n", np, map_name, map_bytes); + return -EINVAL; } EXPORT_SYMBOL_GPL(of_map_id); @@ -2228,18 +2316,21 @@ EXPORT_SYMBOL_GPL(of_map_id); * @id: Requester ID of the device (e.g. PCI RID/BDF or a platform * stream/device ID) used as the lookup key in the iommu-map table. * @arg: pointer to a &struct of_phandle_args for the result. On success, - * @arg->args[0] contains the translated ID. If a map entry was matched, - * @arg->np holds a reference to the target node that the caller must - * release with of_node_put(). + * @arg->args_count will be set to the number of output specifier cells + * and @arg->args[0..args_count-1] will contain the translated output + * specifier values. If a map entry was matched, @arg->np holds a + * reference to the target node that the caller must release with + * of_node_put(). * - * Convenience wrapper around of_map_id() using "iommu-map" and "iommu-map-mask". + * Convenience wrapper around of_map_id() using "iommu-map", "#iommu-cells", + * and "iommu-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_iommu_id(const struct device_node *np, u32 id, struct of_phandle_args *arg) { - return of_map_id(np, id, "iommu-map", "iommu-map-mask", NULL, arg); + return of_map_id(np, id, "iommu-map", "#iommu-cells", "iommu-map-mask", NULL, arg); } EXPORT_SYMBOL_GPL(of_map_iommu_id); @@ -2252,17 +2343,20 @@ EXPORT_SYMBOL_GPL(of_map_iommu_id); * If non-NULL, the map property must exist (-ENODEV if absent). If * *filter_np is also non-NULL, only entries targeting that node match. * @arg: pointer to a &struct of_phandle_args for the result. On success, - * @arg->args[0] contains the translated ID. If a map entry was matched, - * @arg->np holds a reference to the target node that the caller must - * release with of_node_put(). + * @arg->args_count will be set to the number of output specifier cells + * and @arg->args[0..args_count-1] will contain the translated output + * specifier values. If a map entry was matched, @arg->np holds a + * reference to the target node that the caller must release with + * of_node_put(). * - * Convenience wrapper around of_map_id() using "msi-map" and "msi-map-mask". + * Convenience wrapper around of_map_id() using "msi-map", "#msi-cells", + * and "msi-map-mask". * * Return: 0 on success or a standard error code on failure. */ int of_map_msi_id(const struct device_node *np, u32 id, struct device_node * const *filter_np, struct of_phandle_args *arg) { - return of_map_id(np, id, "msi-map", "msi-map-mask", filter_np, arg); + return of_map_id(np, id, "msi-map", "#msi-cells", "msi-map-mask", filter_np, arg); } EXPORT_SYMBOL_GPL(of_map_msi_id); diff --git a/include/linux/of.h b/include/linux/of.h index ea50b45d9ff7..374b249766a2 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -465,7 +465,8 @@ const char *of_prop_next_string(const struct property *prop, const char *cur); bool of_console_check(const struct device_node *dn, char *name, int index); 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Wed, 20 May 2026 01:05:53 -0700 (PDT) X-Received: by 2002:a05:6a20:7d9f:b0:398:ac0d:9a0b with SMTP id adf61e73a8af0-3b22ecb031amr25955066637.50.1779264353199; Wed, 20 May 2026 01:05:53 -0700 (PDT) Message-ID: <11b91838-9b24-4a62-8760-fdeb3703afc4@oss.qualcomm.com> Date: Wed, 20 May 2026 13:35:30 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v14 0/3] of: parsing of multi #{iommu,msi}-cells in maps To: Rob Herring Cc: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Charan Teja Kalla References: <20260424-parse_iommu_cells-v14-0-fd02f11b6c38@oss.qualcomm.com> <20260506221915.GA3290640-robh@kernel.org> Content-Language: en-US From: Vijayanand Jitta In-Reply-To: <20260506221915.GA3290640-robh@kernel.org> Content-Type: text/plain; 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Wed, 20 May 2026 01:20:01 -0700 (PDT) Message-ID: <4f3a0cf9-63cf-405a-a19c-c8fc0473b2ce@suse.com> Date: Wed, 20 May 2026 10:20:00 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Stefano Stabellini , Andrew Cooper , Nicola Vetrini From: Jan Beulich Subject: [PATCH] CI: disable debug info for analysis jobs Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779265202-D9772443-70454C94/0/0 X-purgate-type: clean X-purgate-size: 1471 Its generating and linking takes time (and space), while at the same time Eclair should be entirely independent of its presence. Signed-off-by: Jan Beulich --- Sadly the setting of EXTRA_XEN_CONFIG doesn't look to be cumulative (across "extends:"), so the addition needs making to all four eclair-* jobs. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2539557855 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -47,6 +47,7 @@ eclair-x86_64-allcode: RULESET: "monitored" EXTRA_XEN_CONFIG: | CONFIG_ARGO=y + CONFIG_DEBUG_INFO=n CONFIG_DEBUG_LOCK_PROFILE=y CONFIG_DEBUG_TRACE=y CONFIG_EFI_SET_VIRTUAL_ADDRESS_MAP=y @@ -105,6 +106,7 @@ eclair-x86_64-amd: CONFIG_INTEL_IOMMU=n CONFIG_EXPERT=y CONFIG_DEBUG=y + CONFIG_DEBUG_INFO=n CONFIG_GDBSX=n CONFIG_FRAME_POINTER=n CONFIG_SELF_TESTS=n @@ -129,6 +131,7 @@ eclair-ARM64-allcode: CONFIG_ARM64_SVE=y CONFIG_ARM_SMMU_V3=y CONFIG_BOOT_TIME_CPUPOOLS=y + CONFIG_DEBUG_INFO=n CONFIG_DEBUG_LOCK_PROFILE=y CONFIG_DEBUG_TRACE=y CONFIG_DEVICE_TREE_DEBUG=y @@ -206,6 +209,7 @@ eclair-ARM64-amd: CONFIG_ARM_SMMU_V3=y CONFIG_EXPERT=y CONFIG_DEBUG=y + CONFIG_DEBUG_INFO=n CONFIG_FRAME_POINTER=n CONFIG_SELF_TESTS=n CONFIG_DEBUG_LOCKS=n From xen-devel-bounces@lists.xenproject.org Wed May 20 10:00:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 10:00:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313765.1583833 (Exim 4.92) (envelope-from ) id 1wPdir-0004gn-Sw; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------rsU2yxDq17VOtzGHA3ZtMnoT" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779271208019 X-purgate-ID: tlsNG-16d1c6/1779271215-86B75D75-9B17226B/0/0 X-purgate-type: clean X-purgate-size: 9306 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------rsU2yxDq17VOtzGHA3ZtMnoT Content-Type: multipart/mixed; boundary="------------dpInNmscFASBFIegzTSCyLoV"; protected-headers="v1" From: Teddy Astie To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Message-ID: <3ba68adb-97a9-4c04-ba0e-c716c5bfbc65@vates.tech> Subject: Re: [PATCH 1/5] pci: Introduce parse_pci_sbdf{_seg}() References: <1779117760.8631fc262581453bbf619ec5b2062170.19e3bae9f48000f373@vates.tech> In-Reply-To: --------------dpInNmscFASBFIegzTSCyLoV Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsD5BAABCAAjFiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmoNhicFAwAAAAAACgkQZg+p0QLLz9Cq Dgv/TJZtU9wjpVBKM7xiaEhor2qPz1SJt1au3SGp6G6dVrxCfYwSAvhLKx6gzwDcn1GqRL4VVsVX SPggZRboxtnuOTlz5iEDTe5YHSnH34+PrJySAomI3du8Ax6AZps+YYCHMeNaz9IW/UUMk83mt58Q RmI36qkqtD6Hm977fZbp4YK7ztlyel1oM2jFXi4UC/nAgB8pvZswoRTE7YFmZJv7HDVr1C4EjMoI R1jUsxA9QySFMsiXL4SAw1yoc9fliFDzv7n03olDq/4BoucCgj7iReLiqW4yxobvymUhSjO/7/F4 mRkWjS8Xh0D8eZIBArL3N5X1aYdaFwhBwTozTb9BGlDZqB8wCiXMKtS7YPMHrMNRm2BopSMPQyIq egd0Vizk4TQX8I2iMPav/7OBWTSxSKhImBRr05pt39t38nkigTN1fCchxJWrS1FmEEZUSqcRF3Hx H3ZsRD/no6U86bOu9Ml4g/A65azrJ0YVV2wADcqXjJSoPyUEVhMFuV9cH99p =OUqs -----END PGP SIGNATURE----- --------------rsU2yxDq17VOtzGHA3ZtMnoT-- From xen-devel-bounces@lists.xenproject.org Wed May 20 10:03:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 10:03:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313777.1583843 (Exim 4.92) (envelope-from ) id 1wPdlY-0005D3-9W; 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> >>>> } > >>>> > >>>> +/* BSP-only function to pre-set an approximate TSC scale. */ > >>>> +void __init preset_tsc_scale(unsigned long freq) > >>>> +{ > >>>> + struct cpu_time *t = &this_cpu(cpu_time); > >>>> + > >>>> + /* > >>>> + * The incoming frequency is only approximate (nominal). Increase it by > >>>> + * 1% to make NOW() output rather a little too slow than too fast, thus > >>>> + * avoiding a possible backwards jump once the final scale is set. > >>>> + */ > >>>> + freq += DIV_ROUND_UP(freq, 100); > >>> > >>> To avoid such possible jump backwards, won't it safer to also update > >>> the ->local_stime and ->local_tsc fields at the time the new scale is > >>> set? Updatign those ahead of setting the new scale should avoid any > >>> backward jumps. > >> > >> ->stamp.local_tsc does get updated; you merely dropped that line from reply > >> context. As to local_stime - how could we possibly set that, when we didn't > >> get through init_platform_timer() yet? Leaving it at 0 is the correct > >> match for setting local_tsc to boot_tsc_stamp. > > > > Please bear with me, maybe I'm not understanding exactly to what the > > code comment refers to as "possible backwards jump once the final > > scale is set". I assume you refer to the setting of scale > > early_time_init()? The ->stamp.local_tsc value also gets updated at > > that point, so it's not possible for the timer going backwards? > > It is updated there, but only to boot_tsc_stamp. I.e. no change at all > if preset_tsc_scale() set the field already. Couldn't we do the following in early_init_time() to ensure time doesn't go backwards: if ( t->tsc_scale.mul_frac ) { /* * Update time snapshot to ensure time doesn't go backwards as a * result of the scale change done below. */ t->stamp.local_tsc = rdtsc_ordered(); t->stamp.local_stime = get_s_time_fixed(t->stamp.local_tsc); } else t->stamp.local_tsc = boot_tsc_stamp; set_time_scale(&t->tsc_scale, tmp); init_percpu_time(); That's kind of the same logic that's used in cpu_frequency_change() ahead of calling set_time_scale(). > > This changed with the addition of the init_percpu_time() call in > > early_time_init(), and makes the setting of "t->stamp.local_tsc = > > boot_tsc_stamp" pointless, as it will get overwritten by the logic in > > init_percpu_time() a couple of lines after? > > When making these changes, I first thought so too. But no, that write > isn't pointless: In case preset_tsc_scale() wasn't called, leaving the > field at 0 would break the use of get_s_time_fixed() out of > init_percpu_time(). (Iirc I only noticed this because of having put > debug printk()s there for other purposes.) I see, yes, that would be needed. Regards, Roger. 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2026 12:08:10 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/5] vtd: Use pci_sbdf_t in acpi_parse_dev_scope() To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <1779117761.8631fc262581453bbf619ec5b2062170.19e3baea399000f373@vates.tech> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 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protocol="application/pgp-signature"; boundary="------------VdzMO0gutUTPpb1isbd0dYZO" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779271691116 X-purgate-ID: tlsNG-16d1c6/1779271695-8ED88D75-3A3E0D68/0/0 X-purgate-type: clean X-purgate-size: 14057 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------VdzMO0gutUTPpb1isbd0dYZO Content-Type: multipart/mixed; boundary="------------N30O4PzHj1bWEgezF9Q86UDN"; protected-headers="v1" From: Teddy Astie To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: Subject: Re: [PATCH 2/5] vtd: Use pci_sbdf_t in acpi_parse_dev_scope() References: <1779117761.8631fc262581453bbf619ec5b2062170.19e3baea399000f373@vates.tech> In-Reply-To: --------------N30O4PzHj1bWEgezF9Q86UDN Content-Type: multipart/mixed; boundary="------------Ax4fG7B1C6CHvK1AyveBCiOu" --------------Ax4fG7B1C6CHvK1AyveBCiOu Content-Type: text/plain; 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hlsegrmhgurdgtohhm X-ME-Proxy: Feedback-ID: i792e4853:Fastmail From: =?UTF-8?q?Szymon=20Aceda=C5=84ski?= To: xen-devel@lists.xenproject.org Cc: oleksii.kurochko@gmail.com, =?UTF-8?q?Szymon=20Aceda=C5=84ski?= , Andrew Cooper , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. Smith" , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v2 for-4.22] EFI: Fix boot from a device without a file system Date: Wed, 20 May 2026 12:30:26 +0200 Message-ID: <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779273191-E2F94443-E4806041/0/0 X-purgate-type: clean X-purgate-size: 9995 When netbooting a unified Xen kernel image (via GRUB chainloader), the resulting loaded_image->DeviceHandle does not support SIMPLE_FILE_SYSTEM_PROTOCOL. Instead of crashing via noreturn PrintErrMesg() in get_parent_handle(), we defer calling this function until filesystem access is needed. This way when booting UKI, get_parent_handle() is not called at all. Suggested-by: Andrew Cooper Suggested-by: Marek Marczykowski-Górecki Signed-off-by: Szymon Acedański --- Changes in v2: - Restructured along the lines Andrew and Marek both suggested on v1: defer get_parent_handle() until the first call site that actually needs a file. This mirrors the existing lazy pattern in ARM's allocate_module_file() in xen/arch/arm/efi/efi-boot.h, which was also changed to use the new ensure_dir_handle() helper. Tests performed: - Same as v1: PXE-loaded GRUB chainloading UKI - failure without patch, success with patch - QEMU boot from EFI partition, with config, kernel and initrd on EFI partition too - success with and without patch (halts later in both cases due to unrelated issue) - Cross-compiling ARM64 - success xen/arch/arm/efi/efi-boot.h | 12 ++++---- xen/arch/x86/efi/efi-boot.h | 9 ++++-- xen/common/efi/boot.c | 57 ++++++++++++++++++++++++------------- 3 files changed, 50 insertions(+), 28 deletions(-) diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h index ea59de47e7..069cc68b0a 100644 --- a/xen/arch/arm/efi/efi-boot.h +++ b/xen/arch/arm/efi/efi-boot.h @@ -403,7 +403,7 @@ static void __init noreturn efi_arch_post_exit_boot(void) } static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { union string name; @@ -419,8 +419,11 @@ static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, name.s = get_value(&cfg, section, "dtb"); if ( name.s ) { + CHAR16 *fname; + split_string(name.s); - read_file(dir_handle, s2w(&name), &dtbfile, NULL); + ensure_dir_handle(image, dir_handle, &fname); + read_file(*dir_handle, s2w(&name), &dtbfile, NULL); efi_bs->FreePool(name.w); } } @@ -430,7 +433,7 @@ static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, } static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { } @@ -665,8 +668,7 @@ static int __init allocate_module_file(const EFI_LOADED_IMAGE *loaded_image, file_info->name_len = name_len; /* Get the file system interface. */ - if ( !*dir_handle ) - *dir_handle = get_parent_handle(loaded_image, &fname); + ensure_dir_handle(loaded_image, dir_handle, &fname); /* Load the binary in memory */ read_file(*dir_handle, s2w(&module_name), &module_binary, NULL); diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index 42a2c46b5e..d738b839ee 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -284,13 +284,13 @@ static void __init noreturn efi_arch_post_exit_boot(void) } static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { } static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { union string name; @@ -304,9 +304,12 @@ static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, name.s = get_value(&cfg, "global", "ucode"); if ( name.s ) { + CHAR16 *fname; + microcode_set_module(mbi.mods_count); split_string(name.s); - read_file(dir_handle, s2w(&name), &ucode, NULL); + ensure_dir_handle(image, dir_handle, &fname); + read_file(*dir_handle, s2w(&name), &ucode, NULL); efi_bs->FreePool(name.w); } } diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index 9ea2183c0b..f90309624b 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -547,6 +547,17 @@ static EFI_FILE_HANDLE __init get_parent_handle(const EFI_LOADED_IMAGE *loaded_i return dir_handle; } +static void __init ensure_dir_handle(const EFI_LOADED_IMAGE *loaded_image, + EFI_FILE_HANDLE *dir_handle, + CHAR16 **file_name) +{ + if ( *dir_handle ) + return; + *dir_handle = get_parent_handle(loaded_image, file_name); + if ( !*dir_handle ) + blexit(L"Cannot load files without a usable file system"); +} + static CHAR16 *__init point_tail(CHAR16 *fn) { CHAR16 *tail = NULL; @@ -1514,7 +1525,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, if ( use_cfg_file ) { - EFI_FILE_HANDLE dir_handle; + EFI_FILE_HANDLE dir_handle = NULL; EFI_HANDLE gop_handle; UINTN depth, cols, rows; @@ -1526,31 +1537,33 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, gop = efi_get_gop(&gop_handle); - /* Get the file system interface. */ - dir_handle = get_parent_handle(loaded_image, &file_name); - /* Read and parse the config file. */ if ( read_section(loaded_image, L"config", &cfg, NULL) ) PrintStr(L"Using builtin config file\r\n"); - else if ( !cfg_file_name && file_name ) + else { - CHAR16 *tail; + ensure_dir_handle(loaded_image, &dir_handle, &file_name); - while ( (tail = point_tail(file_name)) != NULL ) + if ( !cfg_file_name ) { - wstrcpy(tail, L".cfg"); - if ( read_file(dir_handle, file_name, &cfg, NULL) ) - break; - *tail = 0; + CHAR16 *tail; + + while ( (tail = point_tail(file_name)) != NULL ) + { + wstrcpy(tail, L".cfg"); + if ( read_file(dir_handle, file_name, &cfg, NULL) ) + break; + *tail = 0; + } + if ( !tail ) + blexit(L"No configuration file found."); + PrintStr(L"Using configuration file '"); + PrintStr(file_name); + PrintStr(L"'\r\n"); } - if ( !tail ) - blexit(L"No configuration file found."); - PrintStr(L"Using configuration file '"); - PrintStr(file_name); - PrintStr(L"'\r\n"); + else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) + blexit(L"Configuration file not found."); } - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) - blexit(L"Configuration file not found."); pre_parse(&cfg); if ( section.w ) @@ -1567,6 +1580,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, if ( !name.s ) break; free_cfg(); + ensure_dir_handle(loaded_image, &dir_handle, &file_name); if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) { PrintStr(L"Chained configuration file '"); @@ -1578,13 +1592,14 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, efi_bs->FreePool(name.w); } - efi_arch_cfg_file_early(loaded_image, dir_handle, section.s); + efi_arch_cfg_file_early(loaded_image, &dir_handle, section.s); option_str = name.s ? split_string(name.s) : NULL; if ( !read_section(loaded_image, L"kernel", &kernel, option_str) && name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &kernel, option_str); efi_bs->FreePool(name.w); } @@ -1599,6 +1614,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, name.s = get_value(&cfg, section.s, "ramdisk"); if ( name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &ramdisk, NULL); efi_bs->FreePool(name.w); } @@ -1609,6 +1625,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, name.s = get_value(&cfg, section.s, "xsm"); if ( name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &xsm, NULL); efi_bs->FreePool(name.w); } @@ -1634,7 +1651,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, } } - efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); + efi_arch_cfg_file_late(loaded_image, &dir_handle, section.s); free_cfg(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 11:33:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 11:33:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313844.1583875 (Exim 4.92) (envelope-from ) id 1wPfAm-0001nG-4F; Wed, 20 May 2026 11:33:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313844.1583875; Wed, 20 May 2026 11:33:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfAm-0001n9-0D; Wed, 20 May 2026 11:33:12 +0000 Received: by outflank-mailman (input) for mailman id 1313844; Wed, 20 May 2026 11:33:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPfAk-0001n1-CO for xen-devel@lists.xenproject.org; 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This is the correct behaviour: dummy_vcpu_info already serves >>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>> >>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>> >>>> I question this, largely (but not only) because I also ... >>>> >>>>> Signed-off-by: Oleksii Kurochko >>>>> Reviewed-by: Baptiste Le Duc >>>>> --- >>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>> d->shared_info remains NULL throughout domain lifetime. >>>> >>>> ... question this mode of operation. Yes, you may (for now) be able to >>>> get >>>> away without, but e.g. event channels will want supporting at some point. >>>> Which will require a shared info page. Better put that in place right >>>> away, >>>> even if the guests you test with don't use it (yet). Certain other common >>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>> >>> >>> Would it be fine than to allocate it in arch_domain_create() ... : >>> >>>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>         goto fail; >>> >>>     clear_page(d->shared_info); >>> >>> ... but without calling share_xen_page_with_guest() after that >>> allocation as share_xen_page_with_guest() isn't implemented at the moment? > > I would have said "yes" here, but ... > >> Or could it be an option for all arch-s move allocation of >> d->shared_info to domain_create() in common just after arch_domain_create()? > > ... Andrew's reply pretty much rules out not only this option, but the > shared-info-page concept as a whole (for RISC-V). See my reply there. In > the meantime, the change as suggested may then indeed be what we want to > go with, albeit (a) with a better description and (b) perhaps covering > all d->shared_info uses. Looking at guest kernel code (Linux), FIFO is tried first, so if RISC-V is going to support only FIFO, d->shared_info could legally be NULL. Looking at the Xen side, if an architecture decides to support only FIFO, d->shared_info is touched only in vcpu_info_reset(), which is called from vcpu_create(). All other places where d->shared_info is accessed should not be reachable except for one case in event_fifo.c: when a guest issues the EVTCHNOP_init_control hypercall, setup_ports() reads from shared_info(d, evtchn_pending): static void setup_ports(struct domain *d, unsigned int prev_evtchns) { ... if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) evtchn->pending = true; ... } } This looks like it handles the transition from the 2L ABI to the FIFO ABI: if a guest started with 2L and then switched to FIFO, any events already pending in shared_info(d, evtchn_pending) need to be migrated to FIFO's per-channel evtchn->pending flag. But it looks like I am missing something here as I mentioned at the start that Linux uses or FIFO or 2L. Am I missing something? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 11:53:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 11:53:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313861.1583882 (Exim 4.92) (envelope-from ) id 1wPfUY-0004nj-MZ; Wed, 20 May 2026 11:53:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313861.1583882; Wed, 20 May 2026 11:53:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfUY-0004nc-Jv; Wed, 20 May 2026 11:53:38 +0000 Received: by outflank-mailman (input) for mailman id 1313861; Wed, 20 May 2026 11:53:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfUX-0004nW-3i for xen-devel@lists.xenproject.org; Wed, 20 May 2026 11:53:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPfUW-0061VL-Fi for xen-devel@lists.xenproject.org; Wed, 20 May 2026 13:53:36 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0da0ab-e002-0a2a0a5209dd-0a2a4501a63e-42 for ; Wed, 20 May 2026 13:53:36 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0da0bf-c1f2-0a2a45010019-d155802de11a-3 for ; Wed, 20 May 2026 13:53:36 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso47210005e9.3 for ; Wed, 20 May 2026 04:53:36 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 04:53:35 -0700 (PDT) Message-ID: <7b23e011-56b8-4f6c-bd55-83e1d9b0453f@suse.com> Date: Wed, 20 May 2026 13:53:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk From: Jan Beulich Subject: [PATCH] Arm: do a 4th linking pass if necessary Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779278016-B715BFF4-15E5E2A3/0/0 X-purgate-type: clean X-purgate-size: 3148 The .rodata growth between 1st and 2nd linking passes may affect the number of stubs the linker wants to insert, which in turn affects the number of symbols. If symbol table sizes change after the 2nd linking pass, insert another one before the final one. (As a comment in Linux puts it, "In theory it's possible this results in even more stubs, but unlikely.") To use the $(compare-symbol-tables) macro in a shell "if", it needs slightly adjusting (and then wrapping to be run in a sub-shell). Signed-off-by: Jan Beulich --- There's imo no good Fixes: tag, since (aiui) stubs (veneers) may also be inserted for reasons other than errata workarounds. For context: The Cortex A53 erratum 843419 workaround in GNU ld comes in two flavors: In the general case a stub is inserted, but if the problem ADRP can be replaced by ADR (i.e. the target symbol is within ±1Mb), then that's preferred and no stub is needed. The addition of the symbol table data is what then results in the stub-less form to no longer be usable in affected configurations. A possible countermeasure could be to move .rodata ahead of .text. (Also, from looking at generated code, it may well be that newer gcc simply avoids producing problematic insn sequences.) Linux simply compares object file sizes, but I consider that fragile: A change in size of one of the symbol table constituents may not necessarily change the object file size, due to padding which may be in use. Once we generalize linking, we may want to introduce an equivalent of Linux'es KALLSYMS_EXTRA_PASS as well. I don't think doing this right here would make overly much sense, though. --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -99,9 +99,20 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o - $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) + if ! { $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) >/dev/null; }; \ + then \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ + $(dot-target).2.o -o $(dot-target).2; \ + $(NM) -pa --format=sysv $(dot-target).2 \ + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + > $(dot-target).3.S; \ + $(MAKE) $(build)=$(@D) $(dot-target).3.o; \ + $(call compare-symbol-tables, $(dot-target).2.o, $(dot-target).3.o); \ + else \ + ln -sf $(dot-target).2.o $(dot-target).3.o; \ + fi $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).2.o -o $@ + $(dot-target).3.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map --- a/xen/scripts/Kbuild.include +++ b/xen/scripts/Kbuild.include @@ -65,7 +65,7 @@ define compare-symbol-tables $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ ln -f $(2) $(@D)/.cst.$$$$; \ $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ - rm -f $(@D)/.cst.$$$$ + rm -f $(@D)/.cst.$$$$; \ diff -u $(1).sym $(2).sym endef From xen-devel-bounces@lists.xenproject.org Wed May 20 11:58:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 11:58:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313868.1583892 (Exim 4.92) (envelope-from ) id 1wPfZB-0005XZ-7T; Wed, 20 May 2026 11:58:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313868.1583892; Wed, 20 May 2026 11:58:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfZB-0005XR-3y; Wed, 20 May 2026 11:58:25 +0000 Received: by outflank-mailman (input) for mailman id 1313868; Wed, 20 May 2026 11:58:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfZ9-0005XL-LM for xen-devel@lists.xenproject.org; Wed, 20 May 2026 11:58:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPfZ8-00GxHg-Ti for xen-devel@lists.xenproject.org; Wed, 20 May 2026 13:58:22 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0da1dc-5cb7-0a2a0a5109dd-0a2a450accb8-22 for ; Wed, 20 May 2026 13:58:22 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0da1de-56b3-0a2a450a0019-d1558036c8b9-3 for ; Wed, 20 May 2026 13:58:22 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-4891e5b9c1fso41358685e9.2 for ; Wed, 20 May 2026 04:58:22 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Smith" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779278302-70F618B7-0FAC5660/0/0 X-purgate-type: clean X-purgate-size: 2292 On 20.05.2026 12:30, Szymon Acedański wrote: > @@ -1526,31 +1537,33 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, > > gop = efi_get_gop(&gop_handle); > > - /* Get the file system interface. */ > - dir_handle = get_parent_handle(loaded_image, &file_name); > - > /* Read and parse the config file. */ > if ( read_section(loaded_image, L"config", &cfg, NULL) ) > PrintStr(L"Using builtin config file\r\n"); > - else if ( !cfg_file_name && file_name ) > + else > { > - CHAR16 *tail; > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > > - while ( (tail = point_tail(file_name)) != NULL ) > + if ( !cfg_file_name ) > { > - wstrcpy(tail, L".cfg"); > - if ( read_file(dir_handle, file_name, &cfg, NULL) ) > - break; > - *tail = 0; > + CHAR16 *tail; > + > + while ( (tail = point_tail(file_name)) != NULL ) > + { > + wstrcpy(tail, L".cfg"); > + if ( read_file(dir_handle, file_name, &cfg, NULL) ) > + break; > + *tail = 0; > + } > + if ( !tail ) > + blexit(L"No configuration file found."); > + PrintStr(L"Using configuration file '"); > + PrintStr(file_name); > + PrintStr(L"'\r\n"); > } > - if ( !tail ) > - blexit(L"No configuration file found."); > - PrintStr(L"Using configuration file '"); > - PrintStr(file_name); > - PrintStr(L"'\r\n"); > + else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) > + blexit(L"Configuration file not found."); > } > - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) > - blexit(L"Configuration file not found."); > pre_parse(&cfg); > > if ( section.w ) Seeing in particular this hunk - why not have read_file() call the new function? Most of the churn here would then go away. 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Smith" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779278446-41396938-716A4329/0/0 X-purgate-type: clean X-purgate-size: 797 On 20.05.2026 12:30, Szymon Acedański wrote: > When netbooting a unified Xen kernel image (via GRUB chainloader), > the resulting loaded_image->DeviceHandle does not support > SIMPLE_FILE_SYSTEM_PROTOCOL. > > Instead of crashing via noreturn PrintErrMesg() in get_parent_handle(), > we defer calling this function until filesystem access is needed. > This way when booting UKI, get_parent_handle() is not called at all. > > Suggested-by: Andrew Cooper > Suggested-by: Marek Marczykowski-Górecki > Signed-off-by: Szymon Acedański Oh, one other, formal thing (for the future): Please don't send new patch versions as reply to a prior one. They should root entirely new threads. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <12e89d4e-2856-4130-aaa7-1ec1a742c72f@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1779278634-09F6EC48-F09931CD/10/73395122804 X-purgate-type: spam X-purgate-size: 4547 On 20.05.2026 13:33, Oleksii Kurochko wrote: > > > On 5/19/26 1:53 PM, Jan Beulich wrote: >> On 19.05.2026 13:22, Oleksii Kurochko wrote: >>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>>>>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>> >>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>> so when an architecture does not allocate a shared_info page the >>>>>> dereference triggers UBSAN: >>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>> >>>>>> Extend the existing fallback condition to also cover the case where no >>>>>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>> >>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>> >>>>> I question this, largely (but not only) because I also ... >>>>> >>>>>> Signed-off-by: Oleksii Kurochko >>>>>> Reviewed-by: Baptiste Le Duc >>>>>> --- >>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>> >>>>> ... question this mode of operation. Yes, you may (for now) be able to >>>>> get >>>>> away without, but e.g. event channels will want supporting at some point. >>>>> Which will require a shared info page. Better put that in place right >>>>> away, >>>>> even if the guests you test with don't use it (yet). Certain other common >>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>> >>>> >>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>> >>>>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>         goto fail; >>>> >>>>     clear_page(d->shared_info); >>>> >>>> ... but without calling share_xen_page_with_guest() after that >>>> allocation as share_xen_page_with_guest() isn't implemented at the moment? >> >> I would have said "yes" here, but ... >> >>> Or could it be an option for all arch-s move allocation of >>> d->shared_info to domain_create() in common just after arch_domain_create()? >> >> ... Andrew's reply pretty much rules out not only this option, but the >> shared-info-page concept as a whole (for RISC-V). See my reply there. In >> the meantime, the change as suggested may then indeed be what we want to >> go with, albeit (a) with a better description and (b) perhaps covering >> all d->shared_info uses. > > Looking at guest kernel code (Linux), FIFO is tried first, so if RISC-V > is going to support only FIFO, d->shared_info could legally be NULL. > > Looking at the Xen side, if an architecture decides to support only > FIFO, d->shared_info is touched only in vcpu_info_reset(), which is > called from vcpu_create(). > > All other places where d->shared_info is accessed should not be > reachable except for one case in event_fifo.c: when a guest issues the > EVTCHNOP_init_control hypercall, setup_ports() reads from shared_info(d, > evtchn_pending): > static void setup_ports(struct domain *d, unsigned int prev_evtchns) > { > ... > if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) > evtchn->pending = true; > ... > } > } > > This looks like it handles the transition from the 2L ABI to the FIFO > ABI: if a guest started with 2L and then switched to FIFO, any events > already pending in shared_info(d, evtchn_pending) need to be migrated to > FIFO's per-channel evtchn->pending flag. But it looks like I am missing > something here as I mentioned at the start that Linux uses or FIFO or 2L. > > Am I missing something? Quite likely you aren't, but I didn't check. My earlier "covering all" may well resolve to merely stating things accordingly in the patch description. Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 12:10:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:10:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313894.1583919 (Exim 4.92) (envelope-from ) id 1wPfkh-00010N-OW; Wed, 20 May 2026 12:10:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313894.1583919; Wed, 20 May 2026 12:10:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfkh-00010G-Lp; Wed, 20 May 2026 12:10:19 +0000 Received: by outflank-mailman (input) for mailman id 1313894; Wed, 20 May 2026 12:10:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfkf-00010A-TO for xen-devel@lists.xenproject.org; Wed, 20 May 2026 12:10:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPfkf-003uYJ-9I for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:10:17 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0da4a7-e002-0a2a0a5209dd-0a2a4503c090-8 for ; Wed, 20 May 2026 14:10:17 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0da4a8-672d-0a2a45030019-a237832f98d6-3 for ; Wed, 20 May 2026 14:10:17 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id CA5FA4EE3D8A; Wed, 20 May 2026 14:10:16 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779279016; b=PLrzmc2lj7NVUmyrrcg9kaBeqW0wQ+mFeIRwOMCvSWzPF+OqwnoXGGx8+0SD5D7WzJ/Y S860M7E/ux9DN5oOZzkRjutspA0TPqdTwVIY05HaGN6gBfrNsNbR5uj1sxUOxcN+300Xe wwEiLvxJkeRMfip5NW+kH4lNwgLuEQVGxJAT7aIK4A7mEpReqUGYfmaolt3cDRWcc+RWN VSviPKY2GkN5CEnkSsjjmXuMs14nMw8Fxk9HT9LWSQxVtRGG3Xdi6ufMav/skXmilLNVQ ALhs5ucNVBqx4w9+CNjtVhw0YLK6tQOfTAaWap0MtbDH2GXBrz4LDI4kGLxXB9laH24pd kaAzPbDfVCG+ow5PO5rWhGuJ6YQhLBZ94WzIFYuLAXeBbr7/jKLCNzaMaWwAbwNjS5tlO oXygfFAeJXZnQgG1esAtnCEkKDnV4q9mp1jkU1HlALyBCIOw1/yEyr2wg1QjP3yav7e1a 0GoxlLVxDXgoEwvegbTmHEco6qjctgZHE0mLUoofvlWAA9WswwxKvkmY/eY1no0QynuZj zuBcVjCSzpBLkXRkIDhaQE1dBuCc8U/yPAlUM6LC1thzIg4IJ3TR9/9f4kRcMVxjA0HiT LHsJLR7R1tRUKR0EQHco9qlsPPQduQl1nsgAu88iVXbGfDMzqC3/+wGURapLoho= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1779279016; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=g90j5HQfthglz82uSMzTSHjm3mEZ1dFfuSF71ADKbvs=; b=jCvbd7nrV83Tep8exxO+36AvQDH6X8DVXQ9FfSuFZB/yIYhRYnUt6I6ZF1akQq9X8Jxx 3LBW0fhKuJiPTiyacSb6ff2urwrtB5jnDqQR6l+9c4FCasfKcB2eMcRBQfR+lMnNBwjUb 5bv5rDjRQ5uUPQSGoHkKR8SPOYTXxbT6hDP8/OfPKhlodxwzqxy7n8yl9x/TZdSH0PU4E Ns/8urZihsPrMtwIhNm/p7FA4yISkz6K/VDU15a/H79vwAH/nh/y4x40zSeijklpnQxQN xv3fxAYEhGks+ej5QtAPiqfW/KOwICYFuV0LxBDbs/nWz7TnP3ASwj/wsUW9GNRmhWCnb R40d7D3XNWwm8EyM5aE1cAHKQAyN14cvuNO5zitHPRb17jqOb9q8sTSfOqxu9oUludMNk ofYuO8myz3l2PwZuyXQvPhdttDZ76GmkppMh/LrskLNh2x2EYwxA5MlMXYdifcl0pgiQT 2cSrpMVqxmhSsxrNlz8gbwsyzbupAumxM7e+iGR6blGAhu1VESt7tIeA+ULtNEjz3ljlx FfvBUDXkFJ+xCj3Vsr/0YW51o2umTUhxkXMRefViG19ikG9mNhNfvCcwe/6S4zEv/Ntj5 hkndJmviHlezjzYD83cvbMYopOrqj14bz4qX0wtN416lVjiptltSvjRcGNi4RZM= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Wed, 20 May 2026 14:10:16 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH] CI: disable debug info for analysis jobs In-Reply-To: <4f3a0cf9-63cf-405a-a19c-c8fc0473b2ce@suse.com> References: <4f3a0cf9-63cf-405a-a19c-c8fc0473b2ce@suse.com> Message-ID: <6ed5a037c10e2b896e1269c6856508f5@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779279017-39D7B938-963510D8/0/0 X-purgate-type: clean X-purgate-size: 2119 On 2026-05-20 10:20, Jan Beulich wrote: > Its generating and linking takes time (and space), while at the same > time > Eclair should be entirely independent of its presence. > > Signed-off-by: Jan Beulich > --- > Sadly the setting of EXTRA_XEN_CONFIG doesn't look to be cumulative > (across "extends:"), so the addition needs making to all four eclair-* > jobs. > Maybe with anchors and variable expansion it could be made to work, having a base template EXTRA_XEN_CONFIG and then adding variables as needed, but let's not complicate this unless needed. Indeed ECLAIR is not affected by stripping flags currently (though I don't exclude it may in the future). Reviewed-by: Nicola Vetrini > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2539557855 > > --- a/automation/gitlab-ci/analyze.yaml > +++ b/automation/gitlab-ci/analyze.yaml > @@ -47,6 +47,7 @@ eclair-x86_64-allcode: > RULESET: "monitored" > EXTRA_XEN_CONFIG: | > CONFIG_ARGO=y > + CONFIG_DEBUG_INFO=n > CONFIG_DEBUG_LOCK_PROFILE=y > CONFIG_DEBUG_TRACE=y > CONFIG_EFI_SET_VIRTUAL_ADDRESS_MAP=y > @@ -105,6 +106,7 @@ eclair-x86_64-amd: > CONFIG_INTEL_IOMMU=n > CONFIG_EXPERT=y > CONFIG_DEBUG=y > + CONFIG_DEBUG_INFO=n > CONFIG_GDBSX=n > CONFIG_FRAME_POINTER=n > CONFIG_SELF_TESTS=n > @@ -129,6 +131,7 @@ eclair-ARM64-allcode: > CONFIG_ARM64_SVE=y > CONFIG_ARM_SMMU_V3=y > CONFIG_BOOT_TIME_CPUPOOLS=y > + CONFIG_DEBUG_INFO=n > CONFIG_DEBUG_LOCK_PROFILE=y > CONFIG_DEBUG_TRACE=y > CONFIG_DEVICE_TREE_DEBUG=y > @@ -206,6 +209,7 @@ eclair-ARM64-amd: > CONFIG_ARM_SMMU_V3=y > CONFIG_EXPERT=y > CONFIG_DEBUG=y > + CONFIG_DEBUG_INFO=n > CONFIG_FRAME_POINTER=n > CONFIG_SELF_TESTS=n > CONFIG_DEBUG_LOCKS=n -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Wed May 20 12:11:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:11:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313898.1583927 (Exim 4.92) (envelope-from ) id 1wPflb-0001Rr-0d; Wed, 20 May 2026 12:11:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313898.1583927; Wed, 20 May 2026 12:11:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPfla-0001Rk-Tt; Wed, 20 May 2026 12:11:14 +0000 Received: by outflank-mailman (input) for mailman id 1313898; Wed, 20 May 2026 12:11:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPflZ-0001Ra-Io for xen-devel@lists.xenproject.org; Wed, 20 May 2026 12:11:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPflY-007XCj-K0 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:11:12 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0da4dc-2eae-0a2a0a5409dd-0a2a450acb1a-18 for ; Wed, 20 May 2026 14:11:12 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0da4de-56b3-0a2a450a0019-d1558035ecef-3 for ; Wed, 20 May 2026 14:11:10 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48a7fe4f40bso57650765e9.0 for ; Wed, 20 May 2026 05:11:10 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 05:11:10 -0700 (PDT) Message-ID: <7a2fb6cc-fc9b-43c1-9f4f-d5a573d52dbc@suse.com> Date: Wed, 20 May 2026 14:11:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Content-Language: en-US To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie From: Jan Beulich Subject: [PATCH] x86: strip debug info for intermediate linking steps Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1779279070-72F718B7-58021305/0/0 X-purgate-type: clean X-purgate-size: 2967 Linking debug info takes time, especially for xen.efi. At the same time symbol table contents aren't affected by presence / absence of debug info in the linked binaries (the ELF and COFF symbol tables would have extra section symbols, but tools/symbols omits those anyway). Signed-off-by: Jan Beulich --- The main speed gain is from xen.efi linking. Therefore I'm not even sure if this wants mirroring to the other targets, where only xen-syms is produced. It would mainly be some transient space saving there. (It would perhaps want retaining when the linking steps are moved to common code.) Thoughts? On the system I measured this on, "real" time went down from 4.9s to 3.9s, while "user" time went from 7.8s to 6.8s (all approximate values of course, as there naturally is a bit of variance, and all for full incremental builds with no other changes, i.e. mainly the final linking steps getting carried out for the common/version.o change). --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -127,13 +127,13 @@ CFLAGS-$(XEN_BUILD_EFI) += -DXEN_BUILD_E $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds $(objtree)/tools/symbols $(all_symbols) --empty > $(dot-target).0.S $(MAKE) $(build)=$(@D) $(dot-target).0.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) --strip-debug \ $(dot-target).0.o -o $(dot-target).0 $(NM) -pa --format=sysv $(dot-target).0 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).1.S $(MAKE) $(build)=$(@D) $(dot-target).1.o - $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) --strip-debug \ $(dot-target).1.o -o $(dot-target).1 $(NM) -pa --format=sysv $(dot-target).1 \ | $(objtree)/tools/symbols $(all_symbols) --sysv --sort $(syms-warn-dup-y) \ @@ -205,7 +205,7 @@ endif $(MAKE) $(build)=$(@D) .$(@F).0s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< $(relocs-dummy) \ - $(dot-target).0s.o $(note_file_option) \ + $(dot-target).0s.o $(note_file_option) --strip-debug \ -o $(dot-target).$(base).0 &&) : $(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).0) \ > $(dot-target).1r.S @@ -215,7 +215,7 @@ endif > $(dot-target).1s.S $(MAKE) $(build)=$(@D) .$(@F).1r.o .$(@F).1s.o $(foreach base, $(VIRT_BASE) $(ALT_BASE), \ - $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< \ + $(LD) $(call EFI_LDFLAGS,$(base)) -T $(obj)/efi.lds $< --strip-debug \ $(dot-target).1r.o $(dot-target).1s.o $(note_file_option) \ -o $(dot-target).$(base).1 &&) : $(MKRELOC) $(foreach base,$(VIRT_BASE) $(ALT_BASE),$(dot-target).$(base).1) \ From xen-devel-bounces@lists.xenproject.org Wed May 20 12:31:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:31:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313918.1583936 (Exim 4.92) (envelope-from ) id 1wPg4f-0004fn-Ja; Wed, 20 May 2026 12:30:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313918.1583936; Wed, 20 May 2026 12:30:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPg4f-0004fg-Gf; Wed, 20 May 2026 12:30:57 +0000 Received: by outflank-mailman (input) for mailman id 1313918; Wed, 20 May 2026 12:30:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPg4f-0004fa-1Y for xen-devel@lists.xenproject.org; Wed, 20 May 2026 12:30:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPg4e-00H5Oa-Di for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:30:56 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0da97a-bab6-0a2a0a5309dd-0a2a4503bdc0-30 for ; Wed, 20 May 2026 14:30:56 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0da980-672d-0a2a45030019-d1558030b49f-3 for ; Wed, 20 May 2026 14:30:56 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-488af96f6b2so51998425e9.0 for ; Wed, 20 May 2026 05:30:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 05:30:55 -0700 (PDT) Message-ID: <02d7f002-dc14-497e-bae9-a8c0c9460fac@suse.com> Date: Wed, 20 May 2026 14:30:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 RFC] x86/time: avoid early uses of NOW() to return zero To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: <68b1607a-f2a1-4f53-84c5-43c61eeb1869@suse.com> <8fbab1f4-3078-4ac3-b147-84d1b5f5abd1@suse.com> <547161b2-2fea-4576-a635-62838ffa2d33@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779280256-3754F938-9332087E/0/0 X-purgate-type: clean X-purgate-size: 3325 On 20.05.2026 12:02, Roger Pau Monné wrote: > On Mon, May 18, 2026 at 10:05:41AM +0200, Jan Beulich wrote: >> On 15.05.2026 15:12, Roger Pau Monné wrote: >>> On Fri, May 15, 2026 at 09:15:40AM +0200, Jan Beulich wrote: >>>> On 14.05.2026 17:56, Roger Pau Monné wrote: >>>>> On Wed, May 13, 2026 at 08:44:46AM +0200, Jan Beulich wrote: >>>>>> @@ -2623,6 +2640,21 @@ int __init init_xen_time(void) >>>>>> return 0; >>>>>> } >>>>>> >>>>>> +/* BSP-only function to pre-set an approximate TSC scale. */ >>>>>> +void __init preset_tsc_scale(unsigned long freq) >>>>>> +{ >>>>>> + struct cpu_time *t = &this_cpu(cpu_time); >>>>>> + >>>>>> + /* >>>>>> + * The incoming frequency is only approximate (nominal). Increase it by >>>>>> + * 1% to make NOW() output rather a little too slow than too fast, thus >>>>>> + * avoiding a possible backwards jump once the final scale is set. >>>>>> + */ >>>>>> + freq += DIV_ROUND_UP(freq, 100); >>>>> >>>>> To avoid such possible jump backwards, won't it safer to also update >>>>> the ->local_stime and ->local_tsc fields at the time the new scale is >>>>> set? Updatign those ahead of setting the new scale should avoid any >>>>> backward jumps. >>>> >>>> ->stamp.local_tsc does get updated; you merely dropped that line from reply >>>> context. As to local_stime - how could we possibly set that, when we didn't >>>> get through init_platform_timer() yet? Leaving it at 0 is the correct >>>> match for setting local_tsc to boot_tsc_stamp. >>> >>> Please bear with me, maybe I'm not understanding exactly to what the >>> code comment refers to as "possible backwards jump once the final >>> scale is set". I assume you refer to the setting of scale >>> early_time_init()? The ->stamp.local_tsc value also gets updated at >>> that point, so it's not possible for the timer going backwards? >> >> It is updated there, but only to boot_tsc_stamp. I.e. no change at all >> if preset_tsc_scale() set the field already. > > Couldn't we do the following in early_init_time() to ensure time > doesn't go backwards: > > if ( t->tsc_scale.mul_frac ) > { > /* > * Update time snapshot to ensure time doesn't go backwards as a > * result of the scale change done below. > */ > t->stamp.local_tsc = rdtsc_ordered(); > t->stamp.local_stime = get_s_time_fixed(t->stamp.local_tsc); > } > else > t->stamp.local_tsc = boot_tsc_stamp; > > set_time_scale(&t->tsc_scale, tmp); > init_percpu_time(); Yes, this would prevent stime going backwards. But at the same time it would latch the imprecise calculations done initially. The farther off the initial scale (e.g. when using "high" in case "nominal" isn't available, as discussed previously), the bigger the error. That may be mainly (only?) a cosmetic thing, but still. Actually, if we did that, what would prevent stime going backwards by the update done in init_percpu_time()? Aiui we really want .local_stime to be written there for the very first time. > That's kind of the same logic that's used in cpu_frequency_change() > ahead of calling set_time_scale(). That function is ripe for removal anyway, so I'm hesitant to derive anything from it. Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 12:41:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:41:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313925.1583946 (Exim 4.92) (envelope-from ) id 1wPgEH-0006Qm-Fo; Wed, 20 May 2026 12:40:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313925.1583946; Wed, 20 May 2026 12:40:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgEH-0006Qf-Cs; Wed, 20 May 2026 12:40:53 +0000 Received: by outflank-mailman (input) for mailman id 1313925; Wed, 20 May 2026 12:40:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgEG-0006QZ-1O for xen-devel@lists.xenproject.org; Wed, 20 May 2026 12:40:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPgEF-00H8DU-69 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:40:51 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dabd3-bab6-0a2a0a5309dd-0a2a4506d19a-0 for ; Wed, 20 May 2026 14:40:51 +0200 Received: from [209.85.221.44] (helo=mail-wr1-f44.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dabd2-7371-0a2a45060019-d155dd2ca9bc-3 for ; Wed, 20 May 2026 14:40:51 +0200 Received: by mail-wr1-f44.google.com with SMTP id ffacd0b85a97d-43d75312379so3982472f8f.1 for ; Wed, 20 May 2026 05:40:50 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779280851-87B7DD75-90B825AD/0/0 X-purgate-type: clean X-purgate-size: 1539 On 18.05.2026 13:12, Andrew Cooper wrote: > On 18/05/2026 8:53 am, Jan Beulich wrote: >> On 14.05.2026 19:56, Andrew Cooper wrote: >>> --- a/xen/arch/x86/hvm/svm/intr.c >>> +++ b/xen/arch/x86/hvm/svm/intr.c >>> @@ -33,6 +33,12 @@ static void svm_inject_nmi(struct vcpu *v) >>> u32 general1_intercepts = vmcb_get_general1_intercepts(vmcb); >>> intinfo_t event; >>> >>> + if ( vmcb->_vintr.fields.vnmi_enable ) >>> + { >>> + vmcb->_vintr.fields.vnmi_pending = true; >>> + return; >>> + } >> How does all of this work during migration to a vNMI-incapable host? The >> hw feature is used ... >> >>> --- a/xen/arch/x86/hvm/svm/vmcb.c >>> +++ b/xen/arch/x86/hvm/svm/vmcb.c >>> @@ -185,6 +185,8 @@ static int construct_vmcb(struct vcpu *v) >>> if ( default_xen_spec_ctrl == SPEC_CTRL_STIBP ) >>> v->arch.msrs->spec_ctrl.raw = SPEC_CTRL_STIBP; >>> >>> + vmcb->_vintr.fields.vnmi_enable = cpu_has_svm_vnmi; >> ... unconditionally when available (i.e. the feature not being there >> won't prevent the migration), yet the vnmi_{pend,block}ing fields are >> lost during migration (aiui). Are building on the fact that all of this >> state is already getting lost while migrating? > > I can't quite parse the final sentence, but yes; migration has always > lost the NMI state. In which case: Reviewed-by: Jan Beulich Jan > This goes largely unnoticed because guests don't issue their final > suspend from NMI context. > > ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 12:51:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:51:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313935.1583955 (Exim 4.92) (envelope-from ) id 1wPgOK-0008Ko-C0; Wed, 20 May 2026 12:51:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313935.1583955; Wed, 20 May 2026 12:51:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgOK-0008Kh-99; Wed, 20 May 2026 12:51:16 +0000 Received: by outflank-mailman (input) for mailman id 1313935; Wed, 20 May 2026 12:51:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgOJ-0008Kb-74 for xen-devel@lists.xenproject.org; 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Message-ID: <2d995d54-40fd-48e1-90c9-fbf6a9933415@citrix.com> Date: Wed, 20 May 2026 13:51:07 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH] x86: strip debug info for intermediate linking steps To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <7a2fb6cc-fc9b-43c1-9f4f-d5a573d52dbc@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <7a2fb6cc-fc9b-43c1-9f4f-d5a573d52dbc@suse.com> Content-Type: text/plain; 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At the same time > symbol table contents aren't affected by presence / absence of debug info > in the linked binaries (the ELF and COFF symbol tables would have extra > section symbols, but tools/symbols omits those anyway). > > Signed-off-by: Jan Beulich > --- > The main speed gain is from xen.efi linking. Therefore I'm not even sure > if this wants mirroring to the other targets, where only xen-syms is > produced. It would mainly be some transient space saving there. (It would > perhaps want retaining when the linking steps are moved to common code.) > Thoughts? > > On the system I measured this on, "real" time went down from 4.9s to 3.9s, > while "user" time went from 7.8s to 6.8s (all approximate values of > course, as there naturally is a bit of variance, and all for full > incremental builds with no other changes, i.e. mainly the final linking > steps getting carried out for the common/version.o change). If it saves time, then good; this will make an improvement to my dev cycle.  How does it fair on Ubuntu 16.04, where we've other known issues about the debug symbols appearing to be corrupt? It would be nice to be consistent across the board.  If we're going to make linking common soon, then it's probably fine, but this does risk becoming yet another mysterious difference. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 12:51:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:51:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313937.1583964 (Exim 4.92) (envelope-from ) id 1wPgOT-00008n-OJ; Wed, 20 May 2026 12:51:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313937.1583964; Wed, 20 May 2026 12:51:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgOT-00008g-KY; Wed, 20 May 2026 12:51:25 +0000 Received: by outflank-mailman (input) for mailman id 1313937; Wed, 20 May 2026 12:51:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgOR-00007V-H5 for xen-devel@lists.xenproject.org; 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Smith" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Teddy Astie" , xen-devel@lists.xenproject.org Message-Id: In-Reply-To: <31ee4635-0eaa-41cd-8fad-223fb11cb9bc@suse.com> References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> <31ee4635-0eaa-41cd-8fad-223fb11cb9bc@suse.com> Subject: Re: [PATCH v2 for-4.22] EFI: Fix boot from a device without a file system Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1779281481-B7D7BDB1-1810D5C3/0/0 X-purgate-type: clean X-purgate-size: 3595 On Wed, May 20, 2026, at 1:58 PM, Jan Beulich wrote: > On 20.05.2026 12:30, Szymon Aceda=C5=84ski wrote: > > @@ -1526,31 +1537,33 @@ void EFIAPI __init noreturn efi_start(EFI_HA= NDLE ImageHandle, > > =20 > > gop =3D efi_get_gop(&gop_handle); > > =20 > > - /* Get the file system interface. */ > > - dir_handle =3D get_parent_handle(loaded_image, &file_name); > > - > > /* Read and parse the config file. */ > > if ( read_section(loaded_image, L"config", &cfg, NULL) ) > > PrintStr(L"Using builtin config file\r\n"); > > - else if ( !cfg_file_name && file_name ) > > + else > > { > > - CHAR16 *tail; > > + ensure_dir_handle(loaded_image, &dir_handle, &file_name= ); > > =20 > > - while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > + if ( !cfg_file_name ) > > { > > - wstrcpy(tail, L".cfg"); > > - if ( read_file(dir_handle, file_name, &cfg, NULL) ) > > - break; > > - *tail =3D 0; > > + CHAR16 *tail; > > + > > + while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > + { > > + wstrcpy(tail, L".cfg"); > > + if ( read_file(dir_handle, file_name, &cfg, NUL= L) ) > > + break; > > + *tail =3D 0; > > + } > > + if ( !tail ) > > + blexit(L"No configuration file found."); > > + PrintStr(L"Using configuration file '"); > > + PrintStr(file_name); > > + PrintStr(L"'\r\n"); > > } > > - if ( !tail ) > > - blexit(L"No configuration file found."); > > - PrintStr(L"Using configuration file '"); > > - PrintStr(file_name); > > - PrintStr(L"'\r\n"); > > + else if ( !read_file(dir_handle, cfg_file_name, &cfg, N= ULL) ) > > + blexit(L"Configuration file not found."); > > } > > - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL)= ) > > - blexit(L"Configuration file not found."); > > pre_parse(&cfg); > > =20 > > if ( section.w ) >=20 > Seeing in particular this hunk - why not have read_file() call the new= function? This is because get_parent_handle not only sets dir_handle, but also sets file_name to something like xen.efi or BOOTX64.EFI. The quoted code then replaces .efi with .cfg to get the path to the config file to load: > > + while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > + { > > + wstrcpy(tail, L".cfg"); > > + if ( read_file(dir_handle, file_name, &cfg, NUL= L) ) I considered calling ensure_dir_handle() from read_file() for the other call sites, but this would: - still leave the explicit call in the quoted hunk, so it's a bit inconsistent (most calls implicit, one explicit) - requires passing loaded_image to read_file + changing dir_handle argument to a pointer Happy to do it in v3 if you think the call-site savings outweigh the inconsistency and the extra argument. > Most of the churn here would then go away. The hunk above is the restructure of two else-if branches into a single else block with ensure_dir_handle() on top. Most of the churn is indentation. Szymon (ACK on sending new patch versions as new threads) From xen-devel-bounces@lists.xenproject.org Wed May 20 12:57:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 12:57:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313950.1583972 (Exim 4.92) (envelope-from ) id 1wPgUT-00019h-Al; Wed, 20 May 2026 12:57:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313950.1583972; Wed, 20 May 2026 12:57:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgUT-00019a-81; Wed, 20 May 2026 12:57:37 +0000 Received: by outflank-mailman (input) for mailman id 1313950; Wed, 20 May 2026 12:57:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPgUR-00019O-FR for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Best Regards, Edwin Thankachan Embedded Software Engineer Electrifex Technologies Pvt. Ltd., Trans Asia Cyber Park, Infopark SEZ Phase 2, Kochi 682303, Kerala, India Web: www.electrifex.com --_000_PN0PR01MB892424B0AE38BCAAACB0C659EC012PN0PR01MB8924INDP_ Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable


Best Regar= ds,

Edwin Thankachan


Embedded Software Engineer

Electrifex Technolo= gies Pvt. Ltd., 

Trans Asia Cyber Park, Infopark SEZ Phase 2= , 

Kochi 682303, Kerala, India

Web:     www.electrifex.com

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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779284442-89B7BA53-0EFB91F3/10/73395122804 X-purgate-type: spam X-purgate-size: 5326 On 5/20/26 2:03 PM, Jan Beulich wrote: > On 20.05.2026 13:33, Oleksii Kurochko wrote: >> >> >> On 5/19/26 1:53 PM, Jan Beulich wrote: >>> On 19.05.2026 13:22, Oleksii Kurochko wrote: >>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>>>>>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>> >>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>> dereference triggers UBSAN: >>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>> >>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>> >>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>> >>>>>> I question this, largely (but not only) because I also ... >>>>>> >>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>> --- >>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>> >>>>>> ... question this mode of operation. Yes, you may (for now) be able to >>>>>> get >>>>>> away without, but e.g. event channels will want supporting at some point. >>>>>> Which will require a shared info page. Better put that in place right >>>>>> away, >>>>>> even if the guests you test with don't use it (yet). Certain other common >>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>> >>>>> >>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>> >>>>>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>         goto fail; >>>>> >>>>>     clear_page(d->shared_info); >>>>> >>>>> ... but without calling share_xen_page_with_guest() after that >>>>> allocation as share_xen_page_with_guest() isn't implemented at the moment? >>> >>> I would have said "yes" here, but ... >>> >>>> Or could it be an option for all arch-s move allocation of >>>> d->shared_info to domain_create() in common just after arch_domain_create()? >>> >>> ... Andrew's reply pretty much rules out not only this option, but the >>> shared-info-page concept as a whole (for RISC-V). See my reply there. In >>> the meantime, the change as suggested may then indeed be what we want to >>> go with, albeit (a) with a better description and (b) perhaps covering >>> all d->shared_info uses. >> >> Looking at guest kernel code (Linux), FIFO is tried first, so if RISC-V >> is going to support only FIFO, d->shared_info could legally be NULL. >> >> Looking at the Xen side, if an architecture decides to support only >> FIFO, d->shared_info is touched only in vcpu_info_reset(), which is >> called from vcpu_create(). >> >> All other places where d->shared_info is accessed should not be >> reachable except for one case in event_fifo.c: when a guest issues the >> EVTCHNOP_init_control hypercall, setup_ports() reads from shared_info(d, >> evtchn_pending): >> static void setup_ports(struct domain *d, unsigned int prev_evtchns) >> { >> ... >> if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) >> evtchn->pending = true; >> ... >> } >> } >> >> This looks like it handles the transition from the 2L ABI to the FIFO >> ABI: if a guest started with 2L and then switched to FIFO, any events >> already pending in shared_info(d, evtchn_pending) need to be migrated to >> FIFO's per-channel evtchn->pending flag. But it looks like I am missing >> something here as I mentioned at the start that Linux uses or FIFO or 2L. >> >> Am I missing something? > > Quite likely you aren't, but I didn't check. My earlier "covering all" may > well resolve to merely stating things accordingly in the patch description. If either FIFO or 2L can be used, shouldn't guest_test_bit(d, port, &shared_info(d, evtchn_pending)) in setup_ports() be dropped? If FIFO was chosen by Linux, there won't be any events in &shared_info(d, evtchn_pending), so it is essentially dead code that could just be dropped. Or would it be better to leave it and skip only if d->shared_info is allocated: if ( d->shared_info && guest_test_bit(...) ) to cover the case when a guest wants to switch from 2L to FIFO (if that is even a possible case at all, since as I mentioned above, the guest (Linux) chooses the event ABI once and it stays for its lifetime)? ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 13:50:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 13:50:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313978.1583990 (Exim 4.92) (envelope-from ) id 1wPhJL-0001Qy-7U; Wed, 20 May 2026 13:50:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1313978.1583990; Wed, 20 May 2026 13:50:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPhJL-0001Qr-4v; Wed, 20 May 2026 13:50:11 +0000 Received: by outflank-mailman (input) for mailman id 1313978; Wed, 20 May 2026 13:50:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPhJJ-0001Ql-Md for xen-devel@lists.xenproject.org; Wed, 20 May 2026 13:50:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPhJI-00AUIF-Jz for xen-devel@lists.xenproject.org; Wed, 20 May 2026 15:50:08 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dbc0f-2eae-0a2a0a5409dd-0a2a45089730-2 for ; Wed, 20 May 2026 15:50:08 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dbc10-63b5-0a2a45080019-d1558032a409-3 for ; Wed, 20 May 2026 15:50:08 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48fde648a71so36200935e9.0 for ; Wed, 20 May 2026 06:50:08 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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If symbol table sizes change after the 2nd linking > pass, insert another one before the final one. (As a comment in Linux puts > it, "In theory it's possible this results in even more stubs, but > unlikely.") > > To use the $(compare-symbol-tables) macro in a shell "if", it needs > slightly adjusting (and then wrapping to be run in a sub-shell). > > Signed-off-by: Jan Beulich > --- > There's imo no good Fixes: tag, since (aiui) stubs (veneers) may also be > inserted for reasons other than errata workarounds. > > For context: The Cortex A53 erratum 843419 workaround in GNU ld comes in > two flavors: In the general case a stub is inserted, but if the problem > ADRP can be replaced by ADR (i.e. the target symbol is within ±1Mb), then > that's preferred and no stub is needed. The addition of the symbol table > data is what then results in the stub-less form to no longer be usable in > affected configurations. A possible countermeasure could be to move > .rodata ahead of .text. (Also, from looking at generated code, it may well > be that newer gcc simply avoids producing problematic insn sequences.) > > Linux simply compares object file sizes, but I consider that fragile: A > change in size of one of the symbol table constituents may not necessarily > change the object file size, due to padding which may be in use. > > Once we generalize linking, we may want to introduce an equivalent of > Linux'es KALLSYMS_EXTRA_PASS as well. I don't think doing this right here > would make overly much sense, though. Probably we want to have the similar for RISC-V. Not so far time ago in downstream we faced the following issue: https://gitlab.com/xen-project/people/olkur/xen/-/jobs/14389897308 Unfortunately I wasn't able to reproduce it locally and it was only on CI but I suggested the similar to this fix and it helped: diff --git a/xen/arch/riscv/Makefile b/xen/arch/riscv/Makefile index a1124eb5d072..72b9789cfd9c 100644 --- a/xen/arch/riscv/Makefile +++ b/xen/arch/riscv/Makefile @@ -52,9 +52,15 @@ $(TARGET)-syms: $(objtree)/prelink.o $(obj)/xen.lds | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o - $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).2.o -o $@ + $(dot-target).2.o -o $(dot-target).2 + $(NM) -pa --format=sysv $(dot-target).2 \ + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + > $(dot-target).3.S + $(MAKE) $(build)=$(@D) $(dot-target).3.o + $(call compare-symbol-tables, $(dot-target).2.o, $(dot-target).3.o) + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ + $(dot-target).3.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map The fix wasn't sent as after merging some extra patches on top of it the issue just disappear. > > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -99,9 +99,20 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target).2.S > $(MAKE) $(build)=$(@D) $(dot-target).2.o > - $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) > + if ! { $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) >/dev/null; }; \ > + then \ > + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > + $(dot-target).2.o -o $(dot-target).2; \ > + $(NM) -pa --format=sysv $(dot-target).2 \ > + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + > $(dot-target).3.S; \ > + $(MAKE) $(build)=$(@D) $(dot-target).3.o; \ > + $(call compare-symbol-tables, $(dot-target).2.o, $(dot-target).3.o); \ > + else \ > + ln -sf $(dot-target).2.o $(dot-target).3.o; \ > + fi > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ > - $(dot-target).2.o -o $@ > + $(dot-target).3.o -o $@ > $(NM) -pa --format=sysv $@ \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@.map > --- a/xen/scripts/Kbuild.include > +++ b/xen/scripts/Kbuild.include > @@ -65,7 +65,7 @@ define compare-symbol-tables > $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ > ln -f $(2) $(@D)/.cst.$$$$; \ > $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ > - rm -f $(@D)/.cst.$$$$ > + rm -f $(@D)/.cst.$$$$; \ > diff -u $(1).sym $(2).sym > endef > LGTM: Reviewed-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 13:55:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 13:55:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1313986.1583999 (Exim 4.92) (envelope-from ) id 1wPhO1-0001yX-OK; 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> >> > >> - dirty_vram->last_dirty = NOW(); > >> + dirty_vram->last_dirty = -1; > >> > >> /* Tell the caller that this time we could not track dirty bits. */ > >> rc = -ENODATA; > >> } > >> - else if ( dirty_vram->last_dirty == -1 ) > >> - /* still completely clean, just copy our empty bitmap */ > >> - memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); > >> - else > >> + /* Nothing to do when the bitmap is still completely clean. */ > >> + else if ( dirty_vram->last_dirty != -1 ) > >> { > >> mfn_t map_mfn = INVALID_MFN; > >> void *map_sl1p = NULL; > >> + bool any_dirty = false; > >> + s_time_t now; > >> > >> /* Iterate over VRAM to track dirty bits. */ > >> for ( i = 0; i < nr_frames; i++ ) > >> @@ -1174,16 +1174,20 @@ int shadow_track_dirty_vram(struct domai > >> if ( dirty ) > >> { > >> dirty_vram->dirty_bitmap[i / 8] |= 1 << (i % 8); > >> - dirty_vram->last_dirty = NOW(); > >> + any_dirty = true; > >> } > >> } > >> > >> + now = NOW(); > >> + if ( any_dirty ) > >> + dirty_vram->last_dirty = now; > > > > I'm a bit confused with the setting of ->last_dirty here ... > > > >> + > >> if ( map_sl1p ) > >> unmap_domain_page(map_sl1p); > >> > >> memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); > >> memset(dirty_vram->dirty_bitmap, 0, dirty_size); > > > > ... as here the bitmap is zeroed, and hence ->last_dirty should be set > > to -1? > > That's not how I understand the field is used. Aiui it identifies "was > clean for more than 2 seconds". That's not the case here. Hence the > setting to -1 only conditionally a few lines down from here. Hm, OK, it seems like a very complicated way to signal this. Won't it be easier to unconditionally store the last write time in ->last_dirty, and let the consumer decide whether it's been more than 2s or not? Maybe you could write a comment next to the field in the struct declaration? Either way: Acked-by: Roger Pau Monné > >> @@ -1216,6 +1220,7 @@ int shadow_track_dirty_vram(struct domai > >> paging_lock(d); > >> for ( i = 0; i < dirty_size; i++ ) > >> dirty_vram->dirty_bitmap[i] |= dirty_bitmap[i]; > >> + dirty_vram->last_dirty = NOW(); > > > > I think this is doesn't deserve a 'Fixes:' tag because the setting of > > ->last_dirty unconditionally to NOW() regardless of whether the bitmap > > is zeroed? > > There was (and is) no unconditional setting of ->last_dirty. Technically > maybe a Fixes: tag might be appropriate, but this is an error path which > should never be taken (assuming a well behaved DM). Do you think I should > dig out the offending commit? I'm not specially fuzzed about backporting this, I think it's fine to go in without a Fixes tag (and then no backport). Thanks, Roger. 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: DU5PR03MB10263.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 07aeb2bf-fc01-4498-b681-08deb677b83a X-MS-Exchange-CrossTenant-originalarrivaltime: 20 May 2026 13:57:24.1293 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: qhs3/gSDtOcYdav48K/PgTMSth9noYd6O/qGknGNrFzNYh4sdCr5L4G49STEJUvYf5s+deD8XMcFZKNc3wSfdNkcLZ5OEYBGQX84lfDfHcw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7980 X-purgate-ID: tlsNG-c1860d/1779285446-BE368DB1-790FE86E/0/0 X-purgate-type: clean X-purgate-size: 5912 XEN_DOMCTL_SCHEDOP_putvcpuinfo can flip the RTDS_extratime bit on a vCPU that is currently depleted (cur_budget =3D=3D 0, possibly sitting on the depleted queue). rt_dom_cntl() touches only svc->flags; cur_budget is left unchanged. As a result the next code path that calls runq_insert() on this vCPU - rt_unit_wake() after a domain_unpause(), rt_context_saved() following a delayed runq add, or repl_timer_handler() after a replenishment - places the vCPU on the run queue, because has_extratime(svc) is now true and runq_insert() admits extratime units regardless of cur_budget: /* add svc to runq if svc still has budget or its extratime is set */ if ( svc->cur_budget > 0 || has_extratime(svc) ) deadline_runq_insert(svc, &svc->q_elem, runq); else list_add(&svc->q_elem, &prv->depletedq); The very next rt_schedule() iterates the run queue from runq_pick() and trips the ASSERT(iter_svc->cur_budget > 0) at the bottom of the loop, panicking the host. Observed trace: Assertion 'iter_svc->cur_budget > 0' failed at common/sched/rt.c:1035 ----[ Xen-4.22-unstable arm64 debug=3Dy ubsan=3Dy Not tainted ]---- [<...>] rt.c#rt_schedule+0x1558/0x33e0 (PC) [<...>] core.c#do_schedule+0x2e4/0x15b4 [<...>] core.c#schedule+0xb14/0xe50 [<...>] softirq.c#__do_softirq+0x20c/0x3d4 [<...>] do_softirq+0x14/0x1c [<...>] domain.c#idle_loop+0x194/0x558 Minimal reproducer: pin a single-vCPU domU to a pCPU, program RTDS with extratime off and a low utilisation (e.g. budget =3D 10ms / period =3D 100m= s) so the vCPU spends most of its time in the depleted queue, pause the domain, issue a putvcpuinfo that sets XEN_DOMCTL_SCHEDRT_extra, then unpause. As soon as the schedule softirq fires on the pCPU, the BUG hits. The same sequence is reachable without an explicit pause: any window in which rt_dom_cntl() runs between burn_budget()'s budget exhaustion and rt_context_saved()'s runq_insert() also closes onto the same broken state, because the per-scheduler lock is dropped between those two points. The semantics for "extratime gets exhausted budget refilled" already live in burn_budget(): if ( has_extratime(svc) ) { svc->priority_level++; svc->cur_budget =3D svc->budget; } Apply the same priority-demotion-and-refill in rt_dom_cntl() when the flag transitions from off to on while the vCPU is depleted, clear RTDS_depleted to match, and - if the vCPU is currently on the depleted queue - move it to the run queue using the same q_remove() + runq_insert() pattern already used by repl_timer_handler(). The vCPU remains on the replenishment queue throughout, so its normal replenishment cadence is preserved. The complementary transition (on -> off) is already safe: clearing the flag only narrows the runq_insert() admission condition, so subsequent depleted insertions correctly route to the depleted queue. No other call sites need changes: with cur_budget restored before the flag is observable to runq_insert(), runq_pick()'s long-standing invariant (every run-queue entry has cur_budget > 0) is preserved. Signed-off-by: Oleksii Moisieiev --- xen/common/sched/rt.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/xen/common/sched/rt.c b/xen/common/sched/rt.c index b156f61afa..18e39977be 100644 --- a/xen/common/sched/rt.c +++ b/xen/common/sched/rt.c @@ -1465,7 +1465,41 @@ rt_dom_cntl( svc->period =3D period; svc->budget =3D budget; if ( local_sched.u.rtds.flags & XEN_DOMCTL_SCHEDRT_extra ) + { + /* + * Turning extratime on while the vCPU is depleted + * (cur_budget <=3D 0) leaves cur_budget unchanged. Th= e + * next runq_insert() on this vCPU - from + * rt_unit_wake() after a domain unpause, + * rt_context_saved() following a delayed runq add, or + * repl_timer_handler() - then places it on the run + * queue because has_extratime() is now true, even + * though cur_budget is 0. The very next rt_schedule() + * iterates the run queue from runq_pick() and trips + * the ASSERT(iter_svc->cur_budget > 0). + * + * Apply the same priority-demotion-and-refill that + * burn_budget() would have performed if the flag had + * been set when the budget ran out, clear the + * depleted state, and - if the vCPU is currently on + * the depleted queue - move it to the run queue so + * the new extratime allocation is picked up + * immediately instead of waiting for the next + * replenishment. + */ + if ( !has_extratime(svc) && svc->cur_budget <=3D 0 ) + { + svc->priority_level++; + svc->cur_budget =3D svc->budget; + __clear_bit(__RTDS_depleted, &svc->flags); + if ( unit_on_q(svc) ) + { + q_remove(svc); + runq_insert(ops, svc); + } + } __set_bit(__RTDS_extratime, &svc->flags); + } else __clear_bit(__RTDS_extratime, &svc->flags); spin_unlock_irqrestore(&prv->lock, flags); --=20 2.43.0 base-commit: d6fb54fa71926e2ab44ccd84f968ec9228319d65 branch: amoi_rtds_extra_budget_par= From xen-devel-bounces@lists.xenproject.org Wed May 20 14:09:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:09:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314003.1584018 (Exim 4.92) (envelope-from ) id 1wPhbn-0004jU-5G; Wed, 20 May 2026 14:09:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314003.1584018; Wed, 20 May 2026 14:09:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPhbn-0004jN-1s; Wed, 20 May 2026 14:09:15 +0000 Received: by outflank-mailman (input) for mailman id 1314003; Wed, 20 May 2026 14:09:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPhbj-0004jE-Vm for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:09:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPhbj-004LMM-BX; Wed, 20 May 2026 16:09:11 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dc083-2eae-0a2a0a5409dd-0a2a4506a0f0-26 for ; Wed, 20 May 2026 16:09:10 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dc085-7371-0a2a45060019-5a9b3222df30-3 for ; Wed, 20 May 2026 16:09:09 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPhbR-00000007ENY-3nxJ; Wed, 20 May 2026 14:08:55 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=QS4NMsaNSoU7MmRQD1e7M/qaWF5XdZVKlFlNM8QnvlQ=; b=V7NbBBRxTQzb4WZQPH0ia7W/u4 3ap8xYFd0M/I/URx05Sytf3MhFybq9K7GVj95D7uC2Cnm6QCUOEOGNzr+QlLj+Ju7dp8z3OdV4wZ3 QFCcI0S19iHHGmiwuSl9i6sU6nkpxFiBVfwyUXuxSTDVoETShIo7st29u6rBnCfU+upJiw+WHh3pk rhQyUXImFihk+Ta7IZRuDthpjteHwyNnvb6mFgjTg+DTtY8n88VY6mmMSnMU8hDJpWGeB1BmYQ9ys cfwlIEynsY7i992ptTzokZmqeoCoMzXgVLgwHPoMt9jXQQFI0A8ZOAs/qEjbXMu5Jp9h/8DGhKMn2 Hm59lBmg==; Message-ID: <15b04b2640820d275d051b3dfbcd15302b93f355.camel@infradead.org> Subject: Re: [PATCH v4 04/30] KVM: x86: Add KVM_[GS]ET_CLOCK_GUEST for accurate KVM clock migration From: David Woodhouse To: Dongli Zhang , kvm@vger.kernel.org Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Sean Christopherson , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Dave Hansen , Vitaly Kuznetsov , x86@kernel.org, Marc Zyngier , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Jack Allister , Joey Gouly , joe.jin@oracle.com, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Wed, 20 May 2026 15:08:52 +0100 In-Reply-To: <08a64760-a431-4d0a-9480-562f8f38c908@oracle.com> References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-5-dwmw2@infradead.org> <0ae8e471-db7a-4842-aca4-8ef643acde8b@oracle.com> <935312be-9a86-49fd-8bb4-2c998a68e2df@oracle.com> <32ca0a8da4bfb1e92013a7f75e0ff7541ebcd6a6.camel@infradead.org> <08a64760-a431-4d0a-9480-562f8f38c908@oracle.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-kdLl6ujEBe96tHDTmnqo" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779286150-87B7DD75-F21C171A/0/0 X-purgate-type: clean X-purgate-size: 8127 --=-kdLl6ujEBe96tHDTmnqo Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Tue, 2026-05-19 at 16:34 -0700, Dongli Zhang wrote: >=20 > I would really appreciate it if this document could be revived. I don't s= ee it > in your most recent v4 PATCH 7. It is very helpful as a guideline for how > userspace VMMs should take advantage of these APIs. In the kvmclock5 branch I'm revising for the next round. https://git.infradead.org/?p=3Dusers/dwmw2/linux.git;a=3Dcommitdiff;h=3Dae8= 72d9b75 Now has a selftest which serves as an example of the process that was documented. And an extra fix right before it in the tree, to update the master clock on vCPU creation because otherwise otherwise KVM_GET_CLOCK wasn't returning the host_tsc. I think I need to change that to only do so if ka->use_master_clock isn't *already* set though, or we risk introducing discrepancies on hotplug again? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1779286921-41D7C3FF-A1796CA4/10/73395122804 X-purgate-type: spam X-purgate-size: 5648 On 20.05.2026 15:40, Oleksii Kurochko wrote: > > > On 5/20/26 2:03 PM, Jan Beulich wrote: >> On 20.05.2026 13:33, Oleksii Kurochko wrote: >>> >>> >>> On 5/19/26 1:53 PM, Jan Beulich wrote: >>>> On 19.05.2026 13:22, Oleksii Kurochko wrote: >>>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>>>>>>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>>> >>>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>>> dereference triggers UBSAN: >>>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>>> >>>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>>> >>>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>>> >>>>>>> I question this, largely (but not only) because I also ... >>>>>>> >>>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>>> --- >>>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>>> >>>>>>> ... question this mode of operation. Yes, you may (for now) be able to >>>>>>> get >>>>>>> away without, but e.g. event channels will want supporting at some point. >>>>>>> Which will require a shared info page. Better put that in place right >>>>>>> away, >>>>>>> even if the guests you test with don't use it (yet). Certain other common >>>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>>> >>>>>> >>>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>>> >>>>>>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>>         goto fail; >>>>>> >>>>>>     clear_page(d->shared_info); >>>>>> >>>>>> ... but without calling share_xen_page_with_guest() after that >>>>>> allocation as share_xen_page_with_guest() isn't implemented at the moment? >>>> >>>> I would have said "yes" here, but ... >>>> >>>>> Or could it be an option for all arch-s move allocation of >>>>> d->shared_info to domain_create() in common just after arch_domain_create()? >>>> >>>> ... Andrew's reply pretty much rules out not only this option, but the >>>> shared-info-page concept as a whole (for RISC-V). See my reply there. In >>>> the meantime, the change as suggested may then indeed be what we want to >>>> go with, albeit (a) with a better description and (b) perhaps covering >>>> all d->shared_info uses. >>> >>> Looking at guest kernel code (Linux), FIFO is tried first, so if RISC-V >>> is going to support only FIFO, d->shared_info could legally be NULL. >>> >>> Looking at the Xen side, if an architecture decides to support only >>> FIFO, d->shared_info is touched only in vcpu_info_reset(), which is >>> called from vcpu_create(). >>> >>> All other places where d->shared_info is accessed should not be >>> reachable except for one case in event_fifo.c: when a guest issues the >>> EVTCHNOP_init_control hypercall, setup_ports() reads from shared_info(d, >>> evtchn_pending): >>> static void setup_ports(struct domain *d, unsigned int prev_evtchns) >>> { >>> ... >>> if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) >>> evtchn->pending = true; >>> ... >>> } >>> } >>> >>> This looks like it handles the transition from the 2L ABI to the FIFO >>> ABI: if a guest started with 2L and then switched to FIFO, any events >>> already pending in shared_info(d, evtchn_pending) need to be migrated to >>> FIFO's per-channel evtchn->pending flag. But it looks like I am missing >>> something here as I mentioned at the start that Linux uses or FIFO or 2L. >>> >>> Am I missing something? >> >> Quite likely you aren't, but I didn't check. My earlier "covering all" may >> well resolve to merely stating things accordingly in the patch description. > > If either FIFO or 2L can be used, shouldn't guest_test_bit(d, port, > &shared_info(d, evtchn_pending)) in setup_ports() be dropped? If FIFO > was chosen by Linux, there won't be any events in &shared_info(d, > evtchn_pending), so it is essentially dead code that could just be > dropped. Why would it be dead code? Who said that a guest couldn't to 2L for a while, then switch to FIFO? Think of boot loaders, for example. Jan > Or would it be better to leave it and skip only if > d->shared_info is allocated: if ( d->shared_info && guest_test_bit(...) > ) to cover the case when a guest wants to switch from 2L to FIFO (if > that is even a possible case at all, since as I mentioned above, the > guest (Linux) chooses the event ABI once and it stays for its lifetime)? > > ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 14:25:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:25:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314023.1584035 (Exim 4.92) (envelope-from ) id 1wPhrd-000839-LI; Wed, 20 May 2026 14:25:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314023.1584035; Wed, 20 May 2026 14:25:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPhrd-000832-If; Wed, 20 May 2026 14:25:37 +0000 Received: by outflank-mailman (input) for mailman id 1314023; Wed, 20 May 2026 14:25:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPhrc-00082w-U3 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:25:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPhrc-00HRyn-AE for xen-devel@lists.xenproject.org; Wed, 20 May 2026 16:25:36 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dc451-e002-0a2a0a5209dd-0a2a450ce4ba-32 for ; Wed, 20 May 2026 16:25:36 +0200 Received: from [209.85.221.48] (helo=mail-wr1-f48.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dc45f-62f1-0a2a450c0019-d155dd30a81b-3 for ; Wed, 20 May 2026 16:25:35 +0200 Received: by mail-wr1-f48.google.com with SMTP id ffacd0b85a97d-44dd5cb0f81so4051856f8f.0 for ; Wed, 20 May 2026 07:25:35 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 07:25:35 -0700 (PDT) Message-ID: Date: Wed, 20 May 2026 16:25:34 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/3] x86/shadow: VRAM last_dirty tagging To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper References: <5149ab32-7d03-4ae5-9af0-e62dd5836329@suse.com> <8559db88-5f1d-4ced-980c-e71c4e229c7c@suse.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779287135-DBF7ACF5-534AB3F1/0/0 X-purgate-type: clean X-purgate-size: 2997 On 20.05.2026 15:54, Roger Pau Monné wrote: > On Mon, May 04, 2026 at 10:39:53AM +0200, Jan Beulich wrote: >> On 27.04.2026 11:28, Roger Pau Monné wrote: >>> On Tue, Feb 03, 2026 at 05:49:55PM +0100, Jan Beulich wrote: >>>> --- a/xen/arch/x86/mm/shadow/hvm.c >>>> +++ b/xen/arch/x86/mm/shadow/hvm.c >>>> @@ -1087,18 +1087,18 @@ int shadow_track_dirty_vram(struct domai >>>> if ( (dirty_vram->dirty_bitmap = xzalloc_array(uint8_t, dirty_size)) == NULL ) >>>> goto out_sl1ma; >>>> >>>> - dirty_vram->last_dirty = NOW(); >>>> + dirty_vram->last_dirty = -1; >>>> >>>> /* Tell the caller that this time we could not track dirty bits. */ >>>> rc = -ENODATA; >>>> } >>>> - else if ( dirty_vram->last_dirty == -1 ) >>>> - /* still completely clean, just copy our empty bitmap */ >>>> - memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >>>> - else >>>> + /* Nothing to do when the bitmap is still completely clean. */ >>>> + else if ( dirty_vram->last_dirty != -1 ) >>>> { >>>> mfn_t map_mfn = INVALID_MFN; >>>> void *map_sl1p = NULL; >>>> + bool any_dirty = false; >>>> + s_time_t now; >>>> >>>> /* Iterate over VRAM to track dirty bits. */ >>>> for ( i = 0; i < nr_frames; i++ ) >>>> @@ -1174,16 +1174,20 @@ int shadow_track_dirty_vram(struct domai >>>> if ( dirty ) >>>> { >>>> dirty_vram->dirty_bitmap[i / 8] |= 1 << (i % 8); >>>> - dirty_vram->last_dirty = NOW(); >>>> + any_dirty = true; >>>> } >>>> } >>>> >>>> + now = NOW(); >>>> + if ( any_dirty ) >>>> + dirty_vram->last_dirty = now; >>> >>> I'm a bit confused with the setting of ->last_dirty here ... >>> >>>> + >>>> if ( map_sl1p ) >>>> unmap_domain_page(map_sl1p); >>>> >>>> memcpy(dirty_bitmap, dirty_vram->dirty_bitmap, dirty_size); >>>> memset(dirty_vram->dirty_bitmap, 0, dirty_size); >>> >>> ... as here the bitmap is zeroed, and hence ->last_dirty should be set >>> to -1? >> >> That's not how I understand the field is used. Aiui it identifies "was >> clean for more than 2 seconds". That's not the case here. Hence the >> setting to -1 only conditionally a few lines down from here. > > Hm, OK, it seems like a very complicated way to signal this. Won't it > be easier to unconditionally store the last write time in > ->last_dirty, and let the consumer decide whether it's been more than > 2s or not? > > Maybe you could write a comment next to the field in the struct > declaration? Maybe (in a separate patch), but then how I understand the field is used may still not be quite correct. I.e. by adding a comment I may further confuse things. > Either way: > > Acked-by: Roger Pau Monné Thanks. Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 14:43:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:43:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314035.1584045 (Exim 4.92) (envelope-from ) id 1wPi8w-0002qL-6Y; Wed, 20 May 2026 14:43:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314035.1584045; Wed, 20 May 2026 14:43:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPi8w-0002qE-2y; Wed, 20 May 2026 14:43:30 +0000 Received: by outflank-mailman (input) for mailman id 1314035; Wed, 20 May 2026 14:43:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPi8v-0002q8-6f for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:43:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPi8u-0081b5-If for xen-devel@lists.xenproject.org; Wed, 20 May 2026 16:43:28 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dc888-5cb7-0a2a0a5109dd-0a2a45018db4-26 for ; Wed, 20 May 2026 16:43:28 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dc890-c1f2-0a2a45010019-d155802dcc11-3 for ; Wed, 20 May 2026 16:43:28 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so55127045e9.0 for ; Wed, 20 May 2026 07:43:28 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 07:43:27 -0700 (PDT) Message-ID: Date: Wed, 20 May 2026 16:43:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH RFC v3 0/3] x86/time: avoid early uses of NOW() to return zero To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1779288208-AE55DFF4-D7EBF1CA/0/0 X-purgate-type: clean X-purgate-size: 245 Two new prereq patches were added in response to review feedback. 1: time: add "NOW() good" indicator 2: x86/Intel: split model-specific freq calculation off of intel_log_freq() 3: x86/time: avoid early uses of NOW() to return zero Jan From xen-devel-bounces@lists.xenproject.org Wed May 20 14:45:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:45:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314040.1584053 (Exim 4.92) (envelope-from ) id 1wPiAs-0003KB-HR; Wed, 20 May 2026 14:45:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314040.1584053; Wed, 20 May 2026 14:45:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPiAs-0003K4-E8; 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Wed, 20 May 2026 07:45:25 -0700 (PDT) Message-ID: <38b28709-eddc-4dc7-9e8e-92db67d20ea7@suse.com> Date: Wed, 20 May 2026 16:45:24 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH RFC v3 1/3] time: add "NOW() good" indicator From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Bertrand Marquis , Volodymyr Babchuk , Alistair Francis , Connor Davis , Oleksii Kurochko References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779288326-21F84F3B-A81C7090/0/0 X-purgate-type: clean X-purgate-size: 2742 printk_start_of_line() checks for a value of 0 right now. In order to be able to have NOW() return at least monotonically increasing values, that needs replacing by an explicit indicator. Signed-off-by: Jan Beulich --- Arm and RISC-V may want to consider whether their initial get_cycles() can't be moved yet earlier, such that the indicator also can be set yet earlier. --- v3: New. --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -145,6 +145,7 @@ void __init preinit_xen_time(void) panic("Timer: Cannot initialize platform timer\n"); boot_count = get_cycles(); + NOW_good = true; } static void __init init_dt_xen_time(void) --- a/xen/arch/riscv/time.c +++ b/xen/arch/riscv/time.c @@ -87,6 +87,7 @@ void __init preinit_xen_time(void) panic("%s: ACPI isn't supported\n", __func__); boot_clock_cycles = get_cycles(); + NOW_good = true; /* set_xen_timer must have been set by sbi_init() already */ ASSERT(set_xen_timer); --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -2657,6 +2657,7 @@ void __init early_time_init(void) set_time_scale(&t->tsc_scale, tmp); t->stamp.local_tsc = boot_tsc_stamp; + NOW_good = true; init_percpu_time(); --- a/xen/common/time.c +++ b/xen/common/time.c @@ -22,6 +22,8 @@ #include #include +bool __ro_after_init NOW_good; + /* Nonzero if YEAR is a leap year (every 4 years, except every 100th isn't, and every 400th is). */ #define __isleap(year) \ --- a/xen/drivers/char/console.c +++ b/xen/drivers/char/console.c @@ -975,11 +975,10 @@ static void printk_start_of_line(const c } /* fall through */ case TSM_BOOT: - sec = NOW(); - nsec = do_div(sec, 1000000000); - - if ( sec | nsec ) + if ( NOW_good ) { + sec = NOW(); + nsec = do_div(sec, 1000000000); snprintf(tstr, sizeof(tstr), "[%5"PRIu64".%06"PRIu64"] ", sec, nsec / 1000); break; --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -63,6 +63,12 @@ struct tm wallclock_time(uint64_t *ns); /* Chosen so (NOW() + delta) wont overflow without an uptime of 200 years */ #define STIME_DELTA_MAX ((s_time_t)((uint64_t)~0ULL>>2)) +/* + * Indicator that the value returned by NOW() is good (earlier invocations may + * return zero or very small, merely monotonically increasing values). + */ +extern bool NOW_good; + /* Explicitly OR with 1 just in case version number gets out of sync. */ #define version_update_begin(v) (((v) + 1) | 1) #define version_update_end(v) ((v) + 1) From xen-devel-bounces@lists.xenproject.org Wed May 20 14:45:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:45:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314042.1584062 (Exim 4.92) (envelope-from ) id 1wPiB9-0003ff-OO; Wed, 20 May 2026 14:45:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314042.1584062; Wed, 20 May 2026 14:45:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPiB9-0003fY-LX; Wed, 20 May 2026 14:45:47 +0000 Received: by outflank-mailman (input) for mailman id 1314042; Wed, 20 May 2026 14:45:46 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPiB7-0003cN-W1 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:45:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPiB7-00GaD1-Bu for xen-devel@lists.xenproject.org; Wed, 20 May 2026 16:45:45 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dc919-bab6-0a2a0a5309dd-0a2a4508d5b0-0 for ; Wed, 20 May 2026 16:45:45 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dc919-63b5-0a2a45080019-d1558034e079-3 for ; Wed, 20 May 2026 16:45:45 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so72536565e9.2 for ; Wed, 20 May 2026 07:45:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 07:45:44 -0700 (PDT) Message-ID: <401037ba-97d3-4d16-926d-ecbb99947004@suse.com> Date: Wed, 20 May 2026 16:45:43 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH RFC v3 1/3] x86/Intel: split model-specific freq calculation off of intel_log_freq() From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779288345-B6577DB1-981F97E3/0/0 X-purgate-type: clean X-purgate-size: 4526 ..., for that logic to become reusable. While doing so undo the open- coding of DIV_ROUND_UP(). Also switch to the new struct cpuinfo_x86 field names. Signed-off-by: Jan Beulich --- If Misra didn't dislike non-static functions without external callers, the new function could be put below the old one, thus reducing churn and improving readability of the diff (really I moved the code for the new function up, but the diff representation is the other way around). --- v3: New. --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -476,51 +476,14 @@ static int num_cpu_cores(struct cpuinfo_ return 1; } -static void intel_log_freq(const struct cpuinfo_x86 *c) +static void intel_process_freq(const struct cpuinfo_x86 *c, + unsigned int *min_mhz, unsigned int *max_mhz) { - unsigned int eax, ebx, ecx, edx, factor; uint64_t msrval; uint8_t max_ratio, min_ratio; + unsigned int factor; - if ( c->cpuid_level >= 0x15 ) - { - cpuid(0x15, &eax, &ebx, &ecx, &edx); - if ( ecx && ebx && eax ) - { - unsigned long long val = ecx; - - val *= ebx; - printk("CPU%u: TSC: %u Hz * %u / %u = %Lu Hz\n", - smp_processor_id(), ecx, ebx, eax, val / eax); - } - else if ( ecx | eax | ebx ) - { - printk("CPU%u: TSC:", smp_processor_id()); - if ( ecx ) - printk(" core: %u Hz", ecx); - if ( ebx && eax ) - printk(" ratio: %u / %u", ebx, eax); - printk("\n"); - } - } - - if ( c->cpuid_level >= 0x16 ) - { - cpuid(0x16, &eax, &ebx, &ecx, &edx); - if ( ecx | eax | ebx ) - { - printk("CPU%u:", smp_processor_id()); - if ( ecx ) - printk(" bus: %u MHz", ecx); - if ( eax ) - printk(" base: %u MHz", eax); - if ( ebx ) - printk(" max: %u MHz", ebx); - printk("\n"); - } - } - - switch ( c->x86 ) + switch ( c->family ) { static const unsigned short core_factors[] = { 26667, 13333, 20000, 16667, 33333, 10000, 40000 }; @@ -533,7 +496,7 @@ static void intel_log_freq(const struct if ( !max_ratio ) return; - switch ( c->x86_model ) + switch ( c->model ) { case 0x0e: /* Core */ case 0x0f: case 0x16: case 0x17: case 0x1d: /* Core2 */ @@ -578,10 +541,61 @@ static void intel_log_freq(const struct return; } + if ( min_mhz ) + *min_mhz = DIV_ROUND_UP(factor * min_ratio, 100); + *max_mhz = DIV_ROUND_UP(factor * max_ratio, 100); +} + +static void intel_log_freq(const struct cpuinfo_x86 *c) +{ + unsigned int eax, ebx, ecx, edx, min_mhz = 0, max_mhz = 0; + + if ( c->cpuid_level >= 0x15 ) + { + cpuid(0x15, &eax, &ebx, &ecx, &edx); + if ( ecx && ebx && eax ) + { + unsigned long long val = ecx; + + val *= ebx; + printk("CPU%u: TSC: %u Hz * %u / %u = %Lu Hz\n", + smp_processor_id(), ecx, ebx, eax, val / eax); + } + else if ( ecx | eax | ebx ) + { + printk("CPU%u: TSC:", smp_processor_id()); + if ( ecx ) + printk(" core: %u Hz", ecx); + if ( ebx && eax ) + printk(" ratio: %u / %u", ebx, eax); + printk("\n"); + } + } + + if ( c->cpuid_level >= 0x16 ) + { + cpuid(0x16, &eax, &ebx, &ecx, &edx); + if ( ecx | eax | ebx ) + { + printk("CPU%u:", smp_processor_id()); + if ( ecx ) + printk(" bus: %u MHz", ecx); + if ( eax ) + printk(" base: %u MHz", eax); + if ( ebx ) + printk(" max: %u MHz", ebx); + printk("\n"); + } + } + + intel_process_freq(c, &min_mhz, &max_mhz); + if ( !max_mhz ) + return; + printk("CPU%u: ", smp_processor_id()); - if ( min_ratio ) - printk("%u ... ", (factor * min_ratio + 50) / 100); - printk("%u MHz\n", (factor * max_ratio + 50) / 100); + if ( min_mhz ) + printk("%u ... ", min_mhz); + printk("%u MHz\n", max_mhz); } static void init_intel_perf(struct cpuinfo_x86 *c) From xen-devel-bounces@lists.xenproject.org Wed May 20 14:46:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:46:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314051.1584073 (Exim 4.92) (envelope-from ) id 1wPiBv-0004Fw-1X; Wed, 20 May 2026 14:46:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314051.1584073; Wed, 20 May 2026 14:46:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPiBu-0004Fp-TZ; Wed, 20 May 2026 14:46:34 +0000 Received: by outflank-mailman (input) for mailman id 1314051; Wed, 20 May 2026 14:46:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPiBu-0004Fh-F4 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 14:46:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPiBt-004SpS-RR for xen-devel@lists.xenproject.org; Wed, 20 May 2026 16:46:33 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dc939-e002-0a2a0a5209dd-0a2a4503e3f2-30 for ; Wed, 20 May 2026 16:46:33 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dc949-672d-0a2a45030019-d1558029c930-3 for ; Wed, 20 May 2026 16:46:33 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-488b8bc6bc9so29462145e9.3 for ; Wed, 20 May 2026 07:46:33 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 07:46:33 -0700 (PDT) Message-ID: <7d59c238-4ff4-40aa-a050-37446bd3973f@suse.com> Date: Wed, 20 May 2026 16:46:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH RFC v3 3/3] x86/time: avoid early uses of NOW() to return zero From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779288393-3794D938-983638CA/0/0 X-purgate-type: clean X-purgate-size: 6188 Waiting loops like the one in flush_command_buffer() will degenerate to infinite ones when used early enough for NOW() to still return constant zero. Make sure the returned value at least monotonically increases. When available, use nominal frequency values as initial approximation. Do this only in get_s_time(), as producing a sane value in get_s_time_fixed() for non-zero inputs won't be reasonably possible. Put an assertion there. Reported-by: Roger Pau Monné Signed-off-by: Jan Beulich --- RFC: While generally the mentioned waiting loops will take longer to time out, on a very fast CPU tight loops may time out too early. RFC: On the 2nd pass through early_cpu_init() it may be okay to skip the new additions. With "x86/time: set AP's TSC scale estimate earlier" the counter update may not need to be atomic anymore, as then only the BSP can reasonably hit that path. I don't think Fixes: tags should be put here. If we did, we'd have to enumerate all introductions of early uses of NOW() (or get_s_time()), with the exception of those dealing with getting back 0 (which I expect is only printk_start_of_line()). Will want backporting nevertheless (unless deemed too risky). --- v3: Use "high" / "max" freq if "nominal" isn't available. Set NOW_good. v2: Add assertion to get_s_time_fixed(). Use nominal frequencies for very early setting, if available. --- a/xen/arch/x86/cpu/common.c +++ b/xen/arch/x86/cpu/common.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include @@ -403,6 +404,36 @@ void __init early_cpu_init(bool verbose) &c->x86_capability[FEATURESET_7d1]); } + if (c->cpuid_level >= 0x15) { + cpuid(0x15, &eax, &ebx, &ecx, &edx); + + if (ecx && ebx && eax) + preset_tsc_scale(DIV_ROUND_UP(ecx * 1UL * ebx, eax)); + else if (c->cpuid_level >= 0x16) { + /* Assume CPU base freq ≈ TSC freq. */ + cpuid(0x16, &eax, &ebx, &ecx, &edx); + if (eax) + preset_tsc_scale(eax * 1000000UL); + else if (ebx) /* See preset_tsc_scale() for why. */ + preset_tsc_scale(ebx * 1000000UL); + } + } else if (c->vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) { + unsigned int nom_mhz = 0, hi_mhz = 0; + + amd_process_freq(c, NULL, &nom_mhz, &hi_mhz); + if (nom_mhz) + preset_tsc_scale(nom_mhz * 1000000UL); + else if (hi_mhz) /* See preset_tsc_scale() for why. */ + preset_tsc_scale(hi_mhz * 1000000UL); + } else if (c->vendor & X86_VENDOR_INTEL) { + unsigned int hi_mhz = 0; + + /* See preset_tsc_scale() for why. */ + intel_process_freq(c, NULL, &hi_mhz); + if (hi_mhz) + preset_tsc_scale(hi_mhz * 1000000UL); + } + eax = cpuid_eax(0x80000000); if ((eax >> 16) == 0x8000 && eax >= 0x80000008) { ebx = eax >= 0x8000001f ? cpuid_ebx(0x8000001f) : 0; --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -21,6 +21,7 @@ mktime (unsigned int year, unsigned int int time_suspend(void); int time_resume(void); +void preset_tsc_scale(unsigned long freq); void init_percpu_time(void); void time_latch_stamps(void); --- a/xen/arch/x86/cpu/intel.c +++ b/xen/arch/x86/cpu/intel.c @@ -476,8 +476,8 @@ static int num_cpu_cores(struct cpuinfo_ return 1; } -static void intel_process_freq(const struct cpuinfo_x86 *c, - unsigned int *min_mhz, unsigned int *max_mhz) +void intel_process_freq(const struct cpuinfo_x86 *c, + unsigned int *min_mhz, unsigned int *max_mhz) { uint64_t msrval; uint8_t max_ratio, min_ratio; --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -414,6 +414,9 @@ static inline uint8_t get_cpu_family(uin return fam; } +void intel_process_freq(const struct cpuinfo_x86 *c, + unsigned int *min_mhz, unsigned int *max_mhz); + #ifdef CONFIG_INTEL extern int8_t opt_tsx; extern bool rtm_disabled; --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -1661,6 +1661,9 @@ s_time_t get_s_time_fixed(u64 at_tsc) const struct cpu_time *t = &this_cpu(cpu_time); u64 tsc, delta; + /* scale_delta() degenerates when the scale wasn't set yet. */ + ASSERT(t->tsc_scale.mul_frac); + if ( at_tsc ) tsc = at_tsc; else @@ -1676,6 +1679,20 @@ s_time_t get_s_time_fixed(u64 at_tsc) s_time_t get_s_time(void) { + /* + * Before the TSC scale is set, avoid returning constant 0 (or whatever + * this_cpu(cpu_time).stamp.local_stime is set to). While the returned + * value is in no way representing time, it at least increases + * monotonically, thus avoiding e.g. waiting loops to degenerate to + * entirely infinite ones. + */ + if ( unlikely(!this_cpu(cpu_time).tsc_scale.mul_frac) ) + { + static s_time_t counter; + + return arch_fetch_and_add(&counter, 1); + } + return get_s_time_fixed(0); } @@ -2629,6 +2646,22 @@ int __init init_xen_time(void) return 0; } +/* BSP-only function to pre-set an approximate TSC scale. */ +void __init preset_tsc_scale(unsigned long freq) +{ + struct cpu_time *t = &this_cpu(cpu_time); + + /* + * The incoming frequency is only approximate (nominal). Increase it by + * 1% to make NOW() output rather a little too slow than too fast, thus + * avoiding a possible backwards jump once the final scale is set. + */ + freq += DIV_ROUND_UP(freq, 100); + + set_time_scale(&t->tsc_scale, freq); + t->stamp.local_tsc = boot_tsc_stamp; + NOW_good = true; +} /* Early init function. */ void __init early_time_init(void) @@ -2646,6 +2679,9 @@ void __init early_time_init(void) "TSC ADJUST set to %lx on boot CPU - clearing\n", tmp); wrmsrl(MSR_IA32_TSC_ADJUST, 0); boot_tsc_stamp -= tmp; + + if ( t->stamp.local_tsc ) + t->stamp.local_tsc -= tmp; } } From xen-devel-bounces@lists.xenproject.org Wed May 20 14:56:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 14:56:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314067.1584088 (Exim 4.92) (envelope-from ) id 1wPiKu-0006Lf-0R; Wed, 20 May 2026 14:55:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314067.1584088; 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boundary="-=Part.1063.84da57cda8e78332.19e45e2b0ba.77f21546638438cc=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779288944826 X-purgate-ID: tlsNG-ebf023/1779288949-2BD6C3FF-A36AB71A/0/0 X-purgate-type: clean X-purgate-size: 832 ---=Part.1063.84da57cda8e78332.19e45e2b0ba.77f21546638438cc=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 18, 2026 at 07:35:43AM +0000, Mykyta Poturai wrote: > Init helpers sometimes fail to rebuild after switching branches, > which results in runtime faults=2E >=20 > Fix this by adding missing DEPS_INCLUDE to the Makefile=2E >=20 > Signed-off-by: Mykyta Poturai That's not really a complete fix, but that will help, and that's the best our current build system can do=2E Acked-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1063.84da57cda8e78332.19e45e2b0ba.77f21546638438cc=--- From xen-devel-bounces@lists.xenproject.org Wed May 20 15:08:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 15:08:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314085.1584098 (Exim 4.92) (envelope-from ) id 1wPiXT-0000IH-1Z; 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charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1779289729-81F76161-96B95780/10/73395122804 X-purgate-type: spam X-purgate-size: 7236 On 5/20/26 4:21 PM, Jan Beulich wrote: > On 20.05.2026 15:40, Oleksii Kurochko wrote: >> >> >> On 5/20/26 2:03 PM, Jan Beulich wrote: >>> On 20.05.2026 13:33, Oleksii Kurochko wrote: >>>> >>>> >>>> On 5/19/26 1:53 PM, Jan Beulich wrote: >>>>> On 19.05.2026 13:22, Oleksii Kurochko wrote: >>>>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside >>>>>>>>> the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, >>>>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>>>> >>>>>>>>> However, it does not guard against d->shared_info being NULL.  The >>>>>>>>> shared_info() macro expands to a member access through d->shared_info, >>>>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>>>> dereference triggers UBSAN: >>>>>>>>>    UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>>>    member access within null pointer of type 'struct shared_info_t' >>>>>>>>> >>>>>>>>> Extend the existing fallback condition to also cover the case where no >>>>>>>>> shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info >>>>>>>>> instead. This is the correct behaviour: dummy_vcpu_info already serves >>>>>>>>> as the safe stand-in for vcpus that have no usable shared_info slot. >>>>>>>>> >>>>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area registration") >>>>>>>> >>>>>>>> I question this, largely (but not only) because I also ... >>>>>>>> >>>>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>>>> --- >>>>>>>>> RISC-V does not allocate a shared_info page at the momemnt because its >>>>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>>>> >>>>>>>> ... question this mode of operation. Yes, you may (for now) be able to >>>>>>>> get >>>>>>>> away without, but e.g. event channels will want supporting at some point. >>>>>>>> Which will require a shared info page. Better put that in place right >>>>>>>> away, >>>>>>>> even if the guests you test with don't use it (yet). Certain other common >>>>>>>> code also assumes d->shared_info to never be NULL for an alive domain. >>>>>>>> >>>>>>> >>>>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>>>> >>>>>>>     if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>>>         goto fail; >>>>>>> >>>>>>>     clear_page(d->shared_info); >>>>>>> >>>>>>> ... but without calling share_xen_page_with_guest() after that >>>>>>> allocation as share_xen_page_with_guest() isn't implemented at the moment? >>>>> >>>>> I would have said "yes" here, but ... >>>>> >>>>>> Or could it be an option for all arch-s move allocation of >>>>>> d->shared_info to domain_create() in common just after arch_domain_create()? >>>>> >>>>> ... Andrew's reply pretty much rules out not only this option, but the >>>>> shared-info-page concept as a whole (for RISC-V). See my reply there. In >>>>> the meantime, the change as suggested may then indeed be what we want to >>>>> go with, albeit (a) with a better description and (b) perhaps covering >>>>> all d->shared_info uses. >>>> >>>> Looking at guest kernel code (Linux), FIFO is tried first, so if RISC-V >>>> is going to support only FIFO, d->shared_info could legally be NULL. >>>> >>>> Looking at the Xen side, if an architecture decides to support only >>>> FIFO, d->shared_info is touched only in vcpu_info_reset(), which is >>>> called from vcpu_create(). >>>> >>>> All other places where d->shared_info is accessed should not be >>>> reachable except for one case in event_fifo.c: when a guest issues the >>>> EVTCHNOP_init_control hypercall, setup_ports() reads from shared_info(d, >>>> evtchn_pending): >>>> static void setup_ports(struct domain *d, unsigned int prev_evtchns) >>>> { >>>> ... >>>> if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) >>>> evtchn->pending = true; >>>> ... >>>> } >>>> } >>>> >>>> This looks like it handles the transition from the 2L ABI to the FIFO >>>> ABI: if a guest started with 2L and then switched to FIFO, any events >>>> already pending in shared_info(d, evtchn_pending) need to be migrated to >>>> FIFO's per-channel evtchn->pending flag. But it looks like I am missing >>>> something here as I mentioned at the start that Linux uses or FIFO or 2L. >>>> >>>> Am I missing something? >>> >>> Quite likely you aren't, but I didn't check. My earlier "covering all" may >>> well resolve to merely stating things accordingly in the patch description. >> >> If either FIFO or 2L can be used, shouldn't guest_test_bit(d, port, >> &shared_info(d, evtchn_pending)) in setup_ports() be dropped? If FIFO >> was chosen by Linux, there won't be any events in &shared_info(d, >> evtchn_pending), so it is essentially dead code that could just be >> dropped. > > Why would it be dead code? Who said that a guest couldn't to 2L for a > while, then switch to FIFO? Think of boot loaders, for example. I jsut based my assumption on Linux use case, if generally such switch is okay then I will add to my original patch what I suggested here ... > > Jan > >> Or would it be better to leave it and skip only if >> d->shared_info is allocated: if ( d->shared_info && guest_test_bit(...) >> ) to cover the case when a guest wants to switch from 2L to FIFO (if >> that is even a possible case at all, since as I mentioned above, the >> guest (Linux) chooses the event ABI once and it stays for its lifetime)? ... + refactor commit message: ``` xen/domain: fix UBSAN null pointer dereference of d->shared_info It is legal to have d->shared_info equal to NULL for architectures which support only the FIFO ABI for event channel management. Having d->shared_info == NULL leads to a UBSAN issue on such architectures: UBSAN: Undefined behaviour in common/domain.c:325:10 member access within null pointer of type 'struct shared_info_t' vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, and falls back to dummy_vcpu_info for vcpus beyond that limit. Extend the existing fallback condition to also cover the case where no shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info instead. This is the correct behaviour: dummy_vcpu_info already serves as the safe stand-in for vcpus that have no usable shared_info slot. Additionally, if an architecture supports only the FIFO ABI, setup_ports() should be updated to avoid a NULL pointer dereference of d->shared_info, since in that case there will be no pending events in shared_info->evtchn_pending and the pending flag of the FIFO event channel does not need to be set to true. ``` ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 15:21:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 15:21:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314095.1584107 (Exim 4.92) (envelope-from ) id 1wPijq-00038v-3V; Wed, 20 May 2026 15:21:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314095.1584107; Wed, 20 May 2026 15:21:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPijp-00038o-W2; Wed, 20 May 2026 15:21:37 +0000 Received: by outflank-mailman (input) for mailman id 1314095; Wed, 20 May 2026 15:21:36 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wPijo-00038i-Go for xen-devel@lists.xenproject.org; Wed, 20 May 2026 15:21:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPijn-00H6k0-9x for xen-devel@lists.xenproject.org; Wed, 20 May 2026 17:21:35 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dd17f-5cb7-0a2a0a5109dd-0a2a4505884e-0 for ; Wed, 20 May 2026 17:21:35 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dd17f-aaa8-0a2a45050019-d155da2fc517-3 for ; Wed, 20 May 2026 17:21:35 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bd85ebb368fso723872466b.1 for ; Wed, 20 May 2026 08:21:35 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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AFNElJ81SZmMTDxP1pE3TMB7sQF5xSaBdWrMS1o5QMAKcHT4oLkzQ2+FuEmL1zeiATq8RO2FLs4PHASsPUE=@lists.xenproject.org X-Gm-Message-State: AOJu0YyBY18fEogBdM1ZDJdntZpywOEP5qlRyJlHcKGgjatMAjUlC69F VeO3sxK8Je8V9VaqtbjzK3sWVxUtfKR21tXpVwYuflzUALzzmf/9mwf6 X-Gm-Gg: Acq92OFlnimLhs9oJWH0AFUgLp4LJOBNpltSYyg9gKVsY1CVJUY6klrU2RL4k1D6y60 /X1ZodBrsyuZHZjSQXUirAof/DQ+iLGpm5Yl4C0xlk1kKYW4iXrgGn27Rz38S+sfOWQ2sLrsFY6 IXhmJrSKW3sSrgh3AUgzgsUMPhoEXEqskvI5n9MEmRJytBU4pZMfumGmfF6d1FDauotbOJ1GVHZ aXiCbdV9g2iuCRlacWUohHG5LoEXQUf83X11RvbCJKf3iPZHkhkxRrqRInngUoGvpJkMXtZFGRd Zuhgx9Y92Eoc9ZjFsQqGFX2Q32REkCxx0T01Cpzdkiiugew5g/yZyqC5bR+HuxwPeTAS5jxPHlj faAsf36RvNBI+zPtTSjvm7sMfZdsziVm41ge6VXQRB1NzqL9/F28ogwyOn0z5YQlLes0MBrr4+Q r1mPyRfWmC5W7IQbb7X6bf8Z7yV2OozI/X2zH3vqJwAxXtxGMM6JAHur6uecZ517O0ZGpqwREaA Sc= X-Received: by 2002:a17:907:c291:b0:bcd:be80:63b8 with SMTP id a640c23a62f3a-bd517ad60b0mr1466955466b.44.1779290494560; Wed, 20 May 2026 08:21:34 -0700 (PDT) Message-ID: Date: Wed, 20 May 2026 17:21:32 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v1 2/3] xen/domain: fix UBSAN null pointer dereference in vcpu_info_reset() From: Oleksii Kurochko To: Jan Beulich Cc: Baptiste Le Duc , Andrew Cooper , Anthony PERARD , Michal Orzel , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , xen-devel@lists.xenproject.org References: <09ae75638f9e7991163ed3633e7a60461d93da70.1779179301.git.oleksii.kurochko@gmail.com> <2be07ba3-879b-4c79-8103-b4951ab4cf53@suse.com> <12e89d4e-2856-4130-aaa7-1ec1a742c72f@gmail.com> <2d8166e4-009f-4066-b96d-fb9e41b548a1@suse.com> <5f2013a0-d90b-49c9-bd18-afeffebac74e@suse.com> <16fb059d-84a1-4f2c-bd25-36ac1fc6d0c1@gmail.com> Content-Language: en-US In-Reply-To: <16fb059d-84a1-4f2c-bd25-36ac1fc6d0c1@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779290495-D8D7F443-6184FA2D/10/73395122804 X-purgate-type: spam X-purgate-size: 9082 On 5/20/26 5:08 PM, Oleksii Kurochko wrote: > > > On 5/20/26 4:21 PM, Jan Beulich wrote: >> On 20.05.2026 15:40, Oleksii Kurochko wrote: >>> >>> >>> On 5/20/26 2:03 PM, Jan Beulich wrote: >>>> On 20.05.2026 13:33, Oleksii Kurochko wrote: >>>>> >>>>> >>>>> On 5/19/26 1:53 PM, Jan Beulich wrote: >>>>>> On 19.05.2026 13:22, Oleksii Kurochko wrote: >>>>>>> On 5/19/26 12:55 PM, Oleksii Kurochko wrote: >>>>>>>> On 5/19/26 11:37 AM, Jan Beulich wrote: >>>>>>>>> On 19.05.2026 10:39, Oleksii Kurochko wrote: >>>>>>>>>> vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu >>>>>>>>>> slot inside >>>>>>>>>> the domain's shared_info page for vcpus with id < >>>>>>>>>> XEN_LEGACY_MAX_VCPUS, >>>>>>>>>> and falls back to dummy_vcpu_info for vcpus beyond that limit. >>>>>>>>>> >>>>>>>>>> However, it does not guard against d->shared_info being NULL. >>>>>>>>>> The >>>>>>>>>> shared_info() macro expands to a member access through d- >>>>>>>>>> >shared_info, >>>>>>>>>> so when an architecture does not allocate a shared_info page the >>>>>>>>>> dereference triggers UBSAN: >>>>>>>>>>       UBSAN: Undefined behaviour in common/domain.c:325:10 >>>>>>>>>>       member access within null pointer of type 'struct >>>>>>>>>> shared_info_t' >>>>>>>>>> >>>>>>>>>> Extend the existing fallback condition to also cover the case >>>>>>>>>> where no >>>>>>>>>> shared_info page has been allocated, mapping the vcpu to >>>>>>>>>> dummy_vcpu_info >>>>>>>>>> instead. This is the correct behaviour: dummy_vcpu_info >>>>>>>>>> already serves >>>>>>>>>> as the safe stand-in for vcpus that have no usable shared_info >>>>>>>>>> slot. >>>>>>>>>> >>>>>>>>>> Fixes: 295514ff75506 ("common: convert vCPU info area >>>>>>>>>> registration") >>>>>>>>> >>>>>>>>> I question this, largely (but not only) because I also ... >>>>>>>>> >>>>>>>>>> Signed-off-by: Oleksii Kurochko >>>>>>>>>> Reviewed-by: Baptiste Le Duc >>>>>>>>>> --- >>>>>>>>>> RISC-V does not allocate a shared_info page at the momemnt >>>>>>>>>> because its >>>>>>>>>> guests run in dom0less mode and do not use the Xen PV ABI, so >>>>>>>>>> d->shared_info remains NULL throughout domain lifetime. >>>>>>>>> >>>>>>>>> ... question this mode of operation. Yes, you may (for now) be >>>>>>>>> able to >>>>>>>>> get >>>>>>>>> away without, but e.g. event channels will want supporting at >>>>>>>>> some point. >>>>>>>>> Which will require a shared info page. Better put that in place >>>>>>>>> right >>>>>>>>> away, >>>>>>>>> even if the guests you test with don't use it (yet). Certain >>>>>>>>> other common >>>>>>>>> code also assumes d->shared_info to never be NULL for an alive >>>>>>>>> domain. >>>>>>>>> >>>>>>>> >>>>>>>> Would it be fine than to allocate it in arch_domain_create() ... : >>>>>>>> >>>>>>>>         if ( (d->shared_info = alloc_xenheap_pages(0, 0)) == NULL ) >>>>>>>>             goto fail; >>>>>>>> >>>>>>>>         clear_page(d->shared_info); >>>>>>>> >>>>>>>> ... but without calling share_xen_page_with_guest() after that >>>>>>>> allocation as share_xen_page_with_guest() isn't implemented at >>>>>>>> the moment? >>>>>> >>>>>> I would have said "yes" here, but ... >>>>>> >>>>>>> Or could it be an option for all arch-s move allocation of >>>>>>> d->shared_info to domain_create() in common just after >>>>>>> arch_domain_create()? >>>>>> >>>>>> ... Andrew's reply pretty much rules out not only this option, but >>>>>> the >>>>>> shared-info-page concept as a whole (for RISC-V). See my reply >>>>>> there. In >>>>>> the meantime, the change as suggested may then indeed be what we >>>>>> want to >>>>>> go with, albeit (a) with a better description and (b) perhaps >>>>>> covering >>>>>> all d->shared_info uses. >>>>> >>>>> Looking at guest kernel code (Linux), FIFO is tried first, so if >>>>> RISC-V >>>>> is going to support only FIFO, d->shared_info could legally be NULL. >>>>> >>>>> Looking at the Xen side, if an architecture decides to support only >>>>> FIFO, d->shared_info is touched only in vcpu_info_reset(), which is >>>>> called from vcpu_create(). >>>>> >>>>> All other places where d->shared_info is accessed should not be >>>>> reachable except for one case in event_fifo.c: when a guest issues the >>>>> EVTCHNOP_init_control hypercall, setup_ports() reads from >>>>> shared_info(d, >>>>> evtchn_pending): >>>>>      static void setup_ports(struct domain *d, unsigned int >>>>> prev_evtchns) >>>>>      { >>>>>      ... >>>>>              if ( guest_test_bit(d, port, &shared_info(d, >>>>> evtchn_pending)) >>>>>                  evtchn->pending = true; >>>>>      ... >>>>>          } >>>>>      } >>>>> >>>>> This looks like it handles the transition from the 2L ABI to the FIFO >>>>> ABI: if a guest started with 2L and then switched to FIFO, any events >>>>> already pending in shared_info(d, evtchn_pending) need to be >>>>> migrated to >>>>> FIFO's per-channel evtchn->pending flag. But it looks like I am >>>>> missing >>>>> something here as I mentioned at the start that Linux uses or FIFO >>>>> or 2L. >>>>> >>>>> Am I missing something? >>>> >>>> Quite likely you aren't, but I didn't check. My earlier "covering >>>> all" may >>>> well resolve to merely stating things accordingly in the patch >>>> description. >>> >>> If either FIFO or 2L can be used, shouldn't guest_test_bit(d, port, >>> &shared_info(d, evtchn_pending)) in setup_ports() be dropped? If FIFO >>> was chosen by Linux, there won't be any events in &shared_info(d, >>> evtchn_pending), so it is essentially dead code that could just be >>> dropped. >> >> Why would it be dead code? Who said that a guest couldn't to 2L for a >> while, then switch to FIFO? Think of boot loaders, for example. > > I jsut based my assumption on Linux use case, if generally such switch > is okay then I will add to my original patch what I suggested here ... > >> >> Jan >> >>> Or would it be better to leave it and skip only if >>> d->shared_info is allocated: if ( d->shared_info && guest_test_bit(...) >>> )  to cover the case when a guest wants to switch from 2L to FIFO (if >>> that is even a possible case at all, since as I mentioned above, the >>> guest (Linux) chooses the event ABI once and it stays for its lifetime)? > > ... + refactor commit message: > ``` > xen/domain: fix UBSAN null pointer dereference of d->shared_info > > It is legal to have d->shared_info equal to NULL for architectures which > support only the FIFO ABI for event channel management. > > Having d->shared_info == NULL leads to a UBSAN issue on such architectures: >   UBSAN: Undefined behaviour in common/domain.c:325:10 >          member access within null pointer of type 'struct shared_info_t' > > vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside > the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, > and falls back to dummy_vcpu_info for vcpus beyond that limit. > Extend the existing fallback condition to also cover the case where no > shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info > instead. This is the correct behaviour: dummy_vcpu_info already serves > as the safe stand-in for vcpus that have no usable shared_info slot. > > Additionally, if an architecture supports only the FIFO ABI, setup_ports() > should be updated to avoid a NULL pointer dereference of d->shared_info, > since in that case there will be no pending events in > shared_info->evtchn_pending and the pending flag of the FIFO event > channel does not need to be set to true. > ``` > Additionally it seems it is needed to add the following: diff --git a/xen/common/domctl.c b/xen/common/domctl.c index 93738931c575..2fa2dcdf4ded 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -104,9 +104,12 @@ void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) #ifdef CONFIG_MEM_PAGING info->paged_pages = atomic_read(&d->paged_pages); #endif - info->shared_info_frame = - gfn_x(mfn_to_gfn(d, _mfn(virt_to_mfn(d->shared_info)))); - BUG_ON(SHARED_M2P(info->shared_info_frame)); + if ( d->shared_info ) + { + info->shared_info_frame = + gfn_x(mfn_to_gfn(d, _mfn(virt_to_mfn(d->shared_info)))); + BUG_ON(SHARED_M2P(info->shared_info_frame)); + } info->cpupool = cpupool_get_id(d); diff --git a/xen/common/time.c b/xen/common/time.c index 04a65f00b35c..1ee49a8b0d13 100644 --- a/xen/common/time.c +++ b/xen/common/time.c @@ -94,6 +94,9 @@ void update_domain_wallclock_time(struct domain *d) uint32_t *wc_version; uint64_t sec; + if ( !d->shared_info ) + return; + spin_lock(&wc_lock); wc_version = &shared_info(d, wc_version); ~ Oleksii From xen-devel-bounces@lists.xenproject.org Wed May 20 15:52:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 15:52:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314121.1584116 (Exim 4.92) (envelope-from ) id 1wPjDF-0007eq-Fw; Wed, 20 May 2026 15:52:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314121.1584116; Wed, 20 May 2026 15:52:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjDF-0007ej-Ci; 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boundary="-=Part.1070.9e5a0f0fefa47ed6.19e4616267f.17fafed23575f740=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779292317315 X-purgate-ID: tlsNG-16d1c6/1779292319-8D785D75-174FA97F/0/0 X-purgate-type: clean X-purgate-size: 1984 ---=Part.1070.9e5a0f0fefa47ed6.19e4616267f.17fafed23575f740=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable __{put,get}_guest returns -EFAULT on access faults which causes the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is incorrect=2E Fix the computation by relying on copy_{from,to}_guest_pv which reports the number of remaining bytes instead of a negative errno, such that we can compute the offset properly=2E Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") Signed-off-by: Teddy Astie --- xen/arch/x86/pv/emul-gate-op=2Ec | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/pv/emul-gate-op=2Ec b/xen/arch/x86/pv/emul-gate-= op=2Ec index c2c699fbff=2E=2Ecacc171115 100644 --- a/xen/arch/x86/pv/emul-gate-op=2Ec +++ b/xen/arch/x86/pv/emul-gate-op=2Ec @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) int rc; #define push(item) do \ { \ + unsigned int __value =3D item; \ --stkp; \ esp -=3D 4; \ - rc =3D __put_guest(item, stkp); \ + rc =3D copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ if ( rc ) \ { \ pv_inject_page_fault(PFEC_write_access, \ @@ -359,7 +360,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) unsigned int parm; =20 --ustkp; - rc =3D __get_guest(parm, ustkp); + rc =3D copy_from_guest_pv(&parm, ustkp, sizeof(parm))= ; if ( rc ) { pv_inject_page_fault(0, (unsigned long)(ustkp + 1= ) - rc); --=20 2=2E52=2E0 -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vate= s=2Etech ---=Part.1070.9e5a0f0fefa47ed6.19e4616267f.17fafed23575f740=--- From xen-devel-bounces@lists.xenproject.org Wed May 20 16:03:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 16:03:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314131.1584125 (Exim 4.92) (envelope-from ) id 1wPjOJ-0001bs-Dt; Wed, 20 May 2026 16:03:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314131.1584125; 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boundary="-=Part.1071.99cd8c440335dea4.19e4620903d.4105d4de25590562=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779292999742 X-purgate-ID: tlsNG-c1860d/1779293006-B777EDB1-E646E5FB/0/0 X-purgate-type: clean X-purgate-size: 2937 ---=Part.1071.99cd8c440335dea4.19e4620903d.4105d4de25590562=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, May 20, 2026 at 01:53:34PM +0200, Jan Beulich wrote: > Once we generalize linking, we may want to introduce an equivalent of > Linux'es KALLSYMS_EXTRA_PASS as well=2E I don't think doing this right h= ere > would make overly much sense, though=2E If you generalise linking, you are going to put it in a shell script, right? Because this recipe is getting very complicated, for within a makefile=2E > --- a/xen/arch/arm/Makefile > +++ b/xen/arch/arm/Makefile > @@ -99,9 +99,20 @@ $(TARGET)-syms: $(objtree)/prelink=2Eo $(o > | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > > $(dot-target)=2E2=2ES > $(MAKE) $(build)=3D$(@D) $(dot-target)=2E2=2Eo > - $(call compare-symbol-tables, $(dot-target)=2E1=2Eo, $(dot-target)=2E2= =2Eo) > + if ! { $(call compare-symbol-tables, $(dot-target)=2E1=2Eo, $(dot-targ= et)=2E2=2Eo) >/dev/null; }; \ This `>/dev/null` seems to only suppress the output of the `diff` of the macro, is it what is intended? > + then \ > + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen=2Elds $< $(build_id_linker) \ > + $(dot-target)=2E2=2Eo -o $(dot-target)=2E2; \ > + $(NM) -pa --format=3Dsysv $(dot-target)=2E2 \ > + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > + > $(dot-target)=2E3=2ES; \ > + $(MAKE) $(build)=3D$(@D) $(dot-target)=2E3=2Eo; \ This new block ignore all errors, from LD, NM and MAKE=2E We want a `set -e` before the if=2E > + $(call compare-symbol-tables, $(dot-target)=2E2=2Eo, $(dot-target)=2E= 3=2Eo); \ At least, an error returned by `diff` in that macro should be taken into account, for now=2E > + else \ > + ln -sf $(dot-target)=2E2=2Eo $(dot-target)=2E3=2Eo; \ > + fi > $(LD) $(XEN_LDFLAGS) -T $(obj)/xen=2Elds $< $(build_id_linker) \ > - $(dot-target)=2E2=2Eo -o $@ > + $(dot-target)=2E3=2Eo -o $@ > $(NM) -pa --format=3Dsysv $@ \ > | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > > $@=2Emap > --- a/xen/scripts/Kbuild=2Einclude > +++ b/xen/scripts/Kbuild=2Einclude > @@ -65,7 +65,7 @@ define compare-symbol-tables > $(OBJDUMP) -t $(@D)/=2Ecst=2E$$$$ > $(1)=2Esym; \ > ln -f $(2) $(@D)/=2Ecst=2E$$$$; \ > $(OBJDUMP) -t $(@D)/=2Ecst=2E$$$$ > $(2)=2Esym; \ > - rm -f $(@D)/=2Ecst=2E$$$$ > + rm -f $(@D)/=2Ecst=2E$$$$; \ > diff -u $(1)=2Esym $(2)=2Esym This macro is missing `set -e`, if both OBJDUMP command fails and create an empty file, `diff` will return success=2E But looks like `set -e` in this macro isn't going to work in the condition of the `if`=2E Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1071.99cd8c440335dea4.19e4620903d.4105d4de25590562=--- From xen-devel-bounces@lists.xenproject.org Wed May 20 16:04:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 16:04:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314136.1584134 (Exim 4.92) (envelope-from ) id 1wPjP5-00021o-LH; Wed, 20 May 2026 16:04:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314136.1584134; Wed, 20 May 2026 16:04:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjP5-00021h-Ii; Wed, 20 May 2026 16:04:15 +0000 Received: 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[37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH] docs: Update console=pv requirement Date: Wed, 20 May 2026 18:03:45 +0200 MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1072.4d949d962ea7e0dd.19e46215a78.4bbfb8025a971d63=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779293051512 X-purgate-ID: tlsNG-16d1c6/1779293054-86168D75-A274F77A/0/0 X-purgate-type: clean X-purgate-size: 1591 ---=Part.1072.4d949d962ea7e0dd.19e46215a78.4bbfb8025a971d63=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable PV console doesn't require Xen to be running as a shim and only requires CONFIG_XEN_GUEST and running as a Xen guest=2E Update the documentation accordingly=2E Fixes: 4f6609d6a665 ("x86/guest: use PV console for Xen/Dom0 I/O") Signed-off-by: Teddy Astie --- docs/misc/xen-command-line=2Epandoc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/docs/misc/xen-command-line=2Epandoc b/docs/misc/xen-command-l= ine=2Epandoc index 52d4ca0f2f=2E=2Ed46d5b2152 100644 --- a/docs/misc/xen-command-line=2Epandoc +++ b/docs/misc/xen-command-line=2Epandoc @@ -446,8 +446,9 @@ the converse; transmitted and received characters will= have their MSB cleared=2E This allows a single port to be shared by two subsystems (e=2Eg=2E console and debugger)=2E =20 -`pv` indicates that Xen should use Xen's PV console=2E This option is -only available when used together with `pv-in-pvh`=2E +`pv` indicates that Xen should use Xen's PV console=2E This option requir= es +Xen running as a Xen guest=2E and is only available if the hypervisor was +compiled with `CONFIG_XEN_GUEST` enabled=2E =20 `dbgp` or `ehci` indicates that Xen should use a USB2 debug port=2E =20 --=20 2=2E52=2E0 -- Teddy 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2026 18:27:51 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC v1 5/7] x86/hvm: Move INSTR_* constants to hvm.h To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk References: <20260518131404.3716969-1-ross.lagerwall@citrix.com> <20260518131404.3716969-6-ross.lagerwall@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; keydata= xsDNBGn5sK8BDACuzSrrTjpVf4ay06OYB6yY0J1PqKffihoNMtrQRZjAHxoAPC7LTBVHV/XO Zw5HJc+9R71z1JV+iYg6z3jPziGKzX8Fj3ZXlzJPmpf1PuETH3KdbvtJT4ny+OGntnJntUoR KRPhTirr6yNeBk/637O3CQXjtqFUPZnko8OI/o1yawIBhJJAWicutjkkUgd28Bh6HV9EIumH tCBgn5/1A/fpm9624MMgYLsA8qjC4XsoovQvFCaO8HEhvfzrrTZHjn/nPeB9SigxIxXW8YaT VqMdqul07o72m3eA2mf+LMu9a04FX/d4wbxBLtELm+1jIrbtyaFZEMOLv/haSiS/Lj3btJH/ EoucejoZ5SH49ksmVAmKOLktOaTQ8b2gEvP7iaKiIiszCCtOSRohr+2GvDsDeLvVZnlR3I+S PhHar7TPKjFz0G3DPNolyjXywNqOAMpomSPi8lSwjAFsxOtQbcck/qRGRSNk4DAmH70pA+89 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multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------nWwNd3YfCTqIOB9d3IGnGF0Z" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779294472135 X-purgate-ID: tlsNG-c1860d/1779294476-B7370DB1-F0A9F2A5/0/0 X-purgate-type: clean X-purgate-size: 12065 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------nWwNd3YfCTqIOB9d3IGnGF0Z Content-Type: multipart/mixed; boundary="------------w0AUmbiNtGs0DU4wEQcl2flT"; protected-headers="v1" From: Teddy Astie To: Ross Lagerwall , xen-devel@lists.xenproject.org Cc: Jan Beulich , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Jason Andryuk Message-ID: Subject: Re: [RFC v1 5/7] x86/hvm: Move INSTR_* constants to hvm.h References: <20260518131404.3716969-1-ross.lagerwall@citrix.com> <20260518131404.3716969-6-ross.lagerwall@citrix.com> In-Reply-To: <20260518131404.3716969-6-ross.lagerwall@citrix.com> --------------w0AUmbiNtGs0DU4wEQcl2flT Content-Type: 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action=none header.from=citrix.com; Message-ID: <93cbe99f-a75b-4837-be6b-d6621d9f4d6d@citrix.com> Date: Wed, 20 May 2026 17:27:44 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate To: Teddy Astie , xen-devel@lists.xenproject.org References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe 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=?utf-8?B?dWdva1VaaitFaE9ybi9kM0FsU0l6cGJaTWIyNEMyUUtxQ0dwMHdHOEU5NDRY?= =?utf-8?Q?f2lYBnQLVyfEDE5E=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: e74fd248-5729-40f4-caf1-08deb68cbaba X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 May 2026 16:27:47.9596 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Fs4OPMVz6cF1ov9gFQsnCX7bWtpGQjj82owAmfBTh7axjshGFJJUxmLYZSyYx96kJXOYMw2Vhx+WJpQvXqNr49uo9vMWdzUVO5oDQH3q3sk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN8PR03MB5108 X-purgate-ID: tlsNG-ebf023/1779294471-405703FF-D6098164/0/0 X-purgate-type: clean X-purgate-size: 1097 On 20/05/2026 4:51 pm, Teddy Astie wrote: > __{put,get}_guest returns -EFAULT on access faults which causes > the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is > incorrect. > > Fix the computation by relying on copy_{from,to}_guest_pv which > reports the number of remaining bytes instead of a negative errno, > such that we can compute the offset properly. > > Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") > Signed-off-by: Teddy Astie Given it was __*_guest() before, I think we can use the __copy_*_guest_pv() variants. I can fix on commit if you're happy?  Reviewed-by: Andrew Cooper Jan, this wants committing ahead of your MISRA change, as it needs backporting. Strictly speaking, gate emulation is all PV right now.  It does want moving behind CONFIG_PV32. Also, with these two callers dropped, all remaining users of __{get,put}_guest() only care about success/failure rather than the precise value, so there is probably some cleanup which can be done. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 16:34:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 16:34:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314175.1584160 (Exim 4.92) (envelope-from ) id 1wPjsg-0007Vy-9Q; Wed, 20 May 2026 16:34:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314175.1584160; Wed, 20 May 2026 16:34:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjsg-0007Vq-5w; Wed, 20 May 2026 16:34:50 +0000 Received: by outflank-mailman (input) for mailman id 1314175; Wed, 20 May 2026 16:34:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjse-0007Vk-3f for xen-devel@lists.xenproject.org; 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Message-ID: <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> Date: Wed, 20 May 2026 17:34:38 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate To: Teddy Astie , xen-devel@lists.xenproject.org References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> Content-Type: text/plain; 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> #define push(item) do \ > { \ > + unsigned int __value = item; \ > --stkp; \ > esp -= 4; \ > - rc = __put_guest(item, stkp); \ > + rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ Oh, this probably violates MISRA, but you don't need to use a separate variable because sizeof() has no side effects. Given that the expression is now &item, I think it needs to be &(item). Can also be fixed on commit. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 16:36:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 16:36:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314180.1584170 (Exim 4.92) (envelope-from ) id 1wPjtq-00082c-MF; Wed, 20 May 2026 16:36:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314180.1584170; Wed, 20 May 2026 16:36:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjtq-00082V-JC; Wed, 20 May 2026 16:36:02 +0000 Received: by outflank-mailman (input) for mailman id 1314180; Wed, 20 May 2026 16:36:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPjtp-00082N-5W for xen-devel@lists.xenproject.org; Wed, 20 May 2026 16:36:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPjto-007ABp-Hn for xen-devel@lists.xenproject.org; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=7OsXOt1ZtVwGuaBqf2QY0vMR1N9YWSAj+bSzWlfXDuk=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=GnHCwiv8/fTFscFJI9ko75iTeL+4bt+7BisBST/QUq0wohbEXZ8zuRh5KHLSRs2Wcj6eMsDp1 mmnpbamKAt6sPIuNmnLvhsvcf9appeaaBec6eG8Yk6bHw2kg7M8MMFq4gBMRoE4vHEtM4tWdCfp N52maNPceUd05zqhhxC/XN4LpTomdG60qwLsYgI4JPFKEdffi0KNI70i/9FyklCbKuXWeU12vZE Nv72apnGRRHpe6eSQFKzne3GsIgNLTtdHgUM2CwVRSzqnBVjn2NUMjiTPSG863AHXp2CiGGAsTH TO/A+42uag2ij6sAbtRFpW+8fqV2ulNtnC6c1uT+QoHQ== X-Zone-Loop: e24540465fab2ad8f4c1250338a67266dd678727b73b x-campaign-type: default x-transaction-id: 8133f623-a63a-4128-b8b9-a908ead6de0f x-swg-uid: 01-2190edb2-1feb-440e-97bb-7bd07a545ad9 X-Mailer: Sweego Message-ID: <1779294957.8631fc262581453bbf619ec5b2062170.19e463e7052000f373@vates.tech> x-swg-bid: 1779294957.8631fc262581453bbf619ec5b2062170.19e463e7052000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Wed, 20 May 2026 18:35:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate To: Andrew Cooper , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> <93cbe99f-a75b-4837-be6b-d6621d9f4d6d@citrix.com> Content-Language: en-US From: Teddy Astie Autocrypt: addr=teddy.astie@vates.tech; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------4w7Goen218LlNNbUXxqrJvbN" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779294957153 X-purgate-ID: tlsNG-c201ff/1779294960-DB36C443-A5A53228/0/0 X-purgate-type: clean X-purgate-size: 6634 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------4w7Goen218LlNNbUXxqrJvbN Content-Type: multipart/mixed; boundary="------------cMeW7KPLeUdDfCaVwf2deibA"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: <7b911ff5-d5f6-44a7-a1c9-a04fd991f4a7@vates.tech> Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> <93cbe99f-a75b-4837-be6b-d6621d9f4d6d@citrix.com> In-Reply-To: <93cbe99f-a75b-4837-be6b-d6621d9f4d6d@citrix.com> --------------cMeW7KPLeUdDfCaVwf2deibA Content-Type: multipart/mixed; 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>>> bool vcpu_guestmode = false; >>> struct vlapic *vlapic = vcpu_vlapic(v); >>> + struct hvm_emulate_ctxt ctxt; >>> >>> regs->rax = vmcb->rax; >>> regs->rip = vmcb->rip; >>> @@ -2840,7 +2836,9 @@ void asmlinkage svm_vmexit_handler(void) >>> } >>> >>> case VMEXIT_HLT: >>> - svm_vmexit_do_hlt(vmcb, regs); >>> + hvm_emulate_init_once(&ctxt, NULL, NULL, regs); >>> + ctxt.insn = INSTR_HLT; >>> + svm_emulate_one(&ctxt); >>> break; >> >> In this case, most of the logic is hidden behind svm_emulate_one(); >> however, SEV-ES changes some aspects of the VMEXIT_HLT behavior (this is >> the same for e.g VMEXIT_PAUSE). >> >> With SEV-ES, we can't access the CPU registers anymore but hlt can still >> be intercepted (it's a "Automatic Exit (AE)"), in this case, the CPU >> increases RIP itself (this is documented in SEV-ES section of the APM), >> and we just have to emulate the HLT behavior. How would that specific >> behavior fit in this new design ? >> >> We can skip increasing rip in this specific case, but it's now common code. > I guess we may need to somehow reflect fault vs trap semantics in the > context, for RIP updating to only occur in the former case. Indeed.  There are APIC acceleration exits which have trap semantics after the write into the APIC page has completed. For these, we need to drive the LAPIC machinery, not move RIP, but still deal with things like singlestep. I'm not even sure what the correct behaviour for blocked-by-sti/movss would be here but I suspect they can be set and would want dropping too.  The point of these VMEXIT is to let the hypervisor take an action that's still logically part of executing the instruction, and that completes prior to the shadows dropping. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 16:48:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 16:48:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314198.1584187 (Exim 4.92) (envelope-from ) id 1wPk5o-0002Ic-Uo; Wed, 20 May 2026 16:48:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314198.1584187; Wed, 20 May 2026 16:48:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPk5o-0002IV-SC; Wed, 20 May 2026 16:48:24 +0000 Received: by outflank-mailman (input) for mailman id 1314198; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------dop8SB7Y1OivNs6eaVJIbuNC" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779295698639 X-purgate-ID: tlsNG-720697/1779295703-8336C161-2A7F1FC1/0/0 X-purgate-type: clean X-purgate-size: 8298 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------dop8SB7Y1OivNs6eaVJIbuNC Content-Type: multipart/mixed; boundary="------------v7AnXBKYY1bXDuHiyp050iDT"; protected-headers="v1" From: Teddy Astie To: Andrew Cooper , xen-devel@lists.xenproject.org Cc: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Message-ID: <0ee50b7d-fe74-4b60-ae03-d8214d163153@vates.tech> Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> In-Reply-To: <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> --------------v7AnXBKYY1bXDuHiyp050iDT Content-Type: multipart/mixed; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsD5BAABCAAjFiEEGAIew9LzHY3pdrqtZg+p0QLLz9AFAmoN5dIFAwAAAAAACgkQZg+p0QLLz9CS sAv/SDsTuwOts6kHLnde2LcTx9WqsJeKPh2bJ+W0hYHe5Jq9qSv8U/q6AqALkDKYlusuXZECK5yX i88ER/g2/KBQkvXX/HD9xp9VjIXBBu5KZP7PhVbcLoupld865vCOXJls+kXCL/GqYAXqDm1+u1Qi zWewpKv532W/rT55P6oSzAB/tvq41Sa6bsnlQlOYc2qwRD19QkiNCYodnGhLBDNN9PrJrkkorKk+ FKyXBfgXg2iWMjEjMqVQ1A+C6TDwHKr9QhkGCUbgnB4yaLRTc0CUJAp+tJGCK4o/r81Yi4pF9i9A fk2XVa1CXFx2M8eSfg1c8KhvKujHvjCZxfMNq04Tt+rXifJX2oyrW9v+KVdN6I2yO8MRH4zcnIFI ZhQrWA/OeY85uODV6+wCjXZJxgZiLdr9PXr82ZBDHQ1zImUSCi2Oiy18OpxFoQtBc878y3/YzHwm ww+/Y7nmUlQ19z5jR7kGSEdGuUdevTTkWkWnrDVB5/d4yPI8/AJZkU6iL1vM =0Y4A -----END PGP SIGNATURE----- --------------dop8SB7Y1OivNs6eaVJIbuNC-- From xen-devel-bounces@lists.xenproject.org Wed May 20 17:21:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 17:21:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314217.1584198 (Exim 4.92) (envelope-from ) id 1wPkbp-0007yg-HI; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1779295699.8631fc262581453bbf619ec5b2062170.19e4649c100000f373@vates.tech> Content-Type: text/plain; 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>>>   #define push(item) do \ >>>           { \ >>> +            unsigned int __value = item; \ >>>               --stkp; \ >>>               esp -= 4; \ >>> -            rc = __put_guest(item, stkp); \ >>> +            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >> >> Oh, this probably violates MISRA, but you don't need to use a separate >> variable because sizeof() has no side effects. >> >> Given that the expression is now &item, I think it needs to be &(item). >> > > I tried something like that, but it looked a bit weird and clang > wasn't happy (at least in language server) because of the &(x + y). > > We also need to ensure that we're actually copying 32-bits scalars > (and not 16-bits or 64-bits ones) like the previous behavior. > > That diff seems to work though > > diff --git a/xen/arch/x86/pv/emul-gate-op.c > b/xen/arch/x86/pv/emul-gate-op.c > index cacc171115..b72a3058dd 100644 > --- a/xen/arch/x86/pv/emul-gate-op.c > +++ b/xen/arch/x86/pv/emul-gate-op.c > @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >          int rc; >  #define push(item) do \ >          { \ > -            unsigned int __value = item; \ >              --stkp; \ >              esp -= 4; \ > -            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ > +            rc = copy_to_guest_pv(stkp, &(uint32_t)(item), > sizeof(uint32_t)); \ >              if ( rc ) \ >              { \ >                  pv_inject_page_fault(PFEC_write_access, \  Oh, that's a second bug you're fixing then. Pushes of ss/cs need to be done with 4-byte writes and zero extended. I've added: The use of a local variable in push() also fixes a second bug.  On all but the earliest 32bit CPUs, segment selectors pushes are zero-extended 32bit stores.  Xen was not doing this for %ss and %cs. to the commit message. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 20 17:32:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 17:32:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314226.1584206 (Exim 4.92) (envelope-from ) id 1wPkmr-0001OI-Fi; Wed, 20 May 2026 17:32:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314226.1584206; Wed, 20 May 2026 17:32:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPkmr-0001OB-Ci; Wed, 20 May 2026 17:32:53 +0000 Received: by outflank-mailman (input) for mailman id 1314226; Wed, 20 May 2026 17:32:52 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPkmq-0001O5-OX for xen-devel@lists.xenproject.org; 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Message-ID: Date: Wed, 20 May 2026 18:32:44 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Subject: Re: [PATCH] docs: Update console=pv requirement To: Teddy Astie , xen-devel@lists.xenproject.org References: <1779293052.8631fc262581453bbf619ec5b2062170.19e46215cd2000f373@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1779293052.8631fc262581453bbf619ec5b2062170.19e46215cd2000f373@vates.tech> Content-Type: text/plain; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1779299801-37F7EA53-5E04E7AD/0/0 X-purgate-type: clean X-purgate-size: 1036 On Mon, May 18, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > >=20 > > --- a/arch/x86/xen/time.c > > +++ b/arch/x86/xen/time.c > > @@ -569,7 +569,7 @@ static void __init xen_init_time_common(void) > > =C2=A0 static_call_update(pv_steal_clock, xen_steal_clock); > > =C2=A0 paravirt_set_sched_clock(xen_sched_clock); > > =C2=A0 > > - x86_platform.calibrate_tsc =3D xen_tsc_khz; > > + tsc_register_calibration_routines(xen_tsc_khz, NULL); > > =C2=A0 x86_platform.get_wallclock =3D xen_get_wallclock; > > =C2=A0} > > =C2=A0 >=20 > xen_tsc_khz() doesn't use CPUID but really *should*. >=20 > Care to pull in > https://lore.kernel.org/all/20260509224824.3264567-31-dwmw2@infradead.org= / > to your next round please? >=20 > (Without the misplaced changes in kvm/x86.c that should have been in > two different prior commits, and are now folded into those correctly in > my kvmclock5 branch ready for the next posting of that). Ya, will do. What's one more patch... From xen-devel-bounces@lists.xenproject.org Wed May 20 18:00:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 18:00:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314253.1584224 (Exim 4.92) (envelope-from ) id 1wPlD6-0005Gg-Pa; Wed, 20 May 2026 18:00:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314253.1584224; Wed, 20 May 2026 18:00:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPlD6-0005GZ-Mk; Wed, 20 May 2026 18:00:00 +0000 Received: by outflank-mailman (input) for mailman id 1314253; Wed, 20 May 2026 17:59:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3m_YNagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 1wPlD5-0005GT-1v for xen-devel@lists.xenproject.org; Wed, 20 May 2026 17:59:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPlD4-00B8Dw-EX for xen-devel@lists.xenproject.org; Wed, 20 May 2026 19:59:58 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <3m_YNagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 6a0df688-2eae-0a2a0a5409dd-0a2a4509cd90-18 for ; Wed, 20 May 2026 19:59:58 +0200 Received: from [209.85.210.202] (helo=mail-pf1-f202.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <3m_YNagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 6a0df69c-2497-0a2a45090019-d155d2cab15f-3 for ; Wed, 20 May 2026 19:59:58 +0200 Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-82fa6c3a77cso2941261b3a.3 for ; Wed, 20 May 2026 10:59:57 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779299996; x=1779904796; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=CN4Zn2M2jJcMvhiuUJl3O5eQtI7RDh/+btUc2M7YWms=; b=SH3BMk/qzhgTuBB9zkEXNGLp3Yo9XQ08pfAku9KfsPEQ6sXfEmYRsdMs+wmt0H54hD yGdWX/4+kJL4VqkKUXrPdLCTkcLlYUiGFVJvBTU+1fn7+MBdqSkgxwEYNOa4JWTwoYzf 2JN6t8aoAuu5Z8TbIG5GjZ4IhCngzyqUZ5/E0Zxg+0HKC6P4JNuM9GoRYHzFg0RaTpnx ZooWuLBM43mdNzxZsCG7R8C/wrF2FIm7j+naUj53kBJtonWOQ8Q4evmsTWnOOT+vm8WF 9hNc404d6jxeDxh4hiVM1dnDeeHnRTAPoz6PANtJNLi7fdymSw0mMOFC59BHiVNSzeYS nq/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779299996; x=1779904796; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=CN4Zn2M2jJcMvhiuUJl3O5eQtI7RDh/+btUc2M7YWms=; b=Ht8u76NBnEO3IpZeEryiVtvV1d/zkE3lqboFIaB0dE1zCxHs2y2J3Z5c6dAGsFHNlS zAYz7h+Zi9mZsj9R7Cbil1KxnSLnB5hh67qjZkZCHB0rbmnf/t96ddEp65BzZ+WJNUCx AtF2nl8xQWV14tIiKdQaeGZGbRgD7X1bAQyjIjfJUNhjVOoOrPR/MnamuFtYMfKuwX5C V7NsObeZXHp8+EXUB02fabBmx+Jp1i5iRFhYbcXaFlpQ/4hAidcec5fuqxDc5CNTk1LV xHG8hCnKFusBJEYNhD+gdko4QkTlTkGbx+c8vaPQRf094C3tplmVdDzjzxxqIXtq24bk VpcQ== X-Forwarded-Encrypted: i=1; AFNElJ8r+uvB3DjFyfUprx33uMn1+iM1YxZbU0TFjEjWWHcKbuMSF7wTdKh1KFKaMZFCIKCHMXQqXz9nXYY=@lists.xenproject.org X-Gm-Message-State: AOJu0Yx0ppvt0egDUV7xh2hghnrB8NWBGRtt2y2f4140HfxB3R9uekX4 sj5bU8ILDxnhN73bS9TYW+7yuFIsZ2GcQI/nWcDXxcO17erGxm8ZkeVcczmR8BAZ+LoJ6/y9drq av6mYkw== X-Received: from pfblu4.prod.google.com ([2002:a05:6a00:7484:b0:83a:58c1:f5e2]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:2449:b0:835:405a:7e72 with SMTP id d2e1a72fcca58-83f33c24d1cmr24352155b3a.11.1779299995865; Wed, 20 May 2026 10:59:55 -0700 (PDT) Date: Wed, 20 May 2026 10:59:55 -0700 In-Reply-To: <7260682b21c28d1299e58400b9a2f4b8d23bd434.camel@infradead.org> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <7260682b21c28d1299e58400b9a2f4b8d23bd434.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 00/41] x86: Try to wrangle PV clocks vs. TSC From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1779299998-37175A53-26F4437A/0/0 X-purgate-type: clean X-purgate-size: 4263 On Tue, May 19, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > Dave/Thomas/Peter/Boris, what's the going rate for bribes to take somet= hing > > like this through the tip tree? > >=20 > > The bulk of the changes are in kvmclock and TSC, but pretty much every > > hypervisor's guest-side code gets touched at some point.=C2=A0 I am rea= onsably > > confident in the correctness of the KVM changes.=C2=A0 Michael tested H= yper-V in > > v2, and while there were conflicts when rebasing, they were largely > > superficial (and I've just jinxed myself).=C2=A0 For all other hypervis= ors, assume > > the code is compile-tested only, but those changes are all quite small = and > > straightforward. > >=20 > > The only changes that are questionable/contentious are the last two pat= ches, > > which have KVM-as-a-guest use CPUID 0x16 to get the CPU frequency, even= on > > AMD (that's the dubious part).=C2=A0 I very deliberately put them last,= so that > > they can be dropped at will (I don't care terribly if those patches lan= d). > > To merge them, I would want explicit Acks from Paolo and David W. > >=20 > > So, except for the last two patches, to get the stuff I really care abo= ut > > landed, I think/hope it's just the TSC and guest-side CoCo changes that= need > > reviews/acks? > >=20 > > The primary goal of this series is (or at least was, when I started) to > > fix flaws with SNP and TDX guests where a PV clock provided by the untr= usted > > hypervisor is used instead of the secure/trusted TSC that is controlled= by > > trusted firmware. > >=20 > > The secondary goal is to draft off of the SNP and TDX changes to slight= ly > > modernize running under KVM.=C2=A0 Currently, KVM guests will use TSC f= or > > clocksource, but not sched_clock.=C2=A0 And they ignore Intel's CPUID-b= ased TSC > > and CPU frequency enumeration, even when using the TSC instead of kvmcl= ock. > > And if the host provides the core crystal frequency in CPUID.0x15, then= KVM > > guests can use that for the APIC timer period instead of manually calib= rating > > the frequency. > >=20 > > The tertiary goal is to clean up all of the PV clock code to deduplicat= e logic > > across hypervisors, and to hopefully make it all easier to maintain goi= ng > > forward. >=20 > I booted this in qemu with -cpu host,+invtsc,+vmware-cpuid-freq >=20 > I was expecting to see it eschew the kvmclock and use *only* the TSC. > Is there even any need for 'tsc-early' given that it's *told* the TSC > frequency in CPUID? Shouldn't it have detected that the TSC is known > before init_tsc_clocksource() runs? > > And then it even spent some time at boot actually using the kvmclock as > clocksource... when ideally I don't think it would even have *enabled* > it at all? Yeah, that's definitely the ideal state. And I had all the same expectatio= ns and observations as you when digging in and testing this. But unless this seri= es makes things worse, I want punt on achieving the ideal state for the moment= , as it's proving to be a big lift just to get to a not-awful state. > [ 0.000000] clocksource: kvm-clock: mask: 0xffffffffffffffff max_cycle= s: 0x1cd42e4dffb, max_idle_ns: 881590591483 ns > [ 0.000000] tsc: Detected 2400.000 MHz processor > [ 0.008205] TSC deadline timer available > [ 0.008270] clocksource: refined-jiffies: mask: 0xffffffff max_cycles:= 0xffffffff, max_idle_ns: 1910969940391419 ns > [ 0.159085] clocksource: hpet: mask: 0xffffffff max_cycles: 0xffffffff= , max_idle_ns: 19112604467 ns > [ 0.164074] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycle= s: 0x22983777dd9, max_idle_ns: 440795300422 ns > [ 0.229087] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xfffff= fff, max_idle_ns: 1911260446275000 ns > [ 0.337095] clocksource: Switched to clocksource kvm-clock > [ 0.345246] clocksource: acpi_pm: mask: 0xffffff max_cycles: 0xffffff,= max_idle_ns: 2085701024 ns > [ 0.356201] clocksource: tsc: mask: 0xffffffffffffffff max_cycles: 0x2= 2983777dd9, max_idle_ns: 440795300422 ns > [ 0.360560] clocksource: Switched to clocksource tsc >=20 From xen-devel-bounces@lists.xenproject.org Wed May 20 18:31:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 18:31:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314278.1584233 (Exim 4.92) (envelope-from ) id 1wPlhL-0002OK-45; Wed, 20 May 2026 18:31:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314278.1584233; Wed, 20 May 2026 18:31:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPlhL-0002OD-19; Wed, 20 May 2026 18:31:15 +0000 Received: by outflank-mailman (input) for mailman id 1314278; Wed, 20 May 2026 18:31:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPlhH-0002O7-M1 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 18:31:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPlhH-00DulQ-26 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 20:31:11 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0dfdd0-2eae-0a2a0a5409dd-0a2a450cb570-30 for ; Wed, 20 May 2026 20:31:10 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0dfded-62f1-0a2a450c0019-5a9b32229ece-3 for ; Wed, 20 May 2026 20:31:09 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPlh5-00000007THG-3qKd; Wed, 20 May 2026 18:31:00 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=38VjBVseDEfelALR1MiRTEA2WPwIZueCOuQcJA11DHw=; b=okyxUeyjtEfb4IL9N+H2s3fQ4l +FXGCOPfRMtSwfjsiCCErR/hqYIp5E43h19nlrt4LOcqkVnHdTnI4R4ixw9GM3byo64IZ/CfBk9zN QlG9oyCXRDp/W4Nv8hFGJ6REc4kp1SYAJvrFHC3S5281hyRFw/yATFCORBqbsYQ8DJcq4CyQo8OIn 9twCl0C6vXyDdlGu5IPu/RSlBANVuoNJZbRft5N+r2T/6avcFTE3Cm0V5uIZHyxK9DkX4PBh0jkkL ySMglljmFU2brGpAwqD/FpsMhr94TdQ3qTAs7ut6Ck8Y1oxrtBwReeEv+UYTIVdX7di2RShBiv2WW lkFhaaWQ==; Message-ID: <6e80893d022b10110f520acf152f70ff6acf2e00.camel@infradead.org> Subject: Re: [PATCH v3 00/41] x86: Try to wrangle PV clocks vs. TSC From: David Woodhouse To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 19:30:58 +0100 In-Reply-To: References: <20260515191942.1892718-1-seanjc@google.com> <7260682b21c28d1299e58400b9a2f4b8d23bd434.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-nkQFBHechIC9A3sNo6/e" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779301870-E3370CF5-87EC9819/0/0 X-purgate-type: clean X-purgate-size: 7941 --=-nkQFBHechIC9A3sNo6/e Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2026-05-20 at 10:59 -0700, Sean Christopherson wrote: >=20 > > And then it even spent some time at boot actually using the kvmclock as > > clocksource... when ideally I don't think it would even have *enabled* > > it at all? >=20 > Yeah, that's definitely the ideal state.=C2=A0 And I had all the same exp= ectations and > observations as you when digging in and testing this.=C2=A0 But unless th= is series > makes things worse, I want punt on achieving the ideal state for the mome= nt, as > it's proving to be a big lift just to get to a not-awful state. Ack. Just checking my understanding was correct. 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List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=vfqQqe3/Q5FohBSCxOE8qHtO0nxO4XvM5LjLHZKXyao=; b=LMM/1bfq7BKcsb1h5JmlVGAaqW vi8jmiUaEoy+tahKu2tgUaSO9O0xNvl+zkTWYReTeSdPjeJucgVK5iiSoGE8XdlPjbEflxMAovy0J 9Q4N+u9Y/VZ6oK8vkDXNkLffswvQhkZ01Bazh+3DdTFIGV670OJV4FhZ9CYmgnzNWEDZfbIoSKcRG S1wnSn16JqIf9a8tBjsyYQZjy69Nj6zCvX5x2jroKuilGJOO/IjPGMmqVI4LzsRgCOBYYVLj3cZG8 SahANau1nYZOtWoYoQ+CykqDx66r4FqVPVBvoTcSECdEbqdw4oMj+3eQBlwVw4PMkiBPwJlrcxmOZ V3TQPMqg==; Message-ID: Subject: Re: [PATCH v3 40/41] x86/tsc: Add standalone helper for getting CPU frequency from CPUID From: David Woodhouse To: Paolo Bonzini , Sean Christopherson , Kiryl Shutsemau , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 19:50:04 +0100 In-Reply-To: <3cb683b4-973a-4b3e-a5d5-a8baa8a70eb0@redhat.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-41-seanjc@google.com> <3cb683b4-973a-4b3e-a5d5-a8baa8a70eb0@redhat.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-JOgeb2pU8FOLtFZNxJ2T" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ebf023/1779303018-2A9623FF-30B6FFEF/0/0 X-purgate-type: clean X-purgate-size: 8201 --=-JOgeb2pU8FOLtFZNxJ2T Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2026-05-16 at 09:42 +0200, Paolo Bonzini wrote: > On 5/15/26 21:19, Sean Christopherson wrote: > > Extract the guts of cpu_khz_from_cpuid() to a standalone helper that > > doesn't restrict the usage to Intel CPUs.=C2=A0 This will allow sharing= the > > core logic with kvmclock, as (a) CPUID.0x16 may be enumerated alongside > > kvmclock, and (b) KVM generally doesn't restrict CPUID based on vendor. >=20 > Even for native there's no real reason to restrict to Intel, I think. > native_calibrate_tsc() only limits itself because historically (prior to= =20 > commit 604dc9170f24, "x86/tsc: Use CPUID.0x16 to calculate missing=20 > crystal frequency", 2019-05-09) it used a hardcoded table of crystal=20 > frequencies. >=20 > Of course paranoia applies, but for virtualization, if the leaf exists= =20 > there is no reason not to trust it. Agreed. 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List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=eRikeJAaevbA4NP2g19rUNwI2NZyhVnTYBWtQ7dcaAU=; b=lgUr7i8EL2F8QaWtzohapoINjb dAnsORiobdYMPtmsSDZ/QRiN7s1rJUCLo9RKbLoIg7hISvL/AVEQZV+KPYSUfrPlPLBx6WxW38sGS StE/N1VLLOq2EXBHiHp5tpuj4XnsA94KqqySKjvCZH1818yr33rWd2lt3i8Z7+V5eDgAVvzdgankH o6qQUd23ZxwUk68fsqyexc2ORewi6gkpiiPpEOsilLASL6yk5nr0Xj2C2toi+f9IuAfZLfUPegn0l dMC3Fcyo7XJFJ3v8+0OXg/iwVZLcN5GdGUs4G5fr4w3PaILbl4vVz1q0UuQpfAUDYMnvOFqzrUtKR sQuhKA1A==; Message-ID: <0a3aa07a1d3c4bec2b89f8026093969155b73caa.camel@infradead.org> Subject: Re: [PATCH v3 41/41] x86/kvmclock: Get CPU base frequency from CPUID when it's available From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 19:52:12 +0100 In-Reply-To: <20260515191942.1892718-42-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-42-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-iph/FD/9Oere6U4F6y6S" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1779303140-1AF76F3B-1CF750A4/0/0 X-purgate-type: clean X-purgate-size: 8741 --=-iph/FD/9Oere6U4F6y6S Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > If CPUID.0x16 is present and valid, use the CPU frequency provided by > CPUID instead of assuming that the virtual CPU runs at the same > frequency as TSC and/or kvmclock.=C2=A0 Back before constant TSCs were a > thing, treating the TSC and CPU frequencies as one and the same was > somewhat reasonable, but now it's nonsensical, especially if the > hypervisor explicitly enumerates the CPU frequency. >=20 > Signed-off-by: Sean Christopherson > --- > =C2=A0arch/x86/kernel/kvmclock.c | 16 +++++++++++++++- > =C2=A01 file changed, 15 insertions(+), 1 deletion(-) >=20 > diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c > index 62c8ea2e6769..7607920ae386 100644 > --- a/arch/x86/kernel/kvmclock.c > +++ b/arch/x86/kernel/kvmclock.c > @@ -190,6 +190,20 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action a= ction) > =C2=A0 } > =C2=A0} > =C2=A0 > +static unsigned long kvm_get_cpu_khz(void) > +{ > + unsigned int cpu_khz; > + > + /* > + * Prefer CPUID over kvmclock when possible, as the base CPU frequency > + * isn't necessarily the same as the kvmlock "TSC" frequency. > + */ > + if (!cpuid_get_cpu_freq(&cpu_khz)) > + return cpu_khz; > + > + return pvclock_tsc_khz(this_cpu_pvti()); I'm fine with this in principle but shouldn't the fallback be calling kvm_get_tsc_khz() instead of directly calling pvclock_tsc_khz()? --=-iph/FD/9Oere6U4F6y6S Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=Q62hcPFZc1NYqJLxUGdKsz2+hy0EqGUz86+v1ivJn+s=; b=g5JoUbWJQdG7sePmt8GlN2Kgqm bsgtRyCbYF3vxM3/Nedaj8XxmrWzGATtvuAoTxGm5KPEf4EzzLf0v9/Hafh3vT9zK/rHx2DttmiKu pW8SpVX/0FYF8PsbiegIcabyU7BBcJaQnsD66lRZe9YS0baBlP9pULXnvjknCaSDfUjVGy0wCLtlT Qtqzt10CHymMbbqv2Ok+IgydIWN/ELCCTwz/1IKoddqkR4WFERL7cLKMVv2X7yhLMBw9v111BUt+n /qDNPW6NjTuKyF5mttga1f22yZprgTCfTqXjQkt3CUsKmuXOw/3+n57JgRGvbQxdhhOntA39VrO8m LWv7AbDg==; Message-ID: <810a35d31c00daf48efae533134f68e23ef98de8.camel@infradead.org> Subject: Re: [PATCH v3 01/41] x86/tsc: Add a standalone helpers for getting TSC info from CPUID.0x15 From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 19:59:10 +0100 In-Reply-To: <20260515191942.1892718-2-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-2-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-AYSJ/gnlvUPwOtRc9eC8" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1779303559-B4D49FF4-A522FA9F/0/0 X-purgate-type: clean X-purgate-size: 8046 --=-AYSJ/gnlvUPwOtRc9eC8 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Extract retrieval of TSC frequency information from CPUID into standalone > helpers so that TDX guest support can reuse the logic.=C2=A0 Provide a ve= rsion > that includes the multiplier math as TDX does NOT want to use > native_calibrate_tsc()'s fallback logic that derives the TSC frequency > based on CPUID.0x16, when the core crystal frequency isn't known. >=20 > Opportunsitically drop native_calibrate_tsc()'s "=3D=3D 0" and "!=3D 0" c= hecks > in favor of the kernel's preferred style. "Opportunistically" ? Now that looks wrong too...=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-AYSJ/gnlvUPwOtRc9eC8 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPmEA-0008NE-7M for xen-devel@lists.xenproject.org; Wed, 20 May 2026 19:05:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPmE9-00HG8b-GV for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:05:09 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e05b2-5cb7-0a2a0a5109dd-0a2a450c8b5e-40 for ; Wed, 20 May 2026 21:05:09 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e05e5-62f1-0a2a450c0019-5a9b3222af66-3 for ; Wed, 20 May 2026 21:05:09 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPmE0-00000007Uvp-12En; Wed, 20 May 2026 19:05:00 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=8tbHSXv0PduRga+zT/mB8RJeehigf48DptUBou4PkPA=; b=rAm9IlUyk+WfmPm0L70sobS35Q 8cq3fq5zSk3bgOImc18izqE3hqDuQBOcWwAi1O5HYkWy3804x5Hjt615HyGyxul4NFnCjSsO5DuzO 0Wxma947xFddm4dHrcR64NJpJnhW0sHTZj6QA8BkmxeP1xHky+iq9cKJEUdVkrGyoMG9YFRydPnR6 YlGcmhd8pc1HNqDjRNgjymByHXAfA4JYQeQ8Gf/vYwygDzLtt8HiAlvIKUc0Ka10cd3IR029AM3DB kB6a2OPg+Fry3XggO/NRKqNmPNLOj7ncCeZNbT9L1Prz6s1Oiz7PpN3BRBJUUYLlxc3EzNGKIzJIi 0csYMZKQ==; Message-ID: <44e0d60548d317fd59895f18bd17220dfb2f834b.camel@infradead.org> Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 20:04:58 +0100 In-Reply-To: <20260515191942.1892718-3-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-3-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-BQ4J6FeuOLTRewu0k3H0" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779303909-D9F6ACF5-CEDB96A1/0/0 X-purgate-type: clean X-purgate-size: 9667 --=-BQ4J6FeuOLTRewu0k3H0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Add a helper to register non-native, i.e. PV and CoCo, CPU and TSC > frequency calibration routines.=C2=A0 This will allow consolidating handl= ing > of common TSC properties that are forced by hypervisor (PV routines), > and will also allow adding sanity checks to guard against overriding a > TSC calibration routine with a routine that is less robust/trusted. >=20 > Make the CPU calibration routine optional, as Xen (very sanely) doesn't > assume the CPU runs as the same frequency as the TSC. >=20 > Wrap the helper in an #ifdef to document that the kernel overrides > the native routines when running as a VM, and to guard against unwanted > usage.=C2=A0 Add a TODO to call out that AMD_MEM_ENCRYPT is a mess and do= esn't > depend on HYPERVISOR_GUEST because it gates both guest and host code. >=20 > No functional change intended. >=20 > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Mildly concerned that we might want to support multiple options =E2=80=94 d= oes it have CPUID 0x15? Does it have 0x40000x10? Does it have a pvclock? There are various permutations of those which are perhaps best handled by *trying* each one, in some order, and populating a struct with the answers? But on the basis that perfect is the enemy of good, Reviewed-by: David Woodhouse > diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c > index b5991d53fc0e..e9e7394140dd 100644 > --- a/arch/x86/kernel/kvmclock.c > +++ b/arch/x86/kernel/kvmclock.c > @@ -321,8 +321,8 @@ void __init kvmclock_init(void) > =C2=A0 flags =3D pvclock_read_flags(&hv_clock_boot[0].pvti); > =C2=A0 kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); > =C2=A0 > - x86_platform.calibrate_tsc =3D kvm_get_tsc_khz; > - x86_platform.calibrate_cpu =3D kvm_get_tsc_khz; > + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz); > + > =C2=A0 x86_platform.get_wallclock =3D kvm_get_wallclock; > =C2=A0 x86_platform.set_wallclock =3D kvm_set_wallclock; > =C2=A0#ifdef CONFIG_X86_LOCAL_APIC Can we move those (and maybe everything in the context there too) up *before* the check for no-kvmclock at the top of the function? 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Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1779303967-E3D67443-573BBDD1/0/0 X-purgate-type: clean X-purgate-size: 1889 On Wed, May 20, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > If CPUID.0x16 is present and valid, use the CPU frequency provided by > > CPUID instead of assuming that the virtual CPU runs at the same > > frequency as TSC and/or kvmclock.=C2=A0 Back before constant TSCs were = a > > thing, treating the TSC and CPU frequencies as one and the same was > > somewhat reasonable, but now it's nonsensical, especially if the > > hypervisor explicitly enumerates the CPU frequency. > >=20 > > Signed-off-by: Sean Christopherson > > --- > > =C2=A0arch/x86/kernel/kvmclock.c | 16 +++++++++++++++- > > =C2=A01 file changed, 15 insertions(+), 1 deletion(-) > >=20 > > diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c > > index 62c8ea2e6769..7607920ae386 100644 > > --- a/arch/x86/kernel/kvmclock.c > > +++ b/arch/x86/kernel/kvmclock.c > > @@ -190,6 +190,20 @@ void kvmclock_cpu_action(enum kvm_guest_cpu_action= action) > > =C2=A0 } > > =C2=A0} > > =C2=A0 > > +static unsigned long kvm_get_cpu_khz(void) > > +{ > > + unsigned int cpu_khz; > > + > > + /* > > + * Prefer CPUID over kvmclock when possible, as the base CPU frequenc= y > > + * isn't necessarily the same as the kvmlock "TSC" frequency. > > + */ > > + if (!cpuid_get_cpu_freq(&cpu_khz)) > > + return cpu_khz; > > + > > + return pvclock_tsc_khz(this_cpu_pvti()); >=20 > I'm fine with this in principle but shouldn't the fallback be calling > kvm_get_tsc_khz() instead of directly calling pvclock_tsc_khz()? Oh, yeah, for this patch, definitely yes, so that there's no side effects. = The question really should be answered in the context of "x86/kvmclock: Obtain = TSC frequency from CPUID if present", which subtly impacts the CPU frequency, b= ut I think the answer is "yes" there as well. From xen-devel-bounces@lists.xenproject.org Wed May 20 19:07:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 19:07:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314322.1584287 (Exim 4.92) (envelope-from ) id 1wPmG4-0000xT-0a; Wed, 20 May 2026 19:07:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314322.1584287; Wed, 20 May 2026 19:07:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPmG3-0000xM-TU; Wed, 20 May 2026 19:07:07 +0000 Received: by outflank-mailman (input) for mailman id 1314322; Wed, 20 May 2026 19:07:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPmG2-0000ww-JM for xen-devel@lists.xenproject.org; Wed, 20 May 2026 19:07:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPmG1-00BGAX-Vm for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:07:05 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e0644-e002-0a2a0a5209dd-0a2a4507d81e-20 for ; Wed, 20 May 2026 21:07:05 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e0659-229c-0a2a45070019-5a9b3222ad7a-3 for ; Wed, 20 May 2026 21:07:05 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPmFr-00000007V1a-3HR4; Wed, 20 May 2026 19:06:55 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=KBm/TLbfPZj0qsgOsLDng1ZI6bZ8URdy5t6tLhKnzXo=; b=TkxNPg1dpluV9BITXlJJuw4kXL 2kkGiWpzEqbOAjSw/BdQ09Ld6amQ8ITurcs6fNtHk9Y/t+cQtdtTHd04wgxkqwGWW7llQKeaVObp0 mlNZxv1L09bDDezWrGXcVN2x+ycvHSRkWXZ7pyo8MwjmEdootwOG0yhvUfBu2Mac+CzkiCegrf/RP vexXz15qcADvTfdiM2LJ+ZPsjGJKo6BCQ+nM+DoJnqlXZIyYHG+DcQxJ5jpT4rfkXnD09znJvTRtO cG2SocKIG66e5AjMqA4BbaR9tbpcvlZQS+U+VRYGaHEmTrb381orpErgam7Upj7TNnnO8K4TuYNkk Fbyuc8zQ==; Message-ID: <5cbc62dd2ad1f3f7b8ed4771c9ae02c8eee45886.camel@infradead.org> Subject: Re: [PATCH v3 03/41] x86/sev: Mark TSC as reliable when configuring Secure TSC From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 20:06:54 +0100 In-Reply-To: <20260515191942.1892718-4-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-4-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-rhI5F8i7SpBc8jvUjeNP" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1779304025-09D6FC48-C604C7D8/0/0 X-purgate-type: clean X-purgate-size: 7930 --=-rhI5F8i7SpBc8jvUjeNP Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Move the code to mark the TSC as reliable from sme_early_init() to > snp_secure_tsc_init().=C2=A0 The only reader of TSC_RELIABLE is the aptly > named check_system_tsc_reliable(), which runs in tsc_init(), i.e. > after snp_secure_tsc_init(). >=20 > This will allow consolidating the handling of TSC_KNOWN_FREQ and > TSC_RELIABLE when overriding the TSC calibration routine. >=20 > Cc: Tom Lendacky > Reviewed-by: Nikunj A Dadhania > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-rhI5F8i7SpBc8jvUjeNP Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 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header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=9DXK3vuF2YCkTc2OlQDicr0ftdse5wXqLiL3ouHr4ms=; b=VE5Yl6ZhrWBXN0rkkMgd1i5Lrb /e2rPlMT7Mb3GqHa+oX3i6w94pFC89AjuOqCgc1nooRFQyYx6dBbwsQtYGtniSDaMP3aVKVQM9xPv 6TQzcW3f5akieX8W/8kbw8fN7AHERtGlv1aGw9OwkeDiCUTUPWriwTrNGKzDcSJfOeiAk0ZkRNeu/ 6T3LJesThKwF+slByTbXW8z3S+f8lP/fWXPQ+Uh4eYGqiqcTRb4jshPwMnuLbdWYtBdjCgCKaA1oi D3DrQ0uSzxTAHw6kTVBGBkAiQ8fM6ekQOv8skb/cQyr/zoo7dqYLKHBUChPS6tXFlRaXnEb5w+I78 jLR5Hp0w==; Message-ID: <5136c8a3d03d33f0d249ebcf72b956d15ab80757.camel@infradead.org> Subject: Re: [PATCH v3 04/41] x86/sev: Move check for SNP Secure TSC support to tsc_early_init() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 20:16:11 +0100 In-Reply-To: <20260515191942.1892718-5-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-5-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-SwdCHlOnxZcQ2QC94Edp" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=NfDpWCHNwCELYmlOslr/nQ3b8qR5PBi6+oTunXmBd4o=; b=DkoJ/w1PPPOjo84eaBmK3YrnUk 9H1j54dtNQaWS9aYKjJOV4LaeDeHzYJ8wV/KR7UGTuxRrRQylp1GWU6k1H+s5w+eWsWwmmqxdybuH gbtoAQOU+y7SeDsiyFcCl2IfVipHbaSO3RiSLrS2oaDiAd+Abl2Smbu93cLi9/vTIw/JMe5RK897z ZBi1VceUgVrtC6pGP+YpmzNDSNqVjVkou6NYUlB7ZUQYrezAJVmCXwGu/ph/hOuIrt1W+H572McTe 9nbmgL7H4CD3jaFTXtPFuXwG8PtQOd7d5siZIRaz2wm2lCJhwyriFq7UeEck7P0P1/rHzSB1WP72H DdxKO+PA==; Message-ID: Subject: Re: [PATCH v3 05/41] x86/tdx: Override PV calibration routines with CPUID-based calibration From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 20:52:36 +0100 In-Reply-To: <20260515191942.1892718-6-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-6-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-5uq1B3Al8/yI7wiKnpz0" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779306769-DB370CF5-EF504B1B/0/0 X-purgate-type: clean X-purgate-size: 9337 --=-5uq1B3Al8/yI7wiKnpz0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > When running as a TDX guest, explicitly override the TSC frequency > calibration routine with CPUID-based calibration instead of potentially > relying on a hypervisor-controlled PV routine.=C2=A0 For TDX guests, CPUI= D.0x15 > is always emulated by the TDX-Module, i.e. the information from CPUID is > more trustworthy than the information provided by the hypervisor. >=20 > To maintain backwards compatibility with TDX guest kernels that use nativ= e > calibration, and because it's the least awful option, retain > native_calibrate_tsc()'s stuffing of the local APIC bus period using the > core crystal frequency.=C2=A0 While it's entirely possible for the hyperv= isor > to emulate the APIC timer at a different frequency than the core crystal > frequency, the commonly accepted interpretation of Intel's SDM is that AP= IC > timer runs at the core crystal frequency when that latter is enumerated v= ia > CPUID: >=20 > =C2=A0 The APIC timer frequency will be the processor=E2=80=99s bus clock= or core > =C2=A0 crystal clock frequency (when TSC/core crystal clock ratio is enum= erated > =C2=A0 in CPUID leaf 0x15). >=20 > If the hypervisor is malicious and deliberately runs the APIC timer at th= e > wrong frequency, nothing would stop the hypervisor from modifying the > frequency at any time, i.e. attempting to manually calibrate the frequenc= y > out of paranoia would be futile. >=20 > Deliberately leave the CPU frequency calibration routine as is, since the > TDX-Module doesn't provide any guarantees with respect to CPUID.0x16. >=20 > Opportunistically add a comment explaining that CoCo TSC initialization > needs to come after hypervisor specific initialization. >=20 > Cc: Kirill A. Shutemov > Signed-off-by: Sean Christopherson I don't much like stuffing the lapic_timer_period... but I'll give you 'least awful option'. For now. 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List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=z7cL9NmYzNY0dm/kHQmLedGtyro/w1YtGsslfqFf7rU=; b=HTI93RWkuybXpEb4YMAveyPPv/ sI4YMAa4ukmqd6Inidx4NQ3yOZpxMrKNP6N40nFP81aPdbQAGe+C6a4auz/LaDhVnTansTJKgiPp+ ewCyEDeXzlncCkeatMNHniDVVnIwy0xUepX5SFJcdKap9uSckbNxHYpzU8O79VCS55ffWk3u8SHEN vkeScKhHd2WdYu8Gebnc0FhWr1ivo+FikXYRYAZHCR5Muvom0vT+SAlIDIytr98k6Fyo6eYPHvuBY 4UB46sdoUfvyiEpyyNqk4c3wip3HM5bpjUnsFbRHzFIt6XP3cWsUoDRkiVEVQJvCXUAc5ElV/IQF7 afaU1LHw==; Message-ID: Subject: Re: [PATCH v3 06/41] x86/acrn: Mark TSC frequency as known when using ACRN for calibration From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 21:01:20 +0100 In-Reply-To: <20260515191942.1892718-7-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-7-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-dAeHKvdWKxIIK3rDkIA7" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1779307290-23374F3B-3267BB31/0/0 X-purgate-type: clean X-purgate-size: 8602 --=-dAeHKvdWKxIIK3rDkIA7 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Mark the TSC frequency as known when using ACRN's PV CPUID information. > Per commit 81a71f51b89e ("x86/acrn: Set up timekeeping") and common sense= , > the TSC freq is explicitly provided by the hypervisor. >=20 > Signed-off-by: Sean Christopherson > --- > =C2=A0arch/x86/kernel/cpu/acrn.c | 1 + > =C2=A01 file changed, 1 insertion(+) >=20 > diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c > index c1506cb87d8c..2da3de4d470e 100644 > --- a/arch/x86/kernel/cpu/acrn.c > +++ b/arch/x86/kernel/cpu/acrn.c > @@ -29,6 +29,7 @@ static void __init acrn_init_platform(void) > =C2=A0 /* Install system interrupt handler for ACRN hypervisor callback *= / > =C2=A0 sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback= ); > =C2=A0 > + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); > =C2=A0 tsc_register_calibration_routines(acrn_get_tsc_khz, > =C2=A0 =C2=A0 acrn_get_tsc_khz); I'd feel slightly happier doing that from within acrn_get_tsc_khz() itself.... which I note is 'static inline'. I'm vaguely surprised that even builds (although it does). Probably nicer to move it explicitly out of line in acrn.c though. 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Add helper to register CPU and TSC freq calibration routines From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1779309876-D3D67443-AD6A1377/0/0 X-purgate-type: clean X-purgate-size: 5371 On Wed, May 20, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c > > index b5991d53fc0e..e9e7394140dd 100644 > > --- a/arch/x86/kernel/kvmclock.c > > +++ b/arch/x86/kernel/kvmclock.c > > @@ -321,8 +321,8 @@ void __init kvmclock_init(void) > > =C2=A0 flags =3D pvclock_read_flags(&hv_clock_boot[0].pvti); > > =C2=A0 kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); > > =C2=A0 > > - x86_platform.calibrate_tsc =3D kvm_get_tsc_khz; > > - x86_platform.calibrate_cpu =3D kvm_get_tsc_khz; > > + tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_tsc_khz); > > + > > =C2=A0 x86_platform.get_wallclock =3D kvm_get_wallclock; > > =C2=A0 x86_platform.set_wallclock =3D kvm_set_wallclock; > > =C2=A0#ifdef CONFIG_X86_LOCAL_APIC >=20 > Can we move those (and maybe everything in the context there too) up > *before* the check for no-kvmclock at the top of the function? Oof, I was going to say "no", but disabling kvmclock is exactly the workaro= und I've told people to use to get the kernel to use the TSC instead of kvmcloc= k. > Probably in a separate patch. Ya. I think this? diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 08ee4bc304c8..92a1ebf31e4d 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -27,6 +27,7 @@ static int kvmclock_vsyscall __initdata =3D 1; static int msr_kvm_system_time __ro_after_init; static int msr_kvm_wall_clock __ro_after_init; static u64 kvm_sched_clock_offset __ro_after_init; +static unsigned int kvm_tsc_khz_cpuid __ro_after_init; =20 static int __init parse_no_kvmclock(char *arg) { @@ -207,7 +208,7 @@ static unsigned long kvm_get_tsc_khz(void) lapic_timer_period =3D apic_khz * 1000 / HZ; #endif =20 - return kvm_para_tsc_khz() ? : pvclock_tsc_khz(this_cpu_pvti()); + return kvm_tsc_khz_cpuid ? : pvclock_tsc_khz(this_cpu_pvti()); } =20 static unsigned long kvm_get_cpu_khz(void) @@ -387,9 +388,39 @@ void __init kvmclock_init(void) enum tsc_properties tsc_properties =3D TSC_FREQUENCY_KNOWN; bool stable =3D false; =20 - if (!kvm_para_available() || !kvmclock) + if (!kvm_para_available()) return; =20 + /* + * If the TSC counts at a constant frequency across P/T states, cou= nts + * in deep C-states, and the TSC hasn't been marked unstable, treat= the + * TSC reliable, as guaranteed by KVM. Note, the TSC unstable chec= k + * exists purely to honor the TSC being marked unstable via command + * line, any runtime detection of an unstable will happen after thi= s. + */ + if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && + !check_tsc_unstable()) + tsc_properties =3D TSC_FREQ_KNOWN_AND_RELIABLE; + + kvm_tsc_khz_cpuid =3D kvm_para_tsc_khz(); + + /* + * If provided, use the TSC (and APIC bus) frequency provided in KV= M's + * PV CPUID leaf even if kvmclock itself is disabled via command li= ne. + * The PV CPUID information isn't dependent on kvmclock in any way,= and + * in fact using the precise information is *more* important when t= he + * user has explicitly disabled kvmclock to force the kernel to use= the + * TSC as its clocksource. + */ + if (!kvmclock) { + if (kvm_tsc_khz_cpuid) + tsc_register_calibration_routines(kvm_get_tsc_khz, + kvm_get_cpu_khz, + tsc_properties); + return; + } + if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE2)) { msr_kvm_system_time =3D MSR_KVM_SYSTEM_TIME_NEW; msr_kvm_wall_clock =3D MSR_KVM_WALL_CLOCK_NEW; @@ -424,21 +455,14 @@ void __init kvmclock_init(void) } =20 /* - * If the TSC counts at a constant frequency across P/T states, cou= nts - * in deep C-states, and the TSC hasn't been marked unstable, prefe= r - * the TSC over kvmclock for sched_clock and drop kvmclock's rating= so - * that TSC is chosen as the clocksource. Note, the TSC unstable c= heck - * exists purely to honor the TSC being marked unstable via command - * line, any runtime detection of an unstable will happen after thi= s. + * If the TSC is reliable (see above), prefer the TSC over kvmclock= for + * sched_clock and drop kvmclock's rating so that TSC is chosen as = the + * clocksource. */ - if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && - boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && - !check_tsc_unstable()) { + if (tsc_properties & TSC_RELIABLE) kvm_clock.rating =3D 299; - tsc_properties =3D TSC_FREQ_KNOWN_AND_RELIABLE; - } else { + else kvm_sched_clock_init(stable); - } =20 tsc_register_calibration_routines(kvm_get_tsc_khz, kvm_get_cpu_khz, tsc_properties); From xen-devel-bounces@lists.xenproject.org Wed May 20 21:02:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:02:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314386.1584332 (Exim 4.92) (envelope-from ) id 1wPo3j-00025J-OH; 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AFNElJ9z7AO2ttSQnvmLmNKEYtgMnwt3ilhAMdIrM4HR9d3Ug4j8AkRzhh906Kf6Rl7u0kz6HHp7zL+z+H0=@lists.xenproject.org X-Gm-Message-State: AOJu0YzAVphiZvf9qic1pWLQ5EyhEztsI9GUY4hOaeB4cIgX/8GDULUA lt4AQsDe+0FmqgbJ9MTUttEQjrJRRq8d6jE5X5XiV+6SO2Q3eZ2p/l1hzPd1avcdE2CmnhQ41zc RLkdiNA== X-Received: from pgnp19.prod.google.com ([2002:a63:7f53:0:b0:c82:7805:9e4d]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6300:279a:10b0:39b:dea7:5626 with SMTP id adf61e73a8af0-3b308856ca4mr1798637.35.1779310947183; Wed, 20 May 2026 14:02:27 -0700 (PDT) Date: Wed, 20 May 2026 14:02:26 -0700 In-Reply-To: Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-7-seanjc@google.com> Message-ID: Subject: Re: [PATCH v3 06/41] x86/acrn: Mark TSC frequency as known when using ACRN for calibration From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1779310949-E0B64CF5-B9D4BC25/0/0 X-purgate-type: clean X-purgate-size: 2904 On Wed, May 20, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > Mark the TSC frequency as known when using ACRN's PV CPUID information. > > Per commit 81a71f51b89e ("x86/acrn: Set up timekeeping") and common sen= se, > > the TSC freq is explicitly provided by the hypervisor. > >=20 > > Signed-off-by: Sean Christopherson > > --- > > =C2=A0arch/x86/kernel/cpu/acrn.c | 1 + > > =C2=A01 file changed, 1 insertion(+) > >=20 > > diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c > > index c1506cb87d8c..2da3de4d470e 100644 > > --- a/arch/x86/kernel/cpu/acrn.c > > +++ b/arch/x86/kernel/cpu/acrn.c > > @@ -29,6 +29,7 @@ static void __init acrn_init_platform(void) > > =C2=A0 /* Install system interrupt handler for ACRN hypervisor callback= */ > > =C2=A0 sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callba= ck); > > =C2=A0 > > + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); > > =C2=A0 tsc_register_calibration_routines(acrn_get_tsc_khz, > > =C2=A0 =C2=A0 acrn_get_tsc_khz); >=20 > I'd feel slightly happier doing that from within acrn_get_tsc_khz() > itself.... Ya, though as you note below, this is really a comment on the overall serie= s. Waiting to set the cap until the calibration routine is actually run does p= revent the case where the something registers a calibration routine, but its routi= ne is never run. However, because the cap is sticky, it doesn't handle the scenario where it= s routine _does_ run, but the kernel ultimately throws away its calibration i= n favor of something else. Further complicating things is that ~half of the paravirt flows already for= ce set caps before their routines are invoked: snp_secure_tsc_init(), jailhouse_init_platform(), ms_hyperv_init_platform= (), vmware_set_capabilities() Rather than trying to convince everyone that waiting is better, despite tha= t approach still being flawed, I chose to handle this by ensuring that once t= he TSC is marked known and/or reliable, the kernel won't replace the calibration r= outine with a "lesser" source: x86/tsc: Rejects attempts to override TSC calibration with lesser routine That doesn't completely prevent the kernel from being stupid, but it should= prevent both the case where X's routine is registered but never run, as well as the= case where it's run but ultimately ignored. > which I note is 'static inline'. I'm vaguely surprised that even builds > (although it does). Heh, KVM x86 (in the host) does stupid things like this too. E.g. kvm_pdpt= r_read() is a static inline, but then wired up as a function pointer in three differ= ent places. > Probably nicer to move it explicitly out of line in acrn.c though. >=20 > Most of that should be a comment on patch 2 of the series, I guess? From xen-devel-bounces@lists.xenproject.org Wed May 20 21:12:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:12:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314393.1584341 (Exim 4.92) (envelope-from ) id 1wPoDi-0003rs-JZ; Wed, 20 May 2026 21:12:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314393.1584341; Wed, 20 May 2026 21:12:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDi-0003rl-GL; Wed, 20 May 2026 21:12:50 +0000 Received: by outflank-mailman (input) for mailman id 1314393; Wed, 20 May 2026 21:12:49 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDf-0003rf-5c for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:12:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoDe-00EDfE-4R for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:12:46 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e23a3-e002-0a2a0a5209dd-0a2a450ad53a-38 for ; Wed, 20 May 2026 23:12:45 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e23cd-56b3-0a2a450a0019-d561b338982c-3 for ; Wed, 20 May 2026 23:12:45 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wPoDX-0041Tq-LQ; Wed, 20 May 2026 23:12:39 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=jkpwXdcnHe1Zv/dlRDcrtsBOp/xquKy8TUTUHmBcL1U=; b=dUzRobAH+mthZRI7uJWLVNLyzp VzF6Bb3s2HtliD6A5H1iVmP+juxYJyBrAKi0u3b6IzPD7xxn3tJZu4+pTkKVyHx1iGbbiFQi3kPAN ugqtXjeWMYGekFisfkeO73ZivU9lMcTqya+RfRgfeJPR0vT/yjy06/PAV9vdtl6rDJ9MTXpjC88wl USF3MRMam86DLoz+EQfXXgXdrkyE9L7F71NTIl54eAbnR9PDlu56Sz2bGugTotwnjUh4bdTiOo5K5 j1UmrI8ZtiOuItOS8zCt+derjk76bYCwNfRFr4pU//xD+jHew5EmJsng1KBijgbHnAuAv39pt+MfK XlQFtNZA==; From: Mauricio Faria de Oliveira Date: Wed, 20 May 2026 18:12:06 -0300 Subject: [PATCH v3 2/4] x86/asm, x86/boot: expose inline memcmp MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260520-pvh-kasan-inline-v3-2-bede769c6ec7@igalia.com> References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-4011c0/1779311565-7196E8B7-FCAD2D12/0/0 X-purgate-type: clean X-purgate-size: 2056 Move the inline memcmp function currently only available in 'boot/string.c' and its users (eg, 'boot/compressed/string.c' and 'purgatory/purgatory.ro') into the inline string functions header to be reused. Note that the inline memcmp() returns 0/1, not -1/0/1 as regular memcmp() (reported by David Laight ), which is not caused or changed by this commit; this will be addressed separately. Signed-off-by: Mauricio Faria de Oliveira --- arch/x86/boot/string.c | 6 ++---- arch/x86/include/asm/string_inline.h | 11 +++++++++++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c index ac0f900ebc47efa81c92e1bb2010ea41677899c4..544681d046c3f87101309ffaca0c90512a244856 100644 --- a/arch/x86/boot/string.c +++ b/arch/x86/boot/string.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "ctype.h" #include "string.h" @@ -31,10 +32,7 @@ int memcmp(const void *s1, const void *s2, size_t len) { - bool diff; - asm("repe cmpsb" - : "=@ccnz" (diff), "+D" (s1), "+S" (s2), "+c" (len)); - return diff; + return __inline_memcmp(s1, s2, len); } /* diff --git a/arch/x86/include/asm/string_inline.h b/arch/x86/include/asm/string_inline.h index ffcfa6583d2bc7b91d078888518d0e80248af940..91ed89bfdfa9b148002441e94f48039b17f70391 100644 --- a/arch/x86/include/asm/string_inline.h +++ b/arch/x86/include/asm/string_inline.h @@ -23,4 +23,15 @@ static __always_inline void *__inline_memset(void *s, int v, size_t n) return ret; } +/* Note: this memcmp() returns 0/1, not -1/0/1 as regular memcmp(). */ +static __always_inline int __inline_memcmp(const void *s1, const void *s2, size_t len) +{ + bool diff; + + asm("repe cmpsb" + : "=@ccnz" (diff), "+D" (s1), "+S" (s2), "+c" (len)); + + return diff; +} + #endif /* _ASM_X86_STRING_INLINE_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 21:12:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:12:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314394.1584349 (Exim 4.92) (envelope-from ) id 1wPoDl-00045F-Ps; Wed, 20 May 2026 21:12:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314394.1584349; Wed, 20 May 2026 21:12:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDl-000458-N3; Wed, 20 May 2026 21:12:53 +0000 Received: by outflank-mailman (input) for mailman id 1314394; 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From: Mauricio Faria de Oliveira Date: Wed, 20 May 2026 18:12:05 -0300 Subject: [PATCH v3 1/4] x86/asm: move inline string functions to MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira , kernel test robot X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-720697/1779311571-B0979161-D1A88A3B/0/0 X-purgate-type: clean X-purgate-size: 4424 In next patch, inline string functions are included from 'boot/string.c'. Using the header is problematic for a couple of reasons (*) (i.e., build errors), which can be addressed, but introduce unnecessary complexity and regression risk (beyond these _found_ couple of reasons). Using a new header is simpler and transparent to existing users of , with less changes to 'boot/string.c' and its users (eg 'boot/compressed/string.c' and 'purgatory/purgatory.ro'), which minimize regression risk. No functional change intended. (*) Reasons not to include in 'boot/string.c': 1) 'boot/string.c' is built for 16-bit/real mode thus some type and word size errors happen when include, e.g., . This can be addressed with '#ifndef _SETUP' (defined by 'boot/Makefile'). 2) 'boot/string.c' is included by 'boot/compressed/string.c' which is the source of 'purgatory/string.o', linked by 'purgatory/purgatory.ro' (CONFIG_KEXEC_FILE). In 64BIT, includes , which references __memset() and __memmove() with KCFI_REFERENCE(), ie, __ADDRESSABLE(); however, 'purgatory/purgatory.ro' is not linked with implementations. So, CONFIG_KEXEC_FILE and CONFIG_CFI without CONFIG_KASAN hit errors: >> ld.lld: error: undefined symbol: __memset >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:\ (__UNIQUE_ID_addressable___memset_0) -- >> ld.lld: error: undefined symbol: __memmove >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:\ (__UNIQUE_ID_addressable___memmove_1) (Note: this is not hit with CONFIG_KASAN because 'boot/compressed/string.c' adds aliases __memset()/__memmove() to memset()/memmove() in that case.) This can be addressed with 'CFLAGS_string.o := -D__DISABLE_EXPORTS' so to disable KCFI_REFERENCE() in 'purgatory/Makefile' (it removes CC_FLAGS_CFI anyway). ... However, since a change in this series would need more changes to address errors it causes, it is reasonable to change the series not to cause them, by using a separate header with _just_ inline string functions. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ Signed-off-by: Mauricio Faria de Oliveira --- arch/x86/include/asm/string.h | 21 +-------------------- arch/x86/include/asm/string_inline.h | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 20 deletions(-) diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h index 9cb5aae7fba9ffcf0f5af8f939d30467750ccaa9..8a849bb5d0c7100a2a1820ec0af9fc9f850727fd 100644 --- a/arch/x86/include/asm/string.h +++ b/arch/x86/include/asm/string.h @@ -8,25 +8,6 @@ # include #endif -static __always_inline void *__inline_memcpy(void *to, const void *from, size_t len) -{ - void *ret = to; - - asm volatile("rep movsb" - : "+D" (to), "+S" (from), "+c" (len) - : : "memory"); - return ret; -} - -static __always_inline void *__inline_memset(void *s, int v, size_t n) -{ - void *ret = s; - - asm volatile("rep stosb" - : "+D" (s), "+c" (n) - : "a" ((uint8_t)v) - : "memory"); - return ret; -} +#include #endif /* _ASM_X86_STRING_H */ diff --git a/arch/x86/include/asm/string_inline.h b/arch/x86/include/asm/string_inline.h new file mode 100644 index 0000000000000000000000000000000000000000..ffcfa6583d2bc7b91d078888518d0e80248af940 --- /dev/null +++ b/arch/x86/include/asm/string_inline.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_X86_STRING_INLINE_H +#define _ASM_X86_STRING_INLINE_H + +static __always_inline void *__inline_memcpy(void *to, const void *from, size_t len) +{ + void *ret = to; + + asm volatile("rep movsb" + : "+D" (to), "+S" (from), "+c" (len) + : : "memory"); + return ret; +} + +static __always_inline void *__inline_memset(void *s, int v, size_t n) +{ + void *ret = s; + + asm volatile("rep stosb" + : "+D" (s), "+c" (n) + : "a" ((uint8_t)v) + : "memory"); + return ret; +} + +#endif /* _ASM_X86_STRING_INLINE_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 21:12:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:12:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314396.1584367 (Exim 4.92) (envelope-from ) id 1wPoDn-0004W5-CW; Wed, 20 May 2026 21:12:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314396.1584367; Wed, 20 May 2026 21:12:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDn-0004Vy-9O; Wed, 20 May 2026 21:12:55 +0000 Received: by outflank-mailman (input) for mailman id 1314396; Wed, 20 May 2026 21:12:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDl-000450-D3 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:12:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoDk-00BUA1-P8 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:12:52 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e23cb-bab6-0a2a0a5309dd-0a2a4503e78a-14 for ; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=gJKjWXfILv4BRccqYgfSFnf+b13WkiYn/6GuwfAO050=; b=hbcb4LsaBlq3hBRBoiPoGkUpqZ aT2CHNIPR/K5BMimvBDH/sPdEcTqCzIGc98CxKvCC+2NBKGrfRs6n7Mi/9uBsqsff+2jnB5ZnKkIm NuSHyh5rDrKK3QQbbjbaw6F8iO7uorMIIeshBHymTwfEE2mnCGhRYOgifQbzKvQHt22bF565InE+F FZQ598/RljxuizulzinIcd7BHjTUJzsY4jFPmOfvyHICX29nSADoWz/Vh5jFhyxy1W9WDCf0g6F96 1PhzdCgWxWWqCY7KVCoJ49nFx2rl+DapUKM6cGKFUhHbWf36P6RH06UWBSXq9iXlf/h0J6nyVs00k i8DFXIVQ==; From: Mauricio Faria de Oliveira Date: Wed, 20 May 2026 18:12:07 -0300 Subject: [PATCH v3 3/4] x86/cpuid: fix unbootable VMs by really inlining memcmp() in hypervisor_cpuid_base() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260520-pvh-kasan-inline-v3-3-bede769c6ec7@igalia.com> References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-33051d/1779311571-3B360938-660D8FB8/0/0 X-purgate-type: clean X-purgate-size: 1458 Even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. The existing code is broken with gcc-14/15 but not gcc-12/13 (Ubuntu 25.10) and vmlinux no longer boots with CONFIG_PVH if CONFIG_KASAN_GENERIC is set. For testing purposes, if the size argument is reduced from 12 to 8 then the compiler decides to use the inline implementation; that shows results vary. Switch the builtin to the inline implementation to address it. Fixes: 416a33c9afce ("x86/cpu: fix unbootable VMs by inlining memcmp() in hypervisor_cpuid_base()") Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- arch/x86/include/asm/cpuid/api.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h index 82eddfa2347b32b76c2ea9b85f005ca5416ac71f..2d9f3d4d63de6e721f275d9e80d372edbdfedf30 100644 --- a/arch/x86/include/asm/cpuid/api.h +++ b/arch/x86/include/asm/cpuid/api.h @@ -204,7 +204,7 @@ static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves) * from PVH early boot code before instrumentation is set up * and memcmp() itself may be instrumented. */ - if (!__builtin_memcmp(sig, signature, 12) && + if (!__inline_memcmp(sig, signature, 12) && (leaves == 0 || ((eax - base) >= leaves))) return base; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 21:12:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:12:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314395.1584355 (Exim 4.92) (envelope-from ) id 1wPoDm-00047x-1n; Wed, 20 May 2026 21:12:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314395.1584355; Wed, 20 May 2026 21:12:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDl-00047O-TC; Wed, 20 May 2026 21:12:53 +0000 Received: by outflank-mailman (input) for mailman id 1314395; Wed, 20 May 2026 21:12:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDk-00044l-Px for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:12:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoDk-005Gae-63 for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:12:52 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e23c0-2eae-0a2a0a5409dd-0a2a450789f8-14 for ; Wed, 20 May 2026 23:12:52 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e23d3-229c-0a2a45070019-d561b338a818-3 for ; Wed, 20 May 2026 23:12:52 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wPoDN-0041Tq-R0; Wed, 20 May 2026 23:12:30 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:Content-Transfer-Encoding:Content-Type:MIME-Version:Message-Id:Date:Subject:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:Content-Transfer-Encoding:Content-Type:MIME-Version: Message-Id:Date:Subject:From:Sender:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=HMYOPdGU8sl7pv2qCjbJUiNAmrkkLYxcfG9BmUTr1j0=; b=G5/E2wwpP3qOYwkqsVagOvWPkD sNR91BuKo1uImAfen8tomjkL5x3iaLKBFF87LMWLTEGsgPyPfcwsYqtdaXP5UtLliXfonRM3u/OCo F+/fM2JBLm0FyO4zhizXA9k4YQgNriAGCIb+Mg8vUEPjtdxglxrBn79WEkEpMnzIoG3KBxQxpvjVr J0uIHqZxstPkw5ExB7jI3mLXriokseheA5NpjN4G896npCFWzy3IeRLQNGWdc/1PnQUkrhXhnx1UK rSldvJPksowRssF8w3czF1Wf1ZWtsxSt5U+nWeL7fagxxh30ACgyrvYGoMeB1OofoTs0pfvhEe2+X pxKGyQDg==; From: Mauricio Faria de Oliveira Subject: [PATCH v3 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) Date: Wed, 20 May 2026 18:12:04 -0300 Message-Id: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAKQjDmoC/33NQQ6CMBCF4auQrq2hQ23FlfcwLkqZwkQspDWNh nB3CytNjMv/JfPNzCIGwshOxcwCJoo0+hzVrmC2N75DTm1uBiWoUgLwKfX8ZqLxnPxAHrlCZ6z WTjSgWT6bAjp6buTlmrun+BjDa/uQxLr+wZLgJdeoRC0rKW0NZ+rMQGZvxztbtQSfgv4hQBbAH nRzbK1zynwJy7K8AZCPjPPzAAAA X-Change-ID: 20260422-pvh-kasan-inline-6efac77f1b27 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira , kernel test robot X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-ef75cf/1779311572-22F76C48-C353EFC2/0/0 X-purgate-type: clean X-purgate-size: 6162 The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. Booting directly from vmlinux (instead of bzImage) now fails with gcc-14/15 (but works with gcc-12/13) if CONFIG_KASAN_GENERIC is set, on Ubuntu 25.10. The PVH code is required/supposed not to use the KASAN memory access check in the kernel entry point as KASAN has not yet been setup, or an exception is hit and the boot fails. This was previously described and addressed with __builtin_mem{cmp,set}(): - commit 661362e3dcab ("xen, pvh: fix unbootable VMs (PVH + KASAN - AMD_MEM_ENCRYPT)") - commit 416a33c9afce ("x86/cpu: fix unbootable VMs by inlining memcmp() in hypervisor_cpuid_base()") - commit fbe5a6dfe492 ("xen, pvh: fix unbootable VMs by inlining memset() in xen_prepare_pvh()") However, even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. So, that does not really fix the issue unconditionally; see details below. In order to address this, it's required to switch to inline implementations that do not depend on the compiler. There's such a memset() in and memcmp() in 'boot/string.c'. Use them instead of builtins in PVH entry. Testing: - Booting from vmlinux (fixed) and bzImage (still works) using allnoconfig + CONFIG_PVH + CONFIG_KASAN with gcc-12/13/14/15. - Building with CONFIG_KEXEC_FILE, CONFIG_CFI and !CONFIG_KASAN with LLVM 20 (check for a build error related to , not caught previously). Details/Debugging: - Only CONFIG_PVH (works): make allnoconfig ./scripts/config \ -e 64BIT -e HYPERVISOR_GUEST -e PVH \ -e SERIAL_8250 -e SERIAL_8250_CONSOLE make olddefconfig make -j$(nproc) vmlinux qemu-system-x86_64 \ -accel kvm -nodefaults -nographic -serial stdio \ -kernel vmlinux -append 'console=ttyS0' ... SeaBIOS (version ...) Booting from ROM... Linux version ... ... - With CONFIG_KASAN (fails) ./scripts/config -e KASAN make olddefconfig make -j$(nproc) vmlinux qemu-system-x86_64 \ -accel kvm -nodefaults -nographic -serial stdio \ -kernel vmlinux -append 'console=ttyS0' ... SeaBIOS (version ...) Booting from ROM... - Debugging: Enable debug info and rebuild. QEMU: enable and wait for GDB, stop rebooting, remain running. qemu-system-x86_64 \ -s -S -no-reboot -no-shutdown \ gdb vmlinux (gdb) target remote localhost:1234 ... (gdb) c ... Thread 2 received signal SIGQUIT, Quit. ... (gdb) info threads Id Target Id Frame 1 Thread 1.1 (CPU#0 [running]) bytes_is_nonzero ( start=0xfffffbfff031eebe , size=1) at .../linux/mm/kasan/generic.c:98 * 2 Thread 1.2 (CPU#1 [halted ]) 0x00000000000fd0a9 in ?? () ... (gdb) thr 1 ... (gdb) bt #0 bytes_is_nonzero (start=0xfffffbfff031eebe , size=1) at .../linux/mm/kasan/generic.c:98 #1 memory_is_nonzero (start=0xfffffbfff031eebe, end=0xfffffbfff031eebf) at .../linux/mm/kasan/generic.c:115 #2 memory_is_poisoned_n (addr=0xffffffff818f75f0, size=8) at .../linux/mm/kasan/generic.c:140 #3 memory_is_poisoned (addr=0xffffffff818f75f0, size=8) at .../linux/mm/kasan/generic.c:172 #4 check_region_inline (addr=0xffffffff818f75f0, size=8, write=false, ret_ip=18446744071585002062) at .../linux/mm/kasan/generic.c:191 #5 kasan_check_range (addr=addr@entry=0xffffffff818f75f0, size=size@entry=8, write=write@entry=false, ret_ip=18446744071585002062) at .../linux/mm/kasan/generic.c:200 #6 0xffffffff813eb283 in __asan_loadN (addr=addr@entry=0xffffffff818f75f0, size=size@entry=8) at .../linux/mm/kasan/generic.c:278 #7 0xffffffff815df24e in memcmp (cs=cs@entry=0xffffffff818f75f0, ct=ct@entry=0x1be2fe4, count=, count@entry=12) at .../linux/lib/string.c:683 #8 0xffffffff81ba2323 in cpuid_base_hypervisor (sig=0xffffffff818f75f0 "XenVMMXenVMM", leaves=2) at .../linux/arch/x86/include/asm/cpuid/api.h:206 #9 xen_cpuid_base () at .../linux/arch/x86/include/asm/xen/hypervisor.h:46 #10 xen_prepare_pvh () at .../linux/arch/x86/platform/pvh/enlighten.c:119 #11 0x0000000001ba2588 in ?? () #12 0x0000000000000000 in ?? () (gdb) Frames #7-#8 show the non-builtin memcmp() (lib/string.c) was called even with __builtin_memcmp() being used in cpuid_base_hypervisor(). Signed-off-by: Mauricio Faria de Oliveira --- Changes in v3: - Create and use a separate header for inline string functions to fix a build error reported by kernel test robot (patch 1). - That also removes '#ifndef _SETUP/#endif' in . - Link to v2: https://lore.kernel.org/r/20260427-pvh-kasan-inline-v2-0-2c57b8dcff6a@igalia.com Changes in v2: - Add comment about the return value of __inline_memcmp() in patch 1. (v3: now 2) - Add 'Reviewed-by: Juergen Gross' in patches 2 and 3 (v3: now 3 and 4). - Link to v1: https://lore.kernel.org/r/20260422-pvh-kasan-inline-v1-0-7e6194344c92@igalia.com --- Mauricio Faria de Oliveira (4): x86/asm: move inline string functions to x86/asm, x86/boot: expose inline memcmp x86/cpuid: fix unbootable VMs by really inlining memcmp() in hypervisor_cpuid_base() x86/pvh: fix unbootable VMs by really inlining memset() in xen_prepare_pvh() arch/x86/boot/string.c | 6 ++---- arch/x86/include/asm/cpuid/api.h | 2 +- arch/x86/include/asm/string.h | 21 +------------------- arch/x86/include/asm/string_inline.h | 37 ++++++++++++++++++++++++++++++++++++ arch/x86/platform/pvh/enlighten.c | 3 ++- 5 files changed, 43 insertions(+), 26 deletions(-) --- base-commit: 80dd246accce631c328ea43294e53b2b2dd2aa32 change-id: 20260422-pvh-kasan-inline-6efac77f1b27 Best regards, -- Mauricio Faria de Oliveira From xen-devel-bounces@lists.xenproject.org Wed May 20 21:12:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:12:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314397.1584376 (Exim 4.92) (envelope-from ) id 1wPoDo-0004km-Kq; Wed, 20 May 2026 21:12:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314397.1584376; Wed, 20 May 2026 21:12:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDo-0004ke-HC; Wed, 20 May 2026 21:12:56 +0000 Received: by outflank-mailman (input) for mailman id 1314397; Wed, 20 May 2026 21:12:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoDn-0004Yv-Nf for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:12:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoDn-008pPL-3p for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:12:55 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e23b7-5cb7-0a2a0a5109dd-0a2a4508e012-12 for ; Wed, 20 May 2026 23:12:55 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e23d6-63b5-0a2a45080019-d561b338cf20-3 for ; Wed, 20 May 2026 23:12:55 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wPoDg-0041Tq-SN; Wed, 20 May 2026 23:12:49 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=L3Sr9rY5U1mD/3546TE+xOT1mBFRY3YzwAzYlEgEGo8=; b=MDSYObuCLhGGk3kLSDRFhFo0Xr hAIFZMraCR/zpz1BmNe4aoczkzyiHAXFjnXpDpxnphQoyvLq8CMCKa/daqplYQ0ZGPjtubRWcFU1I vyjvOjZNCKvKVm9kSyi24rbD4Ifnjo2u7jOZdS0PQoHU3sho5bq012deIlao81PuWi7nOTJDy5mza Oiue8g2rZRvjjf9rNjL7aPMpOO1GC55ui6B6OicxChee+axFMIyKVR274WRUaSgaxcKGFExPSlaBX G15x18CAzivBk+085CCxq2+BIt+ySRxPDl95qPMz/JmWHE+SCvK8lZbPsO9a0oHdTH0lYbDFmXdec Jrxy5LIg==; From: Mauricio Faria de Oliveira Date: Wed, 20 May 2026 18:12:08 -0300 Subject: [PATCH v3 4/4] x86/pvh: fix unbootable VMs by really inlining memset() in xen_prepare_pvh() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260520-pvh-kasan-inline-v3-4-bede769c6ec7@igalia.com> References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-c1860d/1779311575-B6F72DB1-146F5E81/0/0 X-purgate-type: clean X-purgate-size: 1474 Even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. This particular one (still) generated the inline implementation as expected (at least in these compiler versions), but this is not guaranteed to remain the case, as seen with the previous commit. Switch the builtin to the inline implementation to prevent a similar issue. Fixes: fbe5a6dfe492 ("xen, pvh: fix unbootable VMs by inlining memset() in xen_prepare_pvh()") Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- arch/x86/platform/pvh/enlighten.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/platform/pvh/enlighten.c b/arch/x86/platform/pvh/enlighten.c index f2053cbe9b0ce3d2178938269607c652ae8f528e..cb442cbd9d828619421babb281bfe9759edbca8a 100644 --- a/arch/x86/platform/pvh/enlighten.c +++ b/arch/x86/platform/pvh/enlighten.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -129,7 +130,7 @@ void __init xen_prepare_pvh(void) * This must not compile to "call memset" because memset() may be * instrumented. */ - __builtin_memset(&pvh_bootparams, 0, sizeof(pvh_bootparams)); + __inline_memset(&pvh_bootparams, 0, sizeof(pvh_bootparams)); hypervisor_specific_init(xen_guest); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 21:19:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:19:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314427.1584386 (Exim 4.92) (envelope-from ) id 1wPoKG-0006eU-BD; Wed, 20 May 2026 21:19:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314427.1584386; Wed, 20 May 2026 21:19:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoKG-0006eN-7j; Wed, 20 May 2026 21:19:36 +0000 Received: by outflank-mailman (input) for mailman id 1314427; Wed, 20 May 2026 21:19:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoKD-0006eH-1J for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:19:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoKC-00BUls-3D for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:19:32 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e250d-2eae-0a2a0a5409dd-0a2a450b9da4-44 for ; Wed, 20 May 2026 23:19:31 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e2563-212f-0a2a450b0019-5a9b322297a2-3 for ; Wed, 20 May 2026 23:19:31 +0200 Received: from [54.240.197.227] (helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPoK1-00000007aua-0ZJM; Wed, 20 May 2026 21:19:21 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2T02KkRcNqHQW1Lp9kmhoNiqh8itBq6Uvl0wCCT1Bio=; b=RzgYSL+9m9JvdNIyWP36q3XkJO Nk3v7gLu9PPih2xcac5s9Zwy3uEdKi88oue80vbclyxBfh/sEdrtKY/4tkb4u+2V6dyul19hJO4gc F+IAuYrKjGIODQTeJwY49IPc7k6cvnN3zZzZo7h2KgwYQ3fqUpfOttTbg7dpxsLlpdzuFNbOeo2wa sP7p5x5a5ECsFi23z9NcBMQdkqcQEveo1E78SK4uMA1bc85cdi5x+slspcFgNztkUxM0b8/Y8rkQ4 PBJWktM5UgvY3+/uw83eoZxMYhqNsqzbpXonsL/v2P3+B6YkDkmIvfdYPyuicJB1nlD4zSVmnNjvI bGwYbeCA==; Message-ID: <621e10bdc9e297c6c600b561d8fa25c3b62968bc.camel@infradead.org> Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: David Woodhouse To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. 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Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=QrmoDDcRFc85TJxSTIraknowNTSHHOttVC2hQ/n8Nw8=; b=h5Cwm4IXpqydrJFUwR+NYd9lEz MgWdiaLQRW3jNu68Dv9kDXmNtxbACTne+/I1pY8Uyc0KYJx7e5TDIDoxEge2SGzZOpP1SaqH5G8p2 nX9ChKIUHZtmsjAVXEVgIa2RLd0CxVPfTAU9Yn3ra0srJqgb05V9NUm6tjrzWBERCA9jqBOGm6RBs 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Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org Subject: Re: [PATCH v2 0/3] x86/pvh: fix unbootable VMs again (PVH + KASAN) In-Reply-To: <20260427-pvh-kasan-inline-v2-0-2c57b8dcff6a@igalia.com> References: <20260427-pvh-kasan-inline-v2-0-2c57b8dcff6a@igalia.com> Message-ID: X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-4.8, Tests=ALL_TRUSTED=-3,AWL=-2.599,BAYES_50=0.8 X-Spam-Score: -47 X-Spam-Bar: ---- X-purgate-ID: tlsNG-720697/1779311722-A917D161-25AE0A03/13/0 X-purgate-type: clean X-purgate-size: 403 On 2026-04-27 13:10, Mauricio Faria de Oliveira wrote: > The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. > > Booting directly from vmlinux (instead of bzImage) now fails with gcc-14/15 > (but works with gcc-12/13) if CONFIG_KASAN_GENERIC is set, on Ubuntu 25.10. v3: https://lore.kernel.org/all/20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com/ -- Mauricio From xen-devel-bounces@lists.xenproject.org Wed May 20 21:27:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 21:27:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314446.1584404 (Exim 4.92) (envelope-from ) id 1wPoRn-0000MI-Cc; Wed, 20 May 2026 21:27:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314446.1584404; Wed, 20 May 2026 21:27:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoRn-0000MB-9Q; Wed, 20 May 2026 21:27:23 +0000 Received: by outflank-mailman (input) for mailman id 1314446; Wed, 20 May 2026 21:27:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPoRl-0000M5-Fd for xen-devel@lists.xenproject.org; Wed, 20 May 2026 21:27:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPoRj-000fbl-HL for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:27:20 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e26fb-5cb7-0a2a0a5109dd-0a2a4507a754-18 for ; Wed, 20 May 2026 23:27:19 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e2737-229c-0a2a45070019-5a9b3222b610-3 for ; Wed, 20 May 2026 23:27:19 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPoRa-00000007bFG-3vAv; Wed, 20 May 2026 21:27:11 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=iiu0/Z8Z7QeRqVwrLu8YClRj6HX01QNYQxrtQs5e9+o=; b=RMaOxZwtwHkrLgzAtve8ev8iAf fczeJu/80YxKxgYQHNfztXPFjE6kCrb9wl0TzPBNfz2EQsoXBIiyjZZemBQMNLAc+qgyrktBIoOWx A2dY6MW/hTSorRjXX3+qr1b8P3UHzhFRU2Dls+P3Xp1hjxprHj53OjTRa8JW6M+DSUklFP2NXpfC5 uYZmIJuZ5QjQlUGu2q85N53PHXfzxOC6vgCGaGiCBvOLzn1FFvXe6JGN7kfku2tjtFemybWD4rvCM 8ZrjDHvf+x90FQg0rv6MGRoJMepOj0vJUakz5urBKuhb+MDyWrAJykwLy8Tc7fbAppLet6VG0TdG0 eBNUvKhw==; Message-ID: <3b3d39c2293c3c59950509591a6477a912ec8a7a.camel@infradead.org> Subject: Re: [PATCH v3 07/41] clocksource: hyper-v: Register sched_clock save/restore iff it's necessary From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:27:09 +0100 In-Reply-To: <20260515191942.1892718-8-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-8-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-WsVF7OPC8zpBEcS9iR9i" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1779312439-09F6EC48-E711E55E/0/0 X-purgate-type: clean X-purgate-size: 8641 --=-WsVF7OPC8zpBEcS9iR9i Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Register the Hyper-V reference counter (refcounter) callbacks for saving > and restoring its PV sched_clock, if and only if the refcounter is > actually being used for sched_clock.=C2=A0 Currently, Hyper-V overrides t= he > save/restore hooks if the reference TSC available, whereas the Hyper-V > refcounter code only overrides sched_clock if the reference TSC is > available *and* it's not invariant.=C2=A0 The flaw is effectively papered= over > by invoking the "old" save/restore callbacks as part of save/restore, but > that's unnecessary and fragile. >=20 > To avoid introducing more complexity, and to allow for additional cleanup= s > of the PV sched_clock code, move the save/restore hooks and logic into > hyperv_timer.c and simply wire up the hooks when overriding sched_clock > itself. >=20 > Note, while the Hyper-V refcounter code is intended to be architecture > neutral, CONFIG_PARAVIRT is firmly x86-only, i.e. adding a small amount o= f > x86 specific code (which will be reduced in future cleanups) doesn't > meaningfully pollute generic code. >=20 > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-WsVF7OPC8zpBEcS9iR9i Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx 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In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=uBmG60KCmcW5thThJf45pWeWvJEk6dEfmgG3zQwi5dg=; b=B6y/IdtSkSEp3UbkGDeA5gyvHc iOKeHHaresxSKHgsuQw7WHfjywoyo6BsCu6vst8m0xAfBOrS2GE5VzQ9vkow127vMeCW4X4o0ddTZ q6YKbD9w3RbalgIPlRQPvUflvKVosoC6Yx6jGwj8a3I/HtORYv6ZNC45/trlfMJHtcv86hSo0b6Ui HP9kR7PtNJpjd/eu8XGEvvR7EBx7XBiAlvZUTV5IUZDL/QXBQDhUUtii/Q5z5eeFkF3meNucgrKwm cQHEApK1XZAwgd2ZeZ9Fkpr955B6kmRjJZnrTjJ0Kd8Cip2L6UTqGMCmPpvhq03KrVyH7QIqK/17Z UCCCOuKg==; Message-ID: Subject: Re: [PATCH v3 08/41] clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:29:59 +0100 In-Reply-To: <20260515191942.1892718-9-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-9-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-XejRO1KMfpncCeYEoNeh" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=iR0vPLYITswgtSgBTBoRMyjUX6mzMxULdJ7R+Sys+Ms=; b=vr0sBVx5eHlZoE7JM07BZ2HK6V +Nlyipxl9SHT0Bbe7Kc1YS4xhkhoaxoTsvqPNbggpQNxMueEB91VbhSBvtR9FzGq5Ywy4JypnGy5e f5gccZoj0ctTgKyFSFWO3OoNP5VE2HrbwsMs+RTlEvZNtCdkf8wlJKpfNsWS9Kev3hPeZ7cENoNMb 26HRx+plhBG8DM7SgwqpuwrElbsw86w/FddZTYPWTEO2pGJeV/X4yS3jdGPwK/dN4Oov776G5ccaS kwziog9DmxJWPQrHB5kMofq7xOfJgd9ImoLdUad2jRg8orVPuFMxztf/ym1442HECcSGtIvXzZk7a Rq1sJwIw==; Message-ID: <1115ab6aedaaa25dfa4f143ad151bb2af0e290d3.camel@infradead.org> Subject: Re: [PATCH v3 09/41] clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:30:41 +0100 In-Reply-To: <20260515191942.1892718-10-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-10-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-Sn8epQWSao7nVocRa+BP" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-33051d/1779312649-38577938-7E8548B0/0/0 X-purgate-type: clean X-purgate-size: 8240 --=-Sn8epQWSao7nVocRa+BP Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Now that Hyper-V overrides the sched_clock save/restore hooks if and only > sched_clock itself is set to the Hyper-V reference counter, drop the > invocation of the "old" save/restore callbacks.=C2=A0 When the registrati= on of > the PV sched_clock was done separately from overriding the save/restore > hooks, it was possible for Hyper-V to clobber the TSC save/restore > callbacks without actually switching to the Hyper-V refcounter. >=20 > Enabling a PV sched_clock is a one-way street, i.e. the kernel will never > revert to using TSC for sched_clock, and so there is no need to invoke th= e > TSC save/restore hooks (and if there was, it belongs in common PV code). >=20 > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-Sn8epQWSao7nVocRa+BP Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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<621e10bdc9e297c6c600b561d8fa25c3b62968bc.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 X-purgate-ID: tlsNG-33051d/1779312818-3794D938-11D3E248/0/0 X-purgate-type: clean X-purgate-size: 4426 T24gV2VkLCBNYXkgMjAsIDIwMjYsIERhdmlkIFdvb2Rob3VzZSB3cm90ZToKPiBPbiBXZWQsIDIw MjYtMDUtMjAgYXQgMTM6NDQgLTA3MDAsIFNlYW4gQ2hyaXN0b3BoZXJzb24gd3JvdGU6Cj4gPiAK PiA+ICvCoMKgwqDCoMKgwqAgLyoKPiA+ICvCoMKgwqDCoMKgwqDCoCAqIElmIHRoZSBUU0MgY291 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In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=kMvKUYUiacn08XkU4Q8chB3i7d0Md6scr9tZlkvezXo=; b=e0Y1e/z/NlAQMOxl7qWJr20NHv 4M9sDFcjk6Vt29Tb1kezyRviZ3URUrpKS2JjK2X7mL5txD0EyfZQUxTlHhkwoFPFg2HXKhLBnkHy6 +ee093iE6WdCtkjbla98j2HbmY/Bh4bwKn0MpQzJLKRdbaCY3QCb5WbGUV1KStdOD8aE0ZPtyqIbJ vhkXPD/wYNL+ufFiOb/SSQyOn+jsE0Syyk0+DOuyyV9r9FRJL52x9xc+RH+oYNHC2teuLISgNX+bQ FN3kdnlfLKIMxCC0+wJQzxMUNjrLtkle+IIhOY933l03yaINabarzpg4ZcUUEc79P9bErwp+sAKYP jdxI5DPQ==; Message-ID: Subject: Re: [PATCH v3 10/41] x86/kvmclock: Setup kvmclock for secondary CPUs iff CONFIG_SMP=y From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:45:54 +0100 In-Reply-To: <20260515191942.1892718-11-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-11-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-+JrU7A56rZDSz8IlvFyo" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779313563-E196DCF5-A62DF8C6/0/0 X-purgate-type: clean X-purgate-size: 7791 --=-+JrU7A56rZDSz8IlvFyo Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Gate kvmclock's secondary CPU code on CONFIG_SMP, not CONFIG_X86_LOCAL_AP= IC. > Originally, kvmclock piggybacked PV APIC ops to setup secondary CPUs. > When that wart was fixed by commit df156f90a0f9 ("x86: Introduce > x86_cpuinit.early_percpu_clock_init hook"), the dependency on a local API= C > got carried forward unnecessarily. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-+JrU7A56rZDSz8IlvFyo Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw 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header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=76gkSSjJ06e6pDzAypOKfXDG5VHWtkBMD5ifLWyI+5o=; b=jDmVqRhZHbXv3h5OJh4AYHQSn8 TcRtwUK1NdPokJBhfUkxNtROd3xAiaREqNuRLWVIiAXHP3UvgdDYC5Yf5BY4rY2TUaQPllysR1KXQ dO3DkzxajHWJ5inYosuVwKRT3D1Rr4EnWLI7eDhQTR5KCsWJbTO7vE10xzs5bJTR8JwGwjEPARDuH Wcfd1KxkS1iwkD1eI4tUV852ZYMaBI+Larn/10z+aIEdObmWVitRQmNZoTanmKg4em5hfIx+C+nrN Cnt2ATvIMHLya1fQDhLPMBKr7eHbZ+6VLggLrfzNweB1BhFDqasyaNljdnwfvp/3r5yRvfXJeRphV /KxhU1rQ==; Message-ID: <133628b2e275b00f0b0779b6b6507043f08c4a52.camel@infradead.org> Subject: Re: [PATCH v3 11/41] x86/kvm: Don't disable kvmclock on BSP in syscore_suspend() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:51:45 +0100 In-Reply-To: <20260515191942.1892718-12-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-12-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-kWcNeJmwuu+RfO0gpPl+" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1779313916-12971F3B-C19676F8/0/0 X-purgate-type: clean X-purgate-size: 8499 --=-kWcNeJmwuu+RfO0gpPl+ Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Don't disable kvmclock on the BSP during syscore_suspend(), as the BSP's > clock is NOT restored during syscore_resume(), but is instead restored > earlier via the sched_clock restore callback.=C2=A0 If suspend is aborted= , e.g. > due to a late wakeup, the BSP will run without its clock enabled, which > "works" only because KVM-the-hypervisor is kind enough to not clobber the > shared memory when the clock is disabled.=C2=A0 But over time, the BSP's = view > of time will drift from APs. The work that Dongli and I have been doing elsewhere makes me want to phrase that last sentence far more judgmentally, as the kvmclock absolutely should *not* be randomly drifting over time without good reason, and what was written to it earlier really *ought* to still be valid. But OK :) > Plumb in an "action" to KVM-as-a-guest and kvmclock code in preparation > for additional cleanups to kvmclock's suspend/resume logic. >=20 > Fixes: c02027b5742b ("x86/kvm: Disable kvmclock on all CPUs on shutdown") > Cc: stable@vger.kernel.org > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-kWcNeJmwuu+RfO0gpPl+ Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj 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b=C3KXodiWWlgbcDiMbYKSpffnDe 2wy6vD24WI6C1ASVsOfhTce+ihf2Dqyd8eFfQDaSYovFMEhBW5AOUerUAgoxbwDXXzU9ZwM9og/Xr 5bv0RZOSJ+eSbKBsKc/SSqtqaRjHyLpz09cbwVaqvKPKwb8WAMQC76x+9LXAG6WObOE6rTG6nb71T IWO5oPlGRzeP3SUbnQjxiq20sactLFbbEYLGhsc1jW3JJzkvgt2G9Sajga+enQxPWp/X+J0cIDhxr eonRP9bLJO0+FNHlGndkblplvoAfPUYaHDXks6QiL5Suq2vZXuRu7+upJTYnEveFeyHljBzRSjpUk t1GTRagQ==; Message-ID: Subject: Re: [PATCH v3 12/41] x86/paravirt: Remove unnecessary PARAVIRT=n stub for paravirt_set_sched_clock() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:53:12 +0100 In-Reply-To: <20260515191942.1892718-13-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-13-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-LZSBgeOiINF7ylNXtgtB" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779314005-8D186D75-A49B79EA/0/0 X-purgate-type: clean X-purgate-size: 7816 --=-LZSBgeOiINF7ylNXtgtB Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Remove the unnecessary paravirt_set_sched_clock() stub for PARAVIRT=3Dn, = as > all callers are gated by PARAVIRT=3Dy.=C2=A0 Eliminating the stub will av= oid a > pile of pointless churn as the "real" implementation evolves. >=20 > No functional change intended. >=20 > Fixes: 39965afb1151 ("x86/paravirt: Move paravirt_sched_clock() related c= ode into tsc.c") > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-LZSBgeOiINF7ylNXtgtB Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw 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header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=38ANKb1jM4JmiMAnBWx/WwzViNtUVSjLLpZWyzM+25E=; b=PI0diD+pIo5hPd+dE2/c7EucR4 eoXPFJj9K2jg+Q44TZdb/PVK5gc9FJrKYGBqpzqXIpj9r9J5Rz4/jg2cgHi6XzBqkZLUBgTLUYLoy 047XQmdylbC/gviPM4c+Tif5Oo2OKwymc3pSYxOocHUhVdbVS3YzkPnZOKYtwtwNHUgWZp3GhJ4ga /oLbFiB63TZwL9iUYbPSGEfVWT9pIav1zASgHO4FaOLw3UcWV2in/7/WVffKmNb4voCLSQH2kYOht zGmG4zVhSn4VIJVtC6mAR/8UKzddaT0j+PEhOs84B88U10UHpPh+VcrvVk2a2NXrX25TN/iCx0Ss/ Rcid4VuA==; Message-ID: Subject: Re: [PATCH v3 13/41] x86/paravirt: Move handling of unstable PV clocks into paravirt_set_sched_clock() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:57:28 +0100 In-Reply-To: <20260515191942.1892718-14-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-14-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-3Uz1L207KXSTPaqLS94I" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1779314258-B6F72DB1-A1F6CD8D/0/0 X-purgate-type: clean X-purgate-size: 8130 --=-3Uz1L207KXSTPaqLS94I Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Move the handling of unstable PV clocks, of which kvmclock is the only > example, into paravirt_set_sched_clock().=C2=A0 This will allow modifying > paravirt_set_sched_clock() to keep using the TSC for sched_clock in > certain scenarios without unintentionally marking the TSC-based clock as > unstable. >=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse > -void paravirt_set_sched_clock(u64 (*func)(void)); > +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable); > + > +static inline void paravirt_set_sched_clock(u64 (*func)(void)) > +{ > + __paravirt_set_sched_clock(func, true); > +} One of the few things I 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List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=Nxl72hpGuRjTtFDFYVIo2HTu6nOPkXxVj25aveizy6g=; b=rWM0lK7Hb+v9K8wEmJj/KZGSYj kDp9lGXOtLBV9sa8n35EUiVvI2ure9vEJax/mBA11EaqvNwHobSvmqnpqe77NuTeAAt/mcYg8LeyN c9MXpxa5tpbhSxt/zp7k+cuirWL2lrB4rxT5Ae3Na/SYbnAvrp5cfdzPzFrout1MgTppWvMo+ZwzP 6DJzFDhMSJ4F91pZHMVXs4sHCkjT8LHSmvyFm00Y2BL7ELdQjC4/+RGJRrMeE079Fn7LcaPTTHUm2 KsO9X8NY3H4bmoh4UkTHqE5neD/VH26JyjMV4rnusuyKL4M3wXgCJw+hrbp/q1m8q/yNoJp8GkuqY dp2vdBEw==; Message-ID: <4f5fb04c3682a8814ff6eaef9c7d5358f97f2dd1.camel@infradead.org> Subject: Re: [PATCH v3 14/41] x86/kvmclock: Move sched_clock save/restore helpers up in kvmclock.c From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 22:59:15 +0100 In-Reply-To: <20260515191942.1892718-15-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-15-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-SmgPIZ7sB07ARuLBADik" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1779314367-7BF66161-91A61A3E/0/0 X-purgate-type: clean X-purgate-size: 7618 --=-SmgPIZ7sB07ARuLBADik Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Move kvmclock's sched_clock save/restore helper "up" so that they can > (eventually) be referenced by kvm_sched_clock_init(). >=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-SmgPIZ7sB07ARuLBADik Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi 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from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e3196-56b3-0a2a450a0019-5a9b32229d3a-3 for ; Thu, 21 May 2026 00:11:34 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPp8P-00000007emg-1ZkF; Wed, 20 May 2026 22:11:26 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=CT5QpPm6eA1CZnoEA6O4hJlmgB44gFuedizQIf0klZQ=; b=c6or5S8TwDkifUFcK1yIWbcrXf iRKKGvwlZrOWMQeTdtkFxu/d1OfuzMFdhaJI2d9ssCc8q372BQ2B1Ep1743dJ/anVPzTkw5Yo8fBt Vj1JnT8xFtDqfEaMkxIao0gcZVpBpNQhW/S5a4eLRfbm4ARdcEdMimgSzT3zv9wu/T8QvZn5yjO1W tUWxXHaBGj3zJnza9n8IJyoDru0nfl0tRUPczn8U5Km5oQ6HZx0s1p0Xx2Lc6lux2lZYyxHPAALvR RaY4ql1iINZwgGIr6pW/Hj1n5NKw+17K+4RZuUFhTggbPIl9gHTD0B6G+Qb3g+qEpDUiJVM+lXo9b 53Jm1N8w==; Message-ID: <93f8fad19e2c617ca17f544d11483c517024bfc4.camel@infradead.org> Subject: Re: [PATCH v3 15/41] x86/xen/time: Nullify x86_platform's sched_clock save/restore hooks From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:11:23 +0100 In-Reply-To: <20260515191942.1892718-16-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-16-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-eUMZcoCFNRZTyvVvYNIb" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-4011c0/1779315094-72D708B7-8EBC1E31/0/0 X-purgate-type: clean X-purgate-size: 8596 --=-eUMZcoCFNRZTyvVvYNIb Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Nullify the x86_platform sched_clock save/restore hooks when setting up > Xen's PV clock to make it somewhat obvious the hooks aren't used when > running as a Xen guest (Xen uses a paravirtualized suspend/resume flow). >=20 > Signed-off-by: Sean Christopherson Hm. Xen HVM guests *do* use a standard ACPI S4 hibernation flow. Does that need testing? > --- > =C2=A0arch/x86/xen/time.c | 6 ++++++ > =C2=A01 file changed, 6 insertions(+) >=20 > diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c > index 3d3165eef821..21d366d01985 100644 > --- a/arch/x86/xen/time.c > +++ b/arch/x86/xen/time.c > @@ -568,6 +568,12 @@ static void __init xen_init_time_common(void) > =C2=A0 xen_sched_clock_offset =3D xen_clocksource_read(); > =C2=A0 static_call_update(pv_steal_clock, xen_steal_clock); > =C2=A0 paravirt_set_sched_clock(xen_sched_clock); > + /* > + * Xen has paravirtualized suspend/resume and so doesn't use the common > + * x86 sched_clock save/restore hooks. > + */ > + x86_platform.save_sched_clock_state =3D NULL; > + x86_platform.restore_sched_clock_state =3D NULL; > =C2=A0 > =C2=A0 tsc_register_calibration_routines(xen_tsc_khz, NULL); > =C2=A0 x86_platform.get_wallclock =3D xen_get_wallclock; --=-eUMZcoCFNRZTyvVvYNIb Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; 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eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=rT9nUsxSu2Ybme3gJs5c20aSGkkXIKB7Tp3hLLwdwlQ=; b=Wr9TJuDNhfwD+ASl40rB6eLn5A XHmr9Ui/RLpFuNfW/MAyhI5S1mXY6h4F2wtyet+ZyqA8j+5e2s5f8Upd1vRumjnVyEPUEXyOMWAQG PNMtTcg0BcTYhYLF/q8OF+qbPFFefdSV+JuIzsPupvwDUacau3rb6Wgxfzh2BL+bezLuA/3aZ8j3u HPKtglkKriRmLnFc0OP7b43/19Hnbxp7l3VZdgS1mnTE00aVLoDkBj17Jc+7jUdlSKbxpUA3Tcem0 YbiordyimJUGn7kEkNWPlNKEqnPk2NMbk7Joefc+W79n2WaF+9EX95ha49rVAhKzFry6IwDJfakA/ nc1lyZNQ==; Message-ID: <97b6edeb207a8c02b79b95d7e5091b37c8ce8025.camel@infradead.org> Subject: Re: [PATCH v3 16/41] x86/vmware: Nullify save/restore hooks when using VMware's sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:15:22 +0100 In-Reply-To: <20260515191942.1892718-17-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-17-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-jnx7qWHFD66TSDSU1e26" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779315331-8F397D75-36533D30/0/0 X-purgate-type: clean X-purgate-size: 7916 --=-jnx7qWHFD66TSDSU1e26 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Nullify the sched_clock save/restore hooks when using VMware's version of > sched_clock.=C2=A0 This will allow extending paravirt_set_sched_clock() t= o set > the save/restore hooks, without having to simultaneously change the > behavior of VMware guests. >=20 > Note, it's not at all obvious that it's safe/correct for VMware guests to > do nothing on suspend/resume, but that's a pre-existing problem.=C2=A0 Le= ave it > for a VMware expert to sort out. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-jnx7qWHFD66TSDSU1e26 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" 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eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=u/o0dx1DTtvDMEvtqsgv6xvzgr05hh9iTv1UVVaweM8=; b=Pf4BtEcR1l2SN8va8ePyeHXTYd UdkibwUXr3vheIE7ybNGI6jziKF5IfUWKppllOgstw5tkz+n0qfSv+hNKT7YcN7cCCn8TvAFwomwq NmCKWjlehElWaf42JeesPOgqI9pcYK0u1BCIRWRA9KAKckQd1T6d31MK4erjJfq6ody+beqE3EAOQ 6qDdakbhleQXU1geIXfWCSfzwuzCS9n0Db1K5q9D/dYU/8dAPV/ZtQQ7pGy+sYODX+dEBpFqY6SjG y+O4Q7VuoLvl6IXC61Zzydc+xLeaF8LAQiClSFyfNIG1E6CxiBu/RfFlOzTOxCpJaZUgBmZgU1rOz qnClQF2w==; Message-ID: <28efabc0618268447144db5068cdf377afbea506.camel@infradead.org> Subject: Re: [PATCH v3 17/41] x86/tsc: WARN if TSC sched_clock save/restore used with PV sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:27:50 +0100 In-Reply-To: <20260515191942.1892718-18-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-18-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-WbaHQ7O15QtA6Zt9MU0Q" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779316081-DA577CF5-B7376CA4/0/0 X-purgate-type: clean X-purgate-size: 7667 --=-WbaHQ7O15QtA6Zt9MU0Q Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Now that all PV clocksources override the sched_clock save/restore hooks > when overriding sched_clock, WARN if the "default" TSC hooks are invoked > when using a PV sched_clock, e.g. to guard against regressions. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-WbaHQ7O15QtA6Zt9MU0Q Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT 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a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazoncorp2; t=1779316531; x=1810852531; h=from:to:cc:subject:date:message-id:references: in-reply-to; bh=gSw8rnwXQ0rhZeVx84L0W3uc6MkIiFaqVJq9n/+cEdc=; b=cy3GisuwUsm2T7ZS2T7Q3v6ch39Yhl50nK+mzouUTqbcwN4T56yoFTB1 HQKgQ4BPu3I5/xHYTmbLTLjtb0xl8syM7WPMja0deETIrcSiFAROoIpxF R0VWbZ6MfKudgV4fqDM1sL3/WOSmbibYJLi5lnssviRvI9QuW3CkS7Ykd 1vWuJtylvmcvUytYWiFnVhZxCpaQQSPnttfWFGcR+GVFl/ShrQlFx213/ NMvnLiTtQeJCVrCM7tnE8iHEJp3Sm/jvH7jc3l9vjKGKQq7ZFs7dWh/d3 0UweHNo2Y5IRg7X3zC3Vt3QWbu/dfXZH0PkzmW4wjIgDACLWzpZ0ogpxE Q==; X-CSE-ConnectionGUID: 5Q/LMkrsSYKzZPZuKRMfEQ== X-CSE-MsgGUID: BEOYDa+3QkGrhQBheknQYg== X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="6.23,245,1770595200"; d="p7s'346?scan'346,208,346";a="18939673" Content-Type: multipart/mixed; boundary="===============8743037896110918423==" MIME-Version: 1.0 X-Farcaster-Flow-ID: 59278547-ce4e-45a1-a98f-79b6d9967b7c From: "Woodhouse, David" To: "tglx@kernel.org" , "longli@microsoft.com" , "luto@kernel.org" , "alexey.makhalov@broadcom.com" , "jstultz@google.com" , "dave.hansen@linux.intel.com" , "ajay.kaher@broadcom.com" , "jan.kiszka@siemens.com" , "haiyangz@microsoft.com" , "kas@kernel.org" , "seanjc@google.com" , "pbonzini@redhat.com" , "kys@microsoft.com" , "decui@microsoft.com" , "daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" CC: "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Subject: Re: [PATCH v3 18/41] x86/paravirt: Pass sched_clock save/restore helpers during registration Thread-Topic: [PATCH v3 18/41] x86/paravirt: Pass sched_clock save/restore helpers during registration Thread-Index: AQHc6Kj0fv5ul1kqCk6EoM3O36i5qw== Date: Wed, 20 May 2026 22:35:26 +0000 Message-ID: <69226e77bcf1b93041f27843b6259921f226c0cc.camel@amazon.co.uk> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-19-seanjc@google.com> In-Reply-To: <20260515191942.1892718-19-seanjc@google.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.106.83.30] MIME-Version: 1.0 X-purgate-ID: tlsNG-ebf023/1779316531-4396A3FF-151BF746/21/137 X-purgate-type: clean X-purgate-size: 11302 --===============8743037896110918423== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/pkcs7-signature"; boundary="=-4SuH15PLIgNoHhsEZRux" --=-4SuH15PLIgNoHhsEZRux Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Pass in a PV clock's save/restore helpers when configuring sched_clock > instead of relying on each PV clock to manually set the save/restore hook= s. > In addition to bringing sanity to the code, this will allow gracefully > "rejecting" a PV sched_clock, e.g. when running as a CoCo guest that has > access to a "secure" TSC. >=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Nice! Reviewed-by: David Woodhouse > --- a/arch/x86/xen/time.c > +++ b/arch/x86/xen/time.c > @@ -567,13 +567,12 @@ static void __init xen_init_time_common(void) > =C2=A0{ > =C2=A0 xen_sched_clock_offset =3D xen_clocksource_read(); > =C2=A0 static_call_update(pv_steal_clock, xen_steal_clock); > - paravirt_set_sched_clock(xen_sched_clock); > + > =C2=A0 /* > =C2=A0 * Xen has paravirtualized suspend/resume and so doesn't use the c= ommon > =C2=A0 * x86 sched_clock save/restore hooks. > =C2=A0 */ > - x86_platform.save_sched_clock_state =3D NULL; > - x86_platform.restore_sched_clock_state =3D NULL; > + paravirt_set_sched_clock(xen_sched_clock, NULL, NULL); > =C2=A0 > =C2=A0 tsc_register_calibration_routines(xen_tsc_khz, NULL); > =C2=A0 x86_platform.get_wallclock =3D xen_get_wallclock; Same deal here as with kvmclock, FWIW. If the TSC is viable, then it's the better choice.=20 Especially now there's a significant chance that a "Xen guest" is actually running under KVM. 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Amazon Development Centre (London) Ltd.Registered in England an= d Wales with registration number 04543232 with its registered office at 1 P= rincipal Place, Worship Street, London EC2A 2FA, United Kingdom.


--===============2486592903892225233==-- --===============8743037896110918423==-- From xen-devel-bounces@lists.xenproject.org Wed May 20 22:40:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 22:40:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314558.1584529 (Exim 4.92) (envelope-from ) id 1wPpa8-0000FA-E2; Wed, 20 May 2026 22:40:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314558.1584529; Wed, 20 May 2026 22:40:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPpa8-0000E6-AO; Wed, 20 May 2026 22:40:04 +0000 Received: by outflank-mailman (input) for mailman id 1314558; Wed, 20 May 2026 22:40:03 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPpa7-0008IC-Bb for xen-devel@lists.xenproject.org; Wed, 20 May 2026 22:40:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPpa5-00HZa5-0E for xen-devel@lists.xenproject.org; Thu, 21 May 2026 00:40:02 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e383d-e002-0a2a0a5209dd-0a2a4501945c-6 for ; Thu, 21 May 2026 00:40:00 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e3840-c1f2-0a2a45010019-5a9b3222dfac-3 for ; Thu, 21 May 2026 00:40:00 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPpZu-00000007hX4-39AK; Wed, 20 May 2026 22:39:50 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=DtDH8j0NQKmUGV97Jxz9ELEov3a5u9SumjQAgzWnX0k=; b=EUutVYgwMU8x7Umh1WP+INCI0R y8Lwa60qjt+2RfzfYtBTtlJSR6+/DdDzzFw/U6lYyfqNxJnWcgC8Ibt4aVxOPQRN4peTsfL3vRs4C 3UJ90JNqkrEd414rCqZaTn2mRewNe+bkLZcEdF5MI+WZ0gsVnexuCPkJ9EBYzJAoQ3mO++RivLXzy d0m0DV4+0ZOwQX46H7ELhq0VdyMIYgRVhYXAan1mzFiKGjJ+nELMRiJ7OTJkXmHSx/tO9RHg2GT4W RZN1CS6bBvoJDPfqeXIopnptfYj6P4JIsdVDsZmUL4l01tr+pIGDbyKT1kEvcEJy/a4XAa/PuqkV+ oxXhD3DQ==; Message-ID: Subject: Re: [PATCH v3 19/41] x86/kvmclock: Move kvm_sched_clock_init() down in kvmclock.c From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:39:49 +0100 In-Reply-To: <20260515191942.1892718-20-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-20-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-RlSQbiMm4CS3La34h7if" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1779316800-AC457FF4-50CDDE17/0/0 X-purgate-type: clean X-purgate-size: 8045 --=-RlSQbiMm4CS3La34h7if Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Move kvm_sched_clock_init() "down" so that it can reference the global > kvm_clock structure without needing a forward declaration. >=20 > Opportunistically mark the helper as "__init" instead of "inline" to make > its usage more obvious; modern compilers don't need a hint to inline a > single-use function, and an extra CALL+RET pair during boot is a complete > non-issue.=C2=A0 And, if the compiler ignores the hint and does NOT inlin= e the > function, the resulting code may not get discarded after boot due lack of > an __init annotation. >=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-RlSQbiMm4CS3La34h7if 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<4a260cf6b85dd895e005fe255bf25efd995e27d5.camel@infradead.org> Subject: Re: [PATCH v3 20/41] x86/xen/time: Mark xen_setup_vsyscall_time_info() as __init From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:40:18 +0100 In-Reply-To: <20260515191942.1892718-21-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-21-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-zpoYd5Qa1cV0TiUes6bQ" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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+0000 Received: from EX19D001UEB002.ant.amazon.com (10.252.135.17) by EX19D001UEB004.ant.amazon.com (10.252.135.58) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA) id 15.2.2562.37; Wed, 20 May 2026 22:43:50 +0000 Received: from EX19D001UEB002.ant.amazon.com ([fe80::19d6:e954:f18:6292]) by EX19D001UEB002.ant.amazon.com ([fe80::19d6:e954:f18:6292%3]) with mapi id 15.02.2562.037; Wed, 20 May 2026 22:43:50 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=amazoncorp2 header.d=amazon.co.uk header.i="@amazon.co.uk" header.h="From:To:CC:Subject:Date:Message-ID:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazoncorp2; t=1779317035; x=1810853035; h=from:to:cc:subject:date:message-id:references: in-reply-to; bh=PJNyu+7jvvvEzBtI7cLEsrH2QC8dv62u4lL0oNrS5wo=; b=dN3SSuQGdSvjt/DeZzq/b0LYz4VKxBYZT6Bu0LEuW5z3voDAo6X+ZSiR IyXMGhaia6PhFeVEiWFKn9ugbXZ6SlDSfXHnyjWDnjYRC0rGYokvdxm8L 50uf10UepD+pE8HdeOzeHPNaXlyJn9EF6soqJk/q75CGaB11bM09ZXEx/ 4LMXsV8KoHjhdYriKR++UGYOs7jBp89GxEItFB18sBbq+ep0CqOGLgkPn TLCNhXPN4OiI3g0snXIJpBLoq8fqOCmXZ3TkVLVECfrCvQssda/EUMV5S c+sw2PsRXWk0ANjtmOLiggCIqk3wwvIKc+p8DoV9jCXRQyXZGMkKFskVb A==; X-CSE-ConnectionGUID: KUcEZvlvRXKlfzyUj1YxVw== X-CSE-MsgGUID: kjcPQ6toQd2rmx7v9/f/bA== X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="6.23,245,1770595200"; d="p7s'346?scan'346,208,346";a="19042141" Content-Type: multipart/mixed; boundary="===============5843396909028368669==" MIME-Version: 1.0 X-Farcaster-Flow-ID: 8d88b796-f37c-44f5-8209-724cb01a4369 From: "Woodhouse, David" To: "tglx@kernel.org" , "longli@microsoft.com" , "luto@kernel.org" , "alexey.makhalov@broadcom.com" , "jstultz@google.com" , "dave.hansen@linux.intel.com" , "ajay.kaher@broadcom.com" , "jan.kiszka@siemens.com" , "haiyangz@microsoft.com" , "kas@kernel.org" , "seanjc@google.com" , "pbonzini@redhat.com" , "kys@microsoft.com" , "decui@microsoft.com" , "daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" CC: "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Subject: Re: [PATCH v3 21/41] x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init Thread-Topic: [PATCH v3 21/41] x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init Thread-Index: AQHc6Kog9FpgV4YmyUikwo4VicWA8g== Date: Wed, 20 May 2026 22:43:49 +0000 Message-ID: References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-22-seanjc@google.com> In-Reply-To: <20260515191942.1892718-22-seanjc@google.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.106.83.30] MIME-Version: 1.0 X-purgate-ID: tlsNG-16d1c6/1779317035-86576D75-01F37FA9/21/137 X-purgate-type: clean X-purgate-size: 10043 --===============5843396909028368669== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/pkcs7-signature"; boundary="=-xcaOhLSkATaKEeh9yzW3" --=-xcaOhLSkATaKEeh9yzW3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Now that Xen PV clock and kvmclock explicitly do setup only during init, > tag the common PV clock flags/vsyscall variables and their mutators with > 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--===============3620804152469418255==-- --===============5843396909028368669==-- From xen-devel-bounces@lists.xenproject.org Wed May 20 22:44:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 22:44:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314580.1584558 (Exim 4.92) (envelope-from ) id 1wPpea-0002Gw-HX; Wed, 20 May 2026 22:44:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314580.1584558; Wed, 20 May 2026 22:44:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPpea-0002Gp-D3; Wed, 20 May 2026 22:44:40 +0000 Received: by outflank-mailman (input) for mailman id 1314580; Wed, 20 May 2026 22:44:39 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPpeY-0002GY-Pj for xen-devel@lists.xenproject.org; Wed, 20 May 2026 22:44:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPpeX-00HaCQ-Iz for xen-devel@lists.xenproject.org; Thu, 21 May 2026 00:44:38 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e3954-e002-0a2a0a5209dd-0a2a4505c5ac-0 for ; Thu, 21 May 2026 00:44:36 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e3954-aaa8-0a2a45050019-5a9b3222dad0-3 for ; Thu, 21 May 2026 00:44:36 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPpeP-00000007hpg-3cKx; Wed, 20 May 2026 22:44:30 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=+DZstB+MHV1CL9v7iC4hC3EpbpRzleu52F3/Mziw8iM=; b=fYoCh94NRELg3JF+baJD0NwyKW qxprqsvXJn2MLO6JnMX7rBBAYmPRxh9oA0VXaxq7IPID3cN1CXZ1FoPyXcDgP7YIZVUCN6LkrWLg+ euJPiQ4jxmCc5ul4K7Oz1xvORpLHrVNR4RZu9n8hXvWd+bJris5s+eYCrokeLoHFBIwwYU7hAk1I7 GZUeduno3qphHT8EMk5R8iL+8rzytL+Y0w+dqcZsY9iHIymEVxtU1VCt0jgXPKRQeUQhe4YqqsREg X7+OioG2bJiktmDw51FG/9t02YZZgfal7nQRjAB8LbeAK2DDXVTQRje3/+ud1Aob0y3Z8qc5DoTOa 4/B+EDcA==; Message-ID: <3c319fe5f9d9e1ff005074320de9065af8a79f41.camel@infradead.org> Subject: Re: [PATCH v3 22/41] x86/pvclock: WARN if pvclock's valid_flags are overwritten From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:44:28 +0100 In-Reply-To: <20260515191942.1892718-23-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-23-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-NmFCdyiY4egYUvp+XVXA" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e39de-63b5-0a2a45080019-5a9b32229104-3 for ; Thu, 21 May 2026 00:46:55 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPpgd-00000007i1f-1xjN; Wed, 20 May 2026 22:46:47 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=eGf8zE8VSU/CYWvR8RwGK3Zkxx3u3NJdsOQ3RwMffU4=; b=ES80omK3u8axorzR/jGS695miN cvmxX5MMxSnJGpZensYsRW0qi/rn4sH6nj1g+6ltU0uUMgFD6ZAgdwVWyfk1cPWPMW7A90Ay4PH+T NROgO2JN27vk2hi6ymoA42i6p7XPaKC6+sCveUhLQbzFMR/w94Ojd8UNzZFp92i4czyLvQryBgmzI EcbCsN4RIxRXykjbYldnrz5Tdj5X+e2KzJ/tf/11fJN+3nkFHmgZOhJ7matEiNZO4fqEl2jRjR2jn D0UaKI55Bhwsypops6zHGPGOlXFLlDmhWYOog0JH9WV43Eu7L33/tORS6rjqF/eyA0s5NtkPMx1/+ DHosMsDw==; Message-ID: <5979bd60fc7d8eebfacb71112db5d0a74a98de19.camel@infradead.org> Subject: Re: [PATCH v3 23/41] x86/kvmclock: Refactor handling of PVCLOCK_TSC_STABLE_BIT during kvmclock_init() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:46:45 +0100 In-Reply-To: <20260515191942.1892718-24-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-24-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-2WAgxEizV8hcN/lY6ryq" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1779317215-B6D73DB1-CF0D1FB2/0/0 X-purgate-type: clean X-purgate-size: 7941 --=-2WAgxEizV8hcN/lY6ryq Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Clean up the setting of PVCLOCK_TSC_STABLE_BIT during kvmclock init to > make it somewhat obvious that pvclock_read_flags() must be called *after* > pvclock_set_flags(). >=20 > Note, in theory, a different PV clock could have set PVCLOCK_TSC_STABLE_B= IT > in the supported flags, i.e. reading flags only if > KVM_FEATURE_CLOCKSOURCE_STABLE_BIT is set could very, very theoretically > result in a change in behavior.=C2=A0 In practice, the kernel only suppor= ts a > single PV clock. > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-2WAgxEizV8hcN/lY6ryq Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; 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eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=0xB2c+l1rITmxW/V+Z0/6dbvZG3N4bYoVGjcTR7obto=; b=Br7jKn/triMy0YPuXhAeyCW48s z1cDkBsZ34cSLTEhbDA4GTXYhadTihDaZpKOfUmatPUknqwLBN5ESFk2VY+aLucGiyrIJ7GqAl3Qv 70eisbeRHfc3TWejZtPNVmlEmR3V+2SPwvlpvHae55wYCzCWk5+KnjIIfASycnKNyJF2izudVYRuN iodZaESZ3uDInwpIb9EGvqxfGCDFcgJJ91HTbmYjEoNmS2F+LQa7rh3PUfWcX5LarLnNAHcXv133q 4dBr2YH0sd0oxECYa8RcawLqthoPwDySFXaOh5tiT08iPIE3PaCYfDT+ha1zevhvKYCJiIhp1CuVN b3fd/zew==; Message-ID: <5c3609eea079a7b5b521ac4f01849bb05386a4ad.camel@infradead.org> Subject: Re: [PATCH v3 24/41] timekeeping: Resume clocksources before reading persistent clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:52:45 +0100 In-Reply-To: <20260515191942.1892718-25-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-25-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-I8cK8q5LHpUuTl/PNs95" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779317574-87F7BD75-6B7BE6BD/0/0 X-purgate-type: clean X-purgate-size: 8206 --=-I8cK8q5LHpUuTl/PNs95 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > When resuming timekeeping after suspend, restore clocksources prior to > reading the persistent clock.=C2=A0 Paravirt clocks, e.g. kvmclock, tie t= he > validity of a PV persistent clock to a clocksource, i.e. reading the PV > persistent clock will return garbage if the underlying PV clocksource > hasn't been enabled.=C2=A0 The flaw has gone unnoticed because kvmclock i= s a > mess and uses its own suspend/resume hooks instead of the clocksource > suspend/resume hooks, which happens to work by sheer dumb luck (the > kvmclock resume hook runs before timekeeping_resume()). >=20 > Note, there is no evidence that any clocksource supported by the kernel > depends on a persistent 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xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=6FuTxCzG50tCcJ7JmDxJagIZRoKf3Vu9pBMmVtaV0rk=; b=XYPO8EiyAGWA8BerIq1h1Qkdmp ixOBf1cP/KTVnPlQpdfOZ2AQQ4LFWx4MAHfZb8XLrqaA+0kcNuENbYE5M27rjY+n9qUQeJPB4P2lS ec3nSK5ceiNzY0vIjdTilzffUpZt5PkxAlIVUDrV168xX+76oH45/Abd2q/duj58F4fxKwBHEX7MM GrRA7Z4IV4F/SrSXM/Fy/kEciz57tZ1RiFP/HpS/XlMSj6mmTNfQJoETcajwxZ0Yt8Y3u6oujjhL/ jKD35RtkmOir3i489jpPeN8KZgStKrUZcMSgqTigLESbNWbe7bGdom+vHuO4u+lz11v0mab3xHPlW zR5Cg4gQ==; Message-ID: <8515b91e076fc48ba76c5a9284cc35da8a104715.camel@infradead.org> Subject: Re: [PATCH v3 15/41] x86/xen/time: Nullify x86_platform's sched_clock save/restore hooks From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Wed, 20 May 2026 23:54:39 +0100 In-Reply-To: <93f8fad19e2c617ca17f544d11483c517024bfc4.camel@infradead.org> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-16-seanjc@google.com> <93f8fad19e2c617ca17f544d11483c517024bfc4.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-/gqDT+SRkshP8r6BXHU7" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1779317687-4176AA53-7AD11921/0/0 X-purgate-type: clean X-purgate-size: 8835 --=-/gqDT+SRkshP8r6BXHU7 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Wed, 2026-05-20 at 23:11 +0100, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > Nullify the x86_platform sched_clock save/restore hooks when setting up > > Xen's PV clock to make it somewhat obvious the hooks aren't used when > > running as a Xen guest (Xen uses a paravirtualized suspend/resume flow)= . > >=20 > > Signed-off-by: Sean Christopherson >=20 > Hm. Xen HVM guests *do* use a standard ACPI S4 hibernation flow. >=20 > Does that need testing? Ah, this looks as sane as we can expect. Reviewed-by: David Woodhouse >=20 > > --- > > =C2=A0arch/x86/xen/time.c | 6 ++++++ > > =C2=A01 file changed, 6 insertions(+) > >=20 > > diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c > > index 3d3165eef821..21d366d01985 100644 > > --- a/arch/x86/xen/time.c > > +++ b/arch/x86/xen/time.c > > @@ -568,6 +568,12 @@ static void __init xen_init_time_common(void) > > =C2=A0 xen_sched_clock_offset =3D xen_clocksource_read(); > > =C2=A0 static_call_update(pv_steal_clock, xen_steal_clock); > > =C2=A0 paravirt_set_sched_clock(xen_sched_clock); > > + /* > > + * Xen has paravirtualized suspend/resume and so doesn't use the comm= on > > + * x86 sched_clock save/restore hooks. > > + */ > > + x86_platform.save_sched_clock_state =3D NULL; > > + x86_platform.restore_sched_clock_state =3D NULL; > > =C2=A0 > > =C2=A0 tsc_register_calibration_routines(xen_tsc_khz, NULL); > > =C2=A0 x86_platform.get_wallclock =3D xen_get_wallclock; >=20 --=-/gqDT+SRkshP8r6BXHU7 Content-Type: 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not appear outside xen-project/people This assumes we don't use pipeline sources other than push/api/schedule. Signed-off-by: Victor Lira --- this preseves the current behavior of the -testing jobs running anywhere on xen-project/people but maybe we want to limit it to whoever is doing the testing, or in some other way tested on my own repo xen-project/people/victormlira/xen push https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541858231 push /eclair-x86_64-amd$|alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859057 push /alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859605 schedule https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541871689 schedule /eclair-x86_64-amd$|alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541875599 schudule /alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541876512 --- automation/gitlab-ci/analyze.yaml | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/automation/gitlab-ci/analyze.yaml b/automation/gitlab-ci/analyze.yaml index b3f99f472d..687af4d452 100644 --- a/automation/gitlab-ci/analyze.yaml +++ b/automation/gitlab-ci/analyze.yaml @@ -19,25 +19,25 @@ - '*.log' - '*.json' reports: codequality: gl-code-quality-report.json rules: - - if: $WTOKEN == null - when: never - - when: always + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $WTOKEN + && $CI_PROJECT_PATH =~ /^xen-project\/hardware\/.*$/ + when: on_success + - if: $CI_JOB_NAME =~ $SELECTED_JOBS_ONLY && $WTOKEN + && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ + when: manual + allow_failure: true + needs: [] .eclair-analysis:triggered: extends: .eclair-analysis rules: - - if: $CI_PIPELINE_SOURCE == "schedule" + - if: $CI_PIPELINE_SOURCE != "push" && $CI_PIPELINE_SOURCE != "api" when: never - - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY - when: never - - if: $WTOKEN && $CI_PROJECT_PATH =~ /^xen-project\/people\/.*$/ - when: manual - allow_failure: true - !reference [.eclair-analysis, rules] eclair-x86_64-allcode: extends: .eclair-analysis:triggered variables: @@ -218,12 +218,10 @@ eclair-ARM64-amd: .eclair-analysis:on-schedule: extends: .eclair-analysis rules: - if: $CI_PIPELINE_SOURCE != "schedule" when: never - - if: $CI_JOB_NAME !~ $SELECTED_JOBS_ONLY - when: never - !reference [.eclair-analysis, rules] eclair-x86_64-allrules:on-schedule: extends: .eclair-analysis:on-schedule variables: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 20 23:02:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 23:02:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314621.1584602 (Exim 4.92) (envelope-from ) id 1wPpvS-0007MN-Ul; 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s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=HkuY5zlrDncQKLllQWWZ8rfybB4YymoG1YSXmtRo0wk=; b=DYgCKqJAuV01wCeoijOeQHyFzp eCVeH2ow0VIwOMPxuJ37OmNrkc6hTszDikp1AX4YN4iVsT7jZ+EaJZjzdL0Kol5g+Ci0PpHOsyYdk 25zjVPdkDqtlK0hzO+QaKBJlQv69RZohqGn1PhH3VF90viyzSXM1vu7r1fupR+JowX80QlWz4JazM ljWoTb8ACPM+hp92r6OX216b7g2nQWsLgyLm9o8Q96CC1GxFw48PfdD+HZs2N25t3xsaz2gJRYh7v ZcJPbjk8KranAwE4PKqk5J6hOXmuVAsMyyUHK4sPluJw7rm8q1uUWadjLgHpuEt6j6fSR534NLYr0 zGSmGDCQ==; Message-ID: <6a621c6ef71670394b3bcbe34cda8c5ae635558e.camel@infradead.org> Subject: Re: [PATCH v3 25/41] x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:01:53 +0100 In-Reply-To: <20260515191942.1892718-26-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-26-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-xGIqWxFCaJJI32R6nuFc" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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6a0e3e98-2eae-0a2a0a5409dd-0a2a450b8a20-40 for ; Thu, 21 May 2026 01:08:34 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e3e79-212f-0a2a450b0019-5a9b3222c478-3 for ; Thu, 21 May 2026 01:06:33 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPpzd-00000007iyd-3KJu; Wed, 20 May 2026 23:06:25 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=4GQvxYPbI05Z1cj/1WHAcL42C7RPKsGJx4Urkvl1K7Q=; b=k4QnWiSBnVT26KV/1hox8Bc2Zw h1ug6i4QDDFzmM1Wh9T7JCcQfBsfGyrAfq6hqZpmaf+jbpJizEBTCL6RJISAN+3C4DxGza0zAwOvS pnPO2w4zr+FMIHUZvDFIFMC8THsNlepjNwn9dDI9zBcVCmR9nbPX7YS/HHTjMJALFu5xiGau39JT3 g3pSSv8rCr8QSFozr5/dF72kXNI2qtwpxkQKvg9P5r6hCk5Mk89exS5Wjqj1q9fsQlmnnoPyG8gla BGL+QTW3FsmGeV7rHl1L1F8CZBv7fe2334TuURMV6+GtWXlTdi7Ls8BdIWuFmWHAkQeQ3kT33sdmB F4G6SkGA==; Message-ID: <0f85539ce23881f8a5c5a46c8cc633ef1ec3d162.camel@infradead.org> Subject: Re: [PATCH v3 25/41] x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:06:24 +0100 In-Reply-To: <20260515191942.1892718-26-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-26-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-fsxfMtCF9Cp6c6pnaDKT" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-42698a/1779318393-18F66F3B-0FD31CA8/13/0 X-purgate-type: clean X-purgate-size: 7690 --=-fsxfMtCF9Cp6c6pnaDKT Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Save/restore kvmclock across suspend/resume via clocksource hooks when > kvmclock isn't being used for sched_clock.=C2=A0 This will allow using kv= mclock > as a clocksource (or for wallclock!) without also using it for sched_cloc= k. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-fsxfMtCF9Cp6c6pnaDKT Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=wlYFn8GBTQgMJlzaCY8sTYxsTwtwyZW+CWVEV8yuRNg=; b=mDR37hnk/SJuewmW4PB24JELvz L6h2M2SoPugGLQcuTcmZFWo2eA4uAzDkcJ151D8Y0Exm/w8TOKAQU+1rlhmcCto5lW6YB9eu8OOAB AL9iswB5MYvnoQpSVQdegij6yVUqfaZnBcwTb2m6Mk7DuGN4ihbJik2XW5/BMEbLoDTT1onNtydf1 Vlwc1Wpy6qFSiCh5aSxK5Fk4FQc/RGv6mr8v8dEiduA67RGf8FM1Qw8ZgKPBL4kPWnCmHkqhP+KAV qIWqftJswGG4HcbR4scZMvtEYBXoeFvPw2Mrp00vjWgnSucSDqiujwb0jQ+7aecNVrMl2EG9nCp/9 JgMyeXbg==; Message-ID: <315885e0eb060a1b946aad729195e38e0e0681c8.camel@infradead.org> Subject: Re: [PATCH v3 26/41] x86/kvmclock: WARN if wall clock is read while kvmclock is suspended From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:19:54 +0100 In-Reply-To: <20260515191942.1892718-27-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-27-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-Z/YBhRco24UWCS5fKwHY" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-ef75cf/1779319206-2015DC48-C9A93793/0/0 X-purgate-type: clean X-purgate-size: 8044 --=-Z/YBhRco24UWCS5fKwHY Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > WARN if kvmclock is still suspended when its wallclock is read, i.e. when > the kernel reads its persistent clock.=C2=A0 The wallclock subtly depends= on > the BSP's kvmclock being enabled, and returns garbage if kvmclock is > disabled. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse Although I still hate the whole KVM wallclock thing, as the kvmclock itself is monotonic_raw, so adding that to the wallclock epoch is kind of wrong. Maybe the host should updated the wallclock occasionally to keep it up to date... Or maybe the guest should prefer the KVM_HC_CLOCK_PAIRING hypercall if it exists, over kvm-wallclock. --=-Z/YBhRco24UWCS5fKwHY Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPqLR-0003Gk-8C for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:28:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPqLQ-00ER7h-KB for xen-devel@lists.xenproject.org; Thu, 21 May 2026 01:28:56 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e43af-5cb7-0a2a0a5109dd-0a2a4509d0ca-4 for ; Thu, 21 May 2026 01:28:56 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e437c-2497-0a2a45090019-5a9b3222cb42-3 for ; Thu, 21 May 2026 01:27:56 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPqKI-00000007k6c-2Lp0; Wed, 20 May 2026 23:27:46 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=0UzuSR0lFFJs1N60oRVgd42d8TN/MZ03m79/Hebs0z8=; b=VuBJdjEN0/uT7sj94JtlpAkBp9 LDdR/TyFbfJKsiSumGNgT740rb91vcwWSgmRTSR6CMc65vxif6nf/7K/BEPlbtJ/mBcP/kyVwe31w psHRWYEdc+o3ePDDb7V7xqxOkMLJW0iy4bREcDCdBtlGV+MCOYotcag5SLX6iXZ403/d8/RkHXIKt 5giThODgbhwwZz+ofkLsuniqBuyHX8Rn9+Hbs1/iYEiV/AC2MtcDgiHdVEgx9pQFQ3uIOLh7Ol32m KOeLiGbhvxvVZdnYnFGzgzHH1duez5FrKcjMDRmfVsR8NJ1MiT6W+/q9R9x8nm4nxvgNBVHMQEYYP 0rSE7VqQ==; Message-ID: <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> Subject: Re: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:27:44 +0100 In-Reply-To: <20260515191942.1892718-28-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-28-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-QWJZ7uXErmxFQ92K7UlO" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-bad1c0/1779319676-41165A53-7F90EBC1/13/0 X-purgate-type: clean X-purgate-size: 8752 --=-QWJZ7uXErmxFQ92K7UlO Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > In anticipation of making x86_cpuinit.early_percpu_clock_init(), i.e. > kvm_setup_secondary_clock(), a dedicated sched_clock hook that will be > invoked if and only if kvmclock is set as sched_clock, ensure APs enable > their kvmclock during CPU online.=C2=A0 While a redundant write to the MS= R is > technically ok, skip the registration when kvmclock is sched_clock so tha= t > it's somewhat obvious that kvmclock *needs* to be enabled during early > bringup when it's being used as sched_clock. >=20 > Plumb in the BSP's resume path purely for documentation purposes.=C2=A0 B= oth > KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, and it's > not super obvious that using KVM's hooks would be flawed.=C2=A0 E.g. it w= ould > work today, because KVM's hooks happen to run after/before timekeeping's > hooks during suspend/resume, but that's sheer dumb luck as the order in > which syscore_ops are invoked depends entirely on when a subsystem is > initialized and thus registers its hooks. >=20 > Opportunsitically make the registration messages more precise to help > debug issues where kvmclock is enabled too late. That's a hard word to type, isn't it? > Opportunstically WARN in kvmclock_{suspend,resume}() to harden against > future bugs. So is that :) > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-QWJZ7uXErmxFQ92K7UlO Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=2aXfXH+xlKwlpiYz6wi553vns4JvXlac96+D4Y0thXo=; b=Oi/AanrVwEcuU6g8apCe7XCOh5 nA2ayqrirCvIQe6C/yCRxAQBw0R8K2uTTOliPv4ljhvi2s02d7iNYVeyXuANWvyZmq90TToks+8Lv +9ko8KUBaD3C97AcoLO/8F+NV74ok/0cww1UL26pVehj/SULxI3NCj+M/+UqjChmyW7jg6vJuUA8H IaYXrgWFddYQKFnwa/XazdegbrnrMSoEUhD2DQ5kwlNUt+gMnM539VzW5Pn92b+hv2EuTs094njl5 OSIFuvzX6p4GZPiwgl60PbcWTj5Zqck7QLhM/3agEtCOuKpZn47Ip8PnsYtEP1Eup5X4Aw3v3JJX/ mxR97CLQ==; Message-ID: <6a07dae92cefa8e284ee316acd1134732c3259fe.camel@infradead.org> Subject: Re: [PATCH v3 28/41] x86/paravirt: Mark __paravirt_set_sched_clock() as __init From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:42:55 +0100 In-Reply-To: <20260515191942.1892718-29-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-29-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-YzWEput9aBYtUvw2DqpS" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1779320586-B5B6CDB1-B1E91096/0/0 X-purgate-type: clean X-purgate-size: 7765 --=-YzWEput9aBYtUvw2DqpS Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Annotate __paravirt_set_sched_clock() as __init, and make its wrapper > __always_inline to ensure sanitizers don't result in a non-inline version > hanging around.=C2=A0 All callers run during __init, and changing sched_c= lock > after boot would be all kinds of crazy. >=20 > No functional change intended. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-YzWEput9aBYtUvw2DqpS Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw 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header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=X0zCw9VggqDwYjpyrxBUVYwfytHsLKivEOlU4sByJ9Y=; b=h+XaFM8LtWyTBwkkm146kzpDiU 1WqJWfaHfkn9U0mCSnCi2lUtr2wv3X+MNS5sFKYGHvH3nVkPO9OJJESVl+aTCFDebY6bnnJ8mEzq8 MvfRx9Qa2QDidPBjSWpqG8QUNwFF3Zh8W5xVTIdqpDivSWZk/PaPjCLf4kC+EK1D8qSGwfETNF++E VkPsHBFXoaD0uraLCxA/UKvVxnAt74nYLgcR25Q1IM3i6hE4rihu3olRuEniFiM92XFFGFp7PQ4UY 5/YaP8JuMk3fZDfHZcAdAtZcIyEOLb1PGv3JV9f8k4JC7fW97sAiiTzjl+aCFdFNbdgQfkzNRwbPb YmWXFTlw==; Message-ID: <13d79ba1e0450068c9573ccd8deb3ec007aea8d6.camel@infradead.org> Subject: Re: [PATCH v3 29/41] x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:44:18 +0100 In-Reply-To: <20260515191942.1892718-30-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-30-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-tHXnnzm+pwpZbACXpNw8" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779320667-F5585CF5-21972904/0/0 X-purgate-type: clean X-purgate-size: 8016 --=-tHXnnzm+pwpZbACXpNw8 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Add a return code to __paravirt_set_sched_clock() so that the kernel can > reject attempts to use a PV sched_clock without breaking the caller.=C2= =A0 E.g. > when running as a CoCo VM with a secure TSC, using a PV clock is generall= y > undesirable. >=20 > Note, kvmclock is the only PV clock that does anything "extra" beyond > simply registering itself as sched_clock, i.e. is the only caller that > needs to check the new return value. >=20 > Signed-off-by: Sean Christopherson Oooh... can we use this to reject the kvmclock when we have a stable and reliable TSC even for non-CoCo guests? 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List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=CDIT4LHc/dZLVw4Pq3pXJSefk+zNidZiNfxkf50m7JQ=; b=KGuP+tGaNAD6aNbiaygC6YoxXR QlzegaOK9ix16FZePm7GRz0VG746bKaw14zTeNO1nwOMuJlkrKFNEKsi294S4KrSGUTUIXtd4aTFk RMTi5+xDgy9U+JRq6TwtDlwEhPve64oUIlR4FXsXOrO7lGM8z4MnU+UJsoZSJrwVDQgeQ+rrEuMaC 50l0uJhzmT/zKAt8U4uXCqbEp2G9h3EM8NtFFi8Q/2m7Uzk2GrOIAdxaMNZeHhto86LTwPPpWITI5 I9754fdkHFA+VhbBMlmZRu2Fdkm7ESX9B9Dq43z1xwtmNyPobNkDZXPtfnv26ThQuusQSnTiIaceU XDfftm5A==; Message-ID: <5eb99994b054700d9924f529448730a7dfabe9ce.camel@infradead.org> Subject: Re: [PATCH v3 30/41] x86/paravirt: Don't use a PV sched_clock in CoCo guests with trusted TSC From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:45:48 +0100 In-Reply-To: <20260515191942.1892718-31-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-31-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-wo/wRt0Fuqirl5QEKL9D" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779320758-E0567CF5-692D74B8/0/0 X-purgate-type: clean X-purgate-size: 8914 --=-wo/wRt0Fuqirl5QEKL9D Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Silently ignore attempts to switch to a paravirt sched_clock when running > as a CoCo guest with trusted TSC.=C2=A0 In hand-wavy theory, a misbehavin= g > hypervisor could attack the guest by manipulating the PV clock to affect > guest scheduling in some weird and/or predictable way.=C2=A0 More importa= ntly, > reading TSC on such platforms is faster than any PV clock, and sched_cloc= k > is all about speed. >=20 > Signed-off-by: Sean Christopherson And kvmclock. And Xen. Are there *any* reasons we'd use a PV sched_clock when the TSC is usable? Reviewed-by: David Woodhouse > --- > =C2=A0arch/x86/kernel/tsc.c | 9 +++++++++ > =C2=A01 file changed, 9 insertions(+) >=20 > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > index 3c15fc10e501..ac4abfec1f05 100644 > --- a/arch/x86/kernel/tsc.c > +++ b/arch/x86/kernel/tsc.c > @@ -283,6 +283,15 @@ bool using_native_sched_clock(void) > =C2=A0int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stabl= e, > =C2=A0 =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 void (*save)(void), void (*resto= re)(void)) > =C2=A0{ > + /* > + * Don't replace TSC with a PV clock when running as a CoCo guest and > + * the TSC is secure/trusted; PV clocks are emulated by the hypervisor, > + * which isn't in the guest's TCB. > + */ > + if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC) || > + =C2=A0=C2=A0=C2=A0 boot_cpu_has(X86_FEATURE_TDX_GUEST)) > + return -EPERM; > + > =C2=A0 if (!stable) > =C2=A0 clear_sched_clock_stable(); > =C2=A0 --=-wo/wRt0Fuqirl5QEKL9D Content-Type: application/pkcs7-signature; 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List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=amazoncorp2 header.d=amazon.co.uk header.i="@amazon.co.uk" header.h="From:To:CC:Subject:Date:Message-ID:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazoncorp2; t=1779320980; x=1810856980; h=from:to:cc:subject:date:message-id:references: in-reply-to; bh=GVMRe+ZWyjYKyN9+/MXWrCIwmzJM84tATrdPquCFMQ8=; b=BxJ1rWv1UaadebwiOBdeWH8E/L21GRthAr8mU+XExEvadMHm5yJY2t+E qiBQk6zMWVkd3Tz4I40wFTMrMVCw0HN+OIGv0vzt+DDVQ2Z8x/pPfvHPq r3BpFKgf8xXk5jqxD1LxO9PHVp2AjwKS7D84OCX4R8AOE57xGpcPIHMDQ Owlow89w2dTRO9CVe+4NLWk1Igjox9Es5YClOpr8kdTs6z9edBbgkIP4Z qmDVSBrNk7s1YrYsV8VubLgWrlROtHnqbhf8nvX1PvpPbtuOWWWbPLogk IK7i7CsDDxsyXoiBlJBeJdrv6qaFGHfBHMxiMBVBz21S1alAQWN46TfX2 Q==; X-CSE-ConnectionGUID: GXgbGhW1R9enc/jlf030PQ== X-CSE-MsgGUID: xSNlsUe2S02Kx07Dkpr5hw== X-Amazon-filename: smime.p7s X-IronPort-AV: E=Sophos;i="6.23,245,1770595200"; d="p7s'346?scan'346,208,346";a="19053434" Content-Type: multipart/mixed; boundary="===============5088877677545521253==" MIME-Version: 1.0 X-Farcaster-Flow-ID: a8cb2f5c-3fed-4345-bd67-83b9868c096f From: "Woodhouse, David" To: "tglx@kernel.org" , "longli@microsoft.com" , "luto@kernel.org" , "alexey.makhalov@broadcom.com" , "jstultz@google.com" , "dave.hansen@linux.intel.com" , "ajay.kaher@broadcom.com" , "jan.kiszka@siemens.com" , "haiyangz@microsoft.com" , "kas@kernel.org" , "seanjc@google.com" , "pbonzini@redhat.com" , "kys@microsoft.com" , "decui@microsoft.com" , "daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" CC: "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Subject: Re: [PATCH v3 31/41] x86/tsc: Pass KNOWN_FREQ and RELIABLE as params to registration Thread-Topic: [PATCH v3 31/41] x86/tsc: Pass KNOWN_FREQ and RELIABLE as params to registration Thread-Index: AQHc6LNQ1Kwwb6vjAEO0wWcwOC4yeg== Date: Wed, 20 May 2026 23:49:35 +0000 Message-ID: <8c5590606b5068ca9ea32e054507f89e2b027c96.camel@amazon.co.uk> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-32-seanjc@google.com> In-Reply-To: <20260515191942.1892718-32-seanjc@google.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.106.83.30] MIME-Version: 1.0 X-purgate-ID: tlsNG-4011c0/1779320980-6F95E8B7-BAEA34AE/21/137 X-purgate-type: clean X-purgate-size: 11091 --===============5088877677545521253== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/pkcs7-signature"; boundary="=-H30ohBc/pVgvJN2jnnL7" --=-H30ohBc/pVgvJN2jnnL7 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Add a "tsc_properties" set of flags and use it to annotate whether the > TSC operates at a known and/or reliable frequency when registering a > paravirtual TSC calibration routine.=C2=A0 Currently, each PV flow manual= ly > sets the associated feature flags, but often in haphazard fashion that > makes it difficult for unfamiliar readers to see the properties of the > TSC when running under a particular hypervisor. >=20 > The other, bigger issue with manually setting the feature flags is that > it decouples the flags from the calibration routine.=C2=A0 E.g. in theory= , PV > code could mark the TSC as having a known frequency, but then have its > PV calibration discarded in favor of a method that doesn't use that known > frequency.=C2=A0 Passing the TSC properties along with the calibration ro= utine > will allow adding sanity checks to guard against replacing a "better" > calibration routine with a "worse" routine. >=20 > As a bonus, the flags also give developers working on new PV code a heads > up that they should at least mark the TSC as having a known frequency. >=20 > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-H30ohBc/pVgvJN2jnnL7 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCEkYw ggYQMIID+KADAgECAhBNlCwQ1DvglAnFgS06KwZPMA0GCSqGSIb3DQEBDAUAMIGIMQswCQYDVQQG EwJVUzETMBEGA1UECBMKTmV3IEplcnNleTEUMBIGA1UEBxMLSmVyc2V5IENpdHkxHjAcBgNVBAoT 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--===============1156574990222015927==-- --===============5088877677545521253==-- From xen-devel-bounces@lists.xenproject.org Wed May 20 23:50:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 23:50:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314681.1584673 (Exim 4.92) (envelope-from ) id 1wPqgb-0000sv-7E; Wed, 20 May 2026 23:50:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314681.1584673; Wed, 20 May 2026 23:50:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPqgb-0000so-4M; Wed, 20 May 2026 23:50:49 +0000 Received: by outflank-mailman (input) for mailman id 1314681; Wed, 20 May 2026 23:50:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPqga-0000si-Kf for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:50:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPqga-00Bixg-0a for xen-devel@lists.xenproject.org; Thu, 21 May 2026 01:50:48 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e48b1-5cb7-0a2a0a5109dd-0a2a4502e7fc-28 for ; Thu, 21 May 2026 01:50:47 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e48d7-af86-0a2a45020019-5a9b3222933c-3 for ; Thu, 21 May 2026 01:50:47 +0200 Received: from 54-240-197-227.amazon.com ([54.240.197.227] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPqgS-00000007lNX-069X; Wed, 20 May 2026 23:50:40 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=kjXkTST37i+1gmjQGjhQW588QxcAxvvLMWHi+QpQkZo=; b=a5PC97TD9BKkPl+3e0F6kGlkZ9 zCbTS/Oo+FoXd4urkvEM1VR8kscN/rFTBlB5Z0VoUPn/tgTVyzLP3mx8Kqx/lgHAjvRXZ5fGmkApq jHycwdxF4CqRMaL9mzfuhEvvxFdjD2nnfR9DrD7M3cNRzkUyVcKrDzywFPGi/JDGD933yYoqOAdBU deLaoIWGnTDPJb9+jlSQbH9XgV4bfbQ4hfKlIgngYj5XFzOZEjja6vzFMmUl0jpACj4GQlvZ4GMG+ pNTKyQDM8Bxl7QRUXdZGXFvtIno1U6YAorOg7bqfzc1CJA4JWbFiBWIRS9XHfXE8x4tA/8O/7XQa+ 2P8z9lXA==; Message-ID: <1e46bbafd280fa70137e530e6694e969f305ab11.camel@infradead.org> Subject: Re: [PATCH v3 32/41] x86/tsc: Rejects attempts to override TSC calibration with lesser routine From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:50:38 +0100 In-Reply-To: <20260515191942.1892718-33-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-33-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-a1hInw8KTqMYkOpxFKcW" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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discarded in favor of a less > trusted source (hypervisor). >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-a1hInw8KTqMYkOpxFKcW Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=qR+Yt9w79nLl/vKvoVluqJPTCmCSxA09aP7VAr8rnyY=; b=GSaT4OmU8kCyicP8KRwwNSqhBH HnEbIU6ancVWsUENun739xiy5/VgMvV8SNDhb07i09YdgCXfHtdTdk9SIahJGQvI8Hsg61a2AC2yc 8hUqMq8vnthSEqscSfZM4DWl/E7EGILkh8xa4N9TNag/3+ZwpyWB4DAMkwDEgQuLUr1S+wAeZ/K8S zP7n+NVHOTr20imXsHeiPHoe0Ku2i5XPw7mDFikvIpxEfPI2juH468hLtYmMpaO4TLIe9EULc7fJD dLWZdeafhT+iHYXU/yYaPJHM8XIabCVBx3yYRUPzqxD5smwws5FMXPwmdPmonOf9vEWEMvDrzxopq f+Uw3GNw==; Message-ID: <97e3657ea14fca4b1fffd8c845b71b7a2f71785b.camel@infradead.org> Subject: Re: [PATCH v3 33/41] x86/kvmclock: Mark TSC as reliable when it's constant and nonstop From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:51:45 +0100 In-Reply-To: <20260515191942.1892718-34-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-34-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-edWqDmeYeCUKdM6/JTWj" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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clock incurs a roundtrip > cost of thousands of cycles. >=20 > Marking the TSC reliable addresses a flaw where the TSC will occasionally > be marked unstable if the host is under moderate/heavy load. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-edWqDmeYeCUKdM6/JTWj Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et 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([fe80::19d6:e954:f18:6292]) by EX19D001UEB002.ant.amazon.com ([fe80::19d6:e954:f18:6292%3]) with mapi id 15.02.2562.037; Wed, 20 May 2026 23:55:17 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=amazoncorp2 header.d=amazon.co.uk header.i="@amazon.co.uk" header.h="From:To:CC:Subject:Date:Message-ID:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.co.uk; i=@amazon.co.uk; q=dns/txt; s=amazoncorp2; t=1779321320; x=1810857320; h=from:to:cc:subject:date:message-id:references: in-reply-to; bh=QOtwzUr7+lfwKaRNJ9pATQCvVFEuRpbNIx1tUU9BEl0=; b=r6Ir7/a/jFtyiS8rjH9F3tQZ8/KGkAWADN3rJ+MD21fvJw+QR/iJSU9p 4YZtfaj+xA/eiVSnHLBmUrzbQ9q7ttWNaqC8eKlq30m70vLOsDzczIe84 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"daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" CC: "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Subject: Re: [PATCH v3 36/41] x86/kvmclock: Get local APIC bus frequency from PV CPUID Timing Info Thread-Topic: [PATCH v3 36/41] x86/kvmclock: Get local APIC bus frequency from PV CPUID Timing Info Thread-Index: AQHc6LQcnp8Xs/NajUaP0pKiNdfTxw== Date: Wed, 20 May 2026 23:55:17 +0000 Message-ID: <7489ff3cc1ff402bf0ade38272fc52dcbcc75fc1.camel@amazon.co.uk> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-37-seanjc@google.com> In-Reply-To: <20260515191942.1892718-37-seanjc@google.com> Accept-Language: en-GB, en-US X-MS-Has-Attach: yes X-MS-TNEF-Correlator: x-originating-ip: [10.106.83.30] MIME-Version: 1.0 X-purgate-ID: tlsNG-42698a/1779321320-13D7FF3B-A1872DFC/21/137 X-purgate-type: clean X-purgate-size: 10352 --===============2713424259984533892== Content-Language: en-US Content-Type: multipart/signed; micalg=sha-256; protocol="application/pkcs7-signature"; boundary="=-NifHmF9Py2QHfKflgV2k" --=-NifHmF9Py2QHfKflgV2k Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > When running as a KVM guest with kvmclock support enabled, stuff the APIC > timer period/frequency with the local APIC bus frequency reported in > CPUID.0x40000010.EBX instead of trying to calibrate/guess the frequency. >=20 > See Documentation/virt/kvm/x86/cpuid.rst for details. >=20 > Signed-off-by: Sean Christopherson I still don't much like the way this is done inside kvm_get_tsc_khz(). We also probably ought to be looking for the timing leaf on other hypervisors including VMware and probably Bhyve too. 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--===============7964458139859909908==-- --===============2713424259984533892==-- From xen-devel-bounces@lists.xenproject.org Wed May 20 23:58:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 20 May 2026 23:58:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314703.1584701 (Exim 4.92) (envelope-from ) id 1wPqnX-0002gY-Du; Wed, 20 May 2026 23:57:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314703.1584701; Wed, 20 May 2026 23:57:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPqnX-0002gR-Ax; Wed, 20 May 2026 23:57:59 +0000 Received: by outflank-mailman (input) for mailman id 1314703; Wed, 20 May 2026 23:57:57 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPqnV-0002gL-JZ for xen-devel@lists.xenproject.org; Wed, 20 May 2026 23:57:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPqnV-0007NP-0R for xen-devel@lists.xenproject.org; Thu, 21 May 2026 01:57:57 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0e496c-2eae-0a2a0a5409dd-0a2a450ce1ac-18 for ; Thu, 21 May 2026 01:57:56 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0e4a48-62f1-0a2a450c0019-5a9b3222e6a6-3 for ; Thu, 21 May 2026 01:56:56 +0200 Received: from 54-240-197-235.amazon.com ([54.240.197.235] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wPqmO-00000007lg2-1peW; Wed, 20 May 2026 23:56:48 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=jTiku2mluObpXzBa1NiYoGfbUZnqEbOOqXCo232N2ic=; b=OmqFRRZQxWH9gzIjOn8pJhyobz C/mp6rFHZg1NTyyb93fxGkowyb/YRrFZpHytaXexnnLEveykpofuINlf4eX5iNcrxif81LIQ/Ytl6 fSQI40Xtuxn0JO9omehm7eJkFr4rPrezzqu+ZupbtcgD8FEsmxD5ui4dK84+jabLaD6vKUfa1Mlrh P+X8Xc1jWuK9mAT5dnoungd3495qh8Y/++RA5MYy7/g//9h3PDg2Pxm5RjR97sdBmIQCnFuNizGs8 KvUCOyXar9Ui6dq+fLstukIZuFA0BiRM//wvGhJxNz3sTH+uXPnNX/m6uqXkPP1phSwk796LOWE8r 09QEtjJQ==; Message-ID: <715e3b725b87e96d9733c5565cb00f97b03e6485.camel@infradead.org> Subject: Re: [PATCH v3 37/41] x86/kvmclock: Use TSC for sched_clock if it's constant and non-stop From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:56:46 +0100 In-Reply-To: <20260515191942.1892718-38-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-38-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-kKUdfWK5Ck2wirAYsNEp" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779321416-DB370CF5-6588B9CB/13/0 X-purgate-type: clean X-purgate-size: 9304 --=-kKUdfWK5Ck2wirAYsNEp Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Prefer the TSC over kvmclock for sched_clock if the TSC is constant, > nonstop, and not marked unstable via command line.=C2=A0 I.e. use the sam= e > criteria as tweaking the clocksource rating so that TSC is preferred over > kvmclock.=C2=A0 Per the below comment from native_sched_clock(), sched_cl= ock > is more tolerant of slop than clocksource; using TSC for clocksource but > not sched_clock makes little to no sense, especially now that KVM CoCo > guests with a trusted TSC use TSC, not kvmclock. >=20 > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * Fall back to jiffies i= f there's no TSC available: > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * ( But note that we sti= ll use it if the TSC is marked > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 *=C2=A0=C2=A0 unstable. = We do this because unlike Time Of Day, > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 *=C2=A0=C2=A0 the schedu= ler clock tolerates small errors and it's > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 *=C2=A0=C2=A0 very impor= tant for it to be as fast as the platform > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 *=C2=A0=C2=A0 can achiev= e it. ) > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */ >=20 > The only advantage of using kvmclock is that doing so allows for early > and common detection of PVCLOCK_GUEST_STOPPED, but that code has been > broken for over two years with nary a complaint, i.e. it can't be > _that_ valuable.=C2=A0 And as above, certain types of KVM guests are losi= ng > the functionality regardless, i.e. acknowledging PVCLOCK_GUEST_STOPPED > needs to be decoupled from sched_clock() no matter what. >=20 > Link: https://lore.kernel.org/all/Z4hDK27OV7wK572A@google.com > Signed-off-by: Sean Christopherson Yay! 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xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=4fumDqpfFh7qTUUSt85YEOGP4Jz6d/tV2ufryLf11Sw=; b=SbcgRP/WC+khq2voSt24X8TsZc LgTJct21PsM/eYu33L8Rw4dCttnJxdFtOJIbT++GI/8Evz9oMMnyOIaVXE1ocnST7p2R+rYlJspqZ FwI3NYgR/E9nczxvpWj+94v2Hp1noG4+kMkpkjSyq+ZtJq+vocxDLip7r6bEburTLmXjS7M3s8A1J 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 00:59:34 +0100 In-Reply-To: <20260515191942.1892718-39-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-39-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-2k1D7VS0lDh/MqkdLHDz" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1779321584-8316D161-728003A8/0/0 X-purgate-type: clean X-purgate-size: 7979 --=-2k1D7VS0lDh/MqkdLHDz Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > Rework the seemingly generic x86_cpuinit_ops.early_percpu_clock_init hook > into a dedicated PV sched_clock hook, as the only reason the hook exists > is to allow kvmclock to enable its PV clock on secondary CPUs before the > kernel tries to reference sched_clock, e.g. when grabbing a timestamp for > printk. >=20 > Rearranging the hook doesn't exactly reduce complexity; arguably it does > the opposite.=C2=A0 But as-is, it's practically impossible to understand = *why* > kvmclock needs to do early configuration. >=20 > Signed-off-by: Sean Christopherson Reviewed-by: David Woodhouse --=-2k1D7VS0lDh/MqkdLHDz Content-Type: application/pkcs7-signature; name="smime.p7s" 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xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=NcLTLf1gFZKiWmIuS7GLhIukpMn7F7oeQMFwKhor2Fo=; b=I274JKVRB2I/bX5KQZ/FAu7eqx FLGKxaMejPeMzVDE/qSz0O7KMiR1POozKjF06k6O/jqCb8/SY49SKTXEUCLDshZD3ClU+TqRrBDRc o+FrB7CtLXMyq949MVy7aHfg5/JfjRnZ19Bi4HB2kIKXZmOOMxCvrKsk0ovH4iD7YEgUcdhmRJobi FzpG9v9OZNFvun6V54L7lv0mWd23T1lJwkQljap41WA/klem5AAOa+6WKisZrZ9+pOLoAxqHuS4fP uNshhLpKWfre8yGZo6sKOTlwgbxu5EY/EDqKythb1g7ttYh5ZVSJplq/x9PBZ9z1VDWr1WywKyxc1 zipb6mVg==; Message-ID: Subject: Re: [PATCH v3 39/41] x86/paravirt: Move using_native_sched_clock() stub into timer.h From: David Woodhouse To: Sean Christopherson , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz Cc: Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 01:00:34 +0100 In-Reply-To: <20260515191942.1892718-40-seanjc@google.com> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-40-seanjc@google.com> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-BsKJxp2uQuWPK9KQHUFW" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. 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engine=8.22.0-2605130000 definitions=main-2605210012 X-purgate-ID: tlsNG-bad1c0/1779327152-37374A53-5231C720/0/0 X-purgate-type: clean X-purgate-size: 2198 On Wed, May 20, 2026 at 12:00:07PM +0200, Teddy Astie wrote: > Le 20/05/2026 04:43, dmukhin@ford.com a crit: > > On Mon, May 18, 2026 at 05:21:25PM +0200, Teddy Astie wrote: > > > In many places, we're parsing a PCI string into individual parts > > > (seg, bus, dev, fn) and then transform it into a pci_sbdf_t using PCI_SBDF > > > macro. Rather than converting from parts to pci_sbdf_t and vice versa, > > > introduce a new function that parses a PCI string into a pci_sbdf_t structure > > > directly. > > > > > > Signed-off-by: Teddy Astie > > > --- > > > xen/drivers/pci/pci.c | 18 ++++++++++++++++++ > > > xen/include/xen/pci.h | 3 +++ > > > 2 files changed, 21 insertions(+) > > > > > > diff --git a/xen/drivers/pci/pci.c b/xen/drivers/pci/pci.c > > > index 084be3880c..1d06cb035b 100644 > > > --- a/xen/drivers/pci/pci.c > > > +++ b/xen/drivers/pci/pci.c > > > @@ -202,3 +202,21 @@ const char *__init parse_pci_seg(const char *s, unsigned int *seg_p, > > > return s; > > > } > > > + > > > +const char *parse_pci_sbdf(const char *s, pci_sbdf_t *sbdf) > > > +{ > > > + unsigned int seg, bus, dev, func; > > > + const char *out = parse_pci(s, &seg, &bus, &dev, &func); > > > > IMO, both parse_pci() and parse_pci_seg() should be merged into > > parse_pci_sbdf() and parse_pci_sbdf_seg() at the end of the series, > > since there will be no remaining consumers of the old APIs. > > > > What do you think? > > > > That was my plan, but parse_phantom_dev() (in xen/drivers/passthrough/pci.c) > wants to parse the PCI string without the function part (i.e XXXX:YY:ZZ) > which can't be expressed with a full SBDF parse function. I see. Perhaps adding "SBD" parsing in-place in parse_phantom_dev() is OK? Like duplicate a small amount of code but drop old APIs. > > It currently works by passing NULL to `func_p`, which has special handling > in parse_pci. > > We could eventually allow omitting PCI function and make default it to zero, > so that we will be able migrate parse_phantom_dev to this new function (so > it now allows parsing full SBDF, but ignore the function part of it). > From xen-devel-bounces@lists.xenproject.org Thu May 21 06:09:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 06:09:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314795.1584760 (Exim 4.92) (envelope-from ) id 1wPwaQ-0002L4-Ph; Thu, 21 May 2026 06:08:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314795.1584760; Thu, 21 May 2026 06:08:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwaQ-0002Kx-Mu; Thu, 21 May 2026 06:08:50 +0000 Received: by outflank-mailman (input) for mailman id 1314795; Thu, 21 May 2026 06:08:49 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwaP-0002Kr-0m for xen-devel@lists.xenproject.org; Thu, 21 May 2026 06:08:49 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPwaN-000v1c-BV for xen-devel@lists.xenproject.org; Thu, 21 May 2026 08:08:47 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ea16a-e002-0a2a0a5209dd-0a2a45068d88-16 for ; Thu, 21 May 2026 08:08:47 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ea16e-7371-0a2a45060019-d155802db9da-3 for ; Thu, 21 May 2026 08:08:46 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-48ff4f8ef0dso62328415e9.3 for ; Wed, 20 May 2026 23:08:46 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Wed, 20 May 2026 23:08:46 -0700 (PDT) Message-ID: Date: Thu, 21 May 2026 08:08:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] Arm: do a 4th linking pass if necessary To: Anthony PERARD Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk References: <7b23e011-56b8-4f6c-bd55-83e1d9b0453f@suse.com> <1779293000.8631fc262581453bbf619ec5b2062170.19e46209296000f373@vates.tech> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1779293000.8631fc262581453bbf619ec5b2062170.19e46209296000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779343727-8EF89D75-07A65ED5/0/0 X-purgate-type: clean X-purgate-size: 2893 On 20.05.2026 18:03, Anthony PERARD wrote: > On Wed, May 20, 2026 at 01:53:34PM +0200, Jan Beulich wrote: >> Once we generalize linking, we may want to introduce an equivalent of >> Linux'es KALLSYMS_EXTRA_PASS as well. I don't think doing this right here >> would make overly much sense, though. > > If you generalise linking, you are going to put it in a shell script, > right? Because this recipe is getting very complicated, for within a > makefile. Well. Prior to this change I was definitely hoping to spit the big rule up into small ones. Whether that's still feasible with an optional path I'll have to see; I very much would prefer if I could keep everything in make logic. >> --- a/xen/arch/arm/Makefile >> +++ b/xen/arch/arm/Makefile >> @@ -99,9 +99,20 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o >> | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> > $(dot-target).2.S >> $(MAKE) $(build)=$(@D) $(dot-target).2.o >> - $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) >> + if ! { $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) >/dev/null; }; \ > > This `>/dev/null` seems to only suppress the output of the `diff` of the > macro, is it what is intended? Yes. All errors and alike should appear normally. >> + then \ >> + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ >> + $(dot-target).2.o -o $(dot-target).2; \ >> + $(NM) -pa --format=sysv $(dot-target).2 \ >> + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ >> + > $(dot-target).3.S; \ >> + $(MAKE) $(build)=$(@D) $(dot-target).3.o; \ > > This new block ignore all errors, from LD, NM and MAKE. We want > a `set -e` before the if. Hmm, perhaps I should add that, yes, albeit ... >> + $(call compare-symbol-tables, $(dot-target).2.o, $(dot-target).3.o); \ > > At least, an error returned by `diff` in that macro should be taken into > account, for now. ... I expect this would fail if there was an earlier error. >> --- a/xen/scripts/Kbuild.include >> +++ b/xen/scripts/Kbuild.include >> @@ -65,7 +65,7 @@ define compare-symbol-tables >> $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ >> ln -f $(2) $(@D)/.cst.$$$$; \ >> $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ >> - rm -f $(@D)/.cst.$$$$ >> + rm -f $(@D)/.cst.$$$$; \ >> diff -u $(1).sym $(2).sym > > This macro is missing `set -e`, if both OBJDUMP command fails and create > an empty file, `diff` will return success. Whether to have "set -e" here is an independent question, I guess. To avoid the case you mention, maybe better $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym || rm -f $(1).sym; \ ? > But looks like `set -e` in > this macro isn't going to work in the condition of the `if`. Whereas the above would be compatible with both uses, I think. Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 06:24:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 06:24:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314802.1584769 (Exim 4.92) (envelope-from ) id 1wPwpP-0005BA-1W; Thu, 21 May 2026 06:24:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314802.1584769; Thu, 21 May 2026 06:24:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwpO-0005B3-V7; Thu, 21 May 2026 06:24:18 +0000 Received: by outflank-mailman (input) for mailman id 1314802; Thu, 21 May 2026 06:24:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwpM-0005Ax-UA for xen-devel@lists.xenproject.org; Thu, 21 May 2026 06:24:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPwpM-0092ij-6N for xen-devel@lists.xenproject.org; Thu, 21 May 2026 08:24:16 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ea505-bab6-0a2a0a5309dd-0a2a450ce274-16 for ; Thu, 21 May 2026 08:24:16 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ea50f-62f1-0a2a450c0019-d155dd33a4a9-3 for ; Thu, 21 May 2026 08:24:15 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d734223e4so3749855f8f.0 for ; Wed, 20 May 2026 23:24:15 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1779295699.8631fc262581453bbf619ec5b2062170.19e4649c100000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779344655-DBD7BCF5-DBD7904B/0/0 X-purgate-type: clean X-purgate-size: 2818 On 20.05.2026 18:48, Teddy Astie wrote: > Le 20/05/2026 à 18:34, Andrew Cooper a écrit : >> On 20/05/2026 4:51 pm, Teddy Astie wrote: >>> __{put,get}_guest returns -EFAULT on access faults which causes >>> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >>> incorrect. >>> >>> Fix the computation by relying on copy_{from,to}_guest_pv which >>> reports the number of remaining bytes instead of a negative errno, >>> such that we can compute the offset properly. >>> >>> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >>> Signed-off-by: Teddy Astie >>> --- >>> xen/arch/x86/pv/emul-gate-op.c | 5 +++-- >>> 1 file changed, 3 insertions(+), 2 deletions(-) >>> >>> diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c >>> index c2c699fbff..cacc171115 100644 >>> --- a/xen/arch/x86/pv/emul-gate-op.c >>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>> @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >>> int rc; >>> #define push(item) do \ >>> { \ >>> + unsigned int __value = item; \ >>> --stkp; \ >>> esp -= 4; \ >>> - rc = __put_guest(item, stkp); \ >>> + rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >> >> Oh, this probably violates MISRA, but you don't need to use a separate >> variable because sizeof() has no side effects. >> >> Given that the expression is now &item, I think it needs to be &(item). >> > > I tried something like that, but it looked a bit weird and clang wasn't > happy (at least in language server) because of the &(x + y). > > We also need to ensure that we're actually copying 32-bits scalars (and > not 16-bits or 64-bits ones) like the previous behavior. > > That diff seems to work though > > diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c > index cacc171115..b72a3058dd 100644 > --- a/xen/arch/x86/pv/emul-gate-op.c > +++ b/xen/arch/x86/pv/emul-gate-op.c > @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) > int rc; > #define push(item) do \ > { \ > - unsigned int __value = item; \ > --stkp; \ > esp -= 4; \ > - rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ > + rc = copy_to_guest_pv(stkp, &(uint32_t)(item), > sizeof(uint32_t)); \ But a cast expression isn't an lvalue, so & cannot be applied to it (much like it can't be applied to (x + y) as you mentioned above). Jan > if ( rc ) \ > { \ > pv_inject_page_fault(PFEC_write_access, \ > > >> Can also be fixed on commit. >> >> ~Andrew > > Teddy From xen-devel-bounces@lists.xenproject.org Thu May 21 06:33:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 06:33:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314814.1584780 (Exim 4.92) (envelope-from ) id 1wPwyS-00070z-0K; Thu, 21 May 2026 06:33:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314814.1584780; Thu, 21 May 2026 06:33:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwyR-00070s-SA; Thu, 21 May 2026 06:33:39 +0000 Received: by outflank-mailman (input) for mailman id 1314814; Thu, 21 May 2026 06:33:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPwyQ-00070m-US for xen-devel@lists.xenproject.org; Thu, 21 May 2026 06:33:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPwyQ-009rCy-AJ for xen-devel@lists.xenproject.org; Thu, 21 May 2026 08:33:38 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ea73a-5cb7-0a2a0a5109dd-0a2a4509d918-24 for ; Thu, 21 May 2026 08:33:38 +0200 Received: from [209.85.221.42] (helo=mail-wr1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ea741-2497-0a2a45090019-d155dd2ac98c-3 for ; Thu, 21 May 2026 08:33:37 +0200 Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-44c350a5b87so3487040f8f.3 for ; Wed, 20 May 2026 23:33:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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AFNElJ8QKap0so68MbXAA4zeyJflW52qb6NzoFW/ekL7hQSnK0cwHHMDCJLJDgYqzjMfKAvy3h2gx0APFek=@lists.xenproject.org X-Gm-Message-State: AOJu0YwKXWVj8ybanb+rLuy52sAmXHWwyC7Wst5CzIhGNftIDL1q81do vrgnvQNUg5zTz6asi6JoSQ4aTTIDYXs7o3Luvm4UWcUTIbp/Wc+ssFtpxubuP96WWA== X-Gm-Gg: Acq92OH8Rnj8kOWEchAPd5jffCU0LfZdoZ3ITZp79oyjM7cPTD83gFXJKIkX1OhTqzq hbb3VN0Ak9m97kjbSxQdrXJSG65sTpuKuiRU2sNU/GniBronwNXSjI/hVYm4vDdh9MJdesqhsd3 sMfqprM2n6LGEOfWm5lStiCdtel4hN/2ywpGG5mQ4M75BRrmeHa46NCNKctq6OH1EEO70AGpVnl 2nnLd0qbAbXNeT8jFvRCHLNUQywegvLIsal3ZZMeSNAXM45M6ZNpJ5i6KboP0S7QUyQQzWwUiBz MilY2c/xyu9DFs5DHi+Djrjw75bXGacPIaAKgLsufCgZRe4XxpcLinqTmYoXa8pOEIKeTU9v8IO Cnofq7llj0NF1yEfbXiL3q4tlsb4sOOJaOFnVuYqoLj84g2wXbdrX0UmTRkK0LZSp5usRbC9Cef 8Ab2D4qwHfPvXhfK3Vvzx9lSILk8OMy0jx3aawJq/DhThDBLHsvgsqy3JrVkH1JkxmEQ8hK6pfc ovSsPoeTjrx4DVfcBlF2htlJQ== X-Received: by 2002:a5d:5d12:0:b0:45e:8866:e58d with SMTP id ffacd0b85a97d-45ea3ae880cmr2167870f8f.11.1779345217333; Wed, 20 May 2026 23:33:37 -0700 (PDT) Message-ID: <09a27cbf-065a-44ad-8956-18f050202822@suse.com> Date: Thu, 21 May 2026 08:33:36 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate To: Andrew Cooper , Teddy Astie , xen-devel@lists.xenproject.org Cc: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> <1779295699.8631fc262581453bbf619ec5b2062170.19e4649c100000f373@vates.tech> <9a6f4d03-651b-449a-80d0-35077170c8c8@citrix.com> Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; 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charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779345217-8AB8EA53-0AED0936/0/0 X-purgate-type: clean X-purgate-size: 3400 On 20.05.2026 19:21, Andrew Cooper wrote: > On 20/05/2026 5:48 pm, Teddy Astie wrote: >> Le 20/05/2026 à 18:34, Andrew Cooper a écrit : >>> On 20/05/2026 4:51 pm, Teddy Astie wrote: >>>> __{put,get}_guest returns -EFAULT on access faults which causes >>>> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >>>> incorrect. >>>> >>>> Fix the computation by relying on copy_{from,to}_guest_pv which >>>> reports the number of remaining bytes instead of a negative errno, >>>> such that we can compute the offset properly. >>>> >>>> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >>>> Signed-off-by: Teddy Astie >>>> --- >>>>   xen/arch/x86/pv/emul-gate-op.c | 5 +++-- >>>>   1 file changed, 3 insertions(+), 2 deletions(-) >>>> >>>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>>> b/xen/arch/x86/pv/emul-gate-op.c >>>> index c2c699fbff..cacc171115 100644 >>>> --- a/xen/arch/x86/pv/emul-gate-op.c >>>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>>> @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs >>>> *regs) >>>>           int rc; >>>>   #define push(item) do \ >>>>           { \ >>>> +            unsigned int __value = item; \ >>>>               --stkp; \ >>>>               esp -= 4; \ >>>> -            rc = __put_guest(item, stkp); \ >>>> +            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>> >>> Oh, this probably violates MISRA, but you don't need to use a separate >>> variable because sizeof() has no side effects. >>> >>> Given that the expression is now &item, I think it needs to be &(item). >>> >> >> I tried something like that, but it looked a bit weird and clang >> wasn't happy (at least in language server) because of the &(x + y). >> >> We also need to ensure that we're actually copying 32-bits scalars >> (and not 16-bits or 64-bits ones) like the previous behavior. >> >> That diff seems to work though >> >> diff --git a/xen/arch/x86/pv/emul-gate-op.c >> b/xen/arch/x86/pv/emul-gate-op.c >> index cacc171115..b72a3058dd 100644 >> --- a/xen/arch/x86/pv/emul-gate-op.c >> +++ b/xen/arch/x86/pv/emul-gate-op.c >> @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >>          int rc; >>  #define push(item) do \ >>          { \ >> -            unsigned int __value = item; \ >>              --stkp; \ >>              esp -= 4; \ >> -            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >> +            rc = copy_to_guest_pv(stkp, &(uint32_t)(item), >> sizeof(uint32_t)); \ >>              if ( rc ) \ >>              { \ >>                  pv_inject_page_fault(PFEC_write_access, \  > > Oh, that's a second bug you're fixing then. > > Pushes of ss/cs need to be done with 4-byte writes and zero extended. And they are: Access size is derived from the pointer passed, not from the item. Jan > I've added: > > The use of a local variable in push() also fixes a second bug.  On all > but the earliest 32bit CPUs, segment selectors pushes are > zero-extended 32bit stores.  Xen was not doing this for %ss and %cs. > > to the commit message. > > ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 06:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 06:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314821.1584788 (Exim 4.92) (envelope-from ) id 1wPx9P-0000OK-03; Thu, 21 May 2026 06:44:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314821.1584788; Thu, 21 May 2026 06:44:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPx9O-0000OD-SX; Thu, 21 May 2026 06:44:58 +0000 Received: by outflank-mailman (input) for mailman id 1314821; Thu, 21 May 2026 06:44:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPx9N-0000O7-T2 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 06:44:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPx9M-009teX-Nf for xen-devel@lists.xenproject.org; Thu, 21 May 2026 08:44:56 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ea9d4-2eae-0a2a0a5409dd-0a2a450c945a-28 for ; Thu, 21 May 2026 08:44:56 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ea9e8-62f1-0a2a450c0019-d1558034e1c1-3 for ; Thu, 21 May 2026 08:44:56 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso55951755e9.3 for ; Wed, 20 May 2026 23:44:56 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <93cbe99f-a75b-4837-be6b-d6621d9f4d6d@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779345896-E397DCF5-26C85A25/0/0 X-purgate-type: clean X-purgate-size: 1042 On 20.05.2026 18:27, Andrew Cooper wrote: > On 20/05/2026 4:51 pm, Teddy Astie wrote: >> __{put,get}_guest returns -EFAULT on access faults which causes >> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >> incorrect. >> >> Fix the computation by relying on copy_{from,to}_guest_pv which >> reports the number of remaining bytes instead of a negative errno, >> such that we can compute the offset properly. >> >> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >> Signed-off-by: Teddy Astie > > Given it was __*_guest() before, I think we can use the > __copy_*_guest_pv() variants. > > I can fix on commit if you're happy?  Reviewed-by: Andrew Cooper > > > Jan, this wants committing ahead of your MISRA change, as it needs > backporting. It would be slightly easier in that order, but adjusting the backport wouldn't be overly difficult if the Misra change went in first. Yet that's still lacking an ack anyway. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <09a27cbf-065a-44ad-8956-18f050202822@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779346838-D9F76443-0E1F4CC8/13/0 X-purgate-type: clean X-purgate-size: 3761 On 21.05.2026 08:33, Jan Beulich wrote: > On 20.05.2026 19:21, Andrew Cooper wrote: >> On 20/05/2026 5:48 pm, Teddy Astie wrote: >>> Le 20/05/2026 à 18:34, Andrew Cooper a écrit : >>>> On 20/05/2026 4:51 pm, Teddy Astie wrote: >>>>> __{put,get}_guest returns -EFAULT on access faults which causes >>>>> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >>>>> incorrect. >>>>> >>>>> Fix the computation by relying on copy_{from,to}_guest_pv which >>>>> reports the number of remaining bytes instead of a negative errno, >>>>> such that we can compute the offset properly. >>>>> >>>>> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >>>>> Signed-off-by: Teddy Astie >>>>> --- >>>>>   xen/arch/x86/pv/emul-gate-op.c | 5 +++-- >>>>>   1 file changed, 3 insertions(+), 2 deletions(-) >>>>> >>>>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>>>> b/xen/arch/x86/pv/emul-gate-op.c >>>>> index c2c699fbff..cacc171115 100644 >>>>> --- a/xen/arch/x86/pv/emul-gate-op.c >>>>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>>>> @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs >>>>> *regs) >>>>>           int rc; >>>>>   #define push(item) do \ >>>>>           { \ >>>>> +            unsigned int __value = item; \ >>>>>               --stkp; \ >>>>>               esp -= 4; \ >>>>> -            rc = __put_guest(item, stkp); \ >>>>> +            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>>> >>>> Oh, this probably violates MISRA, but you don't need to use a separate >>>> variable because sizeof() has no side effects. >>>> >>>> Given that the expression is now &item, I think it needs to be &(item). >>>> >>> >>> I tried something like that, but it looked a bit weird and clang >>> wasn't happy (at least in language server) because of the &(x + y). >>> >>> We also need to ensure that we're actually copying 32-bits scalars >>> (and not 16-bits or 64-bits ones) like the previous behavior. >>> >>> That diff seems to work though >>> >>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>> b/xen/arch/x86/pv/emul-gate-op.c >>> index cacc171115..b72a3058dd 100644 >>> --- a/xen/arch/x86/pv/emul-gate-op.c >>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>> @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >>>          int rc; >>>  #define push(item) do \ >>>          { \ >>> -            unsigned int __value = item; \ >>>              --stkp; \ >>>              esp -= 4; \ >>> -            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>> +            rc = copy_to_guest_pv(stkp, &(uint32_t)(item), >>> sizeof(uint32_t)); \ >>>              if ( rc ) \ >>>              { \ >>>                  pv_inject_page_fault(PFEC_write_access, \  >> >> Oh, that's a second bug you're fixing then. >> >> Pushes of ss/cs need to be done with 4-byte writes and zero extended. > > And they are: Access size is derived from the pointer passed, not from the > item. Oh, while access size has always been correct, .... >> I've added: >> >> The use of a local variable in push() also fixes a second bug.  On all >> but the earliest 32bit CPUs, segment selectors pushes are >> zero-extended 32bit stores.  Xen was not doing this for %ss and %cs. ... zero-extension was lost with the FRED work, so a 2nd Fixes: tag is going to be necessary: cb29eed2dae7 ("x86/traps: Extend struct cpu_user_regs/cpu_info with FRED fields"). Jan >> to the commit message. >> >> ~Andrew > From xen-devel-bounces@lists.xenproject.org Thu May 21 07:03:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 07:03:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314836.1584806 (Exim 4.92) (envelope-from ) id 1wPxRh-0003zZ-Jl; Thu, 21 May 2026 07:03:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314836.1584806; Thu, 21 May 2026 07:03:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPxRh-0003zS-Gg; Thu, 21 May 2026 07:03:53 +0000 Received: by outflank-mailman (input) for mailman id 1314836; Thu, 21 May 2026 07:03:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPxRf-0003zI-KS for xen-devel@lists.xenproject.org; Thu, 21 May 2026 07:03:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPxRf-00CcAT-0H for xen-devel@lists.xenproject.org; Thu, 21 May 2026 09:03:51 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0eae53-e002-0a2a0a5209dd-0a2a4507992c-20 for ; Thu, 21 May 2026 09:03:50 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0eae56-229c-0a2a45070019-d1558031e0c6-3 for ; Thu, 21 May 2026 09:03:50 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so81644985e9.2 for ; Thu, 21 May 2026 00:03:50 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779347030-23F7EC48-55E0A41F/0/0 X-purgate-type: clean X-purgate-size: 1732 On 20.05.2026 18:34, Andrew Cooper wrote: > On 20/05/2026 4:51 pm, Teddy Astie wrote: >> __{put,get}_guest returns -EFAULT on access faults which causes >> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >> incorrect. >> >> Fix the computation by relying on copy_{from,to}_guest_pv which >> reports the number of remaining bytes instead of a negative errno, >> such that we can compute the offset properly. >> >> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >> Signed-off-by: Teddy Astie >> --- >> xen/arch/x86/pv/emul-gate-op.c | 5 +++-- >> 1 file changed, 3 insertions(+), 2 deletions(-) >> >> diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c >> index c2c699fbff..cacc171115 100644 >> --- a/xen/arch/x86/pv/emul-gate-op.c >> +++ b/xen/arch/x86/pv/emul-gate-op.c >> @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >> int rc; >> #define push(item) do \ >> { \ >> + unsigned int __value = item; \ As per other comments, this wants to use uint32_t as type. Given the number of comments, including some back and forth, I think a v2 really needs submitting (rather than one of us doing on-commit edits). Jan >> --stkp; \ >> esp -= 4; \ >> - rc = __put_guest(item, stkp); \ >> + rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ > > Oh, this probably violates MISRA, but you don't need to use a separate > variable because sizeof() has no side effects. > > Given that the expression is now &item, I think it needs to be &(item). > > Can also be fixed on commit. > > ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 07:07:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 07:07:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314846.1584815 (Exim 4.92) (envelope-from ) id 1wPxUu-0004bt-6g; Thu, 21 May 2026 07:07:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314846.1584815; Thu, 21 May 2026 07:07:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPxUu-0004bl-33; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: I7G4GwQPvU5T8ozxW51LG8U15vTABeWZe8MvgqxcKXk3kHzbaBfgZarEDsGZ84n4sXJ3eavTCHpphpnlVUBWVonYGPlSg9GHdq6oklP71fW7aBrKGeJ60plV4zxJB5OtyibjmPKWYr5l/AV70GwIdeB/foFf2NkiTQjROwGbw9xFX9E7Zq8ESy2xTNSRDppfPEDmchCkYLguxQl3+db2fYPOIbf5DnQ+vNISwBPP4hpENV3Vzgr5+FOsNNwS2SnSbA44guQdaCj7+brzZjGZ+b9Czw9NdDMgUtJNFgxkPtSXahbVaAuvurdfP0Zl+3ZRrnMKpP1rX6OvU0FL7P5H5D/NN+Jur+3aJvfjIlLNlIIYa3jWcQnbhbud9OULE7LKVtRLYmEkn/gqqG4gk0IP+lHPb2LBj9DOI17BoJSWtd/+BtXvDk1MtmOiu+yPLl0d X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 May 2026 07:07:01.9123 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 54fb5fc0-ff66-4e0f-a2c9-08deb7078eac X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000055DD.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB5882 X-purgate-ID: tlsNG-720697/1779347229-AA374161-19C4A849/0/0 X-purgate-type: clean X-purgate-size: 1109 Oleksii, can we ask for a release ack for this fix? ~Michal On 19-May-26 09:19, Orzel, Michal wrote: > > > On 18-May-26 09:05, Luca Fancellu wrote: >> gicv3_enable_redist() clears GICR_WAKER.ProcessorSleep and then waits for >> GICR_WAKER.ChildrenAsleep to clear, as required after waking a >> redistributor. >> >> However, the polling loop currently uses "while ( timeout )". Since >> timeout is initially false, the loop runs only once unless the timeout >> path has already been reached. As a result, Xen can continue before the >> redistributor has completed wakeup. >> >> Use an unconditional loop, matching the surrounding timeout/break pattern, >> so the code polls until either ChildrenAsleep is clear or the deadline is >> reached. >> >> While there, also fix the timeout message. This path polls >> GICR_WAKER.ChildrenAsleep, not an RWP bit, so "RWP timeout" is misleading. >> >> Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") >> Signed-off-by: Luca Fancellu > Reviewed-by: Michal Orzel > > ~Michal > > From xen-devel-bounces@lists.xenproject.org Thu May 21 08:05:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 08:05:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314878.1584825 (Exim 4.92) (envelope-from ) id 1wPyPF-0005HM-Ow; Thu, 21 May 2026 08:05:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314878.1584825; Thu, 21 May 2026 08:05:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPyPF-0005HF-L4; Thu, 21 May 2026 08:05:25 +0000 Received: by outflank-mailman (input) for mailman id 1314878; Thu, 21 May 2026 08:05:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPyPE-0005H9-1z for xen-devel@lists.xenproject.org; Thu, 21 May 2026 08:05:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPyPD-001dm3-Aa for xen-devel@lists.xenproject.org; Thu, 21 May 2026 10:05:23 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ebcc2-bab6-0a2a0a5309dd-0a2a45068450-8 for ; Thu, 21 May 2026 10:05:23 +0200 Received: from [170.10.129.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ebcc1-7371-0a2a45060019-aa0a817c56e1-3 for ; Thu, 21 May 2026 10:05:22 +0200 Received: from mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (ec2-35-165-154-97.us-west-2.compute.amazonaws.com [35.165.154.97]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-467-qw9n426LN6iHWRGDsun09A-1; Thu, 21 May 2026 04:05:19 -0400 Received: from mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com [10.30.177.93]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id D0BD218005B8; Thu, 21 May 2026 08:05:17 +0000 (UTC) Received: from blackfin.pond.sub.org (unknown [10.44.22.2]) by mx-prod-int-06.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 7804118004A3; Thu, 21 May 2026 08:05:17 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id F194B21E6A26; Thu, 21 May 2026 10:05:11 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=mimecast20190719 header.d=redhat.com header.i="@redhat.com" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:content-type:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1779350721; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gp1cainvmRZDg+ymp4bpKIlx91SzYg0bZQEDGX2Yx2E=; b=OOSwfmRNYKMRkx5Ss5LUYVd1is5GdTBre1o4vCFY3wA2LaPmkmcEO6xbetu3+TbT9ktORB LS2oOrXOtr4F0694vb/yrOrR/8n/EUNo4GkQAIKVX03VJw72Jhu8y8+sl1bIssiI3yy8OZ fpGWSxlK0iCLIlWlKMc8VsC7wdbLF/I= X-MC-Unique: qw9n426LN6iHWRGDsun09A-1 X-Mimecast-MFC-AGG-ID: qw9n426LN6iHWRGDsun09A_1779350718 From: Markus Armbruster To: qemu-devel@nongnu.org Cc: philmd@linaro.org, pierrick.bouvier@oss.qualcomm.com, Stefano Stabellini , Anthony PERARD , "Edgar E. Iglesias" , xen-devel@lists.xenproject.org Subject: [PATCH 10/39] MAINTAINERS: Drop bad F: in "X86 Xen CPUs" Date: Thu, 21 May 2026 10:04:42 +0200 Message-ID: <20260521080511.999266-11-armbru@redhat.com> In-Reply-To: <20260521080511.999266-1-armbru@redhat.com> References: <20260521080511.999266-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.4.1 on 10.30.177.93 X-Mimecast-MFC-PROC-ID: M_Luv-jqENN8Zl-08zWmetRlQaFhgeMHeIQJ4FZFhy8_1779350718 X-Mimecast-Originator: redhat.com Content-Transfer-Encoding: 8bit content-type: text/plain; charset="US-ASCII"; x-default=true X-purgate-ID: tlsNG-16d1c6/1779350723-8C07ED75-E43D1EF4/0/0 X-purgate-type: clean X-purgate-size: 836 include/hw/block/dataplane/xen* does not exist. hw/block/dataplane/xen* does, and is covered. Drop the bad line. Fixes: fcab2b464e (xen: add header and build dataplane/xen-block.c, 2019-01-08) Cc: Stefano Stabellini Cc: Anthony PERARD Cc: Edgar E. Iglesias Cc: xen-devel@lists.xenproject.org Signed-off-by: Markus Armbruster --- MAINTAINERS | 1 - 1 file changed, 1 deletion(-) diff --git a/MAINTAINERS b/MAINTAINERS index 65a1dc99b2..44e5f096a1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -640,7 +640,6 @@ F: hw/xen/ F: hw/xenpv/ F: hw/i386/xen/ F: hw/pci-host/xen_igd_pt.c -F: include/hw/block/dataplane/xen* F: include/hw/xen/ F: include/system/xen.h F: include/system/xen-mapcache.h -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 09:15:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 09:15:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314933.1584861 (Exim 4.92) (envelope-from ) id 1wPzV5-0006e2-OW; Thu, 21 May 2026 09:15:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314933.1584861; Thu, 21 May 2026 09:15:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPzV5-0006dv-LY; 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2026-05-15 12:19 PM, Sean Christopherson wrote: > Prefer the TSC over kvmclock for sched_clock if the TSC is constant, > nonstop, and not marked unstable via command line. I.e. use the same > criteria as tweaking the clocksource rating so that TSC is preferred over > kvmclock. Per the below comment from native_sched_clock(), sched_clock > is more tolerant of slop than clocksource; using TSC for clocksource but > not sched_clock makes little to no sense, especially now that KVM CoCo > guests with a trusted TSC use TSC, not kvmclock. > > /* > * Fall back to jiffies if there's no TSC available: > * ( But note that we still use it if the TSC is marked > * unstable. We do this because unlike Time Of Day, > * the scheduler clock tolerates small errors and it's > * very important for it to be as fast as the platform > * can achieve it. ) > */ > > The only advantage of using kvmclock is that doing so allows for early > and common detection of PVCLOCK_GUEST_STOPPED, but that code has been > broken for over two years with nary a complaint, i.e. it can't be > _that_ valuable. And as above, certain types of KVM guests are losing > the functionality regardless, i.e. acknowledging PVCLOCK_GUEST_STOPPED > needs to be decoupled from sched_clock() no matter what. Has it been broken for two years because of pvclock_clocksource_read_nowd()? Thank you very much! Dongli Zhang From xen-devel-bounces@lists.xenproject.org Thu May 21 09:42:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 09:42:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314963.1584870 (Exim 4.92) (envelope-from ) id 1wPzvL-0002hI-RK; Thu, 21 May 2026 09:42:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314963.1584870; Thu, 21 May 2026 09:42:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPzvL-0002hB-Nk; Thu, 21 May 2026 09:42:39 +0000 Received: by outflank-mailman (input) for mailman id 1314963; Thu, 21 May 2026 09:42:38 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wPzvK-0002h5-Gw for xen-devel@lists.xenproject.org; Thu, 21 May 2026 09:42:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wPzvJ-002QPu-TD for xen-devel@lists.xenproject.org; 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This will be needed to merge the >> instruction emulator and VMEXIT fast paths. > > I'm yet to understand why this is necessary, but I'm afraid I don't consider > the name very descriptive. Even hvm_emulate_one_insn2() or > hvm_emulate_one_insn_ex() would come closer: You don't "emulate a context". Of those, I'd prefer hvm_emulate_one_insn_ex(), though it still doesn't give much away as to how it differs from the proliferation of similarly named functions (i.e. _hvm_emulate_one(), hvm_emulate_one(), hvm_emulate_one_insn()). > >> --- a/xen/arch/x86/hvm/io.c >> +++ b/xen/arch/x86/hvm/io.c >> @@ -53,27 +53,32 @@ void send_timeoffset_req(unsigned long timeoff) >> bool hvm_emulate_one_insn(hvm_emulate_validate_t *validate, const char *descr) >> { >> struct hvm_emulate_ctxt ctxt; >> - int rc; >> >> hvm_emulate_init_once(&ctxt, validate, descr, guest_cpu_user_regs()); >> + return hvm_emulate_one_ctxt(&ctxt); >> +} >> >> - switch ( rc = hvm_emulate_one(&ctxt, VIO_no_completion) ) >> +bool hvm_emulate_one_ctxt(struct hvm_emulate_ctxt *ctxt) >> +{ >> + int rc = hvm_emulate_one(ctxt, VIO_no_completion); >> + >> + switch ( rc ) >> { >> case X86EMUL_UNHANDLEABLE: >> - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); >> + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); >> return false; >> >> case X86EMUL_UNRECOGNIZED: >> - hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt.descr, &ctxt, rc); >> + hvm_dump_emulation_state(XENLOG_G_WARNING, ctxt->descr, ctxt, rc); >> hvm_inject_hw_exception(X86_EXC_UD, X86_EVENT_NO_EC); >> break; > > These two lines were already touched by patch 1. Afaict leaving the change out > there will be fine, and hence will be overall less churn (plus following the > lines' histories will be one step shorter). > OK. Thanks, Ross From xen-devel-bounces@lists.xenproject.org Thu May 21 09:59:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 09:59:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314976.1584879 (Exim 4.92) (envelope-from ) id 1wQ0Bq-0004lh-4i; Thu, 21 May 2026 09:59:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314976.1584879; Thu, 21 May 2026 09:59:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ0Bq-0004la-1U; Thu, 21 May 2026 09:59:42 +0000 Received: by outflank-mailman (input) for mailman id 1314976; Thu, 21 May 2026 09:59:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ0Bp-0004lU-5i for xen-devel@lists.xenproject.org; Thu, 21 May 2026 09:59:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ0Bo-002NTO-D7 for xen-devel@lists.xenproject.org; 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For VMEXITs it uses a struct hvm_emulate_ctxt which contains struct x86_emulate_ctxt but without going through the full emulator. See patch 4 for details (probably makes sense to discuss this in the context of that patch). > >> @@ -1265,8 +1281,6 @@ x86_emulate( >> uint8_t b, d, *opc = NULL; >> unsigned int first_byte = 0, elem_bytes, insn_bytes = 0; >> uint64_t op_mask = ~0ULL; >> - bool singlestep = (_regs.eflags & X86_EFLAGS_TF) && >> - !is_branch_step(ctxt, ops); > > Nit: Yes, indentation was screwed here. Please ... > >> @@ -1280,6 +1294,9 @@ x86_emulate( >> >> init_context(ctxt); >> >> + ctxt->singlestep = (_regs.eflags & X86_EFLAGS_TF) && >> + !is_branch_step(ctxt, ops); > > ... correct such when moving code around. OK. > >> @@ -8347,17 +8364,6 @@ x86_emulate( >> put_fpu(fpu_type, false, state, ctxt, ops); >> fpu_type = X86EMUL_FPU_none; >> >> - /* Zero the upper 32 bits of %rip if not in 64-bit mode. */ >> - if ( !mode_64bit() ) >> - _regs.r(ip) = (uint32_t)_regs.r(ip); > > While, because you have the new helper update ctxt->regs, the removal of > this update of _regs looks technically okay, ... > >> - /* Should a singlestep #DB be raised? */ >> - if ( rc == X86EMUL_OKAY && singlestep && !ctxt->retire.mov_ss ) >> - { >> - ctxt->retire.singlestep = true; >> - ctxt->retire.sti = false; >> - } >> - >> if ( rc != X86EMUL_DONE ) >> *ctxt->regs = _regs; > > ... further uses of _regs here (not this one, but in general) would be at > risk of no longer working as expected (yet only in a corner case, so > possibly not covered by testing). Any uses of _regs after assignment back to the context is surely broken anyway because nothing outside of this function would see the result? Not that I would expect that to happen anyway since this is essentially the end of the function. Ross From xen-devel-bounces@lists.xenproject.org Thu May 21 10:12:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 10:12:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1314989.1584887 (Exim 4.92) (envelope-from ) id 1wQ0Nx-0007gp-3v; Thu, 21 May 2026 10:12:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1314989.1584887; Thu, 21 May 2026 10:12:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ0Nx-0007gi-1M; Thu, 21 May 2026 10:12:13 +0000 Received: by outflank-mailman (input) for mailman id 1314989; Thu, 21 May 2026 10:12:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ0Nv-0007fo-PL for xen-devel@lists.xenproject.org; Thu, 21 May 2026 10:12:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ0Nv-0074Mx-54 for xen-devel@lists.xenproject.org; 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>> } >> >> -/* >> - * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main >> - * opcode, shifted left to make room for the ModRM byte. >> - * >> - * The Grp7 instructions have their ModRM byte expressed in octal for easier >> - * cross referencing with the opcode extension table. >> - */ >> -#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) >> - >> -#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) >> -#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) >> -#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) >> -#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) >> -#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ >> -#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ >> -#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ >> -#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ >> -#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ >> -#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ >> -#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ >> -#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ > > ... the 7 ones above. > >> --- a/xen/arch/x86/include/asm/hvm/hvm.h >> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >> @@ -851,6 +851,35 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) >> alternative_vcall(hvm_funcs.sync_pir_to_irr, v); >> } >> >> +/* >> + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main >> + * opcode, shifted left to make room for the ModRM byte. > > With all of this moved, the comment wants adjusting, at the very least by > putting "e.g." in front of the function name. > >> + * The Grp7 instructions have their ModRM byte expressed in octal for easier >> + * cross referencing with the opcode extension table. >> + */ >> +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) >> + >> +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) >> +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) >> +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) >> +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) >> +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ >> +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ >> +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ >> +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ >> +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ >> +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ >> +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ >> +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ >> +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ >> +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) >> +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) >> +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) >> +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) >> +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) >> +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) >> + >> #else /* CONFIG_HVM */ > > I further wonder whether putting this in hvm.h is a good idea. Is there > anything wrong with using a brand new header, e.g. instr-enc.h? No objection to that. I do wonder though if using the instruction encoding like this is the best way of passing through the instruction to the fast path in hvm_emulate_one_ctxt() since I think in some cases the instruction encoding may not match the actual instruction that triggered the VMEXIT. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2d995d54-40fd-48e1-90c9-fbf6a9933415@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779359041-B534AFF4-8E93963D/0/0 X-purgate-type: clean X-purgate-size: 1778 On 20.05.2026 14:51, Andrew Cooper wrote: > On 20/05/2026 1:11 pm, Jan Beulich wrote: >> Linking debug info takes time, especially for xen.efi. At the same time >> symbol table contents aren't affected by presence / absence of debug info >> in the linked binaries (the ELF and COFF symbol tables would have extra >> section symbols, but tools/symbols omits those anyway). >> >> Signed-off-by: Jan Beulich >> --- >> The main speed gain is from xen.efi linking. Therefore I'm not even sure >> if this wants mirroring to the other targets, where only xen-syms is >> produced. It would mainly be some transient space saving there. (It would >> perhaps want retaining when the linking steps are moved to common code.) >> Thoughts? >> >> On the system I measured this on, "real" time went down from 4.9s to 3.9s, >> while "user" time went from 7.8s to 6.8s (all approximate values of >> course, as there naturally is a bit of variance, and all for full >> incremental builds with no other changes, i.e. mainly the final linking >> steps getting carried out for the common/version.o change). > > If it saves time, then good; this will make an improvement to my dev > cycle.  How does it fair on Ubuntu 16.04, where we've other known issues > about the debug symbols appearing to be corrupt? All builds are green in https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14480259043. > It would be nice to be consistent across the board.  If we're going to > make linking common soon, then it's probably fine, but this does risk > becoming yet another mysterious difference. Well, I can add --strip-debug everywhere, but it feels somewhat unjustified. Except if we take the disk space / I/O reduction into account. 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At the same time >>> symbol table contents aren't affected by presence / absence of debug info >>> in the linked binaries (the ELF and COFF symbol tables would have extra >>> section symbols, but tools/symbols omits those anyway). >>> >>> Signed-off-by: Jan Beulich >>> --- >>> The main speed gain is from xen.efi linking. Therefore I'm not even sure >>> if this wants mirroring to the other targets, where only xen-syms is >>> produced. It would mainly be some transient space saving there. (It would >>> perhaps want retaining when the linking steps are moved to common code.) >>> Thoughts? >>> >>> On the system I measured this on, "real" time went down from 4.9s to 3.9s, >>> while "user" time went from 7.8s to 6.8s (all approximate values of >>> course, as there naturally is a bit of variance, and all for full >>> incremental builds with no other changes, i.e. mainly the final linking >>> steps getting carried out for the common/version.o change). >> If it saves time, then good; this will make an improvement to my dev >> cycle.  How does it fair on Ubuntu 16.04, where we've other known issues >> about the debug symbols appearing to be corrupt? > All builds are green in > https://gitlab.com/xen-project/hardware/xen-staging/-/jobs/14480259043. Ok.  Acked-by: Andrew Cooper > >> It would be nice to be consistent across the board.  If we're going to >> make linking common soon, then it's probably fine, but this does risk >> becoming yet another mysterious difference. > Well, I can add --strip-debug everywhere, but it feels somewhat unjustified. > Except if we take the disk space / I/O reduction into account. It's mainly a guess on how long until we unify. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 10:57:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 10:57:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315050.1584943 (Exim 4.92) (envelope-from ) id 1wQ15P-0006Yy-3T; Thu, 21 May 2026 10:57:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315050.1584943; Thu, 21 May 2026 10:57:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ15P-0006Yr-0k; Thu, 21 May 2026 10:57:07 +0000 Received: by outflank-mailman (input) for mailman id 1315050; Thu, 21 May 2026 10:57:06 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ15O-0006Yl-17 for xen-devel@lists.xenproject.org; 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Message-ID: Date: Thu, 21 May 2026 11:56:56 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org Subject: Re: [PATCH] pv32: Fix bogus cr2 on fault in emulation gate To: Jan Beulich References: <1779292317.8631fc262581453bbf619ec5b2062170.19e46162869000f373@vates.tech> <0e23078f-30e0-4077-be1e-365a265603de@citrix.com> <1779295699.8631fc262581453bbf619ec5b2062170.19e4649c100000f373@vates.tech> <9a6f4d03-651b-449a-80d0-35077170c8c8@citrix.com> <09a27cbf-065a-44ad-8956-18f050202822@suse.com> <340a3b2b-23ce-4039-8d00-5245ab252164@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <340a3b2b-23ce-4039-8d00-5245ab252164@suse.com> Content-Type: text/plain; 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>>>>>>   #define push(item) do \ >>>>>>           { \ >>>>>> +            unsigned int __value = item; \ >>>>>>               --stkp; \ >>>>>>               esp -= 4; \ >>>>>> -            rc = __put_guest(item, stkp); \ >>>>>> +            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>>>> Oh, this probably violates MISRA, but you don't need to use a separate >>>>> variable because sizeof() has no side effects. >>>>> >>>>> Given that the expression is now &item, I think it needs to be &(item). >>>>> >>>> I tried something like that, but it looked a bit weird and clang >>>> wasn't happy (at least in language server) because of the &(x + y). >>>> >>>> We also need to ensure that we're actually copying 32-bits scalars >>>> (and not 16-bits or 64-bits ones) like the previous behavior. >>>> >>>> That diff seems to work though >>>> >>>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>>> b/xen/arch/x86/pv/emul-gate-op.c >>>> index cacc171115..b72a3058dd 100644 >>>> --- a/xen/arch/x86/pv/emul-gate-op.c >>>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>>> @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >>>>          int rc; >>>>  #define push(item) do \ >>>>          { \ >>>> -            unsigned int __value = item; \ >>>>              --stkp; \ >>>>              esp -= 4; \ >>>> -            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>>> +            rc = copy_to_guest_pv(stkp, &(uint32_t)(item), >>>> sizeof(uint32_t)); \ >>>>              if ( rc ) \ >>>>              { \ >>>>                  pv_inject_page_fault(PFEC_write_access, \  >>> Oh, that's a second bug you're fixing then. >>> >>> Pushes of ss/cs need to be done with 4-byte writes and zero extended. >> And they are: Access size is derived from the pointer passed, not from the >> item. > Oh, while access size has always been correct, .... > >>> I've added: >>> >>> The use of a local variable in push() also fixes a second bug.  On all >>> but the earliest 32bit CPUs, segment selectors pushes are >>> zero-extended 32bit stores.  Xen was not doing this for %ss and %cs. > ... zero-extension was lost with the FRED work, so a 2nd Fixes: tag is > going to be necessary: cb29eed2dae7 ("x86/traps: Extend struct > cpu_user_regs/cpu_info with FRED fields"). I don't understand this comment. The FRED work added extra fields into %cs/%ss with unions, but the fields named cs and ss are still uint16_t.  That aspect didn't change. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 11:49:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 11:49:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315085.1584952 (Exim 4.92) (envelope-from ) id 1wQ1u1-0005XZ-V4; Thu, 21 May 2026 11:49:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315085.1584952; Thu, 21 May 2026 11:49:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ1u1-0005XS-Rm; Thu, 21 May 2026 11:49:25 +0000 Received: by outflank-mailman (input) for mailman id 1315085; Thu, 21 May 2026 11:49:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ1u0-0005XM-I5 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 11:49:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ1tz-00B3Zm-Lk for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:49:23 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ef141-5cb7-0a2a0a5109dd-0a2a450b939c-4 for ; Thu, 21 May 2026 13:49:23 +0200 Received: from [209.85.221.42] (helo=mail-wr1-f42.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ef143-212f-0a2a450b0019-d155dd2ad89c-3 for ; Thu, 21 May 2026 13:49:23 +0200 Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-44e1ebb3122so3671206f8f.2 for ; Thu, 21 May 2026 04:49:23 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779364163-18762F3B-F75B2F0F/0/0 X-purgate-type: clean X-purgate-size: 4639 On 21.05.2026 12:56, Andrew Cooper wrote: > On 21/05/2026 8:00 am, Jan Beulich wrote: >> On 21.05.2026 08:33, Jan Beulich wrote: >>> On 20.05.2026 19:21, Andrew Cooper wrote: >>>> On 20/05/2026 5:48 pm, Teddy Astie wrote: >>>>> Le 20/05/2026 à 18:34, Andrew Cooper a écrit : >>>>>> On 20/05/2026 4:51 pm, Teddy Astie wrote: >>>>>>> __{put,get}_guest returns -EFAULT on access faults which causes >>>>>>> the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is >>>>>>> incorrect. >>>>>>> >>>>>>> Fix the computation by relying on copy_{from,to}_guest_pv which >>>>>>> reports the number of remaining bytes instead of a negative errno, >>>>>>> such that we can compute the offset properly. >>>>>>> >>>>>>> Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") >>>>>>> Signed-off-by: Teddy Astie >>>>>>> --- >>>>>>>   xen/arch/x86/pv/emul-gate-op.c | 5 +++-- >>>>>>>   1 file changed, 3 insertions(+), 2 deletions(-) >>>>>>> >>>>>>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>>>>>> b/xen/arch/x86/pv/emul-gate-op.c >>>>>>> index c2c699fbff..cacc171115 100644 >>>>>>> --- a/xen/arch/x86/pv/emul-gate-op.c >>>>>>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>>>>>> @@ -289,9 +289,10 @@ void pv_emulate_gate_op(struct cpu_user_regs >>>>>>> *regs) >>>>>>>           int rc; >>>>>>>   #define push(item) do \ >>>>>>>           { \ >>>>>>> +            unsigned int __value = item; \ >>>>>>>               --stkp; \ >>>>>>>               esp -= 4; \ >>>>>>> -            rc = __put_guest(item, stkp); \ >>>>>>> +            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>>>>> Oh, this probably violates MISRA, but you don't need to use a separate >>>>>> variable because sizeof() has no side effects. >>>>>> >>>>>> Given that the expression is now &item, I think it needs to be &(item). >>>>>> >>>>> I tried something like that, but it looked a bit weird and clang >>>>> wasn't happy (at least in language server) because of the &(x + y). >>>>> >>>>> We also need to ensure that we're actually copying 32-bits scalars >>>>> (and not 16-bits or 64-bits ones) like the previous behavior. >>>>> >>>>> That diff seems to work though >>>>> >>>>> diff --git a/xen/arch/x86/pv/emul-gate-op.c >>>>> b/xen/arch/x86/pv/emul-gate-op.c >>>>> index cacc171115..b72a3058dd 100644 >>>>> --- a/xen/arch/x86/pv/emul-gate-op.c >>>>> +++ b/xen/arch/x86/pv/emul-gate-op.c >>>>> @@ -289,10 +289,9 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) >>>>>          int rc; >>>>>  #define push(item) do \ >>>>>          { \ >>>>> -            unsigned int __value = item; \ >>>>>              --stkp; \ >>>>>              esp -= 4; \ >>>>> -            rc = copy_to_guest_pv(stkp, &__value, sizeof(__value)); \ >>>>> +            rc = copy_to_guest_pv(stkp, &(uint32_t)(item), >>>>> sizeof(uint32_t)); \ >>>>>              if ( rc ) \ >>>>>              { \ >>>>>                  pv_inject_page_fault(PFEC_write_access, \  >>>> Oh, that's a second bug you're fixing then. >>>> >>>> Pushes of ss/cs need to be done with 4-byte writes and zero extended. >>> And they are: Access size is derived from the pointer passed, not from the >>> item. >> Oh, while access size has always been correct, .... >> >>>> I've added: >>>> >>>> The use of a local variable in push() also fixes a second bug.  On all >>>> but the earliest 32bit CPUs, segment selectors pushes are >>>> zero-extended 32bit stores.  Xen was not doing this for %ss and %cs. >> ... zero-extension was lost with the FRED work, so a 2nd Fixes: tag is >> going to be necessary: cb29eed2dae7 ("x86/traps: Extend struct >> cpu_user_regs/cpu_info with FRED fields"). > > I don't understand this comment. > > The FRED work added extra fields into %cs/%ss with unions, but the > fields named cs and ss are still uint16_t.  That aspect didn't change. __{get,put}_guest() determine the amount of data to copy from the pointer they're passed. That being unsigned int *, 32 bits will be copied regardless of field type. Actually: __put_guest() casts the incoming value to the type the pointer argument points to. So FRED work didn't break anything, and I was wrong to ask for a 2nd Fixes: tag. Zero- extension was and is there. For __get_guest() et al there looks to be potential of data corruption, if variable type is less wide than pointed-to type. Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 11:50:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 11:50:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315091.1584960 (Exim 4.92) (envelope-from ) id 1wQ1vM-0006xS-7J; Thu, 21 May 2026 11:50:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315091.1584960; Thu, 21 May 2026 11:50:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ1vM-0006xL-4l; Thu, 21 May 2026 11:50:48 +0000 Received: by outflank-mailman (input) for mailman id 1315091; Thu, 21 May 2026 11:50:46 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQ1vK-0006xB-7T for xen-devel@lists.xenproject.org; Thu, 21 May 2026 11:50:46 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ1vJ-002MT5-KK for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:50:45 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ef182-2eae-0a2a0a5409dd-0a2a4509d57a-42 for ; Thu, 21 May 2026 13:50:45 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ef195-2497-0a2a45090019-d155dd2db1f2-3 for ; Thu, 21 May 2026 13:50:45 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-45ea19f412aso617218f8f.3 for ; Thu, 21 May 2026 04:50:45 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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On older > hardware, determining when an NMI is safe to deliver is a challenge and Xen > does not handle all corner cases correctly. > > With vNMI, there is an enablement bit and two new bits of state in the VMCB; a > pending bit, and a blocked bit. These directly map to the CPU state for > handling NMIs, and are maintained by hardware during the running of the vCPU. > > When vNMI is enabled, have svm_{get,set}set_interrupt_shadow() work in terms > of the vnmi_blocking bit rather than the IRET intercept. This allows an > emulated IRET instruction to re-enable NMIs. > > When injecting a new NMI, simply set the vnmi_pending bit; hardware will > deliver the NMI to the guest at the next suitable juncture. > > One complication is that, when delivering a second NMI before the first has > completed, the mix between common HVM logic and SVM specific logic will try to > open an NMI window, malfunctioning as it does so. When vNMI is enabled, short > circuit this to not consider NMIs blocked. > > Signed-off-by: Abdelkareem Abdelsaamad > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > CC: Jason Andryuk > CC: Oleksii Kurochko > > For 4.22. This is somewhat overdue and makes a concrete improvement to NMI > handling on recent AMD hardware. > Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Thu May 21 11:57:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 11:57:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315104.1584970 (Exim 4.92) (envelope-from ) id 1wQ21j-0007aP-SV; Thu, 21 May 2026 11:57:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315104.1584970; Thu, 21 May 2026 11:57:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ21j-0007aI-Pk; Thu, 21 May 2026 11:57:23 +0000 Received: by outflank-mailman (input) for mailman id 1315104; Thu, 21 May 2026 11:57:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ21j-0007aC-DU for xen-devel@lists.xenproject.org; Thu, 21 May 2026 11:57:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ21i-00DeTp-Ls for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:57:22 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ef31f-5cb7-0a2a0a5109dd-0a2a4508eaee-12 for ; Thu, 21 May 2026 13:57:22 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ef322-63b5-0a2a45080019-d155dd33bcfa-3 for ; Thu, 21 May 2026 13:57:22 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d7e23defbso3380479f8f.0 for ; Thu, 21 May 2026 04:57:22 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <6a6dd703-cb9f-4a13-b0da-ff1a9d841bc5@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779364642-BC766DB1-70C4E4E5/0/0 X-purgate-type: clean X-purgate-size: 3048 On 21.05.2026 12:12, Ross Lagerwall wrote: > On 5/19/26 10:49 AM, Jan Beulich wrote: >> On 18.05.2026 15:14, Ross Lagerwall wrote: >>> --- a/xen/arch/x86/include/asm/hvm/hvm.h >>> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >>> @@ -851,6 +851,35 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) >>> alternative_vcall(hvm_funcs.sync_pir_to_irr, v); >>> } >>> >>> +/* >>> + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main >>> + * opcode, shifted left to make room for the ModRM byte. >> >> With all of this moved, the comment wants adjusting, at the very least by >> putting "e.g." in front of the function name. >> >>> + * The Grp7 instructions have their ModRM byte expressed in octal for easier >>> + * cross referencing with the opcode extension table. >>> + */ >>> +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) >>> + >>> +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) >>> +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) >>> +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) >>> +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) >>> +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ >>> +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ >>> +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ >>> +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ >>> +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ >>> +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ >>> +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ >>> +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ >>> +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ >>> +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) >>> +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) >>> +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) >>> +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) >>> +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) >>> +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) >>> + >>> #else /* CONFIG_HVM */ >> >> I further wonder whether putting this in hvm.h is a good idea. Is there >> anything wrong with using a brand new header, e.g. instr-enc.h? > > No objection to that. I do wonder though if using the instruction encoding like > this is the best way of passing through the instruction to the fast path in > hvm_emulate_one_ctxt() since I think in some cases the instruction encoding > may not match the actual instruction that triggered the VMEXIT. Do you have an example? If so, that would indeed be at risk of being misleading or actively confusing. (Of course INSTR_VMCALL wants renaming, as was already suggested.) Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 12:03:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 12:03:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315117.1584979 (Exim 4.92) (envelope-from ) id 1wQ27E-00014d-Ky; Thu, 21 May 2026 12:03:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315117.1584979; Thu, 21 May 2026 12:03:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ27E-00014W-H2; Thu, 21 May 2026 12:03:04 +0000 Received: by outflank-mailman (input) for mailman id 1315117; Thu, 21 May 2026 12:03:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ27D-00014O-N4 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 12:03:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ27B-007SJu-JU for xen-devel@lists.xenproject.org; Thu, 21 May 2026 14:03:01 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ef46d-e002-0a2a0a5209dd-0a2a4507c598-40 for ; Thu, 21 May 2026 14:03:01 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ef475-229c-0a2a45070019-d155dd32d13d-3 for ; Thu, 21 May 2026 14:03:01 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-45297094718so4827273f8f.3 for ; Thu, 21 May 2026 05:03:01 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 21 May 2026 05:03:00 -0700 (PDT) Message-ID: <59fc2b14-073b-42a6-8f30-503ad789fbab@suse.com> Date: Thu, 21 May 2026 14:02:59 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH v2] Arm: do a 4th linking pass if necessary To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1779364981-2976AC48-A194ADD0/0/0 X-purgate-type: clean X-purgate-size: 3186 The .rodata growth between 1st and 2nd linking passes may affect the number of stubs the linker wants to insert, which in turn affects the number of symbols. If symbol table sizes change after the 2nd linking pass, insert another one before the final one. (As a comment in Linux puts it, "In theory it's possible this results in even more stubs, but unlikely.") To use the $(compare-symbol-tables) macro in a shell "if", it needs slightly adjusting (and then wrapping to be run in a sub-shell). Signed-off-by: Jan Beulich --- There's imo no good Fixes: tag, since (aiui) stubs (veneers) may also be inserted for reasons other than errata workarounds. For context: The Cortex A53 erratum 843419 workaround in GNU ld comes in two flavors: In the general case a stub is inserted, but if the problem ADRP can be replaced by ADR (i.e. the target symbol is within ±1Mb), then that's preferred and no stub is needed. The addition of the symbol table data is what then results in the stub-less form to no longer be usable in affected configurations. A possible countermeasure could be to move .rodata ahead of .text. (Also, from looking at generated code, it may well be that newer gcc simply avoids producing problematic insn sequences.) Linux simply compares object file sizes, but I consider that fragile: A change in size of one of the symbol table constituents may not necessarily change the object file size, due to padding which may be in use. Once we generalize linking, we may want to introduce an equivalent of Linux'es KALLSYMS_EXTRA_PASS as well. I don't think doing this right here would make overly much sense, though. --- v2: Add "set -e". --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -99,9 +99,21 @@ $(TARGET)-syms: $(objtree)/prelink.o $(o | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > $(dot-target).2.S $(MAKE) $(build)=$(@D) $(dot-target).2.o - $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) + if ! { $(call compare-symbol-tables, $(dot-target).1.o, $(dot-target).2.o) >/dev/null; }; \ + then \ + set -e; \ + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ + $(dot-target).2.o -o $(dot-target).2; \ + $(NM) -pa --format=sysv $(dot-target).2 \ + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ + > $(dot-target).3.S; \ + $(MAKE) $(build)=$(@D) $(dot-target).3.o; \ + $(call compare-symbol-tables, $(dot-target).2.o, $(dot-target).3.o); \ + else \ + ln -sf $(dot-target).2.o $(dot-target).3.o; \ + fi $(LD) $(XEN_LDFLAGS) -T $(obj)/xen.lds $< $(build_id_linker) \ - $(dot-target).2.o -o $@ + $(dot-target).3.o -o $@ $(NM) -pa --format=sysv $@ \ | $(objtree)/tools/symbols --all-symbols --xensyms --sysv --sort \ > $@.map --- a/xen/scripts/Kbuild.include +++ b/xen/scripts/Kbuild.include @@ -65,7 +65,7 @@ define compare-symbol-tables $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(1).sym; \ ln -f $(2) $(@D)/.cst.$$$$; \ $(OBJDUMP) -t $(@D)/.cst.$$$$ > $(2).sym; \ - rm -f $(@D)/.cst.$$$$ + rm -f $(@D)/.cst.$$$$; \ diff -u $(1).sym $(2).sym endef From xen-devel-bounces@lists.xenproject.org Thu May 21 12:26:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 12:26:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315132.1584988 (Exim 4.92) (envelope-from ) id 1wQ2TU-0004PB-79; Thu, 21 May 2026 12:26:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315132.1584988; Thu, 21 May 2026 12:26:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ2TU-0004P4-48; Thu, 21 May 2026 12:26:04 +0000 Received: by outflank-mailman (input) for mailman id 1315132; Thu, 21 May 2026 12:26:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ2TS-0004Ox-TR for xen-devel@lists.xenproject.org; Thu, 21 May 2026 12:26:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ2TS-00BBJa-9G for xen-devel@lists.xenproject.org; Thu, 21 May 2026 14:26:02 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ef9d4-2eae-0a2a0a5409dd-0a2a4501a88c-30 for ; Thu, 21 May 2026 14:26:02 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ef9d9-c1f2-0a2a45010019-d155dd35d85c-3 for ; Thu, 21 May 2026 14:26:02 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-44e1ebb3122so3700868f8f.2 for ; Thu, 21 May 2026 05:26:02 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 21 May 2026 05:26:55 -0700 (PDT) Message-ID: <09e58463-4eda-46da-83e0-bc66c84afb25@suse.com> Date: Thu, 21 May 2026 14:26:54 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/2] x86/time: address Misra C:2012 rule 8.3 From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini References: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779366415-7FB7DD75-9373102C/0/0 X-purgate-type: clean X-purgate-size: 1860 Before we can enable scanning of time.c, it needs to be clean wrt blocking rules. Bring boot_tsc_stamp's definition in line with its declaration. For get_s_time_fixed() go a little farther and move it to the x86 header (the function only exists in x86) and do, along with correcting the parameter name, the u64 -> uint64_t a little more widely than strictly necessary. Signed-off-by: Jan Beulich --- a/xen/arch/x86/include/asm/time.h +++ b/xen/arch/x86/include/asm/time.h @@ -13,6 +13,8 @@ static inline cycles_t get_cycles(void) return rdtsc_ordered(); } +s_time_t get_s_time_fixed(uint64_t at_tsc); + unsigned long mktime (unsigned int year, unsigned int mon, unsigned int day, unsigned int hour, --- a/xen/arch/x86/time.c +++ b/xen/arch/x86/time.c @@ -95,7 +95,7 @@ static u32 pit_stamp32; static bool __read_mostly using_pit; /* Boot timestamp, filled in head.S */ -u64 __initdata boot_tsc_stamp; +uint64_t __initdata boot_tsc_stamp; /* Per-socket TSC_ADJUST values, for secondary cores/threads to sync to. */ static uint64_t *__read_mostly tsc_adjust; @@ -1656,10 +1656,10 @@ static unsigned long get_wallclock_time( * System Time ***************************************************************************/ -s_time_t get_s_time_fixed(u64 at_tsc) +s_time_t get_s_time_fixed(uint64_t at_tsc) { const struct cpu_time *t = &this_cpu(cpu_time); - u64 tsc, delta; + uint64_t tsc, delta; if ( at_tsc ) tsc = at_tsc; --- a/xen/include/xen/time.h +++ b/xen/include/xen/time.h @@ -33,7 +33,6 @@ struct vcpu; typedef int64_t s_time_t; #define PRI_stime PRId64 -s_time_t get_s_time_fixed(u64 at_tick); s_time_t get_s_time(void); unsigned long get_localtime(struct domain *d); uint64_t get_localtime_us(struct domain *d); From xen-devel-bounces@lists.xenproject.org Thu May 21 12:27:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 12:27:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315145.1585006 (Exim 4.92) (envelope-from ) id 1wQ2Ur-0005JZ-Ms; Thu, 21 May 2026 12:27:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315145.1585006; Thu, 21 May 2026 12:27:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ2Ur-0005JS-JP; Thu, 21 May 2026 12:27:29 +0000 Received: by outflank-mailman (input) for mailman id 1315145; Thu, 21 May 2026 12:27:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ2Uq-0005J1-5P for xen-devel@lists.xenproject.org; Thu, 21 May 2026 12:27:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ2Up-00AbZb-Hd for xen-devel@lists.xenproject.org; Thu, 21 May 2026 14:27:27 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0efa26-2eae-0a2a0a5409dd-0a2a4504ce16-30 for ; Thu, 21 May 2026 14:27:27 +0200 Received: from [209.85.221.42] (helo=mail-wr1-f42.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0efa2f-1dec-0a2a45040019-d155dd2ac01e-3 for ; Thu, 21 May 2026 14:27:27 +0200 Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-4526a8170ceso2958547f8f.2 for ; Thu, 21 May 2026 05:27:27 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 21 May 2026 05:27:26 -0700 (PDT) Message-ID: <81995cf4-19f4-4146-aea7-d3e57609aa2a@suse.com> Date: Thu, 21 May 2026 14:27:26 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 2/2] x86/time: don't exclude from Eclair scanning From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini References: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ebf023/1779366447-289723FF-554DA057/0/0 X-purgate-type: clean X-purgate-size: 956 The justification is wrong, and the file hence shouldn't really be excluded. Signed-off-by: Jan Beulich --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -214,11 +214,6 @@ const-qualified." -doc_end -doc_begin="The following file is imported from Linux: ignore for now." --file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} --config=MC3A2.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_time_r8_3)))&&(any_area(any_loc(file(^xen/include/xen/time\\.h$)))||any_area(any_loc(file(^xen/arch/x86/include/asm/setup\\.h$))))"} --doc_end - --doc_begin="The following file is imported from Linux: ignore for now." -file_tag+={adopted_cpu_idle_r8_3,"^xen/arch/x86/acpi/cpu_idle\\.c$"} -config=MC3A2.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_cpu_idle_r8_3)))&&any_area(any_loc(file(^xen/include/xen/pmstat\\.h$)))"} -doc_end From xen-devel-bounces@lists.xenproject.org Thu May 21 12:59:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 12:59:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315171.1585015 (Exim 4.92) (envelope-from ) id 1wQ2zi-0002Ap-3n; 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AFNElJ+51dzHYsOcH+rPW7h2j07UDL23WUf3KP0/S5YGbEXK31fahR7AWr4ShlK6SAZN8BM2Xf5f3ZOBaM4=@lists.xenproject.org X-Gm-Message-State: AOJu0YwgTuFYYLtBmGMcw68rA5KqafEIvAwmSLQiGK3zpQUwaLKPiFa2 Cyi4dYyEDoq/OtHitWUDQ7a/C64jo1cgHyGRLE+QolBjM48fRghcJxfdCMTgcKvUq2YVPi3NchQ Q0cpC9g== X-Received: from pfdc18.prod.google.com ([2002:aa7:8c12:0:b0:834:df9e:8e02]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:4655:b0:82f:de7:d29 with SMTP id d2e1a72fcca58-8414ae013a1mr2977074b3a.31.1779368357753; Thu, 21 May 2026 05:59:17 -0700 (PDT) Date: Thu, 21 May 2026 05:59:17 -0700 In-Reply-To: <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-28-seanjc@google.com> <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1779368360-4357BA53-6E4EB036/0/0 X-purgate-type: clean X-purgate-size: 1465 On Thu, May 21, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > In anticipation of making x86_cpuinit.early_percpu_clock_init(), i.e. > > kvm_setup_secondary_clock(), a dedicated sched_clock hook that will be > > invoked if and only if kvmclock is set as sched_clock, ensure APs enabl= e > > their kvmclock during CPU online.=C2=A0 While a redundant write to the = MSR is > > technically ok, skip the registration when kvmclock is sched_clock so t= hat > > it's somewhat obvious that kvmclock *needs* to be enabled during early > > bringup when it's being used as sched_clock. > >=20 > > Plumb in the BSP's resume path purely for documentation purposes.=C2=A0= Both > > KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, and it's > > not super obvious that using KVM's hooks would be flawed.=C2=A0 E.g. it= would > > work today, because KVM's hooks happen to run after/before timekeeping'= s > > hooks during suspend/resume, but that's sheer dumb luck as the order in > > which syscore_ops are invoked depends entirely on when a subsystem is > > initialized and thus registers its hooks. > >=20 > > Opportunsitically make the registration messages more precise to help > > debug issues where kvmclock is enabled too late. >=20 > That's a hard word to type, isn't it? Heh, you have no idea. I've been "this" close to creating a VIM binding fo= r a while, it is time... From xen-devel-bounces@lists.xenproject.org Thu May 21 13:10:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 13:10:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315183.1585023 (Exim 4.92) (envelope-from ) id 1wQ3AX-00052k-1t; Thu, 21 May 2026 13:10:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315183.1585023; Thu, 21 May 2026 13:10:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ3AW-00052d-VJ; Thu, 21 May 2026 13:10:32 +0000 Received: by outflank-mailman (input) for mailman id 1315183; Thu, 21 May 2026 13:10:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ3AU-00052X-Pu for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:10:31 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ3AT-007gjB-OW for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:10:30 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f042c-2eae-0a2a0a5409dd-0a2a4507cada-44 for ; Thu, 21 May 2026 15:10:29 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f0444-229c-0a2a45070019-5a9b3222a22e-3 for ; Thu, 21 May 2026 15:10:28 +0200 Received: from 2001-1c00-8d85-4b00-266e-96ff-fe07-7dcc.cable.dynamic.v6.ziggo.nl ([2001:1c00:8d85:4b00:266e:96ff:fe07:7dcc] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQ3AK-00000008VrU-2GqZ; Thu, 21 May 2026 13:10:20 +0000 Received: by noisy.programming.kicks-ass.net (Postfix, from userid 1000) id 111F6300446; Thu, 21 May 2026 15:10:19 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="In-Reply-To:Content-Transfer-Encoding:Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Transfer-Encoding: Content-Type:MIME-Version:References:Message-ID:Subject:Cc:To:From:Date: Sender:Reply-To:Content-ID:Content-Description; bh=DA7DVimM8Ck0kNzDR7awZketijLzqktg5UcM679ki4g=; b=q6twZ/quiaPkS7JYDLfYP4oxQR kwL3xkWZBEpV2j7C1uN45f/dlF1ZLXrwx+jWqL7SQEvjHcy7/MS8yAxgKbQMJOBppFTgAyijrmCw+ qsUedKzMdKPt0VHol7Hg5iM2yiOqZHQAzBNQpo0ETgquMSq330OAMMUOL5XazrqdRvIuwmq8fCzvJ 8w7PV454mMuz+QtTx/4yGia1zkhOm9E43cVzP05eFWXg6UOcrEZyigPUrzrWk0OV5q9ekYN/vFQ9r H8UIXCIrcHRZ6j+ZCex3x14hX/FPAOr2uRFQk4MepXZ9vQBQZkKMP2xQUakHd/KfGdD8DmUEqPEFb l12Q18Ng==; Date: Thu, 21 May 2026 15:10:19 +0200 From: Peter Zijlstra To: Sean Christopherson Cc: David Woodhouse , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Subject: Re: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock Message-ID: <20260521131019.GI3126523@noisy.programming.kicks-ass.net> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-28-seanjc@google.com> <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-purgate-ID: tlsNG-ef75cf/1779369029-0B57BC48-2C90EFCE/0/0 X-purgate-type: clean X-purgate-size: 1570 On Thu, May 21, 2026 at 05:59:17AM -0700, Sean Christopherson wrote: > On Thu, May 21, 2026, David Woodhouse wrote: > > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > > In anticipation of making x86_cpuinit.early_percpu_clock_init(), i.e. > > > kvm_setup_secondary_clock(), a dedicated sched_clock hook that will be > > > invoked if and only if kvmclock is set as sched_clock, ensure APs enable > > > their kvmclock during CPU online. While a redundant write to the MSR is > > > technically ok, skip the registration when kvmclock is sched_clock so that > > > it's somewhat obvious that kvmclock *needs* to be enabled during early > > > bringup when it's being used as sched_clock. > > > > > > Plumb in the BSP's resume path purely for documentation purposes. Both > > > KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, and it's > > > not super obvious that using KVM's hooks would be flawed. E.g. it would > > > work today, because KVM's hooks happen to run after/before timekeeping's > > > hooks during suspend/resume, but that's sheer dumb luck as the order in > > > which syscore_ops are invoked depends entirely on when a subsystem is > > > initialized and thus registers its hooks. > > > > > > Opportunsitically make the registration messages more precise to help > > > debug issues where kvmclock is enabled too late. > > > > That's a hard word to type, isn't it? > > Heh, you have no idea. I've been "this" close to creating a VIM binding for a > while, it is time... 'z=' not good enough? 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=+zgSvlim6gRdCupTW4H21bdYQ4IwdPqT0BeBRo8Cn7s=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=LfMC+pArjoiP1nvfVdsmK29UgMkX7q44+DPqLvnlHLxzCnGsKmyTATjJ6TQVuAzlLlzFxZdn1 ay5vaA4dX9lHhm2f4lJmFnIDnrDE3XnaHNEQFQYiKaRj3MhV8yMJZKaqRvdIk+/SQC7WQpcu1UK clkkbxkr9k5T/iPlZhK8fFFSAGXWALpIypkasFF+o4VPEKNM1nOB9v++NTo/kcQDpVQm4c3zY5i pVhOy1Rm7IHr1PXSN9ZLLnyf5aHPJDd+16adh8Myr25SyiMNGs9ACNrAs9fiySIEqmtTESnYlI6 HVxBktIexN0CPrYAyRb5thddvOocxFsMlii34+mVTWhQ== X-Zone-Loop: 7fd641c7608def934c8445d1eccb769459b160f92d1c x-campaign-type: default x-transaction-id: 213d17ae-20e8-4dd2-a84b-fc5fb827ac70 x-swg-uid: 01-be5ecac9-3414-44cd-9823-884a22860b65 X-Mailer: Sweego Message-ID: <1779369047.8631fc262581453bbf619ec5b2062170.19e4aa8f3cc000f373@vates.tech> x-swg-bid: 1779369047.8631fc262581453bbf619ec5b2062170.19e4aa8f3cc000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Thu, 21 May 2026 15:10:45 +0200 From: Anthony PERARD To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Julien Grall , Stefano Stabellini , Michal Orzel , Roger Pau =?iso-8859-1?Q?Monn=E9?= , Bertrand Marquis , Volodymyr Babchuk Subject: Re: [PATCH] Arm: do a 4th linking pass if necessary References: <7b23e011-56b8-4f6c-bd55-83e1d9b0453f@suse.com> <1779293000.8631fc262581453bbf619ec5b2062170.19e46209296000f373@vates.tech> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1119.e76aa2b3b30ea5b4.19e4aa8f1c7.4a35099588d3b533=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779369046472 X-purgate-ID: tlsNG-4011c0/1779369053-7C47E8B7-AE5D6594/0/0 X-purgate-type: clean X-purgate-size: 2734 ---=Part.1119.e76aa2b3b30ea5b4.19e4aa8f1c7.4a35099588d3b533=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thu, May 21, 2026 at 08:08:44AM +0200, Jan Beulich wrote: > On 20=2E05=2E2026 18:03, Anthony PERARD wrote: > > On Wed, May 20, 2026 at 01:53:34PM +0200, Jan Beulich wrote: > >> + then \ > >> + $(LD) $(XEN_LDFLAGS) -T $(obj)/xen=2Elds $< $(build_id_linker) \ > >> + $(dot-target)=2E2=2Eo -o $(dot-target)=2E2; \ > >> + $(NM) -pa --format=3Dsysv $(dot-target)=2E2 \ > >> + | $(objtree)/tools/symbols $(all_symbols) --sysv --sort \ > >> + > $(dot-target)=2E3=2ES; \ > >> + $(MAKE) $(build)=3D$(@D) $(dot-target)=2E3=2Eo; \ > >=20 > > This new block ignore all errors, from LD, NM and MAKE=2E We want > > a `set -e` before the if=2E >=20 > Hmm, perhaps I should add that, yes, albeit =2E=2E=2E >=20 > >> + $(call compare-symbol-tables, $(dot-target)=2E2=2Eo, $(dot-target)= =2E3=2Eo); \ > >=20 > > At least, an error returned by `diff` in that macro should be taken in= to > > account, for now=2E >=20 > =2E=2E=2E I expect this would fail if there was an earlier error=2E Yes, but that's fragile, and that's not how `make` behave=2E It's better i= f every command behave the same way, that is the recipe fails on the first command that fail=2E So adding `set -e` would be useful=2E > >> --- a/xen/scripts/Kbuild=2Einclude > >> +++ b/xen/scripts/Kbuild=2Einclude > >> @@ -65,7 +65,7 @@ define compare-symbol-tables > >> $(OBJDUMP) -t $(@D)/=2Ecst=2E$$$$ > $(1)=2Esym; \ > >> ln -f $(2) $(@D)/=2Ecst=2E$$$$; \ > >> $(OBJDUMP) -t $(@D)/=2Ecst=2E$$$$ > $(2)=2Esym; \ > >> - rm -f $(@D)/=2Ecst=2E$$$$ > >> + rm -f $(@D)/=2Ecst=2E$$$$; \ > >> diff -u $(1)=2Esym $(2)=2Esym > >=20 > > This macro is missing `set -e`, if both OBJDUMP command fails and crea= te > > an empty file, `diff` will return success=2E >=20 > Whether to have "set -e" here is an independent question, I guess=2E To = avoid > the case you mention, maybe better >=20 > $(OBJDUMP) -t $(@D)/=2Ecst=2E$$$$ > $(1)=2Esym || rm -f $(1)=2Esym= ; \ >=20 > ? That sounds fine=2E (Replacing all the `;` by `&&` would work too=2E) > > But looks like `set -e` in > > this macro isn't going to work in the condition of the `if`=2E >=20 > Whereas the above would be compatible with both uses, I think=2E Yes=2E With at lest a `set -e` for the `if` block: Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1119.e76aa2b3b30ea5b4.19e4aa8f1c7.4a35099588d3b533=--- From xen-devel-bounces@lists.xenproject.org Thu May 21 13:12:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 13:12:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315195.1585042 (Exim 4.92) (envelope-from ) id 1wQ3CU-00060s-Iu; Thu, 21 May 2026 13:12:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315195.1585042; Thu, 21 May 2026 13:12:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ3CU-00060l-Fq; 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boundary="-=Part.111e.176d8371ba2d0dc1.19e4aaa7b3c.c8bb295495a3997d=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779369147196 X-purgate-ID: tlsNG-ebf023/1779369152-2A37F3FF-855D5C99/0/0 X-purgate-type: clean X-purgate-size: 1074 ---=Part.111e.176d8371ba2d0dc1.19e4aaa7b3c.c8bb295495a3997d=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Thu, May 21, 2026 at 02:02:59PM +0200, Jan Beulich wrote: > The =2Erodata growth between 1st and 2nd linking passes may affect the > number of stubs the linker wants to insert, which in turn affects the > number of symbols=2E If symbol table sizes change after the 2nd linking > pass, insert another one before the final one=2E (As a comment in Linux = puts > it, "In theory it's possible this results in even more stubs, but > unlikely=2E") >=20 > To use the $(compare-symbol-tables) macro in a shell "if", it needs > slightly adjusting (and then wrapping to be run in a sub-shell)=2E >=20 > Signed-off-by: Jan Beulich Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.111e.176d8371ba2d0dc1.19e4aaa7b3c.c8bb295495a3997d=--- From xen-devel-bounces@lists.xenproject.org Thu May 21 13:20:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 13:20:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315206.1585050 (Exim 4.92) (envelope-from ) id 1wQ3KK-0007sj-8C; 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779369637-B5D6BDB1-DBF1AB43/10/73395122804 X-purgate-type: spam X-purgate-size: 457 On 08.05.2026 16:43, Oleksii Kurochko wrote: > No RISC-V-specific nodes need to be created at the moment, > so make_arch_nodes() is implemented to simply return 0. > > It is placed in dom0less-build.c as make_arch_nodes() is > only used in the dom0less code path. In the future, it will > be extended to create an emulated UART node. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich From xen-devel-bounces@lists.xenproject.org Thu May 21 13:25:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 13:25:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315217.1585059 (Exim 4.92) (envelope-from ) id 1wQ3Ov-0008WL-ST; Thu, 21 May 2026 13:25:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315217.1585059; Thu, 21 May 2026 13:25:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ3Ov-0008WE-Pd; Thu, 21 May 2026 13:25:25 +0000 Received: by outflank-mailman (input) for mailman id 1315217; Thu, 21 May 2026 13:25:24 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQ3Ou-0008W6-1I for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:25:24 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ3Ot-00362c-DU for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:25:23 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f07b9-2eae-0a2a0a5409dd-0a2a4505bba8-40 for ; Thu, 21 May 2026 15:25:23 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f07c3-aaa8-0a2a45050019-d1558033a4b3-3 for ; Thu, 21 May 2026 15:25:23 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48fde648a71so44163585e9.0 for ; Thu, 21 May 2026 06:25:23 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779369923-DBB60443-C94E8BB8/10/73395122804 X-purgate-type: spam X-purgate-size: 2136 On 08.05.2026 16:43, Oleksii Kurochko wrote: > Introduce intc_hw_init_ops structure to avoid risky mix of init > function and non-init function. > > Signed-off-by: Oleksii Kurochko > --- > Changes in v2: > - New patch. > --- > xen/arch/riscv/aplic.c | 7 +++++-- > xen/arch/riscv/include/asm/intc.h | 10 +++++++--- > xen/arch/riscv/intc.c | 10 ++++++++-- > 3 files changed, 20 insertions(+), 7 deletions(-) > > diff --git a/xen/arch/riscv/aplic.c b/xen/arch/riscv/aplic.c > index 739e8dab3498..97dc0ef731f0 100644 > --- a/xen/arch/riscv/aplic.c > +++ b/xen/arch/riscv/aplic.c > @@ -306,12 +306,15 @@ static const hw_irq_controller aplic_xen_irq_type = { > > static const struct intc_hw_operations aplic_ops = { > .info = &aplic_info, > - .init = aplic_init, > .host_irq_type = &aplic_xen_irq_type, > .handle_interrupt = aplic_handle_interrupt, > .set_irq_type = aplic_set_irq_type, > }; > > +static const struct intc_hw_init_ops __initdata aplic_init_ops = { > + .init = aplic_init, > +}; const wants to pair with __initconst. Then: Acked-by: Jan Beulich However, I have another comment for consideration: > --- a/xen/arch/riscv/intc.c > +++ b/xen/arch/riscv/intc.c > @@ -12,9 +12,13 @@ > > static const struct intc_hw_operations *__ro_after_init intc_hw_ops; > > -void __init register_intc_ops(const struct intc_hw_operations *ops) > +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; > + > +void __init register_intc_ops(const struct intc_hw_operations *ops, > + const struct intc_hw_init_ops *init_ops) > { > intc_hw_ops = ops; > + intc_hw_init_ops = init_ops; > } Again following what we do e.g. in x86'es IOMMU code, instead of passing two pointers to the function, have struct intc_hw_init_ops have a const struct intc_hw_operations * member which then can be used to set intc_hw_ops here? Both will always come in pairs anyway. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <425157c3414ca95665288fa3788430e96a99e3cd.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1779370246-82B68161-BE5DE662/0/0 X-purgate-type: clean X-purgate-size: 1105 On 08.05.2026 16:43, Oleksii Kurochko wrote: > @@ -46,6 +45,15 @@ struct intc_hw_init_ops { > int (*init)(void); > }; > > +struct vintc_init_ops { > + /* Create interrupt controller node for domain */ > + int (*make_domu_dt_node)(struct kernel_info *kinfo); > +}; > + > +struct vintc { > + struct vintc_init_ops *init_ops; Pointer-to-const? > @@ -73,3 +74,13 @@ void intc_route_irq_to_xen(struct irq_desc *desc, unsigned int priority) > intc_set_irq_type(desc, desc->arch.type); > intc_set_irq_priority(desc, priority); > } > + > +int __init make_intc_domU_node(struct kernel_info *kinfo) > +{ > + struct vintc *vintc = kinfo->bd.d->arch.vintc; > + > + if ( intc_hw_ops && vintc->init_ops && vintc->init_ops->make_domu_dt_node ) Why the intc_hw_ops check? The variable isn't otherwise used here. As to the other two checks: Is it plausible for either of the two pointers to be NULL? If not, merely ASSERT() or even build upon ... > + return vintc->init_ops->make_domu_dt_node(kinfo); ... NULL derefs to fault anyway? Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 13:38:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 13:38:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315238.1585078 (Exim 4.92) (envelope-from ) id 1wQ3bi-0003iJ-6W; Thu, 21 May 2026 13:38:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315238.1585078; Thu, 21 May 2026 13:38:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ3bi-0003iA-2A; Thu, 21 May 2026 13:38:38 +0000 Received: by outflank-mailman (input) for mailman id 1315238; Thu, 21 May 2026 13:38:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <32QoPagYKCYIykgtpimuumrk.ius3kt-jk1krroyzy.3ktvxupkiz.uxm@flex--seanjc.bounces.google.com>) id 1wQ3bg-0003i2-Pf for xen-devel@lists.xenproject.org; Thu, 21 May 2026 13:38:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ3bg-00Gin8-5e for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:38:36 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <32QoPagYKCYIykgtpimuumrk.ius3kt-jk1krroyzy.3ktvxupkiz.uxm@flex--seanjc.bounces.google.com>) id 6a0f0ad2-bab6-0a2a0a5309dd-0a2a45068402-24 for ; Thu, 21 May 2026 15:38:36 +0200 Received: from [209.85.210.202] (helo=mail-pf1-f202.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <32QoPagYKCYIykgtpimuumrk.ius3kt-jk1krroyzy.3ktvxupkiz.uxm@flex--seanjc.bounces.google.com>) id 6a0f0ada-7371-0a2a45060019-d155d2caed64-3 for ; Thu, 21 May 2026 15:38:35 +0200 Received: by mail-pf1-f202.google.com with SMTP id d2e1a72fcca58-841127f960fso1220376b3a.1 for ; Thu, 21 May 2026 06:38:35 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779370714; x=1779975514; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=jbJ4F8kl/6/QcBmB9dNne3NQOqe79KuT470iYfI7huM=; b=hG6B9OEgWtr7KTUiUJXXEpQ1JY+bs8So+ilFZT4WRa1GbMtbUbgoUBcpQPkheK0GHo dVp0Ey6EsM/eugVN2fmv9TLIAabVzmCH/Z1+5uOWbXIzlFY3rF4LCiV18+/qgAsgiqh+ NlEA11Ydo/C3feLRzxgyiLMGVWuwIm15kkcHTsPeko+WrVBPr3jfmddxxtgNaMuyXN3R PnFuo6J0RlDzp90jobGs+IpgwXXgh4tlxNwy/S7O6vzZ/mF6iKGU4YKyfkb18fPlDQaR qDWVrBj70nMW4dcm3rQUtyU0YgptjPMbf0TA5Xe4qE12do0abRkorVVCoYMPAlacaexx f3sA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779370714; x=1779975514; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=jbJ4F8kl/6/QcBmB9dNne3NQOqe79KuT470iYfI7huM=; b=mbrlvJtcPRzWDxHqYmM+Tz6hhUozTPLbwxvu9urZXU9M03UCm/cdgPcIKi14NKd2Yj oMwVfkWu6xWVKrOYq4XB59XZEsMcIUdGZz/8CrJtgkc0bchhD24agubfhhIyj/lceDBm g7NH9vS9N44q3Mq4lzK6H7kZVqlwTBuWQtb/m0vPKywNQs6OIcHULuZjSU49g3bdCHLc j+NCaGXUXiHCNujGUL491IK5CSKqFpTKxiCt/eTanApuW64Zt0dIQTrSUPivPszVKFWz un4eMUBo0O2s6IMdAljEQAn/fW7wiOWFjSoHGW5ACEJB4aHdSkH24fmIKuXm5UqCgT5F pPCw== X-Forwarded-Encrypted: i=1; AFNElJ9lMxR6hrkiraU3P+d4maUpYPUO9i6EGor3sg0Is+COxyFtb9oZ/WkXIBhaTzgUXB/MEkOv8E7LFqA=@lists.xenproject.org X-Gm-Message-State: AOJu0Yx1h5hIR7B6K0aOGn2mb9VGckB30biRdOQ6XBijRoWTccjkE9++ l48odtfhfpBfAkzq98P9cv5LOHhyfnKviwkJrutshBIK+TDo7OcvSu2JDm/bsuZfoIcUEiVGp8k VYHcNiQ== X-Received: from pfbem15.prod.google.com ([2002:a05:6a00:374f:b0:83d:3c25:eb8b]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:4c8c:b0:827:3b1b:43e6 with SMTP id d2e1a72fcca58-8414acc6e8emr3123916b3a.21.1779370713612; Thu, 21 May 2026 06:38:33 -0700 (PDT) Date: Thu, 21 May 2026 06:38:32 -0700 In-Reply-To: <20260521131019.GI3126523@noisy.programming.kicks-ass.net> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-28-seanjc@google.com> <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> <20260521131019.GI3126523@noisy.programming.kicks-ass.net> Message-ID: Subject: Re: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock From: Sean Christopherson To: Peter Zijlstra Cc: David Woodhouse , Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779370716-87371D75-0F2D37D4/0/0 X-purgate-type: clean X-purgate-size: 1831 On Thu, May 21, 2026, Peter Zijlstra wrote: > On Thu, May 21, 2026 at 05:59:17AM -0700, Sean Christopherson wrote: > > On Thu, May 21, 2026, David Woodhouse wrote: > > > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > > > In anticipation of making x86_cpuinit.early_percpu_clock_init(), i.= e. > > > > kvm_setup_secondary_clock(), a dedicated sched_clock hook that will= be > > > > invoked if and only if kvmclock is set as sched_clock, ensure APs e= nable > > > > their kvmclock during CPU online.=C2=A0 While a redundant write to = the MSR is > > > > technically ok, skip the registration when kvmclock is sched_clock = so that > > > > it's somewhat obvious that kvmclock *needs* to be enabled during ea= rly > > > > bringup when it's being used as sched_clock. > > > >=20 > > > > Plumb in the BSP's resume path purely for documentation purposes.= =C2=A0 Both > > > > KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, and = it's > > > > not super obvious that using KVM's hooks would be flawed.=C2=A0 E.g= . it would > > > > work today, because KVM's hooks happen to run after/before timekeep= ing's > > > > hooks during suspend/resume, but that's sheer dumb luck as the orde= r in > > > > which syscore_ops are invoked depends entirely on when a subsystem = is > > > > initialized and thus registers its hooks. > > > >=20 > > > > Opportunsitically make the registration messages more precise to he= lp > > > > debug issues where kvmclock is enabled too late. > > >=20 > > > That's a hard word to type, isn't it? > >=20 > > Heh, you have no idea. I've been "this" close to creating a VIM bindin= g for a > > while, it is time... >=20 > 'z=3D' not good enough? You people and your fancy ways. I'm just happy I can get in and out of the= editor :-) From xen-devel-bounces@lists.xenproject.org Thu May 21 14:14:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 14:14:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315260.1585086 (Exim 4.92) (envelope-from ) id 1wQ49s-0002gS-LV; Thu, 21 May 2026 14:13:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315260.1585086; Thu, 21 May 2026 14:13:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ49s-0002gL-Iq; Thu, 21 May 2026 14:13:56 +0000 Received: by outflank-mailman (input) for mailman id 1315260; Thu, 21 May 2026 14:13:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ49p-0002gF-Ds for xen-devel@lists.xenproject.org; Thu, 21 May 2026 14:13:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ49n-007tvp-7W for xen-devel@lists.xenproject.org; Thu, 21 May 2026 16:13:51 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f1310-e002-0a2a0a5209dd-0a2a45018118-16 for ; Thu, 21 May 2026 16:13:50 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f131d-c1f2-0a2a45010019-5a9b3222dce0-3 for ; Thu, 21 May 2026 16:13:49 +0200 Received: from 54-240-197-239.amazon.com ([54.240.197.239] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQ49a-00000008Zoj-333x; Thu, 21 May 2026 14:13:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=Ma4rUXxctxkBftmjMkUa1ZjNAzu1G4mVje5WD9fbAWQ=; b=CSe7eIl3b9aaKU3qvbReR7GGlx TvFYVP+wbeuYlAI6cAn2jdlkw0yqpFub5sWNPQghqq18UMXyDmvmuuGjf2wgJ/7aUedA3wf+XZtg8 QuDlLJmdEedu/ZAx2g6D4kwFpgXbVAnC6lIEho0XzXjHYPWGD07pN9WW4VGTrBH3Q3jWU4pa2uUon phWtYIwJitJTjVUKaZLrfVfWZlx4wmJ1oGiaY3Vrggo1gK9O5Ex50Iz6MlEhhr2ZtFM9ab8IWHn6/ gvrmLjB3inwVsMPCOtkjq1d2NWIb+P1kLFDGXJqHbtHBRgX3/HzVyxucukR1qdEVr0GzxxVDPBUP1 SVeYlqIw==; Message-ID: <6d37802ec33601d6be0eb648156e985545b2364a.camel@infradead.org> Subject: Re: [PATCH v3 27/41] x86/kvmclock: Enable kvmclock on APs during onlining if kvmclock isn't sched_clock From: David Woodhouse To: Sean Christopherson , Peter Zijlstra Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 15:13:37 +0100 In-Reply-To: References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-28-seanjc@google.com> <423b37f056f0d4d596d5f4cc73802fb1079ecf63.camel@infradead.org> <20260521131019.GI3126523@noisy.programming.kicks-ass.net> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-/luWii/cRDq/zhkGKorZ" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1779372830-B4D49FF4-9E84712B/0/0 X-purgate-type: clean X-purgate-size: 9790 --=-/luWii/cRDq/zhkGKorZ Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2026-05-21 at 06:38 -0700, Sean Christopherson wrote: > On Thu, May 21, 2026, Peter Zijlstra wrote: > > On Thu, May 21, 2026 at 05:59:17AM -0700, Sean Christopherson wrote: > > > On Thu, May 21, 2026, David Woodhouse wrote: > > > > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > > > > In anticipation of making x86_cpuinit.early_percpu_clock_init(), = i.e. > > > > > kvm_setup_secondary_clock(), a dedicated sched_clock hook that wi= ll be > > > > > invoked if and only if kvmclock is set as sched_clock, ensure APs= enable > > > > > their kvmclock during CPU online.=C2=A0 While a redundant write t= o the MSR is > > > > > technically ok, skip the registration when kvmclock is sched_cloc= k so that > > > > > it's somewhat obvious that kvmclock *needs* to be enabled during = early > > > > > bringup when it's being used as sched_clock. > > > > >=20 > > > > > Plumb in the BSP's resume path purely for documentation purposes.= =C2=A0 Both > > > > > KVM (as-a-guest) and timekeeping/clocksource hook syscore_ops, an= d it's > > > > > not super obvious that using KVM's hooks would be flawed.=C2=A0 E= .g. it would > > > > > work today, because KVM's hooks happen to run after/before timeke= eping's > > > > > hooks during suspend/resume, but that's sheer dumb luck as the or= der in > > > > > which syscore_ops are invoked depends entirely on when a subsyste= m is > > > > > initialized and thus registers its hooks. > > > > >=20 > > > > > Opportunsitically make the registration messages more precise to = help > > > > > debug issues where kvmclock is enabled too late. > > > >=20 > > > > That's a hard word to type, isn't it? > > >=20 > > > Heh, you have no idea.=C2=A0 I've been "this" close to creating a VIM= binding for a > > > while, it is time... > >=20 > > 'z=3D' not good enough? >=20 > You people and your fancy ways.=C2=A0 I'm just happy I can get in and out= of the editor :-) I reached the peak of my vi knowledge in about 1995 when I learned that I could log in on another terminal, kill it from there, and then set EDITOR=3Demacs. Ironically I still find myself doing that kind of thing when I'm composing a git-send-email cover letter and decide I don't want to send the series as-is at all. Maybe there's a way to put a poison pill in the message (or save it unchanged?) to make git *NOT* send anything... but I always err on the side of caution and just nuke it from orbit, or at least from another terminal. --=-/luWii/cRDq/zhkGKorZ Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et 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sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 3D79C4EE3D8A; Thu, 21 May 2026 16:24:51 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779373492; b=2nJZJvCDfthLX3d/AywBUR82gf+zpaZt+Fjn+/N/jhLvD0mnN1Nu0D+AMW1e7yqDNHnB vRAzuYnzuUII+0W8TSJsLTntHvN3EjXoLZVvNWMDRFiU3A+PBjokLkI0at6FD5O2FspV3 TFA4vP9MJLQA7wqVvCSVRblsq0+xazQO6aUBkOYZV8udEBYaxTrqqwiVmWU+SIDvMau/H F4liOyiVC8GkOU5Gd36O6+9KikKUq8/1XZ9uUdv28fCWP4mSVCqkRRRdk50CkEB9qZWCH j5AMFh2YUO1+n72putv2R2pBNKn+/nBLYzhV1149apiVXsjqJ74FmOpVHBkg/Xb2VgDQI qrILVW98IjzsybiCiAe0CpizqoH1h4Zg0nVEQyUIRZYM1/G516EM1P4V4XdLQYVAp1yP5 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oVyZwHj5W4u6etNqMZTuQgQhdKwXlMqiOCzONMmJNsM3bOmdWDq33VgNEKrvDr5vhwKUh eBp/qNdCvArEW2hxlCJlHR83zX0JasljVvmMgtFfe20aIcWjCrfVBNgcpcvM4v3rMeiu4 enZk2qtxu91ZOyAbn1i4yvDJT86VrH1ZE12H1Gs8UOvPfPaPWxWOeNBtN2SIwSnrTswmL kLP8KIwMitCCS+S9K65wRGl1cDwuX+XqOGySjxYUdLbApeRyE72Mkl4XQ76JCj8= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Thu, 21 May 2026 16:24:51 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH 1/2] x86/time: address Misra C:2012 rule 8.3 In-Reply-To: <09e58463-4eda-46da-83e0-bc66c84afb25@suse.com> References: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> <09e58463-4eda-46da-83e0-bc66c84afb25@suse.com> Message-ID: <1b9724be44ac321a7efa0852014312f6@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779373492-19364F3B-B24F2715/0/0 X-purgate-type: clean X-purgate-size: 2229 On 2026-05-21 14:26, Jan Beulich wrote: > Before we can enable scanning of time.c, it needs to be clean wrt > blocking > rules. Bring boot_tsc_stamp's definition in line with its declaration. > For > get_s_time_fixed() go a little farther and move it to the x86 header > (the > function only exists in x86) and do, along with correcting the > parameter > name, the u64 -> uint64_t a little more widely than strictly necessary. > > Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini > --- a/xen/arch/x86/include/asm/time.h > +++ b/xen/arch/x86/include/asm/time.h > @@ -13,6 +13,8 @@ static inline cycles_t get_cycles(void) > return rdtsc_ordered(); > } > > +s_time_t get_s_time_fixed(uint64_t at_tsc); > + > unsigned long > mktime (unsigned int year, unsigned int mon, > unsigned int day, unsigned int hour, > --- a/xen/arch/x86/time.c > +++ b/xen/arch/x86/time.c > @@ -95,7 +95,7 @@ static u32 pit_stamp32; > static bool __read_mostly using_pit; > > /* Boot timestamp, filled in head.S */ > -u64 __initdata boot_tsc_stamp; > +uint64_t __initdata boot_tsc_stamp; > > /* Per-socket TSC_ADJUST values, for secondary cores/threads to sync > to. */ > static uint64_t *__read_mostly tsc_adjust; > @@ -1656,10 +1656,10 @@ static unsigned long get_wallclock_time( > * System Time > > ***************************************************************************/ > > -s_time_t get_s_time_fixed(u64 at_tsc) > +s_time_t get_s_time_fixed(uint64_t at_tsc) > { > const struct cpu_time *t = &this_cpu(cpu_time); > - u64 tsc, delta; > + uint64_t tsc, delta; > > if ( at_tsc ) > tsc = at_tsc; > --- a/xen/include/xen/time.h > +++ b/xen/include/xen/time.h > @@ -33,7 +33,6 @@ struct vcpu; > typedef int64_t s_time_t; > #define PRI_stime PRId64 > > -s_time_t get_s_time_fixed(u64 at_tick); > s_time_t get_s_time(void); > unsigned long get_localtime(struct domain *d); > uint64_t get_localtime_us(struct domain *d); -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Thu May 21 14:26:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 14:26:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315283.1585104 (Exim 4.92) (envelope-from ) id 1wQ4LX-0005bo-Ul; Thu, 21 May 2026 14:25:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315283.1585104; Thu, 21 May 2026 14:25:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ4LX-0005bh-S3; Thu, 21 May 2026 14:25:59 +0000 Received: by outflank-mailman (input) for mailman id 1315283; Thu, 21 May 2026 14:25:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ4LW-0005bW-8T for xen-devel@lists.xenproject.org; Thu, 21 May 2026 14:25:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ4LV-00B8Ai-Kz for xen-devel@lists.xenproject.org; Thu, 21 May 2026 16:25:57 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f15f2-e002-0a2a0a5209dd-0a2a450aa83a-16 for ; Thu, 21 May 2026 16:25:57 +0200 Received: from [162.55.131.47] (helo=support.bugseng.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f15f5-56b3-0a2a450a0019-a237832fa9c2-3 for ; Thu, 21 May 2026 16:25:57 +0200 Received: from support.bugseng.com (support.bugseng.com [162.55.131.47]) (Authenticated sender: nicola) by support.bugseng.com (Postfix) with ESMTPA id 5515F4EE3FFD; Thu, 21 May 2026 16:25:57 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none Authentication-Results: bugseng.com; arc=none smtp.remote-ip=162.55.131.47 ARC-Seal: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; cv=none; t=1779373557; b=aE7aC+DuA42lS5q/Bg/smYtOC5vKwnG3cKYbSl8ybREkIDp3bfQG/U7kR22US7UCH4j2 f7LwO+eYuQK1+2MdfVwY9PlxHkC/izmdD+bxsmStk06gfAKZOILtlyXir4paqIDpOWYoB KWBUxcHbagvGwI+WgKh6eIPUa8WU9xzbOUgiCE9VZ6dd60xn1U6uenAJt5Si+kTpAGnBn OzcP45NBWFQcs2v6AVCNJli4KIpu4Hn9YvyOWpMYZJaCABQzO2yKy0pMZo3sBEJpPtQb6 qgwapN2cq/n8Na2XUjeFdXyoZpzcMUuXIRD5AjBNihdNVfAoUFLTzd83nvRwnO8M6Ncj6 IjCO3AMnN5M/rOCaO2O12b4miVThlbzXkwhcxYZoCY2/+9aJ3a1a5GzsVcuWV1kVr87jP 7qGHYEroIIolMNQEeg5uh3rumvX4Z4r+Tl/aIckD8+Y2d3It6BY0Y6vJ1mR7GYj4YjTA+ cKqe9u3/PkEE966uPB10ETFNvHQA18F9fjLmAV++odMkxLGeLdhlkJEjGaEHvs7wPzH3K yaehrYNBpzaHwl69tsGgDT75p3PqZW1Ys2890m3GZU/pEuR39M4u86g392jrY73mNhFlH i8v7wrKgh0Pomtx2KsffumJKNSdcxNijuaCtNNjuP4HOeHT9FCE1Tc7axBiMnj4= ARC-Message-Signature: i=1; d=bugseng.com; s=openarc; a=rsa-sha256; c=relaxed/relaxed; t=1779373557; h=MIME-Version:Date:From:To:Cc:Subject:In-Reply-To:References: Message-ID:X-Sender:Organization:Content-Type: Content-Transfer-Encoding; bh=dp/o+oIXXcCCQ2xcGMfkA4KluUYXWS+QdJHoSLMHecE=; b=CaYo8076vqgDTd9d4Xs2H0OjHDP805kxsoPEyDVuhUqKGfKwYNgeLBInda7upCdIHTv8 WC2rCj+botuDSvbihAT+abFhyl7nbKQNIeEbnAPvonmI3K9RtP1SeQAH27xryUIdm99qW xR8v+IE/KU5Q62+aVP5iKQfgNJRlOcxoPhwFzVq0JNjFN+/mQ2HkG+at/n7RUem5pAMXZ D/LoFnhZB7Ce7ootsposjq92qjeTcz/e/PFzMkv1vtgOLaiL58zDtZG5uxm8kTUqvS76X WELid01B3ZqEmOLOOe+NYjsTnlbX0AnyocLTMnwYzeNpiUHpcoiLemCnVo8VarEMT8/WS mrQxd8M5wHOMrTslqWcrjZFMUnzJo3lMwCntOdAEhkmio73bew6fbR1/RhCmU41ipOyED 6Q0IUd00UkOjtP56Lfj0j1J1Gny+ztc0fFE6RNLqQxvpIGBbBJ1khV2Q+nNpRenL0P+Pn LxDykfS6Rg0DuZvddcaRQ6o7Sa5/VthbP7fRwofkLJZfhcHmDPrWDTcVnW0cxfJHMzZev /5WvF6SePu0ZuIR19hXFKXNsYIazYuq8OJoXG2Z/knCMlKecvd+EFlPR6SS8Q6nk7sChh f27kq0iD7i0GqNoct6vRQsKX7GOPHh/U2miG0LXpOIalTVc0vb8d/gk2dEG1Ej0= ARC-Authentication-Results: i=1; bugseng.com; arc=none smtp.remote-ip=162.55.131.47 MIME-Version: 1.0 Date: Thu, 21 May 2026 16:25:57 +0200 From: Nicola Vetrini To: Jan Beulich Cc: xen-devel@lists.xenproject.org, Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH 2/2] x86/time: don't exclude from Eclair scanning In-Reply-To: <81995cf4-19f4-4146-aea7-d3e57609aa2a@suse.com> References: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> <81995cf4-19f4-4146-aea7-d3e57609aa2a@suse.com> Message-ID: <3fd25161430c25f855fe0ba291b5bebf@bugseng.com> X-Sender: nicola.vetrini@bugseng.com Organization: BUGSENG s.r.l. Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1779373557-7D7878B7-BBA745B5/0/0 X-purgate-type: clean X-purgate-size: 1280 On 2026-05-21 14:27, Jan Beulich wrote: > The justification is wrong, and the file hence shouldn't really be > excluded. > > Signed-off-by: Jan Beulich > Reviewed-by: Nicola Vetrini Thanks for addressing this > --- a/automation/eclair_analysis/ECLAIR/deviations.ecl > +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl > @@ -214,11 +214,6 @@ const-qualified." > -doc_end > > -doc_begin="The following file is imported from Linux: ignore for > now." > --file_tag+={adopted_time_r8_3,"^xen/arch/x86/time\\.c$"} > --config=MC3A2.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_time_r8_3)))&&(any_area(any_loc(file(^xen/include/xen/time\\.h$)))||any_area(any_loc(file(^xen/arch/x86/include/asm/setup\\.h$))))"} > --doc_end > - > --doc_begin="The following file is imported from Linux: ignore for > now." > -file_tag+={adopted_cpu_idle_r8_3,"^xen/arch/x86/acpi/cpu_idle\\.c$"} > > -config=MC3A2.R8.3,reports+={deliberate,"any_area(any_loc(file(adopted_cpu_idle_r8_3)))&&any_area(any_loc(file(^xen/include/xen/pmstat\\.h$)))"} > -doc_end -- Nicola Vetrini, B.Sc. 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0/2] x86: don't exclude time.c from scanning From: Jan Beulich To: Oleksii Kurochko Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , Nicola Vetrini , "xen-devel@lists.xenproject.org" References: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2ad2b572-45b4-42a5-9b7a-80eebfacc80e@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779374090-39D7B938-62073F65/0/0 X-purgate-type: clean X-purgate-size: 329 On 21.05.2026 14:25, Jan Beulich wrote: > 1: x86/time: address Misra C:2012 rule 8.3 > 2: x86/time: don't exclude from Eclair scanning > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2543286982 With the quick R-b from Nicola (thanks much!), what's you're view towards including this in 4.22? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <66ca7f49756740c3d54ac660bebf406479ed011e.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1779375427-F4C79CF5-7C71E9F1/10/73395122804 X-purgate-type: spam X-purgate-size: 1248 On 08.05.2026 16:43, Oleksii Kurochko wrote: > aia_init() is going to contain all the logic related to AIA initialization. > > At the moment, it only checks whether the SSAIA extension is available, > and if so, sets is_aia_usable (which indicates more than just the > availability of the extension) to true; it also signifies that the necessary > components (to be introduced in follow-up patches) have been initialized. > > Signed-off-by: Oleksii Kurochko Acked-by: Jan Beulich albeit again with a comment for consideration: > --- /dev/null > +++ b/xen/arch/riscv/aia.c > @@ -0,0 +1,23 @@ > +/* SPDX-License-Identifier: GPL-2.0-only */ > + > +#include > +#include > +#include > +#include > + > +#include > + > +static bool __ro_after_init is_aia_usable; While in an if() the is_ prefix may make sense, in most other uses (all of the ones below, imo) it is of questionable value. I'd suggest to drop it, but of course with the then leading underscore retained, to ... > +bool aia_usable(void) > +{ > + return is_aia_usable; > +} ... not conflict with this function. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <61291bec7664e780f122ccf438091dfc1aba99e3.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779376318-38D73938-800B9F2B/0/0 X-purgate-type: clean X-purgate-size: 5715 On 08.05.2026 16:43, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/aia.c > +++ b/xen/arch/riscv/aia.c > @@ -1,11 +1,33 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > +#include > #include > #include > #include > +#include > +#include > #include > +#include > > +#include > #include > +#include > +#include > + > +struct vgein_ctrl { > + unsigned long bmp; > + spinlock_t lock; > + struct vcpu **owners; > + /* The least-significant bits are implemented first, apart from bit 0 */ > + unsigned int geilen; > +}; > + > +/* > + * Bitmap for each physical cpus to detect which VS (guest) > + * interrupt file id was used. > + */ > +static DEFINE_PER_CPU(struct vgein_ctrl, vgein); Why "Bitmap" in the comment? > @@ -14,10 +36,132 @@ bool aia_usable(void) > return is_aia_usable; > } > > +static int vgein_init(unsigned int cpu) > +{ > + struct vgein_ctrl *vgein = &per_cpu(vgein, cpu); > + > + csr_write(CSR_HGEIE, -1UL); > + vgein->geilen = flsl(csr_read(CSR_HGEIE) >> 1); > + csr_write(CSR_HGEIE, 0); > + > + printk("cpu%d.geilen=%u\n", cpu, vgein->geilen); %u please with unsigned int. > + if ( !vgein->geilen ) > + return -EOPNOTSUPP; > + > + vgein->owners = xvzalloc_array(struct vcpu *, vgein->geilen); > + if ( !vgein->owners ) > + return -ENOMEM; > + > + spin_lock_init(&vgein->lock); > + > + return 0; > +} > + > +static int cf_check cpu_callback(struct notifier_block *nfb, unsigned long action, > + void *hcpu) > +{ > + unsigned int cpu = (unsigned long)hcpu; > + int rc = 0; > + > + switch ( action ) > + { > + case CPU_STARTING: > + rc = vgein_init(cpu); > + if ( rc ) > + printk("AIA: failed to init vgein for CPU%un", cpu); Looks like there's \ missing ahead of the trailing 'n'. > + break; > + } > + > + return notifier_from_errno(rc); > +} > + > +static struct notifier_block cpu_nfb = { > + .notifier_call = cpu_callback, > +}; > + > void __init aia_init(void) > { > + int rc; > + > if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) > + { > + dprintk(XENLOG_WARNING, "SSAIA isn't present in riscv,isa\n"); > + return; > + } > + > + if ( (rc = vgein_init(0)) ) > + { > + dprintk(XENLOG_ERR, "vgein_init() failed with rc(%d)\n", rc); Messages like this one, provided they're really needed, should be yet more terse imo: "vgein_init() failed: %d\n". > return; > + } > > is_aia_usable = true; > + > + register_cpu_notifier(&cpu_nfb); > +} > + > +unsigned int vgein_assign(struct vcpu *v) > +{ > + unsigned int vgein_id; > + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); > + unsigned long *bmp = &vgein->bmp; > + unsigned long flags; > + > + spin_lock_irqsave(&vgein->lock, flags); > + /* > + * The vgein_id shouldn't be zero, as it will indicate that no guest > + * external interrupt source is selected for VS-level external interrupts > + * according to RISC-V priviliged spec: > + * Hypervisor Status Register (hstatus) in RISC-V priviliged spec: > + * > + * The VGEIN (Virtual Guest External Interrupt Number) field selects > + * a guest external interrupt source for VS-level external interrupts. > + * VGEIN is a WLRL field that must be able to hold values between zero > + * and the maximum guest external interrupt number (known as GEILEN), > + * inclusive. > + * When VGEIN=0, no guest external interrupt source is selected for > + * VS-level external interrupts. > + * > + * So start to search from bit number 1. > + */ > + vgein_id = find_next_zero_bit(bmp, vgein->geilen + 1, 1); > + > + if ( vgein_id > vgein->geilen ) > + vgein_id = 0; > + else > + __set_bit(vgein_id, bmp); > + > + spin_unlock_irqrestore(&vgein->lock, flags); > + > +#ifdef VGEIN_DEBUG > + gprintk(XENLOG_DEBUG, "%s: %pv: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", > + __func__, v, vgein_id, v->processor, *bmp); %d vs unsigned int again (and then yet again further down). > +#endif > + > + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; Is this needed when vgein_release() also does it? > + vcpu_guest_cpu_user_regs(v)->hstatus |= > + MASK_INSR(vgein_id, HSTATUS_VGEIN); > + > + return vgein_id; > +} > + > +void vgein_release(struct vcpu *v, unsigned int vgen_id) > +{ > + unsigned long flags; > + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); > + > + if ( !vgen_id ) > + return; > + > + spin_lock_irqsave(&vgein->lock, flags); > + __clear_bit(vgen_id, &vgein->bmp); > + spin_unlock_irqrestore(&vgein->lock, flags); > + > +#ifdef VGEIN_DEBUG > + gprintk(XENLOG_DEBUG, "%s: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", > + __func__, vgen_id, v->processor, vgein->bmp); > +#endif > + > + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; > } Overall: How is one to review these two functions, when it's entirely unclear where they're going to be called from? Among other aspects it doesn't become clear what the behavior is going to be when vgein_assign() doesn't find an available ID. I've therefore only commented on mechanical aspects I noticed. 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Thu, 21 May 2026 08:14:46 -0700 (PDT) Message-ID: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Date: Thu, 21 May 2026 17:14:45 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird From: Jan Beulich Subject: [PATCH 0/4] x86: Misra rule 13.6 To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779376486-BC766DB1-ED520447/0/0 X-purgate-type: clean X-purgate-size: 319 1: shadow: split get_unsafe() invocations 2: shadow: avoid sizeof(this_cpu(...)) 3: P2M: split a read_atomic() invocation 4: PV: split a get_unsafe() invocation This takes care of all 77(?) violations of this rule, according to https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2543797752. 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Thu, 21 May 2026 08:15:32 -0700 (PDT) Message-ID: Date: Thu, 21 May 2026 17:15:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 1/4] x86/shadow: split get_unsafe() invocations From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779376532-8B790A53-F1F82B1D/0/0 X-purgate-type: clean X-purgate-size: 4442 Misra C:2012 rule 13.6 takes issue with is_hvm_vcpu() uses (deep) inside sizeof(), as used by get_unsafe(). While sh_linear_l1_table() doesn't involve is_hvm_vcpu(), the rule there kicks in for "call to function `__builtin_expect(long, long)' (unevaluated `nothrow' call effect)". Break out the address calculations. This, overall, turns out to also improve generated code (with gcc15 at least). No functional change intended. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -2197,16 +2197,19 @@ static int cf_check sh_page_fault( #if (SHADOW_OPTIMIZATIONS & SHOPT_FAST_FAULT_PATH) if ( (regs->error_code & PFEC_reserved_bit) ) { + const shadow_l1e_t *psl1e; + #if (SHADOW_OPTIMIZATIONS & SHOPT_OUT_OF_SYNC) /* First, need to check that this isn't an out-of-sync * shadow l1e. If it is, we fall back to the slow path, which * will sync it up again. */ { shadow_l2e_t sl2e; + const shadow_l2e_t *psl2e = sh_linear_l2_table(v) + + shadow_l2_linear_offset(va); mfn_t gl1mfn; - if ( (get_unsafe(sl2e, - (sh_linear_l2_table(v) + - shadow_l2_linear_offset(va))) != 0) + + if ( (get_unsafe(sl2e, psl2e) != 0) || !(shadow_l2e_get_flags(sl2e) & _PAGE_PRESENT) || !mfn_valid(gl1mfn = backpointer(mfn_to_page( shadow_l2e_get_mfn(sl2e)))) @@ -2222,9 +2225,8 @@ static int cf_check sh_page_fault( #endif /* SHOPT_OUT_OF_SYNC */ /* The only reasons for reserved bits to be set in shadow entries * are the two "magic" shadow_l1e entries. */ - if ( likely((get_unsafe(sl1e, - (sh_linear_l1_table(v) + - shadow_l1_linear_offset(va))) == 0) + psl1e = sh_linear_l1_table(v) + shadow_l1_linear_offset(va); + if ( likely((get_unsafe(sl1e, psl1e) == 0) && sh_l1e_is_magic(sl1e)) ) { @@ -2879,6 +2881,7 @@ static bool cf_check sh_invlpg(struct vc { mfn_t sl1mfn; shadow_l2e_t sl2e; + const shadow_l2e_t *psl2e; perfc_incr(shadow_invlpg); @@ -2897,6 +2900,9 @@ static bool cf_check sh_invlpg(struct vc #if SHADOW_PAGING_LEVELS == 4 { shadow_l3e_t sl3e; + const shadow_l3e_t *psl3e = sh_linear_l3_table(v) + + shadow_l3_linear_offset(linear); + if ( !(shadow_l4e_get_flags( sh_linear_l4_table(v)[shadow_l4_linear_offset(linear)]) & _PAGE_PRESENT) ) @@ -2904,9 +2910,7 @@ static bool cf_check sh_invlpg(struct vc /* This must still be a copy-from-unsafe because we don't have the * paging lock, and the higher-level shadows might disappear * under our feet. */ - if ( get_unsafe(sl3e, - (sh_linear_l3_table(v) + - shadow_l3_linear_offset(linear))) != 0 ) + if ( get_unsafe(sl3e, psl3e) != 0 ) { perfc_incr(shadow_invlpg_fault); return false; @@ -2925,9 +2929,8 @@ static bool cf_check sh_invlpg(struct vc /* This must still be a copy-from-unsafe because we don't have the shadow * lock, and the higher-level shadows might disappear under our feet. */ - if ( get_unsafe(sl2e, - (sh_linear_l2_table(v) + - shadow_l2_linear_offset(linear))) != 0 ) + psl2e = sh_linear_l2_table(v) + shadow_l2_linear_offset(linear); + if ( get_unsafe(sl2e, psl2e) != 0 ) { perfc_incr(shadow_invlpg_fault); return false; @@ -2968,9 +2971,7 @@ static bool cf_check sh_invlpg(struct vc * have the paging lock last time we checked, and the * higher-level shadows might have disappeared under our * feet. */ - if ( get_unsafe(sl2e, - (sh_linear_l2_table(v) + - shadow_l2_linear_offset(linear))) != 0 ) + if ( get_unsafe(sl2e, psl2e) != 0 ) { perfc_incr(shadow_invlpg_fault); paging_unlock(d); From xen-devel-bounces@lists.xenproject.org Thu May 21 15:15:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:15:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315350.1585159 (Exim 4.92) (envelope-from ) id 1wQ57q-0000yp-G7; Thu, 21 May 2026 15:15:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315350.1585159; Thu, 21 May 2026 15:15:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ57q-0000yP-Bs; Thu, 21 May 2026 15:15:54 +0000 Received: by outflank-mailman (input) for mailman id 1315350; Thu, 21 May 2026 15:15:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ57o-0000wa-MI for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:15:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ57o-003RkT-2S for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:15:52 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f21a1-5cb7-0a2a0a5109dd-0a2a4506e020-24 for ; Thu, 21 May 2026 17:15:52 +0200 Received: from [209.85.128.42] (helo=mail-wm1-f42.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f21a7-7371-0a2a45060019-d155802adcd2-3 for ; Thu, 21 May 2026 17:15:52 +0200 Received: by mail-wm1-f42.google.com with SMTP id 5b1f17b1804b1-48909558b3aso64242765e9.0 for ; Thu, 21 May 2026 08:15:51 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-16d1c6/1779376552-7F77FD75-61876E58/0/0 X-purgate-type: clean X-purgate-size: 1607 Misra C:2012 rule 13.6 takes issue with RELOC_HIDE() uses inside sizeof(), as used by this_cpu(). Latch the address of the per-CPU variable into a local variable, and use that in the two sizeof(). No difference in generated code for 2- and 4-level code. There's a small improvement for the 3-level case. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -2057,22 +2057,24 @@ static DEFINE_PER_CPU(guest_l1e_t, trace static void cf_check trace_emulate_write_val( const void *ptr, unsigned long vaddr, const void *src, unsigned int bytes) { - if ( bytes > sizeof(this_cpu(trace_emulate_write_val)) ) - bytes = sizeof(this_cpu(trace_emulate_write_val)); + guest_l1e_t *pval = &this_cpu(trace_emulate_write_val); + + if ( bytes > sizeof(*pval) ) + bytes = sizeof(*pval); #if GUEST_PAGING_LEVELS == 3 if ( vaddr == this_cpu(trace_emulate_initial_va) ) - memcpy(&this_cpu(trace_emulate_write_val), src, bytes); + memcpy(pval, src, bytes); else if ( (vaddr & ~(GUEST_PTE_SIZE - 1)) == this_cpu(trace_emulate_initial_va) ) { TRACE_SHADOW_PATH_FLAG(TRCE_SFLAG_EMULATE_FULL_PT); - memcpy(&this_cpu(trace_emulate_write_val), + memcpy(pval, (typeof(ptr))((unsigned long)ptr & ~(GUEST_PTE_SIZE - 1)), GUEST_PTE_SIZE); } #else - memcpy(&this_cpu(trace_emulate_write_val), src, bytes); + memcpy(pval, src, bytes); #endif } #endif /* CONFIG_TRACEBUFFER */ From xen-devel-bounces@lists.xenproject.org Thu May 21 15:16:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:16:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315357.1585168 (Exim 4.92) (envelope-from ) id 1wQ58B-0001TJ-Nm; Thu, 21 May 2026 15:16:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315357.1585168; Thu, 21 May 2026 15:16:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ58B-0001TC-Kq; Thu, 21 May 2026 15:16:15 +0000 Received: by outflank-mailman (input) for mailman id 1315357; Thu, 21 May 2026 15:16:14 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ58A-0001Si-IV for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:16:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ589-003Yqh-VT for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:16:13 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f21b8-2eae-0a2a0a5409dd-0a2a4503c630-8 for ; Thu, 21 May 2026 17:16:13 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f21bd-672d-0a2a45030019-d1558030e4b6-3 for ; Thu, 21 May 2026 17:16:13 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-490388fd0dbso7639275e9.0 for ; Thu, 21 May 2026 08:16:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 21 May 2026 08:16:13 -0700 (PDT) Message-ID: <80d2e824-e6ae-47c4-ba92-e023129ff209@suse.com> Date: Thu, 21 May 2026 17:16:11 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 3/4] x86/P2M: split a read_atomic() invocation From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779376573-40E68938-C04A9F94/0/0 X-purgate-type: clean X-purgate-size: 1122 Misra C:2012 rule 13.6 takes issue with pfn_to_pdx() and mfn_x() uses (deep) inside sizeof(), as used by read_atomic(). Break out the MFN -> struct page_info * translation. No difference in generated code, except for a line number change. Signed-off-by: Jan Beulich --- a/xen/arch/x86/mm/p2m.c +++ b/xen/arch/x86/mm/p2m.c @@ -1332,6 +1332,7 @@ int set_shared_p2m_entry(struct domain * p2m_access_t a; p2m_type_t ot; mfn_t omfn; + const struct page_info *pg; unsigned long pg_type; if ( !paging_mode_translate(p2m->domain) ) @@ -1345,7 +1346,8 @@ int set_shared_p2m_entry(struct domain * ASSERT(mfn_valid(omfn)); /* Set the m2p entry to invalid only if there are no further type * refs to this page as shared */ - pg_type = read_atomic(&(mfn_to_page(omfn)->u.inuse.type_info)); + pg = mfn_to_page(omfn); + pg_type = read_atomic(&pg->u.inuse.type_info); if ( (pg_type & PGT_count_mask) == 0 || (pg_type & PGT_type_mask) != PGT_shared_page ) set_gpfn_from_mfn(mfn_x(omfn), INVALID_M2P_ENTRY); From xen-devel-bounces@lists.xenproject.org Thu May 21 15:16:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:16:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315362.1585176 (Exim 4.92) (envelope-from ) id 1wQ58b-00022R-4e; Thu, 21 May 2026 15:16:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315362.1585176; Thu, 21 May 2026 15:16:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ58b-00021e-12; Thu, 21 May 2026 15:16:41 +0000 Received: by outflank-mailman (input) for mailman id 1315362; Thu, 21 May 2026 15:16:40 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ58a-00020x-3k for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:16:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ58Z-003Z2j-GX for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:16:39 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f21bb-2eae-0a2a0a5409dd-0a2a45088aba-42 for ; Thu, 21 May 2026 17:16:39 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f21d7-63b5-0a2a45080019-d155dd2dc9cf-3 for ; Thu, 21 May 2026 17:16:39 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44c350a5b87so3873316f8f.3 for ; Thu, 21 May 2026 08:16:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Thu, 21 May 2026 08:16:38 -0700 (PDT) Message-ID: Date: Thu, 21 May 2026 17:16:37 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: [PATCH 4/4] x86/PV: split a get_unsafe() invocation From: Jan Beulich To: "xen-devel@lists.xenproject.org" Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Language: en-US Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c1860d/1779376599-BF57FDB1-E5F5B64C/0/0 X-purgate-type: clean X-purgate-size: 748 Misra C:2012 rule 13.6 takes issue with the gdt_ldt_desc_ptr() call appearing (deep) inside sizeof(), as used by get_unsafe(). No functional change intended. Signed-off-by: Jan Beulich --- a/xen/arch/x86/pv/emulate.c +++ b/xen/arch/x86/pv/emulate.c @@ -29,8 +29,14 @@ int pv_emul_read_descriptor(unsigned int */ ((sel & 4) && (sel >> 3) >= v->arch.pv.ldt_ents) ) desc.b = desc.a = 0; - else if ( get_unsafe(desc, gdt_ldt_desc_ptr(sel)) ) - return 0; + else + { + const seg_desc_t *pdesc = gdt_ldt_desc_ptr(sel); + + if ( get_unsafe(desc, pdesc) ) + return 0; + } + if ( !insn_fetch ) desc.b &= ~_SEGMENT_L; From xen-devel-bounces@lists.xenproject.org Thu May 21 15:24:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:24:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315382.1585186 (Exim 4.92) (envelope-from ) id 1wQ5Ff-0004VA-Pq; Thu, 21 May 2026 15:23:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315382.1585186; Thu, 21 May 2026 15:23:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Ff-0004V3-N6; Thu, 21 May 2026 15:23:59 +0000 Received: by outflank-mailman (input) for mailman id 1315382; Thu, 21 May 2026 15:23:58 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Fd-0004Uw-N5 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:23:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ5Fc-0036G1-Sy for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:23:56 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f2386-5cb7-0a2a0a5109dd-0a2a4509e4da-6 for ; Thu, 21 May 2026 17:23:55 +0200 Received: from [217.140.110.172] (helo=foss.arm.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTP (eXpurgate 4.56.1) (envelope-from ) id 6a0f238a-2497-0a2a45090019-d98c6eacdb88-1 for ; Thu, 21 May 2026 17:23:55 +0200 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4DC8A3AEC; Thu, 21 May 2026 08:23:49 -0700 (PDT) Received: from e125770.cambridge.arm.com (e125770.arm.com [10.1.199.43]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 2B1893F7B4; Thu, 21 May 2026 08:23:53 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=foss header.d=arm.com header.i="@arm.com" header.h="From:To:Cc:Subject:Date" DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1779377034; bh=ZLS2R0ODszTvUfzv4/d3UVm1fR2E1lJ3y4YDzpaln+Y=; h=From:To:Cc:Subject:Date:From; b=GGENntoz+mw/BDQBdp0U7LAS3cINuxj5V+T37s7xnymFs/faiVL6+vFy8xp5m0kn3 v6MfRNKI3cCiFJHiYOKZ0xD8jON7O22JdCWdSyW3uXg5VVcLJhO1JkgBXPUOic8xmJ xdVTHvOSgOnkrnyCl3RvaQJ7hzu7+5GdeZJwe4L4= From: Luca Fancellu To: xen-devel@lists.xenproject.org Cc: Anthony PERARD , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Andrew Cooper , Oleksii Kurochko Subject: [PATCH] tools/tests: Fix paging-mempool xen_pfn_t format strings Date: Thu, 21 May 2026 16:23:44 +0100 Message-Id: <20260521152344.2050899-1-luca.fancellu@arm.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779377035-8A18BA53-4B5C5189/0/0 X-purgate-type: clean X-purgate-size: 1575 xen_pfn_t is not an unsigned long on all architectures. In particular, Arm32 builds see it as a 64-bit type, so printing it with %lx triggers a -Werror=format build failure. Use PRI_xen_pfn for the GFN diagnostics instead. Fixes: 66c982a5d3614 ("tests/paging-mempool: Extend to test P2M relocation") Signed-off-by: Luca Fancellu --- tools/tests/paging-mempool/test-paging-mempool.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/tools/tests/paging-mempool/test-paging-mempool.c b/tools/tests/paging-mempool/test-paging-mempool.c index 3c87925288f1..9dd605f1ab3e 100644 --- a/tools/tests/paging-mempool/test-paging-mempool.c +++ b/tools/tests/paging-mempool/test-paging-mempool.c @@ -208,7 +208,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) if ( errs[i] ) { rc = -1; - fail(" Fail: check mark unable to map gfn %05lx: %d\n", + fail(" Fail: check mark unable to map gfn %05"PRI_xen_pfn": %d\n", gfns[i], errs[i]); continue; } @@ -216,7 +216,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) if ( *mark == exp ) continue; - fail(" Fail: check mark: gfn %05lx expecting %08x (%u), got %08x (%u)\n", + fail(" Fail: check mark: gfn %05"PRI_xen_pfn" expecting %08x (%u), got %08x (%u)\n", gfns[i], exp, ~exp, *mark, ~*mark); rc = -1; } -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Thu May 21 15:24:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:24:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315383.1585194 (Exim 4.92) (envelope-from ) id 1wQ5Ft-0004no-0A; Thu, 21 May 2026 15:24:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315383.1585194; Thu, 21 May 2026 15:24:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Fs-0004nh-Tn; Thu, 21 May 2026 15:24:12 +0000 Received: by outflank-mailman (input) for mailman id 1315383; Thu, 21 May 2026 15:24:11 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Fq-0004mv-Ul for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:24:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ5Fq-0036JO-BH for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:24:10 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f2391-5cb7-0a2a0a5109dd-0a2a450ce70e-14 for ; Thu, 21 May 2026 17:24:10 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f239a-62f1-0a2a450c0019-d1558031b068-3 for ; Thu, 21 May 2026 17:24:10 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-49039a8851fso8598665e9.2 for ; Thu, 21 May 2026 08:24:10 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <2471b51e89aff30765433d88b1646c5b2c72b5c2.1778250616.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1779377050-F447DCF5-A61F50E1/0/0 X-purgate-type: clean X-purgate-size: 2541 On 08.05.2026 16:43, Oleksii Kurochko wrote: > --- a/xen/arch/riscv/imsic.c > +++ b/xen/arch/riscv/imsic.c > @@ -16,6 +16,7 @@ > #include > #include > #include > +#include > #include > #include > #include > @@ -56,6 +57,16 @@ do { \ > csr_clear(CSR_SIREG, v); \ > } while (0) > > +unsigned int vcpu_guest_file_id(const struct vcpu *v) > +{ > + return ACCESS_ONCE(v->arch.vimsic_state->guest_file_id); > +} > + > +void imsic_set_guest_file_id(const struct vcpu *v, unsigned int guest_file_id) Some people will demand that "const" be omitted in cases like this one, as it only works ... > +{ > + ACCESS_ONCE(v->arch.vimsic_state->guest_file_id) = guest_file_id; ... as long as vimsic_state is a pointer (and not a sub-structure). > @@ -312,6 +323,30 @@ static int imsic_parse_node(const struct dt_device_node *node, > return 0; > } > > +int vcpu_imsic_init(struct vcpu *v) > +{ > + struct vimsic_state *imsic_state; > + > + /* Allocate IMSIC context */ > + imsic_state = xvzalloc(struct vimsic_state); > + if ( !imsic_state ) > + return -ENOMEM; > + > + v->arch.vimsic_state = imsic_state; > + > + /* Setup IMSIC context */ > + rwlock_init(&imsic_state->vsfile_lock); > + > + imsic_state->vsfile_pcpu = NR_CPUS; > + > + return 0; > +} > + > +void vcpu_imsic_deinit(const struct vcpu *v) > +{ > + xvfree(v->arch.vimsic_state); Better XVFREE(), for the function to be idempotent. > --- a/xen/arch/riscv/include/asm/imsic.h > +++ b/xen/arch/riscv/include/asm/imsic.h > @@ -11,6 +11,7 @@ > #ifndef ASM_RISCV_IMSIC_H > #define ASM_RISCV_IMSIC_H > > +#include > #include > #include > #include > @@ -61,7 +62,24 @@ struct imsic_config { > spinlock_t lock; > }; > > +struct vimsic_state { > + /* IMSIC VS-file */ > + rwlock_t vsfile_lock; > + /* > + * (guest_file_id == 0) -> s/w IMSIC SW-file > + * (guest_file_id > 0) -> h/w IMSIC VS-file > + */ > + unsigned int guest_file_id; > + /* > + * (vsfile_pcpu >= 0) => h/w IMSIC VS-file > + * (vsfile_pcpu == NR_CPUS) => s/w IMSIC SW-file > + */ > + unsigned int vsfile_pcpu; > +}; In the comments, what does SW stand for? Not "software" I assume, as that's already expressed by s/w. Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 15:26:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:26:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315394.1585204 (Exim 4.92) (envelope-from ) id 1wQ5Hh-0005h2-CC; Thu, 21 May 2026 15:26:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315394.1585204; Thu, 21 May 2026 15:26:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Hh-0005gv-9U; Thu, 21 May 2026 15:26:05 +0000 Received: by outflank-mailman (input) for mailman id 1315394; Thu, 21 May 2026 15:26:04 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Hg-0005gp-S8 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:26:04 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wQ5Hg-00GbV1-2d for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:26:04 +0000 Received: from mail-lj1-f182.google.com ([209.85.208.182]) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wQ5Hg-00H2WN-2F for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:26:04 +0000 Received: by mail-lj1-f182.google.com with SMTP id 38308e7fff4ca-393a49d2e5eso56671591fa.2 for ; Thu, 21 May 2026 08:26:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=Content-Type:To:Subject:Message-ID:Date: From:MIME-Version; bh=B/dOMcUo+NynDZJBMEP2plK9/7TWgEZLokNt1WPfFwg=; b=FijcW0n gdU4Cyv7/9lVghVcm5TF29cIv9OXpfp/KgCdf6IL6ZkcCjDHJ7SM5V/WjFngGlQ3H7KUMbfqkzoA6 nJyaoh0gXkaHGIT6+Bvoy6nFhGZdTOhpBiBsVcXLGo4pqUQCQeA5VkUCul0bQJ5UxMg6ZLcwMRIig uwNKsUeTWA=; X-Gm-Message-State: AOJu0YyYTuufyDdqAnlPqNJ64+9iGDdD6zGrftGkcHwc9yV9S8OZXg1F o+HAhhhCuktj2PLm9fwxx7qJQ3GCKuhz2QmQ+moyT0Xz6t0RzNlFu3YEUHBDsPaPlWFUiucOO/x c2OeouXiSeG5FNI2jFjp5VkDMy5wsips= X-Received: by 2002:a2e:bcc4:0:b0:38e:9277:6990 with SMTP id 38308e7fff4ca-395ca6e11admr13909501fa.30.1779377163604; Thu, 21 May 2026 08:26:03 -0700 (PDT) MIME-Version: 1.0 From: Cody Zuschlag Date: Thu, 21 May 2026 17:25:52 +0200 X-Gmail-Original-Message-ID: X-Gm-Features: AVHnY4Ja9BPvrkTRP9WIlaWGceJ2-z25aQVdd_bhaQ6K8kc1j9JSUDJ7--uNFdY Message-ID: Subject: [DISCUSSION] AI-assisted patch attribution guidance To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="000000000000c218440652558789" --000000000000c218440652558789 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi all, During this week's committers call, there was a request to seek broader consensus among committers and maintainers before merging the proposed Assisted-by: documentation patch. The proposal is intentionally lightweight and focuses on: - optional disclosure of AI-assisted tooling usage - preserving contributor responsibility - clarifying that AI tools cannot certify the DCO / Signed-off-by: The current patch is inspired by similar Linux kernel guidance: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Doc= umentation/process/coding-assistants.rst Patch thread: https://lists.xenproject.org/archives/html/xen-devel/2026-05/msg00993.html At this stage, I=E2=80=99d mainly like to gather feedback on: - whether Xen wants to document an Assisted-by: tag - whether the proposed scope/wording feels appropriate - whether there are concerns with the general direction There was also discussion during the call about ensuring the Advisory Board has an opportunity to raise any concerns before merging. Thanks! Cody Zuschlag Xen Project - Community Manager --000000000000c218440652558789 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi all,

During this week's committers call= , there was a request to seek broader consensus among committers and mainta= iners before merging the proposed Assisted-by: documentation patch.

= The proposal is intentionally lightweight and focuses on:
- optional dis= closure of AI-assisted tooling usage
- preserving contributor responsibi= lity
- clarifying that AI tools cannot certify the DCO / Signed-off-by:<= br>
The current patch is inspired by similar Linux kernel guidance:
<= a href=3D"https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.gi= t/tree/Documentation/process/coding-assistants.rst">https://git.kernel.org/= pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/process/codi= ng-assistants.rst

Patch thread:
https://lists.xen= project.org/archives/html/xen-devel/2026-05/msg00993.html

At thi= s stage, I=E2=80=99d mainly like to gather feedback on:
- whether Xen wa= nts to document an Assisted-by: tag
- whether the proposed scope/wording= feels appropriate
- whether there are concerns with the general directi= on

There was also discussion during the call about ensuring the Advi= sory Board has an opportunity to raise any concerns before merging.

= Thanks!


Cody Zuschlag
Xen P= roject - Community Manager
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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260521152344.2050899-1-luca.fancellu@arm.com> Content-Type: text/plain; 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In particular, > Arm32 builds see it as a 64-bit type, so printing it with %lx triggers > a -Werror=format build failure. > > Use PRI_xen_pfn for the GFN diagnostics instead. > > Fixes: 66c982a5d3614 ("tests/paging-mempool: Extend to test P2M relocation") > Signed-off-by: Luca Fancellu Reviewed-by: Andrew Cooper From xen-devel-bounces@lists.xenproject.org Thu May 21 15:27:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:27:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315409.1585223 (Exim 4.92) (envelope-from ) id 1wQ5Iu-0006qY-W9; Thu, 21 May 2026 15:27:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315409.1585223; Thu, 21 May 2026 15:27:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5Iu-0006qR-Sa; Thu, 21 May 2026 15:27:20 +0000 Received: by outflank-mailman (input) for mailman id 1315409; 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While sh_linear_l1_table() doesn't > involve is_hvm_vcpu(), the rule there kicks in for "call to function > `__builtin_expect(long, long)' (unevaluated `nothrow' call effect)". > Break out the address calculations. > > This, overall, turns out to also improve generated code (with gcc15 at > least). No functional change intended. > > Signed-off-by: Jan Beulich Reviewed-by: Andrew Cooper Code generation is improved with GCC 12 as well. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 15:29:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 15:29:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315420.1585230 (Exim 4.92) (envelope-from ) id 1wQ5LJ-0007d7-AF; Thu, 21 May 2026 15:29:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315420.1585230; Thu, 21 May 2026 15:29:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5LJ-0007d0-7a; Thu, 21 May 2026 15:29:49 +0000 Received: by outflank-mailman (input) for mailman id 1315420; Thu, 21 May 2026 15:29:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5LH-0007ax-S8 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 15:29:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ5LG-00BMCF-Qg for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:29:46 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f24ea-5cb7-0a2a0a5109dd-0a2a4508a654-2 for ; Thu, 21 May 2026 17:29:46 +0200 Received: from [40.93.195.68] (helo=SN4PR2101CU001.outbound.protection.outlook.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f24e9-63b5-0a2a45080019-285dc3446a67-3 for ; Thu, 21 May 2026 17:29:46 +0200 Received: from CH8PR03MB8275.namprd03.prod.outlook.com (2603:10b6:610:2b9::7) by BY1PR03MB7310.namprd03.prod.outlook.com (2603:10b6:a03:52c::9) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.48.14; Thu, 21 May 2026 15:29:38 +0000 Received: from CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37]) by CH8PR03MB8275.namprd03.prod.outlook.com ([fe80::a70d:dc32:bba8:ce37%6]) with mapi id 15.21.0048.016; Thu, 21 May 2026 15:29:38 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=citrix.com header.i="@citrix.com" header.h="From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=cwjlBOWJq2iyGR77f/p0fUsUNB3970w3PRi8AANyAhqec8AvWyG2sG7p9WLdnAoPojOOn4rrEvk1jtZUiA8JhKV91y2Nr1d8c1qA0/nqVUvxRxbJdWHpU8PSquXCZDkoDqHdD8kLcJRaLyLO4rcFqmcogmrvVqcAw4QxIirN6QOJDxzXc1/W53MSIKSvCaiCE3VxZ1Dz449ACv74w7Ut50mwsnDRWzpxWWdlW+bYihYWkRkPcZRUrcgaCTGwkKLoUriFwiYU6W15KPdrKm8872M8651miykz1B1Sfn4eSPrvLQmxjmEhAB0ogR5mNvmsCZwv2ozng/jgdAhyGghvIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=1xBNqvUwrbmlMpswj2eD8cOWiaiZ+c354uqsWwNo4+U=; b=iHCUn4PWkWRYv4Jkh2dg5M0UTHP8TXS55Fk+sEmw/7pzsTCKH28edPqXdNHauI2YdjP8/EHf7c1B4qroco8PY2Kg0sPupuQ+NgZHGpfPXNOStd4ZxNYyrb5tdYOmS8rzYHf/cSvv2Z5kjhZqS5YewAICG0Pw06+LAYHUNGs4hxgMdKk4r7HpgSVTqmp1yEHCKeWEncB9GGxF/Tf05US/LQfD7+lxNrfdUTDWW3yW3juBIGP6gZgp7Mq32hm9p92ZQCVWLaIV9a/dkO1vIzCN4rU+noa4t2nC3VTG9kUv+6Dy0nght9dNSxFlcRnyMSgz8DiBDFlTHu+vx+dot6z5nQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=citrix.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=1xBNqvUwrbmlMpswj2eD8cOWiaiZ+c354uqsWwNo4+U=; b=sneKqjboyip8m9EtiUZNKVJF7wYTmCDaNS8oUjufJ3aI7BNgQSMk2oBK3cMvnu75eERU2PQrQtQsjH8WQ9m2yOCJCnb+L2cZHm1GDS7L/x7exEJbrLefLA6JrdfRf9mn7kLaTSwetk9ePxZNJY/qmR4RFVNoSkxNAGtj6oqamR4= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: Date: Thu, 21 May 2026 16:29:33 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH 2/4] x86/shadow: avoid sizeof(this_cpu(...)) To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> <3e70e912-cb57-42ba-88a9-45e9e3ebab49@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <3e70e912-cb57-42ba-88a9-45e9e3ebab49@suse.com> Content-Type: text/plain; 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Latch the address of the per-CPU variable into a > local variable, and use that in the two sizeof(). > > No difference in generated code for 2- and 4-level code. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260521152344.2050899-1-luca.fancellu@arm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779377441-1AD77F3B-9808D070/0/0 X-purgate-type: clean X-purgate-size: 1515 On 21.05.2026 17:23, Luca Fancellu wrote: > xen_pfn_t is not an unsigned long on all architectures. In particular, > Arm32 builds see it as a 64-bit type, so printing it with %lx triggers > a -Werror=format build failure. > > Use PRI_xen_pfn for the GFN diagnostics instead. > > Fixes: 66c982a5d3614 ("tests/paging-mempool: Extend to test P2M relocation") > Signed-off-by: Luca Fancellu This looks okay, but while we're here ... > --- a/tools/tests/paging-mempool/test-paging-mempool.c > +++ b/tools/tests/paging-mempool/test-paging-mempool.c > @@ -208,7 +208,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) > if ( errs[i] ) > { > rc = -1; > - fail(" Fail: check mark unable to map gfn %05lx: %d\n", > + fail(" Fail: check mark unable to map gfn %05"PRI_xen_pfn": %d\n", > gfns[i], errs[i]); > continue; > } > @@ -216,7 +216,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) > if ( *mark == exp ) > continue; > > - fail(" Fail: check mark: gfn %05lx expecting %08x (%u), got %08x (%u)\n", > + fail(" Fail: check mark: gfn %05"PRI_xen_pfn" expecting %08x (%u), got %08x (%u)\n", > gfns[i], exp, ~exp, *mark, ~*mark); ... aren't the two ~ wrong here? The message looks to aim at printing the same value as hex and dec. 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Message-ID: <8e779783-cbad-4e1c-9401-6eb9f45a84b9@citrix.com> Date: Thu, 21 May 2026 16:31:25 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie Subject: Re: [PATCH 4/4] x86/PV: split a get_unsafe() invocation To: Jan Beulich , "xen-devel@lists.xenproject.org" References: <738daea9-ebec-4299-b0f9-49448293106d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260519142011.30276-2-cody.zuschlag@gmail.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-720697/1779378380-8256B161-0813B80E/0/0 X-purgate-type: clean X-purgate-size: 1771 On 19.05.2026 16:20, Cody Zuschlag wrote: > --- a/docs/process/sending-patches.pandoc > +++ b/docs/process/sending-patches.pandoc > @@ -195,6 +195,25 @@ E.g.: > > Requested-by: Jane Doe > > +### Assisted-by: > + > +This optional tag can be used when AI-assisted tooling contributed to the > +preparation of a patch. Noticed only while reading your other email, plus checking the Linux wording: s/can/should/ at the very least? (Personally I'd make it a requirement.) > It is in the format: > + > + Assisted-by: [:] [tool...] > + > +E.g.: > + > + Assisted-by: Claude:claude-3-opus coccinelle sparse > + Assisted-by: ChatGPT:gpt-5.5 > + > +Basic development tools, such as git, compilers, make, and editors, should > +not be listed. > + > +The person submitting the patch remains responsible for reviewing any > +AI-generated content and ensuring the contribution is correct, appropriate, > +and compliant with Xen's contribution and licensing requirements. > + > ### Signed-off-by: > > This mandatory tag specifies the author(s) of a patch (for each author a > @@ -209,6 +228,9 @@ E.g.: > The author must be a natural person (not a team or just a company) and the > `Signed-off-by:` tag must include the real name of the author (no pseudonym). > > +AI tools must not add `Signed-off-by:` tags, as only natural > +persons can certify the `Developer's Certificate of Origin`. Linux emphasizes "MUST NOT". I think that's advisable for us as well. I also wonder whether some of their other wording might be worth taking verbatim, rather than making our own, slightly different variant. Nit: Wrap differently to make better use of line length? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260514175623.1869042-1-andrew.cooper3@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779378674-3BF6A938-3CD94CD7/10/73395122804 X-purgate-type: spam X-purgate-size: 1848 On 14.05.2026 19:56, Andrew Cooper wrote: > From: Abdelkareem Abdelsaamad > > Starting with Zen4, AMD CPUs can virtualise NMIs for a guest. On older > hardware, determining when an NMI is safe to deliver is a challenge and Xen > does not handle all corner cases correctly. > > With vNMI, there is an enablement bit and two new bits of state in the VMCB; a > pending bit, and a blocked bit. These directly map to the CPU state for > handling NMIs, and are maintained by hardware during the running of the vCPU. > > When vNMI is enabled, have svm_{get,set}set_interrupt_shadow() work in terms > of the vnmi_blocking bit rather than the IRET intercept. This allows an > emulated IRET instruction to re-enable NMIs. > > When injecting a new NMI, simply set the vnmi_pending bit; hardware will > deliver the NMI to the guest at the next suitable juncture. > > One complication is that, when delivering a second NMI before the first has > completed, the mix between common HVM logic and SVM specific logic will try to > open an NMI window, malfunctioning as it does so. When vNMI is enabled, short > circuit this to not consider NMIs blocked. > > Signed-off-by: Abdelkareem Abdelsaamad > Signed-off-by: Andrew Cooper > --- > CC: Jan Beulich > CC: Roger Pau Monné > CC: Teddy Astie > CC: Jason Andryuk > CC: Oleksii Kurochko > > For 4.22. This is somewhat overdue and makes a concrete improvement to NMI > handling on recent AMD hardware. In particular with this remark in mind - should I perhaps pull this over onto 4.21 as well? Or are there dependencies I'm overlooking? Jan From xen-devel-bounces@lists.xenproject.org Thu May 21 16:09:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:09:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315481.1585293 (Exim 4.92) (envelope-from ) id 1wQ5y3-0003c7-IL; Thu, 21 May 2026 16:09:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315481.1585293; Thu, 21 May 2026 16:09:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5y3-0003c0-F1; Thu, 21 May 2026 16:09:51 +0000 Received: by outflank-mailman (input) for mailman id 1315481; Thu, 21 May 2026 16:09:51 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5y3-0003bu-0c for xen-devel@lists.xenproject.org; Thu, 21 May 2026 16:09:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ5y1-003iDW-Ny for xen-devel@lists.xenproject.org; Thu, 21 May 2026 18:09:49 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f2e3f-e002-0a2a0a5209dd-0a2a45089fd8-26 for ; Thu, 21 May 2026 18:09:49 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f2e4c-63b5-0a2a45080019-a0658309dab6-3 for ; Thu, 21 May 2026 18:09:49 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 7549A8242082; Thu, 21 May 2026 12:08:37 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , "Daniel P. Smith" Subject: [PATCH v3 0/2] tools/tests/native: Native test environment for NUMA claim sets Date: Thu, 21 May 2026 17:08:06 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779379789-BD96DDB1-79916713/0/0 X-purgate-type: clean X-purgate-size: 4199 Dear reviewers, This patch series introduces a native test environment for Xen, currently focused on the hypercall API and exercising the page allocator APIs in native test programs. The available APIs are: - The DOMCTL APIs in xc_domain.c, e.g. xc_domain_claim_memory(). - The XENMEM APIs in xc_domain.c, e.g. xc_domain_claim_pages(). - The SYSCTL APIs in xc_domain.c, e.g. xc_availheap(). Where needed, test cases can call Xen functions directly, and can check the heap state e.g. to check consistency. Any issues can be investigated directly without rebooting a Xen instance. The second patch adds regression tests for the NUMA claim sets v7 series, so this series depends on it. Please help to review/ack it. It should be eligible for Xen 4.22: [PATCH v7 0/7] xen/mm: Introduce NUMA-aware claim sets for domains https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html https://patchwork.kernel.org/project/xen-devel/list/?series=1091810 For local review and test, you can pull and the claims-v7 code and the tests: $ git pull git@gitlab.com:bernhardkaindl/xen.git claims-native-tests-v3 $ make -C tools/tests/native test cross=y # see tools/tests/native/README.rst Thanks, Bernhard Kaindl Changes since v2: - Replaced shims that mimicked sched.h and mm.h with the real Xen headers - Updated and extended the tests for the NUMA claims v7 series - Changed test calls to use DOMCTL, XENMEM and SYSCTL APIs in xc_domain.c Bernhard Kaindl (2): tests/native: Add native Xen test environment tests/native: Add native tests for NUMA claim sets tools/tests/Makefile | 1 + tools/tests/native/.gitignore | 4 + tools/tests/native/Makefile | 206 +++++++++++ tools/tests/native/README.rst | 166 +++++++++ tools/tests/native/harness/common.h | 280 +++++++++++++++ tools/tests/native/harness/domctl-shim.h | 228 ++++++++++++ tools/tests/native/harness/domctl-wrapper.h | 28 ++ tools/tests/native/harness/memory-shim.h | 201 +++++++++++ tools/tests/native/harness/memory-wrapper.h | 42 +++ tools/tests/native/harness/mm-wrapper.h | 118 +++++++ tools/tests/native/harness/native.h | 81 +++++ tools/tests/native/harness/page-alloc-env.h | 254 ++++++++++++++ tools/tests/native/harness/page-alloc-shim.h | 328 ++++++++++++++++++ tools/tests/native/harness/sysctl-shim.h | 155 +++++++++ tools/tests/native/harness/sysctl-wrapper.h | 38 ++ tools/tests/native/harness/testcase-asserts.h | 310 +++++++++++++++++ tools/tests/native/harness/xc-domain-env.h | 77 ++++ tools/tests/native/harness/xen-macros.h | 118 +++++++ tools/tests/native/harness/xenctrl-shim.h | 170 +++++++++ tools/tests/native/host-claims.c | 248 +++++++++++++ tools/tests/native/node-claims.c | 230 ++++++++++++ 21 files changed, 3283 insertions(+) create mode 100644 tools/tests/native/.gitignore create mode 100644 tools/tests/native/Makefile create mode 100644 tools/tests/native/README.rst create mode 100644 tools/tests/native/harness/common.h create mode 100644 tools/tests/native/harness/domctl-shim.h create mode 100644 tools/tests/native/harness/domctl-wrapper.h create mode 100644 tools/tests/native/harness/memory-shim.h create mode 100644 tools/tests/native/harness/memory-wrapper.h create mode 100644 tools/tests/native/harness/mm-wrapper.h create mode 100644 tools/tests/native/harness/native.h create mode 100644 tools/tests/native/harness/page-alloc-env.h create mode 100644 tools/tests/native/harness/page-alloc-shim.h create mode 100644 tools/tests/native/harness/sysctl-shim.h create mode 100644 tools/tests/native/harness/sysctl-wrapper.h create mode 100644 tools/tests/native/harness/testcase-asserts.h create mode 100644 tools/tests/native/harness/xc-domain-env.h create mode 100644 tools/tests/native/harness/xen-macros.h create mode 100644 tools/tests/native/harness/xenctrl-shim.h create mode 100644 tools/tests/native/host-claims.c create mode 100644 tools/tests/native/node-claims.c -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 21 16:10:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:10:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315489.1585302 (Exim 4.92) (envelope-from ) id 1wQ5yS-0004yQ-Qd; Thu, 21 May 2026 16:10:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315489.1585302; Thu, 21 May 2026 16:10:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5yS-0004yH-ML; Thu, 21 May 2026 16:10:16 +0000 Received: by outflank-mailman (input) for mailman id 1315489; Thu, 21 May 2026 16:10:15 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5yR-0004y5-0A for xen-devel@lists.xenproject.org; Thu, 21 May 2026 16:10:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ5yQ-003iNH-Co for xen-devel@lists.xenproject.org; Thu, 21 May 2026 18:10:14 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f2e5d-5cb7-0a2a0a5109dd-0a2a450286d6-26 for ; Thu, 21 May 2026 18:10:14 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f2e65-af86-0a2a45020019-a0658309b444-3 for ; Thu, 21 May 2026 18:10:13 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id A7E9E8237B6C; Thu, 21 May 2026 12:09:01 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , "Daniel P. Smith" Subject: [PATCH v3 1/2] tests/native: Add native Xen test environment Date: Thu, 21 May 2026 17:08:07 +0100 Message-Id: <7b5f434e3bf602edadd5387936b80bf3079885ec.1779379609.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1779379814-837622C1-C55CBD39/0/0 X-purgate-type: clean X-purgate-size: 109683 Add a native test environment for hypercall testing that runs without a Xen instance. The initial focus is the page allocator (page_alloc.c) and its hypercalls. In general, APIs testable with this environment include: - DOMCTL APIs via xc_domain.c, e.g. xc_domain_claim_memory(). - XENMEM APIs via xc_domain.c, e.g. xc_domain_claim_pages(). - SYSCTL APIs via xc_domain.c, e.g. xc_availheap(). The test programs build the Xen code under test into the same compilation unit as the test case source. This gives the tests full control over the environment and allows selected functions to be stubbed, mocked, or wrapped as required by the scenario under test. For the runtime buddy allocator in page_alloc.c, the environment creates a synthetic Xen heap. Each test program can define a Xen configuration, for example whether CONFIG_NUMA and CONFIG_SYSCTL are enabled. The test cases populate the free lists individually for each test scenario as needed and can check the heap state. For testing new code across multiple target architectures, the harness supports cross-compilation of both the tests and the code under test for x86_64, arm64, arm32, and riscv64 by passing cross=y to the build. If binfmt-misc and qemu-user-static are configured, the cross-compiled test programs can also be run. Where supported, clang-based builds are automatically added to the test matrix. Signed-off-by: Bernhard Kaindl --- tools/tests/Makefile | 1 + tools/tests/native/.gitignore | 4 + tools/tests/native/Makefile | 206 +++++++++++ tools/tests/native/README.rst | 166 +++++++++ tools/tests/native/harness/common.h | 280 +++++++++++++++ tools/tests/native/harness/domctl-shim.h | 228 ++++++++++++ tools/tests/native/harness/domctl-wrapper.h | 28 ++ tools/tests/native/harness/memory-shim.h | 201 +++++++++++ tools/tests/native/harness/memory-wrapper.h | 42 +++ tools/tests/native/harness/mm-wrapper.h | 118 +++++++ tools/tests/native/harness/native.h | 81 +++++ tools/tests/native/harness/page-alloc-env.h | 254 ++++++++++++++ tools/tests/native/harness/page-alloc-shim.h | 328 ++++++++++++++++++ tools/tests/native/harness/sysctl-shim.h | 155 +++++++++ tools/tests/native/harness/sysctl-wrapper.h | 38 ++ tools/tests/native/harness/testcase-asserts.h | 310 +++++++++++++++++ tools/tests/native/harness/xc-domain-env.h | 77 ++++ tools/tests/native/harness/xen-macros.h | 118 +++++++ tools/tests/native/harness/xenctrl-shim.h | 170 +++++++++ 19 files changed, 2805 insertions(+) create mode 100644 tools/tests/native/.gitignore create mode 100644 tools/tests/native/Makefile create mode 100644 tools/tests/native/README.rst create mode 100644 tools/tests/native/harness/common.h create mode 100644 tools/tests/native/harness/domctl-shim.h create mode 100644 tools/tests/native/harness/domctl-wrapper.h create mode 100644 tools/tests/native/harness/memory-shim.h create mode 100644 tools/tests/native/harness/memory-wrapper.h create mode 100644 tools/tests/native/harness/mm-wrapper.h create mode 100644 tools/tests/native/harness/native.h create mode 100644 tools/tests/native/harness/page-alloc-env.h create mode 100644 tools/tests/native/harness/page-alloc-shim.h create mode 100644 tools/tests/native/harness/sysctl-shim.h create mode 100644 tools/tests/native/harness/sysctl-wrapper.h create mode 100644 tools/tests/native/harness/testcase-asserts.h create mode 100644 tools/tests/native/harness/xc-domain-env.h create mode 100644 tools/tests/native/harness/xen-macros.h create mode 100644 tools/tests/native/harness/xenctrl-shim.h diff --git a/tools/tests/Makefile b/tools/tests/Makefile index 6477a4386dda..2b7af7606992 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -16,6 +16,7 @@ SUBDIRS-$(CONFIG_X86) += tsx ifneq ($(clang),y) SUBDIRS-$(CONFIG_X86) += x86_emulator endif +SUBDIRS-$(CONFIG_X86) += native .PHONY: all clean install distclean uninstall all clean distclean install uninstall: %: subdirs-% diff --git a/tools/tests/native/.gitignore b/tools/tests/native/.gitignore new file mode 100644 index 000000000000..d33db3518337 --- /dev/null +++ b/tools/tests/native/.gitignore @@ -0,0 +1,4 @@ +*.x86_64* +*.arm32* +*.arm64* +*.riscv64* diff --git a/tools/tests/native/Makefile b/tools/tests/native/Makefile new file mode 100644 index 000000000000..04cbd5d2776b --- /dev/null +++ b/tools/tests/native/Makefile @@ -0,0 +1,206 @@ +# SPDX-License-Identifier: GPL-2.0-only + +# Makefile for building and running the native tests. +XEN_ROOT := $(abspath $(CURDIR)/../../..) +obj := . +src := . +srctree := $(XEN_ROOT)/xen +objtree := $(XEN_ROOT)/xen +export srctree objtree + +# Load Per-architecture CFLAGS +define LOAD_ARCH_CFLAGS + CFLAGS := + include $(XEN_ROOT)/config/$(1).mk + ARCH_CFLAGS_$(1) := $$(CFLAGS) +endef +$(foreach arch,$(TEST_ARCHS), \ + $(eval $(call LOAD_ARCH_CFLAGS,$(arch)))) + +# Include Xen rules and Kbuild infrastructure +include $(XEN_ROOT)/tools/Rules.mk +include $(XEN_ROOT)/xen/scripts/Kbuild.include + +# For recursive make calls, don't print the Entering/Leaving messages here. +MAKEFLAGS += --no-print-directory + +# Define SRCARCH and SUBPATH for the Kbuild infrastructure +define srcarch +$(subst _,,$(subst 32,,$(subst 64,,$(1)))) +endef +SRCARCH := $(call srcarch,$(XEN_TARGET_ARCH)) +SUBPATH := $(subst $(XEN_ROOT)/,,$(CURDIR)) + +# Common CFLAGS for building the tests +# filter-out -m64 +COMMON_CFLAGS := $(filter-out $(ARCH_CFLAGS_$(XEN_TARGET_ARCH)),$(CFLAGS)) +COMMON_CFLAGS += -D__XEN_TOOLS__ $(APPEND_CFLAGS) +COMMON_CFLAGS += -D_SUBPATH_=\"$(SUBPATH)\" +COMMON_CFLAGS += -I$(srctree)/include +COMMON_CFLAGS += $(CFLAGS_xeninclude) + +ifdef TARGETS +# make test TARGETS="host-claims another-test" +TEST_SOURCES := $(addsuffix .c,$(TARGETS)) +else +TEST_SOURCES := $(notdir $(wildcard *.c)) +endif + +# Requested architectures +TEST_ARCHS := x86_64 arm64 arm32 riscv64 + +# GNU target triples for clang and gcc +TARGET_TRIPLE_arm64 := aarch64-linux-gnu +TARGET_TRIPLE_arm32 := arm-linux-gnueabihf +TARGET_TRIPLE_x86_64 := x86_64-linux-gnu +TARGET_TRIPLE_riscv64 := riscv64-linux-gnu + +ifeq ($(cross),y) +ifneq ($(filter test run,$(MAKECMDGOALS)),) +BINFMT_SUPP := $(if $(wildcard /etc/init.d/binfmt-support),1,0) +QEMU_BINFMT := $(if $(wildcard /usr/libexec/qemu-binfmt),1,0) +ifneq ($(BINFMT_SUPP)$(QEMU_BINFMT),11) +$(error "Cross-testing requires binfmt-support and qemu-user-static") +endif +endif +endif + +# Detect and select the found cross compilers if enabled with cross=y +ifneq ($(cross),y) + SUPPORTED_ARCHS := $(XEN_TARGET_ARCH) +else + ifneq ($(clang),y) + define HAVE_GCC + $(if $(shell command -v $(TARGET_TRIPLE_$(1))-gcc 2>/dev/null),$(1)) + endef + endif + define HAVE_CLANG + $(if $(shell echo 'int main(){}' | clang --target=$(TARGET_TRIPLE_$(1)) -x \ + c - -o /dev/null >/dev/null 2>&1 && echo y),$(1)-clang) + endef + SUPPORTED_ARCHS := $(foreach arch,$(TEST_ARCHS),$(call HAVE_GCC,$(arch))) \ + $(foreach arch,$(TEST_ARCHS),$(call HAVE_CLANG,$(arch))) +endif +$(SUPPORTED_ARCHS): + @$(MAKE) XEN_TARGET_ARCH=$(patsubst %-clang,%,$@) build-$@ + +$(addprefix make-output-,$(SUPPORTED_ARCHS)): + @$(MAKE) XEN_TARGET_ARCH=$(patsubst %-clang,%,$(@:make-output-%=%)) \ + output-$(@:make-output-%=%) + +define ARCH_template +ARCH_$(1) := $$(patsubst %-clang,%,$(1)) +SRCARCH_$(1) := $$(call srcarch,$$(ARCH_$(1))) +TEST_SOURCES_$(1) := $$(TEST_SOURCES) +ifneq ($$(ARCH_$(1)),x86_64) +# node-claims.c relies on NUMA (only available on x86_64 for now) +TEST_SOURCES_$(1) := $$(filter-out node-claims.c,$$(TEST_SOURCES_$(1))) +endif + +OBJ_$(1) := $$(addprefix $(obj)/,$$(TEST_SOURCES_$(1):.c=.$(1).o)) +BIN_$(1) := $$(addprefix $(obj)/,$$(TEST_SOURCES_$(1):.c=.$(1))) +OUTPUT_$(1) := $$(addprefix $(obj)/,$$(TEST_SOURCES_$(1):.c=.$(1).out)) +ALL_BINS += $$(BIN_$(1)) +ALL_OUTPUTS += $$(OUTPUT_$(1)) + +ifeq ($$(filter %-clang,$(1)),) +# GCC build +$$(OBJ_$(1)) $$(BIN_$(1)): CROSS_COMPILE := $$(TARGET_TRIPLE_$$(ARCH_$(1)))- +else +$$(OBJ_$(1)) $$(BIN_$(1)): CC := clang +$$(OBJ_$(1)) $$(BIN_$(1)): CLANG_FLAGS := -fdiagnostics-absolute-paths \ + --target=$$(TARGET_TRIPLE_$$(ARCH_$(1))) +endif + +DEPS += $(subst ./,.,$(OBJ_$(1):.o=.o.d)) +O_CFLAGS_$$(ARCH_$(1)) := $$(COMMON_CFLAGS) $$(ARCH_CFLAGS_$$(ARCH_$(1))) +O_CFLAGS_$$(ARCH_$(1)) += -I$(srctree)/arch/$$(SRCARCH_$(1))/include +O_CFLAGS_$$(ARCH_$(1)) += -I$(objtree)/arch/$$(SRCARCH_$(1))/include/generated + +ifeq ($$(ARCH_$(1)),$(XEN_COMPILE_ARCH)) +O_CFLAGS_$$(ARCH_$(1)) += -fsanitize=address -fno-omit-frame-pointer +else +O_CFLAGS_$$(ARCH_$(1)) += -static +endif + +$(obj)/%.$(1).o: $(src)/%.c + $(Q)$$(CC) $$(CLANG_FLAGS) -c -o $$@ $$< $$(O_CFLAGS_$$(ARCH_$(1))) + +$(obj)/%.$(1): $(obj)/%.$(1).o + $(Q)$$(CC) $$(CLANG_FLAGS) -o $$@ $$< \ + $$(LDFLAGS) $$(O_CFLAGS_$$(ARCH_$(1))) + @echo "Built $(SUBPATH)/$$@" >> $$(obj)/$(1).result + +# Create the .out files by running the test binaries and capturing their output. +$(obj)/%.$(1).out: $(obj)/%.$(1) FORCE + @echo "\nRunning $$< $(RUN_ARGS)to generate $$@..." + @./$$< $(RUN_ARGS) >$$@ 2>&1 || \ + (sed 's/^/> /' $$@; echo "Test $$< failed"; exit 1) + @echo "\n$(SUBPATH)/$$< was successful: $$< output:" + @sed 's/^/| /' $$@ + @tail -1 $$@ >> $$(obj)/$(1).result + @$(RM) $$< $$<.o* + +# Can only be used with XEN_TARGET_ARCH set to the appropriate architecture: +# e.g. make XEN_TARGET_ARCH=arm64 build-arm64 + +.PHONY: $(objtree)/arch/$$(SRCARCH_$(1))/include/generated/asm +$(objtree)/arch/$$(SRCARCH_$(1))/include/generated/asm:: + $(Q)$(MAKE) $(asm-generic)=$$@ XEN_TARGET_ARCH=$$(ARCH_$(1)) + +.PHONY: setup-$(1) +setup-$(1): $(objtree)/arch/$$(SRCARCH_$(1))/include/generated/asm + +.PHONY: build-$(1) +build-$(1): setup-$(1) $$(BIN_$(1)) + +.PHONY: output-$(1) +output-$(1): $$(OUTPUT_$(1)) + +.PHONY: clean-$(1) +clean-$(1): $(objtree)/arch/$$(SRCARCH_$(1))/include/generated/asm + $(Q)$(RM) -- $$(OBJ_$(1)) $$(BIN_$(1)) $$(OUTPUT_$(1)) +endef +$(foreach arch,$(SUPPORTED_ARCHS), $(eval $(call ARCH_template,$(arch)))) + +.PHONY: all run test +run test: all + @: +# Allow the build to run in parallel with clean before and after, and reporting. +all: setup + $(Q)$(MAKE) clean + $(Q)$(MAKE) $(MFLAGS) $(SUPPORTED_ARCHS) + @sort $(obj)/*.result + @$(RM) $(obj)/*.result +# If the goal also has run or test in it, run the tests after building. +ifneq ($(filter run test,$(MAKECMDGOALS)),) + $(Q)$(MAKE) $(addprefix make-output-,$(SUPPORTED_ARCHS)) + @sort $(obj)/*.result + @$(RM) $(obj)/*.result ..d +endif + +.PHONY: setup +setup: $(XEN_ROOT)/tools/include/xen/xen.h +$(XEN_ROOT)/tools/include/xen/xen.h: + @$(MAKE) -C $(XEN_ROOT)/tools/include all + +.PHONY: clean clean-archs +clean-archs: $(addprefix clean-,$(SUPPORTED_ARCHS)) +clean: clean-archs + @$(RM) -v -- *.o $(TARGETS) $(DEPS_RM) + +.PHONY: postclean-test +postclean-test: test clean + +.PHONY: distclean +distclean: clean + $(Q)$(RM) -- *~ + +.PHONY: install +install: all + @echo "install: No install; the source is tested, not another Xen host" + +.PHONY: uninstall +uninstall: + +-include $(DEPS) diff --git a/tools/tests/native/README.rst b/tools/tests/native/README.rst new file mode 100644 index 000000000000..c98552cc4a66 --- /dev/null +++ b/tools/tests/native/README.rst @@ -0,0 +1,166 @@ +.. SPDX-License-Identifier: CC-BY-4.0 + +Native Xen Test Harness +======================= + +Native test environment for Xen, initially focused on the hypercall +API and exercising the page allocator APIs in native test programs. +Available APIs include: + +- ``DOMCTL`` APIs via ``xc_domain.c``, e.g. ``xc_domain_claim_memory()``. +- ``XENMEM`` APIs via ``xc_domain.c``, e.g. ``xc_domain_claim_pages()``. +- ``SYSCTL`` APIs via ``xc_domain.c``, e.g. ``xc_availheap()``. + +Each test executable builds the Xen code under test into the same +compilation unit as the test case source. This gives the tests full +control over the environment and allows selected functions to be +stubbed, mocked, or wrapped for the scenario under test. + +For the buddy allocator in ``page_alloc.c``, the environment creates +a synthetic Xen heap. Each test case populates the free lists as needed +for the scenario under test, and the test cases can check the resulting +state of the heap after exercising the code under test. + +As the code under test is built as a native executable, all advantages +of native execution are available. The test cases can wrap selected +functions, and the resulting test programs can be debugged directly +using ``printf``-style diagnostics. For not cross-compiled builds, +``AddressSanitizer`` is enabled as well. Cross-compiled builds use +static binaries that can be run on the host using Linux ``binfmt-misc`` +and ``qemu-user-static`` support. + +Harness Shape +------------- + +The harness lives under ``tools/tests/native/harness``. Its main role +is to provide the Xen runtime environment required by the code under +test. + +The harness uses real Xen headers and definitions wherever possible. +It does not attempt to replicate Xen internals or maintain local +copies when they can be avoided. This ensures that the tests always +use the real definitions and minimises the maintenance burden of +keeping them in sync. + +In particular, it includes 16 Xen headers, including the core headers +that provide the fundamental data structures and definitions used by +the code under test. These include central Xen headers such as: + +- ``public/xen.h`` +- ``xen/compiler.h`` +- ``xen/config.h`` +- ``xen/domain.h`` +- ``xen/kernel.h`` +- ``xen/macros.h`` +- ``xen/mm.h`` +- ``xen/nospec.h`` +- ``xen/numa.h`` +- ``xen/page-size.h`` +- ``xen/sched.h`` +- ``xen/typesafe.h`` +- ``xenctrl.h`` + +The remaining shims are intentionally limited to runtime state for +the test context and the minimal set of shims and stubs needed to +support the code under test, such as: + +- Synthetic heap setup and management +- Guest-copy helpers backed by host memory copies +- PDX/frame-table translations matching the synthetic heap +- Shims for code not yet used by the tests + +This keeps Xen definitions in Xen headers wherever possible and +limits the harness primarily to modelling the execution environment. + +How Tests Work +-------------- + +Each test case starts from a clean allocator state and initialises a +synthetic frame table with pages on the free lists. After the +allocator operations under test, each scenario checks the resulting +state using assertion helpers. + +As running the tests after a change takes only a few seconds, they +can be used as a quick regression check during development. The test +cases can also be extended easily to cover new scenarios, and code +coverage tools can be integrated straightforwardly. + +Running The Tests +----------------- + +The ``Makefile`` automatically discovers the C test programs in this +directory and builds one executable per source file. + +The ``test`` target executes the built tests when they are runnable +on the build host. If ``CC`` and ``HOSTCC`` differ, execution is only +attempted when ``binfmt`` support for the target architecture is +available. + +Example to clean, build, and run the tests for the default target +architecture: + +.. code:: shell + + make -C tools/tests/native clean test + +To build and run a single test program: + +.. code:: shell + + make -C tools/tests/native test TARGETS=host-claims + +To build and run a given test program with specific arguments: + +.. code:: shell + + make -C tools/tests/native test TARGETS=host-claims RUN_ARGS=CNGS + +In this example, ``CNGS`` is a test case defined in the ``host-claims.c`` +source file. The test binary is built and executed with ``CNGS`` as an +argument, causing it to run only that scenario instead of all scenarios +in the source file. This is useful when working on a specific test case. + +Cross-tests +^^^^^^^^^^^ + +For broad coverage, the ``test`` target builds and runs the tests for +all active Xen target architectures when suitable cross-compilers are +installed. On Debian-based systems, the required cross-compilers can +be installed with: + +.. code:: shell + + sudo apt install -y \ + gcc-{aarch64,riscv64}-linux-gnu \ + gcc-arm-linux-gnueabihf + +The ``test`` target provides a convenient way to build and run all tests +for multiple Xen target architectures. This is useful for broader coverage +and for catching regressions that may only appear on specific architectures. + +For target architectures that are not directly executable on the +host, Linux ``binfmt`` and ``qemu-user-static`` support are required +so the built test executables can run. On Debian-based systems, these +can be installed with: + +.. code:: shell + + sudo apt install -y binfmt-support qemu-user-static + +To obtain broad coverage across multiple Xen target architectures, +pass ``cross=y`` with the ``test`` target to build and run the tests +for all supported Xen target architectures with detected +cross-compilers: + +.. code:: shell + + make -C tools/tests/native test cross=y + +To build and run tests for a specific Xen target architecture: + +.. code:: shell + + make -C tools/tests/native test TEST_ARCHS=x86_64 + make -C tools/tests/native test TEST_ARCHS=arm64 + make -C tools/tests/native test TEST_ARCHS=arm32 + make -C tools/tests/native test TEST_ARCHS=riscv64 diff --git a/tools/tests/native/harness/common.h b/tools/tests/native/harness/common.h new file mode 100644 index 000000000000..1324368bf7d8 --- /dev/null +++ b/tools/tests/native/harness/common.h @@ -0,0 +1,280 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Common test harness for page allocation unit tests. + * + * Copyright (C) 2026 Cloud Software Group + */ + +#ifndef TOOLS_TESTS_ALLOC_HARNESS_H +#define TOOLS_TESTS_ALLOC_HARNESS_H + +/* Assertion helpers shared by the tests. */ +#include "testcase-asserts.h" + +/* Configure the Xen code for the test context */ +#define CONFIG_DEBUG +#define COMPILE_OFFSETS +#ifdef __x86_64__ +#define __ASM_I386_CPUFEATURE_H +#define __XEN_X86_CPUFEATURESET_H__ +#define _X86_BITOPS_H +#define X86_FEATURE_XEN_SMAP 0 +#endif +#define CONFIG_MMU +#ifdef __arm__ +#define CONFIG_ARM_32 +#define CONFIG_PADDR_BITS 40 +#endif +#ifdef __aarch64__ +#define CONFIG_ARM_64 +#define CONFIG_PADDR_BITS 48 +#endif +#ifdef __riscv +#define CONFIG_RISCV_64 +#define CONFIG_QEMU_PLATFORM +#endif + +#define CONFIG_NR_CPUS 2048 +#if defined(CONFIG_NUMA) && !defined(CONFIG_NR_NUMA_NODES) +/* Xen supports at least 64 nodes. New HW can have a lot more memory nodes. */ +#define CONFIG_NR_NUMA_NODES 254 /* 255(0xFF) is reserved for NUMA_NO_NODE. */ +#endif +#ifdef CONFIG_NR_NUMA_NODES +#define MAX_NUMNODES CONFIG_NR_NUMA_NODES +#else +#define MAX_NUMNODES 1 +#endif + +/* Header guards we always need to block (configuration-independent)*/ +#define __ARM_CURRENT_H__ +#define __ASM_X86_X86_EMULATE_H__ +#define __X86_CURRENT_H__ +#define __XEN_IOCAP_H__ +#define __XEN_PAGING_H__ +#define __XEN_RCUPDATE_H +#define __XSM_H__ + +/* Blocking P2M headers needs fewer shims than including them */ +#define _XEN_P2M_H +#define _XEN_ASM_X86_P2M_H +#define ASM__RISCV__P2M_H +#define map_mmio_regions(d, gfn, nr, mfn) 0 +#define unmap_mmio_regions(d, gfn, nr, mfn) 0 +struct p2m_domain { int dummy; }; /* riscv */ + +/* Common Xen types used by the test environment. */ +/* Short integer types (xen/types.h blocked by __TYPES_H__) */ +typedef uint8_t u8; +typedef uint16_t u16; +typedef uint32_t u32; +typedef uint64_t u64; +typedef uint16_t __be16; +typedef uint32_t __be32; +typedef uint64_t __be64; +typedef uint16_t __le16; +typedef uint32_t __le32; +typedef uint64_t __le64; +typedef unsigned long cpumask_t; +typedef long long s_time_t; +typedef bool spinlock_t; +typedef spinlock_t rwlock_t; +typedef spinlock_t rspinlock_t; +typedef spinlock_t percpu_rwlock_t; + +#define __XEN_BITMAP_H +#ifndef BITS_TO_LONGS +#define BITS_TO_LONGS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG) +#endif +#ifndef DECLARE_BITMAP +#define DECLARE_BITMAP(name, bits) unsigned long name[BITS_TO_LONGS(bits)] +#endif + +/* + * If testcase_assert_verbose_assertions is enabled, the spinlock + * functions print the spinlock being acquired or released along with + * the file and line number of the assertion that triggered it. + * This can be helpful for debugging test failures and understanding + * the sequence of events leading up to the failure. + */ +#define spin_lock(l) ((void)(l)) +#define spin_unlock(l) ((void)(l)) +#define spin_lock_cb(l, cb, data) spin_lock(l) +#define spin_lock_kick() ((void)0) +#define nrspin_lock(l) spin_lock(l) +#define nrspin_unlock(l) spin_unlock(l) +#define rspin_lock(l) spin_lock(l) +#define rspin_unlock(l) spin_unlock(l) +#define read_lock(rwl) spin_lock(rwl) +#define read_unlock(rwl) spin_unlock(rwl) +#define read_trylock(rwl) (spin_lock(rwl), true) +#define write_lock(rwl) spin_lock(rwl) +#define write_unlock(rwl) spin_unlock(rwl) +/* + * For the test context, we assume all locks are always held to avoid having + * to manage lock state in the test helpers. This allows the test helpers + * to call allocator functions that require locks to be held without needing + * to acquire those locks, which simplifies the test code and focuses on + * exercising the allocator logic under test. + * + * Invariants that would normally be protected by locks must still be upheld + * by the test helpers, but the test helpers can assume they have exclusive + * access to the allocator state and do not need to worry about concurrency. + */ +#define rw_is_locked(rwl) true +#define rw_is_write_locked(rwl) true +#define spin_is_locked(l) true +#define rspin_is_locked(l) true +#define DEFINE_SPINLOCK(l) spinlock_t l + +/* Heap allocator stubs */ +#define __XMALLOC_H__ +#define xmalloc(type) calloc(1, sizeof(type)) +#define xmalloc_array(type, nr) calloc((nr), sizeof(type)) +#define xvzalloc_array(type, nr) calloc((nr), sizeof(type)) +#define xzalloc(type) calloc(1, sizeof(type)) +#define xfree(p) free(p) +#define xvfree(p) free(p) + +/* xvmalloc_array supports both 2-arg (type, n) used by page_alloc.c and + * 3-arg (type, rows, cols) used by domctl.c via a variadic helper. + * The helper appends a sentinel '1' so the 2-arg form multiplies by 1. */ +#define xvmalloc_array(type, ...) _xvmalloc_impl(type, __VA_ARGS__, 1) +#define _xvmalloc_impl(t, a, b, ...) calloc((size_t)(a) * (size_t)(b), \ + sizeof(t)) + +/* + * Use the real guest_access functions and provide stubs for + * xen/asm-x86/guest_access.h's __raw_copy_{to,from}_guest() functions + * which are used by the high-level copy_{to,from}_guest*() functions. + */ +#define __X86_UACCESS_H__ +#define __ASM_X86_GUEST_ACCESS_H__ +unsigned long raw_copy_to_guest(void *to, const void *from, unsigned int len) +{ + memcpy(to, from, len); + return 0; +} +#define __raw_copy_to_guest raw_copy_to_guest +unsigned long raw_copy_to_guest_flush_dcache(void *to, const void *from, + unsigned int len) +{ + memcpy(to, from, len); + return 0; +} +unsigned long raw_copy_from_guest(void *to, const void *from, unsigned int len) +{ + memcpy(to, from, len); + return 0; +} +#define __raw_copy_from_guest raw_copy_from_guest +unsigned long raw_clear_guest(void *to, unsigned int len) +{ + memset(to, 0, len); + return 0; +} + +/* nodemask support for the test environment. */ +#define nodes_intersects(a, b) ((a) & (b)) +#define nodes_and(dst, a, b) ((dst) = (a) & (b)) +#define nodes_andnot(dst, a, b) ((dst) = (a) & ~(b)) +#define nodes_clear(dst) ((dst) = 0) +#define nodemask_test(node, mask) ((*(mask) >> (node)) & 1UL) +#define node_set(node, mask) ((mask) |= (1UL << (node))) +#define node_clear(node, mask) ((mask) &= ~(1UL << (node))) +#define nodemask_bits(maskp) ((unsigned long *)(maskp)) +#define node_test_and_set(node, mask) \ + ({ \ + bool was_set = nodemask_test(node, &mask); \ + node_set(node, mask); \ + was_set; \ + }) +#define for_each_online_node(i) for ( (i) = 0; (i) < MAX_NUMNODES; ++(i) ) +#define for_each_cpu(i, mask) for ( (i) = 0; (i) < 1; ++(i) ) +#define alternative(a, b, c) ((void)(a), (void)(b)) +#define DECLARE_PER_CPU(type, name) static __used type shim_per_cpu__##name +static cpumask_t cpu_online_map = ~0UL; + +/* + * PDX compression not yet actively used for the synthetic heap of the tests. + * Use a small identity PDX bridge because pulling in full xen/pdx.h would + * bring compressed-PDX runtime tables that the lib does not initialise yet. + * + * That is a deliberate shim boundary to allow testing without needing to + * support PDX runtime in the test harness. The test cases can use the + * mfn_to_pdx and pdx_to_mfn helpers to work with PDX values, and the test + * harness will track the valid range of PDX values based on the frame_table + * size and the MFNs of the test pages that are initialised during the tests, + * but the PDX values are not actually compressed in the test harness. + */ +#define mfn_to_pdx(mfn) mfn_x(mfn) +#define pdx_to_mfn(pdx) _mfn(pdx) +#define page_to_pdx(pg) ((unsigned long)((pg) - frame_table)) +#define pdx_to_page(pdx) (frame_table + (pdx)) +#define __mfn_valid(mfn) true + +/* tlbflush.h */ +#define per_cpu(a, b) (0) +bool tlb_clk_enabled; +u32 tlbflush_clock; +#define tlbflush_time 0U +#define __cpumask_clear_cpu(cpu, mask) ((void)(cpu), (void)(mask)) + +#ifdef __x86_64__ +#define cpu_has_cx16 true +#define cpu_relax() ((void)0) +#define test_and_clear_bit(nr, addr) \ + ({ \ + bool was_set = test_bit((nr), (addr)); \ + *(addr) &= ~(1UL << (nr)); \ + was_set; \ + }) +unsigned int attr_const generic_flsl(unsigned long x) +{ + return ((x) ? (sizeof(long) * 8) - __builtin_clzl(x) : 0); +} +unsigned int attr_const generic_ffsl(unsigned long x) +{ + return __builtin_ffsl((long)(x)); +} +#else +void flush_page_to_ram(unsigned long mfn, bool sync_icache) +{ + (void)mfn; + (void)sync_icache; +} +#endif + +/* + * Some functions need to use types defined in specific headers, + * so we include them and define header guards to prevent unwanted + * definitions from those headers that conflict with the test harness + * or bring in Xen-internal structures that are already provided by + * the natural C compiler defines, libc defines and stubs in this shim. + */ +#define __TYPES_H__ +#define __LIB_H__ /* C runtime library, only for the hypervisor */ +#define XEN_SOFTIRQ_H +#define XEN__XVMALLOC_H +#define _LINUX_INIT_H +#define __LINUX_NODEMASK_H +#define __RWLOCK_H__ +#define __XEN_SMP_H__ +#define __XEN_BUG_H__ +#define __XEN_ERRNO_H__ +#define _TIMER_H_ +#define __XEN_PERCPU_H__ +#define __XEN_STRING_H__ +#define __XEN_TIME_H__ +#define __XEN_RCUPDATE_H +#define __XEN_PREEMPT_H__ +#define __XEN_TASKLET_H__ +#define __XEN_PERFC_H__ +#define __SPINLOCK_H__ +#define __VM_EVENT_H__ +#define __XEN_EVENT_H__ +#define __XEN_CPUMASK_H +#define __XEN_IRQ_H__ +#define __XEN_PDX_H__ +#define __ASM_DOMAIN_H__ +#define __X86_ALTERNATIVE_H__ +#endif diff --git a/tools/tests/native/harness/domctl-shim.h b/tools/tests/native/harness/domctl-shim.h new file mode 100644 index 000000000000..36dfe2bd8edb --- /dev/null +++ b/tools/tests/native/harness/domctl-shim.h @@ -0,0 +1,228 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Minimal shim to include xen/common/domctl.c in native program tests. + * + * This shim provides the minimal Xen definitions that domctl.c + * needs to run in a native program test environment. It replaces a + * minimal subset of the Xen environment that xen/common/domctl.c + * interacts with with stubs so it can run in the test environment, + * allowing test scenarios to verify the behavior of domctl.c. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef _TEST_ALLOC_DOMCTL_SHIM_ +#define _TEST_ALLOC_DOMCTL_SHIM_ + +/* + * Guard against language servers and linters picking up this header. + * + * This shim is intended to be used in test programs for testing + * the code of xen/common/domctl.c in a native program test environment, + * and test programs need to define TEST_WRAP_XEN_COMMON_DOMCTL_C + * to enable the definitions in this header. + */ +#ifndef TEST_WRAP_XEN_COMMON_DOMCTL_C +#warning "Include this header only in integration tests using domctl.c" +#else + +/* + * Inside the intended test context, provide stub definitions. + * + * Some functions need to use types defined in specific headers, + * so we include them and define header guards to prevent unwanted + * definitions from those headers that conflict with the test harness + * or bring in Xen-internal structures that are already provided by + * the natural C compiler defines, libc defines and stubs in this shim. + */ + +/* Include xen/domain.h for types required by the stubs below. */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +/* Header guards to block not yet supported domain.h includes */ +#define __XEN_ERRNO_H__ +#define __ASM_DOMAIN_H__ +#define __RWLOCK_H__ +#include +#pragma GCC diagnostic pop + +#ifdef __XEN_FRAME_NUM_H__ /* x86_64 header differnce */ +#define mfn_to_gfn(d, mfn) ((void)(d), _gfn(mfn_x(mfn))) +#endif + +/* bitmap_to/from_xenctl_bitmap are in xen/bitmap.h (blocked). + * Stub them as no-ops; domctl.c uses them only for NUMA info export. */ +#define bitmap_to_xenctl_bitmap(d, s, n) 0 +#define xenctl_bitmap_to_bitmap(d, s, n) 0 + +/* Domain dying states (normally in xen/sched.h, blocked by __SCHED_H__) */ +#define DOMDYING_alive 0U +#define DOMDYING_dying 1U +#define DOMDYING_dead 2U + +/* vcpu_runstate_info is now provided by xen/sched.h (via public/vcpu.h) */ +#define RUNSTATE_running 0 +#define vcpu_runstate_get(v, r) ((void)(v), memset((r), 0, sizeof(*(r)))) + +/* vcpu iteration: no vCPUs in the test context */ +/* for_each_vcpu is provided by xen/sched.h; override with test stub */ +#undef for_each_vcpu +#define for_each_vcpu(d, v) for ( (v) = NULL; (v) != NULL; ) + +/* Domain predicates not derived from any included header */ +#define is_hvm_domain(d) false +#define cpupool_get_id(d) 0 + +/* spin_trylock: in the test context all locks are always available */ +#define spin_trylock(l) (spin_lock(l), true) + +/* XSM hooks: permit all operations in the test context */ +#define XSM_OTHER 0 +#define XSM_XS_PRIV 0 +#define XSM_HOOK 0 +#define XSM_PRIV 0 +#define xsm_security_domaininfo(d, info) ((void)(d), (void)(info)) +#define xsm_domctl(xsm, d, ...) 0 +#define xsm_getdomaininfo(xsm, d) 0 +#define xsm_irq_permission(xsm, d, ...) 0 +#define xsm_iomem_permission(xsm, d, ...) 0 +#define xsm_iomem_mapping(xsm, d, ...) 0 +#define xsm_set_target(xsm, d, e) 0 +#define xsm_claim_pages(xsm, d) 0 + +/* XEN_DOMCTL_soft_reset_cont is inside #ifdef __XEN__ in public/domctl.h */ +#ifndef XEN_DOMCTL_soft_reset_cont +#define XEN_DOMCTL_soft_reset_cont 23 +#endif + +/* physical address bit-width of the hypervisor */ +#define paddr_bits PADDR_BITS + +/* vcpu_guest_context allocation helpers */ +#define alloc_vcpu_guest_context() calloc(1, sizeof(struct vcpu_guest_context)) +#define free_vcpu_guest_context(p) free(p) + +/* Domain lifecycle stubs */ +#define domain_pause(d) ((void)(d)) +#define domain_unpause(d) ((void)(d)) +#define domain_resume(d) ((void)(d)) +#define domain_kill(d) 0 +#define domain_soft_reset(d, cont) (-ENOSYS) +#define domain_create(id, cfg, hvm) ((struct domain *)NULL) +#define domain_update_node_affinity(d) ((void)(d)) +#define domain_set_node_affinity(d, mask) 0 +#define domain_pause_by_systemcontroller(d) 0 +#define domain_unpause_by_systemcontroller(d) 0 +#define domain_set_time_offset(d, off) ((void)(d)) +#define get_domain_by_id(id) ((struct domain *)NULL) +#define hypercall_create_continuation(...) 0 + +/* vCPU stubs */ +#define vcpu_pause(v) ((void)(v)) +#define vcpu_unpause(v) ((void)(v)) + +/* Scheduling / affinity stubs */ +#define sched_adjust(d, op) 0 +#define vcpu_affinity_domctl(d, cmd, aff) 0 + +/* IOMEM and MMIO stubs */ +#define iomem_access_permitted(d, ...) false +#define iomem_permit_access(d, ...) 0 +#define iomem_deny_access(d, ...) 0 +#define paging_mode_translate(d) false +#define is_hardware_domain(d) false +#define is_xenstore_domain(d) false + +/* Misc domctl sub-operation stubs */ +#define vm_event_domctl(d, op) (-EOPNOTSUPP) +#define set_global_virq_handler(d, virq) 0 +#define iommu_do_domctl(op, d, u) (-EOPNOTSUPP) +#define get_domain_state(st, d, id) (-EOPNOTSUPP) +#define arch_do_domctl(op, d, u) (-EOPNOTSUPP) + +/* Provide no-op stubs for these */ +domid_t domid_alloc(domid_t domid) +{ + return domid; +} + +/* For do_domctl() to work with multiple domains for testing claims */ +struct domain *rcu_lock_domain_by_id(domid_t domain_id) +{ + struct domain *d; + + for_each_domain ( d ) + { + if ( d->domain_id == domain_id ) + return d; + } + return NULL; +} + +struct vcpu *vcpu_create(struct domain *d, unsigned int vcpu_id) +{ + (void)(d); + (void)(vcpu_id); + return NULL; +} + +int vcpu_reset(struct vcpu *v) +{ + (void)(v); + return 0; +} + +int arch_set_info_guest(struct vcpu *v, vcpu_guest_context_u c) +{ + (void)(v); + (void)(c); + return 0; +} +void arch_get_info_guest(struct vcpu *v, vcpu_guest_context_u c) +{ + (void)(v); + (void)(c); + return; +} + +void arch_get_domain_info(const struct domain *d, + struct xen_domctl_getdomaininfo *info) +{ + (void)(d); + (void)(info); +} + +void arch_p2m_set_access_required(struct domain *d, bool access_required) +{ + (void)(d); + (void)(access_required); +} + +bool arch_use_domctl_lock(const struct xen_domctl *op) +{ + (void)op; + + return false; +} + +#if XEN_DOMCTL_get_runstate_info == 1099 +void domain_runstate_get(struct domain *d, + struct xen_domctl_runstate_info_ext *info) +{ + (void)d; + (void)info; +} +#endif + +#if (XEN_DOMCTL_numa_op == 1101 && defined(CONFIG_NUMA)) +int numa_domctl(struct domain *d, struct xen_domctl_numa_op *numa, + bool *copyback) +{ + (void)d; + (void)numa; + (void)copyback; + + return -EOPNOTSUPP; +} +#endif +#endif +#endif diff --git a/tools/tests/native/harness/domctl-wrapper.h b/tools/tests/native/harness/domctl-wrapper.h new file mode 100644 index 000000000000..ef7d387e4d70 --- /dev/null +++ b/tools/tests/native/harness/domctl-wrapper.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Wrapper around xen/common/domctl.c for the allocator test framework. + * + * This file includes the real domctl.c directly in its translation unit. + * + * It allows to pass hypercalls from xc_domain to the do_domctl() + * hypercall handler bin xen/common/domctl.c, which is the entry + * point for domctl commands in the Xen hypervisor. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_DOMCTL_WRAPPER_H +#define TOOLS_TESTS_NATIVE_HARNESS_DOMCTL_WRAPPER_H +#ifdef TEST_WRAP_XEN_COMMON_DOMCTL_C +#include "domctl-shim.h" +#pragma GCC diagnostic push +/* Header guards for xen/common/domctl.c inclusion. */ +#define _ASM_HW_IRQ_H +#define __XEN_HYPERCALL_H__ +#pragma GCC diagnostic ignored "-Wunused-parameter" +#ifdef __clang__ +#pragma clang diagnostic ignored "-Wfor-loop-analysis" +#endif +#include "../../xen/common/domctl.c" +#pragma GCC diagnostic pop +#endif +#endif diff --git a/tools/tests/native/harness/memory-shim.h b/tools/tests/native/harness/memory-shim.h new file mode 100644 index 000000000000..f65e359e676d --- /dev/null +++ b/tools/tests/native/harness/memory-shim.h @@ -0,0 +1,201 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Minimal shim to include xen/common/domctl.c in host-side tests. + * + * This shim provides the minimal Xen definitions that domctl.c + * needs to run in a host-side test environment. It replaces a + * minimal subset of the Xen environment that xen/common/domctl.c + * interacts with with stubs so it can run in the test environment, + * allowing test scenarios to verify the behavior of domctl.c. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_MEMORY_SHIM_H +#define TOOLS_TESTS_NATIVE_HARNESS_MEMORY_SHIM_H + +/* + * Guard against language servers and linters picking up this header. + * + * This shim is intended to be used in test programs for testing + * the code of xen/common/domctl.c in a host-side test environment, + * and test programs need to define TEST_WRAP_XEN_COMMON_MEMORY_C + * to enable the definitions in this header. + */ +#ifndef TEST_WRAP_XEN_COMMON_MEMORY_C +#warning "Include this header only in integration tests using memory.c" +#else + +/* + * Inside the intended test context, provide stub definitions. + * + * Some functions need to use types defined in specific headers, + * so we include them and define header guards to prevent unwanted + * definitions from those headers that conflict with the test harness + * or bring in Xen-internal structures that are already provided by + * the natural C compiler defines, libc defines and stubs in this shim. + */ + +/* + * Block headers whose content conflicts with the test harness or that pull in + * types and functions not available in the host environment. Stubs for the + * symbols that memory.c actually uses from those headers are provided below. + */ +#define __XEN_IOREQ_H__ /* ioreq types unavailable; code under CONFIG_IOREQ_SERVER */ +#define __XEN_GRANT_TABLE_H__ /* gnttab_* stubs provided below */ +#define __XEN_LLC_COLORING_H__ /* llc_coloring_enabled stub provided below */ +#define _XEN_MEM_ACCESS_H /* mem_access_memop stub provided below */ +#define __ASM_HARDIRQ_H /* in_irq() stub provided below */ +#define ARM_GENERIC_HARDIRQ_H /* in_irq() stub provided below */ +#define __ASM_GENERIC_HARDIRQ_H /* in_irq() stub provided below */ + +/* + * Stubs for symbols from the blocked headers that memory.c actually uses. + */ + +/* + * XSM hooks used by memory.c beyond those already stubbed in domctl-shim.h. + * The test environment permits all operations. + */ +#ifndef XSM_TARGET +#define XSM_TARGET 0 +#endif +#ifndef XSM_DM_PRIV +#define XSM_DM_PRIV 0 +#endif +#define xsm_memory_exchange(xsm, d) 0 +#define xsm_add_to_physmap(xsm, d1, d2) 0 +#define xsm_domain_resource_map(xsm, d) 0 +#define xsm_memory_adjust_reservation(xsm, a, b) 0 +#define xsm_memory_stat_reservation(xsm, a, b) 0 +#define xsm_remove_from_physmap(xsm, a, b) 0 +#define xsm_get_vnumainfo(xsm, d) 0 + +/* + * MFN equality and invalid sentinel: mm-frame.h is blocked by + * __XEN_FRAME_NUM_H__, so provide these here. + */ +#define mfn_eq(x, y) (mfn_x(x) == mfn_x(y)) + +/* + * Guest-handle range check: asm/guest_access.h is blocked; in the test + * context the handle always covers the requested range. + */ +#ifndef guest_handle_subrange_okay +#define guest_handle_subrange_okay(hnd, first, last) 1 +#endif + +/* + * Static memory: not used in the test environment. + * acquire_reserved_page is declared in xen/mm.h (blocked) and used only + * when is_domain_using_staticmem() is true — which is never in the tests. + */ +#define acquire_reserved_page(d, flags) INVALID_MFN + +/* + * P2M populate-on-demand helpers used in decrease_reservation. + * These paths are not exercised by claim tests. + */ +#define p2m_pod_decrease_reservation(d, gfn, order) 0UL + +/* + * Physmap and p2m operations: stubs for the non-x86 code paths in memory.c. + * On x86 the real implementations live in asm/p2m.h (already blocked by + * domctl-shim.h); the code paths below the #ifdefs still reference these. + */ +#define gfn_to_mfn(d, gfn) _mfn(~0UL) +#define guest_physmap_add_page(d, gfn, mfn, order) (-EOPNOTSUPP) +#define guest_physmap_remove_page(d, gfn, mfn, order) (-EOPNOTSUPP) +#define guest_physmap_mark_populate_on_demand(d, gpfn, order) (-EOPNOTSUPP) + +/* Page reference count helpers used in guest_remove_page and helpers */ +#define get_page(pg, d) true +#define put_page_alloc_ref(pg) ((void)(pg)) +#define get_page_type(pg, type) false +#define put_page_and_type(pg) ((void)(pg)) + +/* Arch page operations used in clear_domain_page / copy_domain_page */ +#ifndef clear_page +#define clear_page(ptr) memset((ptr), 0, PAGE_SIZE) +#endif +#define copy_page_cold(dst, src) memcpy((dst), (src), PAGE_SIZE) +#define copy_page_hot(dst, src) copy_page_cold(dst, src) + +/* + * Memory extent hypercall shift: defined in xen/hypercall.h (blocked). + * do_memory_op() right-shifts cmd by this amount to extract the start extent. + */ +#define MEMOP_EXTENT_SHIFT 6 +#define MEMOP_CMD_MASK ((1 << MEMOP_EXTENT_SHIFT) - 1) + +/* + * GFN equality and invalid sentinel: mm-frame.h is blocked by + * __XEN_FRAME_NUM_H__; gfn_t may be a type-safe wrapper in debug builds. + */ +#define gfn_eq(x, y) (gfn_x(x) == gfn_x(y)) +#define invalidate_icache() ((void)0) + +/* + * RCU domain locking for remote domains: sched.h declares + * rcu_lock_remote_domain_by_id() as a non-static extern. Provide a + * matching non-static definition here. + */ +int rcu_lock_remote_domain_by_id(domid_t dom, struct domain **dp) +{ + struct domain *d; + + for_each_domain ( d ) + { + if ( d->domain_id == dom ) + { + *dp = d; + return 0; + } + } + return -ESRCH; +} + +/* + * p2m_type_t and related constants: architecture p2m.h is blocked by the + * wrapper because its helpers need too much real arch_domain state for this + * harness. Provide the minimal subset used by memory.c. + */ +typedef unsigned int p2m_type_t; +typedef unsigned int p2m_query_t; +#define P2M_ALLOC (1u << 0) +#define P2M_UNSHARE (1u << 1) +#define get_page_from_gfn(d, gfn, t, q) \ + ((void)(t), (void)(q), (struct page_info *)NULL) + +/* grant_table.h: resource frame query/acquire stubs */ +#define gnttab_resource_max_frames(d, id) 0 +#define gnttab_acquire_resource(d, id, f, n, l) (-EOPNOTSUPP) + +/* + * Maximum GPFN: architecture-specific; in the test environment there is no + * real guest memory so return 0. + */ +#define domain_get_maximum_gpfn(d) 0UL + +/* + * Physmap stubs for xenmem_add_to_physmap_one() and set_foreign_p2m_entry(). + * These arch-level operations are not currently supported in the test env. + */ +#define set_foreign_p2m_entry(d, fd, gfn, mfn) (-EOPNOTSUPP) + +/* arch_memory_op: architecture-specific memory operations not tested here. */ +#define arch_memory_op(cmd, arg) (-EOPNOTSUPP) + +/* Stealing is initially not supported in the test environment */ +#define steal_page(d, page, flags) (-EOPNOTSUPP) + +/* mem_access.h: memory access operations are not tested here */ +#define mem_access_memop(cmd, arg) (-EOPNOTSUPP) +#define arch_acquire_resource_check(d) false + +#ifndef in_irq +#define in_irq() false /* Tests aren't in interrupt context */ +#endif +#define is_control_domain(d) false /* All test domains are unprivileged */ + +#endif +#endif diff --git a/tools/tests/native/harness/memory-wrapper.h b/tools/tests/native/harness/memory-wrapper.h new file mode 100644 index 000000000000..bec31804e1d9 --- /dev/null +++ b/tools/tests/native/harness/memory-wrapper.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Wrapper around xen/common/memory.c for the allocator test environment. + * It also provides the pass-through implementation of the xc_memory_op() + * function, which is used by the memory-related hypercalls implemented in + * xc_domain.c to call the memory operation handler in xen/common/memory.c. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_MEMORY_WRAPPER_H +#define TOOLS_TESTS_NATIVE_HARNESS_MEMORY_WRAPPER_H +#ifdef TEST_WRAP_XEN_COMMON_MEMORY_C +#include "memory-shim.h" +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wunused-variable" +#pragma GCC diagnostic ignored "-Wunused-function" +#include "../../xen/common/memory.c" +#pragma GCC diagnostic pop + +/* + * Pass libxenctrl's xc_memory_op() calls to the Xen hypervisor's + * do_memory_op() handler in xen/common/memory.c to run the memory + * operations in the test environment. + */ +long xc_memory_op(xc_interface *xch, unsigned int cmd, + void *arg, size_t arg_size) +{ + union { + XEN_GUEST_HANDLE_PARAM(void) handle; + void *ptr; + } u = { .ptr = arg }; + + ASSERT(xch == &test_xc_handle); + (void)arg_size; + + /* Call xen/common/memory.c's do_memory_op() handler */ + return do_memory_op(cmd, u.handle); +} + +#endif +#endif diff --git a/tools/tests/native/harness/mm-wrapper.h b/tools/tests/native/harness/mm-wrapper.h new file mode 100644 index 000000000000..f6d1093b2608 --- /dev/null +++ b/tools/tests/native/harness/mm-wrapper.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Proxy to include definitions from xen/mm.h for native tests. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_MM_PROXY_H +#define TOOLS_TESTS_NATIVE_HARNESS_MM_PROXY_H + +#ifndef TEST_WRAP_XEN_INCLUDE_XEN_MM_H +#warning "Include this header only in integration tests that need xen/mm.h" +#else +#include "common.h" + +#define __XEN_KCONFIG_H +#include +#undef cf_check +#define cf_check __used + +#define register_t foo; /* Workaround for arm64 sys/types conflict */ +#include +#undef register_t + +/* + * In the real hypervisor, the frame table is located at a fixed virtual + * address, but in the test harness, it is allocated in BSS or heap, so + * replace the fixed virtual address definitions with dynamic ones. + * xen/mm.h defines the frame_table define put point to the virt start. + */ +#undef FRAMETABLE_VIRT_START +#undef FRAMETABLE_VIRT_END +unsigned long FRAMETABLE_VIRT_START; +unsigned long FRAMETABLE_VIRT_END; + +/* + * The test environment needs the virtual address of the direct map which + * the test environment emulates with the bss symbol directmap_virt_start + * defined below. In the real hypervisor, this is a fixed virtual address, + * but in the test environment, it is allocated in BSS, so replace the fixed + * virtual address definition with a dynamic one. + * + * For example, page_set_owner() and page_get_owner() are used to get and set + * the virtual address of the owner domain of a page. They use pdx_to_virt() + * and virt_to_pdx() which use DIRECTMAP_VIRT_START to translate between the + * page_info struct's pdx-encoded owner field and the virtual address of + * the owner domain, so setting DIRECTMAP_VIRT_START to the address of a + * an early page-aligned symbol in the test binary (e.g. test_bss_start) + * allows the test code to set up and get page ownership. + */ +#undef DIRECTMAP_VIRT_START +unsigned long DIRECTMAP_VIRT_START = (unsigned long)&test_bss_start; + +/* Shim definitions for including xen/mm.h in the test context. */ +#define maddr_to_directmapoff(ma) ((unsigned long)(ma)) +#define directmapoff_to_maddr(off) ((paddr_t)(off)) +#define perfc_incr(x) ((void)0) +#define cpumask_copy(dst, src) ((void)(dst), (void)(src)) +#define cpumask_empty(mask) true + +unsigned long phys_offset; +unsigned long xen_phys_start; +char __init_begin[1], __init_end[1]; +struct domain; /* Forward declaration for struct domain* used in arguments */ + +/* Include xen/mm.h into the test context */ +#include +#include +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +#ifndef __clang__ +#pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch" +#endif +#include +#pragma GCC diagnostic pop + +/* Provide definitions for a minimum synthetic heap */ +#undef page_to_mfn +#undef mfn_to_page +#undef mfn_valid +#define page_to_mfn(pg) _mfn((pg) - &frame_table[0]) +#define mfn_to_page(mfn) (&frame_table[mfn_x(mfn)]) +#define mfn_valid(mfn) \ + (mfn_x(mfn) >= mfn_x(first_valid_mfn) && mfn_x(mfn) < max_page) + +/* Provide virtual addresses for synthetic memory provided by the harness */ +#undef mfn_to_virt +#undef __mfn_to_virt +#undef page_to_virt +#undef virt_to_page +static unsigned char test_dummy_storage[PAGE_SIZE]; +#define mfn_to_virt(mfn) ((void *)&test_dummy_storage) +#define __mfn_to_virt(mfn) mfn_to_virt(mfn) +#define page_to_virt(pg) ((void *)(pg)) +#define virt_to_page(v) ((struct page_info *)(v)) + +/* Not supported by the test harness yet, only used by heap init functions. */ +#undef maddr_to_page +#define maddr_to_page(pa) (ASSERT_UNREACHABLE(), NULL) +#endif + +#if defined(__arm__) || defined(__aarch64__) +void dump_hyp_walk(vaddr_t addr) +{ + (void)addr; +} + +void __attribute__((__noreturn__)) panic_PAR(uint64_t par) +{ + (void)par; + ASSERT_UNREACHABLE(); +} +#endif + +#if defined(__riscv) +vaddr_t directmap_virt_start; +#endif + +#endif diff --git a/tools/tests/native/harness/native.h b/tools/tests/native/harness/native.h new file mode 100644 index 000000000000..87553d45d7ec --- /dev/null +++ b/tools/tests/native/harness/native.h @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Main header of the test environment. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_NATIVE_H +#define TOOLS_TESTS_NATIVE_HARNESS_NATIVE_H + +#pragma GCC diagnostic error "-Wextra" +#include "common.h" + +/* + * The test environment needs the virtual address of the direct map which + * the test environment emulates with the bss symbol directmap_virt_start + * defined below. In the real hypervisor, this is a fixed virtual address, + * but in the test environment, it is allocated in BSS, so replace the fixed + * virtual address definition with a dynamic one. + * + * For example, page_set_owner() and page_get_owner() are used to get and set + * the virtual address of the owner domain of a page. They use pdx_to_virt() + * and virt_to_pdx() which use DIRECTMAP_VIRT_START to translate between the + * page_info struct's pdx-encoded owner field and the virtual address of + * the owner domain, so setting DIRECTMAP_VIRT_START to the address of a + * an early page-aligned symbol in the test binary (e.g. test_bss_start) + * allows the test code to set up and get page ownership. + */ +void __aligned(PAGE_SIZE) *test_bss_start; + +#ifdef TEST_ENABLE_XC_DOMAIN_C +#define TEST_WRAP_XEN_COMMON_SYSCTL_C +#endif + +/* If sysctl.c is included, enable CONFIG_SYSCTL for it dependencies */ +#ifdef TEST_WRAP_XEN_COMMON_SYSCTL_C +#define CONFIG_SYSCTL 1 +#endif + +/* + * The test environment uses the real Xen page allocator, so include the + * page-alloc-shim which provides the necessary supporting structures and + * stubs for it to function correctly in the test environment. + */ +#define TEST_WRAP_XEN_COMMON_PAGE_ALLOC_C +#include "page-alloc-shim.h" + +/* Include the real page_alloc.c for testing */ +#pragma GCC diagnostic push +/* At a later point, fix the remaining sign-compare warnings in page_alloc.c */ +#pragma GCC diagnostic ignored "-Wsign-compare" +#pragma GCC diagnostic ignored "-Wunused-parameter" +/* + * Instrumenting the BUG() macro asserting to hit it means it is no longer + * noreturn, and a function expects it to be noreturn, so disable this warning + */ +#pragma GCC diagnostic ignored "-Wreturn-type" +#include "../../xen/common/page_alloc.c" +#pragma GCC diagnostic pop + +#ifdef TEST_WRAP_XEN_COMMON_DOMCTL_C +#include "domctl-wrapper.h" +#endif + +#ifdef TEST_ENABLE_XC_DOMAIN_C +#include "xc-domain-env.h" +#define TEST_WRAP_XEN_COMMON_MEMORY_C +#endif + +#ifdef TEST_WRAP_XEN_COMMON_MEMORY_C +#include "memory-wrapper.h" +#endif + +#ifdef TEST_WRAP_XEN_COMMON_SYSCTL_C +#include "sysctl-wrapper.h" +#endif + +#ifdef TEST_WRAP_XEN_COMMON_PAGE_ALLOC_C +#include "page-alloc-env.h" +#endif + +#endif diff --git a/tools/tests/native/harness/page-alloc-env.h b/tools/tests/native/harness/page-alloc-env.h new file mode 100644 index 000000000000..53e36c8a3f05 --- /dev/null +++ b/tools/tests/native/harness/page-alloc-env.h @@ -0,0 +1,254 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Test environment to compile xen/common/page_alloc.c into the test + * environment and provide the necessary supporting structures and stubs + * for it to function correctly. + * + * Also provide helper functions to set up test scenarios and check the + * resulting state of the page allocator. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_PAGE_ALLOC_ENV_H +#define TOOLS_TESTS_NATIVE_PAGE_ALLOC_ENV_H + +#ifdef TEST_WRAP_XEN_COMMON_PAGE_ALLOC_C +#include "native.h" +static const unsigned int node = 0; +static const unsigned int node0 = 0; +static const unsigned int node1 = 1; +static const unsigned int order0 = 0; +static const unsigned int order1 = 1; +static const unsigned int order2 = 2; +static const unsigned int order3 = 3; + +/* Backing storage for the synthetic allocator state used by the tests. */ +#ifndef PAGES_PER_ZONE +#define PAGES_PER_ZONE 8 +#endif + +#ifndef MAX_PAGES +#define MAX_PAGES (MAX_NUMNODES * NR_ZONES * PAGES_PER_ZONE) +#endif + +/* + * The synthetic frame table backs the page_info entries used by the tests. + * It is indexed by MFN so helper code and the imported allocator can + * translate directly between MFNs and page_info pointers. + */ +struct page_info test_frame_table[MAX_PAGES]; +static heap_by_zone_and_order_t test_heap_storage[MAX_NUMNODES]; +static unsigned long test_avail_storage[MAX_NUMNODES][NR_ZONES]; +struct domain *domain_list; + +static void init_numa_node_data(unsigned int start_mfn) +{ + (void)start_mfn; +#ifdef CONFIG_NUMA + unsigned long node_spanned_pages = 16; + + for ( unsigned int i = 0; i < NR_CPUS; i++ ) + cpu_to_node[i] = i; + + for ( unsigned int i = 0; i < MAX_NUMNODES; i++ ) + node_to_cpumask[i] = (1UL << i); + + for ( unsigned int i = 0; i < MAX_NUMNODES; i++ ) + { + node_data[i].node_start_pfn = start_mfn + (i * node_spanned_pages); + node_data[i].node_present_pages = node_spanned_pages; + node_data[i].node_spanned_pages = node_spanned_pages; + } + memnode_shift = fls(node_spanned_pages - 1); + for ( unsigned int i = 0; i < 64; i++ ) + memnodemap[i] = (nodeid_t)i; +#endif +} + +static void init_dummy_domains(void) +{ + nodemask_t dom_node_affinity; + struct domain *dom; + int dom_id = 1; + + nodes_clear(dom_node_affinity); + node_set(node0, dom_node_affinity); + node_set(node1, dom_node_affinity); + test_current_vcpu.domain = &test_dummy_domain1; + domain_list = &test_dummy_domain1; + test_dummy_domain1.next_in_list = &test_dummy_domain2; + + for_each_domain ( dom ) + { + dom->node_affinity = dom_node_affinity; + dom->max_pages = MAX_PAGES; + dom->domain_id = dom_id++; + INIT_PAGE_LIST_HEAD(&dom->page_list); + } +} + +/* Internal correctness check: page_get_owner and page_set_owner must match. */ +static void sanity_check_page_ownership_accessors(void) +{ + struct page_info *page = &frame_table[0]; + + /* Ignore the always true warning caused by the static dummy domain */ + #pragma GCC diagnostic push + #pragma GCC diagnostic ignored "-Waddress" + page_set_owner(page, &test_dummy_domain1); + #pragma GCC diagnostic pop + + ASSERT(page_get_owner(page) == &test_dummy_domain1); + page_set_owner(page, NULL); /* Clear the owner again */ +} + +static void reset_page_alloc_state(int start_mfn) +{ + unsigned int zone, order; + + /* Initialize frame table and heap structures */ + FRAMETABLE_VIRT_START = (unsigned long)test_frame_table; + FRAMETABLE_VIRT_END = (unsigned long)(test_frame_table + MAX_PAGES); + memset(test_frame_table, 0, sizeof(test_frame_table)); + memset(test_heap_storage, 0, sizeof(test_heap_storage)); + memset(test_avail_storage, 0, sizeof(test_avail_storage)); + memset(&test_dummy_domain1, 0, sizeof(test_dummy_domain1)); + memset(&test_dummy_domain2, 0, sizeof(test_dummy_domain2)); + memset(&test_current_vcpu, 0, sizeof(test_current_vcpu)); + system_state = SYS_STATE_active; + INIT_PAGE_LIST_HEAD(&page_offlined_list); + INIT_PAGE_LIST_HEAD(&page_broken_list); + + init_numa_node_data(start_mfn); + for ( nodeid_t node = 0; node < MAX_NUMNODES; node++ ) + { + _heap[node] = &test_heap_storage[node]; + avail[node] = test_avail_storage[node]; + node_avail_pages[node] = 0; + claimed_pages[node] = 0; + for ( zone = 0; zone < NR_ZONES; zone++ ) + for ( order = 0; order <= MAX_ORDER; order++ ) + INIT_PAGE_LIST_HEAD(&heap(node, zone, order)); + } + total_avail_pages = 0; + outstanding_claims = 0; + first_valid_mfn = _mfn(start_mfn); + max_page = sizeof(test_frame_table) / sizeof(test_frame_table[0]); + ASSERT(mfn_x(first_valid_mfn) < max_page); + init_dummy_domains(); + sanity_check_page_ownership_accessors(); + testcase_assert_verbose_assertions = true; +} + +static void __used init_page_alloc_tests(void) +{ + setup_testcase_init_func(reset_page_alloc_state); +} + +static void init_test_page(struct page_info *page, unsigned int order, + unsigned long state) +{ + mfn_t mfn = page_to_mfn(page); + + if ( mfn_x(mfn) < mfn_x(first_valid_mfn) && mfn_x(mfn) > 0 && + mfn_x(mfn) < max_page ) + first_valid_mfn = mfn; + + if ( mfn_x(mfn) >= max_page && mfn_x(mfn) < ARRAY_SIZE(test_frame_table) ) + max_page = mfn_x(mfn) + 1; + + memset(page, 0, sizeof(*page)); + page->v.free.order = order; + page->u.free.first_dirty = INVALID_DIRTY_IDX; + page->u.free.scrub_state = BUDDY_NOT_SCRUBBING; + page->count_info = state; +} + +/* Check whether the page is aligned to its order (is size-aligned) */ +static bool page_aligned(struct page_info *pg) +{ + return IS_ALIGNED(mfn_x(page_to_mfn(pg)), 1UL << PFN_ORDER(pg)); +} + +static size_t __used page_list_add_buddy(struct page_info *pages, + unsigned int order, + const char *caller_file, + const char *caller_func, + int caller_line) +{ + size_t i, num_pages = 1U << order; + bool verbose = testcase_assert_verbose_assertions; + + testcase_assert_verbose_assertions = false; + init_test_page(&pages[0], order, PGC_state_inuse); + for ( i = 1; i < num_pages; i++ ) + init_test_page(&pages[i], order0, PGC_state_inuse); + free_heap_pages(&pages[0], order, false); + + if ( !page_aligned(&pages[0])) + testcase_assert(false, caller_file, caller_line, caller_func, + "Buddy of order %u at MFN %lu is not size-aligned", + order, mfn_x(page_to_mfn(&pages[0]))); + if ( page_to_zone(&pages[0]) != page_to_zone(&pages[num_pages - 1]) ) + testcase_assert(false, caller_file, caller_line, caller_func, + "Buddy of order %u at MFN %lu crosses zones: " + "start zone %u, end zone %u", order, + mfn_x(page_to_mfn(&pages[0])), + page_to_zone(&pages[0]), + page_to_zone(&pages[num_pages - 1])); + testcase_assert_verbose_assertions = verbose; + return page_to_zone(&pages[0]); +} +#define test_page_list_add_buddy(pages, order) \ + page_list_add_buddy(pages, order, __FILE__, __func__, __LINE__) + +#define test_page_list_add_node_buddy(node, start_mfn, order) \ + page_list_add_buddy(frame_table + node_data[node].node_start_pfn + \ + (start_mfn), order, __FILE__, __func__, __LINE__) + +#define test_get_node_page(node, offset) \ + (frame_table + node_data[node].node_start_pfn + (offset)) + +/* Check consistency of total xc_availheap() pages with total_avail_pages */ +static void check_xc_avail_heap(const char *file, int line, const char *func) +{ +#if defined(TEST_ENABLE_XC_DOMAIN_C) && defined(TEST_WRAP_XEN_COMMON_SYSCTL_C) + uint64_t free_bytes; + + testcase_assert(xc_availheap(xch, 0, 0, -1, &free_bytes) == 0, + file, line, func, "xc_availheap() failed"); + testcase_assert(free_bytes / XC_PAGE_SIZE == total_avail_pages, + file, line, func, "xc_availheap() != total_avail_pages"); +#endif +} + +/* Get the number of free pages with consistency checks */ +unsigned long get_free_pages(const char *file, int line, const char *func) +{ + bool verbose = testcase_assert_verbose_assertions; + + testcase_assert_verbose_assertions = false; + check_xc_avail_heap(file, line, func); + testcase_assert(avail_heap_pages(MEMZONE_XEN, NR_ZONES - 1, -1) == + total_avail_pages, file, line, func, "avail_heap_pages()"); + testcase_assert_verbose_assertions = verbose; + return total_avail_pages; +} + +#define FREE_PAGES get_free_pages(__FILE__, __LINE__, __func__) +#define TOTAL_CLAIMS (outstanding_claims) + +/* Stubs needed for the page allocator */ + +/* Stub for page_alloc.c's keyhandler registrations */ +void __init register_keyhandler(unsigned char key, keyhandler_fn_t *fn, + const char *desc, bool diagnostic) +{ + (void)key; + (void)fn; + (void)desc; + (void)diagnostic; +} + +#endif +#endif diff --git a/tools/tests/native/harness/page-alloc-shim.h b/tools/tests/native/harness/page-alloc-shim.h new file mode 100644 index 000000000000..75652c9291ba --- /dev/null +++ b/tools/tests/native/harness/page-alloc-shim.h @@ -0,0 +1,328 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Minimal shim to include xen/common/page_alloc.c in host-side tests. + * + * This shim provides the minimal Xen definitions that page_alloc.c + * needs to run in a host-side test environment. It replaces a + * minimal subset of the Xen environment that xen/common/page_alloc.c + * interacts with with stubs so it can run in the test environment, + * allowing test scenarios to verify the behavior of page_alloc.c. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_PAGE_ALLOC_SHIM_H +#define TOOLS_TESTS_NATIVE_HARNESS_PAGE_ALLOC_SHIM_H + +/* + * Guard against language servers and linters picking up this header. + * + * This shim is intended to be used in test programs for testing the + * code of xen/common/page_alloc.c in a host-side test environment, + * and test programs need to define TEST_WRAP_XEN_COMMON_PAGE_ALLOC_C + * to enable the definitions in this header. + */ +#ifdef TEST_WRAP_XEN_COMMON_PAGE_ALLOC_C +#define CONFIG_SCRUB_DEBUG +#define TEST_WRAP_XEN_INCLUDE_XEN_MM_H + +/* Provide struct page_info and related Xen definitions */ +#include "common.h" +#include "mm-wrapper.h" + +#include /* xen/pci.h needs to include xen/nospec.h */ +#include +#include +#include + +/* Include xen/numa.h with stubs and unused parameter warnings disabled */ +#define cpumask_clear_cpu(cpu, mask) ((void)(cpu), (void)(mask)) +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +#include +#pragma GCC diagnostic pop + +/* Flexible definition to support 32- and 64-bit architectures */ +typedef unsigned long nodemask_t; + +/* + * Include xen/sched.h for struct domain and struct vcpu definitions. + * The guards need to prevent inclusion of the conflicting headers + * that would cause problems in the test context, but sched.h itself + * is needed to provide the full definitions of struct domain and + * struct vcpu that page_alloc.c interacts with. + */ + +/* + * Provide stubs for types from blocked headers that xen/sched.h's struct + * domain and struct vcpu reference by value. These are minimal empty + * definitions sufficient to make the structs compile in the test context. + */ +typedef cpumask_t *cpumask_var_t; +struct timer {}; +#ifndef __riscv +struct arch_domain {}; +struct arch_vcpu {}; +struct arch_vcpu_io {}; +#endif +struct lock_profile {}; +struct lock_profile_qhead {}; +struct tasklet {}; +struct _rcu_read_lock {}; +typedef struct _rcu_read_lock rcu_read_lock_t; + +/* rcu_dereference is used by for_each_domain in sched.h (rcupdate.h blocked) */ +#define rcu_dereference(p) (p) + +/* perfc_incr is used in SCHED_STAT_CRANK (perfc.h blocked) */ +#define perfc_incr(x) ((void)0) + +/* + * Macros and stubs needed by sched.h's inline function bodies during header + * compilation. These come from headers that are blocked above. Some are + * also redefined in the stubs section below. + */ + +/* + * RCU annotation and helper stubs. rcupdate.h is blocked; provide the + * minimal definitions that radix-tree.h and sched.h need during compilation. + */ +#define __rcu /* RCU ownership annotation (empty) */ +#define rcu_assign_pointer(p, v) ((p) = (v)) +struct rcu_head { + struct rcu_head *next; + void (*func)(struct rcu_head *); +}; + +static struct vcpu __used *current; /* zero-init; assigned via constructor below */ +enum system_state system_state = SYS_STATE_active; + +/* Macros used by sched.h inline functions (blocked headers provide these) */ +#define cpumask_weight(mask) 1U +#define rcu_read_lock(lock) ((void)(lock)) +#define rcu_read_unlock(lock) ((void)(lock)) +/* + * Minimal per-CPU stubs: sched.h uses DECLARE_PER_CPU and this_cpu() in + * inline functions. These come from the blocked percpu.h. Map onto simple + * file-scope static variables to satisfy compilation. + */ +#define this_cpu(x) (shim_per_cpu__##x) + +/* + * page_to_list is a macro in mock-page-list.h (included earlier) AND a + * static inline in sched.h. Undefine the macro before the include so that + * sched.h can define the function without a conflicting macro expansion. + * The mock macro is restored after sched.h is included. + */ +#undef page_to_list +#undef is_xen_heap_page +#undef is_xen_fixed_mfn +#undef is_xen_heap_mfn +#define is_xen_heap_page(pg) false +#define is_xen_fixed_mfn(mfn) false +#define is_xen_heap_mfn(mfn) false + +/* + * domain_crash has a 1-arg macro in hypervisor-macros.h and a variadic + * macro in sched.h. Undefine before the include to avoid -Wmacro-redefined; + * sched.h's variadic version plus the __domain_crash() stub provided below + * give us the correct behaviour in the test context. + */ +#undef domain_crash + +/* ioreq.h provides ioreq_t used by struct vcpu_io inside sched.h */ +#include + +/* + * Include the real xen/sched.h to get struct domain, struct vcpu, and + * all related declarations. The guards above prevent conflicting + * subsidiary headers from being pulled in. Suppress warnings about + * unused parameters in the Xen header inline functions. + */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +/* + * Suppress builtin declaration mismatch warnings for Xen's ffsl and flsl + * definitions, Xen's ffs macros are unsigned while gcc expects signed. + */ +#ifndef __clang__ +#pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch" +#else +#pragma clang diagnostic ignored "-Wtypedef-redefinition" +#endif +#include +#pragma GCC diagnostic pop + +/* Dummy domains for allocations and page ownership in the test context */ +static struct domain test_dummy_domain1; +static struct domain test_dummy_domain2; +static struct domain __used *dom1 = &test_dummy_domain1; +static struct domain __used *dom2 = &test_dummy_domain2; + +/* + * Restore test-friendly overrides for sched.h macros that reference + * real Xen runtime infrastructure (domain_destroy, etc.). + */ +#undef put_domain +#define put_domain(d) ((void)(d)) + +/* RCU domain locking (additional stubs beyond rcu_lock_domain already there) */ +#define rcu_unlock_domain(d) ((void)(d)) +#define dom_io (&test_dummy_domain1) +#define dom_xen (&test_dummy_domain2) + +/* To provide a current vcpu/domain pair for code paths that inspect it. */ + +static struct vcpu test_current_vcpu; +/* 'current' was forward-declared before sched.h. Set the pointer at + * program startup via a constructor so that test helpers see the right vcpu + * from the very first call into the allocator. */ +static void __attribute__((constructor)) _page_alloc_shim_init_current(void) +{ + current = &test_current_vcpu; +} +/* dom_cow is a domain pointer used by the memory sharing code */ +#ifdef CONFIG_MEM_SHARING +static struct domain *dom_cow; +#else +#define dom_cow NULL +#endif + +/* NUMA stubs for unit testing NUMA-aware page allocator logic. */ +#define first_node(mask) \ + ({ \ + unsigned long __mask = (mask); \ + __builtin_ffs(__mask) - 1; \ + }) +#define next_node(node, mask) \ + ({ \ + unsigned long __mask = (mask) & ~((1UL << ((node) + 1)) - 1); \ + __builtin_ffs(__mask) - 1; \ + }) +#define cycle_node(node, mask) \ + ({ \ + unsigned long __mask = (mask) & ~((1UL << ((node) + 1)) - 1); \ + int __next = __builtin_ffs(__mask) - 1; \ + __next >= 0 ? __next : first_node(mask); \ + }) +#define num_online_nodes() MAX_NUMNODES +#define node_online(node) ((node) < MAX_NUMNODES) +static nodemask_t node_online_map = ~0UL; + +#ifdef CONFIG_NUMA +/* Replacements for common/numa.c */ +#define __node_distance(a, b) 0 +nodeid_t cpu_to_node[NR_CPUS]; +cpumask_t node_to_cpumask[MAX_NUMNODES]; +struct node_data node_data[MAX_NUMNODES]; +unsigned int memnode_shift; +static typeof(*memnodemap) _memnodemap[64]; +nodeid_t *memnodemap = _memnodemap; +unsigned long memnodemapsize = sizeof(_memnodemap); +#endif /* CONFIG_NUMA */ + +/* + * Stub definitions for Xen functions and macros used by page_alloc.c, + * sufficient to support the test scenarios. + * + * These are not intended to be complete or accurate for general use + * in other test contexts or as a general-purpose shim for page_alloc.c. + */ +#define rcu_lock_domain(id) (&test_dummy_domain1) +#define rcu_lock_domain_by_any_id(id) (&test_dummy_domain1) +#define NOW() 0LL +#define cpu_online(cpu) ((cpu) == 0) +#define smp_processor_id() 0U +/* smp_wmb and cpumask_weight defined before sched.h include; identical + * redefinitions here are benign but kept for clarity. */ +#define cpumask_empty(mask) true +#define cpumask_clear(mask) ((void)(mask)) +#define cpumask_and(dst, a, b) ((void)(dst), (void)(a), (void)(b)) +#define cpumask_or(dst, a, b) ((void)(dst), (void)(a), (void)(b)) +#define cpumask_copy(dst, src) ((void)(dst), (void)(src)) +#define cpumask_first(mask) 0U +#define cpumask_intersects(a, b) false + +#define parse_bool(s, e) (-1) /* Use the default register_keyhandler value */ + +/* cpumask_weight defined before sched.h; identical redefinition is benign */ +#define __cpumask_set_cpu(cpu, mask) ((void)(cpu), (void)(mask)) +#define page_get_owner_and_reference(pg) page_get_owner(pg) +#define page_is_offlinable(mfn) true +#define softirq_pending(cpu) false +#define process_pending_softirqs() ((void)0) +#define on_selected_cpus(msk, f, data, w) ((void)0) +#define get_order_from_pages(nr) 0U +#define get_order_from_bytes(bytes) 0U + +/* Testing hypercall preemption is not supported yet. */ +#undef hypercall_preempt_check +#define hypercall_preempt_check() 0 + +#undef arch_free_heap_page +#define arch_free_heap_page(d, pg) ((void)(d), (void)(pg)) +#define unmap_domain_page(ptr) ((void)(ptr)) +#define ASSERT_ALLOC_CONTEXT() ((void)0) +#define get_knownalive_domain(d) ((void)(d)) +#define mem_paging_enabled(d) false + +#define put_page(pg) ((void)(pg)) +bool get_page(struct page_info *page, const struct domain *domain) +{ + (void)page; + (void)domain; + return false; +} + +#ifdef __x86_64__ +#define clear_page_hot(ptr) memset((ptr), 0, PAGE_SIZE) +#define clear_page_cold(ptr) memset((ptr), 0, PAGE_SIZE) +#define scrub_page_hot(ptr) clear_page_hot(ptr) +#define scrub_page_cold(ptr) clear_page_cold(ptr) +#define set_gpfn_from_mfn(mfn, gpfn) ((void)0) + +unsigned int arch_get_dma_bitsize(void) +{ + return 32U; +} +#endif + +#if defined(__arm__) || defined(__aarch64__) +#define test_and_clear_bit(nr, addr) generic__test_and_clear_bit(nr, addr) +#endif + +/* LLC (Last Level Cache) coloring support stubs */ +#define llc_coloring_enabled false +unsigned int get_max_nr_llc_colors(void) +{ + return 1U; +} + +unsigned int page_to_llc_color(const struct page_info *pg) +{ + (void)pg; + return 0U; +} + +void send_global_virq(uint32_t virq) +{ + (void)virq; +} + +unsigned long simple_strtoul(const char *cp, const char **endp, + unsigned int base) +{ + return strtoul(cp, (char **)endp, base); +} + +/* + * __domain_crash is declared by sched.h (via domain_crash macro) but has no + * definition for the test environment. Provide a no-op stub so the test + * binary links correctly if domain_crash is ever expanded. + */ +void __domain_crash(struct domain *d) +{ + (void)d; +} + +#endif +#endif diff --git a/tools/tests/native/harness/sysctl-shim.h b/tools/tests/native/harness/sysctl-shim.h new file mode 100644 index 000000000000..e4170619c46b --- /dev/null +++ b/tools/tests/native/harness/sysctl-shim.h @@ -0,0 +1,155 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Minimal shim to include xen/common/sysctl.c in host-side tests. + * + * This shim provides the minimal Xen definitions that sysctl.c + * needs to run in a host-side test environment. It replaces a + * minimal subset of the Xen environment that xen/common/sysctl.c + * interacts with with stubs so it can run in the test environment, + * allowing test scenarios to verify the behavior of sysctl.c. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_SYSCTL_SHIM_H +#define TOOLS_TESTS_NATIVE_HARNESS_SYSCTL_SHIM_H + +/* + * Guard against language servers and linters picking up this header. + * + * This shim is intended to be used in test programs for testing + * the code of xen/common/sysctl.c in a host-side test environment, + * and test programs need to define TEST_WRAP_XEN_COMMON_SYSCTL_C + * to enable the definitions in this header. + */ +#ifndef TEST_WRAP_XEN_COMMON_SYSCTL_C +#warning "Include this header only in integration tests using sysctl.c" +#else + +/* + * Inside the intended test context, provide stub definitions. + * + * Some functions need to use types defined in specific headers, + * so we include them and define header guards to prevent unwanted + * definitions from those headers that conflict with the test harness + * or bring in Xen-internal structures that are already provided by + * the natural C compiler defines, libc defines and stubs in this shim. + */ + +/* + * Block headers whose content conflicts with the test harness or that pull in + * types and functions not available in the host environment. Stubs for the + * symbols that sysctl.c actually uses from those headers are provided below. + */ + +/* console.h: read_console_ring stub provided below. */ +#define __CONSOLE_H__ + +/* + * RCU read-side locking. + * + * struct _rcu_read_lock, rcu_read_lock_t, rcu_read_lock(), and + * rcu_read_unlock() are now provided by page-alloc-shim.h (before sched.h + * is included). Only keep the helpers that sysctl-shim.h itself uses. + */ +#define DEFINE_RCU_READ_LOCK(x) static rcu_read_lock_t x + +/* domlist_read_lock is declared extern in sched.h; provide the definition. */ +rcu_read_lock_t domlist_read_lock; + +/* + * XSM hooks used by sysctl.c beyond those already stubbed in + * domctl-shim.h and memory-shim.h. + * The test environment permits all operations. + */ +#define xsm_sysctl(xsm, d) ((void)(d), 0) +#define xsm_readconsole(xsm, clear) ((void)(clear), 0) +#define xsm_page_offline(xsm, cmd) ((void)(cmd), 0) + +/* console.h stubs: read_console_ring is not tested here. */ +#define read_console_ring(op) ((void)(op), -EOPNOTSUPP) + +/* + * keyhandler.h is already included by page-alloc-shim.h; stub + * handle_keypress as a no-op so the debug-keys sysctl case compiles. + */ +#define handle_keypress(key, ctx) ((void)(key), (void)(ctx)) + +/* + * Scheduler stubs. + * + * sched.h is blocked by __SCHED_H__ in page-alloc-shim.h. + */ +#define scheduler_id() 0 +#define sched_adjust_global(op) ((void)(op), -EOPNOTSUPP) +#define get_cpu_idle_time(cpu) ((void)(cpu), 0ULL) + +/* cpupool_do_sysctl: cpupool operations are not tested here. */ +#define cpupool_do_sysctl(op) ((void)(op), -EOPNOTSUPP) + +/* + * CPU and node count stubs. + * + * cpumask.h is blocked by __XEN_CPUMASK_H in page-alloc-shim.h. + * nodemask.h is blocked by __LINUX_NODEMASK_H there too. + */ +#define nr_cpu_ids 1U +#define num_online_cpus() 1U + +/* cpumask_last: highest present CPU index. Single-CPU host → 0. */ +#define cpumask_last(mask) 0U + +/* + * cpu_present_map: reuse cpu_online_map which is already defined as a + * static cpumask_t in page-alloc-shim.h. + */ +#define cpu_present_map cpu_online_map +#define cpu_present(i) ((i) == 0U) + +/* + * last_node(mask): index of the highest-set bit in the nodemask. + * nodemask_t is unsigned long in this test environment (harness.h). + * Return MAX_NUMNODES-1 so num_nodes = MAX_NUMNODES consistently with + * num_online_nodes(). + */ +#define last_node(mask) ((int)(MAX_NUMNODES - 1)) + +/* CPU topology: single-socket single-core test host. */ +#ifdef __x86_64__ +#define cpu_to_core(cpu) ((void)(cpu), 0U) +#define cpu_to_socket(cpu) ((void)(cpu), 0U) +#endif + +/* get_upper_mfn_bound: arch-specific stub; return 0 for the test. */ +#define get_upper_mfn_bound() 0UL + +/* arch_do_physinfo: no-op arch extension to XEN_SYSCTL_physinfo. */ +#define arch_do_physinfo(pi) ((void)(pi)) + +/* arch_do_sysctl: fall-through for unrecognised sysctl commands. */ +#define arch_do_sysctl(op, u) ((void)(op), (void)(u), -EOPNOTSUPP) + +/* + * cpu_khz: nominal 1 GHz for the test environment. + * + * Using a variable rather than a macro avoids the preprocessor expanding + * the name inside struct-member access expressions like pi->cpu_khz. + */ +static unsigned long cpu_khz = 1000000UL; + +/* IOMMU: not configured in the test environment. */ +#define iommu_enabled false +#define iommu_hap_pt_share false + +/* + * vmtrace_available is already #define'd false via xen/domain.h when + * CONFIG_VMTRACE is not set. + * + * vpmu_is_available is declared extern in xen/domain.h with no CONFIG + * guard; shadow it here so no definition is needed at link time. + */ +#define vpmu_is_available false + +/* xen/grant_table.h is blocked by __XEN_GRANT_TABLE_H__ in memory-shim.h. */ +#define opt_gnttab_max_version 0 +#endif +#endif diff --git a/tools/tests/native/harness/sysctl-wrapper.h b/tools/tests/native/harness/sysctl-wrapper.h new file mode 100644 index 000000000000..48857bbc800b --- /dev/null +++ b/tools/tests/native/harness/sysctl-wrapper.h @@ -0,0 +1,38 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Wrapper around xen/common/sysctl.c for the allocator test framework. + * + * Includes the real sysctl.c directly in its translation unit. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_SYSCTL_WRAPPER_H +#define TOOLS_TESTS_NATIVE_HARNESS_SYSCTL_WRAPPER_H +#ifdef TEST_WRAP_XEN_COMMON_SYSCTL_C + +#include "sysctl-shim.h" +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wunused-parameter" +#pragma GCC diagnostic ignored "-Wunused-variable" +#pragma GCC diagnostic ignored "-Wunused-function" +#include "../../xen/common/sysctl.c" +#pragma GCC diagnostic pop + +#define TEST_WRAP_TOOLS_INCLUDE_XENCTRL_H +#include "xenctrl-shim.h" + +int xc_sysctl(xc_interface *xch, struct xen_sysctl *sysctl) +{ + /* Convert from sysctl pointer to xen_sysctl_t handle */ + union { + XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) handle; + struct xen_sysctl *ptr; + } u = { .ptr = sysctl }; + + sysctl->interface_version = XEN_SYSCTL_INTERFACE_VERSION; + ASSERT(xch == &test_xc_handle); + return do_sysctl(u.handle); /* Call xen/common/sysctl.c's do_sysctl() */ +} + +#endif +#endif diff --git a/tools/tests/native/harness/testcase-asserts.h b/tools/tests/native/harness/testcase-asserts.h new file mode 100644 index 000000000000..ac850a8fb052 --- /dev/null +++ b/tools/tests/native/harness/testcase-asserts.h @@ -0,0 +1,310 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Functions for running test cases and reporting results. + * + * Copyright (C) 2026 Cloud Software Group + */ + +#ifndef TOOLS_TESTS_NATIVE_HARNESS_TESTCASE_ASSERTS_H +#define TOOLS_TESTS_NATIVE_HARNESS_TESTCASE_ASSERTS_H + +/* Common macros compatible with the test environment. */ +#include "xen-macros.h" + +/* Macros for assertions and test case management. */ +#ifndef _SUBPATH_ +#define _SUBPATH_ "tools/tests/native" +#endif +#define __used __attribute__((__used__)) +#define assert_failed_str "Assertion failed: " +#define CHECK(condition, fmt, ...) \ + testcase_assert(condition, __FILE__, __LINE__, __func__, fmt, \ + ##__VA_ARGS__) +#define ASSERT(x) \ + testcase_assert(x, __FILE__, __LINE__, __func__, assert_failed_str #x) +#define BUG_ON(x) \ + testcase_assert(!(x), __FILE__, __LINE__, __func__, "BUG_ON: " #x) +#define ASSERT_UNREACHABLE() assert(false) +#define EXPECT_FAIL_BEGIN() (testcase_assert_expect_fail = true) +#define EXPECT_FAIL_END(c) testcase_assert_check_expected_failures(c) + +/* Structure to hold information about each test case. */ +struct testcase { + const char *name; /* test case name */ + const char *tid; /* Test ID */ + int intarg; /* passed to the test case */ + void (*func)(int); /* Test case function */ + int passed_asserts; /* Number of ASSERTS that passed. */ + int expected_failures; /* Number of XFAILs */ + bool disabled; /* Whether the test case is disabled */ + bool failed; /* Whether the test case failed */ +} testcases[40]; + +/* Global variables to track the current test case and assertion results. */ +struct testcase *current_testcase = testcases; +static bool testcase_assert_expect_fail = false; +static bool testcase_assert_verbose_assertions; +static int testcase_assert_verbose_indent_level; +static int testcase_assert_expected_failures; +static int testcase_assert_expected_failures_total; +static int testcase_assert_successful_assert_total; +static void (*testcase_init_func)(int); +static char **testcase_assert_enabled_tests; +static const char *testcase_program_name; +static const char *testcase_assert_current_func; + +/* Print a report for a single test, including its ID, name, and results. */ +static void testcase_print_tid_report(struct testcase *tc) +{ + printf("- %-5s %-34s %2d: ", tc->tid, tc->name, tc->intarg); + if ( tc->disabled ) + printf(" disabled"); /* This test case was disabled */ + else + { + printf("%3d assertions passed", tc->passed_asserts); + if ( tc->failed ) + printf(" (FAILED)"); + if ( tc->expected_failures ) + printf(" (%2d XFAIL)", tc->expected_failures); + } + printf("\n"); +} + +/* Print a summary of all test cases, including totals of the enabled tests. */ +static void testcase_print_summary(void) +{ + int total_asserts = 0, expected_failures = 0; + + printf("\nTest Report:\n"); + + current_testcase = testcases; + for ( size_t i = 0; i < ARRAY_SIZE(testcases) && current_testcase->func; + i++ ) + { + testcase_print_tid_report(current_testcase); + total_asserts += current_testcase->passed_asserts; + expected_failures += current_testcase->expected_failures; + current_testcase++; + } + current_testcase->tid = "Total"; + current_testcase->name = ""; + current_testcase->passed_asserts = total_asserts; + current_testcase->expected_failures = expected_failures; + current_testcase->intarg = current_testcase - testcases; + testcase_print_tid_report(current_testcase); + + /* Print if testcase_assert_enabled_tests has tests which were enabled */ + if ( *testcase_assert_enabled_tests ) + { + printf("\nEnabled tests:"); + for ( char **p = testcase_assert_enabled_tests; *p; p++ ) + { + printf(" %s", *p); + /* Check if the enabled test was actually run, if not print a warning. */ + bool found = false; + current_testcase = testcases; + for ( size_t i = 0; + i < ARRAY_SIZE(testcases) && current_testcase->func; i++ ) + { + if ( strcmp(current_testcase->tid, *p) == 0 ) + { + found = true; + break; + } + current_testcase++; + } + if ( !found ) + printf(" (WARNING: test not found)"); + } + printf("\n"); + } +} + +/* Print a test report and complete the test program successfully. */ +static int test_complete(void) +{ + testcase_print_summary(); + printf("\nTest program %s completed.\n", testcase_program_name); + return 0; +} + +/* Print a test report and abort the test program. */ +static void test_abort(void) +{ + testcase_print_summary(); + printf("\nTest program %s aborted.\n", testcase_program_name); + abort(); +} + +/* Check if the expected number of assertion failures occurred. */ +static void __used testcase_assert_check_expected_failures(int expected) +{ + if ( testcase_assert_expected_failures != expected ) + { + fprintf(stderr, "Expected %d assertion failures, got %d\n", + expected, testcase_assert_expected_failures); + current_testcase->failed = true; + test_abort(); + } + testcase_assert_expect_fail = false; + testcase_assert_expected_failures = 0; + testcase_assert_expected_failures_total += expected; +} + +/* Set up the initialization function for a test case. */ +static void __used setup_testcase_init_func(void (*init_fn)(int)) +{ + testcase_init_func = init_fn; +} + +/* Assert a condition, record the result and print a message if it fails. */ +__attribute__((format(printf, 5, 6))) +static void testcase_assert(bool condition, const char *file, int line, + const char *func, const char *fmt, ...) +{ + va_list ap; + const char *relpath = file; + + fflush(stdout); + while ( (file = strstr(relpath, "../")) ) + relpath += 3; + + va_start(ap, fmt); + if ( testcase_assert_expect_fail ) + { + fprintf(stderr, "\n- Test assertion %s at %s:%d:\n ", + condition ? "unexpectedly passed" : "failed as expected", + relpath, line); + vfprintf(stderr, fmt, ap); + fprintf(stderr, "\n\n"); + + if ( condition ) + { + current_testcase->failed = true; + test_abort(); /* Unexpected pass, treat as test failure */ + } + else + testcase_assert_expected_failures++; /* Count for the report. */ + goto out; + } + if ( !condition ) + { + fprintf(stderr, "Test assertion failed at %s:%d: ", relpath, line); + vfprintf(stderr, fmt, ap); + fprintf(stderr, "\n\n%s/%s:%d, %s():\n", _SUBPATH_, relpath, line, func); + fprintf(stderr, "Testcase %s(%s, %d) failed!\n", current_testcase->name, + current_testcase->tid, current_testcase->intarg); + current_testcase->failed = true; + test_abort(); + } + testcase_assert_successful_assert_total++; + if ( testcase_assert_verbose_assertions ) + { + if ( strncmp(fmt, assert_failed_str, strlen(assert_failed_str)) == 0 ) + fmt += strlen(assert_failed_str); + + if ( strcmp(fmt, "ret == 0") == 0 ) + goto out; + + for ( int i = 0; i < testcase_assert_verbose_indent_level; i++ ) + printf(" "); + + printf("%s:%d: ", relpath, line); + if ( (testcase_assert_current_func == NULL || + strcmp(testcase_assert_current_func, func)) && + (strncmp(relpath, "test-", strlen("test-")) && + strncmp(func, "test_", strlen("test_"))) ) + printf("%s(): ", func); + + if ( strncmp(fmt, "BUG_ON:", 7) ) + printf("ASSERT("); + + vprintf(fmt, ap); + + if ( strncmp(fmt, "BUG_ON:", 7) ) + printf(")"); + + printf("\n"); + } + out: + va_end(ap); +} + +/* Run a test case function with the given argument and report results. */ +static void run_testcase(void (*case_func)(int), int int_arg, const char *tid, + const char *case_name) +{ + current_testcase->name = case_name; + current_testcase->func = case_func; + current_testcase->intarg = int_arg; + current_testcase->tid = tid; + current_testcase->passed_asserts = 0; + current_testcase->expected_failures = 0; + + if ( *testcase_assert_enabled_tests ) + { + bool enabled = false; + + for ( char **p = testcase_assert_enabled_tests; *p; p++ ) + { + if ( strcmp(*p, tid) == 0 ) + { + enabled = true; + break; + } + } + if ( !enabled ) + { + current_testcase->disabled = true; + goto skip; + } + } + printf("\nTest Case: %s...\n", case_name); + + if ( testcase_init_func && int_arg >= 0 ) + testcase_init_func(int_arg); + + case_func(int_arg); + + current_testcase->passed_asserts = testcase_assert_successful_assert_total; + current_testcase->expected_failures = + testcase_assert_expected_failures_total; + + testcase_assert_successful_assert_total = 0; + testcase_assert_expected_failures_total = 0; + + printf("\nResults:\n"); + testcase_print_tid_report(current_testcase); + skip: + current_testcase++; + if ( current_testcase - testcases >= (long)ARRAY_SIZE(testcases) ) + { + fprintf(stderr, "Too many tests, increase the size of testcases[]\n"); + test_abort(); + } +} + +/* Macro to run a test case with the given ID, function, and argument. */ +#define RUN_TESTCASE(tid, func, arg) run_testcase(func, arg, tid, #func) + +/* Parse command-line arguments and return the program name. */ +static const char *parse_args(int argc, char *argv[], const char *topic) +{ + const char *program_name = argv[0]; + (void)argc; + + program_name = strrchr(program_name, '/'); + if ( program_name ) + program_name++; + else + program_name = argv[0]; + + testcase_assert_enabled_tests = &argv[1]; + printf("Program: %s\n", program_name); + printf("Topic : %s\n", topic); + memset(testcases, 0, sizeof(testcases)); + testcase_program_name = program_name; + return program_name; +} + +#endif diff --git a/tools/tests/native/harness/xc-domain-env.h b/tools/tests/native/harness/xc-domain-env.h new file mode 100644 index 000000000000..0d4c6821729b --- /dev/null +++ b/tools/tests/native/harness/xc-domain-env.h @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Wrapper around tools/libs/ctrl/xc_domain.c for the allocator test harness. + * + * The test framework includes the real xc_domain.c directly in its + * translation unit, together with a small shim for the libxc internals it + * uses and a proxy that redirects do_domctl(xch, domctl) to the wrapped Xen + * domctl handler already present in this harness. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_XC_DOMAIN_ENV_H +#define TOOLS_TESTS_NATIVE_HARNESS_XC_DOMAIN_ENV_H +#ifdef TEST_ENABLE_XC_DOMAIN_C + +#define TEST_WRAP_XEN_COMMON_DOMCTL_C +#include "domctl-wrapper.h" + +#define TEST_WRAP_TOOLS_INCLUDE_XENCTRL_H +#include "xenctrl-shim.h" + +/* Hypercall passthrough of xc's do_domctl() to the hypervisor's do_domctl() */ +static inline int do_domctl_hypervisor_passthrough(xc_interface *xch, + struct xen_domctl *domctl) +{ + /* Convert from domctl pointer to xen_domctl_t handle */ + union { + XEN_GUEST_HANDLE_PARAM(xen_domctl_t) handle; + struct xen_domctl *ptr; + } u = { .ptr = domctl }; + + domctl->interface_version = XEN_DOMCTL_INTERFACE_VERSION; + ASSERT(xch == &test_xc_handle); + return do_domctl(u.handle); /* Call xen/common/domctl.c's do_domctl() */ +} + +/* Make do_domctl() calls in libs/ctrl/xc_domain.c use the passthrough */ +#define do_domctl do_domctl_hypervisor_passthrough + +/* Include the real tools/libs/ctrl/xc_domain.c */ +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wsign-compare" +#pragma GCC diagnostic ignored "-Wunused-parameter" +#include <../libs/ctrl/xc_domain.c> +#pragma GCC diagnostic pop + +/* Assert claim set via xc_domain_claim_memory(XEN_DOMCTL_CLAIM_MEMORY_GET) */ +void assert_claims_via_domctl(xc_interface *xch, struct domain *d, + uint32_t expected_entries, + xen_memory_claim_t *expected_claims, + const char *file, int line, const char *func) +{ + uint32_t entries = expected_entries; + xen_memory_claim_t claim_set[expected_entries]; + int ret = xc_domain_claim_memory(xch, d->domain_id, + XEN_DOMCTL_CLAIM_MEMORY_GET, + &entries, claim_set); + + testcase_assert(ret == 0, file, line, func, "XEN_DOMCTL_CLAIM_MEMORY_GET"); + testcase_assert(entries == expected_entries, file, line, func, + "Got %u entries", entries); + + for ( uint32_t i = 0; i < expected_entries; i++ ) + testcase_assert(claim_set[i].pages == expected_claims[i].pages && + claim_set[i].target == expected_claims[i].target, + file, line, func, + "Entry %u: node %u with %" PRIu64 " pages", + i, claim_set[i].target, claim_set[i].pages); +} + +/* Assert the current claim set for a domain matches the expected set. */ +#define CLAIMS(d, claim_set) \ + assert_claims_via_domctl(xch, d, ARRAY_SIZE(claim_set), claim_set, \ + __FILE__, __LINE__, __func__) + +#endif +#endif diff --git a/tools/tests/native/harness/xen-macros.h b/tools/tests/native/harness/xen-macros.h new file mode 100644 index 000000000000..e13b49aa5d78 --- /dev/null +++ b/tools/tests/native/harness/xen-macros.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Provide basic macros expected by Xen hypervisor code for native compilation. + * + * Copyright (C) 2026 Cloud Software Group + */ + +#ifndef TOOLS_TESTS_NATIVE_HARNESS_XEN_MACROS_H +#define TOOLS_TESTS_NATIVE_HARNESS_XEN_MACROS_H + +/* + * Central list if glibc headers to include in the test context, to ensure + * that the Xen-specific versions of certain functions are used. + * + * Standard ffs/ffsl and gcc's built-ins are signed, Xen's are unsigned + */ +#define ffs glibc_ffs +#define ffsl glibc_ffsl +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#undef ffs +#undef ffsl +/* xen/config.h defines these without value, glibc defines them with value */ +#undef __LITTLE_ENDIAN +#undef __BIG_ENDIAN + +/* + * In Xen, STATIC_IF(x) and config_enabled(x) are defined in kconfig.h, + * which cannot be included here. Define the required subset locally. + */ +#define STATIC_IF(option) static_if(option) +#define static_if(value) _static_if(__ARG_PLACEHOLDER_##value) +#define _static_if(arg1_or_junk) ___config_enabled(arg1_or_junk static, ) +#define __ARG_PLACEHOLDER_1 0, +#define IS_ENABLED(opt) config_enabled(opt) +#define config_enabled(cfg) _config_enabled(cfg) +#define _config_enabled(value) __config_enabled(__ARG_PLACEHOLDER_##value) + +#define __config_enabled(arg1_or_junk) ___config_enabled(arg1_or_junk 1, 0) + +#define ___config_enabled(__ignored, val, ...) val + +/* + * Reuse the Xen-tools macros from common-macros.h. They are not + * necessarily identical to the hypervisor variants, but they are close + * enough for this test environment. + */ +#include + +/* Undefine conflicting macros from the Xen-tools headers. */ +#undef BUILD_BUG_ON +#undef container_of +#undef MASK_INSR +#undef MASK_EXTR +#undef ROUNDUP +#undef ARRAY_SIZE +#undef min +#undef max +#undef min_t +#undef max_t +#undef __nonnull +#undef offsetof +#undef __AC +#undef _AC + +/* Include Xen headers for compiler, macros, and page size definitions. */ +#include +#include +#include + +/* Define Xen-specific macros and functions for the test environment. */ +#define domain_crash(d) ((void)(d)) +#define PRI_mfn "05lx" +#define PRI_stime "lld" +#define dprintk(level, fmt, ...) printk(fmt, ##__VA_ARGS__) +#define gdprintk(level, fmt, ...) printk(fmt, ##__VA_ARGS__) +#define gprintk(level, fmt, ...) printk(fmt, ##__VA_ARGS__) +#define panic(fmt, ...) (printk(fmt, ##__VA_ARGS__), abort()) +#define printk(...) (fflush(stdout), fprintf(stderr, __VA_ARGS__)) +#define ACCESS_ONCE(x) (x) + +__attribute__((format(printf, 5, 6))) +static void testcase_assert(bool condition, const char *file, int line, + const char *func, const char *fmt, ...); + +static int testcase_assert_expect_to_hit_bug; + +/* The BUG() macro for the test environment */ +#define BUG() test_bug(__FILE__, __LINE__, __func__) + +/* If the test expects to hit a bug, log it. Otherwise assert and fail. */ +static void test_bug(const char *file, int line, const char *func) +{ + fflush(stdout); + if ( testcase_assert_expect_to_hit_bug ) + { + printk("\n%s:%d: WE INVOKED a XEN BUG in %s()\n\n", file, line, func); + testcase_assert_expect_to_hit_bug = false; + return; + } + testcase_assert(false, file, line, func, "Unexpected XEN BUG WAS INVOKED"); +} + +/* The test environment needs to define these as __used */ +#define __initdata +#define __init __used +#define __initconst __used +#define __initsetup __used +#define __initcall(f) static int __used (*f##_ptr)(void) = (f) +#endif diff --git a/tools/tests/native/harness/xenctrl-shim.h b/tools/tests/native/harness/xenctrl-shim.h new file mode 100644 index 000000000000..4c90cd6222f1 --- /dev/null +++ b/tools/tests/native/harness/xenctrl-shim.h @@ -0,0 +1,170 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Minimal shim to include tools/libs/ctrl/xc_domain.c in native tests. + * + * This shim provides the small subset of libxc internals that xc_domain.c + * needs so the allocator harness can exercise libxenctrl paths without + * a live Xen instance. + * + * Copyright (C) 2026 Cloud Software Group + */ +#ifndef TOOLS_TESTS_NATIVE_HARNESS_XENCTRL_SHIM_H +#define TOOLS_TESTS_NATIVE_HARNESS_XENCTRL_SHIM_H +#ifdef TEST_WRAP_TOOLS_INCLUDE_XENCTRL_H +#include "common.h" + +/* + * This file replaces the private APIs of xc_private.h. By doing this, we can + * include xc_domain.c in the test context and test its functionality without + * needing a live Xen instance. The functions defined here are minimal + * implementations that allow the test cases to run without errors, while + * still exercising the relevant code paths in xc_domain.c. + * + * This enables calling the Xen hypervisor code built into the test program + * from the libxenctrl APIs inside the native test environment. + */ +#define XC_PRIVATE_H + +/* Include xenctrl.h into the test context for libxc integration testing */ +#define __XEN_KEXEC_H__ +#include +#include + +/* xenctrl.h conflicts with the Xen hypervisor define, it should be renamed */ +#define XEN_INVALID_MFN _mfn(INVALID_MFN_RAW) +#undef INVALID_MFN +#define XEN_BARRIER_H /* riscv is missing in tools/include/xen-barrier.h */ +#include +#undef INVALID_MFN +#define INVALID_MFN XEN_INVALID_MFN + +struct xc_interface_core { + void *xcall; +}; + +/* Provision a xc_interface handle for the test context */ +static xc_interface test_xc_handle, *xch = &test_xc_handle; + +enum { + XC_HYPERCALL_BUFFER_BOUNCE_NONE = 0, + XC_HYPERCALL_BUFFER_BOUNCE_IN = 1, + XC_HYPERCALL_BUFFER_BOUNCE_OUT = 2, + XC_HYPERCALL_BUFFER_BOUNCE_BOTH = 3, +}; + +xc_hypercall_buffer_t XC__HYPERCALL_BUFFER_NAME(HYPERCALL_BUFFER_NULL) = +{ + .hbuf = NULL, + .param_shadow = NULL, + HYPERCALL_BUFFER_INIT_NO_BOUNCE +}; + +#define PERROR(_m, _a ...) ((void)0) +#define DPRINTF(_m, _a ...) ((void)0) + +#define DECLARE_NAMED_HYPERCALL_BOUNCE(_name, _ubuf, _sz, _dir) \ + xc_hypercall_buffer_t XC__HYPERCALL_BUFFER_NAME(_name) = { \ + .hbuf = NULL, \ + .param_shadow = NULL, \ + .sz = (_sz), \ + .dir = (_dir), \ + .ubuf = (_ubuf), \ + } + +#define DECLARE_HYPERCALL_BOUNCE(_ubuf, _sz, _dir) \ + DECLARE_NAMED_HYPERCALL_BOUNCE(_ubuf, _ubuf, _sz, _dir) + +#define HYPERCALL_BOUNCE_SET_SIZE(b, s) ((HYPERCALL_BUFFER(b))->sz = (s)) + +void *xc__hypercall_buffer_alloc(xc_interface *xch, + xc_hypercall_buffer_t *b, + size_t size) +{ + (void)xch; + b->hbuf = calloc(size ? size : 1, 1); + return b->hbuf; +} + +void xc__hypercall_buffer_free(xc_interface *xch, + xc_hypercall_buffer_t *b) +{ + (void)xch; + free(b->hbuf); + b->hbuf = NULL; +} + +void *xc__hypercall_buffer_alloc_pages(xc_interface *xch, + xc_hypercall_buffer_t *b, + int nr_pages) +{ + return xc__hypercall_buffer_alloc(xch, b, + (size_t)(nr_pages ? nr_pages : 1) * + XC_PAGE_SIZE); +} + +void xc__hypercall_buffer_free_pages(xc_interface *xch, + xc_hypercall_buffer_t *b, + int nr_pages) +{ + (void)nr_pages; + xc__hypercall_buffer_free(xch, b); +} + +static inline int xc__hypercall_bounce_pre(xc_interface *xch, + xc_hypercall_buffer_t *b) +{ + (void)xch; + if ( b->ubuf == (void *)-1 || b->dir == XC_HYPERCALL_BUFFER_BOUNCE_NONE ) + abort(); + b->hbuf = b->ubuf; + return 0; +} + +static inline void xc__hypercall_bounce_post(xc_interface *xch, + xc_hypercall_buffer_t *b) +{ + (void)xch; + if ( b->ubuf == (void *)-1 || b->dir == XC_HYPERCALL_BUFFER_BOUNCE_NONE ) + abort(); + b->hbuf = NULL; +} + +#define xc_hypercall_bounce_pre(_xch, _name) \ + xc__hypercall_bounce_pre(_xch, HYPERCALL_BUFFER(_name)) + +#define xc_hypercall_bounce_post(_xch, _name) \ + xc__hypercall_bounce_post(_xch, HYPERCALL_BUFFER(_name)) + +static inline int xencall2(void *xcall, unsigned int op, + unsigned long arg1, unsigned long arg2) +{ + (void)xcall; + (void)op; + (void)arg1; + (void)arg2; + errno = EOPNOTSUPP; + return -1; +} + +int xc_get_cpumap_size(xc_interface *xch) +{ + (void)xch; + return 1; +} + +int xc_get_nodemap_size(xc_interface *xch) +{ + (void)xch; + return sizeof(unsigned long); +} + +static inline bool xc_core_arch_auto_translated_physmap( + const xc_domaininfo_t *info) +{ + (void)info; + return false; +} + +#endif + +#endif \ No newline at end of file -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 21 16:10:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:10:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315496.1585310 (Exim 4.92) (envelope-from ) id 1wQ5ym-0005R5-8Y; Thu, 21 May 2026 16:10:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315496.1585310; Thu, 21 May 2026 16:10:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5ym-0005Qy-4j; Thu, 21 May 2026 16:10:36 +0000 Received: by outflank-mailman (input) for mailman id 1315496; Thu, 21 May 2026 16:10:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ5yk-0005QK-C7 for xen-devel@lists.xenproject.org; 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none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD Subject: [PATCH v3 2/2] tests/native: Add native tests for NUMA claim sets Date: Thu, 21 May 2026 17:08:08 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1779379833-28D743FF-75B8AFE9/0/0 X-purgate-type: clean X-purgate-size: 21358 Test the page allocator's claim behaviour using: - the legacy xc_domain_claim_pages() call, and - the new xc_domain_claim_memory() call of the claim-set API, exercising both host-wide and NUMA node-specific multi-node claims. Signed-off-by: Bernhard Kaindl --- tools/tests/native/host-claims.c | 248 +++++++++++++++++++++++++++++++ tools/tests/native/node-claims.c | 230 ++++++++++++++++++++++++++++ 2 files changed, 478 insertions(+) create mode 100644 tools/tests/native/host-claims.c create mode 100644 tools/tests/native/node-claims.c diff --git a/tools/tests/native/host-claims.c b/tools/tests/native/host-claims.c new file mode 100644 index 000000000000..8286fc586282 --- /dev/null +++ b/tools/tests/native/host-claims.c @@ -0,0 +1,248 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Test basic host-wide functionality of memory claims, including + * installing and redeeming claims, and that claims are respected + * by allocations and protected against other allocations. + * + * Copyright (C) 2026 Cloud Software Group + */ + +#define TEST_ENABLE_XC_DOMAIN_C /* Enable xc_domain.c APIs */ +#include "harness/native.h" + +typedef int (*set_global_claims)(struct domain *d, unsigned long pages); +set_global_claims install_host_claims; + +/* Install a host-wide claim using the legacy xc_domain_claim_pages() call */ +int install_host_claims_legacy(struct domain *d, unsigned long pages) +{ + if (pages == 0) + return xc_domain_claim_pages(xch, d->domain_id, 0); + + /* The legacy call need resetting claims before claims can be set again */ + xc_domain_claim_pages(xch, d->domain_id, 0); + + /* The argument of the legacy call includes the domain's existing pages */ + pages += domain_tot_pages(d); + + return xc_domain_claim_pages(xch, d->domain_id, pages); +} + +/* Install a host-wide claim set using the xc_domain.c hypercall API */ +int xc_domain_claim_memory_host(struct domain *d, unsigned long pages) +{ + xen_memory_claim_t claim_set[] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = pages }, + }; + uint32_t nr_entries = ARRAY_SIZE(claim_set); + + return xc_domain_claim_memory(xch, d->domain_id, + XEN_DOMCTL_CLAIM_MEMORY_SET, &nr_entries, claim_set); +} + +static void test_alloc_domheap_redeems_claims(int start_mfn) +{ + int ret; + struct page_info *pages = frame_table + start_mfn, *pg; + + test_page_list_add_buddy(pages, order2); + ASSERT(!install_host_claims(dom1, 3)); + ASSERT(alloc_domheap_pages(dom1, order1, 0) == pages + 2); + ASSERT(alloc_domheap_pages(dom1, order0, 0) == pages + 1); + CHECK(TOTAL_CLAIMS == 0, "Expect all claims consumed after allocations"); + CHECK(FREE_PAGES == 1, "Expect one free page after allocations"); + + ASSERT(!install_host_claims(dom2, FREE_PAGES)); + + /* Claim more than dom1 already has fails with ENOMEM (claimed by dom2) */ + ret = install_host_claims(dom1, domain_tot_pages(dom1) + 1); + CHECK(ret == -ENOMEM, "dom 1 claim +1 fails due to insufficient pages"); + + /* Claim more than dom1's d->max_pages fails with EINVAL */ + ret = install_host_claims(dom1, dom1->max_pages + 1); + CHECK(ret == -EINVAL, "dom 1 claim fails due to exceeding max_pages"); + + /* Attempt to allocate an order-0 page with a foreign claim present */ + pg = alloc_domheap_pages(dom1, order0, 0); + CHECK(pg == NULL, "dom 1 allocation fails because of domain 2's claim"); + CHECK(TOTAL_CLAIMS == 1, "Expect domain 2's claim to be still present"); + CHECK(FREE_PAGES == 1, "Expect one free page after failed alloc"); +} + +/* + * Test that memory claims can be cancelled by setting the claim count to 0, + * and that cancelled claims are freed up for other domains to claim. + * + * This is important for domain_kill() to be able to cancel claims of a dying + * domain and free up the pages for other domains to claim and free, otherwise + * the host might run out of free pages due to claims that are not released. + * + * - Test that after claiming pages for a domain, allocations redeem a portion + * of those claims. + * + * - Test that other domains cannot claim more pages than the unclaimed free + * pages, and that cancelled claims are no longer present after cancellation. + * + * - Test that after cancelling claims for a domain, other domains can claim + * and allocate all remaining free pages. + */ +static void test_claim_alloc_cancel(int start_mfn) +{ + struct page_info *expected, *page = frame_table + start_mfn; + unsigned long heap_pages, claims; + unsigned int alloc_order; + + /* Create a buddy of order 2 (4 pages) and add it to the heap. */ + test_page_list_add_buddy(page, order3); + heap_pages = FREE_PAGES; + claims = heap_pages / 2; + + /* Claim half of the free pages for domain 1 */ + ASSERT(install_host_claims(dom1, claims) == 0); + ASSERT(TOTAL_CLAIMS == claims); + + /* Allocate an order 1 page for domain 1 */ + alloc_order = order1; + /* Expect the highest available page to be allocated */ + expected = page + FREE_PAGES - (1UL << alloc_order); + ASSERT(alloc_domheap_pages(dom1, alloc_order, 0) == expected); + ASSERT(TOTAL_CLAIMS == (claims -= 1UL << alloc_order, claims)); + + /* Allocate an order 0 page for domain 1 */ + alloc_order = order0; + /* Expect the highest available page to be allocated */ + expected = page + FREE_PAGES - (1UL << alloc_order); + ASSERT(alloc_domheap_pages(dom1, alloc_order, 0) == expected); + ASSERT(TOTAL_CLAIMS == (claims -= 1UL << alloc_order, claims)); + + /* Claiming more than unclaimed for domain 2 should fail */ + ASSERT(install_host_claims(dom2, heap_pages - claims + 1) == -ENOMEM); + /* Claiming all free pages for domain 2 should fail (dom1 has a claim) */ + ASSERT(install_host_claims(dom2, FREE_PAGES) == -ENOMEM); + ASSERT(TOTAL_CLAIMS == claims); + + /* + * Cancelling claims needs to always work, the checks in place for + * installing claims should not prevent cancelling claims, which is + * important for domain_kill() to be able to cancel claims of a dying + * domain regardless of the state of the domain's configuration. + * + * An important check that cancelling claims needs to bypass is the + * max_pages check, as a domain's max_pages can be set to a low value + * due to a toolstack process (Xapi's "squeezed" squeezing the domain + * can set its max_pages to a lower value than domain_tot_pages() by + * invoking do_domctl(XEN_DOMCTL_max_mem). + * + * This should not prevent the claims from being cancelled as required. + */ + dom1->max_pages = domain_tot_pages(dom1) - 1; + + /* Cancel all remaining claims for domain 1 */ + ASSERT(install_host_claims(dom1, 0) == 0); + ASSERT(TOTAL_CLAIMS == 0); + + /* Claim all free pages for domain 2, should work */ + claims = FREE_PAGES; + ASSERT(install_host_claims(dom2, claims) == 0); + ASSERT(TOTAL_CLAIMS == claims); + + /* Claiming for domain 1 should fail with EINVAL due to max_pages = 0 */ + ASSERT(install_host_claims(dom1, 1) == -EINVAL); + + /* With d->max_pages > domain_tot_pages(), dom1 claims fails with -ENOMEM */ + dom1->max_pages = heap_pages; + ASSERT(install_host_claims(dom1, 1) == -ENOMEM); + + /* Attempting to allocate a page for domain 1 should likewise fail now */ + ASSERT(alloc_domheap_pages(dom1, order0, 0) == NULL); + + /* Allocating a page for domain 2 still work as it has the claims */ + alloc_order = order0; + /* Expect the highest available page to be allocated */ + expected = page + FREE_PAGES - (1UL << alloc_order); + ASSERT(alloc_domheap_pages(dom2, alloc_order, 0) == expected); + ASSERT(TOTAL_CLAIMS == (claims -= 1UL << alloc_order, claims)); + + /* Even allocating the remaining order 2 buddy for domain 2 works */ + alloc_order = order2; + /* Expect the highest available page to be allocated */ + expected = page + FREE_PAGES - (1UL << alloc_order); + ASSERT(alloc_domheap_pages(dom2, alloc_order, 0) == expected); + ASSERT(TOTAL_CLAIMS == (claims -= 1UL << alloc_order, claims)); +} + +/* Test offlining free pages outside and inside the claimed pages pool */ +static void test_offlining_host_claims(int start_mfn) +{ + struct page_info *pages = frame_table + start_mfn; + unsigned long heap_size, claims; + + test_page_list_add_buddy(pages, order2); + + heap_size = FREE_PAGES; + claims = heap_size - 1; /* Claim all but one page */ + ASSERT(!install_host_claims(dom1, claims)); + + /* Mark a first page as offline */ + + mark_page_offline(pages + 3, 0); + ASSERT(page_state_is(pages + 3, offlined)); + + /* Due to the single unclaimed page, the claims should remain unchanged */ + ASSERT(FREE_PAGES == heap_size); + ASSERT(TOTAL_CLAIMS == heap_size - 1); + ASSERT(reserve_offlined_page(pages) == 1); + ASSERT(FREE_PAGES == heap_size - 1); /* One free page is offlined */ + ASSERT(TOTAL_CLAIMS == heap_size - 1); + + /* Offline a second page. Offlines a portion of the claimed pages pool. */ + + mark_page_offline(pages + 1, 0); + ASSERT(page_state_is(pages + 1, offlined)); + + /* Assert the effect of offlining a portion of the claimed pages pool */ + ASSERT(FREE_PAGES == heap_size - 1); + ASSERT(TOTAL_CLAIMS == heap_size - 1); + ASSERT(reserve_offlined_page(pages) == 1); + ASSERT(FREE_PAGES == heap_size - 2); /* Two pages are offlined */ + ASSERT(TOTAL_CLAIMS == heap_size - 2); /* One claim is be released */ +} + +int main(int argc, char *argv[]) +{ + const char *topic = "Test host-wide claims with old and new interfaces"; + + if ( !parse_args(argc, argv, topic) ) + return EXIT_FAILURE; + + init_page_alloc_tests(); + + /* + * Run the tests on all levels of the claims interface: + * + * 1. Direct page_alloc function call used by other code in the hypervisor, + * which needs to support claim cancellation, needed by domain_kill(). + * + * 2. The domctl helper for the hypercall, which is used by the hypercall + * handler itself to parse the hypercall arguments before calling the + * page_allocator functions. + * + * 3. The real DOMCTL handler, do_domctl(), which is the actual handler + * function called when invoking the real hypercall. + */ + + /* Test using the direct claim function call used inside the hypervisor */ + install_host_claims = install_host_claims_legacy; + RUN_TESTCASE("TCCD", test_claim_alloc_cancel, 8); + RUN_TESTCASE("DCGD", test_alloc_domheap_redeems_claims, 4); + + /* Test claims setup using the actual DOMCTL handler itself, do_domctl() */ + install_host_claims = xc_domain_claim_memory_host; + RUN_TESTCASE("TCCH", test_claim_alloc_cancel, 8); + RUN_TESTCASE("DCGH", test_alloc_domheap_redeems_claims, 4); + + /* Test offlining free pages outside and inside the claimed pages pool */ + RUN_TESTCASE("OHCH", test_offlining_host_claims, 4); + + return test_complete(); +} diff --git a/tools/tests/native/node-claims.c b/tools/tests/native/node-claims.c new file mode 100644 index 000000000000..aa736f325f6b --- /dev/null +++ b/tools/tests/native/node-claims.c @@ -0,0 +1,230 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Integration tests for NUMA-aware memory claims. + * + * The install test verifies that when a domain has a claim set installed + * with host-wide and per-NUMA-node claims, allocations that specify NUMA + * node affinity will redeem the appropriate claims (same-node first, + * host-wide fallback claim next, then other nodes, to not exceed page + * limits). It also verifies that the aggregate claim counters are updated + * correctly after each allocation. + * + * The get test verifies that callers can query the required number of + * claim records by passing a count of 0 and a NULL claim set buffer. + * + * Copyright (C) 2026 Cloud Software Group + */ + +#ifdef __x86_64__ +#define CONFIG_NUMA 1 /* Enable NUMA support in the test environment. */ +#define TEST_ENABLE_XC_DOMAIN_C /* Enable xc_domain.c wrapper */ +#include "harness/native.h" + +typedef int (*set_numa_claims) + (struct domain *d, uint32_t entries, const xen_memory_claim_t *claim_set); +set_numa_claims install_numa_claims; + +/* + * Test redeeming NUMA memory claims in exchange for allocations, + * where the redeemed claims are correctly reflected in the domain's + * claim state and the aggregate claim counters. + */ +static void test_claims_numa_install(int start_mfn) +{ + test_page_list_add_node_buddy(node0, start_mfn, order2); + test_page_list_add_node_buddy(node1, start_mfn, order2); + + /* Install a claim set with host-wide + per-NUMA-node claims. */ + xen_memory_claim_t claim_set[3] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 2 }, + { .target = node0, .pages = 2 }, + { .target = node1, .pages = 2 }, + }; + int install = install_numa_claims(dom1, ARRAY_SIZE(claim_set), claim_set); + + ASSERT(install == 0); + CHECK(TOTAL_CLAIMS == 6, "Expect 6 total claims after installation"); + CLAIMS(dom1, claim_set); + + ASSERT(alloc_domheap_pages(dom1, order0, MEMF_node(node0))); + CHECK(TOTAL_CLAIMS == 5, "Expect 5 total claims left after allocation"); + CHECK(FREE_PAGES == 7, "Expect 7 free pages left after allocation"); + ASSERT(claim_set[1].target == node0); + claim_set[1].pages--; /* Expect the allocation redeemed from node 0 */ + CLAIMS(dom1, claim_set); + + /* An allocation on node 1 redeems a claim from node 1 */ + ASSERT(alloc_domheap_pages(dom1, order0, MEMF_node(node1))); + CHECK(TOTAL_CLAIMS == 4, "Expect 4 total claims left after allocation"); + CHECK(FREE_PAGES == 6, "Expect 6 free pages left after allocation"); + ASSERT(claim_set[2].target == node1); + claim_set[2].pages--; /* Expect the allocation redeemed from node 1 */ + CLAIMS(dom1, claim_set); + + /* An allocation on node 1 redeems the last claim from node 1 */ + ASSERT(alloc_domheap_pages(dom1, order1, MEMF_node(node1))); + CHECK(TOTAL_CLAIMS == 2, "Expect 2 total claims left after allocation"); + CHECK(FREE_PAGES == 4, "Expect 4 free pages left after allocation"); + xen_memory_claim_t claim_set2[2] = { + claim_set[0], /* The Host-wide claim should still be present. */ + claim_set[1], /* Claim from node 0 should still be present. */ + /* The claim from node 1 is consumed, not part of the claim set. */ + }; + claim_set2[0].pages--; /* The 2nd page is redeemed from host-wide claim */ + CLAIMS(dom1, claim_set2); + + /* An allocation on node 1 falls back to the host-wide claim */ + ASSERT(alloc_domheap_pages(dom1, order0, MEMF_node(node1))); + CHECK(TOTAL_CLAIMS == 1, "Expect 1 total claims left after allocation"); + CHECK(FREE_PAGES == 3, "Expect 3 free pages left after allocation"); + claim_set2[0].pages--; /* The 2nd page is redeemed from host-wide claim */ + CLAIMS(dom1, claim_set2); + + /* An allocation on node 1 falls back to node 0 */ + ASSERT(alloc_domheap_pages(dom1, order0, MEMF_node(node1))); + CHECK(TOTAL_CLAIMS == 0, "Expect 0 total claims left after allocation"); + CHECK(FREE_PAGES == 2, "Expect 2 free pages left after allocation"); + CLAIMS(dom1, /* All claims should be consumed */ + ((xen_memory_claim_t[]){ + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 0 }, + })); +} + +/* Test getting the current claim set for a domain. */ +static void test_claims_numa_get(int start_mfn) +{ + test_page_list_add_node_buddy(node0, start_mfn, order2); + test_page_list_add_node_buddy(node1, start_mfn, order2); + + /* Install a claim set with host-wide + per-NUMA-node claims. */ + const xen_memory_claim_t claim_set[3] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 2 }, + { .target = node0, .pages = 2 }, + { .target = node1, .pages = 2 }, + }; + int install = install_numa_claims(dom1, ARRAY_SIZE(claim_set), claim_set); + + ASSERT(install == 0); + + /* + * Assert that the direct call can get the number of claim records by + * passing a count of 0 and NULL for the claim set buffer. + */ + uint32_t records = 0, expected_records = ARRAY_SIZE(claim_set); + + ASSERT(domain_get_claim_entries(dom1, &records, NULL) == -ERANGE); + ASSERT(records == expected_records); + + /* + * Assert that the libxc wrapper can get the number of claim records for + * a domain by passing a count of 0 and NULL for the claim set buffer. + */ + records = 0; + ASSERT(xc_domain_claim_memory(&test_xc_handle, dom1->domain_id, + XEN_DOMCTL_CLAIM_MEMORY_GET, + &records, NULL) == -ERANGE); + ASSERT(records == expected_records); + + /* Assert the libxc wrapper returning the expected claim set contents */ + CLAIMS(dom1, + ((xen_memory_claim_t[]){ + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = 2 }, + { .target = node0, .pages = 2 }, + { .target = node1, .pages = 2 } + })); +} + +/* Test offlining free pages outside and inside the claimed pages pool */ +static void test_offlining_node_claims(int start_mfn) +{ + struct page_info *pages = test_get_node_page(node0, start_mfn); + unsigned long heap_size, claims, host; + + test_page_list_add_node_buddy(node0, start_mfn, order2); + test_page_list_add_node_buddy(node1, start_mfn, order2); + heap_size = FREE_PAGES; + claims = heap_size / 2 - 1; /* Claim all but 1 page on each node*/ + host = heap_size - 2 * claims; /* Claim the rest host-wide */ + + /* Install a claim set with host-wide + per-NUMA-node claims. */ + xen_memory_claim_t claim_set[] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = host }, + { .target = node0, .pages = claims }, + { .target = node1, .pages = claims }, + }; + ASSERT(install_numa_claims(dom1, ARRAY_SIZE(claim_set), claim_set) == 0); + + /* Mark a first page as offline */ + + mark_page_offline(pages + 3, 0); + ASSERT(page_state_is(pages + 3, offlined)); + + /* The 1st page was not in a node's claims pool, but in the host pool */ + ASSERT(FREE_PAGES == heap_size); + ASSERT(TOTAL_CLAIMS == heap_size); + ASSERT(reserve_offlined_page(pages) == 1); + ASSERT(FREE_PAGES == heap_size - 1); /* One free page is offlined */ + ASSERT(TOTAL_CLAIMS == heap_size - 1); + + /* Expect the pool of host-wide claims to be reduced by 1 page */ + xen_memory_claim_t claim_set1[] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = host - 1 }, + { .target = node0, .pages = claims }, + { .target = node1, .pages = claims } + }; + CLAIMS(dom1, claim_set1); + + /* Offline a second page. Offlines a portion of the claimed pages pool. */ + + mark_page_offline(pages + 1, 0); + ASSERT(page_state_is(pages + 1, offlined)); + + /* Assert the effect of offlining a portion of the claimed pages pool */ + ASSERT(FREE_PAGES == heap_size - 1); + ASSERT(TOTAL_CLAIMS == heap_size - 1); + ASSERT(reserve_offlined_page(pages) == 1); + ASSERT(FREE_PAGES == heap_size - 2); /* Two pages are offlined */ + ASSERT(TOTAL_CLAIMS == heap_size - 2); /* One claim is be released */ + + /* The 2nd page was in the claims pool on node0, it should be released */ + xen_memory_claim_t claim_set2[] = { + { .target = XEN_DOMCTL_CLAIM_MEMORY_HOST, .pages = host - 1 }, + { .target = node0, .pages = claims - 1 }, + { .target = node1, .pages = claims } + }; + CLAIMS(dom1, claim_set2); +} + +int main(int argc, char *argv[]) +{ + const char *topic = "Test NUMA-aware claims with allocation from the heap"; + + if ( !parse_args(argc, argv, topic) ) + return EXIT_FAILURE; + + init_page_alloc_tests(); + + /* Run test cases with different NUMA claim installation methods */ + + /* Run the test with a direct call to domain_set_claim_entries() */ + install_numa_claims = domain_set_claim_entries; + RUN_TESTCASE("CNIS", test_claims_numa_install, 4); + + /* Run the test for getting the current claim set for a domain */ + install_numa_claims = domain_set_claim_entries; + RUN_TESTCASE("CNGS", test_claims_numa_get, 4); + + RUN_TESTCASE("ONCS", test_offlining_node_claims, 4); + + return test_complete(); +} +#else +#include +int main(int argc, char *argv[]) +{ + (void)argc; + (void)argv; + printf("This test requires NUMA, which is only available on x86_64.\n"); + return 0; +} +#endif -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 21 16:13:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:13:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315555.1585320 (Exim 4.92) (envelope-from ) id 1wQ61m-0006O7-Lw; Thu, 21 May 2026 16:13:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315555.1585320; Thu, 21 May 2026 16:13:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ61m-0006O0-IC; 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b=U5VHwFAPQ18FJUjV31k9jy5excTDmxscgw9SGOyUcTBnO07qCsGGxooc/PSOvumY3FVxhk5s/H3RYF7s2bW6Py9SslYNY1N8fek6PzdCMqmFlBUE+vfKdVkNKIzqGWCEexpVkqpHyirc7gl1mVekik9kjl/oTvgKs52tQUdaOJA= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com; Message-ID: <35746cb2-9b36-4c4a-b9bd-71a5df64ed92@citrix.com> Date: Thu, 21 May 2026 17:13:32 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Abdelkareem Abdelsaamad , Teddy Astie , Jason Andryuk , Oleksii Kurochko , Xen-devel Subject: Re: [PATCH for-4.22 v6] x86/svm: Support vNMI on capable hardware To: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <20260514175623.1869042-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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On older >> hardware, determining when an NMI is safe to deliver is a challenge and Xen >> does not handle all corner cases correctly. >> >> With vNMI, there is an enablement bit and two new bits of state in the VMCB; a >> pending bit, and a blocked bit. These directly map to the CPU state for >> handling NMIs, and are maintained by hardware during the running of the vCPU. >> >> When vNMI is enabled, have svm_{get,set}set_interrupt_shadow() work in terms >> of the vnmi_blocking bit rather than the IRET intercept. This allows an >> emulated IRET instruction to re-enable NMIs. >> >> When injecting a new NMI, simply set the vnmi_pending bit; hardware will >> deliver the NMI to the guest at the next suitable juncture. >> >> One complication is that, when delivering a second NMI before the first has >> completed, the mix between common HVM logic and SVM specific logic will try to >> open an NMI window, malfunctioning as it does so. When vNMI is enabled, short >> circuit this to not consider NMIs blocked. >> >> Signed-off-by: Abdelkareem Abdelsaamad >> Signed-off-by: Andrew Cooper >> --- >> CC: Jan Beulich >> CC: Roger Pau Monné >> CC: Teddy Astie >> CC: Jason Andryuk >> CC: Oleksii Kurochko >> >> For 4.22. This is somewhat overdue and makes a concrete improvement to NMI >> handling on recent AMD hardware. > In particular with this remark in mind - should I perhaps pull this over onto > 4.21 as well? Or are there dependencies I'm overlooking? There's this patch, and a prior patch from a while ago adding the vNMI CPUID enumeration and fields.  There are no other dependencies that I'm aware of. I was intending to backport this to 4.21 in XenServer in due course. vNMI will be a hard dependency for supporting FRED in guests on AMD, but I doubt we'll be wanting to backport this as a feature. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 16:41:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:41:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315594.1585329 (Exim 4.92) (envelope-from ) id 1wQ6SD-0004M9-P3; Thu, 21 May 2026 16:41:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315594.1585329; Thu, 21 May 2026 16:41:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ6SD-0004M2-M5; Thu, 21 May 2026 16:41:01 +0000 Received: by outflank-mailman (input) for mailman id 1315594; Thu, 21 May 2026 16:41:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ6SC-0004Lv-Fc for xen-devel@lists.xenproject.org; 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Message-ID: Date: Thu, 21 May 2026 17:40:50 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Anthony PERARD , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Oleksii Kurochko , xen-devel@lists.xenproject.org Subject: Re: [PATCH] tools/tests: Fix paging-mempool xen_pfn_t format strings To: Jan Beulich , Luca Fancellu References: <20260521152344.2050899-1-luca.fancellu@arm.com> <1c5238c4-dc03-4204-b5c9-f94ac4c0a65d@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1c5238c4-dc03-4204-b5c9-f94ac4c0a65d@suse.com> Content-Type: text/plain; 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In particular, >> Arm32 builds see it as a 64-bit type, so printing it with %lx triggers >> a -Werror=format build failure. >> >> Use PRI_xen_pfn for the GFN diagnostics instead. >> >> Fixes: 66c982a5d3614 ("tests/paging-mempool: Extend to test P2M relocation") >> Signed-off-by: Luca Fancellu > This looks okay, but while we're here ... > >> --- a/tools/tests/paging-mempool/test-paging-mempool.c >> +++ b/tools/tests/paging-mempool/test-paging-mempool.c >> @@ -208,7 +208,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) >> if ( errs[i] ) >> { >> rc = -1; >> - fail(" Fail: check mark unable to map gfn %05lx: %d\n", >> + fail(" Fail: check mark unable to map gfn %05"PRI_xen_pfn": %d\n", >> gfns[i], errs[i]); >> continue; >> } >> @@ -216,7 +216,7 @@ static int check_guest_marks(xen_pfn_t gfn, uint32_t mark_start, size_t count) >> if ( *mark == exp ) >> continue; >> >> - fail(" Fail: check mark: gfn %05lx expecting %08x (%u), got %08x (%u)\n", >> + fail(" Fail: check mark: gfn %05"PRI_xen_pfn" expecting %08x (%u), got %08x (%u)\n", >> gfns[i], exp, ~exp, *mark, ~*mark); > ... aren't the two ~ wrong here? The message looks to aim at printing the > same value as hex and dec. That's intentional. The mark is the GFN number, but inverted so gfn 0 doesn't get 0.  But this also makes it awkward to read when something goes wrong. >From the failing example in the original commit:       Fail: check mark unable to map 003c1: -22 ... Fail: check mark unable to map 003df: -22       Fail: check mark: gfn 003e0 expecting fffffe20 (479), got fffffe3f (448) This presents the raw mark, and the useful-form decimal. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 21 16:43:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 16:43:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315603.1585337 (Exim 4.92) (envelope-from ) id 1wQ6US-0004zs-5E; Thu, 21 May 2026 16:43:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315603.1585337; Thu, 21 May 2026 16:43:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ6US-0004zl-26; Thu, 21 May 2026 16:43:20 +0000 Received: by outflank-mailman (input) for mailman id 1315603; Thu, 21 May 2026 16:43:19 +0000 Received: from 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([45.12.24.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49033d8e24bsm74565925e9.10.2026.05.21.10.48.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 10:48:22 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779385703; x=1779990503; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bYofrAN/dcAoG9hDe+IfNA2SsTYiSmdr/xpb0ZlcVh4=; b=G6C+bS0+JTYOObzRjMmA99ds9kbALIgc1lE5AwYRL9ir/NoPzc048QTIHgg7GveKuB Ngl1r8+ADqN0PhkMocAiLtpbXZrSVlsKvPCwUILXvP6MyqTUnp6msmaeh9ORWaDck83E Sb+oRpyNZVMgoz1XI5jd1K0C0slE6sITL4i/ioYjTUifScR4tNfQr62VSVSrfS4k6vd9 dzYcOrAQiQ743pgm/lG19vLgx0ZzF69EJa2bGD3dQhwx1gpBTSERvR0DHkqh6Yis6V2N l14fxBOi5D1mBQ0LvbIY2TnaI1CKh2TZpTn9BBKaVwB5qLnpTP5tnNE6zPG2Cno+TrUm VTEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779385703; x=1779990503; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=bYofrAN/dcAoG9hDe+IfNA2SsTYiSmdr/xpb0ZlcVh4=; b=tKK8BxgiT7fHfIgC6sExy9fIQE+X0SHwEQtxN//pQblfTEQOdiE756s25guZmYbf1H 4T0IsFIS1vPvNmRMCVe0qp31ELRZvzWoPWbgKx5o08Ih9jHfSmib93qqeMCEdCdwWP05 /yPKjKuk0W2AraMkbio93W9Vu/QUpIYUHM+F/NT/myvIzdQuwoRZTjWnIm9xhkEdLAXz rVjhkUEGBb9cGFuDGmnTpz3rNFsvO+OAx/3gM8kAR1p4QN9goeFUwbfjIxFKSlgeLf6/ ng6eI0CHg01Rr79d/iqywiUDecgf0l+6riolHiBmRg96rMGFro/38BcGvAXykW9n0lWL /e0g== X-Gm-Message-State: AOJu0YxBoeE90Mudt97Es/UySfI8uHEQ0Ew8J6eVVk3f3cZufUuFyMds 9+Zh2K5ZNSd55uvf4FYbCiO8kt1njtbt9Sz+cDtkTM6w2VSBKF2h4ajC2sZ1az9E X-Gm-Gg: Acq92OFy4libvI7jpGNX1mBQ9gIxIlkbFddngCZGb4MNtIPcuHQpeO7rlpuMupSpyYC uxVB6K4IRiRZkRcbtMoxjhmCZDa7Awl3M8IsUKZ/PAM8nEYFcTBwBViyZUR5Sl5yA/3rtX5tnkG 7g+NaN5F+Oewm6siCSvX1cYObOcowM/dmW+jkZ/t5aCUxLzBaQiFOtnmWW0hjIr0eUYlpm+AV8m b0x8ECQDi+2i9n2MkSMrwAFziqFJrRwDWqWmcK0q4lMGbe7zehCnUR9skO2HEJUyAEqXDA1Dtu8 cQYjNnoHZWeGTpUgSbeSHTArldcw6BUge0j1uWKWa050L5VpBi+BQp49BMukhioGdXPWGoVxna+ WGXvKfojhWkozHKOQaHqxy8UdVPRPm3QHYeiZwhgRZ5ikI/3qIB9hBHJyGAwavyUVDl6PyOhELu NRb51EvSoJxfhosXiZoGAeZyLn+fq/1txtGvnpRBNXgckRbHs= X-Received: by 2002:a05:600c:3153:b0:490:3893:c71 with SMTP id 5b1f17b1804b1-49038930e25mr44973285e9.5.1779385702886; Thu, 21 May 2026 10:48:22 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v10 08/13] iommu/ipmmu-vmsa: Implement suspend/resume callbacks Date: Thu, 21 May 2026 20:45:26 +0300 Message-ID: <9cb404f9327e203594127495ff9aedcf96c18377.1779385072.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779385703-B596DDB1-0A7CA317/0/0 X-purgate-type: clean X-purgate-size: 14404 From: Oleksandr Tyshchenko Store and restore active context and micro-TLB registers. On resume, restore Root IPMMU context state before restoring Cache IPMMU micro-TLB state. Cache IPMMUs select Root contexts through their micro-TLB configuration, so restoring Cache micro-TLBs before the Root context registers are restored can expose stale or uninitialized context state. Tested on R-Car H3 Starter Kit. Signed-off-by: Oleksandr Tyshchenko Signed-off-by: Mykola Kvach --- Changes in V10: - Iterate over registered IPMMUs in reverse order during resume so Root IPMMU context state is restored before Cache IPMMU micro-TLB state. Changes in V9: - set dt_device_set_protected() only after ipmmu_alloc_ctx_suspend() succeeds, so DT devices do not remain protected on allocation failure. Changes in V7: - moved suspend context allocation before pci stuff --- xen/drivers/passthrough/arm/ipmmu-vmsa.c | 323 +++++++++++++++++++++-- 1 file changed, 308 insertions(+), 15 deletions(-) diff --git a/xen/drivers/passthrough/arm/ipmmu-vmsa.c b/xen/drivers/passthrough/arm/ipmmu-vmsa.c index fa9ab9cb13..2e54fa63d6 100644 --- a/xen/drivers/passthrough/arm/ipmmu-vmsa.c +++ b/xen/drivers/passthrough/arm/ipmmu-vmsa.c @@ -71,6 +71,8 @@ }) #endif +#define dev_dbg(dev, fmt, ...) \ + dev_print(dev, XENLOG_DEBUG, fmt, ## __VA_ARGS__) #define dev_info(dev, fmt, ...) \ dev_print(dev, XENLOG_INFO, fmt, ## __VA_ARGS__) #define dev_warn(dev, fmt, ...) \ @@ -130,6 +132,24 @@ struct ipmmu_features { unsigned int imuctr_ttsel_mask; }; +#ifdef CONFIG_SYSTEM_SUSPEND + +struct ipmmu_reg_ctx { + unsigned int imttlbr0; + unsigned int imttubr0; + unsigned int imttbcr; + unsigned int imctr; +}; + +struct ipmmu_vmsa_backup { + struct device *dev; + unsigned int *utlbs_val; + unsigned int *asids_val; + struct list_head list; +}; + +#endif + /* Root/Cache IPMMU device's information */ struct ipmmu_vmsa_device { struct device *dev; @@ -142,6 +162,9 @@ struct ipmmu_vmsa_device { struct ipmmu_vmsa_domain *domains[IPMMU_CTX_MAX]; unsigned int utlb_refcount[IPMMU_UTLB_MAX]; const struct ipmmu_features *features; +#ifdef CONFIG_SYSTEM_SUSPEND + struct ipmmu_reg_ctx *reg_backup[IPMMU_CTX_MAX]; +#endif }; /* @@ -547,6 +570,249 @@ static void ipmmu_domain_free_context(struct ipmmu_vmsa_device *mmu, spin_unlock_irqrestore(&mmu->lock, flags); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static DEFINE_SPINLOCK(ipmmu_devices_backup_lock); +static LIST_HEAD(ipmmu_devices_backup); + +static struct ipmmu_reg_ctx root_pgtable[IPMMU_CTX_MAX]; + +static uint32_t ipmmu_imuasid_read(struct ipmmu_vmsa_device *mmu, + unsigned int utlb) +{ + return ipmmu_read(mmu, ipmmu_utlb_reg(mmu, IMUASID(utlb))); +} + +static void ipmmu_utlbs_backup(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs backup\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + backup_data->asids_val[i] = ipmmu_imuasid_read(mmu, utlb); + backup_data->utlbs_val[i] = ipmmu_imuctr_read(mmu, utlb); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_utlbs_restore(struct ipmmu_vmsa_device *mmu) +{ + struct ipmmu_vmsa_backup *backup_data; + + dev_dbg(mmu->dev, "Handle micro-TLBs restore\n"); + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry( backup_data, &ipmmu_devices_backup, list ) + { + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(backup_data->dev); + unsigned int i; + + if ( to_ipmmu(backup_data->dev) != mmu ) + continue; + + for ( i = 0; i < fwspec->num_ids; i++ ) + { + unsigned int utlb = fwspec->ids[i]; + + ipmmu_imuasid_write(mmu, utlb, backup_data->asids_val[i]); + ipmmu_imuctr_write(mmu, utlb, backup_data->utlbs_val[i]); + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} + +static void ipmmu_domain_backup_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u backup\n", domain->context_id); + + regs->imttlbr0 = ipmmu_ctx_read_root(domain, IMTTLBR0); + regs->imttubr0 = ipmmu_ctx_read_root(domain, IMTTUBR0); + regs->imttbcr = ipmmu_ctx_read_root(domain, IMTTBCR); + regs->imctr = ipmmu_ctx_read_root(domain, IMCTR); +} + +static void ipmmu_domain_restore_context(struct ipmmu_vmsa_domain *domain) +{ + struct ipmmu_vmsa_device *mmu = domain->mmu->root; + struct ipmmu_reg_ctx *regs = mmu->reg_backup[domain->context_id]; + + dev_dbg(mmu->dev, "Handle domain context %u restore\n", domain->context_id); + + ipmmu_ctx_write_root(domain, IMTTLBR0, regs->imttlbr0); + ipmmu_ctx_write_root(domain, IMTTUBR0, regs->imttubr0); + ipmmu_ctx_write_root(domain, IMTTBCR, regs->imttbcr); + ipmmu_ctx_write_all(domain, IMCTR, regs->imctr | IMCTR_FLUSH); +} + +/* + * Xen: Unlike Linux implementation, Xen uses a single driver instance + * for handling all IPMMUs. There is no framework for ipmmu_suspend/resume + * callbacks to be invoked for each IPMMU device. So, we need to iterate + * through all registered IPMMUs performing required actions. + * + * Also take care of restoring special settings, such as translation + * table format, etc. + */ +static int __must_check ipmmu_suspend(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return 0; + + printk(XENLOG_DEBUG "ipmmu: Suspending...\n"); + + spin_lock(&ipmmu_devices_lock); + + list_for_each_entry( mmu, &ipmmu_devices, list ) + { + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_backup_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_backup(mmu); + } + + spin_unlock(&ipmmu_devices_lock); + + return 0; +} + +static void ipmmu_resume(void) +{ + struct ipmmu_vmsa_device *mmu; + + if ( !iommu_enabled ) + return; + + printk(XENLOG_DEBUG "ipmmu: Resuming...\n"); + + spin_lock(&ipmmu_devices_lock); + + /* + * IPMMUs are registered with list_add(), with Root IPMMU probed first. + * Walk backwards to restore Root contexts before Cache micro-TLBs. + */ + list_for_each_entry_reverse( mmu, &ipmmu_devices, list ) + { + uint32_t reg; + + /* Do not use security group function */ + reg = IMSCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) & ~IMSCTLR_USE_SECGRP); + + if ( ipmmu_is_root(mmu) ) + { + unsigned int i; + + /* Use stage 2 translation table format */ + reg = IMSAUXCTLR + mmu->features->control_offset_base; + ipmmu_write(mmu, reg, ipmmu_read(mmu, reg) | IMSAUXCTLR_S2PTE); + + for ( i = 0; i < mmu->num_ctx; i++ ) + { + if ( !mmu->domains[i] ) + continue; + ipmmu_domain_restore_context(mmu->domains[i]); + } + } + else + ipmmu_utlbs_restore(mmu); + } + + spin_unlock(&ipmmu_devices_lock); +} + +static int ipmmu_alloc_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data; + unsigned int *utlbs_val, *asids_val; + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + + utlbs_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !utlbs_val ) + return -ENOMEM; + + asids_val = xzalloc_array(unsigned int, fwspec->num_ids); + if ( !asids_val ) + { + xfree(utlbs_val); + return -ENOMEM; + } + + backup_data = xzalloc(struct ipmmu_vmsa_backup); + if ( !backup_data ) + { + xfree(utlbs_val); + xfree(asids_val); + return -ENOMEM; + } + + backup_data->dev = dev; + backup_data->utlbs_val = utlbs_val; + backup_data->asids_val = asids_val; + + spin_lock(&ipmmu_devices_backup_lock); + list_add(&backup_data->list, &ipmmu_devices_backup); + spin_unlock(&ipmmu_devices_backup_lock); + + return 0; +} + +#ifdef CONFIG_HAS_PCI +static void ipmmu_free_ctx_suspend(struct device *dev) +{ + struct ipmmu_vmsa_backup *backup_data, *tmp; + + spin_lock(&ipmmu_devices_backup_lock); + + list_for_each_entry_safe( backup_data, tmp, &ipmmu_devices_backup, list ) + { + if ( backup_data->dev == dev ) + { + list_del(&backup_data->list); + xfree(backup_data->utlbs_val); + xfree(backup_data->asids_val); + xfree(backup_data); + break; + } + } + + spin_unlock(&ipmmu_devices_backup_lock); +} +#endif /* CONFIG_HAS_PCI */ + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) { uint64_t ttbr; @@ -559,6 +825,9 @@ static int ipmmu_domain_init_context(struct ipmmu_vmsa_domain *domain) return ret; domain->context_id = ret; +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[ret] = &root_pgtable[ret]; +#endif /* * TTBR0 @@ -615,6 +884,9 @@ static void ipmmu_domain_destroy_context(struct ipmmu_vmsa_domain *domain) ipmmu_ctx_write_root(domain, IMCTR, IMCTR_FLUSH); ipmmu_tlb_sync(domain); +#ifdef CONFIG_SYSTEM_SUSPEND + domain->mmu->root->reg_backup[domain->context_id] = NULL; +#endif ipmmu_domain_free_context(domain->mmu->root, domain->context_id); } @@ -1338,10 +1610,11 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct iommu_fwspec *fwspec; #ifdef CONFIG_HAS_PCI + int ret; + if ( dev_is_pci(dev) ) { struct pci_dev *pdev = dev_to_pci(dev); - int ret; if ( devfn != pdev->devfn ) return 0; @@ -1358,17 +1631,24 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( !to_ipmmu(dev) ) return -ENODEV; - if ( !dev_is_pci(dev) ) + if ( !dev_is_pci(dev) && dt_device_is_protected(dev_to_dt(dev)) ) { - if ( dt_device_is_protected(dev_to_dt(dev)) ) - { - dev_err(dev, "Already added to IPMMU\n"); - return -EEXIST; - } + dev_err(dev, "Already added to IPMMU\n"); + return -EEXIST; + } - /* Let Xen know that the master device is protected by an IOMMU. */ - dt_device_set_protected(dev_to_dt(dev)); +#ifdef CONFIG_SYSTEM_SUSPEND + if ( ipmmu_alloc_ctx_suspend(dev) ) + { + dev_err(dev, "Failed to allocate context for suspend\n"); + return -ENOMEM; } +#endif + + /* Let Xen know that the master device is protected by an IOMMU. */ + if ( !dev_is_pci(dev) ) + dt_device_set_protected(dev_to_dt(dev)); + #ifdef CONFIG_HAS_PCI if ( dev_is_pci(dev) ) { @@ -1377,26 +1657,28 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) struct pci_host_bridge *bridge; struct iommu_fwspec *fwspec_bridge; unsigned int utlb_osid0 = 0; - int ret; bridge = pci_find_host_bridge(pdev->seg, pdev->bus); if ( !bridge ) { dev_err(dev, "Failed to find host bridge\n"); - return -ENODEV; + ret = -ENODEV; + goto free_suspend_ctx; } fwspec_bridge = dev_iommu_fwspec_get(dt_to_dev(bridge->dt_node)); if ( fwspec_bridge->num_ids < 1 ) { dev_err(dev, "Failed to find host bridge uTLB\n"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } if ( fwspec->num_ids < 1 ) { dev_err(dev, "Failed to find uTLB"); - return -ENXIO; + ret = -ENXIO; + goto free_suspend_ctx; } rcar4_pcie_osid_regs_init(bridge); @@ -1405,7 +1687,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) if ( ret < 0 ) { dev_err(dev, "No unused OSID regs\n"); - return ret; + goto free_suspend_ctx; } reg_id = ret; @@ -1420,7 +1702,7 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) { rcar4_pcie_osid_bdf_clear(bridge, reg_id); rcar4_pcie_osid_reg_free(bridge, reg_id); - return ret; + goto free_suspend_ctx; } } #endif @@ -1429,6 +1711,13 @@ static int ipmmu_add_device(u8 devfn, struct device *dev) dev_name(fwspec->iommu_dev), fwspec->num_ids); return 0; +#ifdef CONFIG_HAS_PCI + free_suspend_ctx: +#ifdef CONFIG_SYSTEM_SUSPEND + ipmmu_free_ctx_suspend(dev); +#endif + return ret; +#endif } static int ipmmu_iommu_domain_init(struct domain *d) @@ -1490,6 +1779,10 @@ static const struct iommu_ops ipmmu_iommu_ops = .unmap_page = arm_iommu_unmap_page, .dt_xlate = ipmmu_dt_xlate, .add_device = ipmmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = ipmmu_suspend, + .resume = ipmmu_resume, +#endif }; static __init int ipmmu_init(struct dt_device_node *node, const void *data) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315656.1585417 (Exim 4.92) (envelope-from ) id 1wQ7VR-0002bs-4V; Thu, 21 May 2026 17:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315656.1585417; Thu, 21 May 2026 17:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VR-0002aY-0s; Thu, 21 May 2026 17:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1315656; Thu, 21 May 2026 17:48:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VP-00022P-9u for xen-devel@lists.xenproject.org; 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As a result, CPUs going offline and back online could end up with stale or missing handlers, breaking delivery of FF-A notifications. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis --- xen/arch/arm/tee/ffa_notif.c | 63 ++++++++++++++++++++++++++++-------- 1 file changed, 50 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/tee/ffa_notif.c b/xen/arch/arm/tee/ffa_notif.c index 186e726412..513c399594 100644 --- a/xen/arch/arm/tee/ffa_notif.c +++ b/xen/arch/arm/tee/ffa_notif.c @@ -360,10 +360,28 @@ static int32_t ffa_notification_bitmap_destroy(uint16_t vm_id) return ffa_simple_call(FFA_NOTIFICATION_BITMAP_DESTROY, vm_id, 0, 0, 0); } -void ffa_notif_init_interrupt(void) +static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, sri_irq); + +static int request_sri_irq(void) { int ret; + struct irqaction *sri_action = &this_cpu(sri_irq); + + sri_action->name = "FF-A notif"; + sri_action->handler = notif_irq_handler; + sri_action->dev_id = NULL; + sri_action->free_on_release = 0; + + ret = setup_irq(notif_sri_irq, 0, sri_action); + if ( ret ) + printk(XENLOG_ERR "ffa: setup_irq irq %u failed: error %d\n", + notif_sri_irq, ret); + return ret; +} + +void ffa_notif_init_interrupt(void) +{ if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) { /* @@ -376,14 +394,36 @@ void ffa_notif_init_interrupt(void) * pending, while the SPMC in the secure world will not notice that * the interrupt was lost. */ - ret = request_irq(notif_sri_irq, 0, notif_irq_handler, "FF-A notif", - NULL); - if ( ret ) - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - notif_sri_irq, ret); + request_sri_irq(); } } +static void deinit_ffa_notif_interrupt(void) +{ + if ( fw_notif_enabled && notif_sri_irq < NR_GIC_SGI ) + release_irq(notif_sri_irq, NULL); +} + +static int cpu_ffa_notif_callback(struct notifier_block *nfb, + unsigned long action, + void *hcpu) +{ + switch ( action ) + { + case CPU_DYING: + deinit_ffa_notif_interrupt(); + break; + default: + break; + } + + return NOTIFY_DONE; +} + +static struct notifier_block cpu_ffa_notif_nfb = { + .notifier_call = cpu_ffa_notif_callback, +}; + void ffa_notif_init(void) { const struct arm_smccc_1_2_regs arg = { @@ -392,7 +432,6 @@ void ffa_notif_init(void) }; struct arm_smccc_1_2_regs resp; unsigned int irq; - int ret; /* Only enable fw notification if all ABIs we need are supported */ if ( ffa_fw_supports_fid(FFA_NOTIFICATION_BITMAP_CREATE) && @@ -408,13 +447,11 @@ void ffa_notif_init(void) notif_sri_irq = irq; if ( irq >= NR_GIC_SGI ) irq_set_type(irq, IRQ_TYPE_EDGE_RISING); - ret = request_irq(irq, 0, notif_irq_handler, "FF-A notif", NULL); - if ( ret ) - { - printk(XENLOG_ERR "ffa: request_irq irq %u failed: error %d\n", - irq, ret); + + if ( request_sri_irq() ) return; - } + + register_cpu_notifier(&cpu_ffa_notif_nfb); fw_notif_enabled = true; } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315653.1585391 (Exim 4.92) (envelope-from ) id 1wQ7VO-0001zB-TF; Thu, 21 May 2026 17:48:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315653.1585391; Thu, 21 May 2026 17:48:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VO-0001yz-O9; Thu, 21 May 2026 17:48:22 +0000 Received: by outflank-mailman (input) for mailman id 1315653; Thu, 21 May 2026 17:48:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VM-0001XX-Qn for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VM-00BluR-6Y for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:20 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f452f-bab6-0a2a0a5309dd-0a2a4508d226-24 for ; Thu, 21 May 2026 19:48:20 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4563-63b5-0a2a45080019-d155802cc078-3 for ; Thu, 21 May 2026 19:48:20 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4903f7a90d1so3694595e9.2 for ; Thu, 21 May 2026 10:48:20 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Before continuing suspend, also verify that the physical CPU interface has no Group 1 active-priority state left. Use ICC_CTLR_EL1.PRIbits to decide which ICC_AP1R_EL1 registers are implemented, so Xen does not read an unimplemented AP1R register. Signed-off-by: Mykola Kvach --- Changes in V10: - abort suspend when the physical Group 1 active-priority state is still present, deriving accessible ICC_AP1R_EL1 registers from ICC_CTLR_EL1.PRIbits; - re-enable the redistributor before restoring CPU and virtual interface state on the suspend abort path; - panic if the redistributor cannot be re-enabled on the suspend abort path; - avoid saving/restoring reserved GICD_IPRIORITYR and GICD_IROUTER entries for a partially populated last SPI block; - disable Distributor group forwarding while preserving affinity routing state before restoring Distributor configuration; - disable SPI/eSPI forwarding and wait for RWP before restoring GICD_ICFGR.Int_config. Changes in V9: - fix the suspend-context comment typo and split dist_ctx declarations; - restore ICC_IGRPEN1_EL1 on the suspend error path; - re-initialize GICD_IGROUPRnE during resume; - restore GICD_IROUTER only after re-enabling ARE_NS during resume. Changes in V8: - use right rdist base for prop/pend baser and ctrl Changes in V7: - restore LPI regs on resume - add timeout during redist disabling - squash with suspend/resume handling for GICv3 eSPI registers - drop ITS guard paths so suspend/resume always runs; switch missing ctx allocation to panic - trim TODO comments; narrow redistributor storage to PPI icfgr - keep distributor context allocation even without ITS; adjust resume to use GENMASK(31, 0) for clearing enables - drop storage of the SGI configuration register, as SGIs are always edge-triggered --- xen/arch/arm/gic-v3-lpi.c | 3 + xen/arch/arm/gic-v3.c | 458 ++++++++++++++++++++++- xen/arch/arm/include/asm/arm64/sysregs.h | 5 + xen/arch/arm/include/asm/gic_v3_defs.h | 3 + 4 files changed, 466 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 847da26ff7..a63c8c4979 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -467,6 +467,9 @@ static int cpu_callback(struct notifier_block *nfb, unsigned long action, switch ( action ) { case CPU_UP_PREPARE: + if ( system_state == SYS_STATE_resume ) + break; + rc = gicv3_lpi_allocate_pendtable(cpu); if ( rc ) printk(XENLOG_ERR "Unable to allocate the pendtable for CPU%lu\n", diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index a2553e647e..64fd772d65 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -1076,12 +1076,12 @@ out: return res; } -static void gicv3_hyp_disable(void) +static void gicv3_hyp_enable(bool enable) { register_t hcr; hcr = READ_SYSREG(ICH_HCR_EL2); - hcr &= ~GICH_HCR_EN; + hcr = enable ? (hcr | GICH_HCR_EN) : (hcr & ~GICH_HCR_EN); WRITE_SYSREG(hcr, ICH_HCR_EL2); isb(); } @@ -1188,7 +1188,7 @@ static void gicv3_disable_interface(void) spin_lock(&gicv3.lock); gicv3_cpu_disable(); - gicv3_hyp_disable(); + gicv3_hyp_enable(false); spin_unlock(&gicv3.lock); } @@ -1924,6 +1924,450 @@ static bool gic_dist_supports_lpis(void) return (readl_relaxed(GICD + GICD_TYPER) & GICD_TYPE_LPIS); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents a block of 32 IRQs */ +struct dist_irq_block { + uint32_t icfgr[2]; + uint32_t ipriorityr[8]; + uint64_t irouter[32]; + uint32_t isactiver; + uint32_t isenabler; +}; + +struct redist_ctx { + uint32_t ctlr; + uint32_t icfgr; /* only PPIs stored */ + uint32_t igroupr; + uint32_t ipriorityr[8]; + uint32_t isactiver; + uint32_t isenabler; + + uint64_t pendbase; + uint64_t propbase; +}; + +/* GICv3 registers to be saved/restored on system suspend/resume */ +struct gicv3_ctx { + struct dist_ctx { + uint32_t ctlr; + struct dist_irq_block *irqs; + struct dist_irq_block *espi_irqs; + } dist; + + /* have only one rdist structure for last running CPU during suspend */ + struct redist_ctx rdist; + + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + uint32_t sre_el2; + uint32_t grpen; + } cpu; +}; + +static struct gicv3_ctx gicv3_ctx; + +static void __init gicv3_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv3_info.nr_lines, 32); + + /* The spec allows for systems without any SPIs */ + if ( blocks > 1 ) + { + gicv3_ctx.dist.irqs = xzalloc_array(struct dist_irq_block, blocks - 1); + if ( !gicv3_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv3 suspend context\n"); + } + +#ifdef CONFIG_GICV3_ESPI + if ( !gic_number_espis() ) + return; + + blocks = gic_number_espis() / 32; + gicv3_ctx.dist.espi_irqs = xzalloc_array(struct dist_irq_block, blocks); + if ( !gicv3_ctx.dist.espi_irqs ) + panic("Failed to allocate memory for GICv3 eSPI suspend context\n"); +#endif +} + +static int gicv3_disable_redist(void) +{ + void __iomem *waker = GICD_RDIST_BASE + GICR_WAKER; + s_time_t deadline; + + /* + * Avoid infinite loop if Non-secure does not have access to GICR_WAKER. + * See Arm IHI 0069H.b, 12.11.42 GICR_WAKER: + * When GICD_CTLR.DS == 0 and an access is Non-secure accesses to this + * register are RAZ/WI. + */ + if ( !(readl_relaxed(GICD + GICD_CTLR) & GICD_CTLR_DS) ) + return 0; + + deadline = NOW() + MILLISECS(1000); + + writel_relaxed(readl_relaxed(waker) | GICR_WAKER_ProcessorSleep, waker); + while ( (readl_relaxed(waker) & GICR_WAKER_ChildrenAsleep) == 0 ) + { + if ( NOW() > deadline ) + { + printk("GICv3: Timeout waiting for redistributor to sleep\n"); + return -ETIMEDOUT; + } + cpu_relax(); + udelay(10); + } + + return 0; +} + +#define GET_SPI_REG_OFFSET(name, is_espi) \ + ((is_espi) ? GICD_##name##nE : GICD_##name) + +static void gicv3_store_spi_irq_block(struct dist_irq_block *irqs, + unsigned int i, unsigned int nr_irqs, + bool is_espi) +{ + void __iomem *base; + unsigned int irq, nr_priority_regs; + + ASSERT(nr_irqs && nr_irqs <= 32); + nr_priority_regs = DIV_ROUND_UP(nr_irqs, 4); + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + irqs->icfgr[0] = readl_relaxed(base); + irqs->icfgr[1] = readl_relaxed(base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < nr_priority_regs; irq++ ) + irqs->ipriorityr[irq] = readl_relaxed(base + 4 * irq); + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < nr_irqs; irq++ ) + irqs->irouter[irq] = readq_relaxed_non_atomic(base + 8 * irq); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + irqs->isactiver = readl_relaxed(base); + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + irqs->isenabler = readl_relaxed(base); +} + +static void gicv3_restore_spi_irq_config(struct dist_irq_block *irqs, + unsigned int i, unsigned int nr_irqs, + bool is_espi) +{ + void __iomem *base; + unsigned int irq, nr_priority_regs; + + ASSERT(nr_irqs && nr_irqs <= 32); + nr_priority_regs = DIV_ROUND_UP(nr_irqs, 4); + + base = GICD + GET_SPI_REG_OFFSET(ICFGR, is_espi) + i * sizeof(irqs->icfgr); + writel_relaxed(irqs->icfgr[0], base); + writel_relaxed(irqs->icfgr[1], base + 4); + + base = GICD + GET_SPI_REG_OFFSET(IPRIORITYR, is_espi); + base += i * sizeof(irqs->ipriorityr); + for ( irq = 0; irq < nr_priority_regs; irq++ ) + writel_relaxed(irqs->ipriorityr[irq], base + 4 * irq); +} + +static void gicv3_restore_spi_irq_routing(struct dist_irq_block *irqs, + unsigned int i, unsigned int nr_irqs, + bool is_espi) +{ + void __iomem *base; + unsigned int irq; + + ASSERT(nr_irqs && nr_irqs <= 32); + + base = GICD + GET_SPI_REG_OFFSET(IROUTER, is_espi); + base += i * sizeof(irqs->irouter); + for ( irq = 0; irq < nr_irqs; irq++ ) + writeq_relaxed_non_atomic(irqs->irouter[irq], base + 8 * irq); +} + +static void gicv3_disable_spi_irq_block(unsigned int i, bool is_espi) +{ + void __iomem *base; + + base = GICD + GET_SPI_REG_OFFSET(ICENABLER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); +} + +static void gicv3_restore_spi_irq_state(struct dist_irq_block *irqs, + unsigned int i, bool is_espi) +{ + void __iomem *base; + + base = GICD + GET_SPI_REG_OFFSET(ISENABLER, is_espi); + base += i * sizeof(irqs->isenabler); + writel_relaxed(irqs->isenabler, base); + + base = GICD + GET_SPI_REG_OFFSET(ICACTIVER, is_espi) + i * 4; + writel_relaxed(GENMASK(31, 0), base); + + base = GICD + GET_SPI_REG_OFFSET(ISACTIVER, is_espi); + base += i * sizeof(irqs->isactiver); + writel_relaxed(irqs->isactiver, base); +} + +static int gicv3_check_ap1r(unsigned int n, register_t apr) +{ + if ( !apr ) + return 0; + + printk(XENLOG_ERR "GICv3: suspend aborted: ICC_AP1R%u_EL1=%#" + PRIregister"\n", n, apr); + + return -EBUSY; +} + +static int gicv3_check_active_priorities(register_t ctlr) +{ + unsigned int pribits = MASK_EXTR(ctlr, ICC_CTLR_EL1_PRIBITS_MASK) + 1; + int ret; + + /* + * Xen enables physical Group 1 interrupts through ICC_IGRPEN1_EL1, + * so only the physical Group 1 active-priority registers are relevant + * here. Use ICC_CTLR_EL1.PRIbits for the physical CPU interface, not + * ICH_VTR_EL2, which describes the virtual interface. ICC_AP1R1_EL1 is + * only implemented with at least 6 physical priority bits, and + * ICC_AP1R2_EL1/ICC_AP1R3_EL1 with at least 7. + */ + switch ( pribits ) + { + case 8: + case 7: + ret = gicv3_check_ap1r(3, READ_SYSREG(ICC_AP1R3_EL1)); + if ( ret ) + return ret; + ret = gicv3_check_ap1r(2, READ_SYSREG(ICC_AP1R2_EL1)); + if ( ret ) + return ret; + /* Fall through */ + case 6: + ret = gicv3_check_ap1r(1, READ_SYSREG(ICC_AP1R1_EL1)); + if ( ret ) + return ret; + /* Fall through */ + default: + return gicv3_check_ap1r(0, READ_SYSREG(ICC_AP1R0_EL1)); + } +} + +static int gicv3_suspend(void) +{ + unsigned int i, nr_irqs; + void __iomem *base; + int ret; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + /* Save GICC configuration */ + gicv3_ctx.cpu.ctlr = READ_SYSREG(ICC_CTLR_EL1); + gicv3_ctx.cpu.pmr = READ_SYSREG(ICC_PMR_EL1); + gicv3_ctx.cpu.bpr = READ_SYSREG(ICC_BPR1_EL1); + gicv3_ctx.cpu.sre_el2 = READ_SYSREG(ICC_SRE_EL2); + gicv3_ctx.cpu.grpen = READ_SYSREG(ICC_IGRPEN1_EL1); + + gicv3_disable_interface(); + + ret = gicv3_check_active_priorities(gicv3_ctx.cpu.ctlr); + if ( ret ) + goto out_enable_iface; + + ret = gicv3_disable_redist(); + if ( ret ) + goto out_enable_iface; + + /* Save GICR configuration */ + gicv3_redist_wait_for_rwp(); + + base = GICD_RDIST_BASE; + + rdist->ctlr = readl_relaxed(base + GICR_CTLR); + + rdist->propbase = readq_relaxed(base + GICR_PROPBASER); + rdist->pendbase = readq_relaxed(base + GICR_PENDBASER); + + base = GICD_RDIST_SGI_BASE; + + /* Save priority on PPI and SGI interrupts */ + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + rdist->ipriorityr[i] = readl_relaxed(base + GICR_IPRIORITYR0 + 4 * i); + + rdist->isactiver = readl_relaxed(base + GICR_ISACTIVER0); + rdist->isenabler = readl_relaxed(base + GICR_ISENABLER0); + rdist->igroupr = readl_relaxed(base + GICR_IGROUPR0); + rdist->icfgr = readl_relaxed(base + GICR_ICFGR1); + + /* Save GICD configuration */ + gicv3_dist_wait_for_rwp(); + gicv3_ctx.dist.ctlr = readl_relaxed(GICD + GICD_CTLR); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + { + nr_irqs = min(32U, gicv3_info.nr_lines - i * 32); + gicv3_store_spi_irq_block(gicv3_ctx.dist.irqs + i - 1, i, nr_irqs, + false); + } + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_store_spi_irq_block(gicv3_ctx.dist.espi_irqs + i, i, 32, true); +#endif + + return 0; + + out_enable_iface: + if ( gicv3_enable_redist() ) + panic("GICv3: Failed to re-enable redistributor after suspend abort\n"); + + gicv3_hyp_enable(true); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + return ret; +} + +static void gicv3_resume(void) +{ + int ret; + unsigned int i, nr_irqs; + uint32_t dist_ctlr; + void __iomem *base; + struct redist_ctx *rdist = &gicv3_ctx.rdist; + + dist_ctlr = gicv3_ctx.dist.ctlr & GICD_CTLR_ARE_NS; + + /* Disable group forwarding while preserving affinity routing state. */ + writel_relaxed(dist_ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + /* + * IHI0069H.b 12.9.9 says changing GICD_ICFGR.Int_config + * while the interrupt is individually enabled is UNPREDICTABLE. + * Disable SPIs first; 4.7.1 defines GICD_ICENABLER, n > 0, + * as the per-SPI disable mechanism. + */ + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_disable_spi_irq_block(i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_disable_spi_irq_block(i, true); +#endif + + gicv3_dist_wait_for_rwp(); + + for ( i = NR_GIC_LOCAL_IRQS; i < gicv3_info.nr_lines; i += 32 ) + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPR + (i / 32) * 4); + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + { + nr_irqs = min(32U, gicv3_info.nr_lines - i * 32); + gicv3_restore_spi_irq_config(gicv3_ctx.dist.irqs + i - 1, i, nr_irqs, + false); + } + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + { + writel_relaxed(GENMASK(31, 0), GICD + GICD_IGROUPRnE + i * 4); + gicv3_restore_spi_irq_config(gicv3_ctx.dist.espi_irqs + i, i, 32, + true); + } +#endif + + if ( dist_ctlr ) + { + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + { + nr_irqs = min(32U, gicv3_info.nr_lines - i * 32); + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.irqs + i - 1, i, + nr_irqs, false); + } + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_routing(gicv3_ctx.dist.espi_irqs + i, i, + 32, true); +#endif + } + + for ( i = 1; i < DIV_ROUND_UP(gicv3_info.nr_lines, 32); i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.irqs + i - 1, i, false); + +#ifdef CONFIG_GICV3_ESPI + for ( i = 0; i < gic_number_espis() / 32; i++ ) + gicv3_restore_spi_irq_state(gicv3_ctx.dist.espi_irqs + i, i, true); +#endif + + writel_relaxed(gicv3_ctx.dist.ctlr, GICD + GICD_CTLR); + gicv3_dist_wait_for_rwp(); + + ret = gicv3_lpi_init_rdist(GICD_RDIST_BASE); + /* + * If LPIs are already enabled, assume firmware or the still-powered + * redistributor has valid PROPBASER/PENDBASER and skip reprogramming. + * Return -EBUSY so callers can ignore this case. + */ + if ( ret && ret != -ENODEV && ret != -EBUSY ) + panic("GICv3: Failed to re-initialize LPIs during resume\n"); + else if ( ret == -EBUSY ) /* extra checks, just to be sure */ + { + base = GICD_RDIST_BASE; + if ( readq_relaxed(base + GICR_PROPBASER) != rdist->propbase || + readq_relaxed(base + GICR_PENDBASER) != rdist->pendbase ) + panic("GICv3: LPIs already enabled with unexpected PROPBASER/PENDBASER during resume\n"); + } + + /* Restore GICR (Redistributor) configuration */ + if ( gicv3_enable_redist() ) + panic("GICv3: Failed to re-enable redistributor during resume\n"); + + base = GICD_RDIST_SGI_BASE; + + writel_relaxed(GENMASK(31, 0), base + GICR_ICENABLER0); + gicv3_redist_wait_for_rwp(); + + for ( i = 0; i < NR_GIC_LOCAL_IRQS / 4; i++ ) + writel_relaxed(rdist->ipriorityr[i], base + GICR_IPRIORITYR0 + i * 4); + + writel_relaxed(rdist->isactiver, base + GICR_ISACTIVER0); + writel_relaxed(rdist->igroupr, base + GICR_IGROUPR0); + writel_relaxed(rdist->icfgr, base + GICR_ICFGR1); + + gicv3_redist_wait_for_rwp(); + + writel_relaxed(rdist->isenabler, base + GICR_ISENABLER0); + writel_relaxed(rdist->ctlr, GICD_RDIST_BASE + GICR_CTLR); + + gicv3_redist_wait_for_rwp(); + + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); + isb(); + + /* Restore CPU interface (System registers) */ + WRITE_SYSREG(gicv3_ctx.cpu.pmr, ICC_PMR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.bpr, ICC_BPR1_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.ctlr, ICC_CTLR_EL1); + WRITE_SYSREG(gicv3_ctx.cpu.grpen, ICC_IGRPEN1_EL1); + isb(); + + gicv3_hyp_init(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* Set up the GIC */ static int __init gicv3_init(void) { @@ -1998,6 +2442,10 @@ static int __init gicv3_init(void) gicv3_hyp_init(); +#ifdef CONFIG_SYSTEM_SUSPEND + gicv3_alloc_context(); +#endif + out: spin_unlock(&gicv3.lock); @@ -2037,6 +2485,10 @@ static const struct gic_hw_operations gicv3_ops = { #endif .iomem_deny_access = gicv3_iomem_deny_access, .do_LPI = gicv3_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv3_suspend, + .resume = gicv3_resume, +#endif }; static int __init gicv3_dt_preinit(struct dt_device_node *node, const void *data) diff --git a/xen/arch/arm/include/asm/arm64/sysregs.h b/xen/arch/arm/include/asm/arm64/sysregs.h index f3c11d871e..2261620316 100644 --- a/xen/arch/arm/include/asm/arm64/sysregs.h +++ b/xen/arch/arm/include/asm/arm64/sysregs.h @@ -16,6 +16,11 @@ #define ICC_SRE_EL1 S3_0_C12_C12_5 #define ICC_IGRPEN1_EL1 S3_0_C12_C12_7 +#define ICC_AP1R0_EL1 S3_0_C12_C9_0 +#define ICC_AP1R1_EL1 S3_0_C12_C9_1 +#define ICC_AP1R2_EL1 S3_0_C12_C9_2 +#define ICC_AP1R3_EL1 S3_0_C12_C9_3 + #define ICH_VSEIR_EL2 S3_4_C12_C9_4 #define ICC_SRE_EL2 S3_4_C12_C9_5 #define ICH_HCR_EL2 S3_4_C12_C11_0 diff --git a/xen/arch/arm/include/asm/gic_v3_defs.h b/xen/arch/arm/include/asm/gic_v3_defs.h index 3714cfeb7d..f741587322 100644 --- a/xen/arch/arm/include/asm/gic_v3_defs.h +++ b/xen/arch/arm/include/asm/gic_v3_defs.h @@ -94,12 +94,15 @@ #define GICD_TYPE_LPIS (1U << 17) #define GICD_CTLR_RWP (1UL << 31) +#define GICD_CTLR_DS (1U << 6) #define GICD_CTLR_ARE_NS (1U << 4) #define GICD_CTLR_ENABLE_G1A (1U << 1) #define GICD_CTLR_ENABLE_G1 (1U << 0) #define GICD_IROUTER_SPI_MODE_ANY (1UL << 31) #define GICC_CTLR_EL1_EOImode_drop (1U << 1) +#define ICC_CTLR_EL1_PRIBITS_SHIFT 8 +#define ICC_CTLR_EL1_PRIBITS_MASK (0x7U << ICC_CTLR_EL1_PRIBITS_SHIFT) #define GICR_WAKER_ProcessorSleep (1U << 1) #define GICR_WAKER_ChildrenAsleep (1U << 2) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315655.1585402 (Exim 4.92) (envelope-from ) id 1wQ7VP-0002Dc-Qx; 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Calling it from the CPU hotplug/resume path then executed discarded code, which could crash Xen. Drop __init so the TEE mediator secondary init can run safely on hotplugged and resumed CPUs. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Bertrand Marquis Reviewed-by: Volodymyr Babchuk --- xen/arch/arm/tee/tee.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/arm/tee/tee.c b/xen/arch/arm/tee/tee.c index 8501443c8e..00e561fc78 100644 --- a/xen/arch/arm/tee/tee.c +++ b/xen/arch/arm/tee/tee.c @@ -128,7 +128,7 @@ static int __init tee_init(void) presmp_initcall(tee_init); -void __init init_tee_secondary(void) +void init_tee_secondary(void) { if ( cur_mediator && cur_mediator->ops->init_secondary ) cur_mediator->ops->init_secondary(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315659.1585437 (Exim 4.92) (envelope-from ) id 1wQ7VT-00036I-Nt; Thu, 21 May 2026 17:48:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315659.1585437; Thu, 21 May 2026 17:48:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VT-00033S-9q; Thu, 21 May 2026 17:48:27 +0000 Received: by outflank-mailman (input) for mailman id 1315659; Thu, 21 May 2026 17:48:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VS-0002o1-17 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VR-00Bm0f-DK for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:25 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f455c-bab6-0a2a0a5309dd-0a2a4501d96a-22 for ; Thu, 21 May 2026 19:48:25 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4569-c1f2-0a2a45010019-d155802dac30-3 for ; Thu, 21 May 2026 19:48:25 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-488a14c31eeso39638495e9.0 for ; Thu, 21 May 2026 10:48:25 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.24.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49033d8e24bsm74565925e9.10.2026.05.21.10.48.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 10:48:24 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779385705; x=1779990505; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=h7WFuiMSqb39jLrPmTC0bmJXb2v0T/dsfDif5cBsMJ4=; b=NgXQn3LbL/iirrMmMUYgH3V0Vuv7Ve1X0lYKJeuApkLBYJ+/HPjCm4QYwbIf7I43fR x8luEqwT/WzY87ERqGGA+lk1cDjJiDHCXRAkxVO0JQV1fXG05pZWZOCsZpxVwsyIwJcQ N8B+WSdMEGYfsMwS/Sz6HOSk8NTiu1hTiDySs+8pe4X2qu5pA4fYAYqY2eYCgyw3lMZ5 rjgcHQffB3aU+5RwDOG3h4a4QTqyAqE7qWMZGyCpzTGf/wbbGVzimSboyU1P/o57gYMw YGOq3TOZi+/YjtfqbO4jbeVSnNx2HyRuuCm77SvyE5wrGm3ijQL333x6VJx9m+yWpc50 6/uw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779385705; x=1779990505; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=h7WFuiMSqb39jLrPmTC0bmJXb2v0T/dsfDif5cBsMJ4=; b=VXZt7EwO5C2L4S5KvAGCLla4H5SMv6eO3ZLyNeCNEBgGCsoxDzwwMPqrYazCmJA99p SWuIc8knkZUGTPAO3PyxIIeJosDAGLmuS1wfsVH1ZeM+Ml95lol7qF6tjsXGShy/0+mJ CoK7N8p9M8Ohw/6vyORtCHsXA3I2fdl6B77OEvXDOBBunMaHJeFRQl/5NGWiO9Fq6+A8 mhCfXPV95iiC15qKgY897akY8/PrgvdXM+1r11mAGf3wKzkHvn3Zgf1LuTMR7Kg0+jg8 Jq3Z4PqKVtmRTvs0DRD5paiQc0AldbrK5wZ/JK+9bFfd6kmfQXFbqA4B/1jG91BiGzle UWTQ== X-Gm-Message-State: AOJu0YzZx7YV0fYODbcXHYnmXyehQ6BZ3Lyklu+KTL0LwgZHn9pxfIaQ xryYtC4KIZehXlQaSQVbzerC5CDX1w3/FOcGr3wx6XIbYYxFaP7zl/jpVWELxIZR X-Gm-Gg: Acq92OGwkzDDJISpupPQT2Z/ag731hCOucLv3GdwbRUNEcc6XGvGjPmAwGyXHZ+4tu/ sUY/ZcRdgOpq5ftzVxQqWZspQDuFDevsOGWXn1NIkPxG6QMUDuoBTJlcb5N/+0K9PEMTtzyXag3 sF03rNyIsiBapijo+2Fwjv3nWaW3ulUt4pRxgQzCfhCYa7eCnnX2rU09oYvUk7GrARKhLDra4pA tUezwSJJdWkD3BIbQtkdwDFWUnmmJCbG/jN/JaFe82UVqYueNgDQ3+bjPYDNSHBV6e2kvOIhVwy JayAFi7hKc46rHf8F7oybBsISj6Nf4HkeQQcVH63yHBp6fqxH7Mp2mlPm9ebYjT5JtkBNfDiuIv Umxxk7xc0xpmyJ8tNVK6+tXgQGGHb+7z54az9kGrWvGCdBSLR9atpYO4K6bJyDiHFhcdSusRxSx UVT7p9zauG3XcZKfj08tyNnXadYw== X-Received: by 2002:a05:600c:3d96:b0:47e:e2eb:bc22 with SMTP id 5b1f17b1804b1-49036024e9fmr61191025e9.5.1779385704650; Thu, 21 May 2026 10:48:24 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Oleksandr Tyshchenko Subject: [PATCH v10 10/13] xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND Date: Thu, 21 May 2026 20:45:28 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779385705-AC055FF4-6745B4E4/0/0 X-purgate-type: clean X-purgate-size: 11435 From: Mirela Simonovic On wakeup from PSCI SYSTEM_SUSPEND, Xen re-enters EL2 with the MMU and data cache disabled. The resume path must first switch back to Xen's runtime page tables before it can access the saved CPU context using virtual addresses. Add an arm64 hyp_resume trampoline that reuses enable_secondary_cpu_mm() to enable the data cache and MMU, switch to init_ttbr, and resume in the runtime virtual mapping. The trampoline then restores the saved CPU general-purpose and system-control register context. prepare_resume_ctx() must be invoked just before the PSCI system suspend call is issued to the platform firmware. It saves the current CPU context and returns a non-zero value so that the caller enters the physical SYSTEM_SUSPEND call. On resume, hyp_resume restores the saved context, including the saved link register. Control therefore returns to the place where prepare_resume_ctx() was called. To avoid re-entering the suspend path, the restored path sees prepare_resume_ctx() return zero. The assembly save/restore code uses offsets generated by asm-offsets.c from struct resume_cpu_context, keeping the assembly memory accesses in sync with the C structure layout. Support for ARM32 is not implemented. Instead, compilation fails with a build-time error if suspend is enabled for ARM32. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach Reviewed-by: Oleksandr Tyshchenko --- Changes in v10: - Save and restore CNTHCTL_EL2 across SYSTEM_SUSPEND Changes in v9: - Drop the misleading prepare_resume_ctx() pointer argument and make both save/restore paths use the global resume_cpu_context. - Squash the arm64 resume trampoline into the context save/restore patch. - Document in code that hyp_resume relies on PSCI initial-state rules. - Use generic platform firmware wording instead of ATF-specific wording. - Rename the saved context type/storage to resume_cpu_context and rely on implicit zero-initialization for the file-scope object. - Use asm-offsets.c-generated RESUME_CTX_* offsets to keep the assembly save/restore code in sync with struct resume_cpu_context. Changes in v8: - Fix alignments in code. Changes in v7: - No functional changes, just moved commit. --- xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 21 +++++ xen/arch/arm/arm64/head.S | 122 +++++++++++++++++++++++++++++ xen/arch/arm/include/asm/suspend.h | 27 +++++++ xen/arch/arm/suspend.c | 14 ++++ 5 files changed, 185 insertions(+) create mode 100644 xen/arch/arm/suspend.c diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 982c6c396a..c97df7f3a0 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -51,6 +51,7 @@ obj-y += setup.o obj-y += shutdown.o obj-y += smp.o obj-y += smpboot.o +obj-$(CONFIG_SYSTEM_SUSPEND) += suspend.o obj-$(CONFIG_SYSCTL) += sysctl.o obj-y += time.o obj-y += traps.o diff --git a/xen/arch/arm/arm64/asm-offsets.c b/xen/arch/arm/arm64/asm-offsets.c index 38a3894a3b..5d60406e9c 100644 --- a/xen/arch/arm/arm64/asm-offsets.c +++ b/xen/arch/arm/arm64/asm-offsets.c @@ -13,6 +13,7 @@ #include #include #include +#include #define DEFINE(_sym, _val) \ asm volatile ( "\n.ascii\"==>#define " #_sym " %0 /* " #_val " */<==\""\ @@ -57,6 +58,26 @@ void __dummy__(void) OFFSET(INITINFO_stack, struct init_info, stack); BLANK(); +#ifdef CONFIG_SYSTEM_SUSPEND + OFFSET(RESUME_CTX_X19, struct resume_cpu_context, callee_regs[0]); + OFFSET(RESUME_CTX_X21, struct resume_cpu_context, callee_regs[2]); + OFFSET(RESUME_CTX_X23, struct resume_cpu_context, callee_regs[4]); + OFFSET(RESUME_CTX_X25, struct resume_cpu_context, callee_regs[6]); + OFFSET(RESUME_CTX_X27, struct resume_cpu_context, callee_regs[8]); + OFFSET(RESUME_CTX_X29, struct resume_cpu_context, callee_regs[10]); + OFFSET(RESUME_CTX_SP, struct resume_cpu_context, sp); + OFFSET(RESUME_CTX_VBAR_EL2, struct resume_cpu_context, vbar_el2); + OFFSET(RESUME_CTX_VTCR_EL2, struct resume_cpu_context, vtcr_el2); + OFFSET(RESUME_CTX_VTTBR_EL2, struct resume_cpu_context, vttbr_el2); + OFFSET(RESUME_CTX_TPIDR_EL2, struct resume_cpu_context, tpidr_el2); + OFFSET(RESUME_CTX_MDCR_EL2, struct resume_cpu_context, mdcr_el2); + OFFSET(RESUME_CTX_HSTR_EL2, struct resume_cpu_context, hstr_el2); + OFFSET(RESUME_CTX_CPTR_EL2, struct resume_cpu_context, cptr_el2); + OFFSET(RESUME_CTX_HCR_EL2, struct resume_cpu_context, hcr_el2); + OFFSET(RESUME_CTX_CNTHCTL_EL2, struct resume_cpu_context, cnthctl_el2); + BLANK(); +#endif + OFFSET(SMCCC_RES_a0, struct arm_smccc_res, a0); OFFSET(SMCCC_RES_a2, struct arm_smccc_res, a2); OFFSET(ARM_SMCCC_1_2_REGS_X0_OFFS, struct arm_smccc_1_2_regs, a0); diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S index 72c7b24498..962be716ae 100644 --- a/xen/arch/arm/arm64/head.S +++ b/xen/arch/arm/arm64/head.S @@ -561,6 +561,128 @@ END(efi_xen_start) #endif /* CONFIG_ARM_EFI */ +#ifdef CONFIG_SYSTEM_SUSPEND +/* + * int prepare_resume_ctx(void) + * + * CPU context saved here will be restored on resume in hyp_resume function. + * prepare_resume_ctx shall return a non-zero value. Upon restoring context + * hyp_resume shall return value zero instead. From C code that invokes + * prepare_resume_ctx, the return value is interpreted to determine whether + * the context is saved (prepare_resume_ctx) or restored (hyp_resume). + */ +FUNC(prepare_resume_ctx) + ldr x0, =resume_cpu_context + + /* Store callee-saved registers */ + stp x19, x20, [x0, #RESUME_CTX_X19] + stp x21, x22, [x0, #RESUME_CTX_X21] + stp x23, x24, [x0, #RESUME_CTX_X23] + stp x25, x26, [x0, #RESUME_CTX_X25] + stp x27, x28, [x0, #RESUME_CTX_X27] + stp x29, lr, [x0, #RESUME_CTX_X29] + + /* Store stack-pointer */ + mov x2, sp + str x2, [x0, #RESUME_CTX_SP] + + /* Store system control registers */ + mrs x2, VBAR_EL2 + str x2, [x0, #RESUME_CTX_VBAR_EL2] + mrs x2, VTCR_EL2 + str x2, [x0, #RESUME_CTX_VTCR_EL2] + mrs x2, VTTBR_EL2 + str x2, [x0, #RESUME_CTX_VTTBR_EL2] + mrs x2, TPIDR_EL2 + str x2, [x0, #RESUME_CTX_TPIDR_EL2] + mrs x2, MDCR_EL2 + str x2, [x0, #RESUME_CTX_MDCR_EL2] + mrs x2, HSTR_EL2 + str x2, [x0, #RESUME_CTX_HSTR_EL2] + mrs x2, CPTR_EL2 + str x2, [x0, #RESUME_CTX_CPTR_EL2] + mrs x2, HCR_EL2 + str x2, [x0, #RESUME_CTX_HCR_EL2] + mrs x2, CNTHCTL_EL2 + str x2, [x0, #RESUME_CTX_CNTHCTL_EL2] + + /* prepare_resume_ctx must return a non-zero value */ + mov x0, #1 + ret +END(prepare_resume_ctx) + +FUNC(hyp_resume) + /* + * PSCI states that SYSTEM_SUSPEND follows the CPU_SUSPEND initial + * state rules, so PSCI-compliant firmware must enter the return + * exception level with DAIF masked. + */ + + /* Initialize the UART if earlyprintk has been enabled. */ +#ifdef CONFIG_EARLY_PRINTK + bl init_uart +#endif + PRINT_ID("- Xen resuming -\r\n") + + bl check_cpu_mode + bl cpu_init + + ldr x0, =start + adr x20, start /* x20 := paddr (start) */ + sub x20, x20, x0 /* x20 := phys-offset */ + ldr lr, =mmu_resumed + b enable_secondary_cpu_mm + +mmu_resumed: + /* Now we can access the saved context, so restore it here. */ + ldr x0, =resume_cpu_context + + /* Restore callee-saved registers */ + ldp x19, x20, [x0, #RESUME_CTX_X19] + ldp x21, x22, [x0, #RESUME_CTX_X21] + ldp x23, x24, [x0, #RESUME_CTX_X23] + ldp x25, x26, [x0, #RESUME_CTX_X25] + ldp x27, x28, [x0, #RESUME_CTX_X27] + ldp x29, lr, [x0, #RESUME_CTX_X29] + + /* Restore stack pointer */ + ldr x2, [x0, #RESUME_CTX_SP] + mov sp, x2 + + /* Restore system control registers */ + ldr x2, [x0, #RESUME_CTX_VBAR_EL2] + msr VBAR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTCR_EL2] + msr VTCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_VTTBR_EL2] + msr VTTBR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_TPIDR_EL2] + msr TPIDR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_MDCR_EL2] + msr MDCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HSTR_EL2] + msr HSTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_CPTR_EL2] + msr CPTR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_HCR_EL2] + msr HCR_EL2, x2 + ldr x2, [x0, #RESUME_CTX_CNTHCTL_EL2] + msr CNTHCTL_EL2, x2 + isb + + /* + * Since context is restored return from this function will appear + * as return from prepare_resume_ctx. To distinguish a return from + * prepare_resume_ctx which is called upon finalizing the suspend, + * as opposed to return from this function which executes on resume, + * we need to return zero value here. + */ + mov x0, #0 + ret +END(hyp_resume) + +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* * Local variables: * mode: ASM diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 31a98a1f1b..c848fc6340 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -3,6 +3,8 @@ #ifndef ARM_SUSPEND_H #define ARM_SUSPEND_H +#include + struct domain; struct vcpu; struct vcpu_guest_context; @@ -14,6 +16,31 @@ struct resume_info { void arch_domain_resume(struct domain *d); +#ifdef CONFIG_SYSTEM_SUSPEND +#ifdef CONFIG_ARM_64 +struct resume_cpu_context { + register_t callee_regs[12]; + register_t sp; + register_t vbar_el2; + register_t vtcr_el2; + register_t vttbr_el2; + register_t tpidr_el2; + register_t mdcr_el2; + register_t hstr_el2; + register_t cptr_el2; + register_t hcr_el2; + register_t cnthctl_el2; +} __aligned(16); +#else +#error "Define resume_cpu_context structure for arm32" +#endif + +extern struct resume_cpu_context resume_cpu_context; + +int prepare_resume_ctx(void); +void hyp_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* ARM_SUSPEND_H */ /* diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c new file mode 100644 index 0000000000..6ea4a0f9cc --- /dev/null +++ b/xen/arch/arm/suspend.c @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +struct resume_cpu_context resume_cpu_context; + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315654.1585397 (Exim 4.92) (envelope-from ) id 1wQ7VP-00022n-9F; Thu, 21 May 2026 17:48:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315654.1585397; Thu, 21 May 2026 17:48:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VP-00022J-2g; Thu, 21 May 2026 17:48:23 +0000 Received: by outflank-mailman (input) for mailman id 1315654; Thu, 21 May 2026 17:48:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VN-0001ku-Pf for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VN-00Bm0f-5b for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:21 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f452f-bab6-0a2a0a5309dd-0a2a4508d226-28 for ; Thu, 21 May 2026 19:48:21 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4564-63b5-0a2a45080019-d155802ccc81-3 for ; Thu, 21 May 2026 19:48:21 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-48984d29fe3so69350735e9.0 for ; Thu, 21 May 2026 10:48:21 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.24.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49033d8e24bsm74565925e9.10.2026.05.21.10.48.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 10:48:20 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779385700; x=1779990500; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bhFqA0ujOchoRkzWCwRDd18LeOSHm2z8hzgN4OjK95I=; b=l4JYUnGO2DaDJ/MfJMah0A3PVHKAFMvYRPzuIzZgiPR1OFBgrLP8WJjYbfk0FUik/V eCFObcYEs14xg07JeFuDMWs+ji2d+dMIBBVliildhnYZ2Ps12zeRRHVCKKQ/L/C5XZU3 rC2DpImN0TTBg3R33jjkXkuDN6j7GfiOlJ0wbMhfC73Zsrp+L35ALwVPWCAwEZRakzzK y6YV3c0S9aSBeP1gznVFzIzDl/4C5sodmxbjtTZsmsBVw+Bl/4YDiWDEQaSnqLBR8+0R It3zygcj4srKG8OpI4eWgIsi166NXB+xqzQODqtXD/VdcZ0W1ecupQbchHf8/8TA0TUc Befg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779385700; x=1779990500; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=bhFqA0ujOchoRkzWCwRDd18LeOSHm2z8hzgN4OjK95I=; b=IoXRQXDroUCxYSAkMW9z8HsXRdN4gaYO1so80mmF8oXobgjuT6+O3RhxAeK2kCeejA V3q91DpemV02dqZx4ENvnMAPG4S2Oc2sLzqrb7/6LW2hsPY6xPJz/rAvDM0lDg0atQZ6 +GphF1pQhDfqHants5fLca/mXc8Ot4u4c/UeGYUkektFcpf6E4xVs9nlZimA2qeT2l7h yjDFkzb6+5hfrW6UTtjoOMXvyZs2Cxzgon4/T/e1N6bJYqToJ2C9m8PWB3WDbMG8rfvL lp7/LN+Xi7h5aAI/voN9MySjYyB+yxcqBVQ5tK2ag6JvUHemMQi07bY/E7hn+41NtLkY k3gQ== X-Gm-Message-State: AOJu0YzYHbXKxo7EVYVQsG41OvO8QKKpFMlqciOWtfLGu5Z9muo+/r5v R7I9/5ihP5YimDpzTWN6oBrM7GJkBVo2xwsT8gMvmGdS78VE/W1e33WQnuejrUdH X-Gm-Gg: Acq92OHo3aVOqav3ga0u+oJDhx48UOXQXXU8qNVSSPUBUplr0yTUnXRPo/Dfe0SOFmz 6QUq+R0IEDLKNXkQM6azwFd4VYw49dc2ouQyQQGIvZGfRp/Wkhea8B/rDmSJAhCHBKxLV84a8hZ FfMeAWHw6EnDCH2mjWqbh2cJ5kPpHbVQmkiFeOFvbyED+jCFP/TyWD1/HgkA/dQDvwl9C3baPhD CaeKT28PUreaYhfQrTol/UbxkKuGMgqUw9kMI66CHrt6UkzcmGqwJkz125+OXBTvvQacrfC4pVo 8MdwGIxUxdfgccwjPFjt6HKX9Y2sRs7+JNztTGtantgvFBIZxUvLyyEsFzbqeGiJmN+OkwX/UrZ oX70jRM8C/XCSSUGKU7KontqrRMiwjvT3sNE4bLd+pl7rz0EGDgRRIMNyt0ZZZCWDVYebTWcb3P zYT67Mo31f3EzxLe2GRF5xcteidw== X-Received: by 2002:a05:600c:1c0d:b0:48f:fe2a:107b with SMTP id 5b1f17b1804b1-49036048699mr70867295e9.7.1779385700421; Thu, 21 May 2026 10:48:20 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v10 05/13] xen/arm: gic-v3: add ITS suspend/resume support Date: Thu, 21 May 2026 20:45:23 +0300 Message-ID: <95930674d4639727b9cdf4f52b4a23b6df60c3c4.1779385072.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c1860d/1779385701-B797DDB1-2A1C7773/0/0 X-purgate-type: clean X-purgate-size: 11107 From: Mykola Kvach Handle system suspend/resume for GICv3 with an ITS present so LPIs keep working after firmware powers the GIC down. Save and restore the ITS CTLR, CBASER and BASER registers. On resume, re-establish the collection mapping only when the collection is held in the ITS itself. Memory-backed collections are restored through the restored GITS_BASER tables and must not be remapped unconditionally. Add list_for_each_entry_continue_reverse() in list.h for the ITS suspend error path that needs to roll back partially saved state. Based on Linux commit dba0bc7b76dc: "irqchip/gic-v3-its: Add ability to save/restore ITS state". Signed-off-by: Mykola Kvach --- Changes in V10: - Replay MAPC on resume only for collections held in the ITS itself, as indicated by GITS_TYPER.HCC. Memory-backed collections are restored through GITS_BASER and are no longer remapped unconditionally. - Make the current Xen col_id == cpu assumption explicit in the ITS resume path. - Use "unpredictable" instead of "undefined" in the CBASER/BASER restore comment. Changes in V9: - fix the ITS suspend/resume coding-style nits; - preserve the saved GITS_CTLR state while masking the read-only QUIESCENT bit. Changes in V8: - Reword the CBASER/CWRITER comment to match Xen and drop the stale Linux cmd_write reference. - Clarify the list_for_each_entry_continue_reverse() comment. - Factor out per-ITS helpers for collection setup and resume. - Restore each ITS and re-establish its collection mapping in the same loop, so a failed ITS resume is not followed by MAPC/SYNC on that un-restored instance. - panic in case when resume of an ITS failed - cleanup baser cache during suspend --- xen/arch/arm/gic-v3-its.c | 146 ++++++++++++++++++++++++-- xen/arch/arm/gic-v3.c | 11 +- xen/arch/arm/include/asm/gic_v3_its.h | 28 +++++ xen/include/xen/list.h | 14 +++ 4 files changed, 189 insertions(+), 10 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 7560d46c6d..dd53209865 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -335,6 +335,22 @@ static int its_send_cmd_inv(struct host_its *its, return its_send_command(its, cmd); } +static int gicv3_its_setup_collection_single(struct host_its *its, + unsigned int cpu) +{ + int ret; + + ret = its_send_cmd_mapc(its, cpu, cpu); + if ( ret ) + return ret; + + ret = its_send_cmd_sync(its, cpu); + if ( ret ) + return ret; + + return gicv3_its_wait_commands(its); +} + /* Set up the (1:1) collection mapping for the given host CPU. */ int gicv3_its_setup_collection(unsigned int cpu) { @@ -343,15 +359,7 @@ int gicv3_its_setup_collection(unsigned int cpu) list_for_each_entry(its, &host_its_list, entry) { - ret = its_send_cmd_mapc(its, cpu, cpu); - if ( ret ) - return ret; - - ret = its_send_cmd_sync(its, cpu); - if ( ret ) - return ret; - - ret = gicv3_its_wait_commands(its); + ret = gicv3_its_setup_collection_single(its, cpu); if ( ret ) return ret; } @@ -1211,6 +1219,126 @@ int gicv3_its_init(void) return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void) +{ + struct host_its *its; + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + unsigned int i; + void __iomem *base = its->its_base; + + /* + * By the time Xen reaches gic_suspend(), every domain is already in + * SHUTDOWN_suspend, so ITS-targeting interrupt sources are expected + * to have been quiesced by the owning OS before SYSTEM_SUSPEND. + */ + /* Preserve saved GITS_CTLR state, excluding read-only QUIESCENT. */ + its->suspend_ctx.ctlr = readl_relaxed(base + GITS_CTLR) & + ~GITS_CTLR_QUIESCENT; + ret = gicv3_disable_its(its); + if ( ret ) + { + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + goto err; + } + + its->suspend_ctx.cbaser = readq_relaxed(base + GITS_CBASER); + + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = readq_relaxed(base + GITS_BASER0 + i * 8); + + its->suspend_ctx.baser[i] = 0; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + its->suspend_ctx.baser[i] = baser; + } + } + + return 0; + + err: + list_for_each_entry_continue_reverse( its, &host_its_list, entry ) + writel_relaxed(its->suspend_ctx.ctlr, its->its_base + GITS_CTLR); + + return ret; +} + +static int gicv3_its_resume_single(struct host_its *its, unsigned int cpu) +{ + void __iomem *base = its->its_base; + unsigned int i; + int ret; + uint64_t typer; + unsigned int col_id = cpu; /* Xen currently uses col_id == cpu. */ + + /* + * Make sure that the ITS is disabled. If it fails to quiesce, + * don't restore it since writing to CBASER or BASER + * registers is unpredictable according to the GIC v3 ITS + * Specification. + */ + WARN_ON(readl_relaxed(base + GITS_CTLR) & GITS_CTLR_ENABLE); + ret = gicv3_disable_its(its); + if ( ret ) + return ret; + + writeq_relaxed(its->suspend_ctx.cbaser, base + GITS_CBASER); + + /* + * Writing CBASER resets CREADR to 0, so reset CWRITER to + * keep the command queue pointers aligned. + */ + writeq_relaxed(0, base + GITS_CWRITER); + + /* Restore GITS_BASER from the value cache. */ + for ( i = 0; i < GITS_BASER_NR_REGS; i++ ) + { + uint64_t baser = its->suspend_ctx.baser[i]; + + if ( !(baser & GITS_VALID_BIT) ) + continue; + + writeq_relaxed(baser, base + GITS_BASER0 + i * 8); + } + + writel_relaxed(its->suspend_ctx.ctlr, base + GITS_CTLR); + + typer = readq_relaxed(base + GITS_TYPER); + + /* + * Only collections with IDs below HCC are held in the ITS itself + * and lose their state across an ITS reset/power loss. Memory-backed + * collections are restored by restoring GITS_BASER and must not be + * remapped here. + */ + if ( col_id < GITS_TYPER_HCC(typer) ) + return gicv3_its_setup_collection_single(its, cpu); + + return 0; +} + +void gicv3_its_resume(void) +{ + struct host_its *its; + unsigned int cpu = smp_processor_id(); + int ret; + + list_for_each_entry( its, &host_its_list, entry ) + { + ret = gicv3_its_resume_single(its, cpu); + if ( ret ) + panic("GICv3: ITS@%"PRIpaddr": failed to restore during resume: %d\n", + its->addr, ret); + } +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ /* * Local variables: diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 64fd772d65..6e0ca6c50d 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -2184,10 +2184,14 @@ static int gicv3_suspend(void) if ( ret ) goto out_enable_iface; - ret = gicv3_disable_redist(); + ret = gicv3_its_suspend(); if ( ret ) goto out_enable_iface; + ret = gicv3_disable_redist(); + if ( ret ) + goto out_its_resume; + /* Save GICR configuration */ gicv3_redist_wait_for_rwp(); @@ -2227,6 +2231,9 @@ static int gicv3_suspend(void) return 0; + out_its_resume: + gicv3_its_resume(); + out_enable_iface: if ( gicv3_enable_redist() ) panic("GICv3: Failed to re-enable redistributor after suspend abort\n"); @@ -2353,6 +2360,8 @@ static void gicv3_resume(void) gicv3_redist_wait_for_rwp(); + gicv3_its_resume(); + WRITE_SYSREG(gicv3_ctx.cpu.sre_el2, ICC_SRE_EL2); isb(); diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index fc5a84892c..0f8cb16e41 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -43,6 +43,11 @@ #define GITS_CTLR_QUIESCENT BIT(31, UL) #define GITS_CTLR_ENABLE BIT(0, UL) +#define GITS_TYPER_HCC_SHIFT 24 +#define GITS_TYPER_HCC_MASK 0xffUL +#define GITS_TYPER_HCC(r) (((r) >> GITS_TYPER_HCC_SHIFT) & \ + GITS_TYPER_HCC_MASK) + #define GITS_TYPER_PTA BIT(19, UL) #define GITS_TYPER_DEVIDS_SHIFT 13 #define GITS_TYPER_DEVIDS_MASK (0x1fUL << GITS_TYPER_DEVIDS_SHIFT) @@ -129,6 +134,13 @@ struct host_its { spinlock_t cmd_lock; void *cmd_buf; unsigned int flags; +#ifdef CONFIG_SYSTEM_SUSPEND + struct suspend_ctx { + uint32_t ctlr; + uint64_t cbaser; + uint64_t baser[GITS_BASER_NR_REGS]; + } suspend_ctx; +#endif }; /* Map a collection for this host CPU to each host ITS. */ @@ -204,6 +216,11 @@ uint64_t gicv3_its_get_cacheability(void); uint64_t gicv3_its_get_shareability(void); unsigned int gicv3_its_get_memflags(void); +#ifdef CONFIG_SYSTEM_SUSPEND +int gicv3_its_suspend(void); +void gicv3_its_resume(void); +#endif + #else #ifdef CONFIG_ACPI @@ -271,6 +288,17 @@ static inline int gicv3_its_make_hwdom_dt_nodes(const struct domain *d, return 0; } +#ifdef CONFIG_SYSTEM_SUSPEND +static inline int gicv3_its_suspend(void) +{ + return 0; +} + +static inline void gicv3_its_resume(void) +{ +} +#endif + #endif /* CONFIG_HAS_ITS */ #endif diff --git a/xen/include/xen/list.h b/xen/include/xen/list.h index 98d8482dab..2aab274157 100644 --- a/xen/include/xen/list.h +++ b/xen/include/xen/list.h @@ -535,6 +535,20 @@ static inline void list_splice_init(struct list_head *list, &(pos)->member != (head); \ (pos) = list_entry((pos)->member.next, typeof(*(pos)), member)) +/** + * list_for_each_entry_continue_reverse - iterate backwards from the given point + * @pos: the type * to use as a loop cursor. + * @head: the head for your list. + * @member: the name of the list_head within the struct. + * + * Iterate over list of given type backwards, starting from the element previous + * to the current one in list order. + */ +#define list_for_each_entry_continue_reverse(pos, head, member) \ + for ((pos) = list_entry((pos)->member.prev, typeof(*(pos)), member); \ + &(pos)->member != (head); \ + (pos) = list_entry((pos)->member.prev, typeof(*(pos)), member)) + /** * list_for_each_entry_from - iterate over list of given type from the * current point -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315658.1585431 (Exim 4.92) (envelope-from ) id 1wQ7VT-0002yx-5I; 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During suspend, configure GBPA to abort incoming transactions, disable the translation interface while keeping CMDQ enabled, issue CMD_SYNC to ensure all previously issued commands have completed, then disable the SMMU IRQs and SMMU. Resume uses arm_smmu_device_reset() to reprogram the SMMU and re-enable translation and interrupt generation. The IRQ setup split follows the approach from Pranjal Shrivastava's Linux arm-smmu-v3 runtime/system sleep series: IRQ handlers are requested once during probe, while reset/resume only restores SMMU hardware state and re-enables IRQ_CTRL. Only the pieces relevant to Xen's currently supported SMMUv3 path are ported here. Xen documents SMMUv3 MSI and PCI ATS as unsupported and not compiled/tested, so this patch does not restore SMMU MSI IRQ_CFGn registers nor reinitialize ATS/PRI endpoints. If those paths become usable, suspend/resume will need corresponding MSI restore and ATS/PRI quiesce/reinit steps. Link: https://lore.kernel.org/r/20260414194702.1229094-1-praan@google.com/ Based-on-patch-by: Pranjal Shrivastava Signed-off-by: Mykola Kvach --- Changes in V10: - Disable SMMU interrupt generation during suspend before disabling the SMMU interface, matching the resume/reset path which re-enables IRQ_CTRL. Changes in V9: - Use CMD_SYNC in suspend instead of polling CMDQ_CONS, so the suspend path waits for command completion rather than only command consumption. - Document that arm_smmu_setup_irqs() is probe-only and that future Xen SMMUv3 MSI support will need to restore SMMU IRQ_CFGn registers on resume. - Restore the reference to Pranjal's Linux runtime/system sleep series and clarify that MSI/ATS/PRI resume handling is outside the supported Xen path. - Prefix the subject with xen/arm for consistency with the rest of the Arm suspend/resume series. Changes in V8: - Honor ARM_SMMU_FEAT_SEV when draining the CMDQ during suspend, matching the existing runtime CMD_SYNC path. - Fold the suspend rollback reset path into a helper and rename the error reporting to describe suspend rollback rather than resume. - Treat SMMU reset failure during resume as fatal instead of logging and continuing with a potentially unusable IOMMU. - cosmetic changes --- xen/drivers/passthrough/arm/smmu-v3.c | 186 +++++++++++++++++++++----- 1 file changed, 150 insertions(+), 36 deletions(-) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index bf153227db..be8028c036 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -1814,8 +1814,7 @@ static int arm_smmu_write_reg_sync(struct arm_smmu_device *smmu, u32 val, } /* GBPA is "special" */ -static int __init arm_smmu_update_gbpa(struct arm_smmu_device *smmu, - u32 set, u32 clr) +static int arm_smmu_update_gbpa(struct arm_smmu_device *smmu, u32 set, u32 clr) { int ret; u32 reg, __iomem *gbpa = smmu->base + ARM_SMMU_GBPA; @@ -1995,10 +1994,35 @@ err_free_evtq_irq: return ret; } +static int arm_smmu_enable_irqs(struct arm_smmu_device *smmu) +{ + int ret; + u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; + + if ( smmu->features & ARM_SMMU_FEAT_PRI ) + irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; + + /* Enable interrupt generation on the SMMU */ + ret = arm_smmu_write_reg_sync(smmu, irqen_flags, + ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); + if ( ret ) + { + dev_warn(smmu->dev, "failed to enable irqs\n"); + return ret; + } + + return 0; +} + +/* + * Probe-time only: request host IRQs and, when available, program the SMMU's + * MSI doorbells. Resume does not restore the SMMU *_IRQ_CFGn MSI registers, + * so any host suspend support must treat the active MSI IRQ path as + * unsupported until that restore path exists. + */ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) { int ret, irq; - u32 irqen_flags = IRQ_CTRL_EVTQ_IRQEN | IRQ_CTRL_GERROR_IRQEN; /* Disable IRQs first */ ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, @@ -2028,22 +2052,7 @@ static int __init arm_smmu_setup_irqs(struct arm_smmu_device *smmu) } } - if (smmu->features & ARM_SMMU_FEAT_PRI) - irqen_flags |= IRQ_CTRL_PRIQ_IRQEN; - - /* Enable interrupt generation on the SMMU */ - ret = arm_smmu_write_reg_sync(smmu, irqen_flags, - ARM_SMMU_IRQ_CTRL, ARM_SMMU_IRQ_CTRLACK); - if (ret) { - dev_warn(smmu->dev, "failed to enable irqs\n"); - goto err_free_irqs; - } - return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_disable(struct arm_smmu_device *smmu) @@ -2057,7 +2066,7 @@ static int arm_smmu_device_disable(struct arm_smmu_device *smmu) return ret; } -static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) +static int arm_smmu_device_reset(struct arm_smmu_device *smmu) { int ret; u32 reg, enables; @@ -2163,17 +2172,9 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } } - ret = arm_smmu_setup_irqs(smmu); - if (ret) { - dev_err(smmu->dev, "failed to setup irqs\n"); + ret = arm_smmu_enable_irqs(smmu); + if ( ret ) return ret; - } - - /* Initialize tasklets for threaded IRQs*/ - tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); - tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); - tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, - smmu); /* Enable the SMMU interface, or ensure bypass */ if (disable_bypass) { @@ -2181,20 +2182,16 @@ static int __init arm_smmu_device_reset(struct arm_smmu_device *smmu) } else { ret = arm_smmu_update_gbpa(smmu, 0, GBPA_ABORT); if (ret) - goto err_free_irqs; + return ret; } ret = arm_smmu_write_reg_sync(smmu, enables, ARM_SMMU_CR0, ARM_SMMU_CR0ACK); if (ret) { dev_err(smmu->dev, "failed to enable SMMU interface\n"); - goto err_free_irqs; + return ret; } return 0; - -err_free_irqs: - arm_smmu_free_irqs(smmu); - return ret; } static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) @@ -2558,10 +2555,23 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) if (ret) goto out_free; + ret = arm_smmu_setup_irqs(smmu); + if ( ret ) + { + dev_err(smmu->dev, "failed to setup irqs\n"); + goto out_free; + } + + /* Initialize tasklets for threaded IRQs*/ + tasklet_init(&smmu->evtq_irq_tasklet, arm_smmu_evtq_tasklet, smmu); + tasklet_init(&smmu->priq_irq_tasklet, arm_smmu_priq_tasklet, smmu); + tasklet_init(&smmu->combined_irq_tasklet, arm_smmu_combined_irq_tasklet, + smmu); + /* Reset the device */ ret = arm_smmu_device_reset(smmu); if (ret) - goto out_free; + goto out_free_irqs; /* * Keep a list of all probed devices. This will be used to query @@ -2575,6 +2585,8 @@ static int __init arm_smmu_device_probe(struct platform_device *pdev) return 0; +out_free_irqs: + arm_smmu_free_irqs(smmu); out_free: arm_smmu_free_structures(smmu); @@ -2855,6 +2867,104 @@ static void arm_smmu_iommu_xen_domain_teardown(struct domain *d) xfree(xen_domain); } +#ifdef CONFIG_SYSTEM_SUSPEND + +static void arm_smmu_reset_for_suspend_rollback(struct arm_smmu_device *smmu) +{ + int ret = arm_smmu_device_reset(smmu); + + if ( ret ) + dev_err(smmu->dev, "Failed to reset during suspend rollback: %d\n", + ret); +} + +static int arm_smmu_suspend(void) +{ + struct arm_smmu_device *smmu; + int ret = 0; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + /* Abort all transactions before disable to avoid spurious bypass */ + ret = arm_smmu_update_gbpa(smmu, GBPA_ABORT, 0); + if ( ret ) + goto fail; + + ret = arm_smmu_write_reg_sync(smmu, 0, ARM_SMMU_IRQ_CTRL, + ARM_SMMU_IRQ_CTRLACK); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out while disabling SMMU irqs\n"); + goto fail; + } + + /* Disable the SMMU via CR0.EN and all queues except CMDQ */ + ret = arm_smmu_write_reg_sync(smmu, CR0_CMDQEN, ARM_SMMU_CR0, + ARM_SMMU_CR0ACK); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out while disabling smmu\n"); + goto fail; + } + + /* + * At this point the translation interface is disabled and the + * SMMU won't access translation/config structures, even + * speculatively, as per the IHI0070 spec (section 6.3.9.6). + * CMDQ is still enabled so that a CMD_SYNC can complete any + * previously issued commands. + */ + + /* Ensure all previously issued commands have completed. */ + ret = arm_smmu_cmdq_issue_sync(smmu); + if ( ret ) + { + dev_err(smmu->dev, "Timed-out waiting for pending commands\n"); + goto fail; + } + + /* Disable everything */ + ret = arm_smmu_device_disable(smmu); + if ( ret ) + goto fail; + + dev_dbg(smmu->dev, "Suspended smmu\n"); + } + + return 0; + + fail: + /* Reset the device that failed as well as any already-suspended ones. */ + arm_smmu_reset_for_suspend_rollback(smmu); + + list_for_each_entry_continue_reverse(smmu, &arm_smmu_devices, devices) + arm_smmu_reset_for_suspend_rollback(smmu); + + return ret; +} + +static void arm_smmu_resume(void) +{ + int ret; + struct arm_smmu_device *smmu; + + list_for_each_entry(smmu, &arm_smmu_devices, devices) + { + dev_dbg(smmu->dev, "Resuming device\n"); + + /* + * The reset will re-initialize all the base addresses, queues, + * prod and cons maintained within struct arm_smmu_device as well as + * re-enable the interrupts. + */ + ret = arm_smmu_device_reset(smmu); + if ( ret ) + panic("SMMUv3: %s: Failed to reset during resume: %d\n", + dev_name(smmu->dev), ret); + } +} +#endif + static const struct iommu_ops arm_smmu_iommu_ops = { .page_sizes = PAGE_SIZE_4K, .init = arm_smmu_iommu_xen_domain_init, @@ -2867,6 +2977,10 @@ static const struct iommu_ops arm_smmu_iommu_ops = { .unmap_page = arm_iommu_unmap_page, .dt_xlate = arm_smmu_dt_xlate, .add_device = arm_smmu_add_device, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = arm_smmu_suspend, + .resume = arm_smmu_resume, +#endif }; static __init int arm_smmu_dt_init(struct dt_device_node *dev, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315651.1585368 (Exim 4.92) (envelope-from ) id 1wQ7VM-0001MZ-7t; Thu, 21 May 2026 17:48:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315651.1585368; Thu, 21 May 2026 17:48:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VM-0001M8-44; Thu, 21 May 2026 17:48:20 +0000 Received: by outflank-mailman (input) for mailman id 1315651; Thu, 21 May 2026 17:48:18 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VK-00017d-Jq for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VK-003wjj-0Q for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:18 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f455d-e002-0a2a0a5209dd-0a2a4507b53c-2 for ; Thu, 21 May 2026 19:48:17 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4561-229c-0a2a45070019-d155802be131-3 for ; Thu, 21 May 2026 19:48:17 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso63009745e9.3 for ; Thu, 21 May 2026 10:48:17 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Therefore, Xen should save/restore the context of GIC on suspend/resume. Note that the context consists of states of registers which are controlled by the hypervisor. Other GIC registers which are accessible by guests are saved/restored on context switch. Transient physical SGI pending state (GICD_CPENDSGIRn/GICD_SPENDSGIRn) is intentionally excluded. CPU-interface active-priority state is also not restored across suspend/resume. Xen reaches the final suspend path at a quiescent point, so there is no active-priority execution context to replay after resume. Enforce this with a runtime check after disabling the CPU interface: if any implemented GICC_APRn word is still non-zero, restore GICC_CTLR and abort suspend with -EBUSY. This does not apply to distributor active state. With GICv2 EOImode==1, EOIR only drops the interrupt priority; final deactivation is a separate step. For guest-routed interrupts, Xen can have already EOIed the physical IRQ while deactivation is still pending on the vGIC/GICV path. Therefore GICD_ISACTIVER is preserved as architectural in-flight interrupt state. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V10: - Limit GICC_APR active-priority checks to APR bits visible from the Xen CPU-interface view. - Avoid touching reserved GICD_IPRIORITYR/GICD_ITARGETSR words when the last implemented interrupt block is partial. - Restore distributor configuration before restoring interrupt enable state, so GICD_ICFGR is written while the corresponding interrupts are disabled. Changes in V9: - Skip saving/restoring GICD_ITARGETSR0..7 because SGI/PPI target registers hold no state (read-only on MP, RAZ/WI on UP). - Add a runtime GICC_APRn quiescence check after disabling the CPU interface, and restore GICC_CTLR before returning -EBUSY. Changes in V8: - disable cpu interface + distributor before suspend - change 0xffffffff to GENMASK; - cosmetic changes; Changes in V7: - Allocate one contiguous memory block for the GICv2 dist suspend context. - gicv2_resume() no longer unconditionally re-enables the distributor/CPU interface; it now writes back the saved CTLR values as-is. - gicv2_alloc_context() now returns 0 on success and panics on failure, since suspend context allocation is not recoverable. --- xen/arch/arm/gic-v2.c | 226 +++++++++++++++++++++++++++++++++ xen/arch/arm/gic.c | 29 +++++ xen/arch/arm/include/asm/gic.h | 12 ++ 3 files changed, 267 insertions(+) diff --git a/xen/arch/arm/gic-v2.c b/xen/arch/arm/gic-v2.c index 43a379fdda..a0ef6ffc7f 100644 --- a/xen/arch/arm/gic-v2.c +++ b/xen/arch/arm/gic-v2.c @@ -1108,6 +1108,223 @@ static int gicv2_iomem_deny_access(struct domain *d) return iomem_deny_access(d, mfn, mfn + nr - 1); } +#ifdef CONFIG_SYSTEM_SUSPEND + +/* This struct represents block of 32 IRQs */ +struct irq_block { + uint32_t icfgr[2]; /* 2 registers of 16 IRQs each */ + uint32_t ipriorityr[8]; + uint32_t isenabler; + uint32_t isactiver; + uint32_t itargetsr[8]; +}; + +/* GICv2 registers to be saved/restored on system suspend/resume */ +struct gicv2_context { + /* GICC context */ + struct cpu_ctx { + uint32_t ctlr; + uint32_t pmr; + uint32_t bpr; + } cpu; + + /* GICD context */ + struct dist_ctx { + uint32_t ctlr; + /* Includes banked SGI/PPI state for the boot CPU. */ + struct irq_block *irqs; + } dist; +}; + +static struct gicv2_context gic_ctx; + +#define GICV2_NR_APRS 4 +#define GICV2_APR_BITS_PER_REG 32U + +static int gicv2_check_active_priorities(uint32_t bpr) +{ + unsigned int i, apr_bits, nr_aprs; + + /* + * Xen writes GICC_BPR to 0 during CPU init and does not change it. Per + * IHI0048B.b, a write below the implementation minimum reads back as the + * minimum supported BPR value. Table 4-47 maps that Xen-visible BPR value + * to the visible GICC_APR bits. Avoid reading APR registers outside + * that visible range. + * + * This covers both GICv2 with and without Security Extensions. + */ + apr_bits = 1U << (7 - (bpr & 0x7)); + nr_aprs = DIV_ROUND_UP(apr_bits, GICV2_APR_BITS_PER_REG); + + ASSERT(nr_aprs <= GICV2_NR_APRS); + + for ( i = 0; i < nr_aprs; i++ ) + { + unsigned int bits = min(GICV2_APR_BITS_PER_REG, + apr_bits - i * GICV2_APR_BITS_PER_REG); + uint32_t mask = GENMASK(bits - 1, 0); + uint32_t apr = readl_gicc(GICC_APR + i * 4) & mask; + + if ( !apr ) + continue; + + printk(XENLOG_ERR "GICv2: suspend aborted: GICC_APR%u=%#08x\n", + i, apr); + return -EBUSY; + } + + return 0; +} + +static int gicv2_suspend(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + int ret; + + /* Save GICC_CTLR configuration. */ + gic_ctx.cpu.ctlr = readl_gicc(GICC_CTLR); + + /* Quiesce the GIC CPU interface before suspend. */ + gicv2_cpu_disable(); + + gic_ctx.cpu.bpr = readl_gicc(GICC_BPR); + + /* + * Check the active-priority state for the group Xen drives through the + * CPU interface. GICC_CTL_ENABLE enables Group 0 without SecurityExtn and + * Group 1 in Xen's Non-secure view with SecurityExtn, and in both cases + * the relevant state is visible through GICC_APRn. The APR layout is + * implementation-defined, so only test the bits visible from Xen's CPU + * interface view instead of reading every possible APR register. + */ + ret = gicv2_check_active_priorities(gic_ctx.cpu.bpr); + if ( ret ) + { + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); + return ret; + } + + gic_ctx.cpu.pmr = readl_gicc(GICC_PMR); + + /* Save GICD configuration */ + gic_ctx.dist.ctlr = readl_gicd(GICD_CTLR); + writel_gicd(0, GICD_CTLR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + size_t nr_regs = ARRAY_SIZE(irqs->ipriorityr); + + if ( i == blocks - 1 ) + nr_regs = DIV_ROUND_UP(gicv2_info.nr_lines - i * 32, 4); + + irqs->isenabler = readl_gicd(GICD_ISENABLER + off); + + /* + * Save distributor active state as part of the hypervisor-owned + * physical interrupt state. In GICv2 EOImode==1, EOIR only drops the + * priority; final deactivation is separate. For guest-routed + * interrupts, Xen may have EOIed the physical IRQ while the guest/vGIC + * side still owns the deactivate step. Therefore GICD_ISACTIVER can + * legitimately remain set even though transient SGI pending state and + * CPU-interface active-priority state are expected to be quiesced here. + */ + irqs->isactiver = readl_gicd(GICD_ISACTIVER + off); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < nr_regs; j++ ) + irqs->ipriorityr[j] = readl_gicd(GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < nr_regs; j++ ) + irqs->itargetsr[j] = readl_gicd(GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + irqs->icfgr[j] = readl_gicd(GICD_ICFGR + off + j * 4); + } + + return 0; +} + +static void gicv2_resume(void) +{ + unsigned int i, blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gicv2_cpu_disable(); + /* Disable distributor */ + writel_gicd(0, GICD_CTLR); + + for ( i = 0; i < blocks; i++ ) + { + struct irq_block *irqs = gic_ctx.dist.irqs + i; + size_t j, off = i * sizeof(irqs->isenabler); + size_t nr_regs = ARRAY_SIZE(irqs->ipriorityr); + + if ( i == blocks - 1 ) + nr_regs = DIV_ROUND_UP(gicv2_info.nr_lines - i * 32, 4); + + writel_gicd(GENMASK(31, 0), GICD_ICENABLER + off); + + off = i * sizeof(irqs->icfgr); + for ( j = 0; j < ARRAY_SIZE(irqs->icfgr); j++ ) + writel_gicd(irqs->icfgr[j], GICD_ICFGR + off + j * 4); + + off = i * sizeof(irqs->ipriorityr); + for ( j = 0; j < nr_regs; j++ ) + writel_gicd(irqs->ipriorityr[j], GICD_IPRIORITYR + off + j * 4); + + /* + * GICD_ITARGETSR0..7 cover SGIs/PPIs and hold no state to save: + * they are read-only on multiprocessor implementations and RAZ/WI + * on uniprocessor implementations. + */ + if ( i ) + { + off = i * sizeof(irqs->itargetsr); + for ( j = 0; j < nr_regs; j++ ) + writel_gicd(irqs->itargetsr[j], GICD_ITARGETSR + off + j * 4); + } + + off = i * sizeof(irqs->isenabler); + writel_gicd(irqs->isenabler, GICD_ISENABLER + off); + + writel_gicd(GENMASK(31, 0), GICD_ICACTIVER + off); + writel_gicd(irqs->isactiver, GICD_ISACTIVER + off); + } + + /* Restore distributor control state. */ + writel_gicd(gic_ctx.dist.ctlr, GICD_CTLR); + + /* Restore GIC CPU interface configuration */ + writel_gicc(gic_ctx.cpu.pmr, GICC_PMR); + writel_gicc(gic_ctx.cpu.bpr, GICC_BPR); + + /* Enable GIC CPU interface */ + writel_gicc(gic_ctx.cpu.ctlr, GICC_CTLR); +} + +static void __init gicv2_alloc_context(void) +{ + uint32_t blocks = DIV_ROUND_UP(gicv2_info.nr_lines, 32); + + gic_ctx.dist.irqs = xzalloc_array(struct irq_block, blocks); + if ( !gic_ctx.dist.irqs ) + panic("Failed to allocate memory for GICv2 suspend context\n"); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + #ifdef CONFIG_ACPI static unsigned long gicv2_get_hwdom_extra_madt_size(const struct domain *d) { @@ -1312,6 +1529,11 @@ static int __init gicv2_init(void) spin_unlock(&gicv2.lock); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Allocate memory to be used for saving GIC context during the suspend */ + gicv2_alloc_context(); +#endif /* CONFIG_SYSTEM_SUSPEND */ + return 0; } @@ -1355,6 +1577,10 @@ static const struct gic_hw_operations gicv2_ops = { .map_hwdom_extra_mappings = gicv2_map_hwdom_extra_mappings, .iomem_deny_access = gicv2_iomem_deny_access, .do_LPI = gicv2_do_LPI, +#ifdef CONFIG_SYSTEM_SUSPEND + .suspend = gicv2_suspend, + .resume = gicv2_resume, +#endif /* CONFIG_SYSTEM_SUSPEND */ }; /* Set up the GIC */ diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index ee75258fc3..7727ffed5a 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -432,6 +432,35 @@ int gic_iomem_deny_access(struct domain *d) return gic_hw_ops->iomem_deny_access(d); } +#ifdef CONFIG_SYSTEM_SUSPEND + +int gic_suspend(void) +{ + /* Must be called by boot CPU#0 with interrupts disabled */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + + if ( !gic_hw_ops->suspend || !gic_hw_ops->resume ) + return -ENOSYS; + + return gic_hw_ops->suspend(); +} + +void gic_resume(void) +{ + /* + * Must be called by boot CPU#0 with interrupts disabled after gic_suspend + * has returned successfully. + */ + ASSERT(!local_irq_is_enabled()); + ASSERT(!smp_processor_id()); + ASSERT(gic_hw_ops->resume); + + gic_hw_ops->resume(); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_gic_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index ff22dea40d..fbf0d69edd 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,12 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +/* Suspend/resume */ +extern int gic_suspend(void); +extern void gic_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + /* SGI (AKA IPIs) */ enum gic_sgi { GIC_SGI_EVENT_CHECK, @@ -444,6 +450,12 @@ struct gic_hw_operations { int (*iomem_deny_access)(struct domain *d); /* Handle LPIs, which require special handling */ void (*do_LPI)(unsigned int lpi); +#ifdef CONFIG_SYSTEM_SUSPEND + /* Save GIC configuration due to the system suspend */ + int (*suspend)(void); + /* Restore GIC configuration due to the system resume */ + void (*resume)(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ }; extern const struct gic_hw_operations *gic_hw_ops; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315652.1585381 (Exim 4.92) (envelope-from ) id 1wQ7VN-0001kn-Iu; Thu, 21 May 2026 17:48:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315652.1585381; Thu, 21 May 2026 17:48:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VN-0001kc-Fn; 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DEN0022F.b says CPU_OFF powers down the calling core (5.5) and CPU_ON brings the core back with a defined initial CPU state (5.6, 6.4). However, PSCI leaves interrupt migration and GIC re-initialization to the supervisory software/firmware stack: the caller must migrate interrupts away before CPU_OFF (5.5.2), and the execution context that is lost in a powerdown state must be saved and restored by software (6.8). PSCI also calls out GIC management explicitly in 6.8, including retargeting SPIs, preventing PPIs/SGIs from targeting a powered down CPU, and reinitializing the CPU interface after CPU_ON. This matches the GIC architecture. IHI0069H.b Chapter 11.1 requires the PE and CPU interface to share a power domain, but explicitly allows the associated redistributor, distributor, and ITS to remain powered while the PE and CPU interface are off. All other GIC power-management behavior is IMPLEMENTATION DEFINED. DEN0050D Chapter 4.2, "Generic Interrupt Controller (GIC)", says the GICv3 redistributor may live either in the AP core power domain or in a relatively always-on parent domain. So after CPU_OFF -> CPU_ON a secondary CPU can legitimately come back to a live redistributor with GICR_CTLR.EnableLPIs still set. Handle that case in the LPI setup path instead of assuming a fully reset redistributor. The LPI path needs special care because the GIC spec makes redistributor LPI state sticky and partially implementation defined. IHI0069H.b 5.1.1 and 5.1.2 say that changing GICR_PROPBASER or GICR_PENDBASER while GICR_CTLR.EnableLPIs == 1 is UNPREDICTABLE. After clearing EnableLPIs, software must wait for GICR_CTLR.RWP == 0 before touching the pending table. The architecture also permits implementations where, once EnableLPIs has been set, clearing it again is not guaranteed to work. Where an ITS is present, the spec strongly recommends moving LPIs to another redistributor before clearing EnableLPIs. Because of that, treat a retained EnableLPIs state as valid when the redistributor still points at Xen's expected PROPBASER/PENDBASER tables. Only try to clear EnableLPIs when the retained configuration does not match Xen's state, and wait for RWP before reprogramming the tables. This is also consistent with platform firmware reality: PSCI and the GIC architecture allow platform-specific redistributor power handling, and not all platform firmware implementations force a full redistributor power-off through implementation-defined controls during CPU_OFF. Xen therefore needs to tolerate retained redistributor state on secondary CPU bring-up. Keep gicv3_populate_rdist() resident as well, because gicv3_cpu_init() reuses it on secondary CPU bring-up after init. Tested using Xen's non-boot CPU disable/enable path on Arm FVP_Base_RevC-2xAEMvA, both with and without: -C gic_distributor.allow-LPIEN-clear=1 -C gic_distributor.GICR-clear-enable-supported=1 and on Orange Pi 5. Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu --- Changes in v10: - Drop unrelated gicv3_populate_rdist() printk() format cleanups to keep the patch focused on retained redistributor LPI state. Changes in v9: - move gicv3_do_wait_for_rwp prototype from its related header to gic.h - drop __init from gicv3_populate_rdist(), which is reused on secondary CPU bring-up after boot - changed print format for smp_processor_id in gicv3_populate_rdist func - cosmetic changes --- xen/arch/arm/gic-v3-lpi.c | 77 +++++++++++++++++++++++++++++++++- xen/arch/arm/gic-v3.c | 15 ++++--- xen/arch/arm/include/asm/gic.h | 4 ++ 3 files changed, 90 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 9ee338edc2..847da26ff7 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -81,6 +81,13 @@ static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redist); #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) +#define GICR_PROPBASER_XEN_MASK GENMASK_ULL(51, 12) +/* + * For retained redistributor state, match the pending table by address only. + * Attribute bits such as PTZ may not read back with the programmed value. + */ +#define GICR_PENDBASER_XEN_MASK GENMASK_ULL(51, 16) + static union host_lpi *gic_get_host_lpi(uint32_t plpi) { union host_lpi *block; @@ -296,6 +303,60 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist_base) return 0; } +static uint64_t gicv3_lpi_expected_proptable(void) +{ + return virt_to_maddr(lpi_data.lpi_property); +} + +static uint64_t gicv3_lpi_expected_pendtable(void) +{ + return virt_to_maddr(this_cpu(lpi_redist).pending_table); +} + +static bool gicv3_lpi_tables_match(void __iomem *rdist_base) +{ + uint64_t propbase, pendbase; + + if ( !lpi_data.lpi_property || !this_cpu(lpi_redist).pending_table ) + return false; + + propbase = readq_relaxed(rdist_base + GICR_PROPBASER); + pendbase = readq_relaxed(rdist_base + GICR_PENDBASER); + + return ((propbase & GICR_PROPBASER_XEN_MASK) == + (gicv3_lpi_expected_proptable() & GICR_PROPBASER_XEN_MASK)) && + ((pendbase & GICR_PENDBASER_XEN_MASK) == + (gicv3_lpi_expected_pendtable() & GICR_PENDBASER_XEN_MASK)); +} + +static int gicv3_lpi_disable_lpis(void __iomem *rdist_base) +{ + uint32_t reg = readl_relaxed(rdist_base + GICR_CTLR); + int ret; + + if ( !(reg & GICR_CTLR_ENABLE_LPIS) ) + return 0; + + writel_relaxed(reg & ~GICR_CTLR_ENABLE_LPIS, rdist_base + GICR_CTLR); + + /* + * The spec only guarantees programmability when we have observed the bit + * cleared. Where clearing is supported, RWP must reach 0 before touching + * PROPBASER/PENDBASER again. + */ + wmb(); + + ret = gicv3_do_wait_for_rwp(rdist_base, GICR_CTLR_RWP); + if ( ret ) + return ret; + + reg = readl_relaxed(rdist_base + GICR_CTLR); + if ( reg & GICR_CTLR_ENABLE_LPIS ) + return -EBUSY; + + return 0; +} + /* * Tell a redistributor about the (shared) property table, allocating one * if not already done. @@ -374,7 +435,21 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base) /* Make sure LPIs are disabled before setting up the tables. */ reg = readl_relaxed(rdist_base + GICR_CTLR); if ( reg & GICR_CTLR_ENABLE_LPIS ) - return -EBUSY; + { + if ( gicv3_lpi_tables_match(rdist_base) ) + return -EBUSY; + + ret = gicv3_lpi_disable_lpis(rdist_base); + if ( ret == -EBUSY ) + { + printk(XENLOG_ERR + "GICv3: CPU%u: LPIs still enabled with unexpected redistributor tables\n", + smp_processor_id()); + return -EINVAL; + } + if ( ret ) + return ret; + } ret = gicv3_lpi_set_pendtable(rdist_base); if ( ret ) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index dfd5d44603..a2553e647e 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -275,7 +275,7 @@ static void gicv3_enable_sre(void) } /* Wait for completion of a distributor/redistributor change */ -static void gicv3_do_wait_for_rwp(void __iomem *base, uint32_t rwp_bit) +int gicv3_do_wait_for_rwp(void __iomem *base, uint32_t rwp_bit) { uint32_t val; bool timeout = false; @@ -299,17 +299,22 @@ static void gicv3_do_wait_for_rwp(void __iomem *base, uint32_t rwp_bit) } while ( 1 ); if ( timeout ) + { dprintk(XENLOG_ERR, "RWP timeout\n"); + return -ETIMEDOUT; + } + + return 0; } static void gicv3_dist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD, GICD_CTLR_RWP); + (void)gicv3_do_wait_for_rwp(GICD, GICD_CTLR_RWP); } static void gicv3_redist_wait_for_rwp(void) { - gicv3_do_wait_for_rwp(GICD_RDIST_BASE, GICR_CTLR_RWP); + (void)gicv3_do_wait_for_rwp(GICD_RDIST_BASE, GICR_CTLR_RWP); } static void gicv3_wait_for_rwp(int irq) @@ -861,7 +866,7 @@ static bool gicv3_enable_lpis(void) return true; } -static int __init gicv3_populate_rdist(void) +static int gicv3_populate_rdist(void) { int i; uint32_t aff; @@ -929,7 +934,7 @@ static int __init gicv3_populate_rdist(void) gicv3_set_redist_address(rdist_addr, procnum); ret = gicv3_lpi_init_rdist(ptr); - if ( ret && ret != -ENODEV ) + if ( ret && ret != -ENODEV && ret != -EBUSY ) { printk("GICv3: CPU%d: Cannot initialize LPIs: %u\n", smp_processor_id(), ret); diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index fbf0d69edd..84e146b832 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -301,6 +301,10 @@ extern int gicv_setup(struct domain *d); extern void gic_save_state(struct vcpu *v); extern void gic_restore_state(struct vcpu *v); +#ifdef CONFIG_GICV3 +int gicv3_do_wait_for_rwp(void __iomem *base, uint32_t rwp_bit); +#endif + #ifdef CONFIG_SYSTEM_SUSPEND /* Suspend/resume */ extern int gic_suspend(void); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315649.1585355 (Exim 4.92) (envelope-from ) id 1wQ7VK-00017m-Pb; Thu, 21 May 2026 17:48:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315649.1585355; Thu, 21 May 2026 17:48:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VK-00017f-M0; Thu, 21 May 2026 17:48:18 +0000 Received: by outflank-mailman (input) for mailman id 1315649; Thu, 21 May 2026 17:48:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VJ-00017S-73 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VI-00BluR-Ii for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:16 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f4548-bab6-0a2a0a5309dd-0a2a4505c21c-12 for ; Thu, 21 May 2026 19:48:16 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4560-aaa8-0a2a45050019-d1558031e459-3 for ; Thu, 21 May 2026 19:48:16 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-490388fd0dbso9362045e9.0 for ; Thu, 21 May 2026 10:48:16 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.24.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49033d8e24bsm74565925e9.10.2026.05.21.10.48.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 10:48:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779385696; x=1779990496; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=x4159oRt/HJtjR5zuxsLlhFZFH8epi6PhD6RsyzvFnc=; b=WbDRSTHRYqK0RVfTIzObla3Tb9Hz9PCFOZ5kLtXmA3BNgZNP8xLcEhUosn4Swn+9PH qXwg430HH4JHIC3FuWL6oqw4ewH5wbtC+Yaj+X61/KSJxnSGIVyTTD/xbsMb48R+CM6l dNR+hiGrnr7WA5UWlfRHATqMtWy0xGc4E3DY2UGnADDEaEsu6nkoIoulvsBKvMk2Ijam +YuSDU39TY72R9u58giECrDi0FRq/B5OLKPNo6fgwVU0TUm7PVC7lzdyc+IMVLvvcrd0 83yiq8y5xj6nPTB18SBnaP084hXwkCuf/s9SouFokQ5ZC6wRrpf67OR4BaDvlFUlXl2W fv7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779385696; x=1779990496; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=x4159oRt/HJtjR5zuxsLlhFZFH8epi6PhD6RsyzvFnc=; b=sr8Hafkqa4w0CXc7UpdVLbhMe9SKA5fsTc1sAqPCQks0DmQtwb4LpbwEmvo/SgH4E/ AwVhm3CJNx+fPXYbTHTxFmaSWOI6cKXuDBS0Gs0QXd66WNH2iFEuJYeId0aqHXrjMs9Z GwgBNI5GXG8PP+mCr/p75AIvtoOKszY09nTMJ7zwz2JkZRPTtmjcBvBqjWQTrKJbYocN dxoX1viSQQTIguKicVwIhYW4huSpS9cFaPnBQZ4bQpEDJSTVjI4yXuegExvScEvNIwD9 WGPBAgFHHzk5Jhc+5tnTTyKqWBuGEcFDf9SFBTs3JbcpAWR9brHwvG4eK2AE54XWlNDl xQoQ== X-Gm-Message-State: AOJu0Yz1/GBl2Oy3lpMs/BiG59IYLO2XI27z5o0XtQyaDca5rHX4hja9 1EnxI3MtCJ6NehPOv1x1p7oAz9rLtFf15lvAYMtlLAeJB0LngoZ5JIckOhiqfWY9 X-Gm-Gg: Acq92OEfydtEaFk6VpyV/x0wKWAZYRuUDOUDDxQJlp2ARRfhFxpY9YahE/J/+N1+iJi ccea5LD44+xHIHMeerXU5rIvJ0K1PStfCGorbQj4NKX1jilYDqOsIiQ9dxM6MhNnFqYJoZ0IbTC Fc1CeKhiSrE+wJ5+C8AsKIPp1bJXngoJk4ok364NohzwQhkXegk7D7hLoy7UzP85960RHuFlvo4 WQ/UVGUADGBrCC07PBd5oh2y5Ygwgs0JW3u9vabYsVQbNkgw0UlF/oPQElAu1xmK9+vMTWlNH4t HJ/S9gLvf5wVR30Gx4pqeYq2DvK/ua6ojvCYUNINciF8uoPBA9itJoSDz+45e/1rGsHY/uIBoI1 3gk1YpGgykmowsF2jA61jOzfqgICbA4y7AUVpod2sDdnTR9GxtP9qejtI+lIu2vpeo60HKKUPU9 Cu9DPu8/Z0Z/RXtrS3whofxETXYA== X-Received: by 2002:a05:600c:32af:b0:48a:65ad:1881 with SMTP id 5b1f17b1804b1-49036056678mr38944315e9.13.1779385695369; Thu, 21 May 2026 10:48:15 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Jens Wiklander , Rahul Singh Subject: [PATCH v10 00/13] Add initial Xen Suspend-to-RAM support on ARM64 Date: Thu, 21 May 2026 20:45:18 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779385696-E3B8E443-52E1A399/0/0 X-purgate-type: clean X-purgate-size: 8294 From: Mykola Kvach This is part 2 of the ARM Xen system suspend/resume patch series, based on earlier work by Mirela Simonovic and Mykyta Poturai. Part 1, covering guest suspend functionality, is already in mainline. NOTE: Host-wide suspend/resume support is guarded by CONFIG_SYSTEM_SUSPEND, which can currently only be selected when UNSUPPORTED is set, and thus the host suspend backend is neither enabled by default nor built in supported configurations. The separate HAS_HWDOM_SYSTEM_SUSPEND policy bit only changes how ARM treats SHUTDOWN_suspend from the hardware domain; it does not enable the host-wide suspend backend by itself. This version is ported to Xen master and includes extensive improvements based on reviewer feedback. The patch series restructures code to improve robustness and maintainability, and implements initial ARM64 host-wide Suspend-to-RAM support driven by control-domain PSCI SYSTEM_SUSPEND requests. vPSCI also exposes SYSTEM_SUSPEND as a domain suspend operation for all domains; attempt-time host-suspend policy failures are reported as PSCI_DENIED rather than hidden through PSCI_FEATURES. Key updates in this series: - Introduced architecture-specific suspend/resume infrastructure - Integrated GICv2/GICv3 suspend and resume, including memory-backed context save/restore with error handling - Added time and IRQ suspend/resume hooks, ensuring correct timer/interrupt state across suspend cycles - Implemented proper PSCI SYSTEM_SUSPEND invocation and version checks - Added vPSCI SYSTEM_SUSPEND policy for domain suspend and host-wide control-domain sequencing - Improved state management and recovery in error cases during suspend/resume - Added support for IPMMU-VMSA/SMMUv3 context save/restore - Added support for GICv3 eSPI registers context save/restore - Added support for ITS registers context save/restore --- TODOs: - Enable "xl suspend" support on ARM - Add suspend/resume CI test for ARM (QEMU if feasible) - PCI suspend ? --- Detailed changelogs can be found in each patch. Changes in v10: - Clarify the vPSCI SYSTEM_SUSPEND policy summary: keep SYSTEM_SUSPEND advertised once implemented and return PSCI_DENIED, rather than PSCI_NOT_SUPPORTED, for attempt-time host-suspend policy failures. - Tighten GICv2/GICv3 suspend/resume based on review feedback: avoid reserved interrupt register ranges, check visible active-priority state, restore configuration before enable state, and re-enable the redistributor before restoring CPU/virtual interface state on abort paths. - Refine ITS resume so MAPC is replayed only for ITS-backed collections and clarify the collection-ID assumptions. - Rework IPMMU and SMMUv3 resume/suspend handling, including root-before-cache IPMMU restore ordering and disabling SMMU interrupt generation before suspend. - Save and restore CNTHCTL_EL2 in the arm64 CPU resume context and simplify the resume trampoline/context hand-off. - Re-apply boot CPU errata/workaround handling after SYSTEM_SUSPEND and move set_init_ttbr() declaration to asm/mmu/mm.h. - Update patch 12 details: shorten SYSTEM_SUSPEND blocker logs, use %pd for control-domain logging, mark serial_suspend_available as __ro_after_init, and mention the xen/suspend.h struct domain forward declaration. Changes in v9: - Split the control-domain SYSTEM_SUSPEND flow so host availability, runtime blockers and domain-readiness checks are handled separately from the host suspend backend. - Gate vPSCI SYSTEM_SUSPEND on cached host PSCI support and Xen runtime suspend blockers, and log firmware support during initialization. - Fold the arm64 resume trampoline into the CPU context save/restore patch and use asm-offsets-generated RESUME_CTX_* definitions for the assembly save/restore path. - Tighten the GICv2/GICv3/ITS/IPMMU/SMMUv3 suspend/resume paths based on review feedback, including state-save/restore fixes and safer failure handling. - Reorder the host suspend/resume phases so timer and GIC state are handled with local IRQs disabled and restored before console/IOMMU resume. Changes in v8: - Rebased to latest master and refreshed the series accordingly. - Added a new GICv3 patch to tolerate retained redistributor LPI state across CPU_OFF/CPU_ON. - GICv2 suspend now disables the CPU interface and distributor before saving state. - GICv3 suspend/resume fixes the redistributor base used for LPI state. - ITS and SMMUv3 suspend/resume paths were tightened, with safer restore/rollback handling and stricter fatal-error handling. - System suspend now checks that all domains are already in SHUTDOWN_suspend before proceeding, and renames the hardware-domain suspend capability/helper for clearer semantics. - Fixed alignment/cleanup issues in the low-level suspend/resume code. Changes in v7: - Timer helper renamed/clarified; virtual/hyper/phys handling documented. - GICv2 uses one context block; restore saved CTLR; panic on alloc failure. - GICv3/eSPI/ITS always suspend/resume; restore LPI/eSPI; rdist timeout. - IPMMU suspend context allocated before PCI setup. - System suspend: control domain drives host suspend. - Dropped v6 IRQ descriptor restore patches; use setup_irq and re-register local IRQs on resume instead. For earlier changelogs, please refer to the previous cover letters. Mirela Simonovic (5): xen/arm: Add suspend and resume timer helpers xen/arm: gic-v2: Implement GIC suspend/resume functions xen/arm64: Save/restore CPU context across SYSTEM_SUSPEND xen/arm: Implement PSCI SYSTEM_SUSPEND call (host interface) xen/arm: Add host system suspend backend Mykola Kvach (7): xen/arm: gic-v3: tolerate retained redistributor LPI state across CPU_OFF xen/arm: gic-v3: Implement GICv3 suspend/resume functions xen/arm: gic-v3: add ITS suspend/resume support xen/arm: tee: keep init_tee_secondary() for hotplug and resume xen/arm: ffa: fix notification SRI across CPU hotplug/suspend xen/arm: smmu-v3: add suspend/resume handlers xen/arm: Add vPSCI SYSTEM_SUSPEND policy Oleksandr Tyshchenko (1): iommu/ipmmu-vmsa: Implement suspend/resume callbacks xen/arch/arm/Kconfig | 2 + xen/arch/arm/Makefile | 1 + xen/arch/arm/arm64/asm-offsets.c | 21 + xen/arch/arm/arm64/head.S | 122 ++++++ xen/arch/arm/cpuerrata.c | 7 +- xen/arch/arm/gic-v2.c | 226 +++++++++++ xen/arch/arm/gic-v3-its.c | 146 ++++++- xen/arch/arm/gic-v3-lpi.c | 80 +++- xen/arch/arm/gic-v3.c | 482 ++++++++++++++++++++++- xen/arch/arm/gic.c | 35 ++ xen/arch/arm/include/asm/arm64/sysregs.h | 5 + xen/arch/arm/include/asm/cpuerrata.h | 1 + xen/arch/arm/include/asm/gic.h | 16 + xen/arch/arm/include/asm/gic_v3_defs.h | 3 + xen/arch/arm/include/asm/gic_v3_its.h | 28 ++ xen/arch/arm/include/asm/mmu/mm.h | 2 + xen/arch/arm/include/asm/psci.h | 4 + xen/arch/arm/include/asm/suspend.h | 37 ++ xen/arch/arm/include/asm/time.h | 5 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/psci.c | 38 +- xen/arch/arm/suspend.c | 210 ++++++++++ xen/arch/arm/tee/ffa_notif.c | 63 ++- xen/arch/arm/tee/tee.c | 2 +- xen/arch/arm/time.c | 44 ++- xen/arch/arm/vpsci.c | 120 +++++- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 + xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/ipmmu-vmsa.c | 323 ++++++++++++++- xen/drivers/passthrough/arm/smmu-v3.c | 190 +++++++-- xen/include/xen/list.h | 14 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 35 files changed, 2154 insertions(+), 104 deletions(-) create mode 100644 xen/arch/arm/suspend.c -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315650.1585364 (Exim 4.92) (envelope-from ) id 1wQ7VM-0001Kd-0G; Thu, 21 May 2026 17:48:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315650.1585364; Thu, 21 May 2026 17:48:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VL-0001KW-TT; Thu, 21 May 2026 17:48:19 +0000 Received: by outflank-mailman (input) for mailman id 1315650; Thu, 21 May 2026 17:48:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VK-00017Y-58 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VJ-00BluR-H0 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:17 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f452f-bab6-0a2a0a5309dd-0a2a4508d226-20 for ; Thu, 21 May 2026 19:48:17 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f4561-63b5-0a2a45080019-d155802ea49f-3 for ; Thu, 21 May 2026 19:48:17 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-48fde648a71so46135795e9.0 for ; Thu, 21 May 2026 10:48:17 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Suspending timers in Xen consists of disabling the physical timer and the hypervisor timer on the current CPU. The virtual timer does not need explicit handling here, as it is already disabled on vCPU context switch and its state is restored per-vCPU on the next context restore. Resuming consists of raising TIMER_SOFTIRQ, which prompts the generic timer code to reprogram the hypervisor timer with the correct timeout. Xen does not use or expose the physical timer, so it remains disabled across suspend/resume. Introduce a new helper, disable_phys_hyp_timers(), to encapsulate disabling of the physical and hypervisor timers. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykola Kvach Acked-by: Julien Grall Reviewed-by: Luca Fancellu --- Changes in V7: - Dropped EL1/EL2 wording; use "physical timer" and "hypervisor timer" - Renamed helper to disable_phys_hyp_timers() to reflect its actual scope - Clarified virtual timer handling (disabled on vCPU switch-out, restored on context restore) and added comments in suspend/resume paths - Added resume comment explaining which timers are restored by TIMER_SOFTIRQ --- xen/arch/arm/include/asm/time.h | 5 ++++ xen/arch/arm/time.c | 44 ++++++++++++++++++++++++++++----- 2 files changed, 43 insertions(+), 6 deletions(-) diff --git a/xen/arch/arm/include/asm/time.h b/xen/arch/arm/include/asm/time.h index c194dbb9f5..9313b157ea 100644 --- a/xen/arch/arm/include/asm/time.h +++ b/xen/arch/arm/include/asm/time.h @@ -105,6 +105,11 @@ void preinit_xen_time(void); void force_update_vcpu_system_time(struct vcpu *v); +#ifdef CONFIG_SYSTEM_SUSPEND +void time_suspend(void); +void time_resume(void); +#endif /* CONFIG_SYSTEM_SUSPEND */ + #endif /* __ARM_TIME_H__ */ /* * Local variables: diff --git a/xen/arch/arm/time.c b/xen/arch/arm/time.c index 6955b2788f..fff8e4aca6 100644 --- a/xen/arch/arm/time.c +++ b/xen/arch/arm/time.c @@ -296,6 +296,14 @@ static void check_timer_irq_cfg(unsigned int irq, const char *which) static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_hyp); static DEFINE_PER_CPU_READ_MOSTLY(struct irqaction, irq_virt); +/* Disable physical and hypervisor timers on the current CPU */ +static inline void disable_phys_hyp_timers(void) +{ + WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ + WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ + isb(); +} + /* Set up the timer interrupt on this CPU */ void init_timer_interrupt(void) { @@ -306,9 +314,7 @@ void init_timer_interrupt(void) WRITE_SYSREG64(0, CNTVOFF_EL2); /* No VM-specific offset */ /* Do not let the VMs program the physical timer, only read the physical counter */ WRITE_SYSREG(CNTHCTL_EL2_EL1PCTEN, CNTHCTL_EL2); - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Physical timer disabled */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Hypervisor's timer disabled */ - isb(); + disable_phys_hyp_timers(); hyp_action->name = "hyptimer"; hyp_action->handler = htimer_interrupt; @@ -333,9 +339,7 @@ void init_timer_interrupt(void) */ static void deinit_timer_interrupt(void) { - WRITE_SYSREG(0, CNTP_CTL_EL0); /* Disable physical timer */ - WRITE_SYSREG(0, CNTHP_CTL_EL2); /* Disable hypervisor's timer */ - isb(); + disable_phys_hyp_timers(); release_irq(timer_irq[TIMER_HYP_PPI], NULL); release_irq(timer_irq[TIMER_VIRT_PPI], NULL); @@ -375,6 +379,34 @@ void domain_set_time_offset(struct domain *d, int64_t time_offset_seconds) /* XXX update guest visible wallclock time */ } +#ifdef CONFIG_SYSTEM_SUSPEND + +void time_suspend(void) +{ + /* CNTV already disabled by virt_timer_save() during vcpu context switch. */ + disable_phys_hyp_timers(); +} + +void time_resume(void) +{ + /* + * Raising TIMER_SOFTIRQ triggers generic timer code to reprogram the + * hypervisor timer with the correct timeout (not known here). + * + * Xen doesn't use or expose the physical timer, so it remains disabled + * across suspend/resume. + * + * The virtual timer state is restored per-vCPU on the next context switch. + * + * No further action is needed to restore timekeeping after power down, + * since the system counter is unaffected. See ARM DDI 0487 L.a, D12.1.2 + * "The system counter must be implemented in an always-on power domain." + */ + raise_softirq(TIMER_SOFTIRQ); +} + +#endif /* CONFIG_SYSTEM_SUSPEND */ + static int cpu_time_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315660.1585449 (Exim 4.92) (envelope-from ) id 1wQ7VV-0003Z8-K4; Thu, 21 May 2026 17:48:29 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315660.1585449; Thu, 21 May 2026 17:48:29 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VV-0003Xe-68; Thu, 21 May 2026 17:48:29 +0000 Received: by outflank-mailman (input) for mailman id 1315660; Thu, 21 May 2026 17:48:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VS-0002wG-R4 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 17:48:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ7VS-00Bm0f-6P for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:48:26 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f4548-bab6-0a2a0a5309dd-0a2a4505c21c-22 for ; Thu, 21 May 2026 19:48:26 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f456a-aaa8-0a2a45050019-d1558035e4d5-3 for ; Thu, 21 May 2026 19:48:26 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-490388fd0dbso9363275e9.0 for ; Thu, 21 May 2026 10:48:26 -0700 (PDT) Received: from EPUAKYIW02F7.. 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Pass the Xen resume entry point (hyp_resume) to EL3 together with a zero context ID, matching Linux. This patch wires up only the host-side PSCI SYSTEM_SUSPEND invocation. The resume trampoline and context restore are provided by earlier patches in the series. Only enable this path when CONFIG_SYSTEM_SUSPEND is set and PSCI advertises SYSTEM_SUSPEND via PSCI_FEATURES. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu --- Changes in v9: - cache SYSTEM_SUSPEND support using PSCI_FEATURES and gate the host call on the cached capability - keep the cached SYSTEM_SUSPEND capability read-only after init - log whether firmware reports SYSTEM_SUSPEND support - pass an explicit zero context ID in the SYSTEM_SUSPEND call - drop the stale note claiming hyp_resume is still a stub --- xen/arch/arm/include/asm/psci.h | 1 + xen/arch/arm/psci.c | 31 ++++++++++++++++++++++++++++++- 2 files changed, 31 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index 48a93e6b79..bb3c73496e 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -23,6 +23,7 @@ int call_psci_cpu_on(int cpu); void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); +int call_psci_system_suspend(void); /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index b6860a7760..e05dae1133 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -17,23 +17,27 @@ #include #include #include +#include /* * While a 64-bit OS can make calls with SMC32 calling conventions, for * some calls it is necessary to use SMC64 to pass or return 64-bit values. - * For such calls PSCI_0_2_FN_NATIVE(x) will choose the appropriate + * For such calls PSCI_*_FN_NATIVE(x) will choose the appropriate * (native-width) function ID. */ #ifdef CONFIG_ARM_64 #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN64_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN64_##name #else #define PSCI_0_2_FN_NATIVE(name) PSCI_0_2_FN32_##name +#define PSCI_1_0_FN_NATIVE(name) PSCI_1_0_FN32_##name #endif uint32_t psci_ver; uint32_t smccc_ver; static uint32_t psci_cpu_on_nr; +static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) @@ -60,6 +64,25 @@ void call_psci_cpu_off(void) } } +int call_psci_system_suspend(void) +{ +#ifdef CONFIG_SYSTEM_SUSPEND + struct arm_smccc_res res; + + if ( !has_psci_system_suspend ) + return PSCI_NOT_SUPPORTED; + + /* Context ID is unused for the Xen resume path. */ + arm_smccc_smc(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND), __pa(hyp_resume), 0, + &res); + return PSCI_RET(res); +#else + dprintk(XENLOG_WARNING, + "SYSTEM_SUSPEND not supported (CONFIG_SYSTEM_SUSPEND disabled)\n"); + return PSCI_NOT_SUPPORTED; +#endif +} + void call_psci_system_off(void) { if ( psci_ver > PSCI_VERSION(0, 1) ) @@ -223,9 +246,15 @@ int __init psci_init(void) psci_init_smccc(); + has_psci_system_suspend = + psci_features(PSCI_1_0_FN_NATIVE(SYSTEM_SUSPEND)) == 0; + printk(XENLOG_INFO "Using PSCI v%u.%u\n", PSCI_VERSION_MAJOR(psci_ver), PSCI_VERSION_MINOR(psci_ver)); + printk(XENLOG_DEBUG "PSCI SYSTEM_SUSPEND is %ssupported by firmware\n", + has_psci_system_suspend ? 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([45.12.24.36]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49033d8e24bsm74565925e9.10.2026.05.21.10.48.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2026 10:48:26 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779385707; x=1779990507; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=xH+CdyKs4JSeNRtHkAqySvPXuG95ECPS3iRUPK1CuT4=; b=nYgklPOz6MJnn5IShbCtfiy9XtYB3nxnUHCRapavg59xlsP3dYol77pHGGOMPuIqWt rFKKaS7D6/xB1Bfbr1RhMCImqAdzhruj++qMDA0ymMX58slPaZnqrBWez3tjd6DuDxHG wRapnx3xIbat/Jdy1sGXdicjsll9Arr9x/3zr4nGdnyqiYi3dUCRF48POQVW0lrbjqYa mdB/7ysr/eEejJ8RTe0X9zafLvNqwrjGsNTW07PR7qt5ysB78v9pGspIm7A/MnRrFRK4 NeCItqeiDcGoFI8+ls3pM2ycmvnGo3Rt2V1ut343kVo9cDRRCeEBB2XX201yR1BeHVto +xoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779385707; x=1779990507; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=xH+CdyKs4JSeNRtHkAqySvPXuG95ECPS3iRUPK1CuT4=; b=UVyYQiNRquysV2VIDxyzkQqXg4ncRw3UyqFfC31hUubeiXiFThP+ftjnSWi9spb+Bf /5pXpdvOasYvhDaRpb2QxzWu3Q3yeAWsfmEljDFveuC01bhkZCrU8rkMQeXbMYTojdkh DwFBqFIhgurXBW/p6ghLYZJ/T3nZKgvfs66AHvBU8YnFeiI6c0SKUMIZWpfOIFUCqMKi ytHJnRc3MYIfiSel/4SzflQ9LJfznh3XDA/if1+LflHvmAKDtLxa1UlctPHF/btYlWfM 9CBugP6S3Yo8zDejZuKa12BXHM2ZK391b+L+7Dk8gHq1jyU2tex0eTC+zBULr1xWgUEI Brjg== X-Gm-Message-State: AOJu0YxwMtF2W3mJ1g4VfeikFOgldvdp0kOiBsT8vGrihXYHMvur+fbh vyy9s+7BcD1DD0b7BLyCBvTFH54IFNMmqnpSUNZb9vdb1x7JvGuoKq5i4DoquekK X-Gm-Gg: Acq92OFrFSM52+M6B+RjDPt5N+U05gfbU7GtCpV47P5nhHmd5jfyEhtq1reiBz9XkPx EFzRN2uU/qZ+aR6cHaMMqPBXLxftFx5wrEhxsQI6PjQZq5Pow+Y2cHIQkLY6iXLG/3gBgKD1uXB e23BBmbgQI/gCy5ZA443+roldcHiPzwsOhPOE74gCHztt2qzKJh8g5CAu75tMf/fdSebD2Zv0/1 KxO+jHe1SlhvjS2nRWbtkd1xI2AhNFJbsyxo7YUzM1Dqn3ISPX3f1OiQrlNzMn+7ohFfZGZIWUl gYU5rKlaLYD2z/HO/OfxRgD9kqafRNIyRXJu/in22Dy+DLWnJtM9ufQvt088CPPndSRFbsP1cCp sZhURNR6XdSfLhaGbljvC9wO6xOIgd+OtcqpjEY1DDY9ivtQP5by7Musd5PB3Hhm6RnmHv6alFY gSloVrhepQOphZl/xPUVId/93lAykNdyzh0SE9 X-Received: by 2002:a05:600c:3513:b0:490:32da:30d with SMTP id 5b1f17b1804b1-4903605f0edmr56575805e9.9.1779385707107; Thu, 21 May 2026 10:48:27 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Luca Fancellu , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Rahul Singh Subject: [PATCH v10 12/13] xen/arm: Add vPSCI SYSTEM_SUSPEND policy Date: Thu, 21 May 2026 20:45:30 +0300 Message-ID: <1d49511fff3ef5f77bc2d4daac00e6895c1359b1.1779385072.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779385707-4086B938-8B9365E2/0/0 X-purgate-type: clean X-purgate-size: 17397 From: Mykola Kvach Introduce CONFIG_HAS_HWDOM_SYSTEM_SUSPEND as an architecture-selected capability for platforms where the hardware domain can be parked with SHUTDOWN_suspend without calling hwdom_shutdown(). Expose PSCI SYSTEM_SUSPEND as a vPSCI operation for all domains. For non-control domains, including the hardware domain when it is not acting as a control domain, the call is handled as a guest/domain suspend request and parks the domain in SHUTDOWN_suspend. Control domains need additional sequencing because their SYSTEM_SUSPEND request is used to coordinate host-wide suspend. A non-last awake control domain may be parked in SHUTDOWN_suspend without requiring the host suspend path to be available. The last awake control domain is treated as the point where the request becomes a host-suspend request, and it may only proceed when all non-control domains are already in SHUTDOWN_suspend and the host suspend path is available. Keep the control-domain sequencing and domain-readiness checks out of PSCI_FEATURES. They are per-attempt runtime conditions rather than stable PSCI function availability. Advertise SYSTEM_SUSPEND as implemented by vPSCI and report attempt-time policy failures as PSCI_DENIED. Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so that SHUTDOWN_suspend from the hardware domain can be treated as a domain suspend state rather than as a hardware-domain initiated host shutdown. This does not by itself imply that host-wide suspend is available. Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND capability with runtime blockers reported by Xen-owned subsystems. Add runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ paths lacking suspend/resume support. These blockers are runtime based, so they only apply to drivers or paths that Xen actually uses on the platform. For SMMUv3, the blocker applies only when Xen actually uses the MSI IRQ path, since resume does not restore the SMMU *_IRQ_CFGn MSI registers yet. Add a struct domain forward declaration to xen/suspend.h so the generic header can expose arch_domain_resume() without requiring a full domain.h include. Signed-off-by: Mykola Kvach --- Changes in V10: - Return PSCI_DENIED rather than PSCI_NOT_SUPPORTED when the last awake control domain cannot proceed to host suspend, keeping PSCI_FEATURES stable once SYSTEM_SUSPEND is advertised. - Shorten SYSTEM_SUSPEND blocker messages and use %pd when logging the control domain. - Mark serial_suspend_available as __ro_after_init. - Mention the struct domain forward declaration added to xen/suspend.h. Changes in V9: - Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND so that hardware-domain SHUTDOWN_suspend support is not tied to host-wide system suspend availability. - Add runtime host suspend blockers for Xen-owned subsystems lacking suspend/resume support. - Keep vPSCI SYSTEM_SUSPEND advertised through PSCI_FEATURES and enforce control-domain sequencing in the call handler. --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/gic.c | 6 ++ xen/arch/arm/include/asm/psci.h | 3 + xen/arch/arm/include/asm/suspend.h | 10 ++- xen/arch/arm/psci.c | 7 ++ xen/arch/arm/suspend.c | 40 +++++++++ xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- xen/common/Kconfig | 3 + xen/common/domain.c | 7 +- xen/drivers/char/serial.c | 12 +++ xen/drivers/passthrough/arm/iommu.c | 4 + xen/drivers/passthrough/arm/smmu-v3.c | 4 + xen/include/xen/serial.h | 1 + xen/include/xen/suspend.h | 2 + 14 files changed, 201 insertions(+), 13 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a1..54a5bfb9ae 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -19,6 +19,7 @@ config ARM select HAS_ALTERNATIVE if HAS_VMAP select HAS_DEVICE_TREE_DISCOVERY select HAS_DOM0LESS + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE select HAS_STACK_PROTECTOR select HAS_UBSAN diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index 7727ffed5a..60488c95b4 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) void register_gic_ops(const struct gic_hw_operations *ops) { gic_hw_ops = ops; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("GIC driver lacks suspend support"); +#endif } static void clear_cpu_lr_mask(void) diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h index bb3c73496e..142fa1bfe5 100644 --- a/xen/arch/arm/include/asm/psci.h +++ b/xen/arch/arm/include/asm/psci.h @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); void call_psci_system_off(void); void call_psci_system_reset(void); int call_psci_system_suspend(void); +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void); +#endif /* Range of allocated PSCI function numbers */ #define PSCI_FNUM_MIN_VALUE _AC(0,U) diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index c848fc6340..50dc6e9fdf 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -39,7 +39,15 @@ extern struct resume_cpu_context resume_cpu_context; int prepare_resume_ctx(void); void hyp_resume(void); -#endif /* CONFIG_SYSTEM_SUSPEND */ +bool host_system_suspend_allowed(void); +void host_system_suspend_disable(const char *reason); + +#else /* !CONFIG_SYSTEM_SUSPEND */ + +static inline bool host_system_suspend_allowed(void) { return false; } +static inline void host_system_suspend_disable(const char *reason) {} + +#endif #endif /* ARM_SUSPEND_H */ diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c index e05dae1133..e9d78668fd 100644 --- a/xen/arch/arm/psci.c +++ b/xen/arch/arm/psci.c @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; #define PSCI_RET(res) ((int32_t)(res).a0) +#ifdef CONFIG_SYSTEM_SUSPEND +bool psci_system_suspend_allowed(void) +{ + return has_psci_system_suspend; +} +#endif + int call_psci_cpu_on(int cpu) { struct arm_smccc_res res; diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index 6ea4a0f9cc..98ddd46a47 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,9 +1,49 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include #include +#include +#include + struct resume_cpu_context resume_cpu_context; +/* + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid + * suspend/resume path. + * + * This gate is checked only when the last awake control domain attempts to + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. + */ +static bool host_system_suspend_runtime_allowed = true; + +static bool host_serial_suspend_allowed(void) +{ + if ( serial_suspend_supported() ) + return true; + + printk_once(XENLOG_INFO + "Host SYSTEM_SUSPEND blocked: serial unsupported\n"); + + return false; +} + +bool host_system_suspend_allowed(void) +{ + return psci_system_suspend_allowed() && + host_serial_suspend_allowed() && + host_system_suspend_runtime_allowed; +} + +void host_system_suspend_disable(const char *reason) +{ + host_system_suspend_runtime_allowed = false; + + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", + reason ? reason : "unsupported suspend/resume path"); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index ac6af6118f..0bae42c1bd 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -5,6 +5,7 @@ #include #include +#include #include #include #include @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) domain_shutdown(d,SHUTDOWN_reboot); } +/* + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, + * so multiple control domains cannot all observe each other as still awake. + */ +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); + +static bool domain_in_suspend_state(struct domain *d) +{ + bool suspended; + + spin_lock(&d->shutdown_lock); + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; + spin_unlock(&d->shutdown_lock); + + return suspended; +} + +static int32_t domain_psci_system_suspend_policy(struct domain *d) +{ + struct domain *other; + bool last_awake_control_domain = true; + bool awake_non_control_domain = false; + + /* Only control domains participate in sequencing policy. */ + if ( !is_control_domain(d) ) + return 0; + + rcu_read_lock(&domlist_read_lock); + + for_each_domain ( other ) + { + bool suspended; + + if ( other == d ) + continue; + + suspended = domain_in_suspend_state(other); + if ( suspended ) + continue; + + if ( is_control_domain(other) ) + { + last_awake_control_domain = false; + break; + } + + awake_non_control_domain = true; + } + + rcu_read_unlock(&domlist_read_lock); + + /* + * Another control domain is still awake. This request is only the first + * phase of the sequencing: park this control domain and leave the host + * running. Host-wide suspend gates must not block this intermediate state. + */ + if ( !last_awake_control_domain ) + return 0; + + /* + * This is the last awake control domain. It must not be parked unless the + * request can proceed as a host-suspend request; otherwise Xen would lose + * the last domain that can coordinate the system suspend. + */ + if ( awake_non_control_domain ) + { + printk(XENLOG_DEBUG + "SYSTEM_SUSPEND denied for %pd: non-control domains awake\n", + d); + return PSCI_DENIED; + } + + /* + * Host-wide gates are relevant only for the last-control-domain case. They + * must not block parking of a non-last control domain, but they must deny + * the last control domain when host suspend is not currently available. + */ + if ( !host_system_suspend_allowed() ) + return PSCI_DENIED; + + return 0; +} + static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) { int32_t rc; @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( is_64bit_domain(d) && is_thumb ) return PSCI_INVALID_ADDRESS; - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ - if ( is_hardware_domain(d) ) - return PSCI_NOT_SUPPORTED; - /* Ensure that all CPUs other than the calling one are offline */ domain_lock(d); for_each_vcpu ( d, v ) @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) if ( rc ) return PSCI_DENIED; - rc = domain_shutdown(d, SHUTDOWN_suspend); + spin_lock(&vpsci_system_suspend_lock); + + rc = domain_psci_system_suspend_policy(d); + if ( !rc ) + { + rc = domain_shutdown(d, SHUTDOWN_suspend); + if ( rc ) + rc = PSCI_DENIED; + else + { + rctx->ctxt = ctxt; + rctx->wake_cpu = current; + } + } + + spin_unlock(&vpsci_system_suspend_lock); + if ( rc ) { free_vcpu_guest_context(ctxt); - return PSCI_DENIED; + return rc; } - rctx->ctxt = ctxt; - rctx->wake_cpu = current; - gprintk(XENLOG_DEBUG, "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) case PSCI_0_2_FN32_SYSTEM_RESET: case PSCI_1_0_FN32_PSCI_FEATURES: case ARM_SMCCC_VERSION_FID: - return 0; case PSCI_1_0_FN32_SYSTEM_SUSPEND: case PSCI_1_0_FN64_SYSTEM_SUSPEND: - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; + return 0; default: return PSCI_NOT_SUPPORTED; } diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480ee..816a1a4ecb 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -140,6 +140,9 @@ config HAS_EX_TABLE config HAS_FAST_MULTIPLY bool +config HAS_HWDOM_SYSTEM_SUSPEND + bool + config HAS_IOPORTS bool diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c28..d3edfb2a13 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) domain_shutdown(d, SHUTDOWN_crash); } +static inline bool want_hwdom_shutdown(uint8_t reason) +{ + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || + reason != SHUTDOWN_suspend; +} int domain_shutdown(struct domain *d, u8 reason) { @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) d->shutdown_code = reason; reason = d->shutdown_code; - if ( is_hardware_domain(d) ) + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) hwdom_shutdown(reason); if ( d->is_shutting_down ) diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c index adb312d796..e5348b5445 100644 --- a/xen/drivers/char/serial.c +++ b/xen/drivers/char/serial.c @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) #ifdef CONFIG_SYSTEM_SUSPEND +static bool __ro_after_init serial_suspend_available = true; + void serial_suspend(void) { int i; @@ -513,6 +515,11 @@ void serial_resume(void) com[i].driver->resume(&com[i]); } +bool serial_suspend_supported(void) +{ + return serial_suspend_available; +} + #endif /* CONFIG_SYSTEM_SUSPEND */ void __init serial_register_uart(int idx, struct uart_driver *driver, @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, /* Store UART-specific info. */ com[idx].driver = driver; com[idx].uart = uart; + +#ifdef CONFIG_SYSTEM_SUSPEND + if ( !driver->suspend || !driver->resume ) + serial_suspend_available = false; +#endif } void __init serial_async_transmit(struct serial_port *port) diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/arm/iommu.c index 100545e23f..547048af05 100644 --- a/xen/drivers/passthrough/arm/iommu.c +++ b/xen/drivers/passthrough/arm/iommu.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -46,6 +47,9 @@ void __init iommu_set_ops(const struct iommu_ops *ops) } iommu_ops = ops; + + if ( !ops->suspend || !ops->resume ) + host_system_suspend_disable("IOMMU driver lacks suspend support"); } int __init iommu_hardware_setup(void) diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c index be8028c036..1b6bb1bc5f 100644 --- a/xen/drivers/passthrough/arm/smmu-v3.c +++ b/xen/drivers/passthrough/arm/smmu-v3.c @@ -91,6 +91,7 @@ #include #include #include +#include #include "smmu-v3.h" @@ -1903,6 +1904,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) } } + host_system_suspend_disable( + "SMMUv3 MSI IRQ path is unsupported for host suspend"); + /* Add callback to free MSIs on teardown */ devm_add_action(dev, arm_smmu_free_msis, dev); } diff --git a/xen/include/xen/serial.h b/xen/include/xen/serial.h index 8e18445552..418b00ead0 100644 --- a/xen/include/xen/serial.h +++ b/xen/include/xen/serial.h @@ -137,6 +137,7 @@ const struct vuart_info* serial_vuart_info(int idx); /* Serial suspend/resume. */ void serial_suspend(void); void serial_resume(void); +bool serial_suspend_supported(void); #endif /* diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h index 6f94fd53b0..a941331035 100644 --- a/xen/include/xen/suspend.h +++ b/xen/include/xen/suspend.h @@ -6,6 +6,8 @@ #if __has_include() #include #else +struct domain; + static inline void arch_domain_resume(struct domain *d) {} #endif -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 17:48:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 17:48:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315663.1585470 (Exim 4.92) (envelope-from ) id 1wQ7VZ-0004Mq-Hm; Thu, 21 May 2026 17:48:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315663.1585470; Thu, 21 May 2026 17:48:33 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ7VZ-0004KX-64; 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The vPSCI policy, runtime driver blockers and control-domain sequencing checks are handled by the preceding commit; this change adds the code that actually drives the host suspend attempt. The backend runs from a tasklet scheduled on pCPU0, because non-boot CPUs are disabled during suspend. It freezes domains, disables the scheduler and then disables non-boot CPUs. Host-side suspend participants are handled in phases. IOMMU and console state are suspended first. Local IRQs are then disabled before suspending timer and GIC state. On resume or failure, the completed suspend phases are unwound in reverse: GIC and timer state are restored while IRQs are still disabled, local IRQs are restored, and then console and IOMMU state are restored. On boot, init_ttbr is normally initialized during secondary CPU hotplug. On uniprocessor systems this can leave init_ttbr uninitialized, so set it from the boot CPU before entering suspend. Note: the code is behind CONFIG_SYSTEM_SUSPEND. On ARM64 this is currently only available when HAS_SYSTEM_SUSPEND is selected, which requires UNSUPPORTED to be set and MPU to be unset. Signed-off-by: Mirela Simonovic Signed-off-by: Saeed Nowshadi Signed-off-by: Mykyta Poturai Signed-off-by: Mykola Kvach --- Changes in V10: - Re-apply boot CPU local errata/workaround handling after SYSTEM_SUSPEND, before resuming the rest of the host suspend path. - Move set_init_ttbr() declaration to asm/mmu/mm.h, since it is MMU-specific. Changes in V9: - Split vPSCI availability policy, runtime host-suspend blockers and the domain-readiness precheck into the preceding commit. - Trigger the host suspend backend from the control-domain SYSTEM_SUSPEND path. - Reorder the host suspend/resume phases so the timer is suspended with local IRQs disabled and local IRQs are restored after the GIC and timer resume paths, before the console and IOMMU resume paths. - Move HAS_HWDOM_SYSTEM_SUSPEND and related logic to policy patch. Changes in V8: - Add a pre-suspend check in system_suspend() after scheduler_disable() to require all domains to be in the shut down state with SHUTDOWN_suspend before proceeding with the global suspend flow. - Drop the common-level depends on !ARM_64 || !SYSTEM_SUSPEND from CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND and model the ARM64 suspend case with an arch-selected capability instead. - Rename CONFIG_HAS_HWDOM_SHUTDOWN_ON_SUSPEND to CONFIG_HAS_HWDOM_SYSTEM_SUSPEND. - Rename need_hwdom_shutdown() to want_hwdom_shutdown(). Changes in V7: - Control domain is responsible for host suspend. - Add an empty inline host_system_suspend() function when SYSTEM_SUSPEND config is disabled. - Use IS_ENABLED() for config checking instead of #ifdef. - Replace #ifdef checks in domain_shutdown() with IS_ENABLED() to simplify control flow. - Factor hardware domain shutdown condition into a helper (need_hwdom_shutdown()) to avoid preprocessor directives inside the function. - Squash with iommu suspend/resume commit. --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/cpuerrata.c | 7 +- xen/arch/arm/include/asm/cpuerrata.h | 1 + xen/arch/arm/include/asm/mmu/mm.h | 2 + xen/arch/arm/include/asm/suspend.h | 2 + xen/arch/arm/mmu/smpboot.c | 2 +- xen/arch/arm/suspend.c | 156 +++++++++++++++++++++++++++ xen/arch/arm/vpsci.c | 10 +- 8 files changed, 177 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 54a5bfb9ae..119bc00674 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -9,6 +9,7 @@ config ARM_64 select 64BIT select HAS_DOMAIN_TYPE select HAS_FAST_MULTIPLY + select HAS_SYSTEM_SUSPEND if !MPU && UNSUPPORTED select HAS_VPCI_GUEST_SUPPORT if PCI_PASSTHROUGH config ARM diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c index 17cf134f1b..dd3394345c 100644 --- a/xen/arch/arm/cpuerrata.c +++ b/xen/arch/arm/cpuerrata.c @@ -696,6 +696,11 @@ void check_local_cpu_errata(void) update_cpu_capabilities(arm_errata, "enabled workaround for"); } +int enable_local_cpu_errata_workarounds(void) +{ + return enable_nonboot_cpu_caps(arm_errata); +} + void __init enable_errata_workarounds(void) { enable_cpu_capabilities(arm_errata); @@ -732,7 +737,7 @@ static int cpu_errata_callback(struct notifier_block *nfb, * fixed to expect an error at CPU_STARTING phase. */ ASSERT(system_state != SYS_STATE_boot); - rc = enable_nonboot_cpu_caps(arm_errata); + rc = enable_local_cpu_errata_workarounds(); break; default: break; diff --git a/xen/arch/arm/include/asm/cpuerrata.h b/xen/arch/arm/include/asm/cpuerrata.h index 1799a16d7e..b93521326f 100644 --- a/xen/arch/arm/include/asm/cpuerrata.h +++ b/xen/arch/arm/include/asm/cpuerrata.h @@ -5,6 +5,7 @@ #include void check_local_cpu_errata(void); +int enable_local_cpu_errata_workarounds(void); void enable_errata_workarounds(void); #define CHECK_WORKAROUND_HELPER(erratum, feature, arch) \ diff --git a/xen/arch/arm/include/asm/mmu/mm.h b/xen/arch/arm/include/asm/mmu/mm.h index 7f4d59137d..ee73a77777 100644 --- a/xen/arch/arm/include/asm/mmu/mm.h +++ b/xen/arch/arm/include/asm/mmu/mm.h @@ -110,6 +110,8 @@ void dump_pt_walk(paddr_t ttbr, paddr_t addr, extern void switch_ttbr(uint64_t ttbr); extern void relocate_and_switch_ttbr(uint64_t ttbr); +void set_init_ttbr(lpae_t *root); + #endif /* __ARM_MMU_MM_H__ */ /* diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h index 50dc6e9fdf..889a6509d9 100644 --- a/xen/arch/arm/include/asm/suspend.h +++ b/xen/arch/arm/include/asm/suspend.h @@ -41,11 +41,13 @@ int prepare_resume_ctx(void); void hyp_resume(void); bool host_system_suspend_allowed(void); void host_system_suspend_disable(const char *reason); +void host_system_suspend(struct domain *d); #else /* !CONFIG_SYSTEM_SUSPEND */ static inline bool host_system_suspend_allowed(void) { return false; } static inline void host_system_suspend_disable(const char *reason) {} +static inline void host_system_suspend(struct domain *d) {} #endif diff --git a/xen/arch/arm/mmu/smpboot.c b/xen/arch/arm/mmu/smpboot.c index 37e91d72b7..ff508ecf40 100644 --- a/xen/arch/arm/mmu/smpboot.c +++ b/xen/arch/arm/mmu/smpboot.c @@ -72,7 +72,7 @@ static void clear_boot_pagetables(void) clear_table(boot_third); } -static void set_init_ttbr(lpae_t *root) +void set_init_ttbr(lpae_t *root) { /* * init_ttbr is part of the identity mapping which is read-only. So diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c index 98ddd46a47..2e0833a13c 100644 --- a/xen/arch/arm/suspend.c +++ b/xen/arch/arm/suspend.c @@ -1,10 +1,18 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include +#include +#include #include #include +#include +#include +#include #include +#include #include +#include struct resume_cpu_context resume_cpu_context; @@ -44,6 +52,154 @@ void host_system_suspend_disable(const char *reason) reason ? reason : "unsupported suspend/resume path"); } +/* Xen suspend. data identifies the domain that initiated suspend. */ +static void system_suspend(void *data) +{ + int status; + unsigned long flags; + struct domain *d = (struct domain *)data; + + BUG_ON(system_state != SYS_STATE_active); + + system_state = SYS_STATE_suspend; + + printk("Xen suspending...\n"); + + freeze_domains(); + scheduler_disable(); + + /* + * Non-boot CPUs have to be disabled on suspend and enabled on resume + * (hotplug-based mechanism). Disabling non-boot CPUs will lead to PSCI + * CPU_OFF to be called by each non-boot CPU. Depending on the underlying + * platform capabilities, this may lead to the physical powering down of + * CPUs. + */ + status = disable_nonboot_cpus(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_nonboot_cpus; + } + + console_start_sync(); + status = iommu_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_end_sync; + } + + status = console_suspend(); + if ( status ) + { + dprintk(XENLOG_ERR, "Failed to suspend the console, err=%d\n", status); + system_state = SYS_STATE_resume; + goto resume_iommu; + } + + local_irq_save(flags); + + time_suspend(); + + status = gic_suspend(); + if ( status ) + { + system_state = SYS_STATE_resume; + goto resume_time; + } + + set_init_ttbr(xen_pgtable); + + /* + * Enable identity mapping before entering suspend to simplify + * the resume path + */ + update_boot_mapping(true); + + if ( prepare_resume_ctx() ) + { + status = call_psci_system_suspend(); + /* + * If suspend is finalized properly by above system suspend PSCI call, + * the code below in this 'if' branch will never execute. Execution + * will continue from hyp_resume which is the hypervisor's resume point. + * In hyp_resume CPU context will be restored and since link-register is + * restored as well, it will appear to return from prepare_resume_ctx. + * The difference in returning from prepare_resume_ctx on system suspend + * versus resume is in function's return value: on suspend, the return + * value is a non-zero value, on resume it is zero. That is why the + * control flow will not re-enter this 'if' branch on resume. + */ + if ( status ) + dprintk(XENLOG_WARNING, "PSCI system suspend failed, err=%d\n", + status); + + system_state = SYS_STATE_resume; + } + else + { + system_state = SYS_STATE_resume; + + /* + * CPU0 resumes directly from hyp_resume(), bypassing the CPU hotplug + * path that re-checks and re-enables errata workarounds for secondary + * CPUs. + */ + check_local_cpu_errata(); + check_local_cpu_features(); + BUG_ON(enable_local_cpu_errata_workarounds()); + } + + update_boot_mapping(false); + + gic_resume(); + + resume_time: + time_resume(); + + local_irq_restore(flags); + + console_resume(); + + resume_iommu: + iommu_resume(); + + resume_end_sync: + console_end_sync(); + + resume_nonboot_cpus: + /* + * The rcu_barrier() has to be added to ensure that the per cpu area is + * freed before a non-boot CPU tries to initialize it (_free_percpu_area() + * has to be called before the init_percpu_area()). This scenario occurs + * when non-boot CPUs are hot-unplugged on suspend and hotplugged on resume. + */ + rcu_barrier(); + enable_nonboot_cpus(); + + scheduler_enable(); + thaw_domains(); + + system_state = SYS_STATE_active; + + printk("Resume (status %d)\n", status); + + domain_resume(d); +} + +static DECLARE_TASKLET(system_suspend_tasklet, system_suspend, NULL); + +void host_system_suspend(struct domain *d) +{ + system_suspend_tasklet.data = (void *)d; + /* + * The suspend procedure has to be finalized by the pCPU#0 (non-boot pCPUs + * will be disabled during the suspend). + */ + tasklet_schedule_on_cpu(&system_suspend_tasklet, 0); +} + /* * Local variables: * mode: C diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c index 0bae42c1bd..6e332d6a12 100644 --- a/xen/arch/arm/vpsci.c +++ b/xen/arch/arm/vpsci.c @@ -237,7 +237,8 @@ static bool domain_in_suspend_state(struct domain *d) return suspended; } -static int32_t domain_psci_system_suspend_policy(struct domain *d) +static int32_t domain_psci_system_suspend_policy(struct domain *d, + bool *host_suspend) { struct domain *other; bool last_awake_control_domain = true; @@ -300,6 +301,7 @@ static int32_t domain_psci_system_suspend_policy(struct domain *d) if ( !host_system_suspend_allowed() ) return PSCI_DENIED; + *host_suspend = true; return 0; } @@ -310,6 +312,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) struct vcpu *v; struct domain *d = current->domain; bool is_thumb = epoint & 1; + bool host_suspend = false; struct resume_info *rctx = &d->arch.resume_ctx; /* THUMB set is not allowed with 64-bit domain */ @@ -334,7 +337,7 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) spin_lock(&vpsci_system_suspend_lock); - rc = domain_psci_system_suspend_policy(d); + rc = domain_psci_system_suspend_policy(d, &host_suspend); if ( !rc ) { rc = domain_shutdown(d, SHUTDOWN_suspend); @@ -359,6 +362,9 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", epoint, cid); + if ( host_suspend ) + host_system_suspend(d); + return rc; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 18:43:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 18:43:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315793.1585480 (Exim 4.92) (envelope-from ) id 1wQ8Mk-00033I-As; Thu, 21 May 2026 18:43:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315793.1585480; Thu, 21 May 2026 18:43:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mk-00033B-8F; Thu, 21 May 2026 18:43:30 +0000 Received: by outflank-mailman (input) for mailman id 1315793; Thu, 21 May 2026 18:43:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mi-00032s-8a for xen-devel@lists.xenproject.org; Thu, 21 May 2026 18:43:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ8Mh-00CAW4-Dp for xen-devel@lists.xenproject.org; Thu, 21 May 2026 20:43:27 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f5238-bab6-0a2a0a5309dd-0a2a4507b2dc-20 for ; Thu, 21 May 2026 20:43:27 +0200 Received: from [209.85.128.47] (helo=mail-wm1-f47.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f524f-229c-0a2a45070019-d155802fe110-3 for ; Thu, 21 May 2026 20:43:27 +0200 Received: by mail-wm1-f47.google.com with SMTP id 5b1f17b1804b1-488a8ca4aadso63483655e9.3 for ; Thu, 21 May 2026 11:43:27 -0700 (PDT) Received: from EPUAKYIW02F7.. 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The first patch makes parse failures leave the caller-visible color count at zero. This prevents a rejected command-line value from leaving a partially parsed configuration behind for later init paths to consume. The second patch rejects empty color tokens. Previously, delimiters in places where a color value was expected could be interpreted as color 0, because simple_strtoul() returns zero without advancing the input pointer. The patch checks that each parsed color value consumed input. It also fixes the DT color parsing error message by adding the missing newline and including the domain ID. Changes in v2: - Clarify the first commit message. - Include the domain ID in the DT color parsing error message. - Add Reviewed-by tags. Mykola Kvach (2): xen/common: llc-coloring: clear color count on parse failure xen/common: llc-coloring: reject empty color tokens xen/common/llc-coloring.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 18:43:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 18:43:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315794.1585485 (Exim 4.92) (envelope-from ) id 1wQ8Mk-00036F-Le; Thu, 21 May 2026 18:43:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315794.1585485; Thu, 21 May 2026 18:43:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mk-000368-G0; Thu, 21 May 2026 18:43:30 +0000 Received: by outflank-mailman (input) for mailman id 1315794; Thu, 21 May 2026 18:43:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mi-00032y-SU for xen-devel@lists.xenproject.org; Thu, 21 May 2026 18:43:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ8Mi-00HU6L-8W for xen-devel@lists.xenproject.org; Thu, 21 May 2026 20:43:28 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f523f-e002-0a2a0a5209dd-0a2a450add6c-28 for ; Thu, 21 May 2026 20:43:28 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f5250-56b3-0a2a450a0019-d1558033e549-3 for ; Thu, 21 May 2026 20:43:28 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-48e8132c6d0so42393015e9.1 for ; Thu, 21 May 2026 11:43:28 -0700 (PDT) Received: from EPUAKYIW02F7.. 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If parsing later fails, leave the count at zero so callers do not consume a partially parsed configuration. The bug is reachable in practice: cmdline_parse() ignores the -EINVAL from a custom_param callback, so boot continues with the partial xen_num_colors / dom0_num_colors that llc_coloring_init() and dom0_set_llc_colors() then consume. Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel Reviewed-by: Denis Mukhin --- Changes in v2: - Clarify that the partial color count can be consumed after a command-line parse failure. - Add Reviewed-by tags. --- xen/common/llc-coloring.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c index 6dc614739a..2606cb0977 100644 --- a/xen/common/llc-coloring.c +++ b/xen/common/llc-coloring.c @@ -79,7 +79,7 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], if ( end >= NR_LLC_COLORS || start > end || (end - start) >= (UINT_MAX - *num_colors) || (*num_colors + (end - start)) >= max_num_colors ) - return -EINVAL; + goto fail; /* Colors are range checked in check_colors() */ for ( color = start; color <= end; color++ ) @@ -91,7 +91,14 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], break; } - return *s ? -EINVAL : 0; + if ( *s ) + goto fail; + + return 0; + + fail: + *num_colors = 0; + return -EINVAL; } static int __init parse_dom0_colors(const char *s) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 18:43:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 18:43:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315795.1585494 (Exim 4.92) (envelope-from ) id 1wQ8Ml-0003FJ-27; Thu, 21 May 2026 18:43:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315795.1585494; Thu, 21 May 2026 18:43:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mk-0003DH-SF; Thu, 21 May 2026 18:43:30 +0000 Received: by outflank-mailman (input) for mailman id 1315795; Thu, 21 May 2026 18:43:29 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Mj-000334-LX for xen-devel@lists.xenproject.org; Thu, 21 May 2026 18:43:29 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ8Mj-00EkKx-1m for xen-devel@lists.xenproject.org; Thu, 21 May 2026 20:43:29 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f5228-5cb7-0a2a0a5109dd-0a2a4508df64-48 for ; Thu, 21 May 2026 20:43:28 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f5250-63b5-0a2a45080019-d1558032e55e-3 for ; Thu, 21 May 2026 20:43:28 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-48e8132c6d0so42393085e9.1 for ; Thu, 21 May 2026 11:43:28 -0700 (PDT) Received: from EPUAKYIW02F7.. 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This makes strings such as ",2-6", "-10,19-20" or "1,,2" look as if an empty value was color 0. Also fix the DT color parsing error message by adding the missing newline and including the domain ID, matching the style of the color validation error below. Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel --- Changes in v2: - Include the domain ID in the LLC color parsing error message. - Add Reviewed-by tag. --- xen/common/llc-coloring.c | 13 ++++++++++--- 1 file changed, 10 insertions(+), 3 deletions(-) diff --git a/xen/common/llc-coloring.c b/xen/common/llc-coloring.c index 2606cb0977..b5de5787c1 100644 --- a/xen/common/llc-coloring.c +++ b/xen/common/llc-coloring.c @@ -64,14 +64,21 @@ static int __init parse_color_config(const char *buf, unsigned int colors[], while ( *s != '\0' ) { + const char *endp; unsigned int color, start, end; - start = simple_strtoul(s, &s, 0); + start = simple_strtoul(s, &endp, 0); + if ( endp == s ) + goto fail; + s = endp; if ( *s == '-' ) /* Range */ { s++; - end = simple_strtoul(s, &s, 0); + end = simple_strtoul(s, &endp, 0); + if ( endp == s ) + goto fail; + s = endp; } else /* Single value */ end = start; @@ -334,7 +341,7 @@ int __init domain_set_llc_colors_from_str(struct domain *d, const char *str) err = parse_color_config(str, colors, max_nr_colors, &num_colors); if ( err ) { - printk(XENLOG_ERR "Error parsing LLC color configuration"); + printk(XENLOG_ERR "%pd: error parsing LLC color configuration\n", d); xfree(colors); return err; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 18:55:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 18:55:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315825.1585509 (Exim 4.92) (envelope-from ) id 1wQ8Xy-0006Nk-V6; Thu, 21 May 2026 18:55:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315825.1585509; Thu, 21 May 2026 18:55:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Xy-0006Nd-RB; Thu, 21 May 2026 18:55:06 +0000 Received: by outflank-mailman (input) for mailman id 1315825; Thu, 21 May 2026 18:55:06 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ8Xx-0006NX-Si for xen-devel@lists.xenproject.org; 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Thu, 21 May 2026 11:55:04 -0700 (PDT) MIME-Version: 1.0 References: <998162706f89bb3100bda409d8fde3c8b143eae6.1777886129.git.mykola_kvach@epam.com> In-Reply-To: <998162706f89bb3100bda409d8fde3c8b143eae6.1777886129.git.mykola_kvach@epam.com> From: Mykola Kvach Date: Thu, 21 May 2026 21:54:52 +0300 X-Gm-Features: AVHnY4I-IpgjoYId6sqvHLdqAjJa9nS733RLjNqqzF66xXCS7KlCmc2D5iauR44 Message-ID: Subject: Re: [PATCH] xen/arm: scan CLIDR Ctype fields upwards when probing LLC To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Miccio , Carlo Nonato , Marco Solieri Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779389705-291763FF-D72511D3/0/0 X-purgate-type: clean X-purgate-size: 3964 Hi, Adding Luca, Carlo and Marco for visibility, as this patch touches code based on Luca's original work and signed off by Carlo and Marco. The patch already has Luca Fancellu's Reviewed-by. Please let me know if you have any concerns. Best regards, Mykola On Mon, May 4, 2026 at 12:21=E2=80=AFPM Mykola Kvach wrote: > > From: Mykola Kvach > > get_llc_way_size() currently scans CLIDR_EL1 Ctype fields from the > highest level downwards and stops at the first unified cache it finds. > > However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. > Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a > Ctype value of 0b000 while reading from Ctype1 upwards, no caches > manageable by the architected set/way maintenance instructions exist at > further-out levels, and the higher Ctype fields must be ignored. > > The current reverse scan can therefore select a unified cache level from > a Ctype field above the first no-cache level. Such a field is not part of > the architecturally described CLIDR/CCSIDR cache hierarchy and should not > be used for selecting the CCSIDR level. > > Scan Ctype fields from L1 upwards, stop at the first no-cache level, and > keep the outermost unified cache observed before that point. > > This preserves the result for regular cache hierarchies, while avoiding > selection of an architecturally ignored Ctype field. > > Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on ar= m64") > Signed-off-by: Mykola Kvach > --- > This patch follows the xen-devel discussion: > https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.htm= l > > In that thread, Michal noted that the reverse scan was a simplification > rather than an intentional requirement, and that changing the > implementation would be fine. > > Testing performed: > - standalone synthetic CLIDR tests covered both regular and pathological > Ctype sequences and showed that the forward scan ignores unified cache > levels above the first Ctype =3D=3D 0b000 while the reverse scan can pi= ck > them > - Renesas H3ULCB booted with llc-coloring=3Don > --- > xen/arch/arm/llc-coloring.c | 22 +++++++++++++++++----- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c > index 6f78817c57..3783f4c824 100644 > --- a/xen/arch/arm/llc-coloring.c > +++ b/xen/arch/arm/llc-coloring.c > @@ -22,21 +22,33 @@ unsigned int __init get_llc_way_size(void) > register_t id_aa64mmfr2_el1 =3D READ_SYSREG(ID_AA64MMFR2_EL1); > uint32_t ccsidr_numsets_shift =3D CCSIDR_NUMSETS_SHIFT; > uint32_t ccsidr_numsets_mask =3D CCSIDR_NUMSETS_MASK; > - unsigned int n, line_size, num_sets; > - > - for ( n =3D CLIDR_CTYPEn_LEVELS; n !=3D 0; n-- ) > + unsigned int n, line_size, num_sets, llc_level =3D 0; > + > + /* > + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Once = a > + * no-cache level is seen, higher Ctype fields are architecturally i= gnored > + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. > + * > + * Keep the outermost unified cache before that point. > + */ > + for ( n =3D 1; n <=3D CLIDR_CTYPEn_LEVELS; n++ ) > { > uint8_t ctype_n =3D (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & > CLIDR_CTYPEn_MASK; > > + if ( ctype_n =3D=3D 0b000 ) > + break; > + > /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ > if ( ctype_n =3D=3D 0b100 ) > - break; > + llc_level =3D n; > } > > - if ( n =3D=3D 0 ) > + if ( !llc_level ) > return 0; > > + n =3D llc_level; > + > WRITE_SYSREG((n - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); > isb(); > > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Thu May 21 19:30:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 19:30:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315857.1585517 (Exim 4.92) (envelope-from ) id 1wQ96R-0005PV-Fj; Thu, 21 May 2026 19:30:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315857.1585517; Thu, 21 May 2026 19:30:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ96R-0005PO-CA; Thu, 21 May 2026 19:30:43 +0000 Received: by outflank-mailman (input) for mailman id 1315857; Thu, 21 May 2026 19:30:41 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ96P-0005PI-Kb for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:30:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ96O-008ZcB-Dq for xen-devel@lists.xenproject.org; Thu, 21 May 2026 21:30:40 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f5d4b-5cb7-0a2a0a5109dd-0a2a4503b72e-26 for ; Thu, 21 May 2026 21:30:40 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f5d5f-672d-0a2a45030019-ac6904fea68a-3 for ; Thu, 21 May 2026 21:30:40 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 8F5BA60138; Thu, 21 May 2026 19:30:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 05A541F000E9; Thu, 21 May 2026 19:30:37 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779391838; bh=l1yAdQ2QHe1xE2WaVhmsySMvO+Wp1NH1plgIq8vy5A0=; h=Date:From:To:cc:Subject:In-Reply-To:References; b=Zu1fnxtLALCAt5kfT2j6qSXUr+DhBWaBEhi/zP/RyzdyNJ/TyWUExKLkAuKof6ozG MmIqwQEcup9heVMljoNJX7qhOr+A3jGvWhl7nD2WU/WKPh+Mw7ermim9oYcDVDPLG5 ZxRk1FNwaqQSfVcN5ZKfUo2cKQ6I9Mj5kmWIq8bhNlM5w9mI2FoeYl5RpwIBYsBAnP WlmgvM80aduO2QSUFf4e4MvHwyfuHxu5Yy3aGCsct4dQUXpvkxWdLxTpXqXguZBFNN QG0V/5tWMkGcTMI7AbqjNP2rrQhwPT18ltG6BqG34QOHTzpcj4PhAVbLaTp5eNp3IM SeJLvTxEsNZ4w== Date: Thu, 21 May 2026 12:30:37 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Cody Zuschlag , andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, xen-devel@lists.xenproject.org Subject: Re: [PATCH v2] docs/process: document AI-assisted patch tags In-Reply-To: <3e2ad5b9-ef65-41fd-87bf-823b98fa0c3d@suse.com> Message-ID: References: <20260519142011.30276-2-cody.zuschlag@gmail.com> <3e2ad5b9-ef65-41fd-87bf-823b98fa0c3d@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-33051d/1779391840-3AD63938-510CD7E4/0/0 X-purgate-type: clean X-purgate-size: 1945 On Thu, 21 May 2026, Jan Beulich wrote: > On 19.05.2026 16:20, Cody Zuschlag wrote: > > --- a/docs/process/sending-patches.pandoc > > +++ b/docs/process/sending-patches.pandoc > > @@ -195,6 +195,25 @@ E.g.: > > > > Requested-by: Jane Doe > > > > +### Assisted-by: > > + > > +This optional tag can be used when AI-assisted tooling contributed to the > > +preparation of a patch. > > Noticed only while reading your other email, plus checking the Linux > wording: s/can/should/ at the very least? (Personally I'd make it a > requirement.) > > > It is in the format: > > + > > + Assisted-by: [:] [tool...] > > + > > +E.g.: > > + > > + Assisted-by: Claude:claude-3-opus coccinelle sparse > > + Assisted-by: ChatGPT:gpt-5.5 > > + > > +Basic development tools, such as git, compilers, make, and editors, should > > +not be listed. > > + > > +The person submitting the patch remains responsible for reviewing any > > +AI-generated content and ensuring the contribution is correct, appropriate, > > +and compliant with Xen's contribution and licensing requirements. > > + > > ### Signed-off-by: > > > > This mandatory tag specifies the author(s) of a patch (for each author a > > @@ -209,6 +228,9 @@ E.g.: > > The author must be a natural person (not a team or just a company) and the > > `Signed-off-by:` tag must include the real name of the author (no pseudonym). > > > > +AI tools must not add `Signed-off-by:` tags, as only natural > > +persons can certify the `Developer's Certificate of Origin`. > > Linux emphasizes "MUST NOT". I think that's advisable for us as well. I > also wonder whether some of their other wording might be worth taking > verbatim, rather than making our own, slightly different variant. I agree with Jan's suggestion. Other than that: Acked-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Thu May 21 19:51:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 19:51:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315872.1585526 (Exim 4.92) (envelope-from ) id 1wQ9QJ-0001FQ-01; Thu, 21 May 2026 19:51:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315872.1585526; Thu, 21 May 2026 19:51:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ9QI-0001FJ-Tc; Thu, 21 May 2026 19:51:14 +0000 Received: by outflank-mailman (input) for mailman id 1315872; Thu, 21 May 2026 19:51:12 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ9QG-0001FD-UJ for xen-devel@lists.xenproject.org; Thu, 21 May 2026 19:51:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQ9QG-003jzv-0S for xen-devel@lists.xenproject.org; Thu, 21 May 2026 21:51:12 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f6215-5cb7-0a2a0a5109dd-0a2a450ac93e-14 for ; Thu, 21 May 2026 21:51:11 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f622e-56b3-0a2a450a0019-ac6904fec5ae-3 for ; Thu, 21 May 2026 21:51:11 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 0EED760098; Thu, 21 May 2026 19:51:10 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9C7E41F00A3B; Thu, 21 May 2026 19:51:09 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779393069; bh=j0gao7VKBf6CWO8/YA2Kiau76clnv0hA6lBej/2KwDc=; h=Date:From:To:cc:Subject:In-Reply-To:References; b=S9A+4TjO9VK6fn5xQYfa/2L5LLE9RvkkSECE6839T+WlexhpFe8dx1DTovOU+SAfp wPJdhgK5hf1zWIdrSUtE0a+Gumn9bQdSm2CS79F765oql/mOB1RdcH+HhMJO0UQnWb JvkK8q86lAMHaQCuCo9ffiGl/0jFmsUmHpRtAsYsuHL96v1MVuiVYC6RTcO8TKyhl3 q28ooFQjJHIE9fMJRIbnIMf6rASdeXvxiojfq3+a0YI3hwUs/uHE3a/KQq3XPTWmyA VIsPEH8DnI1tOhJ6HYmEtWlt8RG8SDOnJk7/rcfTO4uCfKOOxHMSSY38HFGHU8FRxJ HqxMtwTa9DG3A== Date: Thu, 21 May 2026 12:51:09 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: "xen-devel@lists.xenproject.org" , Stefano Stabellini , Andrew Cooper Subject: Re: [PATCH] CI: collect certain intermediate files as artifacts (part 2) In-Reply-To: Message-ID: References: User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-4011c0/1779393071-7035B8B7-37A23DE2/0/0 X-purgate-type: clean X-purgate-size: 1521 On Wed, 20 May 2026, Jan Beulich wrote: > Build issues may also surface for analysis jobs. Collect intermediate > files (if any) there as well. Include xen/.config too, since it's not > otherwise collected. > > Signed-off-by: Jan Beulich Reviewed-by: Stefano Stabellini > --- > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2536905486 > > --- a/automation/eclair_analysis/build.sh > +++ b/automation/eclair_analysis/build.sh > @@ -58,10 +58,21 @@ runtime_failures_docs() { > ( > runtime_failures_docs > > + ret=0 > + mkdir -p intermediates > make "-j${PROCESSORS}" "-l${PROCESSORS}.0" \ > "CROSS_COMPILE=${CROSS_COMPILE}" \ > "CC=${CC}" \ > "CXX=${CXX}" \ > "XEN_TARGET_ARCH=${XEN_TARGET_ARCH}" \ > - -C xen > + -C xen || ret=$? > + > + # Preserve Xen intermediate files. Some may be there only upon build failure. > + for f in xen/.config xen/.xen-syms.* xen/.xen.efi.*; do > + if [[ -f $f ]]; then > + cp $f intermediates/ > + fi > + done > + > + exit $ret > ) > --- a/automation/gitlab-ci/analyze.yaml > +++ b/automation/gitlab-ci/analyze.yaml > @@ -18,6 +18,7 @@ > - "${ECLAIR_OUTPUT_DIR}/*.txt" > - '*.log' > - '*.json' > + - intermediates/ > reports: > codequality: gl-code-quality-report.json > rules: > From xen-devel-bounces@lists.xenproject.org Thu May 21 20:18:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 20:18:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315891.1585534 (Exim 4.92) (envelope-from ) id 1wQ9qr-00066N-W2; Thu, 21 May 2026 20:18:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315891.1585534; Thu, 21 May 2026 20:18:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQ9qr-00066G-TL; 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The object-like macros '#define free xfree' perform unconditional text replacement, causing conflicts with struct field 'free' in 'page_info' unions. Function-like macros only match when followed by parentheses, allowing 'free' to be used both as a macro and as a struct field without conflicts. Applying function-like form to both 'malloc' and 'free' ensures consistent macro style. Signed-off-by: Dmytro Prokopchuk --- xen/common/decompress.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/common/decompress.h b/xen/common/decompress.h index 034c833665..df9fb9234f 100644 --- a/xen/common/decompress.h +++ b/xen/common/decompress.h @@ -9,8 +9,8 @@ #include #include =20 -#define malloc xmalloc_bytes -#define free xfree +#define malloc(a) xmalloc_bytes(a) +#define free(a) xfree(a) =20 #define large_malloc xmalloc_bytes #define large_free xfree --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 20:34:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 20:34:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315909.1585543 (Exim 4.92) (envelope-from ) id 1wQA6A-000121-9o; Thu, 21 May 2026 20:34:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315909.1585543; Thu, 21 May 2026 20:34:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQA6A-00011u-6Y; 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Thu, 21 May 2026 13:34:25 -0700 (PDT) Date: Thu, 21 May 2026 13:34:24 -0700 In-Reply-To: <7489ff3cc1ff402bf0ade38272fc52dcbcc75fc1.camel@amazon.co.uk> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-37-seanjc@google.com> <7489ff3cc1ff402bf0ade38272fc52dcbcc75fc1.camel@amazon.co.uk> Message-ID: Subject: Re: [PATCH v3 36/41] x86/kvmclock: Get local APIC bus frequency from PV CPUID Timing Info From: Sean Christopherson To: David Woodhouse Cc: "tglx@kernel.org" , "longli@microsoft.com" , "luto@kernel.org" , "alexey.makhalov@broadcom.com" , "jstultz@google.com" , "dave.hansen@linux.intel.com" , "ajay.kaher@broadcom.com" , "jan.kiszka@siemens.com" , "haiyangz@microsoft.com" , "kas@kernel.org" , "pbonzini@redhat.com" , "kys@microsoft.com" , "decui@microsoft.com" , "daniel.lezcano@kernel.org" , "wei.liu@kernel.org" , "peterz@infradead.org" , "jgross@suse.com" , "boris.ostrovsky@oracle.com" , "linux-coco@lists.linux.dev" , "kvm@vger.kernel.org" , "mhklinux@outlook.com" , "thomas.lendacky@amd.com" , "linux-kernel@vger.kernel.org" , "bcm-kernel-feedback-list@broadcom.com" , "tglx@linutronix.de" , "nikunj@amd.com" , "xen-devel@lists.xenproject.org" , "linux-hyperv@vger.kernel.org" , "vkuznets@redhat.com" , "rick.p.edgecombe@intel.com" , "virtualization@lists.linux.dev" , "sboyd@kernel.org" , "x86@kernel.org" Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-42698a/1779395668-1B979F3B-FE8F1F62/0/0 X-purgate-type: clean X-purgate-size: 1565 On Wed, May 20, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > When running as a KVM guest with kvmclock support enabled, stuff the APIC > > timer period/frequency with the local APIC bus frequency reported in > > CPUID.0x40000010.EBX instead of trying to calibrate/guess the frequency. > > > > See Documentation/virt/kvm/x86/cpuid.rst for details. > > > > Signed-off-by: Sean Christopherson > > I still don't much like the way this is done inside kvm_get_tsc_khz(). Yeah, I don't like it either (understatement). Aha! native_calibrate_tsc() is the oddball, all of the PV flows stuff lapic_timer_period when parsing the initial timing info. I'll just do that. Blindly writing a global is all kinds of fugly, but that's a future problem to solve. > We also probably ought to be looking for the timing leaf on other > hypervisors including VMware VMware gets the frequency via hypercall. Why, I have no idea. I'll let the VMware folks deal with that. eax = vmware_hypercall3(VMWARE_CMD_GETHZ, UINT_MAX, &ebx, &ecx); > and probably Bhyve too. Should it be done somewhere else? I'm not opposed to that, though I don't know that it'd be a net positive. The "hard" part of getting the info is finding the CPUID base and checking if the leaf is available. Unlike the native CPUID leaf, no math is necessary, and so once the leaf is obtained, getting the frequency is trivial. Regardless, I definitely don't want to take it on in this series. :-) From xen-devel-bounces@lists.xenproject.org Thu May 21 20:36:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 20:36:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315914.1585552 (Exim 4.92) (envelope-from ) id 1wQA7a-0001WS-IQ; Thu, 21 May 2026 20:35:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315914.1585552; Thu, 21 May 2026 20:35:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQA7a-0001WL-FY; Thu, 21 May 2026 20:35:58 +0000 Received: by outflank-mailman (input) for mailman id 1315914; Thu, 21 May 2026 20:35:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3qWwPagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 1wQA7Z-0001WD-2p for xen-devel@lists.xenproject.org; Thu, 21 May 2026 20:35:57 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQA7Y-004QRX-Bf for xen-devel@lists.xenproject.org; Thu, 21 May 2026 22:35:56 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <3qWwPagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 6a0f6c6b-5cb7-0a2a0a5109dd-0a2a45068c0e-42 for ; Thu, 21 May 2026 22:35:56 +0200 Received: from [209.85.214.201] (helo=mail-pl1-f201.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <3qWwPagYKCRgG2yB704CC492.0CAL2B-12J2996GHG.L2BDFC720H.CF4@flex--seanjc.bounces.google.com>) id 6a0f6caa-7371-0a2a45060019-d155d6c9ecb0-3 for ; Thu, 21 May 2026 22:35:56 +0200 Received: by mail-pl1-f201.google.com with SMTP id d9443c01a7336-2baf7378ad0so68158605ad.0 for ; Thu, 21 May 2026 13:35:55 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779395754; x=1780000554; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=ipWhDnS3c8Of+slJErBTF5Vqt6ODkaCbWe9MFVov0zI=; b=ntZh7ZXBaSWRovqlpnIIgMPqdo4tu3T694iSQ13t9k3MjuKmkiemJ2X4FwkET2PuY+ wuhmdYYaDOwT9dVloSv3eWUWq8VK0hyJVw80qTsDMlhH5Wj0dCvLcdk4uF82uWwxGDas lzeK83bpH7quj3SaT6BX2HvOWFI2icv4P2N8A+GDoSSc//4XWJHLXbk75VCBf6sux1/t Z/NeQiAsHTl1QzpnnSBNK3JqSKL/qEpRoVstu9bycH65ZdJhzI8Ls+16Lc5lUtvEcxBD lamocgY/GEx5jcUiYFexm0Kn+LACONtRufcgQxguaQVuA4lgueeOgXcW3aTRlGCuIkC+ Yd/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779395754; x=1780000554; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=ipWhDnS3c8Of+slJErBTF5Vqt6ODkaCbWe9MFVov0zI=; b=AcH+W1v0kMmJ/sAKjHl1xPqBQNwCl/tn+XLg7MvFLSJlMJaQE6mzS4abm74DP2YMpU +3STs+qNv9u5zsYNRbxvTceFDy/82HUZ1kFoeWPLgxmvHA33mH15Hk6VN+nCEGRnCDDC FOWCl8lpbPiT9d0WlZ4sW8K2/wctHUFE/xYduuh43iwPZhUTAjkwrAff8vryRF7Z+LD8 M6Kpzp/+rp3uMj8NUHI7yt1wuKNl4JfGgUWsmCDttadBwxdPJhz+Tx4xvdydCaa5/PJK 64B/6c8dbNadQlgvhmE6nUT2SIKvb7RvmGZmU+VCPIszqm57Uxt0CDnXfpBRoQo1GozS YRzQ== X-Forwarded-Encrypted: i=1; AFNElJ/qO7K6H25Araqe+h0JW/TEHA8RGz7UwrYrmjd9HR6l26MuAkCIKaB22DMRfc6qKNAItfHwqPGQdGc=@lists.xenproject.org X-Gm-Message-State: AOJu0YzlrHZYkfPtP/gBbjRTVTJ8PoF0VnzvIsHrygJrAWwMLo+GKYn5 hsNja88+Bpw1zBu0N0vgtVXtCvG6CNTTCEAo5MmfIKd1blL9s7/TFaKzOr7a/RAWZWBR2Aguw+0 E7ofRHg== X-Received: from pglv7.prod.google.com ([2002:a63:1507:0:b0:c80:192c:51ff]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:d491:b0:3b2:8677:813e with SMTP id adf61e73a8af0-3b328ec5909mr476744637.42.1779395753857; Thu, 21 May 2026 13:35:53 -0700 (PDT) Date: Thu, 21 May 2026 13:35:53 -0700 In-Reply-To: <13d79ba1e0450068c9573ccd8deb3ec007aea8d6.camel@infradead.org> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-30-seanjc@google.com> <13d79ba1e0450068c9573ccd8deb3ec007aea8d6.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 29/41] x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779395756-8D387D75-F3CD5B9E/0/0 X-purgate-type: clean X-purgate-size: 909 On Thu, May 21, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > Add a return code to __paravirt_set_sched_clock() so that the kernel ca= n > > reject attempts to use a PV sched_clock without breaking the caller.=C2= =A0 E.g. > > when running as a CoCo VM with a secure TSC, using a PV clock is genera= lly > > undesirable. > >=20 > > Note, kvmclock is the only PV clock that does anything "extra" beyond > > simply registering itself as sched_clock, i.e. is the only caller that > > needs to check the new return value. > >=20 > > Signed-off-by: Sean Christopherson >=20 > Oooh... can we use this to reject the kvmclock when we have a stable > and reliable TSC even for non-CoCo guests? Yes, but I would much rather "fix" kvmclock to not even attempt to register= itself as the sched_clock (which this series does). From xen-devel-bounces@lists.xenproject.org Thu May 21 20:53:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 20:53:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315927.1585562 (Exim 4.92) (envelope-from ) id 1wQAOj-0005hI-Ty; Thu, 21 May 2026 20:53:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315927.1585562; Thu, 21 May 2026 20:53:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQAOj-0005hB-Qt; Thu, 21 May 2026 20:53:41 +0000 Received: by outflank-mailman (input) for mailman id 1315927; Thu, 21 May 2026 20:53:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <30HAPagYKCUc1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 1wQAOi-0005h5-52 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 20:53:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQAOh-004TER-E5 for xen-devel@lists.xenproject.org; Thu, 21 May 2026 22:53:39 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <30HAPagYKCUc1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 6a0f70a2-e002-0a2a0a5209dd-0a2a4506b134-18 for ; Thu, 21 May 2026 22:53:39 +0200 Received: from [209.85.210.201] (helo=mail-pf1-f201.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <30HAPagYKCUc1njwslpxxpun.lxv6nw-mn4nuur121.6nwy0xsnl2.x0p@flex--seanjc.bounces.google.com>) id 6a0f70d1-7371-0a2a45060019-d155d2c9e1d3-3 for ; Thu, 21 May 2026 22:53:39 +0200 Received: by mail-pf1-f201.google.com with SMTP id d2e1a72fcca58-8353fbc7ad5so3306944b3a.3 for ; Thu, 21 May 2026 13:53:38 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779396817; x=1780001617; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=mtuSO9Df1yE7JlouGMlcWCEpEnvAH6qlC/HYl6ROkD4=; b=OSwruEvJMq1hIQHF8ejpwsQW1CDi8rgR2ypgBuXP8Lox1IDV53jRsfd6geFTJz39Nt R0YPwdHcpWR6s40D3RdbcJlg+bngIDV6bFr56DS3DOkvYwzsEgj/iOqNi31WV8Uk+IqY z4EsHWircUucj6IoN3lOcupj8C3KoqjoPFm1b5w4xY7+JPhBMrVLFlZhFDT7usHompDG SkNFFDtgiYobgGCIuq2G7ucCwIVcvq2jZm33rKXElr9HzCP+02eKa0mm29iJK3WMqPmq xYHje6hZ2Sod7tzhdq5dTQ95unbP6IXo4ji79ec0Y94asfxKSU0lWWeoP7TAzhOKMhxk 3NPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779396817; x=1780001617; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=mtuSO9Df1yE7JlouGMlcWCEpEnvAH6qlC/HYl6ROkD4=; b=pdVeWN+z/On+ttjm7trDKkG435gzvGaCoYpbxt7balqseL7gfxfRv+ZM620YxgisT5 9lzWJowFIYAkZpUkyKhRIP14yN4oBqiVtZYqZk0DHserkVL/44NNW2Usol4OkdqapcXV kZvIjwzp2X5e7Wc2qQOggOpFUFzbOFEcYwbTMdBx2m0J//QpGGvKLDdoIoXRpSqT+0l3 2XGc8V3gIthtU08R3nCXPFsn69raiN6nLCE1HkgzX4bt7Rpk+v4bq91u73qL2ttpgx+O 9H5vecGP4PezCvBVMd6LGDM7FZFQO70qYdRp1q4d27R9idrYgQZg58ODROvxxwCwHFSz 9wWQ== X-Forwarded-Encrypted: i=1; AFNElJ86hW8nbweT8Df81btvPDYeIn9hllcT2GD5lkPO0Wx/isFON3QgCb7R+askAL4lIUMdAsZC1ycXLEU=@lists.xenproject.org X-Gm-Message-State: AOJu0YzO4NDgPA2vJmwfrWifDkNufMwXm8G1IRfhJ280w/MbR9mo5qOj jZ8+MDnX1zRqi/RogGX1wNEi+8TQfHRMP6M0v6bJpsBztzkbkqtPBZ+bvoVce9rmlVHdx0hRK8G OxTQtvA== X-Received: from pfbg21.prod.google.com ([2002:a05:6a00:ae15:b0:82f:915e:291f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:3e06:b0:837:b97d:2fe with SMTP id d2e1a72fcca58-8415f18b012mr734843b3a.18.1779396816710; Thu, 21 May 2026 13:53:36 -0700 (PDT) Date: Thu, 21 May 2026 13:53:35 -0700 In-Reply-To: <44e0d60548d317fd59895f18bd17220dfb2f834b.camel@infradead.org> Mime-Version: 1.0 References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-3-seanjc@google.com> <44e0d60548d317fd59895f18bd17220dfb2f834b.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779396819-8757ED75-AB378057/0/0 X-purgate-type: clean X-purgate-size: 4753 On Wed, May 20, 2026, David Woodhouse wrote: > On Fri, 2026-05-15 at 12:19 -0700, Sean Christopherson wrote: > > Add a helper to register non-native, i.e. PV and CoCo, CPU and TSC > > frequency calibration routines.=C2=A0 This will allow consolidating han= dling > > of common TSC properties that are forced by hypervisor (PV routines), > > and will also allow adding sanity checks to guard against overriding a > > TSC calibration routine with a routine that is less robust/trusted. > >=20 > > Make the CPU calibration routine optional, as Xen (very sanely) doesn't > > assume the CPU runs as the same frequency as the TSC. > >=20 > > Wrap the helper in an #ifdef to document that the kernel overrides > > the native routines when running as a VM, and to guard against unwanted > > usage.=C2=A0 Add a TODO to call out that AMD_MEM_ENCRYPT is a mess and = doesn't > > depend on HYPERVISOR_GUEST because it gates both guest and host code. > >=20 > > No functional change intended. > >=20 > > Reviewed-by: Michael Kelley > > Tested-by: Michael Kelley > > Signed-off-by: Sean Christopherson >=20 > Mildly concerned that we might want to support multiple options =E2=80=94= does > it have CPUID 0x15? Does it have 0x40000x10? Does it have a pvclock? > There are various permutations of those which are perhaps best handled > by *trying* each one, in some order, and populating a struct with the > answers? >=20 > But on the basis that perfect is the enemy of good, This has been bothering me too. Aha! AHA! Idea. ... 4 hours later ... Mhahahaahah, victory is mine!!!! TL;DR: Overriding x86_platform_ops hooks is dumb. To your point about making an informed decision, that's essentialy what thi= s series is already doing, just in a very roundabout way: 1. x86_platform.calibrate_{cpu,tsc}() are initialized to "native" version= s 2. Hypervisor init code runs and conditionally overrides calibrate_{cpu,t= sc}() 3. CoCo init code runs and conditionally overrides calibrate_{cpu,tsc}() So the ordering you want is already there, as is "trying" each source to so= me extent, in the form of steps #2 and #3 overriding the hooks if and only if = their source of information is valid. For all intents and purposes, the hardenin= g I was adding by formalizing the calibration overrides was to enforce the abov= e ordering. But that's obviously all but impossible to follow, _and_ it's pointless. For every PV case, including TDX and SNP, "calibration" is simply informati= on retrieval, i.e. it never changes (barring broken hypervisors/firmware), and= the information is always available during early boot. Contrast that with the pre-CPUID CPU frequency calibration, where the frequ= ency might change, the kernel is making a best guest based on other timekeeping = sources, and not all timekeeping sources are available during early boot. And so overriding x86_platform.calibrate_{cpu,tsc}() for PV code is complet= ely unecessary, because steps #2 and #3 already know the frequency when they ov= erride the hooks, and "success" is guaranteed, i.e. the kernel won't have to switc= h to a "late" calibration flow. If we provide x86_hyper_init hooks: unsigned int (*get_tsc_khz)(void); unsigned int (*get_cpu_khz)(void); then we can kill off x86_platform.calibrate_{cpu,tsc}() entirely, explicitl= y define the preferred ordering (user-forced =3D> CoCo =3D> Hypervisor =3D> n= ative), and depup some of the hypervisor code. E.g. this is what I've got for the early flow. Testing now.=20 void __init tsc_early_init(void) { unsigned int known_cpu_khz =3D 0, known_tsc_khz =3D 0; if (!boot_cpu_has(X86_FEATURE_TSC)) return; /* Don't change UV TSC multi-chassis synchronization */ if (is_early_uv_system()) return; if (x86_init.hyper.get_cpu_khz) known_cpu_khz =3D x86_init.hyper.get_cpu_khz(); if (tsc_early_khz) known_tsc_khz =3D tsc_early_khz; else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) known_tsc_khz =3D snp_secure_tsc_init(); else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) known_tsc_khz =3D tdx_tsc_init(); /* * If the TSC frequency is still unknown, i.e. not provided by the user * or by trusted firmware, try to get it from the hypervisor (which is * untrusted when running as a CoCo guest). */ if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) known_tsc_khz =3D x86_init.hyper.get_tsc_khz(); if (known_tsc_khz) setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); if (!determine_cpu_tsc_frequencies(true, known_cpu_khz, known_tsc_khz)) return; tsc_enable_sched_clock(); } From xen-devel-bounces@lists.xenproject.org Thu May 21 21:01:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 21:01:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315938.1585572 (Exim 4.92) (envelope-from ) id 1wQAWU-0007Zj-LW; Thu, 21 May 2026 21:01:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315938.1585572; Thu, 21 May 2026 21:01:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQAWU-0007Zc-Hz; Thu, 21 May 2026 21:01:42 +0000 Received: by outflank-mailman (input) for mailman id 1315938; Thu, 21 May 2026 21:01:40 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3sHIPagYKCSsZLHUQJNVVNSL.JVTeLU-KLcLSSPZaZ.eLUWYVQLJa.VYN@flex--seanjc.bounces.google.com>) id 1wQAWS-0007YE-Ol for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-42698a/1779397299-19165F3B-09F33C45/0/0 X-purgate-type: clean X-purgate-size: 1778 On Thu, May 21, 2026, Dongli Zhang wrote: > On 2026-05-15 12:19 PM, Sean Christopherson wrote: > > Prefer the TSC over kvmclock for sched_clock if the TSC is constant, > > nonstop, and not marked unstable via command line. I.e. use the same > > criteria as tweaking the clocksource rating so that TSC is preferred over > > kvmclock. Per the below comment from native_sched_clock(), sched_clock > > is more tolerant of slop than clocksource; using TSC for clocksource but > > not sched_clock makes little to no sense, especially now that KVM CoCo > > guests with a trusted TSC use TSC, not kvmclock. > > > > /* > > * Fall back to jiffies if there's no TSC available: > > * ( But note that we still use it if the TSC is marked > > * unstable. We do this because unlike Time Of Day, > > * the scheduler clock tolerates small errors and it's > > * very important for it to be as fast as the platform > > * can achieve it. ) > > */ > > > > The only advantage of using kvmclock is that doing so allows for early > > and common detection of PVCLOCK_GUEST_STOPPED, but that code has been > > broken for over two years with nary a complaint, i.e. it can't be > > _that_ valuable. And as above, certain types of KVM guests are losing > > the functionality regardless, i.e. acknowledging PVCLOCK_GUEST_STOPPED > > needs to be decoupled from sched_clock() no matter what. > > Has it been broken for two years because of pvclock_clocksource_read_nowd()? Yep. Because pvclock_clocksource_read_nowd() ignores PVCLOCK_GUEST_STOPPED, the flag only ever gets recognized when the kernel reads WALL_CLOCK, which AFAICT only happens at initial boot, and during suspend and resume. From xen-devel-bounces@lists.xenproject.org Thu May 21 21:02:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 21:02:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315947.1585579 (Exim 4.92) (envelope-from ) id 1wQAWz-0008Lk-1O; Thu, 21 May 2026 21:02:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315947.1585579; Thu, 21 May 2026 21:02:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQAWy-0008Ld-V3; Thu, 21 May 2026 21:02:12 +0000 Received: by outflank-mailman (input) for mailman id 1315947; Thu, 21 May 2026 21:02:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQAWw-0008Fs-ET for xen-devel@lists.xenproject.org; Thu, 21 May 2026 21:02:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQAWv-004UOb-8A for xen-devel@lists.xenproject.org; Thu, 21 May 2026 23:02:09 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f72c6-bab6-0a2a0a5309dd-0a2a4501a4fa-10 for ; Thu, 21 May 2026 23:02:08 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f72d0-c1f2-0a2a45010019-5a9b3222d494-3 for ; Thu, 21 May 2026 23:02:08 +0200 Received: from 54-240-197-239.amazon.com ([54.240.197.239] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQAWj-000000091X0-14bj; Thu, 21 May 2026 21:01:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=iLoELKLWpDGPgksb84jNueZXasbLhpDKcJu4JpBYNBE=; b=ZrG/hxvDxHGHTiiXy3ON4tSZFz LJTsZov20Do9F/YMSJKdHj/MX3xATnTPBDT5jLmmVf8P9jNjSOkomt1bMFh+PcWXKzoaf8bdBRSiq Zp88nHZ1QRYphW4zRvSuB2jflAoaPHN0YFdWr7GSkzb1bPnLvFxvhfIfM9Yavtxhz43x1bRVfDiwM C0OMqUR0V2kk4mmGXajNGr+augHkMleedpDaQwZnD2d9sOYgTuSpFkkOULIe1DmcY65j3p/Yyom4w T5dcNTitjcNCUnkWi117TFh01tiK6Gqrtu8bfisMU8HqIdJDt7ZxnbLVNRDXbif7JnQnTmrygv4Qi KUAZh6ng==; Message-ID: <342098f6bfe1e4c7b233433df8f79713b4220614.camel@infradead.org> Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: David Woodhouse To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 22:01:55 +0100 In-Reply-To: References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-3-seanjc@google.com> <44e0d60548d317fd59895f18bd17220dfb2f834b.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-tb6au8i+ZytuAIdzKd7A" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d62444/1779397328-B655DFF4-3409E52C/0/0 X-purgate-type: clean X-purgate-size: 8726 --=-tb6au8i+ZytuAIdzKd7A Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2026-05-21 at 13:53 -0700, Sean Christopherson wrote: >=20 > E.g. this is what I've got for the early flow.=C2=A0 Testing now.=20 >=20 > =C2=A0 void __init tsc_early_init(void) > =C2=A0 { > unsigned int known_cpu_khz =3D 0, known_tsc_khz =3D 0; >=20 > if (!boot_cpu_has(X86_FEATURE_TSC)) > return; > /* Don't change UV TSC multi-chassis synchronization */ > if (is_early_uv_system()) > return; >=20 > if (x86_init.hyper.get_cpu_khz) > known_cpu_khz =3D x86_init.hyper.get_cpu_khz(); >=20 > if (tsc_early_khz) > known_tsc_khz =3D tsc_early_khz; > else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) > known_tsc_khz =3D snp_secure_tsc_init(); > else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) > known_tsc_khz =3D tdx_tsc_init(); >=20 > /* > * If the TSC frequency is still unknown, i.e. not provided by the user > * or by trusted firmware, try to get it from the hypervisor (which is > * untrusted when running as a CoCo guest). > */ > if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) > known_tsc_khz =3D x86_init.hyper.get_tsc_khz(); >=20 > if (known_tsc_khz) > setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); >=20 > if (!determine_cpu_tsc_frequencies(true, known_cpu_khz, known_tsc_khz)) > return; > tsc_enable_sched_clock(); > =C2=A0 } That seems reasonable. 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<342098f6bfe1e4c7b233433df8f79713b4220614.camel@infradead.org> Message-ID: Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: Sean Christopherson To: David Woodhouse Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779398248-40F753FF-922242DB/0/0 X-purgate-type: clean X-purgate-size: 2245 On Thu, May 21, 2026, David Woodhouse wrote: > On Thu, 2026-05-21 at 13:53 -0700, Sean Christopherson wrote: > >=20 > > E.g. this is what I've got for the early flow.=C2=A0 Testing now.=20 > >=20 > > =C2=A0 void __init tsc_early_init(void) > > =C2=A0 { > > unsigned int known_cpu_khz =3D 0, known_tsc_khz =3D 0; > >=20 > > if (!boot_cpu_has(X86_FEATURE_TSC)) > > return; > > /* Don't change UV TSC multi-chassis synchronization */ > > if (is_early_uv_system()) > > return; > >=20 > > if (x86_init.hyper.get_cpu_khz) > > known_cpu_khz =3D x86_init.hyper.get_cpu_khz(); > >=20 > > if (tsc_early_khz) > > known_tsc_khz =3D tsc_early_khz; > > else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) > > known_tsc_khz =3D snp_secure_tsc_init(); > > else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) > > known_tsc_khz =3D tdx_tsc_init(); > >=20 > > /* > > * If the TSC frequency is still unknown, i.e. not provided by the use= r > > * or by trusted firmware, try to get it from the hypervisor (which is > > * untrusted when running as a CoCo guest). > > */ > > if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) > > known_tsc_khz =3D x86_init.hyper.get_tsc_khz(); > >=20 > > if (known_tsc_khz) > > setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); > >=20 > > if (!determine_cpu_tsc_frequencies(true, known_cpu_khz, known_tsc_khz)= ) > > return; > > tsc_enable_sched_clock(); > > =C2=A0 } >=20 > That seems reasonable. Where does the call to native_calibrate_tsc() > happen; is that from determine_cpu_tsc_frequencies()?=20 Yep. static bool __init determine_cpu_tsc_frequencies(bool early, unsigned int known_cpu_khz, unsigned int known_tsc_khz) { /* Make sure that cpu and tsc are not already calibrated */ WARN_ON(cpu_khz || tsc_khz); if (early) { /* * Early CPU calibration can only use methods that are available * early in boot (obviously). */ if (known_cpu_khz) cpu_khz =3D known_cpu_khz; else cpu_khz =3D native_calibrate_cpu_early(); if (known_tsc_khz) tsc_khz =3D known_tsc_khz; else tsc_khz =3D native_calibrate_tsc(); } else { cpu_khz =3D pit_hpet_ptimer_calibrate_cpu(); } ... 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This makes strings such as ",2-6", "-10,19-20" or > "1,,2" look as if an empty value was color 0. > > Also fix the DT color parsing error message by adding the missing > newline and including the domain ID, matching the style of the color > validation error below. > > Fixes: 6cdea3444eaf ("xen/arm: add Dom0 cache coloring support") > Signed-off-by: Mykola Kvach > Reviewed-by: Michal Orzel Looks good, thanks! Reviewed-by: Denis Mukhin From xen-devel-bounces@lists.xenproject.org Thu May 21 21:38:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 21:38:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1315986.1585606 (Exim 4.92) (envelope-from ) id 1wQB5n-0007IU-2K; Thu, 21 May 2026 21:38:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1315986.1585606; Thu, 21 May 2026 21:38:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQB5m-0007IN-Vt; Thu, 21 May 2026 21:38:10 +0000 Received: by outflank-mailman (input) for mailman id 1315986; Thu, 21 May 2026 21:38:09 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQB5l-0007H7-Ai for xen-devel@lists.xenproject.org; Thu, 21 May 2026 21:38:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQB5k-004QCS-Nf for xen-devel@lists.xenproject.org; Thu, 21 May 2026 23:38:08 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f7b06-5cb7-0a2a0a5109dd-0a2a45068074-24 for ; Thu, 21 May 2026 23:38:08 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f7b3f-7371-0a2a45060019-5a9b3222d02c-3 for ; Thu, 21 May 2026 23:38:07 +0200 Received: from 54-240-197-239.amazon.com ([54.240.197.239] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQB5W-000000094VX-0s0t; Thu, 21 May 2026 21:37:56 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=sto4vrdGp1xVl4xxluQsgqhSN4UEkQ/MLv3WN0D9yfk=; b=LXuT3nYEMlTaLuHFZsDAwQQvD9 pfHkh+x/71+8eRSzLdbvIb+OkRxVn+tiRFMYGWHM7wM8LBg1x2bFQ+M5AHHQrhQeQMW0MPHL5wvYy RUqo2JBmVRWytz/ctqc2HPucGt82uc+lZyOMeI71JDmbBiynF84n7QBT3V1RoVmA1Ij91D73WiRra It3PtIKXpGwPeoVfphgLTvCkr8EnW66WQua5aZbvBpPUumSBqmcmrLkCiwtg+PR4/TAiaPLgYMft7 VsfAGiDbelE3Slzj1KKF5w1MGZC5JtqkO4SxcNNPBF+kUIbeMPkkB7+6Oi5X77Z82swELNGdJuL8D z9VxHj8A==; Message-ID: Subject: Re: [PATCH v3 02/41] x86/tsc: Add helper to register CPU and TSC freq calibration routines From: David Woodhouse To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner Date: Thu, 21 May 2026 22:37:52 +0100 In-Reply-To: References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-3-seanjc@google.com> <44e0d60548d317fd59895f18bd17220dfb2f834b.camel@infradead.org> <342098f6bfe1e4c7b233433df8f79713b4220614.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-0JYzVT5JMNJwWPKngpYY" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779399487-8E78DD75-CCA3CCFE/0/0 X-purgate-type: clean X-purgate-size: 8941 --=-0JYzVT5JMNJwWPKngpYY Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2026-05-21 at 14:17 -0700, Sean Christopherson wrote: > =C2=A0 > > That seems reasonable. Where does the call to > > native_calibrate_tsc() > > happen; is that from determine_cpu_tsc_frequencies()?=20 >=20 > Yep. Great, thanks. > static bool __init determine_cpu_tsc_frequencies(bool early, > unsigned int > known_cpu_khz, > unsigned int > known_tsc_khz) > { > /* Make sure that cpu and tsc are not already calibrated */ > WARN_ON(cpu_khz || tsc_khz); >=20 > if (early) { > /* > * Early CPU calibration can only use methods that > are available > * early in boot (obviously). > */ > if (known_cpu_khz) > cpu_khz =3D known_cpu_khz; > else > cpu_khz =3D native_calibrate_cpu_early(); > if (known_tsc_khz) > tsc_khz =3D known_tsc_khz; > else > tsc_khz =3D native_calibrate_tsc(); > } else { > cpu_khz =3D pit_hpet_ptimer_calibrate_cpu(); > } If, after all that, we still end up in the case where we *do* have to calibrate it against a legacy timer (which sadly IIRC is the case even on some fairly modern AMD generations), could we round the answer? We currently have *far* more precision than accuracy, leading to values like 2399997kHz which change every boot (and end up being what gets *advertised* to guests on such a host... and then unless we're careful to avoid it, we end up trying to *scale* a different host's TSC down from 2399998 to 2399997 for a guest which is migrated from the first host...) We should just fix them (e.g. to 2400000kHz) and let NTP sort them out. Something like "round to the nearest MHz if that's within =C2=B110PPM"? --=-0JYzVT5JMNJwWPKngpYY Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:To:From:Subject:Message-ID:Sender:Reply-To:Cc: Content-Transfer-Encoding:Content-ID:Content-Description; bh=lQm3XTbI80oVhehBjbAuKtJa9CPDd69/S5bnpm9lMHU=; b=YIYHCGEZRxwx/UUbFZUWbgIEQQ gIewyfR79ILiDfa4YbMDamIBYvhGuG2PXygUjdfM5S4xzCBmnFvsv/mWxbs2Pvnu169oxJY1aXqD5 gP/NgJZdzLDQmP9Yx0D5Aylx+VnmjB/r9e9G9FBmketmaAuA9n602778rHHKHgTAthZLtdKGiEj0u hyzYy0a6I/0MccuSvdzG//WMVsLbGT0sQyfoeck+KJo0IAfLsPmH916B6aB7REqHPci+AkAQ8vFoT Z2SufJoWcwXGklfEYAdWkbLUbGcBQxVnTiq8mew7nfTXVVWxrgI3dljn1l057r54TuLgM1LbzwV8Q J3WG9daA==; Message-ID: <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: David Woodhouse To: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Sean Christopherson , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Thu, 21 May 2026 22:52:51 +0100 In-Reply-To: <20260509224824.3264567-28-dwmw2@infradead.org> References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-kieuLTxJtkGwFtplrKxg" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-d25034/1779400385-F4C79CF5-A8603D8F/0/0 X-purgate-type: clean X-purgate-size: 8988 --=-kieuLTxJtkGwFtplrKxg Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Sat, 2026-05-09 at 23:46 +0100, David Woodhouse wrote: > From: David Woodhouse >=20 > Add a read-only per-vCPU attribute that reports the effective TSC and > APIC bus frequencies as seen by the guest, after hardware TSC scaling > is applied. >=20 > This allows userspace to populate CPUID leaf 0x40000010 (the "generic" > timing information leaf used by FreeBSD, XNU, and VMware) with correct > values, without KVM needing to modify guest CPUID at runtime. >=20 > The effective TSC frequency differs from what userspace requested via > KVM_SET_TSC_KHZ due to the granularity of hardware scaling and the > host kernel's measurement of its own TSC frequency. As I do another pass on this series, I don't think I can stand by that claim. Even on AMD where we only have a 32-bit shift for TSC scaling, that's still 0.23 PPM, or about half a Hz precision when scaling a 2400MHz TSC. And this API was returning kHz anyway! So it was as likely to be *introducing* inaccuracy by returning 2299999kHz when userspace had actually asked for 2300000 and the real rate ended up being 2399999.9995. I think I'll drop it; and userspace should just use KVM_GET_TSC_KHZ. That does leave userspace still needing a way to get the APIC bus frequency, to populate CPUID. So maybe I'll just make an attribute which returns that as a single value. Or *maybe* KVM should just populate leaf 0x40000010 in its default template? I thought we decided not to do that though, as unsuspecting userspace might pass it through uncorrected from the default values? We could put *zero* in the TSC part, but that just seems like it's another potential weirdness for the guest to see. --=-kieuLTxJtkGwFtplrKxg Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 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tzzQIEOlBZbcHN34AoQmeQJrEJTLwsdX8Ze+L8kM5eced6RJKg== X-Mailer: SER-76bead168636dc6ed1c9e51ce4dea80dbdd4163750742b614a4d871e565792b7 X-Cloudmark-MID: QBb9wAeoTl9zvQBbAwKNpt X-Proofpoint-CID: eb09f7eb-2dc2-34ab-a188-7b293c1db1fe From: dmukhin@ford.com Date: Thu, 21 May 2026 15:10:35 -0700 To: Mykola Kvach Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , Roger Pau =?iso-8859-1?Q?Monn=E9?= , "Daniel P. Smith" Subject: Re: [RFC PATCH] device-tree: size first hwdom bank for boot modules Message-ID: References: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> PSER-M365-App: SER-APP X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-21_04,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 phishscore=0 suspectscore=0 bulkscore=0 adultscore=0 lowpriorityscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605210223 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS2PEPF000061C6:EE_|EA2PR16MB6204:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c7232c3-645d-4ec5-d8ba-08deb785cb75 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|1800799024|376014|82310400026|22082099003|18002099003|56012099003|5023799004|11063799006; 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I would try to add a CI coverage for QEMU aarch64 tests, since QEMU supports multiple RAM banks topology. What do you think? Also, few remarks below. On Sun, May 17, 2026 at 11:57:56PM +0300, Mykola Kvach wrote: > From: Mykola Kvach > > With LLC coloring enabled, the hardware domain memory comes from > allocate_hwdom_memory(), not from the fixed direct-map banks used when > coloring is off. > > Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for > DMA") made that allocator sort free host regions by ascending address so > Dom0 gets DMA-capable low memory first. The first bank filter still only > required 128MB. That can select a low region which is large enough for > the heuristic, but not large enough for place_modules() to put the Dom0 > kernel, generated DTB and initrd contiguously in bank 0. > > Ask arch code for any additional first-bank size requirement. On Arm, > compute it from the actual Dom0 kernel placement, rounded initrd size and > generated DTB size hint. For 64-bit Image kernels, include the text offset > from the candidate bank start, because the returned requirement is compared > with a bank size measured from that start. The hint covers both the normal > Device Tree path and the minimal DTB created for ACPI boot. > > Check the first-bank threshold against the size which will actually be > assigned to Dom0, after capping the host region by the remaining unassigned > Dom0 memory. Otherwise a large host region could pass the test but still > produce a first guest bank too small for place_modules(). > > Use the typed min()/max() helpers for this normal allocation arithmetic; > MIN()/MAX() are intended for preprocessor-style contexts and skip the type > checking provided by the lowercase helpers. > > This keeps the DMA-oriented allocation policy from de99f3263555 while > preventing a too-small bank 0 from reaching place_modules(). > > Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") > Signed-off-by: Mykola Kvach > --- > Test/setup notes: > > The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) > arm64 board booted through U-Boot/TFTP and using huge initrd. > > Relevant Xen command line excerpt: > dom0_mem=2048M llc-coloring=on > > Boot module layout from Xen: > MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk > MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel > MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy > > The initrd is about 168MB. With LLC coloring enabled and the low-address > allocation policy from de99f3263555, Dom0 can receive a 192MB first bank: > d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) > > That bank satisfies the old 128MB minimum but is too small for the > rounded Dom0 kernel, generated DTB and initrd placement. The observed > failure before this patch was: > Panic on CPU 0: > Not enough memory in the first bank for the kernel+dtb+initrd > > With this patch, the same boot skips the too-small low region for bank 0 > and reaches Dom0: > d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) > d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) > d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) > d0: extended region 0: 0x48000000->0x54000000 > Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 > Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 > Loading d0 DTB to 0x5f000000-0x5f011c80 > Linux version 5.10.194-yocto-standard > --- > xen/arch/arm/acpi/domain_build.c | 2 -- > xen/arch/arm/domain_build.c | 8 ++++++ > xen/arch/arm/include/asm/domain_build.h | 4 +++ > xen/arch/arm/include/asm/kernel.h | 8 ++++++ > xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ > xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- > xen/include/xen/fdt-kernel.h | 8 ++++++ > 7 files changed, 83 insertions(+), 9 deletions(-) > > diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c > index 249d899c33..db16f7fa94 100644 > --- a/xen/arch/arm/acpi/domain_build.c > +++ b/xen/arch/arm/acpi/domain_build.c > @@ -26,8 +26,6 @@ > #undef virt_to_mfn > #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) > > -#define ACPI_DOM0_FDT_MIN_SIZE 4096 > - > static int __init acpi_iomem_deny_access(struct domain *d) > { > acpi_status status; > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 1efddc60ef..226e053c68 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, const char *e) > (IS_ENABLED(CONFIG_STATIC_SHM) ? \ > (NR_SHMEM_BANKS * (160 + 16)) : 0)) > > +paddr_t __init dom0_get_fdt_size_hint(void) > +{ > + if ( !acpi_disabled ) > + return ACPI_DOM0_FDT_MIN_SIZE; > + > + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; I would invert the condition so it is read more straightforward: if ( acpi_disabled ) return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; return ACPI_DOM0_FDT_MIN_SIZE; [..] > diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c > index b72585b7fe..3644663e2f 100644 > --- a/xen/arch/arm/kernel.c > +++ b/xen/arch/arm/kernel.c > @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) > return load_addr; > } > > +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t len) > +{ > + return ROUNDUP(load_addr + len, MB(2)) - load_addr; > +} > + > +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, > + paddr_t bank_start) > +{ > + const struct boot_module *mod = info->bd.initrd; > + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); > + const paddr_t dtb_len = ROUNDUP(dom0_get_fdt_size_hint(), MB(2)); > + paddr_t kernsize; > + > +#ifdef CONFIG_HAS_DOMAIN_TYPE Perhaps use `IS_ENABLED(CONFIG_HAS_DOMAIN_TYPE)` to reduce ifdefery? My impression that IS_ENABLED() is preferred. > + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) > + { > + paddr_t load_addr = bank_start + info->image.text_offset; > + > + /* > + * The caller compares this value with a size measured from > + * bank_start, so include the text offset before the kernel. > + */ > + kernsize = ROUNDUP(load_addr + info->image.len, MB(2)) - bank_start; > + return kernsize + initrd_len + dtb_len; > + } > +#endif > + > + if ( info->image.start == 0 ) Here too: invert the condition? if ( info->image.start ) kernsize = kernel_placement_size(info->image.start, info->image.len); else ... > + kernsize = ROUNDUP(info->image.len, MB(2)); > + else > + kernsize = kernel_placement_size(info->image.start, info->image.len); > + > + return kernsize + initrd_len + dtb_len; > +} -- Denis From xen-devel-bounces@lists.xenproject.org Thu May 21 22:30:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 22:30:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316041.1585633 (Exim 4.92) (envelope-from ) id 1wQBuP-0002PD-6I; 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Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-c201ff/1779402626-D3961443-0CC7ED7C/0/0 X-purgate-type: clean X-purgate-size: 511 On Thu, May 21, 2026, David Woodhouse wrote: > On Sat, 2026-05-09 at 23:46 +0100, David Woodhouse wrote: > > From: David Woodhouse > That does leave userspace still needing a way to get the APIC bus > frequency, to populate CPUID. So maybe I'll just make an attribute > which returns that as a single value. Already exists, KVM_CAP_X86_APIC_BUS_CYCLES_NS. The TDX architecture decided that unconditionally telling guests the virtual APIC bus runs at 400Mhz was a brilliant idea. From xen-devel-bounces@lists.xenproject.org Thu May 21 22:41:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 22:41:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316057.1585642 (Exim 4.92) (envelope-from ) id 1wQC4p-0004kg-3a; Thu, 21 May 2026 22:41:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316057.1585642; Thu, 21 May 2026 22:41:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQC4p-0004kZ-0t; Thu, 21 May 2026 22:41:15 +0000 Received: by outflank-mailman (input) for mailman id 1316057; Thu, 21 May 2026 22:41:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQC4k-0004kQ-3P for xen-devel@lists.xenproject.org; Thu, 21 May 2026 22:41:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQC4i-00CPFI-IH; Fri, 22 May 2026 00:41:09 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0f8996-bab6-0a2a0a5309dd-0a2a45028542-48 for ; Fri, 22 May 2026 00:41:08 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0f8a03-af86-0a2a45020019-5a9b3222e548-3 for ; Fri, 22 May 2026 00:41:07 +0200 Received: from 54-240-197-239.amazon.com ([54.240.197.239] helo=u09cd745991455d.ant.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQC4Y-000000097kt-2u2j; Thu, 21 May 2026 22:40:58 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=5sQxohW4OSu29r54ASx2pm8g1AG5G78R16Nk1NylZcM=; b=hhrQZu/j4c4CsJL6z3qVBO3Ejk D1XxT7vrmPfmWhNRK8cICJU76fg6wwuyjT9iOJRZ7x06wWbgPs5EifQOP2ghs/EPKa3KQTfCtz3Mi oQYlI6Nkd2ohK3jtJe3unvtzf2ILWq11nWoQ4zWfetcsh272bA4tNLBz4Ra1QC+xJKa0EfSXYWMzE 8H4L9FOQvNlD8Xg5bhoCEAxecqPQYrSj2FH6WsCE7XowmkZHxnu0QpdjECqMbrKn7FlyHoa+orqYT VCubFIfer36hygLuW13Zm1+C0W+JO4eU6/S5zGZirgoOWLntFqSCIKD2FpSf4/b3THNg7y//HFTWx 2WlUMFLg==; Message-ID: Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: David Woodhouse To: Sean Christopherson Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Thu, 21 May 2026 23:40:57 +0100 In-Reply-To: References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-VslFd0fYYjszMuMfVfh3" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-720697/1779403267-83D67161-96AA597F/0/0 X-purgate-type: clean X-purgate-size: 8221 --=-VslFd0fYYjszMuMfVfh3 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Thu, 2026-05-21 at 15:30 -0700, Sean Christopherson wrote: > On Thu, May 21, 2026, David Woodhouse wrote: > > On Sat, 2026-05-09 at 23:46 +0100, David Woodhouse wrote: > > > From: David Woodhouse > > That does leave userspace still needing a way to get the APIC bus > > frequency, to populate CPUID. So maybe I'll just make an attribute > > which returns that as a single value. >=20 > Already exists, KVM_CAP_X86_APIC_BUS_CYCLES_NS.=C2=A0 The TDX architectur= e decided > that unconditionally telling guests the virtual APIC bus runs at 400Mhz w= as a > brilliant idea. Ah, thanks. So KVM always exposes 1GHz by default regardless of the actual host? Which is why there's no *get* method? (Well... getting KVM_CAP_APIC_BUS_CYCLES_NS returns APIC_BUS_CYCLE_NS_DEFAULT which is 1, so it's basically just returning 1 like a lot of cap queries do, and *not* returning what the period is actually set to) --=-VslFd0fYYjszMuMfVfh3 Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 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X-purgate-ID: tlsNG-c1860d/1779405985-C447DDB1-7070168B/0/0 X-purgate-type: clean X-purgate-size: 1224 From: Denis Mukhin Lower the log level of the "connection refused" log line, as it can spam the logs when a dom0 service using the Argo hypercall tries to communicate with a domain that is still starting up. Signed-off-by: Denis Mukhin --- xen/common/argo.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 28626e00a8cb..4f894470698e 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_addr, src_id.domain_id); if ( !ring_info ) { - gprintk(XENLOG_ERR, - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", - current->domain->domain_id, src_id.domain_id, src_id.aport, - dst_addr->domain_id, dst_addr->aport); + argo_dprintk("argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", + current->domain->domain_id, src_id.domain_id, src_id.aport, + dst_addr->domain_id, dst_addr->aport); ret = -ECONNREFUSED; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 23:26:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 23:26:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316098.1585652 (Exim 4.92) (envelope-from ) id 1wQCmV-0003vJ-8j; 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Patch 1 lowers the verbosity of a spammy log message. Patch 2 corrects the debug logline. CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2544856081 Denis Mukhin (2): argo: lower level of noisy connection-refused log argo: correct logline in ring_unmap() xen/common/argo.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Thu May 21 23:26:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 21 May 2026 23:26:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316099.1585660 (Exim 4.92) (envelope-from ) id 1wQCmW-00048M-Id; Thu, 21 May 2026 23:26:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316099.1585660; Thu, 21 May 2026 23:26:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQCmW-00048F-Fq; Thu, 21 May 2026 23:26:24 +0000 Received: by outflank-mailman (input) for mailman id 1316099; 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Signed-off-by: Denis Mukhin --- xen/common/argo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 4f894470698e..c66632486800 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -474,7 +474,7 @@ ring_unmap(const struct domain *d, struct argo_ring_info *ring_info) continue; ASSERT(!mfn_eq(ring_info->mfns[i], INVALID_MFN)); - argo_dprintk(XENLOG_ERR "argo: unmapping page %"PRI_mfn" from %p\n", + argo_dprintk("argo: unmapping page %"PRI_mfn" from %p\n", mfn_x(ring_info->mfns[i]), ring_info->mfn_mapping[i]); unmap_domain_page_global(ring_info->mfn_mapping[i]); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 06:11:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:11:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316292.1585679 (Exim 4.92) (envelope-from ) id 1wQJ63-0005VU-LW; Fri, 22 May 2026 06:10:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316292.1585679; Fri, 22 May 2026 06:10:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJ63-0005VJ-FW; Fri, 22 May 2026 06:10:59 +0000 Received: by outflank-mailman (input) for mailman id 1316292; Fri, 22 May 2026 06:10:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJ62-0005VC-FP for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:10:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJ61-00FvU7-BV for xen-devel@lists.xenproject.org; Fri, 22 May 2026 08:10:57 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ff36d-e002-0a2a0a5209dd-0a2a45058d00-12 for ; Fri, 22 May 2026 08:10:57 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ff370-aaa8-0a2a45050019-d1558030cd07-3 for ; Fri, 22 May 2026 08:10:57 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-49042aeeb75so5638215e9.1 for ; Thu, 21 May 2026 23:10:57 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <69ef81a2f85b35e6231ae389bf271cad2bbd7dfc.1779394622.git.dmytro_prokopchuk1@epam.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-c201ff/1779430257-E1F9C443-AA99A470/0/0 X-purgate-type: clean X-purgate-size: 1283 On 21.05.2026 22:18, Dmytro Prokopchuk1 wrote: > Convert 'malloc' and 'free' macros in 'decompress.h' from object-like > to function-like form. > > The object-like macros '#define free xfree' perform unconditional text > replacement, causing conflicts with struct field 'free' in 'page_info' > unions. Function-like macros only match when followed by parentheses, > allowing 'free' to be used both as a macro and as a struct field without > conflicts. At the same time function-like macros cannot be used to e.g. pass the (underlying) function pointer to a function. Likely there aren't any such uses here, but imo this aspect needs covering in patches like this one. > Applying function-like form to both 'malloc' and 'free' ensures consistent > macro style. Not quite, seeing ... > --- a/xen/common/decompress.h > +++ b/xen/common/decompress.h > @@ -9,8 +9,8 @@ > #include > #include > > -#define malloc xmalloc_bytes > -#define free xfree > +#define malloc(a) xmalloc_bytes(a) > +#define free(a) xfree(a) > > #define large_malloc xmalloc_bytes > #define large_free xfree ... these two in context? IOW if you mean to achieve consistency, convert these (and whatever else, if anything) as well? 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: c6dac1fe-26b8-4090-1168-08deb7c94447 X-MS-Exchange-CrossTenant-originalarrivaltime: 22 May 2026 06:13:39.4629 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: un+vYQZIqXktoHKVAEih5IcRB0EKJSOujd1weP+pNVDBUogiUxQIaA1HFHwnXGzqQAPhSzlvWtd7sKRzbExWVvARXO88+xsvYiwMJ9gv/bo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR03MB9232 X-purgate-ID: tlsNG-720697/1779430425-80979161-9C4D3E7E/0/0 X-purgate-type: clean X-purgate-size: 1645 MISRA C Rule 10.1 states: "Operands shall not be of an inappropriate essential type". Boolean values cannot be directly used in arithmetic operations. Convert boolean to integer in vPCI header bar index calculation using the ternary operator to satisfy strict type checking rule. No functional changes. Signed-off-by: Dmytro Prokopchuk --- Test CI pipeline: https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2545399814 --- xen/drivers/vpci/header.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/xen/drivers/vpci/header.c b/xen/drivers/vpci/header.c index a760d8c32f..2b7f78728d 100644 --- a/xen/drivers/vpci/header.c +++ b/xen/drivers/vpci/header.c @@ -586,7 +586,7 @@ static void cf_check bar_write( if ( val !=3D (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) gprintk(XENLOG_WARNING, "%pp: ignored BAR %zu write while mapped\n", - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 := 0)); return; } =20 @@ -647,7 +647,7 @@ static void cf_check guest_mem_bar_write(const struct p= ci_dev *pdev, if ( guest_addr !=3D bar->guest_addr ) gprintk(XENLOG_WARNING, "%pp: ignored guest BAR %zu write while mapped\n", - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 := 0)); return; } bar->guest_addr =3D guest_addr; --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 06:20:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:20:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316310.1585705 (Exim 4.92) (envelope-from ) id 1wQJFQ-0000D6-Te; Fri, 22 May 2026 06:20:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316310.1585705; Fri, 22 May 2026 06:20:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFQ-0000Cz-Qm; Fri, 22 May 2026 06:20:40 +0000 Received: by outflank-mailman (input) for mailman id 1316310; Fri, 22 May 2026 06:20:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFO-0008RG-U8 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:20:39 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJFO-00DS7I-9x for xen-devel@lists.xenproject.org; Fri, 22 May 2026 08:20:38 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ff5ae-bab6-0a2a0a5309dd-0a2a4504ab7a-22 for ; Fri, 22 May 2026 08:20:38 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ff5b6-1dec-0a2a45040019-d155802bc54c-3 for ; Fri, 22 May 2026 08:20:38 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-488af9fdaa7so33186895e9.1 for ; Thu, 21 May 2026 23:20:38 -0700 (PDT) Received: from EPUAKYIW02F7.. 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In particular, GICv3 rejects a vCPU when the domain's redistributor layout has no MMIO slot covering that vCPU. However, the generic vGIC init path ignored the callback return value, so vcpu_create() could succeed with an invalid vGICv3 per-vCPU state. This can be reproduced on FVP Base RevC by exposing a 2 MiB GICv3 redistributor region to Dom0 and booting Xen with: maxcpus=1 dom0_max_vcpus=64 The host GICv3 redistributor range is: region 0: 0x0000002f100000 - 0x0000002f300000 With Xen's guest redistributor frame size of 128 KiB, that range covers 16 guest redistributors. vCPU16 and above have no corresponding redistributor slot. Before this fix, Xen detected the missing redistributors: d0: Unable to find a re-distributor for VCPU 16 ... d0: Unable to find a re-distributor for VCPU 63 but ignored the error and continued as if the secondary vCPUs had been created correctly. Dom0 then saw 64 possible CPUs and could hang during secondary CPU bring-up: smp: Bringing up secondary CPUs ... d0v15: vGICR: SGI: unhandled word write ... to ICACTIVER0 Propagate the vGIC vcpu_init() error so the caller can stop creating secondary vCPUs. With this fix, Dom0 construction reports: d0: Unable to find a re-distributor for VCPU 16 Failed to allocate d0v16 and the guest continues booting with the vCPUs created before the failure: smp: Brought up 1 node, 16 CPUs Free the private IRQ rank allocated by vcpu_vgic_init() on this error path. The caller will still run the generic vCPU creation cleanup, but XFREE() clears the pointer so that cleanup remains idempotent. Also fix the host-layout redistributor region count for the case where the requested vCPU count is larger than the capacity of all host redistributor regions. The old code always stored i + 1 after the loop. That is correct when the loop stops inside a valid region because the requested vCPU count is covered. If the loop exits after consuming all hardware regions, i is already equal to the number of allocated regions, so i + 1 records one region too many. In the same FVP setup, that off-by-one made Xen describe host-layout GICR state beyond the populated redistributor region list. Dom0 then accessed the GICR MMIO window described in its device tree, but Xen could not match the access to a valid emulated redistributor frame. During debugging this was seen as an unexpected vGICR access followed by a guest panic: d0v0: vGICR: unknown gpa read address 000000002f10ffe8 pc : gic_iterate_rdists+0x4c/0x104 Kernel panic - not syncing: Attempted to kill the idle task! Keep the existing best-effort Dom0 policy: a failure to create a secondary vCPU stops the secondary vCPU creation loop, but does not fail the whole Dom0 boot. Fixes: ea37fd21110b ("xen/arm: split vgic driver into generic and vgic-v2 driver") Fixes: 54ec59f6b0b3 ("xen/arm: vgic-v3: Don't create empty re-distributor regions") Signed-off-by: Mykola Kvach --- xen/arch/arm/vgic-v3.c | 3 ++- xen/arch/arm/vgic.c | 10 +++++++--- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77517c3030..360778eb32 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1834,7 +1834,8 @@ static int vgic_v3_domain_init(struct domain *d) * not match the number of pCPUs). Update the number of regions to * avoid exposing unused region as they will not get emulated. */ - d->arch.vgic.nr_regions = i + 1; + d->arch.vgic.nr_regions = (i == vgic_v3_hw.nr_rdist_regions) ? + i : i + 1; d->arch.vgic.intid_bits = vgic_v3_hw.intid_bits; } diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 6647071ad4..e55e484493 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -368,7 +368,7 @@ void domain_vgic_free(struct domain *d) int vcpu_vgic_init(struct vcpu *v) { - int i; + int i, ret; v->arch.vgic.private_irqs = xzalloc(struct vgic_irq_rank); if ( v->arch.vgic.private_irqs == NULL ) @@ -377,7 +377,12 @@ int vcpu_vgic_init(struct vcpu *v) /* SGIs/PPIs are always routed to this VCPU */ vgic_rank_init(v->arch.vgic.private_irqs, 0, v->vcpu_id); - v->domain->arch.vgic.handler->vcpu_init(v); + ret = v->domain->arch.vgic.handler->vcpu_init(v); + if ( ret ) + { + XFREE(v->arch.vgic.private_irqs); + return ret; + } memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs)); for (i = 0; i < 32; i++) @@ -944,4 +949,3 @@ void vgic_check_inflight_irqs_pending(struct vcpu *v, unsigned int rank, uint32_ * indent-tabs-mode: nil * End: */ - -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 06:20:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:20:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316309.1585696 (Exim 4.92) (envelope-from ) id 1wQJFO-0008R1-Mi; Fri, 22 May 2026 06:20:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316309.1585696; Fri, 22 May 2026 06:20:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFO-0008Qu-K4; Fri, 22 May 2026 06:20:38 +0000 Received: by outflank-mailman (input) for mailman id 1316309; Fri, 22 May 2026 06:20:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFN-0008Qo-Pb for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:20:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJFN-00FxJO-1i for xen-devel@lists.xenproject.org; Fri, 22 May 2026 08:20:37 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ff5b3-e002-0a2a0a5209dd-0a2a4507c00c-6 for ; Fri, 22 May 2026 08:20:36 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ff5b4-229c-0a2a45070019-d1558030d944-3 for ; Fri, 22 May 2026 08:20:36 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-48e82c23840so55592605e9.3 for ; Thu, 21 May 2026 23:20:36 -0700 (PDT) Received: from EPUAKYIW02F7.. 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When the requested Dom0 vCPU count exceeds the number of virtual redistributor frames covered by the exposed host-layout GICR regions, the vGICv3 per-vCPU init path rejects the first uncovered vCPU. However, the generic vGIC init path ignored that error, so vcpu_create() could succeed with an invalid per-vCPU vGIC state. Dom0 could then observe more possible CPUs than Xen can back with emulated redistributors and hang during secondary CPU bring-up. The first patch propagates the per-vCPU vGIC init failure and fixes the host-layout redistributor region count when all hardware regions have been consumed. With the fix, Dom0 construction stops creating secondary vCPUs at the first vCPU whose redistributor frame is not covered, while preserving the existing best-effort Dom0 policy and allowing Dom0 to boot with the vCPUs created before the failure. The second patch documents the resulting Arm GICv3 constraint for dom0_max_vcpus. Mykola Kvach (2): xen/arm: propagate vGIC vCPU init failures docs: Document Arm GICv3 limit for dom0_max_vcpus docs/misc/xen-command-line.pandoc | 8 ++++++++ xen/arch/arm/vgic-v3.c | 3 ++- xen/arch/arm/vgic.c | 10 +++++++--- 3 files changed, 17 insertions(+), 4 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 06:20:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:20:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316311.1585710 (Exim 4.92) (envelope-from ) id 1wQJFR-0000J0-9r; Fri, 22 May 2026 06:20:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316311.1585710; Fri, 22 May 2026 06:20:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFR-0000IU-6L; Fri, 22 May 2026 06:20:41 +0000 Received: by outflank-mailman (input) for mailman id 1316311; Fri, 22 May 2026 06:20:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJFQ-0000Cf-1R for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:20:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJFP-00FxMi-AB for xen-devel@lists.xenproject.org; Fri, 22 May 2026 08:20:39 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ff5b4-5cb7-0a2a0a5109dd-0a2a4506bd44-8 for ; Fri, 22 May 2026 08:20:39 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ff5b7-7371-0a2a45060019-d155802ce0d1-3 for ; Fri, 22 May 2026 08:20:39 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-488b0e1b870so95567515e9.2 for ; Thu, 21 May 2026 23:20:39 -0700 (PDT) Received: from EPUAKYIW02F7.. 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In that case the effective Dom0 vCPU count is not only bounded by the requested dom0_max_vcpus value and Xen's generic vCPU limits. It is also bounded by the redistributor MMIO regions that can be exposed for the host layout. Document that Xen can only create Dom0 vCPUs whose virtual redistributor frame is covered by those regions, and that secondary vCPU creation stops at the first vCPU whose virtual redistributor frame is not covered. Signed-off-by: Mykola Kvach --- docs/misc/xen-command-line.pandoc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index d46d5b2152..0a5589b24c 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -981,6 +981,14 @@ The number of VCPUs to give to dom0. This number of VCPUs can be more than the number of PCPUs on the host. The default is the number of PCPUs. +On Arm systems using GICv3, Dom0 may use the host GIC layout, for example +when it is the hardware domain. In this case, this value is also limited +by the redistributor MMIO regions that can be exposed for that layout. +Xen can only create Dom0 VCPUs whose virtual redistributor frame is +covered by those regions. If the requested number of VCPUs exceeds that +limit, secondary VCPU creation stops at the first VCPU whose virtual +redistributor frame is not covered. + Or: > `= -` where `` and `` are integers. -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 06:40:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:40:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316336.1585724 (Exim 4.92) (envelope-from ) id 1wQJYG-00056F-Pi; Fri, 22 May 2026 06:40:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316336.1585724; Fri, 22 May 2026 06:40:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJYG-000568-Mp; Fri, 22 May 2026 06:40:08 +0000 Received: by outflank-mailman (input) for mailman id 1316336; Fri, 22 May 2026 06:40:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJYF-00054K-8D for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:40:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJYE-00DWME-DJ for xen-devel@lists.xenproject.org; Fri, 22 May 2026 08:40:06 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a0ffa43-2eae-0a2a0a5409dd-0a2a4503dd1a-18 for ; Fri, 22 May 2026 08:40:06 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a0ffa45-672d-0a2a45030019-d1558033f1c7-3 for ; Fri, 22 May 2026 08:40:05 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-488ab2db91aso72807585e9.3 for ; Thu, 21 May 2026 23:40:05 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779432005-38348938-9916B21C/0/0 X-purgate-type: clean X-purgate-size: 1573 (extending Cc list) On 22.05.2026 08:13, Dmytro Prokopchuk1 wrote: > --- a/xen/drivers/vpci/header.c > +++ b/xen/drivers/vpci/header.c > @@ -586,7 +586,7 @@ static void cf_check bar_write( > if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) > gprintk(XENLOG_WARNING, > "%pp: ignored BAR %zu write while mapped\n", > - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > return; > } > > @@ -647,7 +647,7 @@ static void cf_check guest_mem_bar_write(const struct pci_dev *pdev, > if ( guest_addr != bar->guest_addr ) > gprintk(XENLOG_WARNING, > "%pp: ignored guest BAR %zu write while mapped\n", > - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > return; > } > bar->guest_addr = guest_addr; Well. If I'm not mistaken we had discussed situations like this (long ago). Imo the added verbosity gets in the way of readability. If we absolutely cannot or don't want to deviate such constructs (of which I expect we have more), then we ought to consider alternatives (like changing the variables' types in the case here). As to deviating: rules.rst, according to my reading, says that &, |, ^, or shifts would be okay to use with a bool operand. What's wrong with also permitting this for other operators? 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: PG6ZooHySsiRm2CPBtL08ZGMrQZNLlG2DpKFmRq/TBmZfaobz3yPbRFjXUcNkNWtpA23BwRxGCDrMVYqALzU89IrmSTtsbjuoskWHElq44X7/oJZFH2e34hNycyVDOX6cDyrVAOkuZVkOuqqNETUTYpK8rxbnDQX84FCWp240zrAaPe/tPEnB0xtZAMylhRvEwQUvWkJAyIyIwtAKiEd7oBGSsrRZhjr1vMztyfylWl5m8ICxTUl4a/w1NgN12kZOgYHO8d3hhcWY9BrHeqSrCXzWwgGnW0lIZwO4+V9qncu+xqi1CNWq/bymBusuJBV+MihcV2w3tMvJSB9qO6rQwGQzwE9+PYubDxgNHWCrljq0pNLpKY0FujcKKNRNnmJd7tvEUMPW2Ly8Pb7xUJkvelC8Xk08HQyKs6f9/2QFuM21r3gDkSSthSJ42hybbhG X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2026 06:41:46.6319 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b2e5f470-7625-490e-d8ed-08deb7cd31e8 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF0000000D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB9546 X-purgate-ID: tlsNG-33051d/1779432114-3774E938-7AC61543/0/0 X-purgate-type: clean X-purgate-size: 3702 On 04-May-26 11:19, Mykola Kvach wrote: > From: Mykola Kvach > > get_llc_way_size() currently scans CLIDR_EL1 Ctype fields from the > highest level downwards and stops at the first unified cache it finds. > > However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. > Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a > Ctype value of 0b000 while reading from Ctype1 upwards, no caches > manageable by the architected set/way maintenance instructions exist at > further-out levels, and the higher Ctype fields must be ignored. > > The current reverse scan can therefore select a unified cache level from > a Ctype field above the first no-cache level. Such a field is not part of > the architecturally described CLIDR/CCSIDR cache hierarchy and should not > be used for selecting the CCSIDR level. > > Scan Ctype fields from L1 upwards, stop at the first no-cache level, and > keep the outermost unified cache observed before that point. > > This preserves the result for regular cache hierarchies, while avoiding > selection of an architecturally ignored Ctype field. > > Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on arm64") > Signed-off-by: Mykola Kvach > --- > This patch follows the xen-devel discussion: > https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.html > > In that thread, Michal noted that the reverse scan was a simplification > rather than an intentional requirement, and that changing the > implementation would be fine. > > Testing performed: > - standalone synthetic CLIDR tests covered both regular and pathological > Ctype sequences and showed that the forward scan ignores unified cache > levels above the first Ctype == 0b000 while the reverse scan can pick > them > - Renesas H3ULCB booted with llc-coloring=on > --- > xen/arch/arm/llc-coloring.c | 22 +++++++++++++++++----- > 1 file changed, 17 insertions(+), 5 deletions(-) > > diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c > index 6f78817c57..3783f4c824 100644 > --- a/xen/arch/arm/llc-coloring.c > +++ b/xen/arch/arm/llc-coloring.c > @@ -22,21 +22,33 @@ unsigned int __init get_llc_way_size(void) > register_t id_aa64mmfr2_el1 = READ_SYSREG(ID_AA64MMFR2_EL1); > uint32_t ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT; > uint32_t ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK; > - unsigned int n, line_size, num_sets; > - > - for ( n = CLIDR_CTYPEn_LEVELS; n != 0; n-- ) > + unsigned int n, line_size, num_sets, llc_level = 0; > + > + /* > + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Once a > + * no-cache level is seen, higher Ctype fields are architecturally ignored > + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. > + * > + * Keep the outermost unified cache before that point. > + */ > + for ( n = 1; n <= CLIDR_CTYPEn_LEVELS; n++ ) > { > uint8_t ctype_n = (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & > CLIDR_CTYPEn_MASK; > > + if ( ctype_n == 0b000 ) > + break; > + > /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ > if ( ctype_n == 0b100 ) > - break; > + llc_level = n; > } > > - if ( n == 0 ) > + if ( !llc_level ) > return 0; > > + n = llc_level; After a loop, n does not carry any meaning, so I find this assignment a bit odd and confusing to read. Just use llc_level below. With that: Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Fri May 22 06:53:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:53:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316352.1585741 (Exim 4.92) (envelope-from ) id 1wQJlG-0008Dm-2q; Fri, 22 May 2026 06:53:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316352.1585741; Fri, 22 May 2026 06:53:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJlG-0008Df-0B; Fri, 22 May 2026 06:53:34 +0000 Received: by outflank-mailman (input) for mailman id 1316352; Fri, 22 May 2026 06:53:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJlE-0008DZ-TF for xen-devel@lists.xenproject.org; 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Thu, 21 May 2026 23:53:30 -0700 (PDT) MIME-Version: 1.0 References: <20260521232529.694570-1-dmukhin@ford.com> <20260521232529.694570-2-dmukhin@ford.com> In-Reply-To: <20260521232529.694570-2-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 09:53:18 +0300 X-Gm-Features: AVHnY4I9LC7-6HdtsaD27ry0_Px0zmYX37FycGeibaJAN-3eWl0LtxwvONqv5t0 Message-ID: Subject: Re: [PATCH 1/2] argo: lower level of noisy connection-refused log To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1779432811-40A6A938-3C811EFA/0/0 X-purgate-type: clean X-purgate-size: 1291 Hi Denis, Thank you for the contribution. On Fri, May 22, 2026 at 2:57=E2=80=AFAM wrote: > > From: Denis Mukhin > > Lower the log level of the "connection refused" log line, as it can > spam the logs when a dom0 service using the Argo hypercall tries to > communicate with a domain that is still starting up. > > Signed-off-by: Denis Mukhin > --- > xen/common/argo.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 28626e00a8cb..4f894470698e 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_a= ddr, > src_id.domain_id); > if ( !ring_info ) > { > - gprintk(XENLOG_ERR, > - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:= %x)\n", > - current->domain->domain_id, src_id.domain_id, src_id.apo= rt, > - dst_addr->domain_id, dst_addr->aport); > + argo_dprintk("argo: vm%u connection refused, src (vm%u:%x) dst (= vm%u:%x)\n", AFAIU, argo_dprintk() already adds the "argo: " prefix internally. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 06:58:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 06:58:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316365.1585751 (Exim 4.92) (envelope-from ) id 1wQJq7-00015F-MU; Fri, 22 May 2026 06:58:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316365.1585751; Fri, 22 May 2026 06:58:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJq7-000158-Jg; Fri, 22 May 2026 06:58:35 +0000 Received: by outflank-mailman (input) for mailman id 1316365; Fri, 22 May 2026 06:58:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQJq6-000152-8t for xen-devel@lists.xenproject.org; Fri, 22 May 2026 06:58:34 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQJq5-00DTop-Hi for xen-devel@lists.xenproject.org; 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Thu, 21 May 2026 23:58:32 -0700 (PDT) MIME-Version: 1.0 References: <20260521232529.694570-1-dmukhin@ford.com> <20260521232529.694570-3-dmukhin@ford.com> In-Reply-To: <20260521232529.694570-3-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 09:58:20 +0300 X-Gm-Features: AVHnY4IBTKvFdp_4SnPV-YX3rBBqyw7U2BYkQTWTSj_TO9u7Z84ppeXwrLXu60g Message-ID: Subject: Re: [PATCH 2/2] argo: correct logline in ring_unmap() To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-ebf023/1779433113-28B733FF-280E3954/0/0 X-purgate-type: clean X-purgate-size: 1029 Hi Denis, On Fri, May 22, 2026 at 2:26=E2=80=AFAM wrote: > > From: Denis Mukhin > > Drop XENLOG_ERR from the logline since argo_dprintk() already injects > the proper log level indicator. > > Signed-off-by: Denis Mukhin > --- > xen/common/argo.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 4f894470698e..c66632486800 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -474,7 +474,7 @@ ring_unmap(const struct domain *d, struct argo_ring_i= nfo *ring_info) > continue; > > ASSERT(!mfn_eq(ring_info->mfns[i], INVALID_MFN)); > - argo_dprintk(XENLOG_ERR "argo: unmapping page %"PRI_mfn" from %p= \n", > + argo_dprintk("argo: unmapping page %"PRI_mfn" from %p\n", Same here: argo_dprintk() already adds the "argo: " prefix internally, so the explicit "argo: " should probably be dropped as well. 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I am okay with having it in 4.22: Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 07:14:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 07:14:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316383.1585768 (Exim 4.92) (envelope-from ) id 1wQK5f-0004wx-2v; Fri, 22 May 2026 07:14:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316383.1585768; Fri, 22 May 2026 07:14:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQK5f-0004wq-0N; Fri, 22 May 2026 07:14:39 +0000 Received: by outflank-mailman (input) for mailman id 1316383; Fri, 22 May 2026 07:14:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQK5e-0004wk-5f for xen-devel@lists.xenproject.org; Fri, 22 May 2026 07:14:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQK5d-005JNX-I0 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:14:37 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a10024c-bab6-0a2a0a5309dd-0a2a4507c526-38 for ; Fri, 22 May 2026 09:14:37 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a10025d-229c-0a2a45070019-d155dd33bccd-3 for ; Fri, 22 May 2026 09:14:37 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-43d7e23defbso3892774f8f.0 for ; Fri, 22 May 2026 00:14:37 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eb6d49132sm1770497f8f.24.2026.05.22.00.14.36 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 22 May 2026 00:14:36 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779434077; x=1780038877; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=BicD9TYxpHdVMRFLSDVpnuTrLVUpY+pOYydHNRXgQYg=; b=Ug2ZtriPURY580Y4fIC7hiWBQmGIkdoTYAqVY+pCy8ylhH6ml9+RNClbazmvi3ZBdv WuhjsAbwsvf8qF7uMxH90E6nLHi3cpPGCtJkixPg59W2p8k+RIFmjrDk7g+j1CxQyBLs I4g23Knk5paPMZw0qWmZVnqZJ7dPje/gtuakISZ8Gee+4qr41xRZPR4dSLAC3AHsbY6a FEGMIa7L0Yv/wMCTPe7ezLXdLDTIBjYwzvYUwDf0UoJUehe+KPxZXJSm4cLsVGjdYRyq uqqt/rIT5mqJAv+nBOHmE5gutDOW5PDDezOoCSxaO2loqLS48Pz4RG2EtF3xr5czL5hD zA6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779434077; x=1780038877; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=BicD9TYxpHdVMRFLSDVpnuTrLVUpY+pOYydHNRXgQYg=; b=FHXL1p4pBjPBNzYztsoPS3VCcRlQewxtUkL4b5zRMAorisFQnqLEnEIJCp3YBIYWnq HDCimK5w4LZ7vspoLrnh6nNXzZIBXtLcKxFSixIrI/IHY+R2+oXZpB7D0Os7b7tYVjCq GFpdg1RVOkTTcaC0jNQ/QyW9KTI03cjMehjrvttEm45h3tZZNPtLzfjbKIsiD0fLFGUZ X3PZatEQn+BPlmYQCAKZWV+Dlx6rZjudN1UIT6Ymv6GYtO5MYMc6KDUBOodrjWNVPNq/ DH/9jqNpnIna6yIYixBokiNu8MjWdWqxhN+DhimtadSRbEvHpViLyaSguWkjQmDy2FlZ MOAw== X-Forwarded-Encrypted: i=1; AFNElJ9ZVEq5TFr0OvPXAfrZh4Q695FZK3OvT0Ks0snH3oPA1kaYyBgd0EW3HdsPYGvtp6KdHHmZvWYi6I8=@lists.xenproject.org X-Gm-Message-State: AOJu0YyqXOdY4tnoLwOEBTrJcpGsWuySxD1yEpui5vxxTE+Fg2qDaC1G BCE2V7cBwQXCIrbImXPdm84j5kR8c2NysjZn5i4qCG0TdO8V+pAOYg9Q X-Gm-Gg: Acq92OHYceltzOpSvKnHeqQnG0K0AQo2+WF0UHh79zOGyN979bOSmliV6awNr8kfavq x947wCSkZOdrPBVtpQJb2JUUvFBJxVm0C3xgMkWlFputrUirW19bwA/BE+xrBNOol590GoccIcF dZbM520QscmNrXEdkOQ+iizFN1d/8og9hu5AS8eS4PtCa8Ai2up3j6NKhgSrWLSdZmM8tkclzIt aaOUuU/wrDBamH16FQtbrE6e+o8G0cDHyvmNV3LLsxXpKgv/EgLkZYjsqIdH0rfCOfJEW78H7cy 5fl3yJZBOqNL54/kn+7WNHqkClMTxQNTDIdsYl6v43yoo/djSN+1gPNvbYNSwipPNo18ut0es+B I5oWKZiv6ZONzTBGCGCK/JQ5HqMJjCNlZVO7t0HpZaQa1LSJikC3Fln/etwlas+HXHT8Uc+YQgL 1v0y+Z/mYfZJjaZr61qJ0N+JVcxc6eG3IhXKZ+HjJx0sVLMVdpgEWN/9gmNnHDtGfmJJzrmgmi4 6w= X-Received: by 2002:a05:6000:26cf:b0:448:7049:a6c9 with SMTP id ffacd0b85a97d-45eb3688808mr2878148f8f.5.1779434076972; Fri, 22 May 2026 00:14:36 -0700 (PDT) Message-ID: Date: Fri, 22 May 2026 09:14:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: gic-v3: Fix redistributor wakeup polling To: "Orzel, Michal" , Luca Fancellu , xen-devel@lists.xenproject.org Cc: Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: <20260518070524.19813-1-luca.fancellu@arm.com> <64094528-9c9c-47d4-98b6-640df0a9df3b@amd.com> <7bde7370-cd19-414b-9b53-37aaf076ba82@amd.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: <7bde7370-cd19-414b-9b53-37aaf076ba82@amd.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779434077-2236CC48-8C2BB95B/10/73395122804 X-purgate-type: spam X-purgate-size: 1251 On 5/21/26 9:06 AM, Orzel, Michal wrote: > Oleksii, can we ask for a release ack for this fix? > > ~Michal > > On 19-May-26 09:19, Orzel, Michal wrote: >> >> >> On 18-May-26 09:05, Luca Fancellu wrote: >>> gicv3_enable_redist() clears GICR_WAKER.ProcessorSleep and then waits for >>> GICR_WAKER.ChildrenAsleep to clear, as required after waking a >>> redistributor. >>> >>> However, the polling loop currently uses "while ( timeout )". Since >>> timeout is initially false, the loop runs only once unless the timeout >>> path has already been reached. As a result, Xen can continue before the >>> redistributor has completed wakeup. >>> >>> Use an unconditional loop, matching the surrounding timeout/break pattern, >>> so the code polls until either ChildrenAsleep is clear or the deadline is >>> reached. >>> >>> While there, also fix the timeout message. This path polls >>> GICR_WAKER.ChildrenAsleep, not an RWP bit, so "RWP timeout" is misleading. >>> >>> Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") >>> Signed-off-by: Luca Fancellu >> Reviewed-by: Michal Orzel Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 07:46:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 07:46:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316405.1585778 (Exim 4.92) (envelope-from ) id 1wQKaJ-0002Xk-GS; Fri, 22 May 2026 07:46:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316405.1585778; Fri, 22 May 2026 07:46:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQKaJ-0002Xd-D0; Fri, 22 May 2026 07:46:19 +0000 Received: by outflank-mailman (input) for mailman id 1316405; Fri, 22 May 2026 07:46:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQKaI-0002XX-7i for xen-devel@lists.xenproject.org; Fri, 22 May 2026 07:46:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQKaH-0065lg-6p for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:46:17 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1009c8-5cb7-0a2a0a5109dd-0a2a450c9818-2 for ; Fri, 22 May 2026 09:46:17 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1009c8-62f1-0a2a450c0019-d1558035c49a-3 for ; Fri, 22 May 2026 09:46:17 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-48a563e4ef7so54676585e9.0 for ; Fri, 22 May 2026 00:46:17 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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In order to be > able to have NOW() return at least monotonically increasing values, that > needs replacing by an explicit indicator. > > Signed-off-by: Jan Beulich > --- > Arm and RISC-V may want to consider whether their initial get_cycles() > can't be moved yet earlier, such that the indicator also can be set > yet earlier. > --- At least, for RISC-V ... > v3: New. > > --- a/xen/arch/arm/time.c > +++ b/xen/arch/arm/time.c > @@ -145,6 +145,7 @@ void __init preinit_xen_time(void) > panic("Timer: Cannot initialize platform timer\n"); > > boot_count = get_cycles(); > + NOW_good = true; > } > > static void __init init_dt_xen_time(void) > --- a/xen/arch/riscv/time.c > +++ b/xen/arch/riscv/time.c > @@ -87,6 +87,7 @@ void __init preinit_xen_time(void) > panic("%s: ACPI isn't supported\n", __func__); > > boot_clock_cycles = get_cycles(); > + NOW_good = true; ... preinit_xen_time() call could be moved a little bit above just after riscv_fill_hwcap() as it is using riscv_isa_extension_available() inside. preinit_xen_time() could be splited so it can be moved just above tasklet_subsys_init() after device tree is initialized but I don't think there is to much sense for that. > > /* set_xen_timer must have been set by sbi_init() already */ > ASSERT(set_xen_timer); The ASSERT is harmless, but NOW_good could technically go after it. boot_clock_cycles and cpu_khz must be visible to any reader of NOW_good == true. There's no explicit ordering between those stores and the NOW_good = true store. In practice this is fine because SMP isn't active at this point, but a WRITE_ONCE(NOW_good, true) or a compiler barrier would make the intent explicit and protect against future reordering by an optimizing compiler. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 07:56:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 07:56:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316424.1585820 (Exim 4.92) (envelope-from ) id 1wQKjw-0005B4-Li; Fri, 22 May 2026 07:56:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316424.1585820; Fri, 22 May 2026 07:56:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQKjw-0005Ax-HO; Fri, 22 May 2026 07:56:16 +0000 Received: by outflank-mailman (input) for mailman id 1316424; Fri, 22 May 2026 07:56:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQKju-00059Z-In for xen-devel@lists.xenproject.org; Fri, 22 May 2026 07:56:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQKjt-00DsHO-RO for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:56:13 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a100c1d-5cb7-0a2a0a5109dd-0a2a4507bc1e-6 for ; Fri, 22 May 2026 09:56:13 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a100c1d-229c-0a2a45070019-d155802ca5bd-3 for ; Fri, 22 May 2026 09:56:13 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-48a3e9862f0so39277935e9.1 for ; Fri, 22 May 2026 00:56:13 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779436573-21F6EC48-16E6DF18/0/0 X-purgate-type: clean X-purgate-size: 2408 On 22.05.2026 09:46, Oleksii Kurochko wrote: > > > On 5/20/26 4:45 PM, Jan Beulich wrote: >> printk_start_of_line() checks for a value of 0 right now. In order to be >> able to have NOW() return at least monotonically increasing values, that >> needs replacing by an explicit indicator. >> >> Signed-off-by: Jan Beulich >> --- >> Arm and RISC-V may want to consider whether their initial get_cycles() >> can't be moved yet earlier, such that the indicator also can be set >> yet earlier. >> --- > > At least, for RISC-V ... > >> v3: New. >> >> --- a/xen/arch/arm/time.c >> +++ b/xen/arch/arm/time.c >> @@ -145,6 +145,7 @@ void __init preinit_xen_time(void) >> panic("Timer: Cannot initialize platform timer\n"); >> >> boot_count = get_cycles(); >> + NOW_good = true; >> } >> >> static void __init init_dt_xen_time(void) >> --- a/xen/arch/riscv/time.c >> +++ b/xen/arch/riscv/time.c >> @@ -87,6 +87,7 @@ void __init preinit_xen_time(void) >> panic("%s: ACPI isn't supported\n", __func__); >> >> boot_clock_cycles = get_cycles(); >> + NOW_good = true; > > ... preinit_xen_time() call could be moved a little bit above just > after riscv_fill_hwcap() as it is using riscv_isa_extension_available() > inside. > > preinit_xen_time() could be splited so it can be moved just above > tasklet_subsys_init() after device tree is initialized but I don't think > there is to much sense for that. > >> >> /* set_xen_timer must have been set by sbi_init() already */ >> ASSERT(set_xen_timer); > > The ASSERT is harmless, but NOW_good could technically go after it. "could" or do you perhaps even mean "should"? I'd like to keep the write next to that of boot_clock_cycles, but of course only if there's no dependency on set_xen_timer. > boot_clock_cycles and cpu_khz must be visible to any reader of NOW_good > == true. There's no explicit ordering between those stores and the > NOW_good = true store. In practice this is fine because SMP isn't active > at this point, but a WRITE_ONCE(NOW_good, true) or a compiler barrier > would make the intent explicit and protect against future reordering by > an optimizing compiler. Hmm, yes. Logically it would want to be smp_wmb(), and then I'll also have to add smp_rmb() in printk_start_of_line(). Jan From xen-devel-bounces@lists.xenproject.org Fri May 22 09:14:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 09:14:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316488.1585885 (Exim 4.92) (envelope-from ) id 1wQLxL-0004IA-7Q; Fri, 22 May 2026 09:14:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316488.1585885; Fri, 22 May 2026 09:14:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQLxL-0004I3-3P; Fri, 22 May 2026 09:14:11 +0000 Received: by outflank-mailman (input) for mailman id 1316488; Fri, 22 May 2026 09:14:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQLxK-0004Hx-Ae for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:14:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQLxJ-00E0O9-JD for xen-devel@lists.xenproject.org; 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>>>> } >>>> >>>> +/* >>>> + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main >>>> + * opcode, shifted left to make room for the ModRM byte. >>> >>> With all of this moved, the comment wants adjusting, at the very least by >>> putting "e.g." in front of the function name. >>> >>>> + * The Grp7 instructions have their ModRM byte expressed in octal for easier >>>> + * cross referencing with the opcode extension table. >>>> + */ >>>> +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) >>>> + >>>> +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) >>>> +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) >>>> +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) >>>> +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) >>>> +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ >>>> +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ >>>> +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ >>>> +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ >>>> +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ >>>> +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ >>>> +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ >>>> +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ >>>> +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ >>>> +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) >>>> +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) >>>> +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) >>>> +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) >>>> +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) >>>> +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) >>>> + >>>> #else /* CONFIG_HVM */ >>> >>> I further wonder whether putting this in hvm.h is a good idea. Is there >>> anything wrong with using a brand new header, e.g. instr-enc.h? >> >> No objection to that. I do wonder though if using the instruction encoding like >> this is the best way of passing through the instruction to the fast path in >> hvm_emulate_one_ctxt() since I think in some cases the instruction encoding >> may not match the actual instruction that triggered the VMEXIT. > > Do you have an example? If so, that would indeed be at risk of being misleading > or actively confusing. (Of course INSTR_VMCALL wants renaming, as was already > suggested.) > VMEXIT_CR0_READ may be triggered by MOV-from-CR or SMSW. There are probably other examples... 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In order to be >>> able to have NOW() return at least monotonically increasing values, that >>> needs replacing by an explicit indicator. >>> >>> Signed-off-by: Jan Beulich >>> --- >>> Arm and RISC-V may want to consider whether their initial get_cycles() >>> can't be moved yet earlier, such that the indicator also can be set >>> yet earlier. >>> --- >> >> At least, for RISC-V ... >> >>> v3: New. >>> >>> --- a/xen/arch/arm/time.c >>> +++ b/xen/arch/arm/time.c >>> @@ -145,6 +145,7 @@ void __init preinit_xen_time(void) >>> panic("Timer: Cannot initialize platform timer\n"); >>> >>> boot_count = get_cycles(); >>> + NOW_good = true; >>> } >>> >>> static void __init init_dt_xen_time(void) >>> --- a/xen/arch/riscv/time.c >>> +++ b/xen/arch/riscv/time.c >>> @@ -87,6 +87,7 @@ void __init preinit_xen_time(void) >>> panic("%s: ACPI isn't supported\n", __func__); >>> >>> boot_clock_cycles = get_cycles(); >>> + NOW_good = true; >> >> ... preinit_xen_time() call could be moved a little bit above just >> after riscv_fill_hwcap() as it is using riscv_isa_extension_available() >> inside. >> >> preinit_xen_time() could be splited so it can be moved just above >> tasklet_subsys_init() after device tree is initialized but I don't think >> there is to much sense for that. >> >>> >>> /* set_xen_timer must have been set by sbi_init() already */ >>> ASSERT(set_xen_timer); >> >> The ASSERT is harmless, but NOW_good could technically go after it. > > "could" or do you perhaps even mean "should"? I'd like to keep the write > next to that of boot_clock_cycles, but of course only if there's no > dependency on set_xen_timer. There is no dependency on set_xen_timer so feel free to keep the write next to that of boot_clock_cycles. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 09:23:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 09:23:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316504.1585902 (Exim 4.92) (envelope-from ) id 1wQM5x-0007CN-5s; Fri, 22 May 2026 09:23:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316504.1585902; Fri, 22 May 2026 09:23:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQM5x-0007CG-2v; Fri, 22 May 2026 09:23:05 +0000 Received: by outflank-mailman (input) for mailman id 1316504; Fri, 22 May 2026 09:23:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQM5v-0007CA-NP for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:23:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wQM5q-000cnf-0T; Fri, 22 May 2026 09:22:58 +0000 Received: from [2a01:e0a:1da:8420:b77:bd5:6e45:7633] (helo=l14) by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.96) (envelope-from ) id 1wQM5p-0013S3-2X; Fri, 22 May 2026 09:22:57 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xenproject.org; s=20200302mail; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date; bh=H31lC0eOpJY3qpXcHt0ef1xE5sHfYgrP7GJ9jWjLaBM=; b=aIS3u1/YrQnynD3MWM5lo3Grvi njtBsTFVWlhv2GJbtcKW204PpT1cUkRi9bXpXPIxXu2Klsh/4FXgQpt13XWzdmOFDPMcHNDA9HDUx Us8NJzc/o5rUs69dvx/jLnVk4c8qiJhP8ZeWNGFEjvjOG7p6LsiPRdwbbzGj3Yxu5pL4=; Date: Fri, 22 May 2026 11:22:55 +0200 From: Anthony PERARD To: Markus Armbruster Cc: qemu-devel@nongnu.org, philmd@linaro.org, pierrick.bouvier@oss.qualcomm.com, Stefano Stabellini , "Edgar E. Iglesias" , xen-devel@lists.xenproject.org Subject: Re: [PATCH 10/39] MAINTAINERS: Drop bad F: in "X86 Xen CPUs" Message-ID: References: <20260521080511.999266-1-armbru@redhat.com> <20260521080511.999266-11-armbru@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260521080511.999266-11-armbru@redhat.com> On Thu, May 21, 2026 at 10:04:42AM +0200, Markus Armbruster wrote: > include/hw/block/dataplane/xen* does not exist. > hw/block/dataplane/xen* does, and is covered. Drop the bad line. > > Fixes: fcab2b464e (xen: add header and build dataplane/xen-block.c, 2019-01-08) > Cc: Stefano Stabellini > Cc: Anthony PERARD > Cc: Edgar E. Iglesias > Cc: xen-devel@lists.xenproject.org > Signed-off-by: Markus Armbruster Reviewed-by: Anthony PERARD Thanks, -- Anthony PERARD From xen-devel-bounces@lists.xenproject.org Fri May 22 09:41:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 09:41:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316522.1585911 (Exim 4.92) (envelope-from ) id 1wQMNw-0003Af-JT; Fri, 22 May 2026 09:41:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316522.1585911; Fri, 22 May 2026 09:41:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQMNw-0003AY-G0; Fri, 22 May 2026 09:41:40 +0000 Received: by outflank-mailman (input) for mailman id 1316522; Fri, 22 May 2026 09:41:38 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQMNu-0003AS-PW for xen-devel@lists.xenproject.org; Fri, 22 May 2026 09:41:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQMNt-00E7da-Vt for xen-devel@lists.xenproject.org; Fri, 22 May 2026 11:41:38 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1024ca-5cb7-0a2a0a5109dd-0a2a4501a2aa-28 for ; Fri, 22 May 2026 11:41:37 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1024d1-c1f2-0a2a45010019-d155dd2bd803-3 for ; Fri, 22 May 2026 11:41:37 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-44e1ebb3122so4390743f8f.2 for ; Fri, 22 May 2026 02:41:37 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <9cd57494-3b11-4e75-a8bd-4fe2767f0490@citrix.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d62444/1779442897-AE342FF4-0764C774/0/0 X-purgate-type: clean X-purgate-size: 3570 On 22.05.2026 11:14, Ross Lagerwall wrote: > On 5/21/26 12:57 PM, Jan Beulich wrote: >> On 21.05.2026 12:12, Ross Lagerwall wrote: >>> On 5/19/26 10:49 AM, Jan Beulich wrote: >>>> On 18.05.2026 15:14, Ross Lagerwall wrote: >>>>> --- a/xen/arch/x86/include/asm/hvm/hvm.h >>>>> +++ b/xen/arch/x86/include/asm/hvm/hvm.h >>>>> @@ -851,6 +851,35 @@ static inline void hvm_sync_pir_to_irr(struct vcpu *v) >>>>> alternative_vcall(hvm_funcs.sync_pir_to_irr, v); >>>>> } >>>>> >>>>> +/* >>>>> + * Encoding for svm_get_insn_len(). We take X86EMUL_OPC() for the main >>>>> + * opcode, shifted left to make room for the ModRM byte. >>>> >>>> With all of this moved, the comment wants adjusting, at the very least by >>>> putting "e.g." in front of the function name. >>>> >>>>> + * The Grp7 instructions have their ModRM byte expressed in octal for easier >>>>> + * cross referencing with the opcode extension table. >>>>> + */ >>>>> +#define INSTR_ENC(opc, modrm) (((opc) << 8) | (modrm)) >>>>> + >>>>> +#define INSTR_PAUSE INSTR_ENC(X86EMUL_OPC_F3(0, 0x90), 0) >>>>> +#define INSTR_INT3 INSTR_ENC(X86EMUL_OPC( 0, 0xcc), 0) >>>>> +#define INSTR_ICEBP INSTR_ENC(X86EMUL_OPC( 0, 0xf1), 0) >>>>> +#define INSTR_HLT INSTR_ENC(X86EMUL_OPC( 0, 0xf4), 0) >>>>> +#define INSTR_XSETBV INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0321) /* octal-ok */ >>>>> +#define INSTR_VMRUN INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0330) /* octal-ok */ >>>>> +#define INSTR_VMCALL INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0331) /* octal-ok */ >>>>> +#define INSTR_VMLOAD INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0332) /* octal-ok */ >>>>> +#define INSTR_VMSAVE INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0333) /* octal-ok */ >>>>> +#define INSTR_STGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0334) /* octal-ok */ >>>>> +#define INSTR_CLGI INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0335) /* octal-ok */ >>>>> +#define INSTR_INVLPGA INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0337) /* octal-ok */ >>>>> +#define INSTR_RDTSCP INSTR_ENC(X86EMUL_OPC(0x0f, 0x01), 0371) /* octal-ok */ >>>>> +#define INSTR_INVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x08), 0) >>>>> +#define INSTR_WBINVD INSTR_ENC(X86EMUL_OPC(0x0f, 0x09), 0) >>>>> +#define INSTR_WRMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x30), 0) >>>>> +#define INSTR_RDTSC INSTR_ENC(X86EMUL_OPC(0x0f, 0x31), 0) >>>>> +#define INSTR_RDMSR INSTR_ENC(X86EMUL_OPC(0x0f, 0x32), 0) >>>>> +#define INSTR_CPUID INSTR_ENC(X86EMUL_OPC(0x0f, 0xa2), 0) >>>>> + >>>>> #else /* CONFIG_HVM */ >>>> >>>> I further wonder whether putting this in hvm.h is a good idea. Is there >>>> anything wrong with using a brand new header, e.g. instr-enc.h? >>> >>> No objection to that. I do wonder though if using the instruction encoding like >>> this is the best way of passing through the instruction to the fast path in >>> hvm_emulate_one_ctxt() since I think in some cases the instruction encoding >>> may not match the actual instruction that triggered the VMEXIT. >> >> Do you have an example? If so, that would indeed be at risk of being misleading >> or actively confusing. (Of course INSTR_VMCALL wants renaming, as was already >> suggested.) >> > > VMEXIT_CR0_READ may be triggered by MOV-from-CR or SMSW. There are probably > other examples... Like LMSW, then also relevant to VMX. I think these indeed better wouldn't use the wrong INSTR_*. On SVM with decode assists, SMSW can be identified, but LMSW / CLTS are ambiguous without fetching the insn. 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Fri, 22 May 2026 03:13:58 -0700 (PDT) MIME-Version: 1.0 References: <998162706f89bb3100bda409d8fde3c8b143eae6.1777886129.git.mykola_kvach@epam.com> <6ebccf8b-c90f-4dca-acf3-ea9cc0dd97f9@amd.com> In-Reply-To: <6ebccf8b-c90f-4dca-acf3-ea9cc0dd97f9@amd.com> From: Mykola Kvach Date: Fri, 22 May 2026 13:13:47 +0300 X-Gm-Features: AVHnY4JTY5oRYwLyLX9db7cgfHvfqQZA12KjiW4RrfsCgewum5DgEcTugvUwajg Message-ID: Subject: Re: [PATCH] xen/arm: scan CLIDR Ctype fields upwards when probing LLC To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1779444839-83F66161-DA40A2A9/0/0 X-purgate-type: clean X-purgate-size: 4039 Hi Michal, Thank you for the feedback. On Fri, May 22, 2026 at 9:41=E2=80=AFAM Orzel, Michal wrote: > > > > On 04-May-26 11:19, Mykola Kvach wrote: > > From: Mykola Kvach > > > > get_llc_way_size() currently scans CLIDR_EL1 Ctype fields from the > > highest level downwards and stops at the first unified cache it finds. > > > > However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. > > Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a > > Ctype value of 0b000 while reading from Ctype1 upwards, no caches > > manageable by the architected set/way maintenance instructions exist at > > further-out levels, and the higher Ctype fields must be ignored. > > > > The current reverse scan can therefore select a unified cache level fro= m > > a Ctype field above the first no-cache level. Such a field is not part = of > > the architecturally described CLIDR/CCSIDR cache hierarchy and should n= ot > > be used for selecting the CCSIDR level. > > > > Scan Ctype fields from L1 upwards, stop at the first no-cache level, an= d > > keep the outermost unified cache observed before that point. > > > > This preserves the result for regular cache hierarchies, while avoiding > > selection of an architecturally ignored Ctype field. > > > > Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on = arm64") > > Signed-off-by: Mykola Kvach > > --- > > This patch follows the xen-devel discussion: > > https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.h= tml > > > > In that thread, Michal noted that the reverse scan was a simplification > > rather than an intentional requirement, and that changing the > > implementation would be fine. > > > > Testing performed: > > - standalone synthetic CLIDR tests covered both regular and pathologica= l > > Ctype sequences and showed that the forward scan ignores unified cach= e > > levels above the first Ctype =3D=3D 0b000 while the reverse scan can = pick > > them > > - Renesas H3ULCB booted with llc-coloring=3Don > > --- > > xen/arch/arm/llc-coloring.c | 22 +++++++++++++++++----- > > 1 file changed, 17 insertions(+), 5 deletions(-) > > > > diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c > > index 6f78817c57..3783f4c824 100644 > > --- a/xen/arch/arm/llc-coloring.c > > +++ b/xen/arch/arm/llc-coloring.c > > @@ -22,21 +22,33 @@ unsigned int __init get_llc_way_size(void) > > register_t id_aa64mmfr2_el1 =3D READ_SYSREG(ID_AA64MMFR2_EL1); > > uint32_t ccsidr_numsets_shift =3D CCSIDR_NUMSETS_SHIFT; > > uint32_t ccsidr_numsets_mask =3D CCSIDR_NUMSETS_MASK; > > - unsigned int n, line_size, num_sets; > > - > > - for ( n =3D CLIDR_CTYPEn_LEVELS; n !=3D 0; n-- ) > > + unsigned int n, line_size, num_sets, llc_level =3D 0; > > + > > + /* > > + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Onc= e a > > + * no-cache level is seen, higher Ctype fields are architecturally= ignored > > + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. > > + * > > + * Keep the outermost unified cache before that point. > > + */ > > + for ( n =3D 1; n <=3D CLIDR_CTYPEn_LEVELS; n++ ) > > { > > uint8_t ctype_n =3D (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & > > CLIDR_CTYPEn_MASK; > > > > + if ( ctype_n =3D=3D 0b000 ) > > + break; > > + > > /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ > > if ( ctype_n =3D=3D 0b100 ) > > - break; > > + llc_level =3D n; > > } > > > > - if ( n =3D=3D 0 ) > > + if ( !llc_level ) > > return 0; > > > > + n =3D llc_level; > After a loop, n does not carry any meaning, so I find this assignment a b= it odd > and confusing to read. Just use llc_level below. With that: Ack. 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=?utf-8?B?UkgycU9vaE1uNVJxL2dJRzNxMllLWmxrNEY0bGJXR1JYQUJIdDVFMnFPTTFM?= =?utf-8?Q?//VMHVDKiGcLNaGU=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 53ef9f1a-42d5-42e0-d6cf-08deb7ebb16c X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2026 10:20:05.5766 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: U8hEYU8klWBTV6x0e6GJXmuhWwVHrbtlNiu2J58WYW1W8t4T+7VxpxMK5y8uhbE0DcLJqEdrLjJAjyjLq0DCvdm35tTKTXlhVuuqWoBjB0E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR03MB6614 X-purgate-ID: tlsNG-16d1c6/1779445213-8DF81D75-6F34DDF9/0/0 X-purgate-type: clean X-purgate-size: 1835 On 20/05/2026 11:58 pm, Victor Lira wrote: > rewrite analyze jobs rules to simplify the conditions under which the > jobs appear and run > > after these changes: > - to appear, all jobs must be selected (SELECTED_JOBS_ONLY), have token > (WTOKEN), and be in an allowed path (CI_PROJECT_PATH), this is specified in > .eclair-analysis > - the subcategories have their own exceptions, keeping current behavior: > - ECLAIR_SAFETY/ECLAIR_TESTING can force enable some > - eclair-testing jobs will not appear outside xen-project/people > > This assumes we don't use pipeline sources other than push/api/schedule. > > Signed-off-by: Victor Lira > --- > this preseves the current behavior of the -testing jobs running anywhere on > xen-project/people but maybe we want to limit it to whoever is doing the > testing, or in some other way > > tested on my own repo xen-project/people/victormlira/xen > > push https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541858231 > push /eclair-x86_64-amd$|alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859057 > push /alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859605 > schedule https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541871689 > schedule /eclair-x86_64-amd$|alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541875599 > schudule /alpine-3.18-gcc$/ https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541876512 I'm afraid this still doesn't work. I pushed with ci.variable=SELECTED_JOBS_ONLY="/eclair-x86_64-allcode/" and still got the eclair-*-amd jobs started. https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2545988798 ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 22 10:24:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 10:24:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316567.1585945 (Exim 4.92) (envelope-from ) id 1wQN33-0003Gl-9e; Fri, 22 May 2026 10:24:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316567.1585945; Fri, 22 May 2026 10:24:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQN33-0003Ge-6z; Fri, 22 May 2026 10:24:09 +0000 Received: by outflank-mailman (input) for mailman id 1316567; Fri, 22 May 2026 10:24:08 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQN32-0003GY-CC for xen-devel@lists.xenproject.org; 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Date: Fri, 22 May 2026 12:24:00 +0200 From: Roger Pau =?utf-8?B?TW9ubsOp?= To: Jan Beulich Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie Subject: Re: [PATCH 2/5] x86/PV: rename a local variable in pv_emulate_gate_op() Message-ID: References: <5eaaf72a-850c-4535-9f20-13b4feed38d1@suse.com> <871c0ca7-898f-4bc6-8115-d94d40b88301@suse.com> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <871c0ca7-898f-4bc6-8115-d94d40b88301@suse.com> X-ClientProxiedBy: MR1P264CA0021.FRAP264.PROD.OUTLOOK.COM (2603:10a6:501:2f::8) To CH7PR03MB7860.namprd03.prod.outlook.com (2603:10b6:610:24e::14) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH7PR03MB7860:EE_|CH8PR03MB8225:EE_ X-MS-Office365-Filtering-Correlation-Id: 0b5e9c06-aa6f-4856-258b-08deb7ec3fba X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|366016|376014|22082099003|18002099003|56012099003|11063799006|4143699003; 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No difference in generated code. > > Signed-off-by: Jan Beulich > --- > Technically, as the outer scope "rc" isn't used again later, we could > simply drop the inner decl. That seemed more error prone to me, though. > > --- a/xen/arch/x86/pv/emul-gate-op.c > +++ b/xen/arch/x86/pv/emul-gate-op.c > @@ -286,16 +286,16 @@ void pv_emulate_gate_op(struct cpu_user_ > if ( !jump ) > { > unsigned int ss, esp, *stkp; > - int rc; > + int left; > #define push(item) do \ > { \ > --stkp; \ > esp -= 4; \ > - rc = __put_guest(item, stkp); \ > - if ( rc ) \ > + left = __put_guest(item, stkp); \ > + if ( left ) \ > { \ > pv_inject_page_fault(PFEC_write_access, \ > - (unsigned long)(stkp + 1) - rc); \ > + (unsigned long)(stkp + 1) - left); \ > return; \ > } \ > } while ( 0 ) > @@ -359,10 +359,11 @@ void pv_emulate_gate_op(struct cpu_user_ > unsigned int parm; > > --ustkp; > - rc = __get_guest(parm, ustkp); > - if ( rc ) > + left = __get_guest(parm, ustkp); > + if ( left ) > { > - pv_inject_page_fault(0, (unsigned long)(ustkp + 1) - rc); > + pv_inject_page_fault(0, > + (unsigned long)(ustkp + 1) - left); __{put,get}_guest() return -EFAULT on error, and hence the addition/subtraction here is wrong AFAICT. Thanks, Roger. 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No difference in generated code. >> >> Signed-off-by: Jan Beulich >> --- >> Technically, as the outer scope "rc" isn't used again later, we could >> simply drop the inner decl. That seemed more error prone to me, though. >> >> --- a/xen/arch/x86/pv/emul-gate-op.c >> +++ b/xen/arch/x86/pv/emul-gate-op.c >> @@ -286,16 +286,16 @@ void pv_emulate_gate_op(struct cpu_user_ >> if ( !jump ) >> { >> unsigned int ss, esp, *stkp; >> - int rc; >> + int left; >> #define push(item) do \ >> { \ >> --stkp; \ >> esp -= 4; \ >> - rc = __put_guest(item, stkp); \ >> - if ( rc ) \ >> + left = __put_guest(item, stkp); \ >> + if ( left ) \ >> { \ >> pv_inject_page_fault(PFEC_write_access, \ >> - (unsigned long)(stkp + 1) - rc); \ >> + (unsigned long)(stkp + 1) - left); \ >> return; \ >> } \ >> } while ( 0 ) >> @@ -359,10 +359,11 @@ void pv_emulate_gate_op(struct cpu_user_ >> unsigned int parm; >> >> --ustkp; >> - rc = __get_guest(parm, ustkp); >> - if ( rc ) >> + left = __get_guest(parm, ustkp); >> + if ( left ) >> { >> - pv_inject_page_fault(0, (unsigned long)(ustkp + 1) - rc); >> + pv_inject_page_fault(0, >> + (unsigned long)(ustkp + 1) - left); > __{put,get}_guest() return -EFAULT on error, and hence the > addition/subtraction here is wrong AFAICT. Yes.  Teddy has a patch out to fix that, and this patch needs rebasing over it. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 22 10:29:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 10:29:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316584.1585964 (Exim 4.92) (envelope-from ) id 1wQN7o-0004sZ-3P; Fri, 22 May 2026 10:29:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316584.1585964; Fri, 22 May 2026 10:29:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQN7o-0004sS-09; Fri, 22 May 2026 10:29:04 +0000 Received: by outflank-mailman (input) for mailman id 1316584; Fri, 22 May 2026 10:29:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQN7m-0004sK-1L for xen-devel@lists.xenproject.org; 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\ > + unsigned int _i, _nr = SHADOW_L2_PAGETABLE_ENTRIES; \ > shadow_l2e_t *_sp = map_domain_page((_sl2mfn)); \ > ASSERT_VALID_L2(mfn_to_page(_sl2mfn)->u.sh.type); \ > if ( is_pv_32bit_domain(_dom) /* implies !paging_mode_external */ && \ > mfn_to_page(_sl2mfn)->u.sh.type != SH_type_l2_64_shadow ) \ > - _end = COMPAT_L2_PAGETABLE_FIRST_XEN_SLOT(_dom); \ > - for ( _i = 0; _i < _end; ++_i ) \ > + _nr = COMPAT_L2_PAGETABLE_FIRST_XEN_SLOT(_dom); \ > + for ( _i = 0; _i < _nr; ++_i ) \ > { \ > (_sl2e) = _sp + _i; \ > if ( shadow_l2e_get_flags(*(_sl2e)) & _PAGE_PRESENT ) \ > @@ -3349,7 +3349,9 @@ static pagetable_t cf_check sh_update_cr > #if SHADOW_PAGING_LEVELS == 3 > { > mfn_t smfn = pagetable_get_mfn(v->arch.paging.shadow.shadow_table[0]); > +#if GUEST_PAGING_LEVELS != 3 > unsigned int i; > +#endif Hm, that one is nasty, we would better use a different variable name, but that would be more churn. Thanks, Roger. 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Content-Type: text/plain; charset=US-ASCII; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-33051d/1779445953-36D43938-CE043129/0/0 X-purgate-type: clean X-purgate-size: 2260 On 2026-05-22 12:20, Andrew Cooper wrote: > On 20/05/2026 11:58 pm, Victor Lira wrote: >> rewrite analyze jobs rules to simplify the conditions under which the >> jobs appear and run >> >> after these changes: >> - to appear, all jobs must be selected (SELECTED_JOBS_ONLY), have >> token >> (WTOKEN), and be in an allowed path (CI_PROJECT_PATH), this is >> specified in >> .eclair-analysis >> - the subcategories have their own exceptions, keeping current >> behavior: >> - ECLAIR_SAFETY/ECLAIR_TESTING can force enable some >> - eclair-testing jobs will not appear outside xen-project/people >> >> This assumes we don't use pipeline sources other than >> push/api/schedule. >> >> Signed-off-by: Victor Lira >> --- >> this preseves the current behavior of the -testing jobs running >> anywhere on >> xen-project/people but maybe we want to limit it to whoever is doing >> the >> testing, or in some other way >> >> tested on my own repo xen-project/people/victormlira/xen >> >> push >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541858231 >> push /eclair-x86_64-amd$|alpine-3.18-gcc$/ >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859057 >> push /alpine-3.18-gcc$/ >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541859605 >> schedule >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541871689 >> schedule /eclair-x86_64-amd$|alpine-3.18-gcc$/ >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541875599 >> schudule /alpine-3.18-gcc$/ >> https://gitlab.com/xen-project/people/victormlira/xen/-/pipelines/2541876512 > > I'm afraid this still doesn't work. > > I pushed with ci.variable=SELECTED_JOBS_ONLY="/eclair-x86_64-allcode/" > and still got the eclair-*-amd jobs started. > > https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2545988798 > > ~Andrew Perhaps it's because the runner is marked as a safety runner? rules: - if: $ECLAIR_SAFETY when: always -- Nicola Vetrini, B.Sc. Software Engineer BUGSENG (https://bugseng.com) LinkedIn: https://www.linkedin.com/in/nicola-vetrini-a42471253 From xen-devel-bounces@lists.xenproject.org Fri May 22 10:34:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 10:34:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316608.1585990 (Exim 4.92) (envelope-from ) id 1wQNCq-0007Yd-5Q; Fri, 22 May 2026 10:34:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316608.1585990; Fri, 22 May 2026 10:34:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNCq-0007YW-2c; Fri, 22 May 2026 10:34:16 +0000 Received: by outflank-mailman (input) for mailman id 1316608; Fri, 22 May 2026 10:34:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNCp-0007YD-9c for xen-devel@lists.xenproject.org; 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Message-ID: Date: Fri, 22 May 2026 11:34:07 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH] crypto/vmac: adjust for Misra C:2012 rule 17.5 To: Jan Beulich References: <036752dc-5333-4d01-acaf-ed450e09fe48@suse.com> <7ef99f0e-2847-49d8-8701-8243e4b073ed@citrix.com> <1019524f-bbe0-46b3-b742-d7404732bc66@suse.com> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <1019524f-bbe0-46b3-b742-d7404732bc66@suse.com> Content-Type: text/plain; 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("The function argument corresponding to a parameter declared to have >>> an array type shall have an appropriate number of elements"). Instead of >>> casts, (ab)use unions. >>> >>> Signed-off-by: Jan Beulich >> The Rule 17.5 violations aren't reported against this function. > The report is against uses of aes_encryption() from this function. Oh, that's very well hidden in the report.  Both the top and bottom of it say rijndaelEncrypt(). > --- a/xen/crypto/vmac.c > +++ b/xen/crypto/vmac.c > @@ -926,41 +926,41 @@ uint64_t vmac(unsigned char m[], > > void vmac_set_key(const unsigned char user_key[], vmac_ctx_t *ctx) > { > - uint64_t in[2] = {0}, out[2]; > + union { > + uint64_t q[2]; > + uint8_t b[16]; > + } in, out; > unsigned i; > aes_key_setup(user_key, &ctx->cipher_key); > > /* Fill nh key */ > - ((unsigned char *)in)[0] = 0x80; > + in = (typeof(in)){ .b[0] = 0x80 }; typeof like this is not good for legibility. In this case, I'd prefer to keep the "} in = {}, out;" pattern from before, and this line be a direct translation like the others in the file. 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("A switch label shall only be used when the most closely-enclosing > compound statement is the body of a `switch' statement"). While I don't > really like doing so, use a few "goto" instead. No change in generated > code (somewhat to my surprise). > > Signed-off-by: Jan Beulich Acked-by: Roger Pau Monné With one alternative below if you would like to remove one of the introduced labels. > > --- a/xen/arch/x86/pv/emul-priv-op.c > +++ b/xen/arch/x86/pv/emul-priv-op.c > @@ -897,7 +897,7 @@ static int cf_check read_msr( > struct vcpu *curr = current; > const struct domain *currd = curr->domain; > const struct cpu_policy *cp = currd->arch.cpu_policy; > - bool vpmu_msr = false, warn = false; > + bool warn = false; > uint64_t tmp; > int ret; > > @@ -996,21 +996,21 @@ static int cf_check read_msr( > case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: > case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: > if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) > - { > - vpmu_msr = true; > - /* fall through */ > + goto vpmu; > + goto check_relaxed; > + > case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: > case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: > - if ( vpmu_msr || (boot_cpu_data.vendor & > - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) > - { > - if ( vpmu_do_rdmsr(reg, val) ) > - break; > - return X86EMUL_OKAY; > - } > + if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) > + { > + vpmu: > + if ( vpmu_do_rdmsr(reg, val) ) > + break; > + return X86EMUL_OKAY; > } > /* fall through */ > default: > + check_relaxed: Not sure it's much better, but I think you could avoid the vpmu label at the cost of keeping the vpmu_msr local variable: case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ) goto check_relaxed; vpmu_msr = true; fallthrough; case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: if ( vpmu_msr || (boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) Thanks, Roger. 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pr=C From: Alejandro Vallejo To: CC: Alejandro Vallejo , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , "Julien Grall" , Oleksii Kurochko , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , "Stefano Stabellini" , Oleksandr Tyshchenko Subject: [for-4.22 PATCH] xen/gnttab: Fix TOCTOU race in gnttab_set_version() Date: Fri, 22 May 2026 12:57:06 +0200 Message-ID: <20260522105709.25073-1-alejandro.garciavallejo@amd.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: satlexmb07.amd.com (10.181.42.216) To satlexmb07.amd.com (10.181.42.216) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF000023CB:EE_|BN7PPFABD533732:EE_ X-MS-Office365-Filtering-Correlation-Id: f988b662-9caf-406e-3ea4-08deb7f0e845 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|82310400026|1800799024|30052699003|6133799003|56012099003|18002099003|11063799006|5023799004; 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Fixes: c1488502c949("grant-tables: do not fail attempts to...") Reported-by: Oleksandr Tyshchenko Signed-off-by: Alejandro Vallejo --- This is far from a problem in practice, because kernels invoke this once and then are done. Still, correctness mandates correctness. There are a number of lockless reads of gt_version (e.g: right after unlock), but they aren't very worrying because they are effectively snapshots of the instantaneous version. I'd feel better if they were all atomic_read(), but all Xen ports guarantee atomic access on aligned 4 octet fields, so I couldn't be bothered to go chase them. --- xen/common/grant_table.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c index 2dda1abd3f..ac9fed6001 100644 --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -3184,11 +3184,12 @@ gnttab_set_version(XEN_GUEST_HANDLE_PARAM(gnttab_set_version_t) uop) if ( op.version == 2 && gt->max_version == 1 ) goto out; /* Behave as before set_version was introduced. */ + grant_write_lock(gt); + res = 0; if ( gt->gt_version == op.version ) - goto out; + goto out_unlock; - grant_write_lock(gt); /* * Make sure that the grant table isn't currently in use when we * change the version number, except for the first 8 entries which base-commit: aaa34f23ac65b75c94d069e407a2698602f18d56 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 11:00:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 11:00:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316652.1586030 (Exim 4.92) (envelope-from ) id 1wQNcX-0006MZ-UX; Fri, 22 May 2026 11:00:49 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316652.1586030; Fri, 22 May 2026 11:00:49 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNcX-0006MS-Ri; Fri, 22 May 2026 11:00:49 +0000 Received: by outflank-mailman (input) for mailman id 1316652; Fri, 22 May 2026 11:00:48 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNcW-0006ML-Bg for xen-devel@lists.xenproject.org; Fri, 22 May 2026 11:00:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQNcU-006B5O-A3 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 13:00:46 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a10375b-5cb7-0a2a0a5109dd-0a2a450cd1ec-24 for ; Fri, 22 May 2026 13:00:46 +0200 Received: from [209.85.221.50] (helo=mail-wr1-f50.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a10375d-62f1-0a2a450c0019-d155dd32d08f-3 for ; Fri, 22 May 2026 13:00:46 +0200 Received: by mail-wr1-f50.google.com with SMTP id ffacd0b85a97d-44ccbd3290aso6557903f8f.2 for ; Fri, 22 May 2026 04:00:45 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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Fri, 22 May 2026 04:00:42 -0700 (PDT) Message-ID: Date: Fri, 22 May 2026 13:00:41 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] x86/PV: address Misra C:2012 rule 16.2 To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: "xen-devel@lists.xenproject.org" , Andrew Cooper , Teddy Astie References: Content-Language: en-US From: Jan Beulich Autocrypt: addr=jbeulich@suse.com; keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779447646-D956FCF5-BF772BC7/0/0 X-purgate-type: clean X-purgate-size: 2911 On 22.05.2026 12:49, Roger Pau Monné wrote: > On Wed, May 13, 2026 at 04:06:20PM +0200, Jan Beulich wrote: >> ... ("A switch label shall only be used when the most closely-enclosing >> compound statement is the body of a `switch' statement"). While I don't >> really like doing so, use a few "goto" instead. No change in generated >> code (somewhat to my surprise). >> >> Signed-off-by: Jan Beulich > > Acked-by: Roger Pau Monné Thanks. > With one alternative below if you would like to remove one of the > introduced labels. > >> >> --- a/xen/arch/x86/pv/emul-priv-op.c >> +++ b/xen/arch/x86/pv/emul-priv-op.c >> @@ -897,7 +897,7 @@ static int cf_check read_msr( >> struct vcpu *curr = current; >> const struct domain *currd = curr->domain; >> const struct cpu_policy *cp = currd->arch.cpu_policy; >> - bool vpmu_msr = false, warn = false; >> + bool warn = false; >> uint64_t tmp; >> int ret; >> >> @@ -996,21 +996,21 @@ static int cf_check read_msr( >> case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: >> case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: >> if ( boot_cpu_data.vendor == X86_VENDOR_INTEL ) >> - { >> - vpmu_msr = true; >> - /* fall through */ >> + goto vpmu; >> + goto check_relaxed; >> + >> case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: >> case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: >> - if ( vpmu_msr || (boot_cpu_data.vendor & >> - (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) >> - { >> - if ( vpmu_do_rdmsr(reg, val) ) >> - break; >> - return X86EMUL_OKAY; >> - } >> + if ( boot_cpu_data.vendor & (X86_VENDOR_AMD | X86_VENDOR_HYGON) ) >> + { >> + vpmu: >> + if ( vpmu_do_rdmsr(reg, val) ) >> + break; >> + return X86EMUL_OKAY; >> } >> /* fall through */ >> default: >> + check_relaxed: > > Not sure it's much better, but I think you could avoid the vpmu label > at the cost of keeping the vpmu_msr local variable: > > case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2: > case MSR_CORE_PERF_FIXED_CTR_CTRL ... MSR_CORE_PERF_GLOBAL_OVF_CTRL: > if ( boot_cpu_data.vendor != X86_VENDOR_INTEL ) > goto check_relaxed; > vpmu_msr = true; > fallthrough; > > case MSR_AMD_FAM15H_EVNTSEL0 ... MSR_AMD_FAM15H_PERFCTR5: > case MSR_K7_EVNTSEL0 ... MSR_K7_PERFCTR3: > if ( vpmu_msr || (boot_cpu_data.vendor & > (X86_VENDOR_AMD | X86_VENDOR_HYGON)) ) I was actually happy to see this last construct go away, which your variant would retain. Jan From xen-devel-bounces@lists.xenproject.org Fri May 22 11:03:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 11:03:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316662.1586040 (Exim 4.92) (envelope-from ) id 1wQNen-00074b-DR; Fri, 22 May 2026 11:03:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316662.1586040; Fri, 22 May 2026 11:03:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNen-00074U-AD; Fri, 22 May 2026 11:03:09 +0000 Received: by outflank-mailman (input) for mailman id 1316662; Fri, 22 May 2026 11:03:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQNem-00074M-92 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 11:03:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQNel-00204M-Hb for xen-devel@lists.xenproject.org; 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Smith" , Roger Pau =?utf-8?B?TW9ubsOp?= , Teddy Astie , xen-devel@lists.xenproject.org Subject: Re: [PATCH v2 for-4.22] EFI: Fix boot from a device without a file system Message-ID: References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> <31ee4635-0eaa-41cd-8fad-223fb11cb9bc@suse.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="+lvQ2y5XmQnkW01G" Content-Disposition: inline In-Reply-To: X-purgate-ID: tlsNG-720697/1779447786-8117D161-0B31C4AF/0/0 X-purgate-type: clean X-purgate-size: 5782 --+lvQ2y5XmQnkW01G Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Fri, 22 May 2026 13:02:59 +0200 From: Marek Marczykowski To: Szymon =?utf-8?Q?Aceda=C5=84ski?= Cc: Jan Beulich , oleksii.kurochko@gmail.com, Andrew Cooper , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. Smith" , Roger Pau =?utf-8?B?TW9ubsOp?= , Teddy Astie , xen-devel@lists.xenproject.org Subject: Re: [PATCH v2 for-4.22] EFI: Fix boot from a device without a file system On Wed, May 20, 2026 at 02:50:57PM +0200, Szymon Aceda=C5=84ski wrote: > On Wed, May 20, 2026, at 1:58 PM, Jan Beulich wrote: > > On 20.05.2026 12:30, Szymon Aceda=C5=84ski wrote: > > > @@ -1526,31 +1537,33 @@ void EFIAPI __init noreturn efi_start(EFI_HAN= DLE ImageHandle, > > > =20 > > > gop =3D efi_get_gop(&gop_handle); > > > =20 > > > - /* Get the file system interface. */ > > > - dir_handle =3D get_parent_handle(loaded_image, &file_name); > > > - > > > /* Read and parse the config file. */ > > > if ( read_section(loaded_image, L"config", &cfg, NULL) ) > > > PrintStr(L"Using builtin config file\r\n"); > > > - else if ( !cfg_file_name && file_name ) > > > + else > > > { > > > - CHAR16 *tail; > > > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > > > =20 > > > - while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > > + if ( !cfg_file_name ) > > > { > > > - wstrcpy(tail, L".cfg"); > > > - if ( read_file(dir_handle, file_name, &cfg, NULL) ) > > > - break; > > > - *tail =3D 0; > > > + CHAR16 *tail; > > > + > > > + while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > > + { > > > + wstrcpy(tail, L".cfg"); > > > + if ( read_file(dir_handle, file_name, &cfg, NULL= ) ) > > > + break; > > > + *tail =3D 0; > > > + } > > > + if ( !tail ) > > > + blexit(L"No configuration file found."); > > > + PrintStr(L"Using configuration file '"); > > > + PrintStr(file_name); > > > + PrintStr(L"'\r\n"); > > > } > > > - if ( !tail ) > > > - blexit(L"No configuration file found."); > > > - PrintStr(L"Using configuration file '"); > > > - PrintStr(file_name); > > > - PrintStr(L"'\r\n"); > > > + else if ( !read_file(dir_handle, cfg_file_name, &cfg, NU= LL) ) > > > + blexit(L"Configuration file not found."); > > > } > > > - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) > > > - blexit(L"Configuration file not found."); > > > pre_parse(&cfg); > > > =20 > > > if ( section.w ) > >=20 > > Seeing in particular this hunk - why not have read_file() call the new = function? >=20 > This is because get_parent_handle not only sets dir_handle, but also sets > file_name to something like xen.efi or BOOTX64.EFI. The quoted code then > replaces .efi with .cfg to get the path to the config file to load: Yes, especially for this case, get_parent_handle() needs to be called before read_file(). Other calls don't need that, but I'm not sure if having two ways of calling read_file() would be better. Speaking of, the dir_handle=3D=3DNULL case in read_file() is unreachable now, right? Maybe can be replaced with an assert? > > > + while ( (tail =3D point_tail(file_name)) !=3D NULL ) > > > + { > > > + wstrcpy(tail, L".cfg"); > > > + if ( read_file(dir_handle, file_name, &cfg, NULL= ) ) >=20 > I considered calling ensure_dir_handle() from read_file() for the other > call sites, but this would: > - still leave the explicit call in the quoted hunk, so it's a bit > inconsistent (most calls implicit, one explicit) > - requires passing loaded_image to read_file + changing dir_handle > argument to a pointer >=20 > Happy to do it in v3 if you think the call-site savings outweigh > the inconsistency and the extra argument. >=20 > > Most of the churn here would then go away. >=20 > The hunk above is the restructure of two else-if branches into a single > else block with ensure_dir_handle() on top. Most of the churn is > indentation. >=20 > Szymon >=20 > (ACK on sending new patch versions as new threads) --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --+lvQ2y5XmQnkW01G Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmoQN+QACgkQ24/THMrX 1yyxoQgAjlBHwLXNAam5S09OUdm64jI8DNxh5plkhgZq3yx92YJujMLr5+Cnlg2h 66nG37AkIJfpzI8xM/KiAdnmoSy7kMbgmTOyIq5CSrntpVD41Tmy3RxDIJhTXUJj y1SkKjwfUJ/t9FrKJT5yEn9ZKWilGW5L5odCot4zsW06oD5kHIroSJ2EHKK9ZZli 1ZtJ/1uM5bE8GId+GqXm4mgP9QG07r6rzNycfuPq8jAtbivOZaguhSpXAVKvJ4qw B5Oc81I64xe/vTmAo8jSK22m2xK9T0tsT5DJeyMEH7Bqf/Xb9BAWZeeSp2cF9gnP Nnsy2ymQRg6b31ARoQlokkVv2Gxeqg== =5vdS -----END PGP SIGNATURE----- --+lvQ2y5XmQnkW01G-- From xen-devel-bounces@lists.xenproject.org Fri May 22 11:32:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 11:32:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316691.1586049 (Exim 4.92) (envelope-from ) id 1wQO6Q-0004Ht-Lq; Fri, 22 May 2026 11:31:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316691.1586049; Fri, 22 May 2026 11:31:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQO6Q-0004Hm-JC; Fri, 22 May 2026 11:31:42 +0000 Received: by outflank-mailman (input) for mailman id 1316691; Fri, 22 May 2026 11:31:41 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQO6P-0004Hg-3S for xen-devel@lists.xenproject.org; Fri, 22 May 2026 11:31:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQO6O-006HyH-1b for xen-devel@lists.xenproject.org; Fri, 22 May 2026 13:31:40 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a103e87-5cb7-0a2a0a5109dd-0a2a450cae20-48 for ; Fri, 22 May 2026 13:31:39 +0200 Received: from [209.85.221.54] (helo=mail-wr1-f54.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a103e9b-62f1-0a2a450c0019-d155dd36a864-3 for ; Fri, 22 May 2026 13:31:39 +0200 Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-44dd5cb0f81so5566419f8f.0 for ; Fri, 22 May 2026 04:31:39 -0700 (PDT) Received: from [10.156.60.236] (ip-037-024-206-209.um08.pools.vodafone-ip.de. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260522105709.25073-1-alejandro.garciavallejo@amd.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-d25034/1779449499-E0F62CF5-C4D05F02/0/0 X-purgate-type: clean X-purgate-size: 957 On 22.05.2026 12:57, Alejandro Vallejo wrote: > Move first read of gt->gt_version inside the critical region of the > rwlock, otherwise concurrent gnttab operations (silly as they would be) > may get mutually confused as to the actual current version. > > Fixes: c1488502c949("grant-tables: do not fail attempts to...") > Reported-by: Oleksandr Tyshchenko > Signed-off-by: Alejandro Vallejo Reviewed-by: Jan Beulich > There are a number of lockless reads of gt_version (e.g: right after unlock), > but they aren't very worrying because they are effectively snapshots of the > instantaneous version. I'd feel better if they were all atomic_read(), but all > Xen ports guarantee atomic access on aligned 4 octet fields, so I couldn't be > bothered to go chase them. Sooner or later we will want to deal with all (latent) problems of this kind. Jan From xen-devel-bounces@lists.xenproject.org Fri May 22 12:24:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 12:24:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316724.1586071 (Exim 4.92) (envelope-from ) id 1wQOvB-00055Y-JO; Fri, 22 May 2026 12:24:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316724.1586071; Fri, 22 May 2026 12:24:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQOvB-00055Q-FM; Fri, 22 May 2026 12:24:09 +0000 Received: by outflank-mailman (input) for mailman id 1316724; Fri, 22 May 2026 12:24:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQOvA-00055K-3L for xen-devel@lists.xenproject.org; Fri, 22 May 2026 12:24:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQOv9-006ODu-Ej for xen-devel@lists.xenproject.org; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=8i7nULkws/S/u415AReAU6V5YZyWrzfJhGhmffEUBJI=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=odlHCq05VRUp1R2kNjuYhFcO45q3J1ZuKA0BRIb4a79Q7Z5ABaGAEVcCCMoAdKqKthyF5a9Yf n1D3betJiY2Im8UwiElHWN9A8Zeu/nkXVyjq17LKIOow6wlK5oVQvicqAZ5pOaClJmo3HLPIDfd lH2U59HjUX4HqsEpmCNzBJLLD1SRXbaEotiQfT7vB7J6jN9BH0GAX6Nmz/B31+G5yN2CXwWUccn vuDEBwaJlbMtDf8712arZCvjWuYRj/3F3LzG99JDBVQE562k2L6XJVnyAtRETTgqM7netxkmTz8 x6JtWKn3X4Nu7SMXzjMKxa5Lq60LgHWiymZFLoItYygA== X-Zone-Loop: 1d18b5a0c1e15245d1999d450963cd0602742097590e x-campaign-type: default x-transaction-id: 2249cc6a-b8b6-4462-a299-47bd2dfe9dba x-swg-uid: 01-5171774b-106b-4f75-b025-b1c6b60a906d X-Mailer: Sweego Message-ID: <1779452642.8631fc262581453bbf619ec5b2062170.19e4fa4847a000f373@vates.tech> x-swg-bid: 1779452642.8631fc262581453bbf619ec5b2062170.19e4fa4847a000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Fri, 22 May 2026 14:24:01 +0200 From: Anthony PERARD To: Nicola Vetrini Cc: Andrew Cooper , Victor Lira , xen-devel@lists.xenproject.org, Doug Goldstein , Stefano Stabellini Subject: Re: [XEN PATCH v1] automation: edit rules for analyze jobs References: <20260520225820.31550-1-victorm.lira@amd.com> <00d987d3-6a9c-440e-beb8-6587a3fd1d9b@citrix.com> <751c1684902e41fdd9d29b71670b49f0@bugseng.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <751c1684902e41fdd9d29b71670b49f0@bugseng.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.123a.871fb6907f276c21.19e4fa48259.1c9e4a2228e6831c=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779452641881 X-purgate-ID: tlsNG-33051d/1779452647-4259D938-DC32CFAE/0/0 X-purgate-type: clean X-purgate-size: 1080 ---=Part.123a.871fb6907f276c21.19e4fa48259.1c9e4a2228e6831c=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Fri, May 22, 2026 at 12:32:33PM +0200, Nicola Vetrini wrote: > On 2026-05-22 12:20, Andrew Cooper wrote: > > I'm afraid this still doesn't work=2E > >=20 > > I pushed with ci=2Evariable=3DSELECTED_JOBS_ONLY=3D"/eclair-x86_64-all= code/" > > and still got the eclair-*-amd jobs started=2E > >=20 > > https://gitlab=2Ecom/xen-project/hardware/xen-staging/-/pipelines/2545= 988798 >=20 > Perhaps it's because the runner is marked as a safety runner? >=20 > rules: > - if: $ECLAIR_SAFETY > when: always The variable isn't set in the runner (runners variable wouldn't be taken into account here anyway)=2E The variable is set for the group "xen-project/hardware", so for every repo under it=2E Cheers, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.123a.871fb6907f276c21.19e4fa48259.1c9e4a2228e6831c=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 12:29:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 12:29:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316731.1586078 (Exim 4.92) (envelope-from ) id 1wQP00-0006AR-3M; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: jxU6RNBZivGJsDevPONmiiD1kXAoCm6BOtiytN53KboZNz2Qe6lahpD8SnnHZCMNYm0+Hn4kf3mFsT9kz2ZNqGRpIycgNAM41BLhRQcaBVouCWRJgr38e27y+PK7MUyZf2xrOgsdzc7/NLPNYqVtYbabqhTAB4porahJqmbm0bsvzs2W9bPFPoVwNPxKr3gWKYcJ6dgl1vJHZghQbIqAy6vH4HrMwb3vF1pAjcxxnnMM/GDGY18gz+4+FoiSbB0XAwa0vhEaL++vgxgj/udvI/pef1nXux0MoFKj3PPQ77rXPst+TAV/9uB3gmA7Amtn7rgBZlu5wvyYC0fk31nRtpveql9pN6j4fovhP4uO82ZYyiuZdkQS8RrhWDRVbkv8ZGdirpOl5KWA6jzTc5rIQEyrXYd3wJJ/JQ98Xx9ROfkmFV3G6/GSbzT/xz8MJtvc X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2026 12:28:56.9428 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d8a0cd10-850a-4fcb-309c-08deb7fdb1c3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS2PEPF00003445.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL4PR12MB9534 X-purgate-ID: tlsNG-c1860d/1779452945-B5B6CDB1-B834A637/0/0 X-purgate-type: clean X-purgate-size: 1173 On Fri May 22, 2026 at 1:31 PM CEST, Jan Beulich wrote: > On 22.05.2026 12:57, Alejandro Vallejo wrote: >> Move first read of gt->gt_version inside the critical region of the >> rwlock, otherwise concurrent gnttab operations (silly as they would be) >> may get mutually confused as to the actual current version. >>=20 >> Fixes: c1488502c949("grant-tables: do not fail attempts to...") >> Reported-by: Oleksandr Tyshchenko >> Signed-off-by: Alejandro Vallejo > > Reviewed-by: Jan Beulich Thanks > >> There are a number of lockless reads of gt_version (e.g: right after unl= ock), >> but they aren't very worrying because they are effectively snapshots of = the >> instantaneous version. I'd feel better if they were all atomic_read(), b= ut all >> Xen ports guarantee atomic access on aligned 4 octet fields, so I couldn= 't be >> bothered to go chase them. > > Sooner or later we will want to deal with all (latent) problems of this k= ind. Quite. Concurrency is hard enough without making assumptions about the underlying ISAs :/ Cheers, Alejandro From xen-devel-bounces@lists.xenproject.org Fri May 22 12:34:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 12:34:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316743.1586088 (Exim 4.92) (envelope-from ) id 1wQP4f-0007kh-Jl; Fri, 22 May 2026 12:33:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316743.1586088; Fri, 22 May 2026 12:33:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQP4f-0007ka-H1; Fri, 22 May 2026 12:33:57 +0000 Received: by outflank-mailman (input) for mailman id 1316743; Fri, 22 May 2026 12:33:56 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQP4e-0007kU-4L for xen-devel@lists.xenproject.org; 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Fri, 22 May 2026 14:33:50 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=btuo1BkXt6I5InUgJFSYjZbZv6EuMecyqn5NavlpXiA=; h=from:subject:date:message-id:to:cc:mime-version:content-type:feedback-id; b=KKNYOu2UmOALUk9YtOI0fMpzIZ1VOnn0G0pZEKDWDLPv6X28RME8vrTVqVERJz750+V9kOSXC JMObwEZf6XLeHwomhxIpfGc0esy9YuTdMv6BhaM7DY033htIt334sSvQ3SCz/Wz6g7wcv0VgZMd sWHVrLG1JmVeauTUsgR2eb1sejcWAyTXl2ARxFP54rmpmngNrVlVU8fRQmpBbCzD3nNPTzK3QCV kVy4uoFtSLxFLZa+EiFvaBz8R8B5wY9pPPThy/6mkRkT3Ds5UWHbyq47D4UHc06F3ZWqoznr6Ju jujRhdXRSTmf8wRwiS6wW6UbYhu9N8IfF04PqUic94Cg== X-Zone-Loop: 3e4b4098239a8b005422ecdacfa1053111b7e158d1da x-campaign-type: default x-transaction-id: 5bbbe97f-a0ac-4f8c-a102-ca207c4937a3 x-swg-uid: 01-8c8fc81e-2762-4640-91f9-a50d47453f05 X-Mailer: Sweego Message-ID: <1779453231.8631fc262581453bbf619ec5b2062170.19e4fad80e4000f373@vates.tech> x-swg-bid: 1779453231.8631fc262581453bbf619ec5b2062170.19e4fad80e4000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] From: Teddy Astie To: xen-devel@lists.xenproject.org Cc: Teddy Astie , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH v2] pv32: Fix bogus cr2 on fault in emulation gate Date: Fri, 22 May 2026 14:33:16 +0200 MIME-Version: 1.0 X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1242.f2a4f52407856473.19e4fad7ebe.3900a54c92a60a3f=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779453230785 X-purgate-ID: tlsNG-c201ff/1779453235-DA374443-6CD7DCD0/0/0 X-purgate-type: clean X-purgate-size: 2150 ---=Part.1242.f2a4f52407856473.19e4fad7ebe.3900a54c92a60a3f=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable __{put,get}_guest returns -EFAULT on access faults which causes the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is incorrect=2E Fix the computation by relying on copy_{from,to}_guest_pv which reports the number of remaining bytes instead of a negative errno, such that we can compute the offset properly=2E Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") Signed-off-by: Teddy Astie --- v2: * Don't add variable in push() macro * Use uint32_t type for temporary value=2E xen/arch/x86/pv/emul-gate-op=2Ec | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/pv/emul-gate-op=2Ec b/xen/arch/x86/pv/emul-gate-= op=2Ec index c2c699fbff=2E=2E9c229c46c4 100644 --- a/xen/arch/x86/pv/emul-gate-op=2Ec +++ b/xen/arch/x86/pv/emul-gate-op=2Ec @@ -286,12 +286,14 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) if ( !jump ) { unsigned int ss, esp, *stkp; + uint32_t value; int rc; #define push(item) do \ { \ + value =3D item; \ --stkp; \ esp -=3D 4; \ - rc =3D __put_guest(item, stkp); \ + rc =3D copy_to_guest_pv(stkp, &value, sizeof(value)); \ if ( rc ) \ { \ pv_inject_page_fault(PFEC_write_access, \ @@ -359,7 +361,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) unsigned int parm; =20 --ustkp; - rc =3D __get_guest(parm, ustkp); + rc =3D copy_from_guest_pv(&parm, ustkp, sizeof(parm))= ; if ( rc ) { pv_inject_page_fault(0, (unsigned long)(ustkp + 1= ) - rc); --=20 2=2E52=2E0 -- | Vates XCP-ng & Xen Orchestra - Vates solutions web: https://vate= s=2Etech ---=Part.1242.f2a4f52407856473.19e4fad7ebe.3900a54c92a60a3f=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 12:42:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 12:42:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316752.1586098 (Exim 4.92) (envelope-from ) id 1wQPDG-0001Yg-E2; Fri, 22 May 2026 12:42:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316752.1586098; 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <1779453231.8631fc262581453bbf619ec5b2062170.19e4fad80e4000f373@vates.tech> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-bad1c0/1779453768-8B193A53-514EBB4A/0/0 X-purgate-type: clean X-purgate-size: 1055 On 22.05.2026 14:33, Teddy Astie wrote: > __{put,get}_guest returns -EFAULT on access faults which causes > the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is > incorrect. > > Fix the computation by relying on copy_{from,to}_guest_pv which > reports the number of remaining bytes instead of a negative errno, > such that we can compute the offset properly. > > Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") > Signed-off-by: Teddy Astie Reviewed-by: Jan Beulich preferably with ... > --- a/xen/arch/x86/pv/emul-gate-op.c > +++ b/xen/arch/x86/pv/emul-gate-op.c > @@ -286,12 +286,14 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) > if ( !jump ) > { > unsigned int ss, esp, *stkp; > + uint32_t value; > int rc; > #define push(item) do \ > { \ > + value = item; \ ... (item) here. I think we're okay without, but let's play safe. Likely can be adjusted by the committer. Jan From xen-devel-bounces@lists.xenproject.org Fri May 22 12:50:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 12:50:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316762.1586107 (Exim 4.92) (envelope-from ) id 1wQPK8-0002mP-8W; Fri, 22 May 2026 12:49:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316762.1586107; Fri, 22 May 2026 12:49:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQPK8-0002mI-3x; Fri, 22 May 2026 12:49:56 +0000 Received: by outflank-mailman (input) for mailman id 1316762; Fri, 22 May 2026 12:49:55 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <37lAQagYKCSkXJFSOHLTTLQJ.HTRcJS-IJaJQQNXYX.cJSUWTOJHY.TWL@flex--seanjc.bounces.google.com>) id 1wQPK7-0002mC-LJ for xen-devel@lists.xenproject.org; Fri, 22 May 2026 12:49:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQPK6-006a5e-NI for xen-devel@lists.xenproject.org; Fri, 22 May 2026 14:49:54 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <37lAQagYKCSkXJFSOHLTTLQJ.HTRcJS-IJaJQQNXYX.cJSUWTOJHY.TWL@flex--seanjc.bounces.google.com>) id 6a1050eb-e002-0a2a0a5209dd-0a2a4506964c-28 for ; Fri, 22 May 2026 14:49:54 +0200 Received: from [209.85.214.202] (helo=mail-pl1-f202.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <37lAQagYKCSkXJFSOHLTTLQJ.HTRcJS-IJaJQQNXYX.cJSUWTOJHY.TWL@flex--seanjc.bounces.google.com>) id 6a1050ef-7371-0a2a45060019-d155d6cadc31-3 for ; Fri, 22 May 2026 14:49:52 +0200 Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-2b9b8137828so74872355ad.0 for ; Fri, 22 May 2026 05:49:52 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Content-Transfer-Encoding:Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1779454191; x=1780058991; darn=lists.xenproject.org; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:from:to:cc:subject:date:message-id :reply-to; bh=DQXBtYOgD26OY0sxOaH3yIHE1h+TPqKS3BQiU+AvFJA=; b=jV7Q9I2dA27qnqDRDYYYvH3PQOKQqjvNFpzHYWCV9Cdn+akZCyfW15uhns/YD8yLWc rloyX6WWpzextkmZJpPAsZtCSpbeaeeGC2H1FuF92QVshGEWVIYm+uxXTOB5T7uSx9vf e7qhy48DdrXCog+Te+d23BoLUbB1HGDRWYgRKyR8udcC7Y/rZv1IukKfHjEw4FbPn+E+ 1RK83OuKDRSG53APBC8j4KRSyZLTd4KYTLY2JuxNt6HuDwEGZn5DPfWudnqLip0Kfse8 hrCHOGABlq7TCHJK27SwY6d8pPU6OSU8eumCG5Yftjk03MVLxIyqtBOWZUHgFk5vjWR2 BTXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779454191; x=1780058991; h=content-transfer-encoding:cc:to:from:subject:message-id:references :mime-version:in-reply-to:date:x-gm-message-state:from:to:cc:subject :date:message-id:reply-to; bh=DQXBtYOgD26OY0sxOaH3yIHE1h+TPqKS3BQiU+AvFJA=; b=f2Z/A069AcU7RMu66JqgJBLyLvLErXIYWkcZbDvM639m3ciKvwYdwzWmYpTHba51aP X7FiAE3yXsK/RMgdk2yRxpJxdLy8P1qe3YSDHB55GbUtCuH1WnCl+s4LHp9aU3tFJPAS LN+wLNga1rnoVXz566pjunLGDm3L5Ea3WtfX8HOuyPHMak7LEwGKNB8N/B58Ggnr6I3a l06EmsdphjZTIfzSlcIfM4fkYYH7HCMrs6ScgQ9ZsraGY+XBJdvGVqor2ZcTlIXXBrUW qAsrtGPsGw40epbEiYzXf8k/gMj0B/3rrR2P3TESE7gWXLWKsQjRLUAXRQ34yc5QLgnB lyUQ== X-Forwarded-Encrypted: i=1; AFNElJ+jGGkAW7RU0os7ZZIs0E5ljAls9UpwvakzA8Ce1p5MD3rn7Cd/CDvIBgRSlxRFCJjdFVE/eNupPTg=@lists.xenproject.org X-Gm-Message-State: AOJu0YzpXgAQJlJ8QamCrUINoumxeiiTX8W5roeam1aTd5Z8+8c841Nj N83ED2DB7IeH2Y5l2Ifq7fWD9ftues27saqIlB3fXQe+Ld5W1X6vn8uevHa3F5effipAXgKbnI5 9YScI2w== X-Received: from plpf11.prod.google.com ([2002:a17:903:3c4b:b0:2b0:51f0:272d]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:c94d:b0:2b4:63bf:5535 with SMTP id d9443c01a7336-2beb073d568mr36887635ad.41.1779454190670; Fri, 22 May 2026 05:49:50 -0700 (PDT) Date: Fri, 22 May 2026 05:49:50 -0700 In-Reply-To: Mime-Version: 1.0 References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> Message-ID: Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: Sean Christopherson To: David Woodhouse Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779454193-8C47CD75-77086E51/0/0 X-purgate-type: clean X-purgate-size: 1727 On Thu, May 21, 2026, David Woodhouse wrote: > On Thu, 2026-05-21 at 15:30 -0700, Sean Christopherson wrote: > > On Thu, May 21, 2026, David Woodhouse wrote: > > > On Sat, 2026-05-09 at 23:46 +0100, David Woodhouse wrote: > > > > From: David Woodhouse > > > That does leave userspace still needing a way to get the APIC bus > > > frequency, to populate CPUID. So maybe I'll just make an attribute > > > which returns that as a single value. > >=20 > > Already exists, KVM_CAP_X86_APIC_BUS_CYCLES_NS.=C2=A0 The TDX architect= ure decided > > that unconditionally telling guests the virtual APIC bus runs at 400Mhz= was a > > brilliant idea. >=20 > Ah, thanks. >=20 > So KVM always exposes 1GHz by default regardless of the actual host? > Which is why there's no *get* method? >=20 > (Well... getting KVM_CAP_APIC_BUS_CYCLES_NS returns > APIC_BUS_CYCLE_NS_DEFAULT which is 1, so it's basically just returning > 1 like a lot of cap queries do, and *not* returning what the period is > actually set to) Oh, that's just an oversight, definitely not intentional. Easy enough to f= ix: diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 1616b2eec6e7..cd4a244ca0c5 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -2235,7 +2235,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, lon= g ext) r =3D tdp_enabled; break; case KVM_CAP_X86_APIC_BUS_CYCLES_NS: - r =3D APIC_BUS_CYCLE_NS_DEFAULT; + r =3D kvm ? kvm->arch.apic_bus_cycle_ns : APIC_BUS_CYCLE_NS= _DEFAULT; break; case KVM_CAP_EXIT_HYPERCALL: r =3D KVM_EXIT_HYPERCALL_VALID_MASK; From xen-devel-bounces@lists.xenproject.org Fri May 22 13:00:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 13:00:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316777.1586115 (Exim 4.92) (envelope-from ) id 1wQPUa-0005xK-4D; Fri, 22 May 2026 13:00:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316777.1586115; Fri, 22 May 2026 13:00:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQPUa-0005xD-1A; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------DbCf3weHpcKDv1y1x8mNEZZE" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779454840948 X-purgate-ID: tlsNG-ef75cf/1779454842-20961C48-8DBC6C37/0/0 X-purgate-type: clean X-purgate-size: 6459 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------DbCf3weHpcKDv1y1x8mNEZZE Content-Type: multipart/mixed; boundary="------------LcgzFWTlC64DC8h7FnbGmsks"; protected-headers="v1" From: Teddy Astie To: Jan Beulich Cc: Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , xen-devel@lists.xenproject.org Message-ID: Subject: Re: [PATCH v2] pv32: Fix bogus cr2 on fault in emulation gate References: <1779453231.8631fc262581453bbf619ec5b2062170.19e4fad80e4000f373@vates.tech> <0c9a577c-07bb-459a-96b2-e9693ef89cca@suse.com> In-Reply-To: <0c9a577c-07bb-459a-96b2-e9693ef89cca@suse.com> --------------LcgzFWTlC64DC8h7FnbGmsks Content-Type: multipart/mixed; boundary="------------5SBaMWPRM4rLKK3r0W4Y4mMt" --------------5SBaMWPRM4rLKK3r0W4Y4mMt Content-Type: text/plain; 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containers References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1251.bb4ab168c438cb5a.19e4fdf869d.f7dfd61d7377498e=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779456509597 X-purgate-ID: tlsNG-720697/1779456513-AB563161-4DDC2498/0/0 X-purgate-type: clean X-purgate-size: 790 ---=Part.1251.bb4ab168c438cb5a.19e4fdf869d.f7dfd61d7377498e=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:40PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > Add it in all variants: > - base container > - build container > - initramfs archive >=20 > libdw used to be part of libelf in Alpine 3=2E18, but it's a separate > package in 3=2E23=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s 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=?iso-8859-1?Q?Monn=E9?= Subject: Re: [PATCH v4 02/13] Switch Linux builds to use Alpine 3.23 container References: <23fbf2c275cfb021161688eb5f0e9013bfb4aa83.1777898148.git-series.marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <23fbf2c275cfb021161688eb5f0e9013bfb4aa83.1777898148.git-series.marmarek@invisiblethingslab.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1252.feae6614dcee22e0.19e4fe138b1.50f35089f595e84=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779456620721 X-purgate-ID: tlsNG-c1860d/1779456624-BD56FDB1-3ABD4168/0/0 X-purgate-type: clean X-purgate-size: 770 ---=Part.1252.feae6614dcee22e0.19e4fe138b1.50f35089f595e84=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:41PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > Slowly phase out 3=2E18 one=2E >=20 > But keep Linux 6=2E6 on Alpine 3=2E18 containers - it fails to build on > Alpine 3=2E23 (due to GCC 15 defaulting to -std=3Dc23)=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1252.feae6614dcee22e0.19e4fe138b1.50f35089f595e84=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 13:35:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 13:35:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316839.1586176 (Exim 4.92) (envelope-from ) id 1wQQ2S-00055j-Lh; Fri, 22 May 2026 13:35:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316839.1586176; Fri, 22 May 2026 13:35:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) 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x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Fri, 22 May 2026 15:35:39 +0200 From: Anthony PERARD To: Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?iso-8859-1?Q?Monn=E9?= Subject: Re: [PATCH v4 06/13] Support building arbitrary Linux branch/tag/commit References: <9440095275dd9313f7f8e2a41384e1275be0fcaa.1777898148.git-series.marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <9440095275dd9313f7f8e2a41384e1275be0fcaa.1777898148.git-series.marmarek@invisiblethingslab.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1253.60ef3f67f9fe3725.19e4fe6155a.3f18c0cee08e0c1d=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779456939355 X-purgate-ID: tlsNG-720697/1779456942-81971161-6B9A3FC3/0/0 X-purgate-type: clean X-purgate-size: 1463 ---=Part.1253.60ef3f67f9fe3725.19e4fe6155a.3f18c0cee08e0c1d=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:45PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > Change how kernel version is given to the script - use arguments, to > avoid confusion between pipeline level variables and job level ones=2E >=20 > The build-linux=2Esh now can take either just the kernel version (used t= o be > LINUX_VERSION variable), or git branch/tag/commit name + git URL (new fe= ature)=2E > Go with "git init" + "git fetch" instead of "git clone" to support any > of branch/tag/commit=2E >=20 > This also defines optional linux-git-* jobs which will build the thing > if LINUX_GIT_VERSION and LINUX_GIT_URL variables are provided for the > pipeline=2E >=20 > The idea is to define separate CI schedules for the test-artifacts repo > with LINUX_GIT_URL/LINUX_GIT_VERSION pointing at Linux trees to be > tested (for example linux-next), and then trigger matching pipelines in > the xen repo for testing with that version=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1253.60ef3f67f9fe3725.19e4fe6155a.3f18c0cee08e0c1d=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 13:37:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 13:37:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316847.1586185 (Exim 4.92) (envelope-from ) id 1wQQ3r-0005Zf-UE; Fri, 22 May 2026 13:37:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316847.1586185; Fri, 22 May 2026 13:37:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 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X-Originating-IP: [37.26.189.201] Date: Fri, 22 May 2026 15:37:07 +0200 From: Anthony PERARD To: Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?iso-8859-1?Q?Monn=E9?= Subject: Re: [PATCH v4 09/13] Add trigger-test job, to run test on a Linux built from a branch/tag References: <4fdfa09a7ff699f5d51ab9beb95b18ccbd0c0be3.1777898148.git-series.marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4fdfa09a7ff699f5d51ab9beb95b18ccbd0c0be3.1777898148.git-series.marmarek@invisiblethingslab.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1254.5aa55d87213b6ca.19e4fe76e39.b14198c9c2ecbe7e=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779457027641 X-purgate-ID: tlsNG-bad1c0/1779457029-88572A53-ED8689D0/0/0 X-purgate-type: clean X-purgate-size: 1437 ---=Part.1254.5aa55d87213b6ca.19e4fe76e39.b14198c9c2ecbe7e=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:48PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > When scheduling pipeline in test-artifacts repo, it can get also > TEST_TRIGGER_REPO and TEST_TRIGGER_BRANCH variables, to trigger relevant > pipeline to test just built artifacts=2E > Pass ARTIFACTS_REPO+ARTIFACTS_BRANCH to the child pipeline to ensure it > fetches artifacts from the right job, but avoid xen test pipeline > inheriting other variables, as they might have unintended consequences > (for example REGISTRY one)=2E > For example, to build linux-next and test Xen staging on it, the > pipeline could be triggered with: >=20 > LINUX_GIT_URL=3Dhttps://git=2Ekernel=2Eorg/pub/scm/linux/kernel/git/= next/linux-next=2Egit > LINUX_GIT_VERSION=3Dmaster > TEST_TRIGGER_REPO=3Dxen-project/hardware/xen > TEST_TRIGGER_BRANCH=3Dstaging >=20 > The triggered xen test pipeline will skip most build jobs=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1254.5aa55d87213b6ca.19e4fe76e39.b14198c9c2ecbe7e=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 13:40:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 13:40:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316858.1586194 (Exim 4.92) (envelope-from ) id 1wQQ74-0007YW-BU; Fri, 22 May 2026 13:40:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316858.1586194; Fri, 22 May 2026 13:40:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQQ74-0007YP-7E; Fri, 22 May 2026 13:40:30 +0000 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action=none header.from=citrix.com; Message-ID: <6fa17f31-05af-43f3-9a85-daaf96d97347@citrix.com> Date: Fri, 22 May 2026 14:33:21 +0100 User-Agent: Mozilla Thunderbird Cc: Andrew Cooper , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v2] pv32: Fix bogus cr2 on fault in emulation gate To: Teddy Astie , xen-devel@lists.xenproject.org References: <1779453231.8631fc262581453bbf619ec5b2062170.19e4fad80e4000f373@vates.tech> Content-Language: en-GB From: Andrew Cooper Autocrypt: addr=andrew.cooper3@citrix.com; keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe 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=?utf-8?B?N21DTWtHVFlmcnRSZm1VdVVneVRlVFlaNWI0YlpzcnEwUzhEYjN2UGtRYnk2?= =?utf-8?Q?6b2iShj/J2pjFmmE=3D?= X-OriginatorOrg: citrix.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9f7d31d0-aa00-4af4-41ad-08deb806b313 X-MS-Exchange-CrossTenant-AuthSource: CH8PR03MB8275.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 May 2026 13:33:24.7812 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 335836de-42ef-43a2-b145-348c2ee9ca5b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5qDojo2kEZ2+VqJKVPJdXqLxvL8dR1mUnlYkb3H+ra/cRF0RYcibMPKll7Uxip/sDUYtftYj7hx5LSgT0VoW36ZePQKrhcBTtsoVqYIl6x4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS6PR03MB989095 X-purgate-ID: tlsNG-720697/1779456807-81D77161-57038220/13/0 X-purgate-type: spam X-purgate-size: 2171 On 22/05/2026 1:33 pm, Teddy Astie wrote: > __{put,get}_guest returns -EFAULT on access faults which causes > the injected cr2 to be off by 14 bytes (as EFAULT is 14) which is > incorrect. > > Fix the computation by relying on copy_{from,to}_guest_pv which > reports the number of remaining bytes instead of a negative errno, > such that we can compute the offset properly. > > Fixes: 70ad570b2799 ("x86/64: paravirt 32-on-64 call gate support") > Signed-off-by: Teddy Astie > --- > v2: > * Don't add variable in push() macro > * Use uint32_t type for temporary value. > > xen/arch/x86/pv/emul-gate-op.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/xen/arch/x86/pv/emul-gate-op.c b/xen/arch/x86/pv/emul-gate-op.c > index c2c699fbff..9c229c46c4 100644 > --- a/xen/arch/x86/pv/emul-gate-op.c > +++ b/xen/arch/x86/pv/emul-gate-op.c > @@ -286,12 +286,14 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) > if ( !jump ) > { > unsigned int ss, esp, *stkp; > + uint32_t value; > int rc; > #define push(item) do \ > { \ > + value = item; \ > --stkp; \ > esp -= 4; \ > - rc = __put_guest(item, stkp); \ > + rc = copy_to_guest_pv(stkp, &value, sizeof(value)); \ > if ( rc ) \ > { \ > pv_inject_page_fault(PFEC_write_access, \ > @@ -359,7 +361,7 @@ void pv_emulate_gate_op(struct cpu_user_regs *regs) > unsigned int parm; > > --ustkp; > - rc = __get_guest(parm, ustkp); > + rc = copy_from_guest_pv(&parm, ustkp, sizeof(parm)); > if ( rc ) > { > pv_inject_page_fault(0, (unsigned long)(ustkp + 1) - rc); As with v1, __copy_*() rather than copy_*(). I've fixed up and committed (including Jan's suggestion), along with some improvements to the commit message. x86/pv32.  "gate emulation" rather than "emulation gate", brackets on function names. ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 22 13:54:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 13:54:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316874.1586206 (Exim 4.92) (envelope-from ) id 1wQQKu-0001iJ-Kg; Fri, 22 May 2026 13:54:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316874.1586206; Fri, 22 May 2026 13:54:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQQKu-0001iC-Hb; Fri, 22 May 2026 13:54:48 +0000 Received: by outflank-mailman (input) for mailman id 1316874; Fri, 22 May 2026 13:54:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQQKs-0001i6-Vw for xen-devel@lists.xenproject.org; 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Fri, 22 May 2026 15:54:42 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=3KZw4NbUAnuHoQnUOjqRkQ91RSCgZZzUWQMygOc1QGU=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=Fadol7ik8MTa/vAWKKVIow0RthO4HgDDZyChwCAR1pduc5a/kMAzrh5jOBr3CLQexunNR6dk3 v+FS/zi9cZfPJEOcYyCPaEl3nWbZW9CvMuNFDrZ8NcUHXdgk9AF0W5ebefCnT7mm1tKfmSMaxYz WXTTqYK1R3r9FDrI8ZGBMdezQcfJTCk65LTUdnTJI2Kz4aiKYa4cooxQsiF6+k9KpY1yGUpPTwD W4lp1kZqbApVpk11xrPX7gozo1q2E+7glehUyQCiy/JEAuolm2xMYsBYU/vVFdjAyJtyybVYXQ1 iA3wqxiReZhcXA0/4ifQB7KROyBdDZbcZ4Q4sQV+d5mw== X-Zone-Loop: 246c80240835eaaddb9b3c1fdc44285763f2d05383aa x-campaign-type: default x-transaction-id: 49138ccb-4cf8-4b79-b995-7bf929966894 x-swg-uid: 01-9ab0dd6a-d102-4ef2-add9-e4b973f12632 X-Mailer: Sweego Message-ID: <1779458083.8631fc262581453bbf619ec5b2062170.19e4ff78945000f373@vates.tech> x-swg-bid: 1779458083.8631fc262581453bbf619ec5b2062170.19e4ff78945000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Fri, 22 May 2026 15:54:42 +0200 From: Anthony PERARD To: Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?iso-8859-1?Q?Monn=E9?= Subject: Re: [PATCH v4 13/13] Setup ssh access to test systems References: <13f837cd9f394d3b4eddb4849156b8ed5d06d31b.1777898148.git-series.marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <13f837cd9f394d3b4eddb4849156b8ed5d06d31b.1777898148.git-series.marmarek@invisiblethingslab.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.1257.e0e040b592ee1554.19e4ff7871d.8d7df2745447e190=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779458082589 X-purgate-ID: tlsNG-720697/1779458086-80F7E161-093B22B0/0/0 X-purgate-type: clean X-purgate-size: 967 ---=Part.1257.e0e040b592ee1554.19e4ff7871d.8d7df2745447e190=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:52PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > For this add also bridge package, so xenbr0 can be configured with > /etc/network/interfaces=2E > This allows extracting more logs out of the test system=2E >=20 > Create empty /etc/network/interfaces, so the 'networking' service starts > cleanly even if no interfaces are configured this way=2E This is > necessary, as dropbear service depends on networking=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.1257.e0e040b592ee1554.19e4ff7871d.8d7df2745447e190=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 14:01:51 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:01:51 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316888.1586238 (Exim 4.92) (envelope-from ) id 1wQQRf-00045U-Gu; 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boundary="-=Part.125b.972c5034eb1dd18c.19e4ffc1765.4a9b55f24e13aa07=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779458381670 X-purgate-ID: tlsNG-bad1c0/1779458385-41F6EA53-7E78DACB/0/0 X-purgate-type: clean X-purgate-size: 631 ---=Part.125b.972c5034eb1dd18c.19e4ffc1765.4a9b55f24e13aa07=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:50PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > The stubdomain test will use it >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.125b.972c5034eb1dd18c.19e4ffc1765.4a9b55f24e13aa07=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 14:03:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:03:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316895.1586247 (Exim 4.92) (envelope-from ) id 1wQQTQ-0004c1-Ri; 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boundary="-=Part.125a.6b17a20171d55b4b.19e4ffbe615.1e0bf5aa762f2e76=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779458369045 X-purgate-ID: tlsNG-c1860d/1779458374-BE975DB1-551B352B/0/0 X-purgate-type: clean X-purgate-size: 590 ---=Part.125a.6b17a20171d55b4b.19e4ffbe615.1e0bf5aa762f2e76=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:49PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.125a.6b17a20171d55b4b.19e4ffbe615.1e0bf5aa762f2e76=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 14:07:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:07:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316904.1586258 (Exim 4.92) (envelope-from ) id 1wQQWm-0005Bw-Bf; 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dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=trPP9zCnq/DNHH93lw4AzppJBhl01iJkUPZBcD91A4I=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=sScD1muRs9QPyWj+ZW907HiWbVa6UCGI8l6vpFTkxFzmFIzpRavdey4AoIcxeO0cSQhKzV83I y7x4pixPcWRldKsNI2V/amslD4hyXrdt1ubs3g1QTPmwYd41Ncyt62fpfaFJ2b9tJnFf6Qbsf+8 hO7X9aGbqgPE2aTc8FUJn1oPdeZHbcfrgZ78rlmsq4KgjY4y8xUweolBydgkpnHn0eoKgKkrMgP squ4IeJMUqwISKo8UikBm0st6tQV50FsBqzhOJKDU5FLUyYbt7tfv/hFmpdj1D+QK0dsBSrjZZW Seriy0wzylzaFwmQzzgZ3B0QyBa21WZPJ+a1GMw7QtZA== X-Zone-Loop: 2b5189212417b7aa3721f8c9ce1e449a627fd952e20a x-campaign-type: default x-transaction-id: 3b7559f0-3cd8-48a4-9a49-f35a90d96292 x-swg-uid: 01-48aa02c6-8360-47df-b35c-3c74cd8aaabd X-Mailer: Sweego Message-ID: <1779458396.8631fc262581453bbf619ec5b2062170.19e4ffc5040000f373@vates.tech> x-swg-bid: 1779458396.8631fc262581453bbf619ec5b2062170.19e4ffc5040000f373 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Fri, 22 May 2026 15:59:55 +0200 From: Anthony PERARD To: Marek =?iso-8859-1?Q?Marczykowski-G=F3recki?= Cc: xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , Roger Pau =?iso-8859-1?Q?Monn=E9?= Subject: Re: [PATCH v4 12/13] Prepare grub for booting x86_64 HVM domU from a cdrom References: <4aa490a4f8a26ec86397cef30091cdd3f3598c30.1777898148.git-series.marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4aa490a4f8a26ec86397cef30091cdd3f3598c30.1777898148.git-series.marmarek@invisiblethingslab.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.125c.d0896bdb58dc422d.19e4ffc4e8e.e62b2899c3dec311=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779458395790 X-purgate-ID: tlsNG-d62444/1779458401-ADBA8FF4-5A5CC185/13/0 X-purgate-type: clean X-purgate-size: 634 ---=Part.125c.d0896bdb58dc422d.19e4ffc4e8e.e62b2899c3dec311=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Mon, May 04, 2026 at 02:35:51PM +0200, Marek Marczykowski-G=C3=B3recki w= rote: > The stubdomain test will use it=2E >=20 > Signed-off-by: Marek Marczykowski-G=C3=B3recki Reviewed-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.125c.d0896bdb58dc422d.19e4ffc4e8e.e62b2899c3dec311=--- From xen-devel-bounces@lists.xenproject.org Fri May 22 14:38:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:38:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316928.1586265 (Exim 4.92) (envelope-from ) id 1wQR12-0002lF-Fb; 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Then: > Acked-by: Jan Beulich > Thanks. > However, I have another comment for consideration: > >> --- a/xen/arch/riscv/intc.c >> +++ b/xen/arch/riscv/intc.c >> @@ -12,9 +12,13 @@ >> >> static const struct intc_hw_operations *__ro_after_init intc_hw_ops; >> >> -void __init register_intc_ops(const struct intc_hw_operations *ops) >> +static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; >> + >> +void __init register_intc_ops(const struct intc_hw_operations *ops, >> + const struct intc_hw_init_ops *init_ops) >> { >> intc_hw_ops = ops; >> + intc_hw_init_ops = init_ops; >> } > > Again following what we do e.g. in x86'es IOMMU code, instead of passing > two pointers to the function, have struct intc_hw_init_ops have a > const struct intc_hw_operations * member which then can be used to > set intc_hw_ops here? Both will always come in pairs anyway. It makes sense to me. So I will do the following: @@ -350,7 +351,7 @@ static int __init aplic_preinit(struct dt_device_node *node, const void *dat) dt_irq_xlate = aplic_irq_xlate; - register_intc_ops(&aplic_ops, &aplic_init_ops); + register_intc_ops(&aplic_init_ops); /* Enable supervisor external interrupt */ csr_set(CSR_SIE, BIT(IRQ_S_EXT, UL)); diff --git a/xen/arch/riscv/include/asm/intc.h b/xen/arch/riscv/include/asm/intc.h index 8b498e43b33f..3d84fcc51d1a 100644 --- a/xen/arch/riscv/include/asm/intc.h +++ b/xen/arch/riscv/include/asm/intc.h @@ -42,14 +42,14 @@ struct intc_hw_operations { }; struct intc_hw_init_ops { + const struct intc_hw_operations *ops; /* Initialize the intc and the boot CPU */ int (*init)(void); }; void intc_preinit(void); -void register_intc_ops(const struct intc_hw_operations *ops, - const struct intc_hw_init_ops *init_ops); +void register_intc_ops(const struct intc_hw_init_ops *init_ops); void intc_init(void); diff --git a/xen/arch/riscv/intc.c b/xen/arch/riscv/intc.c index 8649160403f7..3600d23bdb5b 100644 --- a/xen/arch/riscv/intc.c +++ b/xen/arch/riscv/intc.c @@ -14,10 +14,9 @@ static const struct intc_hw_operations *__ro_after_init intc_hw_ops; static const struct intc_hw_init_ops *__initdata intc_hw_init_ops; -void __init register_intc_ops(const struct intc_hw_operations *ops, - const struct intc_hw_init_ops *init_ops) +void __init register_intc_ops(const struct intc_hw_init_ops *init_ops) { - intc_hw_ops = ops; + intc_hw_ops = init_ops->ops; intc_hw_init_ops = init_ops; } Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 14:45:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:45:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316944.1586275 (Exim 4.92) (envelope-from ) id 1wQR82-0004lo-9s; Fri, 22 May 2026 14:45:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316944.1586275; Fri, 22 May 2026 14:45:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQR82-0004lh-6y; Fri, 22 May 2026 14:45:34 +0000 Received: by outflank-mailman (input) for mailman id 1316944; Fri, 22 May 2026 14:45:32 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQR80-0004lZ-HV for xen-devel@lists.xenproject.org; Fri, 22 May 2026 14:45:32 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQR7z-00BJsz-Pf for xen-devel@lists.xenproject.org; Fri, 22 May 2026 16:45:31 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a106bfc-bab6-0a2a0a5309dd-0a2a450ce602-18 for ; Fri, 22 May 2026 16:45:31 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a106c0b-62f1-0a2a450c0019-d155dd35a91c-3 for ; Fri, 22 May 2026 16:45:31 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-43d75312379so6260020f8f.1 for ; Fri, 22 May 2026 07:45:31 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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The variable isn't otherwise used here. > > As to the other two checks: Is it plausible for either of the two pointers > to be NULL? If not, merely ASSERT() or even build upon ... > >> + return vintc->init_ops->make_domu_dt_node(kinfo); > > ... NULL derefs to fault anyway? Specifically this pointers can't be NULL. Generally it would be okay to just have have NULL derefs in runtime but there isn't guarantee that some register which will be useful to debug where NULL deref happens will be properly filled. I faced that several times so I prefer to have here ASSERT(). Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 14:55:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 14:55:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316956.1586284 (Exim 4.92) (envelope-from ) id 1wQRHp-00076C-69; Fri, 22 May 2026 14:55:41 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316956.1586284; Fri, 22 May 2026 14:55:41 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRHp-000765-3T; Fri, 22 May 2026 14:55:41 +0000 Received: by outflank-mailman (input) for mailman id 1316956; Fri, 22 May 2026 14:55:40 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQRHo-00075z-Ke for xen-devel@lists.xenproject.org; Fri, 22 May 2026 14:55:40 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQRHn-002gHx-Ma for xen-devel@lists.xenproject.org; Fri, 22 May 2026 16:55:39 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a106e6b-e002-0a2a0a5209dd-0a2a4507aeda-4 for ; Fri, 22 May 2026 16:55:39 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a106e6b-229c-0a2a45070019-d1558035dd2d-3 for ; Fri, 22 May 2026 16:55:39 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-4891b0786beso51067675e9.1 for ; Fri, 22 May 2026 07:55:39 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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I'd suggest to drop > it, but of course with the then leading underscore retained, to ... > >> +bool aia_usable(void) >> +{ >> + return is_aia_usable; >> +} > > ... not conflict with this function. > IIUC then I am okay with the following changes: -static bool __ro_after_init is_aia_usable; +static bool __ro_after_init _aia_usable; bool aia_usable(void) { - return is_aia_usable; + return _aia_usable; } void __init aia_init(void) @@ -19,5 +19,5 @@ void __init aia_init(void) if ( !riscv_isa_extension_available(NULL, RISCV_ISA_EXT_ssaia) ) return; - is_aia_usable = true; + _aia_usable = true; } ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 15:21:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:21:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316985.1586292 (Exim 4.92) (envelope-from ) id 1wQRge-0004Nw-3r; Fri, 22 May 2026 15:21:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316985.1586292; Fri, 22 May 2026 15:21:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRge-0004Np-0g; Fri, 22 May 2026 15:21:20 +0000 Received: by outflank-mailman (input) for mailman id 1316985; Fri, 22 May 2026 15:21:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRgd-0004Nj-CW for xen-devel@lists.xenproject.org; Fri, 22 May 2026 15:21:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQRgc-006tQw-O1 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:21:18 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a107462-5cb7-0a2a0a5109dd-0a2a4509a194-20 for ; Fri, 22 May 2026 17:21:18 +0200 Received: from [195.135.223.130] (helo=smtp-out1.suse.de) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a10746e-2497-0a2a45090019-c387df82dca6-3 for ; Fri, 22 May 2026 17:21:18 +0200 Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 1E4E66BA54; Fri, 22 May 2026 15:21:18 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id B9B40593A8; Fri, 22 May 2026 15:21:17 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id ficyLG10EGp9HwAAD6G6ig (envelope-from ); Fri, 22 May 2026 15:21:17 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779463278; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=DcTkyafxokIFyx7B8h9+YsS080oy1Spc+V4mEk4KkX8=; b=L0U28bH6eorjODrOXfO400tSigfB7RM6UK/gMxi7NDlPJF+I01yseTFkVqzgPp0k/JxLpI vSS4JEbMX5MfWkkWQazlEgoik7Pd0dmC3q1mAbLSx8k1viSY+wwjyyVdlKc+zKEib48ZJG Fpd3J8/HhlPRUQUfDxcVZ2HueVl1UPs= Authentication-Results: smtp-out1.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779463278; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=DcTkyafxokIFyx7B8h9+YsS080oy1Spc+V4mEk4KkX8=; b=L0U28bH6eorjODrOXfO400tSigfB7RM6UK/gMxi7NDlPJF+I01yseTFkVqzgPp0k/JxLpI vSS4JEbMX5MfWkkWQazlEgoik7Pd0dmC3q1mAbLSx8k1viSY+wwjyyVdlKc+zKEib48ZJG Fpd3J8/HhlPRUQUfDxcVZ2HueVl1UPs= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-trace-kernel@vger.kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org, Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers Subject: [PATCH 0/3] x86/xen: Do some Xen-PV related cleanups Date: Fri, 22 May 2026 17:21:11 +0200 Message-ID: <20260522152114.77319-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Score: -2.80 X-Spamd-Result: default: False [-2.80 / 50.00]; BAYES_HAM(-3.00)[99.99%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.998]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[14]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:mid]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[] X-Spam-Level: X-Spam-Flag: NO X-purgate-ID: tlsNG-bad1c0/1779463278-88D76A53-3AF6E57F/0/0 X-purgate-type: clean X-purgate-size: 677 Cleanups related to Xen PV mode. Note that patch 3 might be debatable. Juergen Gross (3): x86/xen: Guard PV-only stuff in xen-ops.h with CONFIG_XEN_PV x86/xen: Cleanup Xen related trace points x86/xen: Remove Xen debugfs support arch/x86/xen/Kconfig | 7 -- arch/x86/xen/Makefile | 2 - arch/x86/xen/debugfs.c | 16 --- arch/x86/xen/mmu_pv.c | 8 ++ arch/x86/xen/p2m.c | 45 ------- arch/x86/xen/xen-ops.h | 242 ++++++++++++++++++------------------- include/trace/events/xen.h | 62 +--------- 7 files changed, 126 insertions(+), 256 deletions(-) delete mode 100644 arch/x86/xen/debugfs.c -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 15:21:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:21:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316986.1586301 (Exim 4.92) (envelope-from ) id 1wQRgl-0004cB-AV; Fri, 22 May 2026 15:21:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316986.1586301; Fri, 22 May 2026 15:21:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRgl-0004c4-7R; Fri, 22 May 2026 15:21:27 +0000 Received: by outflank-mailman (input) for mailman id 1316986; Fri, 22 May 2026 15:21:26 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRgk-0004bU-0d for xen-devel@lists.xenproject.org; Fri, 22 May 2026 15:21:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQRgj-007385-6Z for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:21:25 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a107474-2eae-0a2a0a5409dd-0a2a4505b378-2 for ; Fri, 22 May 2026 17:21:25 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a107474-aaa8-0a2a45050019-c387df83c356-3 for ; Fri, 22 May 2026 17:21:25 +0200 Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id A39AD67CF3; Fri, 22 May 2026 15:21:23 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 6765E593A8; Fri, 22 May 2026 15:21:23 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id KGomGHN0EGqFHwAAD6G6ig (envelope-from ); Fri, 22 May 2026 15:21:23 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding:In-Reply-To:References"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779463284; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0gtEy/TKWNMRa8HbImrFhVuemzU/aU6A58QyV+4lRq8=; b=knOvWJxqLEbZsqZ/12jKynptTSPZZ8mcm/H1vh5n25yo7u4vEQYRHni9ssjMHo3KS2GBPj EW2XsAIG0/ACRDaj5LpCQK18oOME/NvvBrrO9EGMwz0leb9FUtP/wafuyPr2/T5YrfaHPN 06NOtYASFynBPmc+4IBLr5SM2Hiu3I0= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779463283; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0gtEy/TKWNMRa8HbImrFhVuemzU/aU6A58QyV+4lRq8=; b=IPM2b6PLDn3U/LQmXOAjd6W7Y5PJqlQ6yv/Hl59HGVGwb8MkNApRRu7+mBqiF3eZpv4cvt oW02/9yiacnedlFv1icPuSNLnR/XD3DZqbnsZHoDZL4meT5cpHfnH5xIySrYUAGRJgeTBF ZOnKJeqdQMqz4gg4+MVO+vtEuTvcCpY= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH 1/3] x86/xen: Guard PV-only stuff in xen-ops.h with CONFIG_XEN_PV Date: Fri, 22 May 2026 17:21:12 +0200 Message-ID: <20260522152114.77319-2-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260522152114.77319-1-jgross@suse.com> References: <20260522152114.77319-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.998]; MIME_GOOD(-0.10)[text/plain]; ARC_NA(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; RCPT_COUNT_SEVEN(0.00)[10]; internal_greylist_whitelist(0.00)[10.150.64.97]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid] X-Spam-Flag: NO X-purgate-ID: tlsNG-c201ff/1779463285-E318B443-ED6AF8A5/0/0 X-purgate-type: clean X-purgate-size: 11424 A lot of arch/x86/xen/xen-ops.h is meant to be for PV only. Guard all of it with CONFIG_XEN_PV in order to avoid someone misusing it in non-PV builds. Additionally any 64-bit tests for now guarded items can be dropped. Move the enum pt_level definition to mmu_pv.c, as it is used only there. Signed-off-by: Juergen Gross --- arch/x86/xen/mmu_pv.c | 8 ++ arch/x86/xen/xen-ops.h | 240 ++++++++++++++++++++--------------------- 2 files changed, 123 insertions(+), 125 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 3eee5f84f8a7..cd80406be9c6 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -84,6 +84,14 @@ #include "xen-ops.h" +enum pt_level { + PT_PGD, + PT_P4D, + PT_PUD, + PT_PMD, + PT_PTE +}; + /* * Prototypes for functions called via PV_CALLEE_SAVE_REGS_THUNK() in order * to avoid warnings with "-Wmissing-prototypes". diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index f6c331b20fad..a27ab1f50cf9 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h @@ -12,28 +12,24 @@ #include +#ifdef CONFIG_XEN_PV + #include /* These are code, but not functions. Defined in entry.S */ extern const char xen_failsafe_callback[]; -void xen_entry_SYSENTER_compat(void); -#ifdef CONFIG_X86_64 -void xen_entry_SYSCALL_64(void); -void xen_entry_SYSCALL_compat(void); -#endif +DECLARE_PER_CPU(unsigned long, xen_cr3); extern void *xen_initial_gdt; +extern cpumask_var_t xen_cpu_initialized_map; struct trap_info; void xen_copy_trap_info(struct trap_info *traps); -DECLARE_PER_CPU_ALIGNED(struct vcpu_info, xen_vcpu_info); -DECLARE_PER_CPU(unsigned long, xen_cr3); - -extern struct start_info *xen_start_info; -extern struct shared_info xen_dummy_shared_info; -extern struct shared_info *HYPERVISOR_shared_info; +void xen_entry_SYSENTER_compat(void); +void xen_entry_SYSCALL_64(void); +void xen_entry_SYSCALL_compat(void); void xen_setup_mfn_list_list(void); void xen_build_mfn_list_list(void); @@ -44,13 +40,10 @@ void __init xen_pt_check_e820(void); void xen_mm_pin_all(void); void xen_mm_unpin_all(void); -#ifdef CONFIG_X86_64 void __init xen_relocate_p2m(void); -#endif void __init xen_do_remap_nonram(void); void __init xen_add_remap_nonram(phys_addr_t maddr, phys_addr_t paddr, unsigned long size); - void __init xen_chk_is_e820_usable(phys_addr_t start, phys_addr_t size, const char *component); unsigned long __ref xen_chk_extra_mem(unsigned long pfn); @@ -59,17 +52,119 @@ void __init xen_remap_memory(void); phys_addr_t __init xen_find_free_area(phys_addr_t size); char * __init xen_memory_setup(void); void __init xen_arch_setup(void); -void xen_banner(void); void xen_enable_syscall(void); -void xen_vcpu_restore(void); +void __init xen_build_dynamic_phys_to_machine(void); +void __init xen_vmalloc_p2m_tree(void); +void xen_init_irq_ops(void); +void xen_setup_vcpu_info_placement(void); +void __init xen_init_apic(void); + +__visible void xen_irq_enable_direct(void); +__visible void xen_irq_disable_direct(void); +__visible unsigned long xen_save_fl_direct(void); + +__visible unsigned long xen_read_cr2(void); +__visible unsigned long xen_read_cr2_direct(void); + +/* These are not functions, and cannot be called normally */ +__visible void xen_iret(void); + +void xen_force_evtchn_callback(void); + +void xen_pv_pre_suspend(void); +void xen_pv_post_suspend(int suspend_cancelled); +void xen_start_kernel(struct start_info *si); + +void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); +void xen_init_mmu_ops(void); + +/* Multicalls */ +struct multicall_space +{ + struct multicall_entry *mc; + void *args; +}; + +/* Allocate room for a multicall and its args */ +struct multicall_space __xen_mc_entry(size_t args); + +DECLARE_PER_CPU(unsigned long, xen_mc_irq_flags); + +/* Call to start a batch of multiple __xen_mc_entry()s. Must be + paired with xen_mc_issue() */ +static inline void xen_mc_batch(void) +{ + unsigned long flags; + + /* need to disable interrupts until this entry is complete */ + local_irq_save(flags); + trace_xen_mc_batch(xen_get_lazy_mode()); + __this_cpu_write(xen_mc_irq_flags, flags); +} + +static inline struct multicall_space xen_mc_entry(size_t args) +{ + xen_mc_batch(); + return __xen_mc_entry(args); +} + +/* Flush all pending multicalls */ +void xen_mc_flush(void); + +/* Issue a multicall if we're not in a lazy mode */ +static inline void xen_mc_issue(unsigned mode) +{ + trace_xen_mc_issue(mode); + + if ((xen_get_lazy_mode() & mode) == 0) + xen_mc_flush(); + + /* restore flags saved in xen_mc_batch */ + local_irq_restore(this_cpu_read(xen_mc_irq_flags)); +} + +/* Set up a callback to be called when the current batch is flushed */ +void xen_mc_callback(void (*fn)(void *), void *data); + +/* + * Try to extend the arguments of the previous multicall command. The + * previous command's op must match. If it does, then it attempts to + * extend the argument space allocated to the multicall entry by + * arg_size bytes. + * + * The returned multicall_space will return with mc pointing to the + * command on success, or NULL on failure, and args pointing to the + * newly allocated space. + */ +struct multicall_space xen_mc_extend_args(unsigned long op, size_t arg_size); + +extern bool is_xen_pmu; + +irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id); +bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read); +int pmu_apic_update(uint32_t reg); +u64 xen_read_pmc(int counter); + +void xen_hypercall_pv(void); + +#else + +static inline void xen_pv_pre_suspend(void) {} +static inline void xen_pv_post_suspend(int suspend_cancelled) {} +#endif /* CONFIG_XEN_PV */ + +DECLARE_PER_CPU_ALIGNED(struct vcpu_info, xen_vcpu_info); + +extern struct start_info *xen_start_info; +extern struct shared_info xen_dummy_shared_info; +extern struct shared_info *HYPERVISOR_shared_info; + +void xen_banner(void); +void xen_vcpu_restore(void); void xen_hvm_init_shared_info(void); void xen_unplug_emulated_devices(void); -void __init xen_build_dynamic_phys_to_machine(void); -void __init xen_vmalloc_p2m_tree(void); - -void xen_init_irq_ops(void); void xen_setup_timer(int cpu); void xen_setup_runstate_info(int cpu); void xen_teardown_timer(int cpu); @@ -83,13 +178,10 @@ bool xen_vcpu_stolen(int vcpu); void xen_vcpu_setup(int cpu); void xen_vcpu_info_reset(int cpu); -void xen_setup_vcpu_info_placement(void); #ifdef CONFIG_SMP void xen_smp_init(void); void __init xen_hvm_smp_init(void); - -extern cpumask_var_t xen_cpu_initialized_map; #else static inline void xen_smp_init(void) {} static inline void xen_hvm_smp_init(void) {} @@ -125,8 +217,6 @@ static inline void __init xen_init_vga(const struct dom0_vga_console_info *info, void xen_add_preferred_consoles(void); -void __init xen_init_apic(void); - #ifdef CONFIG_XEN_EFI extern void xen_efi_init(struct boot_params *boot_params); #else @@ -135,16 +225,6 @@ static inline void __init xen_efi_init(struct boot_params *boot_params) } #endif -__visible void xen_irq_enable_direct(void); -__visible void xen_irq_disable_direct(void); -__visible unsigned long xen_save_fl_direct(void); - -__visible unsigned long xen_read_cr2(void); -__visible unsigned long xen_read_cr2_direct(void); - -/* These are not functions, and cannot be called normally */ -__visible void xen_iret(void); - extern int xen_panic_handler_init(void); int xen_cpuhp_setup(int (*cpu_up_prepare_cb)(unsigned int), @@ -153,16 +233,6 @@ int xen_cpuhp_setup(int (*cpu_up_prepare_cb)(unsigned int), void xen_pin_vcpu(int cpu); void xen_emergency_restart(void); -void xen_force_evtchn_callback(void); - -#ifdef CONFIG_XEN_PV -void xen_pv_pre_suspend(void); -void xen_pv_post_suspend(int suspend_cancelled); -void xen_start_kernel(struct start_info *si); -#else -static inline void xen_pv_pre_suspend(void) {} -static inline void xen_pv_post_suspend(int suspend_cancelled) {} -#endif #ifdef CONFIG_XEN_PVHVM void xen_hvm_post_suspend(int suspend_cancelled); @@ -186,83 +256,9 @@ void xen_add_extra_mem(unsigned long start_pfn, unsigned long n_pfns); struct dentry * __init xen_init_debugfs(void); -enum pt_level { - PT_PGD, - PT_P4D, - PT_PUD, - PT_PMD, - PT_PTE -}; - bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn); -void set_pte_mfn(unsigned long vaddr, unsigned long pfn, pgprot_t flags); -unsigned long xen_read_cr2_direct(void); -void xen_init_mmu_ops(void); void xen_hvm_init_mmu_ops(void); -/* Multicalls */ -struct multicall_space -{ - struct multicall_entry *mc; - void *args; -}; - -/* Allocate room for a multicall and its args */ -struct multicall_space __xen_mc_entry(size_t args); - -DECLARE_PER_CPU(unsigned long, xen_mc_irq_flags); - -/* Call to start a batch of multiple __xen_mc_entry()s. Must be - paired with xen_mc_issue() */ -static inline void xen_mc_batch(void) -{ - unsigned long flags; - - /* need to disable interrupts until this entry is complete */ - local_irq_save(flags); - trace_xen_mc_batch(xen_get_lazy_mode()); - __this_cpu_write(xen_mc_irq_flags, flags); -} - -static inline struct multicall_space xen_mc_entry(size_t args) -{ - xen_mc_batch(); - return __xen_mc_entry(args); -} - -/* Flush all pending multicalls */ -void xen_mc_flush(void); - -/* Issue a multicall if we're not in a lazy mode */ -static inline void xen_mc_issue(unsigned mode) -{ - trace_xen_mc_issue(mode); - - if ((xen_get_lazy_mode() & mode) == 0) - xen_mc_flush(); - - /* restore flags saved in xen_mc_batch */ - local_irq_restore(this_cpu_read(xen_mc_irq_flags)); -} - -/* Set up a callback to be called when the current batch is flushed */ -void xen_mc_callback(void (*fn)(void *), void *data); - -/* - * Try to extend the arguments of the previous multicall command. The - * previous command's op must match. If it does, then it attempts to - * extend the argument space allocated to the multicall entry by - * arg_size bytes. - * - * The returned multicall_space will return with mc pointing to the - * command on success, or NULL on failure, and args pointing to the - * newly allocated space. - */ -struct multicall_space xen_mc_extend_args(unsigned long op, size_t arg_size); - -extern bool is_xen_pmu; - -irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id); #ifdef CONFIG_XEN_HAVE_VPMU void xen_pmu_init(int cpu); void xen_pmu_finish(int cpu); @@ -270,9 +266,6 @@ void xen_pmu_finish(int cpu); static inline void xen_pmu_init(int cpu) {} static inline void xen_pmu_finish(int cpu) {} #endif -bool pmu_msr_chk_emulated(u32 msr, u64 *val, bool is_read); -int pmu_apic_update(uint32_t reg); -u64 xen_read_pmc(int counter); #ifdef CONFIG_SMP @@ -321,9 +314,6 @@ static inline void xen_smp_intr_free_pv(unsigned int cpu) {} static inline void xen_smp_count_cpus(void) { } #endif /* CONFIG_SMP */ -#ifdef CONFIG_XEN_PV -void xen_hypercall_pv(void); -#endif void xen_hypercall_hvm(void); void xen_hypercall_amd(void); void xen_hypercall_intel(void); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 15:21:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:21:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1316989.1586311 (Exim 4.92) (envelope-from ) id 1wQRgv-0004zD-La; Fri, 22 May 2026 15:21:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1316989.1586311; Fri, 22 May 2026 15:21:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRgv-0004z4-Ik; Fri, 22 May 2026 15:21:37 +0000 Received: by outflank-mailman (input) for mailman id 1316989; Fri, 22 May 2026 15:21:35 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQRgt-0004uj-Ky for xen-devel@lists.xenproject.org; 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Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH 3/3] x86/xen: Remove Xen debugfs support Date: Fri, 22 May 2026 17:21:14 +0200 Message-ID: <20260522152114.77319-4-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260522152114.77319-1-jgross@suse.com> References: <20260522152114.77319-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Score: -6.80 X-Spam-Level: X-Spamd-Result: default: False [-6.80 / 50.00]; REPLY(-4.00)[]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.20)[-0.998]; MIME_GOOD(-0.10)[text/plain]; RCVD_COUNT_TWO(0.00)[2]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.com:email,suse.com:mid]; internal_greylist_whitelist(0.00)[10.150.64.97]; FROM_EQ_ENVFROM(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCPT_COUNT_SEVEN(0.00)[10]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; RCVD_TLS_ALL(0.00)[] X-Spam-Flag: NO X-purgate-ID: tlsNG-c201ff/1779463294-DA374443-8E72E2CF/0/0 X-purgate-type: clean X-purgate-size: 4613 The only Xen file in debugfs is for dumping the p2m table when running as a Xen PV guest. This might have been useful when the PV code was young, but there haven't been any p2m related bugs requiring the p2m dump since ages. Remove the code and the related config option. Signed-off-by: Juergen Gross --- Kind of RFC, as there might be different opinions. The only time I have used the p2m dump was when I reworked the p2m coding more than 10 years ago. An alternative would be to make CONFIG_XEN_DEBUG_FS dependant on CONFIG_XEN_PV and to fix the help text (it is completely wrong, as it enables neither statistics output, nor tuning options, nor is it relevant to performance at all - the only existing functionality isn't mentioned either). Signed-off-by: Juergen Gross --- arch/x86/xen/Kconfig | 7 ------- arch/x86/xen/Makefile | 2 -- arch/x86/xen/debugfs.c | 16 --------------- arch/x86/xen/p2m.c | 45 ------------------------------------------ arch/x86/xen/xen-ops.h | 2 -- 5 files changed, 72 deletions(-) delete mode 100644 arch/x86/xen/debugfs.c diff --git a/arch/x86/xen/Kconfig b/arch/x86/xen/Kconfig index aa4040fd9215..51b53ce66efb 100644 --- a/arch/x86/xen/Kconfig +++ b/arch/x86/xen/Kconfig @@ -65,13 +65,6 @@ config XEN_PVHVM_GUEST help Support running as a Xen PVHVM guest. -config XEN_DEBUG_FS - bool "Enable Xen debug and tuning parameters in debugfs" - depends on XEN && DEBUG_FS - help - Enable statistics output and various tuning options in debugfs. - Enabling this option may incur a significant performance overhead. - config XEN_PVH bool "Xen PVH guest support" depends on XEN && XEN_PVHVM && ACPI diff --git a/arch/x86/xen/Makefile b/arch/x86/xen/Makefile index a9ec8c9f5c5d..717264ae269b 100644 --- a/arch/x86/xen/Makefile +++ b/arch/x86/xen/Makefile @@ -43,8 +43,6 @@ obj-$(CONFIG_XEN_PVHVM_SMP) += smp_hvm.o obj-$(CONFIG_PARAVIRT_SPINLOCKS)+= spinlock.o -obj-$(CONFIG_XEN_DEBUG_FS) += debugfs.o - obj-$(CONFIG_XEN_DOM0) += vga.o obj-$(CONFIG_XEN_EFI) += efi.o diff --git a/arch/x86/xen/debugfs.c b/arch/x86/xen/debugfs.c deleted file mode 100644 index b8c9f2a7d9b6..000000000000 --- a/arch/x86/xen/debugfs.c +++ /dev/null @@ -1,16 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -#include -#include -#include - -#include "xen-ops.h" - -static struct dentry *d_xen_debug; - -struct dentry * __init xen_init_debugfs(void) -{ - if (!d_xen_debug) - d_xen_debug = debugfs_create_dir("xen", NULL); - return d_xen_debug; -} - diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c index 2dd12b61a230..d007ccf6e7a1 100644 --- a/arch/x86/xen/p2m.c +++ b/arch/x86/xen/p2m.c @@ -883,48 +883,3 @@ void __init xen_add_remap_nonram(phys_addr_t maddr, phys_addr_t paddr, nr_nonram_remap++; } - -#ifdef CONFIG_XEN_DEBUG_FS -#include -static int p2m_dump_show(struct seq_file *m, void *v) -{ - static const char * const type_name[] = { - [P2M_TYPE_IDENTITY] = "identity", - [P2M_TYPE_MISSING] = "missing", - [P2M_TYPE_PFN] = "pfn", - [P2M_TYPE_UNKNOWN] = "abnormal"}; - unsigned long pfn, first_pfn; - int type, prev_type; - - prev_type = xen_p2m_elem_type(0); - first_pfn = 0; - - for (pfn = 0; pfn < xen_p2m_size; pfn++) { - type = xen_p2m_elem_type(pfn); - if (type != prev_type) { - seq_printf(m, " [0x%lx->0x%lx] %s\n", first_pfn, pfn, - type_name[prev_type]); - prev_type = type; - first_pfn = pfn; - } - } - seq_printf(m, " [0x%lx->0x%lx] %s\n", first_pfn, pfn, - type_name[prev_type]); - return 0; -} - -DEFINE_SHOW_ATTRIBUTE(p2m_dump); - -static struct dentry *d_mmu_debug; - -static int __init xen_p2m_debugfs(void) -{ - struct dentry *d_xen = xen_init_debugfs(); - - d_mmu_debug = debugfs_create_dir("mmu", d_xen); - - debugfs_create_file("p2m", 0600, d_mmu_debug, NULL, &p2m_dump_fops); - return 0; -} -fs_initcall(xen_p2m_debugfs); -#endif /* CONFIG_XEN_DEBUG_FS */ diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index a27ab1f50cf9..6808010ac379 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h @@ -254,8 +254,6 @@ static inline void xen_hvm_post_suspend(int suspend_cancelled) {} void xen_add_extra_mem(unsigned long start_pfn, unsigned long n_pfns); -struct dentry * __init xen_init_debugfs(void); - bool __set_phys_to_machine(unsigned long pfn, unsigned long mfn); void xen_hvm_init_mmu_ops(void); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 15:27:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:27:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317012.1586320 (Exim 4.92) (envelope-from ) id 1wQRmR-00060q-7V; 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> > if ( !ring_info ) > > { > > - gprintk(XENLOG_ERR, > > - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", > > - current->domain->domain_id, src_id.domain_id, src_id.aport, > > - dst_addr->domain_id, dst_addr->aport); > > + argo_dprintk("argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", > > AFAIU, argo_dprintk() already adds the "argo: " prefix internally. Thanks! Will fix this and the follow on patch too. > > Best regards, > Mykola > From xen-devel-bounces@lists.xenproject.org Fri May 22 15:44:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:44:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317039.1586330 (Exim 4.92) (envelope-from ) id 1wQS2X-0001Ct-Fw; Fri, 22 May 2026 15:43:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317039.1586330; Fri, 22 May 2026 15:43:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQS2X-0001Cl-Bh; Fri, 22 May 2026 15:43:57 +0000 Received: by outflank-mailman (input) for mailman id 1317039; Fri, 22 May 2026 15:43:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQS2V-0001Cf-5u for xen-devel@lists.xenproject.org; Fri, 22 May 2026 15:43:55 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQS2U-0000aF-I5 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:43:54 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1079b3-2eae-0a2a0a5409dd-0a2a450bd3ae-2 for ; Fri, 22 May 2026 17:43:54 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1079ba-212f-0a2a450b0019-d1558032ad30-3 for ; Fri, 22 May 2026 17:43:54 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-4891c0620bcso47678175e9.1 for ; Fri, 22 May 2026 08:43:54 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Hmm, good question. Looks like rudiment from initial implementation. I will rephrase it to: /* * VGEIN control structure for each physical CPU to track which VS (guest) * interrupt file IDs are in use. */ >> + >> +unsigned int vgein_assign(struct vcpu *v) >> +{ >> + unsigned int vgein_id; >> + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); >> + unsigned long *bmp = &vgein->bmp; >> + unsigned long flags; >> + >> + spin_lock_irqsave(&vgein->lock, flags); >> + /* >> + * The vgein_id shouldn't be zero, as it will indicate that no guest >> + * external interrupt source is selected for VS-level external interrupts >> + * according to RISC-V priviliged spec: >> + * Hypervisor Status Register (hstatus) in RISC-V priviliged spec: >> + * >> + * The VGEIN (Virtual Guest External Interrupt Number) field selects >> + * a guest external interrupt source for VS-level external interrupts. >> + * VGEIN is a WLRL field that must be able to hold values between zero >> + * and the maximum guest external interrupt number (known as GEILEN), >> + * inclusive. >> + * When VGEIN=0, no guest external interrupt source is selected for >> + * VS-level external interrupts. >> + * >> + * So start to search from bit number 1. >> + */ >> + vgein_id = find_next_zero_bit(bmp, vgein->geilen + 1, 1); >> + >> + if ( vgein_id > vgein->geilen ) >> + vgein_id = 0; >> + else >> + __set_bit(vgein_id, bmp); >> + >> + spin_unlock_irqrestore(&vgein->lock, flags); >> + >> +#ifdef VGEIN_DEBUG >> + gprintk(XENLOG_DEBUG, "%s: %pv: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", >> + __func__, v, vgein_id, v->processor, *bmp); > > %d vs unsigned int again (and then yet again further down). > >> +#endif >> + >> + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; > > Is this needed when vgein_release() also does it? Considering how ->hstatus is initialized I agree that we don't need that here. > >> + vcpu_guest_cpu_user_regs(v)->hstatus |= >> + MASK_INSR(vgein_id, HSTATUS_VGEIN); >> + >> + return vgein_id; >> +} >> + >> +void vgein_release(struct vcpu *v, unsigned int vgen_id) >> +{ >> + unsigned long flags; >> + struct vgein_ctrl *vgein = &per_cpu(vgein, v->processor); >> + >> + if ( !vgen_id ) >> + return; >> + >> + spin_lock_irqsave(&vgein->lock, flags); >> + __clear_bit(vgen_id, &vgein->bmp); >> + spin_unlock_irqrestore(&vgein->lock, flags); >> + >> +#ifdef VGEIN_DEBUG >> + gprintk(XENLOG_DEBUG, "%s: vgein_id(%u), xen_cpu%d_bmp=%#lx\n", >> + __func__, vgen_id, v->processor, vgein->bmp); >> +#endif >> + >> + vcpu_guest_cpu_user_regs(v)->hstatus &= ~HSTATUS_VGEIN; >> } > > Overall: How is one to review these two functions, when it's entirely > unclear where they're going to be called from? Among other aspects it > doesn't become clear what the behavior is going to be when > vgein_assign() doesn't find an available ID. I've therefore only > commented on mechanical aspects I noticed. It is used in "[PATCH v2 14/26] xen/riscv: add very early virtual APLIC (vAPLIC) initialization support" from this patch series. I realize that was not obvious, sorry for the omission. That said, I am planning to move all AIA-related logic out of vcpu_vaplic_init() and into continue_new_vcpu(), because some IMSIC-related operations require knowing which physical CPU the vCPU will be scheduled on, and moving the work there avoids redundant recalculation. As a result, vgein_assign() would no longer be called from vcpu_vaplic_init(), so I could drop this patch from the series entirely and reintroduce it when it is actually needed. Alternatively, I can keep the patch and extend the commit message to explain the intended call site and how the return value will be handled. Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Fri May 22 15:50:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 15:50:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317055.1586337 (Exim 4.92) (envelope-from ) id 1wQS96-0003LZ-6g; Fri, 22 May 2026 15:50:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317055.1586337; Fri, 22 May 2026 15:50:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQS96-0003LS-3c; Fri, 22 May 2026 15:50:44 +0000 Received: by outflank-mailman (input) for mailman id 1317055; Fri, 22 May 2026 15:50:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wQS94-0003LM-MX for xen-devel@lists.xenproject.org; Fri, 22 May 2026 15:50:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQS93-00FfXi-S7 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:50:41 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a107b3e-2eae-0a2a0a5409dd-0a2a450aeb58-26 for ; Fri, 22 May 2026 17:50:41 +0200 Received: from [209.85.128.50] (helo=mail-wm1-f50.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a107b51-56b3-0a2a450a0019-d1558032c53c-3 for ; Fri, 22 May 2026 17:50:41 +0200 Received: by mail-wm1-f50.google.com with SMTP id 5b1f17b1804b1-49048e043e5so3690765e9.1 for ; Fri, 22 May 2026 08:50:41 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Agree, it works only because of a pointer is used. Lets ommit const then here. > >> @@ -312,6 +323,30 @@ static int imsic_parse_node(const struct dt_device_node *node, >> return 0; >> } >> >> +int vcpu_imsic_init(struct vcpu *v) >> +{ >> + struct vimsic_state *imsic_state; >> + >> + /* Allocate IMSIC context */ >> + imsic_state = xvzalloc(struct vimsic_state); >> + if ( !imsic_state ) >> + return -ENOMEM; >> + >> + v->arch.vimsic_state = imsic_state; >> + >> + /* Setup IMSIC context */ >> + rwlock_init(&imsic_state->vsfile_lock); >> + >> + imsic_state->vsfile_pcpu = NR_CPUS; >> + >> + return 0; >> +} >> + >> +void vcpu_imsic_deinit(const struct vcpu *v) >> +{ >> + xvfree(v->arch.vimsic_state); > > Better XVFREE(), for the function to be idempotent. Agree it would be better. > >> --- a/xen/arch/riscv/include/asm/imsic.h >> +++ b/xen/arch/riscv/include/asm/imsic.h >> @@ -11,6 +11,7 @@ >> #ifndef ASM_RISCV_IMSIC_H >> #define ASM_RISCV_IMSIC_H >> >> +#include >> #include >> #include >> #include >> @@ -61,7 +62,24 @@ struct imsic_config { >> spinlock_t lock; >> }; >> >> +struct vimsic_state { >> + /* IMSIC VS-file */ >> + rwlock_t vsfile_lock; >> + /* >> + * (guest_file_id == 0) -> s/w IMSIC SW-file >> + * (guest_file_id > 0) -> h/w IMSIC VS-file >> + */ >> + unsigned int guest_file_id; >> + /* >> + * (vsfile_pcpu >= 0) => h/w IMSIC VS-file >> + * (vsfile_pcpu == NR_CPUS) => s/w IMSIC SW-file >> + */ >> + unsigned int vsfile_pcpu; >> +}; > > In the comments, what does SW stand for? Not "software" I assume, as > that's already expressed by s/w. It is a typo and it should be VS-file. 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Patch 1 lowers the verbosity of a spammy log message. Patch 2 corrects the debug logline. Patch 3 cleans up existing loglines by dropping duplicate prefixes. CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2546842322 Denis Mukhin (3): argo: lower level of noisy connection-refused log argo: correct logline in ring_unmap() argo: drop argo prefix from argo_dprintk() calls xen/common/argo.c | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 16:53:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 16:53:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317110.1586357 (Exim 4.92) (envelope-from ) id 1wQT7M-0005hd-SC; Fri, 22 May 2026 16:53:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317110.1586357; Fri, 22 May 2026 16:53:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQT7M-0005hD-Mf; Fri, 22 May 2026 16:53:00 +0000 Received: by outflank-mailman (input) for mailman id 1317110; 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Also, drop "argo: " prefix, since it is also injected by argo_dprintk() Signed-off-by: Denis Mukhin --- Changes since v1: - dropped duplicate "argo: " prefix --- xen/common/argo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 98a3db7fd070..5da14c929e14 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -474,7 +474,7 @@ ring_unmap(const struct domain *d, struct argo_ring_info *ring_info) continue; ASSERT(!mfn_eq(ring_info->mfns[i], INVALID_MFN)); - argo_dprintk(XENLOG_ERR "argo: unmapping page %"PRI_mfn" from %p\n", + argo_dprintk("unmapping page %"PRI_mfn" from %p\n", mfn_x(ring_info->mfns[i]), ring_info->mfn_mapping[i]); unmap_domain_page_global(ring_info->mfn_mapping[i]); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 16:53:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 16:53:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317113.1586378 (Exim 4.92) (envelope-from ) id 1wQT7U-0006Ky-Cn; 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Remove duplicate prefixes from log messages in the Argo module where applicable. Signed-off-by: Denis Mukhin --- Changes since v1: - new patch --- xen/common/argo.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 5da14c929e14..ffa1f43437ab 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -1467,7 +1467,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_info *ring_info, if ( ring_info->mfns ) { /* Ring already existed: drop the previous mapping. */ - argo_dprintk("argo: vm%u re-register existing ring " + argo_dprintk("vm%u re-register existing ring " "(vm%u:%x vm%u) clears mapping\n", d->domain_id, ring_info->id.domain_id, ring_info->id.aport, ring_info->id.partner_id); @@ -1527,7 +1527,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_info *ring_info, { ASSERT(ring_info->nmfns == NPAGES_RING(len)); - argo_dprintk("argo: vm%u ring (vm%u:%x vm%u) %p " + argo_dprintk("vm%u ring (vm%u:%x vm%u) %p " "mfn_mapping %p len %u nmfns %u\n", d->domain_id, ring_info->id.domain_id, ring_info->id.aport, ring_info->id.partner_id, ring_info, @@ -1741,7 +1741,7 @@ register_ring(struct domain *currd, list_add(&ring_info->node, &currd->argo->ring_hash[hash_index(&ring_info->id)]); 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Signed-off-by: Denis Mukhin --- Changes since v1: - dropped duplicate "argo: " prefix --- xen/common/argo.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 28626e00a8cb..98a3db7fd070 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_addr, src_id.domain_id); if ( !ring_info ) { - gprintk(XENLOG_ERR, - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", - current->domain->domain_id, src_id.domain_id, src_id.aport, - dst_addr->domain_id, dst_addr->aport); + argo_dprintk("vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", + current->domain->domain_id, src_id.domain_id, src_id.aport, + dst_addr->domain_id, dst_addr->aport); ret = -ECONNREFUSED; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Fri May 22 17:21:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 17:21:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317153.1586386 (Exim 4.92) (envelope-from ) id 1wQTYi-0004Jn-K0; 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Fri, 22 May 2026 10:21:13 -0700 (PDT) MIME-Version: 1.0 References: <20260522165238.844649-1-dmukhin@ford.com> <20260522165238.844649-2-dmukhin@ford.com> In-Reply-To: <20260522165238.844649-2-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 20:21:01 +0300 X-Gm-Features: AVHnY4LecR-n6Qq4gQ9i09UQsRZlM4uvQfNwQFRN7pqgpAJwxikNPgcM8ccH0Ss Message-ID: Subject: Re: [PATCH v2 1/3] argo: lower level of noisy connection-refused log To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779470474-B7957FF4-0FEB443B/0/0 X-purgate-type: clean X-purgate-size: 1495 On Fri, May 22, 2026 at 7:53=E2=80=AFPM wrote: > > From: Denis Mukhin > > Lower the log level of the "connection refused" log line, as it can > spam the logs when a dom0 service using the Argo hypercall tries to > communicate with a domain that is still starting up. > > Signed-off-by: Denis Mukhin > --- > Changes since v1: > - dropped duplicate "argo: " prefix > --- > xen/common/argo.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 28626e00a8cb..98a3db7fd070 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_a= ddr, > src_id.domain_id); > if ( !ring_info ) > { > - gprintk(XENLOG_ERR, > - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:= %x)\n", > - current->domain->domain_id, src_id.domain_id, src_id.apo= rt, > - dst_addr->domain_id, dst_addr->aport); > + argo_dprintk("vm%u connection refused, src (vm%u:%x) dst (vm%u:%= x)\n", > + current->domain->domain_id, src_id.domain_id, src_i= d.aport, > + dst_addr->domain_id, dst_addr->aport); > > ret =3D -ECONNREFUSED; > } > -- > 2.54.0 > > Reviewed-by: Mykola Kvach ~Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 17:21:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 17:21:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317158.1586396 (Exim 4.92) (envelope-from ) id 1wQTZG-0004l2-S2; Fri, 22 May 2026 17:21:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317158.1586396; Fri, 22 May 2026 17:21:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTZG-0004ku-PD; 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Fri, 22 May 2026 10:21:45 -0700 (PDT) Date: Fri, 22 May 2026 10:21:26 -0700 In-Reply-To: Mime-Version: 1.0 References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> Message-ID: Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: Sean Christopherson To: David Woodhouse Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d62444/1779470508-AE95FFF4-7F2A958F/0/0 X-purgate-type: clean X-purgate-size: 494 On Fri, May 22, 2026, David Woodhouse wrote: > On Fri, 2026-05-22 at 05:49 -0700, Sean Christopherson wrote: > >=20 > > Oh, that's just an oversight, definitely not intentional.=C2=A0 Easy en= ough to fix: >=20 > Want me to roll that into the series? As you eloquently put it the > other day, what's one more patch...? I'll send a standalone patch, along with a selftest tweak to verify the fix= . It's technically a fix and won't generate any conflicts, no reason to delay= it. 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Fri, 22 May 2026 10:22:05 -0700 (PDT) MIME-Version: 1.0 References: <20260522165238.844649-1-dmukhin@ford.com> <20260522165238.844649-3-dmukhin@ford.com> In-Reply-To: <20260522165238.844649-3-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 20:21:53 +0300 X-Gm-Features: AVHnY4LCjaYC3Q_hbLwOlZIBV2uapzaZTHJHPnKp4tv-XOnoSFM3A1g3WyY3KzQ Message-ID: Subject: Re: [PATCH v2 2/3] argo: correct logline in ring_unmap() To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779470526-87B7DD75-1194D071/0/0 X-purgate-type: clean X-purgate-size: 1141 On Fri, May 22, 2026 at 7:53=E2=80=AFPM wrote: > > From: Denis Mukhin > > Drop XENLOG_ERR from the logline since argo_dprintk() already injects > the proper log level indicator. > > Also, drop "argo: " prefix, since it is also injected by argo_dprintk() > > Signed-off-by: Denis Mukhin > --- > Changes since v1: > - dropped duplicate "argo: " prefix > --- > xen/common/argo.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 98a3db7fd070..5da14c929e14 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -474,7 +474,7 @@ ring_unmap(const struct domain *d, struct argo_ring_i= nfo *ring_info) > continue; > > ASSERT(!mfn_eq(ring_info->mfns[i], INVALID_MFN)); > - argo_dprintk(XENLOG_ERR "argo: unmapping page %"PRI_mfn" from %p= \n", > + argo_dprintk("unmapping page %"PRI_mfn" from %p\n", > mfn_x(ring_info->mfns[i]), ring_info->mfn_mapping[i= ]); Reviewed-by: Mykola Kvach ~Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 17:24:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 17:24:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317174.1586413 (Exim 4.92) (envelope-from ) id 1wQTcC-0005p4-GU; Fri, 22 May 2026 17:24:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317174.1586413; Fri, 22 May 2026 17:24:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTcC-0005ox-Dv; Fri, 22 May 2026 17:24:52 +0000 Received: by outflank-mailman (input) for mailman id 1317174; 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Fri, 22 May 2026 10:24:49 -0700 (PDT) MIME-Version: 1.0 References: <20260522165238.844649-1-dmukhin@ford.com> <20260522165238.844649-4-dmukhin@ford.com> In-Reply-To: <20260522165238.844649-4-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 20:24:38 +0300 X-Gm-Features: AVHnY4LZG7Lq1STBvtGuZVJT0hUQ163E5IgE3WCEme_ERWExTirtVIFpbQBnVSY Message-ID: Subject: Re: [PATCH v2 3/3] argo: drop argo prefix from argo_dprintk() calls To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-bad1c0/1779470690-8B790A53-7EE86066/0/0 X-purgate-type: clean X-purgate-size: 2561 On Fri, May 22, 2026 at 7:53=E2=80=AFPM wrote: > > From: Denis Mukhin > > argo_dprintk() prefixes all log lines with "argo: " automatically. > > Remove duplicate prefixes from log messages in the Argo module where > applicable. > > Signed-off-by: Denis Mukhin > --- > Changes since v1: > - new patch > --- > xen/common/argo.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 5da14c929e14..ffa1f43437ab 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -1467,7 +1467,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_i= nfo *ring_info, > if ( ring_info->mfns ) > { > /* Ring already existed: drop the previous mapping. */ > - argo_dprintk("argo: vm%u re-register existing ring " > + argo_dprintk("vm%u re-register existing ring " > "(vm%u:%x vm%u) clears mapping\n", > d->domain_id, ring_info->id.domain_id, > ring_info->id.aport, ring_info->id.partner_id); > @@ -1527,7 +1527,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_i= nfo *ring_info, > { > ASSERT(ring_info->nmfns =3D=3D NPAGES_RING(len)); > > - argo_dprintk("argo: vm%u ring (vm%u:%x vm%u) %p " > + argo_dprintk("vm%u ring (vm%u:%x vm%u) %p " > "mfn_mapping %p len %u nmfns %u\n", > d->domain_id, ring_info->id.domain_id, > ring_info->id.aport, ring_info->id.partner_id, ring= _info, > @@ -1741,7 +1741,7 @@ register_ring(struct domain *currd, > list_add(&ring_info->node, > &currd->argo->ring_hash[hash_index(&ring_info->id)]); > > - argo_dprintk("argo: vm%u registering ring (vm%u:%x vm%u)\n", > + argo_dprintk("vm%u registering ring (vm%u:%x vm%u)\n", > currd->domain_id, ring_id.domain_id, ring_id.aport, > ring_id.partner_id); > } > @@ -1781,7 +1781,7 @@ register_ring(struct domain *currd, > goto out_unlock2; > } > > - argo_dprintk("argo: vm%u re-registering existing ring (vm%u:%x v= m%u)\n", > + argo_dprintk("vm%u re-registering existing ring (vm%u:%x vm%u)\n= ", > currd->domain_id, ring_id.domain_id, ring_id.aport, > ring_id.partner_id); Reviewed-by: Mykola Kvach ~Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 17:37:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 17:37:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317186.1586423 (Exim 4.92) (envelope-from ) id 1wQTo8-0007uI-IU; Fri, 22 May 2026 17:37:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317186.1586423; Fri, 22 May 2026 17:37:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTo8-0007uB-Er; Fri, 22 May 2026 17:37:12 +0000 Received: by outflank-mailman (input) for mailman id 1317186; Fri, 22 May 2026 17:37:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTo7-0007sm-9X for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:37:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQTo6-0033VM-Lb for xen-devel@lists.xenproject.org; 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Fri, 22 May 2026 10:37:09 -0700 (PDT) MIME-Version: 1.0 References: <20260522165238.844649-1-dmukhin@ford.com> <20260522165238.844649-2-dmukhin@ford.com> In-Reply-To: <20260522165238.844649-2-dmukhin@ford.com> From: Mykola Kvach Date: Fri, 22 May 2026 20:36:58 +0300 X-Gm-Features: AVHnY4I98UlnjtuyWib8rAZ7GCDQN1axv_MUpaY87z1V9yZj4pMHj-T2JCI1SGk Message-ID: Subject: Re: [PATCH v2 1/3] argo: lower level of noisy connection-refused log To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, jbeulich@suse.com, julien@xen.org, michal.orzel@amd.com, roger.pau@citrix.com, sstabellini@kernel.org, christopher.w.clark@gmail.com, dpsmith@apertussolutions.com Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-4011c0/1779471430-7D1848B7-62FD9FA7/0/0 X-purgate-type: clean X-purgate-size: 2111 Hi Denis, Just one follow-up after sending my Reviewed-by. The patches look fine to me and my tag still stands, but there are a couple of side effects worth considering here. On Fri, May 22, 2026 at 7:53=E2=80=AFPM wrote: > > From: Denis Mukhin > > Lower the log level of the "connection refused" log line, as it can > spam the logs when a dom0 service using the Argo hypercall tries to > communicate with a domain that is still starting up. > > Signed-off-by: Denis Mukhin > --- > Changes since v1: > - dropped duplicate "argo: " prefix > --- > xen/common/argo.c | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/xen/common/argo.c b/xen/common/argo.c > index 28626e00a8cb..98a3db7fd070 100644 > --- a/xen/common/argo.c > +++ b/xen/common/argo.c > @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_a= ddr, > src_id.domain_id); > if ( !ring_info ) > { > - gprintk(XENLOG_ERR, > - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:= %x)\n", > - current->domain->domain_id, src_id.domain_id, src_id.apo= rt, > - dst_addr->domain_id, dst_addr->aport); > + argo_dprintk("vm%u connection refused, src (vm%u:%x) dst (vm%u:%= x)\n", First, switching from gprintk() to argo_dprintk() means the message will no longer include the "%pv" context printed by gprintk(), i.e. the current vCPU/domain context. If that context is still useful for this message, it may need to be added explicitly. Second, this also changes when the message is printed. gprintk() is a regular printk() wrapper with a guest prefix and the requested log level, while argo_dprintk() is compiled as a no-op unless ARGO_DEBUG is enabled. So the change is not only lowering the log level from error to debug, but also making the message depend on ARGO_DEBUG. This may be intended, but in that case it might be worth mentioning this in the commit message. ~Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 17:48:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 17:48:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317206.1586432 (Exim 4.92) (envelope-from ) id 1wQTyx-00025t-LA; Fri, 22 May 2026 17:48:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317206.1586432; Fri, 22 May 2026 17:48:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTyx-00025m-HJ; Fri, 22 May 2026 17:48:23 +0000 Received: by outflank-mailman (input) for mailman id 1317206; Fri, 22 May 2026 17:48:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQTyu-00025b-2m for xen-devel@lists.xenproject.org; Fri, 22 May 2026 17:48:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQTyt-00FyvF-A7; Fri, 22 May 2026 19:48:19 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1096de-5cb7-0a2a0a5109dd-0a2a4506e2a0-8 for ; Fri, 22 May 2026 19:48:18 +0200 Received: from [90.155.50.34] (helo=casper.infradead.org) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1096e1-7371-0a2a45060019-5a9b3222ebf4-3 for ; Fri, 22 May 2026 19:48:17 +0200 Received: from 54-240-197-238.amazon.com ([54.240.197.238] helo=freeip.amazon.com) by casper.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQTyi-0000000APGq-2qF8; Fri, 22 May 2026 17:48:08 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=casper.20170209 header.d=infradead.org header.i="@infradead.org" header.h="MIME-Version:Content-Type:References:In-Reply-To:Date:Cc:To:From:Subject:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=MIME-Version:Content-Type:References: In-Reply-To:Date:Cc:To:From:Subject:Message-ID:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=YAQoKoOwWPW3Ak+kECiU/OfUOBm+LsGB0e6nKpQwUrQ=; b=qs3+8WTIScj2GuMSok2qYe/51T Es3SyEeuALPxrfXQfv0lJpq9p4zAZC1Orm0IrT6fOVURjfSEkTeRsTP4/pJ/5hlnTxj1VNNSsbH9f 4RdiaQ5RVEZR/zdpm962XMlJIMn8GVkTlxvnY24QYWy2udJECluNpzjrtObaB4kPQiqjMwDnM7h+c AvK3xMyjpw3HXO00IvmvkeTb7sTbfuzjPYX6QPze6hoodNxdG6uRkYK6kkEvzOPn+kZphuDlphArh j7M+xvHrheUvY3yszEGwomNWLPI93KZUpI2Zym3PY3b+z8Qt5Nxndl0Cd69DrjL880WQzvszegoVq BC/IZCyA==; Message-ID: <99356a588677e9ff31c1747db1705d9250a2728d.camel@infradead.org> Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: David Woodhouse To: Sean Christopherson Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Date: Fri, 22 May 2026 18:48:07 +0100 In-Reply-To: References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> Content-Type: multipart/signed; micalg="sha-256"; protocol="application/pkcs7-signature"; boundary="=-FXtb7qac/xWXftlRSmGM" User-Agent: Evolution 3.52.3-0ubuntu1.1 MIME-Version: 1.0 X-SRS-Rewrite: SMTP reverse-path rewritten from by casper.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-16d1c6/1779472098-84767D75-34FB7D32/0/0 X-purgate-type: clean X-purgate-size: 7564 --=-FXtb7qac/xWXftlRSmGM Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable On Fri, 2026-05-22 at 10:21 -0700, Sean Christopherson wrote: >=20 > I'll send a standalone patch, along with a selftest tweak to verify the f= ix. > It's technically a fix and won't generate any conflicts, no reason to del= ay it. Are you suggesting the other 30 should be delayed? :P --=-FXtb7qac/xWXftlRSmGM Content-Type: application/pkcs7-signature; name="smime.p7s" Content-Disposition: attachment; filename="smime.p7s" Content-Transfer-Encoding: base64 MIAGCSqGSIb3DQEHAqCAMIACAQExDzANBglghkgBZQMEAgEFADCABgkqhkiG9w0BBwEAAKCCD9Aw ggSOMIIDdqADAgECAhAOmiw0ECVD4cWj5DqVrT9PMA0GCSqGSIb3DQEBCwUAMGUxCzAJBgNVBAYT AlVTMRUwEwYDVQQKEwxEaWdpQ2VydCBJbmMxGTAXBgNVBAsTEHd3dy5kaWdpY2VydC5jb20xJDAi BgNVBAMTG0RpZ2lDZXJ0IEFzc3VyZWQgSUQgUm9vdCBDQTAeFw0yNDAxMzAwMDAwMDBaFw0zMTEx MDkyMzU5NTlaMEExCzAJBgNVBAYTAkFVMRAwDgYDVQQKEwdWZXJva2V5MSAwHgYDVQQDExdWZXJv a2V5IFNlY3VyZSBFbWFpbCBHMjCCASIwDQYJKoZIhvcNAQEBBQADggEPADCCAQoCggEBAMjvgLKj jfhCFqxYyRiW8g3cNFAvltDbK5AzcOaR7yVzVGadr4YcCVxjKrEJOgi7WEOH8rUgCNB5cTD8N/Et GfZI+LGqSv0YtNa54T9D1AWJy08ZKkWvfGGIXN9UFAPMJ6OLLH/UUEgFa+7KlrEvMUupDFGnnR06 aDJAwtycb8yXtILj+TvfhLFhafxroXrflspavejQkEiHjNjtHnwbZ+o43g0/yxjwnarGI3kgcak7 nnI9/8Lqpq79tLHYwLajotwLiGTB71AGN5xK+tzB+D4eN9lXayrjcszgbOv2ZCgzExQUAIt98mre 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Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Daniel P. Smith" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-720697/1779476864-8256B161-8FE3DBA7/0/0 X-purgate-type: clean X-purgate-size: 8942 Hi Denis, Thank you for the review. On Fri, May 22, 2026 at 1:10=E2=80=AFAM wrote: > > Hi Mykola, > > The patch looks good! > > I would try to add a CI coverage for QEMU aarch64 tests, since QEMU > supports multiple RAM banks topology. > > What do you think? Sounds good to me. CI coverage would be useful for this case. The test would need LLC coloring enabled and a low free region that passes the old 128MB threshold while still being too small for the kernel, generated DTB and initrd placement. This should be possible to model in QEMU with suitable reserved-memory holes in the DT. > > Also, few remarks below. > > On Sun, May 17, 2026 at 11:57:56PM +0300, Mykola Kvach wrote: > > From: Mykola Kvach > > > > With LLC coloring enabled, the hardware domain memory comes from > > allocate_hwdom_memory(), not from the fixed direct-map banks used when > > coloring is off. > > > > Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for > > DMA") made that allocator sort free host regions by ascending address s= o > > Dom0 gets DMA-capable low memory first. The first bank filter still onl= y > > required 128MB. That can select a low region which is large enough for > > the heuristic, but not large enough for place_modules() to put the Dom0 > > kernel, generated DTB and initrd contiguously in bank 0. > > > > Ask arch code for any additional first-bank size requirement. On Arm, > > compute it from the actual Dom0 kernel placement, rounded initrd size a= nd > > generated DTB size hint. For 64-bit Image kernels, include the text off= set > > from the candidate bank start, because the returned requirement is comp= ared > > with a bank size measured from that start. The hint covers both the nor= mal > > Device Tree path and the minimal DTB created for ACPI boot. > > > > Check the first-bank threshold against the size which will actually be > > assigned to Dom0, after capping the host region by the remaining unassi= gned > > Dom0 memory. Otherwise a large host region could pass the test but stil= l > > produce a first guest bank too small for place_modules(). > > > > Use the typed min()/max() helpers for this normal allocation arithmetic= ; > > MIN()/MAX() are intended for preprocessor-style contexts and skip the t= ype > > checking provided by the lowercase helpers. > > > > This keeps the DMA-oriented allocation policy from de99f3263555 while > > preventing a too-small bank 0 from reaching place_modules(). > > > > Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for = DMA") > > Signed-off-by: Mykola Kvach > > --- > > Test/setup notes: > > > > The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) > > arm64 board booted through U-Boot/TFTP and using huge initrd. > > > > Relevant Xen command line excerpt: > > dom0_mem=3D2048M llc-coloring=3Don > > > > Boot module layout from Xen: > > MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk > > MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel > > MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy > > > > The initrd is about 168MB. With LLC coloring enabled and the low-addres= s > > allocation policy from de99f3263555, Dom0 can receive a 192MB first ban= k: > > d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) > > > > That bank satisfies the old 128MB minimum but is too small for the > > rounded Dom0 kernel, generated DTB and initrd placement. The observed > > failure before this patch was: > > Panic on CPU 0: > > Not enough memory in the first bank for the kernel+dtb+initrd > > > > With this patch, the same boot skips the too-small low region for bank = 0 > > and reaches Dom0: > > d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) > > d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) > > d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) > > d0: extended region 0: 0x48000000->0x54000000 > > Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 > > Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 > > Loading d0 DTB to 0x5f000000-0x5f011c80 > > Linux version 5.10.194-yocto-standard > > --- > > xen/arch/arm/acpi/domain_build.c | 2 -- > > xen/arch/arm/domain_build.c | 8 ++++++ > > xen/arch/arm/include/asm/domain_build.h | 4 +++ > > xen/arch/arm/include/asm/kernel.h | 8 ++++++ > > xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ > > xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- > > xen/include/xen/fdt-kernel.h | 8 ++++++ > > 7 files changed, 83 insertions(+), 9 deletions(-) > > > > diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domai= n_build.c > > index 249d899c33..db16f7fa94 100644 > > --- a/xen/arch/arm/acpi/domain_build.c > > +++ b/xen/arch/arm/acpi/domain_build.c > > @@ -26,8 +26,6 @@ > > #undef virt_to_mfn > > #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) > > > > -#define ACPI_DOM0_FDT_MIN_SIZE 4096 > > - > > static int __init acpi_iomem_deny_access(struct domain *d) > > { > > acpi_status status; > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > > index 1efddc60ef..226e053c68 100644 > > --- a/xen/arch/arm/domain_build.c > > +++ b/xen/arch/arm/domain_build.c > > @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, co= nst char *e) > > (IS_ENABLED(CONFIG_STATIC_SHM) ? = \ > > (NR_SHMEM_BANKS * (160 + 16)) : 0)) > > > > +paddr_t __init dom0_get_fdt_size_hint(void) > > +{ > > + if ( !acpi_disabled ) > > + return ACPI_DOM0_FDT_MIN_SIZE; > > + > > + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; > > I would invert the condition so it is read more straightforward: > > if ( acpi_disabled ) > return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE= ; > > return ACPI_DOM0_FDT_MIN_SIZE; Ack, I will change it. > > [..] > > diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c > > index b72585b7fe..3644663e2f 100644 > > --- a/xen/arch/arm/kernel.c > > +++ b/xen/arch/arm/kernel.c > > @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct k= ernel_info *info) > > return load_addr; > > } > > > > +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t= len) > > +{ > > + return ROUNDUP(load_addr + len, MB(2)) - load_addr; > > +} > > + > > +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, > > + paddr_t bank_start) > > +{ > > + const struct boot_module *mod =3D info->bd.initrd; > > + const paddr_t initrd_len =3D ROUNDUP(mod ? mod->size : 0, MB(2)); > > + const paddr_t dtb_len =3D ROUNDUP(dom0_get_fdt_size_hint(), MB(2))= ; > > + paddr_t kernsize; > > + > > +#ifdef CONFIG_HAS_DOMAIN_TYPE > > Perhaps use `IS_ENABLED(CONFIG_HAS_DOMAIN_TYPE)` to reduce ifdefery? > My impression that IS_ENABLED() is preferred. I think the #ifdef is needed here. This code is in the common Arm kernel path and can still be built for 32-bit Arm, while both the `type` field in struct kernel_info and DOMAIN_64BIT are only available when CONFIG_HAS_DOMAIN_TYPE is enabled. Also, the `text_offset` field used in this branch is only present for ARM_64. IS_ENABLED() would make the condition a compile-time constant, but the compiler would still need to parse and type-check the expression in configurations where those fields/symbols do not exist. > > > + if ( (info->type =3D=3D DOMAIN_64BIT) && (info->image.start =3D=3D= 0) ) > > + { > > + paddr_t load_addr =3D bank_start + info->image.text_offset; > > + > > + /* > > + * The caller compares this value with a size measured from > > + * bank_start, so include the text offset before the kernel. > > + */ > > + kernsize =3D ROUNDUP(load_addr + info->image.len, MB(2)) - ban= k_start; > > + return kernsize + initrd_len + dtb_len; > > + } > > +#endif > > + > > + if ( info->image.start =3D=3D 0 ) > > Here too: invert the condition? > > if ( info->image.start ) > kernsize =3D kernel_placement_size(info->image.start, info->im= age.len); > else > ... Sounds good to me. CI coverage would be useful for this case. The test would need LLC coloring enabled and a low free region that passes the old 128MB threshold while still being too small for the kernel, generated DTB and initrd placement. I think this should be possible to model in QEMU by using a suitable DT memory layout, for example with reserved-memory holes. ~Mykola From xen-devel-bounces@lists.xenproject.org Fri May 22 19:41:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 19:41:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317281.1586450 (Exim 4.92) (envelope-from ) id 1wQVkX-00052Q-Cq; Fri, 22 May 2026 19:41:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317281.1586450; Fri, 22 May 2026 19:41:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQVkX-00052J-9R; Fri, 22 May 2026 19:41:37 +0000 Received: by outflank-mailman (input) for mailman id 1317281; Fri, 22 May 2026 19:41:35 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQVkV-00052C-EC for xen-devel@lists.xenproject.org; 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AFNElJ9CThXvSWzL/Er7LXytun5SS/asudNnG6sueuwDkWQ+wMT+V90LhcZeGbgPCxziEV5qutuAl0eDhbs=@lists.xenproject.org X-Gm-Message-State: AOJu0Yxb9aBsdoVoddEgLW0xB2G8PnfrdxY+BjME3RYvitNVYCKCkBkz cQVwwPDO6QAer+oAXqtoXcyRy3LgSKsiVK3Z07u4Yt05ZdJ7CvbMeTIfezPGZSdTlo255hPSXif OpGqP/w== X-Received: from pgkb12.prod.google.com ([2002:a63:eb4c:0:b0:c82:743c:ea8f]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3887:b0:369:a359:b181 with SMTP id 98e67ed59e1d1-36a6787b0dcmr5234805a91.23.1779486440140; Fri, 22 May 2026 14:47:20 -0700 (PDT) Date: Fri, 22 May 2026 14:47:19 -0700 In-Reply-To: <99356a588677e9ff31c1747db1705d9250a2728d.camel@infradead.org> Mime-Version: 1.0 References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> <99356a588677e9ff31c1747db1705d9250a2728d.camel@infradead.org> Message-ID: Subject: Re: [PATCH v4 27/30] KVM: x86: Add KVM_VCPU_TSC_EFFECTIVE_FREQ attribute From: Sean Christopherson To: David Woodhouse Cc: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-d62444/1779486442-B454DFF4-1B096409/0/0 X-purgate-type: clean X-purgate-size: 429 On Fri, May 22, 2026, David Woodhouse wrote: > On Fri, 2026-05-22 at 10:21 -0700, Sean Christopherson wrote: > > > > I'll send a standalone patch, along with a selftest tweak to verify the fix. > > It's technically a fix and won't generate any conflicts, no reason to delay it. > > Are you suggesting the other 30 should be delayed? :P LOL, just acknowledging that it'll take me a minute to page all of that code in. From xen-devel-bounces@lists.xenproject.org Fri May 22 23:31:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 22 May 2026 23:31:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317421.1586467 (Exim 4.92) (envelope-from ) id 1wQZKO-0008M8-0N; Fri, 22 May 2026 23:30:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317421.1586467; Fri, 22 May 2026 23:30:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQZKN-0008M1-TV; Fri, 22 May 2026 23:30:51 +0000 Received: by outflank-mailman (input) for mailman id 1317421; Fri, 22 May 2026 23:30:50 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQZKL-0008Lv-76 for xen-devel@lists.xenproject.org; Fri, 22 May 2026 23:30:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQZKK-0083x4-6g; Sat, 23 May 2026 01:30:48 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a10e721-bab6-0a2a0a5309dd-0a2a4508b616-10 for ; Sat, 23 May 2026 01:30:48 +0200 Received: from [90.155.92.199] (helo=desiato.infradead.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a10e727-63b5-0a2a45080019-5a9b5cc7d0d8-3 for ; Sat, 23 May 2026 01:30:47 +0200 Received: from [2001:8b0:10b:5:5975:12af:289:68ce] (helo=ehlo.thunderbird.net) by desiato.infradead.org with esmtpsa (Exim 4.99.1 #2 (Red Hat Linux)) id 1wQZK5-00000005akR-0Dzw; Fri, 22 May 2026 23:30:33 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=desiato.20200630 header.d=infradead.org header.i="@infradead.org" header.h="Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:References:In-Reply-To:Subject:CC:To:From:Date" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:Content-Type :MIME-Version:Message-ID:References:In-Reply-To:Subject:CC:To:From:Date: Sender:Reply-To:Content-ID:Content-Description; bh=i6vHdQ5oldCpZlhFDjFmxL304IdV4wnWfln87BM7NM0=; b=OUorWJ8tXcW09mDeCVBA/b8LZW hpfXFu+EBYP9IjRj2PiIkEVGfSyH9LRxmdtygDflODeVVijCU7fk7dVBnp1ZLjSeCRFp5cIz2lYZ5 i0K5bRWjlXK8pJGE+1wWAdEN7ptP8dQ/E7wnmXXsU5b4IldjDJg1OuxzNRa5Dv1ECgoPWc1bQZrYB 7Qqsy8e6x1CWJOdocrh1neuN+vKOiZ9WJRS268HMjqh6pNxc4N1jCsaKs1K/il0+geGYobFEr/J9E zno9xHOsMAknlHjYnXKJQo/D+frfDBzhKu8XKZ8zdUrzZO9dHhegJdo6KdiPhByzmwkvgRjFtEeM+ BfqIJBCA==; Date: Sat, 23 May 2026 00:30:33 +0100 From: David Woodhouse To: Sean Christopherson CC: Paolo Bonzini , Jonathan Corbet , Shuah Khan , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Vitaly Kuznetsov , Juergen Gross , Boris Ostrovsky , Paul Durrant , Jonathan Cameron , Sascha Bischoff , Marc Zyngier , Joey Gouly , Jack Allister , Dongli Zhang , joe.jin@oracle.com, kvm@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, linux-kselftest@vger.kernel.org Subject: =?US-ASCII?Q?Re=3A_=5BPATCH_v4_27/30=5D_KVM=3A_x86=3A_Add_K?= =?US-ASCII?Q?VM=5FVCPU=5FTSC=5FEFFECTIVE=5FFREQ_attribute?= User-Agent: K-9 Mail for Android In-Reply-To: References: <20260509224824.3264567-1-dwmw2@infradead.org> <20260509224824.3264567-28-dwmw2@infradead.org> <3ad6cd109480772ade3c11f23b9c1d7a9855d67e.camel@infradead.org> <99356a588677e9ff31c1747db1705d9250a2728d.camel@infradead.org> Message-ID: <277F54CD-9F17-4B67-B575-3A8DDEA09796@infradead.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-SRS-Rewrite: SMTP reverse-path rewritten from by desiato.infradead.org. See http://www.infradead.org/rpr.html X-purgate-ID: tlsNG-c1860d/1779492647-B7D7BDB1-DD550F35/0/0 X-purgate-type: clean X-purgate-size: 716 On 22 May 2026 22:47:19 BST, Sean Christopherson wrot= e: >On Fri, May 22, 2026, David Woodhouse wrote: >> On Fri, 2026-05-22 at 10:21 -0700, Sean Christopherson wrote: >> >=20 >> > I'll send a standalone patch, along with a selftest tweak to verify t= he fix=2E >> > It's technically a fix and won't generate any conflicts, no reason to= delay it=2E >>=20 >> Are you suggesting the other 30 should be delayed? :P > >LOL, just acknowledging that it'll take me a minute to page all of that c= ode in=2E Hey, it took me more than a year to page it back in :) I am only teasing; no rush=2E And I will post v5 with some accumulated twe= aks (from my kvmclock5 branch) soon=2E From xen-devel-bounces@lists.xenproject.org Sat May 23 02:50:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 23 May 2026 02:50:33 +0000 Received: from list by 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TenantId=c990bb7a-51f4-439b-bd36-9c07fb1041c0;Ip=[148.163.138.245];Helo=[mx0b-00498f04.pphosted.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR16MB5105 X-Proofpoint-GUID: ILfQ7Qu9cS3nOp4Q1MXYW3NIKVeuDPx2 X-Proofpoint-ORIG-GUID: ILfQ7Qu9cS3nOp4Q1MXYW3NIKVeuDPx2 X-Authority-Analysis: v=2.4 cv=fvHsol4f c=1 sm=1 tr=0 ts=6a1115e3 cx=c_pps a=0p5N1A/s2xr2YPsuh+j7dg==:117 a=b7IhknPlfT0FN1EembXvig==:17 a=6eWqkTHjU83fiwn7nKZWdM+Sl24=:19 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=3PXLN80vpJUA:10 a=6NUGLSImWEsA:10 a=w9pew1qAHqMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=P_n1zlmtWsCQbjROFjcg:22 a=-OawqTZBqJjt90xPb8wn:22 a=cbNQJ9GKAAAA:8 a=-nBlMIZhapJqLXGN05oA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=DqJYxgmhk6moR-_7_KoZ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTIzMDAyNSBTYWx0ZWRfX/ShwCstWeiuo VkANJ7z67nMThVCR7U5VmznZ29uWbIzzAEbLRKzZuBWt/OZTDHcvVK15+Tgzfal9mSp32/uLX9c 3NctO23D5oh9R2UM7RjTqxF0Qy/5WXN03KXvR4jLykOgfYt1ohWjMgZwlRvC+DE35DFAflByjQI 2bJzz95X/ohVEIUVojt3hhij889lxUAHtXs0/Q8lZeUtIMvLMJqVCySqxRNEKc+PX/JXc8oMz8K s/TfK+/JhrvSp/j6RhBU/CFLbf735bndHGmiAJCM3y3RJPNW7OdN159AKGhMPNXTJ0fR8rjq+kH 1lzUy/FzV+Gw/CVr28tJT7hnQNqA8LDamablFZSq4DNxpW940PnNmq7oRcwe5n5llX2pvaJ/Ny0 VhodP5GgTgtJ5bKptraQdaFXMIVTFxiASj/fWup2AF4YrzfBGnOuvzHNvblMC32pSRgW9PY/8oB fnxvSwh9iPNuHBBFKOQ== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-23_01,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 adultscore=0 spamscore=0 phishscore=0 bulkscore=0 lowpriorityscore=0 clxscore=1015 malwarescore=0 priorityscore=1501 impostorscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605230025 X-purgate-ID: tlsNG-c1860d/1779504616-C5187DB1-405D449E/0/0 X-purgate-type: clean X-purgate-size: 2583 On Fri, May 22, 2026 at 08:36:58PM +0300, Mykola Kvach wrote: > Hi Denis, > > Just one follow-up after sending my Reviewed-by. > > The patches look fine to me and my tag still stands, but there are a > couple of side effects worth considering here. > > On Fri, May 22, 2026 at 7:53 PM wrote: > > > > From: Denis Mukhin > > > > Lower the log level of the "connection refused" log line, as it can > > spam the logs when a dom0 service using the Argo hypercall tries to > > communicate with a domain that is still starting up. > > > > Signed-off-by: Denis Mukhin > > --- > > Changes since v1: > > - dropped duplicate "argo: " prefix > > --- > > xen/common/argo.c | 7 +++---- > > 1 file changed, 3 insertions(+), 4 deletions(-) > > > > diff --git a/xen/common/argo.c b/xen/common/argo.c > > index 28626e00a8cb..98a3db7fd070 100644 > > --- a/xen/common/argo.c > > +++ b/xen/common/argo.c > > @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_addr, > > src_id.domain_id); > > if ( !ring_info ) > > { > > - gprintk(XENLOG_ERR, > > - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", > > - current->domain->domain_id, src_id.domain_id, src_id.aport, > > - dst_addr->domain_id, dst_addr->aport); > > + argo_dprintk("vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", > > First, switching from gprintk() to argo_dprintk() means the message will > no longer include the "%pv" context printed by gprintk(), i.e. the > current vCPU/domain context. If that context is still useful for this > message, it may need to be added explicitly. I think %pv context is useful for debugging, I will add another small patch to re-wire argo_dprintk() to gprintk(). > > Second, this also changes when the message is printed. gprintk() is a > regular printk() wrapper with a guest prefix and the requested log level, > while argo_dprintk() is compiled as a no-op unless ARGO_DEBUG is enabled. > So the change is not only lowering the log level from error to debug, but > also making the message depend on ARGO_DEBUG. > > This may be intended, but in that case it might be worth mentioning this > in the commit message. Yes, this specific logline should be fine to be compiled out, the error is propaged back to the caller domain via XEN_ARGO_OP_sendv hypercall. I will update the commit message. Thanks! > > ~Mykola > From xen-devel-bounces@lists.xenproject.org Sat May 23 15:26:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 23 May 2026 15:26:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317800.1586486 (Exim 4.92) (envelope-from ) id 1wQoF2-0008RW-M0; Sat, 23 May 2026 15:26:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317800.1586486; Sat, 23 May 2026 15:26:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQoF2-0008RO-He; Sat, 23 May 2026 15:26:20 +0000 Received: by outflank-mailman (input) for mailman id 1317800; Sat, 23 May 2026 13:28:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQmPD-0008L3-US for xen-devel@lists.xenproject.org; Sat, 23 May 2026 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From: Len Bao To: Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko Cc: Len Bao , xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Subject: [PATCH] xen/mcelog: mark g_physinfo, ncpus and xen_mce_chrdev_device as __ro_after_init Date: Sat, 23 May 2026 13:28:01 +0000 Message-ID: <20260523132802.25391-1-len.bao@gmx.us> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Provags-ID: V03:K1:t7HjXaVCf2PlNLs94VZfYdtPXzzuo4fK3guIR0L3wY679Op9eoQ 5/J6G3ykESB15DT8uCb+CiSJqN6FB/mdE00NIYT7TdmkMIoZDOst6YHU36Yqa8Yz+JMlMvc NX1Q1Or+JAoreVI1zc4a+dJg9OrGYKbcgcFqkG9MDlQ8bcayWlSiMZrT58b8A7UBXBmZLEl xwt/CzWVhGW6oAZ9ND6YQ== X-Spam-Flag: NO UI-OutboundReport: notjunk:1;M01:P0:klaenqraX2c=;D6n+U22RkmtIkymFINMLU5fU5lp KmqGewVRIiIe69vJBQQGyDDLo0gyHWzJPOaB0YXl42So0ofxm0Pqi8FybFbCTTTSQCgCMvD71 eRM7l5GrcGA0xYuS3wYdOXud+farq5HYDkb9WNAtiECyCWmJzBi5AB32FTGVdIt84lFM1bTyO NWkWB2MTWYGvZWMBN9Ifobh1v81bdbKMQtrqyUHREu04kwdmhiKhmqtLKZ9i5SxGvUrkTVmgU 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GZiY08AltM9/oPuaJbrmzYEKSvBWMLGhV7vhngL4kt4R7d4oAK5IvFSfYcg8i9JRhsKlTO4Sc qVrbUe+bs7eoZzzKffv5mjiwItjIaNsbGIWQIdTj3n+fbc6F3Xi8QjWJKENYooSPPeR/CKd5Z sCJNhh/iLU7tE7uyXbg/sfQjse0Kv4vMOE3WYHmC7x7L5u/CcgK1aQIAmV37oyaLoVCR3nHiv dVZTKuhvELSXWOnJmrv3BSOroNAYdIRrBHyRmxGe8t1vrShOEQM/tRtcB6SjAhTXOFbkBCXHe uFzEAGEN6wzRPWRwcIZlHjIY1t22sCNSoYwdr0QXUpVxvPmNQkb8b6vvv09ONiLwsAk+Mgry6 aNTAyfY/nTXWFUrWUJ75jvmMW2+VQF13QmwKoxTBykz2EFaG25xNkesn49uItZh+EMcmknkpa BTE3TRRahWAh1h7dlzhDoRLGoxV6xFZRNnyMEbTAT347XU0+6UDRME7CGiXItnWNX6z7o7frC xXLgcfO5rxtIAeYXbsMeOXJ2MKBkPxRu9jjfMYbI/op2xa2Ajpn9em5Eyf0Bpi1pUyDYLS5h8 E3BGHa1waitnkROQmp7ZipsTC/90qpScKL64sBxg+PvvpO5QlycbxpJ3dmTO3sQ4omoaBnWeo Cq9BcTUYV5vcs7OEHZj+ePz7R65RE4GiWRDZN1cszit6qwJczYxfHtEn+JQJmS/UTXt7LtupV 3fkVaz1Hfyfn2YPpY0uGQu+HirlhAthro3Ekamc X-purgate-ID: tlsNG-ebf023/1779542923-41F7D3FF-3989A3A0/0/0 X-purgate-type: clean X-purgate-size: 1408 The 'g_physinfo' and 'ncpus' variables are initialized only during the init phase in the 'bind_virq_for_mce' function and never changed. So, mark them as __ro_after_init. The 'xen_mce_chrdev_device' variable is initialized only in the declaration and never changed. So, this variable could be 'const', but using the 'misc_register' and 'misc_deregister' functions discards the 'const' qualifier. Therefore, as an alternative, mark it as __ro_after_init. Signed-off-by: Len Bao =2D-- drivers/xen/mcelog.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/xen/mcelog.c b/drivers/xen/mcelog.c index 53a8720f5..32ab419bb 100644 =2D-- a/drivers/xen/mcelog.c +++ b/drivers/xen/mcelog.c @@ -54,8 +54,8 @@ #include =20 static struct mc_info g_mi; -static struct mcinfo_logical_cpu *g_physinfo; -static uint32_t ncpus; +static struct mcinfo_logical_cpu *g_physinfo __ro_after_init; +static uint32_t ncpus __ro_after_init; =20 static DEFINE_MUTEX(mcelog_lock); =20 @@ -182,7 +182,7 @@ static const struct file_operations xen_mce_chrdev_ops= =3D { .unlocked_ioctl =3D xen_mce_chrdev_ioctl, }; =20 -static struct miscdevice xen_mce_chrdev_device =3D { +static struct miscdevice xen_mce_chrdev_device __ro_after_init =3D { MISC_MCELOG_MINOR, "mcelog", &xen_mce_chrdev_ops, =2D-=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Sat May 23 15:26:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 23 May 2026 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So, constify it to reduce the attack surface. At the same time, use the preferred '__maybe_unused' form over the '__attribute__((unused))' form. Signed-off-by: Len Bao =2D-- include/xen/interface/io/xs_wire.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/xen/interface/io/xs_wire.h b/include/xen/interface/io= /xs_wire.h index b62365478..29d0394b8 100644 =2D-- a/include/xen/interface/io/xs_wire.h +++ b/include/xen/interface/io/xs_wire.h @@ -51,7 +51,7 @@ struct xsd_errors const char *errstring; }; #define XSD_ERROR(x) { x, #x } -static struct xsd_errors xsd_errors[] __attribute__((unused)) =3D { +static const struct xsd_errors xsd_errors[] __maybe_unused =3D { XSD_ERROR(EINVAL), XSD_ERROR(EACCES), XSD_ERROR(EEXIST), =2D-=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Sat May 23 15:32:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 23 May 2026 15:32:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1317886.1586504 (Exim 4.92) (envelope-from ) id 1wQoLD-0002PK-Fg; Sat, 23 May 2026 15:32:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1317886.1586504; Sat, 23 May 2026 15:32:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQoLD-0002PD-CR; Sat, 23 May 2026 15:32:43 +0000 Received: by outflank-mailman (input) for mailman id 1317886; Sat, 23 May 2026 15:32:41 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQoLB-0002P7-8p for xen-devel@lists.xenproject.org; Sat, 23 May 2026 15:32:41 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wQoLA-00AJhT-LV for xen-devel@lists.xenproject.org; Sat, 23 May 2026 17:32:40 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a11c88e-e002-0a2a0a5209dd-0a2a4507cc3c-2 for ; Sat, 23 May 2026 17:32:40 +0200 Received: from [209.85.208.41] (helo=mail-ed1-f41.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a11c898-229c-0a2a45070019-d155d029f0ec-3 for ; Sat, 23 May 2026 17:32:40 +0200 Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-6877c719cb0so5626209a12.2 for ; Sat, 23 May 2026 08:32:40 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Sat, 23 May 2026 08:32:39 -0700 (PDT) Message-ID: <12a89eb8-30d2-4c9e-be31-c1a7a5771c0c@suse.com> Date: Sat, 23 May 2026 17:32:39 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen: constify xsd_errors array To: Len Bao , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20260523140809.30915-1-len.bao@gmx.us> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260523140809.30915-1-len.bao@gmx.us> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------8VkVqRjBgdJguWEpF4SHnsFd" X-purgate-ID: tlsNG-ef75cf/1779550360-2156BC48-4BD91C96/0/0 X-purgate-type: clean X-purgate-size: 6337 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------8VkVqRjBgdJguWEpF4SHnsFd Content-Type: multipart/mixed; boundary="------------CkdFRziPMRoZouKk60dvzZub"; protected-headers="v1" From: Juergen Gross To: Len Bao , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Message-ID: <12a89eb8-30d2-4c9e-be31-c1a7a5771c0c@suse.com> Subject: Re: [PATCH] xen: constify xsd_errors array References: <20260523140809.30915-1-len.bao@gmx.us> In-Reply-To: <20260523140809.30915-1-len.bao@gmx.us> --------------CkdFRziPMRoZouKk60dvzZub Content-Type: multipart/mixed; boundary="------------kLrZE973h4CHzz50XUanWPMc" --------------kLrZE973h4CHzz50XUanWPMc Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMjMuMDUuMjYgMTY6MDgsIExlbiBCYW8gd3JvdGU6DQo+IFRoZSAneHNkX2Vycm9ycycg YXJyYXkgaXMgaW5pdGlhbGl6ZWQgaW4gdGhlIGRlY2xhcmF0aW9uIGFuZCBuZXZlcg0KPiBj aGFuZ2VkLiBTbywgY29uc3RpZnkgaXQgdG8gcmVkdWNlIHRoZSBhdHRhY2sgc3VyZmFjZS4N Cj4gDQo+IEF0IHRoZSBzYW1lIHRpbWUsIHVzZSB0aGUgcHJlZmVycmVkICdfX21heWJlX3Vu dXNlZCcgZm9ybSBvdmVyIHRoZQ0KPiAnX19hdHRyaWJ1dGVfXygodW51c2VkKSknIGZvcm0u DQo+IA0KPiBTaWduZWQtb2ZmLWJ5OiBMZW4gQmFvIDxsZW4uYmFvQGdteC51cz4NCg0KUmV2 aWV3ZWQtYnk6IEp1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT4NCg0KDQpKdWVyZ2Vu DQo= --------------kLrZE973h4CHzz50XUanWPMc Content-Type: application/pgp-keys; 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Sat, 23 May 2026 08:37:04 -0700 (PDT) Message-ID: Date: Sat, 23 May 2026 17:37:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/mcelog: mark g_physinfo, ncpus and xen_mce_chrdev_device as __ro_after_init To: Len Bao , Stefano Stabellini , Oleksandr Tyshchenko Cc: xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org References: <20260523132802.25391-1-len.bao@gmx.us> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260523132802.25391-1-len.bao@gmx.us> Content-Type: multipart/signed; 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Selecting CONFIG_DEVICE_TREE_NUMA automatically selects CONFIG_NUMA. While this option is currently restricted to the ARM architecture, it is designed to be selectable for RISC-V and PPC in the future. This patch also includes the necessary compilation fixes required when building with CONFIG_NUMA, and creates a single fake NUMA node to ensure Xen can boot successfully at this stage. --- xen/arch/arm/setup.c | 4 ++++ xen/arch/arm/smpboot.c | 2 ++ xen/common/Kconfig | 9 +++++++++ 3 files changed, 15 insertions(+) diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 6310a47d68..c0202d9ff6 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -351,6 +351,10 @@ void asmlinkage __init noreturn start_xen(unsigned long fdt_paddr) /* Parse the ACPI tables for possible boot-time configuration */ acpi_boot_table_init(); +#ifdef CONFIG_NUMA + numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); +#endif /* CONFIG_NUMA */ + end_boot_allocator(); /* diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 7f3cfa812e..d1651fe7dd 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -47,8 +47,10 @@ integer_param("maxcpus", max_cpus); /* CPU logical map: map xen cpuid to an MPIDR */ register_t __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; +#ifndef CONFIG_NUMA /* Fake one node for now. See also xen/numa.h */ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; +#endif /* CONFIG_NUMA */ /* Xen stack for bringing up the first CPU. */ static unsigned char __initdata cpu0_boot_stack[STACK_SIZE] diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480ee..2365b421bf 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -188,6 +188,15 @@ config VM_EVENT config NEEDS_LIBELF bool +config DEVICE_TREE_NUMA + bool "Device tree based NUMA support (UNSUPPORTED)" if UNSUPPORTED && ARM + depends on HAS_DEVICE_TREE_DISCOVERY + select NUMA + help + Device tree based NUMA support. The "numa-node-id" property in + the CPU and memory nodes of a Device Tree defines the NUMA node + to which they belong. + config NUMA bool -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318175.1586523 (Exim 4.92) (envelope-from ) id 1wQwIV-0001aG-Af; Sun, 24 May 2026 00:02:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318175.1586523; Sun, 24 May 2026 00:02:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIV-0001Zr-4S; Sun, 24 May 2026 00:02:27 +0000 Received: by outflank-mailman (input) for mailman id 1318175; Sun, 24 May 2026 00:02:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIS-0001Zl-8T for xen-devel@lists.xenproject.org; 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 00/21] Introduce Device Tree based NUMA support for ARM Xen Date: Sun, 24 May 2026 09:01:48 +0900 Message-ID: <20260524000209.292370-1-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCPR01CA0186.jpnprd01.prod.outlook.com (2603:1096:400:2b0::9) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: 0144aab5-663f-470b-c161-08deb927b74a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|18002099003|56012099003|6133799003; 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This patch series revives that work to get proper NUMA support up and running on ARM. Note that this series only covers Device Tree environments for now. ACPI support is skipped and left for the future. Also, I've put the NUMA DT helper functions into the common code, so that other DT-based architectures like RISC-V or PPC can easily reuse them later. The series is structured as follows: - Patches 01-09: Basic Device Tree parsing and NUMA initialization for ARM. - Patches 10-12: Toolstack enhancements to generate vNUMA device tree nodes for guests. - Patches 13-20: Dom0 memory and vCPU allocation adjustments based on node affinity. - Patch 21: Update documentation for the 'numa' and 'dom0_nodes' command-line options. Thanks, Hirokazu Takahashi Hirokazu Takahashi (21): xen/device-tree: Initial framework for Device Tree NUMA support xen/arm: NUMA helper functions via Device Tree helpers xen/arm: Introduce CONFIG_DEVICE_TREE_NUMA config option xen/arm: Configure NUMA affinity for populated memory banks xen/arm: Map populated CPUs to their respective NUMA nodes xen/device-tree: Read NUMA node distance from Device Tree 'distance-map' xen/device-tree: Parse 'cpu-map' node for CPU topology exploration xen/sched: Link CPU topology to scheduler and display via xl info xen/common: Allow building ARM32 Xen with CONFIG_NUMA tools/libxl: Add 'numa-node-id' property to DomU memory nodes tools/libxl: Add 'numa-node-id' property to DomU CPU nodes tools/libxl: Create 'distance-map' node in DomU Device Tree xen/arm: Introduce dom0_nodes boot command option xen/arm: Set Domain-0 node affinity from dom0_nodes option xen/arm: Reflect physical NUMA node IDs in Dom0 memory DT nodes xen/arm: Balance Dom0 vCPU assignment across NUMA nodes xen/arm: Export Dom0 vCPU-to-NUMA node mapping to Device Tree xen/arm: Generate distance-map node for Dom0 Device Tree xen/arm: Balance Dom0 memory allocation across allowed NUMA nodes xen/arm: Use dedicated function for Static SHM Device Tree creation xen/arm: Support numa and numa_nodes boot options docs/misc/xen-command-line.pandoc | 9 +- tools/libs/light/libxl_arm.c | 134 +++++++- xen/arch/arm/Makefile | 1 + xen/arch/arm/domain_build.c | 428 +++++++++++++++++++------- xen/arch/arm/include/asm/numa.h | 19 ++ xen/arch/arm/include/asm/processor.h | 6 +- xen/arch/arm/numa.c | 62 ++++ xen/arch/arm/setup.c | 4 + xen/arch/arm/smpboot.c | 35 ++- xen/common/Kconfig | 16 + xen/common/device-tree/Makefile | 2 + xen/common/device-tree/bootinfo-fdt.c | 8 + xen/common/device-tree/cpu_topology.c | 361 ++++++++++++++++++++++ xen/common/device-tree/domain-build.c | 99 +++--- xen/common/device-tree/numa.c | 142 +++++++++ xen/common/numa.c | 2 +- xen/common/sched/credit2.c | 3 + xen/common/sysctl.c | 1 + xen/include/xen/bootinfo.h | 37 +++ xen/include/xen/cpu_topology.h | 45 +++ xen/include/xen/dt-numa.h | 31 ++ xen/include/xen/fdt-domain-build.h | 2 + 22 files changed, 1274 insertions(+), 173 deletions(-) create mode 100644 xen/arch/arm/include/asm/numa.h create mode 100644 xen/arch/arm/numa.c create mode 100644 xen/common/device-tree/cpu_topology.c create mode 100644 xen/common/device-tree/numa.c create mode 100644 xen/include/xen/cpu_topology.h create mode 100644 xen/include/xen/dt-numa.h -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318181.1586567 (Exim 4.92) (envelope-from ) id 1wQwIi-0002lk-LC; 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The NUMA node ID for each CPU is retrieved from the Device Tree. --- xen/arch/arm/smpboot.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index d1651fe7dd..eafa195504 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -133,6 +133,9 @@ static void __init dt_smp_init_cpus(void) }; bool bootcpu_valid = false; int rc; +#ifdef CONFIG_DEVICE_TREE_NUMA + nodeid_t cpu_to_numa[NR_CPUS]; +#endif /* CONFIG_DEVICE_TREE_NUMA */ mpidr = system_cpuinfo.mpidr.bits & MPIDR_HWID_MASK; @@ -244,6 +247,16 @@ static void __init dt_smp_init_cpus(void) } else tmp_map[i] = hwid; + +#ifdef CONFIG_DEVICE_TREE_NUMA + if ( tmp_map[i] != MPIDR_INVALID ) + { + uint32_t nid; + if ( numa_disabled() || !dt_property_read_u32(cpu, "numa-node-id", &nid) ) + nid = 0U; /* default node */ + cpu_to_numa[i] = nid >= MAX_NUMNODES ? 0U : nid; + } +#endif /* CONFIG_DEVICE_TREE_NUMA */ } if ( !bootcpu_valid ) @@ -259,6 +272,10 @@ static void __init dt_smp_init_cpus(void) continue; cpumask_set_cpu(i, &cpu_possible_map); cpu_logical_map(i) = tmp_map[i]; +#ifdef CONFIG_DEVICE_TREE_NUMA + numa_set_node(i, cpu_to_numa[i]); + numa_add_cpu(i); +#endif /* CONFIG_DEVICE_TREE_NUMA */ } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318177.1586539 (Exim 4.92) (envelope-from ) id 1wQwIa-00020s-OG; Sun, 24 May 2026 00:02:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318177.1586539; Sun, 24 May 2026 00:02:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIa-00020j-LV; Sun, 24 May 2026 00:02:32 +0000 Received: by outflank-mailman (input) for mailman id 1318177; Sun, 24 May 2026 00:02:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIZ-0001n8-35 for xen-devel@lists.xenproject.org; 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 02/21] xen/arm: NUMA helper functions via Device Tree helpers Date: Sun, 24 May 2026 09:01:50 +0900 Message-ID: <20260524000209.292370-3-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0362.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:79::16) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: df9bbf5e-7fda-4f2b-7e7d-08deb927be96 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003|6133799003; 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+ +#define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) + +extern bool numa_disabled(void); +extern unsigned int numa_node_to_arch_nid(nodeid_t n); +extern u8 __node_distance(nodeid_t a, nodeid_t b); + +#define arch_want_default_dmazone() (num_online_nodes() > 1) + +#endif /* _ASM_ARM_NUMA_H */ diff --git a/xen/arch/arm/numa.c b/xen/arch/arm/numa.c new file mode 100644 index 0000000000..080d7892ae --- /dev/null +++ b/xen/arch/arm/numa.c @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Helper functions for ARM NUMA. + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ + +#include +#include +#include + +#if CONFIG_ACPI_NUMA +#error "ACPI NUMA isn't supported yet." +#endif /* CONFIG_ACPI_NUMA */ + + +bool arch_numa_disabled(void) +{ + return false; +} + +unsigned int numa_node_to_arch_nid(nodeid_t n) +{ + return numa_node_to_dt_nid(n); +} + +u8 __node_distance(nodeid_t a, nodeid_t b) +{ + return dt_node_distance(a, b); +} + +int __init arch_numa_setup(const char *opt) +{ + /* parse "numa=" option */ + return 0; +} + +int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) +{ + return bootinfo_get_ram_range(idx, start, end); +} + +bool __init arch_numa_unavailable(void) +{ + return false; +} + +void __init numa_fw_bad(void) +{ + printk(KERN_ERR "%s NUMA info is broken.\n", numa_fw_nid_name); +} + -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318180.1586558 (Exim 4.92) (envelope-from ) id 1wQwIh-0002WP-8M; Sun, 24 May 2026 00:02:39 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318180.1586558; Sun, 24 May 2026 00:02:39 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIh-0002W8-34; Sun, 24 May 2026 00:02:39 +0000 Received: by outflank-mailman (input) for mailman id 1318180; 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The NUMA node ID for each memory bank is retrieved from the Device Tree. --- xen/arch/arm/include/asm/numa.h | 1 + xen/arch/arm/numa.c | 7 +++++++ xen/arch/arm/setup.c | 2 +- xen/common/device-tree/bootinfo-fdt.c | 8 ++++++++ xen/common/device-tree/numa.c | 29 +++++++++++++++++++++++++++ xen/include/xen/bootinfo.h | 23 +++++++++++++++++++++ xen/include/xen/dt-numa.h | 1 + 7 files changed, 70 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h index a1fa54f2e7..6f1ccb4eb3 100644 --- a/xen/arch/arm/include/asm/numa.h +++ b/xen/arch/arm/include/asm/numa.h @@ -12,6 +12,7 @@ typedef u8 nodeid_t; extern bool numa_disabled(void); extern unsigned int numa_node_to_arch_nid(nodeid_t n); extern u8 __node_distance(nodeid_t a, nodeid_t b); +extern void numa_memory_affinity_init(void); #define arch_want_default_dmazone() (num_online_nodes() > 1) diff --git a/xen/arch/arm/numa.c b/xen/arch/arm/numa.c index 080d7892ae..15cad3d267 100644 --- a/xen/arch/arm/numa.c +++ b/xen/arch/arm/numa.c @@ -36,6 +36,13 @@ int __init arch_numa_setup(const char *opt) return 0; } +void __init numa_memory_affinity_init(void) +{ + dt_numa_memory_affinity_init(); + + numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); +} + int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) { return bootinfo_get_ram_range(idx, start, end); diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index c0202d9ff6..cdabf536b0 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -352,7 +352,7 @@ void asmlinkage __init noreturn start_xen(unsigned long fdt_paddr) acpi_boot_table_init(); #ifdef CONFIG_NUMA - numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); + numa_memory_affinity_init(); #endif /* CONFIG_NUMA */ end_boot_allocator(); diff --git a/xen/common/device-tree/bootinfo-fdt.c b/xen/common/device-tree/bootinfo-fdt.c index 272b5a6c0a..2d0e809231 100644 --- a/xen/common/device-tree/bootinfo-fdt.c +++ b/xen/common/device-tree/bootinfo-fdt.c @@ -121,6 +121,9 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, const __be32 *cell; u32 reg_cells = address_cells + size_cells; paddr_t start, size; +#ifdef CONFIG_DEVICE_TREE_NUMA + uint32_t nid; +#endif /* CONFIG_DEVICE_TREE_NUMA */ if ( !device_tree_node_is_available(fdt, node) ) return 0; @@ -136,6 +139,10 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, if ( !prop ) return -ENOENT; +#ifdef CONFIG_DEVICE_TREE_NUMA + nid = device_tree_get_u32(fdt, node, "numa-node-id", 0U); +#endif /* CONFIG_DEVICE_TREE_NUMA */ + cell = (const __be32 *)prop->data; banks = fdt32_to_cpu(prop->len) / (reg_cells * sizeof (u32)); @@ -158,6 +165,7 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, mem->bank[mem->nr_banks].start = start; mem->bank[mem->nr_banks].size = size; mem->bank[mem->nr_banks].type = type; + set_numa_nodeid(&mem->bank[mem->nr_banks], nid); mem->nr_banks++; } diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c index 06f2c8b102..539ddfccc5 100644 --- a/xen/common/device-tree/numa.c +++ b/xen/common/device-tree/numa.c @@ -22,3 +22,32 @@ u8 dt_node_distance(u8 a, u8 b) return LOCAL_DISTANCE; } +/* + * Initialize memory affinity by registering bootinfo memory banks into Xen's + * NUMA subsystem. + */ +void __init dt_numa_memory_affinity_init(void) +{ + const struct membanks *mem = bootinfo_get_mem(); + unsigned int bank; + nodeid_t nid; + + numa_fw_nid_name = "DT"; + + for ( bank = 0 ; bank < mem->nr_banks; bank++ ) + { + nid = get_numa_nodeid(&mem->bank[bank]); + + if (numa_memblks_available()) + { + numa_update_node_memblks(nid, nid, mem->bank[bank].start, mem->bank[bank].size, false); + } + else + { + dprintk(XENLOG_WARNING, + "Too many numa entries, try bigger NR_NODE_MEMBLKS!\n"); + numa_fw_bad(); + break; + } + } +} diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index 7923be2b38..d01a28b359 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -7,6 +7,7 @@ #include #include #include +#include #define NR_MEM_BANKS 256 #define NR_SHMEM_BANKS 32 @@ -56,6 +57,9 @@ struct shmem_membank_extra { struct membank { paddr_t start; paddr_t size; +#ifdef CONFIG_DEVICE_TREE_NUMA + uint32_t numa_id; +#endif /* CONFIG_DEVICE_TREE_NUMA */ union { enum membank_type type; #ifdef CONFIG_STATIC_SHM @@ -228,4 +232,23 @@ static inline int bootinfo_get_ram_range(unsigned int idx, paddr_t *start, paddr return 0; } +#ifdef CONFIG_DEVICE_TREE_NUMA +static inline uint32_t get_numa_nodeid(const struct membank *bank) +{ + if ( numa_disabled() ) return 0U; + + return bank->numa_id; +} + +static inline void set_numa_nodeid(struct membank *bank, uint32_t nid) +{ + if ( numa_disabled() ) nid = 0U; + + bank->numa_id = nid; +} +#else /* CONFIG_DEVICE_TREE_NUMA */ +#define get_numa_nodeid(bank) (0) +#define set_numa_nodeid(bank, nid) {} +#endif /* CONFIG_DEVICE_TREE_NUMA */ + #endif /* XEN_BOOTINFO_H */ diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h index 721e8955fa..c6939d0928 100644 --- a/xen/include/xen/dt-numa.h +++ b/xen/include/xen/dt-numa.h @@ -14,6 +14,7 @@ static inline unsigned int numa_node_to_dt_nid(u32 n) #ifdef CONFIG_DEVICE_TREE_NUMA u8 dt_node_distance(u8 a, u8 b); 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 01/21] xen/device-tree: Initial framework for Device Tree NUMA support Date: Sun, 24 May 2026 09:01:49 +0900 Message-ID: <20260524000209.292370-2-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0364.JPNP286.PROD.OUTLOOK.COM (2603:1096:405:79::8) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: 78fb19ea-ed55-4dbc-a178-08deb927bce4 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003|6133799003; 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This patch adds the required Device Tree-dependent helper functions needed for NUMA configuration. Note that some functions currently contain stub implementations. --- xen/common/device-tree/Makefile | 1 + xen/common/device-tree/numa.c | 24 ++++++++++++++++++++++++ xen/include/xen/bootinfo.h | 14 ++++++++++++++ xen/include/xen/dt-numa.h | 29 +++++++++++++++++++++++++++++ 4 files changed, 68 insertions(+) create mode 100644 xen/common/device-tree/numa.c create mode 100644 xen/include/xen/dt-numa.h diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile index 9036e455d6..fab038d357 100644 --- a/xen/common/device-tree/Makefile +++ b/xen/common/device-tree/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += kernel.o obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o +obj-$(CONFIG_DEVICE_TREE_NUMA) += numa.o diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c new file mode 100644 index 0000000000..06f2c8b102 --- /dev/null +++ b/xen/common/device-tree/numa.c @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define LOCAL_DISTANCE 10 +#define REMOTE_DISTANCE 20 + +/* + * Get the distance between node 'a' and node 'b'. + */ +u8 dt_node_distance(u8 a, u8 b) +{ + if ( a != b ) + return REMOTE_DISTANCE; + return LOCAL_DISTANCE; +} + diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index dbf492c2e3..7923be2b38 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -6,6 +6,7 @@ #include #include #include +#include #define NR_MEM_BANKS 256 #define NR_SHMEM_BANKS 32 @@ -214,4 +215,17 @@ void fw_unreserved_regions(paddr_t s, paddr_t e, void (*cb)(paddr_t ps, paddr_t pe), unsigned int first); +static inline int bootinfo_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) +{ + struct membanks *mem = bootinfo_get_mem(); + + if ( idx >= mem->nr_banks) + return -ENOENT; + + *start = mem->bank[idx].start; + *end = *start + mem->bank[idx].size; + + return 0; +} + #endif /* XEN_BOOTINFO_H */ diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h new file mode 100644 index 0000000000..721e8955fa --- /dev/null +++ b/xen/include/xen/dt-numa.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_DT_NUMA_H +#define XEN_DT_NUMA_H + +#include +#include + +static inline unsigned int numa_node_to_dt_nid(u32 n) +{ + return n; +} + +#ifdef CONFIG_DEVICE_TREE_NUMA + +u8 dt_node_distance(u8 a, u8 b); + +#endif /* CONFIG_DEVICE_TREE_NUMA */ + +#endif /* XEN_DT_NUMA_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318183.1586576 (Exim 4.92) (envelope-from ) id 1wQwIm-000381-W5; Sun, 24 May 2026 00:02:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318183.1586576; Sun, 24 May 2026 00:02:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIm-00037s-R5; Sun, 24 May 2026 00:02:44 +0000 Received: by outflank-mailman (input) for mailman id 1318183; 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b=LRBdpmE4u/ReYoT8a9+I4bHSywMYP5Coa8RLK5AmI56USBpIrym9B0MbRXKmyxUH+vqQ9aa16HiKHa3rcKJvrKQ7R/xMJeJR+SOgxlkxRodL33PJCeogBP5mSKCErIUs6+d6rZfxuuwgs3OLVg8adXOd9KbJQd4VBdSdGnvhbFk= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=valinux.co.jp; From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 06/21] xen/device-tree: Read NUMA node distance from Device Tree 'distance-map' Date: Sun, 24 May 2026 09:01:54 +0900 Message-ID: <20260524000209.292370-7-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCPR01CA0053.jpnprd01.prod.outlook.com (2603:1096:405:2::17) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: a77c7827-6054-432b-ba32-08deb927c4b3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003; 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numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); + + dt_numa_distance_table_init(); } int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c index 539ddfccc5..6414806937 100644 --- a/xen/common/device-tree/numa.c +++ b/xen/common/device-tree/numa.c @@ -1,4 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Derived from Linux kernel 7.0's $drivers/of/of_numa.c + * Parse 'distance-map' + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ #include #include @@ -12,14 +19,96 @@ #define LOCAL_DISTANCE 10 #define REMOTE_DISTANCE 20 +static u8 __ro_after_init numa_distance[MAX_NUMNODES][MAX_NUMNODES] = { + [0 ... MAX_NUMNODES-1][0 ... MAX_NUMNODES-1] = NUMA_NO_DISTANCE +}; + /* * Get the distance between node 'a' and node 'b'. */ u8 dt_node_distance(u8 a, u8 b) { - if ( a != b ) + nodeid_t lastnode = last_node(node_online_map); + + if (a > lastnode || b > lastnode) return REMOTE_DISTANCE; - return LOCAL_DISTANCE; + + return numa_distance[a][b]; +} + +static void __init numa_set_distance(u8 from, u8 to, u8 distance) +{ + nodeid_t lastnode = last_node(node_online_map); + + if (from <= lastnode && to <= lastnode) + numa_distance[from][to] = distance; +} + +/* + * Parse the '/distance-map' node from the flattened device tree + * and extract the 3-tuple triplets . + */ +static void __init dt_numa_parse_distance_map(void) +{ + const void *fdt = device_tree_flattened; + const struct fdt_property *prop; + const __be32 *matrix; + int entry_count; + int node; + int len; + int i; + + node = fdt_path_offset(fdt, "/distance-map"); + if ( node < 0 ) + return; + + if (fdt_node_check_compatible(fdt, node, "numa-distance-map-v1")) + return; + + prop = fdt_get_property(fdt, node, "distance-matrix", &len); + if (!prop) + return; + + matrix = (const __be32*)prop->data; + entry_count = len / sizeof(__be32); + + if ( (entry_count <= 0) || (entry_count % 3) ) + return; + + for (i = 0; i + 2 < entry_count; i += 3) + { + u32 nodea, nodeb, distance; + nodea = dt_next_cell(1, &matrix); + nodeb = dt_next_cell(1, &matrix); + distance = dt_next_cell(1, &matrix); + + if ((nodea == nodeb && distance != LOCAL_DISTANCE) || + (nodea != nodeb && distance <= LOCAL_DISTANCE)) + { + printk(XENLOG_WARNING "Invalid distance[node%d -> node%d] = %d\n", + nodea, nodeb, distance); + continue; + } + + numa_set_distance(nodea, nodeb, distance); + + /* Set default distance of node B->A same as A->B */ + if (nodeb > nodea) + numa_set_distance(nodeb, nodea, distance); + } +} + +void __init dt_numa_distance_table_init(void) +{ + u32 lastnode = last_node(node_online_map); + u32 i, j; + + /* fill with the default distances */ + for (i = 0U; i <= lastnode; i++) + for (j = 0U; j <= lastnode; j++) + numa_distance[i][j] = i == j ? LOCAL_DISTANCE : REMOTE_DISTANCE; + + dt_numa_parse_distance_map(); } /* diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h index c6939d0928..075d31cb89 100644 --- a/xen/include/xen/dt-numa.h +++ b/xen/include/xen/dt-numa.h @@ -15,6 +15,7 @@ static inline unsigned int numa_node_to_dt_nid(u32 n) u8 dt_node_distance(u8 a, u8 b); void dt_numa_memory_affinity_init(void); +void dt_numa_distance_table_init(void); #endif /* CONFIG_DEVICE_TREE_NUMA */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318185.1586585 (Exim 4.92) (envelope-from ) id 1wQwIo-0003N4-9r; Sun, 24 May 2026 00:02:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318185.1586585; Sun, 24 May 2026 00:02:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIo-0003M8-51; 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b=L4uR4YZLcx3QU99GSq/y3fpfW7DNrZqD2wzC1cFkHO3jYV+6Jok9aP7tDm86n3eTX3L1Y6llnaVKjz0wG7BMrvwhYpodvJuhxuPE4+G4kpQj0pZyuvNKq+pQQdWBpkGcv+VsAqyVwcXp0pzj2XcGsI/K6zFpPV3buAyn5tQJq0M= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=valinux.co.jp; From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 07/21] xen/device-tree: Parse 'cpu-map' node for CPU topology exploration Date: Sun, 24 May 2026 09:01:55 +0900 Message-ID: <20260524000209.292370-8-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCPR01CA0058.jpnprd01.prod.outlook.com (2603:1096:405:2::22) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: 4f6e3ec9-e9d5-43c7-9c5c-08deb927c62b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003; 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If the 'cpu-map' node is absent, fall back to generating the topology data from the NUMA information. This generation assumes exactly one socket per NUMA node and that SMT is unsupported. --- xen/arch/arm/smpboot.c | 6 + xen/common/Kconfig | 7 + xen/common/device-tree/Makefile | 1 + xen/common/device-tree/cpu_topology.c | 307 ++++++++++++++++++++++++++ xen/include/xen/cpu_topology.h | 42 ++++ 5 files changed, 363 insertions(+) create mode 100644 xen/common/device-tree/cpu_topology.c create mode 100644 xen/include/xen/cpu_topology.h diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index eafa195504..ff8b0d07e9 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -248,6 +249,8 @@ static void __init dt_smp_init_cpus(void) else tmp_map[i] = hwid; + map_cpuid_to_node(i, cpu); /* pass the info to dt_init_cpu_topology() */ + #ifdef CONFIG_DEVICE_TREE_NUMA if ( tmp_map[i] != MPIDR_INVALID ) { @@ -294,7 +297,10 @@ void __init smp_init_cpus(void) } if ( acpi_disabled ) + { dt_smp_init_cpus(); + dt_init_cpu_topology(); + } else acpi_smp_init_cpus(); diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 2365b421bf..014192b2cd 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -188,6 +188,13 @@ config VM_EVENT config NEEDS_LIBELF bool +config DT_CPU_TOPOLOGY + bool "Device tree based CPU topology support (UNSUPPORTED)" if UNSUPPORTED && ARM + depends on HAS_DEVICE_TREE_DISCOVERY + help + Retrieve CPU topology information from the device tree to optimize + virtual CPU scheduling. + config DEVICE_TREE_NUMA bool "Device tree based NUMA support (UNSUPPORTED)" if UNSUPPORTED && ARM depends on HAS_DEVICE_TREE_DISCOVERY diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile index fab038d357..dbfce294fb 100644 --- a/xen/common/device-tree/Makefile +++ b/xen/common/device-tree/Makefile @@ -11,4 +11,5 @@ obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += kernel.o obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o +obj-$(CONFIG_DT_CPU_TOPOLOGY) += cpu_topology.o obj-$(CONFIG_DEVICE_TREE_NUMA) += numa.o diff --git a/xen/common/device-tree/cpu_topology.c b/xen/common/device-tree/cpu_topology.c new file mode 100644 index 0000000000..6c78a74778 --- /dev/null +++ b/xen/common/device-tree/cpu_topology.c @@ -0,0 +1,307 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Derived from Linux kernel 7.0's $drivers/base/arch_topology.c + * Parse cpu topology information. + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct dt_device_node * __initdata dt_cpu_table[NR_CPUS]; + +struct cpu_topology __ro_after_init cpu_topology[NR_CPUS] = { + [0 ... NR_CPUS-1] = {-1, -1, -1, 0} +}; + +static void __init setup_siblings_masks(unsigned int cpuid) +{ + struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; + int cpu; + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->package_id != cpu_topo->package_id) + continue; + + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); + + if (cpuid_topo->cluster_id != cpu_topo->cluster_id) + continue; + + if (cpuid_topo->cluster_id >= 0) { + cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling); + cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling); + } + + if (cpuid_topo->core_id != cpu_topo->core_id) + continue; + + cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling); + cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); + } +} + +static struct dt_device_node * __init dt_find_child_node_by_name(struct dt_device_node *from, const char *name) +{ + struct dt_device_node *np; + struct dt_device_node *dt = from; + + dt_for_each_child_node(dt, np) + if ( np->name && (dt_node_cmp(np->name, name) == 0) ) + break; + + return np; +} + +void __init map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node) +{ + dt_cpu_table[cpuid] = cpu_node; +} + +static int __init cpu_node_to_id(struct dt_device_node *cpu_node) +{ + int cpu; + bool found = false; + + for_each_possible_cpu(cpu) { + found = (cpu_node == dt_cpu_table[cpu]); + if (found) + return cpu; + } + + return -ENODEV; +} + +/* + * This function returns the logic cpu number of the node. + */ +static int __init get_cpu_for_node(struct dt_device_node *node) +{ + struct dt_device_node *cpu_node = dt_parse_phandle(node, "cpu", 0); + + if (!cpu_node) + return -ENOENT; + + return cpu_node_to_id(cpu_node); +} + +static int __init parse_core(struct dt_device_node *core, int package_id, + int cluster_id, int core_id) +{ + char name[20]; + bool leaf = true; + int i = 0; + int cpu; + + do { + struct dt_device_node *t; + + snprintf(name, sizeof(name), "thread%d", i); + t = dt_find_child_node_by_name(core, name); + + if (!t) + break; + + leaf = false; + cpu = get_cpu_for_node(t); + if (cpu >= 0) { + cpu_topology[cpu].package_id = package_id; + cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].core_id = core_id; + cpu_topology[cpu].thread_id = i; + } else if (cpu != -ENODEV) { + printk(XENLOG_ERR "ERROR: %pOF: Can't get CPU for thread\n", t); + return -EINVAL; + } + i++; + } while (1); + + cpu = get_cpu_for_node(core); + if (cpu >= 0) { + if (!leaf) { + printk(XENLOG_ERR "ERROR: %pOF: Core has both threads and CPU\n", + core); + return -EINVAL; + } + + cpu_topology[cpu].package_id = package_id; + cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].core_id = core_id; + } else if (leaf && cpu != -ENODEV) { + printk(XENLOG_ERR "ERROR: %pOF: Can't get CPU for leaf core\n", core); + return -EINVAL; + } + + return 0; +} + +static int __init parse_cluster(struct dt_device_node *cluster, int package_id, + int cluster_id, int depth) +{ + char name[20]; + bool leaf = true; + bool has_cores = false; + int core_id = 0; + int i, ret; + + /* + * First check for child clusters; we currently ignore any + * information about the nesting of clusters and present the + * scheduler with a flat list of them. + */ + i = 0; + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "cluster%d", i); + c = dt_find_child_node_by_name(cluster, name); + + if (!c) + break; + + leaf = false; + ret = parse_cluster(c, package_id, i, depth + 1); + if (depth > 0) + printk(XENLOG_WARNING "WARNING: Topology for clusters of clusters not yet supported\n"); + if (ret != 0) + return ret; + i++; + } while (1); + + /* Now check for cores */ + i = 0; + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "core%d", i); + c = dt_find_child_node_by_name(cluster, name); + + if (!c) + break; + + has_cores = true; + + if (depth == 0) { + printk(XENLOG_ERR "ERROR: %pOF: cpu-map children should be clusters\n", c); + return -EINVAL; + } + + if (leaf) { + ret = parse_core(c, package_id, cluster_id, core_id++); + if (ret != 0) + return ret; + } else { + printk(XENLOG_ERR "ERROR: %pOF: Non-leaf cluster with core %s\n", + cluster, name); + return -EINVAL; + } + + i++; + } while (1); + + if (leaf && !has_cores) + printk(XENLOG_WARNING "WARNING: %pOF: empty cluster\n", cluster); + + return 0; +} + +static int __init parse_socket(struct dt_device_node *socket) +{ + char name[20]; + bool has_socket = false; + int package_id = 0, ret; + + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "socket%d", package_id); + c = dt_find_child_node_by_name(socket, name); + + if (!c) + break; + + has_socket = true; + ret = parse_cluster(c, package_id, -1, 0); + if (ret != 0) + return ret; + + package_id++; + } while (1); + + if (!has_socket) + ret = parse_cluster(socket, 0, -1, 0); + + return ret; +} + +/* + * Generate cpu topology information when cpu-map node doesn't exist. + * It assumes that the cpu doesn't have SMT and all CPUs on a NUMA + * node belong to the same socket. + */ +static void __init fixup_topology(void) +{ + int cpu; + int clid = 0; + int pkgid = 0; + + for_each_possible_cpu(cpu) + { + struct cpu_topology *cpu_topo = &cpu_topology[cpu]; + + cpu_topo->package_id = cpu_to_node(cpu); + if (cpu_topo->package_id != pkgid) + { + pkgid = cpu_topo->package_id; + clid = 0; + } + cpu_topo->cluster_id = clid++; + cpu_topo->core_id = 0; + cpu_topo->thread_id = 0; + } +} + + +int __init parse_dt_topology(void) +{ + struct dt_device_node *cpus; + struct dt_device_node *map; + + cpus = dt_find_node_by_path("/cpus"); + + if ( !cpus ) + { + printk(XENLOG_ERR "ERROR: No CPU information found in DT\n"); + return -EINVAL; + } + + map = dt_find_child_node_by_name(cpus, "cpu-map"); + if ( !map ) + return -ENOENT; + + return parse_socket(map); +} + +void __init dt_init_cpu_topology(void) +{ + int cpu; + + if (parse_dt_topology()) + fixup_topology(); + + for_each_possible_cpu(cpu) + setup_siblings_masks(cpu); +} diff --git a/xen/include/xen/cpu_topology.h b/xen/include/xen/cpu_topology.h new file mode 100644 index 0000000000..0cdceb9bd0 --- /dev/null +++ b/xen/include/xen/cpu_topology.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_CPU_TOPOLOGY_H +#define XEN_CPU_TOPOLOGY_H + +#include +#include + +struct cpu_topology { + int thread_id; + int core_id; + int cluster_id; + int package_id; + cpumask_t thread_sibling; + cpumask_t core_sibling; + cpumask_t cluster_sibling; +}; + + +#ifdef CONFIG_DT_CPU_TOPOLOGY +extern struct cpu_topology cpu_topology[NR_CPUS]; + +void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node); +void dt_init_cpu_topology(void); + +#else /* CONFIG_DT_CPU_TOPOLOGY */ + +static inline void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node) {} +static inline void dt_init_cpu_topology(void) {} + +#endif /* CONFIG_DT_CPU_TOPOLOGY */ + +#endif /* XEN_CPU_TOPOLOGY_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318190.1586594 (Exim 4.92) (envelope-from ) id 1wQwIr-0003pQ-Ng; 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Additionally, ensure that this topology information is displayed when executing the 'xl info -n' command. --- xen/arch/arm/include/asm/processor.h | 6 ++- xen/arch/arm/smpboot.c | 10 +++-- xen/common/device-tree/cpu_topology.c | 54 +++++++++++++++++++++++++++ xen/common/sched/credit2.c | 3 ++ xen/common/sysctl.c | 1 + xen/include/xen/cpu_topology.h | 3 ++ 6 files changed, 73 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 895d7cd502..066966b375 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -591,9 +591,13 @@ void show_stack(const struct cpu_user_regs *regs); #define cpu_relax() barrier() /* Could yield? */ -/* All a bit UP for the moment */ +#ifdef CONFIG_DT_CPU_TOPOLOGY +#define cpu_to_core(_cpu) (cpu_topology[_cpu].to_core) +#define cpu_to_socket(_cpu) (cpu_topology[_cpu].to_socket) +#else /* CONFIG_DT_CPU_TOPOLOGY */ #define cpu_to_core(_cpu) (0) #define cpu_to_socket(_cpu) (0) +#endif /* CONFIG_DT_CPU_TOPOLOGY */ struct vcpu; void vcpu_regs_hyp_to_user(const struct vcpu *vcpu, diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index ff8b0d07e9..726f3720ce 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -93,13 +93,17 @@ static int setup_cpu_sibling_map(int cpu) !zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) ) return -ENOMEM; +#ifdef CONFIG_DT_CPU_TOPOLOGY + cpumask_copy(per_cpu(cpu_sibling_mask, cpu), &cpu_topology[cpu].thread_sibling); + cpumask_copy(per_cpu(cpu_core_mask, cpu), &cpu_topology[cpu].core_sibling); +#else /* CONFIG_DT_CPU_TOPOLOGY */ /* - * Currently we assume there is no multithread and NUMA, so - * a CPU is a sibling with itself, and the all possible CPUs - * are supposed to belong to the same socket (NUMA node). + * If CONFIG_DT_CPU_TOPOLOGY is disabled, it is assumed that + * all CPUs reside in the same socket and that SMT is not used. */ cpumask_set_cpu(cpu, per_cpu(cpu_sibling_mask, cpu)); cpumask_copy(per_cpu(cpu_core_mask, cpu), &cpu_possible_map); +#endif /* CONFIG_DT_CPU_TOPOLOGY */ return 0; } diff --git a/xen/common/device-tree/cpu_topology.c b/xen/common/device-tree/cpu_topology.c index 6c78a74778..f5d2a59e2c 100644 --- a/xen/common/device-tree/cpu_topology.c +++ b/xen/common/device-tree/cpu_topology.c @@ -275,6 +275,58 @@ static void __init fixup_topology(void) } +static void __init setup_topology_for_sched(void) +{ + int prev_socketid = 0; + int prev_clusterid = 0; + int prev_coreid = 0; + int prev_threadid = 0; + int coreid = 0; + int socketid = 0; + int clusterid = 0; + int threadid = 0; + int cpu; + + for_each_possible_cpu(cpu) + { + struct cpu_topology *cpu_topo = &cpu_topology[cpu]; + + if (cpu_topo->package_id != prev_socketid) + { + prev_socketid = cpu_topo->package_id; + prev_clusterid = cpu_topo->cluster_id; + prev_coreid = cpu_topo->core_id; + socketid++; + clusterid++; + coreid++; + threadid++; + } + else if (cpu_topo->cluster_id != prev_clusterid) + { + prev_clusterid = cpu_topo->cluster_id; + prev_coreid = cpu_topo->core_id; + clusterid++; + coreid++; + threadid++; + } + else if (cpu_topo->core_id != prev_coreid) + { + prev_coreid = cpu_topo->core_id; + coreid++; + threadid++; + } + else if (cpu_topo->thread_id != prev_threadid) + { + threadid++; + } + + cpu_topo->to_socket = socketid; + cpu_topo->to_core = coreid; + cpu_topo->num_siblings = cpumask_weight(&cpu_topo->thread_sibling); + } + +} + int __init parse_dt_topology(void) { struct dt_device_node *cpus; @@ -304,4 +356,6 @@ void __init dt_init_cpu_topology(void) for_each_possible_cpu(cpu) setup_siblings_masks(cpu); + + setup_topology_for_sched(); } diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index 75316d42b7..34876b99c0 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -38,6 +39,8 @@ static unsigned int cpu_nr_siblings(unsigned int cpu) { #ifdef CONFIG_X86 return cpu_data[cpu].x86_num_siblings; +#elif CONFIG_DT_CPU_TOPOLOGY + return cpu_topology[cpu].num_siblings; #else return 1; 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Retry with numa=off"); size <<= PAGE_SHIFT; - printk(KERN_DEBUG "NUMA: Allocated memnodemap from %lx - %lx\n", + printk(KERN_DEBUG "NUMA: Allocated memnodemap from %"PRIpaddr" - %"PRIpaddr"\n", mfn_to_maddr(mfn), mfn_to_maddr(mfn) + size); memnodemapsize = size / sizeof(*memnodemap); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318196.1586611 (Exim 4.92) (envelope-from ) id 1wQwIw-0004ZC-CG; Sun, 24 May 2026 00:02:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318196.1586611; Sun, 24 May 2026 00:02:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwIw-0004Yu-8S; Sun, 24 May 2026 00:02:54 +0000 Received: by outflank-mailman (input) for mailman id 1318196; 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b=A49ZXWZK0+IOAd2U45C2KuE3P6kr004eIhifvAOmfO8ytXDX82yMcMW4FetmBj+tTAp04ax70I74cwHmggXV4uzg/Fg3anR5Uc9bPRdUcqWTK+mL1i4W31s/QUFSUeInTTbl54mp6d47bvbRV2m3YSErL0W+0C8j8U7CxcDBVBA= Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=valinux.co.jp; From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 10/21] tools/libxl: Add 'numa-node-id' property to DomU memory nodes Date: Sun, 24 May 2026 09:01:58 +0900 Message-ID: <20260524000209.292370-11-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TY4P301CA0062.JPNP301.PROD.OUTLOOK.COM (2603:1096:405:36a::13) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: 9e87ca95-2a92-41f8-6846-08deb927ca53 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003|6133799003; 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The NUMA node to which each memory node belongs is determined based on the virtual NUMA configuration specified in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 81 ++++++++++++++++++++++++++++++++---- 1 file changed, 72 insertions(+), 9 deletions(-) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 7e9f8a1bc3..58a357858d 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -670,25 +670,84 @@ static int make_optee_node(libxl__gc *gc, void *fdt) } static int make_memory_nodes(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info, const struct xc_dom_image *dom) { int res, i; const char *name; const uint64_t bankbase[] = GUEST_RAM_BANK_BASES; + const uint64_t banksize[] = GUEST_RAM_BANK_SIZES; + + int cur_bank = 0; + uint64_t cur_addr = bankbase[cur_bank]; + uint64_t bank_remaining = banksize[cur_bank]; + + if (b_info->num_vnuma_nodes == 0) { + for (i = 0; i < GUEST_RAM_BANKS; i++) { + name = GCSPRINTF("memory@%"PRIx64, bankbase[i]); + + LOG(DEBUG, "Creating placeholder node /%s", name); + + res = fdt_begin_node(fdt, name); + if (res) return res; + + res = fdt_property_string(fdt, "device_type", "memory"); + if (res) return res; + + res = fdt_property_regs(gc, fdt, GUEST_ROOT_ADDRESS_CELLS, GUEST_ROOT_SIZE_CELLS, + 1, 0, 0); + if (res) return res; + + res = fdt_end_node(fdt); + if (res) return res; + } + + return 0; + } - for (i = 0; i < GUEST_RAM_BANKS; i++) { - name = GCSPRINTF("memory@%"PRIx64, bankbase[i]); + for (i = 0; i < b_info->num_vnuma_nodes; i++) { + uint64_t vnode_rem = (uint64_t)b_info->vnuma_nodes[i].memkb << 10; + uint64_t regs[GUEST_RAM_BANKS * 2]; + int reg_count = 0; + uint64_t vnode_start_addr = ~0ULL; + uint64_t chunk; + + while (vnode_rem > 0) { + if (bank_remaining == 0) { + if (cur_bank < GUEST_RAM_BANKS - 1) { + cur_bank++; + cur_addr = bankbase[cur_bank]; + bank_remaining = banksize[cur_bank]; + } else { + LOG(ERROR, "Virtual node %d: Not enough RAM banks", i); + return ERROR_INVAL; + } + } + + if (vnode_start_addr == ~0ULL) vnode_start_addr = cur_addr; - LOG(DEBUG, "Creating placeholder node /%s", name); + chunk = (vnode_rem < bank_remaining) ? vnode_rem : bank_remaining; + + regs[reg_count * 2] = cpu_to_fdt64(cur_addr); + regs[reg_count * 2 + 1] = cpu_to_fdt64(chunk); + reg_count++; + + vnode_rem -= chunk; + cur_addr += chunk; + bank_remaining -= chunk; + } + name = GCSPRINTF("memory@%"PRIx64, vnode_start_addr); res = fdt_begin_node(fdt, name); if (res) return res; res = fdt_property_string(fdt, "device_type", "memory"); if (res) return res; - res = fdt_property_regs(gc, fdt, GUEST_ROOT_ADDRESS_CELLS, GUEST_ROOT_SIZE_CELLS, - 1, 0, 0); + res = fdt_property(fdt, "reg", regs, sizeof(uint64_t) * 2 * reg_count); + if (res) return res; + + res = fdt_property_u32(fdt, "numa-node-id", i); if (res) return res; res = fdt_end_node(fdt); @@ -1365,7 +1424,7 @@ next_resize: FDT( make_cpus_node(gc, fdt, info->max_vcpus, ainfo) ); FDT( make_psci_node(gc, fdt) ); - FDT( make_memory_nodes(gc, fdt, dom) ); + FDT( make_memory_nodes(gc, fdt, info, dom) ); switch (info->arch_arm.gic_version) { case LIBXL_GIC_VERSION_V2: @@ -1716,10 +1775,14 @@ int libxl__arch_domain_finalise_hw_description(libxl__gc *gc, if (res) return res; - for (i = 0; i < GUEST_RAM_BANKS; i++) { - const uint64_t size = (uint64_t)dom->rambank_size[i] << XC_PAGE_SHIFT; + if (d_config->b_info.num_vnuma_nodes == 0) { + for (i = 0; i < GUEST_RAM_BANKS; i++) { + const uint64_t size = (uint64_t)dom->rambank_size[i] << XC_PAGE_SHIFT; - finalise_one_node(gc, fdt, "/memory", bankbase[i], size); + finalise_one_node(gc, fdt, "/memory", bankbase[i], size); + } + } else { + LOG(DEBUG, "vNUMA enabled: skipping memory node finalisation as nodes are already populated"); } if (dom->acpi_modules[0].data) { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:56 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:56 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318199.1586621 (Exim 4.92) (envelope-from ) id 1wQwIx-0004qw-RM; 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This information is retrieved from the virtual NUMA configuration in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 58a357858d..05d0f18e1a 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -571,7 +571,8 @@ static int make_chosen_node(libxl__gc *gc, void *fdt, bool ramdisk, return 0; } -static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, +static int make_cpus_node(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info, const struct arch_info *ainfo) { int res, i; @@ -586,7 +587,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, res = fdt_property_cell(fdt, "#size-cells", 0); if (res) return res; - for (i = 0; i < nr_cpus; i++) { + for (i = 0; i < b_info->max_vcpus; i++) { const char *name; mpidr_aff = libxl__compute_mpdir(i); @@ -607,6 +608,17 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, res = fdt_property_regs(gc, fdt, 1, 0, 1, mpidr_aff); if (res) return res; + if (b_info->num_vnuma_nodes) { + unsigned int vnode; + for (vnode = 0; vnode < b_info->num_vnuma_nodes; vnode++) { + if (libxl_bitmap_test(&b_info->vnuma_nodes[vnode].vcpus, i)) { + res = fdt_property_u32(fdt, "numa-node-id", vnode); + if (res) return res; + break; + } + } + } + res = fdt_end_node(fdt); if (res) return res; } @@ -1421,7 +1433,7 @@ next_resize: FDT( make_root_properties(gc, vers, fdt) ); FDT( make_chosen_node(gc, fdt, !!dom->modules[0].blob, state, info) ); - FDT( make_cpus_node(gc, fdt, info->max_vcpus, ainfo) ); + FDT( make_cpus_node(gc, fdt, info, ainfo) ); FDT( make_psci_node(gc, fdt) ); FDT( make_memory_nodes(gc, fdt, info, dom) ); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318202.1586630 (Exim 4.92) (envelope-from ) id 1wQwJ0-0005Jx-5u; Sun, 24 May 2026 00:02:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318202.1586630; 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This information is retrieved from the virtual NUMA configuration in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 05d0f18e1a..d2b505fd43 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -769,6 +769,39 @@ static int make_memory_nodes(libxl__gc *gc, void *fdt, return 0; } +static int make_numa_distance_map(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info) +{ + int i, j; + uint32_t *matrix; + int nr_nodes = b_info->num_vnuma_nodes; + int idx = 0; + int res; + + if (nr_nodes == 0) return 0; + + res = fdt_begin_node(fdt, "distance-map"); + if (res) return res; + + res = fdt_property_string(fdt, "compatible", "numa-distance-map-v1"); + if (res) return res; + + matrix = libxl__malloc(gc, sizeof(uint32_t) * nr_nodes * nr_nodes * 3); + + for (i = 0; i < nr_nodes; i++) { + for (j = 0; j < nr_nodes; j++) { + matrix[idx++] = cpu_to_fdt32(i); + matrix[idx++] = cpu_to_fdt32(j); + matrix[idx++] = cpu_to_fdt32(b_info->vnuma_nodes[i].distances[j]); + } + } + + res = fdt_property(fdt, "distance-matrix", matrix, sizeof(uint32_t) * idx); + if (res) return res; + + return fdt_end_node(fdt); +} + static int make_gicv2_node(libxl__gc *gc, void *fdt, uint64_t gicd_base, uint64_t gicd_size, uint64_t gicc_base, uint64_t gicc_size) @@ -1438,6 +1471,8 @@ next_resize: FDT( make_memory_nodes(gc, fdt, info, dom) ); + FDT( make_numa_distance_map(gc, fdt, info) ); + switch (info->arch_arm.gic_version) { case LIBXL_GIC_VERSION_V2: FDT( make_gicv2_node(gc, fdt, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:02:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:02:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318205.1586640 (Exim 4.92) (envelope-from ) id 1wQwJ1-0005dS-Mc; Sun, 24 May 2026 00:02:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318205.1586640; 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The syntax and format of the parameters are identical to the x86 implementation. The logic that actually functions based on this argument will be provided in a follow-up patch. --- xen/arch/arm/domain_build.c | 43 +++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 1efddc60ef..f4187512b0 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -66,6 +67,48 @@ static int __init parse_dom0_mem(const char *s) } custom_param("dom0_mem", parse_dom0_mem); +static nodemask_t __initdata dom0_nodes; +bool __initdata dom0_affinity_relaxed; + +#ifdef CONFIG_NUMA + +static int __init cf_check parse_dom0_nodes(const char *s) +{ + const char *ss; + int rc = 0; + unsigned int nid; + + do { + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + if ( isdigit(*s) ) + { + const char *endp; + + if ( (nid = simple_strtoul(s, &endp, 0), endp != ss) ) + rc = -EINVAL; + else if ( nid >= MAX_NUMNODES ) + rc = -E2BIG; + else + node_set(nid, dom0_nodes); + } + else if ( !cmdline_strcmp(s, "relaxed") ) + dom0_affinity_relaxed = true; + else if ( !cmdline_strcmp(s, "strict") ) + dom0_affinity_relaxed = false; + else + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} +custom_param("dom0_nodes", parse_dom0_nodes); +#endif /* CONFIG_NUMA */ + int __init parse_arch_dom0_param(const char *s, const char *e) { long long val; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:03:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:03:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318214.1586648 (Exim 4.92) (envelope-from ) id 1wQwJ5-0006DQ-A8; Sun, 24 May 2026 00:03:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318214.1586648; Sun, 24 May 2026 00:03:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwJ5-0006D8-6Z; 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If the option is omitted, the node affinity is configured to use all available NUMA nodes managed by Xen. When Xen is built with CONFIG_NUMA disabled, the node affinity falls back to using only NUMA node 0. --- xen/arch/arm/domain_build.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index f4187512b0..2518909ed0 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2027,6 +2027,13 @@ void __init create_dom0(void) if ( llc_coloring_enabled && (rc = dom0_set_llc_colors(dom0)) ) panic("Error initializing LLC coloring for %pd (rc = %d)\n", dom0, rc); + nodes_and(dom0_nodes, dom0_nodes, node_online_map); + if ( nodes_empty(dom0_nodes) ) + dom0_nodes = node_online_map; + + dom0->node_affinity = dom0_nodes; + dom0->auto_node_affinity = false; + if ( vcpu_create(dom0, 0) == NULL ) panic("Error creating %pdv0\n", dom0); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:03:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:03:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318217.1586656 (Exim 4.92) (envelope-from ) id 1wQwJ6-0006WZ-Og; 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This implementation maps the physical NUMA node IDs directly as Dom0's virtual NUMA node IDs. --- xen/arch/arm/domain_build.c | 22 ++++++- xen/common/device-tree/domain-build.c | 88 +++++++++++++-------------- 2 files changed, 63 insertions(+), 47 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2518909ed0..1deb4c1139 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -187,11 +187,26 @@ static bool __init insert_11_bank(struct domain *d, int res; mfn_t smfn; paddr_t start, size; + nodeid_t node = 0U; smfn = page_to_mfn(pg); start = mfn_to_maddr(smfn); size = pfn_to_paddr(1UL << order); + /* This code is temporal */ + { + struct membanks *mem = bootinfo_get_mem(); + for ( i = 0; i < mem->nr_banks; i++ ) + { + if ( start >= mem->bank[i].start && + start < (mem->bank[i].start + mem->bank[i].size) ) + { + node = get_numa_nodeid(&mem->bank[i]); + break; + } + } + } + D11PRINT("Allocated %#"PRIpaddr"-%#"PRIpaddr" (%ldMB/%ldMB, order %d)\n", start, start + size, 1UL << (order + PAGE_SHIFT - 20), @@ -217,6 +232,7 @@ static bool __init insert_11_bank(struct domain *d, { mem->bank[0].start = start; mem->bank[0].size = size; + set_numa_nodeid(&mem->bank[0], node); mem->nr_banks = 1; return true; } @@ -226,7 +242,7 @@ static bool __init insert_11_bank(struct domain *d, struct membank *bank = &mem->bank[i]; /* If possible merge new memory into the start of the bank */ - if ( bank->start == start+size ) + if ( bank->start == start+size && get_numa_nodeid(bank) == node ) { bank->start = start; bank->size += size; @@ -234,7 +250,7 @@ static bool __init insert_11_bank(struct domain *d, } /* If possible merge new memory onto the end of the bank */ - if ( start == bank->start + bank->size ) + if ( start == bank->start + bank->size && get_numa_nodeid(bank) == node ) { bank->size += size; return true; @@ -253,6 +269,7 @@ static bool __init insert_11_bank(struct domain *d, mem->nr_banks++; bank->start = start; bank->size = size; + set_numa_nodeid(bank, node); return true; } } @@ -263,6 +280,7 @@ static bool __init insert_11_bank(struct domain *d, bank->start = start; bank->size = size; + set_numa_nodeid(bank, node); mem->nr_banks++; return true; } diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 2a760b007b..61e2e50062 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -493,15 +493,50 @@ int __init make_chosen_node(const struct kernel_info *kinfo) return res; } +static int __init make_memory_sibling_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membank *bank) +{ + void *fdt = kinfo->fdt; + int res = 0; + u64 start = bank->start; + u64 size = bank->size; + __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE]; + __be32 *cells = ®[0]; + nodeid_t node = get_numa_nodeid(bank); + char name[32]; + + dt_dprintk(" Bank: %#"PRIx64"->%#"PRIx64" Node:%u\n", start, start + size, node); + + snprintf(name, sizeof(name), "memory@%"PRIx64, start); + res = fdt_begin_node(fdt, name); + if ( res ) + return res; + + dt_child_set_range(&cells, addrcells, sizecells, start, size); + res = fdt_property_string(fdt, "device_type", "memory"); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", reg, (addrcells + sizecells) * sizeof(*reg)); + if ( res ) + return res; + +#ifdef CONFIG_NUMA + res = fdt_property_u32(fdt, "numa-node-id", node); + if ( res ) + return res; +#endif /* CONFIG_NUMA */ + + res = fdt_end_node(fdt); + + return res; +} + int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, int sizecells, const struct membanks *mem) { - void *fdt = kinfo->fdt; unsigned int i; - int res, reg_size = addrcells + sizecells; - int nr_cells = 0; - __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE]; - __be32 *cells; + int res = 0; if ( mem->nr_banks == 0 ) return -ENOENT; @@ -516,54 +551,17 @@ int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, dt_dprintk("Create memory node\n"); - res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start); - if ( res ) - return res; - - res = fdt_property_string(fdt, "device_type", "memory"); - if ( res ) - return res; - - cells = ®[0]; for ( ; i < mem->nr_banks; i++ ) { - u64 start = mem->bank[i].start; - u64 size = mem->bank[i].size; - if ( (mem->bank[i].type == MEMBANK_STATIC_DOMAIN) || (mem->bank[i].type == MEMBANK_FDT_RESVMEM) ) continue; - nr_cells += reg_size; - BUG_ON(nr_cells > ARRAY_SIZE(reg)); - dt_child_set_range(&cells, addrcells, sizecells, start, size); - } - - /* - * static shared memory banks need to be listed as /memory node, so when - * this function is handling the normal memory, add the banks. - */ - if ( mem == kernel_info_get_mem_const(kinfo) ) - shm_mem_node_fill_reg_range(kinfo, reg, &nr_cells, addrcells, - sizecells); - - for ( cells = reg, i = 0; cells < reg + nr_cells; i++, cells += reg_size ) - { - uint64_t start = dt_read_number(cells, addrcells); - uint64_t size = dt_read_number(cells + addrcells, sizecells); - - dt_dprintk(" Bank %u: %#"PRIx64"->%#"PRIx64"\n", - i, start, start + size); + res = make_memory_sibling_node(kinfo, addrcells, sizecells, &mem->bank[i]); + if ( res ) + return res; } - dt_dprintk("(reg size %d, nr cells %d)\n", reg_size, nr_cells); - - res = fdt_property(fdt, "reg", reg, nr_cells * sizeof(*reg)); - if ( res ) - return res; - - res = fdt_end_node(fdt); - return res; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:03:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:03:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318225.1586666 (Exim 4.92) (envelope-from ) id 1wQwJA-0007Ck-0k; Sun, 24 May 2026 00:03:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318225.1586666; Sun, 24 May 2026 00:03:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwJ9-0007Ca-Qu; Sun, 24 May 2026 00:03:07 +0000 Received: by outflank-mailman (input) for mailman id 1318225; Sun, 24 May 2026 00:03:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwJ8-0006z1-Ir for xen-devel@lists.xenproject.org; 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 16/21] xen/arm: Balance Dom0 vCPU assignment across NUMA nodes Date: Sun, 24 May 2026 09:02:04 +0900 Message-ID: <20260524000209.292370-17-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0114.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:29c::12) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS9P286MB4275:EE_ X-MS-Office365-Filtering-Correlation-Id: f07c572b-31fc-44ab-e135-08deb927d2be X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|10070799003|7416014|376014|366016|22082099003|18002099003|56012099003; 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} +/* + * Map a Dom0 vCPU ID to a target NUMA node ID. + */ +static nodeid_t __init dom0_vcpu_to_node(const struct domain *d, unsigned int vcpu_id) +{ + nodeid_t nodes[MAX_NUMNODES]; + unsigned int nr_nodes = 0; + unsigned int vcpus_per_node; + unsigned int node_idx; + nodeid_t n; + + if ( nodes_empty(d->node_affinity) ) + return 0; + + for_each_node_mask(n, d->node_affinity) + nodes[nr_nodes++] = n; + + if ( nr_nodes == 0 ) + return 0; + + vcpus_per_node = (d->max_vcpus + nr_nodes - 1) / nr_nodes; + node_idx = vcpu_id / vcpus_per_node; + + ASSERT(node_idx < nr_nodes); + + return nodes[node_idx]; +} + int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) { int res; @@ -1907,6 +1935,24 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) vcpu_switch_to_aarch64_mode(d->vcpu[i]); } + /* + * If Dom0 has specific NUMA node affinity configured, bind each vCPU + * to its designated physical node. + */ + for ( i = 0; i < d->max_vcpus; i++ ) + { + struct vcpu *v = d->vcpu[i]; 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This ensures that distances are populated only for the specific NUMA nodes assigned to Domain-0. --- xen/arch/arm/domain_build.c | 50 +++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 11d0fa1233..2bf4b37f89 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -718,6 +718,51 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo, return res; } +#ifdef CONFIG_NUMA +static int __init make_distance_map_node(const struct domain *d, void *fdt) +{ + nodeid_t from, to; + unsigned int count = 0; + int res; + + static uint32_t __initdata matrix[MAX_NUMNODES * MAX_NUMNODES * 3]; + + if ( nodes_weight(d->node_affinity) <= 1 ) + return 0; + + for_each_node_mask(from, d->node_affinity) + { + for_each_node_mask(to, d->node_affinity) + { + matrix[count * 3 + 0] = cpu_to_fdt32(from); + matrix[count * 3 + 1] = cpu_to_fdt32(to); + matrix[count * 3 + 2] = cpu_to_fdt32(__node_distance(from, to)); + count++; + } + } + + res = fdt_begin_node(fdt, "distance-map"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "numa-distance-map-v1"); + if ( res ) + return res; + + res = fdt_property(fdt, "distance-matrix", matrix, count * 3 * sizeof(uint32_t)); + if ( res ) + return res; + + res = fdt_end_node(fdt); + if ( res ) + return res; + + return 0; +} +#else /* CONFIG_NUMA */ +#define make_distance_map_node(d, fdt) (0) +#endif /* CONFIG_NUMA */ + int __init add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data) { @@ -1569,6 +1614,7 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, DT_MATCH_TYPE("memory"), /* The memory mapped timer is not supported by Xen. */ DT_MATCH_COMPATIBLE("arm,armv7-timer-mem"), + DT_MATCH_COMPATIBLE("numa-distance-map-v1"), { /* sentinel */ }, }; static const struct dt_device_match timer_matches[] __initconst = @@ -1734,6 +1780,10 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, if ( res ) return res; + res = make_distance_map_node(d, kinfo->fdt); + if ( res ) + return res; + res = sci_dt_finalize(d, kinfo->fdt); if ( res ) return res; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:03:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:03:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318252.1586694 (Exim 4.92) (envelope-from ) id 1wQwJI-0000MB-Mj; Sun, 24 May 2026 00:03:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318252.1586694; Sun, 24 May 2026 00:03:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwJI-0000Lx-Eo; Sun, 24 May 2026 00:03:16 +0000 Received: by outflank-mailman (input) for mailman id 1318252; Sun, 24 May 2026 00:03:14 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wQwJG-0008U8-C7 for xen-devel@lists.xenproject.org; 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 19/21] xen/arm: Balance Dom0 memory allocation across allowed NUMA nodes Date: Sun, 24 May 2026 09:02:07 +0900 Message-ID: <20260524000209.292370-20-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0190.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:382::10) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS7P286MB7274:EE_ X-MS-Office365-Filtering-Correlation-Id: 3771ee30-d235-430a-b1e8-08deb927d71b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|366016|376014|10070799003|1800799024|5023799004|3023799007|6133799003|56012099003|18002099003|22082099003; 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When multiple NUMA nodes are available, distribute the allocation in a balanced manner across each of these nodes. --- xen/arch/arm/domain_build.c | 275 ++++++++++++++++++++---------------- 1 file changed, 150 insertions(+), 125 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2bf4b37f89..7960dcd33a 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -180,33 +180,19 @@ unsigned int __init dom0_max_vcpus(void) static bool __init insert_11_bank(struct domain *d, struct kernel_info *kinfo, struct page_info *pg, - unsigned int order) + unsigned int order, + nodeid_t node) { struct membanks *mem = kernel_info_get_mem(kinfo); unsigned int i; int res; mfn_t smfn; paddr_t start, size; - nodeid_t node = 0U; smfn = page_to_mfn(pg); start = mfn_to_maddr(smfn); size = pfn_to_paddr(1UL << order); - /* This code is temporal */ - { - struct membanks *mem = bootinfo_get_mem(); - for ( i = 0; i < mem->nr_banks; i++ ) - { - if ( start >= mem->bank[i].start && - start < (mem->bank[i].start + mem->bank[i].size) ) - { - node = get_numa_nodeid(&mem->bank[i]); - break; - } - } - } - D11PRINT("Allocated %#"PRIpaddr"-%#"PRIpaddr" (%ldMB/%ldMB, order %d)\n", start, start + size, 1UL << (order + PAGE_SHIFT - 20), @@ -293,7 +279,13 @@ fail: } /* - * This is all pretty horrible. + * Allocate NUMA-aware memory for Dom0 with 1:1 mapping. + * + * This function distributes the requested Dom0 memory across the allowed + * physical NUMA nodes in a balanced manner. It implements a multi-pass + * scavenging loop to allow nodes to dynamically back up each other if a + * particular node runs out of memory, maintaining a balanced distribution + * while ensuring the maximum amount of requested memory is satisfied. * * Requirements: * @@ -308,155 +300,187 @@ fail: * below 4GB, so that it can be used by non-LPAE enabled kernels (32-bit). * 4. Some devices assigned to dom0 can only do 32-bit DMA access or * even be more restricted. We want to allocate as much of the RAM - * as we reasonably can that can be accessed from all the devices.. + * as we reasonably can that can be accessed from all the devices. * 5. For 32-bit dom0 the kernel must be located below 4GB. - * 6. We want to have a few largers banks rather than many smaller ones. + * 6. We want to have a few larger banks rather than many smaller ones. * * For the first two requirements we need to make sure that the lowest - * bank is sufficiently large. - * - * For convenience we also sort the banks by physical address. - * - * The memory allocator does not really give us the flexibility to - * meet these requirements directly. So instead of proceed as follows: - * - * We first allocate the largest allocation we can as low as we - * can. This then becomes the first bank. This bank must be at least - * 128MB (or memory size requested for domain if that is smaller). + * bank (Bank 0) is sufficiently large to hold all boot modules. * - * Then we start allocating more memory, trying to allocate the - * largest possible size and trying smaller sizes until we - * successfully allocate something. + * The memory allocator does not really give us the flexibility to meet + * these requirements directly under NUMA topologies. So instead we proceed + * as follows: * - * We then try and insert this memory in to the list of banks. If it - * can be merged into an existing bank then this is trivial. + * We first calculate the total size required for the kernel, ramdisk, and + * DTB to establish a safe minimum size constraint for the first bank (Bank 0). * - * If the new memory is before the first bank (and cannot be merged into it) - * and is at least 128M then we allow it, otherwise we give up. Since the - * allocator prefers to allocate high addresses first and the first bank has - * already been allocated to be as low as possible this likely means we - * wouldn't have been able to allocate much more memory anyway. + * We then enter a multi-pass outer loop that runs until the full memory + * request is met. In each pass, we dynamically calculate the target allocation + * amount for each remaining active node to ensure a balanced distribution. * - * Otherwise we insert a new bank. If we've reached MAX_NR_BANKS then - * we give up. - * - * For 32-bit domain we require that the initial allocation for the - * first bank is part of the low mem. For 64-bit, the first bank is preferred - * to be allocated in the low mem. Then for subsequent allocation, we - * initially allocate memory only from low mem. Once that runs out out - * (as described above) we allow higher allocations and continue until - * that runs out (or we have allocated sufficient dom0 memory). + * For the initial chunk (Bank 0), we try to allocate the largest possible size + * as low as possible, honoring the 32-bit lowmem/DMA constraints. If it fails + * to find lowmem space and the domain is 64-bit, it falls back to highmem + * without violating the minimum size needed for the boot modules. */ static void __init allocate_memory_11(struct domain *d, struct kernel_info *kinfo) { - const unsigned int min_low_order = - get_order_from_bytes(min_t(paddr_t, kinfo->unassigned_mem, MB(128))); - const unsigned int min_order = get_order_from_bytes(MB(4)); + paddr_t todo = kinfo->unassigned_mem; + nodeid_t node; + + unsigned int max_chunk_order = get_order_from_bytes(MB(128)); + unsigned int min_bank0_order; + unsigned int lowmem_bitsize = arch_get_dma_bitsize(); + bool is_bank0 = true; + + struct boot_module *kernel_mod = boot_module_find_by_kind(BOOTMOD_KERNEL); + struct boot_module *ramdisk_mod = boot_module_find_by_kind(BOOTMOD_RAMDISK); + struct boot_module *dtb_mod = boot_module_find_by_kind(BOOTMOD_FDT); + paddr_t required_size = 0; + + nodemask_t exhausted_nodes; + nodemask_t valid_nodes; + struct membanks *mem = kernel_info_get_mem(kinfo); - struct page_info *pg; - unsigned int order = get_allocation_size(kinfo->unassigned_mem); unsigned int i; - bool lowmem = true; - unsigned int lowmem_bitsize = min(32U, arch_get_dma_bitsize()); - unsigned int bits; - /* * TODO: Implement memory bank allocation when DOM0 is not direct * mapped */ BUG_ON(!is_domain_direct_mapped(d)); - printk("Allocating 1:1 mappings totalling %ldMB for %pd:\n", + printk("Allocating 1:1 mappings totalling %ldMB for dom0:\n", /* Don't want format this as PRIpaddr (16 digit hex) */ - (unsigned long)(kinfo->unassigned_mem >> 20), d); + (unsigned long)(kinfo->unassigned_mem >> 20)); mem->nr_banks = 0; /* - * First try and allocate the largest thing we can as low as - * possible to be bank 0. + * Calculate the absolute minimum size required to fit the kernel, + * initrd, and DTB inside Bank 0 */ - while ( order >= min_low_order ) - { - for ( bits = order ; bits <= lowmem_bitsize; bits++ ) - { - pg = alloc_domheap_pages(d, order, MEMF_bits(bits)); - if ( pg != NULL ) - { - if ( !insert_11_bank(d, kinfo, pg, order) ) - BUG(); /* Cannot fail for first bank */ + if ( kernel_mod ) + required_size += kernel_mod->size; + if ( ramdisk_mod ) + required_size += ramdisk_mod->size; + if ( dtb_mod ) + required_size += dtb_mod->size; - goto got_bank0; - } - } - order--; - } - - /* Failed to allocate bank0 in the lowmem region. */ - if ( is_32bit_domain(d) ) - panic("Unable to allocate first memory bank\n"); + min_bank0_order = get_order_from_bytes(required_size); - /* Try to allocate memory from above the lowmem region */ - printk(XENLOG_INFO "No bank has been allocated below %u-bit.\n", - lowmem_bitsize); - lowmem = false; + nodes_clear(exhausted_nodes); + nodes_and(valid_nodes, d->node_affinity, node_online_map); - got_bank0: + BUG_ON(nodes_empty(valid_nodes)); - /* - * If we failed to allocate bank0 in the lowmem region, - * continue allocating from above the lowmem and fill in banks. - */ - order = get_allocation_size(kinfo->unassigned_mem); - while ( kinfo->unassigned_mem && mem->nr_banks < mem->max_banks ) + while ( todo > 0 ) { - pg = alloc_domheap_pages(d, order, - lowmem ? MEMF_bits(lowmem_bitsize) : 0); - if ( !pg ) - { - order --; + paddr_t last_todo = todo; + nodemask_t active_nodes; + unsigned int active_nodes_count; + unsigned int nodes_left; - if ( lowmem && order < min_low_order) - { - D11PRINT("Failed at min_low_order, allow high allocations\n"); - order = get_allocation_size(kinfo->unassigned_mem); - lowmem = false; - continue; - } - if ( order >= min_order ) - continue; + /* Filter out exhausted nodes to find active candidates */ + nodes_andnot(active_nodes, valid_nodes, exhausted_nodes); + active_nodes_count = nodes_weight(active_nodes); - /* No more we can do */ + if ( active_nodes_count == 0 ) + { + printk(XENLOG_WARNING "Dom0 NUMA: All specified nodes are completely exhausted.\n"); break; } - if ( !insert_11_bank(d, kinfo, pg, order) ) + nodes_left = active_nodes_count; + + for_each_node_mask(node, active_nodes) { - if ( mem->nr_banks == mem->max_banks ) - /* Nothing more we can do. */ - break; + paddr_t target_per_node; + paddr_t node_todo; - if ( lowmem ) - { - D11PRINT("Allocation below bank 0, allow high allocations\n"); - order = get_allocation_size(kinfo->unassigned_mem); - lowmem = false; - continue; - } - else + /* Target chunk size per node */ + target_per_node = DIV_ROUND_UP(todo, nodes_left); + target_per_node = DIV_ROUND_UP(target_per_node, MB(128)) * MB(128); + + node_todo = min(todo, target_per_node); + + while ( node_todo > 0 ) { - D11PRINT("Allocation below bank 0\n"); - break; + struct page_info *pg = NULL; + unsigned int max_order = get_allocation_size(node_todo); + unsigned int order; + paddr_t bank_size; + + /* + * Enforce a maximum chunk cap of 128MB for all allocations + * except Bank 0 + */ + if ( !is_bank0 && max_order > max_chunk_order ) + max_order = max_chunk_order; + + for ( order = max_order; ; order-- ) + { + unsigned int memflags = MEMF_node(node); + if ( !dom0_affinity_relaxed ) + memflags |= MEMF_exact_node; + + if ( is_bank0 ) + { + unsigned int bits; + for ( bits = order; bits <= lowmem_bitsize; bits++ ) + { + pg = alloc_domheap_pages(d, order, memflags | MEMF_bits(bits)); + if ( pg != NULL ) + break; + } + + if ( !pg && order <= min_bank0_order ) + { + if ( is_32bit_domain(d) ) + panic("Unable to allocate first memory bank below %u-bit\n", lowmem_bitsize); + + pg = alloc_domheap_pages(d, order, memflags); + } + } + else + { + pg = alloc_domheap_pages(d, order, memflags); + } + + if ( pg || order == 0 ) + break; + } + + if ( !pg ) + { + node_set(node, exhausted_nodes); + break; + } + + if ( is_bank0 ) + is_bank0 = false; + + if ( !insert_11_bank(d, kinfo, pg, order, node) ) + break; + + bank_size = 1ULL << (PAGE_SHIFT + order); + node_todo -= bank_size; + todo -= bank_size; + + if ( todo == 0 ) break; } + + nodes_left--; + if ( todo == 0 ) break; } /* - * Success, next time around try again to get the largest order - * allocation possible. + * Prevent infinite loop if a full pass across all active nodes + * yields zero progress */ - order = get_allocation_size(kinfo->unassigned_mem); + if ( todo == last_todo ) + break; } if ( kinfo->unassigned_mem ) @@ -464,14 +488,15 @@ static void __init allocate_memory_11(struct domain *d, panic("Failed to allocate requested dom0 memory. %ldMB unallocated\n", (unsigned long)kinfo->unassigned_mem >> 20); - for( i = 0; i < mem->nr_banks; i++ ) + for ( i = 0; i < mem->nr_banks; i++ ) { - printk("BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB)\n", + printk("BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB) NODE:%u\n", i, mem->bank[i].start, mem->bank[i].start + mem->bank[i].size, /* Don't want format this as PRIpaddr (16 digit hex) */ - (unsigned long)(mem->bank[i].size >> 20)); + (unsigned long)(mem->bank[i].size >> 20), + get_numa_nodeid(&mem->bank[i])); } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 00:03:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 00:03:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318253.1586697 (Exim 4.92) (envelope-from ) id 1wQwJJ-0000Vx-8Y; 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Since the memory banks managing Static SHM repurpose the 'type' field for a different purpose via a union, separating this creation logic keeps the implementation clean and significantly improves maintainability. --- xen/arch/arm/domain_build.c | 6 ++++++ xen/common/device-tree/domain-build.c | 21 +++++++++++++++++++++ xen/include/xen/fdt-domain-build.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 7960dcd33a..1cd66c9911 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1805,6 +1805,12 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, if ( res ) return res; +#ifdef CONFIG_STATIC_SHM + res = make_raw_memory_node(kinfo, addrcells, sizecells, kernel_info_get_shm_mem_const(kinfo)); + if ( res ) + return res; +#endif /* CONFIG_STATIC_SHM */ + res = make_distance_map_node(d, kinfo->fdt); if ( res ) return res; diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 61e2e50062..f846ca0471 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -565,6 +565,27 @@ int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, return res; } +int __init make_raw_memory_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membanks *mem) +{ + unsigned int i; + int res = 0; + + if ( mem->nr_banks == 0 ) + return 0; + + dt_dprintk("Create raw memory nodes\n"); + + for ( i = 0 ; i < mem->nr_banks; i++ ) + { + res = make_memory_sibling_node(kinfo, addrcells, sizecells, &mem->bank[i]); + if ( res ) + return res; + } + + return res; +} + /* * Local variables: * mode: C diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 671486c1c8..6a809f3f86 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -31,6 +31,8 @@ int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo, int addrcells, int sizecells); int make_memory_node(const struct kernel_info *kinfo, int addrcells, int sizecells, const struct membanks *mem); +int make_raw_memory_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membanks *mem); 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, jgross@suse.com, bertrand.marquis@arm.com, Volodymyr_Babchuk@epam.com, dfaggioli@suse.com, gwd@xenproject.org, Hirokazu Takahashi Subject: [PATCH 21/21] xen/arm: Support numa and numa_nodes boot options Date: Sun, 24 May 2026 09:02:09 +0900 Message-ID: <20260524000209.292370-22-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260524000209.292370-1-taka@valinux.co.jp> References: <20260524000209.292370-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TYCP286CA0181.JPNP286.PROD.OUTLOOK.COM (2603:1096:400:382::19) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|OS7P286MB7274:EE_ X-MS-Office365-Filtering-Correlation-Id: 35831113-4086-4f6e-f4a2-08deb927da0b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|366016|376014|10070799003|1800799024|3023799007|56012099003|18002099003|22082099003; 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Its usage is almost identical to x86 Xen. The key difference is that while x86 uses ACPI PXM values to specify nodes, ARM uses the values defined in the device tree (numa-node-id). --- docs/misc/xen-command-line.pandoc | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 2da90548d8..0f1c0467f1 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1046,7 +1046,7 @@ Practices](https://wiki.xen.org/wiki/Xen_Best_Practices#Xen_dom0_dedicated_memor This option doesn't have effect if pv-shim mode is enabled. -### dom0_nodes (x86) +### dom0_nodes (x86, arm) > `= List of [ | relaxed | strict ]` @@ -1055,8 +1055,9 @@ This option doesn't have effect if pv-shim mode is enabled. Specify the NUMA nodes to place Dom0 on. Defaults for vCPU-s created and memory assigned to Dom0 will be adjusted to match the node restrictions set up here. Note that the values to be specified here are -ACPI PXM ones, not Xen internal node numbers. `relaxed` sets up vCPU -affinities to prefer but be not limited to the specified node(s). +ACPI PXM ones, not Xen internal node numbers, or node IDs in the device +tree. `relaxed` sets up vCPU affinities to prefer but be not limited to +the specified node(s). ### dom0_vcpus_pin > `= ` @@ -1996,7 +1997,7 @@ This option is ignored in **pv-shim** mode. ### nr_irqs (x86) > `= ` -### numa (x86) +### numa (x86, arm) > `= on | off | fake= | noacpi` > Default: `on` -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 07:15:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 07:15:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318530.1586719 (Exim 4.92) (envelope-from ) id 1wR33S-0005i4-KP; Sun, 24 May 2026 07:15:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318530.1586719; Sun, 24 May 2026 07:15:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR33S-0005hx-Hi; Sun, 24 May 2026 07:15:22 +0000 Received: by outflank-mailman (input) for mailman id 1318530; Sun, 24 May 2026 07:15:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR33R-0005hr-Dw for xen-devel@lists.xenproject.org; Sun, 24 May 2026 07:15:21 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wR33Q-001RCl-QD for xen-devel@lists.xenproject.org; Sun, 24 May 2026 09:15:20 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a12a54e-bab6-0a2a0a5309dd-0a2a450bc578-28 for ; Sun, 24 May 2026 09:15:20 +0200 Received: from [170.10.133.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a12a587-212f-0a2a450b0019-aa0a857c7a63-3 for ; Sun, 24 May 2026 09:15:20 +0200 Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-658-N_EH1F6GMv6YyivgHUd6Ag-1; Sun, 24 May 2026 03:15:17 -0400 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-49051422d55so5886235e9.2 for ; Sun, 24 May 2026 00:15:16 -0700 (PDT) Received: from redhat.com (IGLD-80-230-25-45.inter.net.il. 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Tsirkin" To: Thierry Escande Cc: qemu-devel@nongnu.org, Paolo Bonzini , Richard Henderson , Eduardo Habkost , Anthony PERARD , xen-devel@lists.xenproject.org Subject: Re: [PATCH 0/4] Xen: Add Q35 initial support for HVM guests Message-ID: <20260524031423-mutt-send-email-mst@kernel.org> References: <20260313164649.794591-1-thierry.escande@vates.tech> MIME-Version: 1.0 In-Reply-To: <20260313164649.794591-1-thierry.escande@vates.tech> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: UMLJ2wn_Ads9pNsy3JZ6VGbbhgRre4jvXHr2MJ1VWpc_1779606916 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-purgate-ID: tlsNG-42698a/1779606920-18563F3B-3B1B950C/0/0 X-purgate-type: clean X-purgate-size: 2062 On Fri, Mar 13, 2026 at 04:46:56PM +0000, Thierry Escande wrote: > This patch series introduces Q35 chipset support for Xen HVM guests. This is > based on the work from Alexey Gerasimenko (See patchset [1] for reference). > > This series does not implement device passthrough as this will need more work > on the Xen side to support multiple PCI buses. Since Q35 chipset does not > support device hotplugging and with current Xen mechanism for device > passthrough, they have to be plugged to a new PCIe root port, i.e. not the PCI > bus 0. > > As a first step for Q35 guests support, this series implements: > - Legacy interrupt routing for the ICH9 LPC bridge (i.e. not IOAPIC) > - Xen HVM machine initialization in pc_q35_init() > - Access to PCIe Extended Config Space > - Fix for incorrect values and usage for PCIEXBAR masks Xen maintainers, who's merging this? > The corresponding patchset for the Xen Project has been posted at [2]. > > [1] https://lore.kernel.org/xen-devel/cover.1520867740.git.x1917x@gmail.com/ > [2] https://lore.kernel.org/xen-devel/20260313163455.790692-1-thierry.escande@vates.tech/ > > Alexey Gerasimenko (2): > pc/xen: Xen Q35 support: provide IRQ handling for PCI devices > q35: Fix incorrect values for PCIEXBAR masks > > Thierry Escande (2): > q35/xen: Add Xen support for Q35 > xen: Handle PCIe config space size in cpu_ioreq_config() > > hw/i386/pc_piix.c | 2 -- > hw/i386/pc_q35.c | 12 +++++++++++- > hw/i386/xen/xen-hvm.c | 38 ++++++++++++++++++++++++++++++++++++++ > hw/isa/lpc_ich9.c | 16 +++++++++++++--- > hw/pci-host/q35.c | 6 +++--- > hw/xen/xen-hvm-common.c | 11 +++++++---- > include/hw/pci-host/q35.h | 4 ++-- > include/hw/xen/xen.h | 5 +++++ > stubs/xen-hw-stub.c | 4 ++++ > 9 files changed, 83 insertions(+), 15 deletions(-) > > -- > 2.51.0 > > > > -- > Thierry Escande | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Sun May 24 07:27:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 07:27:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318542.1586729 (Exim 4.92) (envelope-from ) id 1wR3FG-0007il-Ov; Sun, 24 May 2026 07:27:34 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318542.1586729; Sun, 24 May 2026 07:27:34 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR3FG-0007ie-MA; Sun, 24 May 2026 07:27:34 +0000 Received: by outflank-mailman (input) for mailman id 1318542; Sun, 24 May 2026 07:27:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR3FF-0007h7-Mw for xen-devel@lists.xenproject.org; Sun, 24 May 2026 07:27:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wR3FF-002xZg-3G for xen-devel@lists.xenproject.org; Sun, 24 May 2026 09:27:33 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a12a864-2eae-0a2a0a5409dd-0a2a4506d08a-2 for ; Sun, 24 May 2026 09:27:32 +0200 Received: from [170.10.129.124] (helo=us-smtp-delivery-124.mimecast.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a12a863-7371-0a2a45060019-aa0a817cd89b-3 for ; Sun, 24 May 2026 09:27:32 +0200 Received: from mail-wm1-f69.google.com (mail-wm1-f69.google.com [209.85.128.69]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-7-CHYLcssYOhqZXz2X8gnbwQ-1; Sun, 24 May 2026 03:27:29 -0400 Received: by mail-wm1-f69.google.com with SMTP id 5b1f17b1804b1-49058e91639so3401035e9.3 for ; Sun, 24 May 2026 00:27:29 -0700 (PDT) Received: from redhat.com (IGLD-80-230-25-45.inter.net.il. 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Tsirkin" To: Thierry Escande Cc: qemu-devel@nongnu.org, Alexey Gerasimenko , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Anthony PERARD , xen-devel@lists.xenproject.org Subject: Re: [PATCH 1/4] pc/xen: Xen Q35 support: provide IRQ handling for PCI devices Message-ID: <20260524031521-mutt-send-email-mst@kernel.org> References: <20260313164649.794591-1-thierry.escande@vates.tech> <20260313164649.794591-2-thierry.escande@vates.tech> MIME-Version: 1.0 In-Reply-To: <20260313164649.794591-2-thierry.escande@vates.tech> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: xT19KTREeHPgkfaSsaLPS50vf7X1QDucHw-xPxyB4As_1779607648 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-purgate-ID: tlsNG-16d1c6/1779607652-84F63D75-173A69F9/0/0 X-purgate-type: clean X-purgate-size: 7862 On Fri, Mar 13, 2026 at 04:47:07PM +0000, Thierry Escande wrote: > From: Alexey Gerasimenko > > This patch introduces support for ICH9 LPC PCI interrupt routing when > running under Xen. This intercepts writes to the PIRQA-D routing > registers and propagates routing changes to the Xen device model via > xen_set_pci_link_route(). > > A major difference between i440 and Q35 is the number of PIRQ inputs and > PIRQ routers (PCI IRQ links in terms of ACPI) available. i440 has 4 PCI > interrupt links, while Q35 has 8 (PIRQA...PIRQH). Currently Xen has > support for only 4 PCI links, so we describe only 4 of 8 PCI links in > ACPI tables. Also, hvmloader disables PIRQ routing for PIRQE..PIRQH by > writing 80h into corresponding PIRQ[n]_ROUT registers. > > All this PCI interrupt routing stuff largely concerns legacy mechanism > from PIC era. It's hardly worth to extend number of PCI links supported > as we normally deal with APIC mode and/or MSI interrupts. > > The only useful thing to do with PIRQE..PIRQH routing currently is to > check if guest actually attempts to use it for some reason (despite ACPI > PCI routing information provided). In this case, a warning is reported. > > This has been tested on Linux guests with noapic and pci=nomsi kernel > parameters set. > > Signed-off-by: Alexey Gerasimenko > Signed-off-by: Thierry Escande > --- > hw/i386/pc_piix.c | 2 -- > hw/i386/xen/xen-hvm.c | 38 ++++++++++++++++++++++++++++++++++++++ > hw/isa/lpc_ich9.c | 16 +++++++++++++--- > include/hw/xen/xen.h | 5 +++++ > stubs/xen-hw-stub.c | 4 ++++ > 5 files changed, 60 insertions(+), 5 deletions(-) > > diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c > index 4d71e0d51a..a65e09e46c 100644 > --- a/hw/i386/pc_piix.c > +++ b/hw/i386/pc_piix.c > @@ -66,8 +66,6 @@ > #include "hw/i386/acpi-build.h" > #include "target/i386/cpu.h" > > -#define XEN_IOAPIC_NUM_PIRQS 128ULL > - > static GlobalProperty pc_piix_compat_defaults[] = { > { TYPE_RAMFB_DEVICE, "use-legacy-x86-rom", "true" }, > { TYPE_VFIO_PCI_NOHOTPLUG, "use-legacy-x86-rom", "true" }, > diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c > index 67d3e836eb..2dba289e09 100644 > --- a/hw/i386/xen/xen-hvm.c > +++ b/hw/i386/xen/xen-hvm.c > @@ -18,6 +18,7 @@ > #include "hw/core/hw-error.h" > #include "hw/i386/pc.h" > #include "hw/core/irq.h" > +#include "hw/southbridge/ich9.h" > #include "hw/i386/apic-msidef.h" > #include "hw/xen/xen-x86.h" > #include "qemu/range.h" > @@ -87,6 +88,43 @@ int xen_set_pci_link_route(uint8_t link, uint8_t irq) > return xendevicemodel_set_pci_link_route(xen_dmod, xen_domid, link, irq); > } > > +void xen_ich9_pci_write_config_client(PCIDevice *pci_dev, uint32_t address, uint32_t val, int len) > +{ > + static bool pirqe_f_warned = false; > + int i; > + > + if (ranges_overlap(address, len, ICH9_LPC_PIRQA_ROUT, 4)) { > + /* handle PIRQA..PIRQD routing */ > + /* Scan for updates to PCI link routes (0x60-0x63). */ > + for (i = 0; i < len; i++) { > + uint8_t v = (val >> (8 * i)) & 0xff; > + if (v & 0x80) { > + v = 0; > + } > + v &= 0xf; > + if (((address + i) >= ICH9_LPC_PIRQA_ROUT) && > + ((address + i) <= ICH9_LPC_PIRQD_ROUT)) { > + xen_set_pci_link_route(address + i - ICH9_LPC_PIRQA_ROUT, v); > + } > + } > + } else if (ranges_overlap(address, len, ICH9_LPC_PIRQE_ROUT, 4)) { > + while (len--) { > + if (range_covers_byte(ICH9_LPC_PIRQE_ROUT, 4, address) && > + (val & 0x80) == 0) { > + /* print warning only once */ > + if (!pirqe_f_warned) { > + pirqe_f_warned = true; > + warn_report("WARNING: guest domain attempted to use PIRQ%c " > + "routing which is not supported for Xen/Q35 currently\n", > + (char)(address - ICH9_LPC_PIRQE_ROUT + 'E')); > + break; > + } > + } > + address++, val >>= 8; > + } > + } > +} > + > int xen_is_pirq_msi(uint32_t msi_data) > { > /* If vector is 0, the msi is remapped into a pirq, passed as > diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c > index 51dc680029..8c627f0734 100644 > --- a/hw/isa/lpc_ich9.c > +++ b/hw/isa/lpc_ich9.c > @@ -46,8 +46,10 @@ > #include "hw/acpi/ich9_timer.h" > #include "hw/pci/pci_bus.h" > #include "hw/core/qdev-properties.h" > +#include "hw/xen/xen.h" > #include "system/runstate.h" > #include "system/system.h" > +#include "system/xen.h" > #include "hw/core/cpu.h" > #include "hw/nvram/fw_cfg.h" > #include "qemu/cutils.h" > @@ -569,6 +571,9 @@ static void ich9_lpc_config_write(PCIDevice *d, > ICH9LPCState *lpc = ICH9_LPC_DEVICE(d); > uint32_t rcba_old = pci_get_long(d->config + ICH9_LPC_RCBA); > > + if (xen_enabled()){ Coding style violation. > + xen_ich9_pci_write_config_client(d, addr, val, len); > + } > pci_default_write_config(d, addr, val, len); > if (ranges_overlap(addr, len, ICH9_LPC_PMBASE, 4) || > ranges_overlap(addr, len, ICH9_LPC_ACPI_CTRL, 1)) { > @@ -762,9 +767,14 @@ static void ich9_lpc_realize(PCIDevice *d, Error **errp) > irq = object_property_get_uint(OBJECT(&lpc->rtc), "irq", &error_fatal); > isa_connect_gpio_out(ISA_DEVICE(&lpc->rtc), 0, irq); > > - pci_bus_irqs(pci_bus, ich9_lpc_set_irq, d, ICH9_LPC_NB_PIRQS); > - pci_bus_map_irqs(pci_bus, ich9_lpc_map_irq); > - pci_bus_set_route_irq_fn(pci_bus, ich9_route_intx_pin_to_irq); > + if (xen_enabled()) { > + pci_bus_irqs(pci_bus, xen_intx_set_irq, d, XEN_IOAPIC_NUM_PIRQS); > + pci_bus_map_irqs(pci_bus, xen_pci_slot_get_pirq); > + } else { > + pci_bus_irqs(pci_bus, ich9_lpc_set_irq, d, ICH9_LPC_NB_PIRQS); > + pci_bus_map_irqs(pci_bus, ich9_lpc_map_irq); > + pci_bus_set_route_irq_fn(pci_bus, ich9_route_intx_pin_to_irq); > + } > > ich9_lpc_pm_init(lpc); > } > diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h > index e94c6e5a31..910289b54d 100644 > --- a/include/hw/xen/xen.h > +++ b/include/hw/xen/xen.h > @@ -24,6 +24,8 @@ > #define __XEN_INTERFACE_VERSION__ 0x00040e00 > #endif > > +#define XEN_IOAPIC_NUM_PIRQS 128ULL > + > /* xen-machine.c */ > enum xen_mode { > XEN_DISABLED = 0, /* xen support disabled (default) */ > @@ -39,6 +41,9 @@ extern bool xen_is_stubdomain; > int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num); > int xen_set_pci_link_route(uint8_t link, uint8_t irq); > void xen_intx_set_irq(void *opaque, int irq_num, int level); > +void xen_ich9_pci_write_config_client(PCIDevice *pci_dev, > + uint32_t address, uint32_t val, > + int len); > void xen_hvm_inject_msi(uint64_t addr, uint32_t data); > int xen_is_pirq_msi(uint32_t msi_data); > > diff --git a/stubs/xen-hw-stub.c b/stubs/xen-hw-stub.c > index 6cf0e9a4c1..a74209d01e 100644 > --- a/stubs/xen-hw-stub.c > +++ b/stubs/xen-hw-stub.c > @@ -24,6 +24,10 @@ int xen_set_pci_link_route(uint8_t link, uint8_t irq) > return -1; > } > > +void xen_ich9_pci_write_config_client(PCIDevice *pci_dev, uint32_t address, uint32_t val, int len) > +{ > +} > + > int xen_is_pirq_msi(uint32_t msi_data) > { > return 0; > -- > 2.51.0 > > > > -- > Thierry Escande | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Sun May 24 07:44:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 07:44:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318554.1586738 (Exim 4.92) (envelope-from ) id 1wR3VR-0002Ku-3Z; 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Tsirkin" To: Thierry Escande Cc: qemu-devel@nongnu.org, Alexey Gerasimenko , Paolo Bonzini , Richard Henderson , Eduardo Habkost , Anthony PERARD , xen-devel@lists.xenproject.org Subject: Re: [PATCH 3/4] q35: Fix incorrect values for PCIEXBAR masks Message-ID: <20260524034330-mutt-send-email-mst@kernel.org> References: <20260313164649.794591-1-thierry.escande@vates.tech> <20260313164649.794591-4-thierry.escande@vates.tech> MIME-Version: 1.0 In-Reply-To: <20260313164649.794591-4-thierry.escande@vates.tech> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: GvbJn9nt70AJek-a76xWxoW6KvuYzTsD9sK-ymqt1cg_1779608631 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline X-purgate-ID: tlsNG-720697/1779608654-82D6F161-58F8FA19/0/0 X-purgate-type: clean X-purgate-size: 2927 On Fri, Mar 13, 2026 at 04:47:16PM +0000, Thierry Escande wrote: > From: Alexey Gerasimenko > > There are two small issues in PCIEXBAR address mask handling: > - wrong bit positions for address mask bits (see PCIEXBAR description > in Q35 datasheet) > - incorrect usage of 64ADR_MASK > > Due to this, attempting to write a valid PCIEXBAR address may cause it > to shift to another address, causing memory layout corruption where > emulated MMIO regions may overlap real (passed through) MMIO ranges. Fix > this by providing correct values. > > Signed-off-by: Alexey Gerasimenko > Signed-off-by: Thierry Escande Acked-by: Michael S. Tsirkin > --- > hw/pci-host/q35.c | 6 +++--- > include/hw/pci-host/q35.h | 4 ++-- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c > index e85e4227b3..7368e3c598 100644 > --- a/hw/pci-host/q35.c > +++ b/hw/pci-host/q35.c > @@ -306,12 +306,12 @@ static void mch_update_pciexbar(MCHPCIState *mch) > break; > case MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_128M: > length = 128 * 1024 * 1024; > - addr_mask |= MCH_HOST_BRIDGE_PCIEXBAR_128ADMSK | > - MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK; > + addr_mask |= MCH_HOST_BRIDGE_PCIEXBAR_128ADMSK; > break; > case MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_64M: > length = 64 * 1024 * 1024; > - addr_mask |= MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK; > + addr_mask |= MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK | > + MCH_HOST_BRIDGE_PCIEXBAR_128ADMSK; > break; > case MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_RVD: > qemu_log_mask(LOG_GUEST_ERROR, "Q35: Reserved PCIEXBAR LENGTH\n"); > diff --git a/include/hw/pci-host/q35.h b/include/hw/pci-host/q35.h > index ddafc3f2e3..f31a71010b 100644 > --- a/include/hw/pci-host/q35.h > +++ b/include/hw/pci-host/q35.h > @@ -100,8 +100,8 @@ struct Q35PCIHost { > #define MCH_HOST_BRIDGE_PCIEXBAR_DEFAULT 0xb0000000 > #define MCH_HOST_BRIDGE_PCIEXBAR_MAX (0x10000000) /* 256M */ > #define MCH_HOST_BRIDGE_PCIEXBAR_ADMSK Q35_MASK(64, 35, 28) > -#define MCH_HOST_BRIDGE_PCIEXBAR_128ADMSK ((uint64_t)(1 << 26)) > -#define MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK ((uint64_t)(1 << 25)) > +#define MCH_HOST_BRIDGE_PCIEXBAR_128ADMSK ((uint64_t)(1 << 27)) > +#define MCH_HOST_BRIDGE_PCIEXBAR_64ADMSK ((uint64_t)(1 << 26)) > #define MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_MASK ((uint64_t)(0x3 << 1)) > #define MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_256M ((uint64_t)(0x0 << 1)) > #define MCH_HOST_BRIDGE_PCIEXBAR_LENGTH_128M ((uint64_t)(0x1 << 1)) > -- > 2.51.0 > > > > -- > Thierry Escande | Vates XCP-ng Developer > > XCP-ng & Xen Orchestra - Vates solutions > > web: https://vates.tech From xen-devel-bounces@lists.xenproject.org Sun May 24 11:00:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 11:00:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318619.1586746 (Exim 4.92) (envelope-from ) id 1wR6Z6-0004RP-Nc; Sun, 24 May 2026 11:00:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318619.1586746; Sun, 24 May 2026 11:00:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR6Z6-0004RI-KQ; Sun, 24 May 2026 11:00:16 +0000 Received: by outflank-mailman (input) for mailman id 1318619; Sun, 24 May 2026 11:00:15 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR6Z5-0004RC-QD for xen-devel@lists.xenproject.org; Sun, 24 May 2026 11:00:15 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wR6Z5-003zR6-0Z; Sun, 24 May 2026 11:00:15 +0000 Received: from [2a02:8012:3a1:0:94ee:8228:5d9d:4ee8] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wR6Z4-005PIm-39; Sun, 24 May 2026 11:00:15 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=7m4lJ7TIcGE792JMwbJcSf0iwwa49L3L/8UsoUChDbM=; b=PSoEG+vNRgfWC8ttgY5EfqB6Fi fPWA0s8YnqBwboe+qgHxLVNSLg88IveZ6yhggJIV5gZTNS78JMqwMZ28kOXZC5aDHtq7Qo5NnwU1K O7IZp7PtdKSrn7J0vf8GnzFMenXtjWzxYvwmIHOwIGbzIQiinyv/snqIzgEnSiR8oXOY=; Message-ID: Date: Sun, 24 May 2026 12:00:13 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 02/23] xen/arm: smmuv3: Add support for stage-1 and nested stage translation Content-Language: en-GB To: Milan Djokic , "xen-devel@lists.xenproject.org" Cc: Rahul Singh , Bertrand Marquis , Stefano Stabellini , Michal Orzel , Volodymyr Babchuk References: <56a7c116-4ecb-4dfc-a7dd-774d53041fe9@xen.org> <87a04781-5765-43b6-8b21-cb993609bd91@epam.com> <4c96c478-aeb5-443c-a6ca-f23caf7d5430@epam.com> From: Julien Grall In-Reply-To: <4c96c478-aeb5-443c-a6ca-f23caf7d5430@epam.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Hi Milan, On 28/04/2026 11:16, Milan Djokic wrote: >>> The original idea was to also allow stage-1-only support. But I'm not >>> sure if stage-1-only usecase is useful or even valid for Xen.. I will >>> update the patch series with the missing parts for stage-1-only support, >>> pointed out by Luca, but the question remains if this is needed at all. >>> If not, I can revert to original state where stage-2 was always >>> required. >> >> By "stage-1 only" support, do you mean Xen would use the stage-1 in >> replacement of the stage-2? Or do you mean the guest will use the >> stage-1 page-table and there will be no isolation from Xen? >> >> If the former, then I believe the page tables don't have the exact same >> format. Today, the page-tables are shared between the CPU and IOMMU, so >> this would need to be duplicated. For now, I am not sure this is worth >> to do. >> >> If the latter, this would require the guest to be directly mapped (i.e. >> IPA == PA) but it would also open a big hole. So I would want to >> understand the exact use case first. >> > > The latter. In this case, the guest would configure stage-1 while > stage-2 translation is not used, so there is no additional isolation > enforced by Xen. This would only be intended for specific usecases with > trusted domains. But yes, this opens a significant hole if used with > untrusted guests. If there is no strong usecase, we could restrict the > implementation to always require stage-2. It is still unclear what would be the exact use-case. Is it a system where the SMMU doesn't support stage-2? Performance reason? Overall, I would rather not add any extra code in Xen without any strong use case. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sun May 24 11:16:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 11:16:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318628.1586756 (Exim 4.92) (envelope-from ) id 1wR6pB-0006Jc-1p; Sun, 24 May 2026 11:16:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318628.1586756; Sun, 24 May 2026 11:16:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR6pA-0006JV-Uo; Sun, 24 May 2026 11:16:52 +0000 Received: by outflank-mailman (input) for mailman id 1318628; Sun, 24 May 2026 11:16:51 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR6p9-0006JP-6l for xen-devel@lists.xenproject.org; Sun, 24 May 2026 11:16:51 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wR6p8-003ziy-2K; Sun, 24 May 2026 11:16:50 +0000 Received: from [2a02:8012:3a1:0:94ee:8228:5d9d:4ee8] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wR6p8-005QDS-1O; Sun, 24 May 2026 11:16:50 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=DpCjZi3SL0X921Oss3oqgK+DJOyDoHLLjH65p7XLZKo=; b=u8/gNR6zrOeRb5J+4G+ZjjCVbk MCetsK9hflHoiUFhe3tVU9ClF/EdSIES2hhndQccA1uAZNEj9LflLIS2LmWTI13oeoqphvQ1+Usz6 sEfFCl318UOgXvyjRK8CzxgFoqSrVD1XpE30pwujAEcz6nc15GvAfV6dg4rYwVTlqivE=; Message-ID: Date: Sun, 24 May 2026 12:16:47 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 05/23] xen/arm: vsmmuv3: Add dummy support for virtual SMMUv3 for guests Content-Language: en-GB To: Milan Djokic , "xen-devel@lists.xenproject.org" Cc: Rahul Singh , Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= References: <97aa20fdcec324bb58c6869ddcba5fcf29bf75b3.1774918270.git.milan_djokic@epam.com> <1dcec397-a265-4972-8f2c-fd10c6e0b6ad@xen.org> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Milan, On 03/05/2026 19:38, Milan Djokic wrote: > On 4/14/26 09:09, Julien Grall wrote: >>> diff --git a/xen/arch/arm/include/asm/viommu.h b/xen/arch/arm/ >>> include/asm/viommu.h >>> index 4598f543b8..2a6742de73 100644 >>> --- a/xen/arch/arm/include/asm/viommu.h >>> +++ b/xen/arch/arm/include/asm/viommu.h >>> @@ -5,9 +5,21 @@ >>>    #ifdef CONFIG_ARM_VIRTUAL_IOMMU >>>    #include >>> +#include >>>    #include >>>    #include >>> +extern struct list_head host_iommu_list; >>> + >>> +/* data structure for each hardware IOMMU */ >>> +struct host_iommu { >>> +    struct list_head entry; >>> +    const struct dt_device_node *dt_node; >>> +    paddr_t addr; >>> +    paddr_t size; >>> +    uint32_t irq; >> >> You don't seem to use ``irq`` in this patch. What is this meant to be >> used for? >> > > This field will be used for vIOMMU event queue creation for the hardware > domain in a later patch (xen/arm: vsmmuv3: Add support for event queue > and global error). The emulated IRQ and MMIO region for the hardware > domain vIOMMU will match those of the host IOMMU. I would prefer if this is introduced when you need it. [..] >>> diff --git a/xen/drivers/passthrough/arm/viommu.c b/xen/drivers/ >>> passthrough/arm/viommu.c >>> index 7ab6061e34..53ae46349a 100644 >>> --- a/xen/drivers/passthrough/arm/viommu.c >>> +++ b/xen/drivers/passthrough/arm/viommu.c >>> @@ -2,12 +2,42 @@ >>>    #include >>>    #include >>> +#include >>>    #include >>>    #include >>> +/* List of all host IOMMUs */ >>> +LIST_HEAD(host_iommu_list); >> >> I don't quite follow why this is part of the common code. That said, why >> do we need to register the host IOMMU? Wouldn't it be simpler to go >> through the list of pIOMMU in the vSMMU v3 implementation? >> > > ``host_iommu_list`` is part of the generic code to allow reuse for other > IOMMU types in the future. For example, it can be reused for Renesas > IPMMU, rather than duplicating it. > As for why we need to register IOMMUs, it seems more suitable to create > this list at initialization and add IOMMUs with the necessary properties > when the pIOMMU is probed. > We can't reuse the same list from the SMMU driver because vIOMMU needs > raw DT properties (address, size), which I don't think we can extract > from the host driver list. The IOMMU ABI is not fixed in Xen. It can be modified to fit the vIOMMU work. My main concern with the current approach is the list of information we may need will differ between IOMMUs and the information will need to be duplicated. So I am still not convinced this is the right way to have generic code. It would be better if we have callback to prepare the firmware table (and maybe mapping/irq) for a given SMMU. That said, it might be preferable to avoid any genericity until we actually know how this will be used by other virtual IOMMUs. >>>    const struct viommu_desc __read_mostly *cur_viommu; >>> +/* Common function for adding to host_iommu_list */ >>> +void add_to_host_iommu_list(paddr_t addr, paddr_t size, >>> +                            const struct dt_device_node *node) >> >> Is this supposed to only be called during __init? If so, this will help >> to justify the ... >> >>> +{ >>> +    struct host_iommu *iommu_data; >>> + >>> +    iommu_data = xzalloc(struct host_iommu); >>> +    if ( !iommu_data ) >>> +        panic("vIOMMU: Cannot allocate memory for host IOMMU data\n"); >> >> ... panic(). If not, then this function needs to return an error. >> > > Yes, this is called during init, on pIOMMU driver probe > (arm_smmu_device_probe()) > >>> + >>> +    iommu_data->addr = addr; >>> +    iommu_data->size = size; >>> +    iommu_data->dt_node = node; >>> +    iommu_data->irq = platform_get_irq(node, 0); >>> +    if ( iommu_data->irq < 0 ) >>> +    { >>> +        gdprintk(XENLOG_ERR, >>> +                 "vIOMMU: Cannot find a valid IOMMU irq\n"); >> >> Shouldn't you free the allocated memory? That said, why is it ok to >> ignore the vIOMMU in this case? >> > > Yes, this is missing. We ignore the host IOMMU with an invalid IRQ > because event queue emulation won't work in this case. What you are telling me is that the vIOMMU emulation doesn't support the event queue. However, if the OS is able to probe/use an SMMU without the IRQ then we should support it. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sun May 24 11:49:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 11:49:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318641.1586764 (Exim 4.92) (envelope-from ) id 1wR7KK-0002bR-Fy; Sun, 24 May 2026 11:49:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318641.1586764; Sun, 24 May 2026 11:49:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR7KK-0002bK-DU; Sun, 24 May 2026 11:49:04 +0000 Received: by outflank-mailman (input) for mailman id 1318641; Sun, 24 May 2026 11:49:03 +0000 Received: from mail.xenproject.org ([104.130.215.37]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wR7KJ-0002bE-Cu for xen-devel@lists.xenproject.org; Sun, 24 May 2026 11:49:03 +0000 Received: from xenbits.xenproject.org ([104.239.192.120]) by mail.xenproject.org with esmtp (Exim 4.96) (envelope-from ) id 1wR7KJ-0040IE-02; Sun, 24 May 2026 11:49:03 +0000 Received: from [2a02:8012:3a1:0:94ee:8228:5d9d:4ee8] by xenbits.xenproject.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256 (Exim 4.96) (envelope-from ) id 1wR7KI-005SVi-2f; Sun, 24 May 2026 11:49:02 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=xen.org; s=20200302mail; h=Content-Transfer-Encoding:Content-Type:In-Reply-To:From: References:Cc:To:Subject:MIME-Version:Date:Message-ID; bh=0sCDsEJ2c38OOthNnE62AdvHvXG+vDtuDbYcaiC5uL4=; b=ePyHE88Fn1ftJj505JQkIBUrLk qtLPOw6kpZILoEqg8ve9LvzKrKLQHE7Pd7J2ML0JqVNBwVK+cxTtn1GhiiBbrtcP63GjcJswlJhzK PabeeXT92a9/4ZZZKqFzfCB2dI1NAhYxhmSTdCYDHFxStWZBGcJ/sGDwAS1VgNEN86iU=; Message-ID: <648f587f-8621-472d-9b2c-e88fe11444a4@xen.org> Date: Sun, 24 May 2026 12:49:01 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 08/23] xen/arm: vsmmuv3: Add support for registers emulation Content-Language: en-GB To: Milan Djokic , "xen-devel@lists.xenproject.org" Cc: Rahul Singh , Stefano Stabellini , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk References: <25adb33c4be3932c2d946cf7757c933eb042476c.1774918270.git.milan_djokic@epam.com> <6d1806aa-b009-407a-9a7a-476f9f4deb70@xen.org> From: Julien Grall In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Hi Milan, On 18/05/2026 01:17, Milan Djokic wrote: > Hi Julien, > > On 4/14/26 10:10, Julien Grall wrote: >> Hi Milan, >> >> On 31/03/2026 10:52, Milan Djokic wrote: >>> From: Rahul Singh >>> >>> Add initial support for various emulated registers for virtual SMMUv3 >>> for guests and also add support for virtual cmdq and eventq. >>> >>> Signed-off-by: Rahul Singh >>> Signed-off-by: Milan Djokic >>> --- >>>    xen/drivers/passthrough/arm/smmu-v3.h  |   6 + >>>    xen/drivers/passthrough/arm/vsmmu-v3.c | 286 +++++++++++++++++++++ >>> ++++ >>>    2 files changed, 292 insertions(+) >>> >>> diff --git a/xen/drivers/passthrough/arm/smmu-v3.h b/xen/drivers/ >>> passthrough/arm/smmu-v3.h >>> index 3fb13b7e21..fab4fd5a26 100644 >>> --- a/xen/drivers/passthrough/arm/smmu-v3.h >>> +++ b/xen/drivers/passthrough/arm/smmu-v3.h >>> @@ -60,6 +60,12 @@ >>>    #define IDR5_VAX            GENMASK(11, 10) >>>    #define IDR5_VAX_52_BIT            1 >>> +#define ARM_SMMU_IIDR            0x18 >>> +#define IIDR_PRODUCTID            GENMASK(31, 20) >>> +#define IIDR_VARIANT            GENMASK(19, 16) >>> +#define IIDR_REVISION            GENMASK(15, 12) >>> +#define IIDR_IMPLEMENTER        GENMASK(11, 0) >>> + >>>    #define ARM_SMMU_CR0            0x20 >>>    #define CR0_ATSCHK            (1 << 4) >>>    #define CR0_CMDQEN            (1 << 3) >>> diff --git a/xen/drivers/passthrough/arm/vsmmu-v3.c b/xen/drivers/ >>> passthrough/arm/vsmmu-v3.c >>> index e36f200ba5..3ae1e62a50 100644 >>> --- a/xen/drivers/passthrough/arm/vsmmu-v3.c >>> +++ b/xen/drivers/passthrough/arm/vsmmu-v3.c >>> @@ -3,25 +3,307 @@ >>>    #include >>>    #include >>>    #include >>> +#include >> >> vgic-emul.h is intended to only be used in the vGIC code. I am fine if >> you want to use it in vsmmu-v3.c but it needs to be renamed. Maybe to >> vdev-emul.h. >> > > Sure, I'll rename it > >>>    #include >>> +#include >>> + >>> +#include "smmu-v3.h" >>> + >>> +/* Register Definition */ >>> +#define ARM_SMMU_IDR2       0x8 >>> +#define ARM_SMMU_IDR3       0xc >>> +#define ARM_SMMU_IDR4       0x10 >>> +#define IDR0_TERM_MODEL     (1 << 26) >>> +#define IDR3_RIL            (1 << 10) >>> +#define CR0_RESERVED        0xFFFFFC20 >> >> AFAIU, this is covering all the bits defined by the SMMU spec. But some >> of them are optional. Does this mean we will expose those optional >> features? >> > > Right now only mandatory features are supported (SMMU_EN, CMDQ, EVTQ). > Most of the optional features are not advertised in the IDR registers, > so guests are not expected to enable or use them via CR0. Guests are not trusted by default. So what is the guest tries to set them? > > >>> +#define SMMU_IDR1_SIDSIZE   16 >>> +#define SMMU_CMDQS          19 >> >> Can you add some details how you decided the size of the command and ... >> >>> +#define SMMU_EVTQS          19 >> >> ... even queues? >> > > The CMDQ/EVTQ sizes are currently set to the architectural maximum. > Since there is no direct dependency on the underlying hardware queue > sizes, using the maximum supported value seemed like the simplest option. > >>> +#define DWORDS_BYTES        8 >>> +#define ARM_SMMU_IIDR_VAL   0x12 >> >> I am not sure which implementer this is referring to. But how do you >> plan to handle errata? Are we sure they can always be handled by Xen? >> > > This is currently a dummy value used to avoid triggering guest driver > errata/quirk paths. I will replace it with a more meaningful value. > Using the Arm implementer ID with the remaining fields cleared should be > sufficient. I am not sure to understand why would that value be unused. Do you have more details? > > My expectation is that errata handling should remain in Xen rather than > the guest. I am not fully convinced you will be able to apply all the errata in the hypervisor. At least with close to no cost. [...] >>>    /* Struct to hold the vIOMMU ops and vIOMMU type */ >>>    extern const struct viommu_desc __read_mostly *cur_viommu; >>> +/* virtual smmu queue */ >>> +struct arm_vsmmu_queue { >>> +    uint64_t    q_base; /* base register */ >>> +    uint32_t    prod; >>> +    uint32_t    cons; >>> +    uint8_t     ent_size; >>> +    uint8_t     max_n_shift; >>> +}; >>> + >>>    struct virt_smmu { >>>        struct      domain *d; >>>        struct      list_head viommu_list; >>> +    uint8_t     sid_split; >>> +    uint32_t    features; >>> +    uint32_t    cr[3]; >>> +    uint32_t    cr0ack; >>> +    uint32_t    gerror; >>> +    uint32_t    gerrorn; >>> +    uint32_t    strtab_base_cfg; >>> +    uint64_t    strtab_base; >>> +    uint32_t    irq_ctrl; >>> +    uint64_t    gerror_irq_cfg0; >>> +    uint64_t    evtq_irq_cfg0; >>> +    struct      arm_vsmmu_queue evtq, cmdq; >>>    }; >>>    static int vsmmuv3_mmio_write(struct vcpu *v, mmio_info_t *info, >>>                                  register_t r, void *priv) >>>    { >>> +    struct virt_smmu *smmu = priv; >>> +    uint64_t reg; >>> +    uint32_t reg32; >> >> Looking at this helper and the read one, I am bit surprised there is no >> lock taken nor we check the access size.  Can you explain why? >> >> For instance, we should not allow 64-bit access on 32-bit register. The >> rest of the size (8-bit and 16-bit) is IMP DEFINED so it may be easier >> just not allow them. >> > > Most of the configuration registers are expected to be accessed in a > serialized manner by the guest driver, during driver initialization. I am afraid we can't trust the guest to do the right thing... So we need to make sure this could not lead to an invalid state in the emulation. Furthermore, on baremetal, when a two pCPUs are trying to write to the same address, you will be able to see value A or value B but not a mix. Without a lock, I don't believe this is upheld in your implementation. [...] >> NIT: The vIOMMU is per-domain so it is sufficient to print "%pd". >> >>> +               v, info->dabt.reg, (unsigned long)info->gpa & 0xffff); >>> +        return IO_ABORT; >> >> Per section 6 of the SMMU: >> >> " >> For all pages except Page 1, undefined register locations are RES0. For >> Page 1, access to undefined/Reserved >> register locations is CONSTRAINED UNPREDICTABLE and an implementation >> has one of the following behaviors: >> [...] >> " >> >> Here you seem to implement page0 so the default case should be write >> ignore and therefore IO_HANDLED should be returned. BTW, you don't seem >> to handle page1. Is this going to be handled later on? >> > >   From page1, right now only EVTQ registers are emulated. PRI is not > supported, but might be needed in the future for the PCI support (PRI > queue registers also belong to page1, but not emulated atm) > So I think that page1 will be handled when PCI support is completed. I am a bit confused with this answer. Are you saying you will handle page1 for the event queue register in another patch in this series? > >>> +    } >>> + >>>        return IO_HANDLED; >>>    } >>>    static int vsmmuv3_mmio_read(struct vcpu *v, mmio_info_t *info, >>>                                 register_t *r, void *priv) >>>    { >>> +    struct virt_smmu *smmu = priv; >>> +    uint64_t reg; >>> + >>> +    switch ( info->gpa & 0xffff ) >>> +    { >>> +    case VREG32(ARM_SMMU_IDR0): >>> +        reg  = FIELD_PREP(IDR0_S1P, 1) | FIELD_PREP(IDR0_TTF, 2) | >> >> As the page-table will be used by the HW, shouldn't TTF reflect what the >> HW supports? This would allow the vIOMMU to work for 32-bit domains. >> > > If my understanding is correct, Xen SMMU driver only supports AArch64 > table format, so I think that we can't advertise 32-bit table format in > the emulation layer even if the hardware supports it. Do you mind pointing me to the code? The page-tables are shared between the SMMU and the CPU. So we ought to support both. Cheers, -- Julien Grall From xen-devel-bounces@lists.xenproject.org Sun May 24 15:22:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 15:22:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318719.1586773 (Exim 4.92) (envelope-from ) id 1wRAep-0005qJ-GV; Sun, 24 May 2026 15:22:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1318719.1586773; Sun, 24 May 2026 15:22:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRAep-0005qC-Dm; Sun, 24 May 2026 15:22:27 +0000 Received: by outflank-mailman (input) for mailman id 1318719; Sun, 24 May 2026 15:22:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRAen-0005q4-RC for xen-devel@lists.xenproject.org; Sun, 24 May 2026 15:22:25 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRAen-00BQUy-7G for xen-devel@lists.xenproject.org; Sun, 24 May 2026 17:22:25 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a13176d-bab6-0a2a0a5309dd-0a2a450bc806-26 for ; Sun, 24 May 2026 17:22:25 +0200 Received: from [209.85.128.53] (helo=mail-wm1-f53.google.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1317b0-212f-0a2a450b0019-d1558035b0d9-3 for ; Sun, 24 May 2026 17:22:25 +0200 Received: by mail-wm1-f53.google.com with SMTP id 5b1f17b1804b1-49039a8851fso32451765e9.2 for ; Sun, 24 May 2026 08:22:24 -0700 (PDT) Received: from ?IPV6:2003:ca:b727:851f:6065:3b2:383f:b228? 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260524000209.292370-8-taka@valinux.co.jp> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-42698a/1779636145-20479F3B-75FB875E/0/0 X-purgate-type: clean X-purgate-size: 1874 On 24.05.2026 02:01, Hirokazu Takahashi wrote: > Parse the 'cpu-map' node in the Device Tree to extract CPU topology > information. If the 'cpu-map' node is absent, fall back to > generating the topology data from the NUMA information. This > generation assumes exactly one socket per NUMA node and that SMT > is unsupported. > --- > xen/arch/arm/smpboot.c | 6 + > xen/common/Kconfig | 7 + > xen/common/device-tree/Makefile | 1 + > xen/common/device-tree/cpu_topology.c | 307 ++++++++++++++++++++++++++ > xen/include/xen/cpu_topology.h | 42 ++++ > 5 files changed, 363 insertions(+) > create mode 100644 xen/common/device-tree/cpu_topology.c > create mode 100644 xen/include/xen/cpu_topology.h Nit: New files' names want to use dashes in favor of underscores. > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -188,6 +188,13 @@ config VM_EVENT > config NEEDS_LIBELF > bool > > +config DT_CPU_TOPOLOGY > + bool "Device tree based CPU topology support (UNSUPPORTED)" if UNSUPPORTED && ARM Instead of open-coding ARM here (and also in patch 03), please consider using another ... > + depends on HAS_DEVICE_TREE_DISCOVERY ... HAS_*, just like you make use of an existing one here. > --- a/xen/common/device-tree/Makefile > +++ b/xen/common/device-tree/Makefile > @@ -11,4 +11,5 @@ obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += kernel.o > obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o > obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o > obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o > +obj-$(CONFIG_DT_CPU_TOPOLOGY) += cpu_topology.o > obj-$(CONFIG_DEVICE_TREE_NUMA) += numa.o Again for here and (apparently) an earlier patch in the series: This file looks to be sorted alphabetically. Please don't blindly add to the end. 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keydata= xsDiBFk3nEQRBADAEaSw6zC/EJkiwGPXbWtPxl2xCdSoeepS07jW8UgcHNurfHvUzogEq5xk hu507c3BarVjyWCJOylMNR98Yd8VqD9UfmX0Hb8/BrA+Hl6/DB/eqGptrf4BSRwcZQM32aZK 7Pj2XbGWIUrZrd70x1eAP9QE3P79Y2oLrsCgbZJfEwCgvz9JjGmQqQkRiTVzlZVCJYcyGGsD /0tbFCzD2h20ahe8rC1gbb3K3qk+LpBtvjBu1RY9drYk0NymiGbJWZgab6t1jM7sk2vuf0Py O9Hf9XBmK0uE9IgMaiCpc32XV9oASz6UJebwkX+zF2jG5I1BfnO9g7KlotcA/v5ClMjgo6Gl MDY4HxoSRu3i1cqqSDtVlt+AOVBJBACrZcnHAUSuCXBPy0jOlBhxPqRWv6ND4c9PH1xjQ3NP nxJuMBS8rnNg22uyfAgmBKNLpLgAGVRMZGaGoJObGf72s6TeIqKJo/LtggAS9qAUiuKVnygo 3wjfkS9A3DRO+SpU7JqWdsveeIQyeyEJ/8PTowmSQLakF+3fote9ybzd880fSmFuIEJldWxp Y2ggPGpiZXVsaWNoQHN1c2UuY29tPsJgBBMRAgAgBQJZN5xEAhsDBgsJCAcDAgQVAggDBBYC AwECHgECF4AACgkQoDSui/t3IH4J+wCfQ5jHdEjCRHj23O/5ttg9r9OIruwAn3103WUITZee e7Sbg12UgcQ5lv7SzsFNBFk3nEQQCACCuTjCjFOUdi5Nm244F+78kLghRcin/awv+IrTcIWF hUpSs1Y91iQQ7KItirz5uwCPlwejSJDQJLIS+QtJHaXDXeV6NI0Uef1hP20+y8qydDiVkv6l IreXjTb7DvksRgJNvCkWtYnlS3mYvQ9NzS9PhyALWbXnH6sIJd2O9lKS1Mrfq+y0IXCP10eS FFGg+Av3IQeFatkJAyju0PPthyTqxSI4lZYuJVPknzgaeuJv/2NccrPvmeDg6Coe7ZIeQ8Yj t0ARxu2xytAkkLCel1Lz1WLmwLstV30g80nkgZf/wr+/BXJW/oIvRlonUkxv+IbBM3dX2OV8 AmRv1ySWPTP7AAMFB/9PQK/VtlNUJvg8GXj9ootzrteGfVZVVT4XBJkfwBcpC/XcPzldjv+3 HYudvpdNK3lLujXeA5fLOH+Z/G9WBc5pFVSMocI71I8bT8lIAzreg0WvkWg5V2WZsUMlnDL9 mpwIGFhlbM3gfDMs7MPMu8YQRFVdUvtSpaAs8OFfGQ0ia3LGZcjA6Ik2+xcqscEJzNH+qh8V m5jjp28yZgaqTaRbg3M/+MTbMpicpZuqF4rnB0AQD12/3BNWDR6bmh+EkYSMcEIpQmBM51qM EKYTQGybRCjpnKHGOxG0rfFY1085mBDZCH5Kx0cl0HVJuQKC+dV2ZY5AqjcKwAxpE75MLFkr wkkEGBECAAkFAlk3nEQCGwwACgkQoDSui/t3IH7nnwCfcJWUDUFKdCsBH/E5d+0ZnMQi+G0A nAuWpQkjM1ASeQwSHEeAWPgskBQL In-Reply-To: <20260524000209.292370-9-taka@valinux.co.jp> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-4011c0/1779636285-7357C8B7-2B499D98/0/0 X-purgate-type: clean X-purgate-size: 542 On 24.05.2026 02:01, Hirokazu Takahashi wrote: > --- a/xen/include/xen/cpu_topology.h > +++ b/xen/include/xen/cpu_topology.h > @@ -14,6 +14,9 @@ struct cpu_topology { > cpumask_t thread_sibling; > cpumask_t core_sibling; > cpumask_t cluster_sibling; > + int to_core; > + int to_socket; > + int num_siblings; > }; What significance do the to_ prefixes have here? And what's the meaning of any of the fields holding negative values? (If they can't hold negative values, use unsigned int please.) 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0ae133a2-a225-48be-a415-08deb9d291e8 X-MS-Exchange-CrossTenant-originalarrivaltime: 24 May 2026 20:25:17.5034 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: q5xIqHbX+21HprsdDVRbyPOqdYrysRRYBrua/QggjyUtNDlfsjjCxCEdV0PwW2pjDNe9iAq81glqziesMEo2yH1FbiL8tUC7tfKJtGiM1Kg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAVPR03MB9139 X-purgate-ID: tlsNG-16d1c6/1779654321-8C47CD75-EA14523E/0/0 X-purgate-type: clean X-purgate-size: 1690 Convert 'free' macro in 'decompress.h' from object-like to function-like form. The object-like macro '#define free xfree' performs unconditional text replacement, causing conflicts with identifiers named 'free', such as struct fields in 'page_info' unions defined in 'xen/arch/arm/include/asm/mm= .h'. Function-like macros only match when followed by parentheses, allowing 'free' to be used both as a macro and as a struct field without conflicts. Applying function-like form to 'malloc', 'large_malloc' and 'large_free' ensures consistent macro style. Function-like macros also intentionally prevent uses where the underlying function identifier is needed directly, such as taking a function pointer. No such uses exist in the current Xen codebase. Signed-off-by: Dmytro Prokopchuk --- Changes in v2: - converted other macros for consistency - updated commit message wording Link to v1: https://patchew.org/Xen/69ef81a2f85b35e6231ae389bf271cad2bbd7dfc.1779394622= .git.dmytro._5Fprokopchuk1@epam.com/ --- xen/common/decompress.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/common/decompress.h b/xen/common/decompress.h index 034c833665..487856e1bc 100644 --- a/xen/common/decompress.h +++ b/xen/common/decompress.h @@ -9,11 +9,11 @@ #include #include =20 -#define malloc xmalloc_bytes -#define free xfree +#define malloc(a) xmalloc_bytes(a) +#define free(a) xfree(a) =20 -#define large_malloc xmalloc_bytes -#define large_free xfree +#define large_malloc(a) xmalloc_bytes(a) +#define large_free(a) xfree(a) =20 #else =20 --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 24 20:34:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 24 May 2026 20:34:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1318873.1586802 (Exim 4.92) (envelope-from ) id 1wRFWV-0005aB-Jn; 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pr=C Message-ID: <0db37c10-b920-4d9d-9453-18f820e6d093@amd.com> Date: Mon, 25 May 2026 09:35:04 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH] device-tree: size first hwdom bank for boot modules To: Mykola Kvach , CC: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Daniel P. Smith" References: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00002316:EE_|MN0PR12MB6198:EE_ X-MS-Office365-Filtering-Correlation-Id: e60f1b6b-f079-41f2-6fe2-08deba30288c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|7416014|376014|1800799024|82310400026|18002099003|56012099003|22082099003|5023799004|11063799006; X-Microsoft-Antispam-Message-Info: FYvt/uM4a5MGpAueyFh3Sc7ihFhjRdJWAY1qNXr8jmj2Ap6yYAfuswgfZ/mmnWeHZ3e5RXOtHwhESqRFL6iUyU9adYTHWNr88ZRY2cNds/lSHoP7AOXudojtQVOteQemTMDFDNBL4OlgF+BNMEHW6UWMdrRHB4g2j1RJXVtJVw0gtz5trR869YjHPePNr0fNuw77akYOh07Y1QOuE/m9vXenKjdfk1YONeaJzKTuZFTWQOSGPmMf9uVAFYq0sVUVUcos9LH1M52Fug/sQCeSPdpWJzm9AQw2SlPmk+8Qg6/cngTaKHwIUGZWIJZIjHurdb7liOEQFO8X7BbDjgcXCjhOg+xF+wZg1H17y5FgnMgU6JzoBIT7Bk0zuoEizAphM5bTeOBVaxjpqwLP0/427btoxQ3FkV2oSyQ+HJI5GBk8AwDZClyptJzJ+LzBgzbrom0bBxWA5062IH0+NhJhZSma2aiNdmLWwCxjSvOcj6NaEz686aLgQc7cniIlIMU/npxGabr4LnJqmI2Kp8+NGaJ+M3f/fF9D1SphF72mMyARWhccHtaNEP8azYNfcoD4+VP9qq5I9sUtQpgIjlG5weGXxBUUb0K0UNjzaBlSpvF6SqEII+g2atmVh5MiWj9WTStAPcdLtsdJbJnGnHqBQiH8GUC8am3gZZp/PqxTIGNV6p2yQf+Y1cnu2oZBgBF6bKiSLyzQrJUp5RLH1WfosrWJ0zgNkXlsTiPTfFj8V8c= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(7416014)(376014)(1800799024)(82310400026)(18002099003)(56012099003)(22082099003)(5023799004)(11063799006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rCPl0twHbZcKbZ0RwSejhSLsn4mI2Wmu5GEhpDy0aK5FgUot6ONMPl1aJcn8Cmfy76fv+D2oVHIvs0nWadZamUDK/3IaUWowple8ufQmifPtxMAXq3xUL+Tr/FejfvRq/DYD7BuaBbiqMopAxTyo/rQnWw18vpAwEe1CkMG0FLhudjqCan8fFw6Gp9g+V/8jTR8RiTjJ7WVAaLEMGKaYzg6mOc39GoMjT3ItDjbChDxFnuIZdly5YbF/2khhjUFHEyFOuFGVhQmp+TjvIqWO0QLNhwYOke1D+1MiWB160HX9jwW/leK3Rw9/a8F7PDmesF/kdsGD5ofs8Aj1nQchZezR1I/fc5Qc6V6r6qxurCQp9v1wolJpCmj9984fkY7LSUvyl4vRpofXy03SHc6gc+6Y0YPa7PrcBjdphfp9IbHEewLWCc8cZhNuJO70ab02 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2026 07:35:13.3330 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e60f1b6b-f079-41f2-6fe2-08deba30288c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002316.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6198 X-purgate-ID: tlsNG-c201ff/1779694522-D8D7F443-0C2D15C1/0/0 X-purgate-type: clean X-purgate-size: 11927 On 17-May-26 22:57, Mykola Kvach wrote: > From: Mykola Kvach > > With LLC coloring enabled, the hardware domain memory comes from > allocate_hwdom_memory(), not from the fixed direct-map banks used when > coloring is off. > > Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for > DMA") made that allocator sort free host regions by ascending address so > Dom0 gets DMA-capable low memory first. The first bank filter still only > required 128MB. That can select a low region which is large enough for > the heuristic, but not large enough for place_modules() to put the Dom0 Don't mention dom0 given that this is purely hwdom path. > kernel, generated DTB and initrd contiguously in bank 0. > > Ask arch code for any additional first-bank size requirement. On Arm, > compute it from the actual Dom0 kernel placement, rounded initrd size and > generated DTB size hint. For 64-bit Image kernels, include the text offset > from the candidate bank start, because the returned requirement is compared > with a bank size measured from that start. The hint covers both the normal > Device Tree path and the minimal DTB created for ACPI boot. > > Check the first-bank threshold against the size which will actually be > assigned to Dom0, after capping the host region by the remaining unassigned > Dom0 memory. Otherwise a large host region could pass the test but still > produce a first guest bank too small for place_modules(). > > Use the typed min()/max() helpers for this normal allocation arithmetic; > MIN()/MAX() are intended for preprocessor-style contexts and skip the type > checking provided by the lowercase helpers. > > This keeps the DMA-oriented allocation policy from de99f3263555 while > preventing a too-small bank 0 from reaching place_modules(). > > Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") > Signed-off-by: Mykola Kvach > --- > Test/setup notes: > > The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) > arm64 board booted through U-Boot/TFTP and using huge initrd. > > Relevant Xen command line excerpt: > dom0_mem=2048M llc-coloring=on > > Boot module layout from Xen: > MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk > MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel > MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy > > The initrd is about 168MB. With LLC coloring enabled and the low-address > allocation policy from de99f3263555, Dom0 can receive a 192MB first bank: > d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) > > That bank satisfies the old 128MB minimum but is too small for the > rounded Dom0 kernel, generated DTB and initrd placement. The observed > failure before this patch was: > Panic on CPU 0: > Not enough memory in the first bank for the kernel+dtb+initrd > > With this patch, the same boot skips the too-small low region for bank 0 > and reaches Dom0: > d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) > d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) > d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) > d0: extended region 0: 0x48000000->0x54000000 > Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 > Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 > Loading d0 DTB to 0x5f000000-0x5f011c80 > Linux version 5.10.194-yocto-standard > --- > xen/arch/arm/acpi/domain_build.c | 2 -- > xen/arch/arm/domain_build.c | 8 ++++++ > xen/arch/arm/include/asm/domain_build.h | 4 +++ > xen/arch/arm/include/asm/kernel.h | 8 ++++++ > xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ > xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- > xen/include/xen/fdt-kernel.h | 8 ++++++ > 7 files changed, 83 insertions(+), 9 deletions(-) > > diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c > index 249d899c33..db16f7fa94 100644 > --- a/xen/arch/arm/acpi/domain_build.c > +++ b/xen/arch/arm/acpi/domain_build.c > @@ -26,8 +26,6 @@ > #undef virt_to_mfn > #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) > > -#define ACPI_DOM0_FDT_MIN_SIZE 4096 > - > static int __init acpi_iomem_deny_access(struct domain *d) > { > acpi_status status; > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > index 1efddc60ef..226e053c68 100644 > --- a/xen/arch/arm/domain_build.c > +++ b/xen/arch/arm/domain_build.c > @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, const char *e) > (IS_ENABLED(CONFIG_STATIC_SHM) ? \ > (NR_SHMEM_BANKS * (160 + 16)) : 0)) > > +paddr_t __init dom0_get_fdt_size_hint(void) > +{ > + if ( !acpi_disabled ) > + return ACPI_DOM0_FDT_MIN_SIZE; > + > + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; > +} > + > unsigned int __init dom0_max_vcpus(void) > { > if ( opt_dom0_max_vcpus == 0 ) > diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h > index df8b361b3d..45687c5d6f 100644 > --- a/xen/arch/arm/include/asm/domain_build.h > +++ b/xen/arch/arm/include/asm/domain_build.h > @@ -19,6 +19,10 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); > > int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); > > +#define ACPI_DOM0_FDT_MIN_SIZE 4096 > + > +paddr_t dom0_get_fdt_size_hint(void); > + > #if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > /* Utility function to determine if an Armv8-R processor supports VMSA. */ > bool has_v8r_vmsa_support(void); > diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h > index 21f4273fa1..17c5b9bce4 100644 > --- a/xen/arch/arm/include/asm/kernel.h > +++ b/xen/arch/arm/include/asm/kernel.h > @@ -8,12 +8,20 @@ > > #include > > +#include > + > +struct kernel_info; > + > struct arch_kernel_info > { > /* Enable pl011 emulation */ > bool vpl011; > }; > > +#define arch_get_min_first_bank_size arch_get_min_first_bank_size > +paddr_t arch_get_min_first_bank_size(struct kernel_info *info, > + paddr_t bank_start); > + > #endif /* #ifdef __ARCH_ARM_KERNEL_H__ */ > > /* > diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c > index b72585b7fe..3644663e2f 100644 > --- a/xen/arch/arm/kernel.c > +++ b/xen/arch/arm/kernel.c > @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) > return load_addr; > } > > +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t len) > +{ > + return ROUNDUP(load_addr + len, MB(2)) - load_addr; Used from one site. place_modules() open-codes the same expression; the CONFIG_HAS_DOMAIN_TYPE branch below is kernel_placement_size(load_addr, len) + text_offset. Either drop the helper or use it consistently. > +} > + > +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, info is RO, so const please. > + paddr_t bank_start) > +{ > + const struct boot_module *mod = info->bd.initrd; Why mod instead of initrd? - choose more meaningful names > + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); It would be nice to explain why 2MB, at least to say that it mirrors place_modules rounding. > + const paddr_t dtb_len = ROUNDUP(dom0_get_fdt_size_hint(), MB(2)); > + paddr_t kernsize; > + > +#ifdef CONFIG_HAS_DOMAIN_TYPE > + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) > + { > + paddr_t load_addr = bank_start + info->image.text_offset; > + > + /* > + * The caller compares this value with a size measured from > + * bank_start, so include the text offset before the kernel. The comment belongs above the load_addr line above. > + */ > + kernsize = ROUNDUP(load_addr + info->image.len, MB(2)) - bank_start; > + return kernsize + initrd_len + dtb_len; Could it be written as: info->image.text_offset + kernel_placement_size(load_addr, info->image.len) > + } > +#endif > + > + if ( info->image.start == 0 ) > + kernsize = ROUNDUP(info->image.len, MB(2)); > + else > + kernsize = kernel_placement_size(info->image.start, info->image.len); This could be written as a single expression, no need for if/else: kernsize = kernel_placement_size(info->image.start, info->image.len); > + > + return kernsize + initrd_len + dtb_len; > +} > + > static void __init kernel_zimage_load(struct kernel_info *info) > { > paddr_t load_addr = kernel_zimage_place(info); > diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c > index 2a760b007b..d8865db259 100644 > --- a/xen/common/device-tree/domain-build.c > +++ b/xen/common/device-tree/domain-build.c > @@ -299,20 +299,33 @@ static bool __init allocate_hwdom_memory(struct kernel_info *kinfo) > > for ( i = 0; (kinfo->unassigned_mem > 0) && (i < nr_banks); i++ ) > { > - paddr_t bank_size; > + const paddr_t bank_start = hwdom_free_mem->bank[i].start; > + paddr_t bank_size = hwdom_free_mem->bank[i].size; > + > + /* > + * Check the size that would actually be assigned, not just the size > + * of the host region. > + */ > + bank_size = min(bank_size, kinfo->unassigned_mem); > > /* > * The first bank must be large enough for place_modules() to > * fit the kernel, DTB and initrd. Skip small regions to avoid > * ending up with a tiny first bank. > */ > - if ( !mem->nr_banks && (hwdom_free_mem->bank[i].size < min_bank_size) ) > - continue; > + if ( !mem->nr_banks ) > + { > + paddr_t arch_min_size; > + paddr_t required_first_bank_size; > + > + arch_min_size = arch_get_min_first_bank_size(kinfo, bank_start); > + required_first_bank_size = max(min_bank_size, arch_min_size); > + > + if ( bank_size < required_first_bank_size ) > + continue; > + } > > - bank_size = MIN(hwdom_free_mem->bank[i].size, kinfo->unassigned_mem); > - if ( !allocate_bank_memory(kinfo, > - gaddr_to_gfn(hwdom_free_mem->bank[i].start), > - bank_size) ) > + if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), bank_size) ) > { > xfree(hwdom_free_mem); > return false; > diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h > index 8cd1670c2c..931b3e1686 100644 > --- a/xen/include/xen/fdt-kernel.h > +++ b/xen/include/xen/fdt-kernel.h > @@ -86,6 +86,14 @@ kernel_info_get_mem_const(const struct kernel_info *kinfo) > return container_of(&kinfo->mem.common, const struct membanks, common); > } > > +#ifndef arch_get_min_first_bank_size > +static inline paddr_t arch_get_min_first_bank_size(struct kernel_info *info, > + paddr_t bank_start) > +{ > + return 0; > +} > +#endif > + > #ifndef KERNEL_INFO_SHM_MEM_INIT > > #ifdef CONFIG_STATIC_SHM As for the upstream CI test, we should start with more generic tests that we are missing (like regular LLC boot) before thinking of covering more granular scenarios. Also, in the past we agreed on first covering the supported features before adding tests for unsupported ones. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 25 09:46:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 09:46:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319106.1586828 (Exim 4.92) (envelope-from ) id 1wRRt8-0006ob-Q4; Mon, 25 May 2026 09:46:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319106.1586828; Mon, 25 May 2026 09:46:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRRt8-0006oT-KO; Mon, 25 May 2026 09:46:22 +0000 Received: by outflank-mailman (input) for mailman id 1319106; Mon, 25 May 2026 09:46:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRRt7-0006oN-Oc for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 25 May 2026 11:46:09 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 1/2] xen/arm: propagate vGIC vCPU init failures To: Mykola Kvach , CC: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit Received-SPF: None (SATLEXMB03.amd.com: michal.orzel@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB77:EE_|PH7PR12MB7019:EE_ X-MS-Office365-Filtering-Correlation-Id: 03e0c321-ecd9-48f6-103b-08deba427488 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|82310400026|376014|36860700016|11063799006|4143699003|18002099003|56012099003|22082099003; X-Microsoft-Antispam-Message-Info: OWm+kH/uliS3Xgl4bs50dxnEshSbl4SFo3dx2dCvpGZREUtQ5XTseqTxkhGw9bl8k/htblkVzMq/RiSN4uob1v6UQJnuekxR9Jh/vE3KyDX3bSOx5OrvkZ0+n768coduYPKyFzaTWQEzStOc1eeKPuoqqubEVfjSUgAFQ8u2R6og/ZHAlM18MIzZ5PIyUTGTkW0zREVpqapr+ehW5idOte9DU9NTfORmMmjksZmhbRQQd23SZYeBDj0GI2hRJZMfj0HYPcSS4zD5bzG1mlu9JdB/UjPaOOYuf+krzYLPbtJhD3GxFYsgRi3jmBhIVI1OuHiAvWdcLWvOoLW13/WAc3FeWTe4qXO2Eql1buYEZXx655zNxYXCsTcTbho+RwwioppjQ68oDM/Z73W+YF5kK8AN2ZXWld8Inzm99QQT7/wuY7y1RqZqPB841zpmYsZKexWcpPUxA5Q71WSZPSz3+Gk0oyS0yPy+SfBzyDfUg4u0msZexJTHkeRo7qDTGaV8FRjyksyjP/Dc/WwFR8urUmJyB9ntcYOD2/NhBoqVxP3nC7dKKGA6XJ0sgiGlmPuJqiWGP3dEZswAFZiJkzlR3rNQX+hkNDEPNJ7Mdfd7s2TZFS+TriObPFpxba6n+1CRTjwEVVXJ979PLZkvu3gw4VKZBoh9L7+T7rcflSTlBh41T73G8rRCeL+HAqknVePAlqNeA8YNJ4L8CeYfeO8y4JYaeH5W7BZtExDy24r/5mQ= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(376014)(36860700016)(11063799006)(4143699003)(18002099003)(56012099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UdKRs0PsG0bHIo36GTWinbO+buMG9WNAOb2rEG5mXmSUDKCVWGhWt30Z6NGMuRDEgpHSxq7a5zA+sC/Aq7IiyiCCfqkveY2gjvbL8xz06Zo2qKLqY9lAM705ygBfp67PRzA0QdXZGJZqmW3lFGPxcxTGBl8q9TO+1E1ZelKEg1V8vALXPyeVpqlT6ACeaVswcyXFsLtPs0S3K+SYAZ+eFjfLtFaZhhF4kq6DQE3Rk8HYbMpGqTw8Xj4fjanJ4Dek5qztPdAoqYoGH6+dWxeAQSSp49kL8D8tW4yk6fIwD7cHATeBPa5rdX55RClDFtVVhftZEglFJbv00I1xAkQRGJqFAB0BKa0LdpGKDtvzFzFry6+jAoHcGueXAguw87EbqDVICqY5O59iU2fjiSw+WL/owkidvH+nR3zdqiGPKyfWuykrwrvmzpmyY2FA4ccB X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2026 09:46:11.8427 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 03e0c321-ecd9-48f6-103b-08deba427488 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB77.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7019 X-purgate-ID: tlsNG-720697/1779702380-80145161-1FB4BEB6/0/0 X-purgate-type: clean X-purgate-size: 5795 On 22-May-26 08:18, Mykola Kvach wrote: > From: Mykola Kvach > > The vGIC per-vCPU init callback can fail. In particular, GICv3 rejects > a vCPU when the domain's redistributor layout has no MMIO slot covering > that vCPU. However, the generic vGIC init path ignored the callback > return value, so vcpu_create() could succeed with an invalid vGICv3 > per-vCPU state. > > This can be reproduced on FVP Base RevC by exposing a 2 MiB GICv3 > redistributor region to Dom0 and booting Xen with: > > maxcpus=1 dom0_max_vcpus=64 > > The host GICv3 redistributor range is: > > region 0: 0x0000002f100000 - 0x0000002f300000 > > With Xen's guest redistributor frame size of 128 KiB, that range covers > 16 guest redistributors. vCPU16 and above have no corresponding > redistributor slot. > > Before this fix, Xen detected the missing redistributors: > > d0: Unable to find a re-distributor for VCPU 16 > ... > d0: Unable to find a re-distributor for VCPU 63 > > but ignored the error and continued as if the secondary vCPUs had been > created correctly. Dom0 then saw 64 possible CPUs and could hang during > secondary CPU bring-up: > > smp: Bringing up secondary CPUs ... > d0v15: vGICR: SGI: unhandled word write ... to ICACTIVER0 > > Propagate the vGIC vcpu_init() error so the caller can stop creating > secondary vCPUs. With this fix, Dom0 construction reports: > > d0: Unable to find a re-distributor for VCPU 16 > Failed to allocate d0v16 > > and the guest continues booting with the vCPUs created before the > failure: > > smp: Brought up 1 node, 16 CPUs > > Free the private IRQ rank allocated by vcpu_vgic_init() on this error > path. The caller will still run the generic vCPU creation cleanup, but > XFREE() clears the pointer so that cleanup remains idempotent. > > Also fix the host-layout redistributor region count for the case where > the requested vCPU count is larger than the capacity of all host > redistributor regions. The old code always stored i + 1 after the loop. > That is correct when the loop stops inside a valid region because the > requested vCPU count is covered. If the loop exits after consuming all > hardware regions, i is already equal to the number of allocated regions, > so i + 1 records one region too many. > > In the same FVP setup, that off-by-one made Xen describe host-layout > GICR state beyond the populated redistributor region list. Dom0 then > accessed the GICR MMIO window described in its device tree, but Xen could > not match the access to a valid emulated redistributor frame. During > debugging this was seen as an unexpected vGICR access followed by a > guest panic: > > d0v0: vGICR: unknown gpa read address 000000002f10ffe8 > pc : gic_iterate_rdists+0x4c/0x104 > Kernel panic - not syncing: Attempted to kill the idle task! > > Keep the existing best-effort Dom0 policy: a failure to create a > secondary vCPU stops the secondary vCPU creation loop, but does not fail > the whole Dom0 boot. This is the construct_domain() policy that is used for both dom0 and dom0less domUs. I must say I don't really like this policy and it's against our *generic* Arm policy to fail the domain creation on any error especially if this belongs to unsatisfied user requests. This is not really related to your series, but I would like to ask other Arm maintainers about their opinion. > > Fixes: ea37fd21110b ("xen/arm: split vgic driver into generic and vgic-v2 driver") > Fixes: 54ec59f6b0b3 ("xen/arm: vgic-v3: Don't create empty re-distributor regions") > Signed-off-by: Mykola Kvach > --- > xen/arch/arm/vgic-v3.c | 3 ++- > xen/arch/arm/vgic.c | 10 +++++++--- > 2 files changed, 9 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c > index 77517c3030..360778eb32 100644 > --- a/xen/arch/arm/vgic-v3.c > +++ b/xen/arch/arm/vgic-v3.c > @@ -1834,7 +1834,8 @@ static int vgic_v3_domain_init(struct domain *d) > * not match the number of pCPUs). Update the number of regions to > * avoid exposing unused region as they will not get emulated. > */ > - d->arch.vgic.nr_regions = i + 1; > + d->arch.vgic.nr_regions = (i == vgic_v3_hw.nr_rdist_regions) ? > + i : i + 1; Wouldn't min(i+1,vgic_v3_hw.nr_rdist_regions) be cleaner? > > d->arch.vgic.intid_bits = vgic_v3_hw.intid_bits; > } > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > index 6647071ad4..e55e484493 100644 > --- a/xen/arch/arm/vgic.c > +++ b/xen/arch/arm/vgic.c > @@ -368,7 +368,7 @@ void domain_vgic_free(struct domain *d) > > int vcpu_vgic_init(struct vcpu *v) > { > - int i; > + int i, ret; > > v->arch.vgic.private_irqs = xzalloc(struct vgic_irq_rank); > if ( v->arch.vgic.private_irqs == NULL ) > @@ -377,7 +377,12 @@ int vcpu_vgic_init(struct vcpu *v) > /* SGIs/PPIs are always routed to this VCPU */ > vgic_rank_init(v->arch.vgic.private_irqs, 0, v->vcpu_id); > > - v->domain->arch.vgic.handler->vcpu_init(v); > + ret = v->domain->arch.vgic.handler->vcpu_init(v); > + if ( ret ) > + { > + XFREE(v->arch.vgic.private_irqs); > + return ret; > + } > > memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs)); > for (i = 0; i < 32; i++) > @@ -944,4 +949,3 @@ void vgic_check_inflight_irqs_pending(struct vcpu *v, unsigned int rank, uint32_ > * indent-tabs-mode: nil > * End: > */ > - Stray change, please drop. Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 25 09:55:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 09:55:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319117.1586836 (Exim 4.92) (envelope-from ) id 1wRS2M-00007h-IJ; Mon, 25 May 2026 09:55:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319117.1586836; Mon, 25 May 2026 09:55:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRS2M-00007a-FF; Mon, 25 May 2026 09:55:54 +0000 Received: by outflank-mailman (input) for mailman id 1319117; Mon, 25 May 2026 09:55:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRS2L-00007U-8D for xen-devel@lists.xenproject.org; Mon, 25 May 2026 09:55:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRS2K-006JSG-61 for xen-devel@lists.xenproject.org; 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pr=C Message-ID: Date: Mon, 25 May 2026 11:55:38 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] docs: Document Arm GICv3 limit for dom0_max_vcpus To: Mykola Kvach , CC: Mykola Kvach , Andrew Cooper , Anthony PERARD , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini References: <88459940b410ceddc04bca7e2cadf7c16bd5c13b.1779430299.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <88459940b410ceddc04bca7e2cadf7c16bd5c13b.1779430299.git.mykola_kvach@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BY1PEPF0001AE19:EE_|SA1PR12MB8119:EE_ X-MS-Office365-Filtering-Correlation-Id: e0427c6d-3710-4f66-310e-08deba43ca2e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|376014|36860700016|82310400026|18002099003|56012099003|22082099003|11063799006|4143699003|6133799003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: G9lYRlLdLrYzPB2ovPwk2pcTJ8ObqXhh2ZOHjSBi8E/eSafifAPb+2DP4GlyoNA0BQ/FlH4rVpxJobLAFfH9Mu7PK5vzqZV0KSgdipe4w9p4bcN2GSu4vU38TS18wDVWeJmnnKrhiy761em/yVr74TQCVS6JCvn0y2cNYIZJVfeiGyfk5aCFZya4Nz3fG4qxBGtFigIdkK0Kt/42Z6i7W68rsrY3Hl5Vq6e6nd0GIOpt/qNbuiMY9t/PhjLmCRDwB8h/ZsWi4UsC34umf3YzmeAdjMqOIWW+eqA4605RKhlS2w3xkk7Kp53OyfvX/nuq96ppkMLTZkjzSI7NnQgJLXMrl/qx4fPB/j8p3/jMbzOBKr6De+BUMxmPEmXlIAMbrstuTvrAmpSBb9GgzRxh0DHzOBF0yFDokZKIhqzP8s+3aRPuis9S979z9KpxyeGc X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2026 09:55:44.9962 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e0427c6d-3710-4f66-310e-08deba43ca2e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BY1PEPF0001AE19.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB8119 X-purgate-ID: tlsNG-16d1c6/1779702951-87371D75-1C197089/0/0 X-purgate-type: clean X-purgate-size: 2124 On 22-May-26 08:18, Mykola Kvach wrote: > From: Mykola Kvach > > On Arm GICv3 systems, Dom0 may use the host GIC layout, for example > when it is the hardware domain. In that case the effective Dom0 vCPU > count is not only bounded by the requested dom0_max_vcpus value and > Xen's generic vCPU limits. It is also bounded by the redistributor MMIO > regions that can be exposed for the host layout. > > Document that Xen can only create Dom0 vCPUs whose virtual redistributor > frame is covered by those regions, and that secondary vCPU creation stops > at the first vCPU whose virtual redistributor frame is not covered. > > Signed-off-by: Mykola Kvach > --- > docs/misc/xen-command-line.pandoc | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc > index d46d5b2152..0a5589b24c 100644 > --- a/docs/misc/xen-command-line.pandoc > +++ b/docs/misc/xen-command-line.pandoc > @@ -981,6 +981,14 @@ The number of VCPUs to give to dom0. This number of VCPUs can be more > than the number of PCPUs on the host. The default is the number of > PCPUs. > > +On Arm systems using GICv3, Dom0 may use the host GIC layout, for example It's not dom0 specific. It can by any domain using host memory layout meaning dom0, hwdom, domU direct mapped, in which case I'm not sure if such comment should belong here given that this behavior is not dom0_max_vcpus specific (same could be triggered on your setup with dom0less domU, direct-mapped and 17 vCPUs). > +when it is the hardware domain. In this case, this value is also limited > +by the redistributor MMIO regions that can be exposed for that layout. > +Xen can only create Dom0 VCPUs whose virtual redistributor frame is > +covered by those regions. If the requested number of VCPUs exceeds that > +limit, secondary VCPU creation stops at the first VCPU whose virtual > +redistributor frame is not covered. > + > Or: > > > `= -` where `` and `` are integers. ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 25 10:06:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 10:06:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319125.1586846 (Exim 4.92) (envelope-from ) id 1wRSCJ-00020J-F9; Mon, 25 May 2026 10:06:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319125.1586846; Mon, 25 May 2026 10:06:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSCJ-00020C-BS; Mon, 25 May 2026 10:06:11 +0000 Received: by outflank-mailman (input) for mailman id 1319125; Mon, 25 May 2026 10:06:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSCI-000206-9d for xen-devel@lists.xenproject.org; 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pr=C Message-ID: <1524b146-cb05-441b-a055-ce3337d83b44@amd.com> Date: Mon, 25 May 2026 12:06:01 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/2] xen/common: llc-coloring parser fixes To: Mykola Kvach , CC: Carlo Nonato , Marco Solieri , Luca Miccio , "Mykola Kvach" , Andrew Cooper , Anthony PERARD , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , "Oleksii Kurochko" References: From: "Orzel, Michal" Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE0:EE_|MN2PR12MB4389:EE_ X-MS-Office365-Filtering-Correlation-Id: 535f7c3f-13d9-401b-6b7d-08deba453ac5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|1800799024|7416014|376014|6133799003|11063799006|56012099003|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: h1wLJUIE0F48f6tEHnMNa5MA/CVzjovpBgDD+o6jD49A2TE989ql71DBNMwq0/GRCL7A9FKAZlUWNitjbITd5SCYqq6C7HcR2k0KKyfDsBj03PP2zh6GmjDiuUHQD4YXztBXbSAv7Aorgvc4Qalk+AfEiROm6Kl3ORooko6wJKPf2xYCKHylfmCgPXgIPxgWneskyMQr1s5Kt1zzF2M2Hd9XSj4oSWN2SuaYYKhsw5P0WoWyuStumJ6TkZfpagBth9jEOJpCtqpIRG1vW1JJNlH0Mo5CI+k2bZvclnIRsRmbTDbdYNbShG92vIx1WWddXPQxMjboNoKTM5Cq/5/4L8UiDpUr42a9vAnA6Fqa3AjSb+PjV3a8Ds735NbPyInQjlIh7FiE06Lqai43pbscKTysqrlq9riwNFpcqDuICdyiMUop/t75sHxnMAkUU2YQ9KqPzJdE7OisGCPdfm3bMZiOldZ/kUGq3qWQ2ByWr4xU8J9Ta1bRIPTwhkMjNO/K7tY9wg0IzuzMTJMVNXFzanN3nj7DyTQr5A1rNhwp+qP2v6A9E+EXZ663VAqUNtlkURg5T5/zGOzC/aOraCSIxNpomHd5BTHx2oLMQtP3VpjaKr61QfYFfzLJAdlMvowOwj/8j++sQ6iCA1cfnpDOUBBm0gLLqXtIg5B+2S4i0xwgEpQdBU7qnoOn6mUp55gEP/PL4KHeyyB98nAuebBeaVBzkpLLtIXTizR8SK0wiUI= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb08.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700016)(1800799024)(7416014)(376014)(6133799003)(11063799006)(56012099003)(18002099003)(22082099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JFv17BTaLwLX9tDuF3wCSIrDhGtrFivufX+M+x6PHEyBZHqp2q9SYjDiXo17+n9QK0RMbEcoWpFtfHW/rjgR0JA81vhdTIF0Ah0Y7l/z0nlqpWH4kguVXBs3JpxMzu9Y+FiWs22+MeKqvdWtia5VB6oINNDGoPDrA+ZCpYlZabjM/aeHCUDys96JBKlzX+bB1D4pIx0t27ifLoDA5JPajYX0RBTzNwb486wiyI+GA6uduI5FUwDyCELSh3icYlrtnhpcqg/4ESxSCeejn5LSdstunXzjPWhJr7v7CaWdSDAnTT0fwF/4gkJpTj6WPMDjNKNtN8VMqkAk8XlWzxZ33tOuXwB1KcgibHMDYF51qZj4QzEGhj52r26jB7Oen+k5OUI6RBCiuNHDmVSTR6nS49uYft2eH5bfFZQ1wne9ulXOph/MrEBvQSC6krFIoPa7 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2026 10:06:03.3907 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 535f7c3f-13d9-401b-6b7d-08deba453ac5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE0.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4389 X-purgate-ID: tlsNG-ef75cf/1779703568-0A971C48-9F46FA22/0/0 X-purgate-type: clean X-purgate-size: 1319 CC: Oleksii @Oleksii, can we ask for your release ack for this series? ~Michal On 21-May-26 20:41, Mykola Kvach wrote: > From: Mykola Kvach > > Hi all, > > This small series fixes two issues in parse_color_config(). > > The first patch makes parse failures leave the caller-visible color count > at zero. This prevents a rejected command-line value from leaving a > partially parsed configuration behind for later init paths to consume. > > The second patch rejects empty color tokens. Previously, delimiters in > places where a color value was expected could be interpreted as color 0, > because simple_strtoul() returns zero without advancing the input pointer. > The patch checks that each parsed color value consumed input. It also > fixes the DT color parsing error message by adding the missing newline > and including the domain ID. > > Changes in v2: > - Clarify the first commit message. > - Include the domain ID in the DT color parsing error message. > - Add Reviewed-by tags. > > Mykola Kvach (2): > xen/common: llc-coloring: clear color count on parse failure > xen/common: llc-coloring: reject empty color tokens > > xen/common/llc-coloring.c | 24 +++++++++++++++++++----- > 1 file changed, 19 insertions(+), 5 deletions(-) > From xen-devel-bounces@lists.xenproject.org Mon May 25 10:18:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 10:18:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319142.1586854 (Exim 4.92) (envelope-from ) id 1wRSOQ-0004Co-J9; Mon, 25 May 2026 10:18:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319142.1586854; Mon, 25 May 2026 10:18:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSOQ-0004Ch-GR; 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bh=Y1c9lQ3wZ/NaJa5sV0AexiH1fCfTRpsF7NxGI19Zg14=; b=QmcPWBkkEhACiRkzt8gnpqxKCJf9nEe2hzsVpoW99EABCT6DEMOiAyE813nXcGl5smQjX6Eqb3DIbwPWjVnC+bdTo6SOxUApiB9xXy7fhLhkymwWrl0btvQh4ROJkK38h0QAmuTS2d6sh0q2kddItIp8cdWj4s7XMmxGbAuu7Cs= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Mon, 25 May 2026 12:18:31 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/arm: gic-v3: Preserve ARE_NS when disabling the distributor To: Mykola Kvach , CC: Luca Fancellu , Mykola Kvach , Stefano Stabellini , "Julien Grall" , Bertrand Marquis , Volodymyr Babchuk , Oleksii Kurochko References: <0bc584018c025ee9fa5557276b9f3914ca9205d4.1779200467.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0bc584018c025ee9fa5557276b9f3914ca9205d4.1779200467.git.mykola_kvach@epam.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: hZ9ud70jx2H3AV4ODoNaC20FgJUBmXkAwe15C5JTuUxv1Hjhl5T5LDYuaBJYXVt6/5RLHkW0H9zLwIkzQaAHfacUqyskjAk7oPixElBy5/XxFhDEydozV4HbIYASjr7mNhaO4H/5QrcbsgvPVoNzTxYPHZGzOdbDzVOrQvSuA/l8wBryrGiYDKGhHxwK5aNAVKSlUqTq5QczrVBXH32ecxPRu9JvNAgBfQiljdP69IoratEUallf8g7FfKrSsSZHL69lbnTSWE3L+rMhCMK8ApdshEUJQsCQqKLIe+1KW6+lQFmH+rXqB02BDTVnThbdRa+McWee+XPdYfCatNbucocXfzOO1nen9HVOhgLanolskARVgonnSfInh49BFevKVupmvnjSy1Fl8UvjAfolHABFk3NgTT79ql3hJF+OC7j8LkuSx0OhDaIUsEIVUOYC X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 May 2026 10:18:34.6832 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 1497a9e7-6a61-498e-0f9c-08deba46fa8e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL02EPF0001A104.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4287 X-purgate-ID: tlsNG-c201ff/1779704319-E0660443-A860B16C/0/0 X-purgate-type: clean X-purgate-size: 1036 On 19-May-26 16:31, Mykola Kvach wrote: > From: Mykola Kvach > > gicv3_dist_init() disables the distributor before reprogramming the > global interrupt state. It used to do this by writing 0 to GICD_CTLR. > > On a system where firmware has already enabled Non-secure affinity > routing, a zero write clears the Non-secure view's GICD_CTLR.ARE_NS bit. > Arm IHI 0069H.b, section 2.3.3 ("Changing affinity routing enables"), > states that changing GICD_CTLR.ARE_NS from 1 to 0 is UNPREDICTABLE. The > GICD_CTLR register description in section 12.9.4 carries the same rule > for the ARE_NS field. > > Preserve ARE_NS while clearing the group enable bits. If firmware left > ARE_NS clear, the value written is still 0, preserving the existing > initialization flow. > > Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") > Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel @Oleksii, can we ask for a release ack here? ~Michal From xen-devel-bounces@lists.xenproject.org Mon May 25 10:31:41 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 10:31:41 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319153.1586864 (Exim 4.92) (envelope-from ) id 1wRSat-00072k-Ml; Mon, 25 May 2026 10:31:35 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319153.1586864; Mon, 25 May 2026 10:31:35 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSat-00072d-Jy; Mon, 25 May 2026 10:31:35 +0000 Received: by outflank-mailman (input) for mailman id 1319153; Mon, 25 May 2026 10:31:33 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wRSar-00072X-Jc for xen-devel@lists.xenproject.org; Mon, 25 May 2026 10:31:33 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRSaq-000HQ9-HR for xen-devel@lists.xenproject.org; Mon, 25 May 2026 12:31:32 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1424db-e002-0a2a0a5209dd-0a2a4501a00a-48 for ; Mon, 25 May 2026 12:31:32 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a142504-c1f2-0a2a45010019-d155da2fbd4d-3 for ; Mon, 25 May 2026 12:31:32 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bdbcc6c4500so646485066b.1 for ; Mon, 25 May 2026 03:31:32 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Mon May 25 10:42:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 10:42:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319149.1586873 (Exim 4.92) (envelope-from ) id 1wRSla-0000c8-LG; Mon, 25 May 2026 10:42:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319149.1586873; Mon, 25 May 2026 10:42:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSla-0000c1-IX; Mon, 25 May 2026 10:42:38 +0000 Received: by outflank-mailman (input) for mailman id 1319149; Mon, 25 May 2026 10:26:03 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRSVX-0005lI-Oc for xen-devel@lists.xenproject.org; Mon, 25 May 2026 10:26:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRSVW-000GgL-Tw for xen-devel@lists.xenproject.org; Mon, 25 May 2026 12:26:02 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a14236e-bab6-0a2a0a5309dd-0a2a4505ca10-42 for ; Mon, 25 May 2026 12:26:02 +0200 Received: from [209.85.208.43] (helo=mail-ed1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1423ba-aaa8-0a2a45050019-d155d02bb915-3 for ; Mon, 25 May 2026 12:26:02 +0200 Received: by mail-ed1-f43.google.com with SMTP id 4fb4d7f45d1cf-6896c80480cso1598102a12.3 for ; Mon, 25 May 2026 03:26:02 -0700 (PDT) Received: from notebook.. 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Update the comments to reflect the current file locations. Signed-off-by: Furkan Caliskan --- xen/common/sched/arinc653.c | 2 +- xen/common/sched/boot-cpupool.c | 2 +- xen/common/sched/compat.c | 2 +- xen/common/sched/core.c | 2 +- xen/common/sched/cpupool.c | 2 +- xen/common/sched/credit.c | 2 +- xen/common/sched/credit2.c | 2 +- xen/common/sched/null.c | 2 +- 8 files changed, 8 insertions(+), 8 deletions(-) diff --git a/xen/common/sched/arinc653.c b/xen/common/sched/arinc653.c index d8a5380557..f509915e9b 100644 --- a/xen/common/sched/arinc653.c +++ b/xen/common/sched/arinc653.c @@ -1,5 +1,5 @@ /****************************************************************************** - * sched_arinc653.c + * common/sched/arinc653.c * * An ARINC653-compatible scheduling algorithm for use in Xen. * diff --git a/xen/common/sched/boot-cpupool.c b/xen/common/sched/boot-cpupool.c index 03be73efdd..38beec8ec7 100644 --- a/xen/common/sched/boot-cpupool.c +++ b/xen/common/sched/boot-cpupool.c @@ -1,6 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * xen/common/boot_cpupools.c + * common/sched/boot-cpupool.c * * Code to create cpupools at boot time. * diff --git a/xen/common/sched/compat.c b/xen/common/sched/compat.c index a02204ec9a..1bbbd8f717 100644 --- a/xen/common/sched/compat.c +++ b/xen/common/sched/compat.c @@ -1,5 +1,5 @@ /**************************************************************************** - * schedule.c + * common/sched/compat.c * */ diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c index a57d5dd929..e4577d41f7 100644 --- a/xen/common/sched/core.c +++ b/xen/common/sched/core.c @@ -4,7 +4,7 @@ * (C) 2004 - Mark Williamson - Intel Research Cambridge **************************************************************************** * - * File: common/schedule.c + * File: common/sched/core.c * Author: Rolf Neugebauer & Keir Fraser * Updated for generic API by Mark Williamson * diff --git a/xen/common/sched/cpupool.c b/xen/common/sched/cpupool.c index f5459c2779..b1e0884842 100644 --- a/xen/common/sched/cpupool.c +++ b/xen/common/sched/cpupool.c @@ -1,5 +1,5 @@ /****************************************************************************** - * cpupool.c + * common/sched/cpupool.c * * Generic cpupool-handling functions. * diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c index e9a91d11c3..9c8075338e 100644 --- a/xen/common/sched/credit.c +++ b/xen/common/sched/credit.c @@ -2,7 +2,7 @@ * (C) 2005-2006 - Emmanuel Ackaouy - XenSource Inc. **************************************************************************** * - * File: common/csched_credit.c + * File: common/sched/credit.c * Author: Emmanuel Ackaouy * * Description: Credit-based SMP CPU scheduler diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index 75316d42b7..04e7b9a28c 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -3,7 +3,7 @@ * (C) 2009 - George Dunlap - Citrix Systems R&D UK, Ltd **************************************************************************** * - * File: common/sched_credit2.c + * File: common/sched/credit2.c * Author: George Dunlap * * Description: Credit-based SMP CPU scheduler diff --git a/xen/common/sched/null.c b/xen/common/sched/null.c index c8e327e3cd..aa136fa729 100644 --- a/xen/common/sched/null.c +++ b/xen/common/sched/null.c @@ -1,5 +1,5 @@ /* - * xen/common/sched_null.c + * common/sched/null.c * * Copyright (c) 2017, Dario Faggioli, Citrix Ltd * -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Mon May 25 10:58:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 10:58:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319172.1586881 (Exim 4.92) (envelope-from ) id 1wRT0m-0002bK-Vb; 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FWIW, if we have to modify those lines I would just delete them, I don't think they add anything meaningful to the file. Thanks, Roger. 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However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a Ctype value of 0b000 while reading from Ctype1 upwards, no caches manageable by the architected set/way maintenance instructions exist at further-out levels, and the higher Ctype fields must be ignored. The current reverse scan can therefore select a unified cache level from a Ctype field above the first no-cache level. Such a field is not part of the architecturally described CLIDR/CCSIDR cache hierarchy and should not be used for selecting the CCSIDR level. Scan Ctype fields from L1 upwards, stop at the first no-cache level, and keep the outermost unified cache observed before that point. This preserves the result for regular cache hierarchies, while avoiding selection of an architecturally ignored Ctype field. Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on arm64") Signed-off-by: Mykola Kvach Reviewed-by: Luca Fancellu Reviewed-by: Michal Orzel --- Changes in v2: - Use llc_level directly after the CLIDR scan instead of assigning it back to n. - Add Reviewed-by tags from Luca and Michal. This patch follows the xen-devel discussion: https://lists.xenproject.org/archives/html/xen-devel/2026-01/msg00345.html In that thread, Michal noted that the reverse scan was a simplification rather than an intentional requirement, and that changing the implementation would be fine. Testing performed: - standalone synthetic CLIDR tests covered both regular and pathological Ctype sequences and showed that the forward scan ignores unified cache levels above the first Ctype == 0b000 while the reverse scan can pick them - Renesas H3ULCB booted with llc-coloring=on --- xen/arch/arm/llc-coloring.c | 24 +++++++++++++++++------- 1 file changed, 17 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/llc-coloring.c b/xen/arch/arm/llc-coloring.c index 6f78817c57..f7b69f629f 100644 --- a/xen/arch/arm/llc-coloring.c +++ b/xen/arch/arm/llc-coloring.c @@ -22,22 +22,32 @@ unsigned int __init get_llc_way_size(void) register_t id_aa64mmfr2_el1 = READ_SYSREG(ID_AA64MMFR2_EL1); uint32_t ccsidr_numsets_shift = CCSIDR_NUMSETS_SHIFT; uint32_t ccsidr_numsets_mask = CCSIDR_NUMSETS_MASK; - unsigned int n, line_size, num_sets; - - for ( n = CLIDR_CTYPEn_LEVELS; n != 0; n-- ) + unsigned int n, line_size, num_sets, llc_level = 0; + + /* + * CLIDR_EL1 Ctype fields are interpreted from Ctype1 upwards. Once a + * no-cache level is seen, higher Ctype fields are architecturally ignored + * for the CLIDR/CCSIDR set/way manageable cache hierarchy. + * + * Keep the outermost unified cache before that point. + */ + for ( n = 1; n <= CLIDR_CTYPEn_LEVELS; n++ ) { uint8_t ctype_n = (clidr_el1 >> CLIDR_CTYPEn_SHIFT(n)) & CLIDR_CTYPEn_MASK; + if ( ctype_n == 0b000 ) + break; + /* Unified cache (see Arm ARM DDI 0487J.a D19.2.27) */ if ( ctype_n == 0b100 ) - break; + llc_level = n; } - if ( n == 0 ) + if ( !llc_level ) return 0; - WRITE_SYSREG((n - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); + WRITE_SYSREG((llc_level - 1) << CSSELR_LEVEL_SHIFT, CSSELR_EL1); isb(); ccsidr_el1 = READ_SYSREG(CCSIDR_EL1); @@ -56,7 +66,7 @@ unsigned int __init get_llc_way_size(void) num_sets = ((ccsidr_el1 >> ccsidr_numsets_shift) & ccsidr_numsets_mask) + 1; printk(XENLOG_INFO "LLC found: L%u (line size: %u bytes, sets num: %u)\n", - n, line_size, num_sets); + llc_level, line_size, num_sets); /* Restore value in CSSELR_EL1 */ WRITE_SYSREG(csselr_el1, CSSELR_EL1); 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f83490c2-b103-4cd3-a7e6-08deba55df4c X-MS-Exchange-CrossTenant-originalarrivaltime: 25 May 2026 12:05:11.4235 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: aWfd3doEtHVI7ZRou4zgUXnH8j4/NbHql7aNtdPdmvw/wqoDK9k8/Pb2OtWtx0ECrYB/QX7dDDe8tCduExkrCICBkGnylGLHpfveFrK+Q3s= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7026 X-purgate-ID: tlsNG-c1860d/1779710714-BCF62DB1-56AE5B67/0/0 X-purgate-type: clean X-purgate-size: 3670 MISRA C Rule 5.5 states: "Identifiers shall be distinct from macro names". Update ECLAIR configuration to deviate intentional identifier and macro name clashes by specifying the macros that should be ignored. This includes 'arm_smmu_global_fault' and 'arm_smmu_context_fault', where the original ARM SMMU handler returns irqreturn_t, while the same-named macro redirects later uses to a Xen wrapper with the void interrupt-handler signature expected by Xen 'request_irq()'. Update deviations.rst and rules.rst accordingly. Signed-off-by: Dmytro Prokopchuk --- automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++ docs/misra/deviations.rst | 7 +++++++ docs/misra/rules.rst | 4 ++++ 3 files changed, 17 insertions(+) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/= eclair_analysis/ECLAIR/deviations.ecl index 7aa64796ba..419a23ce8e 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -144,6 +144,12 @@ ARM SMMU driver calls by reordering the handler and fl= ags arguments." -config=3DMC3A2.R5.5,ignored_macros+=3D"name(request_irq)&&loc(file(^xen/d= rivers/passthrough/arm/smmu\\.c$))" -doc_end =20 +-doc_begin=3D"Clashes between ARM SMMU fault handler functions and macro n= ames in 'xen/drivers/passthrough/arm/smmu.c' are deliberate. +The original ARM SMMU handler returns irqreturn_t, while the macro redirec= ts later uses to a Xen wrapper with the +void interrupt-handler signature expected by Xen 'request_irq()'." +-config=3DMC3A2.R5.5,ignored_macros+=3D"name(arm_smmu_global_fault||arm_sm= mu_context_fault)&&loc(file(^xen/drivers/passthrough/arm/smmu\\.c$))" +-doc_end + -doc_begin=3D"The type \"ret_t\" is deliberately defined multiple times, depending on the guest." -config=3DMC3A2.R5.6,reports+=3D{deliberate,"any_area(any_loc(text(^.*ret_= t.*$)))"} diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index 01f141b73f..15c88b82f4 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -192,6 +192,13 @@ Deviations related to MISRA C:2012 Rules: reordering the handler and flags arguments. - ECLAIR has been configured to ignore this macro. =20 + * - R5.5 + - Clashes between the ARM SMMU fault handler functions and macro name= s are + intentional. The original ARM SMMU handler returns irqreturn_t, whi= le + the macro redirects later uses to a Xen wrapper with the void + interrupt-handler signature expected by Xen 'request_irq()'. + - ECLAIR has been configured to ignore these macros. + * - R5.6 - The type ret_t is deliberately defined multiple times depending on = the type of guest to service. diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index 097c20432e..88d2c5fa7c 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -230,6 +230,10 @@ maintainers if you want to suggest a change. the macro is a local compatibility wrapper that adapts ARM SMMU dri= ver call to Xen's request_irq() argument order. =20 + Clashes between ARM SMMU fault handler functions and macro names ar= e + allowed because the macros redirect ARM SMMU driver uses to a Xen i= nterrupt + wrapper with the handler signature expected by request_irq(). + * - `Rule 5.6 `_ - Required - A typedef name shall be a unique identifier --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 12:05:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 12:05:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319205.1586917 (Exim 4.92) (envelope-from ) id 1wRU3X-0004UM-DJ; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 4b2608c0-9a7d-43be-ecbb-08deba55deb1 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 May 2026 12:05:10.4094 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: KDik52oSrEsEyHt6g7E6PVQQsKHQgIHCPSiMDhIMMzvJOYpU3VTs+cXWw29o7DymZHUrXHRDX2OHu7GNT3Ls6Jney7IvnaDZVrSXojLDxJE= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7026 X-purgate-ID: tlsNG-c1860d/1779710713-B6B74DB1-D5857156/0/0 X-purgate-type: clean X-purgate-size: 3492 MISRA C Rule 5.5 states: "Identifiers shall be distinct from macro names". Update ECLAIR configuration to deviate intentional identifier and macro name clashes by specifying the macros that should be ignored. This includes 'request_irq', where the Xen function takes the IRQ flags before the handler argument, while the macro adapts ARM SMMU driver calls by reordering the arguments. Update deviations.rst and rules.rst accordingly. Signed-off-by: Dmytro Prokopchuk --- automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++ docs/misra/deviations.rst | 7 +++++++ docs/misra/rules.rst | 4 ++++ 3 files changed, 17 insertions(+) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/= eclair_analysis/ECLAIR/deviations.ecl index 13a34b7703..7aa64796ba 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -138,6 +138,12 @@ hypfs nodes to allocate per-request traversal data wit= h the correct size and ret -config=3DMC3A2.R5.5,ignored_macros+=3D"name(hypfs_alloc_dyndata)&&loc(fil= e(^xen/include/xen/hypfs\\.h$))" -doc_end =20 +-doc_begin=3D"Clash between 'request_irq' function and macro name in 'xen/= drivers/passthrough/arm/smmu.c' is deliberate. +The function uses the Xen 'request_irq()' argument order, while the macro = is a compatibility wrapper that adapts +ARM SMMU driver calls by reordering the handler and flags arguments." +-config=3DMC3A2.R5.5,ignored_macros+=3D"name(request_irq)&&loc(file(^xen/d= rivers/passthrough/arm/smmu\\.c$))" +-doc_end + -doc_begin=3D"The type \"ret_t\" is deliberately defined multiple times, depending on the guest." -config=3DMC3A2.R5.6,reports+=3D{deliberate,"any_area(any_loc(text(^.*ret_= t.*$)))"} diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index f5b4ce9315..01f141b73f 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -185,6 +185,13 @@ Deviations related to MISRA C:2012 Rules: function, so the name clash is controlled. - ECLAIR has been configured to ignore this macro. =20 + * - R5.5 + - Clash between the 'request_irq' function and macro name is intentio= nal. + The function uses the Xen 'request_irq()' argument order, while the= macro + is a compatibility wrapper for the ARM SMMU driver that adapts call= s by + reordering the handler and flags arguments. + - ECLAIR has been configured to ignore this macro. + * - R5.6 - The type ret_t is deliberately defined multiple times depending on = the type of guest to service. diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index c0237725a9..097c20432e 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -226,6 +226,10 @@ maintainers if you want to suggest a change. because the macro is a typed convenience wrapper around the size-ba= sed allocation function. =20 + Clash between request_irq function and macro names is allowed becau= se + the macro is a local compatibility wrapper that adapts ARM SMMU dri= ver + call to Xen's request_irq() argument order. + * - `Rule 5.6 `_ - Required - A typedef name shall be a unique identifier --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 12:05:24 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 12:05:24 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319203.1586900 (Exim 4.92) (envelope-from ) id 1wRU3U-00044S-UR; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: fefb799f-7b3e-40d7-8bdd-08deba55de04 X-MS-Exchange-CrossTenant-originalarrivaltime: 25 May 2026 12:05:09.2436 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 9mymJdIHltz1JqQPsI6/DSCGGlPftjP8sJvuRkc8T/VeQiwfKXzrAgtFnsQyvD5egsXLmzVayflpv4dDc/SOSd2nti+8bLjqMkFWI6fb210= X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR03MB7026 X-purgate-ID: tlsNG-bad1c0/1779710711-88F71A53-9A0FA40D/0/0 X-purgate-type: clean X-purgate-size: 3746 MISRA C Rule 5.5 states: "Identifiers shall be distinct from macro names". Update ECLAIR configuration to deviate intentional identifier and macro name clashes by specifying the macros that should be ignored. This includes 'hypfs_alloc_dyndata', where the real function takes an allocation size and the same-named macro is a typed convenience wrapper that expands calls using sizeof(type). Update deviations.rst and rules.rst accordingly. Signed-off-by: Dmytro Prokopchuk --- automation/eclair_analysis/ECLAIR/deviations.ecl | 6 ++++++ docs/misra/deviations.rst | 9 +++++++++ docs/misra/rules.rst | 4 ++++ 3 files changed, 19 insertions(+) diff --git a/automation/eclair_analysis/ECLAIR/deviations.ecl b/automation/= eclair_analysis/ECLAIR/deviations.ecl index 7d4b6f2948..13a34b7703 100644 --- a/automation/eclair_analysis/ECLAIR/deviations.ecl +++ b/automation/eclair_analysis/ECLAIR/deviations.ecl @@ -132,6 +132,12 @@ These macros address differences in argument count dur= ing compile-time, effectiv -config=3DMC3A2.R5.5,ignored_macros+=3D"name(update_gnttab_par||parse_gntt= ab_limit)&&loc(file(^xen/common/grant_table\\.c$))" -doc_end =20 +-doc_begin=3D"Clash between 'hypfs_alloc_dyndata' function and macro name = in 'xen/include/xen/hypfs.h' is deliberate. +The function is the allocator taking a size in bytes, while the macro is a= typed convenience wrapper used by dynamic +hypfs nodes to allocate per-request traversal data with the correct size a= nd return type." +-config=3DMC3A2.R5.5,ignored_macros+=3D"name(hypfs_alloc_dyndata)&&loc(fil= e(^xen/include/xen/hypfs\\.h$))" +-doc_end + -doc_begin=3D"The type \"ret_t\" is deliberately defined multiple times, depending on the guest." -config=3DMC3A2.R5.6,reports+=3D{deliberate,"any_area(any_loc(text(^.*ret_= t.*$)))"} diff --git a/docs/misra/deviations.rst b/docs/misra/deviations.rst index b048309596..f5b4ce9315 100644 --- a/docs/misra/deviations.rst +++ b/docs/misra/deviations.rst @@ -176,6 +176,15 @@ Deviations related to MISRA C:2012 Rules: unused 2nd and 3rd parameters to avoid warnings or errors related t= o them. - ECLAIR has been configured to ignore these macros. =20 + * - R5.5 + - Clash between the 'hypfs_alloc_dyndata' function and macro name is + intentional. The function is the allocator taking a size in bytes, = while + the macro is a typed convenience wrapper used by dynamic hypfs node= s to + allocate per-request traversal data with the correct size and retur= n type. + The implementation explicitly undefines the macro before defining t= he real + function, so the name clash is controlled. + - ECLAIR has been configured to ignore this macro. + * - R5.6 - The type ret_t is deliberately defined multiple times depending on = the type of guest to service. diff --git a/docs/misra/rules.rst b/docs/misra/rules.rst index b3e929307d..c0237725a9 100644 --- a/docs/misra/rules.rst +++ b/docs/misra/rules.rst @@ -222,6 +222,10 @@ maintainers if you want to suggest a change. Clashes between grant table functions and macro names are allowed because they are used for discarding unused parameters. =20 + Clash between hypfs_alloc_dyndata function and macro names is allow= ed + because the macro is a typed convenience wrapper around the size-ba= sed + allocation function. + * - `Rule 5.6 `_ - Required - A typedef name shall be a unique identifier --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 12:34:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 12:34:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319244.1586936 (Exim 4.92) (envelope-from ) id 1wRUVY-0001dK-Sd; Mon, 25 May 2026 12:34:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319244.1586936; Mon, 25 May 2026 12:34:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRUVY-0001dD-Pe; Mon, 25 May 2026 12:34:12 +0000 Received: by outflank-mailman (input) for mailman id 1319244; Mon, 25 May 2026 12:34:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wRUVW-0001d7-Uc for xen-devel@lists.xenproject.org; Mon, 25 May 2026 12:34:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRUVW-000UM1-AW for xen-devel@lists.xenproject.org; Mon, 25 May 2026 14:34:10 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a144183-bab6-0a2a0a5309dd-0a2a4502ce5a-46 for ; Mon, 25 May 2026 14:34:10 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1441c2-af86-0a2a45020019-d1558030ad0e-3 for ; Mon, 25 May 2026 14:34:10 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-4891c0620bcso59159005e9.1 for ; Mon, 25 May 2026 05:34:10 -0700 (PDT) Received: from [192.168.1.6] (user-109-243-69-121.play-internet.pl. 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It used to do this by writing 0 to GICD_CTLR. >> >> On a system where firmware has already enabled Non-secure affinity >> routing, a zero write clears the Non-secure view's GICD_CTLR.ARE_NS bit. >> Arm IHI 0069H.b, section 2.3.3 ("Changing affinity routing enables"), >> states that changing GICD_CTLR.ARE_NS from 1 to 0 is UNPREDICTABLE. The >> GICD_CTLR register description in section 12.9.4 carries the same rule >> for the ARE_NS field. >> >> Preserve ARE_NS while clearing the group enable bits. If firmware left >> ARE_NS clear, the value written is still 0, preserving the existing >> initialization flow. >> >> Fixes: bc183a0235e0 ("xen/arm: Add support for GIC v3") >> Signed-off-by: Mykola Kvach > Reviewed-by: Michal Orzel > > @Oleksii, can we ask for a release ack here? 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4904526ca21sm247101985e9.3.2026.05.25.06.20.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 May 2026 06:20:56 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779715258; x=1780320058; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=mhYowuyAWGSpmaN++lAXXVAbSyUZzptdaqiWvdE8iRk=; b=h+NL8aXgs+6cVmWHqSA0JpneZl8KikOtvxPqpozCYSp8U4ATGEHA1gnyBqlKxIK19o aV2e6JfL/ZbSmLM0xaW6Tjtg/1O+G129/9vZ6OEF/nTr2vSVN5HPvCxz5yYEazovHobF nF/CamXqZSt2v0HqldWtFyAlC2SE5LlcrhwgMfL28nca5QHdAgwB0KmdlwRkDJfmdVrg ERM8O8sQgmiuo/nQf/INcLh72FnD8jSQ2f7/F50P3XJY9DtpzoVnJKzd9dfOtwvrbNZt 6oKYrIsOoLrtjbOzSJCuDrtm6HswiQ4+nnwCj8/g+TUENKs60SkJLj/hgaDh88CVMX/L nTkg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779715258; x=1780320058; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=mhYowuyAWGSpmaN++lAXXVAbSyUZzptdaqiWvdE8iRk=; b=kk7+fqIbhCIIDTwyDaOEDkq/mKs6hbsrGxQDDgyXWvn4J+xOMi6oOiZ14ka8icBhTv BfefXh/SfWzx6g8jnQF1me/7JnRhW3dA7Lm+RbFh+c4ZEFHf1S554SjRKs3o7x2aRcMS Z6Z+WHS0XjsF1nWnkx91rfwWa4gz/bRKcXe0qemE3g20+jOIH7Ms3mZNhgEdTqjoFoJ5 wL+YSf9+n8Xw+F+XE9QDCsL620pzqlkbWbLClPAw97b0JMdK7Stw8X181666ZaRF9mR3 9GlittDzn/dZKQAw85VAjVVGPAebuKW/czORr8/2eKydlXkieB5EEBtMa+Y85rn40ebD ObDQ== X-Gm-Message-State: AOJu0YxYWIesY9YZVrhaL3sT4EEq1wjqW9Nn4a1S5QCjVKlF5idAVjmE E9yi4QHJ5XtAmWuSe0TVIzGQmK8lklfmuicqt8BM+Wcu7ejGeGchoYuiRFUi+1ci X-Gm-Gg: Acq92OF/gtmQviSEOplrzxK2Yh8imyQmnXjb2hCK2/lEPswWBvb4cAiOp2LMAhhvyJ6 BSSF2uzVOBEettAVqXZ2+3Up7yqj6GRLjwTld4lOyOPJMl5y3OM+h/WEImhxGxAkbda4+TobMnu 4GeLoMVLEyv/mAaBAUYZpP4O/kb1TyUyxukBiCRHeVVwl3js4P+46TDNg4u61JhApX85oI0at5F +XB8ahC26uax7m3exbt7YylFBEOvlq1qTCXq5A6yw9AFy1KAz69d8fEwdYveMgveGIXfqsDM5HE BXo5OqSZ3R1ksxgeBWpzow4fofORCYTiEo0YLoVihYX/auJRrOp6wKH70dB5jfKiRv4Mr+WVAF2 D24v+q1DigtWQd4ZONRKoNd6u/L60Zp1mJvz7zZuQWAiW1ANRM4ueb7MHLwVYOicM/e4aKsw8O6 oNAYoxtqpsfJqnqNoh/Cb471SuMNLejD9IrtOWfLTtgyYZkcJi/JxyxnW4OlAZaEb6vZaM96BCh lxG X-Received: by 2002:a05:600c:8b12:b0:490:5191:6e1a with SMTP id 5b1f17b1804b1-490519170d7mr184485815e9.24.1779715257471; Mon, 25 May 2026 06:20:57 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Alistair Francis , Connor Davis , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Baptiste Le Duc Subject: [PATCH v2 1/3] xen/riscv: fix switch_stack_and_jump() for range beyond 1M Date: Mon, 25 May 2026 15:20:42 +0200 Message-ID: <21bc40d4a09bb4cfe0999430ea7e65b369fd4033.1779712171.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779715258-18B60F3B-4DFE5F36/10/73395122804 X-purgate-type: spam X-purgate-size: 2202 The `j` instruction (JAL x0) used in switch_stack_and_jump() is a J-type instruction with only a ±1MB range, and that this can be exceeded in some configurations, causing a linker error: relocation truncated to fit: R_RISCV_JAL against `' Replace `j` with `jr` (JALR x0) via an explicit register, which has unlimited range. Found in a downstream branch when UBSAN instrumentation was enabled. Note that the `tail` instruction looks more natural here, but `jr` is chosen instead to avoid depending on how the assembler expands `tail` and which scratch register it uses (`t1` in GAS), which would need to be listed in the clobber section of `asm volatile`. Fixes: e66003e7be199 ("xen/riscv: introduce setup_initial_pages") Signed-off-by: Oleksii Kurochko Reviewed-by: Baptiste Le Duc --- Changes in v2: - Update the commit message and subject --- xen/arch/riscv/include/asm/current.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/arch/riscv/include/asm/current.h b/xen/arch/riscv/include/asm/current.h index 5fbee8182caa..cc004670d18c 100644 --- a/xen/arch/riscv/include/asm/current.h +++ b/xen/arch/riscv/include/asm/current.h @@ -51,11 +51,11 @@ DECLARE_PER_CPU(struct vcpu *, curr_vcpu); #define vcpu_guest_cpu_user_regs(vcpu) \ (&(vcpu)->arch.cpu_info->guest_cpu_user_regs) -#define switch_stack_and_jump(stack, fn) do { \ - asm volatile ( \ - "mv sp, %0\n" \ - "j " #fn :: "r" (stack), "X" (fn) : "memory" ); \ - unreachable(); \ +#define switch_stack_and_jump(stack, fn) do { \ + asm volatile ( \ + "mv sp, %0\n" \ + "jr %1" :: "r" (stack), "r" (fn) : "memory" ); \ + unreachable(); \ } while ( false ) #define get_per_cpu_offset() __per_cpu_offset[smp_processor_id()] -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 13:21:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 13:21:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319262.1586946 (Exim 4.92) (envelope-from ) id 1wRVEp-0000Au-8L; Mon, 25 May 2026 13:20:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319262.1586946; Mon, 25 May 2026 13:20:59 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRVEp-0000An-3y; Mon, 25 May 2026 13:20:59 +0000 Received: by outflank-mailman (input) for mailman id 1319262; Mon, 25 May 2026 13:20:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wRVEo-0000Ag-5F for xen-devel@lists.xenproject.org; Mon, 25 May 2026 13:20:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRVEm-00HD0O-4H for xen-devel@lists.xenproject.org; Mon, 25 May 2026 15:20:56 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a144ca3-e002-0a2a0a5209dd-0a2a4507d8d2-18 for ; Mon, 25 May 2026 15:20:55 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a144cb7-229c-0a2a45070019-d1558031c98b-3 for ; Mon, 25 May 2026 15:20:55 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-4903974854dso34799285e9.3 for ; Mon, 25 May 2026 06:20:55 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This patch series resolves the found issues. CI tests: https://gitlab.com/xen-project/people/olkur/xen/-/pipelines/2551001500 --- Changes in v2: - Address comments from ML. --- Oleksii Kurochko (3): xen/riscv: fix switch_stack_and_jump() for range beyond 1M xen/domain: fix UBSAN null pointer dereference of d->shared_info libfdt: fix UBSAN null pointer in fdt_property() xen/arch/riscv/include/asm/current.h | 10 +++++----- xen/common/domain.c | 2 +- xen/common/event_fifo.c | 3 ++- xen/common/libfdt/fdt_sw.c | 3 ++- xen/common/time.c | 3 +++ 5 files changed, 13 insertions(+), 8 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 13:21:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 13:21:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319265.1586972 (Exim 4.92) (envelope-from ) id 1wRVEu-0000pv-0T; Mon, 25 May 2026 13:21:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319265.1586972; Mon, 25 May 2026 13:21:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRVEt-0000pm-So; Mon, 25 May 2026 13:21:03 +0000 Received: by outflank-mailman (input) for mailman id 1319265; Mon, 25 May 2026 13:21:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wRVEs-0000h4-6e for xen-devel@lists.xenproject.org; Mon, 25 May 2026 13:21:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRVEr-00HD0O-It for xen-devel@lists.xenproject.org; Mon, 25 May 2026 15:21:01 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a144c9e-e002-0a2a0a5209dd-0a2a450cd30e-22 for ; Mon, 25 May 2026 15:21:01 +0200 Received: from [209.85.128.44] (helo=mail-wm1-f44.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a144cbd-62f1-0a2a450c0019-d155802cdc96-3 for ; Mon, 25 May 2026 15:21:01 +0200 Received: by mail-wm1-f44.google.com with SMTP id 5b1f17b1804b1-4905529b933so13307365e9.0 for ; Mon, 25 May 2026 06:21:01 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. 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This is a legitimate calling convention for adding empty FDT properties such as "interrupt-controller", which carry no payload. However, compilers that treat memcpy as nonnull on its pointer arguments will fire UBSAN before observing that len is zero. Guard the memcpy() with a check on len so it is skipped entirely when there is no payload to copy, bringing the code in line with the nonnull contract. Signed-off-by: Oleksii Kurochko Signed-off-by: David Gibson Origin: git://git.kernel.org/pub/scm/utils/dtc/dtc.git f57e7df35df4 Fixes: f0ea06558068 ("libfdt: add version 1.3.0") Signed-off-by: Oleksii Kurochko Reviewed-by: Baptiste Le Duc --- Changes in v2: - Backport patch from https://github.com/dgibson/dtc/commit/f57e7df35df4a301961cbbf9433ba4e85c2ee5ed --- xen/common/libfdt/fdt_sw.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/xen/common/libfdt/fdt_sw.c b/xen/common/libfdt/fdt_sw.c index 4c569ee7eb0d..96d4cf571319 100644 --- a/xen/common/libfdt/fdt_sw.c +++ b/xen/common/libfdt/fdt_sw.c @@ -330,7 +330,8 @@ int fdt_property(void *fdt, const char *name, const void *val, int len) ret = fdt_property_placeholder(fdt, name, len, &ptr); if (ret) return ret; - memcpy(ptr, val, len); + if (len) + memcpy(ptr, val, len); return 0; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 13:21:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 13:21:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319264.1586963 (Exim 4.92) (envelope-from ) id 1wRVEr-0000bT-PH; Mon, 25 May 2026 13:21:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319264.1586963; Mon, 25 May 2026 13:21:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRVEr-0000bM-LW; Mon, 25 May 2026 13:21:01 +0000 Received: by outflank-mailman (input) for mailman id 1319264; Mon, 25 May 2026 13:21:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wRVEq-0000ON-IX for xen-devel@lists.xenproject.org; Mon, 25 May 2026 13:21:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRVEp-00DYzL-Uo for xen-devel@lists.xenproject.org; Mon, 25 May 2026 15:20:59 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a144ca0-bab6-0a2a0a5309dd-0a2a4504bc44-26 for ; Mon, 25 May 2026 15:20:59 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a144cbb-1dec-0a2a45040019-d1558036b511-3 for ; Mon, 25 May 2026 15:20:59 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-4906869f0cbso6852675e9.1 for ; Mon, 25 May 2026 06:20:59 -0700 (PDT) Received: from fedora (user-109-243-69-121.play-internet.pl. [109.243.69.121]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4904526ca21sm247101985e9.3.2026.05.25.06.20.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 May 2026 06:20:58 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779715259; x=1780320059; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y01U/cIdeBHcv5iWEI8HdRJZlY3tdB5kvE1STP1YdwU=; b=lXidjKzQ9FDcmeQfJHsotFVw6fopOjayFqcLzGrZVxk90XRsQBUrwuInxdCm00ITmC h6yvCfIR74XV0uE+Zcw8+OaR+A4My2SQQaHL+8P2HQzJCMTTckpZ/OCUTSZ55dexowu6 OKVsXmLerkgjLvIpG2AEd9F2hVg++fc9FBDOpKKXtv6OWjH2R9hIZggI2hffWtOZxRDD lH9GMcZ9cNMUQLM9kgWTlKzrAUN6fqDD+5TFcUsh05Kj2MZEm9KtgcEqj225EjaovPq4 vj+I+ve8K8o/oqTrwEkCdlRgGdI/qwo+ooDQBl1MsxnrmpyS8n/lykTTkoH0xn85ih55 XYkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779715259; x=1780320059; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Y01U/cIdeBHcv5iWEI8HdRJZlY3tdB5kvE1STP1YdwU=; b=QFMbJTzJCXzh9LDcxcZo1fSjqq/3I+O2CCtIqKFw83cKeOBdqiNMFmPujI78ZprE2g tfzcnScsZDm0r/TAAUz2J9HbLJeV6v6t6A5E2oXIxqtXYvJG/2BlxMxQurzigXcqKD9U n1g+Rj1diLlZ/3fKRxiDtmxkWFau4qAM0/apACQ4jWgxwYH+xVRNrJNfYDnyjCHA2Y6F Kw/+QegPnd71Bd6REKqvHnRDEJ3Ryx6Wl5t9cAGqDBgLLziQaxWRRHWbxHxC+btFyXyN MRhW3uOwYYWQWwHnDJ8vdbf3pRDuxIMEoAMPzT/0Ak40sNko8xbLo20FHIMZCwccpatW qvkw== X-Gm-Message-State: AOJu0Yz1kwA8UVtt0xh995QW363H4952h7cAXQ9rTecjsgcusLtHNWe1 OJ8zti6fioGz0j73vJTTCXJxqMwmThZeh44vsvXO1HGCVLpklkXao7vECfTiv45a X-Gm-Gg: Acq92OFArsnl9RVpN7oMIG6yEPia1OWFchmW3ezrYPctbVsogcTnPAxXpJL+PEeibt8 ac7giFR/giZAnM0qTj/JWFHel0yYe26oFMUntSASYxjwq6qHfi2Z31Z5EbfWHCDohKyPfHvwJ6s uEM4/kbjfJ+hb04RF5o/YRtyhIjBlJUBGu03YcUcVzi9Swqbm02HJcVb+CxjVDYfX+yCEQ1GM7V mc5MHB6HdpjTQK+FoxWvjs7TBIMznOUtnU9MbCqQPNOCikfM711f4WCJjaSf/3H1FJxlxPEtb2W ji89dcWYDKOAcZtcontrq0XYZGGHWiQzchRulEJD/WAMEfWbWcBF4BZmbocg880FVkgcRu0iAdu eckYr6m6bc93Si+eMHL+9+Em6xorgTzUwE7udvPS/7QGhsICTSSCebG3y258gMRaGjSk4TTM0Ds +kRAn1BrDsw87lIGB3qARXBVyT4/yYS7jtN4214POZOY5djzdpadm/PrETsbuURlF+3A== X-Received: by 2002:a05:600c:4510:b0:48f:d5a0:284e with SMTP id 5b1f17b1804b1-490428e03b8mr229165155e9.28.1779715259120; Mon, 25 May 2026 06:20:59 -0700 (PDT) From: Oleksii Kurochko To: xen-devel@lists.xenproject.org Cc: Oleksii Kurochko , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 2/3] xen/domain: fix UBSAN null pointer dereference of d->shared_info Date: Mon, 25 May 2026 15:20:43 +0200 Message-ID: <04dd784b6b9a4dfca9a313ea8802d8d514d65021.1779712171.git.oleksii.kurochko@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ebf023/1779715259-40B733FF-A7992848/10/73395122804 X-purgate-type: spam X-purgate-size: 3702 It is legal to have d->shared_info equal to NULL for architectures which support only the FIFO ABI for event channel management. Having d->shared_info == NULL leads to a UBSAN issue on such architectures: UBSAN: Undefined behaviour in common/domain.c:325:10 member access within null pointer of type 'struct shared_info_t' vcpu_info_reset() maps v->vcpu_info_area.map to the per-vcpu slot inside the domain's shared_info page for vcpus with id < XEN_LEGACY_MAX_VCPUS, and falls back to dummy_vcpu_info for vcpus beyond that limit. Extend the existing fallback condition to also cover the case where no shared_info page has been allocated, mapping the vcpu to dummy_vcpu_info instead. This is the correct behaviour: dummy_vcpu_info already serves as the safe stand-in for vcpus that have no usable shared_info slot. Additionally, if an architecture supports only the FIFO ABI, setup_ports() should be updated to avoid a NULL pointer dereference of d->shared_info, since in that case there will be no pending events in shared_info->evtchn_pending and the pending flag of the FIFO event channel does not need to be set to true. update_domain_wallclock_time() accesses d->shared_info via shared_info() macro. On architectures that do not allocate a shared_info page (currently RISC-V, which runs guests in dom0less mode without the PV ABI), this causes a NULL dereference. The early return is safe: if there is no shared_info page, there is nothing to update. For all existing architectures (x86, ARM) that do allocate it, the guard is never taken and behavior is unchanged. Signed-off-by: Oleksii Kurochko --- Changes in v2: - Update commit message + subject. - Drop Fixes tag. - Handle migration of pending events from 2L and FIFO ABIs when arch support only FIFO ABI. - Update the commit message. - Protect some other places in common code from NULL pointer deref of d->shared_info. - Drop R-by: Baptiste ... as some extra checks are added. --- xen/common/domain.c | 2 +- xen/common/event_fifo.c | 3 ++- xen/common/time.c | 3 +++ 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c2895..e64b7df9b704 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -320,7 +320,7 @@ void vcpu_info_reset(struct vcpu *v) struct domain *d = v->domain; v->vcpu_info_area.map = - ((v->vcpu_id < XEN_LEGACY_MAX_VCPUS) + ((v->vcpu_id < XEN_LEGACY_MAX_VCPUS && d->shared_info) ? (vcpu_info_t *)&shared_info(d, vcpu_info[v->vcpu_id]) : &dummy_vcpu_info); } diff --git a/xen/common/event_fifo.c b/xen/common/event_fifo.c index 37cba9bc4564..59d9bf4c7ec0 100644 --- a/xen/common/event_fifo.c +++ b/xen/common/event_fifo.c @@ -562,7 +562,8 @@ static void setup_ports(struct domain *d, unsigned int prev_evtchns) evtchn = evtchn_from_port(d, port); - if ( guest_test_bit(d, port, &shared_info(d, evtchn_pending)) ) + if ( d->shared_info && + guest_test_bit(d, port, &shared_info(d, evtchn_pending)) ) evtchn->pending = true; evtchn_fifo_set_priority(d, evtchn, EVTCHN_FIFO_PRIORITY_DEFAULT); diff --git a/xen/common/time.c b/xen/common/time.c index 04a65f00b35c..1ee49a8b0d13 100644 --- a/xen/common/time.c +++ b/xen/common/time.c @@ -94,6 +94,9 @@ void update_domain_wallclock_time(struct domain *d) uint32_t *wc_version; uint64_t sec; + if ( !d->shared_info ) + return; + spin_lock(&wc_lock); wc_version = &shared_info(d, wc_version); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 16:32:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 16:32:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319362.1587005 (Exim 4.92) (envelope-from ) id 1wRYDV-0001H1-2Z; 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Mon, 25 May 2026 09:31:45 -0700 (PDT) MIME-Version: 1.0 References: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Mon, 25 May 2026 19:31:33 +0300 X-Gm-Features: AVHnY4K5F0OU4tmh7fdxYvq7UIAaTrEP1RX1L81qx53F7Ov3mquqO3EjVwIDgJI Message-ID: Subject: Re: [RFC PATCH] device-tree: size first hwdom bank for boot modules To: dmukhin@ford.com Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Daniel P. Smith" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c1860d/1779726706-BE577DB1-01B0C2FC/0/0 X-purgate-type: clean X-purgate-size: 8052 On Fri, May 22, 2026 at 1:10=E2=80=AFAM wrote: > > Hi Mykola, > > The patch looks good! > > I would try to add a CI coverage for QEMU aarch64 tests, since QEMU > supports multiple RAM banks topology. > > What do you think? > > Also, few remarks below. > > On Sun, May 17, 2026 at 11:57:56PM +0300, Mykola Kvach wrote: > > From: Mykola Kvach > > > > With LLC coloring enabled, the hardware domain memory comes from > > allocate_hwdom_memory(), not from the fixed direct-map banks used when > > coloring is off. > > > > Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for > > DMA") made that allocator sort free host regions by ascending address s= o > > Dom0 gets DMA-capable low memory first. The first bank filter still onl= y > > required 128MB. That can select a low region which is large enough for > > the heuristic, but not large enough for place_modules() to put the Dom0 > > kernel, generated DTB and initrd contiguously in bank 0. > > > > Ask arch code for any additional first-bank size requirement. On Arm, > > compute it from the actual Dom0 kernel placement, rounded initrd size a= nd > > generated DTB size hint. For 64-bit Image kernels, include the text off= set > > from the candidate bank start, because the returned requirement is comp= ared > > with a bank size measured from that start. The hint covers both the nor= mal > > Device Tree path and the minimal DTB created for ACPI boot. > > > > Check the first-bank threshold against the size which will actually be > > assigned to Dom0, after capping the host region by the remaining unassi= gned > > Dom0 memory. Otherwise a large host region could pass the test but stil= l > > produce a first guest bank too small for place_modules(). > > > > Use the typed min()/max() helpers for this normal allocation arithmetic= ; > > MIN()/MAX() are intended for preprocessor-style contexts and skip the t= ype > > checking provided by the lowercase helpers. > > > > This keeps the DMA-oriented allocation policy from de99f3263555 while > > preventing a too-small bank 0 from reaching place_modules(). > > > > Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for = DMA") > > Signed-off-by: Mykola Kvach > > --- > > Test/setup notes: > > > > The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) > > arm64 board booted through U-Boot/TFTP and using huge initrd. > > > > Relevant Xen command line excerpt: > > dom0_mem=3D2048M llc-coloring=3Don > > > > Boot module layout from Xen: > > MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk > > MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel > > MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy > > > > The initrd is about 168MB. With LLC coloring enabled and the low-addres= s > > allocation policy from de99f3263555, Dom0 can receive a 192MB first ban= k: > > d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) > > > > That bank satisfies the old 128MB minimum but is too small for the > > rounded Dom0 kernel, generated DTB and initrd placement. The observed > > failure before this patch was: > > Panic on CPU 0: > > Not enough memory in the first bank for the kernel+dtb+initrd > > > > With this patch, the same boot skips the too-small low region for bank = 0 > > and reaches Dom0: > > d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) > > d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) > > d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) > > d0: extended region 0: 0x48000000->0x54000000 > > Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 > > Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 > > Loading d0 DTB to 0x5f000000-0x5f011c80 > > Linux version 5.10.194-yocto-standard > > --- > > xen/arch/arm/acpi/domain_build.c | 2 -- > > xen/arch/arm/domain_build.c | 8 ++++++ > > xen/arch/arm/include/asm/domain_build.h | 4 +++ > > xen/arch/arm/include/asm/kernel.h | 8 ++++++ > > xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ > > xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- > > xen/include/xen/fdt-kernel.h | 8 ++++++ > > 7 files changed, 83 insertions(+), 9 deletions(-) > > > > diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domai= n_build.c > > index 249d899c33..db16f7fa94 100644 > > --- a/xen/arch/arm/acpi/domain_build.c > > +++ b/xen/arch/arm/acpi/domain_build.c > > @@ -26,8 +26,6 @@ > > #undef virt_to_mfn > > #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) > > > > -#define ACPI_DOM0_FDT_MIN_SIZE 4096 > > - > > static int __init acpi_iomem_deny_access(struct domain *d) > > { > > acpi_status status; > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > > index 1efddc60ef..226e053c68 100644 > > --- a/xen/arch/arm/domain_build.c > > +++ b/xen/arch/arm/domain_build.c > > @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, co= nst char *e) > > (IS_ENABLED(CONFIG_STATIC_SHM) ? = \ > > (NR_SHMEM_BANKS * (160 + 16)) : 0)) > > > > +paddr_t __init dom0_get_fdt_size_hint(void) > > +{ > > + if ( !acpi_disabled ) > > + return ACPI_DOM0_FDT_MIN_SIZE; > > + > > + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; > > I would invert the condition so it is read more straightforward: > > if ( acpi_disabled ) > return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE= ; > > return ACPI_DOM0_FDT_MIN_SIZE; > > [..] > > diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c > > index b72585b7fe..3644663e2f 100644 > > --- a/xen/arch/arm/kernel.c > > +++ b/xen/arch/arm/kernel.c > > @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct k= ernel_info *info) > > return load_addr; > > } > > > > +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t= len) > > +{ > > + return ROUNDUP(load_addr + len, MB(2)) - load_addr; > > +} > > + > > +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, > > + paddr_t bank_start) > > +{ > > + const struct boot_module *mod =3D info->bd.initrd; > > + const paddr_t initrd_len =3D ROUNDUP(mod ? mod->size : 0, MB(2)); > > + const paddr_t dtb_len =3D ROUNDUP(dom0_get_fdt_size_hint(), MB(2))= ; > > + paddr_t kernsize; > > + > > +#ifdef CONFIG_HAS_DOMAIN_TYPE > > Perhaps use `IS_ENABLED(CONFIG_HAS_DOMAIN_TYPE)` to reduce ifdefery? > My impression that IS_ENABLED() is preferred. > > > + if ( (info->type =3D=3D DOMAIN_64BIT) && (info->image.start =3D=3D= 0) ) > > + { > > + paddr_t load_addr =3D bank_start + info->image.text_offset; > > + > > + /* > > + * The caller compares this value with a size measured from > > + * bank_start, so include the text offset before the kernel. > > + */ > > + kernsize =3D ROUNDUP(load_addr + info->image.len, MB(2)) - ban= k_start; > > + return kernsize + initrd_len + dtb_len; > > + } > > +#endif > > + > > + if ( info->image.start =3D=3D 0 ) > > Here too: invert the condition? > > if ( info->image.start ) > kernsize =3D kernel_placement_size(info->image.start, info->im= age.len); > else > ... I think I will keep the explicit info->image.start =3D=3D 0 check here. In this code, start =3D=3D 0 is an established special case rather than jus= t a numeric input to the helper. kernel_zimage_place() handles it explicitly as the position-independent image case where Xen chooses the load address. Keeping the branch in the same form matches the surrounding code and keeps that special case visible. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 25 17:40:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 17:40:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319382.1587013 (Exim 4.92) (envelope-from ) id 1wRZHe-00020d-PL; Mon, 25 May 2026 17:40:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319382.1587013; Mon, 25 May 2026 17:40:10 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRZHe-00020V-MN; Mon, 25 May 2026 17:40:10 +0000 Received: by outflank-mailman (input) for mailman id 1319382; Mon, 25 May 2026 17:40:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRZHd-00020P-AS for xen-devel@lists.xenproject.org; Mon, 25 May 2026 17:40:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRZHc-0013Iy-Ml for xen-devel@lists.xenproject.org; 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Smith" , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH v3 for-4.22] EFI: Fix boot from a device without a file system Date: Mon, 25 May 2026 19:37:03 +0200 Message-ID: <79d8684ede3bf1e9abe02a2e5ed966a0ecd5949d.1779726979.git.accek@invisiblethingslab.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779730808-8A38AA53-637CA9B5/0/0 X-purgate-type: clean X-purgate-size: 10700 When netbooting a unified Xen kernel image (via GRUB chainloader), the resulting loaded_image->DeviceHandle does not support SIMPLE_FILE_SYSTEM_PROTOCOL. Instead of crashing via noreturn PrintErrMesg() in get_parent_handle(), we defer calling this function until filesystem access is needed. This way when booting UKI, get_parent_handle() is not called at all. Suggested-by: Andrew Cooper Suggested-by: Marek Marczykowski-Górecki Signed-off-by: Szymon Acedański --- Changes in v3: - read_file(): replaced unreachable `if ( !dir_handle )` branch with BUG_ON(!dir_handle), per Marek's suggestion. Changes in v2: - Restructured along the lines Andrew and Marek both suggested on v1: defer get_parent_handle() until the first call site that actually needs a file. This mirrors the existing lazy pattern in ARM's allocate_module_file() in xen/arch/arm/efi/efi-boot.h, which was also changed to use the new ensure_dir_handle() helper. Tested (same as v2): - PXE-loaded GRUB chainloading UKI - failure without patch, success with patch - QEMU boot from EFI partition, with config, kernel and initrd on EFI partition too - success with and without patch - Cross-compiling ARM64 - success xen/arch/arm/efi/efi-boot.h | 12 ++++--- xen/arch/x86/efi/efi-boot.h | 9 +++-- xen/common/efi/boot.c | 66 +++++++++++++++++++++++-------------- 3 files changed, 54 insertions(+), 33 deletions(-) diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h index ea59de47e7..069cc68b0a 100644 --- a/xen/arch/arm/efi/efi-boot.h +++ b/xen/arch/arm/efi/efi-boot.h @@ -403,7 +403,7 @@ static void __init noreturn efi_arch_post_exit_boot(void) } static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { union string name; @@ -419,8 +419,11 @@ static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, name.s = get_value(&cfg, section, "dtb"); if ( name.s ) { + CHAR16 *fname; + split_string(name.s); - read_file(dir_handle, s2w(&name), &dtbfile, NULL); + ensure_dir_handle(image, dir_handle, &fname); + read_file(*dir_handle, s2w(&name), &dtbfile, NULL); efi_bs->FreePool(name.w); } } @@ -430,7 +433,7 @@ static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, } static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { } @@ -665,8 +668,7 @@ static int __init allocate_module_file(const EFI_LOADED_IMAGE *loaded_image, file_info->name_len = name_len; /* Get the file system interface. */ - if ( !*dir_handle ) - *dir_handle = get_parent_handle(loaded_image, &fname); + ensure_dir_handle(loaded_image, dir_handle, &fname); /* Load the binary in memory */ read_file(*dir_handle, s2w(&module_name), &module_binary, NULL); diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index 42a2c46b5e..d738b839ee 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -284,13 +284,13 @@ static void __init noreturn efi_arch_post_exit_boot(void) } static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { } static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, - EFI_FILE_HANDLE dir_handle, + EFI_FILE_HANDLE *dir_handle, const char *section) { union string name; @@ -304,9 +304,12 @@ static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, name.s = get_value(&cfg, "global", "ucode"); if ( name.s ) { + CHAR16 *fname; + microcode_set_module(mbi.mods_count); split_string(name.s); - read_file(dir_handle, s2w(&name), &ucode, NULL); + ensure_dir_handle(image, dir_handle, &fname); + read_file(*dir_handle, s2w(&name), &ucode, NULL); efi_bs->FreePool(name.w); } } diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c index 9ea2183c0b..2971ea8696 100644 --- a/xen/common/efi/boot.c +++ b/xen/common/efi/boot.c @@ -547,6 +547,17 @@ static EFI_FILE_HANDLE __init get_parent_handle(const EFI_LOADED_IMAGE *loaded_i return dir_handle; } +static void __init ensure_dir_handle(const EFI_LOADED_IMAGE *loaded_image, + EFI_FILE_HANDLE *dir_handle, + CHAR16 **file_name) +{ + if ( *dir_handle ) + return; + *dir_handle = get_parent_handle(loaded_image, file_name); + if ( !*dir_handle ) + blexit(L"Cannot load files without a usable file system"); +} + static CHAR16 *__init point_tail(CHAR16 *fn) { CHAR16 *tail = NULL; @@ -838,12 +849,11 @@ static bool __init read_file(EFI_FILE_HANDLE dir_handle, CHAR16 *name, if ( !name ) PrintErrMesg(L"No filename", EFI_OUT_OF_RESOURCES); + BUG_ON(!dir_handle); + what = L"Open"; - if ( dir_handle ) - ret = dir_handle->Open(dir_handle, &FileHandle, name, - EFI_FILE_MODE_READ, 0); - else - ret = EFI_NOT_FOUND; + ret = dir_handle->Open(dir_handle, &FileHandle, name, + EFI_FILE_MODE_READ, 0); if ( file == &cfg && ret == EFI_NOT_FOUND ) return false; if ( EFI_ERROR(ret) ) @@ -1514,7 +1524,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, if ( use_cfg_file ) { - EFI_FILE_HANDLE dir_handle; + EFI_FILE_HANDLE dir_handle = NULL; EFI_HANDLE gop_handle; UINTN depth, cols, rows; @@ -1526,31 +1536,33 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, gop = efi_get_gop(&gop_handle); - /* Get the file system interface. */ - dir_handle = get_parent_handle(loaded_image, &file_name); - /* Read and parse the config file. */ if ( read_section(loaded_image, L"config", &cfg, NULL) ) PrintStr(L"Using builtin config file\r\n"); - else if ( !cfg_file_name && file_name ) + else { - CHAR16 *tail; + ensure_dir_handle(loaded_image, &dir_handle, &file_name); - while ( (tail = point_tail(file_name)) != NULL ) + if ( !cfg_file_name ) { - wstrcpy(tail, L".cfg"); - if ( read_file(dir_handle, file_name, &cfg, NULL) ) - break; - *tail = 0; + CHAR16 *tail; + + while ( (tail = point_tail(file_name)) != NULL ) + { + wstrcpy(tail, L".cfg"); + if ( read_file(dir_handle, file_name, &cfg, NULL) ) + break; + *tail = 0; + } + if ( !tail ) + blexit(L"No configuration file found."); + PrintStr(L"Using configuration file '"); + PrintStr(file_name); + PrintStr(L"'\r\n"); } - if ( !tail ) - blexit(L"No configuration file found."); - PrintStr(L"Using configuration file '"); - PrintStr(file_name); - PrintStr(L"'\r\n"); + else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) + blexit(L"Configuration file not found."); } - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) - blexit(L"Configuration file not found."); pre_parse(&cfg); if ( section.w ) @@ -1567,6 +1579,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, if ( !name.s ) break; free_cfg(); + ensure_dir_handle(loaded_image, &dir_handle, &file_name); if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) { PrintStr(L"Chained configuration file '"); @@ -1578,13 +1591,14 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, efi_bs->FreePool(name.w); } - efi_arch_cfg_file_early(loaded_image, dir_handle, section.s); + efi_arch_cfg_file_early(loaded_image, &dir_handle, section.s); option_str = name.s ? split_string(name.s) : NULL; if ( !read_section(loaded_image, L"kernel", &kernel, option_str) && name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &kernel, option_str); efi_bs->FreePool(name.w); } @@ -1599,6 +1613,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, name.s = get_value(&cfg, section.s, "ramdisk"); if ( name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &ramdisk, NULL); efi_bs->FreePool(name.w); } @@ -1609,6 +1624,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, name.s = get_value(&cfg, section.s, "xsm"); if ( name.s ) { + ensure_dir_handle(loaded_image, &dir_handle, &file_name); read_file(dir_handle, s2w(&name), &xsm, NULL); efi_bs->FreePool(name.w); } @@ -1634,7 +1650,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE ImageHandle, } } - efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); + efi_arch_cfg_file_late(loaded_image, &dir_handle, section.s); free_cfg(); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Mon May 25 17:48:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 17:48:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319394.1587023 (Exim 4.92) (envelope-from ) id 1wRZQ5-0002v5-Mo; Mon, 25 May 2026 17:48:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319394.1587023; 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Smith" , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie , xen-devel@lists.xenproject.org Message-ID: <4a3ec4d5-74ec-4d91-8d3a-25da9a6f0e03@invisiblethingslab.com> Subject: Re: [PATCH v2 for-4.22] EFI: Fix boot from a device without a file system References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> <809b9976089eaf02e864684461ced4e939dbcc83.1779271357.git.accek@invisiblethingslab.com> <31ee4635-0eaa-41cd-8fad-223fb11cb9bc@suse.com> In-Reply-To: Autocrypt-Gossip: addr=marmarek@invisiblethingslab.com; keydata= xsBNBE5j9EwBCACbYHjxDrxFAY3n1x9KBFvjzkG1qFSTVBnH4vpD/5Na4sZq4uDDMUCjivrm MzbWYaivYj96BygdOiw7PWxYrhuW0b2WYOeGudZyApgFz42g458s78EciuhgfuWBlxr8dOEN /9ueVFHcvtZmDbHhMVPcQ0O7gwh0JmwkOsf7P7WAfYXsQlhO/EBRrNXR0Je+GEpYADhRktxX h1d3Iz+oKYuwHioLX8ovoAT4+peOuecWUSpUWebpDbTR5i7NRP3PIblB4KzWJa2kh/f3mx4v SRGnHn+BfX42xSe0X7Ktl4Xf+KNq9Wkcjk2CZP57hV2v4pO0ZUOXD7IhlZtnfNj67WjdABEB AAHNP01hcmVrIE1hcmN6eWtvd3NraSAobWFybWFyZWspIDxtYXJtYXJla0BpbnZpc2libGV0 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F86RotiCcUQW+S61c6RymdP+iqwSizu8= X-Gm-Gg: Acq92OFsMP0T0RX3xo2bkjEgzcLG7qhC20+v27PqaUBE1pWVRVsjmL4NlBjcwSDw5GF DqxqE0dvXj59lTR16XyO3gc09X5tKv1/l6r6muyi/6NsQ3XH5vryq1AfTxMGuxhoo21opMahccx Kc2XJcYXug1BE9RcCAv+8YyGU9gWyRSTB7XRb+vjl2xjGFBrN5ggdkRGGxaeeltCEf1iUmlt+0j XIG+TwIhlt7us6WSlo97woNNUVhh9HnKFu931xIo1Ui8Eu7y2F6V1DA1XgtKVWjgY6ng3QhSmgn ggXa X-Received: by 2002:a05:6512:3d11:b0:5a8:d1ef:caad with SMTP id 2adb3069b0e04-5aa3237d6c8mr3979794e87.4.1779731816103; Mon, 25 May 2026 10:56:56 -0700 (PDT) MIME-Version: 1.0 References: <9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola_kvach@epam.com> <0db37c10-b920-4d9d-9453-18f820e6d093@amd.com> In-Reply-To: <0db37c10-b920-4d9d-9453-18f820e6d093@amd.com> From: Mykola Kvach Date: Mon, 25 May 2026 20:56:44 +0300 X-Gm-Features: AVHnY4IpbUegaoLO0BYt4qENwcAbyxGqDvC5h-M5C4Lit_RLWpSIf-acoOnbkAw Message-ID: Subject: Re: [RFC PATCH] device-tree: size first hwdom bank for boot modules To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , "Daniel P. Smith" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-42698a/1779731817-1BD7FF3B-61A8E13F/0/0 X-purgate-type: clean X-purgate-size: 13218 Hi Michal, Thank you for the detailed review. On Mon, May 25, 2026 at 10:35=E2=80=AFAM Orzel, Michal wrote: > > > > On 17-May-26 22:57, Mykola Kvach wrote: > > From: Mykola Kvach > > > > With LLC coloring enabled, the hardware domain memory comes from > > allocate_hwdom_memory(), not from the fixed direct-map banks used when > > coloring is off. > > > > Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for > > DMA") made that allocator sort free host regions by ascending address s= o > > Dom0 gets DMA-capable low memory first. The first bank filter still onl= y > > required 128MB. That can select a low region which is large enough for > > the heuristic, but not large enough for place_modules() to put the Dom0 > Don't mention dom0 given that this is purely hwdom path. Ack. > > > kernel, generated DTB and initrd contiguously in bank 0. > > > > Ask arch code for any additional first-bank size requirement. On Arm, > > compute it from the actual Dom0 kernel placement, rounded initrd size a= nd > > generated DTB size hint. For 64-bit Image kernels, include the text off= set > > from the candidate bank start, because the returned requirement is comp= ared > > with a bank size measured from that start. The hint covers both the nor= mal > > Device Tree path and the minimal DTB created for ACPI boot. > > > > Check the first-bank threshold against the size which will actually be > > assigned to Dom0, after capping the host region by the remaining unassi= gned > > Dom0 memory. Otherwise a large host region could pass the test but stil= l > > produce a first guest bank too small for place_modules(). > > > > Use the typed min()/max() helpers for this normal allocation arithmetic= ; > > MIN()/MAX() are intended for preprocessor-style contexts and skip the t= ype > > checking provided by the lowercase helpers. > > > > This keeps the DMA-oriented allocation policy from de99f3263555 while > > preventing a too-small bank 0 from reaching place_modules(). > > > > Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for = DMA") > > Signed-off-by: Mykola Kvach > > --- > > Test/setup notes: > > > > The failure was reproduced on a Renesas H3ULCB/R-Car H3 (r8a7795) > > arm64 board booted through U-Boot/TFTP and using huge initrd. > > > > Relevant Xen command line excerpt: > > dom0_mem=3D2048M llc-coloring=3Don > > > > Boot module layout from Xen: > > MODULE[2]: 0x0000000084000040-0x000000008e75d92f Ramdisk > > MODULE[3]: 0x00000000a0000000-0x00000000a3ffffff Kernel > > MODULE[4]: 0x00000000a4000000-0x00000000a400ffff XSM Policy > > > > The initrd is about 168MB. With LLC coloring enabled and the low-addres= s > > allocation policy from de99f3263555, Dom0 can receive a 192MB first ban= k: > > d0 BANK[0] 0x00000048000000-0x00000054000000 (192MB) > > > > That bank satisfies the old 128MB minimum but is too small for the > > rounded Dom0 kernel, generated DTB and initrd placement. The observed > > failure before this patch was: > > Panic on CPU 0: > > Not enough memory in the first bank for the kernel+dtb+initrd > > > > With this patch, the same boot skips the too-small low region for bank = 0 > > and reaches Dom0: > > d0 BANK[0] 0x00000057000000-0x00000084000000 (720MB) > > d0 BANK[1] 0x0000008e800000-0x000000c0000000 (792MB) > > d0 BANK[2] 0x00000500000000-0x00000521800000 (536MB) > > d0: extended region 0: 0x48000000->0x54000000 > > Loading zImage from 0x00000000a0000000 to 0x57000000-0x5b000000 > > Loading d0 initrd from 0x0000000084000040 to 0x5f200000-0x6995d8f0 > > Loading d0 DTB to 0x5f000000-0x5f011c80 > > Linux version 5.10.194-yocto-standard > > --- > > xen/arch/arm/acpi/domain_build.c | 2 -- > > xen/arch/arm/domain_build.c | 8 ++++++ > > xen/arch/arm/include/asm/domain_build.h | 4 +++ > > xen/arch/arm/include/asm/kernel.h | 8 ++++++ > > xen/arch/arm/kernel.c | 35 +++++++++++++++++++++++++ > > xen/common/device-tree/domain-build.c | 27 ++++++++++++++----- > > xen/include/xen/fdt-kernel.h | 8 ++++++ > > 7 files changed, 83 insertions(+), 9 deletions(-) > > > > diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domai= n_build.c > > index 249d899c33..db16f7fa94 100644 > > --- a/xen/arch/arm/acpi/domain_build.c > > +++ b/xen/arch/arm/acpi/domain_build.c > > @@ -26,8 +26,6 @@ > > #undef virt_to_mfn > > #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) > > > > -#define ACPI_DOM0_FDT_MIN_SIZE 4096 > > - > > static int __init acpi_iomem_deny_access(struct domain *d) > > { > > acpi_status status; > > diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c > > index 1efddc60ef..226e053c68 100644 > > --- a/xen/arch/arm/domain_build.c > > +++ b/xen/arch/arm/domain_build.c > > @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, co= nst char *e) > > (IS_ENABLED(CONFIG_STATIC_SHM) ? = \ > > (NR_SHMEM_BANKS * (160 + 16)) : 0)) > > > > +paddr_t __init dom0_get_fdt_size_hint(void) > > +{ > > + if ( !acpi_disabled ) > > + return ACPI_DOM0_FDT_MIN_SIZE; > > + > > + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; > > +} > > + > > unsigned int __init dom0_max_vcpus(void) > > { > > if ( opt_dom0_max_vcpus =3D=3D 0 ) > > diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/inc= lude/asm/domain_build.h > > index df8b361b3d..45687c5d6f 100644 > > --- a/xen/arch/arm/include/asm/domain_build.h > > +++ b/xen/arch/arm/include/asm/domain_build.h > > @@ -19,6 +19,10 @@ int prepare_acpi(struct domain *d, struct kernel_inf= o *kinfo); > > > > int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *da= ta); > > > > +#define ACPI_DOM0_FDT_MIN_SIZE 4096 > > + > > +paddr_t dom0_get_fdt_size_hint(void); > > + > > #if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) > > /* Utility function to determine if an Armv8-R processor supports VMSA= . */ > > bool has_v8r_vmsa_support(void); > > diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/a= sm/kernel.h > > index 21f4273fa1..17c5b9bce4 100644 > > --- a/xen/arch/arm/include/asm/kernel.h > > +++ b/xen/arch/arm/include/asm/kernel.h > > @@ -8,12 +8,20 @@ > > > > #include > > > > +#include > > + > > +struct kernel_info; > > + > > struct arch_kernel_info > > { > > /* Enable pl011 emulation */ > > bool vpl011; > > }; > > > > +#define arch_get_min_first_bank_size arch_get_min_first_bank_size > > +paddr_t arch_get_min_first_bank_size(struct kernel_info *info, > > + paddr_t bank_start); > > + > > #endif /* #ifdef __ARCH_ARM_KERNEL_H__ */ > > > > /* > > diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c > > index b72585b7fe..3644663e2f 100644 > > --- a/xen/arch/arm/kernel.c > > +++ b/xen/arch/arm/kernel.c > > @@ -128,6 +128,41 @@ static paddr_t __init kernel_zimage_place(struct k= ernel_info *info) > > return load_addr; > > } > > > > +static paddr_t __init kernel_placement_size(paddr_t load_addr, paddr_t= len) > > +{ > > + return ROUNDUP(load_addr + len, MB(2)) - load_addr; > Used from one site. place_modules() open-codes the same > expression; the CONFIG_HAS_DOMAIN_TYPE branch below is > kernel_placement_size(load_addr, len) + text_offset. Either drop the help= er or > use it consistently. Ack, I will use the helper consistently. > > > +} > > + > > +paddr_t __init arch_get_min_first_bank_size(struct kernel_info *info, > info is RO, so const please. Ack. > > > + paddr_t bank_start) > > +{ > > + const struct boot_module *mod =3D info->bd.initrd; > Why mod instead of initrd? - choose more meaningful names Ack. > > > + const paddr_t initrd_len =3D ROUNDUP(mod ? mod->size : 0, MB(2)); > It would be nice to explain why 2MB, at least to say that it mirrors > place_modules rounding. Ack, I will add a comment that this mirrors the 2MB rounding used by place_modules(). > > > + const paddr_t dtb_len =3D ROUNDUP(dom0_get_fdt_size_hint(), MB(2))= ; > > + paddr_t kernsize; > > + > > +#ifdef CONFIG_HAS_DOMAIN_TYPE > > + if ( (info->type =3D=3D DOMAIN_64BIT) && (info->image.start =3D=3D= 0) ) > > + { > > + paddr_t load_addr =3D bank_start + info->image.text_offset; > > + > > + /* > > + * The caller compares this value with a size measured from > > + * bank_start, so include the text offset before the kernel. > The comment belongs above the load_addr line above. Ack. > > > + */ > > + kernsize =3D ROUNDUP(load_addr + info->image.len, MB(2)) - ban= k_start; > > + return kernsize + initrd_len + dtb_len; > Could it be written as: > info->image.text_offset + kernel_placement_size(load_addr, info->image.le= n) Ack, I will rewrite it that way. > > > + } > > +#endif > > + > > + if ( info->image.start =3D=3D 0 ) > > + kernsize =3D ROUNDUP(info->image.len, MB(2)); > > + else > > + kernsize =3D kernel_placement_size(info->image.start, info->im= age.len); > This could be written as a single expression, no need for if/else: > kernsize =3D kernel_placement_size(info->image.start, info->image.len); Ack. You are right, kernel_placement_size(0, len) is mathematically equivalent to ROUNDUP(len, MB(2)). I will simplify this to a single expression in the next version. > > > + > > + return kernsize + initrd_len + dtb_len; > > +} > > + > > static void __init kernel_zimage_load(struct kernel_info *info) > > { > > paddr_t load_addr =3D kernel_zimage_place(info); > > diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-= tree/domain-build.c > > index 2a760b007b..d8865db259 100644 > > --- a/xen/common/device-tree/domain-build.c > > +++ b/xen/common/device-tree/domain-build.c > > @@ -299,20 +299,33 @@ static bool __init allocate_hwdom_memory(struct k= ernel_info *kinfo) > > > > for ( i =3D 0; (kinfo->unassigned_mem > 0) && (i < nr_banks); i++ = ) > > { > > - paddr_t bank_size; > > + const paddr_t bank_start =3D hwdom_free_mem->bank[i].start; > > + paddr_t bank_size =3D hwdom_free_mem->bank[i].size; > > + > > + /* > > + * Check the size that would actually be assigned, not just th= e size > > + * of the host region. > > + */ > > + bank_size =3D min(bank_size, kinfo->unassigned_mem); > > > > /* > > * The first bank must be large enough for place_modules() to > > * fit the kernel, DTB and initrd. Skip small regions to avoi= d > > * ending up with a tiny first bank. > > */ > > - if ( !mem->nr_banks && (hwdom_free_mem->bank[i].size < min_ban= k_size) ) > > - continue; > > + if ( !mem->nr_banks ) > > + { > > + paddr_t arch_min_size; > > + paddr_t required_first_bank_size; > > + > > + arch_min_size =3D arch_get_min_first_bank_size(kinfo, bank= _start); > > + required_first_bank_size =3D max(min_bank_size, arch_min_s= ize); > > + > > + if ( bank_size < required_first_bank_size ) > > + continue; > > + } > > > > - bank_size =3D MIN(hwdom_free_mem->bank[i].size, kinfo->unassig= ned_mem); > > - if ( !allocate_bank_memory(kinfo, > > - gaddr_to_gfn(hwdom_free_mem->bank[i= ].start), > > - bank_size) ) > > + if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), ba= nk_size) ) > > { > > xfree(hwdom_free_mem); > > return false; > > diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.= h > > index 8cd1670c2c..931b3e1686 100644 > > --- a/xen/include/xen/fdt-kernel.h > > +++ b/xen/include/xen/fdt-kernel.h > > @@ -86,6 +86,14 @@ kernel_info_get_mem_const(const struct kernel_info *= kinfo) > > return container_of(&kinfo->mem.common, const struct membanks, com= mon); > > } > > > > +#ifndef arch_get_min_first_bank_size > > +static inline paddr_t arch_get_min_first_bank_size(struct kernel_info = *info, > > + paddr_t bank_start) > > +{ > > + return 0; > > +} > > +#endif > > + > > #ifndef KERNEL_INFO_SHM_MEM_INIT > > > > #ifdef CONFIG_STATIC_SHM > > As for the upstream CI test, we should start with more generic tests that= we are > missing (like regular LLC boot) before thinking of covering more granular > scenarios. Also, in the past we agreed on first covering the supported fe= atures > before adding tests for unsupported ones. Ack, that makes sense. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Mon May 25 18:13:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 18:13:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319427.1587042 (Exim 4.92) (envelope-from ) id 1wRZo8-0007im-Qo; Mon, 25 May 2026 18:13:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319427.1587042; Mon, 25 May 2026 18:13:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRZo8-0007if-N1; Mon, 25 May 2026 18:13:44 +0000 Received: by outflank-mailman (input) for mailman id 1319427; Mon, 25 May 2026 18:13:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRZo7-0007iZ-Sw for xen-devel@lists.xenproject.org; Mon, 25 May 2026 18:13:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRZo7-000KFS-9E for xen-devel@lists.xenproject.org; Mon, 25 May 2026 20:13:43 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a149157-2eae-0a2a0a5409dd-0a2a4502a4e4-0 for ; Mon, 25 May 2026 20:13:43 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a149157-af86-0a2a45020019-d1558033c94e-3 for ; Mon, 25 May 2026 20:13:43 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-4903974854dso36801255e9.3 for ; Mon, 25 May 2026 11:13:43 -0700 (PDT) Received: from [10.17.80.122] (ll-22.209.223.85.sovam.net.ua. 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For > non-control domains, including the hardware domain when it is not acting > as a control domain, the call is handled as a guest/domain suspend request > and parks the domain in SHUTDOWN_suspend. > > Control domains need additional sequencing because their SYSTEM_SUSPEND > request is used to coordinate host-wide suspend. A non-last awake control > domain may be parked in SHUTDOWN_suspend without requiring the host > suspend path to be available. The last awake control domain is treated as > the point where the request becomes a host-suspend request, and it may > only proceed when all non-control domains are already in SHUTDOWN_suspend > and the host suspend path is available. > > Keep the control-domain sequencing and domain-readiness checks out of > PSCI_FEATURES. They are per-attempt runtime conditions rather than stable > PSCI function availability. Advertise SYSTEM_SUSPEND as implemented by > vPSCI and report attempt-time policy failures as PSCI_DENIED. > > Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND > so that SHUTDOWN_suspend from the hardware domain can be treated as a > domain suspend state rather than as a hardware-domain initiated host > shutdown. This does not by itself imply that host-wide suspend is > available. > > Add host_system_suspend_allowed() to combine the host PSCI SYSTEM_SUSPEND > capability with runtime blockers reported by Xen-owned subsystems. Add > runtime blockers for registered serial, IOMMU, GIC and SMMUv3 MSI IRQ > paths lacking suspend/resume support. These blockers are runtime based, > so they only apply to drivers or paths that Xen actually uses on the > platform. For SMMUv3, the blocker applies only when Xen actually uses the > MSI IRQ path, since resume does not restore the SMMU *_IRQ_CFGn MSI > registers yet. > > Add a struct domain forward declaration to xen/suspend.h so the generic > header can expose arch_domain_resume() without requiring a full domain.h > include. > > Signed-off-by: Mykola Kvach > --- > Changes in V10: > - Return PSCI_DENIED rather than PSCI_NOT_SUPPORTED when the last awake > control domain cannot proceed to host suspend, keeping PSCI_FEATURES > stable once SYSTEM_SUSPEND is advertised. > - Shorten SYSTEM_SUSPEND blocker messages and use %pd when logging the > control domain. > - Mark serial_suspend_available as __ro_after_init. > - Mention the struct domain forward declaration added to xen/suspend.h. I did not spot obvious issues while reviewing this patch, so you can add: Reviewed-by: Oleksandr Tyshchenko Several nits/remarks below, feel free to skip them if you find them irrelevant or not useful. > > Changes in V9: > - Select HAS_HWDOM_SYSTEM_SUSPEND independently from CONFIG_SYSTEM_SUSPEND > so that hardware-domain SHUTDOWN_suspend support is not tied to > host-wide system suspend availability. > - Add runtime host suspend blockers for Xen-owned subsystems lacking > suspend/resume support. > - Keep vPSCI SYSTEM_SUSPEND advertised through PSCI_FEATURES and enforce > control-domain sequencing in the call handler. > --- > xen/arch/arm/Kconfig | 1 + > xen/arch/arm/gic.c | 6 ++ > xen/arch/arm/include/asm/psci.h | 3 + > xen/arch/arm/include/asm/suspend.h | 10 ++- > xen/arch/arm/psci.c | 7 ++ > xen/arch/arm/suspend.c | 40 +++++++++ > xen/arch/arm/vpsci.c | 114 +++++++++++++++++++++++--- > xen/common/Kconfig | 3 + > xen/common/domain.c | 7 +- > xen/drivers/char/serial.c | 12 +++ > xen/drivers/passthrough/arm/iommu.c | 4 + > xen/drivers/passthrough/arm/smmu-v3.c | 4 + > xen/include/xen/serial.h | 1 + > xen/include/xen/suspend.h | 2 + > 14 files changed, 201 insertions(+), 13 deletions(-) > > diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig > index 79622b46a1..54a5bfb9ae 100644 > --- a/xen/arch/arm/Kconfig > +++ b/xen/arch/arm/Kconfig > @@ -19,6 +19,7 @@ config ARM > select HAS_ALTERNATIVE if HAS_VMAP > select HAS_DEVICE_TREE_DISCOVERY > select HAS_DOM0LESS > + select HAS_HWDOM_SYSTEM_SUSPEND if !MPU > select HAS_GRANT_CACHE_FLUSH if GRANT_TABLE > select HAS_STACK_PROTECTOR > select HAS_UBSAN > diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c > index 7727ffed5a..60488c95b4 100644 > --- a/xen/arch/arm/gic.c > +++ b/xen/arch/arm/gic.c > @@ -26,6 +26,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -44,6 +45,11 @@ static void __init __maybe_unused build_assertions(void) > void register_gic_ops(const struct gic_hw_operations *ops) > { > gic_hw_ops = ops; > + > +#ifdef CONFIG_SYSTEM_SUSPEND > + if ( !ops->suspend || !ops->resume ) > + host_system_suspend_disable("GIC driver lacks suspend support"); > +#endif > } > > static void clear_cpu_lr_mask(void) > diff --git a/xen/arch/arm/include/asm/psci.h b/xen/arch/arm/include/asm/psci.h > index bb3c73496e..142fa1bfe5 100644 > --- a/xen/arch/arm/include/asm/psci.h > +++ b/xen/arch/arm/include/asm/psci.h > @@ -24,6 +24,9 @@ void call_psci_cpu_off(void); > void call_psci_system_off(void); > void call_psci_system_reset(void); > int call_psci_system_suspend(void); > +#ifdef CONFIG_SYSTEM_SUSPEND > +bool psci_system_suspend_allowed(void); > +#endif > > /* Range of allocated PSCI function numbers */ > #define PSCI_FNUM_MIN_VALUE _AC(0,U) > diff --git a/xen/arch/arm/include/asm/suspend.h b/xen/arch/arm/include/asm/suspend.h > index c848fc6340..50dc6e9fdf 100644 > --- a/xen/arch/arm/include/asm/suspend.h > +++ b/xen/arch/arm/include/asm/suspend.h > @@ -39,7 +39,15 @@ extern struct resume_cpu_context resume_cpu_context; > > int prepare_resume_ctx(void); > void hyp_resume(void); > -#endif /* CONFIG_SYSTEM_SUSPEND */ > +bool host_system_suspend_allowed(void); > +void host_system_suspend_disable(const char *reason); > + > +#else /* !CONFIG_SYSTEM_SUSPEND */ > + > +static inline bool host_system_suspend_allowed(void) { return false; } > +static inline void host_system_suspend_disable(const char *reason) {} > + > +#endif > > #endif /* ARM_SUSPEND_H */ > > diff --git a/xen/arch/arm/psci.c b/xen/arch/arm/psci.c > index e05dae1133..e9d78668fd 100644 > --- a/xen/arch/arm/psci.c > +++ b/xen/arch/arm/psci.c > @@ -41,6 +41,13 @@ static bool __ro_after_init has_psci_system_suspend; > > #define PSCI_RET(res) ((int32_t)(res).a0) > > +#ifdef CONFIG_SYSTEM_SUSPEND > +bool psci_system_suspend_allowed(void) > +{ > + return has_psci_system_suspend; > +} > +#endif > + > int call_psci_cpu_on(int cpu) > { > struct arm_smccc_res res; > diff --git a/xen/arch/arm/suspend.c b/xen/arch/arm/suspend.c > index 6ea4a0f9cc..98ddd46a47 100644 > --- a/xen/arch/arm/suspend.c > +++ b/xen/arch/arm/suspend.c > @@ -1,9 +1,49 @@ > /* SPDX-License-Identifier: GPL-2.0-only */ > > +#include > #include > > +#include > +#include > + > struct resume_cpu_context resume_cpu_context; > > +/* > + * Non-PSCI infrastructure can make host suspend impossible even when the PSCI > + * SYSTEM_SUSPEND conduit is present, e.g. when a Xen-owned driver has no valid > + * suspend/resume path. > + * > + * This gate is checked only when the last awake control domain attempts to > + * turn a guest SYSTEM_SUSPEND request into a host-suspend request. > + */ > +static bool host_system_suspend_runtime_allowed = true; All callers of host_system_suspend_disable() appear to execute during boot. I noticed you added __ro_after_init to serial_suspend_available (same lifecycle), making the omission here a bit inconsistent. Should host_system_suspend_runtime_allowed be marked as __ro_after_init as well? Or I missed something? > + > +static bool host_serial_suspend_allowed(void) > +{ > + if ( serial_suspend_supported() ) > + return true; > + > + printk_once(XENLOG_INFO > + "Host SYSTEM_SUSPEND blocked: serial unsupported\n"); > + > + return false; > +} > + > +bool host_system_suspend_allowed(void) > +{ > + return psci_system_suspend_allowed() && > + host_serial_suspend_allowed() && > + host_system_suspend_runtime_allowed; > +} > + > +void host_system_suspend_disable(const char *reason) > +{ > + host_system_suspend_runtime_allowed = false; > + > + printk(XENLOG_INFO "Host SYSTEM_SUSPEND blocked: %s\n", > + reason ? reason : "unsupported suspend/resume path"); On a system with N SMMUv3 instances using MSIs (each calling host_system_suspend_disable() from arm_smmu_setup_msis()), the same message is printed N times... > +} > + > /* > * Local variables: > * mode: C > diff --git a/xen/arch/arm/vpsci.c b/xen/arch/arm/vpsci.c > index ac6af6118f..0bae42c1bd 100644 > --- a/xen/arch/arm/vpsci.c > +++ b/xen/arch/arm/vpsci.c > @@ -5,6 +5,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -219,6 +220,89 @@ static void do_psci_0_2_system_reset(void) > domain_shutdown(d,SHUTDOWN_reboot); > } > > +/* > + * Serialise SYSTEM_SUSPEND policy decisions with the domain suspend transition, > + * so multiple control domains cannot all observe each other as still awake. > + */ > +static DEFINE_SPINLOCK(vpsci_system_suspend_lock); > + > +static bool domain_in_suspend_state(struct domain *d) > +{ > + bool suspended; > + > + spin_lock(&d->shutdown_lock); > + suspended = d->is_shut_down && d->shutdown_code == SHUTDOWN_suspend; > + spin_unlock(&d->shutdown_lock); > + > + return suspended; > +} > + > +static int32_t domain_psci_system_suspend_policy(struct domain *d) > +{ > + struct domain *other; > + bool last_awake_control_domain = true; > + bool awake_non_control_domain = false; > + > + /* Only control domains participate in sequencing policy. */ > + if ( !is_control_domain(d) ) > + return 0; > + > + rcu_read_lock(&domlist_read_lock); > + > + for_each_domain ( other ) > + { > + bool suspended; > + > + if ( other == d ) > + continue; > + > + suspended = domain_in_suspend_state(other); > + if ( suspended ) > + continue; > + > + if ( is_control_domain(other) ) > + { > + last_awake_control_domain = false; > + break; > + } > + > + awake_non_control_domain = true; > + } > + > + rcu_read_unlock(&domlist_read_lock); > + > + /* > + * Another control domain is still awake. This request is only the first > + * phase of the sequencing: park this control domain and leave the host > + * running. Host-wide suspend gates must not block this intermediate state. > + */ > + if ( !last_awake_control_domain ) > + return 0; > + > + /* > + * This is the last awake control domain. It must not be parked unless the > + * request can proceed as a host-suspend request; otherwise Xen would lose > + * the last domain that can coordinate the system suspend. > + */ > + if ( awake_non_control_domain ) > + { > + printk(XENLOG_DEBUG > + "SYSTEM_SUSPEND denied for %pd: non-control domains awake\n", > + d); > + return PSCI_DENIED; > + } > + > + /* > + * Host-wide gates are relevant only for the last-control-domain case. They > + * must not block parking of a non-last control domain, but they must deny > + * the last control domain when host suspend is not currently available. > + */ > + if ( !host_system_suspend_allowed() ) > + return PSCI_DENIED; > + > + return 0; > +} > + > static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > { > int32_t rc; > @@ -232,10 +316,6 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > if ( is_64bit_domain(d) && is_thumb ) > return PSCI_INVALID_ADDRESS; > > - /* SYSTEM_SUSPEND is not supported for the hardware domain yet */ > - if ( is_hardware_domain(d) ) > - return PSCI_NOT_SUPPORTED; > - > /* Ensure that all CPUs other than the calling one are offline */ > domain_lock(d); > for_each_vcpu ( d, v ) > @@ -252,16 +332,29 @@ static int32_t do_psci_1_0_system_suspend(register_t epoint, register_t cid) > if ( rc ) > return PSCI_DENIED; > > - rc = domain_shutdown(d, SHUTDOWN_suspend); > + spin_lock(&vpsci_system_suspend_lock); > + > + rc = domain_psci_system_suspend_policy(d); > + if ( !rc ) > + { > + rc = domain_shutdown(d, SHUTDOWN_suspend); > + if ( rc ) > + rc = PSCI_DENIED; > + else > + { > + rctx->ctxt = ctxt; > + rctx->wake_cpu = current; > + } > + } > + > + spin_unlock(&vpsci_system_suspend_lock); > + > if ( rc ) > { > free_vcpu_guest_context(ctxt); > - return PSCI_DENIED; > + return rc; > } > > - rctx->ctxt = ctxt; > - rctx->wake_cpu = current; > - > gprintk(XENLOG_DEBUG, > "SYSTEM_SUSPEND requested, epoint=%#"PRIregister", cid=%#"PRIregister"\n", > epoint, cid); > @@ -287,10 +380,9 @@ static int32_t do_psci_1_0_features(uint32_t psci_func_id) > case PSCI_0_2_FN32_SYSTEM_RESET: > case PSCI_1_0_FN32_PSCI_FEATURES: > case ARM_SMCCC_VERSION_FID: > - return 0; > case PSCI_1_0_FN32_SYSTEM_SUSPEND: > case PSCI_1_0_FN64_SYSTEM_SUSPEND: > - return is_hardware_domain(current->domain) ? PSCI_NOT_SUPPORTED : 0; > + return 0; > default: > return PSCI_NOT_SUPPORTED; > } > diff --git a/xen/common/Kconfig b/xen/common/Kconfig > index 5ff71480ee..816a1a4ecb 100644 > --- a/xen/common/Kconfig > +++ b/xen/common/Kconfig > @@ -140,6 +140,9 @@ config HAS_EX_TABLE > config HAS_FAST_MULTIPLY > bool > > +config HAS_HWDOM_SYSTEM_SUSPEND > + bool > + > config HAS_IOPORTS > bool > > diff --git a/xen/common/domain.c b/xen/common/domain.c > index bb9e210c28..d3edfb2a13 100644 > --- a/xen/common/domain.c > +++ b/xen/common/domain.c > @@ -1375,6 +1375,11 @@ void __domain_crash(struct domain *d) > domain_shutdown(d, SHUTDOWN_crash); > } > > +static inline bool want_hwdom_shutdown(uint8_t reason) > +{ > + return !IS_ENABLED(CONFIG_HAS_HWDOM_SYSTEM_SUSPEND) || > + reason != SHUTDOWN_suspend; > +} > > int domain_shutdown(struct domain *d, u8 reason) > { > @@ -1391,7 +1396,7 @@ int domain_shutdown(struct domain *d, u8 reason) > d->shutdown_code = reason; > reason = d->shutdown_code; > > - if ( is_hardware_domain(d) ) > + if ( is_hardware_domain(d) && want_hwdom_shutdown(reason) ) > hwdom_shutdown(reason); > > if ( d->is_shutting_down ) > diff --git a/xen/drivers/char/serial.c b/xen/drivers/char/serial.c > index adb312d796..e5348b5445 100644 > --- a/xen/drivers/char/serial.c > +++ b/xen/drivers/char/serial.c > @@ -497,6 +497,8 @@ const struct vuart_info *serial_vuart_info(int idx) > > #ifdef CONFIG_SYSTEM_SUSPEND > > +static bool __ro_after_init serial_suspend_available = true; > + > void serial_suspend(void) > { > int i; > @@ -513,6 +515,11 @@ void serial_resume(void) > com[i].driver->resume(&com[i]); > } > > +bool serial_suspend_supported(void) > +{ > + return serial_suspend_available; > +} > + > #endif /* CONFIG_SYSTEM_SUSPEND */ > > void __init serial_register_uart(int idx, struct uart_driver *driver, > @@ -521,6 +528,11 @@ void __init serial_register_uart(int idx, struct uart_driver *driver, > /* Store UART-specific info. */ > com[idx].driver = driver; > com[idx].uart = uart; > + > +#ifdef CONFIG_SYSTEM_SUSPEND > + if ( !driver->suspend || !driver->resume ) > + serial_suspend_available = false; > +#endif > } > > void __init serial_async_transmit(struct serial_port *port) > diff --git a/xen/drivers/passthrough/arm/iommu.c b/xen/drivers/passthrough/arm/iommu.c > index 100545e23f..547048af05 100644 > --- a/xen/drivers/passthrough/arm/iommu.c > +++ b/xen/drivers/passthrough/arm/iommu.c > @@ -19,6 +19,7 @@ > #include > #include > #include > +#include > > #include > > @@ -46,6 +47,9 @@ void __init iommu_set_ops(const struct iommu_ops *ops) > } > > iommu_ops = ops; > + > + if ( !ops->suspend || !ops->resume ) > + host_system_suspend_disable("IOMMU driver lacks suspend support"); I was initially wondering why the suspend/resume checks for the GIC and serial are wrapped in #ifdef CONFIG_SYSTEM_SUSPEND, but the IOMMU check is not, despite host_system_suspend_disable() acting as no-op when CONFIG_SYSTEM_SUSPEND=n. Then I realized the divergence here because the suspend/resume members in struct iommu_ops are not gated with #ifdef, unlike those in struct gic_hw_operations and struct uart_driver. > } > > int __init iommu_hardware_setup(void) > diff --git a/xen/drivers/passthrough/arm/smmu-v3.c b/xen/drivers/passthrough/arm/smmu-v3.c > index be8028c036..1b6bb1bc5f 100644 > --- a/xen/drivers/passthrough/arm/smmu-v3.c > +++ b/xen/drivers/passthrough/arm/smmu-v3.c > @@ -91,6 +91,7 @@ > #include > #include > #include > +#include > > #include "smmu-v3.h" > > @@ -1903,6 +1904,9 @@ static void arm_smmu_setup_msis(struct arm_smmu_device *smmu) > } > } > > + host_system_suspend_disable( > + "SMMUv3 MSI IRQ path is unsupported for host suspend"); > + > /* Add callback to free MSIs on teardown */ > devm_add_action(dev, arm_smmu_free_msis, dev); > } > diff --git a/xen/include/xen/serial.h b/xen/include/xen/serial.h > index 8e18445552..418b00ead0 100644 > --- a/xen/include/xen/serial.h > +++ b/xen/include/xen/serial.h > @@ -137,6 +137,7 @@ const struct vuart_info* serial_vuart_info(int idx); > /* Serial suspend/resume. */ > void serial_suspend(void); > void serial_resume(void); > +bool serial_suspend_supported(void); > #endif > > /* > diff --git a/xen/include/xen/suspend.h b/xen/include/xen/suspend.h > index 6f94fd53b0..a941331035 100644 > --- a/xen/include/xen/suspend.h > +++ b/xen/include/xen/suspend.h > @@ -6,6 +6,8 @@ > #if __has_include() > #include > #else > +struct domain; > + > static inline void arch_domain_resume(struct domain *d) {} > #endif > From xen-devel-bounces@lists.xenproject.org Mon May 25 19:41:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Mon, 25 May 2026 19:41:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319462.1587051 (Exim 4.92) (envelope-from ) id 1wRbAd-0002xc-Jh; Mon, 25 May 2026 19:41:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319462.1587051; Mon, 25 May 2026 19:41:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRbAd-0002xV-Fy; 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Mon, 25 May 2026 12:41:00 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Mon, 25 May 2026 22:40:49 +0300 X-Gm-Features: AVHnY4IpZECPXVca0UxkIBpYLixfHn2roSQ0hIoNclny7N5u0nyev8Z1K6BOY2s Message-ID: Subject: Re: [PATCH 1/2] xen/arm: propagate vGIC vCPU init failures To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-d25034/1779738061-E1161CF5-6F67D538/0/0 X-purgate-type: clean X-purgate-size: 6639 Hi Michal, Thank you for the feedback. On Mon, May 25, 2026 at 12:46=E2=80=AFPM Orzel, Michal wrote: > > > > On 22-May-26 08:18, Mykola Kvach wrote: > > From: Mykola Kvach > > > > The vGIC per-vCPU init callback can fail. In particular, GICv3 rejects > > a vCPU when the domain's redistributor layout has no MMIO slot covering > > that vCPU. However, the generic vGIC init path ignored the callback > > return value, so vcpu_create() could succeed with an invalid vGICv3 > > per-vCPU state. > > > > This can be reproduced on FVP Base RevC by exposing a 2 MiB GICv3 > > redistributor region to Dom0 and booting Xen with: > > > > maxcpus=3D1 dom0_max_vcpus=3D64 > > > > The host GICv3 redistributor range is: > > > > region 0: 0x0000002f100000 - 0x0000002f300000 > > > > With Xen's guest redistributor frame size of 128 KiB, that range covers > > 16 guest redistributors. vCPU16 and above have no corresponding > > redistributor slot. > > > > Before this fix, Xen detected the missing redistributors: > > > > d0: Unable to find a re-distributor for VCPU 16 > > ... > > d0: Unable to find a re-distributor for VCPU 63 > > > > but ignored the error and continued as if the secondary vCPUs had been > > created correctly. Dom0 then saw 64 possible CPUs and could hang during > > secondary CPU bring-up: > > > > smp: Bringing up secondary CPUs ... > > d0v15: vGICR: SGI: unhandled word write ... to ICACTIVER0 > > > > Propagate the vGIC vcpu_init() error so the caller can stop creating > > secondary vCPUs. With this fix, Dom0 construction reports: > > > > d0: Unable to find a re-distributor for VCPU 16 > > Failed to allocate d0v16 > > > > and the guest continues booting with the vCPUs created before the > > failure: > > > > smp: Brought up 1 node, 16 CPUs > > > > Free the private IRQ rank allocated by vcpu_vgic_init() on this error > > path. The caller will still run the generic vCPU creation cleanup, but > > XFREE() clears the pointer so that cleanup remains idempotent. > > > > Also fix the host-layout redistributor region count for the case where > > the requested vCPU count is larger than the capacity of all host > > redistributor regions. The old code always stored i + 1 after the loop. > > That is correct when the loop stops inside a valid region because the > > requested vCPU count is covered. If the loop exits after consuming all > > hardware regions, i is already equal to the number of allocated regions= , > > so i + 1 records one region too many. > > > > In the same FVP setup, that off-by-one made Xen describe host-layout > > GICR state beyond the populated redistributor region list. Dom0 then > > accessed the GICR MMIO window described in its device tree, but Xen cou= ld > > not match the access to a valid emulated redistributor frame. During > > debugging this was seen as an unexpected vGICR access followed by a > > guest panic: > > > > d0v0: vGICR: unknown gpa read address 000000002f10ffe8 > > pc : gic_iterate_rdists+0x4c/0x104 > > Kernel panic - not syncing: Attempted to kill the idle task! > > > > Keep the existing best-effort Dom0 policy: a failure to create a > > secondary vCPU stops the secondary vCPU creation loop, but does not fai= l > > the whole Dom0 boot. > This is the construct_domain() policy that is used for both dom0 and dom0= less > domUs. I must say I don't really like this policy and it's against our *g= eneric* > Arm policy to fail the domain creation on any error especially if this be= longs > to unsatisfied user requests. This is not really related to your series, = but I > would like to ask other Arm maintainers about their opinion. Yes, I agree this is a broader construct_domain() policy question. I kept the existing behaviour in this patch, but I am fine with adjusting it if the maintainers decide that domain creation should fail in this case. In any case, I will reword the commit message so it does not describe this as a Dom0-only policy, since the same construct_domain() path is also used for dom0less domains. > > > > > Fixes: ea37fd21110b ("xen/arm: split vgic driver into generic and vgic-= v2 driver") > > Fixes: 54ec59f6b0b3 ("xen/arm: vgic-v3: Don't create empty re-distribut= or regions") > > Signed-off-by: Mykola Kvach > > --- > > xen/arch/arm/vgic-v3.c | 3 ++- > > xen/arch/arm/vgic.c | 10 +++++++--- > > 2 files changed, 9 insertions(+), 4 deletions(-) > > > > diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c > > index 77517c3030..360778eb32 100644 > > --- a/xen/arch/arm/vgic-v3.c > > +++ b/xen/arch/arm/vgic-v3.c > > @@ -1834,7 +1834,8 @@ static int vgic_v3_domain_init(struct domain *d) > > * not match the number of pCPUs). Update the number of region= s to > > * avoid exposing unused region as they will not get emulated. > > */ > > - d->arch.vgic.nr_regions =3D i + 1; > > + d->arch.vgic.nr_regions =3D (i =3D=3D vgic_v3_hw.nr_rdist_regi= ons) ? > > + i : i + 1; > Wouldn't min(i+1,vgic_v3_hw.nr_rdist_regions) be cleaner? Ack, I will change this in v2. > > > > > d->arch.vgic.intid_bits =3D vgic_v3_hw.intid_bits; > > } > > diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c > > index 6647071ad4..e55e484493 100644 > > --- a/xen/arch/arm/vgic.c > > +++ b/xen/arch/arm/vgic.c > > @@ -368,7 +368,7 @@ void domain_vgic_free(struct domain *d) > > > > int vcpu_vgic_init(struct vcpu *v) > > { > > - int i; > > + int i, ret; > > > > v->arch.vgic.private_irqs =3D xzalloc(struct vgic_irq_rank); > > if ( v->arch.vgic.private_irqs =3D=3D NULL ) > > @@ -377,7 +377,12 @@ int vcpu_vgic_init(struct vcpu *v) > > /* SGIs/PPIs are always routed to this VCPU */ > > vgic_rank_init(v->arch.vgic.private_irqs, 0, v->vcpu_id); > > > > - v->domain->arch.vgic.handler->vcpu_init(v); > > + ret =3D v->domain->arch.vgic.handler->vcpu_init(v); > > + if ( ret ) > > + { > > + XFREE(v->arch.vgic.private_irqs); > > + return ret; > > + } > > > > memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_= irqs)); > > for (i =3D 0; i < 32; i++) > > @@ -944,4 +949,3 @@ void vgic_check_inflight_irqs_pending(struct vcpu *= v, unsigned int rank, uint32_ > > * indent-tabs-mode: nil > > * End: > > */ > > - > Stray change, please drop. Ack. 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Mon, 25 May 2026 13:22:11 -0700 (PDT) MIME-Version: 1.0 References: <88459940b410ceddc04bca7e2cadf7c16bd5c13b.1779430299.git.mykola_kvach@epam.com> In-Reply-To: From: Mykola Kvach Date: Mon, 25 May 2026 23:21:59 +0300 X-Gm-Features: AVHnY4IGuUTRlWcpOAAttbTo2Vn6IWIzaq-dJd_KkIl03Ikx7alNDTxJYpKg4KY Message-ID: Subject: Re: [PATCH 2/2] docs: Document Arm GICv3 limit for dom0_max_vcpus To: "Orzel, Michal" Cc: xen-devel@lists.xenproject.org, Mykola Kvach , Andrew Cooper , Anthony PERARD , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-16d1c6/1779740532-87170D75-DA1DA3A4/0/0 X-purgate-type: clean X-purgate-size: 2523 Hi Michal, Thank you for the review. On Mon, May 25, 2026 at 12:55=E2=80=AFPM Orzel, Michal wrote: > > > > On 22-May-26 08:18, Mykola Kvach wrote: > > From: Mykola Kvach > > > > On Arm GICv3 systems, Dom0 may use the host GIC layout, for example > > when it is the hardware domain. In that case the effective Dom0 vCPU > > count is not only bounded by the requested dom0_max_vcpus value and > > Xen's generic vCPU limits. It is also bounded by the redistributor MMIO > > regions that can be exposed for the host layout. > > > > Document that Xen can only create Dom0 vCPUs whose virtual redistributo= r > > frame is covered by those regions, and that secondary vCPU creation sto= ps > > at the first vCPU whose virtual redistributor frame is not covered. > > > > Signed-off-by: Mykola Kvach > > --- > > docs/misc/xen-command-line.pandoc | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-= line.pandoc > > index d46d5b2152..0a5589b24c 100644 > > --- a/docs/misc/xen-command-line.pandoc > > +++ b/docs/misc/xen-command-line.pandoc > > @@ -981,6 +981,14 @@ The number of VCPUs to give to dom0. This number = of VCPUs can be more > > than the number of PCPUs on the host. The default is the number of > > PCPUs. > > > > +On Arm systems using GICv3, Dom0 may use the host GIC layout, for exam= ple > It's not dom0 specific. It can by any domain using host memory layout mea= ning > dom0, hwdom, domU direct mapped, in which case I'm not sure if such comme= nt > should belong here given that this behavior is not dom0_max_vcpus specifi= c (same > could be triggered on your setup with dom0less domU, direct-mapped and 17= vCPUs). You are right that the redistributor coverage limit is not specific to dom0_max_vcpus. It applies to Arm GICv3 domains using the host layout, such as the hardware domain or a direct-mapped domain. My reason for touching dom0_max_vcpus was that this option is where users are told how many Dom0 VCPUs Xen will try to create. However, the GICv3-specific details would fit better in a more generic Arm device-tree/domain description section, around the cpus/direct-map properties. For dom0_max_vcpus, I can keep only a short generic note, for example: The resulting number of Dom0 VCPUs is still subject to Xen's generic and architecture-specific domain limits. ~Mykola From xen-devel-bounces@lists.xenproject.org Tue May 26 06:12:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 06:12:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319583.1587068 (Exim 4.92) (envelope-from ) id 1wRl1k-0003ee-Ka; Tue, 26 May 2026 06:12:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319583.1587068; Tue, 26 May 2026 06:12:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRl1k-0003eO-F5; Tue, 26 May 2026 06:12:32 +0000 Received: by outflank-mailman (input) for mailman id 1319583; Tue, 26 May 2026 06:12:31 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRl1j-0003eH-Rr for xen-devel@lists.xenproject.org; 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dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779775948; bh=C4Q6K7bbOoVpU1MwP5UtVcbQqMSK8GB1uvqgVWAyIgA=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=PaNxY70+YMonEMLTIazGO/O55U8XOU9hI8Sd6x+lIwRz+krY7I2MIFVP2TtWHQRk6 oLs6o/MlXIoueCpSrWzl4/TP61gPF+HN/xvzZ2vYpOcuWB0Dm95zHR9huRUsF9V+Hf YnTyB9za+3uCaHbFr+R2wcRewXry6G17iicxgZkjKeAXoiSONhiO8kf+vbI4ljsIDR 1fy3F+EBJAgg0t5T5mg4+PsdSDHbAEaAyRvnVetK1IwZ8UztJCg6MOoYJa1oLvRi7m 9dhRl/AKdtuVr7cjGvsAMXrJhl9YyIGQK1PcdmnOV19LefKY14Nezbe0MAE8vRqjtb Xzj2xjTt805IA== Date: Tue, 26 May 2026 08:12:26 +0200 From: Krzysztof Kozlowski To: Vijayanand Jitta Cc: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , Krzysztof =?utf-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Charan Teja Kalla Subject: Re: [PATCH v15 0/3] of: parsing of multi #{iommu,msi}-cells in maps Message-ID: <20260526-finicky-crafty-hare-eae27c@quoll> References: <20260520-parse_iommu_cells-v15-0-b5f99ad4e7e8@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260520-parse_iommu_cells-v15-0-b5f99ad4e7e8@oss.qualcomm.com> X-purgate-ID: tlsNG-ef75cf/1779775950-23175C48-D557B613/0/0 X-purgate-type: clean X-purgate-size: 1594 On Wed, May 20, 2026 at 01:32:39PM +0530, Vijayanand Jitta wrote: > So far our parsing of {iommu,msi}-map properties has always blindly > assumed that the output specifiers will always have exactly 1 cell. > This typically does happen to be the case, but is not actually enforced > (and the PCI msi-map binding even explicitly states support for 0 or 1 > cells) - as a result we've now ended up with dodgy DTs out in the field > which depend on this behaviour to map a 1-cell specifier for a 2-cell > provider, despite that being bogus per the bindings themselves. > > Since there is some potential use[1] in being able to map at least > single input IDs to multi-cell output specifiers (and properly support > 0-cell outputs as well), add support for properly parsing and using the > target nodes' #cells values, albeit with the unfortunate complication of > still having to work around expectations of the old behaviour too. > -- Robin. > > Unlike single #{}-cell, it is complex to establish a linear relation > between input 'id' and output specifier for multi-cell properties, thus > it is always expected that len never going to be > 1. > > These changes have been tested on QEMU for the arm64 architecture. So there is no real user for that. That's unconvincing. I would assume that at least you have real user where you test it. If you want to speed up acceptance of your patches, then also I would prefer to see at least one more user, beside Qualcomm. IOW, show how you solve other people problems, not only yours. Best regards, Krzysztof From xen-devel-bounces@lists.xenproject.org Tue May 26 06:18:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 06:18:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319592.1587078 (Exim 4.92) (envelope-from ) id 1wRl7g-0004Kq-6o; Tue, 26 May 2026 06:18:40 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319592.1587078; Tue, 26 May 2026 06:18:40 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRl7g-0004Kj-2d; Tue, 26 May 2026 06:18:40 +0000 Received: by outflank-mailman (input) for mailman id 1319592; Tue, 26 May 2026 06:18:39 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRl7e-0004Kd-R0 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 06:18:38 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRl7d-001sn2-Oa for xen-devel@lists.xenproject.org; Tue, 26 May 2026 08:18:37 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a153b28-5cb7-0a2a0a5109dd-0a2a450ab3d4-28 for ; Tue, 26 May 2026 08:18:37 +0200 Received: from [209.85.218.53] (helo=mail-ej1-f53.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a153b3d-56b3-0a2a450a0019-d155da35b119-3 for ; Tue, 26 May 2026 08:18:37 +0200 Received: by mail-ej1-f53.google.com with SMTP id a640c23a62f3a-bd5047a2a4cso1553548266b.3 for ; Mon, 25 May 2026 23:18:37 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Mon, 25 May 2026 23:18:37 -0700 (PDT) Message-ID: <1ba4ffba-e9e0-4858-b3b9-d45c950894c3@suse.com> Date: Tue, 26 May 2026 08:18:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/sched: fix stale file path comments in common/sched directory To: =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Furkan Caliskan Cc: xen-devel@lists.xenproject.org, dfaggioli@suse.com, gwd@xenproject.org, stewart.hildebrand@amd.com, jbeulich@suse.com References: <20260525102539.27050-1-frn1furkan10@gmail.com> Content-Language: en-US From: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: Content-Type: multipart/signed; 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bh=UkCzIeLvWAh14bJC5YgrJi7rKh2KALBGsS7powMCtXQ=; b=WUkug0u4VvoKcIKSejwz7rRZ9V0+uSs38Ma8l4NU+jy3temdErTUUlvcWjqYdRdKR4iGTpZq4uEI4GOCeJLklzEwnp3vvn0F5/kUbK5W5mC5Ah+4UBs2JRJLPqfH4iCggPPihy8D8EwLKpnCitex11ZN+NZMOvjGE92hNz7ZbrI= X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=satlexmb08.amd.com; pr=C Message-ID: Date: Tue, 26 May 2026 08:22:44 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 3/3] libfdt: fix UBSAN null pointer in fdt_property() To: Oleksii Kurochko , CC: Stefano Stabellini , Julien Grall , Bertrand Marquis , David Gibson , Baptiste Le Duc References: <248482e608157a7156f7bb6d8a809540a50f3f86.1779712171.git.oleksii.kurochko@gmail.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <248482e608157a7156f7bb6d8a809540a50f3f86.1779712171.git.oleksii.kurochko@gmail.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: D9HxSrRsw0hpI+Onec0eNF0sxE3Cl2l+OzvHBi13/JO4vZwJHhW9rFSmmK7EA5YFN1LRk2V+TtS75MQn5klBnU6lpxOMNGgk4N8GH8lRbXGEsczN8mibO2rPL71+fe6xjq7ZSleWEBebSOLUXar9GaSUPiu+yFHENRQV+3Scd39TSAo2Z8it2qL4rbQ/wh1Z4ypZlOGihPMtGHdt9BPR6S35D1aw4Oewnx4sN5g+TjEFXYseByH3gwuf7WC31kNifl2F0pzzqLF6xCCf7bGjQktH4aMFo0e2bpk9MMYk/Plv+uiCauTwIZVzpQNkjDhbqG5fql67oeelhIq8RztYBZvdIIgNeKgcsw9dBRJ16J8tTN17R4CbH+ORXB5R35I8RloX94eaPqTrBrfdCVh37Nw9Z83f6YGU/Nzw7Rsx5Dx7UiDHhzg7VmdGzfFzjxIS X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 May 2026 06:22:52.6544 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 49218356-3030-4e02-63fb-08debaef37ac X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ5PEPF000001CA.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4128 X-purgate-ID: tlsNG-d25034/1779776594-DA368CF5-7730A008/10/73395122804 X-purgate-type: spam X-purgate-size: 1032 On 25-May-26 15:20, Oleksii Kurochko wrote: > fdt_property() unconditionally calls memcpy(ptr, val, len) even when > len is zero and val is NULL. This is a legitimate calling convention > for adding empty FDT properties such as "interrupt-controller", which > carry no payload. > > However, compilers that treat memcpy as nonnull on its pointer arguments > will fire UBSAN before observing that len is zero. > > Guard the memcpy() with a check on len so it is skipped entirely when > there is no payload to copy, bringing the code in line with the > nonnull contract. > > Signed-off-by: Oleksii Kurochko > Signed-off-by: David Gibson > Origin: git://git.kernel.org/pub/scm/utils/dtc/dtc.git f57e7df35df4 > > Fixes: f0ea06558068 ("libfdt: add version 1.3.0") > Signed-off-by: Oleksii Kurochko > Reviewed-by: Baptiste Le Duc Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Tue May 26 06:26:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 06:26:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319609.1587094 (Exim 4.92) (envelope-from ) id 1wRlFa-0006Pw-9W; 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Mon, 25 May 2026 23:26:47 -0700 (PDT) Message-ID: Date: Tue, 26 May 2026 09:26:41 +0300 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/sched: fix stale file path comments in common/sched directory To: =?UTF-8?B?SsO8cmdlbiBHcm/Dnw==?= , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Cc: xen-devel@lists.xenproject.org, dfaggioli@suse.com, gwd@xenproject.org, stewart.hildebrand@amd.com, jbeulich@suse.com References: <20260525102539.27050-1-frn1furkan10@gmail.com> <1ba4ffba-e9e0-4858-b3b9-d45c950894c3@suse.com> Content-Language: en-US From: =?UTF-8?B?RnVya2FuIMOHYWzEscWfa2Fu?= In-Reply-To: <1ba4ffba-e9e0-4858-b3b9-d45c950894c3@suse.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779776807-4236CA53-54663E49/0/0 X-purgate-type: clean X-purgate-size: 826 On 5/26/26 09:18, Jürgen Groß wrote: > On 25.05.26 12:58, Roger Pau Monné wrote: >> On Mon, May 25, 2026 at 01:25:38PM +0300, Furkan Caliskan wrote: >>> Commit 6cb4b01c03 ("xen/sched: move schedulers and cpupool coding to >>> dedicated directory") moved the scheduler files from xen/common/ to >>> xen/common/sched and renamed some of them, but did not update the >>> in-file path comments at the top of each file. >>> >>> Update the comments to reflect the current file locations. >> >> FWIW, if we have to modify those lines I would just delete them, I >> don't think they add anything meaningful to the file. > > Wanted to write the same. So yes, please drop the lines instead of > modifying them. > > > Juergen Thanks for the feedback. I'll send a v2 with the lines dropped. Furkan Caliskan From xen-devel-bounces@lists.xenproject.org Tue May 26 07:53:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 07:53:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319627.1587104 (Exim 4.92) (envelope-from ) id 1wRmbA-00014I-7J; Tue, 26 May 2026 07:53:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319627.1587104; Tue, 26 May 2026 07:53:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRmbA-00014A-4E; Tue, 26 May 2026 07:53:12 +0000 Received: by outflank-mailman (input) for mailman id 1319627; Tue, 26 May 2026 07:53:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRmb8-000144-Pg for xen-devel@lists.xenproject.org; Tue, 26 May 2026 07:53:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRmb7-002dKg-LW for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:53:09 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a155156-2eae-0a2a0a5409dd-0a2a4503df20-48 for ; Tue, 26 May 2026 09:53:09 +0200 Received: from [209.85.218.54] (helo=mail-ej1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a155165-672d-0a2a45030019-d155da36d54d-3 for ; Tue, 26 May 2026 09:53:09 +0200 Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-bd6460b0d11so1802271066b.1 for ; Tue, 26 May 2026 00:53:09 -0700 (PDT) Received: from notebook.. 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Remove the comments rather than updating them, as they are redundant information already conveyed by the filename itself. Suggested-by: Roger Pau Monné Suggested-by: Juergen Gross Signed-off-by: Furkan Caliskan --- xen/common/sched/arinc653.c | 1 - xen/common/sched/boot-cpupool.c | 2 -- xen/common/sched/compat.c | 4 ---- xen/common/sched/core.c | 1 - xen/common/sched/cpupool.c | 1 - xen/common/sched/credit.c | 1 - xen/common/sched/credit2.c | 1 - xen/common/sched/null.c | 1 - 8 files changed, 12 deletions(-) diff --git a/xen/common/sched/arinc653.c b/xen/common/sched/arinc653.c index d8a5380557..32c596a23c 100644 --- a/xen/common/sched/arinc653.c +++ b/xen/common/sched/arinc653.c @@ -1,5 +1,4 @@ /****************************************************************************** - * sched_arinc653.c * * An ARINC653-compatible scheduling algorithm for use in Xen. * diff --git a/xen/common/sched/boot-cpupool.c b/xen/common/sched/boot-cpupool.c index 03be73efdd..3ffe1f26bd 100644 --- a/xen/common/sched/boot-cpupool.c +++ b/xen/common/sched/boot-cpupool.c @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ /* - * xen/common/boot_cpupools.c - * * Code to create cpupools at boot time. * * Copyright (C) 2022 Arm Ltd. diff --git a/xen/common/sched/compat.c b/xen/common/sched/compat.c index a02204ec9a..5574393cb4 100644 --- a/xen/common/sched/compat.c +++ b/xen/common/sched/compat.c @@ -1,7 +1,3 @@ -/**************************************************************************** - * schedule.c - * - */ #ifndef __COMMON_SCHED_COMPAT_C__ #define __COMMON_SCHED_COMPAT_C__ diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c index a57d5dd929..8e2b75bc35 100644 --- a/xen/common/sched/core.c +++ b/xen/common/sched/core.c @@ -4,7 +4,6 @@ * (C) 2004 - Mark Williamson - Intel Research Cambridge **************************************************************************** * - * File: common/schedule.c * Author: Rolf Neugebauer & Keir Fraser * Updated for generic API by Mark Williamson * diff --git a/xen/common/sched/cpupool.c b/xen/common/sched/cpupool.c index f5459c2779..081e1053eb 100644 --- a/xen/common/sched/cpupool.c +++ b/xen/common/sched/cpupool.c @@ -1,5 +1,4 @@ /****************************************************************************** - * cpupool.c * * Generic cpupool-handling functions. * diff --git a/xen/common/sched/credit.c b/xen/common/sched/credit.c index e9a91d11c3..07656a57e9 100644 --- a/xen/common/sched/credit.c +++ b/xen/common/sched/credit.c @@ -2,7 +2,6 @@ * (C) 2005-2006 - Emmanuel Ackaouy - XenSource Inc. **************************************************************************** * - * File: common/csched_credit.c * Author: Emmanuel Ackaouy * * Description: Credit-based SMP CPU scheduler diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index 75316d42b7..77475ee363 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -3,7 +3,6 @@ * (C) 2009 - George Dunlap - Citrix Systems R&D UK, Ltd **************************************************************************** * - * File: common/sched_credit2.c * Author: George Dunlap * * Description: Credit-based SMP CPU scheduler diff --git a/xen/common/sched/null.c b/xen/common/sched/null.c index c8e327e3cd..5f15779b07 100644 --- a/xen/common/sched/null.c +++ b/xen/common/sched/null.c @@ -1,5 +1,4 @@ /* - * xen/common/sched_null.c * * Copyright (c) 2017, Dario Faggioli, Citrix Ltd * -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:42:35 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:42:35 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319655.1587113 (Exim 4.92) (envelope-from ) id 1wRoIl-0006dv-5Q; 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micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------FeGqyLm4tAAjnvamuskopnoe" X-purgate-ID: tlsNG-4011c0/1779788535-7EF8B8B7-1ED87AB8/0/0 X-purgate-type: clean X-purgate-size: 6347 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------FeGqyLm4tAAjnvamuskopnoe Content-Type: multipart/mixed; boundary="------------5YT4bk8ahMZmMy0XYwSWDDAM"; protected-headers="v1" From: Juergen Gross To: Yash Suthar , sstabellini@kernel.org Cc: oleksandr_tyshchenko@epam.com, xen-devel@lists.xenproject.org, linux-kernel@vger.kernel.org Message-ID: <121f8035-2e84-4524-8b40-2e68eb2fadc9@suse.com> Subject: Re: [PATCH] xen: balloon: Replace sprintf() with sysfs_emit() References: <20260517133817.29691-1-yashsuthar983@gmail.com> In-Reply-To: <20260517133817.29691-1-yashsuthar983@gmail.com> --------------5YT4bk8ahMZmMy0XYwSWDDAM Content-Type: multipart/mixed; boundary="------------UUOF08iIMyltGRAqPIxATx6q" --------------UUOF08iIMyltGRAqPIxATx6q Content-Type: text/plain; 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There's no much sense to split the header in 2 pieces, it will just take more time and space to reassemble them in the final buffer. This also avoids truncating combined_length to 32 bit in case of 64 bit machines potentially avoiding following record_length check. The function become more coherent with following read_record function. Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/guest/xg_sr_common.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/tools/libs/guest/xg_sr_common.c b/tools/libs/guest/xg_sr_common.c index 7ccdc3b1f6aa..86c148c62f3e 100644 --- a/tools/libs/guest/xg_sr_common.c +++ b/tools/libs/guest/xg_sr_common.c @@ -59,11 +59,11 @@ int write_split_record(struct xc_sr_context *ctx, struct xc_sr_record *rec, static const char zeroes[(1u << REC_ALIGN_ORDER) - 1] = { 0 }; xc_interface *xch = ctx->xch; - typeof(rec->length) combined_length = rec->length + sz; + size_t combined_length = rec->length + sz; size_t record_length = ROUNDUP(combined_length, REC_ALIGN_ORDER); + struct xc_sr_rhdr rhdr = { rec->type, combined_length }; struct iovec parts[] = { - { &rec->type, sizeof(rec->type) }, - { &combined_length, sizeof(combined_length) }, + { &rhdr, sizeof(rhdr) }, { rec->data, rec->length }, { buf, sz }, { (void *)zeroes, record_length - combined_length }, -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319665.1587122 (Exim 4.92) (envelope-from ) id 1wRoK6-0007AJ-K5; Tue, 26 May 2026 09:43:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319665.1587122; Tue, 26 May 2026 09:43:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK6-0007AC-HP; Tue, 26 May 2026 09:43:42 +0000 Received: by outflank-mailman (input) for mailman id 1319665; Tue, 26 May 2026 09:43:42 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK6-0007A6-5f for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:42 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoK5-00C7fR-Hn for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:41 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b37-e002-0a2a0a5209dd-0a2a45049844-48 for ; Tue, 26 May 2026 11:43:41 +0200 Received: from [209.85.128.45] (helo=mail-wm1-f45.google.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b4d-1dec-0a2a45040019-d155802de0ef-3 for ; Tue, 26 May 2026 11:43:41 +0200 Received: by mail-wm1-f45.google.com with SMTP id 5b1f17b1804b1-49050ff7cbdso27525345e9.2 for ; Tue, 26 May 2026 02:43:41 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Avoid possible allocation sending data with writev. Reduce number of allocations sending memory state. Changes since v1: - add commit to cache up to 4 pages in hypercall; - add other 2 commits reducing chunks passed to write/writev. Changes since v2: - update patches commit prefixes; - add other 2 optisations. Edwin Török (2): libs/guest: allocate various migration arrays just once libs/call: cache up to 4 pages in hypercall bounce buffers Frediano Ziglio (7): libs/guest: Reduce number of parts in write_split_record libs/guest: Reduce number of I/O vectors in write_batch libs/guest: Reduce number of I/O vectors in write_batch libs/guest: Use a single write_exact in write_headers libs/guest: avoids using 2 indexes libs/guest: fill directly iov structure libs/ctrl: Allows writev_exact to change iov array tools/libs/call/buffer.c | 28 +++-- tools/libs/call/core.c | 3 +- tools/libs/call/private.h | 8 +- tools/libs/ctrl/xc_private.c | 26 +---- tools/libs/ctrl/xc_private.h | 2 +- tools/libs/guest/xg_sr_common.c | 6 +- tools/libs/guest/xg_sr_common.h | 12 +++ tools/libs/guest/xg_sr_restore.c | 26 ++--- tools/libs/guest/xg_sr_save.c | 169 +++++++++++++------------------ 9 files changed, 128 insertions(+), 152 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319667.1587140 (Exim 4.92) (envelope-from ) id 1wRoK9-0007ba-42; Tue, 26 May 2026 09:43:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319667.1587140; Tue, 26 May 2026 09:43:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK8-0007bP-VE; Tue, 26 May 2026 09:43:44 +0000 Received: by outflank-mailman (input) for mailman id 1319667; Tue, 26 May 2026 09:43:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK7-0007NG-SI for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoK7-002r1O-86 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:43 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b43-5cb7-0a2a0a5109dd-0a2a450ab138-42 for ; Tue, 26 May 2026 11:43:43 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b4f-56b3-0a2a450a0019-d1558034e988-3 for ; Tue, 26 May 2026 11:43:43 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4891d7164ddso49805485e9.3 for ; Tue, 26 May 2026 02:43:43 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Reduce number of pieces passed to writev. Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/guest/xg_sr_save.c | 35 ++++++++++++++++------------------- 1 file changed, 16 insertions(+), 19 deletions(-) diff --git a/tools/libs/guest/xg_sr_save.c b/tools/libs/guest/xg_sr_save.c index 3b2c5222e429..1700d819051a 100644 --- a/tools/libs/guest/xg_sr_save.c +++ b/tools/libs/guest/xg_sr_save.c @@ -97,9 +97,12 @@ static int write_batch(struct xc_sr_context *ctx) void *page, *orig_page; uint64_t *rec_pfns = NULL; struct iovec *iov = NULL; int iovcnt = 0; - struct xc_sr_rec_page_data_header hdr = { 0 }; - struct xc_sr_record rec = { - .type = REC_TYPE_PAGE_DATA, + struct { + struct xc_sr_rhdr rec; + struct xc_sr_rec_page_data_header page_data; + } hdrs = { + { .type = REC_TYPE_PAGE_DATA }, + { 0 }, }; assert(nr_pfns != 0); @@ -115,7 +118,7 @@ static int write_batch(struct xc_sr_context *ctx) /* Pointers to locally allocated pages. Need freeing. */ local_pages = calloc(nr_pfns, sizeof(*local_pages)); /* iovec[] for writev(). */ - iov = malloc((nr_pfns + 4) * sizeof(*iov)); + iov = malloc((nr_pfns + 2) * sizeof(*iov)); if ( !mfns || !types || !errors || !guest_data || !local_pages || !iov ) { @@ -216,28 +219,22 @@ static int write_batch(struct xc_sr_context *ctx) goto err; } - hdr.count = nr_pfns; + hdrs.rec.length = sizeof(hdrs.page_data); + hdrs.rec.length += nr_pfns * sizeof(*rec_pfns); + hdrs.rec.length += nr_pages * PAGE_SIZE; - rec.length = sizeof(hdr); - rec.length += nr_pfns * sizeof(*rec_pfns); - rec.length += nr_pages * PAGE_SIZE; + hdrs.page_data.count = nr_pfns; for ( i = 0; i < nr_pfns; ++i ) rec_pfns[i] = ((uint64_t)(types[i]) << 32) | ctx->save.batch_pfns[i]; - iov[0].iov_base = &rec.type; - iov[0].iov_len = sizeof(rec.type); + iov[0].iov_base = &hdrs; + iov[0].iov_len = sizeof(hdrs); - iov[1].iov_base = &rec.length; - iov[1].iov_len = sizeof(rec.length); + iov[1].iov_base = rec_pfns; + iov[1].iov_len = nr_pfns * sizeof(*rec_pfns); - iov[2].iov_base = &hdr; - iov[2].iov_len = sizeof(hdr); - - iov[3].iov_base = rec_pfns; - iov[3].iov_len = nr_pfns * sizeof(*rec_pfns); - - iovcnt = 4; + iovcnt = 2; if ( nr_pages ) { -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:46 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:46 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319668.1587148 (Exim 4.92) (envelope-from ) id 1wRoKA-0007qA-C3; Tue, 26 May 2026 09:43:46 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319668.1587148; Tue, 26 May 2026 09:43:46 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKA-0007py-93; Tue, 26 May 2026 09:43:46 +0000 Received: by outflank-mailman (input) for mailman id 1319668; Tue, 26 May 2026 09:43:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK8-0007ZZ-Vg for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoK8-002r0l-BN for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:44 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b50-2eae-0a2a0a5409dd-0a2a45019012-0 for ; Tue, 26 May 2026 11:43:44 +0200 Received: from [209.85.128.43] (helo=mail-wm1-f43.google.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b50-c1f2-0a2a45010019-d155802bed89-3 for ; Tue, 26 May 2026 11:43:44 +0200 Received: by mail-wm1-f43.google.com with SMTP id 5b1f17b1804b1-4891e86fabeso4806235e9.1 for ; Tue, 26 May 2026 02:43:44 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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This potentially exceed Linux maximum (1024). Also some implementation (MiniOS) emulate writev with multiple write calls. Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/guest/xg_sr_save.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/tools/libs/guest/xg_sr_save.c b/tools/libs/guest/xg_sr_save.c index 1700d819051a..62a39dfecc7a 100644 --- a/tools/libs/guest/xg_sr_save.c +++ b/tools/libs/guest/xg_sr_save.c @@ -240,13 +240,20 @@ static int write_batch(struct xc_sr_context *ctx) { for ( i = 0; i < nr_pfns; ++i ) { - if ( guest_data[i] ) + if ( !guest_data[i] ) + continue; + + if ( iov[iovcnt-1].iov_base + iov[iovcnt-1].iov_len != guest_data[i] ) { iov[iovcnt].iov_base = guest_data[i]; iov[iovcnt].iov_len = PAGE_SIZE; iovcnt++; - --nr_pages; } + else + { + iov[iovcnt-1].iov_len += PAGE_SIZE; + } + --nr_pages; } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319669.1587158 (Exim 4.92) (envelope-from ) id 1wRoKB-00085B-KX; Tue, 26 May 2026 09:43:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319669.1587158; Tue, 26 May 2026 09:43:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKB-00084y-Ge; Tue, 26 May 2026 09:43:47 +0000 Received: by outflank-mailman (input) for mailman id 1319669; Tue, 26 May 2026 09:43:45 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoK9-0007iC-Md for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:45 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoK9-00C7jc-2g for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:45 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b4e-e002-0a2a0a5209dd-0a2a4502c48c-22 for ; Tue, 26 May 2026 11:43:45 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b50-af86-0a2a45020019-d155dd31e5d7-3 for ; Tue, 26 May 2026 11:43:45 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44a5174670eso5826141f8f.1 for ; Tue, 26 May 2026 02:43:44 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/guest/xg_sr_save.c | 37 +++++++++++++++++------------------ 1 file changed, 18 insertions(+), 19 deletions(-) diff --git a/tools/libs/guest/xg_sr_save.c b/tools/libs/guest/xg_sr_save.c index 62a39dfecc7a..8c4e760f8d0a 100644 --- a/tools/libs/guest/xg_sr_save.c +++ b/tools/libs/guest/xg_sr_save.c @@ -10,17 +10,22 @@ static int write_headers(struct xc_sr_context *ctx, uint16_t guest_type) { xc_interface *xch = ctx->xch; int32_t xen_version = xc_version(xch, XENVER_version, NULL); - struct xc_sr_ihdr ihdr = { - .marker = IHDR_MARKER, - .id = htonl(IHDR_ID), - .version = htonl(3), - .options = htons(IHDR_OPT_LITTLE_ENDIAN), - }; - struct xc_sr_dhdr dhdr = { - .type = guest_type, - .page_shift = XC_PAGE_SHIFT, - .xen_major = (xen_version >> 16) & 0xffff, - .xen_minor = (xen_version) & 0xffff, + struct { + struct xc_sr_ihdr ihdr; + struct xc_sr_dhdr dhdr; + } hdrs = { + { + .marker = IHDR_MARKER, + .id = htonl(IHDR_ID), + .version = htonl(3), + .options = htons(IHDR_OPT_LITTLE_ENDIAN), + }, + { + .type = guest_type, + .page_shift = XC_PAGE_SHIFT, + .xen_major = (xen_version >> 16) & 0xffff, + .xen_minor = (xen_version) & 0xffff, + }, }; if ( xen_version < 0 ) @@ -29,15 +34,9 @@ static int write_headers(struct xc_sr_context *ctx, uint16_t guest_type) return -1; } - if ( write_exact(ctx->fd, &ihdr, sizeof(ihdr)) ) - { - PERROR("Unable to write Image Header to stream"); - return -1; - } - - if ( write_exact(ctx->fd, &dhdr, sizeof(dhdr)) ) + if ( write_exact(ctx->fd, &hdrs, sizeof(hdrs)) ) { - PERROR("Unable to write Domain Header to stream"); + PERROR("Unable to write Headers to stream"); return -1; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319670.1587163 (Exim 4.92) (envelope-from ) id 1wRoKC-0008Bw-55; Tue, 26 May 2026 09:43:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319670.1587163; Tue, 26 May 2026 09:43:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKC-00089h-0Y; Tue, 26 May 2026 09:43:48 +0000 Received: by outflank-mailman (input) for mailman id 1319670; Tue, 26 May 2026 09:43:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKB-0007xP-19 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoKA-00C7jc-DD for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:46 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b50-e002-0a2a0a5209dd-0a2a450cb892-8 for ; Tue, 26 May 2026 11:43:46 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b52-62f1-0a2a450c0019-d155dd33c9c3-3 for ; Tue, 26 May 2026 11:43:46 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-44c350a5b87so6133174f8f.3 for ; Tue, 26 May 2026 02:43:46 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Edwin Török Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/guest/xg_sr_common.h | 13 +++++++ tools/libs/guest/xg_sr_save.c | 66 +++++++++++++-------------------- 2 files changed, 39 insertions(+), 40 deletions(-) diff --git a/tools/libs/guest/xg_sr_common.h b/tools/libs/guest/xg_sr_common.h index f1573aefcbff..77312bae9cf5 100644 --- a/tools/libs/guest/xg_sr_common.h +++ b/tools/libs/guest/xg_sr_common.h @@ -209,6 +209,18 @@ static inline int update_blob(struct xc_sr_blob *blob, return 0; } +struct xc_sr_context_save_buffers +{ + xen_pfn_t batch_pfns[MAX_BATCH_SIZE]; + xen_pfn_t mfns[MAX_BATCH_SIZE]; + xen_pfn_t types[MAX_BATCH_SIZE]; + int errors[MAX_BATCH_SIZE]; + void *guest_data[MAX_BATCH_SIZE]; + void *local_pages[MAX_BATCH_SIZE]; + struct iovec iov[MAX_BATCH_SIZE + 2]; /* headers + data */ + uint64_t rec_pfns[MAX_BATCH_SIZE]; +}; + struct xc_sr_context { xc_interface *xch; @@ -244,6 +256,7 @@ struct xc_sr_context unsigned long *deferred_pages; unsigned long nr_deferred_pages; xc_hypercall_buffer_t dirty_bitmap_hbuf; + struct xc_sr_context_save_buffers *buffers; } save; struct /* Restore data. */ diff --git a/tools/libs/guest/xg_sr_save.c b/tools/libs/guest/xg_sr_save.c index 8c4e760f8d0a..7d8055a3f9e8 100644 --- a/tools/libs/guest/xg_sr_save.c +++ b/tools/libs/guest/xg_sr_save.c @@ -86,16 +86,16 @@ static int write_checkpoint_record(struct xc_sr_context *ctx) static int write_batch(struct xc_sr_context *ctx) { xc_interface *xch = ctx->xch; - xen_pfn_t *mfns = NULL, *types = NULL; + xen_pfn_t *mfns, *types; void *guest_mapping = NULL; - void **guest_data = NULL; - void **local_pages = NULL; - int *errors = NULL, rc = -1; + void **guest_data; + void **local_pages; + int *errors, rc = -1; unsigned int i, p, nr_pages = 0, nr_pages_mapped = 0; unsigned int nr_pfns = ctx->save.nr_batch_pfns; void *page, *orig_page; - uint64_t *rec_pfns = NULL; - struct iovec *iov = NULL; int iovcnt = 0; + uint64_t *rec_pfns; + struct iovec *iov; int iovcnt = 0; struct { struct xc_sr_rhdr rec; struct xc_sr_rec_page_data_header page_data; @@ -105,26 +105,24 @@ static int write_batch(struct xc_sr_context *ctx) }; assert(nr_pfns != 0); + assert(nr_pfns <= MAX_BATCH_SIZE); + assert(ctx->save.buffers); /* Mfns of the batch pfns. */ - mfns = malloc(nr_pfns * sizeof(*mfns)); + mfns = ctx->save.buffers->mfns; /* Types of the batch pfns. */ - types = malloc(nr_pfns * sizeof(*types)); + types = ctx->save.buffers->types; /* Errors from attempting to map the gfns. */ - errors = malloc(nr_pfns * sizeof(*errors)); + errors = ctx->save.buffers->errors; /* Pointers to page data to send. Mapped gfns or local allocations. */ - guest_data = calloc(nr_pfns, sizeof(*guest_data)); + guest_data = ctx->save.buffers->guest_data; + memset(guest_data, 0, sizeof(*guest_data) * nr_pfns); /* Pointers to locally allocated pages. Need freeing. */ - local_pages = calloc(nr_pfns, sizeof(*local_pages)); + local_pages = ctx->save.buffers->local_pages; + memset(local_pages, 0, sizeof(*local_pages) * nr_pfns); /* iovec[] for writev(). */ - iov = malloc((nr_pfns + 2) * sizeof(*iov)); - - if ( !mfns || !types || !errors || !guest_data || !local_pages || !iov ) - { - ERROR("Unable to allocate arrays for a batch of %u pages", - nr_pfns); - goto err; - } + iov = ctx->save.buffers->iov; + rec_pfns = ctx->save.buffers->rec_pfns; for ( i = 0; i < nr_pfns; ++i ) { @@ -210,14 +208,6 @@ static int write_batch(struct xc_sr_context *ctx) } } - rec_pfns = malloc(nr_pfns * sizeof(*rec_pfns)); - if ( !rec_pfns ) - { - ERROR("Unable to allocate %zu bytes of memory for page data pfn list", - nr_pfns * sizeof(*rec_pfns)); - goto err; - } - hdrs.rec.length = sizeof(hdrs.page_data); hdrs.rec.length += nr_pfns * sizeof(*rec_pfns); hdrs.rec.length += nr_pages * PAGE_SIZE; @@ -267,17 +257,13 @@ static int write_batch(struct xc_sr_context *ctx) rc = ctx->save.nr_batch_pfns = 0; err: - free(rec_pfns); if ( guest_mapping ) xenforeignmemory_unmap(xch->fmem, guest_mapping, nr_pages_mapped); for ( i = 0; local_pages && i < nr_pfns; ++i ) + { free(local_pages[i]); - free(iov); - free(local_pages); - free(guest_data); - free(errors); - free(types); - free(mfns); + local_pages[i] = NULL; + } return rc; } @@ -805,18 +791,18 @@ static int setup(struct xc_sr_context *ctx) dirty_bitmap = xc_hypercall_buffer_alloc_pages( xch, dirty_bitmap, NRPAGES(bitmap_size(ctx->save.p2m_size))); - ctx->save.batch_pfns = malloc(MAX_BATCH_SIZE * - sizeof(*ctx->save.batch_pfns)); ctx->save.deferred_pages = bitmap_alloc(ctx->save.p2m_size); + ctx->save.buffers = calloc(1, sizeof(*ctx->save.buffers)); - if ( !ctx->save.batch_pfns || !dirty_bitmap || !ctx->save.deferred_pages ) + if ( !dirty_bitmap || !ctx->save.deferred_pages || !ctx->save.buffers) { - ERROR("Unable to allocate memory for dirty bitmaps, batch pfns and" - " deferred pages"); + ERROR("Unable to allocate memory for dirty bitmaps, deferred pages" + " and various batch buffers"); rc = -1; errno = ENOMEM; goto err; } + ctx->save.batch_pfns = ctx->save.buffers->batch_pfns; rc = 0; @@ -840,7 +826,7 @@ static void cleanup(struct xc_sr_context *ctx) xc_hypercall_buffer_free_pages(xch, dirty_bitmap, NRPAGES(bitmap_size(ctx->save.p2m_size))); free(ctx->save.deferred_pages); - free(ctx->save.batch_pfns); + free(ctx->save.buffers); } /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319671.1587176 (Exim 4.92) (envelope-from ) id 1wRoKE-0000B3-Cp; Tue, 26 May 2026 09:43:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319671.1587176; Tue, 26 May 2026 09:43:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKE-0000Ah-8i; Tue, 26 May 2026 09:43:50 +0000 Received: by outflank-mailman (input) for mailman id 1319671; Tue, 26 May 2026 09:43:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKC-0008Is-LI for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoKC-00C7jc-16 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:48 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b54-e002-0a2a0a5209dd-0a2a450396a4-0 for ; Tue, 26 May 2026 11:43:48 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b53-672d-0a2a45030019-d155dd31d024-3 for ; Tue, 26 May 2026 11:43:47 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-44ccbd3290aso9039456f8f.2 for ; Tue, 26 May 2026 02:43:47 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. [46.208.116.5]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45eb6d70c51sm36522744f8f.36.2026.05.26.02.43.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2026 02:43:46 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779788627; x=1780393427; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hbvSYSz9jX9dafFppGzkbKpTIPtHmNPQUeh/EgdczHs=; b=RZysriK+S4QhPT7Dx+KuXjr7lR9V1nMKldFtJs0+K3O/rSjCg9QxCarUyLPJP0+LEO ur0BErc3+pTYZbHSI86/40y1ZZju9/QQzfGEIqzqhVTdQM65MzgJkbN3FAy2VM8ues6O CBLqgOYAKS4/6M4IwB7hLgjgztHFZMeKMQbvOp0vlxdHKGdPr+snnzKrIbRLtdh7bR7A XgsdfQ922TuQ7Jagh6u760AUrrG7ijuaRBq6icF0HCToxb8GrDK0mmWBpNltbDY0w1JH l/jHUCVwk/6FBYHs/dJoQPINpBOzl1zwg/GZh0/ylX7ZGZia+gx1ZYjNmiTMqdko5qSP zWqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779788627; x=1780393427; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=hbvSYSz9jX9dafFppGzkbKpTIPtHmNPQUeh/EgdczHs=; b=U+SKtbAYA0KZwggFAD5Lhg5PZLBRwjgXAKbE4an5mppRXHE1DN3qXxQ9kLQ818fgNC SI0h8fsauZbh031GxTqD5b0L0sIABj2OtZr7TchaPY+XfZQFBSlolYWdR95qtwxXyFOZ lDhl5BdDQFzt4JMQ27MJ50TIpKJ38IVZr8TddxK1WBUL93P+LVnWZDpnv4CbdJzfLqBG IwSmoAidYTU7PyhcScR+iwinbcEWjQdgxE4JOlgyWhyf1JTGZk0Cu+C1P9fbZDLnRnv8 t+lyuVXdTvXjL4EM3Dp2s4yNMXBFuIgNgrf/szwhvyoZRDN7z1cznju4AAFCrhFGhO6F rN2w== X-Gm-Message-State: AOJu0Yy49jd1gfl3gA9x+VoFyDHv+cvdmsbPX+P2oV14gnl05ltjMS1l QVgZIX6wLJpFeLuYBw/DrJukmK1R0Id/68nF1fI8HB3+gyxZa7bx3v11mDR1KU/m X-Gm-Gg: Acq92OH7IhAZMVeHQ8qec7zcAJB46HzVwsTXawAuURN0Z7ffF+l29OzPntj8ucU9g6C 8K58SfA0fiDOx2RSV+CNBKiz5Qy5im6P6e3Qv1t23reIyteJbdafH4Myc711ahGguhzPbxgCsgm wEbUeki5w+wii34XfbZ55fqdZJ1H9v5R/mszBFh54EwlOKpXgrnAfs158tkUi+EySIRpn9XbP4Q 63msboMyc1RvwjLp2rmmYikPG8iKkJOgepu2fQ/Od9y8yN9hEFZG40dlcVMDHDtkS2nt6YKe1Ok R1lP8vggd6BBE4V6ZHeubUPy3DQMo5FhoaiBJIpG7Xe0EhNP+YyAqY+UF7NuJzu+qiSHB07mSif /y3v1Coa7Ecokbwv5OFh2lJr/pGLFpSqO/TlxRBxTjXfFUA++s3ApUwCufzTl+LndUmxXXJPdSd pdRQmmsVKE3WAdRQwItpwiqRMDsvGT6yCqc+Cto5Dbe1na4uB6535uZyYTsW9xGkqDPukmhZuhd JYaYclLbHzzkothOCmlYmpIqJoDu68SUAmn X-Received: by 2002:a05:6000:2888:b0:44f:da26:cbb4 with SMTP id ffacd0b85a97d-45eb38bae90mr31288289f8f.21.1779788626944; Tue, 26 May 2026 02:43:46 -0700 (PDT) From: Frediano Ziglio X-Google-Original-From: Frediano Ziglio To: xen-devel@lists.xenproject.org Cc: =?UTF-8?q?Edwin=20T=C3=B6r=C3=B6k?= , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Juergen Gross , Frediano Ziglio Subject: [PATCH v3 6/9] libs/call: cache up to 4 pages in hypercall bounce buffers Date: Tue, 26 May 2026 10:43:17 +0100 Message-ID: <20260526094324.12286-7-frediano.ziglio@cloud.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260526094324.12286-1-frediano.ziglio@cloud.com> References: <20260526094324.12286-1-frediano.ziglio@cloud.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779788627-41794938-6F500648/0/0 X-purgate-type: clean X-purgate-size: 4985 From: Edwin Török During migration there are a lot of mmap/munmap calls, because `xc_get_pfn_type_batch` exceeds the default hypercall bounce buffer cache size, and needs to allocate every time it is called. `munmap` is slow, especially in a PV Dom0 (takes an emulation fault), so is best avoided. Eventually it'd be good if the memory pool from xmalloc_tlsf.c was reused here, but for now make it handle the commonly encountered sizes (so far up to 4 pages). Signed-off-by: Edwin Török Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/call/buffer.c | 28 +++++++++++++++++----------- tools/libs/call/core.c | 3 ++- tools/libs/call/private.h | 8 +++++--- 3 files changed, 24 insertions(+), 15 deletions(-) diff --git a/tools/libs/call/buffer.c b/tools/libs/call/buffer.c index 2579b8c71986..15d2f98a6b71 100644 --- a/tools/libs/call/buffer.c +++ b/tools/libs/call/buffer.c @@ -56,13 +56,13 @@ static void *cache_alloc(xencall_handle *xcall, size_t nr_pages) if ( xcall->buffer_current_allocations > xcall->buffer_maximum_allocations ) xcall->buffer_maximum_allocations = xcall->buffer_current_allocations; - if ( nr_pages > 1 ) + if ( nr_pages > ARRAY_SIZE(xcall->buffer_cache) ) { xcall->buffer_cache_toobig++; } - else if ( xcall->buffer_cache_nr > 0 ) + else if ( xcall->buffer_cache_nr[nr_pages-1] > 0 ) { - p = xcall->buffer_cache[--xcall->buffer_cache_nr]; + p = xcall->buffer_cache[nr_pages-1][--xcall->buffer_cache_nr[nr_pages-1]]; xcall->buffer_cache_hits++; } else @@ -84,10 +84,10 @@ static int cache_free(xencall_handle *xcall, void *p, size_t nr_pages) xcall->buffer_total_releases++; xcall->buffer_current_allocations--; - if ( nr_pages == 1 && - xcall->buffer_cache_nr < BUFFER_CACHE_SIZE ) + if ( nr_pages && nr_pages < ARRAY_SIZE(xcall->buffer_cache) && + xcall->buffer_cache_nr[nr_pages-1] < BUFFER_CACHE_SIZE ) { - xcall->buffer_cache[xcall->buffer_cache_nr++] = p; + xcall->buffer_cache[nr_pages-1][xcall->buffer_cache_nr[nr_pages-1]++] = p; rc = 1; } @@ -108,17 +108,23 @@ void buffer_release_cache(xencall_handle *xcall) DBGPRINTF("current allocations:%d maximum allocations:%d", xcall->buffer_current_allocations, xcall->buffer_maximum_allocations); - DBGPRINTF("cache current size:%d", - xcall->buffer_cache_nr); + for ( unsigned i = 0; i < ARRAY_SIZE(xcall->buffer_cache_nr); ++i ) + { + DBGPRINTF("cache current size[%u pages]:%d", i+1, + xcall->buffer_cache_nr[i]); + } DBGPRINTF("cache hits:%d misses:%d toobig:%d", xcall->buffer_cache_hits, xcall->buffer_cache_misses, xcall->buffer_cache_toobig); - while ( xcall->buffer_cache_nr > 0 ) + for ( unsigned i = 0; i < ARRAY_SIZE(xcall->buffer_cache_nr); ++i ) { - p = xcall->buffer_cache[--xcall->buffer_cache_nr]; - osdep_free_pages(xcall, p, 1); + while ( xcall->buffer_cache_nr[i] > 0 ) + { + p = xcall->buffer_cache[i][--xcall->buffer_cache_nr[i]]; + osdep_free_pages(xcall, p, i + 1); + } } cache_unlock(xcall); diff --git a/tools/libs/call/core.c b/tools/libs/call/core.c index 02c4f8e1aefa..dd8877c1a0bd 100644 --- a/tools/libs/call/core.c +++ b/tools/libs/call/core.c @@ -14,6 +14,7 @@ */ #include +#include #include "private.h" @@ -44,7 +45,7 @@ xencall_handle *xencall_open(xentoollog_logger *logger, unsigned open_flags) xentoolcore__register_active_handle(&xcall->tc_ah); xcall->flags = open_flags; - xcall->buffer_cache_nr = 0; + memset(xcall->buffer_cache_nr, 0, sizeof(xcall->buffer_cache_nr)); xcall->buffer_total_allocations = 0; xcall->buffer_total_releases = 0; diff --git a/tools/libs/call/private.h b/tools/libs/call/private.h index 9c3aa432efe2..8e6a20897534 100644 --- a/tools/libs/call/private.h +++ b/tools/libs/call/private.h @@ -31,13 +31,15 @@ struct xencall_handle { Xentoolcore__Active_Handle tc_ah; /* - * A simple cache of unused, single page, hypercall buffers + * A simple cache of unused, small, hypercall buffers + * buffer_cache[i]'s size is (i+1) pages * * Protected by a global lock. */ #define BUFFER_CACHE_SIZE 4 - int buffer_cache_nr; - void *buffer_cache[BUFFER_CACHE_SIZE]; +#define BUFFER_CACHE_NRPAGES 4 + int buffer_cache_nr[BUFFER_CACHE_NRPAGES]; + void *buffer_cache[BUFFER_CACHE_NRPAGES][BUFFER_CACHE_SIZE]; /* * Hypercall buffer statistics. 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Signed-off-by: Frediano Ziglio --- tools/libs/guest/xg_sr_restore.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/tools/libs/guest/xg_sr_restore.c b/tools/libs/guest/xg_sr_restore.c index e148fc594a73..fb46142d8729 100644 --- a/tools/libs/guest/xg_sr_restore.c +++ b/tools/libs/guest/xg_sr_restore.c @@ -260,9 +260,7 @@ static int process_page_data(struct xc_sr_context *ctx, unsigned int count, int *map_errs = malloc(count * sizeof(*map_errs)); int rc; void *mapping = NULL, *guest_page = NULL; - unsigned int i, /* i indexes the pfns from the record. */ - j, /* j indexes the subset of pfns we decide to map. */ - nr_pages = 0; + unsigned nr_pages; if ( !mfns || !map_errs ) { @@ -279,12 +277,18 @@ static int process_page_data(struct xc_sr_context *ctx, unsigned int count, goto err; } - for ( i = 0; i < count; ++i ) + nr_pages = 0; + for ( unsigned i = 0; i < count; ++i ) { ctx->restore.ops.set_page_type(ctx, pfns[i], types[i]); - if ( page_type_has_stream_data(types[i]) ) - mfns[nr_pages++] = ctx->restore.ops.pfn_to_gfn(ctx, pfns[i]); + if ( !page_type_has_stream_data(types[i]) ) + continue; + + mfns[nr_pages] = ctx->restore.ops.pfn_to_gfn(ctx, pfns[i]); + pfns[nr_pages] = pfns[i]; + types[nr_pages] = types[i]; + nr_pages++; } /* Nothing to do? */ @@ -302,16 +306,13 @@ static int process_page_data(struct xc_sr_context *ctx, unsigned int count, goto err; } - for ( i = 0, j = 0; i < count; ++i ) + for ( unsigned i = 0; i < nr_pages; ++i ) { - if ( !page_type_has_stream_data(types[i]) ) - continue; - - if ( map_errs[j] ) + if ( map_errs[i] ) { rc = -1; ERROR("Mapping pfn %#"PRIpfn" (mfn %#"PRIpfn", type %#"PRIx32") failed with %d", - pfns[i], mfns[j], types[i], map_errs[j]); + pfns[i], mfns[i], types[i], map_errs[i]); goto err; } @@ -337,7 +338,6 @@ static int process_page_data(struct xc_sr_context *ctx, unsigned int count, memcpy(guest_page, page_data, PAGE_SIZE); } - ++j; guest_page += PAGE_SIZE; page_data += PAGE_SIZE; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319674.1587194 (Exim 4.92) (envelope-from ) id 1wRoKH-0000jw-1r; Tue, 26 May 2026 09:43:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319674.1587194; Tue, 26 May 2026 09:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKG-0000jU-Tv; Tue, 26 May 2026 09:43:52 +0000 Received: by outflank-mailman (input) for mailman id 1319674; Tue, 26 May 2026 09:43:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKE-0000B5-H6 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoKD-002r8y-TG for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:49 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b51-5cb7-0a2a0a5109dd-0a2a450ad64c-20 for ; Tue, 26 May 2026 11:43:49 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b55-56b3-0a2a450a0019-d1558029c583-3 for ; Tue, 26 May 2026 11:43:49 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-49048e043e5so28146625e9.1 for ; Tue, 26 May 2026 02:43:49 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Frediano Ziglio --- tools/libs/guest/xg_sr_common.h | 1 - tools/libs/guest/xg_sr_save.c | 62 ++++++++++++--------------------- 2 files changed, 22 insertions(+), 41 deletions(-) diff --git a/tools/libs/guest/xg_sr_common.h b/tools/libs/guest/xg_sr_common.h index 77312bae9cf5..797b4d1a7da1 100644 --- a/tools/libs/guest/xg_sr_common.h +++ b/tools/libs/guest/xg_sr_common.h @@ -215,7 +215,6 @@ struct xc_sr_context_save_buffers xen_pfn_t mfns[MAX_BATCH_SIZE]; xen_pfn_t types[MAX_BATCH_SIZE]; int errors[MAX_BATCH_SIZE]; - void *guest_data[MAX_BATCH_SIZE]; void *local_pages[MAX_BATCH_SIZE]; struct iovec iov[MAX_BATCH_SIZE + 2]; /* headers + data */ uint64_t rec_pfns[MAX_BATCH_SIZE]; diff --git a/tools/libs/guest/xg_sr_save.c b/tools/libs/guest/xg_sr_save.c index 7d8055a3f9e8..593268f176a6 100644 --- a/tools/libs/guest/xg_sr_save.c +++ b/tools/libs/guest/xg_sr_save.c @@ -88,7 +88,6 @@ static int write_batch(struct xc_sr_context *ctx) xc_interface *xch = ctx->xch; xen_pfn_t *mfns, *types; void *guest_mapping = NULL; - void **guest_data; void **local_pages; int *errors, rc = -1; unsigned int i, p, nr_pages = 0, nr_pages_mapped = 0; @@ -114,9 +113,6 @@ static int write_batch(struct xc_sr_context *ctx) types = ctx->save.buffers->types; /* Errors from attempting to map the gfns. */ errors = ctx->save.buffers->errors; - /* Pointers to page data to send. Mapped gfns or local allocations. */ - guest_data = ctx->save.buffers->guest_data; - memset(guest_data, 0, sizeof(*guest_data) * nr_pfns); /* Pointers to locally allocated pages. Need freeing. */ local_pages = ctx->save.buffers->local_pages; memset(local_pages, 0, sizeof(*local_pages) * nr_pfns); @@ -159,6 +155,19 @@ static int write_batch(struct xc_sr_context *ctx) mfns[nr_pages++] = mfns[i]; } + hdrs.rec.length = sizeof(hdrs.page_data); + hdrs.rec.length += nr_pfns * sizeof(*rec_pfns); + + hdrs.page_data.count = nr_pfns; + + iov[0].iov_base = &hdrs; + iov[0].iov_len = sizeof(hdrs); + + iov[1].iov_base = rec_pfns; + iov[1].iov_len = nr_pfns * sizeof(*rec_pfns); + + iovcnt = 2; + if ( nr_pages > 0 ) { guest_mapping = xenforeignmemory_map( @@ -200,60 +209,33 @@ static int write_batch(struct xc_sr_context *ctx) else goto err; } + else if ( iov[iovcnt-1].iov_base + iov[iovcnt-1].iov_len != page ) + { + iov[iovcnt].iov_base = page; + iov[iovcnt].iov_len = PAGE_SIZE; + iovcnt++; + } else - guest_data[i] = page; + { + iov[iovcnt-1].iov_len += PAGE_SIZE; + } rc = -1; ++p; } } - hdrs.rec.length = sizeof(hdrs.page_data); - hdrs.rec.length += nr_pfns * sizeof(*rec_pfns); hdrs.rec.length += nr_pages * PAGE_SIZE; - hdrs.page_data.count = nr_pfns; - for ( i = 0; i < nr_pfns; ++i ) rec_pfns[i] = ((uint64_t)(types[i]) << 32) | ctx->save.batch_pfns[i]; - iov[0].iov_base = &hdrs; - iov[0].iov_len = sizeof(hdrs); - - iov[1].iov_base = rec_pfns; - iov[1].iov_len = nr_pfns * sizeof(*rec_pfns); - - iovcnt = 2; - - if ( nr_pages ) - { - for ( i = 0; i < nr_pfns; ++i ) - { - if ( !guest_data[i] ) - continue; - - if ( iov[iovcnt-1].iov_base + iov[iovcnt-1].iov_len != guest_data[i] ) - { - iov[iovcnt].iov_base = guest_data[i]; - iov[iovcnt].iov_len = PAGE_SIZE; - iovcnt++; - } - else - { - iov[iovcnt-1].iov_len += PAGE_SIZE; - } - --nr_pages; - } - } - if ( writev_exact(ctx->fd, iov, iovcnt) ) { PERROR("Failed to write page data to stream"); goto err; } - /* Sanity check we have sent all the pages we expected to. */ - assert(nr_pages == 0); rc = ctx->save.nr_batch_pfns = 0; err: -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:43:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:43:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319675.1587199 (Exim 4.92) (envelope-from ) id 1wRoKH-0000om-JU; Tue, 26 May 2026 09:43:53 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319675.1587199; Tue, 26 May 2026 09:43:53 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKH-0000oA-Cd; Tue, 26 May 2026 09:43:53 +0000 Received: by outflank-mailman (input) for mailman id 1319675; Tue, 26 May 2026 09:43:51 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoKF-0000JN-99 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:43:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoKE-00C7nY-LC for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:43:50 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156b54-e002-0a2a0a5209dd-0a2a450396a4-32 for ; Tue, 26 May 2026 11:43:50 +0200 Received: from [209.85.221.54] (helo=mail-wr1-f54.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156b56-672d-0a2a45030019-d155dd36d93b-3 for ; Tue, 26 May 2026 11:43:50 +0200 Received: by mail-wr1-f54.google.com with SMTP id ffacd0b85a97d-43fe62837baso6040774f8f.3 for ; Tue, 26 May 2026 02:43:50 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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The implementation in tools/libs/store/xs.c already use this signature and method. Signed-off-by: Frediano Ziglio -- Changes since v2: - change prefix in subject. --- tools/libs/ctrl/xc_private.c | 26 +++++--------------------- tools/libs/ctrl/xc_private.h | 2 +- 2 files changed, 6 insertions(+), 22 deletions(-) diff --git a/tools/libs/ctrl/xc_private.c b/tools/libs/ctrl/xc_private.c index bb0f81d6f389..946fc307aabd 100644 --- a/tools/libs/ctrl/xc_private.c +++ b/tools/libs/ctrl/xc_private.c @@ -635,7 +635,7 @@ int write_exact(int fd, const void *data, size_t size) /* * MiniOS's libc doesn't know about writev(). Implement it as multiple write()s. */ -int writev_exact(int fd, const struct iovec *iov, int iovcnt) +int writev_exact(int fd, struct iovec *iov, int iovcnt) { int rc, i; @@ -649,9 +649,8 @@ int writev_exact(int fd, const struct iovec *iov, int iovcnt) return 0; } #else -int writev_exact(int fd, const struct iovec *iov, int iovcnt) +int writev_exact(int fd, struct iovec *iov, int iovcnt) { - struct iovec *local_iov = NULL; int rc = 0, iov_idx = 0, saved_errno = 0; ssize_t len; @@ -686,23 +685,9 @@ int writev_exact(int fd, const struct iovec *iov, int iovcnt) len -= iov[iov_idx++].iov_len; else { - /* Partial write of iov[iov_idx]. Copy iov so we can adjust - * element iov_idx and resubmit the rest. */ - if ( !local_iov ) - { - local_iov = malloc(iovcnt * sizeof(*iov)); - if ( !local_iov ) - { - saved_errno = ENOMEM; - rc = -1; - goto out; - } - - iov = memcpy(local_iov, iov, iovcnt * sizeof(*iov)); - } - - local_iov[iov_idx].iov_base += len; - local_iov[iov_idx].iov_len -= len; + /* Partial write of iov[iov_idx]. */ + iov[iov_idx].iov_base += len; + iov[iov_idx].iov_len -= len; break; } } @@ -711,7 +696,6 @@ int writev_exact(int fd, const struct iovec *iov, int iovcnt) saved_errno = 0; out: - free(local_iov); errno = saved_errno; return rc; } diff --git a/tools/libs/ctrl/xc_private.h b/tools/libs/ctrl/xc_private.h index b5892ae8dc1e..3af996e9002e 100644 --- a/tools/libs/ctrl/xc_private.h +++ b/tools/libs/ctrl/xc_private.h @@ -383,7 +383,7 @@ int xc_flush_mmu_updates(xc_interface *xch, struct xc_mmu *mmu); /* Return 0 on success; -1 on error setting errno. */ int read_exact(int fd, void *data, size_t size); /* EOF => -1, errno=0 */ int write_exact(int fd, const void *data, size_t size); -int writev_exact(int fd, const struct iovec *iov, int iovcnt); +int writev_exact(int fd, struct iovec *iov, int iovcnt); int xc_ffs8(uint8_t x); int xc_ffs16(uint16_t x); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 09:46:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:46:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319732.1587212 (Exim 4.92) (envelope-from ) id 1wRoMY-0003hR-8S; Tue, 26 May 2026 09:46:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319732.1587212; Tue, 26 May 2026 09:46:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoMY-0003hK-5D; Tue, 26 May 2026 09:46:14 +0000 Received: by outflank-mailman (input) for mailman id 1319732; Tue, 26 May 2026 09:46:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoMW-0003h7-Rd for xen-devel@lists.xenproject.org; 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Tue, 26 May 2026 02:46:08 -0700 (PDT) X-Received: by 2002:a17:903:41c2:b0:2ba:e42a:231e with SMTP id d9443c01a7336-2beb064837dmr200645035ad.37.1779788767805; Tue, 26 May 2026 02:46:07 -0700 (PDT) Message-ID: Date: Tue, 26 May 2026 15:15:55 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v15 0/3] of: parsing of multi #{iommu,msi}-cells in maps To: Krzysztof Kozlowski Cc: Nipun Gupta , Nikhil Agarwal , Joerg Roedel , Will Deacon , Robin Murphy , Marc Zyngier , Lorenzo Pieralisi , Thomas Gleixner , Saravana Kannan , Richard Zhu , Lucas Stach , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Juergen Gross , Stefano Stabellini , Oleksandr Tyshchenko , Dmitry Baryshkov , Konrad Dybcio , Bjorn Andersson , Rob Herring , Conor Dooley , Krzysztof Kozlowski , Prakash Gupta , Vikash Garodia , linux-kernel@vger.kernel.org, iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, imx@lists.linux.dev, xen-devel@lists.xenproject.org, linux-arm-msm@vger.kernel.org, Charan Teja Kalla References: <20260520-parse_iommu_cells-v15-0-b5f99ad4e7e8@oss.qualcomm.com> <20260526-finicky-crafty-hare-eae27c@quoll> Content-Language: en-US From: Vijayanand Jitta In-Reply-To: <20260526-finicky-crafty-hare-eae27c@quoll> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Authority-Analysis: v=2.4 cv=Vd3H+lp9 c=1 sm=1 tr=0 ts=6a156be1 cx=c_pps a=IZJwPbhc+fLeJZngyXXI0A==:117 a=j4ogTh8yFefVWWEFDRgCtg==:17 a=IkcTkHD0fZMA:10 a=NGcC8JguVDcA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=Jo8nEopC4ZUABtMbiE8A:9 a=QEXdDO2ut3YA:10 a=uG9DUKGECoFWVXl0Dc02:22 X-Proofpoint-GUID: GQfrH0x0B2Epxi2YuNM5fhHuv8oN4jne X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNTI2MDA4NCBTYWx0ZWRfX/kRp6zdY9Myj Zl+rO9EYBLTiD3hhY317fWVvsocoeYFq1tTaGom5qfKwH1fxls4VHYX4iuLwdDC6T99Kc7w2Djn Sq6Y19OuW7u+QLTvDGKjO+L9blrgnGHcakoFVTjM4TJrodnY/6ZTdB/bJvaHennfsZ/aeuJ3pSB ITyNt2lKuYC6JSbBoDeX+j+eEHnYgNYPbcq3vmt3HUds052fTzDGkhDogaMSB6Wc10p1z0UOH/n fP4JwPH/DRCUSBaC3tDNVijIpfGlxRhfhqXBybLOJXBFm/GSvxn8/NRIkUx4or/LG4QWQelNc+f uMqsV7fyRBQVBJj/vgVkv2llS26HNMfs5+WjuHj2fjhrIw23T49cLEQ1QPbcGI5lqatwMHU5gP5 tBvp73ZXMtc2PjmnBazZF/7sMCVYWgVRxGXajWk0Ss5sX5Da50avrdU1GHyNWH1ANLCkWA7AsXM UFR3JwTexNJUPaQx8VQ== X-Proofpoint-ORIG-GUID: GQfrH0x0B2Epxi2YuNM5fhHuv8oN4jne X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-05-26_02,2026-05-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 suspectscore=0 malwarescore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 adultscore=0 priorityscore=1501 bulkscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2605130000 definitions=main-2605260084 X-purgate-ID: tlsNG-d25034/1779788771-E0D63CF5-2CBDFA86/0/0 X-purgate-type: clean X-purgate-size: 2848 On 5/26/2026 11:42 AM, Krzysztof Kozlowski wrote: > On Wed, May 20, 2026 at 01:32:39PM +0530, Vijayanand Jitta wrote: >> So far our parsing of {iommu,msi}-map properties has always blindly >> assumed that the output specifiers will always have exactly 1 cell. >> This typically does happen to be the case, but is not actually enforced >> (and the PCI msi-map binding even explicitly states support for 0 or 1 >> cells) - as a result we've now ended up with dodgy DTs out in the field >> which depend on this behaviour to map a 1-cell specifier for a 2-cell >> provider, despite that being bogus per the bindings themselves. >> >> Since there is some potential use[1] in being able to map at least >> single input IDs to multi-cell output specifiers (and properly support >> 0-cell outputs as well), add support for properly parsing and using the >> target nodes' #cells values, albeit with the unfortunate complication of >> still having to work around expectations of the old behaviour too. >> -- Robin. >> >> Unlike single #{}-cell, it is complex to establish a linear relation >> between input 'id' and output specifier for multi-cell properties, thus >> it is always expected that len never going to be > 1. >> >> These changes have been tested on QEMU for the arm64 architecture. > > So there is no real user for that. That's unconvincing. I would assume > that at least you have real user where you test it. > > If you want to speed up acceptance of your patches, then also I would > prefer to see at least one more user, beside Qualcomm. IOW, show how you > solve other people problems, not only yours. > > Best regards, > Krzysztof > Hi Krzysztof, Thank you for the feedback. The upstream user for the multi-cell iommu-map support is the Lemans platform's VPU device, which requires iommu-map entries targeting a 2-cell IOMMU node. We are currently working on the glymur series [1] and once that is finalized we will post the Lemans patches as well. That said, I think this series can go through independently for the following reasons: 1. Correctness fix: The iommu-map/msi-map bindings have always specified that the output cell count is determined by #iommu-cells/#msi-cells on the target node. The kernel has been silently ignoring this and assuming 1 cell. This patch makes the kernel respect the binding specification. 2. Backward compatibility preserved: The of_check_bad_map() workaround handles existing deployed DTs that target 2-cell IOMMU nodes with 1-cell entries. This series has been tested on the glymur platform [1], which uses iommu-map with 1-cell specifiers, and the existing parsing continues to work correctly. Thanks, Vijay [1] https://lore.kernel.org/all/20260515-glymur-v6-5-f6a99cb43a24@oss.qualcomm.com/ From xen-devel-bounces@lists.xenproject.org Tue May 26 09:51:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 09:51:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319750.1587222 (Exim 4.92) (envelope-from ) id 1wRoRz-0005ok-Sd; Tue, 26 May 2026 09:51:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319750.1587222; Tue, 26 May 2026 09:51:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoRz-0005od-Oc; Tue, 26 May 2026 09:51:51 +0000 Received: by outflank-mailman (input) for mailman id 1319750; Tue, 26 May 2026 09:51:50 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRoRy-0005oX-D2 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 09:51:50 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRoRx-009wq3-L0 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 11:51:49 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a156d2c-2eae-0a2a0a5409dd-0a2a4505acfa-46 for ; Tue, 26 May 2026 11:51:49 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a156d33-aaa8-0a2a45050019-d155d02dd9c6-3 for ; Tue, 26 May 2026 11:51:47 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-68852b58d87so1052719a12.3 for ; Tue, 26 May 2026 02:51:47 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Peter Anvin" , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------mhJR1jnrYbl28dTfrgzwtzfE" X-purgate-ID: tlsNG-c201ff/1779789107-E2193443-87D84596/0/0 X-purgate-type: clean X-purgate-size: 10518 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------mhJR1jnrYbl28dTfrgzwtzfE Content-Type: multipart/mixed; boundary="------------G04jG51tG4wXBZwiRrrI7T7Y"; protected-headers="v1" From: Juergen Gross To: Mauricio Faria de Oliveira , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Message-ID: Subject: Re: [PATCH v3 1/4] x86/asm: move inline string functions to References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> --------------G04jG51tG4wXBZwiRrrI7T7Y Content-Type: multipart/mixed; boundary="------------xLcLPnETSHv627VKGGo8W0Cg" --------------xLcLPnETSHv627VKGGo8W0Cg Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMjAuMDUuMjYgMjM6MTIsIE1hdXJpY2lvIEZhcmlhIGRlIE9saXZlaXJhIHdyb3RlOg0K PiBJbiBuZXh0IHBhdGNoLCBpbmxpbmUgc3RyaW5nIGZ1bmN0aW9ucyBhcmUgaW5jbHVkZWQg ZnJvbSAnYm9vdC9zdHJpbmcuYycuDQoNClBsZWFzZSBkb24ndCB1c2UgIkluIG5leHQgcGF0 Y2giLiBZb3UgY2FuJ3QgYmUgc3VyZSB0aGUgcGF0Y2hlcyBvZiBhDQpzZXJpZXMgYXJlIGdv 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Peter Anvin" , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> <20260520-pvh-kasan-inline-v3-2-bede769c6ec7@igalia.com> Content-Language: en-US From: Juergen Gross Autocrypt: addr=jgross@suse.com; keydata= xsBNBFOMcBYBCACgGjqjoGvbEouQZw/ToiBg9W98AlM2QHV+iNHsEs7kxWhKMjrioyspZKOB ycWxw3ie3j9uvg9EOB3aN4xiTv4qbnGiTr3oJhkB1gsb6ToJQZ8uxGq2kaV2KL9650I1SJve dYm8Of8Zd621lSmoKOwlNClALZNew72NjJLEzTalU1OdT7/i1TXkH09XSSI8mEQ/ouNcMvIJ NwQpd369y9bfIhWUiVXEK7MlRgUG6MvIj6Y3Am/BBLUVbDa4+gmzDC9ezlZkTZG2t14zWPvx XP3FAp2pkW0xqG7/377qptDmrk42GlSKN4z76ELnLxussxc7I2hx18NUcbP8+uty4bMxABEB AAHNH0p1ZXJnZW4gR3Jvc3MgPGpncm9zc0BzdXNlLmNvbT7CwHkEEwECACMFAlOMcK8CGwMH CwkIBwMCAQYVCAIJCgsEFgIDAQIeAQIXgAAKCRCw3p3WKL8TL8eZB/9G0juS/kDY9LhEXseh mE9U+iA1VsLhgDqVbsOtZ/S14LRFHczNd/Lqkn7souCSoyWsBs3/wO+OjPvxf7m+Ef+sMtr0 G5lCWEWa9wa0IXx5HRPW/ScL+e4AVUbL7rurYMfwCzco+7TfjhMEOkC+va5gzi1KrErgNRHH kg3PhlnRY0Udyqx++UYkAsN4TQuEhNN32MvN0Np3WlBJOgKcuXpIElmMM5f1BBzJSKBkW0Jc Wy3h2Wy912vHKpPV/Xv7ZwVJ27v7KcuZcErtptDevAljxJtE7aJG6WiBzm+v9EswyWxwMCIO RoVBYuiocc51872tRGywc03xaQydB+9R7BHPzsBNBFOMcBYBCADLMfoA44MwGOB9YT1V4KCy vAfd7E0BTfaAurbG+Olacciz3yd09QOmejFZC6AnoykydyvTFLAWYcSCdISMr88COmmCbJzn sHAogjexXiif6ANUUlHpjxlHCCcELmZUzomNDnEOTxZFeWMTFF9Rf2k2F0Tl4E5kmsNGgtSa aMO0rNZoOEiD/7UfPP3dfh8JCQ1VtUUsQtT1sxos8Eb/HmriJhnaTZ7Hp3jtgTVkV0ybpgFg w6WMaRkrBh17mV0z2ajjmabB7SJxcouSkR0hcpNl4oM74d2/VqoW4BxxxOD1FcNCObCELfIS auZx+XT6s+CE7Qi/c44ibBMR7hyjdzWbABEBAAHCwF8EGAECAAkFAlOMcBYCGwwACgkQsN6d 1ii/Ey9D+Af/WFr3q+bg/8v5tCknCtn92d5lyYTBNt7xgWzDZX8G6/pngzKyWfedArllp0Pn fgIXtMNV+3t8Li1Tg843EXkP7+2+CQ98MB8XvvPLYAfW8nNDV85TyVgWlldNcgdv7nn1Sq8g HwB2BHdIAkYce3hEoDQXt/mKlgEGsLpzJcnLKimtPXQQy9TxUaLBe9PInPd+Ohix0XOlY+Uk QFEx50Ki3rSDl2Zt2tnkNYKUCvTJq7jvOlaPd6d/W0tZqpyy7KVay+K4aMobDsodB3dvEAs6 ScCnh03dDAFgIq5nsB11j3KPKdVoPlfucX2c7kGNH+LUMbzqV6beIENfNexkOfxHfw== In-Reply-To: <20260520-pvh-kasan-inline-v3-2-bede769c6ec7@igalia.com> Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="------------e0zVQwFgDO0B1eS5FGXsOHUm" X-purgate-ID: tlsNG-ef75cf/1779789180-22F76C48-F17DD51E/0/0 X-purgate-type: clean X-purgate-size: 7042 This is an OpenPGP/MIME signed message (RFC 4880 and 3156) --------------e0zVQwFgDO0B1eS5FGXsOHUm Content-Type: multipart/mixed; boundary="------------eTOsP77i9qv2Y2J0nooRQzYX"; protected-headers="v1" From: Juergen Gross To: Mauricio Faria de Oliveira , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org Message-ID: <3aaa12b1-042b-453d-94d2-9305afa15ff2@suse.com> Subject: Re: [PATCH v3 2/4] x86/asm, x86/boot: expose inline memcmp References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> <20260520-pvh-kasan-inline-v3-2-bede769c6ec7@igalia.com> In-Reply-To: <20260520-pvh-kasan-inline-v3-2-bede769c6ec7@igalia.com> --------------eTOsP77i9qv2Y2J0nooRQzYX Content-Type: multipart/mixed; boundary="------------BXbf0LBiH8UsRo4K4do9SRvx" --------------BXbf0LBiH8UsRo4K4do9SRvx Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMjAuMDUuMjYgMjM6MTIsIE1hdXJpY2lvIEZhcmlhIGRlIE9saXZlaXJhIHdyb3RlOg0K PiBNb3ZlIHRoZSBpbmxpbmUgbWVtY21wIGZ1bmN0aW9uIGN1cnJlbnRseSBvbmx5IGF2YWls YWJsZSBpbiAnYm9vdC9zdHJpbmcuYycNCj4gYW5kIGl0cyB1c2VycyAoZWcsICdib290L2Nv bXByZXNzZWQvc3RyaW5nLmMnIGFuZCAncHVyZ2F0b3J5L3B1cmdhdG9yeS5ybycpDQo+IGlu dG8gdGhlIGlubGluZSBzdHJpbmcgZnVuY3Rpb25zIGhlYWRlciA8YXNtL3N0cmluZ19pbmxp bmUuaD4gdG8gYmUgcmV1c2VkLg0KPiANCj4gTm90ZSB0aGF0IHRoZSBpbmxpbmUgbWVtY21w KCkgcmV0dXJucyAwLzEsIG5vdCAtMS8wLzEgYXMgcmVndWxhciBtZW1jbXAoKQ0KPiAocmVw b3J0ZWQgYnkgRGF2aWQgTGFpZ2h0IDxkYXZpZC5sYWlnaHQubGludXhAZ21haWwuY29tPiks IHdoaWNoIGlzIG5vdA0KPiBjYXVzZWQgb3IgY2hhbmdlZCBieSB0aGlzIGNvbW1pdDsgdGhp cyB3aWxsIGJlIGFkZHJlc3NlZCBzZXBhcmF0ZWx5Lg0KPiANCj4gU2lnbmVkLW9mZi1ieTog TWF1cmljaW8gRmFyaWEgZGUgT2xpdmVpcmEgPG1mb0BpZ2FsaWEuY29tPg0KDQpSZXZpZXdl ZC1ieTogSnVlcmdlbiBHcm9zcyA8amdyb3NzQHN1c2UuY29tPg0KDQoNCkp1ZXJnZW4NCg== --------------BXbf0LBiH8UsRo4K4do9SRvx Content-Type: application/pgp-keys; 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Smith" , Jan Beulich , Andrew Cooper References: <5ee376dc0df448437f386ab2606c42d63a515ca1.1779194154.git.accek@invisiblethingslab.com> Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1779794754-80D7F161-4DF437B5/10/73395122804 X-purgate-type: spam X-purgate-size: 1794 On 5/19/26 3:45 PM, Andrew Cooper wrote: > On 19/05/2026 2:41 pm, Marek Marczykowski-Górecki wrote: >> On Tue, May 19, 2026 at 03:06:57PM +0200, Szymon Acedański wrote: >>> When netbooting a unified Xen kernel image (via GRUB chainloader), >>> the resulting loaded_image->DeviceHandle does not support >>> SIMPLE_FILE_SYSTEM_PROTOCOL. >>> >>> Instead of crashing via noreturn PrintErrMesg(), print a message >>> via PrintStr() and return NULL from get_parent_handle(). >> It's worth noting this isn't the first instance of returning NULL from >> get_parent_handle(). The return value is used only as an argument >> to read_file() (sometimes indirectly), and if it gets to be called with >> NULL, read_file() will terminate execution via PrintErrMesg(). But with >> unified Xen image, the intention is to not call read_file() at all, only >> read_section(), so tolerating get_parent_handle() failure in this case >> is desired. Keeping the message in place will ease debugging if >> read_file() will actually be called later. >> >> Acked-by: Marek Marczykowski-Górecki >> >> As a side note, a slightly better approach would be to call >> get_parent_handle() lazily (on the first call to read_file()?). But it's >> a bigger change that I feel may be too late for in Xen 4.22. >> >> Also, adding cc: Oleksii for release ack. > > Bugfixes are still fine to go in. > > Personally, I think moving the call to get_parent_handle() is a better > fix, and fine for 4.22 even at this juncture.  ARM already does > something along these lines in allocate_module_file(). I agree that we could consider suggested better approach and I am okay with having this patch (or its new version) as part of 4.22. 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Adjust the cases to use VMCB(1) instead. L0 may use vGIF to speed up L1 but whether L2 uses vGIF is the L1 hypervisor's choice and L0 should never need to check/change it. Fixes: 4cd0fad64590 ("x86/svm: Add virtual GIF support") Fixes: 05bb1116b8c1 ("x86/svm: update VGIF support") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/nestedsvm.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 9899cb2147b1..dca07d27d923 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -1193,10 +1193,11 @@ nestedsvm_vmexit_defer(struct vcpu *v, uint64_t exitcode, uint64_t exitinfo1, uint64_t exitinfo2) { struct nestedsvm *svm = &vcpu_nestedsvm(v); - struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; + struct nestedvcpu *nv = &vcpu_nestedhvm(v); + struct vmcb_struct *n1vmcb = nv->nv_n1vmcx; - if ( vmcb->_vintr.fields.vgif_enable ) - vmcb->_vintr.fields.vgif = 0; + if ( n1vmcb->_vintr.fields.vgif_enable ) + n1vmcb->_vintr.fields.vgif = 0; else svm->ns_gif = 0; @@ -1460,11 +1461,12 @@ bool nestedsvm_gif_isset(struct vcpu *v) { struct nestedsvm *svm = &vcpu_nestedsvm(v); - struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; + struct nestedvcpu *nv = &vcpu_nestedhvm(v); + struct vmcb_struct *n1vmcb = nv->nv_n1vmcx; /* get the vmcb gif value if using vgif */ - if ( vmcb->_vintr.fields.vgif_enable ) - return vmcb->_vintr.fields.vgif; + if ( n1vmcb->_vintr.fields.vgif_enable ) + return n1vmcb->_vintr.fields.vgif; else return svm->ns_gif; } -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:41:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:41:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319821.1587265 (Exim 4.92) (envelope-from ) id 1wRr5g-0004fW-EZ; Tue, 26 May 2026 12:41:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319821.1587265; Tue, 26 May 2026 12:41:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRr5g-0004fM-Br; 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Relax the check to match the APM and hardware. Some of the reserved bits were observed to be set running Rocky Linux 10.1 on Xen on Xen. Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/vmcb.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c index 975a1eaef806..9ada491e57db 100644 --- a/xen/arch/x86/hvm/svm/vmcb.c +++ b/xen/arch/x86/hvm/svm/vmcb.c @@ -347,10 +347,8 @@ bool svm_vmcb_isvalid( PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); if ( (cr0 & X86_CR0_PG) && - ((cr3 & 7) || - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || - ((efer & EFER_LMA) && - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) + ((efer & EFER_LMA) && + (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr)) ) PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); valid = hvm_cr4_guest_valid_bits(v->domain); -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:41:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:41:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319820.1587257 (Exim 4.92) (envelope-from ) id 1wRr5Z-0004Rl-84; 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Furthermore, L1's domain could not be destroyed. After this series, repeating the same results in L2 crashing shortly after it reaches the Linux kernel but L1 survives and its domain can be properly destroyed. This is not great but is at least some small amount of progress. Thanks, Ross Ross Lagerwall (6): nestedsvm: Fix CR3 MBZ check nestedsvm: Adjust L2's DR intercept when adjusting L1 nestedsvm: Use the correct VMCB for vGIF nestedsvm: Set GIF during VMRUN if vGIF is enabled nestedsvm: Fix deferred event injection nestedsvm: Allow destroying the domain fully xen/arch/x86/hvm/svm/intr.c | 4 +-- xen/arch/x86/hvm/svm/nestedhvm.h | 1 + xen/arch/x86/hvm/svm/nestedsvm.c | 60 ++++++++++++++++++++++++-------- xen/arch/x86/hvm/svm/svm.c | 3 ++ xen/arch/x86/hvm/svm/svm.h | 3 ++ xen/arch/x86/hvm/svm/vmcb.c | 6 ++-- 6 files changed, 57 insertions(+), 20 deletions(-) -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:41:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:41:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319822.1587275 (Exim 4.92) (envelope-from ) id 1wRr5i-0004tO-MB; Tue, 26 May 2026 12:41:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319822.1587275; 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L0 intercepts VMEXIT_DR7_READ, which disables the intercept for L1 and then restarts L2 which re-executes the instruction and then this repeats indefinitely. Disable the intercept for the current VMCB if in guest mode to reflect what would happen if the VMCB were recreated via nsvm_vmcb_prepare4vmrun(). Fixes: a59a7be91b61 ("nestedsvm: fix DRn handling") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/svm.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 49fcdd906cf8..209edcba321a 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1657,6 +1657,8 @@ static void svm_dr_access(struct vcpu *v, struct cpu_user_regs *regs) TRACE(TRC_HVM_DR_WRITE); __restore_debug_registers(vmcb, v); + if ( nestedhvm_enabled(v->domain) && nestedhvm_vcpu_in_guestmode(v) ) + vmcb_set_dr_intercepts(v->arch.hvm.svm.vmcb, 0); } static int cf_check svm_msr_read_intercept( -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:41:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:41:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319825.1587294 (Exim 4.92) (envelope-from ) id 1wRr5q-0005Sn-Bd; Tue, 26 May 2026 12:41:10 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319825.1587294; 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This was already handled for !vGIF so handle it for the vGIF case too. Fixes: 4cd0fad64590 ("x86/svm: Add virtual GIF support") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/nestedsvm.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index dca07d27d923..9b0bd0358ce4 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -603,10 +603,12 @@ nsvm_vcpu_vmentry(struct vcpu *v, struct cpu_user_regs *regs, int ret; struct nestedvcpu *nv = &vcpu_nestedhvm(v); struct nestedsvm *svm = &vcpu_nestedsvm(v); - struct vmcb_struct *ns_vmcb; + struct vmcb_struct *ns_vmcb, *n1vmcb; ns_vmcb = nv->nv_vvmcx; + n1vmcb = nv->nv_n1vmcx; ASSERT(ns_vmcb != NULL); + ASSERT(n1vmcb != NULL); ASSERT(nv->nv_n2vmcx != NULL); ASSERT(nv->nv_n2vmcx_pa != INVALID_PADDR); @@ -651,7 +653,10 @@ nsvm_vcpu_vmentry(struct vcpu *v, struct cpu_user_regs *regs, return ret; } - svm->ns_gif = 1; + if ( n1vmcb->_vintr.fields.vgif_enable ) + n1vmcb->_vintr.fields.vgif = 1; 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However, the code there appears to be bogus and completely ignores the source/vector set up in the first place. Fix this by using the values to properly inject the event. Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/intr.c | 4 ++-- xen/arch/x86/hvm/svm/nestedsvm.c | 22 ++++++++++++++++++---- xen/arch/x86/hvm/svm/svm.h | 3 +++ 3 files changed, 23 insertions(+), 6 deletions(-) diff --git a/xen/arch/x86/hvm/svm/intr.c b/xen/arch/x86/hvm/svm/intr.c index cf0621d2f628..8914375b6c21 100644 --- a/xen/arch/x86/hvm/svm/intr.c +++ b/xen/arch/x86/hvm/svm/intr.c @@ -55,7 +55,7 @@ static void svm_inject_nmi(struct vcpu *v) vmcb, general1_intercepts | GENERAL1_INTERCEPT_IRET); } -static void svm_inject_extint(struct vcpu *v, int vector) +void svm_inject_extint(struct vcpu *v, int vector) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; intinfo_t event; @@ -69,7 +69,7 @@ static void svm_inject_extint(struct vcpu *v, int vector) vmcb->event_inj = event; } -static void svm_enable_intr_window(struct vcpu *v, struct hvm_intack intack) +void svm_enable_intr_window(struct vcpu *v, struct hvm_intack intack) { struct vmcb_struct *vmcb = v->arch.hvm.svm.vmcb; uint32_t general1_intercepts = vmcb_get_general1_intercepts(vmcb); diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index 9b0bd0358ce4..d4fd838ca0b6 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -733,11 +733,25 @@ nsvm_vcpu_vmexit_inject(struct vcpu *v, struct cpu_user_regs *regs, switch ( exitcode ) { case VMEXIT_INTR: - if ( unlikely(ns_vmcb->event_inj.v) && nv->nv_vmentry_pending && - hvm_event_needs_reinjection(ns_vmcb->event_inj.type, - ns_vmcb->event_inj.vector) ) - ns_vmcb->exit_int_info = ns_vmcb->event_inj; + { + struct hvm_intack intack = { + .source = svm->ns_vmexit.exitinfo1, + .vector = svm->ns_vmexit.exitinfo2 + }; + + /* See the comment in svm_intr_assist() for why this is necessary */ + if ( unlikely(vmcb->event_inj.v) || + hvm_interrupt_blocked(v, intack) ) + { + svm_enable_intr_window(v, intack); + break; + } + + svm_inject_extint(v, intack.vector); + pt_intr_post(v, intack); break; + } + case VMEXIT_EXCEPTION_PF: ns_vmcb->_cr2 = ns_vmcb->ei.exc.cr2; fallthrough; diff --git a/xen/arch/x86/hvm/svm/svm.h b/xen/arch/x86/hvm/svm/svm.h index cfa411ad5ae1..186e0905967c 100644 --- a/xen/arch/x86/hvm/svm/svm.h +++ b/xen/arch/x86/hvm/svm/svm.h @@ -95,6 +95,9 @@ enum vmcb_sync_state { void svm_sync_vmcb(struct vcpu *v, enum vmcb_sync_state new_state); +void svm_inject_extint(struct vcpu *v, int vector); +void svm_enable_intr_window(struct vcpu *v, struct hvm_intack intack); + #endif /* __X86_HVM_SVM_SVM_PRIV_H__ */ /* -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:41:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:41:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319835.1587311 (Exim 4.92) (envelope-from ) id 1wRr60-0006Is-0P; Tue, 26 May 2026 12:41:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319835.1587311; Tue, 26 May 2026 12:41:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRr5z-0006Ih-SF; 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This means guests that call VMRUN cannot be fully destroyed. Move the unmap of the virtual VMCB earlier to fix the issue. Fixes: bcf557675d85 ("x86: properly use map_domain_page() in nested HVM code") Signed-off-by: Ross Lagerwall --- xen/arch/x86/hvm/svm/nestedhvm.h | 1 + xen/arch/x86/hvm/svm/nestedsvm.c | 15 +++++++++++++-- xen/arch/x86/hvm/svm/svm.c | 1 + 3 files changed, 15 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/hvm/svm/nestedhvm.h b/xen/arch/x86/hvm/svm/nestedhvm.h index 9bfed5ffd71b..9bb04a043430 100644 --- a/xen/arch/x86/hvm/svm/nestedhvm.h +++ b/xen/arch/x86/hvm/svm/nestedhvm.h @@ -48,6 +48,7 @@ bool cf_check nsvm_vmcb_guest_intercepts_event( struct vcpu *v, unsigned int vector, int errcode); bool cf_check nsvm_vmcb_hap_enabled(struct vcpu *v); enum hvm_intblk cf_check nsvm_intr_blocked(struct vcpu *v); +void cf_check nsvm_domain_relinquish_resources(struct domain *d); /* Interrupts, vGIF */ void svm_vmexit_do_clgi(struct cpu_user_regs *regs, struct vcpu *v); diff --git a/xen/arch/x86/hvm/svm/nestedsvm.c b/xen/arch/x86/hvm/svm/nestedsvm.c index d4fd838ca0b6..6f4684f5c21b 100644 --- a/xen/arch/x86/hvm/svm/nestedsvm.c +++ b/xen/arch/x86/hvm/svm/nestedsvm.c @@ -110,8 +110,6 @@ void cf_check nsvm_vcpu_destroy(struct vcpu *v) svm->ns_merged_msrpm = NULL; } - hvm_unmap_guest_frame(nv->nv_vvmcx, 1); - nv->nv_vvmcx = NULL; if ( nv->nv_n2vmcx ) { free_vmcb(nv->nv_n2vmcx); @@ -122,6 +120,19 @@ void cf_check nsvm_vcpu_destroy(struct vcpu *v) svm->ns_iomap = NULL; } +void cf_check nsvm_domain_relinquish_resources(struct domain *d) +{ + struct vcpu *v; + struct nestedvcpu *nv; + + for_each_vcpu ( d, v ) + { + nv = &vcpu_nestedhvm(v); + hvm_unmap_guest_frame(nv->nv_vvmcx, 1); + nv->nv_vvmcx = NULL; + } +} + int cf_check nsvm_vcpu_reset(struct vcpu *v) { struct nestedsvm *svm = &vcpu_nestedsvm(v); diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 209edcba321a..e6b5c9ec3b9c 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -2422,6 +2422,7 @@ static struct hvm_function_table __initdata_cf_clobber svm_function_table = { .nhvm_vmcx_hap_enabled = nsvm_vmcb_hap_enabled, .nhvm_intr_blocked = nsvm_intr_blocked, .nhvm_hap_walk_L1_p2m = nsvm_hap_walk_L1_p2m, + .nhvm_domain_relinquish_resources = nsvm_domain_relinquish_resources, .get_reg = svm_get_reg, .set_reg = svm_set_reg, -- 2.53.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:50:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:50:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319877.1587325 (Exim 4.92) (envelope-from ) id 1wRrEU-0000vz-8Y; Tue, 26 May 2026 12:50:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319877.1587325; Tue, 26 May 2026 12:50:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrEU-0000vF-3b; Tue, 26 May 2026 12:50:06 +0000 Received: by outflank-mailman (input) for mailman id 1319877; Tue, 26 May 2026 12:48:44 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrDA-0008Ou-E4 for xen-devel@lists.xenproject.org; Tue, 26 May 2026 12:48:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRrD9-000tzp-Qh for xen-devel@lists.xenproject.org; Tue, 26 May 2026 14:48:43 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1596a7-5cb7-0a2a0a5109dd-0a2a4502bdc0-12 for ; Tue, 26 May 2026 14:48:43 +0200 Received: from [74.125.82.174] (helo=mail-dy1-f174.google.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1596aa-af86-0a2a45020019-4a7d52aed41b-3 for ; Tue, 26 May 2026 14:48:43 +0200 Received: by mail-dy1-f174.google.com with SMTP id 5a478bee46e88-304545f5206so5558143eec.0 for ; Tue, 26 May 2026 05:48:43 -0700 (PDT) Received: from [192.168.1.18] (177-4-162-74.user3p.v-tal.net.br. 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That is correct for the request channel, where evt_next_id is used to allocate the next request id. It is wrong for the event channel: incoming events are validated against evt_id, and evt_id is incremented by evtchnl_interrupt_evt(). This leaves the expected event id from the previous stream instance. A backend that restarts event ids for a reopened stream can then have valid current-position events dropped until the stale frontend id catches up. Reset evt_id for the event channel. Also advance the event-page consumer to the current producer while clearing the stream, so obsolete events queued for the previous stream instance are not delivered to the next ALSA runtime. Fixes: 1cee559351a7 ("ALSA: xen-front: Implement ALSA virtual sound driver") Signed-off-by: Cássio Gabriel --- sound/xen/xen_snd_front_evtchnl.c | 8 ++++++-- sound/xen/xen_snd_front_evtchnl.h | 4 ++-- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/sound/xen/xen_snd_front_evtchnl.c b/sound/xen/xen_snd_front_evtchnl.c index bc03f71bf16e..09e4c1d05636 100644 --- a/sound/xen/xen_snd_front_evtchnl.c +++ b/sound/xen/xen_snd_front_evtchnl.c @@ -456,7 +456,11 @@ void xen_snd_front_evtchnl_pair_clear(struct xen_snd_front_evtchnl_pair *evt_pai } scoped_guard(mutex, &evt_pair->evt.ring_io_lock) { - evt_pair->evt.evt_next_id = 0; + evt_pair->evt.evt_id = 0; + /* Drop obsolete events queued for the previous stream instance. */ + evt_pair->evt.u.evt.page->in_cons = + evt_pair->evt.u.evt.page->in_prod; + /* Ensure the consumer index is visible before stream reuse. */ + virt_wmb(); } } - diff --git a/sound/xen/xen_snd_front_evtchnl.h b/sound/xen/xen_snd_front_evtchnl.h index 3675fba70564..8400261ac466 100644 --- a/sound/xen/xen_snd_front_evtchnl.h +++ b/sound/xen/xen_snd_front_evtchnl.h @@ -37,9 +37,9 @@ struct xen_snd_front_evtchnl { /* State of the event channel. */ enum xen_snd_front_evtchnl_state state; enum xen_snd_front_evtchnl_type type; - /* Either response id or incoming event id. */ + /* Current response id or next expected incoming event id. */ u16 evt_id; - /* Next request id or next expected event id. */ + /* Next request id. */ u16 evt_next_id; /* Shared ring access lock. */ struct mutex ring_io_lock; -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:50:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:50:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319879.1587330 (Exim 4.92) (envelope-from ) id 1wRrEU-0000yi-Jc; Tue, 26 May 2026 12:50:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319879.1587330; Tue, 26 May 2026 12:50:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrEU-0000xL-B8; Tue, 26 May 2026 12:50:06 +0000 Received: by outflank-mailman (input) for mailman id 1319879; Tue, 26 May 2026 12:48:47 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrDD-0008PP-3V for xen-devel@lists.xenproject.org; Tue, 26 May 2026 12:48:47 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRrDC-00Agmw-Fd for xen-devel@lists.xenproject.org; Tue, 26 May 2026 14:48:46 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15969c-e002-0a2a0a5209dd-0a2a450cc9f2-42 for ; Tue, 26 May 2026 14:48:46 +0200 Received: from [74.125.82.180] (helo=mail-dy1-f180.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1596ac-62f1-0a2a450c0019-4a7d52b4b5f4-3 for ; Tue, 26 May 2026 14:48:46 +0200 Received: by mail-dy1-f180.google.com with SMTP id 5a478bee46e88-3025d725a05so24371879eec.1 for ; Tue, 26 May 2026 05:48:45 -0700 (PDT) Received: from [192.168.1.18] (177-4-162-74.user3p.v-tal.net.br. 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The event channel is different: XENSND_EVT_CUR_POS handling uses ALSA runtime buffer and period geometry, and the corresponding Xen stream parameters are not submitted to the backend until .prepare() sends XENSND_OP_OPEN. Currently .open() connects both channels. A backend current-position event, or a stale event queued for an earlier stream instance, can therefore reach xen_snd_front_alsa_handle_cur_pos() before runtime->buffer_size and runtime->period_size are valid. Add a per-channel connection helper, connect only the request channel in .open(), connect the event channel after a successful stream prepare, and disconnect it before stream close/free. Re-check the event-channel state after taking ring_io_lock so disconnecting the event channel synchronizes against a threaded IRQ that passed the initial lockless state test. Keep defensive runtime geometry checks in the position handler. Fixes: 1cee559351a7 ("ALSA: xen-front: Implement ALSA virtual sound driver") Signed-off-by: Cássio Gabriel --- sound/xen/xen_snd_front_alsa.c | 17 ++++++++++++----- sound/xen/xen_snd_front_evtchnl.c | 20 +++++++++++++------- sound/xen/xen_snd_front_evtchnl.h | 2 ++ 3 files changed, 27 insertions(+), 12 deletions(-) diff --git a/sound/xen/xen_snd_front_alsa.c b/sound/xen/xen_snd_front_alsa.c index dc626480123a..a6dd196f73d6 100644 --- a/sound/xen/xen_snd_front_alsa.c +++ b/sound/xen/xen_snd_front_alsa.c @@ -378,7 +378,7 @@ static int alsa_open(struct snd_pcm_substream *substream) stream_clear(stream); - xen_snd_front_evtchnl_pair_set_connected(stream->evt_pair, true); + xen_snd_front_evtchnl_set_connected(&stream->evt_pair->req, true); ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_FORMAT, alsa_hw_rule, stream, @@ -498,6 +498,8 @@ static int alsa_hw_free(struct snd_pcm_substream *substream) struct xen_snd_front_pcm_stream_info *stream = stream_get(substream); int ret; + xen_snd_front_evtchnl_set_connected(&stream->evt_pair->evt, false); + ret = xen_snd_front_stream_close(&stream->evt_pair->req); stream_free(stream); return ret; @@ -532,6 +534,7 @@ static int alsa_prepare(struct snd_pcm_substream *substream) return ret; stream->is_open = true; + xen_snd_front_evtchnl_set_connected(&stream->evt_pair->evt, true); } return 0; @@ -571,20 +574,24 @@ void xen_snd_front_alsa_handle_cur_pos(struct xen_snd_front_evtchnl *evtchnl, { struct snd_pcm_substream *substream = evtchnl->u.evt.substream; struct xen_snd_front_pcm_stream_info *stream = stream_get(substream); + struct snd_pcm_runtime *runtime = substream->runtime; snd_pcm_uframes_t delta, new_hw_ptr, cur_frame; - cur_frame = bytes_to_frames(substream->runtime, pos_bytes); + if (!runtime->buffer_size || !runtime->period_size) + return; + + cur_frame = bytes_to_frames(runtime, pos_bytes); delta = cur_frame - stream->be_cur_frame; stream->be_cur_frame = cur_frame; new_hw_ptr = (snd_pcm_uframes_t)atomic_read(&stream->hw_ptr); - new_hw_ptr = (new_hw_ptr + delta) % substream->runtime->buffer_size; + new_hw_ptr = (new_hw_ptr + delta) % runtime->buffer_size; atomic_set(&stream->hw_ptr, (int)new_hw_ptr); stream->out_frames += delta; - if (stream->out_frames > substream->runtime->period_size) { - stream->out_frames %= substream->runtime->period_size; + if (stream->out_frames > runtime->period_size) { + stream->out_frames %= runtime->period_size; snd_pcm_period_elapsed(substream); } } diff --git a/sound/xen/xen_snd_front_evtchnl.c b/sound/xen/xen_snd_front_evtchnl.c index 09e4c1d05636..17a30452c0cc 100644 --- a/sound/xen/xen_snd_front_evtchnl.c +++ b/sound/xen/xen_snd_front_evtchnl.c @@ -94,6 +94,9 @@ static irqreturn_t evtchnl_interrupt_evt(int irq, void *dev_id) guard(mutex)(&channel->ring_io_lock); + if (unlikely(channel->state != EVTCHNL_STATE_CONNECTED)) + return IRQ_HANDLED; + prod = page->in_prod; /* Ensure we see ring contents up to prod. */ virt_rmb(); @@ -430,8 +433,8 @@ int xen_snd_front_evtchnl_publish_all(struct xen_snd_front_info *front_info) return ret; } -void xen_snd_front_evtchnl_pair_set_connected(struct xen_snd_front_evtchnl_pair *evt_pair, - bool is_connected) +void xen_snd_front_evtchnl_set_connected(struct xen_snd_front_evtchnl *channel, + bool is_connected) { enum xen_snd_front_evtchnl_state state; @@ -440,13 +443,16 @@ void xen_snd_front_evtchnl_pair_set_connected(struct xen_snd_front_evtchnl_pair else state = EVTCHNL_STATE_DISCONNECTED; - scoped_guard(mutex, &evt_pair->req.ring_io_lock) { - evt_pair->req.state = state; + scoped_guard(mutex, &channel->ring_io_lock) { + channel->state = state; } +} - scoped_guard(mutex, &evt_pair->evt.ring_io_lock) { - evt_pair->evt.state = state; - } +void xen_snd_front_evtchnl_pair_set_connected(struct xen_snd_front_evtchnl_pair *evt_pair, + bool is_connected) +{ + xen_snd_front_evtchnl_set_connected(&evt_pair->req, is_connected); + xen_snd_front_evtchnl_set_connected(&evt_pair->evt, is_connected); } void xen_snd_front_evtchnl_pair_clear(struct xen_snd_front_evtchnl_pair *evt_pair) diff --git a/sound/xen/xen_snd_front_evtchnl.h b/sound/xen/xen_snd_front_evtchnl.h index 8400261ac466..f6ebdb09c029 100644 --- a/sound/xen/xen_snd_front_evtchnl.h +++ b/sound/xen/xen_snd_front_evtchnl.h @@ -77,6 +77,8 @@ void xen_snd_front_evtchnl_free_all(struct xen_snd_front_info *front_info); int xen_snd_front_evtchnl_publish_all(struct xen_snd_front_info *front_info); void xen_snd_front_evtchnl_flush(struct xen_snd_front_evtchnl *evtchnl); +void xen_snd_front_evtchnl_set_connected(struct xen_snd_front_evtchnl *channel, + bool is_connected); void xen_snd_front_evtchnl_pair_set_connected(struct xen_snd_front_evtchnl_pair *evt_pair, bool is_connected); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 12:50:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 12:50:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319875.1587321 (Exim 4.92) (envelope-from ) id 1wRrEU-0000tJ-20; Tue, 26 May 2026 12:50:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319875.1587321; Tue, 26 May 2026 12:50:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrET-0000tB-SQ; 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The first patch resets the event channel's expected incoming event id when a stream is cleared, and drops stale queued events from the previous stream instance. The second patch keeps the request channel connected from .open(), where it is needed for hw-rule queries and stream open requests, but delays the event channel until after a successful .prepare(). This prevents current-position events from reaching the ALSA position handler before runtime buffer and period geometry are valid. Signed-off-by: Cássio Gabriel --- Cássio Gabriel (2): ALSA: xen-front: Reset event channel state on stream clear ALSA: xen-front: Connect event channel after stream prepare sound/xen/xen_snd_front_alsa.c | 17 ++++++++++++----- sound/xen/xen_snd_front_evtchnl.c | 28 +++++++++++++++++++--------- sound/xen/xen_snd_front_evtchnl.h | 6 ++++-- 3 files changed, 35 insertions(+), 16 deletions(-) --- base-commit: 31d40472d5699a6139fe3a2ad6558645a99b7422 change-id: 20260423-alsa-xen-event-channel-fixes-6e4b40e649f7 Best regards, -- Cássio Gabriel From xen-devel-bounces@lists.xenproject.org Tue May 26 13:01:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 13:01:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319902.1587347 (Exim 4.92) (envelope-from ) id 1wRrPn-0003yD-Ju; Tue, 26 May 2026 13:01:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319902.1587347; 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Relax the check to match the > APM and hardware. > > Some of the reserved bits were observed to be set running Rocky Linux > 10.1 on Xen on Xen. > > Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") > Signed-off-by: Ross Lagerwall > --- > xen/arch/x86/hvm/svm/vmcb.c | 6 ++---- > 1 file changed, 2 insertions(+), 4 deletions(-) > > diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c > index 975a1eaef806..9ada491e57db 100644 > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -347,10 +347,8 @@ bool svm_vmcb_isvalid( > PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); > > if ( (cr0 & X86_CR0_PG) && > - ((cr3 & 7) || > - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || > - ((efer & EFER_LMA) && > - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) > + ((efer & EFER_LMA) && > + (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr)) ) > PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); > > valid = hvm_cr4_guest_valid_bits(v->domain); The APM does say MBZ for VMRUN, but the end result of a VMEntry (virtual or otherwise) must be a legal CR3 value. For 5.2.1 CR3 Register (Legacy) and 5.3.2 CR3 (Long), the APM states: Reserved Bits. Reserved fields should be cleared to 0 by software when writing CR3. What's the real behaviour for trying to set a reserved, non-MBZ bit in CR3?  On Intel it's strictly a #GP, and I really hope it's the same on AMD. i.e. I really hope this is a documentation error on AMD's behalf, and not a misfeature we need to support. ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 26 13:23:54 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 13:23:54 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319914.1587355 (Exim 4.92) (envelope-from ) id 1wRrl5-0007FB-CB; Tue, 26 May 2026 13:23:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319914.1587355; Tue, 26 May 2026 13:23:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRrl5-0007F4-9N; Tue, 26 May 2026 13:23:47 +0000 Received: by outflank-mailman (input) for mailman id 1319914; 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Relax the check to match the >> APM and hardware. >> >> Some of the reserved bits were observed to be set running Rocky Linux >> 10.1 on Xen on Xen. >> >> Fixes: 9a779e4fc161 ("Implement SVM specific part for Nested Virtualization") >> Signed-off-by: Ross Lagerwall >> --- >> xen/arch/x86/hvm/svm/vmcb.c | 6 ++---- >> 1 file changed, 2 insertions(+), 4 deletions(-) >> >> diff --git a/xen/arch/x86/hvm/svm/vmcb.c b/xen/arch/x86/hvm/svm/vmcb.c >> index 975a1eaef806..9ada491e57db 100644 >> --- a/xen/arch/x86/hvm/svm/vmcb.c >> +++ b/xen/arch/x86/hvm/svm/vmcb.c >> @@ -347,10 +347,8 @@ bool svm_vmcb_isvalid( >> PRINTF("CR0: bits [63:32] are not zero (%#"PRIx64")\n", cr0); >> >> if ( (cr0 & X86_CR0_PG) && >> - ((cr3 & 7) || >> - ((!(cr4 & X86_CR4_PAE) || (efer & EFER_LMA)) && (cr3 & 0xfe0)) || >> - ((efer & EFER_LMA) && >> - (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr))) ) >> + ((efer & EFER_LMA) && >> + (cr3 >> v->domain->arch.cpuid->extd.maxphysaddr)) ) >> PRINTF("CR3: MBZ bits are set (%#"PRIx64")\n", cr3); >> >> valid = hvm_cr4_guest_valid_bits(v->domain); > > The APM does say MBZ for VMRUN, but the end result of a VMEntry (virtual > or otherwise) must be a legal CR3 value. > > For 5.2.1 CR3 Register (Legacy) and 5.3.2 CR3 (Long), the APM states: > > Reserved Bits. Reserved fields should be cleared to 0 by software when > writing CR3. > > What's the real behaviour for trying to set a reserved, non-MBZ bit in > CR3? On Intel it's strictly a #GP, and I really hope it's the same on AMD. > > i.e. I really hope this is a documentation error on AMD's behalf, and > not a misfeature we need to support. > An hvm32pae XTF test that does this... write_cr3(read_cr3() | 1); printk("cr3 is %lx\n", read_cr3()); ... succeeds and prints: cr3 is 105001 This was similarly observed by the KVM folks in this thread: https://patchwork.kernel.org/project/kvm/patch/20200713043908.39605-1-namit@vmware.com/#23578493 Ross From xen-devel-bounces@lists.xenproject.org Tue May 26 13:46:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 13:46:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319929.1587364 (Exim 4.92) (envelope-from ) id 1wRs6c-0001tp-1Q; Tue, 26 May 2026 13:46:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319929.1587364; Tue, 26 May 2026 13:46:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRs6b-0001ti-Uz; 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L0 intercepts VMEXIT_DR7_READ, which disables > the intercept for L1 and then restarts L2 which re-executes the > instruction and then this repeats indefinitely. > > Disable the intercept for the current VMCB if in guest mode to reflect > what would happen if the VMCB were recreated via > nsvm_vmcb_prepare4vmrun(). > > Fixes: a59a7be91b61 ("nestedsvm: fix DRn handling") > Signed-off-by: Ross Lagerwall > --- > xen/arch/x86/hvm/svm/svm.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c > index 49fcdd906cf8..209edcba321a 100644 > --- a/xen/arch/x86/hvm/svm/svm.c > +++ b/xen/arch/x86/hvm/svm/svm.c > @@ -1657,6 +1657,8 @@ static void svm_dr_access(struct vcpu *v, struct cpu_user_regs *regs) > > TRACE(TRC_HVM_DR_WRITE); > __restore_debug_registers(vmcb, v); > + if ( nestedhvm_enabled(v->domain) && nestedhvm_vcpu_in_guestmode(v) ) > + vmcb_set_dr_intercepts(v->arch.hvm.svm.vmcb, 0); > } > > static int cf_check svm_msr_read_intercept( In Xen, debug registers are generally lazily.  When DR7 is not active (which is expected to be ~100% of the time for a regular guest), there's no point context switching DR{0..3} or (on AMD) the mask DBG Mask MSRs[1]. The debug registers are brought into sync if DR7 is active at context switch, or any DR is accessed, or if a #DB is injected[2]. Now, in the logic above, you're saying that L1 didn't intercept DR which is why we didn't Virtual VMExit earlier, so when we're bringing DRs into sync we need to drop the L02 intercept too.  I think this is fine, but it deserves a comment explaining that it's an artefact of Xen's lazy context DR switching. But, what about emulated MOV DR, or a #DB injection?  Those paths will still end up being wrong. I think this logic to alter the DR intercepts needs to be inside __restore_debug_registers(), and needs to cross-check the L12 settings before modifying L02. ~Andrew [1] Although the Mask MSRs are currently inefficiently switched because I didn't have time to optimise things after the last XSA fixing them. [2] This path is wonky.  DRs should be made active irrespective of TF because the #DB handler always needs to read DR6[3]. [3] This is a fun FRED bug, as the FRED #DB handler does not need to read DR6, meaning that I think we need to force DR6 always to be in sync.  And this gets extra complicated on Intel... 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[109.243.69.121]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-45ed90f8978sm3792998f8f.7.2026.05.26.07.44.03 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 26 May 2026 07:44:04 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:In-Reply-To:From:Content-Language:References:Cc:To:Subject:User-Agent:MIME-Version:Date:Message-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779806645; x=1780411445; darn=lists.xenproject.org; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=z/X8eZNrrybPMnti/+Gb3e66Bh32G+5tDXPR98n1gyo=; b=KHvNeQaOqghETj5Ub0af9Y4IfPePAYW8NXkSbZfuNONmI9unCjdpUZGYjfiI2B9j9G lUSCXRisetFFfjrqv5Acmd5v8wwm7+JAOQ4HjeCgutGVjMj49PUXW851XCuAmTkF6xQD f6v/wCtPby4Fec3Zx0PZHCS8ZVoYJhfOfl/Co4LHzMnE9w7ZbmlEN6lKlQE3zUPOuJHx K30iQgnNkKdkMIYBQrnjyKC1tuh+8ZAgcawo1W9FR5yZnPHjTLdc+0gvnEyAf7422goY XaHllxXneBwVOb5U0qPsAyC0Fgk8QUZ3qzkymHIyJKlMBPBXs8vNuIEdqQiIbH5HMwdx l/NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779806645; x=1780411445; h=content-transfer-encoding:in-reply-to:from:content-language :references:cc:to:subject:user-agent:mime-version:date:message-id :x-gm-gg:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=z/X8eZNrrybPMnti/+Gb3e66Bh32G+5tDXPR98n1gyo=; b=OMy2mDrcxR1k4nCZ2u8ArzeDFaIX9RF4URPekyr81W5ZwSsELXdM8CO3Qc01f1uK7X qVNTE4JLf/T8q4LbBjSO+4QurkPWX/lArkAuACpfj0nHHkSP7g3Pobaiwj/LboGRPbMF 5FinoedfgydL6I2WsUt1DaVxzbHyhsUwmS9QxtyvPk+wlt65LeE3GbkXEZ2ss6fvvqtB RYTmmtETO7sbHKZOv2gO2iF51JW3FEXsZcn/0+7vD/gZ659p5shswt4GA4RDbFrNu+vB XR4fR1BPgF1R87S6NDGj1abmzKocoyHaIjSsFBKFfb+VxH6fGlRWgI5penUv+/L4POk/ 52Bw== X-Forwarded-Encrypted: i=1; AFNElJ9wIp8E2kEctWINSagj81R62Ecr9JyEokUrGBoeGxH4uoIX6QabHpSiierkfcj4m3KvqqtdOwgE2yU=@lists.xenproject.org X-Gm-Message-State: AOJu0YzlgQvJdelqoQYwrLbQfuLuw8K9vvKA50CNnxs8IkDmw+owaMRh NPYpRq2vFxATb65xExW+5wEkKqR4yY7WCnqyWHdUwnHdcEq0puNCIojR X-Gm-Gg: Acq92OF2K58FQ0LO2tp5Vqk9iTuZK0smmOtU+WirDp1GIBuDlKvCmf7Vp3r9lWmEAKr GJ8UakHoiEArHIlj5QK24bj6wI8NK1xFaaMG2gYnbPUvdHDJC91HMQVzFvXnp8EKOObYhzWhGMi SLqcvbK45W5A7JKWStPpCBu7b8s4ttROVexOJeAocvMZDojWKhSgKaCrPnnAzhNV8IU06mEAV26 4yw3eBHeJzKZq98ZnZZpvlmNpT9gK304qrYUeHf9Rm5Adm0P2zBinwAnVB2+/+zv6ghsy3hPUNa UBZHZ2vBgBplMy33cbvvE4nhRalUY9apVLTlj/STz1nY4bDjT6fnZ/+GW33Q7Z25SWRzv140DAu DVhTyc5hk43R07KYmWu1yqe+VL0J4teyJaCXxYrUXZCsWYPBxULwMFWZbELLa/WqcfzzNee3rxr O79S92yBBpe4HTgTfJFnYeyFgVxkHYB8V20qOeb8kLgHCBxmtlg/HhoDtCPXzKWuZAD0k/c91jr n4= X-Received: by 2002:a05:6000:25ed:b0:449:e8c0:fd58 with SMTP id ffacd0b85a97d-45eb38bae85mr32441210f8f.27.1779806644939; Tue, 26 May 2026 07:44:04 -0700 (PDT) Message-ID: <7b05a728-cb46-41fe-9c29-e37c3a605d70@gmail.com> Date: Tue, 26 May 2026 16:44:03 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] xen/arm: scan CLIDR Ctype fields upwards when probing LLC To: Mykola Kvach , xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Miccio , Carlo Nonato , Marco Solieri , Luca Fancellu References: Content-Language: en-US From: Oleksii Kurochko In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-purgate-ID: tlsNG-ef75cf/1779806646-0976AC48-A1659BB8/10/73395122804 X-purgate-type: spam X-purgate-size: 1490 On 5/25/26 1:47 PM, Mykola Kvach wrote: > From: Mykola Kvach > > get_llc_way_size() currently scans CLIDR_EL1 Ctype fields from the > highest level downwards and stops at the first unified cache it finds. > > However, CLIDR_EL1 describes the cache hierarchy from Ctype1 upwards. > Arm ARM DDI 0487J.a, D19.2.27 says that once software has seen a > Ctype value of 0b000 while reading from Ctype1 upwards, no caches > manageable by the architected set/way maintenance instructions exist at > further-out levels, and the higher Ctype fields must be ignored. > > The current reverse scan can therefore select a unified cache level from > a Ctype field above the first no-cache level. Such a field is not part of > the architecturally described CLIDR/CCSIDR cache hierarchy and should not > be used for selecting the CCSIDR level. > > Scan Ctype fields from L1 upwards, stop at the first no-cache level, and > keep the outermost unified cache observed before that point. > > This preserves the result for regular cache hierarchies, while avoiding > selection of an architecturally ignored Ctype field. > > Fixes: f4985fce6f0b ("xen/arm: add initial support for LLC coloring on arm64") > Signed-off-by: Mykola Kvach > Reviewed-by: Luca Fancellu > Reviewed-by: Michal Orzel Release-Acked-by: Oleksii Kurochko Thanks. ~ Oleksii From xen-devel-bounces@lists.xenproject.org Tue May 26 14:53:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 14:53:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319970.1587388 (Exim 4.92) (envelope-from ) id 1wRt9K-0002yN-AS; Tue, 26 May 2026 14:52:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319970.1587388; Tue, 26 May 2026 14:52:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9K-0002xf-4n; Tue, 26 May 2026 14:52:54 +0000 Received: by outflank-mailman (input) for mailman id 1319970; Tue, 26 May 2026 14:52:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9H-0002vI-FV for xen-devel@lists.xenproject.org; Tue, 26 May 2026 14:52:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRt9G-00DAaE-Re for xen-devel@lists.xenproject.org; Tue, 26 May 2026 16:52:50 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15b3c2-5cb7-0a2a0a5109dd-0a2a45019a54-2 for ; Tue, 26 May 2026 16:52:50 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15b3c1-c1f2-0a2a45010019-d561b338bdaa-3 for ; Tue, 26 May 2026 16:52:49 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wRt9B-008TwX-13; Tue, 26 May 2026 16:52:45 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:Content-Transfer-Encoding:Content-Type:MIME-Version:Message-Id:Date:Subject:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:Content-Transfer-Encoding:Content-Type:MIME-Version: Message-Id:Date:Subject:From:Sender:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: In-Reply-To:References:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=P6RGwck8/3Y05dP5OM73rpk7zpUroYjgKvNoAVl3EUs=; b=ZNR3rILV8ejyUA9CQXAmFbBA61 jffSfUpOD4RQWnzRdyM76uImj/breYHMPwZm91X2SUCec4bklK4On/LX8or9G311yTCrhPfhXVJJK 4ZIuGSd1FIWxNZBDbRojv+PMLcMnAnklgbMbbB6IpfroRxwZiv5ygXf2Z4MYh6G8wxfltDOjbaCfh 4Hwh+Br0hkJv0CkOfQY2kTPAVkVfHq/yB2048Dpgj8/ywTdCbaqh0rHGMbHvtJxp/Op23vY+RaVgL MekGvRAe+7MFevUBv1BY2L1NLiID+panTdwi/K+xrFUC6QkQplafqD8iTbX3XLpJRmGILGco6Lscq uYgn4Ofg==; From: Mauricio Faria de Oliveira Subject: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) Date: Tue, 26 May 2026 11:52:32 -0300 Message-Id: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIALCzFWoC/33NQQ6CMBCF4auQrq2BobTiynsYF6VMYSIWQk2jI dzdwkaNxOX/kvlmYh5HQs+OycRGDOSpdzHELmGm1a5BTnVsBinIVADwIbT8qr12nFxHDrlEq41 SNqtAsXg2jGjpsZLnS+yW/L0fn+uHkC3rHyxkPOUKZVaKXAhTwoka3ZHem/7GFi3Ap6A2BIgCm EJVh9pYK/WPkL+FAtINIY9ChTUqWRqJRn0J8zy/AAUmnMo1AQAA X-Change-ID: 20260422-pvh-kasan-inline-6efac77f1b27 To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira , kernel test robot X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-d62444/1779807170-B5545FF4-9D860D6A/0/0 X-purgate-type: clean X-purgate-size: 6481 The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. Booting directly from vmlinux (instead of bzImage) now fails with gcc-14/15 (but works with gcc-12/13) if CONFIG_KASAN_GENERIC is set, on Ubuntu 25.10. The PVH code is required/supposed not to use the KASAN memory access check in the kernel entry point as KASAN has not yet been setup, or an exception is hit and the boot fails. This was previously described and addressed with __builtin_mem{cmp,set}(): - commit 661362e3dcab ("xen, pvh: fix unbootable VMs (PVH + KASAN - AMD_MEM_ENCRYPT)") - commit 416a33c9afce ("x86/cpu: fix unbootable VMs by inlining memcmp() in hypervisor_cpuid_base()") - commit fbe5a6dfe492 ("xen, pvh: fix unbootable VMs by inlining memset() in xen_prepare_pvh()") However, even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. So, that does not really fix the issue unconditionally; see details below. In order to address this, it's required to switch to inline implementations that do not depend on the compiler. There's such a memset() in and memcmp() in 'boot/string.c'. Use them instead of builtins in PVH entry. Testing: - Booting from vmlinux (fixed) and bzImage (still works) using allnoconfig + CONFIG_PVH + CONFIG_KASAN with gcc-12/13/14/15. - Building with CONFIG_KEXEC_FILE, CONFIG_CFI and !CONFIG_KASAN with LLVM 20 (check for a build error related to , not caught previously). Details/Debugging: - Only CONFIG_PVH (works): make allnoconfig ./scripts/config \ -e 64BIT -e HYPERVISOR_GUEST -e PVH \ -e SERIAL_8250 -e SERIAL_8250_CONSOLE make olddefconfig make -j$(nproc) vmlinux qemu-system-x86_64 \ -accel kvm -nodefaults -nographic -serial stdio \ -kernel vmlinux -append 'console=ttyS0' ... SeaBIOS (version ...) Booting from ROM... Linux version ... ... - With CONFIG_KASAN (fails) ./scripts/config -e KASAN make olddefconfig make -j$(nproc) vmlinux qemu-system-x86_64 \ -accel kvm -nodefaults -nographic -serial stdio \ -kernel vmlinux -append 'console=ttyS0' ... SeaBIOS (version ...) Booting from ROM... - Debugging: Enable debug info and rebuild. QEMU: enable and wait for GDB, stop rebooting, remain running. qemu-system-x86_64 \ -s -S -no-reboot -no-shutdown \ gdb vmlinux (gdb) target remote localhost:1234 ... (gdb) c ... Thread 2 received signal SIGQUIT, Quit. ... (gdb) info threads Id Target Id Frame 1 Thread 1.1 (CPU#0 [running]) bytes_is_nonzero ( start=0xfffffbfff031eebe , size=1) at .../linux/mm/kasan/generic.c:98 * 2 Thread 1.2 (CPU#1 [halted ]) 0x00000000000fd0a9 in ?? () ... (gdb) thr 1 ... (gdb) bt #0 bytes_is_nonzero (start=0xfffffbfff031eebe , size=1) at .../linux/mm/kasan/generic.c:98 #1 memory_is_nonzero (start=0xfffffbfff031eebe, end=0xfffffbfff031eebf) at .../linux/mm/kasan/generic.c:115 #2 memory_is_poisoned_n (addr=0xffffffff818f75f0, size=8) at .../linux/mm/kasan/generic.c:140 #3 memory_is_poisoned (addr=0xffffffff818f75f0, size=8) at .../linux/mm/kasan/generic.c:172 #4 check_region_inline (addr=0xffffffff818f75f0, size=8, write=false, ret_ip=18446744071585002062) at .../linux/mm/kasan/generic.c:191 #5 kasan_check_range (addr=addr@entry=0xffffffff818f75f0, size=size@entry=8, write=write@entry=false, ret_ip=18446744071585002062) at .../linux/mm/kasan/generic.c:200 #6 0xffffffff813eb283 in __asan_loadN (addr=addr@entry=0xffffffff818f75f0, size=size@entry=8) at .../linux/mm/kasan/generic.c:278 #7 0xffffffff815df24e in memcmp (cs=cs@entry=0xffffffff818f75f0, ct=ct@entry=0x1be2fe4, count=, count@entry=12) at .../linux/lib/string.c:683 #8 0xffffffff81ba2323 in cpuid_base_hypervisor (sig=0xffffffff818f75f0 "XenVMMXenVMM", leaves=2) at .../linux/arch/x86/include/asm/cpuid/api.h:206 #9 xen_cpuid_base () at .../linux/arch/x86/include/asm/xen/hypervisor.h:46 #10 xen_prepare_pvh () at .../linux/arch/x86/platform/pvh/enlighten.c:119 #11 0x0000000001ba2588 in ?? () #12 0x0000000000000000 in ?? () (gdb) Frames #7-#8 show the non-builtin memcmp() (lib/string.c) was called even with __builtin_memcmp() being used in cpuid_base_hypervisor(). Signed-off-by: Mauricio Faria de Oliveira --- Changes in v4: - Patch 1: address Juergen's feedback: - s/In next patch/In a future patch/. - Move footnote (Reasons not to include...) after "---". - Add 'Reviewed-by: Juergen Gross' in patches 1 and 2 as well. - Link to v3: https://lore.kernel.org/r/20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com Changes in v3: - Create and use a separate header for inline string functions to fix a build error reported by kernel test robot (patch 1). - That also removes '#ifndef _SETUP/#endif' in . - Link to v2: https://lore.kernel.org/r/20260427-pvh-kasan-inline-v2-0-2c57b8dcff6a@igalia.com Changes in v2: - Add comment about the return value of __inline_memcmp() in patch 1. (v3: now 2) - Add 'Reviewed-by: Juergen Gross' in patches 2 and 3 (v3: now 3 and 4). - Link to v1: https://lore.kernel.org/r/20260422-pvh-kasan-inline-v1-0-7e6194344c92@igalia.com --- Mauricio Faria de Oliveira (4): x86/asm: move inline string functions to x86/asm, x86/boot: expose inline memcmp x86/cpuid: fix unbootable VMs by really inlining memcmp() in hypervisor_cpuid_base() x86/pvh: fix unbootable VMs by really inlining memset() in xen_prepare_pvh() arch/x86/boot/string.c | 6 ++---- arch/x86/include/asm/cpuid/api.h | 2 +- arch/x86/include/asm/string.h | 21 +------------------- arch/x86/include/asm/string_inline.h | 37 ++++++++++++++++++++++++++++++++++++ arch/x86/platform/pvh/enlighten.c | 3 ++- 5 files changed, 43 insertions(+), 26 deletions(-) --- base-commit: d387b06f7c15b4639244ad66b4b0900c6a02b430 change-id: 20260422-pvh-kasan-inline-6efac77f1b27 Best regards, -- Mauricio Faria de Oliveira From xen-devel-bounces@lists.xenproject.org Tue May 26 14:53:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 14:53:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319969.1587383 (Exim 4.92) (envelope-from ) id 1wRt9K-0002vb-28; Tue, 26 May 2026 14:52:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319969.1587383; Tue, 26 May 2026 14:52:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9J-0002vU-V9; Tue, 26 May 2026 14:52:53 +0000 Received: by outflank-mailman (input) for mailman id 1319969; Tue, 26 May 2026 14:52:52 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9I-0002vJ-4f for xen-devel@lists.xenproject.org; Tue, 26 May 2026 14:52:52 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRt9H-00DAaE-Gr for xen-devel@lists.xenproject.org; Tue, 26 May 2026 16:52:51 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15b3ad-5cb7-0a2a0a5109dd-0a2a4504a6a4-42 for ; Tue, 26 May 2026 16:52:51 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15b3c2-1dec-0a2a45040019-d561b338ae9e-3 for ; Tue, 26 May 2026 16:52:51 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wRt9G-008TwX-4x; Tue, 26 May 2026 16:52:50 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=rZqhwZAX9gu8lRikViZCp0rEPli4a286DTrRRjyvllQ=; b=WuYAJhANIcWzzse+dgQGkYqb5a sTO9DiiY9WqvwBeNnKJgGHjCYn/gJh9auXrf16rHEn4GligS1r5rYO1ULIahN2W4UH5P5cTD3sDfv oju7p8gCs1SvahCyN18CxQTeQrr7ZlVdnmFa/IL+fmp5TELb+oIbxd4hpWxqQKsRTjSa73NSlaMbT 9fR8xMsZZbSiW7o/VDf/UsUmw14ax0q2W2+1nLvR5HD6JI2O893xWpRIXDFCxHLrIcoYuhhL/Vhzb +6d5I7f7kq9l6f5dw2S1xF1++r5c4AVPSbZVwee2+jMdpzr1QyfQursdOS9ftc9JrMvAFX9eZo7tg AXa8kRnQ==; From: Mauricio Faria de Oliveira Date: Tue, 26 May 2026 11:52:33 -0300 Subject: [PATCH v4 1/4] x86/asm: move inline string functions to MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260526-pvh-kasan-inline-v4-1-a310e6a25ecd@igalia.com> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> In-Reply-To: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira , kernel test robot X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-ebf023/1779807171-2BF6D3FF-CF7AE7A2/0/0 X-purgate-type: clean X-purgate-size: 4470 In a future patch, 'boot/string.c' will include inline string functions. Using the header is problematic for a couple of reasons (i.e., build errors), which can be addressed, but introduce unnecessary complexity and regression risk (beyond these _found_ couple of reasons). Using a new header is simpler and transparent to existing users of , with less changes to 'boot/string.c' and its users (eg 'boot/compressed/string.c' and 'purgatory/purgatory.ro'), which minimize regression risk. No functional change intended. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- (*) Reasons not to include in 'boot/string.c': 1) 'boot/string.c' is built for 16-bit/real mode thus some type and word size errors happen when include, e.g., . This can be addressed with '#ifndef _SETUP' (defined by 'boot/Makefile'). 2) 'boot/string.c' is included by 'boot/compressed/string.c' which is the source of 'purgatory/string.o', linked by 'purgatory/purgatory.ro' (CONFIG_KEXEC_FILE). In 64BIT, includes , which references __memset() and __memmove() with KCFI_REFERENCE(), ie, __ADDRESSABLE(); however, 'purgatory/purgatory.ro' is not linked with implementations. So, CONFIG_KEXEC_FILE and CONFIG_CFI without CONFIG_KASAN hit errors: >> ld.lld: error: undefined symbol: __memset >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:\ (__UNIQUE_ID_addressable___memset_0) -- >> ld.lld: error: undefined symbol: __memmove >>> referenced by string.c >>> arch/x86/purgatory/purgatory.ro:\ (__UNIQUE_ID_addressable___memmove_1) (Note: this is not hit with CONFIG_KASAN because 'boot/compressed/string.c' adds aliases __memset()/__memmove() to memset()/memmove() in that case.) This can be addressed with 'CFLAGS_string.o := -D__DISABLE_EXPORTS' so to disable KCFI_REFERENCE() in 'purgatory/Makefile' (it removes CC_FLAGS_CFI anyway). ... However, since a change in this series would need more changes to address errors it causes, it is reasonable to change the series not to cause them, by using a separate header with _just_ inline string functions. --- arch/x86/include/asm/string.h | 21 +-------------------- arch/x86/include/asm/string_inline.h | 26 ++++++++++++++++++++++++++ 2 files changed, 27 insertions(+), 20 deletions(-) diff --git a/arch/x86/include/asm/string.h b/arch/x86/include/asm/string.h index 9cb5aae7fba9ffcf0f5af8f939d30467750ccaa9..8a849bb5d0c7100a2a1820ec0af9fc9f850727fd 100644 --- a/arch/x86/include/asm/string.h +++ b/arch/x86/include/asm/string.h @@ -8,25 +8,6 @@ # include #endif -static __always_inline void *__inline_memcpy(void *to, const void *from, size_t len) -{ - void *ret = to; - - asm volatile("rep movsb" - : "+D" (to), "+S" (from), "+c" (len) - : : "memory"); - return ret; -} - -static __always_inline void *__inline_memset(void *s, int v, size_t n) -{ - void *ret = s; - - asm volatile("rep stosb" - : "+D" (s), "+c" (n) - : "a" ((uint8_t)v) - : "memory"); - return ret; -} +#include #endif /* _ASM_X86_STRING_H */ diff --git a/arch/x86/include/asm/string_inline.h b/arch/x86/include/asm/string_inline.h new file mode 100644 index 0000000000000000000000000000000000000000..ffcfa6583d2bc7b91d078888518d0e80248af940 --- /dev/null +++ b/arch/x86/include/asm/string_inline.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _ASM_X86_STRING_INLINE_H +#define _ASM_X86_STRING_INLINE_H + +static __always_inline void *__inline_memcpy(void *to, const void *from, size_t len) +{ + void *ret = to; + + asm volatile("rep movsb" + : "+D" (to), "+S" (from), "+c" (len) + : : "memory"); + return ret; +} + +static __always_inline void *__inline_memset(void *s, int v, size_t n) +{ + void *ret = s; + + asm volatile("rep stosb" + : "+D" (s), "+c" (n) + : "a" ((uint8_t)v) + : "memory"); + return ret; +} + +#endif /* _ASM_X86_STRING_INLINE_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 14:53:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 14:53:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319971.1587402 (Exim 4.92) (envelope-from ) id 1wRt9P-0003Mh-FW; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=UTOmAuiPQ1w9q3gPb2qsdx9jiBuxtzvoq44hIQ1/dkQ=; b=RJTHWlKG1FeZ9gjM4LsjQuc4z9 +EQtwpdyMJpAtgaD4rOIVqx8Z99YlVI9XB6jBHb6uJYJoPyHJixkVQMqzdi7qdxja69KdeeFeGMhz 3yxL2rVgY6JiUVCUZyeK+kgW5Df5TQ1MvN8IcIOJJ4RLddvuoncNls7UDgyWAfAyBSJ9riQS3MjgK y4/bYCWT6uTLVwUq+vX0ms9ijYzHwBU6gudxf6Zwt4E0sGM/pwigpWIuDzfkvy6TpvLfQD6O+eGsE C7csYOpMgdpyVA2bjrhy1dclhRahumZC3ivC8LdLf9uYdd8dnf2DGxYTnK1Sc5gn/crvTQStqiMu/ 7qXv9MQw==; From: Mauricio Faria de Oliveira Date: Tue, 26 May 2026 11:52:34 -0300 Subject: [PATCH v4 2/4] x86/asm, x86/boot: expose inline memcmp MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260526-pvh-kasan-inline-v4-2-a310e6a25ecd@igalia.com> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> In-Reply-To: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-720697/1779807176-8117D161-4AE29E21/0/0 X-purgate-type: clean X-purgate-size: 2102 Move the inline memcmp function currently only available in 'boot/string.c' and its users (eg, 'boot/compressed/string.c' and 'purgatory/purgatory.ro') into the inline string functions header to be reused. Note that the inline memcmp() returns 0/1, not -1/0/1 as regular memcmp() (reported by David Laight ), which is not caused or changed by this commit; this will be addressed separately. Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- arch/x86/boot/string.c | 6 ++---- arch/x86/include/asm/string_inline.h | 11 +++++++++++ 2 files changed, 13 insertions(+), 4 deletions(-) diff --git a/arch/x86/boot/string.c b/arch/x86/boot/string.c index ac0f900ebc47efa81c92e1bb2010ea41677899c4..544681d046c3f87101309ffaca0c90512a244856 100644 --- a/arch/x86/boot/string.c +++ b/arch/x86/boot/string.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "ctype.h" #include "string.h" @@ -31,10 +32,7 @@ int memcmp(const void *s1, const void *s2, size_t len) { - bool diff; - asm("repe cmpsb" - : "=@ccnz" (diff), "+D" (s1), "+S" (s2), "+c" (len)); - return diff; + return __inline_memcmp(s1, s2, len); } /* diff --git a/arch/x86/include/asm/string_inline.h b/arch/x86/include/asm/string_inline.h index ffcfa6583d2bc7b91d078888518d0e80248af940..91ed89bfdfa9b148002441e94f48039b17f70391 100644 --- a/arch/x86/include/asm/string_inline.h +++ b/arch/x86/include/asm/string_inline.h @@ -23,4 +23,15 @@ static __always_inline void *__inline_memset(void *s, int v, size_t n) return ret; } +/* Note: this memcmp() returns 0/1, not -1/0/1 as regular memcmp(). */ +static __always_inline int __inline_memcmp(const void *s1, const void *s2, size_t len) +{ + bool diff; + + asm("repe cmpsb" + : "=@ccnz" (diff), "+D" (s1), "+S" (s2), "+c" (len)); + + return diff; +} + #endif /* _ASM_X86_STRING_INLINE_H */ -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 14:53:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 14:53:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319972.1587410 (Exim 4.92) (envelope-from ) id 1wRt9S-0003cN-Qw; Tue, 26 May 2026 14:53:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319972.1587410; Tue, 26 May 2026 14:53:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9S-0003cG-NY; Tue, 26 May 2026 14:53:02 +0000 Received: by outflank-mailman (input) for mailman id 1319972; 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From: Mauricio Faria de Oliveira Date: Tue, 26 May 2026 11:52:35 -0300 Subject: [PATCH v4 3/4] x86/cpuid: fix unbootable VMs by really inlining memcmp() in hypervisor_cpuid_base() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260526-pvh-kasan-inline-v4-3-a310e6a25ecd@igalia.com> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> In-Reply-To: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-d62444/1779807180-AD9A9FF4-E1028600/0/0 X-purgate-type: clean X-purgate-size: 1458 Even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. The existing code is broken with gcc-14/15 but not gcc-12/13 (Ubuntu 25.10) and vmlinux no longer boots with CONFIG_PVH if CONFIG_KASAN_GENERIC is set. For testing purposes, if the size argument is reduced from 12 to 8 then the compiler decides to use the inline implementation; that shows results vary. Switch the builtin to the inline implementation to address it. Fixes: 416a33c9afce ("x86/cpu: fix unbootable VMs by inlining memcmp() in hypervisor_cpuid_base()") Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- arch/x86/include/asm/cpuid/api.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/include/asm/cpuid/api.h b/arch/x86/include/asm/cpuid/api.h index 82eddfa2347b32b76c2ea9b85f005ca5416ac71f..2d9f3d4d63de6e721f275d9e80d372edbdfedf30 100644 --- a/arch/x86/include/asm/cpuid/api.h +++ b/arch/x86/include/asm/cpuid/api.h @@ -204,7 +204,7 @@ static inline u32 cpuid_base_hypervisor(const char *sig, u32 leaves) * from PVH early boot code before instrumentation is set up * and memcmp() itself may be instrumented. */ - if (!__builtin_memcmp(sig, signature, 12) && + if (!__inline_memcmp(sig, signature, 12) && (leaves == 0 || ((eax - base) >= leaves))) return base; } -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 14:53:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 14:53:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1319973.1587419 (Exim 4.92) (envelope-from ) id 1wRt9X-0003v8-2o; Tue, 26 May 2026 14:53:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1319973.1587419; Tue, 26 May 2026 14:53:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9W-0003uo-VX; Tue, 26 May 2026 14:53:06 +0000 Received: by outflank-mailman (input) for mailman id 1319973; Tue, 26 May 2026 14:53:06 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRt9W-0003tv-AM for xen-devel@lists.xenproject.org; Tue, 26 May 2026 14:53:06 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRt9V-00DAdi-Mk for xen-devel@lists.xenproject.org; Tue, 26 May 2026 16:53:05 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15b3ce-e002-0a2a0a5209dd-0a2a450acc28-8 for ; Tue, 26 May 2026 16:53:05 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15b3d1-56b3-0a2a450a0019-d561b338b71c-3 for ; Tue, 26 May 2026 16:53:05 +0200 Received: from 186-249-145-161.shared.desktop.com.br ([186.249.145.161] helo=[192.168.1.68]) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_X25519__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wRt9U-008TwX-CT; Tue, 26 May 2026 16:53:04 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Cc:To:In-Reply-To:References:Message-Id: Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date:From:Sender: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=L3Sr9rY5U1mD/3546TE+xOT1mBFRY3YzwAzYlEgEGo8=; b=TFfbZM3IVCe7bLF1pen0oFglI9 HTAI6yIrD2Gg0QVnwokdz1pXUAVJtb7hIrrmnNha9t7eOmhF5Ysx/U6xGn0VQx6vto16KLFrrj9SR d5crj92d0FUNleg2g1o0LH1IX+CJijWoyevMnfvLCoSA9nzPEsZrcB5SCzfLSlV6n4NoaqUspGG3L 4/gkvo2aUFoc+9l+uQzU3zlSMwJ7fU5WZVquW3asjZDLvF8QPHU2mQHxoXxZ5ubwBoRs2oNWt1MPr NGCsMBJIgJJ3u0gnC5BXfxGe61gr22kRvKe05py6xTl15MS0QkJn20DqpQuXX1RuDN2AUje79vYCK L8Uc4siw==; From: Mauricio Faria de Oliveira Date: Tue, 26 May 2026 11:52:36 -0300 Subject: [PATCH v4 4/4] x86/pvh: fix unbootable VMs by really inlining memset() in xen_prepare_pvh() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260526-pvh-kasan-inline-v4-4-a310e6a25ecd@igalia.com> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> In-Reply-To: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Mauricio Faria de Oliveira X-Mailer: b4 0.14.2 X-purgate-ID: tlsNG-4011c0/1779807185-7EF8B8B7-5731982A/0/0 X-purgate-type: clean X-purgate-size: 1474 Even with __builtin the compiler may decide to use the out of line function instead of the inline implementation. This particular one (still) generated the inline implementation as expected (at least in these compiler versions), but this is not guaranteed to remain the case, as seen with the previous commit. Switch the builtin to the inline implementation to prevent a similar issue. Fixes: fbe5a6dfe492 ("xen, pvh: fix unbootable VMs by inlining memset() in xen_prepare_pvh()") Signed-off-by: Mauricio Faria de Oliveira Reviewed-by: Juergen Gross --- arch/x86/platform/pvh/enlighten.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/platform/pvh/enlighten.c b/arch/x86/platform/pvh/enlighten.c index f2053cbe9b0ce3d2178938269607c652ae8f528e..cb442cbd9d828619421babb281bfe9759edbca8a 100644 --- a/arch/x86/platform/pvh/enlighten.c +++ b/arch/x86/platform/pvh/enlighten.c @@ -8,6 +8,7 @@ #include #include #include +#include #include @@ -129,7 +130,7 @@ void __init xen_prepare_pvh(void) * This must not compile to "call memset" because memset() may be * instrumented. */ - __builtin_memset(&pvh_bootparams, 0, sizeof(pvh_bootparams)); + __inline_memset(&pvh_bootparams, 0, sizeof(pvh_bootparams)); hypervisor_specific_init(xen_guest); -- 2.51.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:08:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:08:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320019.1587427 (Exim 4.92) (envelope-from ) id 1wRtO1-0006ur-9J; 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dkim=pass header.d=suse.com header.s=susede1 header.b=mAHAXM8U DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779808081; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=yHeVRInwBdhPTyeUIDm80iXzexAaKjc6iJ7mRCvzf0o=; b=mAHAXM8Ueb0PCWr1RCbutCZZ08Xj5nRqwQhdLaSrM6zsJ2Mb3Iv4zOofJwXY71hi2F2Gs4 sWCh8bDq4rd/fYAHkzUW1mO64zXFnilEpth71ndsfqpvE26qeA3jbJtDXb427q4/XcHR9a +Vmtr4/LRyq8Ntr92MIUzmQgIv46/gc= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-trace-kernel@vger.kernel.org, linux-mm@kvack.org, virtualization@lists.linux.dev Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , xen-devel@lists.xenproject.org, Andrew Morton , David Hildenbrand , Lorenzo Stoakes , "Liam R. Howlett" , Vlastimil Babka , Mike Rapoport , Suren Baghdasaryan , Michal Hocko , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list Subject: [PATCH 0/5] x86/xen: Get rid of Xen private lazy MMU mode tracking Date: Tue, 26 May 2026 17:05:09 +0200 Message-ID: <20260526150514.129330-1-jgross@suse.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Action: no action X-Rspamd-Queue-Id: C673F75EE0 X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo,suse.com:mid,suse.com:dkim]; MIME_TRACE(0.00)[0:+]; RCPT_COUNT_TWELVE(0.00)[27]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; DWL_DNSWL_BLOCKED(0.00)[suse.com:dkim]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo] X-purgate-ID: tlsNG-ef75cf/1779808082-0A772C48-5DE2F2AC/0/0 X-purgate-type: clean X-purgate-size: 1246 With generic lazy MMU mode tracking being available, there is no real need for having Xen PV specific code to track lazy MMU mode, too. This makes it possible to drop two paravirt hooks. Note that this series is based on my series "x86/xen: Do some Xen-PV related cleanups" [1]. [1]: https://lore.kernel.org/lkml/20260522152114.77319-1-jgross@suse.com/ Juergen Gross (5): x86/xen: Drop lazy mode from trace entries x86/xen: Change interface of xen_mc_issue() mm: Refactor lazy_mmu_mode_pause() and lazy_mmu_mode_resume() x86/xen: Get rid of last XEN_LAZY_MMU uses x86/xen: Replace generic lazy tracking with cpu specific one arch/x86/include/asm/paravirt.h | 9 ++-- arch/x86/include/asm/paravirt_types.h | 11 +---- arch/x86/include/asm/xen/hypervisor.h | 25 +--------- arch/x86/kernel/paravirt.c | 6 +-- arch/x86/xen/enlighten_pv.c | 30 +++++------- arch/x86/xen/mmu_pv.c | 66 +++++++++------------------ arch/x86/xen/xen-ops.h | 12 +++-- include/linux/pgtable.h | 56 ++++++++++++++++++----- include/trace/events/xen.h | 33 ++++++++------ 9 files changed, 112 insertions(+), 136 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:08:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:08:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320020.1587437 (Exim 4.92) (envelope-from ) id 1wRtO5-000783-FD; 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none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779808087; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zqSqltL1GnVn7PKoSl94YXnAsN5DYo+RIglrQTaw6ZE=; b=IhRRJLg1s5P5gbD17rJX9mZp818QbdvrFXhyx343oE+IaY0Kh+yGSPyqhhevxSLMM9kMpW xtcnReEWjm/8c1ay8xDj7uC+n3hhkvcCe5rSHQ151k0Qtc23cNKrxsvH+aYeIB3X9PRiY5 6dAf2+JidkGM8r4dXSxeKh8mWnX64GU= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, linux-trace-kernel@vger.kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Steven Rostedt , Masami Hiramatsu , Mathieu Desnoyers , xen-devel@lists.xenproject.org Subject: [PATCH 1/5] x86/xen: Drop lazy mode from trace entries Date: Tue, 26 May 2026 17:05:10 +0200 Message-ID: <20260526150514.129330-2-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260526150514.129330-1-jgross@suse.com> References: <20260526150514.129330-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spam-Score: -2.79 X-Spam-Flag: NO X-Spamd-Result: default: False [-2.79 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.19)[-0.967]; MIME_GOOD(-0.10)[text/plain]; RCVD_VIA_SMTP_AUTH(0.00)[]; MIME_TRACE(0.00)[0:+]; FUZZY_RATELIMITED(0.00)[rspamd.com]; TO_DN_SOME(0.00)[]; ARC_NA(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[] X-purgate-ID: tlsNG-c201ff/1779808087-D877A443-962DE9F9/0/0 X-purgate-type: clean X-purgate-size: 2996 Drop the lazy mode (cpu or mmu) from the xen_mc_batch and xen_mc_issue trace entries. This is done in preparation of removing the xen_lazy_mode percpu variable. Signed-off-by: Juergen Gross --- arch/x86/xen/xen-ops.h | 11 +++++++---- include/trace/events/xen.h | 33 +++++++++++++++++++-------------- 2 files changed, 26 insertions(+), 18 deletions(-) diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index 6808010ac379..dc892f421f25 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h @@ -98,7 +98,7 @@ static inline void xen_mc_batch(void) /* need to disable interrupts until this entry is complete */ local_irq_save(flags); - trace_xen_mc_batch(xen_get_lazy_mode()); + trace_xen_mc_batch(flags); __this_cpu_write(xen_mc_irq_flags, flags); } @@ -114,13 +114,16 @@ void xen_mc_flush(void); /* Issue a multicall if we're not in a lazy mode */ static inline void xen_mc_issue(unsigned mode) { - trace_xen_mc_issue(mode); + bool flush = !(xen_get_lazy_mode() & mode); + unsigned long flags = this_cpu_read(xen_mc_irq_flags); - if ((xen_get_lazy_mode() & mode) == 0) + trace_xen_mc_issue(flush, flags); + + if (flush) xen_mc_flush(); /* restore flags saved in xen_mc_batch */ - local_irq_restore(this_cpu_read(xen_mc_irq_flags)); + local_irq_restore(flags); } /* Set up a callback to be called when the current batch is flushed */ diff --git a/include/trace/events/xen.h b/include/trace/events/xen.h index e3f139f0bc78..ad384969e2cb 100644 --- a/include/trace/events/xen.h +++ b/include/trace/events/xen.h @@ -12,24 +12,29 @@ struct multicall_entry; /* Multicalls */ -DECLARE_EVENT_CLASS(xen_mc__batch, - TP_PROTO(enum xen_lazy_mode mode), - TP_ARGS(mode), +TRACE_EVENT(xen_mc_batch, + TP_PROTO(unsigned long flags), + TP_ARGS(flags), TP_STRUCT__entry( - __field(enum xen_lazy_mode, mode) + __field(unsigned long, flags) ), - TP_fast_assign(__entry->mode = mode), - TP_printk("start batch LAZY_%s", - (__entry->mode == XEN_LAZY_MMU) ? "MMU" : - (__entry->mode == XEN_LAZY_CPU) ? "CPU" : "NONE") + TP_fast_assign(__entry->flags = flags), + TP_printk("start batch lazy flags %lx", __entry->flags) ); -#define DEFINE_XEN_MC_BATCH(name) \ - DEFINE_EVENT(xen_mc__batch, name, \ - TP_PROTO(enum xen_lazy_mode mode), \ - TP_ARGS(mode)) -DEFINE_XEN_MC_BATCH(xen_mc_batch); -DEFINE_XEN_MC_BATCH(xen_mc_issue); +TRACE_EVENT(xen_mc_issue, + TP_PROTO(bool flush, unsigned long flags), + TP_ARGS(flush, flags), + TP_STRUCT__entry( + __field(unsigned long, flags) + __field(bool, flush) + ), + TP_fast_assign(__entry->flush = flush; + __entry->flags = flags; + ), + TP_printk("flush: %s, flags %lx", + __entry->flush ? "yes" : "no", __entry->flags) + ); TRACE_DEFINE_SIZEOF(ulong); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:08:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:08:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320022.1587446 (Exim 4.92) (envelope-from ) id 1wRtOB-0007PL-MK; Tue, 26 May 2026 15:08:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320022.1587446; Tue, 26 May 2026 15:08:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtOB-0007PE-J4; Tue, 26 May 2026 15:08:15 +0000 Received: by outflank-mailman (input) for mailman id 1320022; Tue, 26 May 2026 15:08:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtO9-0007Ne-Qk for xen-devel@lists.xenproject.org; Tue, 26 May 2026 15:08:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRtO9-00BHE7-6i for xen-devel@lists.xenproject.org; Tue, 26 May 2026 17:08:13 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15b750-2eae-0a2a0a5409dd-0a2a4505aa02-22 for ; Tue, 26 May 2026 17:08:13 +0200 Received: from [195.135.223.131] (helo=smtp-out2.suse.de) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15b75c-aaa8-0a2a45050019-c387df839eee-3 for ; Tue, 26 May 2026 17:08:13 +0200 Received: from imap1.dmz-prg2.suse.org (unknown [10.150.64.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by smtp-out2.suse.de (Postfix) with ESMTPS id B5B4075EA1; Tue, 26 May 2026 15:08:12 +0000 (UTC) Received: from imap1.dmz-prg2.suse.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by imap1.dmz-prg2.suse.org (Postfix) with ESMTPS id 7AECC5A280; Tue, 26 May 2026 15:08:12 +0000 (UTC) Received: from dovecot-director2.suse.de ([2a07:de40:b281:106:10:150:64:167]) by imap1.dmz-prg2.suse.org with ESMTPSA id xZX0HFy3FWqaVQAAD6G6ig (envelope-from ); Tue, 26 May 2026 15:08:12 +0000 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding:In-Reply-To:References"; dkim=pass header.s=susede1 header.d=suse.com header.i="@suse.com" header.h="From:Date:Message-ID:To:Cc:MIME-Version:Content-Transfer-Encoding:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779808092; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=htKnackiGTLT6ra2yiyVCBoM5uojYzGpE60av2lvlE4=; b=PFA/dfob5jaYx8ziU/VgRy6SDe4zshqEhaFAiCgmyGJnLa9BG79cjVXHb65SY6s2PpEOb6 ZelH9pCmaDauo7y1BTg/Wh4jQRtBNhSDp8kzKI+gHROm+cpqhCaDqubzp97my98RgEFJfP QRRvI7r+TZvT/QvfBIZsUjLJE/Ufimk= Authentication-Results: smtp-out2.suse.de; none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1779808092; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=htKnackiGTLT6ra2yiyVCBoM5uojYzGpE60av2lvlE4=; b=PFA/dfob5jaYx8ziU/VgRy6SDe4zshqEhaFAiCgmyGJnLa9BG79cjVXHb65SY6s2PpEOb6 ZelH9pCmaDauo7y1BTg/Wh4jQRtBNhSDp8kzKI+gHROm+cpqhCaDqubzp97my98RgEFJfP QRRvI7r+TZvT/QvfBIZsUjLJE/Ufimk= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org Cc: Juergen Gross , Boris Ostrovsky , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH 2/5] x86/xen: Change interface of xen_mc_issue() Date: Tue, 26 May 2026 17:05:11 +0200 Message-ID: <20260526150514.129330-3-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260526150514.129330-1-jgross@suse.com> References: <20260526150514.129330-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Level: X-Spam-Score: -2.79 X-Spam-Flag: NO X-Spamd-Result: default: False [-2.79 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.19)[-0.968]; MIME_GOOD(-0.10)[text/plain]; FUZZY_RATELIMITED(0.00)[rspamd.com]; RCPT_COUNT_SEVEN(0.00)[10]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; RCVD_VIA_SMTP_AUTH(0.00)[]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; URIBL_BLOCKED(0.00)[suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:helo]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo]; RCVD_TLS_ALL(0.00)[] X-purgate-ID: tlsNG-c201ff/1779808093-DAF6E443-1EE9DBBB/0/0 X-purgate-type: clean X-purgate-size: 7686 Today xen_mc_issue() is deciding whether to call xen_mc_flush() or not based on the lazy mode input parameter passed. Modify this interface to pass a boolean indicating whether the flush should be done. For querying lazy mmu mode use the is_lazy_mmu_mode_active() helper. This is done in preparation for dropping the xen_lazy_mode percpu variable. Signed-off-by: Juergen Gross --- arch/x86/xen/enlighten_pv.c | 8 ++++---- arch/x86/xen/mmu_pv.c | 38 ++++++++++++++++++------------------- arch/x86/xen/xen-ops.h | 3 +-- 3 files changed, 24 insertions(+), 25 deletions(-) diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index ed2d7a3756ce..428189f5d437 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -544,7 +544,7 @@ static void xen_set_ldt(const void *addr, unsigned entries) MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); - xen_mc_issue(XEN_LAZY_CPU); + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); } static void xen_load_gdt(const struct desc_ptr *dtr) @@ -649,7 +649,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu) load_TLS_descriptor(t, cpu, 1); load_TLS_descriptor(t, cpu, 2); - xen_mc_issue(XEN_LAZY_CPU); + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); } static void xen_load_gs_index(unsigned int idx) @@ -1011,7 +1011,7 @@ static void xen_load_sp0(unsigned long sp0) mcs = xen_mc_entry(0); MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); - xen_mc_issue(XEN_LAZY_CPU); + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); } @@ -1071,7 +1071,7 @@ static void xen_write_cr0(unsigned long cr0) MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); - xen_mc_issue(XEN_LAZY_CPU); + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); } static void xen_write_cr4(unsigned long cr4) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index cd80406be9c6..51dbdc67c73c 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -290,7 +290,7 @@ static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val) u.val = pmd_val_ma(val); xen_extend_mmu_update(&u); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } @@ -333,7 +333,7 @@ static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) u.val = pte_val_ma(pteval); xen_extend_mmu_update(&u); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); return true; } @@ -380,7 +380,7 @@ static void xen_ptep_modify_prot_commit(struct vm_area_struct *vma, u.val = pte_val_ma(pte); xen_extend_mmu_update(&u); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); } /* Assume pteval_t is equivalent to all the other *val_t types. */ @@ -474,7 +474,7 @@ static void xen_set_pud_hyper(pud_t *ptr, pud_t val) u.val = pud_val_ma(val); xen_extend_mmu_update(&u); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } @@ -557,7 +557,7 @@ static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val) __xen_set_p4d_hyper(ptr, val); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } @@ -589,7 +589,7 @@ static void xen_set_p4d(p4d_t *ptr, p4d_t val) if (user_ptr) __xen_set_p4d_hyper((p4d_t *)user_ptr, val); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); } __visible p4dval_t xen_p4d_val(p4d_t p4d) @@ -816,7 +816,7 @@ static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd) PFN_DOWN(__pa(user_pgd))); } - xen_mc_issue(0); + xen_mc_issue(true); } static void xen_pgd_pin(struct mm_struct *mm) @@ -933,7 +933,7 @@ static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd) __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT); - xen_mc_issue(0); + xen_mc_issue(true); } static void xen_pgd_unpin(struct mm_struct *mm) @@ -1309,7 +1309,7 @@ static noinline void xen_flush_tlb(void) op->cmd = MMUEXT_TLB_FLUSH_LOCAL; MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } @@ -1329,7 +1329,7 @@ static void xen_flush_tlb_one_user(unsigned long addr) op->arg1.linear_addr = addr & PAGE_MASK; MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } @@ -1366,7 +1366,7 @@ static void xen_flush_tlb_multi(const struct cpumask *cpus, MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); } static unsigned long xen_read_cr3(void) @@ -1425,7 +1425,7 @@ static void xen_write_cr3(unsigned long cr3) else __xen_write_cr3(false, 0); - xen_mc_issue(XEN_LAZY_CPU); /* interrupts restored */ + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); /* interrupts restored */ } /* @@ -1460,7 +1460,7 @@ static void __init xen_write_cr3_init(unsigned long cr3) __xen_write_cr3(true, cr3); - xen_mc_issue(XEN_LAZY_CPU); /* interrupts restored */ + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); /* interrupts restored */ } static int xen_pgd_alloc(struct mm_struct *mm) @@ -1622,7 +1622,7 @@ static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn, !pinned) __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); } } @@ -1652,7 +1652,7 @@ static inline void xen_release_ptpage(unsigned long pfn, unsigned level) __set_pfn_prot(pfn, PAGE_KERNEL); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); ClearPagePinned(page); } @@ -1875,7 +1875,7 @@ void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) */ xen_mc_batch(); __xen_write_cr3(true, __pa(init_top_pgt)); - xen_mc_issue(XEN_LAZY_CPU); + xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); /* We can't that easily rip out L3 and L2, as the Xen pagetables are * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for @@ -2266,7 +2266,7 @@ static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order, if (out_frames) out_frames[i] = virt_to_pfn((void *)vaddr); } - xen_mc_issue(0); + xen_mc_issue(true); } /* @@ -2309,7 +2309,7 @@ static void xen_remap_exchanged_ptes(unsigned long vaddr, int order, set_phys_to_machine(virt_to_pfn((void *)vaddr), mfn); } - xen_mc_issue(0); + xen_mc_issue(true); } /* @@ -2450,7 +2450,7 @@ static noinline void xen_flush_tlb_all(void) op->cmd = MMUEXT_TLB_FLUSH_ALL; MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); - xen_mc_issue(XEN_LAZY_MMU); + xen_mc_issue(!is_lazy_mmu_mode_active()); preempt_enable(); } diff --git a/arch/x86/xen/xen-ops.h b/arch/x86/xen/xen-ops.h index dc892f421f25..dc265bdda24d 100644 --- a/arch/x86/xen/xen-ops.h +++ b/arch/x86/xen/xen-ops.h @@ -112,9 +112,8 @@ static inline struct multicall_space xen_mc_entry(size_t args) void xen_mc_flush(void); /* Issue a multicall if we're not in a lazy mode */ -static inline void xen_mc_issue(unsigned mode) +static inline void xen_mc_issue(bool flush) { - bool flush = !(xen_get_lazy_mode() & mode); unsigned long flags = this_cpu_read(xen_mc_irq_flags); trace_xen_mc_issue(flush, flags); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:08:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:08:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320025.1587455 (Exim 4.92) (envelope-from ) id 1wRtOM-0007nW-4G; Tue, 26 May 2026 15:08:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320025.1587455; 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bh=yR9KBKqLhdL4TaLLpf7zLaGBy80B1vMaPGZJkdtW870=; b=mOta7BZDekc5rViscFO2is8xDKTfVybUW8145uGk9BhyHejpNnUJ1v2hZewdHD4PiQrWGr HzQcYLHvZvJ6pSmW1zJLMLBcGjD5OhoSdrQYQBmVClmtpoXhJpvAfYw8K3jmdGGk4D6ilC WYdt36liqhak0Xz/9Oqc4Sj0N71bPQQ= From: Juergen Gross To: linux-kernel@vger.kernel.org, x86@kernel.org, virtualization@lists.linux.dev Cc: Juergen Gross , Ajay Kaher , Alexey Makhalov , Broadcom internal kernel review list , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , "H. Peter Anvin" , Boris Ostrovsky , xen-devel@lists.xenproject.org Subject: [PATCH 4/5] x86/xen: Get rid of last XEN_LAZY_MMU uses Date: Tue, 26 May 2026 17:05:13 +0200 Message-ID: <20260526150514.129330-5-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260526150514.129330-1-jgross@suse.com> References: <20260526150514.129330-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Flag: NO X-Spam-Score: -2.79 X-Spam-Level: X-Spamd-Result: default: False [-2.79 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; NEURAL_HAM_SHORT(-0.19)[-0.967]; MIME_GOOD(-0.10)[text/plain]; TO_MATCH_ENVRCPT_ALL(0.00)[]; FROM_HAS_DN(0.00)[]; ARC_NA(0.00)[]; MIME_TRACE(0.00)[0:+]; TO_DN_SOME(0.00)[]; RCPT_COUNT_TWELVE(0.00)[14]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:helo]; RCVD_VIA_SMTP_AUTH(0.00)[]; FROM_EQ_ENVFROM(0.00)[]; RCVD_COUNT_TWO(0.00)[2]; FUZZY_RATELIMITED(0.00)[rspamd.com]; URIBL_BLOCKED(0.00)[imap1.dmz-prg2.suse.org:helo,suse.com:email,suse.com:mid]; R_RATELIMIT(0.00)[to_ip_from(RLfdszjqhz8kzzb9uwpzdm8png)]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[] X-purgate-ID: tlsNG-d62444/1779808104-ACE52FF4-CE30CEA7/0/0 X-purgate-type: clean X-purgate-size: 5953 There are only very few use cases of XEN_LAZY_MMU left. Get rid of them in order to avoid having to call enter_lazy(XEN_LAZY_MMU) and leave_lazy(XEN_LAZY_MMU). The query in xen_batched_set_pte() can be replaced by using is_lazy_mmu_mode_active() instead. As xen_flush_lazy_mmu() will be called only with lazy MMU mode being active, the test for the lazy mode can just be dropped. In xen_start_context_switch() and xen_end_context_switch() use __task_lazy_mmu_mode_pause() and __task_lazy_mmu_mode_resume(), allowing to drop xen_enter_lazy_mmu() and xen_leave_lazy_mmu() completely. Call arch_flush_lazy_mmu_mode() from arch_leave_lazy_mmu_mode(), as this is the only required action now. Drop the lazy mmu enter and leave paravirt hooks, leaving the flush hook as the only needed one. Signed-off-by: Juergen Gross --- arch/x86/include/asm/paravirt.h | 9 ++++----- arch/x86/include/asm/paravirt_types.h | 11 +---------- arch/x86/kernel/paravirt.c | 6 +----- arch/x86/xen/enlighten_pv.c | 7 ++----- arch/x86/xen/mmu_pv.c | 28 +++------------------------ 5 files changed, 11 insertions(+), 50 deletions(-) diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h index cdfe4007443e..0591aa38fd85 100644 --- a/arch/x86/include/asm/paravirt.h +++ b/arch/x86/include/asm/paravirt.h @@ -483,17 +483,16 @@ static inline void arch_end_context_switch(struct task_struct *next) static inline void arch_enter_lazy_mmu_mode(void) { - PVOP_VCALL0(pv_ops, mmu.lazy_mode.enter); } -static inline void arch_leave_lazy_mmu_mode(void) +static inline void arch_flush_lazy_mmu_mode(void) { - PVOP_VCALL0(pv_ops, mmu.lazy_mode.leave); + PVOP_VCALL0(pv_ops, mmu.lazy_mode_flush); } -static inline void arch_flush_lazy_mmu_mode(void) +static inline void arch_leave_lazy_mmu_mode(void) { - PVOP_VCALL0(pv_ops, mmu.lazy_mode.flush); + arch_flush_lazy_mmu_mode(); } static inline void __set_fixmap(unsigned /* enum fixed_addresses */ idx, diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h index 4f5ae0068aab..b4c4a23e77a1 100644 --- a/arch/x86/include/asm/paravirt_types.h +++ b/arch/x86/include/asm/paravirt_types.h @@ -19,15 +19,6 @@ struct cpumask; struct flush_tlb_info; struct vm_area_struct; -#ifdef CONFIG_PARAVIRT_XXL -struct pv_lazy_ops { - /* Set deferred update mode, used for batching operations. */ - void (*enter)(void); - void (*leave)(void); - void (*flush)(void); -} __no_randomize_layout; -#endif - struct pv_cpu_ops { /* hooks for various privileged instructions */ #ifdef CONFIG_PARAVIRT_XXL @@ -171,7 +162,7 @@ struct pv_mmu_ops { void (*set_pgd)(pgd_t *pgdp, pgd_t pgdval); - struct pv_lazy_ops lazy_mode; + void (*lazy_mode_flush)(void); /* dom0 ops */ diff --git a/arch/x86/kernel/paravirt.c b/arch/x86/kernel/paravirt.c index 792fa96b3233..22f72034470f 100644 --- a/arch/x86/kernel/paravirt.c +++ b/arch/x86/kernel/paravirt.c @@ -204,11 +204,7 @@ struct paravirt_patch_template pv_ops = { .mmu.enter_mmap = paravirt_nop, - .mmu.lazy_mode = { - .enter = paravirt_nop, - .leave = paravirt_nop, - .flush = paravirt_nop, - }, + .mmu.lazy_mode_flush = paravirt_nop, .mmu.set_fixmap = native_set_fixmap, #endif /* CONFIG_PARAVIRT_XXL */ diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 428189f5d437..8ee4910d597a 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -424,9 +424,7 @@ static void xen_start_context_switch(struct task_struct *prev) { BUG_ON(preemptible()); - if (this_cpu_read(xen_lazy_mode) == XEN_LAZY_MMU) { - arch_leave_lazy_mmu_mode(); - } + __task_lazy_mmu_mode_pause(prev); enter_lazy(XEN_LAZY_CPU); } @@ -436,8 +434,7 @@ static void xen_end_context_switch(struct task_struct *next) xen_mc_flush(); leave_lazy(XEN_LAZY_CPU); - if (__task_lazy_mmu_mode_active(next)) - arch_enter_lazy_mmu_mode(); + __task_lazy_mmu_mode_resume(next); } static unsigned long xen_store_tr(void) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 51dbdc67c73c..928b4b0a4484 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -324,7 +324,7 @@ static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval) { struct mmu_update u; - if (xen_get_lazy_mode() != XEN_LAZY_MMU) + if (!is_lazy_mmu_mode_active()) return false; xen_mc_batch(); @@ -2151,21 +2151,10 @@ static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot) #endif } -static void xen_enter_lazy_mmu(void) -{ - preempt_disable(); - if (xen_get_lazy_mode() != XEN_LAZY_MMU) - enter_lazy(XEN_LAZY_MMU); - preempt_enable(); -} - static void xen_flush_lazy_mmu(void) { preempt_disable(); - - if (xen_get_lazy_mode() == XEN_LAZY_MMU) - xen_mc_flush(); - + xen_mc_flush(); preempt_enable(); } @@ -2189,15 +2178,6 @@ static void __init xen_post_allocator_init(void) pv_ops.mmu.write_cr3 = &xen_write_cr3; } -static void xen_leave_lazy_mmu(void) -{ - preempt_disable(); - xen_mc_flush(); - if (xen_get_lazy_mode() != XEN_LAZY_NONE) - leave_lazy(XEN_LAZY_MMU); - preempt_enable(); -} - void __init xen_init_mmu_ops(void) { x86_init.paging.pagetable_init = xen_pagetable_init; @@ -2237,9 +2217,7 @@ void __init xen_init_mmu_ops(void) pv_ops.mmu.make_p4d = PV_CALLEE_SAVE(xen_make_p4d); pv_ops.mmu.enter_mmap = xen_enter_mmap; pv_ops.mmu.exit_mmap = xen_exit_mmap; - pv_ops.mmu.lazy_mode.enter = xen_enter_lazy_mmu; - pv_ops.mmu.lazy_mode.leave = xen_leave_lazy_mmu; - pv_ops.mmu.lazy_mode.flush = xen_flush_lazy_mmu; + pv_ops.mmu.lazy_mode_flush = xen_flush_lazy_mmu; pv_ops.mmu.set_fixmap = xen_set_fixmap; memset(dummy_mapping, 0xff, PAGE_SIZE); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:08:31 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:08:31 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320030.1587464 (Exim 4.92) (envelope-from ) id 1wRtOR-0008CW-Cl; Tue, 26 May 2026 15:08:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320030.1587464; Tue, 26 May 2026 15:08:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtOR-0008CP-9H; Tue, 26 May 2026 15:08:31 +0000 Received: by outflank-mailman (input) for mailman id 1320030; Tue, 26 May 2026 15:08:30 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtOQ-000883-HH for xen-devel@lists.xenproject.org; Tue, 26 May 2026 15:08:30 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRtOP-004Daz-SX for xen-devel@lists.xenproject.org; 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Peter Anvin" , xen-devel@lists.xenproject.org Subject: [PATCH 5/5] x86/xen: Replace generic lazy tracking with cpu specific one Date: Tue, 26 May 2026 17:05:14 +0200 Message-ID: <20260526150514.129330-6-jgross@suse.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260526150514.129330-1-jgross@suse.com> References: <20260526150514.129330-1-jgross@suse.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Action: no action X-Rspamd-Queue-Id: 76EF06B4EB X-Spam-Flag: NO X-Spam-Score: -3.01 X-Spam-Level: X-Spamd-Result: default: False [-3.01 / 50.00]; BAYES_HAM(-3.00)[100.00%]; MID_CONTAINS_FROM(1.00)[]; NEURAL_HAM_LONG(-1.00)[-1.000]; R_MISSING_CHARSET(0.50)[]; R_DKIM_ALLOW(-0.20)[suse.com:s=susede1]; NEURAL_HAM_SHORT(-0.20)[-0.999]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; TO_MATCH_ENVRCPT_ALL(0.00)[]; ARC_NA(0.00)[]; URIBL_BLOCKED(0.00)[suse.com:dkim,suse.com:email,suse.com:mid,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; TO_DN_SOME(0.00)[]; MIME_TRACE(0.00)[0:+]; FUZZY_RATELIMITED(0.00)[rspamd.com]; DKIM_SIGNED(0.00)[suse.com:s=susede1]; RCVD_TLS_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.com:+]; RCVD_COUNT_TWO(0.00)[2]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; SPAMHAUS_XBL(0.00)[2a07:de40:b281:104:10:150:64:97:from]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received]; RCPT_COUNT_SEVEN(0.00)[10]; DWL_DNSWL_BLOCKED(0.00)[suse.com:dkim]; R_RATELIMIT(0.00)[to_ip_from(RLkdkdrsxe9hqhhs5ask8616i6)]; RCVD_VIA_SMTP_AUTH(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo] X-purgate-ID: tlsNG-42698a/1779808109-18D67F3B-3DFB2A6C/0/0 X-purgate-type: clean X-purgate-size: 5501 Now that lazy mmu state tracking no longer relies on the Xen specific one, cpu lazy mode is the only user of the Xen generic lazy tracking. Replace the Xen generic lazy tracking with a cpu lazy specific one. Signed-off-by: Juergen Gross --- arch/x86/include/asm/xen/hypervisor.h | 25 +------------------------ arch/x86/xen/enlighten_pv.c | 23 ++++++++++------------- arch/x86/xen/mmu_pv.c | 6 +++--- 3 files changed, 14 insertions(+), 40 deletions(-) diff --git a/arch/x86/include/asm/xen/hypervisor.h b/arch/x86/include/asm/xen/hypervisor.h index c2fc7869b996..f666637d773e 100644 --- a/arch/x86/include/asm/xen/hypervisor.h +++ b/arch/x86/include/asm/xen/hypervisor.h @@ -64,30 +64,7 @@ void __init xen_pvh_init(struct boot_params *boot_params); void __init mem_map_via_hcall(struct boot_params *boot_params_p); #endif -/* Lazy mode for batching updates / context switch */ -enum xen_lazy_mode { - XEN_LAZY_NONE, - XEN_LAZY_MMU, - XEN_LAZY_CPU, -}; - -DECLARE_PER_CPU(enum xen_lazy_mode, xen_lazy_mode); - -static inline void enter_lazy(enum xen_lazy_mode mode) -{ - BUG_ON(this_cpu_read(xen_lazy_mode) != XEN_LAZY_NONE); - - this_cpu_write(xen_lazy_mode, mode); -} - -static inline void leave_lazy(enum xen_lazy_mode mode) -{ - BUG_ON(this_cpu_read(xen_lazy_mode) != mode); - - this_cpu_write(xen_lazy_mode, XEN_LAZY_NONE); -} - -enum xen_lazy_mode xen_get_lazy_mode(void); +bool xen_is_cpu_lazy_mode(void); #if defined(CONFIG_XEN_DOM0) && defined(CONFIG_ACPI) void xen_sanitize_proc_cap_bits(uint32_t *buf); diff --git a/arch/x86/xen/enlighten_pv.c b/arch/x86/xen/enlighten_pv.c index 8ee4910d597a..b310b91f2994 100644 --- a/arch/x86/xen/enlighten_pv.c +++ b/arch/x86/xen/enlighten_pv.c @@ -138,14 +138,11 @@ struct tls_descs { struct desc_struct desc[3]; }; -DEFINE_PER_CPU(enum xen_lazy_mode, xen_lazy_mode) = XEN_LAZY_NONE; +static DEFINE_PER_CPU(bool, xen_cpu_lazy_mode); -enum xen_lazy_mode xen_get_lazy_mode(void) +bool xen_is_cpu_lazy_mode(void) { - if (in_interrupt()) - return XEN_LAZY_NONE; - - return this_cpu_read(xen_lazy_mode); + return !in_interrupt() && this_cpu_read(xen_cpu_lazy_mode); } /* @@ -425,7 +422,7 @@ static void xen_start_context_switch(struct task_struct *prev) BUG_ON(preemptible()); __task_lazy_mmu_mode_pause(prev); - enter_lazy(XEN_LAZY_CPU); + this_cpu_write(xen_cpu_lazy_mode, true); } static void xen_end_context_switch(struct task_struct *next) @@ -433,7 +430,7 @@ static void xen_end_context_switch(struct task_struct *next) BUG_ON(preemptible()); xen_mc_flush(); - leave_lazy(XEN_LAZY_CPU); + this_cpu_write(xen_cpu_lazy_mode, false); __task_lazy_mmu_mode_resume(next); } @@ -541,7 +538,7 @@ static void xen_set_ldt(const void *addr, unsigned entries) MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); + xen_mc_issue(!xen_is_cpu_lazy_mode()); } static void xen_load_gdt(const struct desc_ptr *dtr) @@ -637,7 +634,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu) * exception between the new %fs descriptor being loaded and * %fs being effectively cleared at __switch_to(). */ - if (xen_get_lazy_mode() == XEN_LAZY_CPU) + if (xen_is_cpu_lazy_mode()) loadsegment(fs, 0); xen_mc_batch(); @@ -646,7 +643,7 @@ static void xen_load_tls(struct thread_struct *t, unsigned int cpu) load_TLS_descriptor(t, cpu, 1); load_TLS_descriptor(t, cpu, 2); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); + xen_mc_issue(!xen_is_cpu_lazy_mode()); } static void xen_load_gs_index(unsigned int idx) @@ -1008,7 +1005,7 @@ static void xen_load_sp0(unsigned long sp0) mcs = xen_mc_entry(0); MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); + xen_mc_issue(!xen_is_cpu_lazy_mode()); this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0); } @@ -1068,7 +1065,7 @@ static void xen_write_cr0(unsigned long cr0) MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); + xen_mc_issue(!xen_is_cpu_lazy_mode()); } static void xen_write_cr4(unsigned long cr4) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 928b4b0a4484..aab5f70d407c 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -1425,7 +1425,7 @@ static void xen_write_cr3(unsigned long cr3) else __xen_write_cr3(false, 0); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); /* interrupts restored */ + xen_mc_issue(!xen_is_cpu_lazy_mode()); /* interrupts restored */ } /* @@ -1460,7 +1460,7 @@ static void __init xen_write_cr3_init(unsigned long cr3) __xen_write_cr3(true, cr3); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); /* interrupts restored */ + xen_mc_issue(!xen_is_cpu_lazy_mode()); /* interrupts restored */ } static int xen_pgd_alloc(struct mm_struct *mm) @@ -1875,7 +1875,7 @@ void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn) */ xen_mc_batch(); __xen_write_cr3(true, __pa(init_top_pgt)); - xen_mc_issue(xen_get_lazy_mode() != XEN_LAZY_CPU); + xen_mc_issue(!xen_is_cpu_lazy_mode()); /* We can't that easily rip out L3 and L2, as the Xen pagetables are * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 15:11:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:11:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320053.1587473 (Exim 4.92) (envelope-from ) id 1wRtR9-0001w8-Rw; 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MIME-Version: 1.0 Date: Tue, 26 May 2026 12:10:57 -0300 From: Mauricio Faria de Oliveira To: Juergen Gross Cc: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v3 1/4] x86/asm: move inline string functions to In-Reply-To: References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> <20260520-pvh-kasan-inline-v3-1-bede769c6ec7@igalia.com> Message-ID: X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-3.8, Tests=ALL_TRUSTED=-3,AWL=-1.612,BAYES_50=0.8,URIBL_BLOCKED=0.001,URIBL_ZEN_BLOCKED_OPENDNS=0.001 X-Spam-Score: -37 X-Spam-Bar: --- X-purgate-ID: tlsNG-d25034/1779808277-DA577CF5-85A19095/0/0 X-purgate-type: clean X-purgate-size: 3487 Thanks for reviewing. On 2026-05-26 06:51, Juergen Gross wrote: > On 20.05.26 23:12, Mauricio Faria de Oliveira wrote: >> In next patch, inline string functions are included from 'boot/string.c'. > > Please don't use "In next patch". You can't be sure the patches of a > series are going to be committed all together. > > A better alternative wording would be "In a future patch". Ack; replaced. > >> Using the header is problematic for a couple of reasons (*) >> (i.e., build errors), which can be addressed, but introduce unnecessary >> complexity and regression risk (beyond these _found_ couple of reasons). >> >> Using a new header is simpler and transparent to >> existing users of , with less changes to 'boot/string.c' >> and its users (eg 'boot/compressed/string.c' and 'purgatory/purgatory.ro'), >> which minimize regression risk. >> >> No functional change intended. >> > > I'd rather put the footnote below after the "---" line, as it is more > interesting for the reviewer than the consumer of "git log" or "git show". > > Note that others might disagree, though. Good point; indeed, that is review material. I'll change it for now. >> (*) Reasons not to include in 'boot/string.c': >> >> 1) 'boot/string.c' is built for 16-bit/real mode thus some type and word >> size errors happen when include, e.g., . >> >> This can be addressed with '#ifndef _SETUP' (defined by 'boot/Makefile'). >> >> 2) 'boot/string.c' is included by 'boot/compressed/string.c' which is >> the source of 'purgatory/string.o', linked by 'purgatory/purgatory.ro' >> (CONFIG_KEXEC_FILE). >> >> In 64BIT, includes , which references >> __memset() and __memmove() with KCFI_REFERENCE(), ie, __ADDRESSABLE(); >> however, 'purgatory/purgatory.ro' is not linked with implementations. >> >> So, CONFIG_KEXEC_FILE and CONFIG_CFI without CONFIG_KASAN hit errors: >> >> >> ld.lld: error: undefined symbol: __memset >> >>> referenced by string.c >> >>> arch/x86/purgatory/purgatory.ro:\ >> (__UNIQUE_ID_addressable___memset_0) >> -- >> >> ld.lld: error: undefined symbol: __memmove >> >>> referenced by string.c >> >>> arch/x86/purgatory/purgatory.ro:\ >> (__UNIQUE_ID_addressable___memmove_1) >> >> (Note: this is not hit with CONFIG_KASAN because 'boot/compressed/string.c' >> adds aliases __memset()/__memmove() to memset()/memmove() in that case.) >> >> This can be addressed with 'CFLAGS_string.o := -D__DISABLE_EXPORTS' so to >> disable KCFI_REFERENCE() in 'purgatory/Makefile' (it removes CC_FLAGS_CFI >> anyway). >> >> ... >> >> However, since a change in this series would need more changes to address >> errors it causes, it is reasonable to change the series not to cause them, >> by using a separate header with _just_ inline string functions. >> >> Reported-by: kernel test robot >> Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ >> Signed-off-by: Mauricio Faria de Oliveira > > With (at least) my first remark addressed: > > Reviewed-by: Juergen Gross Sent v4 with both remarks above addressed and your new R-b tags; thanks! > > > Juergen -- Mauricio From xen-devel-bounces@lists.xenproject.org Tue May 26 15:12:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 15:12:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320066.1587483 (Exim 4.92) (envelope-from ) id 1wRtS0-0002TM-82; Tue, 26 May 2026 15:12:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320066.1587483; Tue, 26 May 2026 15:12:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtS0-0002TF-3T; Tue, 26 May 2026 15:12:12 +0000 Received: by outflank-mailman (input) for mailman id 1320066; Tue, 26 May 2026 15:12:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRtRy-0002S7-RJ for xen-devel@lists.xenproject.org; Tue, 26 May 2026 15:12:10 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRtRy-00A0OZ-7H for xen-devel@lists.xenproject.org; Tue, 26 May 2026 17:12:10 +0200 Received: from [10.42.69.4] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15b847-e002-0a2a0a5209dd-0a2a4504c9bc-16 for ; Tue, 26 May 2026 17:12:10 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-ebf023.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15b849-1dec-0a2a45040019-d561b33888b8-3 for ; Tue, 26 May 2026 17:12:09 +0200 Received: from maestria.local.igalia.com ([192.168.10.14] helo=mail.igalia.com) by fanzine2.igalia.com with esmtps (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wRtRh-008UNN-MM; Tue, 26 May 2026 17:11:53 +0200 Received: from webmail.service.igalia.com ([192.168.21.45]) by mail.igalia.com with esmtp (Exim) id 1wRtRf-00FQmb-B1; Tue, 26 May 2026 17:11:53 +0200 Received: from localhost ([127.0.0.1] helo=webmail.igalia.com) by webmail.service.igalia.com with esmtp (Exim 4.98.2) (envelope-from ) id 1wRtRe-00000004KLe-2i9p; Tue, 26 May 2026 17:11:51 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=0BWum9obbunJlIGEK9AK0P3Vams8wVw+0uJG1CW4axE=; b=IEqjwPkWTHJKmf7uD3D3U7Fd18 qwdhTy9hULK9YPuqBXSlWQzvwILRx3wlgnWyJ86bNdn6axV3AyFZYTwpTDwriN32vJVAY+mitV70t rQ800zmJMIbAplHOOzHixQKaZE7JmGPQeMaRkIiaCE2DOQMURA6Qt5D5B89SHyvUtAySk4J44S1mu 35o9vjtNpMi63jdO8CYqEWcGQqoNb0kVyzNadi2fPYSP/NrW6Zs/ibwrFr5H2yBk0B4B/14//XKp/ 28Ix1nHNfRga0b83uvocglwwS5M4nZERbyfk4O7By4TN6UuQcfYf6MHgPVpGJptiykEJYGhjNCYZO 93RYMYEg==; MIME-Version: 1.0 Date: Tue, 26 May 2026 12:11:51 -0300 From: Mauricio Faria de Oliveira To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky Cc: kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v3 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) In-Reply-To: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> References: <20260520-pvh-kasan-inline-v3-0-bede769c6ec7@igalia.com> Message-ID: <5f01a2d0bf030641579720383b732bfb@igalia.com> X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-3.9, Tests=ALL_TRUSTED=-3,AWL=-1.668,BAYES_50=0.8 X-Spam-Score: -38 X-Spam-Bar: --- X-purgate-ID: tlsNG-ebf023/1779808330-29F7D3FF-2FA2DE42/0/0 X-purgate-type: clean X-purgate-size: 402 On 2026-05-20 18:12, Mauricio Faria de Oliveira wrote: > The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. > > Booting directly from vmlinux (instead of bzImage) now fails with gcc-14/15 > (but works with gcc-12/13) if CONFIG_KASAN_GENERIC is set, on Ubuntu 25.10. v4: https://lore.kernel.org/all/20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com -- Mauricio From xen-devel-bounces@lists.xenproject.org Tue May 26 16:09:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 16:09:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320092.1587491 (Exim 4.92) (envelope-from ) id 1wRuLE-0001VE-6c; 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(Personally I'd make it a > requirement.) > > > It is in the format: > > + > > + Assisted-by: [:] [tool...] > > + > > +E.g.: > > + > > + Assisted-by: Claude:claude-3-opus coccinelle sparse > > + Assisted-by: ChatGPT:gpt-5.5 > > + > > +Basic development tools, such as git, compilers, make, and editors, should > > +not be listed. > > + > > +The person submitting the patch remains responsible for reviewing any > > +AI-generated content and ensuring the contribution is correct, appropriate, > > +and compliant with Xen's contribution and licensing requirements. > > + > > ### Signed-off-by: > > > > This mandatory tag specifies the author(s) of a patch (for each author a > > @@ -209,6 +228,9 @@ E.g.: > > The author must be a natural person (not a team or just a company) and the > > `Signed-off-by:` tag must include the real name of the author (no pseudonym). > > > > +AI tools must not add `Signed-off-by:` tags, as only natural > > +persons can certify the `Developer's Certificate of Origin`. > > Linux emphasizes "MUST NOT". I think that's advisable for us as well. I > also wonder whether some of their other wording might be worth taking > verbatim, rather than making our own, slightly different variant. > > Nit: Wrap differently to make better use of line length? With the proposed changes: Acked-by: Roger Pau Monné Thanks, Roger. From xen-devel-bounces@lists.xenproject.org Tue May 26 19:02:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 19:02:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320133.1587512 (Exim 4.92) (envelope-from ) id 1wRx2q-00070Z-7N; Tue, 26 May 2026 19:02:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320133.1587512; Tue, 26 May 2026 19:02:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRx2q-00070R-2a; Tue, 26 May 2026 19:02:28 +0000 Received: by outflank-mailman (input) for mailman id 1320133; Tue, 26 May 2026 19:02:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRx2p-00070L-3U for xen-devel@lists.xenproject.org; Tue, 26 May 2026 19:02:27 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wRx2o-008gg3-CD for xen-devel@lists.xenproject.org; Tue, 26 May 2026 21:02:26 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a15ee3a-bab6-0a2a0a5309dd-0a2a45079d3a-16 for ; Tue, 26 May 2026 21:02:26 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a15ee40-229c-0a2a45070019-aceafc1fc83a-3 for ; Tue, 26 May 2026 21:02:26 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id 1D3D941A40; Tue, 26 May 2026 19:02:24 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C9CD31F000E9; Tue, 26 May 2026 19:02:23 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779822144; bh=5v/ujptFF4DT0D6zYuyceaf/1trBKA8PwBcNsci0YZg=; h=Date:From:To:cc:Subject:In-Reply-To:References; b=FuROTpMl/ITCiqAcC7+kjLeWUAWR1IEFzbrhnMxgzETF7Bs22NhUiKZq28FrhJ2GV BSIWmkeLFBipXbLhKB9gz6i1qk8s4JecDnshC7v8VkGK7tgFztBZgqvImAv/HhlBUV PDd3XA19YKCAsXRs06tp24ud/JzNU3cuPvVKi8SB+7Ur2qeDXy7mnc/wNQuefqDI5x +Ju6REmcNA1w4ANQ2zYIorFFRv8Hgot8Yt2Bi380zqTMA5M2aOH3ZshiMRtTeY2/FF jNLch4k5yeq5kUV3fd4eeiJka+uUWY1xd6ClnTMSco3PJReT9ZQK5cU/ovsvD4Wn6Z PxadA5OaFOKCA== Date: Tue, 26 May 2026 12:02:23 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Anthony PERARD cc: =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , xen-devel@lists.xenproject.org, Andrew Cooper , Stefano Stabellini , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= Subject: Re: [PATCH v4 13/13] Setup ssh access to test systems In-Reply-To: <1779458083.8631fc262581453bbf619ec5b2062170.19e4ff78945000f373@vates.tech> Message-ID: References: <13f837cd9f394d3b4eddb4849156b8ed5d06d31b.1777898148.git-series.marmarek@invisiblethingslab.com> <1779458083.8631fc262581453bbf619ec5b2062170.19e4ff78945000f373@vates.tech> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="8323329-705442622-1779822144=:182011" X-purgate-ID: tlsNG-ef75cf/1779822146-0A772C48-9E8E0929/0/0 X-purgate-type: clean X-purgate-size: 1090 This message is in MIME format. The first part should be readable text, while the remaining parts are likely unreadable without MIME-aware tools. --8323329-705442622-1779822144=:182011 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT On Fri, 22 May 2026, Anthony PERARD wrote: > On Mon, May 04, 2026 at 02:35:52PM +0200, Marek Marczykowski-Górecki wrote: > > For this add also bridge package, so xenbr0 can be configured with > > /etc/network/interfaces. > > This allows extracting more logs out of the test system. > > > > Create empty /etc/network/interfaces, so the 'networking' service starts > > cleanly even if no interfaces are configured this way. This is > > necessary, as dropbear service depends on networking. > > > > Signed-off-by: Marek Marczykowski-Górecki > > Reviewed-by: Anthony PERARD Since Anthony has reviewed the entire series, on the whole series: Acked-by: Stefano Stabellini --8323329-705442622-1779822144=:182011-- From xen-devel-bounces@lists.xenproject.org Tue May 26 20:31:50 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 20:31:50 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320158.1587521 (Exim 4.92) (envelope-from ) id 1wRyR2-0001ip-DE; Tue, 26 May 2026 20:31:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320158.1587521; Tue, 26 May 2026 20:31:32 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wRyR2-0001ih-9V; Tue, 26 May 2026 20:31:32 +0000 Received: by outflank-mailman (input) for mailman id 1320158; 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pr=C From: Jason Andryuk To: CC: Jason Andryuk , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH] xen/x86: Change stub page freeing to fix smt=0 Date: Tue, 26 May 2026 16:31:14 -0400 Message-ID: <20260526203114.40882-1-jason.andryuk@amd.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF00022570:EE_|CY8PR12MB8193:EE_ X-MS-Office365-Filtering-Correlation-Id: 51497a6c-f2ec-4655-937f-08debb65c03c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|82310400026|1800799024|36860700016|11063799006|18002099003|56012099006; X-Microsoft-Antispam-Message-Info: qYH/98wrkrf8/kYNI6mZxbI4jELMdiFmcJysIeZmvPZQ+Ea8gI3BluhVZFVXBXRB4au4bzpphYk1VsEUZuGSc8qfHQgYFNn2pg2Sb9KG3dOdioTvl9tLfTpgLtpNaFisIaYafZMBAVY8zHF5GdogaCSgL24NHhir1i1VXa741sKTXL+jN9F1RWVKsLHcjmHG/oad+1OQsR9lraz3Q9iCgJWdsFnHoDEBOEJIU/kV4+G1K5j17yxu8cydAuHhdsUExdmYQAW1uwWRXtp2W5iJ12IQQyw63iVDaS3uKMCUUtvnM6+z/Hi9iMRZ4F3HINvbm/e1fkEdOJPVoDDExfEWQEOqeVLrxp1Ykx1mXTQJmh5d+V6AuwCER6yrQ3j+PwWkSgZKnS0LdLyy4v3I+y0eBpXecZGdMS6EatcFCBJdbWuyqvwOWUf4bTB3AgMDnOVotydOEvJvI7wbQyXA2hyPMExj+rF+Rq0haAppk+usbRHRfdzm+IJpcgvTKnDEQHd4o/xLfgUA6q/Aa4rh9F2C4AjT5RqmZLpuladiaQfQ8mTtLo7ogcz6gjgTJKL6Pnax9Xa5jiRXjoSL2RrWVLinFhve7Oom753e+cSRvJZ2IMhceATyRcQ6V0C2AJTibhTizF93/7FtMXHpYWN+MMSa8Hy/owh6KWgQXn63PVq83gVyjaNNXVVgF/Epy8fARGGGFEJeaiAZeX2bWpLwz3mL5aGvPtaDe6NcOC4rS0uih3U= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(376014)(82310400026)(1800799024)(36860700016)(11063799006)(18002099003)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: bNfx9j04+ONhx2nFBjWAp5BhO8QDktS+MdVa/gsYENS2PvpuUuvqJdANHv0dQUs2NDO0Q4uMU4vfuZwoRElMQMWAfzCZTFORsHgQ5HuYVjm8J4kgTyOVUJF+yiomQCh4FvXZZbSAk5+fVYSyxKJvEvt1nMHLFnmrUl6jVNhRjzkxhw1reumfkWJY2yfSf45hbR7LabjEiMduDyQzOmRgH1mNtWtyizvSbvAQfRaFKRM9sATacqS2OBn5P5gjH3gyNcQBGyQoZF/5E+6x//19l0j0PMvoBLcNLM98Q3U7wM2Dmx4N/Fi4GbFdukYDyBUOTFhHjpDpgvsn1uBkiKareGTe+yXkCOwSDUvVoxq4SGnWPPJE68fhqp7IpnOEOQK91LsWiXg4/wE3Yg4f5e712zmcdhN5s7pym8GJDb3yoarKlCAzQitHKTgjRGdXOzfF X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 May 2026 20:31:22.4043 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 51497a6c-f2ec-4655-937f-08debb65c03c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022570.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB8193 X-purgate-ID: tlsNG-c201ff/1779827488-E0867443-4E77C3B1/0/0 X-purgate-type: clean X-purgate-size: 4235 A single stubs page is initialized with 0xcc and re-used, with multiple CPUs each using a portion of the shared page. In cpu_smpboot_free(), each stubs area is checked against 0xcc. When all are set to 0xcc, the page is freed. Booting a system with smt=0, CPU0 is initially setup, allocating the stubs page and initializing to 0xcc. When more CPUs are brought up, CPU1 is initialized and then immediately brough offline as it is the sibling of CPU0. Since the page was initially memset with 0xcc, cpu_smpboot_free() finds all stubs as 0xcc and frees the page. However, the page is still assigned to CPU0 and continues to be assigned to other CPUs. Meanwhile the page can be reallocated, which can lead to misbehavior. The particular instance was the stubs page re-used as a page table which later faulted when the entry was all 0xcc. Change to initializing the page as 0xd6/STUB_BUF_FREE, and initializing individual stubs as 0xcc/STUB_BUF_USED. 0xd6 now indicates unused, and 0xcc indicates used/assigned. When freeing a CPU, the stub is set to 0xd6, and the page is freed if all stubs are 0xd6. Initializing with STUB_BUF_FREE lets cpu_smpboot_free() a page that was only ever partially used. 0xd6/UDB is a 1 byte invalid opcode, which is similar to the existing use of 0xcc. 0xd6 is used to identify bug frames, but the stub addr (e.g. 0xffff82d07fffe000) fails the is_active_kernel_text() check. It should be okay to use here. Fixes: 7a66ac8d1633 ("x86: move syscall trampolines off the stack") Signed-off-by: Jason Andryuk --- It would be nice to use get_page()/put_page() to let count_info handle reference counting, but they require an owning domain. The listed Fixes introduced the use of 0xcc, but the smt commit may have made it more problematic. Fixes: d8f974f1a646 ("x86: command line option to avoid use of secondary hyper-threads") --- xen/arch/x86/smpboot.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/smpboot.c b/xen/arch/x86/smpboot.c index ff05955bae..a5d485b732 100644 --- a/xen/arch/x86/smpboot.c +++ b/xen/arch/x86/smpboot.c @@ -643,10 +643,16 @@ static int do_boot_cpu(int apicid, int cpu) #define STUB_BUF_CPU_OFFS(cpu) (((cpu) & (STUBS_PER_PAGE - 1)) * STUB_BUF_SIZE) +/* Fill values indicating state of stub. */ +#define STUB_BUF_USED 0xcc +#define STUB_BUF_FREE 0xd6 + unsigned long alloc_stub_page(unsigned int cpu, unsigned long *mfn) { + unsigned char *stub_page; unsigned long stub_va; struct page_info *pg; + bool initialize = false; BUILD_BUG_ON(STUBS_PER_PAGE & (STUBS_PER_PAGE - 1)); @@ -661,7 +667,7 @@ unsigned long alloc_stub_page(unsigned int cpu, unsigned long *mfn) if ( !pg ) return 0; - unmap_domain_page(memset(__map_domain_page(pg), 0xcc, PAGE_SIZE)); + initialize = true; } stub_va = XEN_VIRT_END - FIXADDR_X_SIZE - (cpu + 1) * PAGE_SIZE; @@ -675,6 +681,14 @@ unsigned long alloc_stub_page(unsigned int cpu, unsigned long *mfn) else if ( !*mfn ) *mfn = mfn_x(page_to_mfn(pg)); + stub_page = __map_domain_page(pg); + /* Newly allocated page is marked entirely unused. */ + if ( initialize ) + memset(stub_page, STUB_BUF_FREE, PAGE_SIZE); + /* Specific CPU is marked used. */ + memset(stub_page + STUB_BUF_CPU_OFFS(cpu), STUB_BUF_USED, STUB_BUF_SIZE); + unmap_domain_page(stub_page); + return stub_va; } @@ -992,9 +1006,10 @@ static void cpu_smpboot_free(unsigned int cpu, bool remove) unsigned char *stub_page = map_domain_page(mfn); unsigned int i; - memset(stub_page + STUB_BUF_CPU_OFFS(cpu), 0xcc, STUB_BUF_SIZE); + memset(stub_page + STUB_BUF_CPU_OFFS(cpu), STUB_BUF_FREE, + STUB_BUF_SIZE); for ( i = 0; i < STUBS_PER_PAGE; ++i ) - if ( stub_page[i * STUB_BUF_SIZE] != 0xcc ) + if ( stub_page[i * STUB_BUF_SIZE] != STUB_BUF_FREE ) break; unmap_domain_page(stub_page); destroy_xen_mappings(per_cpu(stubs.addr, cpu) & PAGE_MASK, -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:07:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:07:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320169.1587530 (Exim 4.92) (envelope-from ) id 1wRz0A-00066D-0Q; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f789f44c-2d5e-48a8-d6e1-08debb6ad38d X-MS-Exchange-CrossTenant-originalarrivaltime: 26 May 2026 21:07:42.3146 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: BMK866vPmgHMi37Iyvz6IILb12aK/IaUmnZsizn3szXGGab8pE0Csc4U6FWvTIQycwqByh4ckMslqcLe87gAH+iQAIYEkTtRacEWW1gGCkw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR03MB7227 X-purgate-ID: tlsNG-42698a/1779829665-1B175F3B-F8A3F52C/0/0 X-purgate-type: clean X-purgate-size: 5561 GCOV instrumentation can emit executable input sections such as .text.startup and .text.exit when CONFIG_COVERAGE is enabled. At present the Xen linker scripts only collect .text.* into the main text output section when CONFIG_CC_SPLIT_SECTIONS is enabled. With CONFIG_COVERAGE=3Dy and CONFIG_CC_SPLIT_SECTIONS=3Dn, these executable sections may be placed as linker orphans outside the expected Xen text region. Constructors generated by coverage instrumentation can then point at code outside the normal RX text mapping, leading to early boot crashes from init_constructors(): (XEN) [ 12.331193] Instruction Abort Trap. Syndrome=3D0xf (XEN) [ 12.334253] Walking Hypervisor VA 0xa00003ce000 on CPU0 via TT= BR 0x000000004352d000 (XEN) [ 12.338550] 0TH[0x014] =3D 0x4352cf7f (XEN) [ 12.341823] 1ST[0x000] =3D 0x4352bf7f (XEN) [ 12.345124] 2ND[0x001] =3D 0x40000043527f7f (XEN) [ 12.347329] 3RD[0x1ce] =3D 0x400000433cef7f (XEN) [ 12.351233] CPU0: Unexpected Trap: Instruction Abort (XEN) [ 12.357643] ----[ Xen-4.21.1 arm64 debug=3Dn gcov=3Dy Not t= ainted ]---- (XEN) [ 12.360243] CPU: 0 (XEN) [ 12.364098] PC: 00000a00003ce000 00000a00003ce000 (XEN) [ 12.375835] LR: 00000a00004802f8 (XEN) [ 12.378273] SP: 00000a00004c7e10 (XEN) [ 12.380492] CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervi= sor, handler) (XEN) [ 12.382785] X0: 00000a00003ce000 X1: 0000000000000000 X= 2: 00000a0000410fa0 (XEN) [ 12.385176] X3: 0000000000000000 X4: 0000000000000010 X= 5: 0000000000000001 (XEN) [ 12.387555] X6: 00000a00004e5f40 X7: 00000a00004e5f38 X= 8: 0000000000000000 (XEN) [ 12.390027] X9: 00000a00004e5f20 X10: 00000a00004e5f30 X1= 1: 00000a00004e5f40 (XEN) [ 12.392510] X12: 00000a0000439748 X13: 00000a0000406938 X1= 4: 000000000000062e (XEN) [ 12.394954] X15: 00000a00004f3918 X16: 00000a00004c7bb5 X1= 7: 00000000004c7bb5 (XEN) [ 12.397293] X18: 0000000000000030 X19: 000000000000001d X2= 0: 00000000000000a9 (XEN) [ 12.399803] X21: 00000a00004c8008 X22: 00000a00003fa000 X2= 3: 00000a00004e2000 (XEN) [ 12.402392] X24: 00000a00003f9390 X25: 00000a00003fa000 X2= 6: 00000a00003f4ca8 (XEN) [ 12.404798] X27: 0000000000000002 X28: 00000a000057a9c0 F= P: 00000000bedb6740 (XEN) [ 12.407110] (XEN) [ 12.409442] VTCR_EL2: 0000000080023558 (XEN) [ 12.411291] VTTBR_EL2: 00000000bffc4000 (XEN) [ 12.412895] (XEN) [ 12.414204] SCTLR_EL2: 0000000030cd183d (XEN) [ 12.415928] HCR_EL2: 0000000000000039 (XEN) [ 12.417642] TTBR0_EL2: 000000004352d000 (XEN) [ 12.419152] (XEN) [ 12.420327] ESR_EL2: 000000008600000f (XEN) [ 12.422056] HPFAR_EL2: 0000000000000000 (XEN) [ 12.423809] FAR_EL2: 00000a00003ce000 ... (XEN) [ 12.485355] Xen call trace: (XEN) [ 12.489080] [<00000a00003ce000>] 00000a00003ce000 (PC) (XEN) [ 12.512076] [<00000a00004802f8>] init_constructors+0x38/0x5= 0 (LR) Observed failing symbol: _sub_I_00100_0 called from: init_constructors() The issue can be diagnosed by enabling linker orphan diagnostics or generating a linker map: LDFLAGS +=3D "--orphan-handling=3Dwarn" LDFLAGS +=3D "-Map=3Dxen.map" and then inspecting orphaned executable sections such as: .text.startup Collect .text.* whenever either CONFIG_CC_SPLIT_SECTIONS or CONFIG_COVERAGE is enabled. Apply the same change for arm, x86, riscv and ppc. Signed-off-by: Dmytro Prokopchuk --- xen/arch/arm/xen.lds.S | 2 +- xen/arch/ppc/xen.lds.S | 2 +- xen/arch/riscv/xen.lds.S | 2 +- xen/arch/x86/xen.lds.S | 2 +- 4 files changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index 2d5f1c516d..e1b179fe5f 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -41,7 +41,7 @@ SECTIONS *(.text.unlikely .text.*_unlikely .text.unlikely.*) =20 *(.text) -#ifdef CONFIG_CC_SPLIT_SECTIONS +#if defined(CONFIG_CC_SPLIT_SECTIONS) || defined(CONFIG_COVERAGE) *(.text.*) #endif =20 diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index d0f2ed43f1..6224c06ae8 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -34,7 +34,7 @@ SECTIONS *(.text.unlikely .text.*_unlikely .text.unlikely.*) =20 *(.text) -#ifdef CONFIG_CC_SPLIT_SECTIONS +#if defined(CONFIG_CC_SPLIT_SECTIONS) || defined(CONFIG_COVERAGE) *(.text.*) #endif =20 diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index 65f136dce9..7c19d2e9dd 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -24,7 +24,7 @@ SECTIONS *(.text.unlikely .text.*_unlikely .text.unlikely.*) =20 *(.text) -#ifdef CONFIG_CC_SPLIT_SECTIONS +#if defined(CONFIG_CC_SPLIT_SECTIONS) || defined(CONFIG_COVERAGE) *(.text.*) #endif =20 diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index b9e888e596..42a17f57e6 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -93,7 +93,7 @@ SECTIONS =20 *(.text.page_aligned) *(.text) -#ifdef CONFIG_CC_SPLIT_SECTIONS +#if defined(CONFIG_CC_SPLIT_SECTIONS) || defined(CONFIG_COVERAGE) *(.text.*) #endif *(.text.__x86_indirect_thunk_*) --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320180.1587557 (Exim 4.92) (envelope-from ) id 1wRznS-0004fj-7X; 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Also, drop "argo: " prefix, since it is also injected by argo_dprintk() Signed-off-by: Denis Mukhin Reviewed-by: Mykola Kvach --- Changes since v2: - n/a --- xen/common/argo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 98a3db7fd070..5da14c929e14 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -474,7 +474,7 @@ ring_unmap(const struct domain *d, struct argo_ring_info *ring_info) continue; ASSERT(!mfn_eq(ring_info->mfns[i], INVALID_MFN)); - argo_dprintk(XENLOG_ERR "argo: unmapping page %"PRI_mfn" from %p\n", + argo_dprintk("unmapping page %"PRI_mfn" from %p\n", mfn_x(ring_info->mfns[i]), ring_info->mfn_mapping[i]); unmap_domain_page_global(ring_info->mfn_mapping[i]); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320181.1587566 (Exim 4.92) (envelope-from ) id 1wRznT-0004tp-Iz; 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Remove duplicate prefixes from log messages in the Argo module where applicable. Signed-off-by: Denis Mukhin Reviewed-by: Mykola Kvach --- Changes since v2: - n/a --- xen/common/argo.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 5da14c929e14..ffa1f43437ab 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -1467,7 +1467,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_info *ring_info, if ( ring_info->mfns ) { /* Ring already existed: drop the previous mapping. */ - argo_dprintk("argo: vm%u re-register existing ring " + argo_dprintk("vm%u re-register existing ring " "(vm%u:%x vm%u) clears mapping\n", d->domain_id, ring_info->id.domain_id, ring_info->id.aport, ring_info->id.partner_id); @@ -1527,7 +1527,7 @@ find_ring_mfns(struct domain *d, struct argo_ring_info *ring_info, { ASSERT(ring_info->nmfns == NPAGES_RING(len)); - argo_dprintk("argo: vm%u ring (vm%u:%x vm%u) %p " + argo_dprintk("vm%u ring (vm%u:%x vm%u) %p " "mfn_mapping %p len %u nmfns %u\n", d->domain_id, ring_info->id.domain_id, ring_info->id.aport, ring_info->id.partner_id, ring_info, @@ -1741,7 +1741,7 @@ register_ring(struct domain *currd, list_add(&ring_info->node, &currd->argo->ring_hash[hash_index(&ring_info->id)]); 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Patch 1 lowers the verbosity of a spammy log message. Patch 2 corrects the debug logline. Patch 3 cleans up existing loglines by dropping duplicate prefixes. Patch 4 rewires argo_dprintk() to gprintk() to include more debugging context. Patch 5 adds new Kconfig for short-circuiting extra verbose Argo traces. Patch 6 enables extra verbose Argo traces in CI to make it easier to catch potential issues. CI: https://gitlab.com/xen-project/people/dmukhin/xen/-/pipelines/2554382112 Link to v2: https://lore.kernel.org/xen-devel/20260522165238.844649-1-dmukhin@ford.com/ Denis Mukhin (6): argo: lower level of noisy connection-refused log argo: correct logline in ring_unmap() argo: drop argo prefix from argo_dprintk() calls argo: fixup argo_dprintk() argo: introduce CONFIG_ARGO_DEBUG automation: enable Argo debugging in CI automation/gitlab-ci/build.yaml | 1 + xen/common/Kconfig | 7 +++++++ xen/common/argo.c | 22 ++++++++++------------ 3 files changed, 18 insertions(+), 12 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320179.1587548 (Exim 4.92) (envelope-from ) id 1wRznQ-0004SX-VW; Tue, 26 May 2026 21:58:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320179.1587548; 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Note that this also lowers the log level to debug when the argo_dprintk() facility is enabled. Signed-off-by: Denis Mukhin Reviewed-by: Mykola Kvach --- Changes since v2: - updated commit message --- xen/common/argo.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index 28626e00a8cb..98a3db7fd070 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -2034,10 +2034,9 @@ sendv(struct domain *src_d, xen_argo_addr_t *src_addr, src_id.domain_id); if ( !ring_info ) { - gprintk(XENLOG_ERR, - "argo: vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", - current->domain->domain_id, src_id.domain_id, src_id.aport, - dst_addr->domain_id, dst_addr->aport); + argo_dprintk("vm%u connection refused, src (vm%u:%x) dst (vm%u:%x)\n", + current->domain->domain_id, src_id.domain_id, src_id.aport, + dst_addr->domain_id, dst_addr->aport); ret = -ECONNREFUSED; } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320183.1587584 (Exim 4.92) (envelope-from ) id 1wRznY-0005Pm-8M; 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Signed-off-by: Denis Mukhin --- Changes since v2: - new patch --- xen/common/Kconfig | 7 +++++++ xen/common/argo.c | 3 +-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480eebe..adcdc51dd21b 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -491,6 +491,13 @@ config ARGO If unsure, say N. +config ARGO_DEBUG + bool "Argo: enable debug traces (UNSUPPORTED)" if ARGO + help + Enables extra debug traces for Argo debugging. + + If unsure, say N. + source "common/sched/Kconfig" config CRYPTO diff --git a/xen/common/argo.c b/xen/common/argo.c index 3c38a51d09a2..b9b362064e7e 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -318,10 +318,9 @@ static DEFINE_RWLOCK(L1_global_argo_rwlock); /* L1 */ ((LOCKING_Read_L1 && spin_is_locked(&(d)->argo->send_L2_lock)) || \ LOCKING_Write_L1) -#define ARGO_DEBUG 0 #define argo_dprintk(fmt, args...) \ do { \ - if ( ARGO_DEBUG ) \ + if ( IS_ENABLED(CONFIG_ARGO_DEBUG) ) \ gprintk(XENLOG_DEBUG, "argo: " fmt, ##args);\ } while ( 0 ) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320182.1587575 (Exim 4.92) (envelope-from ) id 1wRznV-00058u-S0; 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Rewire it through gprintk() to allow for better debugging context (such as domain ID). Signed-off-by: Denis Mukhin --- Changes since v2: - new patch --- xen/common/argo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/common/argo.c b/xen/common/argo.c index ffa1f43437ab..3c38a51d09a2 100644 --- a/xen/common/argo.c +++ b/xen/common/argo.c @@ -322,7 +322,7 @@ static DEFINE_RWLOCK(L1_global_argo_rwlock); /* L1 */ #define argo_dprintk(fmt, args...) \ do { \ if ( ARGO_DEBUG ) \ - printk(XENLOG_DEBUG "argo: " fmt, ##args); \ + gprintk(XENLOG_DEBUG, "argo: " fmt, ##args);\ } while ( 0 ) /* -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 21:58:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 21:58:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320189.1587593 (Exim 4.92) (envelope-from ) id 1wRznf-0005rB-Fs; Tue, 26 May 2026 21:58:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320189.1587593; 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Signed-off-by: Denis Mukhin --- Changes since v2: - new patch - example verbose log: https://gitlab.com/xen-project/people/dmukhin/xen/-/jobs/14552079442 --- automation/gitlab-ci/build.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 7f5b5938e851..5f9192e53d63 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -319,6 +319,7 @@ alpine-3.18-gcc-debug: CONFIG_EXPERT=y CONFIG_UNSUPPORTED=y CONFIG_ARGO=y + CONFIG_ARGO_DEBUG=y CONFIG_UBSAN=y CONFIG_UBSAN_FATAL=y CONFIG_MICROCODE_SCAN_DEFAULT=y -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Tue May 26 22:04:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 22:04:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320235.1587602 (Exim 4.92) (envelope-from ) id 1wRzsc-0000Ti-7M; Tue, 26 May 2026 22:04:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320235.1587602; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: <20260526203114.40882-1-jason.andryuk@amd.com> Content-Type: text/plain; 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In cpu_smpboot_free(), > each stubs area is checked against 0xcc. When all are set to 0xcc, the > page is freed. > > Booting a system with smt=0, CPU0 is initially setup, allocating the > stubs page and initializing to 0xcc. When more CPUs are brought up, > CPU1 is initialized and then immediately brough offline as it is the > sibling of CPU0. Since the page was initially memset with 0xcc, > cpu_smpboot_free() finds all stubs as 0xcc and frees the page. > However, the page is still assigned to CPU0 and continues to be assigned > to other CPUs. It's more complicated than this. With CONFIG_PV (and !opt_fred in 4.22 which is perhaps newer than you're testing), the LSTAR and CSTAR stubs guarantee that the 0xcc's are overwritten with real instructions. In !CONFIG_PV, the 0xcc's only get overwritten by the exception recovery selftests (CPU0 only, and gated on CONFIG_SELF_TESTS), and "complicated" instructions in the emulator (which in your safety environment, you likely have compiled out). So, in your environment, I think you probably can exclude the stubs entirely and trim even more LoC. > > Meanwhile the page can be reallocated, which can lead to misbehavior. > The particular instance was the stubs page re-used as a page table which > later faulted when the entry was all 0xcc. > > Change to initializing the page as 0xd6/STUB_BUF_FREE, and initializing > individual stubs as 0xcc/STUB_BUF_USED. 0xd6 now indicates unused, and > 0xcc indicates used/assigned. When freeing a CPU, the stub is set to > 0xd6, and the page is freed if all stubs are 0xd6. Initializing with > STUB_BUF_FREE lets cpu_smpboot_free() a page that was only ever > partially used. > > 0xd6/UDB is a 1 byte invalid opcode, which is similar to the existing > use of 0xcc. 0xd6 is used to identify bug frames, but the stub addr > (e.g. 0xffff82d07fffe000) fails the is_active_kernel_text() check. It > should be okay to use here. > > Fixes: 7a66ac8d1633 ("x86: move syscall trampolines off the stack") > Signed-off-by: Jason Andryuk > --- > It would be nice to use get_page()/put_page() to let count_info handle > reference counting, but they require an owning domain. > > The listed Fixes introduced the use of 0xcc, but the smt commit may have > made it more problematic. > Fixes: d8f974f1a646 ("x86: command line option to avoid use of secondary hyper-threads") Honestly, I dislike all of this "try to free data for going-offline CPUs".  It is both complex and a non-stop source of bugs for tantamount to 0 benefit. On x86, we must boot all CPUs we find in the MADT.  You're seeing this behaviour already.  This is because if an #MC hits any group of CPUs where any CR4.MCE=0, it's an instant reset. For this reason, firmware doesn't hand APs over to the OS in the Wait-for-SIPI state (which resets CR4 to 0); they're in MWAIT or IO-wait typically these days, using firmware provided stacks.  But firmware cannot handle an #MC intended for the OS, so the OS must set up stacks and at least an NMI and #MC handler even for those CPUs not wanting to run. This what park_offline_cpus is trying to do, and while it's set for Intel and clear for AMD, I'm pretty sure this is a bug on AMD because you can still get MCEs with core-scope groups. Beyond that,  smt=0 is an emergency bodge for speculation safety, which is always better done by changing SMT settings in the firmware.  xen-hptool is useful for testing but it's not a thing anyone uses in a production system. ACPI CPU hot-add does exist in virtual environments, but hot-remove is theoretical at best.  I've not seen any evidence of ACPI hotplug actually working on Xen, and I think the chances that it does are slim; it requires AML execution, and is right in the middle of the split-brain problem with physical vs virtual details that dom0 suffers. So, lets just allocate the stubs and "leak" them in testing scenarios.  It removes bugs and removes code, and has no effect on well-configured systems (where cpu offline is not used in practice). ~Andrew From xen-devel-bounces@lists.xenproject.org Tue May 26 22:12:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Tue, 26 May 2026 22:12:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320244.1587610 (Exim 4.92) (envelope-from ) id 1wS00h-0002Pz-Vo; Tue, 26 May 2026 22:12:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320244.1587610; Tue, 26 May 2026 22:12:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS00h-0002Ps-SQ; Tue, 26 May 2026 22:12:27 +0000 Received: by outflank-mailman (input) for mailman id 1320244; Tue, 26 May 2026 22:12:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS00g-0002Pm-Mb for xen-devel@lists.xenproject.org; Tue, 26 May 2026 22:12:26 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wS00g-00Ap4y-0a for xen-devel@lists.xenproject.org; Wed, 27 May 2026 00:12:26 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a161aaa-5cb7-0a2a0a5109dd-0a2a450385b8-32 for ; Wed, 27 May 2026 00:12:25 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a161ac8-672d-0a2a45030019-aceafc1f9f4a-3 for ; Wed, 27 May 2026 00:12:25 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id BBB5142AF1; Tue, 26 May 2026 22:12:23 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 589311F000E9; Tue, 26 May 2026 22:12:23 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:cc:Subject:In-Reply-To:References" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779833543; bh=iuKse6yTZ1PX4RYR/GqhfYIdwzjQF1nQ6wec/X1mD+4=; h=Date:From:To:cc:Subject:In-Reply-To:References; b=lvLJYgVbKE0o2NDi9ZKDtQlDRK1YH/kwEsU8UKpqRvieXNvdakksqYnIWKW21lbmy kX2ATZ9FyyTLesCXvXpetfjZ/C7MMohKX5uuboRmDufC90Aedu4IkxOHxY5i1LJfuq SJumL2nxiWqzzokAAktVY3yimy6gobNvxlQI/R5Im/pvTSMb3Iw5MqJrUJHo1NEdRa T9njIN5m+AIvr7S3DsmWDO+GutqLf2DbeCOaR+A4yG6qPgVGM/ZrrTFcMxdPxA4LD1 TpIJDk5QGYzlzH8iRbUvSodOvmi13k798rCUeMDAW1unb13vFviPNAlOTuccCUlKpW TKRDDUPt+egTg== Date: Tue, 26 May 2026 15:12:23 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Jan Beulich cc: Dmytro Prokopchuk1 , Andrew Cooper , Julien Grall , Stefano Stabellini , Anthony PERARD , Michal Orzel , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stewart Hildebrand , "xen-devel@lists.xenproject.org" Subject: Re: [PATCH] vPCI: resolve MISRA R10.1 boolean arithmetic type violation In-Reply-To: <984c91b8-3d2c-4431-bdf1-4a333ac341d1@suse.com> Message-ID: References: <984c91b8-3d2c-4431-bdf1-4a333ac341d1@suse.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-33051d/1779833545-41F90938-2E7A2FA5/0/0 X-purgate-type: clean X-purgate-size: 1947 On Fri, 22 May 2026, Jan Beulich wrote: > (extending Cc list) > > On 22.05.2026 08:13, Dmytro Prokopchuk1 wrote: > > --- a/xen/drivers/vpci/header.c > > +++ b/xen/drivers/vpci/header.c > > @@ -586,7 +586,7 @@ static void cf_check bar_write( > > if ( val != (uint32_t)(bar->addr >> (hi ? 32 : 0)) ) > > gprintk(XENLOG_WARNING, > > "%pp: ignored BAR %zu write while mapped\n", > > - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); > > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > > return; > > } > > > > @@ -647,7 +647,7 @@ static void cf_check guest_mem_bar_write(const struct pci_dev *pdev, > > if ( guest_addr != bar->guest_addr ) > > gprintk(XENLOG_WARNING, > > "%pp: ignored guest BAR %zu write while mapped\n", > > - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); > > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > > return; > > } > > bar->guest_addr = guest_addr; > > Well. If I'm not mistaken we had discussed situations like this (long ago). > Imo the added verbosity gets in the way of readability. If we absolutely > cannot or don't want to deviate such constructs (of which I expect we have > more), then we ought to consider alternatives (like changing the variables' > types in the case here). > > As to deviating: rules.rst, according to my reading, says that &, |, ^, or > shifts would be okay to use with a bool operand. What's wrong with also > permitting this for other operators? In my opinion, if we are going to treat bool as its own type, it makes sense not to silently mix bools into arithmetic with int types. I also do not find this patch less readable -- I actually find it more readable, since it makes it more obvious that hi is a bool. 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Constructors generated by coverage instrumentation can then point > at code outside the normal RX text mapping, leading to early boot crashes > from init_constructors(): > > (XEN) [ 12.331193] Instruction Abort Trap. Syndrome=0xf > (XEN) [ 12.334253] Walking Hypervisor VA 0xa00003ce000 on CPU0 via TTBR 0x000000004352d000 > (XEN) [ 12.338550] 0TH[0x014] = 0x4352cf7f > (XEN) [ 12.341823] 1ST[0x000] = 0x4352bf7f > (XEN) [ 12.345124] 2ND[0x001] = 0x40000043527f7f > (XEN) [ 12.347329] 3RD[0x1ce] = 0x400000433cef7f > (XEN) [ 12.351233] CPU0: Unexpected Trap: Instruction Abort > (XEN) [ 12.357643] ----[ Xen-4.21.1 arm64 debug=n gcov=y Not tainted ]---- > (XEN) [ 12.360243] CPU: 0 > (XEN) [ 12.364098] PC: 00000a00003ce000 00000a00003ce000 > (XEN) [ 12.375835] LR: 00000a00004802f8 > (XEN) [ 12.378273] SP: 00000a00004c7e10 > (XEN) [ 12.380492] CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) > (XEN) [ 12.382785] X0: 00000a00003ce000 X1: 0000000000000000 X2: 00000a0000410fa0 > (XEN) [ 12.385176] X3: 0000000000000000 X4: 0000000000000010 X5: 0000000000000001 > (XEN) [ 12.387555] X6: 00000a00004e5f40 X7: 00000a00004e5f38 X8: 0000000000000000 > (XEN) [ 12.390027] X9: 00000a00004e5f20 X10: 00000a00004e5f30 X11: 00000a00004e5f40 > (XEN) [ 12.392510] X12: 00000a0000439748 X13: 00000a0000406938 X14: 000000000000062e > (XEN) [ 12.394954] X15: 00000a00004f3918 X16: 00000a00004c7bb5 X17: 00000000004c7bb5 > (XEN) [ 12.397293] X18: 0000000000000030 X19: 000000000000001d X20: 00000000000000a9 > (XEN) [ 12.399803] X21: 00000a00004c8008 X22: 00000a00003fa000 X23: 00000a00004e2000 > (XEN) [ 12.402392] X24: 00000a00003f9390 X25: 00000a00003fa000 X26: 00000a00003f4ca8 > (XEN) [ 12.404798] X27: 0000000000000002 X28: 00000a000057a9c0 FP: 00000000bedb6740 > (XEN) [ 12.407110] > (XEN) [ 12.409442] VTCR_EL2: 0000000080023558 > (XEN) [ 12.411291] VTTBR_EL2: 00000000bffc4000 > (XEN) [ 12.412895] > (XEN) [ 12.414204] SCTLR_EL2: 0000000030cd183d > (XEN) [ 12.415928] HCR_EL2: 0000000000000039 > (XEN) [ 12.417642] TTBR0_EL2: 000000004352d000 > (XEN) [ 12.419152] > (XEN) [ 12.420327] ESR_EL2: 000000008600000f > (XEN) [ 12.422056] HPFAR_EL2: 0000000000000000 > (XEN) [ 12.423809] FAR_EL2: 00000a00003ce000 > ... > (XEN) [ 12.485355] Xen call trace: > (XEN) [ 12.489080] [<00000a00003ce000>] 00000a00003ce000 (PC) > (XEN) [ 12.512076] [<00000a00004802f8>] init_constructors+0x38/0x50 (LR) > > Observed failing symbol: > _sub_I_00100_0 > called from: > init_constructors() > The issue can be diagnosed by enabling linker orphan diagnostics or > generating a linker map: > LDFLAGS += "--orphan-handling=warn" > LDFLAGS += "-Map=xen.map" > and then inspecting orphaned executable sections such as: > .text.startup > > Collect .text.* whenever either CONFIG_CC_SPLIT_SECTIONS or > CONFIG_COVERAGE is enabled. > > Apply the same change for arm, x86, riscv and ppc. > > Signed-off-by: Dmytro Prokopchuk We already have --orphan-handling=warn.  We've talked about upgrading it to =error several times because things like this keep on happening. [edit] oh, we only have =warn on x86.  That explains why you didn't see it on ARM. The patch is perhaps ok at this juncture in 4.22, but see how x86 already suffers from the bug described by Linux's TEXT_SECTION to do with matching .text.startup, and the absence of .text.startup in other architectures means that the constructors (which should be going in .init) are being orphaned and outside of init in all the other architectures. I think we need to borrow Linux's workaround for this issue (which solves your orphaned section), and gather .text.startup properly in the non-x86 architectures, then organise =error everywhere and let randconfig loose on it. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 27 01:21:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 01:21:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320277.1587635 (Exim 4.92) (envelope-from ) id 1wS2xQ-0001jY-OV; Wed, 27 May 2026 01:21:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320277.1587635; Wed, 27 May 2026 01:21:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xQ-0001iZ-Hd; Wed, 27 May 2026 01:21:16 +0000 Received: by outflank-mailman (input) for mailman id 1320277; Wed, 27 May 2026 01:21:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xO-0001gH-Kt for xen-devel@lists.xenproject.org; Wed, 27 May 2026 01:21:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wS2xO-00Cdnu-13 for xen-devel@lists.xenproject.org; Wed, 27 May 2026 03:21:14 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1646e3-5cb7-0a2a0a5109dd-0a2a450a9be6-26 for ; Wed, 27 May 2026 03:21:13 +0200 Received: from [209.85.218.52] (helo=mail-ej1-f52.google.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a164709-56b3-0a2a450a0019-d155da34c1b0-3 for ; Wed, 27 May 2026 03:21:13 +0200 Received: by mail-ej1-f52.google.com with SMTP id a640c23a62f3a-bd4d7f4fa02so1884715366b.3 for ; Tue, 26 May 2026 18:21:13 -0700 (PDT) Received: from EPUAKYIW02F7.. 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In particular, GICv3 rejects a vCPU when the domain's redistributor layout has no MMIO slot covering that vCPU. However, the generic vGIC init path ignored the callback return value, so vcpu_create() could succeed with an invalid vGICv3 per-vCPU state. This can be reproduced on FVP Base RevC by exposing a 2 MiB GICv3 redistributor region to Dom0 and booting Xen with: maxcpus=1 dom0_max_vcpus=64 The host GICv3 redistributor range is: region 0: 0x0000002f100000 - 0x0000002f300000 With Xen's guest redistributor frame size of 128 KiB, that range covers 16 guest redistributors. vCPU16 and above have no corresponding redistributor slot. Before this fix, Xen detected the missing redistributors: d0: Unable to find a re-distributor for VCPU 16 ... d0: Unable to find a re-distributor for VCPU 63 but ignored the error and continued as if the secondary vCPUs had been created correctly. Dom0 then saw 64 possible CPUs and could hang during secondary CPU bring-up: smp: Bringing up secondary CPUs ... d0v15: vGICR: SGI: unhandled word write ... to ICACTIVER0 Propagate the vGIC vcpu_init() error so the caller can stop creating secondary vCPUs. With this fix, Dom0 construction reports: d0: Unable to find a re-distributor for VCPU 16 Failed to allocate d0v16 and the guest continues booting with the vCPUs created before the failure: smp: Brought up 1 node, 16 CPUs Free the private IRQ rank allocated by vcpu_vgic_init() on this error path. The caller will still run the generic vCPU creation cleanup, but XFREE() clears the pointer so that cleanup remains idempotent. Also fix the host-layout redistributor region count for the case where the requested vCPU count is larger than the capacity of all host redistributor regions. The old code always stored i + 1 after the loop. That is correct when the loop stops inside a valid region because the requested vCPU count is covered. If the loop exits after consuming all hardware regions, i is already equal to the number of allocated regions, so i + 1 records one region too many. In the same FVP setup, that off-by-one made Xen describe host-layout GICR state beyond the populated redistributor region list. Dom0 then accessed the GICR MMIO window described in its device tree, but Xen could not match the access to a valid emulated redistributor frame. During debugging this was seen as an unexpected vGICR access followed by a guest panic: d0v0: vGICR: unknown gpa read address 000000002f10ffe8 pc : gic_iterate_rdists+0x4c/0x104 Kernel panic - not syncing: Attempted to kill the idle task! Keep the existing construct_domain() policy used by Dom0 and dom0less domain construction: a failure to create a secondary vCPU stops the secondary vCPU creation loop, but does not fail the whole domain construction. Fixes: ea37fd21110b ("xen/arm: split vgic driver into generic and vgic-v2 driver") Fixes: 54ec59f6b0b3 ("xen/arm: vgic-v3: Don't create empty re-distributor regions") Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel --- Changes in v2: - use min(i + 1U, vgic_v3_hw.nr_rdist_regions) when limiting the host-layout redistributor region count. - keep the trailing blank line at the end of xen/arch/arm/vgic.c. - clarify that the best-effort secondary vCPU allocation failure policy is the existing construct_domain() policy for Dom0 and dom0less domains. --- xen/arch/arm/vgic-v3.c | 2 +- xen/arch/arm/vgic.c | 9 +++++++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c index 77517c3030..c1c4d6f71e 100644 --- a/xen/arch/arm/vgic-v3.c +++ b/xen/arch/arm/vgic-v3.c @@ -1834,7 +1834,7 @@ static int vgic_v3_domain_init(struct domain *d) * not match the number of pCPUs). Update the number of regions to * avoid exposing unused region as they will not get emulated. */ - d->arch.vgic.nr_regions = i + 1; + d->arch.vgic.nr_regions = min(i + 1U, vgic_v3_hw.nr_rdist_regions); d->arch.vgic.intid_bits = vgic_v3_hw.intid_bits; } diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c index 6647071ad4..e5aca17dcb 100644 --- a/xen/arch/arm/vgic.c +++ b/xen/arch/arm/vgic.c @@ -368,7 +368,7 @@ void domain_vgic_free(struct domain *d) int vcpu_vgic_init(struct vcpu *v) { - int i; + int i, ret; v->arch.vgic.private_irqs = xzalloc(struct vgic_irq_rank); if ( v->arch.vgic.private_irqs == NULL ) @@ -377,7 +377,12 @@ int vcpu_vgic_init(struct vcpu *v) /* SGIs/PPIs are always routed to this VCPU */ vgic_rank_init(v->arch.vgic.private_irqs, 0, v->vcpu_id); - v->domain->arch.vgic.handler->vcpu_init(v); + ret = v->domain->arch.vgic.handler->vcpu_init(v); + if ( ret ) + { + XFREE(v->arch.vgic.private_irqs); + return ret; + } memset(&v->arch.vgic.pending_irqs, 0, sizeof(v->arch.vgic.pending_irqs)); for (i = 0; i < 32; i++) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 01:21:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 01:21:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320278.1587640 (Exim 4.92) (envelope-from ) id 1wS2xR-0001pQ-0i; Wed, 27 May 2026 01:21:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320278.1587640; Wed, 27 May 2026 01:21:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xQ-0001og-Qw; Wed, 27 May 2026 01:21:16 +0000 Received: by outflank-mailman (input) for mailman id 1320278; Wed, 27 May 2026 01:21:16 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xP-0001gS-Us for xen-devel@lists.xenproject.org; Wed, 27 May 2026 01:21:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wS2xP-005m8e-BG for xen-devel@lists.xenproject.org; Wed, 27 May 2026 03:21:15 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1646e5-2eae-0a2a0a5409dd-0a2a450cd0b0-16 for ; Wed, 27 May 2026 03:21:15 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16470b-62f1-0a2a450c0019-d155da29c42d-3 for ; Wed, 27 May 2026 03:21:15 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bdb3eb93e20so1004846366b.0 for ; Tue, 26 May 2026 18:21:15 -0700 (PDT) Received: from EPUAKYIW02F7.. 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For GICv3 domains using the host memory layout, Xen can only create vCPUs whose virtual redistributor frame is covered by redistributor MMIO regions exposed for that layout. This can affect the hardware domain and direct-mapped domains. Document the GICv3-specific limit in the `cpus` property description in the Arm device-tree booting guide. Also add a generic domain-limit caveat to the `dom0_max_vcpus` command-line documentation. Signed-off-by: Mykola Kvach --- Changes in v2: - move the detailed GICv3 host-layout redistributor note from dom0_max_vcpus to the Arm device-tree booting documentation. - keep only a generic domain-limit note under dom0_max_vcpus. --- docs/misc/arm/device-tree/booting.txt | 9 +++++++++ docs/misc/xen-command-line.pandoc | 3 +++ 2 files changed, 12 insertions(+) diff --git a/docs/misc/arm/device-tree/booting.txt b/docs/misc/arm/device-tree/booting.txt index f73839df09..bcb06bc796 100644 --- a/docs/misc/arm/device-tree/booting.txt +++ b/docs/misc/arm/device-tree/booting.txt @@ -162,6 +162,15 @@ with the following properties: An integer specifying the number of vcpus to allocate to the guest. + The resulting number of vcpus is still subject to Xen's generic and + architecture-specific domain limits. On Arm GICv3 systems, each vcpu + needs a virtual redistributor frame. Domains using the host GIC layout, + such as the hardware domain or direct-mapped domains, can only use vcpus + whose virtual redistributor frame is covered by the redistributor MMIO + regions exposed for that layout. If the requested number of vcpus exceeds + that limit, Xen will create fewer vcpus than requested, stopping at the + first vcpu whose virtual redistributor frame is not covered. + - llc-colors A string specifying the LLC color configuration for the guest. Refer to docs/misc/cache_coloring.rst for syntax. This option is applicable diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index d46d5b2152..8c89b7852c 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1000,6 +1000,9 @@ For example, with `dom0_max_vcpus=4-8`: > 8 | 8 > 10 | 8 +The resulting number of Dom0 VCPUs is still subject to Xen's generic +and architecture-specific domain limits. + ### dom0_mem (ARM) > `= ` -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 01:21:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 01:21:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320276.1587629 (Exim 4.92) (envelope-from ) id 1wS2xQ-0001gg-EQ; Wed, 27 May 2026 01:21:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320276.1587629; Wed, 27 May 2026 01:21:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xQ-0001gZ-Aq; Wed, 27 May 2026 01:21:16 +0000 Received: by outflank-mailman (input) for mailman id 1320276; Wed, 27 May 2026 01:21:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS2xO-0001gG-Db for xen-devel@lists.xenproject.org; Wed, 27 May 2026 01:21:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wS2xN-00B6JG-Bv for xen-devel@lists.xenproject.org; Wed, 27 May 2026 03:21:13 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1646ea-e002-0a2a0a5209dd-0a2a45078a68-22 for ; Wed, 27 May 2026 03:21:13 +0200 Received: from [209.85.218.45] (helo=mail-ej1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a164709-229c-0a2a45070019-d155da2de053-3 for ; Wed, 27 May 2026 03:21:13 +0200 Received: by mail-ej1-f45.google.com with SMTP id a640c23a62f3a-bd01481e592so1555400566b.2 for ; Tue, 26 May 2026 18:21:13 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.25.69]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bddc5ece286sm550541266b.40.2026.05.26.18.21.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 May 2026 18:21:12 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779844873; x=1780449673; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=rZBAxVK5rUdy7lBSH0quiPGXRXut68rQ9vHGC1gb/6Y=; b=OQY0j1WXAaxilTEglP2AC8y1IMCMVA1GgsFnlC5bdGwNqD8zZw0m0jJBQfts0jFee2 /SP3lf41FK0tvLuZDVx81TDcL+vly3iWagz9zuVnRvhSb6YsbEp7TJph4stPfvt953IC HljfZdd0gUqTVchK335BUBolFQUrAdOQuSQ1U6SEc07VwHQtiQvulDIRjhzTQWpJT4Cd UlMMr1ip/PIRykJGfVWv21DPX4UhUorZr8+ji+pfCSegLmIK2IN0OweIaMVz5I38dSfg b5BEWMCzh2KMgVOCnxZFmrju6Lz+cj+XZPf0u6m766rKhh20nRSJpbl9sbOUEDkFsSHZ +QEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779844873; x=1780449673; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=rZBAxVK5rUdy7lBSH0quiPGXRXut68rQ9vHGC1gb/6Y=; b=BBg45ofLUWENMhqi7w3xm0Mh0NC/uGIQKFEYczBGq5q6ObdonGql9u90uWpqIWHcF7 Sarvgn+DV64goy+6cK/vG2h6nEsKpt4fvvMTD1SZIPuUEYQEXSx1C5WmhQ1rFSBYFiqg IqUi2m/am9FaOzD82Z/735s4oeL+jO9lHvxY+rhL6EULdclG/5XrOlnaWIOn5jCgCtB0 a4A+3/fYnFB0SF9vZE2kxxEDoVJs/qOcNiPhbF2DGOoELAuFD8W1zHAj1GVagDSRqhvM NLq8tAnucWCBGRHlpHSf1FuoJ43mNv6BH1UDPjA2SSNpr1PCAm839Rd969b0B1faTBnj qTGw== X-Gm-Message-State: AOJu0YzHN6HIfpJMjuHCBjPGYHnrqkxDVIUJbhhU9RLZzptUpcd2g7El Hb7kS8SR4+rVq3hiVXpgkPfU4vCV0t1FtQdcnZ4ehx5goIFZcJJeBVnSvvz8Kg== X-Gm-Gg: Acq92OFaY8OGqVJrxgjdLrdszEtJ7UScsu3NYqaTQO0yf2XCWK9ZGUz1DoW3VpPcJZh Ov/2c+JmjEQSfCWhsn9e3Fjjur34J4tR+alzVvNmxwGV9+au+Z1iDIe/ygQPUliK7V4qbIfrO+h K2wcxvAwKyubwZ7Yx9v0F6CCzeJDEssxkRDDNXh1SzoY74arK3mmh2u+QMuM9upgiWjfAK1Dms8 nTNzZR5tM+rXGa47LoHTn6o+BybS41BOkUGTRmw5YRP5nhGASRKXonHTcmBJPV9OlkIbBT3UNNf kRxcm7FmNoPuRONg5Z9iqEklSb+F/IhgjPNh9wuamwEvbgBBqpDMGbjTaczHBT4JEapQOmPOK8W 0BAmTuY+a3LuCjYJgAxTayWVJDZBoi9RC9FLADdT/dT2nfr7kqBOi01HQy8pLdAaDnqeq4wrFK3 PALOi4JhfVM2BAgHWst8wGRdTt6FkWgCFQmU0wda0D+PdGJOg= X-Received: by 2002:a17:907:3e03:b0:bd8:6ac6:d722 with SMTP id a640c23a62f3a-bdd25cecef9mr1216612266b.24.1779844872631; Tue, 26 May 2026 18:21:12 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Oleksii Kurochko Subject: [PATCH for-4.22 v2 0/2] xen/arm: handle vGIC vCPU init failures Date: Wed, 27 May 2026 04:18:49 +0300 Message-ID: X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1779844873-0A971C48-801E5C30/0/0 X-purgate-type: clean X-purgate-size: 2343 From: Mykola Kvach This series fixes two related GICv3 host-layout issues exposed when a boot-time domain requests more vCPUs than the guest-visible redistributor MMIO regions can cover. For domains using the host memory layout, Xen exposes GICv3 redistributor MMIO regions based on the host layout. Each vCPU needs a virtual redistributor frame covered by one of those regions. On FVP with a 2 MiB redistributor region, only 16 128 KiB guest redistributor frames are covered; a request for 64 vCPUs leaves vCPU16 and above without a corresponding redistributor frame. The vGICv3 per-vCPU init path detects this and rejects the first uncovered vCPU, but the generic vGIC init path ignored that error. As a result, vcpu_create() could succeed with invalid per-vCPU vGIC state, and the guest could observe more possible CPUs than Xen can back with emulated redistributors. There was also an off-by-one in the host-layout redistributor region count when all hardware regions had been consumed. That could make Xen describe a guest-visible GICR MMIO region beyond the populated redistributor region list. A guest access to that exposed window would then fail to match any emulated redistributor frame. Patch 1 fixes the vCPU creation path by propagating per-vCPU vGIC init failures, and also fixes the related host-layout redistributor region count so Xen does not expose an unbacked GICR window. Patch 2 documents the resulting Arm GICv3 host-layout constraint for boot-time domains and keeps dom0_max_vcpus documentation generic. Changes in v2: - use min(i + 1U, vgic_v3_hw.nr_rdist_regions) for the host-layout redistributor region count. - keep the trailing blank line at the end of xen/arch/arm/vgic.c. - move the detailed GICv3 host-layout documentation from dom0_max_vcpus to the Arm device-tree booting documentation. - add Michal's Reviewed-by tag to patch 1. Mykola Kvach (2): xen/arm: propagate vGIC vCPU init failures docs/arm: Document GICv3 vCPU limit for host-layout domains docs/misc/arm/device-tree/booting.txt | 9 +++++++++ docs/misc/xen-command-line.pandoc | 3 +++ xen/arch/arm/vgic-v3.c | 2 +- xen/arch/arm/vgic.c | 9 +++++++-- 4 files changed, 20 insertions(+), 3 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 05:29:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 05:29:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320340.1587661 (Exim 4.92) (envelope-from ) id 1wS6pW-0007Ba-NW; Wed, 27 May 2026 05:29:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320340.1587661; Wed, 27 May 2026 05:29:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wS6pW-0007BS-Hp; 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bh=svuX77SW8vnbvuY432YXCcgyEAAoT9OnatmzUJsU5Pk=; b=/c9o9AeZx/AgzOkNrdfyls5JuD0cV+Xo7TSwUxhCRyyZrMIKWJwdWkWqNfFDbC9nnWed+Y Zk+hBmRZXb1sZ+Dg== Date: Wed, 27 May 2026 07:29:18 +0200 Message-ID: <87y0h5whch.wl-tiwai@suse.de> From: Takashi Iwai To: =?ISO-8859-1?Q?C=E1ssio?= Gabriel Cc: Takashi Iwai , Oleksandr Andrushchenko , Jaroslav Kysela , xen-devel@lists.xenproject.org, linux-sound@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/2] ALSA: xen-front: Fix event channel stream lifetime bugs In-Reply-To: <20260526-alsa-xen-event-channel-fixes-v1-0-91d3a6a50778@gmail.com> References: <20260526-alsa-xen-event-channel-fixes-v1-0-91d3a6a50778@gmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) Emacs/30.2 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit X-Rspamd-Server: rspamd1.dmz-prg2.suse.org X-Rspamd-Action: no action X-Rspamd-Queue-Id: 513BB6B16B X-Spam-Flag: NO X-Spam-Score: -3.51 X-Spam-Level: X-Spamd-Result: default: False [-3.51 / 50.00]; BAYES_HAM(-3.00)[99.99%]; NEURAL_HAM_LONG(-1.00)[-1.000]; MID_CONTAINS_FROM(1.00)[]; R_DKIM_ALLOW(-0.20)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; NEURAL_HAM_SHORT(-0.20)[-1.000]; MIME_GOOD(-0.10)[text/plain]; MX_GOOD(-0.01)[]; FREEMAIL_TO(0.00)[gmail.com]; FREEMAIL_ENVRCPT(0.00)[gmail.com]; RCVD_VIA_SMTP_AUTH(0.00)[]; FUZZY_RATELIMITED(0.00)[rspamd.com]; MIME_TRACE(0.00)[0:+]; ARC_NA(0.00)[]; RCPT_COUNT_SEVEN(0.00)[7]; DNSWL_BLOCKED(0.00)[2a07:de40:b281:106:10:150:64:167:received,2a07:de40:b281:104:10:150:64:97:from]; DKIM_SIGNED(0.00)[suse.de:s=susede2_rsa,suse.de:s=susede2_ed25519]; FROM_EQ_ENVFROM(0.00)[]; FROM_HAS_DN(0.00)[]; TO_DN_SOME(0.00)[]; RCVD_TLS_ALL(0.00)[]; DBL_BLOCKED_OPENRESOLVER(0.00)[suse.de:mid,suse.de:dkim,imap1.dmz-prg2.suse.org:rdns,imap1.dmz-prg2.suse.org:helo]; RCVD_COUNT_TWO(0.00)[2]; TO_MATCH_ENVRCPT_ALL(0.00)[]; DKIM_TRACE(0.00)[suse.de:+] X-purgate-ID: tlsNG-c1860d/1779859759-B596DDB1-135ADA63/0/0 X-purgate-type: clean X-purgate-size: 959 On Tue, 26 May 2026 14:48:25 +0200, Cssio Gabriel wrote: > > Fix two related event-channel issues in the Xen ALSA frontend. > > The first patch resets the event channel's expected incoming event > id when a stream is cleared, and drops stale queued events from > the previous stream instance. > > The second patch keeps the request channel connected from .open(), > where it is needed for hw-rule queries and stream open requests, > but delays the event channel until after a successful .prepare(). > This prevents current-position events from reaching the ALSA position > handler before runtime buffer and period geometry are valid. > > Signed-off-by: Cssio Gabriel > --- > Cssio Gabriel (2): > ALSA: xen-front: Reset event channel state on stream clear > ALSA: xen-front: Connect event channel after stream prepare Applied both patches now to for-next branch. Thanks. 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pr=C Message-ID: Date: Wed, 27 May 2026 08:56:42 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH for-4.22 v2 2/2] docs/arm: Document GICv3 vCPU limit for host-layout domains To: Mykola Kvach , CC: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Oleksii Kurochko References: <0799399a712539130dbfced315d5abb8e20137ad.1779840898.git.mykola_kvach@epam.com> From: "Orzel, Michal" Content-Language: en-US In-Reply-To: <0799399a712539130dbfced315d5abb8e20137ad.1779840898.git.mykola_kvach@epam.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SJ1PEPF00001CE3:EE_|SA3PR12MB9200:EE_ X-MS-Office365-Filtering-Correlation-Id: cffb2ffc-a3e5-4302-ad81-08debbbd2182 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|7416014|36860700016|376014|1800799024|56012099006|4143699003|6133799003|11063799006|18002099003|22082099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2BuoibAlQBy2zcaclYaON7tzJBhjgvFrlZhRUTKC2fqo4SuU3jTsxouvCThFm8w694XMvhFOGvxE9L16kSy9nA9WhXWlOPBYuzMa73rerB6gmZ2X8c0ae8YzSLiEA3BxOy/DJbWZzF6HSCFyysnXFOGLeOicJyxumQNMsKGU2OXF3pVruHtximC1dAI54B/CWtwqUwn9qtCldAYKQqgcrm+Z72Zwx4MLRc56qoj9mhERB5ANnN8YLelcx1W77/oIsJ9ojIQVRHNiNkDLwYdd/5IHQvzAsMEskzJS+GpFoN7ddFta3vEMoSSgQ4aHhDvh2iTJCBy8u/QkLxxzs1MmgTJ2aef82C6UQ4q6Vy8xU0CDfUth7qvPTvaLIXT93nFGRCMbHLXjihfIvbRxjpxJPhJ+DD1Pg+O1+dm3LA8fJbcOr2vqF9+FHccGKjSNYgoz X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2026 06:56:51.7518 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: cffb2ffc-a3e5-4302-ad81-08debbbd2182 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00001CE3.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9200 X-purgate-ID: tlsNG-42698a/1779865019-20479F3B-CBC19789/0/0 X-purgate-type: clean X-purgate-size: 791 On 27-May-26 03:18, Mykola Kvach wrote: > From: Mykola Kvach > > The number of vCPUs requested for a boot-time Arm domain is not bounded > solely by Xen's generic domain limits. For GICv3 domains using the host > memory layout, Xen can only create vCPUs whose virtual redistributor > frame is covered by redistributor MMIO regions exposed for that layout. > > This can affect the hardware domain and direct-mapped domains. Document > the GICv3-specific limit in the `cpus` property description in the Arm > device-tree booting guide. Also add a generic domain-limit caveat to the > `dom0_max_vcpus` command-line documentation. > > Signed-off-by: Mykola Kvach Reviewed-by: Michal Orzel ~Michal From xen-devel-bounces@lists.xenproject.org Wed May 27 09:08:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 09:08:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320390.1587698 (Exim 4.92) (envelope-from ) id 1wSAFO-0001kf-I0; Wed, 27 May 2026 09:08:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320390.1587698; Wed, 27 May 2026 09:08:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSAFO-0001kX-DH; Wed, 27 May 2026 09:08:18 +0000 Received: by outflank-mailman (input) for mailman id 1320390; Wed, 27 May 2026 09:08:17 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSAFM-0001kR-Uz for xen-devel@lists.xenproject.org; Wed, 27 May 2026 09:08:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSAFM-004IlN-5t for xen-devel@lists.xenproject.org; Wed, 27 May 2026 11:08:16 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16b479-bab6-0a2a0a5309dd-0a2a4508c83a-44 for ; Wed, 27 May 2026 11:08:15 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16b47f-63b5-0a2a45080019-d155d02dd5c1-3 for ; Wed, 27 May 2026 11:08:15 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-67f94c078e8so2249774a12.1 for ; Wed, 27 May 2026 02:08:15 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLAPR03MB5571 X-purgate-ID: tlsNG-ef75cf/1779887862-2976AC48-91F5C3DF/0/0 X-purgate-type: clean X-purgate-size: 3917 On Tue, May 26, 2026 at 09:07:42PM +0000, Dmytro Prokopchuk1 wrote: > GCOV instrumentation can emit executable input sections such as > .text.startup and .text.exit when CONFIG_COVERAGE is enabled. > At present the Xen linker scripts only collect .text.* into the > main text output section when CONFIG_CC_SPLIT_SECTIONS is enabled. > > With CONFIG_COVERAGE=y and CONFIG_CC_SPLIT_SECTIONS=n, these executable > sections may be placed as linker orphans outside the expected Xen text > region. Constructors generated by coverage instrumentation can then point > at code outside the normal RX text mapping, leading to early boot crashes > from init_constructors(): > > (XEN) [ 12.331193] Instruction Abort Trap. Syndrome=0xf > (XEN) [ 12.334253] Walking Hypervisor VA 0xa00003ce000 on CPU0 via TTBR 0x000000004352d000 > (XEN) [ 12.338550] 0TH[0x014] = 0x4352cf7f > (XEN) [ 12.341823] 1ST[0x000] = 0x4352bf7f > (XEN) [ 12.345124] 2ND[0x001] = 0x40000043527f7f > (XEN) [ 12.347329] 3RD[0x1ce] = 0x400000433cef7f > (XEN) [ 12.351233] CPU0: Unexpected Trap: Instruction Abort > (XEN) [ 12.357643] ----[ Xen-4.21.1 arm64 debug=n gcov=y Not tainted ]---- > (XEN) [ 12.360243] CPU: 0 > (XEN) [ 12.364098] PC: 00000a00003ce000 00000a00003ce000 > (XEN) [ 12.375835] LR: 00000a00004802f8 > (XEN) [ 12.378273] SP: 00000a00004c7e10 > (XEN) [ 12.380492] CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) > (XEN) [ 12.382785] X0: 00000a00003ce000 X1: 0000000000000000 X2: 00000a0000410fa0 > (XEN) [ 12.385176] X3: 0000000000000000 X4: 0000000000000010 X5: 0000000000000001 > (XEN) [ 12.387555] X6: 00000a00004e5f40 X7: 00000a00004e5f38 X8: 0000000000000000 > (XEN) [ 12.390027] X9: 00000a00004e5f20 X10: 00000a00004e5f30 X11: 00000a00004e5f40 > (XEN) [ 12.392510] X12: 00000a0000439748 X13: 00000a0000406938 X14: 000000000000062e > (XEN) [ 12.394954] X15: 00000a00004f3918 X16: 00000a00004c7bb5 X17: 00000000004c7bb5 > (XEN) [ 12.397293] X18: 0000000000000030 X19: 000000000000001d X20: 00000000000000a9 > (XEN) [ 12.399803] X21: 00000a00004c8008 X22: 00000a00003fa000 X23: 00000a00004e2000 > (XEN) [ 12.402392] X24: 00000a00003f9390 X25: 00000a00003fa000 X26: 00000a00003f4ca8 > (XEN) [ 12.404798] X27: 0000000000000002 X28: 00000a000057a9c0 FP: 00000000bedb6740 > (XEN) [ 12.407110] > (XEN) [ 12.409442] VTCR_EL2: 0000000080023558 > (XEN) [ 12.411291] VTTBR_EL2: 00000000bffc4000 > (XEN) [ 12.412895] > (XEN) [ 12.414204] SCTLR_EL2: 0000000030cd183d > (XEN) [ 12.415928] HCR_EL2: 0000000000000039 > (XEN) [ 12.417642] TTBR0_EL2: 000000004352d000 > (XEN) [ 12.419152] > (XEN) [ 12.420327] ESR_EL2: 000000008600000f > (XEN) [ 12.422056] HPFAR_EL2: 0000000000000000 > (XEN) [ 12.423809] FAR_EL2: 00000a00003ce000 > ... > (XEN) [ 12.485355] Xen call trace: > (XEN) [ 12.489080] [<00000a00003ce000>] 00000a00003ce000 (PC) > (XEN) [ 12.512076] [<00000a00004802f8>] init_constructors+0x38/0x50 (LR) > > Observed failing symbol: > _sub_I_00100_0 > called from: > init_constructors() > The issue can be diagnosed by enabling linker orphan diagnostics or > generating a linker map: > LDFLAGS += "--orphan-handling=warn" > LDFLAGS += "-Map=xen.map" > and then inspecting orphaned executable sections such as: > .text.startup The x86 linker script does account for .text.startup in the .init section: DECL_SECTION(.init.text) { #endif _sinittext = .; *(.init.text) *(.text.startup) _einittext = .; I think you just need to copy this to the arches that don't have it? Thanks, Roger. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 3/9] x86/mm/pat: Convert collapse_pmd_page() to ptdescs Date: Wed, 27 May 2026 15:03:10 +0100 Message-ID: <20260527140316.294621-4-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1779890655-8316D161-6DF632E1/0/0 X-purgate-type: clean X-purgate-size: 1130 Convert collapse_pmd_page() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Signed-off-by: Vishal Moola --- arch/x86/mm/pat/set_memory.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index 93cb71451ce2..45623d4c24c9 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -1297,11 +1297,11 @@ static int collapse_pmd_page(pmd_t *pmd, unsigned long addr, list_add(&page_ptdesc(pmd_page(old_pmd))->pt_list, pgtables); if (IS_ENABLED(CONFIG_X86_32)) { - struct page *page; + struct ptdesc *ptdesc; /* Update all PGD tables to use the same large page */ - list_for_each_entry(page, &pgd_list, lru) { - pgd_t *pgd = (pgd_t *)page_address(page) + pgd_index(addr); + list_for_each_entry(ptdesc, &pgd_list, pt_list) { + pgd_t *pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); p4d_t *p4d = p4d_offset(pgd, addr); pud_t *pud = pud_offset(p4d, addr); pmd_t *pmd = pmd_offset(pud, addr); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320491.1587760 (Exim 4.92) (envelope-from ) id 1wSErl-00060G-9p; Wed, 27 May 2026 14:04:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320491.1587760; Wed, 27 May 2026 14:04:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErl-0005zT-68; Wed, 27 May 2026 14:04:13 +0000 Received: by outflank-mailman (input) for mailman id 1320491; Wed, 27 May 2026 14:04:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErj-0005xG-Vh for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErj-007NSK-Bg for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:11 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9d1-e002-0a2a0a5209dd-0a2a450ce74a-42 for ; Wed, 27 May 2026 16:04:11 +0200 Received: from [209.85.128.54] (helo=mail-wm1-f54.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9db-62f1-0a2a450c0019-d1558036b0ad-3 for ; Wed, 27 May 2026 16:04:11 +0200 Received: by mail-wm1-f54.google.com with SMTP id 5b1f17b1804b1-49039a8851fso62330125e9.2 for ; Wed, 27 May 2026 07:04:11 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 1/9] x86/mm/pat: Use IS_ENABLED() instead of ifdef Date: Wed, 27 May 2026 15:03:08 +0100 Message-ID: <20260527140316.294621-2-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779890651-E377ECF5-F5EE87C9/0/0 X-purgate-type: clean X-purgate-size: 1012 Use IS_ENABLED() to check if we are on 32 bit. This standardizes this check with the other 32 bit check in the file. No functional changes. Signed-off-by: Vishal Moola --- arch/x86/mm/pat/set_memory.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index d023a40a1e03..3b9032a3f315 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -888,8 +888,8 @@ static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) { /* change init_mm */ set_pte_atomic(kpte, pte); -#ifdef CONFIG_X86_32 - { + + if (IS_ENABLED(CONFIG_X86_32)) { struct page *page; list_for_each_entry(page, &pgd_list, lru) { @@ -905,7 +905,6 @@ static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) set_pte_atomic((pte_t *)pmd, pte); } } -#endif } static pgprot_t pgprot_clear_protnone_bits(pgprot_t prot) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320492.1587773 (Exim 4.92) (envelope-from ) id 1wSErm-0006NE-GE; Wed, 27 May 2026 14:04:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320492.1587773; Wed, 27 May 2026 14:04:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErm-0006N7-Ca; Wed, 27 May 2026 14:04:14 +0000 Received: by outflank-mailman (input) for mailman id 1320492; Wed, 27 May 2026 14:04:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErl-0005xO-6N for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErk-00ExJg-Hn for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:12 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9d1-2eae-0a2a0a5409dd-0a2a4509c408-40 for ; Wed, 27 May 2026 16:04:12 +0200 Received: from [209.85.128.48] (helo=mail-wm1-f48.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9db-2497-0a2a45090019-d1558030ec61-3 for ; Wed, 27 May 2026 16:04:12 +0200 Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-49056b9f04aso55003195e9.0 for ; Wed, 27 May 2026 07:04:12 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 2/9] x86/mm/pat: Convert __set_pmd_pte() to ptdescs Date: Wed, 27 May 2026 15:03:09 +0100 Message-ID: <20260527140316.294621-3-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779890652-8B193A53-D8C1918D/0/0 X-purgate-type: clean X-purgate-size: 1093 Convert __set_pmd_pte() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Signed-off-by: Vishal Moola --- arch/x86/mm/pat/set_memory.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c index 3b9032a3f315..93cb71451ce2 100644 --- a/arch/x86/mm/pat/set_memory.c +++ b/arch/x86/mm/pat/set_memory.c @@ -890,15 +890,15 @@ static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) set_pte_atomic(kpte, pte); if (IS_ENABLED(CONFIG_X86_32)) { - struct page *page; + struct ptdesc *ptdesc; - list_for_each_entry(page, &pgd_list, lru) { + list_for_each_entry(ptdesc, &pgd_list, pt_list) { pgd_t *pgd; p4d_t *p4d; pud_t *pud; pmd_t *pmd; - pgd = (pgd_t *)page_address(page) + pgd_index(address); + pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(address); p4d = p4d_offset(pgd, address); pud = pud_offset(p4d, address); pmd = pmd_offset(pud, address); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320490.1587756 (Exim 4.92) (envelope-from ) id 1wSErl-0005xV-33; Wed, 27 May 2026 14:04:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320490.1587756; Wed, 27 May 2026 14:04:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErk-0005xN-W6; Wed, 27 May 2026 14:04:12 +0000 Received: by outflank-mailman (input) for mailman id 1320490; Wed, 27 May 2026 14:04:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErj-0005xA-8v for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSEri-00DMLi-KS for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:10 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9cf-bab6-0a2a0a5309dd-0a2a4503c63c-36 for ; Wed, 27 May 2026 16:04:10 +0200 Received: from [209.85.218.48] (helo=mail-ej1-f48.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9da-672d-0a2a45030019-d155da30d476-3 for ; Wed, 27 May 2026 16:04:10 +0200 Received: by mail-ej1-f48.google.com with SMTP id a640c23a62f3a-bd9a71b565aso1401573966b.0 for ; Wed, 27 May 2026 07:04:10 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 0/9] Convert x86 pgd_lists to ptdescs Date: Wed, 27 May 2026 15:03:07 +0100 Message-ID: <20260527140316.294621-1-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779890650-3977E938-12FA18A4/0/0 X-purgate-type: clean X-purgate-size: 1840 This continues the ptdesc conversions for x86[1]. This is a necessary step in preparation for the separate allocation of ptdescs from struct page. Once ptdescs are not wrappers, the pgd_list should be used to find our ptdesc, not page. In fact, after patch 4 we can successfully boot a 32-bit x86 kernel that separately allocates ptdescs. All of the patches are rather straightforward, I just kept them split up for ease of review. There are no intended functional changes as ptdescs are currently still wrappers around struct page. [1] https://lore.kernel.org/linux-mm/20260211195233.368497-1-vishal.moola@gmail.com/ ---------------- I've compiled and booted both 64 and 32 bit on a kernel with separately allocated ptdescs. I ensured the codepaths were hit for all the changes except Xen. This applies cleanly to the tip bot. I'm thinking this can go through Dave's mm. Vishal Moola (9): x86/mm/pat: Use IS_ENABLED() instead of ifdef x86/mm/pat: Convert __set_pmd_pte() to ptdescs x86/mm/pat: Convert collapse_pmd_page() to ptdescs x86/mm: Convert arch_sync_kernel_mappings() to ptdescs x86/mm: Convert sync_global_pgds_l5() to ptdescs x86/mm: Convert sync_global_pgds_l4() to ptdescs x86/mm: Convert pgd_page_get_mm() to ptdescs x86/xen: Convert xen_mm_pin_all() to ptdescs x86/xen: Convert xen_mm_unpin_all() to ptdescs arch/x86/include/asm/pgtable.h | 2 +- arch/x86/include/asm/pgtable_types.h | 2 +- arch/x86/mm/fault.c | 8 ++++---- arch/x86/mm/init_64.c | 16 ++++++++-------- arch/x86/mm/pat/set_memory.c | 17 ++++++++--------- arch/x86/mm/pgtable.c | 4 ++-- arch/x86/xen/mmu_pv.c | 22 +++++++++++----------- 7 files changed, 35 insertions(+), 36 deletions(-) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320494.1587792 (Exim 4.92) (envelope-from ) id 1wSErr-0006ra-3n; Wed, 27 May 2026 14:04:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320494.1587792; Wed, 27 May 2026 14:04:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErr-0006rT-0B; Wed, 27 May 2026 14:04:19 +0000 Received: by outflank-mailman (input) for mailman id 1320494; Wed, 27 May 2026 14:04:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErp-0006c2-I9 for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSEro-00ExNd-UN for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:16 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9db-2eae-0a2a0a5409dd-0a2a4506a2cc-30 for ; Wed, 27 May 2026 16:04:16 +0200 Received: from [209.85.167.49] (helo=mail-lf1-f49.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e0-7371-0a2a45060019-d155a731e16b-3 for ; Wed, 27 May 2026 16:04:16 +0200 Received: by mail-lf1-f49.google.com with SMTP id 2adb3069b0e04-5aa4bb157c6so830371e87.3 for ; Wed, 27 May 2026 07:04:16 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 4/9] x86/mm: Convert arch_sync_kernel_mappings() to ptdescs Date: Wed, 27 May 2026 15:03:11 +0100 Message-ID: <20260527140316.294621-5-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1779890656-86369D75-90D0EC58/0/0 X-purgate-type: clean X-purgate-size: 1318 Convert arch_sync_kernel_mappings() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Following this patch, we can successfully boot a 32-bit x86 kernel with separately allocated ptdescs. Signed-off-by: Vishal Moola --- arch/x86/mm/fault.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 63de8e8684f2..6c72d6668416 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -269,17 +269,17 @@ void arch_sync_kernel_mappings(unsigned long start, unsigned long end) for (addr = start & PMD_MASK; addr >= TASK_SIZE_MAX && addr < VMALLOC_END; addr += PMD_SIZE) { - struct page *page; + struct ptdesc *ptdesc; spin_lock(&pgd_lock); - list_for_each_entry(page, &pgd_list, lru) { + list_for_each_entry(ptdesc, &pgd_list, pt_list) { spinlock_t *pgt_lock; /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(page)->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; spin_lock(pgt_lock); - vmalloc_sync_one(page_address(page), addr); + vmalloc_sync_one(ptdesc_address(ptdesc), addr); spin_unlock(pgt_lock); } spin_unlock(&pgd_lock); -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320495.1587798 (Exim 4.92) (envelope-from ) id 1wSErr-0006v4-Id; Wed, 27 May 2026 14:04:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320495.1587798; Wed, 27 May 2026 14:04:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErr-0006uj-Ae; Wed, 27 May 2026 14:04:19 +0000 Received: by outflank-mailman (input) for mailman id 1320495; Wed, 27 May 2026 14:04:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErq-0006fh-7K for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErp-007NWT-JI for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:17 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9e1-5cb7-0a2a0a5109dd-0a2a4505b586-2 for ; Wed, 27 May 2026 16:04:17 +0200 Received: from [209.85.218.41] (helo=mail-ej1-f41.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e1-aaa8-0a2a45050019-d155da29e59f-3 for ; Wed, 27 May 2026 16:04:17 +0200 Received: by mail-ej1-f41.google.com with SMTP id a640c23a62f3a-bd4f8260e4eso2081869366b.1 for ; Wed, 27 May 2026 07:04:17 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 5/9] x86/mm: Convert sync_global_pgds_l5() to ptdescs Date: Wed, 27 May 2026 15:03:12 +0100 Message-ID: <20260527140316.294621-6-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779890657-E3788443-8F7770FC/0/0 X-purgate-type: clean X-purgate-size: 1410 Convert sync_global_pgds_l5() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Signed-off-by: Vishal Moola --- arch/x86/mm/init_64.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index df27379d4bb4..e89b51aea2cf 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -136,7 +136,7 @@ static void sync_global_pgds_l5(unsigned long start, unsigned long end) for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { const pgd_t *pgd_ref = pgd_offset_k(addr); - struct page *page; + struct ptdesc *ptdesc; /* Check for overflow */ if (addr < start) @@ -146,13 +146,13 @@ static void sync_global_pgds_l5(unsigned long start, unsigned long end) continue; spin_lock(&pgd_lock); - list_for_each_entry(page, &pgd_list, lru) { + list_for_each_entry(ptdesc, &pgd_list, pt_list) { pgd_t *pgd; spinlock_t *pgt_lock; - pgd = (pgd_t *)page_address(page) + pgd_index(addr); + pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(page)->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; spin_lock(pgt_lock); if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320496.1587809 (Exim 4.92) (envelope-from ) id 1wSErs-0007Hg-Mj; Wed, 27 May 2026 14:04:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320496.1587809; Wed, 27 May 2026 14:04:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErs-0007H6-IO; Wed, 27 May 2026 14:04:20 +0000 Received: by outflank-mailman (input) for mailman id 1320496; Wed, 27 May 2026 14:04:19 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErr-0006rS-5X for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErq-007NXm-Hg for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:18 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9de-e002-0a2a0a5209dd-0a2a4509cc72-24 for ; Wed, 27 May 2026 16:04:18 +0200 Received: from [209.85.128.46] (helo=mail-wm1-f46.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e2-2497-0a2a45090019-d155802ef19e-3 for ; Wed, 27 May 2026 16:04:18 +0200 Received: by mail-wm1-f46.google.com with SMTP id 5b1f17b1804b1-49050bfe053so22221805e9.3 for ; Wed, 27 May 2026 07:04:18 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 6/9] x86/mm: Convert sync_global_pgds_l4() to ptdescs Date: Wed, 27 May 2026 15:03:13 +0100 Message-ID: <20260527140316.294621-7-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779890658-37F7EA53-6C38714A/0/0 X-purgate-type: clean X-purgate-size: 1497 Convert sync_global_pgds_l4() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Signed-off-by: Vishal Moola --- arch/x86/mm/init_64.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index e89b51aea2cf..a6ccb83f2d26 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -174,7 +174,7 @@ static void sync_global_pgds_l4(unsigned long start, unsigned long end) for (addr = start; addr <= end; addr = ALIGN(addr + 1, PGDIR_SIZE)) { pgd_t *pgd_ref = pgd_offset_k(addr); const p4d_t *p4d_ref; - struct page *page; + struct ptdesc *ptdesc; /* * With folded p4d, pgd_none() is always false, we need to @@ -187,15 +187,15 @@ static void sync_global_pgds_l4(unsigned long start, unsigned long end) continue; spin_lock(&pgd_lock); - list_for_each_entry(page, &pgd_list, lru) { + list_for_each_entry(ptdesc, &pgd_list, pt_list) { pgd_t *pgd; p4d_t *p4d; spinlock_t *pgt_lock; - pgd = (pgd_t *)page_address(page) + pgd_index(addr); + pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); p4d = p4d_offset(pgd, addr); /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(page)->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; spin_lock(pgt_lock); if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320497.1587820 (Exim 4.92) (envelope-from ) id 1wSErt-0007Zw-W3; Wed, 27 May 2026 14:04:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320497.1587820; Wed, 27 May 2026 14:04:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErt-0007Z5-Q5; Wed, 27 May 2026 14:04:21 +0000 Received: by outflank-mailman (input) for mailman id 1320497; Wed, 27 May 2026 14:04:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErs-0007At-DA for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:20 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErr-007NXm-PA for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:19 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9de-e002-0a2a0a5209dd-0a2a4509cc72-34 for ; Wed, 27 May 2026 16:04:19 +0200 Received: from [209.85.221.42] (helo=mail-wr1-f42.google.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e3-2497-0a2a45090019-d155dd2aa985-3 for ; Wed, 27 May 2026 16:04:19 +0200 Received: by mail-wr1-f42.google.com with SMTP id ffacd0b85a97d-43d75312379so9981903f8f.1 for ; Wed, 27 May 2026 07:04:19 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 7/9] x86/mm: Convert pgd_page_get_mm() to ptdescs Date: Wed, 27 May 2026 15:03:14 +0100 Message-ID: <20260527140316.294621-8-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779890659-8B193A53-29D2D9B8/0/0 X-purgate-type: clean X-purgate-size: 3613 Convert pgd_page_get_mm() to ptdescs. Define struct ptdesc in our pgtable_types so that our declarations recognize ptdesc as an appropriate page table type. Now that all callers are using ptdescs, we can pass in that ptdesc to get the underlying mm_struct. Signed-off-by: Vishal Moola --- arch/x86/include/asm/pgtable.h | 2 +- arch/x86/include/asm/pgtable_types.h | 2 +- arch/x86/mm/fault.c | 2 +- arch/x86/mm/init_64.c | 4 ++-- arch/x86/mm/pgtable.c | 4 ++-- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h index 2187e9cfcefa..20e8a6ddd2df 100644 --- a/arch/x86/include/asm/pgtable.h +++ b/arch/x86/include/asm/pgtable.h @@ -50,7 +50,7 @@ void ptdump_walk_user_pgd_level_checkwx(void); extern spinlock_t pgd_lock; extern struct list_head pgd_list; -extern struct mm_struct *pgd_page_get_mm(struct page *page); +struct mm_struct *pgd_page_get_mm(struct ptdesc *pt); extern pmdval_t early_pmd_flags; diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h index 2ec250ba467e..95c7f453db17 100644 --- a/arch/x86/include/asm/pgtable_types.h +++ b/arch/x86/include/asm/pgtable_types.h @@ -512,7 +512,7 @@ static inline pgprot_t pgprot_large_2_4k(pgprot_t pgprot) return __pgprot(protval_large_2_4k(pgprot_val(pgprot))); } - +struct ptdesc; typedef struct page *pgtable_t; extern pteval_t __supported_pte_mask; diff --git a/arch/x86/mm/fault.c b/arch/x86/mm/fault.c index 6c72d6668416..4d78c78a0bcc 100644 --- a/arch/x86/mm/fault.c +++ b/arch/x86/mm/fault.c @@ -276,7 +276,7 @@ void arch_sync_kernel_mappings(unsigned long start, unsigned long end) spinlock_t *pgt_lock; /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc)->page_table_lock; spin_lock(pgt_lock); vmalloc_sync_one(ptdesc_address(ptdesc), addr); diff --git a/arch/x86/mm/init_64.c b/arch/x86/mm/init_64.c index a6ccb83f2d26..a49be75dd713 100644 --- a/arch/x86/mm/init_64.c +++ b/arch/x86/mm/init_64.c @@ -152,7 +152,7 @@ static void sync_global_pgds_l5(unsigned long start, unsigned long end) pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc)->page_table_lock; spin_lock(pgt_lock); if (!pgd_none(*pgd_ref) && !pgd_none(*pgd)) @@ -195,7 +195,7 @@ static void sync_global_pgds_l4(unsigned long start, unsigned long end) pgd = (pgd_t *)ptdesc_address(ptdesc) + pgd_index(addr); p4d = p4d_offset(pgd, addr); /* the pgt_lock only for Xen */ - pgt_lock = &pgd_page_get_mm(ptdesc_page(ptdesc))->page_table_lock; + pgt_lock = &pgd_page_get_mm(ptdesc)->page_table_lock; spin_lock(pgt_lock); if (!p4d_none(*p4d_ref) && !p4d_none(*p4d)) diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c index da7f0a03cf90..070e3d310eca 100644 --- a/arch/x86/mm/pgtable.c +++ b/arch/x86/mm/pgtable.c @@ -74,9 +74,9 @@ static void pgd_set_mm(pgd_t *pgd, struct mm_struct *mm) virt_to_ptdesc(pgd)->pt_mm = mm; } -struct mm_struct *pgd_page_get_mm(struct page *page) +struct mm_struct *pgd_page_get_mm(struct ptdesc *pt) { - return page_ptdesc(page)->pt_mm; + return pt->pt_mm; } static void pgd_ctor(struct mm_struct *mm, pgd_t *pgd) -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320498.1587828 (Exim 4.92) (envelope-from ) id 1wSErv-0007rD-G7; Wed, 27 May 2026 14:04:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320498.1587828; Wed, 27 May 2026 14:04:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErv-0007qi-8S; Wed, 27 May 2026 14:04:23 +0000 Received: by outflank-mailman (input) for mailman id 1320498; Wed, 27 May 2026 14:04:22 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSEru-0007et-FG for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:22 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErt-007Nbf-RE for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:21 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9e1-5cb7-0a2a0a5109dd-0a2a4505b586-22 for ; Wed, 27 May 2026 16:04:21 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e5-aaa8-0a2a45050019-d155dd2df0c9-3 for ; Wed, 27 May 2026 16:04:21 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-43d73422431so8369225f8f.2 for ; Wed, 27 May 2026 07:04:21 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 8/9] x86/xen: Convert xen_mm_pin_all() to ptdescs Date: Wed, 27 May 2026 15:03:15 +0100 Message-ID: <20260527140316.294621-9-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779890661-E338A443-E4976255/0/0 X-purgate-type: clean X-purgate-size: 1161 Convert xen_mm_pin_all() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Continue checking PagePinned through the underlying page as we do not have a per-memdesc api for page flags yet. Signed-off-by: Vishal Moola --- arch/x86/xen/mmu_pv.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index 3eee5f84f8a7..b2f6e7b7c545 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -828,15 +828,15 @@ static void xen_pgd_pin(struct mm_struct *mm) */ void xen_mm_pin_all(void) { - struct page *page; + struct ptdesc *ptdesc; spin_lock(&init_mm.page_table_lock); spin_lock(&pgd_lock); - list_for_each_entry(page, &pgd_list, lru) { - if (!PagePinned(page)) { - __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page)); - SetPageSavePinned(page); + list_for_each_entry(ptdesc, &pgd_list, pt_list) { + if (!PagePinned(ptdesc_page(ptdesc))) { + __xen_pgd_pin(&init_mm, (pgd_t *)ptdesc_address(ptdesc)); + SetPageSavePinned(ptdesc_page(ptdesc)); } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:04:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:04:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320502.1587837 (Exim 4.92) (envelope-from ) id 1wSErx-0008Au-Os; Wed, 27 May 2026 14:04:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320502.1587837; Wed, 27 May 2026 14:04:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErx-0008AZ-Ik; Wed, 27 May 2026 14:04:25 +0000 Received: by outflank-mailman (input) for mailman id 1320502; Wed, 27 May 2026 14:04:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSErv-0007sq-QI for xen-devel@lists.xenproject.org; Wed, 27 May 2026 14:04:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSErv-007NdR-6K for xen-devel@lists.xenproject.org; Wed, 27 May 2026 16:04:23 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a16f9dc-e002-0a2a0a5209dd-0a2a450c88dc-38 for ; Wed, 27 May 2026 16:04:23 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a16f9e7-62f1-0a2a450c0019-d155d036a8e9-3 for ; Wed, 27 May 2026 16:04:23 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-6763cc8775cso21320353a12.0 for ; Wed, 27 May 2026 07:04:23 -0700 (PDT) Received: from fedora (cpc92878-cmbg18-2-0-cust539.5-4.cable.virginm.net. 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Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky , Vishal Moola Subject: [PATCH 9/9] x86/xen: Convert xen_mm_unpin_all() to ptdescs Date: Wed, 27 May 2026 15:03:16 +0100 Message-ID: <20260527140316.294621-10-vishal.moola@gmail.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779890663-E397DCF5-961EF6F7/0/0 X-purgate-type: clean X-purgate-size: 1246 Convert xen_mm_unpin_all() to ptdescs in preparation for the eventual splitting of ptdescs from struct page. Continue checking PagePinned through the underlying page as we do not have a per-memdesc api yet. Signed-off-by: Vishal Moola --- arch/x86/xen/mmu_pv.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/x86/xen/mmu_pv.c b/arch/x86/xen/mmu_pv.c index b2f6e7b7c545..c4731c1e842d 100644 --- a/arch/x86/xen/mmu_pv.c +++ b/arch/x86/xen/mmu_pv.c @@ -939,16 +939,16 @@ static void xen_pgd_unpin(struct mm_struct *mm) */ void xen_mm_unpin_all(void) { - struct page *page; + struct ptdesc *ptdesc; spin_lock(&init_mm.page_table_lock); spin_lock(&pgd_lock); - list_for_each_entry(page, &pgd_list, lru) { - if (PageSavePinned(page)) { - BUG_ON(!PagePinned(page)); - __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page)); - ClearPageSavePinned(page); + list_for_each_entry(ptdesc, &pgd_list, pt_list) { + if (PageSavePinned(ptdesc_page(ptdesc))) { + BUG_ON(!PagePinned(ptdesc_page(ptdesc))); + __xen_pgd_unpin(&init_mm, (pgd_t *)ptdesc_address(ptdesc)); + ClearPageSavePinned(ptdesc_page(ptdesc)); } } -- 2.54.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 14:14:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 14:14:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320570.1587850 (Exim 4.92) (envelope-from ) id 1wSF1v-00040v-La; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: CLZdttmxKNVDR45KOMIhpu+KAj67yu1aKyDJAxI/plDtKUmP8hWzT09MexgkxTR3o2xwViCo706S1pcN1q8Rb5YHYaINMWarb/xTYdIKzOvuk5Qtid6knCvtplz7jkaw++aIp5F4pHaW8KTvfT2eGhF7H6a6PN1kuUevFzEs1CFacwR/a7oc9l9oqEmJYy/2T+McADZvX6W89cOlYi12rJKFuFcCItGIIJ4T8ftKrZ5OFQUQCJWlH0fbcvIhvsyeL3kNF41Liujng0uvukiEhIRU30JCMesUFR61c3OS2jD3TB/kFoIMGu7RzqYHJ2g4Id8awiUfvFZY1Fe/NMd7y5PJiHVOB0nwX6O9PzOv+vkv8PQ6QKKO1NUbUgQ9831my6/2ZC00dV1IK5n4R8p1JJPZIcaTIkkbm/LXevsE6FXk/302Su1+bcF5IMnOlLax X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2026 14:14:30.3040 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a424e0bf-a82f-4333-6181-08debbfa44d2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002324.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN6PR12MB8472 X-purgate-ID: tlsNG-c1860d/1779891281-BED73DB1-31A7EC3F/0/0 X-purgate-type: clean X-purgate-size: 4784 On 2026-05-26 18:03, Andrew Cooper wrote: > On 26/05/2026 9:31 pm, Jason Andryuk wrote: >> A single stubs page is initialized with 0xcc and re-used, with multiple >> CPUs each using a portion of the shared page. In cpu_smpboot_free(), >> each stubs area is checked against 0xcc. When all are set to 0xcc, the >> page is freed. >> >> Booting a system with smt=0, CPU0 is initially setup, allocating the >> stubs page and initializing to 0xcc. When more CPUs are brought up, >> CPU1 is initialized and then immediately brough offline as it is the >> sibling of CPU0. Since the page was initially memset with 0xcc, >> cpu_smpboot_free() finds all stubs as 0xcc and frees the page. >> However, the page is still assigned to CPU0 and continues to be assigned >> to other CPUs. > > It's more complicated than this. > > With CONFIG_PV (and !opt_fred in 4.22 which is perhaps newer than you're > testing), the LSTAR and CSTAR stubs guarantee that the 0xcc's are > overwritten with real instructions. > > In !CONFIG_PV, the 0xcc's only get overwritten by the exception recovery > selftests (CPU0 only, and gated on CONFIG_SELF_TESTS), and "complicated" > instructions in the emulator (which in your safety environment, you > likely have compiled out). > > So, in your environment, I think you probably can exclude the stubs > entirely and trim even more LoC. Thanks. Ok, my build was !CONFIG_PV, so 0xcc's were not overwritten. The fault happened before the self tests ran. >> >> Meanwhile the page can be reallocated, which can lead to misbehavior. >> The particular instance was the stubs page re-used as a page table which >> later faulted when the entry was all 0xcc. >> >> Change to initializing the page as 0xd6/STUB_BUF_FREE, and initializing >> individual stubs as 0xcc/STUB_BUF_USED. 0xd6 now indicates unused, and >> 0xcc indicates used/assigned. When freeing a CPU, the stub is set to >> 0xd6, and the page is freed if all stubs are 0xd6. Initializing with >> STUB_BUF_FREE lets cpu_smpboot_free() a page that was only ever >> partially used. >> >> 0xd6/UDB is a 1 byte invalid opcode, which is similar to the existing >> use of 0xcc. 0xd6 is used to identify bug frames, but the stub addr >> (e.g. 0xffff82d07fffe000) fails the is_active_kernel_text() check. It >> should be okay to use here. >> >> Fixes: 7a66ac8d1633 ("x86: move syscall trampolines off the stack") >> Signed-off-by: Jason Andryuk >> --- >> It would be nice to use get_page()/put_page() to let count_info handle >> reference counting, but they require an owning domain. >> >> The listed Fixes introduced the use of 0xcc, but the smt commit may have >> made it more problematic. >> Fixes: d8f974f1a646 ("x86: command line option to avoid use of secondary hyper-threads") > > Honestly, I dislike all of this "try to free data for going-offline > CPUs".  It is both complex and a non-stop source of bugs for tantamount > to 0 benefit. > > On x86, we must boot all CPUs we find in the MADT.  You're seeing this > behaviour already.  This is because if an #MC hits any group of CPUs > where any CR4.MCE=0, it's an instant reset. > > For this reason, firmware doesn't hand APs over to the OS in the > Wait-for-SIPI state (which resets CR4 to 0); they're in MWAIT or IO-wait > typically these days, using firmware provided stacks.  But firmware > cannot handle an #MC intended for the OS, so the OS must set up stacks > and at least an NMI and #MC handler even for those CPUs not wanting to run. > > This what park_offline_cpus is trying to do, and while it's set for > Intel and clear for AMD, I'm pretty sure this is a bug on AMD because > you can still get MCEs with core-scope groups. > > > Beyond that,  smt=0 is an emergency bodge for speculation safety, which > is always better done by changing SMT settings in the firmware. I was asked to check something with SMT disabled, and I could not find SMT in my firmware. I looked for a while without success, and then set smt=0 :/ > xen-hptool is useful for testing but it's not a thing anyone uses in a > production system. > > ACPI CPU hot-add does exist in virtual environments, but hot-remove is > theoretical at best.  I've not seen any evidence of ACPI hotplug > actually working on Xen, and I think the chances that it does are slim; > it requires AML execution, and is right in the middle of the split-brain > problem with physical vs virtual details that dom0 suffers. > > > So, lets just allocate the stubs and "leak" them in testing scenarios. > It removes bugs and removes code, and has no effect on well-configured > systems (where cpu offline is not used in practice). Ok. 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> > > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > > > return; > > > } > > > > > > @@ -647,7 +647,7 @@ static void cf_check guest_mem_bar_write(const struct pci_dev *pdev, > > > if ( guest_addr != bar->guest_addr ) > > > gprintk(XENLOG_WARNING, > > > "%pp: ignored guest BAR %zu write while mapped\n", > > > - &pdev->sbdf, bar - pdev->vpci->header.bars + hi); > > > + &pdev->sbdf, bar - pdev->vpci->header.bars + (hi ? 1 : 0)); > > > return; > > > } > > > bar->guest_addr = guest_addr; > > > > Well. If I'm not mistaken we had discussed situations like this (long ago). > > Imo the added verbosity gets in the way of readability. If we absolutely > > cannot or don't want to deviate such constructs (of which I expect we have > > more), then we ought to consider alternatives (like changing the variables' > > types in the case here). > > > > As to deviating: rules.rst, according to my reading, says that &, |, ^, or > > shifts would be okay to use with a bool operand. What's wrong with also > > permitting this for other operators? > > In my opinion, if we are going to treat bool as its own type, it makes > sense not to silently mix bools into arithmetic with int types. I also > do not find this patch less readable -- I actually find it more > readable, since it makes it more obvious that hi is a bool. Another possibly less controversial option is doing the arithmetic based on the register value directly: (reg - PCI_BASE_ADDRESS_0) / 4. TBH that's likely faster than the dereferences done to get the base address of the bars array. Thanks, Roger. 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pr=C Message-ID: <64bf0848-f7be-40b2-a2f2-6999cdc9a64e@amd.com> Date: Wed, 27 May 2026 10:42:10 -0400 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] xen/x86: Change stub page freeing to fix smt=0 From: Jason Andryuk To: Andrew Cooper , CC: Jan Beulich , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Teddy Astie References: <20260526203114.40882-1-jason.andryuk@amd.com> <7a0f7653-a299-4ead-af6c-944b8ffbb73d@citrix.com> Content-Language: en-US In-Reply-To: Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B36D:EE_|DM4PR12MB5721:EE_ X-MS-Office365-Filtering-Correlation-Id: bd44cbdd-040f-4400-7f77-08debbfe26bd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700016|376014|1800799024|6133799003|11063799006|4143699003|3023799007|18002099003|22082099003|56012099006; X-Microsoft-Antispam-Message-Info: ohoUdRRlRKE8Bb+r9MJESGcysXbQTTFXd97hh1Wij/XE8LUYcQB9Wzf9/yp1tXYLNhMvSgY5UV/HyViPp3Eo7bp7QBbzL5+UA/jTYtNZIX0h4m4LWHLvDFb9DhjBlAYzKZrglx1BCoPPMpBE1Mm1NU+P1ZeLNwfE5M5XwvXNLBWkqG5KgOSQypiFL36iBVcbHfXIsfiON6jlBBxdHk4VTZMHyfWPbc1PquOf/+kpzaB2PkWAbmlupzxTbllee4RC764FMJtGmYyLF+5kxP0iLy72/2BUCFgXGUC6m9UcLH4drbYADusEN1ycUeQKWVMftdLtTbG8ZBS4T7Thhutrt1wc7QvKrAsKj5Yp2zZpEmtIHHJPHvnSByMFcJJIXZuodmphrQRPJOS9KRvtLqAfetJ+BCzfL4G6FAK5CATT9de5nKgDx8thN9oFKMLexN+yWeh8Zp6PPsdXPIDVmt0N9SRvEcOSINx47kHCLltczfMpaxaP14TMTvR7jx/BmfDmwodmo1mAuYjbnsSOoboQ5tzO4janPiYWC3E5tD/OKGd+gWLDqsRQRg3hx5vUmYECgFqW3LhyfQywIqZwmIqstUn4pH1GLmNJYa6fRs/AXSvcHI8/iYkv05sO6CmCXESxEUmoI+foZXzS5MM9NckI4qDvV5smNNpVttIhycjN0z6YzHROGhTg9oXCP1A/K9NoP+QkGa01/sBV34BlU7AXY6BT5wy3dmsNIeVpYFR5+fM= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(82310400026)(36860700016)(376014)(1800799024)(6133799003)(11063799006)(4143699003)(3023799007)(18002099003)(22082099003)(56012099006);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: qyEJ6cdxffft7qCnGqGFxcTpLwIXdDK/z61aAyNXRZQDUzlGTuGTtldLteRU17pp5twvOwwudp0mECxjeRU97ZbHRwLmBGHxTtdxqjp/1CE/m130DqJ0DPkw1oMOVgNjBVw52F+vd5DCEVVAVfqh079n0RqBkDnerpC+nzBCDl4wXNFbhOkP2H4DR3WAP49DxcSSfTDh23TJELAle8DFx/38M1+M8v42B1sQVlPFz4JYjZoHy7ulQCj2OKTuNAv0OH6oXRqmDKHTnWMck8UjDKxEk24EG07oXXZNbdOLRtS768ugDoWgvPWWNldJCMh5AhkVsC464UmK/fEeaZvBsfBiKw6JZyP3gOAPMOT9xOZcM76jKMUTg7zrg5vGira8kvC8TwZvtCwXsj3rilkV8WnkPzaNwbgxwUXQIUoOQvnNYLec6ZZhaNm+5iWAY6O4 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2026 14:42:17.8803 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bd44cbdd-040f-4400-7f77-08debbfe26bd X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B36D.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5721 X-purgate-ID: tlsNG-d25034/1779892951-D956FCF5-E645E397/0/0 X-purgate-type: clean X-purgate-size: 2239 On 2026-05-27 10:14, Jason Andryuk wrote: > On 2026-05-26 18:03, Andrew Cooper wrote: >> On 26/05/2026 9:31 pm, Jason Andryuk wrote: >>> A single stubs page is initialized with 0xcc and re-used, with multiple >>> CPUs each using a portion of the shared page.  In cpu_smpboot_free(), >>> each stubs area is checked against 0xcc.  When all are set to 0xcc, the >>> page is freed. >>> >>> Booting a system with smt=0, CPU0 is initially setup, allocating the >>> stubs page and initializing to 0xcc.  When more CPUs are brought up, >>> CPU1 is initialized and then immediately brough offline as it is the >>> sibling of CPU0.  Since the page was initially memset with 0xcc, >>> cpu_smpboot_free() finds all stubs as 0xcc and frees the page. >>> However, the page is still assigned to CPU0 and continues to be assigned >>> to other CPUs. >> >> It's more complicated than this. >> >> With CONFIG_PV (and !opt_fred in 4.22 which is perhaps newer than you're >> testing), the LSTAR and CSTAR stubs guarantee that the 0xcc's are >> overwritten with real instructions. >> >> In !CONFIG_PV, the 0xcc's only get overwritten by the exception recovery >> selftests (CPU0 only, and gated on CONFIG_SELF_TESTS), and "complicated" >> instructions in the emulator (which in your safety environment, you >> likely have compiled out). >> >> So, in your environment, I think you probably can exclude the stubs >> entirely and trim even more LoC. > > Thanks.  Ok, my build was !CONFIG_PV, so 0xcc's were not overwritten. > The fault happened before the self tests ran. Correction: It was after the self tests ran and during dom0 construction. (XEN) Pagetable walk from ffff830842652008: (XEN) L4[0x106] = 8000000079c72063 ffffffffffffffff (XEN) L3[0x021] = 0000000079ff3063 ffffffffffffffff (XEN) L2[0x013] = 000000085680f063 ffffffffffffffff (XEN) L1[0x052] = cccccccccccccccc ffffffffffffffff It looks like the page is reallocated after free-ing, so after CPU1 is down. The re-use would write the page with PTEs. However, when later CPUs are brought down, their portion of the stubs page is overwritten with 0xcc. I think that is how the page, as a page table, is corrupted. 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Under other circumstances I'd revert, but xenstored has gained a dependent use of DOMID_ANY. Fix up the remaining in-tree callers, which covers init-xenstore-domain and the python bindings. The Ocaml bindings, like libxc itself, expose this ABI detail to their caller, so need fixing individually. Leave a very clear message in CHANGELOG.md that all external callers need altering. Fixes: 23e2479ff9de ("xen/domain: introduce DOMID_ANY") Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Juergen Gross CC: Denis Mukhin CC: Oleksii Kurochko Both Roger and I said no to the DOMID_ANY change. We both think that there is still insufficient justification to be adding it as a new constant. Next time it's going to be a straight nack. --- CHANGELOG.md | 4 ++++ tools/helpers/init-xenstore-domain.c | 2 +- tools/python/xen/lowlevel/xc/xc.c | 2 +- 3 files changed, 6 insertions(+), 2 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 25f5a192ed48..1b54acf912a5 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD ### Changed + - Users of xc_domain_create() must now pass DOMID_ANY to obtain an + automatically allocated domid. The prior sentinel values (0 since the + birth of Xen, and DOMID_INVALID since Xen 4.21) now no longer represent a + wildcard input. - On x86: - Enable pf-fixup option by default for PVH dom0. diff --git a/tools/helpers/init-xenstore-domain.c b/tools/helpers/init-xenstore-domain.c index 01ca667d25d1..2be5831a578d 100644 --- a/tools/helpers/init-xenstore-domain.c +++ b/tools/helpers/init-xenstore-domain.c @@ -21,7 +21,7 @@ #define LAPIC_BASE_ADDRESS 0xfee00000UL -static uint32_t domid = ~0; +static uint32_t domid = DOMID_ANY; static char *kernel; static char *ramdisk; static char *flask; diff --git a/tools/python/xen/lowlevel/xc/xc.c b/tools/python/xen/lowlevel/xc/xc.c index 9feb12ae2b16..a94f01d40b58 100644 --- a/tools/python/xen/lowlevel/xc/xc.c +++ b/tools/python/xen/lowlevel/xc/xc.c @@ -118,7 +118,7 @@ static PyObject *pyxc_domain_create(XcObject *self, PyObject *args, PyObject *kwds) { - uint32_t dom = 0, target = 0, max_grant_version = 2; + uint32_t dom = DOMID_ANY, target = 0, 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tlsNG-ef75cf/1779901693-21B68C48-F486D864/10/73395122804 X-purgate-type: spam X-purgate-size: 2783 On Wed, May 27, 2026 at 05:57:58PM +0100, Andrew Cooper wrote: > Commit 23e2479ff9de ("xen/domain: introduce DOMID_ANY") broke at least: > > * xenstored domains > * The Python bindings > * The Ocaml bindings (i.e XAPI, and therefore XenServer/XCP-ng) > > by causing Xen to reject 0 (the wildcard sentinel for decades) and > DOMID_INVALID (a recently introduced wildcard sentinel) without adjusting the > callers of xc_domain_create(). > > Under other circumstances I'd revert, but xenstored has gained a dependent use > of DOMID_ANY. > > Fix up the remaining in-tree callers, which covers init-xenstore-domain and > the python bindings. The Ocaml bindings, like libxc itself, expose this ABI > detail to their caller, so need fixing individually. I think this will also affect the rust crate(s), even when those don't use the libxc bindings. > > Leave a very clear message in CHANGELOG.md that all external callers need > altering. > > Fixes: 23e2479ff9de ("xen/domain: introduce DOMID_ANY") > Signed-off-by: Andrew Cooper Acked-by: Roger Pau Monné > --- > CC: Anthony PERARD > CC: Michal Orzel > CC: Jan Beulich > CC: Julien Grall > CC: Roger Pau Monné > CC: Stefano Stabellini > CC: Juergen Gross > CC: Denis Mukhin > CC: Oleksii Kurochko > > Both Roger and I said no to the DOMID_ANY change. We both think that there is > still insufficient justification to be adding it as a new constant. Next time > it's going to be a straight nack. > --- > CHANGELOG.md | 4 ++++ > tools/helpers/init-xenstore-domain.c | 2 +- > tools/python/xen/lowlevel/xc/xc.c | 2 +- > 3 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/CHANGELOG.md b/CHANGELOG.md > index 25f5a192ed48..1b54acf912a5 100644 > --- a/CHANGELOG.md > +++ b/CHANGELOG.md > @@ -7,6 +7,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) > ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD > > ### Changed > + - Users of xc_domain_create() must now pass DOMID_ANY to obtain an > + automatically allocated domid. The prior sentinel values (0 since the > + birth of Xen, and DOMID_INVALID since Xen 4.21) now no longer represent a > + wildcard input. Maybe also mention XEN_DOMCTL_createdomain explicitly, to notice is not only the callers of libxc that needs adjustment, but also users of the hypercall itself not going through libxc. Thanks, Roger. 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The Ocaml bindings, like libxc itself, expose this ABI >> detail to their caller, so need fixing individually. > I think this will also affect the rust crate(s), even when those don't > use the libxc bindings. > >> Leave a very clear message in CHANGELOG.md that all external callers need >> altering. >> >> Fixes: 23e2479ff9de ("xen/domain: introduce DOMID_ANY") >> Signed-off-by: Andrew Cooper > Acked-by: Roger Pau Monné Thanks. > >> --- >> CC: Anthony PERARD >> CC: Michal Orzel >> CC: Jan Beulich >> CC: Julien Grall >> CC: Roger Pau Monné >> CC: Stefano Stabellini >> CC: Juergen Gross >> CC: Denis Mukhin >> CC: Oleksii Kurochko >> >> Both Roger and I said no to the DOMID_ANY change. We both think that there is >> still insufficient justification to be adding it as a new constant. Next time >> it's going to be a straight nack. >> --- >> CHANGELOG.md | 4 ++++ >> tools/helpers/init-xenstore-domain.c | 2 +- >> tools/python/xen/lowlevel/xc/xc.c | 2 +- >> 3 files changed, 6 insertions(+), 2 deletions(-) >> >> diff --git a/CHANGELOG.md b/CHANGELOG.md >> index 25f5a192ed48..1b54acf912a5 100644 >> --- a/CHANGELOG.md >> +++ b/CHANGELOG.md >> @@ -7,6 +7,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) >> ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD >> >> ### Changed >> + - Users of xc_domain_create() must now pass DOMID_ANY to obtain an >> + automatically allocated domid. The prior sentinel values (0 since the >> + birth of Xen, and DOMID_INVALID since Xen 4.21) now no longer represent a >> + wildcard input. > Maybe also mention XEN_DOMCTL_createdomain explicitly, to notice is > not only the callers of libxc that needs adjustment, but also users of > the hypercall itself not going through libxc. Good point.  I'll adjust to XEN_DOMCTL_createdomain/xc_domain_create() locally. ~Andrew From xen-devel-bounces@lists.xenproject.org Wed May 27 17:45:52 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 17:45:52 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320698.1587904 (Exim 4.92) (envelope-from ) id 1wSIK9-0001jt-4M; Wed, 27 May 2026 17:45:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320698.1587904; Wed, 27 May 2026 17:45:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSIK9-0001jl-0v; Wed, 27 May 2026 17:45:45 +0000 Received: by outflank-mailman (input) for mailman id 1320698; Wed, 27 May 2026 17:45:44 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSIK8-0001jf-5p for xen-devel@lists.xenproject.org; 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Wed, 27 May 2026 10:45:42 -0700 (PDT) From: Cody Zuschlag To: xen-devel@lists.xenproject.org Cc: andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org, Cody Zuschlag Subject: [PATCH v3] docs/process: document AI-assisted patch tags Date: Wed, 27 May 2026 19:45:28 +0200 Message-ID: <20260527174528.27903-1-cody.zuschlag@gmail.com> X-Mailer: git-send-email 2.45.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779903943-B735AFF4-90173066/0/0 X-purgate-type: clean X-purgate-size: 2447 Add documentation for the Assisted-by tag to clarify how AI-assisted tooling may be disclosed in Xen patches. The guidance follows the Linux kernel documentation. Assisted-by: ChatGPT:gpt-5.5 Signed-off-by: Cody Zuschlag --- Changes in v3: - Align wording more closely with Linux kernel guidance. - Use verbatim Linux wording where practical. - Use MUST NOT wording for AI agents adding Signed-off-by tags. Changes in v2: - Drop unintended executable bit change. docs/process/sending-patches.pandoc | 30 +++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/docs/process/sending-patches.pandoc b/docs/process/sending-patches.pandoc index 798ecceb..79e24af1 100644 --- a/docs/process/sending-patches.pandoc +++ b/docs/process/sending-patches.pandoc @@ -195,6 +195,27 @@ E.g.: Requested-by: Jane Doe +### Assisted-by: + +When AI tools contribute to Xen development, proper attribution +helps track the evolving role of AI in the development process. +Contributions should include an `Assisted-by:` tag in the +following format: + + Assisted-by: AGENT_NAME:MODEL_VERSION [TOOL1] [TOOL2] + +Where: + +* `AGENT_NAME` is the name of the AI tool or framework +* `MODEL_VERSION` is the specific model version used +* `[TOOL1] [TOOL2]` are optional specialized analysis tools used + (e.g., coccinelle, sparse, smatch, clang-tidy) + +Basic development tools (git, gcc, make, editors) should not be listed. + +Example: + + Assisted-by: Claude:claude-3-opus coccinelle sparse + ### Signed-off-by: This mandatory tag specifies the author(s) of a patch (for each author a @@ -209,6 +230,15 @@ E.g.: The author must be a natural person (not a team or just a company) and the `Signed-off-by:` tag must include the real name of the author (no pseudonym). +AI agents MUST NOT add `Signed-off-by:` tags. Only humans can legally +certify the Developer Certificate of Origin (DCO). The human submitter +is responsible for: + +* Reviewing all AI-generated code +* Ensuring compliance with licensing requirements +* Adding their own `Signed-off-by:` tag to certify the DCO +* Taking full responsibility for the contribution + By signing the patch with her/his name the author explicitly confirms to have made the contribution conforming to the `Developer's Certificate of Origin`: -- 2.45.0 From xen-devel-bounces@lists.xenproject.org Wed May 27 19:51:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 19:51:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320724.1587913 (Exim 4.92) (envelope-from ) id 1wSKI2-00020n-IH; Wed, 27 May 2026 19:51:42 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320724.1587913; Wed, 27 May 2026 19:51:42 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSKI2-00020g-FS; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 7mrwlqb9LoO4fS+M3XSfI+/Lgi+29PCLCTpChCn/6aa/1mnvSLhyH0kz7OPf5qxkQtdqc+oRCfDofrEHs+lNt2otmVKTGsS26s8DFhG2WSTm2Pq1LQkw6rVNzkD7bNjAU7O93G0SHnxn7vgKQcVYkF4FQb4/RUVoay0kB6xesBY39t/TAEytvsFDakUvPS5H33sIFl0S9WkLe0A2X4K7h/zEgSo/ahtASAstSB7HlWYwMrTDot4dsLlNOcxxydEqtSksylO2H1hp/UbMO+5Kj7+ODJrbS0Kfh/iAi3+YgbK80iDwzb5LM96YbH24T28RWipRDY9Yv0BR8j9UbXz15eyG+pJFHTN+lMrCLdpfPleGin6hhR0PNTiiZ0g/qKnEXsyTT2cxpwZgcbAjIQA7IwAT6Cnj5fm1sRbNuvfyEyaZIhwLyB2dDzP4c2kxdsyh X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 May 2026 19:51:28.9530 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fbfc10eb-ef4e-4d0d-88a8-08debc29580a X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN1PEPF00004687.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9271 X-purgate-ID: tlsNG-ebf023/1779911498-42B633FF-75671694/0/0 X-purgate-type: clean X-purgate-size: 947 On 5/26/26 06:09, Jürgen Groß wrote: > On 26.05.26 09:52, Furkan Caliskan wrote: >> Commit 6cb4b01c03 ("xen/sched: move schedulers and cpupool coding to >> dedicated directory") moved the scheduler files from xen/common/ to >> xen/common/sched and renamed some of them, but did not update the >> in-file path comments at the top of each file. >> >> Remove the comments rather than updating them, as they are redundant >> information already conveyed by the filename itself. >> >> Suggested-by: Roger Pau Monné >> Suggested-by: Juergen Gross >> Signed-off-by: Furkan Caliskan > > Reviewed-by: Juergen Gross For ARINC 653: Acked-by: Stewart Hildebrand FYI, we are in the release cycle for 4.22, and I'm not sure this is justified to be included in this release. IMO it would be OK to wait for the next cycle. From xen-devel-bounces@lists.xenproject.org Wed May 27 20:48:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 20:48:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320744.1587921 (Exim 4.92) (envelope-from ) id 1wSLAi-0000mv-K5; Wed, 27 May 2026 20:48:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320744.1587921; Wed, 27 May 2026 20:48:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSLAi-0000mn-Gx; Wed, 27 May 2026 20:48:12 +0000 Received: by outflank-mailman (input) for mailman id 1320744; Wed, 27 May 2026 20:48:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSLAg-0000mh-Ow for xen-devel@lists.xenproject.org; Wed, 27 May 2026 20:48:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSLAg-0097YP-52 for xen-devel@lists.xenproject.org; Wed, 27 May 2026 22:48:10 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a175836-5cb7-0a2a0a5109dd-0a2a45089f10-34 for ; Wed, 27 May 2026 22:48:10 +0200 Received: from [65.109.113.108] (helo=mail.alien8.de) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a175889-63b5-0a2a45080019-416d716c9cee-3 for ; Wed, 27 May 2026 22:48:09 +0200 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTP id 2B87C40E01B3; Wed, 27 May 2026 20:48:09 +0000 (UTC) Received: from mail.alien8.de ([127.0.0.1]) by localhost (mail.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id WxFx1lZgTAZy; Wed, 27 May 2026 20:47:59 +0000 (UTC) Received: from stx.tnic (unknown [IPv6:2600:1700:38ca:c00:b8a3:f58e:8829:9ca6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-256) server-digest SHA256) (No client certificate requested) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 9056640E0031; Wed, 27 May 2026 20:47:45 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=alien8 header.d=alien8.de header.i="@alien8.de" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" X-Virus-Scanned: Debian amavisd-new at mail.alien8.de Authentication-Results: mail.alien8.de (amavisd-new); dkim=pass (4096-bit key) header.d=alien8.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=alien8; t=1779914879; bh=wGjwOLOD2iq11IIumJe2A1oiDvFcnGWGdAgKbbBNxWo=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=M0s4fF+h/2ur885teZ75bctUV7OMk+0UCiWuuVLrDoB9fOUF/yGvYgm8zmYIwHrX4 Ip7imdYYM+mHtpFfhiwoXPXN9alY1zaSHkb4O8XCfDSd9NFiHScUjEeUXbql8vCCol LeTZ9lhtYZ/ylKubrIL4k8xKsCKcs/sV1s/WmKO2azfKjdZl8VqjpjWtcMHEvughXn U8SpwqRT74F1oEMHcVpp1RZYL6gMhaN15TmMJW94pFAeGQPWMBldniUH3GO+S+15Ma 6joU8np5OcZzV5IzEZ14SbFupTu8rRNG/cbS84F9yIDAxrZbj+omc3odjmMVER/mzY YC5r6wuAUI/9A0OzBeYzP5XRyx8RI4iw+PH95m6Rtxk5zaGK3X0DBZzjjLELzWCU2X aCNMn3FK20QAypGwt4I5H3ts+k1G4wI3dmtQO1jt6dSut9Gj4k1c/5tZAcC8G+Bc+n qQzXipnrLGZ9ltjzTAg9QMAFEk9iY52AKo3EsQjgaDVkfT6ul+O75MH5DITijKqCns +Z74tO5ZkPy+XSNrYAaRnqmQFqt6AgJUChBfZ/lCTnbQGTFbZ+aR1m6p63+KwD6e0x M/4RT1RBkadP5jA6WFgriTiERI8GKwPiKxG7Cqgn1zme83+5x1/S9Q6bhAYKOKXdVe IHiJAVwFKJ9VFz1PCodFxl70= Date: Wed, 27 May 2026 13:47:36 -0700 From: Borislav Petkov To: Mauricio Faria de Oliveira Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) Message-ID: <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> X-purgate-ID: tlsNG-c1860d/1779914890-BCF62DB1-A72754D2/0/0 X-purgate-type: clean X-purgate-size: 724 On Tue, May 26, 2026 at 11:52:32AM -0300, Mauricio Faria de Oliveira wrote: > The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. ... and we care about that particular configuration because...? > arch/x86/boot/string.c | 6 ++---- > arch/x86/include/asm/cpuid/api.h | 2 +- > arch/x86/include/asm/string.h | 21 +------------------- > arch/x86/include/asm/string_inline.h | 37 ++++++++++++++++++++++++++++++++++++ > arch/x86/platform/pvh/enlighten.c | 3 ++- > 5 files changed, 43 insertions(+), 26 deletions(-) I fail to see justification for those gymnastics. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette From xen-devel-bounces@lists.xenproject.org Wed May 27 21:39:32 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 21:39:32 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320771.1587931 (Exim 4.92) (envelope-from ) id 1wSLy9-0007to-8V; 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s=k20260515; t=1779917953; bh=Th5FpWk0uCEzs8ns78CFdL3HcGsGRPRpl1Wzv8iVOug=; h=Date:From:To:cc:Subject:In-Reply-To:References; b=d6XFrF7tqGMOpNGE3ymh+lFslb9spPfqmt1Q4+YyOxr4tyKz0TTe77rSTtdi8nw/o W9dw1S8lwKG4Qv7e6NvPj5QvEwCEkralbiFHXtJu57VIaFWC/FPsqC8qEGVpft2Cpa F1HNOasaBvsfkcIB4KRO/mbMLICxDcNRRjtI+AUB6J/7WPhtefnS77ON3DquQ2g+rk j8TE9pOYm+i4jIGYMw1XLKBRYnG/ZxMID26jhzc1lXHpzWI3TG9T3QBZIMNEpgCFOh YIA203UkgCusB44wmU5QK4dvjX9HRFlproAjoHZrvoFhWfLkScsGv5lootE1G6JNb8 xK2Af2CL3GaPQ== Date: Wed, 27 May 2026 14:39:12 -0700 (PDT) From: Stefano Stabellini X-X-Sender: sstabellini@ubuntu-linux-20-04-desktop To: Cody Zuschlag cc: xen-devel@lists.xenproject.org, andrew.cooper3@citrix.com, anthony.perard@vates.tech, michal.orzel@amd.com, jbeulich@suse.com, julien@xen.org, roger.pau@citrix.com, sstabellini@kernel.org Subject: Re: [PATCH v3] docs/process: document AI-assisted patch tags In-Reply-To: <20260527174528.27903-1-cody.zuschlag@gmail.com> Message-ID: References: <20260527174528.27903-1-cody.zuschlag@gmail.com> User-Agent: Alpine 2.22 (DEB 394 2020-01-19) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII X-purgate-ID: tlsNG-720697/1779917955-A9D77161-39C1F47A/0/0 X-purgate-type: clean X-purgate-size: 373 On Wed, 27 May 2026, Cody Zuschlag wrote: > Add documentation for the Assisted-by tag to clarify how > AI-assisted tooling may be disclosed in Xen patches. > > The guidance follows the Linux kernel documentation. > > Assisted-by: ChatGPT:gpt-5.5 > Signed-off-by: Cody Zuschlag Reviewed-by: Stefano Stabellini From xen-devel-bounces@lists.xenproject.org Wed May 27 22:50:04 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 22:50:04 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320794.1587940 (Exim 4.92) (envelope-from ) id 1wSN4R-0000Ux-12; Wed, 27 May 2026 22:49:51 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320794.1587940; Wed, 27 May 2026 22:49:51 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSN4Q-0000Uq-UA; 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Wed, 27 May 2026 22:49:46 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 180FC1F000E9; Wed, 27 May 2026 22:49:46 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779922186; bh=PY5zeAH8y8I+c7aveQ6/4ps0vQuGZRIQexgIvS04kLE=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=MqqBbfkJx/shQqdeO9/KsHJy4We2GaKKrTHbovtoy7c0zosO/jO0tGRiPceiIG5+s a1JYeWFhAby4DWgTTEXuqbDyCOkxMwUhAxfGM5PCaqjRt9r7QOhVzAGfFnRoDKXg6L ssoMdsyAY1euJRcKfqd209ZkXJvcvSEb79oqwuXw5oIf+Nr8Pq3wf4a5e80L7dZWKQ Cfb/8lo79/THtKbxFZ6vLBwwoBWbMuiXrMeywVycKsxsDSk67yPsJE4dhqW5s4PZje 4Fh++pIU91lkpV8gh+LMBLPMBTritQSSL5e/Q1NZaGgaAq0m6tfH9LkDG1y/GGUMx5 4afVkea7mmrzg== Date: Wed, 27 May 2026 15:49:44 -0700 From: Wei Liu To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Subject: Re: [PATCH v3 07/41] clocksource: hyper-v: Register sched_clock save/restore iff it's necessary Message-ID: <20260527224944.GE3518940@liuwe-devbox-debian-v2.local> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-8-seanjc@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260515191942.1892718-8-seanjc@google.com> X-purgate-ID: tlsNG-4011c0/1779922189-6F95E8B7-9EEB5490/0/0 X-purgate-type: clean X-purgate-size: 1341 On Fri, May 15, 2026 at 12:19:08PM -0700, Sean Christopherson wrote: > Register the Hyper-V reference counter (refcounter) callbacks for saving > and restoring its PV sched_clock, if and only if the refcounter is > actually being used for sched_clock. Currently, Hyper-V overrides the > save/restore hooks if the reference TSC available, whereas the Hyper-V > refcounter code only overrides sched_clock if the reference TSC is > available *and* it's not invariant. The flaw is effectively papered over > by invoking the "old" save/restore callbacks as part of save/restore, but > that's unnecessary and fragile. > > To avoid introducing more complexity, and to allow for additional cleanups > of the PV sched_clock code, move the save/restore hooks and logic into > hyperv_timer.c and simply wire up the hooks when overriding sched_clock > itself. > > Note, while the Hyper-V refcounter code is intended to be architecture > neutral, CONFIG_PARAVIRT is firmly x86-only, i.e. adding a small amount of > x86 specific code (which will be reduced in future cleanups) doesn't > meaningfully pollute generic code. > > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Acked-by: Wei Liu From xen-devel-bounces@lists.xenproject.org Wed May 27 22:50:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 22:50:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320799.1587950 (Exim 4.92) (envelope-from ) id 1wSN4r-0001qB-94; Wed, 27 May 2026 22:50:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320799.1587950; Wed, 27 May 2026 22:50:17 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSN4r-0001q3-4x; Wed, 27 May 2026 22:50:17 +0000 Received: by outflank-mailman (input) for mailman id 1320799; Wed, 27 May 2026 22:50:15 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSN4p-0001pk-ER for xen-devel@lists.xenproject.org; Wed, 27 May 2026 22:50:15 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSN4o-0003Si-Qk for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:50:14 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a177500-e002-0a2a0a5209dd-0a2a4508ba08-22 for ; Thu, 28 May 2026 00:50:14 +0200 Received: from [172.234.252.31] (helo=sea.source.kernel.org) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a177525-63b5-0a2a45080019-aceafc1fdf68-3 for ; Thu, 28 May 2026 00:50:14 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by sea.source.kernel.org (Postfix) with ESMTP id E51DD4093F; Wed, 27 May 2026 22:50:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3DB701F000E9; Wed, 27 May 2026 22:50:12 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779922212; bh=GkJ3bVBiuZQji2Ar/qCbKZ6GVH9IRMh8D8UCLnr9oL8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=nvHw6RfUo8q13AfIMSrfTXDnKC9TNLDz0TfgHCd2nAa7Rw0UjAxRs3PuQXAC70E4j dUV1hwv8WgHSfxZTiVKtOmKoDRBvPNTMpfcCslLv244RjTgo5c6gRI5GHB7zSHISWE +rOtjJEE4nQT8elNuQ+u2LpOrQI3xCZDHWpdl618JKxPF0n3G8f7YVeVwxbx6DPccG gNOhaGkupr2qae3+gXPonWvl/UxwhoB09REhet3n6B/5aJtpf6NgtajOJaN7jmtUW9 k8x/PEH/sgeC+TFB3zT6b58ZeWVmK9c5NvlRkPOwb6lxLgv8IM8cbHvhO9q+ci1l3c O7AO2Zur6/Jsw== Date: Wed, 27 May 2026 15:50:11 -0700 From: Wei Liu To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Subject: Re: [PATCH v3 08/41] clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers Message-ID: <20260527225011.GF3518940@liuwe-devbox-debian-v2.local> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-9-seanjc@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260515191942.1892718-9-seanjc@google.com> X-purgate-ID: tlsNG-c1860d/1779922214-BD360DB1-4C39A058/0/0 X-purgate-type: clean X-purgate-size: 474 On Fri, May 15, 2026 at 12:19:09PM -0700, Sean Christopherson wrote: > Now that all of the Hyper-V reference counter sched_clock code is located > in a single file, drop the superfluous wrappers for the save/restore flows. > > No functional change intended. > > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Acked-by: Wei Liu From xen-devel-bounces@lists.xenproject.org Wed May 27 22:50:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Wed, 27 May 2026 22:50:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320806.1587958 (Exim 4.92) (envelope-from ) id 1wSN5J-0002K9-F7; Wed, 27 May 2026 22:50:45 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320806.1587958; Wed, 27 May 2026 22:50:45 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSN5J-0002K2-Bs; Wed, 27 May 2026 22:50:45 +0000 Received: by outflank-mailman (input) for mailman id 1320806; Wed, 27 May 2026 22:50:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSN5H-0002Jc-98 for xen-devel@lists.xenproject.org; Wed, 27 May 2026 22:50:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSN5G-0003XJ-Lh for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:50:42 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a17750c-5cb7-0a2a0a5109dd-0a2a450ba522-36 for ; Thu, 28 May 2026 00:50:42 +0200 Received: from [172.105.4.254] (helo=tor.source.kernel.org) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a177541-212f-0a2a450b0019-ac6904feb280-3 for ; Thu, 28 May 2026 00:50:42 +0200 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id D7CE9605C1; Wed, 27 May 2026 22:50:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 07C7B1F000E9; Wed, 27 May 2026 22:50:40 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779922240; bh=9ySTpxezoAiBFX0/7zEUiI4eNm+Oaylf4HMVPn8Ys+k=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=fhw7S3jJcbuIlgSOp29WFGHzJGB8ddxj21QfNQC7Kt+/DuNhL3vzkfrKDOK2vHXpU 9u3VGq1FBhaFxNhXtDsHCGmQxkVUA9Ohv3lMJq9Az76x2nDOwUB6XMvehUlh9tTFoC EGh04Ya+JrGSncmzc441tVrPR6j2TzwyfIIw08LxXSPeFPEe6h/434pSvOdwDDpKsf 7oDoNQaqM5EhSla92HypgPbcuB4wUC2Nf3obbHOjWriw5lRJevLfjOdPHN4Upktnyr vdvGgOrWVDC3Yq5FtR1nZ8EZ9nncfapF6wZnVzmeAn8Aci91MUqjjSrAfcng/qGtOj ZNfnnt/SxyJXg== Date: Wed, 27 May 2026 15:50:38 -0700 From: Wei Liu To: Sean Christopherson Cc: Kiryl Shutsemau , Paolo Bonzini , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Dave Hansen , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , Thomas Gleixner , John Stultz , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , x86@kernel.org, linux-coco@lists.linux.dev, kvm@vger.kernel.org, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, Michael Kelley , Tom Lendacky , Nikunj A Dadhania , Thomas Gleixner , David Woodhouse Subject: Re: [PATCH v3 09/41] clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock Message-ID: <20260527225038.GG3518940@liuwe-devbox-debian-v2.local> References: <20260515191942.1892718-1-seanjc@google.com> <20260515191942.1892718-10-seanjc@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260515191942.1892718-10-seanjc@google.com> X-purgate-ID: tlsNG-42698a/1779922242-12573F3B-B5741393/0/0 X-purgate-type: clean X-purgate-size: 953 On Fri, May 15, 2026 at 12:19:10PM -0700, Sean Christopherson wrote: > Now that Hyper-V overrides the sched_clock save/restore hooks if and only > sched_clock itself is set to the Hyper-V reference counter, drop the > invocation of the "old" save/restore callbacks. When the registration of > the PV sched_clock was done separately from overriding the save/restore > hooks, it was possible for Hyper-V to clobber the TSC save/restore > callbacks without actually switching to the Hyper-V refcounter. > > Enabling a PV sched_clock is a one-way street, i.e. the kernel will never > revert to using TSC for sched_clock, and so there is no need to invoke the > TSC save/restore hooks (and if there was, it belongs in common PV code). > > Reviewed-by: Michael Kelley > Tested-by: Michael Kelley > Signed-off-by: Sean Christopherson Acked-by: Wei Liu From xen-devel-bounces@lists.xenproject.org Thu May 28 00:28:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320865.1587984 (Exim 4.92) (envelope-from ) id 1wSObe-0007hx-HI; Thu, 28 May 2026 00:28:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320865.1587984; Thu, 28 May 2026 00:28:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObe-0007hq-ED; Thu, 28 May 2026 00:28:14 +0000 Received: by outflank-mailman (input) for mailman id 1320865; Thu, 28 May 2026 00:28:13 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObc-0007Hq-UH for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:28:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSObc-000CGb-Ac for xen-devel@lists.xenproject.org; Thu, 28 May 2026 02:28:12 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a178bd3-2eae-0a2a0a5409dd-0a2a45068b06-18 for ; Thu, 28 May 2026 02:28:12 +0200 Received: from [209.85.218.50] (helo=mail-ej1-f50.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a178c1c-7371-0a2a45060019-d155da32ed7b-3 for ; Thu, 28 May 2026 02:28:12 +0200 Received: by mail-ej1-f50.google.com with SMTP id a640c23a62f3a-bce386d5b85so1842002666b.1 for ; Wed, 27 May 2026 17:28:12 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.25.69]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bddc5ece286sm655205266b.40.2026.05.27.17.28.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 17:28:10 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779928092; x=1780532892; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qdjncDbrY3UNar+wQG0hF6uZxmjzXxeMKUR7WBbGASk=; b=YMDvnVDBPtJoplOHMb2+wFUi/+pkS+kqRPY/yY5MxJScCmoValPvq8CfQrts38EA6E J2RbtR8+aC0hoN9k2+dEmI+FOD9C1KqZrOBvK3o2tj/ip41jNn6IFakU4tcGJR6usdnt t99wGVD8gdd63h/sP3obtzvsfbtvUZ1lrjrx2uRvNMahHBZfSVZyPlSbP853Him+aqCO x8bKy47oQ/vhf7U+HjnleCGokbPKpT03mNjWqNNWqW7WQaELg5N3hENJ3i8rb6e3hAgw oz2pRdQ0KEmSwzmM40aotX3keRglTFBsvfPZuTHORNOegFR8X/DBBbMnPPiZQBR9h+nN gqBw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779928092; x=1780532892; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=qdjncDbrY3UNar+wQG0hF6uZxmjzXxeMKUR7WBbGASk=; b=Hd6RAf4sXwbnj2tCLj7EX93ABNcsXXCkLniw3PVdm7bxR2jgP7U18o/CU1CUqoKDbD 4ZDrdvrlT+ptiOXoLllnReiL9DyEdcETnPmAq124qoD9J1Hk008jZLtx7fE511Ry0tmC rdir4dI59Umgu9Kr/MVEYtCYn+klCYDfp8ZwjI+qazOis2xxY7SFNGMuDzHmE6pFgKSt uA5whJJgl1loK+WFliuqlwVWnJPjQM2MKDAzLQN/y03mEqpuWrWg2J3M2pfJdYzC5mfD h5bCcexsQot7uUXGx6jyBdeRlf/X6/vy6hlN8kbttNy/kRYrHh+nBHlTj705VgdcgkJr 5gEQ== X-Gm-Message-State: AOJu0Yz1hQqHdW4VWjPJt8rxLh7g7ft5nlqpyABikm8HYSTX9EE3wGZC bDwXnnZ5AsGVpo2g7hdVg0wYYG8Vk7WFH6XayZc1u0NS2PnHVmAmT7xwXho6CQ== X-Gm-Gg: Acq92OEEonm8TKLhMby5ZnyhqdZ407u9VvUSglbI/tyGAMnBjfY9mIG92qpFQjIL5af 1kgT7cUpQ82pL0VGyZ/sIOqXQwnd5I6jgPJiIPbTb1TgHLFlSThsZ1eNRmVY4o9Z0qQYzAfUq0I i1042/eDq6xW6KHjiFy98mIkenoB4nLpdl/e9mY/D2dLDLqB0njxpEcUcR87WyoiyqU96+Qfurg cH2wlwm6tLTPTAz7F41tqawMqvoE5ig5lN4XMul34NMVl7MFdmoJHrjnTn8ylySG3l7E394xB2H cnZlnKYkaVPfjSVZg8KAGLB5zouAF47eR2+Zn3fyqVu5qWUhDSItSD+dp1p/WhS3Wx/YkwVTgzc hQwheZToMTNYfBn8wfUx1MeEfDX2MVdnts8sH0O4WT/b6J55RYqhxGuyTJuKX84YkVpj/na6l0x 09RUDM3XBvSMiZSC8GUijqtMY1jPSvsqDhRq4k X-Received: by 2002:a17:907:72d2:b0:bdb:4cf3:7035 with SMTP id a640c23a62f3a-bdd253390b1mr1374526266b.4.1779928091403; Wed, 27 May 2026 17:28:11 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Luca Fancellu , Volodymyr Babchuk Subject: [PATCH v2 2/4] xen/arm: its: separate ITS and host LPI quirk scopes Date: Thu, 28 May 2026 03:25:50 +0300 Message-ID: <5edcb9ec3e643133d115f009d0d942869ffb6955.1779922874.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1779928092-8FB93D75-D9199EAC/0/0 X-purgate-type: clean X-purgate-size: 18511 From: Mykola Kvach ITS quirks can impose restrictions on memory accessed by the ITS itself and on shared host LPI/Redistributor state. These scopes are not identical, so a single global ITS quirk state makes the host LPI policy depend implicitly on the quirks seen while initializing host ITSes. Add per-ITS quirk_flags to struct host_its and keep a separate host_lpi_flags state in the LPI code. The quirk table now records the ITS-private and host LPI scopes explicitly through its_flags and lpi_flags. The R-Car Gen4 quirk applies the same memory-related restrictions to both scopes, preserving the existing behavior without relying on an implicit aggregation step. This also removes the old assumption that all host ITSes must expose the same quirk state. Host LPI restrictions are accumulated only from quirk entries that explicitly set lpi_flags. Use per-ITS quirk_flags for GITS_CBASER, GITS_BASER and ITT allocations. Use host_lpi_flags directly in gic-v3-lpi.c for GICR_PROPBASER and GICR_PENDBASER setup. Memory-related quirk bits are named GICV3_QUIRK_MEM_* and are translated by shared gicv3_mem_get_*() helpers. Signed-off-by: Mykola Kvach --- Changes in v2: - Replace v1's single global ITS quirk flags and same-quirk validation with explicit per-ITS and host LPI quirk scopes. - Drop the v1 ITS pre-initialization approach from this patch; host LPI allocation ordering is fixed separately by moving it after ITS init. - Drop DT dma-noncoherent handling from this patch; firmware-provided non-coherency is handled separately with explicit ITS-node and GIC-node scopes. - Keep host_lpi_flags owned by gic-v3-lpi.c and update it only with quirk flags that explicitly apply to host LPI/Redistributor state. - Rename the current memory-related bits to GICV3_QUIRK_MEM_* and use shared gicv3_mem_get_*() helpers for register attributes and allocation flags. --- xen/arch/arm/gic-v3-its.c | 113 ++++++++++++-------------- xen/arch/arm/gic-v3-lpi.c | 44 ++++++++-- xen/arch/arm/include/asm/gic_v3_its.h | 19 +++-- 3 files changed, 101 insertions(+), 75 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index 7560d46c6d..dc48a84789 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -51,99 +51,81 @@ struct its_device { struct pending_irq *pend_irqs; /* One struct per event */ }; -/* - * It is unlikely that a platform implements ITSes with different quirks, - * so assume they all share the same. - */ struct its_quirk { const char *desc; - bool (*init)(struct host_its *hw_its); uint32_t iidr; uint32_t mask; + uint32_t its_flags; + /* + * lpi_flags are ORed into the global host LPI policy and must only + * contain additive restrictions. Non-additive LPI quirks need explicit + * handling. + */ + uint32_t lpi_flags; }; -static uint32_t __ro_after_init its_quirk_flags; - -static bool gicv3_its_enable_quirk_gen4(struct host_its *hw_its) -{ - its_quirk_flags |= HOST_ITS_WORKAROUND_NC_NS | - HOST_ITS_WORKAROUND_32BIT_ADDR; - - return true; -} - static const struct its_quirk its_quirks[] = { { .desc = "R-Car Gen4", .iidr = 0x0201743b, .mask = 0xffffffffU, - .init = gicv3_its_enable_quirk_gen4, + .its_flags = GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADDR, + .lpi_flags = GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADDR, }, { /* Sentinel. */ } }; -static struct its_quirk* gicv3_its_find_quirk(uint32_t iidr) +static const struct its_quirk *__init gicv3_its_find_quirk(uint32_t iidr) { const struct its_quirk *quirks = its_quirks; + /* + * The first matching quirk wins. More specific quirks must be listed + * before broader IIDR-only entries. + */ for ( ; quirks->desc; quirks++ ) { if ( quirks->iidr == (quirks->mask & iidr) ) - return (struct its_quirk *)quirks; + return quirks; } return NULL; } -static void gicv3_its_enable_quirks(struct host_its *hw_its) +static void __init gicv3_its_collect_quirks(struct host_its *hw_its) { uint32_t iidr = readl_relaxed(hw_its->its_base + GITS_IIDR); const struct its_quirk *quirk = gicv3_its_find_quirk(iidr); - if ( quirk && quirk->init(hw_its) ) - printk("GICv3: enabling workaround for ITS: %s\n", quirk->desc); -} - -static void gicv3_its_validate_quirks(void) -{ - const struct its_quirk *quirk = NULL, *prev = NULL; - const struct host_its *hw_its; - - if ( list_empty(&host_its_list) ) - return; - - hw_its = list_first_entry(&host_its_list, struct host_its, entry); - prev = gicv3_its_find_quirk(readl_relaxed(hw_its->its_base + GITS_IIDR)); - - list_for_each_entry(hw_its, &host_its_list, entry) + if ( quirk ) { - quirk = gicv3_its_find_quirk(readl_relaxed(hw_its->its_base + GITS_IIDR)); - BUG_ON(quirk != prev); - prev = quirk; + hw_its->quirk_flags |= quirk->its_flags; + gicv3_lpi_update_host_flags(quirk->lpi_flags); + printk("GICv3: enabling workaround for ITS: %s\n", quirk->desc); } } -uint64_t gicv3_its_get_cacheability(void) +uint64_t gicv3_mem_get_cacheability(uint32_t flags) { - if ( its_quirk_flags & HOST_ITS_WORKAROUND_NC_NS ) + if ( flags & GICV3_QUIRK_MEM_NC_NS ) return GIC_BASER_CACHE_nC; return GIC_BASER_CACHE_RaWaWb; } -uint64_t gicv3_its_get_shareability(void) +uint64_t gicv3_mem_get_shareability(uint32_t flags) { - if ( its_quirk_flags & HOST_ITS_WORKAROUND_NC_NS ) + if ( flags & GICV3_QUIRK_MEM_NC_NS ) return GIC_BASER_NonShareable; return GIC_BASER_InnerShareable; } -unsigned int gicv3_its_get_memflags(void) +unsigned int gicv3_mem_get_alloc_flags(uint32_t flags) { - if ( its_quirk_flags & HOST_ITS_WORKAROUND_32BIT_ADDR ) + if ( flags & GICV3_QUIRK_MEM_32BIT_ADDR ) return MEMF_bits(32); return 0; @@ -390,13 +372,17 @@ static void *its_map_cbaser(struct host_its *its) uint64_t reg; unsigned int order; void *buffer; + uint64_t cacheability = gicv3_mem_get_cacheability(its->quirk_flags); + uint64_t shareability = gicv3_mem_get_shareability(its->quirk_flags); + unsigned int memflags = gicv3_mem_get_alloc_flags(its->quirk_flags); - reg = gicv3_its_get_shareability() << GITS_BASER_SHAREABILITY_SHIFT; - reg |= GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILITY_SHIFT; - reg |= gicv3_its_get_cacheability() << GITS_BASER_INNER_CACHEABILITY_SHIFT; + reg = MASK_INSR(shareability, GITS_BASER_SHAREABILITY_MASK); + reg |= MASK_INSR(GIC_BASER_CACHE_SameAsInner, + GITS_BASER_OUTER_CACHEABILITY_MASK); + reg |= MASK_INSR(cacheability, GITS_BASER_INNER_CACHEABILITY_MASK); order = get_order_from_bytes(max(ITS_CMD_QUEUE_SZ, SZ_64K)); - buffer = alloc_xenheap_pages(order, gicv3_its_get_memflags()); + buffer = alloc_xenheap_pages(order, memflags); if ( !buffer ) return NULL; @@ -437,8 +423,8 @@ static void *its_map_cbaser(struct host_its *its) /* The ITS BASE registers work with page sizes of 4K, 16K or 64K. */ #define BASER_PAGE_BITS(sz) ((sz) * 2 + 12) -static int its_map_baser(void __iomem *basereg, uint64_t regc, - unsigned int nr_items) +static int its_map_baser(struct host_its *its, void __iomem *basereg, + uint64_t regc, unsigned int nr_items) { uint64_t attr, reg; unsigned int entry_size = GITS_BASER_ENTRY_SIZE(regc); @@ -446,10 +432,14 @@ static int its_map_baser(void __iomem *basereg, uint64_t regc, unsigned int table_size; unsigned int order; void *buffer; + uint64_t cacheability = gicv3_mem_get_cacheability(its->quirk_flags); + uint64_t shareability = gicv3_mem_get_shareability(its->quirk_flags); + unsigned int memflags = gicv3_mem_get_alloc_flags(its->quirk_flags); - attr = gicv3_its_get_shareability() << GITS_BASER_SHAREABILITY_SHIFT; - attr |= GIC_BASER_CACHE_SameAsInner << GITS_BASER_OUTER_CACHEABILITY_SHIFT; - attr |= gicv3_its_get_cacheability() << GITS_BASER_INNER_CACHEABILITY_SHIFT; + attr = MASK_INSR(shareability, GITS_BASER_SHAREABILITY_MASK); + attr |= MASK_INSR(GIC_BASER_CACHE_SameAsInner, + GITS_BASER_OUTER_CACHEABILITY_MASK); + attr |= MASK_INSR(cacheability, GITS_BASER_INNER_CACHEABILITY_MASK); /* * Setup the BASE register with the attributes that we like. Then read @@ -463,7 +453,7 @@ retry: table_size = min(table_size, 256U << BASER_PAGE_BITS(pagesz)); order = get_order_from_bytes(max(table_size, BIT(BASER_PAGE_BITS(pagesz), U))); - buffer = alloc_xenheap_pages(order, gicv3_its_get_memflags()); + buffer = alloc_xenheap_pages(order, memflags); if ( !buffer ) return -ENOMEM; @@ -562,7 +552,7 @@ static int gicv3_its_init_single_its(struct host_its *hw_its) if ( ret ) return ret; - gicv3_its_enable_quirks(hw_its); + gicv3_its_collect_quirks(hw_its); reg = readq_relaxed(hw_its->its_base + GITS_TYPER); hw_its->devid_bits = GITS_TYPER_DEVICE_ID_BITS(reg); @@ -584,18 +574,19 @@ static int gicv3_its_init_single_its(struct host_its *hw_its) case GITS_BASER_TYPE_NONE: continue; case GITS_BASER_TYPE_DEVICE: - ret = its_map_baser(basereg, reg, BIT(hw_its->devid_bits, UL)); + ret = its_map_baser(hw_its, basereg, reg, + BIT(hw_its->devid_bits, UL)); if ( ret ) return ret; break; case GITS_BASER_TYPE_COLLECTION: - ret = its_map_baser(basereg, reg, num_possible_cpus()); + ret = its_map_baser(hw_its, basereg, reg, num_possible_cpus()); if ( ret ) return ret; break; /* In case this is a GICv4, provide a (dummy) vPE table as well. */ case GITS_BASER_TYPE_VCPU: - ret = its_map_baser(basereg, reg, 1); + ret = its_map_baser(hw_its, basereg, reg, 1); if ( ret ) return ret; break; @@ -730,6 +721,7 @@ int gicv3_its_map_guest_device(struct domain *d, struct its_device *dev = NULL; struct rb_node **new = &d->arch.vgic.its_devices.rb_node, *parent = NULL; int i, ret = -ENOENT; /* "i" must be signed to check for >= 0 below. */ + unsigned int memflags; unsigned int order; hw_its = gicv3_its_find_by_doorbell(host_doorbell); @@ -793,8 +785,9 @@ int gicv3_its_map_guest_device(struct domain *d, ret = -ENOMEM; /* An Interrupt Translation Table needs to be 256-byte aligned. */ + memflags = gicv3_mem_get_alloc_flags(hw_its->quirk_flags); order = get_order_from_bytes(max(nr_events * hw_its->itte_size, 256UL)); - itt_addr = alloc_xenheap_pages(order, gicv3_its_get_memflags()); + itt_addr = alloc_xenheap_pages(order, memflags); if ( !itt_addr ) goto out_unlock; @@ -1206,8 +1199,6 @@ int gicv3_its_init(void) return ret; } - gicv3_its_validate_quirks(); - return 0; } diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 9ee338edc2..35f93e4756 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -78,9 +78,29 @@ struct lpi_redist_data { static DEFINE_PER_CPU(struct lpi_redist_data, lpi_redist); +/* + * Host LPI flags are scoped to shared LPI/Redistributor state, not to an + * ITS instance. Arm IHI 0069H.b section 5.1.1 says "LPI configuration is + * global". Section 12.11.33 (GICR_PROPBASER) makes mismatched values + * UNPREDICTABLE for Redistributors that share an LPI Configuration table + * while GICR_CTLR.EnableLPIs == 1. Section 12.11.32 (GICR_PENDBASER) + * similarly makes mismatched OuterCache, Shareability or InnerCache values + * across Redistributors UNPREDICTABLE while GICR_CTLR.EnableLPIs == 1. + * + * Keep this policy in the LPI code and accumulate only explicit LPI/RD + * restrictions into it. Per-ITS restrictions stay in host_its::quirk_flags + * for GITS_CBASER, GITS_BASER and ITT memory. + */ +static uint32_t __ro_after_init host_lpi_flags; + #define MAX_NR_HOST_LPIS (lpi_data.max_host_lpi_ids - LPI_OFFSET) #define HOST_LPIS_PER_PAGE (PAGE_SIZE / sizeof(union host_lpi)) +void __init gicv3_lpi_update_host_flags(uint32_t flags) +{ + host_lpi_flags |= flags; +} + static union host_lpi *gic_get_host_lpi(uint32_t plpi) { union host_lpi *block; @@ -228,6 +248,7 @@ static int gicv3_lpi_allocate_pendtable(unsigned int cpu) { void *pendtable; unsigned int order; + unsigned int memflags = gicv3_mem_get_alloc_flags(host_lpi_flags); if ( per_cpu(lpi_redist, cpu).pending_table ) return -EBUSY; @@ -239,7 +260,7 @@ static int gicv3_lpi_allocate_pendtable(unsigned int cpu) * physically contiguous memory. */ order = get_order_from_bytes(max(lpi_data.max_host_lpi_ids / 8, (unsigned long)SZ_64K)); - pendtable = alloc_xenheap_pages(order, gicv3_its_get_memflags()); + pendtable = alloc_xenheap_pages(order, memflags); if ( !pendtable ) return -ENOMEM; @@ -262,6 +283,8 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist_base) { const void *pendtable = this_cpu(lpi_redist).pending_table; uint64_t val; + uint64_t cacheability = gicv3_mem_get_cacheability(host_lpi_flags); + uint64_t shareability = gicv3_mem_get_shareability(host_lpi_flags); /* * The memory should have been allocated while preparing the CPU (or @@ -275,9 +298,10 @@ static int gicv3_lpi_set_pendtable(void __iomem *rdist_base) ASSERT(!(virt_to_maddr(pendtable) & ~GENMASK(51, 16))); - val = gicv3_its_get_cacheability() << GICR_PENDBASER_INNER_CACHEABILITY_SHIFT; - val |= GIC_BASER_CACHE_SameAsInner << GICR_PENDBASER_OUTER_CACHEABILITY_SHIFT; - val |= gicv3_its_get_shareability() << GICR_PENDBASER_SHAREABILITY_SHIFT; + val = MASK_INSR(cacheability, GICR_PENDBASER_INNER_CACHEABILITY_MASK); + val |= MASK_INSR(GIC_BASER_CACHE_SameAsInner, + GICR_PENDBASER_OUTER_CACHEABILITY_MASK); + val |= MASK_INSR(shareability, GICR_PENDBASER_SHAREABILITY_MASK); val |= GICR_PENDBASER_PTZ; val |= virt_to_maddr(pendtable); @@ -304,10 +328,13 @@ static int gicv3_lpi_set_proptable(void __iomem * rdist_base) { uint64_t reg; unsigned int order; + uint64_t cacheability = gicv3_mem_get_cacheability(host_lpi_flags); + uint64_t shareability = gicv3_mem_get_shareability(host_lpi_flags); - reg = gicv3_its_get_cacheability() << GICR_PROPBASER_INNER_CACHEABILITY_SHIFT; - reg |= GIC_BASER_CACHE_SameAsInner << GICR_PROPBASER_OUTER_CACHEABILITY_SHIFT; - reg |= gicv3_its_get_shareability() << GICR_PROPBASER_SHAREABILITY_SHIFT; + reg = MASK_INSR(cacheability, GICR_PROPBASER_INNER_CACHEABILITY_MASK); + reg |= MASK_INSR(GIC_BASER_CACHE_SameAsInner, + GICR_PROPBASER_OUTER_CACHEABILITY_MASK); + reg |= MASK_INSR(shareability, GICR_PROPBASER_SHAREABILITY_MASK); /* * The property table is shared across all redistributors, so allocate @@ -317,9 +344,10 @@ static int gicv3_lpi_set_proptable(void __iomem * rdist_base) { /* The property table holds one byte per LPI. */ void *table; + unsigned int memflags = gicv3_mem_get_alloc_flags(host_lpi_flags); order = get_order_from_bytes(max(lpi_data.max_host_lpi_ids, (unsigned long)SZ_4K)); - table = alloc_xenheap_pages(order, gicv3_its_get_memflags()); + table = alloc_xenheap_pages(order, memflags); if ( !table ) return -ENOMEM; diff --git a/xen/arch/arm/include/asm/gic_v3_its.h b/xen/arch/arm/include/asm/gic_v3_its.h index fc5a84892c..3e8dcc4ae9 100644 --- a/xen/arch/arm/include/asm/gic_v3_its.h +++ b/xen/arch/arm/include/asm/gic_v3_its.h @@ -105,13 +105,15 @@ #define GICV3_ITS_SIZE SZ_128K #include +#include #include #define HOST_ITS_FLUSH_CMD_QUEUE (1U << 0) #define HOST_ITS_USES_PTA (1U << 1) -#define HOST_ITS_WORKAROUND_NC_NS (1U << 0) -#define HOST_ITS_WORKAROUND_32BIT_ADDR (1U << 1) +/* GICv3 memory-related quirk flags. */ +#define GICV3_QUIRK_MEM_NC_NS (1U << 0) +#define GICV3_QUIRK_MEM_32BIT_ADDR (1U << 1) /* We allocate LPIs on the hosts in chunks of 32 to reduce handling overhead. */ #define LPI_BLOCK 32U @@ -128,6 +130,11 @@ struct host_its { unsigned int itte_size; spinlock_t cmd_lock; void *cmd_buf; + /* + * Workaround flags scoped to this ITS instance, including memory + * accessed through GITS_CBASER, GITS_BASER and ITT memory. + */ + uint32_t quirk_flags; unsigned int flags; }; @@ -157,6 +164,7 @@ int gicv3_lpi_init_rdist(void __iomem * rdist_base); /* Initialize the host structures for LPIs and the host ITSes. */ int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits); int gicv3_its_init(void); +void __init gicv3_lpi_update_host_flags(uint32_t flags); /* Store the physical address and ID for each redistributor as read from DT. */ void gicv3_set_redist_address(paddr_t address, unsigned int redist_id); @@ -199,10 +207,9 @@ struct pending_irq *gicv3_assign_guest_event(struct domain *d, void gicv3_lpi_update_host_entry(uint32_t host_lpi, int domain_id, uint32_t virt_lpi); -/* ITS quirks handling. */ -uint64_t gicv3_its_get_cacheability(void); -uint64_t gicv3_its_get_shareability(void); -unsigned int gicv3_its_get_memflags(void); +uint64_t gicv3_mem_get_cacheability(uint32_t flags); +uint64_t gicv3_mem_get_shareability(uint32_t flags); +unsigned int gicv3_mem_get_alloc_flags(uint32_t flags); #else -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 00:28:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320863.1587966 (Exim 4.92) (envelope-from ) id 1wSObc-0007Hz-Vp; Thu, 28 May 2026 00:28:12 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320863.1587966; Thu, 28 May 2026 00:28:12 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObc-0007Hr-SV; Thu, 28 May 2026 00:28:12 +0000 Received: by outflank-mailman (input) for mailman id 1320863; Thu, 28 May 2026 00:28:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSOba-0007He-GT for xen-devel@lists.xenproject.org; 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Patch 1 is the release-critical fix. It moves host LPI initialization after gicv3_its_init(), so that the host LPI allocation path observes the ITS quirks discovered during ITS initialization. This patch is intended for 4.22. Patches 2-4 are follow-up cleanup and DT attribute handling. They are included to show the intended direction and to avoid carrying the old global ITS quirk model forward, but they are not required for taking the 4.22 fix if the release freeze makes that preferable. The main change from v1 is that this version no longer tries to pre-initialize ITS quirks before host LPI setup. Instead, the minimal fix is to defer the existing host LPI initialization until after ITS initialization. The follow-up patches then split the quirk state by scope: * per-ITS flags are used for memory/state accessed by a particular ITS, such as GITS_CBASER, GITS_BASER and ITT memory; * host LPI flags are used for shared Redistributor/LPI state, such as GICR_PROPBASER and GICR_PENDBASER. This avoids relying on an implicit global aggregation of per-ITS quirk state. If an ITS-discovered quirk also affects the host LPI/Redistributor path, that effect is now expressed explicitly through the quirk entry's lpi_flags. The series also handles the DT dma-noncoherent property according to the node where it appears. An ITS subnode property affects only the corresponding ITS. A top-level GIC node property affects only the host LPI/Redistributor policy. The property is not inherited implicitly between the parent GIC node and ITS subnodes. The Orange Pi 5 / RK3588-specific quirk patch from v1 has been dropped. The previous version modelled the issue as a 32-bit ITS addressing restriction. This version handles the relevant non-coherent/non-shareable GIC integration through the standard DT dma-noncoherent property on the GIC and ITS nodes instead. --- Changes since v1 * Reordered the series so that the minimal host LPI initialization ordering fix is first. Patch 1 is intended for 4.22. * Dropped the v1 ITS pre-initialization hook. * Moved the existing gicv3_lpi_init_host_lpis() call after gicv3_its_init() instead, so host LPI state is allocated after ITS workaround discovery. * Checked the return value from gicv3_lpi_init_host_lpis() and made failure fatal once the ITS/LPI path is enabled. * Replaced the old single global ITS quirk state with separate per-ITS and host LPI quirk scopes. * Removed the implicit aggregation of all per-ITS quirks into the host LPI policy. Host LPI effects are now expressed explicitly with lpi_flags. * Kept per-ITS flags for ITS-private allocations: - GITS_CBASER; - GITS_BASER; - ITT memory. * Kept host LPI flags for Redistributor/LPI state: - GICR_PROPBASER; - GICR_PENDBASER. * Refactored ITS quirk matching from fixed IIDR/mask fields to a generic match(hw_its, data) callback plus opaque data. * Kept first-match semantics explicit. More specific entries must be listed before broader IIDR-only entries. * Added a reusable IIDR matcher and used it after checking the Renesas machine compatibles for the R-Car Gen4 quirk. * Split dma-noncoherent handling by DT node scope: - ITS subnode dma-noncoherent affects only the matching ITS; - top-level GIC dma-noncoherent affects only the host LPI/Redistributor policy. * Dropped the Orange Pi 5 / RK3588-specific quirk patch from v1. The non-coherent GIC integration is now handled through DT dma-noncoherent properties instead of a Xen-side platform quirk. Mykola Kvach (4): xen/arm: gic: defer host LPI allocation until after ITS init xen/arm: its: separate ITS and host LPI quirk scopes xen/arm: its: refactor ITS quirk matching xen/arm: its: handle dma-noncoherent on GIC and ITS nodes xen/arch/arm/gic-v3-its.c | 171 ++++++++++++++++---------- xen/arch/arm/gic-v3-lpi.c | 66 ++++++++-- xen/arch/arm/gic-v3.c | 14 ++- xen/arch/arm/include/asm/gic_v3_its.h | 19 ++- 4 files changed, 190 insertions(+), 80 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 00:28:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320867.1588003 (Exim 4.92) (envelope-from ) id 1wSObi-0008AJ-42; Thu, 28 May 2026 00:28:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320867.1588003; Thu, 28 May 2026 00:28:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObi-0008A6-02; Thu, 28 May 2026 00:28:18 +0000 Received: by outflank-mailman (input) for mailman id 1320867; Thu, 28 May 2026 00:28:16 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObg-0007lo-3E for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:28:16 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSObe-006N05-BN for xen-devel@lists.xenproject.org; Thu, 28 May 2026 02:28:14 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a178bc5-e002-0a2a0a5209dd-0a2a4508c6ae-38 for ; Thu, 28 May 2026 02:28:14 +0200 Received: from [209.85.208.42] (helo=mail-ed1-f42.google.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a178c1e-63b5-0a2a45080019-d155d02ab409-3 for ; Thu, 28 May 2026 02:28:14 +0200 Received: by mail-ed1-f42.google.com with SMTP id 4fb4d7f45d1cf-68aad378a26so928249a12.0 for ; Wed, 27 May 2026 17:28:14 -0700 (PDT) Received: from EPUAKYIW02F7.. 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On an ITS subnode, that is memory accessed by that ITS, so add GICV3_QUIRK_MEM_NC_NS to the corresponding host_its before programming GITS tables and allocating ITTs. When the property is present on the top-level GIC node, it describes the Redistributor side of the LPI path. Collect it in gicv3_lpi_init_host_lpis() and apply it only to the host LPI policy used for GICR_PROPBASER and GICR_PENDBASER setup. Do not inherit the property between parent and child nodes: ITS-node non-coherency does not change the global host LPI policy, and GIC-node non-coherency does not change per-ITS quirk_flags. ACPI is left unchanged; this patch only consumes the DT dma-noncoherent property. Signed-off-by: Mykola Kvach --- Changes in v2: - Split v1's dma-noncoherent handling into explicit ITS-node and GIC-node scopes. - Apply an ITS subnode property only to the matching host_its quirk_flags. - Collect the top-level GIC property from gic-v3-lpi.c before host LPI allocations use host_lpi_flags. --- xen/arch/arm/gic-v3-its.c | 21 +++++++++++++++++++-- xen/arch/arm/gic-v3-lpi.c | 22 +++++++++++++++++++++- 2 files changed, 40 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index e055914763..606b127487 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -134,6 +134,21 @@ static const struct its_quirk *__init gicv3_its_find_quirk( return NULL; } +static void __init gicv3_its_collect_fw_attrs(struct host_its *hw_its) +{ + /* + * An ITS subnode property describes memory transactions made by that ITS. + * Do not inherit it into the global host LPI/Redistributor policy. + */ + if ( !hw_its->dt_node || + !dt_property_read_bool(hw_its->dt_node, "dma-noncoherent") ) + return; + + hw_its->quirk_flags |= GICV3_QUIRK_MEM_NC_NS; + printk("GICv3: ITS @%#"PRIpaddr" marked dma-noncoherent\n", + hw_its->addr); +} + static void __init gicv3_its_collect_quirks(struct host_its *hw_its) { const struct its_quirk *quirk = gicv3_its_find_quirk(hw_its); @@ -144,6 +159,8 @@ static void __init gicv3_its_collect_quirks(struct host_its *hw_its) gicv3_lpi_update_host_flags(quirk->lpi_flags); printk("GICv3: enabling workaround for ITS: %s\n", quirk->desc); } + + gicv3_its_collect_fw_attrs(hw_its); } uint64_t gicv3_mem_get_cacheability(uint32_t flags) @@ -578,7 +595,7 @@ static int gicv3_disable_its(struct host_its *hw_its) return -ETIMEDOUT; } -static int gicv3_its_init_single_its(struct host_its *hw_its) +static int __init gicv3_its_init_single_its(struct host_its *hw_its) { uint64_t reg; int i, ret; @@ -1221,7 +1238,7 @@ static void gicv3_its_acpi_init(void) #endif -int gicv3_its_init(void) +int __init gicv3_its_init(void) { struct host_its *hw_its; int ret; diff --git a/xen/arch/arm/gic-v3-lpi.c b/xen/arch/arm/gic-v3-lpi.c index 35f93e4756..c6f17b9b2d 100644 --- a/xen/arch/arm/gic-v3-lpi.c +++ b/xen/arch/arm/gic-v3-lpi.c @@ -7,7 +7,9 @@ * Copyright (C) 2016,2017 - ARM Ltd */ +#include #include +#include #include #include #include @@ -101,6 +103,20 @@ void __init gicv3_lpi_update_host_flags(uint32_t flags) host_lpi_flags |= flags; } +static void __init gicv3_lpi_collect_fw_attrs(void) +{ + /* + * A top-level GIC node property describes the Redistributor side of the + * LPI path. Do not inherit it into per-ITS policy. + */ + if ( !acpi_disabled || + !dt_property_read_bool(dt_interrupt_controller, "dma-noncoherent") ) + return; + + gicv3_lpi_update_host_flags(GICV3_QUIRK_MEM_NC_NS); + printk("GICv3: GIC node marked dma-noncoherent for host LPI tables\n"); +} + static union host_lpi *gic_get_host_lpi(uint32_t plpi) { union host_lpi *block; @@ -442,7 +458,7 @@ integer_param("max_lpi_bits", max_lpi_bits); * to the page with the actual "union host_lpi" entries. Our LPI limit * avoids excessive memory usage. */ -int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits) +int __init gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits) { unsigned int nr_lpi_ptrs; int rc; @@ -450,6 +466,10 @@ int gicv3_lpi_init_host_lpis(unsigned int host_lpi_bits) /* We rely on the data structure being atomically accessible. */ BUILD_BUG_ON(sizeof(union host_lpi) > sizeof(unsigned long)); + gicv3_lpi_collect_fw_attrs(); + if ( host_lpi_flags ) + printk("GICv3: host LPI workaround flags: %#x\n", host_lpi_flags); + /* * An implementation needs to support at least 14 bits of LPI IDs. * Tell the user about it, the actual number is reported below. -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 00:28:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320864.1587972 (Exim 4.92) (envelope-from ) id 1wSObd-0007Ks-9b; Thu, 28 May 2026 00:28:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320864.1587972; Thu, 28 May 2026 00:28:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObd-0007KF-3U; Thu, 28 May 2026 00:28:13 +0000 Received: by outflank-mailman (input) for mailman id 1320864; Thu, 28 May 2026 00:28:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObb-0007Hk-Hu for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:28:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSOba-000CGb-UG for xen-devel@lists.xenproject.org; Thu, 28 May 2026 02:28:10 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a178bd3-2eae-0a2a0a5409dd-0a2a45068b06-16 for ; Thu, 28 May 2026 02:28:10 +0200 Received: from [209.85.208.54] (helo=mail-ed1-f54.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a178c1a-7371-0a2a45060019-d155d036d155-3 for ; Thu, 28 May 2026 02:28:10 +0200 Received: by mail-ed1-f54.google.com with SMTP id 4fb4d7f45d1cf-6886be3d39bso9749586a12.3 for ; Wed, 27 May 2026 17:28:10 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.25.69]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-bddc5ece286sm655205266b.40.2026.05.27.17.28.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 May 2026 17:28:10 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1779928090; x=1780532890; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Yg8AqMmDF3yKBovZvD64poEMRLvOHDqQeZLyKNm919c=; b=pVIZ6yWmUuxFV+PnDoNVq32g0EshANmCGlQcwcmeXIi8HsadwDFH/IWmVY6w8TBKUR TERLhTItBXCUjwtua0ZqFaO6mtuo5fFBtfmGtmMctgGX+6ayo7Ai1gwk5HEcIR44eb5i 60AKXq+WGCaOjgxIgLRI/ywSHs6hzjQtuQ0P/aU2LcEMWL6Cfx1n2x0UvdYfaORmsmWN SRnJJoP1nne62LlzTf8khZcRrf4M/K9e1pkKnzu75IMtIss7RgRGo0ahJ0q3sSi6ULR6 AIQG+Xt+qwjOC0YOg5+JjDApenccfPicJddRqt9R01SF7yVM0BGBvNCvIPZOSEkNId6h fM8w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1779928090; x=1780532890; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to; bh=Yg8AqMmDF3yKBovZvD64poEMRLvOHDqQeZLyKNm919c=; b=sw6TmDGJce2pXlS+lJY2R32bKw9qHZgkXpFP/H8G/NeLAP8m8QLXj24IPNTuGkVjpx l7KVkbnzvQzAEfEAyjZSnRpUX+yZZf+NJLn0dmLZVh+XNIZKaYI+hUHsJp0e7bUIGOfa poVTpjf9gseipVUHH6eTpye9nlqvVmsiHDcjSvGYtu89v4u5LI1ApwQCwOhOp5nu+jHt Am6zTKRWotdboHjO8pW+/V7XQvu1oNtb8wwxj0T+wzQRrDnXY82PS9adv/aQXxtbMo7/ g2p42xr8myvtTelbkZpFGuiHIXw3naS/WvPgiiClZUu7sU7UPtEGm8nSHUO6R4VtDB/a BkJA== X-Gm-Message-State: AOJu0YzsX/FpUoEL51jPhib5xEV4+1z7c4zcx91oVsbvJVNsxn0yLKrb O49bVaaYgHri1XMraQ11RWyoysyVWO8YodTxD8v/nIgvg4VlQvbdHX3VW76q2g== X-Gm-Gg: Acq92OGbZjIEhEqbYQcvbPps4/aHialt35SZymC0PZawb/vFb7G8nYLP5n+X6yNtnbN cDI6es6Vsb9jF6XrDxgi5xzRE4bQh71gSCxGNyU9Fs7L+7YTUlq77l0Y/nop7ylNmHMbGixNZtn rTF/Plg4tyyRTON63chu13L55zA8heP9R2rMUwP0p1aEAxK1DxZpTFFvgs6Qmhmhdl/OJIENFE9 vsUqzv2Wc4kAqlcoub0ipCPd3H7XI10HpvbVJk/TJP/CYXSOsYObBN81ebfa/AlfyGEdAQ9BlZW 3k/swIZvhNUV/0120Ucp8GpJkDa54+6rVJ3lfkcQKfPjdFSvbuID1sRm9/LUVfCdk45lYKmRYgJ eBEso5+iy/jQg1Nd3/vzbC/6Qb6Kz21Eap0PepZVkXjlGoyik90sBLAfZaupeV7piHD4IjsSAo7 wjuLYu/R+BMJgzTpJ8s1EOdovUZmjT5xhsxm1M X-Received: by 2002:a17:907:c80c:b0:bc9:d864:2735 with SMTP id a640c23a62f3a-bdd2aada46fmr1592794266b.34.1779928090335; Wed, 27 May 2026 17:28:10 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Fancellu , Oleksii Kurochko Subject: [PATCH for-4.22 v2 1/4] xen/arm: gic: defer host LPI allocation until after ITS init Date: Thu, 28 May 2026 03:25:49 +0300 Message-ID: <112419d3ea48ca328849c8f6647909d3eb667b40.1779922874.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1779928090-8C67DD75-5CF5C166/0/0 X-purgate-type: clean X-purgate-size: 2517 From: Mykola Kvach gicv3_lpi_init_host_lpis() allocates host LPI state, including the host LPI lookup table, CPU notifier state and the boot CPU pending table. Those allocations use gicv3_its_get_memflags(). ITS workarounds are discovered from gicv3_its_init(), so allocating host LPI state from gicv3_dist_init() can happen before the memory restrictions required by the ITS are known. On affected systems this can leave Redistributor LPI state allocated and programmed with the default memory policy. Move host LPI initialization after gicv3_its_init(), and only run it when a host ITS was found. The old call ignored the return value. Now that the call is made from gicv3_init(), check it and panic on failure because Redistributor LPI initialization relies on that state being available. Signed-off-by: Mykola Kvach --- Changes in v2: - Replace the v1 ITS pre-initialization hook with the less invasive approach suggested during review: move the existing host LPI initialization after gicv3_its_init(). - Check gicv3_lpi_init_host_lpis() and panic on failure, matching the fatal nature of host LPI setup once ITS initialization succeeded. --- xen/arch/arm/gic-v3.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index 17ff85ef5d..acdac22953 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -764,9 +764,6 @@ static void __init gicv3_dist_init(void) type = readl_relaxed(GICD + GICD_TYPER); nr_lines = 32 * ((type & GICD_TYPE_LINES) + 1); - if ( type & GICD_TYPE_LPIS ) - gicv3_lpi_init_host_lpis(GICD_TYPE_ID_BITS(type)); - /* Only 1020 interrupts are supported */ nr_lines = min(1020U, nr_lines); gicv3_info.nr_lines = nr_lines; @@ -1990,6 +1987,17 @@ static int __init gicv3_init(void) res = gicv3_its_init(); if ( res ) panic("GICv3: ITS: initialization failed: %d\n", res); + + /* + * Host LPI allocation uses ITS-derived memory attributes, so defer it + * until after gicv3_its_init() has discovered ITS workarounds. + */ + if ( gicv3_its_host_has_its() ) + { + res = gicv3_lpi_init_host_lpis(intid_bits); + if ( res ) + panic("GICv3: LPI initialization failed: %d\n", res); + } } res = gicv3_cpu_init(); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 00:28:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:28:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320866.1587994 (Exim 4.92) (envelope-from ) id 1wSObg-0007wN-S9; Thu, 28 May 2026 00:28:16 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320866.1587994; Thu, 28 May 2026 00:28:16 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObg-0007wC-Op; Thu, 28 May 2026 00:28:16 +0000 Received: by outflank-mailman (input) for mailman id 1320866; Thu, 28 May 2026 00:28:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSObd-0007Wk-RX for xen-devel@lists.xenproject.org; Thu, 28 May 2026 00:28:13 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSObd-00CjPB-7o for xen-devel@lists.xenproject.org; Thu, 28 May 2026 02:28:13 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a178bbc-bab6-0a2a0a5309dd-0a2a450cb27e-44 for ; Thu, 28 May 2026 02:28:13 +0200 Received: from [209.85.218.47] (helo=mail-ej1-f47.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a178c1d-62f1-0a2a450c0019-d155da2fe9f5-3 for ; Thu, 28 May 2026 02:28:13 +0200 Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-bd124546379so1831533766b.3 for ; Wed, 27 May 2026 17:28:13 -0700 (PDT) Received: from EPUAKYIW02F7.. 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That is too coarse for integrations where the same GIC IP block can appear in several platforms but the workaround is only valid for a subset of boards. Replace the fixed IIDR fields with a generic match(hw_its, data) callback and an opaque data pointer. Add an IIDR matcher as a reusable building block and use it from the R-Car Gen4 matcher after checking the Renesas machine compatibles. The R-Car Gen4 platform refinement is DT-only; ACPI-discovered ITSes do not match it. Keep first-match semantics explicit. Assert that non-sentinel entries provide a matcher and that IIDR matching receives match data, but keep runtime guards so a malformed table entry does not become a NULL function call or NULL data dereference in non-debug builds. The matched entry still supplies separate ITS and LPI flags; this patch only changes how the entry is selected. Signed-off-by: Mykola Kvach --- Changes in v2: - Replace v1's optional platform callback plus fixed IIDR/mask fields with a single generic match(hw_its, data) selector. - Add a reusable IIDR matcher and use it after the R-Car Gen4 machine-compatible checks. - Document that the R-Car Gen4 quirk remains DT-only. - Keep the split ITS and host LPI quirk scopes when applying the matched entry. - Document first-match ordering in the lookup path and guard against entries without a match callback or IIDR match data. --- xen/arch/arm/gic-v3-its.c | 67 +++++++++++++++++++++++++++++++-------- 1 file changed, 53 insertions(+), 14 deletions(-) diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c index dc48a84789..e055914763 100644 --- a/xen/arch/arm/gic-v3-its.c +++ b/xen/arch/arm/gic-v3-its.c @@ -53,8 +53,8 @@ struct its_device { struct its_quirk { const char *desc; - uint32_t iidr; - uint32_t mask; + bool (*match)(const struct host_its *hw_its, const void *data); + const void *data; uint32_t its_flags; /* * lpi_flags are ORed into the global host LPI policy and must only @@ -64,11 +64,48 @@ struct its_quirk { uint32_t lpi_flags; }; +struct its_quirk_match_iidr { + uint32_t iidr; + uint32_t mask; +}; + +static bool __init gicv3_its_match_iidr(const struct host_its *hw_its, + const void *data) +{ + const struct its_quirk_match_iidr *match; + uint32_t iidr; + + ASSERT(data); + + match = data; + iidr = readl_relaxed(hw_its->its_base + GITS_IIDR); + + return (iidr & match->mask) == match->iidr; +} + +static bool __init gicv3_its_match_quirk_gen4(const struct host_its *hw_its, + const void *data) +{ + if ( !hw_its->dt_node ) + return false; + + if ( !dt_machine_is_compatible("renesas,r8a779f0") && + !dt_machine_is_compatible("renesas,r8a779g0") ) + return false; + + return gicv3_its_match_iidr(hw_its, data); +} + +static const struct its_quirk_match_iidr rcar_gen4_iidr = { + .iidr = 0x0201743b, + .mask = 0xffffffffU, +}; + static const struct its_quirk its_quirks[] = { { - .desc = "R-Car Gen4", - .iidr = 0x0201743b, - .mask = 0xffffffffU, + .desc = "R-Car Gen4", + .match = gicv3_its_match_quirk_gen4, + .data = &rcar_gen4_iidr, .its_flags = GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADDR, .lpi_flags = GICV3_QUIRK_MEM_NC_NS | GICV3_QUIRK_MEM_32BIT_ADDR, }, @@ -77,18 +114,21 @@ static const struct its_quirk its_quirks[] = { } }; -static const struct its_quirk *__init gicv3_its_find_quirk(uint32_t iidr) +static const struct its_quirk *__init gicv3_its_find_quirk( + const struct host_its *hw_its) { - const struct its_quirk *quirks = its_quirks; + const struct its_quirk *quirk; /* - * The first matching quirk wins. More specific quirks must be listed - * before broader IIDR-only entries. + * The first matching quirk wins. Entries that match a specific platform + * must be listed before broader IIDR-only entries. */ - for ( ; quirks->desc; quirks++ ) + for ( quirk = its_quirks; quirk->desc; quirk++ ) { - if ( quirks->iidr == (quirks->mask & iidr) ) - return quirks; + ASSERT(quirk->match); + + if ( quirk->match && quirk->match(hw_its, quirk->data) ) + return quirk; } return NULL; @@ -96,8 +136,7 @@ static const struct its_quirk *__init gicv3_its_find_quirk(uint32_t iidr) static void __init gicv3_its_collect_quirks(struct host_its *hw_its) { - uint32_t iidr = readl_relaxed(hw_its->its_base + GITS_IIDR); - const struct its_quirk *quirk = gicv3_its_find_quirk(iidr); + const struct its_quirk *quirk = gicv3_its_find_quirk(hw_its); if ( quirk ) { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 00:44:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 00:44:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320905.1588011 (Exim 4.92) (envelope-from ) id 1wSOr1-0003sw-C7; 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Wed, 27 May 2026 17:44:02 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Thu, 28 May 2026 03:43:51 +0300 X-Gm-Features: AVHnY4JbsYeBNYcxSF2bo9T0gPeoyJ7oKrovJDbignHoa66hsC_t9_LFbYupfd0 Message-ID: Subject: Re: [PATCH v2 0/4] xen/arm: gicv3: defer host LPI init and split ITS/LPI quirk scopes To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Luca Fancellu , Oleksii Kurochko Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1779929043-E3589443-33DC7EBB/0/0 X-purgate-type: clean X-purgate-size: 5131 Hi all, I forgot to include the v1 link in the cover letter. For reference, v1 of this series is available here: https://patchew.org/Xen/cover.1774431310.git.mykola._5Fkvach@epam.com/ This v2 is the next revision of that series. Since the patch order and subjects changed, some tooling may not associate the two automatically. Thanks, Mykola On Thu, May 28, 2026 at 3:28=E2=80=AFAM Mykola Kvach wrote: > > From: Mykola Kvach > > Hi all, > > This series fixes the ordering of host LPI state initialization relative = to > ITS quirk discovery, and then cleans up how ITS-private and host > LPI/Redistributor quirk effects are represented. > > Patch 1 is the release-critical fix. It moves host LPI initialization aft= er > gicv3_its_init(), so that the host LPI allocation path observes the ITS > quirks discovered during ITS initialization. This patch is intended for > 4.22. > > Patches 2-4 are follow-up cleanup and DT attribute handling. They are inc= luded > to show the intended direction and to avoid carrying the old global ITS q= uirk > model forward, but they are not required for taking the 4.22 fix if the > release freeze makes that preferable. > > The main change from v1 is that this version no longer tries to pre-initi= alize > ITS quirks before host LPI setup. Instead, the minimal fix is to defer th= e > existing host LPI initialization until after ITS initialization. The foll= ow-up > patches then split the quirk state by scope: > > * per-ITS flags are used for memory/state accessed by a particular ITS,= such > as GITS_CBASER, GITS_BASER and ITT memory; > > * host LPI flags are used for shared Redistributor/LPI state, such as > GICR_PROPBASER and GICR_PENDBASER. > > This avoids relying on an implicit global aggregation of per-ITS quirk st= ate. > If an ITS-discovered quirk also affects the host LPI/Redistributor path, = that > effect is now expressed explicitly through the quirk entry's lpi_flags. > > The series also handles the DT dma-noncoherent property according to the = node > where it appears. An ITS subnode property affects only the corresponding = ITS. > A top-level GIC node property affects only the host LPI/Redistributor pol= icy. > The property is not inherited implicitly between the parent GIC node and = ITS > subnodes. > > The Orange Pi 5 / RK3588-specific quirk patch from v1 has been dropped. T= he > previous version modelled the issue as a 32-bit ITS addressing restrictio= n. > This version handles the relevant non-coherent/non-shareable GIC integrat= ion > through the standard DT dma-noncoherent property on the GIC and ITS nodes > instead. > --- > > Changes since v1 > > * Reordered the series so that the minimal host LPI initialization orderi= ng fix > is first. Patch 1 is intended for 4.22. > > * Dropped the v1 ITS pre-initialization hook. > > * Moved the existing gicv3_lpi_init_host_lpis() call after gicv3_its_init= () > instead, so host LPI state is allocated after ITS workaround discovery. > > * Checked the return value from gicv3_lpi_init_host_lpis() and made failu= re > fatal once the ITS/LPI path is enabled. > > * Replaced the old single global ITS quirk state with separate per-ITS an= d > host LPI quirk scopes. > > * Removed the implicit aggregation of all per-ITS quirks into the host LP= I > policy. Host LPI effects are now expressed explicitly with lpi_flags. > > * Kept per-ITS flags for ITS-private allocations: > - GITS_CBASER; > - GITS_BASER; > - ITT memory. > > * Kept host LPI flags for Redistributor/LPI state: > - GICR_PROPBASER; > - GICR_PENDBASER. > > * Refactored ITS quirk matching from fixed IIDR/mask fields to a generic > match(hw_its, data) callback plus opaque data. > > * Kept first-match semantics explicit. More specific entries must be list= ed > before broader IIDR-only entries. > > * Added a reusable IIDR matcher and used it after checking the Renesas > machine compatibles for the R-Car Gen4 quirk. > > * Split dma-noncoherent handling by DT node scope: > - ITS subnode dma-noncoherent affects only the matching ITS; > - top-level GIC dma-noncoherent affects only the host LPI/Redistributor > policy. > > * Dropped the Orange Pi 5 / RK3588-specific quirk patch from v1. The > non-coherent GIC integration is now handled through DT dma-noncoherent > properties instead of a Xen-side platform quirk. > > Mykola Kvach (4): > xen/arm: gic: defer host LPI allocation until after ITS init > xen/arm: its: separate ITS and host LPI quirk scopes > xen/arm: its: refactor ITS quirk matching > xen/arm: its: handle dma-noncoherent on GIC and ITS nodes > > xen/arch/arm/gic-v3-its.c | 171 ++++++++++++++++---------- > xen/arch/arm/gic-v3-lpi.c | 66 ++++++++-- > xen/arch/arm/gic-v3.c | 14 ++- > xen/arch/arm/include/asm/gic_v3_its.h | 19 ++- > 4 files changed, 190 insertions(+), 80 deletions(-) > > -- > 2.43.0 > From xen-devel-bounces@lists.xenproject.org Thu May 28 07:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 07:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320983.1588039 (Exim 4.92) (envelope-from ) id 1wSVbC-00005U-Hb; Thu, 28 May 2026 07:56:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320983.1588039; Thu, 28 May 2026 07:56:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSVbC-00005N-Ez; Thu, 28 May 2026 07:56:14 +0000 Received: by outflank-mailman (input) for mailman id 1320983; Thu, 28 May 2026 07:56:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSVbA-00087K-RV for xen-devel@lists.xenproject.org; Thu, 28 May 2026 07:56:12 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSVbA-00HB53-7K for xen-devel@lists.xenproject.org; Thu, 28 May 2026 09:56:12 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a17f514-bab6-0a2a0a5309dd-0a2a4505ca38-32 for ; Thu, 28 May 2026 09:56:12 +0200 Received: from [209.85.221.51] (helo=mail-wr1-f51.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a17f51c-aaa8-0a2a45050019-d155dd33f036-3 for ; Thu, 28 May 2026 09:56:12 +0200 Received: by mail-wr1-f51.google.com with SMTP id ffacd0b85a97d-45eecb8bf67so37124f8f.2 for ; Thu, 28 May 2026 00:56:12 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Frediano Ziglio --- xen/include/public/xen.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index d4f238c10b..0537d1f8f3 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -218,16 +218,16 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); * x == 0 => PFD == DOMID_SELF * x != 0 => PFD == x - 1 * - * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. + * Sub-commands: ptr[2:0] specifies the appropriate MMU_* command. * ------------- - * ptr[1:0] == MMU_NORMAL_PT_UPDATE: + * ptr[2:0] == MMU_NORMAL_PT_UPDATE: * Updates an entry in a page table belonging to PFD. If updating an L1 table, * and the new table entry is valid/present, the mapped frame must belong to * FD. If attempting to map an I/O page then the caller assumes the privilege * of the FD. * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. * FD == DOMID_XEN: Map restricted areas of Xen's heap space. - * ptr[:2] -- Machine address of the page-table entry to modify. + * ptr[:3] -- Machine address of the page-table entry to modify. * val -- Value to write. * * There also certain implicit requirements when using this hypercall. The @@ -264,17 +264,17 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the * pagetable MUST not be in use (meaning that the cr3 is not set to it). * - * ptr[1:0] == MMU_MACHPHYS_UPDATE: + * ptr[2:0] == MMU_MACHPHYS_UPDATE: * Updates an entry in the machine->pseudo-physical mapping table. - * ptr[:2] -- Machine address within the frame whose mapping to modify. + * ptr[:3] -- Machine address within the frame whose mapping to modify. * The frame must belong to the FD, if one is specified. * val -- Value to write into the mapping entry. * - * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: + * ptr[2:0] == MMU_PT_UPDATE_PRESERVE_AD: * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed * with those in @val. * - * ptr[1:0] == MMU_PT_UPDATE_NO_TRANSLATE: + * ptr[2:0] == MMU_PT_UPDATE_NO_TRANSLATE: * As MMU_NORMAL_PT_UPDATE above, but @val is not translated though FD * page tables. * -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 07:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 07:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320981.1588021 (Exim 4.92) (envelope-from ) id 1wSVbB-00087X-5R; Thu, 28 May 2026 07:56:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1320981.1588021; Thu, 28 May 2026 07:56:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSVbB-00087Q-2p; Thu, 28 May 2026 07:56:13 +0000 Received: by outflank-mailman (input) for mailman id 1320981; Thu, 28 May 2026 07:56:11 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSVb9-000878-6n for xen-devel@lists.xenproject.org; Thu, 28 May 2026 07:56:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSVb8-00HB53-Bc for xen-devel@lists.xenproject.org; Thu, 28 May 2026 09:56:10 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a17f514-bab6-0a2a0a5309dd-0a2a4505ca38-24 for ; Thu, 28 May 2026 09:56:10 +0200 Received: from [209.85.221.43] (helo=mail-wr1-f43.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a17f51a-aaa8-0a2a45050019-d155dd2bc037-3 for ; Thu, 28 May 2026 09:56:10 +0200 Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-45eea68dd6fso127298f8f.2 for ; Thu, 28 May 2026 00:56:10 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Thu, 28 May 2026 00:56:09 -0700 (PDT) From: Frediano Ziglio X-Google-Original-From: Frediano Ziglio To: xen-devel@lists.xenproject.org Cc: Frediano Ziglio , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/2] public/xen.h: Update mmu_update comment Date: Thu, 28 May 2026 08:55:33 +0100 Message-ID: <20260528075539.10209-1-frediano.ziglio@cloud.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1779954970-D3961443-B84A6C4A/0/0 X-purgate-type: clean X-purgate-size: 249 Frediano Ziglio (2): public/xen.h: Update page table layout comments public/xen.h: Update comment for mmu_update hypercall xen/include/public/xen.h | 17 ++++++++--------- 1 file changed, 8 insertions(+), 9 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 07:56:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 07:56:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1320982.1588026 (Exim 4.92) (envelope-from ) id 1wSVbB-00089E-Ct; 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Extend range for MFN. Signed-off-by: Frediano Ziglio --- xen/include/public/xen.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/xen/include/public/xen.h b/xen/include/public/xen.h index 2149b8dd38..d4f238c10b 100644 --- a/xen/include/public/xen.h +++ b/xen/include/public/xen.h @@ -283,8 +283,7 @@ DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); * if this is a X86_64 machine and four page table layout is used, the layout * of val is: * - 63 if set means No execute (NX) - * - 46-13 the machine frame number - * - 12 available for guest + * - 51-12 the machine frame number * - 11 available for guest * - 10 available for guest * - 9 available for guest -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Thu May 28 08:37:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 08:37:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321014.1588048 (Exim 4.92) (envelope-from ) id 1wSWEz-0006v0-SN; Thu, 28 May 2026 08:37:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321014.1588048; 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Thu, 28 May 2026 02:33:45 -0700 (PDT) MIME-Version: 1.0 From: Nistha Sarawagi Date: Thu, 28 May 2026 15:03:31 +0530 X-Gm-Features: AVHnY4IAEbee794_IKpp6A3pc4dRXLzZLS1cQEEVZXACIZ6OgsJCO5qMXPJ0Q18 Message-ID: Subject: [INTRO] Prospective LFX Mentee - Interested in Xen Project To: xen-devel@lists.xenproject.org Content-Type: multipart/alternative; boundary="000000000000bc2c5d0652dd6cc0" X-purgate-ID: tlsNG-42698a/1779960826-20E7CF3B-756D066D/0/0 X-purgate-type: clean X-purgate-size: 2252 --000000000000bc2c5d0652dd6cc0 Content-Type: text/plain; charset="UTF-8" Hi everyone, My name is Nistha, and I am an undergraduate student currently applying to the Xen Project through the LFX Mentorship Program (Summer 2026). I have a background in Python, Java, and JavaScript, and I am actively working on building my C skills as I explore the Xen codebase. While I do not yet have a systems programming background, I am genuinely motivated to learn and contribute to open source virtualization ,which is why Xen Project stood out to me. I would love to get some guidance from the community on where a beginner can meaningfully start whether that is documentation, tooling, or smaller issues in the codebase. I am also happy to take on any tasks that would help me better understand the project ahead of the mentorship. Thank you for your time, and I look forward to being part of this community. Best regards, Nistha Sarawagi Scaler School of Technology https://github.com/nistha-coder --000000000000bc2c5d0652dd6cc0 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi everyone,

My name is Nistha, and I am an undergr= aduate student currently applying to the Xen Project through the LFX Mentor= ship Program (Summer 2026).

I have a background in Python, Java, and= JavaScript, and I am actively working on building my C skills as I explore= the Xen codebase. While I do not yet have a systems programming background= , I am genuinely motivated to learn and contribute to open source virtualiz= ation ,which is why Xen Project stood out to me.

I would love to get= some guidance from the community on where a beginner can meaningfully star= t whether that is documentation, tooling, or smaller issues in the codebase= . I am also happy to take on any tasks that would help me better understand= the project ahead of the mentorship.

Thank you for your time, and I= look forward to being part of this community.

Best regards,
Nist= ha Sarawagi
Scaler School of Technology
https://github.com/nistha-coder
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Smith" , Jan Beulich , Roger Pau =?utf-8?B?TW9ubsOp?= , Teddy Astie Subject: Re: [PATCH v3 for-4.22] EFI: Fix boot from a device without a file system Message-ID: References: <79d8684ede3bf1e9abe02a2e5ed966a0ecd5949d.1779726979.git.accek@invisiblethingslab.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="GtheMo/zlbyUu650" Content-Disposition: inline In-Reply-To: <79d8684ede3bf1e9abe02a2e5ed966a0ecd5949d.1779726979.git.accek@invisiblethingslab.com> X-purgate-ID: tlsNG-ebf023/1779961816-2BB6B3FF-E86A6C4E/0/0 X-purgate-type: clean X-purgate-size: 13196 --GtheMo/zlbyUu650 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Thu, 28 May 2026 11:50:11 +0200 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Szymon =?utf-8?Q?Aceda=C5=84ski?= Cc: xen-devel@lists.xenproject.org, oleksii.kurochko@gmail.com, Andrew Cooper , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , "Daniel P. Smith" , Jan Beulich , Roger Pau =?utf-8?B?TW9ubsOp?= , Teddy Astie Subject: Re: [PATCH v3 for-4.22] EFI: Fix boot from a device without a file system On Mon, May 25, 2026 at 07:37:03PM +0200, Szymon Aceda=C5=84ski wrote: > When netbooting a unified Xen kernel image (via GRUB chainloader), > the resulting loaded_image->DeviceHandle does not support > SIMPLE_FILE_SYSTEM_PROTOCOL. >=20 > Instead of crashing via noreturn PrintErrMesg() in get_parent_handle(), > we defer calling this function until filesystem access is needed. > This way when booting UKI, get_parent_handle() is not called at all. >=20 > Suggested-by: Andrew Cooper > Suggested-by: Marek Marczykowski-G=C3=B3recki > Signed-off-by: Szymon Aceda=C5=84ski Acked-by: Marek Marczykowski-G=C3=B3recki > --- > Changes in v3: > - read_file(): replaced unreachable `if ( !dir_handle )` branch with > BUG_ON(!dir_handle), per Marek's suggestion. >=20 > Changes in v2: > - Restructured along the lines Andrew and Marek both suggested on v1: > defer get_parent_handle() until the first call site that actually > needs a file. >=20 > This mirrors the existing lazy pattern in ARM's > allocate_module_file() in xen/arch/arm/efi/efi-boot.h, which was also > changed to use the new ensure_dir_handle() helper. >=20 > Tested (same as v2): > - PXE-loaded GRUB chainloading UKI - failure without patch, success > with patch > - QEMU boot from EFI partition, with config, kernel and initrd > on EFI partition too - success with and without patch > - Cross-compiling ARM64 - success >=20 > xen/arch/arm/efi/efi-boot.h | 12 ++++--- > xen/arch/x86/efi/efi-boot.h | 9 +++-- > xen/common/efi/boot.c | 66 +++++++++++++++++++++++-------------- > 3 files changed, 54 insertions(+), 33 deletions(-) >=20 > diff --git a/xen/arch/arm/efi/efi-boot.h b/xen/arch/arm/efi/efi-boot.h > index ea59de47e7..069cc68b0a 100644 > --- a/xen/arch/arm/efi/efi-boot.h > +++ b/xen/arch/arm/efi/efi-boot.h > @@ -403,7 +403,7 @@ static void __init noreturn efi_arch_post_exit_boot(v= oid) > } > =20 > static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, > - EFI_FILE_HANDLE dir_handle, > + EFI_FILE_HANDLE *dir_handle, > const char *section) > { > union string name; > @@ -419,8 +419,11 @@ static void __init efi_arch_cfg_file_early(const EFI= _LOADED_IMAGE *image, > name.s =3D get_value(&cfg, section, "dtb"); > if ( name.s ) > { > + CHAR16 *fname; > + > split_string(name.s); > - read_file(dir_handle, s2w(&name), &dtbfile, NULL); > + ensure_dir_handle(image, dir_handle, &fname); > + read_file(*dir_handle, s2w(&name), &dtbfile, NULL); > efi_bs->FreePool(name.w); > } > } > @@ -430,7 +433,7 @@ static void __init efi_arch_cfg_file_early(const EFI_= LOADED_IMAGE *image, > } > =20 > static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, > - EFI_FILE_HANDLE dir_handle, > + EFI_FILE_HANDLE *dir_handle, > const char *section) > { > } > @@ -665,8 +668,7 @@ static int __init allocate_module_file(const EFI_LOAD= ED_IMAGE *loaded_image, > file_info->name_len =3D name_len; > =20 > /* Get the file system interface. */ > - if ( !*dir_handle ) > - *dir_handle =3D get_parent_handle(loaded_image, &fname); > + ensure_dir_handle(loaded_image, dir_handle, &fname); > =20 > /* Load the binary in memory */ > read_file(*dir_handle, s2w(&module_name), &module_binary, NULL); > diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h > index 42a2c46b5e..d738b839ee 100644 > --- a/xen/arch/x86/efi/efi-boot.h > +++ b/xen/arch/x86/efi/efi-boot.h > @@ -284,13 +284,13 @@ static void __init noreturn efi_arch_post_exit_boot= (void) > } > =20 > static void __init efi_arch_cfg_file_early(const EFI_LOADED_IMAGE *image, > - EFI_FILE_HANDLE dir_handle, > + EFI_FILE_HANDLE *dir_handle, > const char *section) > { > } > =20 > static void __init efi_arch_cfg_file_late(const EFI_LOADED_IMAGE *image, > - EFI_FILE_HANDLE dir_handle, > + EFI_FILE_HANDLE *dir_handle, > const char *section) > { > union string name; > @@ -304,9 +304,12 @@ static void __init efi_arch_cfg_file_late(const EFI_= LOADED_IMAGE *image, > name.s =3D get_value(&cfg, "global", "ucode"); > if ( name.s ) > { > + CHAR16 *fname; > + > microcode_set_module(mbi.mods_count); > split_string(name.s); > - read_file(dir_handle, s2w(&name), &ucode, NULL); > + ensure_dir_handle(image, dir_handle, &fname); > + read_file(*dir_handle, s2w(&name), &ucode, NULL); > efi_bs->FreePool(name.w); > } > } > diff --git a/xen/common/efi/boot.c b/xen/common/efi/boot.c > index 9ea2183c0b..2971ea8696 100644 > --- a/xen/common/efi/boot.c > +++ b/xen/common/efi/boot.c > @@ -547,6 +547,17 @@ static EFI_FILE_HANDLE __init get_parent_handle(cons= t EFI_LOADED_IMAGE *loaded_i > return dir_handle; > } > =20 > +static void __init ensure_dir_handle(const EFI_LOADED_IMAGE *loaded_imag= e, > + EFI_FILE_HANDLE *dir_handle, > + CHAR16 **file_name) > +{ > + if ( *dir_handle ) > + return; > + *dir_handle =3D get_parent_handle(loaded_image, file_name); > + if ( !*dir_handle ) > + blexit(L"Cannot load files without a usable file system"); > +} > + > static CHAR16 *__init point_tail(CHAR16 *fn) > { > CHAR16 *tail =3D NULL; > @@ -838,12 +849,11 @@ static bool __init read_file(EFI_FILE_HANDLE dir_ha= ndle, CHAR16 *name, > if ( !name ) > PrintErrMesg(L"No filename", EFI_OUT_OF_RESOURCES); > =20 > + BUG_ON(!dir_handle); > + > what =3D L"Open"; > - if ( dir_handle ) > - ret =3D dir_handle->Open(dir_handle, &FileHandle, name, > - EFI_FILE_MODE_READ, 0); > - else > - ret =3D EFI_NOT_FOUND; > + ret =3D dir_handle->Open(dir_handle, &FileHandle, name, > + EFI_FILE_MODE_READ, 0); > if ( file =3D=3D &cfg && ret =3D=3D EFI_NOT_FOUND ) > return false; > if ( EFI_ERROR(ret) ) > @@ -1514,7 +1524,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE Im= ageHandle, > =20 > if ( use_cfg_file ) > { > - EFI_FILE_HANDLE dir_handle; > + EFI_FILE_HANDLE dir_handle =3D NULL; > EFI_HANDLE gop_handle; > UINTN depth, cols, rows; > =20 > @@ -1526,31 +1536,33 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE = ImageHandle, > =20 > gop =3D efi_get_gop(&gop_handle); > =20 > - /* Get the file system interface. */ > - dir_handle =3D get_parent_handle(loaded_image, &file_name); > - > /* Read and parse the config file. */ > if ( read_section(loaded_image, L"config", &cfg, NULL) ) > PrintStr(L"Using builtin config file\r\n"); > - else if ( !cfg_file_name && file_name ) > + else > { > - CHAR16 *tail; > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > =20 > - while ( (tail =3D point_tail(file_name)) !=3D NULL ) > + if ( !cfg_file_name ) > { > - wstrcpy(tail, L".cfg"); > - if ( read_file(dir_handle, file_name, &cfg, NULL) ) > - break; > - *tail =3D 0; > + CHAR16 *tail; > + > + while ( (tail =3D point_tail(file_name)) !=3D NULL ) > + { > + wstrcpy(tail, L".cfg"); > + if ( read_file(dir_handle, file_name, &cfg, NULL) ) > + break; > + *tail =3D 0; > + } > + if ( !tail ) > + blexit(L"No configuration file found."); > + PrintStr(L"Using configuration file '"); > + PrintStr(file_name); > + PrintStr(L"'\r\n"); > } > - if ( !tail ) > - blexit(L"No configuration file found."); > - PrintStr(L"Using configuration file '"); > - PrintStr(file_name); > - PrintStr(L"'\r\n"); > + else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) > + blexit(L"Configuration file not found."); > } > - else if ( !read_file(dir_handle, cfg_file_name, &cfg, NULL) ) > - blexit(L"Configuration file not found."); > pre_parse(&cfg); > =20 > if ( section.w ) > @@ -1567,6 +1579,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE Im= ageHandle, > if ( !name.s ) > break; > free_cfg(); > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > if ( !read_file(dir_handle, s2w(&name), &cfg, NULL) ) > { > PrintStr(L"Chained configuration file '"); > @@ -1578,13 +1591,14 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE = ImageHandle, > efi_bs->FreePool(name.w); > } > =20 > - efi_arch_cfg_file_early(loaded_image, dir_handle, section.s); > + efi_arch_cfg_file_early(loaded_image, &dir_handle, section.s); > =20 > option_str =3D name.s ? split_string(name.s) : NULL; > =20 > if ( !read_section(loaded_image, L"kernel", &kernel, option_str)= && > name.s ) > { > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > read_file(dir_handle, s2w(&name), &kernel, option_str); > efi_bs->FreePool(name.w); > } > @@ -1599,6 +1613,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE Im= ageHandle, > name.s =3D get_value(&cfg, section.s, "ramdisk"); > if ( name.s ) > { > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > read_file(dir_handle, s2w(&name), &ramdisk, NULL); > efi_bs->FreePool(name.w); > } > @@ -1609,6 +1624,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE Im= ageHandle, > name.s =3D get_value(&cfg, section.s, "xsm"); > if ( name.s ) > { > + ensure_dir_handle(loaded_image, &dir_handle, &file_name); > read_file(dir_handle, s2w(&name), &xsm, NULL); > efi_bs->FreePool(name.w); > } > @@ -1634,7 +1650,7 @@ void EFIAPI __init noreturn efi_start(EFI_HANDLE Im= ageHandle, > } > } > =20 > - efi_arch_cfg_file_late(loaded_image, dir_handle, section.s); > + efi_arch_cfg_file_late(loaded_image, &dir_handle, section.s); > =20 > free_cfg(); > =20 > --=20 > 2.53.0 >=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --GtheMo/zlbyUu650 Content-Type: application/pgp-signature; name=signature.asc -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmoYD9MACgkQ24/THMrX 1yxJVwgAgq+6xbZcL/5OLfwO5x9PaOw0Wg6esPTSN+lHjCN+3JC9bELL9oTb4DMk UqwO4gLk5IQ3I1FixrFZpyJpaNgvE9+6mT3Sd2AGajpd/Y24eWSyS6XYIMw+PWQ4 tbaPp9BOerdxZIhNZQ/TVXilPk9UobD2LRYtvJtha3Z5kW15z6r50Uud+TeWldxk wA9Q0Gqu0SNTvzMbDkbS//yuHq+rFLQOo7MWGRUy4C6LUmu127MBGCsvpHbltUwI tCP1WHPD5cVJHnDQE8ubZl0+UJdvin7tpX1tLpgWhZuWRoFoQa1UDpO48XS1w0BF XiWMASTZOv/E05mB1tqwEVmdrbrNgw== =UNcj -----END PGP SIGNATURE----- --GtheMo/zlbyUu650-- From xen-devel-bounces@lists.xenproject.org Thu May 28 10:17:39 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 10:17:39 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321069.1588083 (Exim 4.92) (envelope-from ) id 1wSXnx-00049b-5m; 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IMO it would be OK to wait for the next cycle. Bugfixes are still being accepted, and wrong comments are a bug.  I've taken the patch. ~Andrew From xen-devel-bounces@lists.xenproject.org Thu May 28 10:29:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 10:29:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321083.1588092 (Exim 4.92) (envelope-from ) id 1wSXzD-0005wq-8q; Thu, 28 May 2026 10:29:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321083.1588092; Thu, 28 May 2026 10:29:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSXzD-0005wi-4y; Thu, 28 May 2026 10:29:11 +0000 Received: by outflank-mailman (input) for mailman id 1321083; Thu, 28 May 2026 10:29:10 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSXzC-0005wc-7V for xen-devel@lists.xenproject.org; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: AN4lQsS1EjrH37Xc4hRCainQNU7nyJxWxMZ0V9JPgPxtiPpYxgvZZVXViJjdLLBn6DYm6UurAO5SlniFrR3br5KVq85uAQJY1wvizzIJ7lrDnL08Kdjym0UjapoybcIIBgSCXP8AZfhFJ4LkoLfd6ryrVV8nhquy31oZHqTh+eFGDsvOvChb5s20aN1iXXu4VirKhUu7outqJeCvaFCgp5QdldGqYVXBAcBd8LD3DNh2jgY1slQPHc6P9WZq3bCQ48uGIkw9t8ls9f3+BzyuCnSet/bL2bSXOxiXnuQ78zZbqdeu+caQ3PNtEHTs3bGwZjFwAaUZgjY4OvgUfMQ4oppSIV5NN5U9wGkruREPmMZ+JIBFCDSoRo9yWKcaom80LLfiS2EjOmv3ngrgwCFK+YArJDrddcCClKbDrMXSrmAQlPtOt4bsuDODznhqguJ7 X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2026 10:29:05.2901 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 776e3aea-3a6d-46c6-2b2c-08debca3f1b1 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM4PEPF00027A60.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR08MB11363 X-purgate-ID: tlsNG-42698a/1779964148-2007BF3B-52DBB575/0/0 X-purgate-type: clean X-purgate-size: 1750 Hi Mykola, > On 21 May 2026, at 18:45, Mykola Kvach wrote: >=20 > From: Mirela Simonovic >=20 > System suspend may lead to a state where GIC would be powered down. > Therefore, Xen should save/restore the context of GIC on suspend/resume. >=20 > Note that the context consists of states of registers which are > controlled by the hypervisor. Other GIC registers which are accessible > by guests are saved/restored on context switch. >=20 > Transient physical SGI pending state (GICD_CPENDSGIRn/GICD_SPENDSGIRn) > is intentionally excluded. CPU-interface active-priority state is also > not restored across suspend/resume. Xen reaches the final suspend path > at a quiescent point, so there is no active-priority execution context > to replay after resume. Enforce this with a runtime check after > disabling the CPU interface: if any implemented GICC_APRn word is still > non-zero, restore GICC_CTLR and abort suspend with -EBUSY. >=20 > This does not apply to distributor active state. With GICv2 EOImode=3D=3D= 1, > EOIR only drops the interrupt priority; final deactivation is a separate > step. For guest-routed interrupts, Xen can have already EOIed the physica= l > IRQ while deactivation is still pending on the vGIC/GICV path. Therefore > GICD_ISACTIVER is preserved as architectural in-flight interrupt state. >=20 > Signed-off-by: Mirela Simonovic > Signed-off-by: Saeed Nowshadi > Signed-off-by: Mykyta Poturai > Signed-off-by: Mykola Kvach > --- looks ok to me: Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 28 11:39:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 11:39:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321112.1588101 (Exim 4.92) (envelope-from ) id 1wSZ57-0006v7-3k; Thu, 28 May 2026 11:39:21 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321112.1588101; Thu, 28 May 2026 11:39:21 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSZ57-0006v0-0h; Thu, 28 May 2026 11:39:21 +0000 Received: by outflank-mailman (input) for mailman id 1321112; Thu, 28 May 2026 11:39:20 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) id 1wSZ55-0006uu-QQ for xen-devel@lists.xenproject.org; Thu, 28 May 2026 11:39:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSZ55-00Eazr-7G for xen-devel@lists.xenproject.org; Thu, 28 May 2026 13:39:19 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a182966-e002-0a2a0a5209dd-0a2a4503a0e4-4 for ; Thu, 28 May 2026 13:39:19 +0200 Received: from [209.85.128.49] (helo=mail-wm1-f49.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a182966-672d-0a2a45030019-d1558031c01f-3 for ; Thu, 28 May 2026 13:39:19 +0200 Received: by mail-wm1-f49.google.com with SMTP id 5b1f17b1804b1-4903f7a90d1so56512925e9.2 for ; Thu, 28 May 2026 04:39:19 -0700 (PDT) Received: from localhost.localdomain (host-78-146-242-105.as13285.net. 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Under other circumstances I'd revert, but xenstored has gained a dependent use of DOMID_ANY. Fix up the remaining in-tree callers of xc_domain_create(), which covers init-xenstore-domain and the python bindings. The Ocaml C bindings, like libxc itself, expose this ABI detail to their caller, but in this case the caller is still internal to the bindings as a whole. Adjust the default value in the internal transformation, adding domid_any for legibility. Leave a very clear message in CHANGELOG.md that all external callers need altering. Fixes: 23e2479ff9de ("xen/domain: introduce DOMID_ANY") Signed-off-by: Andrew Cooper --- CC: Anthony PERARD CC: Michal Orzel CC: Jan Beulich CC: Julien Grall CC: Roger Pau Monné CC: Stefano Stabellini CC: Juergen Gross CC: Denis Mukhin CC: Oleksii Kurochko CC: Marek Marczykowski-Górecki CC: Pau Ruiz Safont CC: Colin James v2: * Include XEN_DOMCTL_createdomain in CHANGELOG message too * Fix the Ocaml stubs too. There are now 0 Ocaml maintainers. Pau and Colin reviewed my suggestion on the Xapi Matrix channel. --- CHANGELOG.md | 4 ++++ tools/helpers/init-xenstore-domain.c | 2 +- tools/ocaml/libs/xc/xenctrl.ml | 4 +++- tools/python/xen/lowlevel/xc/xc.c | 2 +- 4 files changed, 9 insertions(+), 3 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 25f5a192ed48..1db3efc4864c 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -7,6 +7,10 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/) ## [4.22.0 UNRELEASED](https://xenbits.xenproject.org/gitweb/?p=xen.git;a=shortlog;h=staging) - TBD ### Changed + - Users of XEN_DOMCTL_createdomain/xc_domain_create() must now pass DOMID_ANY + to obtain an automatically allocated domid. The prior sentinel values (0 + since the start of Xen, and DOMID_INVALID since Xen 4.21) now no longer + represent a wildcard input. - On x86: - Enable pf-fixup option by default for PVH dom0. diff --git a/tools/helpers/init-xenstore-domain.c b/tools/helpers/init-xenstore-domain.c index 01ca667d25d1..2be5831a578d 100644 --- a/tools/helpers/init-xenstore-domain.c +++ b/tools/helpers/init-xenstore-domain.c @@ -21,7 +21,7 @@ #define LAPIC_BASE_ADDRESS 0xfee00000UL -static uint32_t domid = ~0; +static uint32_t domid = DOMID_ANY; static char *kernel; static char *ramdisk; static char *flask; diff --git a/tools/ocaml/libs/xc/xenctrl.ml b/tools/ocaml/libs/xc/xenctrl.ml index 97108b9d861a..147afa62c293 100644 --- a/tools/ocaml/libs/xc/xenctrl.ml +++ b/tools/ocaml/libs/xc/xenctrl.ml @@ -208,7 +208,9 @@ let with_intf f = external domain_create_stub: handle -> domid -> domctl_create_config -> domid = "stub_xc_domain_create" -let domain_create handle ?(domid=0) config = +let domid_any = 0x7ff5 (* DOMID_ANY from public/xen.h *) + +let domain_create handle ?(domid=domid_any) config = domain_create_stub handle domid config external domain_sethandle: handle -> domid -> string -> unit diff --git a/tools/python/xen/lowlevel/xc/xc.c b/tools/python/xen/lowlevel/xc/xc.c index 9feb12ae2b16..a94f01d40b58 100644 --- a/tools/python/xen/lowlevel/xc/xc.c +++ b/tools/python/xen/lowlevel/xc/xc.c @@ -118,7 +118,7 @@ static PyObject *pyxc_domain_create(XcObject *self, PyObject *args, PyObject *kwds) { - uint32_t dom = 0, target = 0, max_grant_version = 2; + uint32_t dom = DOMID_ANY, target = 0, max_grant_version = 2; int ret; size_t i; PyObject *pyhandle = NULL; base-commit: e63ba93511b33c0d3bb8cc5870f946f41e1d2655 -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 11:57:30 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 11:57:30 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321131.1588109 (Exim 4.92) (envelope-from ) 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xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=selector1 header.d=vates.tech header.i="@vates.tech" header.h="From:Subject:Date:Message-ID:To:Cc:MIME-Version:Content-Type:In-Reply-To:References:Feedback-ID" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vates.tech; q=dns/txt; s=selector1; bh=s2qt3kzZ2OImGll5tziYia1fWoioyR+7oRKNGzX+r6s=; h=from:subject:date:message-id:to:cc:mime-version:content-type:in-reply-to:references:feedback-id; b=ge3R6SzTaxgJ0kOCx4JwC4kpqa6uO70vwlcabmMqoPYVJHnbZ8TOuHtaW6Z1PBlJnQC3pd/VR mfrpt+uWgWffbQvALqi2t2wO4mfZjzsodsZBKQ1aigjA6qA6y1g9kjCY643/D9LpROP/GyL1Xi9 rViRJonOPEgc+m1OPMAxDKIq6IVfaw71ouCveOqQ8cQRqlmv4reHYpu2y5Jkp8838uXFtEQyNOV qbwQ+iKskXvGhYtLnBB00/KMNxv8luBgsb2tOaK3gBpspuXqqQcKQX3wF0NwFmv0i3YH9QtjNGZ X+holc9yGD7tQpX7U1Ztci7LSCwCkaRh5y2tA0sYu4Kw== X-Zone-Loop: 344848b688ce5f7ef483476bc5ec6443a710f6a431d6 x-campaign-type: default x-transaction-id: 04e08e82-0a8d-4a2f-9e6f-cdec36b1a607 x-swg-uid: 01-e5e78c17-2b30-4d3a-a302-65644abb583a X-Mailer: Sweego Message-ID: <1779969378.8631fc262581453bbf619ec5b2062170.19e6e7146fb000d780@vates.tech> x-swg-bid: 1779969378.8631fc262581453bbf619ec5b2062170.19e6e7146fb000d780 Feedback-ID: default:8631fc262581453bbf619ec5b2062170:Sweego x-campaign-id: default x-client-id: 8631fc262581453bbf619ec5b2062170 X-Originating-IP: [37.26.189.201] Date: Thu, 28 May 2026 12:56:16 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2] Fix fallout from DOMID_ANY ABI breakage To: Andrew Cooper , Xen-devel Cc: Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Stefano Stabellini , Juergen Gross , Denis Mukhin , Oleksii Kurochko , =?UTF-8?Q?Marek_Marczykowski-G=C3=B3recki?= , Colin James References: <20260528113915.2355130-1-andrew.cooper3@citrix.com> Content-Language: en-GB From: Pau Ruiz Safont In-Reply-To: <20260528113915.2355130-1-andrew.cooper3@citrix.com> X-BM-Disclaimer: Yes Content-Type: multipart/alternative; boundary="-=Part.164b.4bb40c100cd11592.19e6e7144c1.909c992ab4a050dc=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1779969377473 X-purgate-ID: tlsNG-c1860d/1779969383-BE577DB1-0E49C9D6/0/0 X-purgate-type: clean X-purgate-size: 2264 ---=Part.164b.4bb40c100cd11592.19e6e7144c1.909c992ab4a050dc=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On 28/05/2026 12:39, Andrew Cooper wrote: > --- > CHANGELOG=2Emd | 4 ++++ > tools/helpers/init-xenstore-domain=2Ec | 2 +- > tools/ocaml/libs/xc/xenctrl=2Eml | 4 +++- > tools/python/xen/lowlevel/xc/xc=2Ec | 2 +- > 4 files changed, 9 insertions(+), 3 deletions(-) >=20 > diff --git a/CHANGELOG=2Emd b/CHANGELOG=2Emd > index 25f5a192ed48=2E=2E1db3efc4864c 100644 > --- a/CHANGELOG=2Emd > +++ b/CHANGELOG=2Emd > @@ -7,6 +7,10 @@ The format is based on [Keep a Changelog](https://keepa= changelog=2Ecom/en/1=2E0=2E0/) > ## [4=2E22=2E0 UNRELEASED](https://xenbits=2Exenproject=2Eorg/gitweb/?= p=3Dxen=2Egit;a=3Dshortlog;h=3Dstaging) - TBD > =20 > ### Changed > + - Users of XEN_DOMCTL_createdomain/xc_domain_create() must now pass DO= MID_ANY > + to obtain an automatically allocated domid=2E The prior sentinel va= lues (0 > + since the start of Xen, and DOMID_INVALID since Xen 4=2E21) now no l= onger > + represent a wildcard input=2E > - On x86: > - Enable pf-fixup option by default for PVH dom0=2E > =20 > diff --git a/tools/ocaml/libs/xc/xenctrl=2Eml b/tools/ocaml/libs/xc/xenc= trl=2Eml > index 97108b9d861a=2E=2E147afa62c293 100644 > --- a/tools/ocaml/libs/xc/xenctrl=2Eml > +++ b/tools/ocaml/libs/xc/xenctrl=2Eml > @@ -208,7 +208,9 @@ let with_intf f =3D > external domain_create_stub: handle -> domid -> domctl_create_config -= > domid > =3D "stub_xc_domain_create" > =20 > -let domain_create handle ?(domid=3D0) config =3D > +let domid_any =3D 0x7ff5 (* DOMID_ANY from public/xen=2Eh *) > + > +let domain_create handle ?(domid=3Ddomid_any) config =3D > domain_create_stub handle domid config > =20 > external domain_sethandle: handle -> domid -> string -> unit > base-commit: e63ba93511b33c0d3bb8cc5870f946f41e1d2655 Acked-by: Pau Ruiz Safont Regards, Pau -- Pau Ruiz Safont | Vates XAPI Developer XCP-ng & Xen Orchestra - Vates= solutions web: https://vates=2Etech ---=Part.164b.4bb40c100cd11592.19e6e7144c1.909c992ab4a050dc=--- From xen-devel-bounces@lists.xenproject.org Thu May 28 12:21:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 12:21:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321152.1588120 (Exim 4.92) (envelope-from ) id 1wSZjP-0005u1-St; Thu, 28 May 2026 12:20:59 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321152.1588120; Thu, 28 May 2026 12:20:59 +0000 Received: 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List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=k20260515 header.d=kernel.org header.i="@kernel.org" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1779973160; bh=naFlqxbhwX4GtaQGoDTgjjV1+FBkawCwOLQmoy6mDlI=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=JbwLu/x1FG/SmagCxHsnTSG/bwx/DFQV3rVzN4ApHWGiyZVwb4zr2qkNRDEc0jmmX mVRc/1Pix+QvQllawmggohd/5IRDMZ8kwmnAZZQnpDW73WKevYxMvYypgjfDtChqtj vTovHyngwMUfbe/bu/2eg8DOzGNsubuHH1cu/FfMqhDLMWWS7nOGJImXXoEIZThwcd 7wnPxQd7EmDnNT/U0dyHGlR1D7SeVrFsQnBjcHKwPVNyldsHGd0LBPukpmunI8gWrH EPhShSh4fZMZMxdWT2raVB9v+F402qOB9uBy8aUEwzE0RMwfjb8cHwu/QrYR0yilwq LQgFH9G4MPBHQ== Date: Thu, 28 May 2026 15:59:11 +0300 From: Mike Rapoport To: Vishal Moola Cc: Dave Hansen , linux-mm@kvack.org, linux-kernel@vger.kernel.org, x86@kernel.org, Lu Baolu , xen-devel@lists.xenproject.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky Subject: Re: [PATCH 0/9] Convert x86 pgd_lists to ptdescs Message-ID: References: <20260527140316.294621-1-vishal.moola@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> X-purgate-ID: tlsNG-ef75cf/1779973162-29165C48-512DB56D/0/0 X-purgate-type: clean X-purgate-size: 2123 On Wed, May 27, 2026 at 03:03:07PM +0100, Vishal Moola wrote: > This continues the ptdesc conversions for x86[1]. This is a necessary step > in preparation for the separate allocation of ptdescs from struct page. > Once ptdescs are not wrappers, the pgd_list should be used to find our > ptdesc, not page. > > In fact, after patch 4 we can successfully boot a 32-bit x86 kernel > that separately allocates ptdescs. > > All of the patches are rather straightforward, I just kept them split up > for ease of review. There are no intended functional changes as ptdescs > are currently still wrappers around struct page. Looks straightforward to me indeed :) Acked-by: Mike Rapoport (Microsoft) > [1] https://lore.kernel.org/linux-mm/20260211195233.368497-1-vishal.moola@gmail.com/ > > ---------------- > > I've compiled and booted both 64 and 32 bit on a kernel with separately > allocated ptdescs. I ensured the codepaths were hit for all the changes > except Xen. > > This applies cleanly to the tip bot. I'm thinking this can go through > Dave's mm. > > Vishal Moola (9): > x86/mm/pat: Use IS_ENABLED() instead of ifdef > x86/mm/pat: Convert __set_pmd_pte() to ptdescs > x86/mm/pat: Convert collapse_pmd_page() to ptdescs > x86/mm: Convert arch_sync_kernel_mappings() to ptdescs > x86/mm: Convert sync_global_pgds_l5() to ptdescs > x86/mm: Convert sync_global_pgds_l4() to ptdescs > x86/mm: Convert pgd_page_get_mm() to ptdescs > x86/xen: Convert xen_mm_pin_all() to ptdescs > x86/xen: Convert xen_mm_unpin_all() to ptdescs > > arch/x86/include/asm/pgtable.h | 2 +- > arch/x86/include/asm/pgtable_types.h | 2 +- > arch/x86/mm/fault.c | 8 ++++---- > arch/x86/mm/init_64.c | 16 ++++++++-------- > arch/x86/mm/pat/set_memory.c | 17 ++++++++--------- > arch/x86/mm/pgtable.c | 4 ++-- > arch/x86/xen/mmu_pv.c | 22 +++++++++++----------- > 7 files changed, 35 insertions(+), 36 deletions(-) > > -- > 2.54.0 > -- Sincerely yours, Mike. From xen-devel-bounces@lists.xenproject.org Thu May 28 14:44:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:44:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321209.1588142 (Exim 4.92) (envelope-from ) id 1wSbyO-0007nL-Vc; Thu, 28 May 2026 14:44:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321209.1588142; Thu, 28 May 2026 14:44:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSbyO-0007nD-QZ; Thu, 28 May 2026 14:44:36 +0000 Received: by outflank-mailman (input) for mailman id 1321209; Thu, 28 May 2026 14:43:44 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSbxX-0007mD-Ol for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:43:44 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSbxX-008TQ6-0A for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:43:43 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a18548c-2eae-0a2a0a5409dd-0a2a4507a92e-42 for ; Thu, 28 May 2026 16:43:42 +0200 Received: from [91.218.175.180] (helo=out-180.mta0.migadu.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a18549d-229c-0a2a45070019-5bdaafb4b521-3 for ; Thu, 28 May 2026 16:43:41 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=key1 header.d=linux.dev header.i="@linux.dev" header.h="From:Subject:Date:Message-Id:To:Cc:Mime-Version:Content-Type:Content-Transfer-Encoding:In-Reply-To:References" Content-Type: text/plain; charset=us-ascii DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1779979421; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JaKylE9tmtxoDlvo1H6WypisSB7E9IbupaqeU2jxRQk=; b=UFA0TctBDoJctOHOsP80cIuOFeSA66cIPh1Azl9LETzBIkMwxe/ebMG53bjcMzoCC5tRVX uKP5vrf0O+p9HzNa1tStAw2NKP9KWd5O/MGfVsHSy/pa1ZWNeLUyMrQIU0HSHXygfLz9q3 +uH7ft1SDabLwk+BS+qTxDas3b5SyT0= Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3864.600.51.1.1\)) Subject: Re: [PATCH 0/9] Convert x86 pgd_lists to ptdescs X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. From: William Kucharski In-Reply-To: <20260527140316.294621-1-vishal.moola@gmail.com> Date: Thu, 28 May 2026 08:43:25 -0600 Cc: Dave Hansen , linux-mm@kvack.org, linux-kernel@vger.kernel.org, x86@kernel.org, Mike Rapoport , Lu Baolu , xen-devel@lists.xenproject.org, Thomas Gleixner , Ingo Molnar , Borislav Petkov , "H. Peter Anvin" , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Boris Ostrovsky Content-Transfer-Encoding: quoted-printable Message-Id: <83A6AC90-A51D-4E1E-9ADA-50195FA2485A@linux.dev> References: <20260527140316.294621-1-vishal.moola@gmail.com> To: Vishal Moola X-Migadu-Flow: FLOW_OUT X-purgate-ID: tlsNG-ef75cf/1779979422-0A772C48-5930820B/0/0 X-purgate-type: clean X-purgate-size: 2133 Looks great! Reviewed-by: William Kucharski > On May 27, 2026, at 08:03, Vishal Moola = wrote: >=20 > This continues the ptdesc conversions for x86[1]. This is a necessary = step > in preparation for the separate allocation of ptdescs from struct = page. > Once ptdescs are not wrappers, the pgd_list should be used to find our > ptdesc, not page. >=20 > In fact, after patch 4 we can successfully boot a 32-bit x86 kernel > that separately allocates ptdescs. >=20 > All of the patches are rather straightforward, I just kept them split = up > for ease of review. There are no intended functional changes as = ptdescs > are currently still wrappers around struct page. >=20 > [1] = https://lore.kernel.org/linux-mm/20260211195233.368497-1-vishal.moola@gmai= l.com/ >=20 > ---------------- >=20 > I've compiled and booted both 64 and 32 bit on a kernel with = separately > allocated ptdescs. I ensured the codepaths were hit for all the = changes > except Xen. >=20 > This applies cleanly to the tip bot. I'm thinking this can go through > Dave's mm. >=20 > Vishal Moola (9): > x86/mm/pat: Use IS_ENABLED() instead of ifdef > x86/mm/pat: Convert __set_pmd_pte() to ptdescs > x86/mm/pat: Convert collapse_pmd_page() to ptdescs > x86/mm: Convert arch_sync_kernel_mappings() to ptdescs > x86/mm: Convert sync_global_pgds_l5() to ptdescs > x86/mm: Convert sync_global_pgds_l4() to ptdescs > x86/mm: Convert pgd_page_get_mm() to ptdescs > x86/xen: Convert xen_mm_pin_all() to ptdescs > x86/xen: Convert xen_mm_unpin_all() to ptdescs >=20 > arch/x86/include/asm/pgtable.h | 2 +- > arch/x86/include/asm/pgtable_types.h | 2 +- > arch/x86/mm/fault.c | 8 ++++---- > arch/x86/mm/init_64.c | 16 ++++++++-------- > arch/x86/mm/pat/set_memory.c | 17 ++++++++--------- > arch/x86/mm/pgtable.c | 4 ++-- > arch/x86/xen/mmu_pv.c | 22 +++++++++++----------- > 7 files changed, 35 insertions(+), 36 deletions(-) >=20 > --=20 > 2.54.0 >=20 >=20 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:49:58 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:49:58 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321221.1588150 (Exim 4.92) (envelope-from ) id 1wSc3W-0008Tx-Fz; Thu, 28 May 2026 14:49:54 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321221.1588150; Thu, 28 May 2026 14:49:54 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc3W-0008Tq-DM; Thu, 28 May 2026 14:49:54 +0000 Received: by outflank-mailman (input) for mailman id 1321221; Thu, 28 May 2026 14:49:53 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc3V-0008Tk-9C for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:49:53 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSc3U-002bP9-IE for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:49:52 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a185603-e002-0a2a0a5209dd-0a2a4503c5ce-22 for ; Thu, 28 May 2026 16:49:52 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a18560f-672d-0a2a45030019-a0658308c51a-3 for ; Thu, 28 May 2026 16:49:52 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 2064943469FD; Thu, 28 May 2026 10:48:47 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/2] xen/mm: Fix offlining pages to avoid corrupting the heap Date: Thu, 28 May 2026 15:47:48 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1779979792-37D4B938-4D09F781/0/0 X-purgate-type: clean X-purgate-size: 5554 This series fixes a bug where offlining pages could lead to unaligned buddies being merged back onto the free list. The result is a chain of events that can corrupt the heap and trigger a Xen panic after a few allocations and frees. For example, an MCE caused by faulty RAM may mark pages as offline. When a buddy containing offlined pages is freed, those pages are moved to dedicated isolated page lists. reserve_offline_page() lacks alignment checks and may grow adjacent healthy spans into unaligned buddies that violate the fundamental buddy invariant: buddies of a given order must be aligned to their size. Consider a valid order-2 buddy (4 pages) with this layout: +---------------+-----------------+-----------------+----------------+ | head page | tail page 1 | tail page 2 | tail page 3 | +---------------+-----------------+-----------------+----------------+ reserve_offline_page() then merges unaligned tail pages: +---------------+-----------------+-----------------+----------------+ | offlined page | head page with a tail page | single page | +---------------+-----------------+-----------------+----------------+ This leads to a Xen panic, demonstrated by the test case: 1. When a single page is allocated from this buddy, MFN 7 is allocated: MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+----------------+ | offlined page | head page tail page | allocated page | | | Unaligned buddies are | | | | an invariant violation! | | +---------------+-----------------+-----------------+----------------+ 2. When MFN 7 is freed, the predecessor merge in free_heap_pages() kicks in, merging MFN 7 with its naturally aligned predecessor MFN 6: MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+ | offlined page | head page tail page | | | Unaligned buddies are | | | an invariant violation! | +---------------+-----------------+-----------------+----------------+ | head page tail page | +-----------------+----------------+ As shown, MFN 6 is double-freed. It is in two buddies: - As the tail page of the unaligned order-1 buddy starting at MFN 5. - As the head page of the aligned order-1 buddy starting at MFN 6. 3. The next allocations would allocate MFN 7 again, and MFN 6 as well: Due to the double-free, after the first allocation, MFN 6 remains on the free list even though its PGC_status is set to in-use. MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+ | offlined page | head page tail page | | | Unaligned buddies are | | | an invariant violation! | +---------------+-----------------+-----------------+----------------+ | in-use page | in-use page | +-----------------+----------------+ 4. When the next page from this buddy is allocated, get_free_page() returns the buddy head MFN 5. If the allocation is for order-0, alloc_heap_pages() splits page 6; otherwise, it keeps the buddy. Either way, the allocator checks the pages' PGC_status values and expects them not to be in-use. Because MFN 6 is already in-use, Xen panics (example panic log): pg[0] MFN 842adc c=0x4000000000000000 o=0 v=0 t=0 Xen BUG at common/page_alloc.c:1324 I reproduced this while running intensive NUMA claim tests combined with page offlining. The test case in this series demonstrates the cascading corruption that leads to the panic without intentionally having to crash a Xen instance to test for the bug. Running the test produces the following output (trimmed): $ make -C tools/tests/native test TARGETS=offline-unaligned | grep -v ' xen/' | The buddy #5 is not aligned to order-1! | <0>pg[0] MFN 00006 c=0x8000000000000001 o=1213 v=0 t=0 | xen/common/page_alloc.c:1324: WE INVOKED a XEN BUG in alloc_heap_pages() The second patch fixes the root cause and updates the test case to serve as a regression test. This series is based on the native test environment v3 for NUMA claims: https://lists.xen.org/archives/html/xen-devel/2026-05/msg01163.html It in turn depends on the NUMA claim sets v7 series: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html You can pull the series with dependencies for review and testing: $ git pull git@gitlab.com:bernhardkaindl/xen.git offline-unaligned-buddies-v1 $ make -C tools/tests/native TARGETS=offline-unaligned test Fixes: e4865c2315 ('Page offline support in Xen side') Signed-off-by: Bernhard Kaindl Bernhard Kaindl (2): tools/tests/native: Test for Xen Panic after memory offlining xen/mm: Fix offlining pages only make aligned buddies, fixes Xen crash tools/tests/native/offline-unaligned.c | 79 ++++++++++++++++++++++++++ xen/common/page_alloc.c | 5 ++ 2 files changed, 84 insertions(+) create mode 100644 tools/tests/native/offline-unaligned.c -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:53:01 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:53:01 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321250.1588159 (Exim 4.92) (envelope-from ) id 1wSc6W-0001bs-1Q; Thu, 28 May 2026 14:53:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321250.1588159; Thu, 28 May 2026 14:53:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc6V-0001bl-U4; Thu, 28 May 2026 14:52:59 +0000 Received: by outflank-mailman (input) for mailman id 1321250; Thu, 28 May 2026 14:52:58 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc6U-0001bf-IW for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:52:58 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSc6T-00H4IE-VL for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:52:57 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1856ac-2eae-0a2a0a5409dd-0a2a450bbcac-44 for ; Thu, 28 May 2026 16:52:57 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1856c8-212f-0a2a450b0019-a0658308803c-3 for ; Thu, 28 May 2026 16:52:57 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 2D12B4325930; Thu, 28 May 2026 10:51:53 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD Subject: [PATCH 1/2] tools/tests/native: Test for Xen Panic after memory offlining Date: Thu, 28 May 2026 15:47:49 +0100 Message-Id: <54c4b9e8c6561e897dec44d61a7315e899741397.1779979589.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779979977-1B979F3B-35CBAE84/0/0 X-purgate-type: clean X-purgate-size: 12710 Add a test case testing for heap corruption bug caused by reserving offlined pages from partially healthy buddies without alignment check. For example, due to bad RAM, an MCE could cause pages marked as offline. When a buddy containing offlined pages is freed, those pages are moved to dedicated isolated page lists. reserve_offline_page() lacks alignment checks and may grow adjacent healthy spans into unaligned buddies that violate the fundamental buddy invariant: buddies of a given order must be aligned to their size. Consider a valid order-2 buddy (4 pages) with this layout: +---------------+-----------------+-----------------+----------------+ | head page | tail page 1 | tail page 2 | tail page 3 | +---------------+-----------------+-----------------+----------------+ reserve_offline_page() then merges unaligned tail pages: +---------------+-----------------+-----------------+----------------+ | offlined page | head page with a tail page | single page | +---------------+-----------------+-----------------+----------------+ This leads to a Xen panic, demonstrated by the test case: 1. When a single page is allocated from this buddy, MFN 7 is allocated: MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+----------------+ | offlined page | head page tail page | allocated page | | | Unaligned buddies are | | | | an invariant violation! | | +---------------+-----------------+-----------------+----------------+ 2. When MFN 7 is freed, the predecessor merge in free_heap_pages() kicks in, merging MFN 7 with its naturally aligned predecessor MFN 6: MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+ | offlined page | head page tail page | | | Unaligned buddies are | | | an invariant violation! | +---------------+-----------------+-----------------+----------------+ | head page tail page | +-----------------+----------------+ As shown, MFN 6 is double-freed. It is in two buddies: - As the tail page of the unaligned order-1 buddy starting at MFN 5. - As the head page of the aligned order-1 buddy starting at MFN 6. 3. The next allocations would allocate MFN 7 again, and MFN 6 as well: Due to the double-free, after the first allocation, MFN 6 remains on the free list even though its PGC_status is set to in-use. MFN 4 MFN 5 MFN 6 MFN 7 +---------------+-----------------+-----------------+ | offlined page | head page tail page | | | Unaligned buddies are | | | an invariant violation! | +---------------+-----------------+-----------------+----------------+ | in-use page | in-use page | +-----------------+----------------+ 4. When the next page from this buddy is allocated, get_free_page() returns the buddy head MFN 5. If the allocation is for order-0, alloc_heap_pages() splits page 6; otherwise, it keeps the buddy. Either way, the allocator checks the pages' PGC_status values and expects them not to be in-use. Because MFN 6 is already in-use, Xen panics (example panic log): pg[0] MFN 842adc c=0x4000000000000000 o=0 v=0 t=0 Xen BUG at common/page_alloc.c:1324 I reproduced this while running intensive NUMA claim tests combined with page offlining. The test case in this series demonstrates the cascading corruption that leads to the panic without intentionally having to crash a Xen instance to test for the bug. Using the test case, the final lines are: $ make -C tools/tests/native test TARGETS=offline-unaligned|grep -v ' xen/' | The buddy #5 is not aligned to order-1! | <0>pg[0] MFN 00006 c=0x8000000000000001 o=1213 v=0 t=0 | xen/common/page_alloc.c:1324: WE INVOKED a XEN BUG in alloc_heap_pages() Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-unaligned.c | 171 +++++++++++++++++++++++++ 1 file changed, 171 insertions(+) create mode 100644 tools/tests/native/offline-unaligned.c diff --git a/tools/tests/native/offline-unaligned.c b/tools/tests/native/offline-unaligned.c new file mode 100644 index 000000000000..1186b1763bef --- /dev/null +++ b/tools/tests/native/offline-unaligned.c @@ -0,0 +1,171 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Test that offlining a predecessor of pages that must not be merged + * into an unaligned buddy is handled correctly. Specifically, verify + * that the Xen page allocator does not merge such unaligned buddies + * back onto the free list, which can produce a chain of events that + * leads to a Xen panic after a few allocations and frees. + * + * This test reproduces the scenario in isolation by offlining a page + * with an even MFN that has more than two following tail pages. + * + * If an unaligned buddy is returned to the free list, a sequence of + * allocations and a subsequent free can corrupt the free list state + * so that a later allocation triggers BUG() and crashes the instance. + * The test checks the free list behavior and, if the bug is present, + * confirms the resulting BUG(). + * + * Copyright (C) 2026 Cloud Software Group + */ +#include "harness/common.h" + +/* test_bss_start must be first in the BSS segment */ +void __aligned(PAGE_SIZE) *test_bss_start; + +/* Include xen/mm.h so we can wrap page_list_del() to assert the corruption. */ +#define TEST_WRAP_XEN_INCLUDE_XEN_MM_H +#include "harness/mm-wrapper.h" + +static bool expect_free_list_corruption; + +/* + * Wrap page_list_del() to not fail the test by virtue of the prepared + * free list state but continue the test like a running Xen instance + * would in many cases. Assert and expect the corruption, and continue. + */ +static inline void wrap_page_list_del(struct page_info *page, + struct page_list_head *head) +{ + printf("page_list_del: page MFN %lu, order %u\n", + mfn_x(page_to_mfn(page)), PFN_ORDER(page)); + + if ( expect_free_list_corruption ) + EXPECT_FAIL_BEGIN(); + CHECK(page->list.next && page->list.prev, "The free list is corrupt now!"); + if ( expect_free_list_corruption ) + EXPECT_FAIL_END(1); + + if ( page->list.next && page->list.prev ) + page_list_del(page, head); +} +#define page_list_del(page, head) wrap_page_list_del(page, head) + +/* + * Include the main test library that sets up scenarios, asserts + * allocator state, and provides the definitions and shims needed + * to call the Xen page allocator code in this test program. + */ +#define TEST_ENABLE_XC_DOMAIN_C +#include "harness/native.h" + +/* Verify the behavior of buddy merging after offlining a page */ +static void test_unaligned_buddy_merge(int start_mfn) +{ + struct page_info *pg = frame_table + start_mfn; + uint32_t status = 0; + + /* + * Prepare a valid order-2 buddy (4 pages) with this layout: + * +---------------+-----------------+-----------------+----------------+ + * | head page | tail page 1 | tail page 2 | tail page 3 | + * +---------------+-----------------+-----------------+----------------+ + */ + test_page_list_add_buddy(pg, order2); /* Seed the heap with this buddy */ + + /* Act */ + offline_page(page_to_mfn(pg), 0, &status); + CHECK(status & PG_OFFLINE_OFFLINED, "Page should be offlined"); + + /* + * The correct free list state after offlining the head page of the buddy + * is the the healthy pages are merged back onto the free list using a + * single page and a size-aligned buddy of the remaining pages: + * +---------------+-----------------+-----------------+----------------+ + * | offlined page | single page | head page with a tail page | + * +---------------+-----------------+-----------------+----------------+ + */ + EXPECT_FAIL_BEGIN(); + /* + * Due to a bug in reserve_offlined_page(), we get an unaligned buddy: + * +---------------+-----------------+-----------------+----------------+ + * | offlined page | head page with a tail page | single page | + * +---------------+-----------------+-----------------+----------------+ + */ + CHECK(page_aligned(pg + 1), "The buddy #%lu is not aligned to order-%d", + mfn_x(page_to_mfn(pg + 1)), PFN_ORDER(pg + 1)); + EXPECT_FAIL_END(1); + + /* Allocate and free a page to trigger buddy merging on free. */ + + /* + * After allocating and freeing MFN 7, we get a double-freed MFN 6 due + * to aligned predecessor merging in free_heap_pages(): + * + * MFN 4 MFN 5 MFN 6 MFN 7 + * +---------------+-----------------+-----------------+ + * | offlined page | head page tail page | + * | | Unaligned buddies are | + * | | an invariant violation! | + * +---------------+-----------------+-----------------+----------------+ + * | head page tail page | + * +-----------------+----------------+ + */ + expect_free_list_corruption = true; + free_domheap_pages(alloc_domheap_pages(dom1, order0, 0), order0); + + /* + * At this point, the free list is already corrupt. In free_heap_pages(), + * the tail of the unaligned buddy was added to the free list a 2nd time + * as the page of an overlapping aligned buddy. This is per design of the + * algorithm: These pages are free and thus the merging occurs as expected. + * + * The next allocation allocates the tail of the unaligned buddy, which + * is now, due to the merge, also the head of the new aligned buddy. + */ + CHECK((pg = alloc_domheap_pages(dom1, order1, 0)), "Alloc the order-1 pg"); + + /* Inspect the predecessor (pg is the tail of the unaligned buddy) */ + EXPECT_FAIL_BEGIN(); + /* + * After allocating two more pages, MFN 6 is free AND in-use: + * + * MFN 4 MFN 5 MFN 6 MFN 7 + * +---------------+-----------------+-----------------+ + * | offlined page | head page tail page | + * +---------------+-----------------+-----------------+----------------+ + * | in-use page in-use page | + * +-----------------+----------------+ + */ + CHECK(page_aligned(pg - 1), "The buddy #%lu is not aligned to order-%d!", + mfn_x(page_to_mfn(pg - 1)), PFN_ORDER(pg - 1)); + EXPECT_FAIL_END(1); + + /* Allocate the remaining page; a clean heap should not hit BUG(). */ + testcase_assert_expect_to_hit_bug = true; + /* + * As described above, if pg is the tail of an unaligned order-1 buddy, + * the unaligned buddy is still on the free list and this allocation will + * remove it from the free list and check alloc_heap_pages() checks the + * buddies to have a reference count of zero, and the already allocated + * page is returned as the tail of the unaligned buddy, causing the BUG(). + * + * MFN 4 MFN 5 MFN 6 MFN 7 + * +---------------+-----------------+-----------------+ + * | offlined page | head page tail page | <- panic's Xen + * +---------------+-----------------+-----------------+----------------+ + * | in-use page in-use page | + * +-----------------+----------------+ + */ + alloc_domheap_pages(dom1, order0, 0); /* Triggers BUG() */ +} + +int main(int argc, char *argv[]) +{ + if ( !parse_args(argc, argv, "Test not growing unaligned buddies") ) + return EXIT_FAILURE; + + init_page_alloc_tests(); + RUN_TESTCASE("TUBM", test_unaligned_buddy_merge, 4); + + return test_complete(); +} -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:53:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:53:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321260.1588168 (Exim 4.92) (envelope-from ) id 1wSc6v-00023Z-90; Thu, 28 May 2026 14:53:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321260.1588168; Thu, 28 May 2026 14:53:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc6v-00023S-5c; Thu, 28 May 2026 14:53:25 +0000 Received: by outflank-mailman (input) for mailman id 1321260; Thu, 28 May 2026 14:53:23 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSc6t-00023K-J7 for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:53:23 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSc6s-002cET-W6 for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:53:23 +0200 Received: from [10.42.69.1] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1856d9-bab6-0a2a0a5309dd-0a2a450183b4-20 for ; Thu, 28 May 2026 16:53:22 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-d62444.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1856e1-c1f2-0a2a45010019-a0658308a4aa-3 for ; Thu, 28 May 2026 16:53:22 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id AA5E6432A65A; Thu, 28 May 2026 10:52:17 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/2] xen/mm: Fix offlining pages only make aligned buddies, fixes Xen crash Date: Thu, 28 May 2026 15:47:50 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d62444/1779980002-AE342FF4-08704CCB/0/0 X-purgate-type: clean X-purgate-size: 7170 reserve_offline_pages() is missing an alignment check and thus has a relatively high probability of growing unaligned buddies. Fix this by checking alignment before growing spans to the next order. Update the test case to verify the fix and prevent future regressions. Fixes: e4865c2315 ('Page offline support in Xen side') Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-unaligned.c | 92 -------------------------- xen/common/page_alloc.c | 5 ++ 2 files changed, 5 insertions(+), 92 deletions(-) diff --git a/tools/tests/native/offline-unaligned.c b/tools/tests/native/offline-unaligned.c index 1186b1763bef..593135722a3f 100644 --- a/tools/tests/native/offline-unaligned.c +++ b/tools/tests/native/offline-unaligned.c @@ -17,38 +17,6 @@ * * Copyright (C) 2026 Cloud Software Group */ -#include "harness/common.h" - -/* test_bss_start must be first in the BSS segment */ -void __aligned(PAGE_SIZE) *test_bss_start; - -/* Include xen/mm.h so we can wrap page_list_del() to assert the corruption. */ -#define TEST_WRAP_XEN_INCLUDE_XEN_MM_H -#include "harness/mm-wrapper.h" - -static bool expect_free_list_corruption; - -/* - * Wrap page_list_del() to not fail the test by virtue of the prepared - * free list state but continue the test like a running Xen instance - * would in many cases. Assert and expect the corruption, and continue. - */ -static inline void wrap_page_list_del(struct page_info *page, - struct page_list_head *head) -{ - printf("page_list_del: page MFN %lu, order %u\n", - mfn_x(page_to_mfn(page)), PFN_ORDER(page)); - - if ( expect_free_list_corruption ) - EXPECT_FAIL_BEGIN(); - CHECK(page->list.next && page->list.prev, "The free list is corrupt now!"); - if ( expect_free_list_corruption ) - EXPECT_FAIL_END(1); - - if ( page->list.next && page->list.prev ) - page_list_del(page, head); -} -#define page_list_del(page, head) wrap_page_list_del(page, head) /* * Include the main test library that sets up scenarios, asserts @@ -84,78 +52,18 @@ static void test_unaligned_buddy_merge(int start_mfn) * | offlined page | single page | head page with a tail page | * +---------------+-----------------+-----------------+----------------+ */ - EXPECT_FAIL_BEGIN(); - /* - * Due to a bug in reserve_offlined_page(), we get an unaligned buddy: - * +---------------+-----------------+-----------------+----------------+ - * | offlined page | head page with a tail page | single page | - * +---------------+-----------------+-----------------+----------------+ - */ CHECK(page_aligned(pg + 1), "The buddy #%lu is not aligned to order-%d", mfn_x(page_to_mfn(pg + 1)), PFN_ORDER(pg + 1)); - EXPECT_FAIL_END(1); /* Allocate and free a page to trigger buddy merging on free. */ - - /* - * After allocating and freeing MFN 7, we get a double-freed MFN 6 due - * to aligned predecessor merging in free_heap_pages(): - * - * MFN 4 MFN 5 MFN 6 MFN 7 - * +---------------+-----------------+-----------------+ - * | offlined page | head page tail page | - * | | Unaligned buddies are | - * | | an invariant violation! | - * +---------------+-----------------+-----------------+----------------+ - * | head page tail page | - * +-----------------+----------------+ - */ - expect_free_list_corruption = true; free_domheap_pages(alloc_domheap_pages(dom1, order0, 0), order0); - - /* - * At this point, the free list is already corrupt. In free_heap_pages(), - * the tail of the unaligned buddy was added to the free list a 2nd time - * as the page of an overlapping aligned buddy. This is per design of the - * algorithm: These pages are free and thus the merging occurs as expected. - * - * The next allocation allocates the tail of the unaligned buddy, which - * is now, due to the merge, also the head of the new aligned buddy. - */ CHECK((pg = alloc_domheap_pages(dom1, order1, 0)), "Alloc the order-1 pg"); /* Inspect the predecessor (pg is the tail of the unaligned buddy) */ - EXPECT_FAIL_BEGIN(); - /* - * After allocating two more pages, MFN 6 is free AND in-use: - * - * MFN 4 MFN 5 MFN 6 MFN 7 - * +---------------+-----------------+-----------------+ - * | offlined page | head page tail page | - * +---------------+-----------------+-----------------+----------------+ - * | in-use page in-use page | - * +-----------------+----------------+ - */ CHECK(page_aligned(pg - 1), "The buddy #%lu is not aligned to order-%d!", mfn_x(page_to_mfn(pg - 1)), PFN_ORDER(pg - 1)); - EXPECT_FAIL_END(1); /* Allocate the remaining page; a clean heap should not hit BUG(). */ - testcase_assert_expect_to_hit_bug = true; - /* - * As described above, if pg is the tail of an unaligned order-1 buddy, - * the unaligned buddy is still on the free list and this allocation will - * remove it from the free list and check alloc_heap_pages() checks the - * buddies to have a reference count of zero, and the already allocated - * page is returned as the tail of the unaligned buddy, causing the BUG(). - * - * MFN 4 MFN 5 MFN 6 MFN 7 - * +---------------+-----------------+-----------------+ - * | offlined page | head page tail page | <- panic's Xen - * +---------------+-----------------+-----------------+----------------+ - * | in-use page in-use page | - * +-----------------+----------------+ - */ alloc_domheap_pages(dom1, order0, 0); /* Triggers BUG() */ } diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 46c01a9fca2a..d923ae02ade0 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1434,6 +1434,11 @@ static int reserve_offlined_page(struct page_info *head) if ( (cur_head + (1 << next_order)) >= (head + ( 1 << head_order)) ) goto merge; + /* Do not grow to next_order if cur_head is not aligned to it. */ + if ( (mfn_x(page_to_mfn(cur_head)) & ((1UL << next_order) - 1)) ) + goto merge; + + /* Check if any page in the next_order range is offlined. */ for ( i = (1 << cur_order), pg = cur_head + (1 << cur_order ); i < (1 << next_order); i++, pg++ ) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:58:00 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:58:00 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321301.1588178 (Exim 4.92) (envelope-from ) id 1wScBH-0002vc-PG; Thu, 28 May 2026 14:57:55 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321301.1588178; Thu, 28 May 2026 14:57:55 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBH-0002vU-LM; Thu, 28 May 2026 14:57:55 +0000 Received: by outflank-mailman (input) for mailman id 1321301; Thu, 28 May 2026 14:57:54 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBG-0002uJ-AI for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:57:54 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScBF-00FGK8-NJ for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:57:53 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1857dc-5cb7-0a2a0a5109dd-0a2a4509abf2-48 for ; Thu, 28 May 2026 16:57:53 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1857f0-2497-0a2a45090019-a0658308bf8c-3 for ; Thu, 28 May 2026 16:57:53 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 53F2A4346BF6; Thu, 28 May 2026 10:56:48 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/2] xen/mm: Fix off-by-one for tail merge in reserve_offlined_page() Date: Thu, 28 May 2026 15:55:53 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779980273-40762A53-1E00BD44/0/0 X-purgate-type: clean X-purgate-size: 2762 After offlining pages, reserve_offlined_page() returns healthy spans of pages from the buddy it isolated the offlined pages back to the free lists. Naturally, it attempts to grow larger buddies, but due to an off-by-one, this fails at the tail end of the span of pages. Patch 1 adds a native regression test that reproduces the problem. Patch 2 fixes the off-by-one error and updates the regression test. Consider an order-2 buddy (4 pages) with the following layout: +---------------+---------------+---------------+---------------+ | head page tail page 1, tail page 2 tail page 3 | | PFN_ORDER(pg) marked as to | | == 2 be offlined | +---------------+---------------+---------------+---------------+ The expected result after removing tail page 1 and returning the remaining healthy pages to the free list would be: +---------------+ +---------------+---------------+ | single page | offlined page | head page tail page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | | == 0 | to the heap | == 1 | +---------------+ +---------------+---------------+ A trivial off-by-one error in the growth loop stops the growth loop early before the tail end of the original buddy and we end up with: +---------------+ +---------------+---------------+ | single page | offlined page | single page | single page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | PFN_ORDER(pg) | | == 0 | to the heap | == 0 | == 0 | +---------------+ +---------------+---------------+ This series is based on the native test environment v3 for NUMA claims https://lists.xen.org/archives/html/xen-devel/2026-05/msg01163.html In turn, it is based on the NUMA claim sets v7 series: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html You can pull this series with all dependencies for review and test: $ git pull git@gitlab.com:bernhardkaindl/xen.git offline-merge-tail-v1 $ make -C tools/tests/native TARGETS=offline-merge-tail test Fixes: e4865c2315 ('Page offline support in Xen side') Signed-off-by: Bernhard Kaindl Bernhard Kaindl (2): tools/tests/native: Test merging the tail after an offlined page xen/mm: Fix off-by-one stopping tail merge in reserve_offlined_page tools/tests/native/offline-merge-tail.c | 87 +++++++++++++++++++++++++ xen/common/page_alloc.c | 4 +- 2 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 tools/tests/native/offline-merge-tail.c -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:58:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:58:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321302.1588186 (Exim 4.92) (envelope-from ) id 1wScBO-0003CU-VC; Thu, 28 May 2026 14:58:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321302.1588186; Thu, 28 May 2026 14:58:02 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBO-0003CN-SP; Thu, 28 May 2026 14:58:02 +0000 Received: by outflank-mailman (input) for mailman id 1321302; Thu, 28 May 2026 14:58:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBO-0003Aq-1h for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:58:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScBN-002csK-Ez for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:58:01 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1857f3-e002-0a2a0a5209dd-0a2a4509ce40-20 for ; Thu, 28 May 2026 16:58:01 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1857f8-2497-0a2a45090019-a0658308cd42-3 for ; Thu, 28 May 2026 16:58:01 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id B510943317FA; Thu, 28 May 2026 10:56:56 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD Subject: [PATCH 1/2] tools/tests/native: Test merging the tail after an offlined page Date: Thu, 28 May 2026 15:55:54 +0100 Message-Id: <3e4c306673c9c8825d09a7a15360f553d64cb430.1779980089.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1779980281-8876DA53-2DB5664B/0/0 X-purgate-type: clean X-purgate-size: 6321 After offlining pages, reserve_offlined_page() returns healthy spans of pages from the buddy it isolated the offlined pages back to the free lists. Naturally, it attempts to grow larger buddies, but due to an off-by-one, this fails at the tail end of the span of pages. The test seeds the heap with an order-2 buddy and offlines tail page 1: +---------------+---------------+---------------+---------------+ | head page tail page 1, tail page 2 tail page 3 | | PFN_ORDER(pg) marked as to | | == 2 be offlined | +---------------+---------------+---------------+---------------+ After reserve_offlined_page(), the healthy pages should be: +---------------+ +---------------+---------------+ | single page | offlined page | head page tail page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | | == 0 | to the heap | == 1 | +---------------+ +---------------+---------------+ A trivial off-by-one error in the growth loop stops the growth loop early, before the tail end of the original buddy, and we end up with: +---------------+ +---------------+---------------+ | single page | offlined page | single page | single page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | PFN_ORDER(pg) | | == 0 | to the heap | == 0 | == 0 | +---------------+ +---------------+---------------+ Running the test: make -C tools/tests/native TARGETS=offline-merge-tail test Test result: | - Test assertion failed as expected at offline-merge-tail.c:63: | The pair of tail pages should be merged into an order-1 buddy Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-merge-tail.c | 93 +++++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 tools/tests/native/offline-merge-tail.c diff --git a/tools/tests/native/offline-merge-tail.c b/tools/tests/native/offline-merge-tail.c new file mode 100644 index 000000000000..11c79e3ecc1b --- /dev/null +++ b/tools/tests/native/offline-merge-tail.c @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Tests using offline_page() to verify reserve_offlined_page() + * + * The workflow tested here is offlining a free page: + * + * 1. offline_page() calls mark_page_offlined() to mark the page. + * 2. It calls reserve_heap_page() to find the containing buddy. + * 3. It calls reserve_offlined_page() to reserve the marked pages within + * that buddy. + * + * reserve_offlined_page() then: + * + * 1. Removes the buddy, a 2^order group of pages, from the free list. + * 2. Finds size-aligned spans of healthy pages within it. + * 3. Rebuilds healthy buddies from those spans and + * adds them back to the free list via page_list_add_scrub(). + * 4. Moves offlined subpages to the offlined page lists. + * + * Another workflow marks an in-use page for offlining and then + * relies on free_heap_pages() to call reserve_offlined_page() + * when that page is eventually freed. + * + * Copyright (C) 2026 Cloud Software Group + */ +#define TEST_ENABLE_XC_DOMAIN_C +#include "harness/native.h" + +/* Test merging a surviving tail pair into an order-1 buddy. */ +static void test_merge_tail_pair(int start_mfn) +{ + struct page_info *pages = frame_table + start_mfn; + uint32_t status = 0; + + /* + * Prepare a valid order-2 buddy (4 pages) with this layout: + * +---------------+-----------------+-----------------+----------------+ + * | head page | tail page 1 | tail page 2 | tail page 3 | + * +---------------+-----------------+-----------------+----------------+ + */ + test_page_list_add_buddy(pages, order2); + + /* Mark the tail page 3 dirty to verify dirty-state preservation. */ + pages[3].count_info |= PGC_need_scrub; + pages[0].u.free.first_dirty = 3; + + /* Act: Offline the second page. */ + ASSERT(offline_page(page_to_mfn(pages + 1), 0, &status) == 0); + ASSERT(status & PG_OFFLINE_OFFLINED); + ASSERT(FREE_PAGES == 3); + + /* + * Offlining page 1 results in splitting the original order-2 buddy into: + * - pages[0] as an order-0 buddy + * - pages[1] is the offlined page, removed from the free list + * - pages[2] as an order-0 buddy + * - pages[3] as an order-0 buddy: + * +---------------+ +---------------+---------------+ + * | single page | offlined page | single page | single page | + * +---------------+ +---------------+---------------+ + * + * Tail 2 & 3 are aligned, so they should be merged into an order-1 buddy: + * +---------------+ +---------------+---------------+ + * | single page | offlined page | head page with a tail page | + * +---------------+ +---------------+---------------+ + */ + CHECK(PFN_ORDER(&pages[0]) == 0, "Former head page, now order-0"); + CHECK(PFN_ORDER(&pages[1]) == 0, "Offlined page should be order-0"); + /* pages[0] and pages[1] were prepared as clean pages and still are. */ + ASSERT(pages[0].u.free.first_dirty == INVALID_DIRTY_IDX); + ASSERT(pages[1].u.free.first_dirty == INVALID_DIRTY_IDX); + + /* The tail pair is expected to be merged into one order-1 buddy. */ + EXPECT_FAIL_BEGIN(); + CHECK(PFN_ORDER(&pages[2]) == 1, + "The pair of tail pages should be merged into an order-1 buddy"); + CHECK(pages[2].u.free.first_dirty == 1, "In tail buddy, the 2nd is dirty"); + /* The tail page of the merged buddy does not use first_dirty. */ + CHECK(pages[3].u.free.first_dirty == INVALID_DIRTY_IDX, + "Tail page of the merged buddy should not set first_dirty"); + EXPECT_FAIL_END(3); +} + +int main(int argc, char *argv[]) +{ + const char *topic = "Integration test of offline_page()"; + if ( !parse_args(argc, argv, topic) ) + return EXIT_FAILURE; + + init_page_alloc_tests(); + RUN_TESTCASE("TMTP", test_merge_tail_pair, 4); + return test_complete(); +} -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 14:58:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 14:58:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321304.1588195 (Exim 4.92) (envelope-from ) id 1wScBX-0003b3-C8; Thu, 28 May 2026 14:58:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321304.1588195; Thu, 28 May 2026 14:58:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBX-0003aw-7Z; Thu, 28 May 2026 14:58:11 +0000 Received: by outflank-mailman (input) for mailman id 1321304; Thu, 28 May 2026 14:58:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScBV-0003Wu-NY for xen-devel@lists.xenproject.org; Thu, 28 May 2026 14:58:09 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScBV-00AwUB-4C for xen-devel@lists.xenproject.org; Thu, 28 May 2026 16:58:09 +0200 Received: from [10.42.69.11] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1857ec-2eae-0a2a0a5409dd-0a2a450be03e-36 for ; Thu, 28 May 2026 16:58:09 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-42698a.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a185800-212f-0a2a450b0019-a065830891c0-3 for ; Thu, 28 May 2026 16:58:08 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id D1E6F4336E49; Thu, 28 May 2026 10:57:03 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/2] xen/mm: Fix off-by-one stopping tail merge in reserve_offlined_page Date: Thu, 28 May 2026 15:55:55 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-42698a/1779980289-2007BF3B-218EF66C/0/0 X-purgate-type: clean X-purgate-size: 4855 reserve_offlined_page() reserves pages marked for offlining and returns free buddies from the remaining healthy tail pages back to the free list. Consider an order-2 buddy (4 pages) with the following layout: +---------------+---------------+---------------+---------------+ | head page tail page 1, tail page 2 tail page 3 | | PFN_ORDER(pg) marked as to | | == 2 be offlined | +---------------+---------------+---------------+---------------+ The expected result after removing tail page 1 and returning the remaining healthy pages to the free list would be: +---------------+ +---------------+---------------+ | single page | offlined page | head page tail page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | | == 0 | to the heap | == 1 | +---------------+ +---------------+---------------+ A trivial off-by-one error in the growth loop stops the growth loop early before the tail end of the original buddy and we end up with: +---------------+ +---------------+---------------+ | single page | offlined page | single page | single page | | PFN_ORDER(pg) | not returned | PFN_ORDER(pg) | PFN_ORDER(pg) | | == 0 | to the heap | == 0 | == 0 | +---------------+ +---------------+---------------+ If the offlined page was in a much larger buddy, this would lead to much more memory not available for higher order allocations requiring the full tail end of the original buddy for allocation. Fix the growth loop to correctly grow the buddy to the tail end to make the full allocation unit available for future allocation and update the test case to confirm the expected result and to prevent regressions in the future. Update the test case to verify the fix and prevent future regressions. Fixes: e4865c2315 ('Page offline support in Xen side') Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-merge-tail.c | 8 +------- xen/common/page_alloc.c | 4 +++- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/tools/tests/native/offline-merge-tail.c b/tools/tests/native/offline-merge-tail.c index 11c79e3ecc1b..1893b23c7249 100644 --- a/tools/tests/native/offline-merge-tail.c +++ b/tools/tests/native/offline-merge-tail.c @@ -53,11 +53,7 @@ static void test_merge_tail_pair(int start_mfn) * Offlining page 1 results in splitting the original order-2 buddy into: * - pages[0] as an order-0 buddy * - pages[1] is the offlined page, removed from the free list - * - pages[2] as an order-0 buddy - * - pages[3] as an order-0 buddy: - * +---------------+ +---------------+---------------+ - * | single page | offlined page | single page | single page | - * +---------------+ +---------------+---------------+ + * - pages[2] and pages[3] as an unaligned order-1 buddy * * Tail 2 & 3 are aligned, so they should be merged into an order-1 buddy: * +---------------+ +---------------+---------------+ @@ -71,14 +67,12 @@ static void test_merge_tail_pair(int start_mfn) ASSERT(pages[1].u.free.first_dirty == INVALID_DIRTY_IDX); /* The tail pair is expected to be merged into one order-1 buddy. */ - EXPECT_FAIL_BEGIN(); CHECK(PFN_ORDER(&pages[2]) == 1, "The pair of tail pages should be merged into an order-1 buddy"); CHECK(pages[2].u.free.first_dirty == 1, "In tail buddy, the 2nd is dirty"); /* The tail page of the merged buddy does not use first_dirty. */ CHECK(pages[3].u.free.first_dirty == INVALID_DIRTY_IDX, "Tail page of the merged buddy should not set first_dirty"); - EXPECT_FAIL_END(3); } int main(int argc, char *argv[]) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index d923ae02ade0..dd0b7c67008d 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1427,11 +1427,13 @@ static int reserve_offlined_page(struct page_info *head) next_order = cur_order = 0; + /* Attempt to grow the order (size) of the buddy as much as possible. */ while ( cur_order < head_order ) { next_order = cur_order + 1; - if ( (cur_head + (1 << next_order)) >= (head + ( 1 << head_order)) ) + /* Do not grow to next_order if it would go beyond the buddy. */ + if ( (cur_head + (1 << next_order)) > (head + ( 1 << head_order)) ) goto merge; /* Do not grow to next_order if cur_head is not aligned to it. */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 15:00:53 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 15:00:53 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321371.1588203 (Exim 4.92) (envelope-from ) id 1wScE8-0005h1-Ny; Thu, 28 May 2026 15:00:52 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321371.1588203; Thu, 28 May 2026 15:00:52 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScE8-0005gu-L9; Thu, 28 May 2026 15:00:52 +0000 Received: by outflank-mailman (input) for mailman id 1321371; Thu, 28 May 2026 15:00:51 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScE7-0005go-A5 for xen-devel@lists.xenproject.org; Thu, 28 May 2026 15:00:51 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScE6-008W3a-My for xen-devel@lists.xenproject.org; Thu, 28 May 2026 17:00:50 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a185891-5cb7-0a2a0a5109dd-0a2a450aebd6-30 for ; Thu, 28 May 2026 17:00:50 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1858a1-56b3-0a2a450a0019-a0658309e4a4-3 for ; Thu, 28 May 2026 17:00:50 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 53CEC82553ED; Thu, 28 May 2026 10:59:35 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD Subject: [PATCH 1/2] tools/tests/native: Add test for offlined buddy head PFN_ORDER Date: Thu, 28 May 2026 15:58:20 +0100 Message-Id: <347e2d21f12b3cd7b3fa6204cad978e4cf375bf3.1779980244.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779980450-6FB5F8B7-9BA205A8/0/0 X-purgate-type: clean X-purgate-size: 4958 Add a regression test that reproduces and documents an inconsistent PFN_ORDER observed when the head page of a free buddy is offlined. When the head of a free buddy is offlined it remains annotated with its original PFN_ORDER while offline, even though the buddy has been split into single pages. This mismatch is surprising and can hinder debugging, although it does not currently cause functional failures. What the test does: - Seed a single order-1 buddy on the heap and offline the head page. - Document the current failing behaviour by asserting (EXPECT_FAIL) that the offlined head's PFN_ORDER is (not) 0. - Allocate the successor to prevent a merge, online the page, and verify that onlining restores the PFN_ORDER to 0. How to run: make -C tools/tests/native TARGETS=offline-head-order test Example failing output (current behaviour): - Test assertion failed as expected at offline-head-order.c:40: Offlined former buddy head should be order0 This test is intended as a regression test and should be updated with the same commit that resets the PFN_ORDER to 0 on offlining. Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-head-order.c | 87 +++++++++++++++++++++++++ 1 file changed, 87 insertions(+) create mode 100644 tools/tests/native/offline-head-order.c diff --git a/tools/tests/native/offline-head-order.c b/tools/tests/native/offline-head-order.c new file mode 100644 index 000000000000..5c666a319523 --- /dev/null +++ b/tools/tests/native/offline-head-order.c @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Tests using offline_page() to verify reserve_offlined_page() + * + * The workflow tested here is offlining a free page: + * + * 1. offline_page() calls mark_page_offlined() to mark the page. + * 2. It calls reserve_heap_page() to find the containing buddy. + * 3. It calls reserve_offlined_page() to reserve the marked pages within + * that buddy. + * + * reserve_offlined_page() then: + * + * 1. Removes the buddy, a 2^order group of pages, from the free list. + * 2. Finds size-aligned spans of healthy pages within it. + * 3. Rebuilds healthy buddies from those spans and + * adds them back to the free list via page_list_add_scrub(). + * 4. Moves offlined subpages to the offlined page lists. + * + * Copyright (C) 2026 Cloud Software Group + */ +#define TEST_ENABLE_XC_DOMAIN_C +#include "harness/native.h" + +static void test_offline_head_order(int start_mfn) +{ + struct page_info *page = frame_table + start_mfn; + uint32_t status = 0; + + /* Seed a single order-1 buddy onto the heap. */ + test_page_list_add_buddy(page, order1); + ASSERT(PFN_ORDER(page) == 1); + /* Offline the head page. */ + ASSERT(offline_page(page_to_mfn(page), 0, &status) == 0); + ASSERT(status == PG_OFFLINE_OFFLINED); + + /* Confirm the status of the page as status offlined. */ + status = 0; + ASSERT(query_page_offline(page_to_mfn(page), &status) == 0); + ASSERT(status == PG_OFFLINE_STATUS_OFFLINED); + + /* Check the order of the offlined head page. */ + EXPECT_FAIL_BEGIN(); /* PFN_ORDER(page) should 0, but is still 1 */ + ASSERT(PFN_ORDER(page) == 0); + EXPECT_FAIL_END(1); + + /* + * Allocate the successor page of the offlined page. This prevents + * the normal successor page merge when the page is re-onlined below. + */ + struct page_info *pg = alloc_domheap_pages(dom1, order0, 0); + ASSERT(pg == page + 1); + ASSERT(FREE_PAGES == 0); + + /* + * The order of the split head page is still 1. Online the page again to + * confirm that onlining it causes the order to be corrected to 0. + */ + ASSERT(PFN_ORDER(page) == 1); + + /* Online the offlined former head page. */ + ASSERT(online_page(page_to_mfn(page), &status) == 0); + ASSERT(status & PG_ONLINE_ONLINED); + ASSERT(FREE_PAGES == 1); + + /* + * Confirm the order of the onlined former head page is 0, independently + * of the order returned by PFN_ORDER() for the offlined page. This should + * always be successful because page_offlined_list only contains single + * pages and online_page() ignores PFN_ORDER(pg) of the page. It calls + * free_heap_pages() passing the order hardcoded to 0. This causes it to + * pass the given order 0 to page_list_add_scrub(). This causes it to set + * the order of the page to 0 before it adds the page to the free list. + */ + ASSERT(PFN_ORDER(page) == 0); +} + +int main(int argc, char *argv[]) +{ + const char *topic = "Test offlined head page to be updated to PFN_ORDER 0"; + if ( !parse_args(argc, argv, topic) ) + return EXIT_FAILURE; + + init_page_alloc_tests(); + RUN_TESTCASE("TOHP", test_offline_head_order, 2); + return test_complete(); +} -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 15:01:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 15:01:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321372.1588213 (Exim 4.92) (envelope-from ) id 1wScEM-0005yN-Vn; Thu, 28 May 2026 15:01:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321372.1588213; Thu, 28 May 2026 15:01:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScEM-0005yG-SR; Thu, 28 May 2026 15:01:06 +0000 Received: by outflank-mailman (input) for mailman id 1321372; Thu, 28 May 2026 15:01:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScEL-0005xo-J0 for xen-devel@lists.xenproject.org; Thu, 28 May 2026 15:01:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScEK-002dXk-W0 for xen-devel@lists.xenproject.org; Thu, 28 May 2026 17:01:04 +0200 Received: from [10.42.69.10] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1858a3-e002-0a2a0a5209dd-0a2a450ad99c-40 for ; Thu, 28 May 2026 17:01:04 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-4011c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1858b0-56b3-0a2a450a0019-a0658308c180-3 for ; Thu, 28 May 2026 17:01:04 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id C43A04347081; Thu, 28 May 2026 10:59:59 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 2/2] xen/mm: reset PFN_ORDER for offlined buddy heads Date: Thu, 28 May 2026 15:58:21 +0100 Message-Id: <9ffee13184b4499218fc80544bd3ee1a06aa2898.1779980244.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-4011c0/1779980464-729768B7-38A19B42/0/0 X-purgate-type: clean X-purgate-size: 2985 Ensure offlined buddy head pages are annotated as order-0 pages. When a buddy containing pages marked for offlining is processed, reserve_offlined_page() rebuilds any surviving healthy buddies and moves the offlined subpages onto the offlined lists. If the buddy head itself is offlined it was previously left annotated with the original buddy order even though it has been split into a single page. This has no functional impact as the order of an offlined page is not used for any decision making and onlining, but it is misleading when inspecting the page's metadata. Reset PFN_ORDER(cur_head) to 0 for an offlined buddy head when moving it to the offlined list so the page's stored order reflects its actual size. Also update the regression test to assert the consistent behavior. Signed-off-by: Bernhard Kaindl --- tools/tests/native/offline-head-order.c | 8 -------- xen/common/page_alloc.c | 7 +++++++ 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/tools/tests/native/offline-head-order.c b/tools/tests/native/offline-head-order.c index 5c666a319523..5239fc34518f 100644 --- a/tools/tests/native/offline-head-order.c +++ b/tools/tests/native/offline-head-order.c @@ -40,9 +40,7 @@ static void test_offline_head_order(int start_mfn) ASSERT(status == PG_OFFLINE_STATUS_OFFLINED); /* Check the order of the offlined head page. */ - EXPECT_FAIL_BEGIN(); /* PFN_ORDER(page) should 0, but is still 1 */ ASSERT(PFN_ORDER(page) == 0); - EXPECT_FAIL_END(1); /* * Allocate the successor page of the offlined page. This prevents @@ -52,12 +50,6 @@ static void test_offline_head_order(int start_mfn) ASSERT(pg == page + 1); ASSERT(FREE_PAGES == 0); - /* - * The order of the split head page is still 1. Online the page again to - * confirm that onlining it causes the order to be corrected to 0. - */ - ASSERT(PFN_ORDER(page) == 1); - /* Online the offlined former head page. */ ASSERT(online_page(page_to_mfn(page), &status) == 0); ASSERT(status & PG_ONLINE_ONLINED); diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index dd0b7c67008d..1801afc96a0a 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -1485,6 +1485,13 @@ static int reserve_offlined_page(struct page_info *head) ASSERT(node_avail_pages[node] > 0); node_avail_pages[node]--; + /* + * All offlined pages are standalone pages: If this offlined page was + * the head of a higher-order buddy, we need to reset its order to 0: + */ + if ( cur_head == head && head_order != 0 ) + PFN_ORDER(cur_head) = 0; + page_list_add_tail(cur_head, test_bit(_PGC_broken, &cur_head->count_info) ? &page_broken_list : &page_offlined_list); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 15:08:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 15:08:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321444.1588222 (Exim 4.92) (envelope-from ) id 1wScLL-00075x-Mc; Thu, 28 May 2026 15:08:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321444.1588222; Thu, 28 May 2026 15:08:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScLL-00075q-J1; Thu, 28 May 2026 15:08:19 +0000 Received: by outflank-mailman (input) for mailman id 1321444; Thu, 28 May 2026 15:08:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScLJ-00075k-Ov for xen-devel@lists.xenproject.org; Thu, 28 May 2026 15:08:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScLJ-0017c2-5j for xen-devel@lists.xenproject.org; Thu, 28 May 2026 17:08:17 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a185a60-e002-0a2a0a5209dd-0a2a450c91b0-4 for ; Thu, 28 May 2026 17:08:17 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a18587f-62f1-0a2a450c0019-a0658308e5b6-3 for ; Thu, 28 May 2026 17:00:16 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 3BA744347080; Thu, 28 May 2026 10:59:11 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Andrew Cooper , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 0/2] xen/mm: Reset PFN_ORDER for offlined buddy heads Date: Thu, 28 May 2026 15:58:19 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779980416-D996DCF5-70E04886/0/0 X-purgate-type: clean X-purgate-size: 2422 This series fixes an inconsistency in the PFN_ORDER annotation for pages that are offlined when they are the head of a free buddy. When reserve_offlined_page() splits a buddy and moves offlined sub-pages to the offlined lists, the former buddy head would be left annotated with its original order even though it is now a single page. While this does not cause functional regressions, it is misleading. Patch 1 adds a native regression test that reproduces and documents the problem. The test seeds an order-1 buddy, offlines the head page, verifies the tail becomes order-0, and checks the offlined head's order. Patch 2 resets PFN_ORDER to 0 for offlined buddy heads inside reserve_offlined_page() when moving the page to the offlined list and updates the regression test to assert the corrected behaviour. This series is based on the native test environment v3 for NUMA claims https://lists.xen.org/archives/html/xen-devel/2026-05/msg01163.html which in turn is based on the NUMA claim sets v7 series: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html Please help to review and ack it (It should be eligible for Xen 4.22) Pull this series with all dependencies for review/test: $ git pull git@gitlab.com:bernhardkaindl/xen.git offline-head-order $ make -C tools/tests/native TARGETS=offline-head-order test | grep -C3 PG_OFFLINE_STATUS_OFFLINED Log of checking the PFN_ORDER() of the offlined page before the fix is applied: | offline-head-order.c:32: ASSERT(PFN_ORDER(page) == 1) | offline-head-order.c:34: ASSERT(offline_page(page_to_mfn(page), 0, &status) == 0) | offline-head-order.c:35: ASSERT(status == PG_OFFLINE_OFFLINED) | offline-head-order.c:39: ASSERT(query_page_offline(page_to_mfn(page), &status) == 0) | offline-head-order.c:40: ASSERT(status == PG_OFFLINE_STATUS_OFFLINED) | | - Test assertion failed as expected at offline-head-order.c:44: | Assertion failed: PFN_ORDER(page) == 0 Signed-off-by: Bernhard Kaindl Bernhard Kaindl (2): tools/tests/native: Add test for offlined buddy head PFN_ORDER xen/mm: reset PFN_ORDER for offlined buddy heads tools/tests/native/offline-head-order.c | 79 +++++++++++++++++++++++++ xen/common/page_alloc.c | 7 +++ 2 files changed, 86 insertions(+) create mode 100644 tools/tests/native/offline-head-order.c -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 15:27:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 15:27:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321496.1588248 (Exim 4.92) (envelope-from ) id 1wScdQ-0001rU-9h; Thu, 28 May 2026 15:27:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321496.1588248; Thu, 28 May 2026 15:27:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScdQ-0001rN-5U; Thu, 28 May 2026 15:27:00 +0000 Received: by outflank-mailman (input) for mailman id 1321496; Thu, 28 May 2026 15:26:59 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wScdP-0001rH-9H for xen-devel@lists.xenproject.org; Thu, 28 May 2026 15:26:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wScdO-008aun-FI for xen-devel@lists.xenproject.org; Thu, 28 May 2026 17:26:58 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a185ea4-5cb7-0a2a0a5109dd-0a2a450cbd8e-40 for ; Thu, 28 May 2026 17:26:58 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a185ec1-62f1-0a2a450c0019-a0658308c942-3 for ; Thu, 28 May 2026 17:26:58 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id BA3EA4347264; Thu, 28 May 2026 11:25:52 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini , Teddy Astie , Stewart Hildebrand Subject: [PATCH] tests: Improve 'make test': Run all build-time runnable tests Date: Thu, 28 May 2026 16:25:01 +0100 Message-Id: <72ab1053a6d04f007f70620dace33c1e675353d5.1779981804.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-d25034/1779982018-E156FCF5-822019D0/0/0 X-purgate-type: clean X-purgate-size: 9550 Xen has a top-level 'make tests' target. Currently, it only runs python tests which can run at build time. Extend this make target to run all build-time runnable tests. Add a target to run tests using 'make -C tools/tests run' to build and run all tests that require libxentrl in a privileged domain like Dom0 to run. Signed-off-by: Bernhard Kaindl --- Makefile | 1 + tools/Rules.mk | 16 +++++++++++++++- tools/tests/Makefile | 4 ++-- tools/tests/cpu-policy/Makefile | 6 +++--- tools/tests/domid/Makefile | 6 +++--- tools/tests/mem-claim/Makefile | 9 +-------- tools/tests/paging-mempool/Makefile | 9 +++++++++ tools/tests/pdx/Makefile | 13 +++---------- tools/tests/rangeset/Makefile | 6 +++--- tools/tests/resource/Makefile | 8 +++++++- tools/tests/tsx/Makefile | 10 ++++++++++ tools/tests/vpci/Makefile | 12 +++++++----- tools/tests/x86_emulator/Makefile | 6 +++--- tools/tests/xenstore/Makefile | 10 ++++++++++ 14 files changed, 77 insertions(+), 39 deletions(-) diff --git a/Makefile b/Makefile index 67b71ac3d4ff..21ab20e73508 100644 --- a/Makefile +++ b/Makefile @@ -92,6 +92,7 @@ build-docs: .PHONY: test test: $(MAKE) -C tools/python test + $(MAKE) -C tools/tests test run-tests-%: build-tools-public-headers tools/tests/%/ $(MAKE) -C tools/tests/$* run diff --git a/tools/Rules.mk b/tools/Rules.mk index d9b9c740e964..2888d928ae3d 100644 --- a/tools/Rules.mk +++ b/tools/Rules.mk @@ -189,7 +189,7 @@ INSTALL_PYTHON_PROG = \ %.opic: %.S $(CC) $(CPPFLAGS) -DPIC $(CFLAGS) -fPIC -c -o $@ $< $(APPEND_CFLAGS) -subdirs-all subdirs-clean subdirs-install subdirs-distclean subdirs-uninstall: .phony +subdirs-all subdirs-clean subdirs-install subdirs-distclean subdirs-run subdirs-test subdirs-uninstall: .phony @set -e; for subdir in $(SUBDIRS) $(SUBDIRS-y); do \ $(MAKE) subdir-$(patsubst subdirs-%,%,$@)-$$subdir; \ done @@ -200,6 +200,20 @@ subdir-all-% subdir-clean-% subdir-install-% subdir-uninstall-%: .phony subdir-distclean-%: .phony $(MAKE) -C $* distclean +subdir-run-%: .phony + $(MAKE) -C $* run + +subdir-test-%: .phony + $(MAKE) -C $* test + +ifeq ($(CC),$(HOSTCC)) +define RUN_TARGETS_IF_CC_IS_HOSTCC +set -ex; for test in $? ; do LD_LIBRARY_PATH=$(DISTDIR)/install$(libdir) ./$$test ; done +endef +else +RUN_TARGETS_IF_CC_IS_HOSTCC = $(warning $(HOSTCC)!=$(CC), will not run targets) +endif + no-configure-targets := distclean subdir-distclean% clean subdir-clean% %-dir-force-update ifeq (,$(filter $(no-configure-targets),$(MAKECMDGOALS))) $(XEN_ROOT)/config/Tools.mk: diff --git a/tools/tests/Makefile b/tools/tests/Makefile index 2b7af7606992..c2c9ff68111b 100644 --- a/tools/tests/Makefile +++ b/tools/tests/Makefile @@ -18,5 +18,5 @@ SUBDIRS-$(CONFIG_X86) += x86_emulator endif SUBDIRS-$(CONFIG_X86) += native -.PHONY: all clean install distclean uninstall -all clean distclean install uninstall: %: subdirs-% +.PHONY: all clean install distclean uninstall run test +all clean distclean install uninstall run test: %: subdirs-% diff --git a/tools/tests/cpu-policy/Makefile b/tools/tests/cpu-policy/Makefile index d8e4d222f4e4..d3f7ed5c14ec 100644 --- a/tools/tests/cpu-policy/Makefile +++ b/tools/tests/cpu-policy/Makefile @@ -15,9 +15,9 @@ endif .PHONY: all all: $(TARGETS) -.PHONY: run -run: $(TARGETS) - ./$< +.PHONY: run test +run test: $(TARGETS) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) .PHONY: clean clean: diff --git a/tools/tests/domid/Makefile b/tools/tests/domid/Makefile index 753129029ed9..2a675274380f 100644 --- a/tools/tests/domid/Makefile +++ b/tools/tests/domid/Makefile @@ -39,9 +39,9 @@ endef .PHONY: all all: $(TESTS) -.PHONY: run -run: $(TESTS) - set -e; $(foreach t,$(TESTS),./$(t);) +.PHONY: run test +run test: $(TESTS) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) .PHONY: clean clean: diff --git a/tools/tests/mem-claim/Makefile b/tools/tests/mem-claim/Makefile index 5c090639553b..961e6497fdc6 100644 --- a/tools/tests/mem-claim/Makefile +++ b/tools/tests/mem-claim/Makefile @@ -11,14 +11,7 @@ all: $(TARGETS) # Can also be called with "make run-tests-mem-claim" from the toplevel. .PHONY: run run: $(TARGETS) -ifeq ($(CC),$(HOSTCC)) - set -e; \ - for test in $? ; do \ - ./$$test ; \ - done -else - $(warning HOSTCC != CC, will not run test) -endif + $(RUN_TARGETS_IF_CC_IS_HOSTCC) # The tests in this directory need to run in a privileged domain (Dom0) # with libxenctrl and a matching the hypervisor to test running it. diff --git a/tools/tests/paging-mempool/Makefile b/tools/tests/paging-mempool/Makefile index 7444d81b8460..772af6e503c0 100644 --- a/tools/tests/paging-mempool/Makefile +++ b/tools/tests/paging-mempool/Makefile @@ -6,6 +6,15 @@ TARGET := test-paging-mempool .PHONY: all all: $(TARGET) +run: $(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: + .PHONY: clean clean: $(RM) -- *.o $(TARGET) $(DEPS_RM) diff --git a/tools/tests/pdx/Makefile b/tools/tests/pdx/Makefile index 3c431d7c7822..2001a957c4bd 100644 --- a/tools/tests/pdx/Makefile +++ b/tools/tests/pdx/Makefile @@ -6,16 +6,9 @@ TARGETS := test-pdx-mask test-pdx-offset .PHONY: all all: $(TARGETS) -.PHONY: run -run: $(TARGETS) -ifeq ($(CC),$(HOSTCC)) - set -e; \ - for test in $? ; do \ - ./$$test ; \ - done -else - $(warning HOSTCC != CC, will not run test) -endif +.PHONY: run test +run test: $(TARGETS) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) .PHONY: clean clean: diff --git a/tools/tests/rangeset/Makefile b/tools/tests/rangeset/Makefile index e3bfce471cd3..588b87ceda86 100644 --- a/tools/tests/rangeset/Makefile +++ b/tools/tests/rangeset/Makefile @@ -6,9 +6,9 @@ TARGET := test-rangeset .PHONY: all all: $(TARGET) -.PHONY: run -run: $(TARGET) - ./$< +.PHONY: run test +run test: $(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) .PHONY: clean clean: diff --git a/tools/tests/resource/Makefile b/tools/tests/resource/Makefile index 09d678fffe3e..9101ff7b3db7 100644 --- a/tools/tests/resource/Makefile +++ b/tools/tests/resource/Makefile @@ -8,7 +8,13 @@ all: $(TARGET) .PHONY: run run: $(TARGET) - ./$(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: .PHONY: clean clean: diff --git a/tools/tests/tsx/Makefile b/tools/tests/tsx/Makefile index 0bb7e7010347..0225f30a60ba 100644 --- a/tools/tests/tsx/Makefile +++ b/tools/tests/tsx/Makefile @@ -6,6 +6,16 @@ TARGET := test-tsx .PHONY: all all: $(TARGET) +.PHONY: run +run: $(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: + .PHONY: clean clean: $(RM) -- *.o $(TARGET) $(DEPS_RM) diff --git a/tools/tests/vpci/Makefile b/tools/tests/vpci/Makefile index 28b600933291..ceefdd97f43a 100644 --- a/tools/tests/vpci/Makefile +++ b/tools/tests/vpci/Makefile @@ -8,11 +8,13 @@ all: $(TARGET) .PHONY: run run: $(TARGET) -ifeq ($(CC),$(HOSTCC)) - ./$(TARGET) -else - $(warning HOSTCC != CC, will not run test) -endif + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: $(TARGET): vpci.c vpci.h list.h private.h main.c emul.h $(CC) $(CFLAGS_xeninclude) -include emul.h -g -o $@ vpci.c main.c diff --git a/tools/tests/x86_emulator/Makefile b/tools/tests/x86_emulator/Makefile index 8210e83345e3..75359df9e5b5 100644 --- a/tools/tests/x86_emulator/Makefile +++ b/tools/tests/x86_emulator/Makefile @@ -7,9 +7,9 @@ TARGET := test_x86_emulator .PHONY: all all: -.PHONY: run -run: $(TARGET) - ./$(TARGET) +.PHONY: run test +run test: $(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) # Add the core emulator to the build vpath x86_emulate/%.c $(XEN_ROOT)/xen/arch/x86 diff --git a/tools/tests/xenstore/Makefile b/tools/tests/xenstore/Makefile index 2ee4a1327e75..3ff9b36297be 100644 --- a/tools/tests/xenstore/Makefile +++ b/tools/tests/xenstore/Makefile @@ -10,6 +10,16 @@ all: build .PHONY: build build: $(TARGETS) +.PHONY: run +run: $(TARGET) + $(call RUN_TARGETS_IF_CC_IS_HOSTCC) + +# The tests in this directory need to run in a privileged domain (Dom0) +# with libxenctrl and a matching the hypervisor to test running it. +# Therefore, they don't run with the native test target for build-time tests. +.PHONY: test +test: + .PHONY: clean clean: $(RM) -- *.o $(TARGETS) $(DEPS_RM) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Thu May 28 16:11:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 16:11:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321559.1588256 (Exim 4.92) (envelope-from ) id 1wSdKb-0000cX-I1; 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pr=C Message-ID: <1715c407-4915-4c40-ae1b-9e815a8ab4f2@amd.com> Date: Thu, 28 May 2026 09:11:19 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [XEN PATCH v1] automation: edit rules for analyze jobs To: Anthony PERARD , Nicola Vetrini CC: Andrew Cooper , , Doug Goldstein , Stefano Stabellini References: <20260520225820.31550-1-victorm.lira@amd.com> <00d987d3-6a9c-440e-beb8-6587a3fd1d9b@citrix.com> <751c1684902e41fdd9d29b71670b49f0@bugseng.com> <1779452642.8631fc262581453bbf619ec5b2062170.19e4fa4847a000f373@vates.tech> Content-Language: en-US From: "Lira, Victor M" In-Reply-To: <1779452642.8631fc262581453bbf619ec5b2062170.19e4fa4847a000f373@vates.tech> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN3PEPF0000B06B:EE_|MN2PR12MB4422:EE_ X-MS-Office365-Filtering-Correlation-Id: 5c6647e8-48d3-4d12-8d1f-08debcd3c4df X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|82310400026|1800799024|56012099006|6133799003|11063799006|4143699003|22082099003|18002099003; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: n74M5w9YwGc+g1WwdQGi0XCYkgVeq7+b+umHhotv5HivHuBnignH7RkMv/ePc6WY1EvVrSkWbMg/uAwdLUEq5rLrKENjsuy2OdybuYQr+siy8IQ8NtYvILpmaQuWXNZNnT71z+ibmxb4MMzcs9P/107Z9zEHSLJIdGAJ4ZY9tNbICWjkyuj+LScztthPNcxBswsS0c82xYPIvKmaGAbY36YDbJSeSVhQKF1ccEkYY7+VAX2uNX1mDs0mAJ63DLsAOFGcwF0n1VDprOALfBYdPObOKCIxbavYTiaY4lZrj2vzNYpBRN7VQ3BjqQCqQS9CzpU1IA56NIGPbswLXXPO91sZPxMWVGdhMXO/qDC/PGvfQborcVIBn+gA6RmybzAzmfXK2uC2Vk4xMYT4iDvr7p6f5FuRmcgcIS/nBVACX1vu8Q9EAUMnZ2PgqfBfq0Z1 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2026 16:11:25.9866 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5c6647e8-48d3-4d12-8d1f-08debcd3c4df X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb08.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B06B.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4422 X-purgate-ID: tlsNG-16d1c6/1779984694-85D6AD75-05A96275/0/0 X-purgate-type: clean X-purgate-size: 680 On 5/22/2026 5:24 AM, Anthony PERARD wrote: > The variable isn't set in the runner (runners variable wouldn't be taken > into account here anyway). The variable is set for the group > "xen-project/hardware", so for every repo under it. is this variable ECLAIR_SAFETY meant to force enable the jobs as I thought, or is the intention to disable the safety jobs outside xen-project/hardware ? in the second case we can do     eclair-x86_64-amd:         ...         rules:         - if: $CI_PROJECT_PATH !~ /^xen-project\/hardware\/.*$/           when: never         - !reference [.eclair-analysis:triggered, rules] -- Victor From xen-devel-bounces@lists.xenproject.org Thu May 28 17:22:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 17:22:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321606.1588293 (Exim 4.92) (envelope-from ) id 1wSeQV-0002GT-Ko; Thu, 28 May 2026 17:21:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321606.1588293; Thu, 28 May 2026 17:21:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSeQV-0002GM-HY; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zzscplLBjd9FAEmNXY5M2qPiJ751XBtWKy0xuE+ZGyW2iZ01u7s9en03kW/TzXgxKxrOhZHqT2vLSnMr3ye15/ykXOXsH2yxZ8mOuj/ceJzp27d2jLeII6SZpNXnT/P7gZEZ/lWCarEPedoGJooyXOGU5O8pgbG7kUe960G7Ufi3yR7cYZezTY+JLdYiCVXSasQXyN5zu1OcmsbaGq9BRcVj+dhFoaS563a+78Oi5bKL6hV2XWP+vHMovNx+Jv/EIdj1m2i9DtEjc7ZvLTYLeOZxHEn0J9OdR6QHISrKnii/py8ju/19LoTe/mUk+i6Jtb4GHOaN5vVJOqlnynLkYH0iaMGfA2rpHjGPLhHz6Gk7ENaa4YdKK1KLgemlnuLvCfErqN1Ezsr365/ZGqsmr6aVfin6STOBKFfw2SfGj27YoEpBXhOAHHEzc9KnpJ3k X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2026 17:21:39.6018 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dab5ef57-df19-48d1-b2ee-08debcdd946a X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AM3PEPF00009B9D.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS4PR08MB7853 X-purgate-ID: tlsNG-33051d/1779988903-3A378938-D325A958/0/0 X-purgate-type: clean X-purgate-size: 901 Hi Mykola, > On 21 May 2026, at 18:45, Mykola Kvach wrote: >=20 > From: Mykola Kvach >=20 > System suspend may lead to a state where GIC would be powered down. > Therefore, Xen should save/restore the context of GIC on suspend/resume. >=20 > Note that the context consists of states of registers which are > controlled by the hypervisor. Other GIC registers which are accessible > by guests are saved/restored on context switch. >=20 > Before continuing suspend, also verify that the physical CPU interface > has no Group 1 active-priority state left. Use ICC_CTLR_EL1.PRIbits to > decide which ICC_AP1R_EL1 registers are implemented, so Xen does not > read an unimplemented AP1R register. >=20 > Signed-off-by: Mykola Kvach > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Thu May 28 18:12:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Thu, 28 May 2026 18:12:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321629.1588302 (Exim 4.92) (envelope-from ) id 1wSfD7-0000zG-5s; Thu, 28 May 2026 18:12:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321629.1588302; Thu, 28 May 2026 18:12:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSfD7-0000z9-2B; Thu, 28 May 2026 18:12:01 +0000 Received: by outflank-mailman (input) for mailman id 1321629; Thu, 28 May 2026 18:12:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSfD6-0000z3-Eh for xen-devel@lists.xenproject.org; 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charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 X-OriginatorOrg: epam.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-AuthSource: AM9PR03MB7526.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 6af49936-85dc-49a2-e417-08debd5fc1e2 X-MS-Exchange-CrossTenant-originalarrivaltime: 29 May 2026 08:53:30.5554 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b41b72d0-4e9f-4c26-8a69-f949f367c91d X-MS-Exchange-CrossTenant-mailboxtype: HOSTED X-MS-Exchange-CrossTenant-userprincipalname: 7xR+gqBsb2OHbxHP7OuxkzdUryULqVzx5rAZx+UEw2EQaF66Px1TXO+tgmt9VwJSSGlnZxqXCr6I5er+jpEJzk4rOb28EYOTdYdDJAT/zNk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR03MB7611 X-purgate-ID: tlsNG-d62444/1780044813-B6F58FF4-3CEDCE8A/0/0 X-purgate-type: clean X-purgate-size: 5499 GCOV instrumentation can emit executable input sections such as .text.startup when CONFIG_COVERAGE is enabled. At present the x86 already places .text.startup in .init.text, but Arm, RISC-V and PPC do not. With CONFIG_COVERAGE=3Dy .text.startup can therefore be treated as a linker orphan on those architectures. Constructors generated by coverage instrumentation can then point at code outside the normal RX text mapping, leading to early boot crashes from init_constructors(): (XEN) [ 12.331193] Instruction Abort Trap. Syndrome=3D0xf (XEN) [ 12.334253] Walking Hypervisor VA 0xa00003ce000 on CPU0 via TT= BR 0x000000004352d000 (XEN) [ 12.338550] 0TH[0x014] =3D 0x4352cf7f (XEN) [ 12.341823] 1ST[0x000] =3D 0x4352bf7f (XEN) [ 12.345124] 2ND[0x001] =3D 0x40000043527f7f (XEN) [ 12.347329] 3RD[0x1ce] =3D 0x400000433cef7f (XEN) [ 12.351233] CPU0: Unexpected Trap: Instruction Abort (XEN) [ 12.357643] ----[ Xen-4.21.1 arm64 debug=3Dn gcov=3Dy Not t= ainted ]---- (XEN) [ 12.360243] CPU: 0 (XEN) [ 12.364098] PC: 00000a00003ce000 00000a00003ce000 (XEN) [ 12.375835] LR: 00000a00004802f8 (XEN) [ 12.378273] SP: 00000a00004c7e10 (XEN) [ 12.380492] CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervi= sor, handler) (XEN) [ 12.382785] X0: 00000a00003ce000 X1: 0000000000000000 X= 2: 00000a0000410fa0 (XEN) [ 12.385176] X3: 0000000000000000 X4: 0000000000000010 X= 5: 0000000000000001 (XEN) [ 12.387555] X6: 00000a00004e5f40 X7: 00000a00004e5f38 X= 8: 0000000000000000 (XEN) [ 12.390027] X9: 00000a00004e5f20 X10: 00000a00004e5f30 X1= 1: 00000a00004e5f40 (XEN) [ 12.392510] X12: 00000a0000439748 X13: 00000a0000406938 X1= 4: 000000000000062e (XEN) [ 12.394954] X15: 00000a00004f3918 X16: 00000a00004c7bb5 X1= 7: 00000000004c7bb5 (XEN) [ 12.397293] X18: 0000000000000030 X19: 000000000000001d X2= 0: 00000000000000a9 (XEN) [ 12.399803] X21: 00000a00004c8008 X22: 00000a00003fa000 X2= 3: 00000a00004e2000 (XEN) [ 12.402392] X24: 00000a00003f9390 X25: 00000a00003fa000 X2= 6: 00000a00003f4ca8 (XEN) [ 12.404798] X27: 0000000000000002 X28: 00000a000057a9c0 F= P: 00000000bedb6740 (XEN) [ 12.407110] (XEN) [ 12.409442] VTCR_EL2: 0000000080023558 (XEN) [ 12.411291] VTTBR_EL2: 00000000bffc4000 (XEN) [ 12.412895] (XEN) [ 12.414204] SCTLR_EL2: 0000000030cd183d (XEN) [ 12.415928] HCR_EL2: 0000000000000039 (XEN) [ 12.417642] TTBR0_EL2: 000000004352d000 (XEN) [ 12.419152] (XEN) [ 12.420327] ESR_EL2: 000000008600000f (XEN) [ 12.422056] HPFAR_EL2: 0000000000000000 (XEN) [ 12.423809] FAR_EL2: 00000a00003ce000 ... (XEN) [ 12.485355] Xen call trace: (XEN) [ 12.489080] [<00000a00003ce000>] 00000a00003ce000 (PC) (XEN) [ 12.512076] [<00000a00004802f8>] init_constructors+0x38/0x5= 0 (LR) Observed failing symbol: _sub_I_00100_0 called from: init_constructors() The issue can be diagnosed by enabling linker orphan diagnostics or generating a linker map: LDFLAGS +=3D "--orphan-handling=3Dwarn" LDFLAGS +=3D "-Map=3Dxen.map" and then inspecting orphaned executable sections such as: .text.startup Place .text.startup in .init.text on the non-x86 linker scripts, matching the existing x86 behavior. Signed-off-by: Dmytro Prokopchuk --- Changes in v2: - do not add *(.text.*) when CONFIG_COVERAGE is enables - copy the existing x86 linker script behavior to the non-x86 linker script= s (put .text.startup into .init.text on Arm, RISC-V and PPC) - update commit subject and message accordingly Link to v1: https://patchew.org/Xen/cb8c1e0862a554f7a28347f549e9cfd0b0d6db2f.1779829545= .git.dmytro._5Fprokopchuk1@epam.com/ Test CI pipeline: https://gitlab.com/xen-project/people/dimaprkp4k/xen/-/pipelines/2561258404 --- xen/arch/arm/xen.lds.S | 1 + xen/arch/ppc/xen.lds.S | 1 + xen/arch/riscv/xen.lds.S | 1 + 3 files changed, 3 insertions(+) diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index 2d5f1c516d..4aab7770c9 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -125,6 +125,7 @@ SECTIONS .init.text : { _sinittext =3D .; *(.init.text) + *(.text.startup) _einittext =3D .; . =3D ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executabl= e */ *(.altinstr_replacement) diff --git a/xen/arch/ppc/xen.lds.S b/xen/arch/ppc/xen.lds.S index d0f2ed43f1..de3aad0aae 100644 --- a/xen/arch/ppc/xen.lds.S +++ b/xen/arch/ppc/xen.lds.S @@ -98,6 +98,7 @@ SECTIONS DECL_SECTION(.init.text) { _sinittext =3D .; *(.init.text) + *(.text.startup) _einittext =3D .; . =3D ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executab= le */ } :text diff --git a/xen/arch/riscv/xen.lds.S b/xen/arch/riscv/xen.lds.S index 65f136dce9..c6f765a1c5 100644 --- a/xen/arch/riscv/xen.lds.S +++ b/xen/arch/riscv/xen.lds.S @@ -103,6 +103,7 @@ SECTIONS .init.text : { _sinittext =3D .; *(.init.text) + *(.text.startup) _einittext =3D .; . =3D ALIGN(PAGE_SIZE); /* Avoid mapping alt insns executab= le */ } :text --=20 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 09:47:13 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 09:47:13 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321859.1588340 (Exim 4.92) (envelope-from ) id 1wSto1-0001oJ-73; Fri, 29 May 2026 09:47:05 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321859.1588340; Fri, 29 May 2026 09:47:05 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSto1-0001oC-2k; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: OrGN855lvJpUDFVrGMFyDqfiDXYFNVt4IpnC9Okjxx1ArCe7rZvozmjpIM0p+LY9SDHIPG7AwRJPR5rHFQKHhzxeaQC6OnIF3mwVbChnYwjnevFBYgfRKY89JKydtFEq+DflTnU/s1SBWXnbrSVKh15MWeWBbo6znzJHlpMFk/aPaASRB9jnHDsXhPD+40/O8OZdFWJd1SdbTf6S0XGYbJpWPk/bmP+tFMlNFgLLIWcElxy7RBmA1ikowfWqZsCQ4Tu+YcMulrcD6mNorlcZVRASMdGoEyCRREtljkbNhp8hrV62yCsBRdIaJvkU+d+f+Yk95UJKdVhR8uCjrvnzhbgsFX+i1ZAqnKjwiDrui5up2KuYOpahx6HRcnnefwqEhNPreJVuTLdpYF/y/8ksj9llduzRrQpnjSCa/5PGt2MGypiPfb8TeNY1C4CXYEQS X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 May 2026 09:46:57.8434 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5cf94ecf-2adb-4ca9-2d9b-08debd6739a1 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[4.158.2.129];Helo=[outbound-uk1.az.dlp.m.darktrace.com] X-MS-Exchange-CrossTenant-AuthSource: AMS1EPF0000004C.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU0PR08MB8929 X-purgate-ID: tlsNG-33051d/1780048021-3754F938-CCE93EE8/0/0 X-purgate-type: clean X-purgate-size: 1212 Hi Mykola, > On 21 May 2026, at 18:45, Mykola Kvach wrote: >=20 > From: Oleksandr Tyshchenko >=20 > Store and restore active context and micro-TLB registers. >=20 > On resume, restore Root IPMMU context state before restoring Cache IPMMU > micro-TLB state. Cache IPMMUs select Root contexts through their micro-TL= B > configuration, so restoring Cache micro-TLBs before the Root context > registers are restored can expose stale or uninitialized context state. >=20 > Tested on R-Car H3 Starter Kit. >=20 > Signed-off-by: Oleksandr Tyshchenko > Signed-off-by: Mykola Kvach > --- > Changes in V10: > - Iterate over registered IPMMUs in reverse order during resume so Root I= PMMU > context state is restored before Cache IPMMU micro-TLB state. >=20 > Changes in V9: > - set dt_device_set_protected() only after ipmmu_alloc_ctx_suspend() > succeeds, so DT devices do not remain protected on allocation failure. >=20 > Changes in V7: > - moved suspend context allocation before pci stuff > --- Reviewed-by: Luca Fancellu Cheers, Luca From xen-devel-bounces@lists.xenproject.org Fri May 29 10:42:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 10:42:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321886.1588348 (Exim 4.92) (envelope-from ) id 1wSufC-0001En-PV; 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With CONFIG_COVERAGE=y .text.startup > can therefore be treated as a linker orphan on those architectures. > > Constructors generated by coverage instrumentation can then point > at code outside the normal RX text mapping, leading to early boot > crashes from init_constructors(): > > (XEN) [ 12.331193] Instruction Abort Trap. Syndrome=0xf > (XEN) [ 12.334253] Walking Hypervisor VA 0xa00003ce000 on CPU0 via TTBR 0x000000004352d000 > (XEN) [ 12.338550] 0TH[0x014] = 0x4352cf7f > (XEN) [ 12.341823] 1ST[0x000] = 0x4352bf7f > (XEN) [ 12.345124] 2ND[0x001] = 0x40000043527f7f > (XEN) [ 12.347329] 3RD[0x1ce] = 0x400000433cef7f > (XEN) [ 12.351233] CPU0: Unexpected Trap: Instruction Abort > (XEN) [ 12.357643] ----[ Xen-4.21.1 arm64 debug=n gcov=y Not tainted ]---- > (XEN) [ 12.360243] CPU: 0 > (XEN) [ 12.364098] PC: 00000a00003ce000 00000a00003ce000 > (XEN) [ 12.375835] LR: 00000a00004802f8 > (XEN) [ 12.378273] SP: 00000a00004c7e10 > (XEN) [ 12.380492] CPSR: 0000000080000249 MODE:64-bit EL2h (Hypervisor, handler) > (XEN) [ 12.382785] X0: 00000a00003ce000 X1: 0000000000000000 X2: 00000a0000410fa0 > (XEN) [ 12.385176] X3: 0000000000000000 X4: 0000000000000010 X5: 0000000000000001 > (XEN) [ 12.387555] X6: 00000a00004e5f40 X7: 00000a00004e5f38 X8: 0000000000000000 > (XEN) [ 12.390027] X9: 00000a00004e5f20 X10: 00000a00004e5f30 X11: 00000a00004e5f40 > (XEN) [ 12.392510] X12: 00000a0000439748 X13: 00000a0000406938 X14: 000000000000062e > (XEN) [ 12.394954] X15: 00000a00004f3918 X16: 00000a00004c7bb5 X17: 00000000004c7bb5 > (XEN) [ 12.397293] X18: 0000000000000030 X19: 000000000000001d X20: 00000000000000a9 > (XEN) [ 12.399803] X21: 00000a00004c8008 X22: 00000a00003fa000 X23: 00000a00004e2000 > (XEN) [ 12.402392] X24: 00000a00003f9390 X25: 00000a00003fa000 X26: 00000a00003f4ca8 > (XEN) [ 12.404798] X27: 0000000000000002 X28: 00000a000057a9c0 FP: 00000000bedb6740 > (XEN) [ 12.407110] > (XEN) [ 12.409442] VTCR_EL2: 0000000080023558 > (XEN) [ 12.411291] VTTBR_EL2: 00000000bffc4000 > (XEN) [ 12.412895] > (XEN) [ 12.414204] SCTLR_EL2: 0000000030cd183d > (XEN) [ 12.415928] HCR_EL2: 0000000000000039 > (XEN) [ 12.417642] TTBR0_EL2: 000000004352d000 > (XEN) [ 12.419152] > (XEN) [ 12.420327] ESR_EL2: 000000008600000f > (XEN) [ 12.422056] HPFAR_EL2: 0000000000000000 > (XEN) [ 12.423809] FAR_EL2: 00000a00003ce000 > ... > (XEN) [ 12.485355] Xen call trace: > (XEN) [ 12.489080] [<00000a00003ce000>] 00000a00003ce000 (PC) > (XEN) [ 12.512076] [<00000a00004802f8>] init_constructors+0x38/0x50 (LR) > > Observed failing symbol: > _sub_I_00100_0 > called from: > init_constructors() > The issue can be diagnosed by enabling linker orphan diagnostics or > generating a linker map: > LDFLAGS += "--orphan-handling=warn" > LDFLAGS += "-Map=xen.map" > and then inspecting orphaned executable sections such as: > .text.startup > > Place .text.startup in .init.text on the non-x86 linker scripts, > matching the existing x86 behavior. > > Signed-off-by: Dmytro Prokopchuk > --- > Changes in v2: > - do not add *(.text.*) when CONFIG_COVERAGE is enables > - copy the existing x86 linker script behavior to the non-x86 linker scripts > (put .text.startup into .init.text on Arm, RISC-V and PPC) > - update commit subject and message accordingly > > Link to v1: > https://patchew.org/Xen/cb8c1e0862a554f7a28347f549e9cfd0b0d6db2f.1779829545.git.dmytro._5Fprokopchuk1@epam.com/ What about my feedback to v1 which showed that .text.startup specifically is buggy in x86, and provided a suggestion of what to do about it? ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 29 12:46:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:46:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321934.1588357 (Exim 4.92) (envelope-from ) id 1wSwbE-00085w-Cj; Fri, 29 May 2026 12:46:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321934.1588357; Fri, 29 May 2026 12:46:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbE-00085p-9N; Fri, 29 May 2026 12:46:04 +0000 Received: by outflank-mailman (input) for mailman id 1321934; Fri, 29 May 2026 12:46:03 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbD-00085h-KL for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:46:03 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwbC-00B91t-Bm for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:46:02 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198a7b-5cb7-0a2a0a5109dd-0a2a4506aff6-44 for ; Fri, 29 May 2026 14:46:02 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198a89-7371-0a2a45060019-a0658308925a-3 for ; Fri, 29 May 2026 14:46:02 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id 13F78439EC2B; Fri, 29 May 2026 08:44:56 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tim Deegan , Bertrand Marquis , Volodymyr Babchuk , Juergen Gross Subject: [PATCH 0/7] xen/mm: Normalize per-domain page counters, >16 TiB per domain Date: Fri, 29 May 2026 13:43:54 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1780058762-85B6DD75-BD203A51/0/0 X-purgate-type: clean X-purgate-size: 2730 Summary of a comment by Jan Beulich motivating this submission: > Considering that systems (and hence guests) only ever get larger, we > should consider to normalize per-domain page counters to unsigned long. This series enables supporting guests >16 TiB in the future once the system support for machines >16 TiB is implemented. 1. xen/mm: Normalize common per-domain page counters to unsigned long 2. x86/mm: Normalize X86 per-domain page counters to unsigned long 3. xen/mm: Static memory: Widen assign_pages(nr) to unsigned long 4. xen/mm: Static memory: Widen domstatic plumbing to unsigned long 5. xen/mm: device-tree: Widen static page counts to unsigned long 6. xen/arch/x86/dom0_build.c: Extend the upper limit for Dom0's max_pages 7. tools/libs/stat/xenstat.c: Extend the "no maximum" sentinel for max_pages This series is based on the NUMA claim sets v7 series: https://lists.xen.org/archives/html/xen-devel/2026-05/msg00363.html Suggested-by: Jan Beulich Signed-off-by: Bernhard Kaindl Bernhard Kaindl (7): xen/mm: Normalize common per-domain page counters to unsigned long x86/mm: Normalize X86 per-domain page counters to unsigned long xen/mm: Static memory: Widen assign_pages(nr) to unsigned long xen/mm: Static memory: Widen domstatic plumbing to unsigned long xen/mm: device-tree: Widen static page counts to unsigned long xen/arch/x86/dom0_build.c: Extend the upper limit for Dom0's max_pages tools/libs/stat/xenstat.c: Extend the "no maximum" sentinel for max_pages tools/libs/stat/xenstat.c | 2 +- xen/arch/arm/include/asm/p2m.h | 2 +- xen/arch/x86/dom0_build.c | 2 +- xen/arch/x86/include/asm/domain.h | 6 ++-- xen/arch/x86/include/asm/hap.h | 4 +-- xen/arch/x86/include/asm/paging.h | 2 +- xen/arch/x86/include/asm/shadow.h | 2 +- xen/arch/x86/mm/hap/hap.c | 19 ++++++----- xen/arch/x86/mm/p2m-pod.c | 2 +- xen/arch/x86/mm/paging.c | 9 +++--- xen/arch/x86/mm/shadow/common.c | 42 ++++++++++++------------- xen/common/device-tree/dom0less-build.c | 2 +- xen/common/device-tree/static-memory.c | 9 +----- xen/common/device-tree/static-shmem.c | 9 +++--- xen/common/grant_table.c | 2 +- xen/common/keyhandler.c | 8 ++--- xen/common/numa.c | 2 +- xen/common/page_alloc.c | 20 ++++++------ xen/include/xen/mm.h | 4 +-- xen/include/xen/sched.h | 16 +++++----- 20 files changed, 77 insertions(+), 87 deletions(-) -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:46:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:46:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321936.1588367 (Exim 4.92) (envelope-from ) id 1wSwbU-0008MN-JQ; Fri, 29 May 2026 12:46:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321936.1588367; Fri, 29 May 2026 12:46:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbU-0008MG-Ff; Fri, 29 May 2026 12:46:20 +0000 Received: by outflank-mailman (input) for mailman id 1321936; Fri, 29 May 2026 12:46:19 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbT-0008Lb-6s for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:46:19 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwbS-00B4Cd-Ju for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:46:18 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198a86-e002-0a2a0a5209dd-0a2a4507e3ba-40 for ; Fri, 29 May 2026 14:46:18 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198a99-229c-0a2a45070019-a06583089fb8-3 for ; Fri, 29 May 2026 14:46:18 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id BFEBA439EC2B; Fri, 29 May 2026 08:45:12 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tim Deegan Subject: [PATCH 1/7] xen/mm: Normalize common per-domain page counters to unsigned long Date: Fri, 29 May 2026 13:43:55 +0100 Message-Id: <2a2bb3c2f32a82e722cf2e912f8b71443f67fd9b.1780058608.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1780058778-20D67C48-3BAB7ABE/0/0 X-purgate-type: clean X-purgate-size: 8007 Prepare common code for >16 TiB domains by normalizing the per-domain page counts in struct domain (tot_pages, xenheap_pages, extra_pages, outstanding_pages, max_pages, node_claims and claims[MAX_NUMNODES]) to unsigned long and update related code accordingly: - Update format specifiers for widened types across affected files. NB: - shr_pages and paged_pages are atomic_t; their formats are %d. - pod.entry_count in p2m-pod.c is unsigned long; %lu is correct. Updates for domain_tot_pages(): - unsigned int domain_tot_pages(d) -> unsigned long domain_tot_pages(d). - assign_pages(): Assign domain_tot_pages(d) to unsigned long likewise. - sh_min_allocation(): 0U -> 0UL for unsigned long domain_tot_pages(). Suggested-by: Jan Beulich Signed-off-by: Bernhard Kaindl --- xen/arch/x86/mm/p2m-pod.c | 2 +- xen/arch/x86/mm/shadow/common.c | 2 +- xen/common/grant_table.c | 2 +- xen/common/keyhandler.c | 8 ++++---- xen/common/numa.c | 2 +- xen/common/page_alloc.c | 8 ++++---- xen/include/xen/sched.h | 16 ++++++++-------- 7 files changed, 20 insertions(+), 20 deletions(-) diff --git a/xen/arch/x86/mm/p2m-pod.c b/xen/arch/x86/mm/p2m-pod.c index 7a0bebd2d3b5..14d18b726e80 100644 --- a/xen/arch/x86/mm/p2m-pod.c +++ b/xen/arch/x86/mm/p2m-pod.c @@ -1270,7 +1270,7 @@ p2m_pod_demand_populate(struct p2m_domain *p2m, gfn_t gfn, out_of_memory: pod_unlock_and_flush(p2m); - printk("%s: Dom%d out of PoD memory! (tot=%"PRIu32" ents=%ld dom%d)\n", + printk("%s: Dom%d out of PoD memory! (tot=%lu ents=%lu dom%d)\n", __func__, d->domain_id, domain_tot_pages(d), p2m->pod.entry_count, current->domain->domain_id); domain_crash(d); diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index ed698fa90bc7..e300898fe789 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -768,7 +768,7 @@ static unsigned int sh_min_allocation(const struct domain *d) * up of slot zero and an LAPIC page), plus one for HVM's 1-to-1 pagetable. */ unsigned int extra = max(domain_tot_pages(d) / 256, - is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0U) + + is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0UL) + is_hvm_domain(d); return shadow_min_acceptable_pages(d) + diff --git a/xen/common/grant_table.c b/xen/common/grant_table.c index ac9fed600101..3c1f8876da22 100644 --- a/xen/common/grant_table.c +++ b/xen/common/grant_table.c @@ -2396,7 +2396,7 @@ gnttab_transfer( e->domain_id); else gdprintk(XENLOG_INFO, - "Transferee %pd has no headroom (tot %u, max %u, ex %u)\n", + "Transferee %pd has no headroom (tot %lu, max %lu, ex %lu)\n", e, domain_tot_pages(e), e->max_pages, e->extra_pages); gop.status = GNTST_general_error; diff --git a/xen/common/keyhandler.c b/xen/common/keyhandler.c index cb6df2823b00..b1cb9e7ba8d9 100644 --- a/xen/common/keyhandler.c +++ b/xen/common/keyhandler.c @@ -278,14 +278,14 @@ static void cf_check dump_domains(unsigned char key) printk(" refcnt=%d dying=%d pause_count=%d\n", atomic_read(&d->refcnt), d->is_dying, atomic_read(&d->pause_count)); - printk(" nr_pages=%u xenheap_pages=%u" + printk(" nr_pages=%lu xenheap_pages=%lu" #ifdef CONFIG_MEM_SHARING - " shared_pages=%u" + " shared_pages=%d" #endif #ifdef CONFIG_MEM_PAGING - " paged_pages=%u" + " paged_pages=%d" #endif - " dirty_cpus={%*pbl} max_pages=%u\n", + " dirty_cpus={%*pbl} max_pages=%lu\n", domain_tot_pages(d), d->xenheap_pages, #ifdef CONFIG_MEM_SHARING atomic_read(&d->shr_pages), diff --git a/xen/common/numa.c b/xen/common/numa.c index ad75955a1622..8c561578615c 100644 --- a/xen/common/numa.c +++ b/xen/common/numa.c @@ -743,7 +743,7 @@ static void cf_check dump_numa(unsigned char key) process_pending_softirqs(); - printk("%pd (total: %u):\n", d, domain_tot_pages(d)); + printk("%pd (total: %lu):\n", d, domain_tot_pages(d)); memset(page_num_node, 0, sizeof(page_num_node)); diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 1801afc96a0a..3f8b300d8c29 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2892,11 +2892,11 @@ int assign_pages( } else if ( !(memflags & MEMF_no_refcount) ) { - unsigned int tot_pages = domain_tot_pages(d); + unsigned long tot_pages = domain_tot_pages(d); if ( unlikely(tot_pages > d->max_pages) ) { - gprintk(XENLOG_INFO, "Inconsistent allocation for %pd: %u > %u\n", + gprintk(XENLOG_INFO, "Inconsistent allocation for %pd: %lu > %lu\n", d, tot_pages, d->max_pages); rc = -EPERM; goto out; @@ -2904,7 +2904,7 @@ int assign_pages( if ( unlikely(nr > d->max_pages - tot_pages) ) { - gprintk(XENLOG_INFO, "Over-allocation for %pd: %Lu > %u\n", + gprintk(XENLOG_INFO, "Over-allocation for %pd: %Lu > %lu\n", d, tot_pages + 0ULL + nr, d->max_pages); rc = -E2BIG; goto out; @@ -2916,7 +2916,7 @@ int assign_pages( if ( unlikely(d->tot_pages + nr < nr) ) { gprintk(XENLOG_INFO, - "Excess allocation for %pd: %Lu (%u extra)\n", + "Excess allocation for %pd: %Lu (%lu extra)\n", d, d->tot_pages + 0ULL + nr, d->extra_pages); if ( pg[0].count_info & PGC_extra ) d->extra_pages -= nr; diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index f671e0c4c7b3..ee9d4a7ff9e3 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -414,17 +414,17 @@ struct domain * This field should only be directly accessed by domain_adjust_tot_pages() * and the domain_tot_pages() helper function defined below. */ - unsigned int tot_pages; + unsigned long tot_pages; - unsigned int xenheap_pages; /* pages allocated from Xen heap */ + unsigned long xenheap_pages; /* pages allocated from Xen heap */ /* Pages claimed but not possessed, protected by global heap_lock. */ - unsigned int outstanding_pages; - unsigned int node_claims; /* Sum of per-node claims. */ + unsigned long outstanding_pages; + unsigned long node_claims; /* Sum of per-node claims. */ /* Domain objects use dedicated pages, leaving room for per-node claims. */ - unsigned int claims[MAX_NUMNODES]; /* Per-NUMA-node claims. */ + unsigned long claims[MAX_NUMNODES]; /* Per-NUMA-node claims. */ - unsigned int max_pages; /* maximum value for domain_tot_pages() */ - unsigned int extra_pages; /* pages not included in domain_tot_pages() */ + unsigned long max_pages; /* maximum value for domain_tot_pages() */ + unsigned long extra_pages; /* pages not included in domain_tot_pages() */ #ifdef CONFIG_MEM_SHARING atomic_t shr_pages; /* shared pages */ @@ -691,7 +691,7 @@ static inline struct page_list_head *page_to_list( } /* Return number of pages currently posessed by the domain */ -static inline unsigned int domain_tot_pages(const struct domain *d) +static inline unsigned long domain_tot_pages(const struct domain *d) { ASSERT(d->extra_pages <= d->tot_pages); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:46:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:46:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321952.1588375 (Exim 4.92) (envelope-from ) id 1wSwbk-0000Qj-QL; Fri, 29 May 2026 12:46:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321952.1588375; Fri, 29 May 2026 12:46:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbk-0000Qc-Ne; Fri, 29 May 2026 12:46:36 +0000 Received: by outflank-mailman (input) for mailman id 1321952; Fri, 29 May 2026 12:46:35 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwbj-0000Q0-4W for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:46:35 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwbi-00B4Cd-HR for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:46:34 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198aa0-e002-0a2a0a5209dd-0a2a4507aa80-20 for ; Fri, 29 May 2026 14:46:34 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198aa9-229c-0a2a45070019-a065830980c0-3 for ; Fri, 29 May 2026 14:46:34 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 3DAF88275E96; Fri, 29 May 2026 08:45:18 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie , Tim Deegan Subject: [PATCH 2/7] x86/mm: Normalize X86 per-domain page counters to unsigned long Date: Fri, 29 May 2026 13:43:56 +0100 Message-Id: <21fa13ba303f59f14ace46cd0715b07f8ae99468.1780058608.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1780058794-23979C48-7BB0F2A9/0/0 X-purgate-type: clean X-purgate-size: 16494 Prepare x86 for >16 TiB domains by normalizing the per-domain page counts in paging_domain (total_pages, free_pages, p2m_pages) to unsigned long and widen page counts in related x86 allocation functions accordingly: - paging_domain.{total,free,p2m}_pages: unsigned int -> unsigned long - x86/mm/shadow/common.c: - unsigned long sh_min_allocation(d) - unsigned long shadow_min_acceptable_pages(d) - unsigned long shadow_get_allocation(d) - shadow_set_allocation(unsigned long pages) - shadow_enable(): fix narrowing from d->arch.paging.total_pages to unsigned int - x86/mm/hap/hap.c: - unsigned long hap_get_allocation(d) - hap_set_allocation(unsigned long pages) - hap_enable(): fix narrowing from d->arch.paging.total_pages to unsigned int - x86/mm/paging.c: - paging_set_allocation(unsigned long pages) - arch_set_paging_mempool_size() don't truncate pages Note: pages in _shadow_prealloc(), shadow_alloc(), shadow_free() and shadow_prealloc() is intentionally kept as unsigned int. It carries the per-shadow-entry page count from shadow_size() (uint8_t-backed, max 4), not the pool allocation count. Note: xen_domctl_shadow_op.mb stays uint32_t, and the domctl ABI remains MB-based and caps at 4 PiB, replacing the 16 TiB per-domain limit. Casts widen the mb-to-pages arithmetic to unsigned long where needed. Suggested-by: Jan Beulich Signed-off-by: Bernhard Kaindl --- xen/arch/x86/include/asm/domain.h | 6 ++--- xen/arch/x86/include/asm/hap.h | 4 +-- xen/arch/x86/include/asm/paging.h | 2 +- xen/arch/x86/include/asm/shadow.h | 2 +- xen/arch/x86/mm/hap/hap.c | 19 +++++++------- xen/arch/x86/mm/paging.c | 9 +++---- xen/arch/x86/mm/shadow/common.c | 42 +++++++++++++++---------------- 7 files changed, 41 insertions(+), 43 deletions(-) diff --git a/xen/arch/x86/include/asm/domain.h b/xen/arch/x86/include/asm/domain.h index 385a6666dafa..d3021a863353 100644 --- a/xen/arch/x86/include/asm/domain.h +++ b/xen/arch/x86/include/asm/domain.h @@ -221,9 +221,9 @@ struct paging_domain { /* Memory allocation (common to shadow and HAP) */ struct page_list_head freelist; - unsigned int total_pages; /* number of pages allocated */ - unsigned int free_pages; /* number of pages on freelists */ - unsigned int p2m_pages; /* number of pages allocated to p2m */ + unsigned long total_pages; /* number of pages allocated */ + unsigned long free_pages; /* number of pages on freelists */ + unsigned long p2m_pages; /* number of pages allocated to p2m */ /* log dirty support */ struct log_dirty_domain log_dirty; diff --git a/xen/arch/x86/include/asm/hap.h b/xen/arch/x86/include/asm/hap.h index f01ce73fb4f3..061181724e90 100644 --- a/xen/arch/x86/include/asm/hap.h +++ b/xen/arch/x86/include/asm/hap.h @@ -33,8 +33,8 @@ int hap_track_dirty_vram(struct domain *d, XEN_GUEST_HANDLE(void) guest_dirty_bitmap); extern const struct paging_mode *hap_paging_get_mode(struct vcpu *v); -int hap_set_allocation(struct domain *d, unsigned int pages, bool *preempted); -unsigned int hap_get_allocation(struct domain *d); +int hap_set_allocation(struct domain *d, unsigned long pages, bool *preempted); +unsigned long hap_get_allocation(struct domain *d); #endif /* XEN_HAP_H */ diff --git a/xen/arch/x86/include/asm/paging.h b/xen/arch/x86/include/asm/paging.h index 291ab386e865..fd52290cfe89 100644 --- a/xen/arch/x86/include/asm/paging.h +++ b/xen/arch/x86/include/asm/paging.h @@ -310,7 +310,7 @@ void paging_dump_vcpu_info(struct vcpu *v); * Input might be rounded up to at minimum amount of pages, plus * space for the p2m table. * Returns 0 for success, non-zero for failure. */ -int paging_set_allocation(struct domain *d, unsigned int pages, +int paging_set_allocation(struct domain *d, unsigned long pages, bool *preempted); /* Is gfn within maxphysaddr for the domain? */ diff --git a/xen/arch/x86/include/asm/shadow.h b/xen/arch/x86/include/asm/shadow.h index 60589c3cacee..8aac018132ac 100644 --- a/xen/arch/x86/include/asm/shadow.h +++ b/xen/arch/x86/include/asm/shadow.h @@ -91,7 +91,7 @@ void shadow_blow_tables_per_domain(struct domain *d); * Input will be rounded up to at least shadow_min_acceptable_pages(), * plus space for the p2m table. * Returns 0 for success, non-zero for failure. */ -int shadow_set_allocation(struct domain *d, unsigned int pages, +int shadow_set_allocation(struct domain *d, unsigned long pages, bool *preempted); /* Helper to invoke for deferred releasing of a top-level shadow's reference. */ diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c index 5ccb80bda5d3..ccea676c361b 100644 --- a/xen/arch/x86/mm/hap/hap.c +++ b/xen/arch/x86/mm/hap/hap.c @@ -327,18 +327,18 @@ static void cf_check hap_free_p2m_page(struct domain *d, struct page_info *pg) } /* Return the size of the pool, rounded up to the nearest MB */ -unsigned int hap_get_allocation(struct domain *d) +unsigned long hap_get_allocation(struct domain *d) { - unsigned int pg = d->arch.paging.total_pages + unsigned long pg = d->arch.paging.total_pages + d->arch.paging.p2m_pages; return ((pg >> (20 - PAGE_SHIFT)) - + ((pg & ((1 << (20 - PAGE_SHIFT)) - 1)) ? 1 : 0)); + + ((pg & ((1UL << (20 - PAGE_SHIFT)) - 1)) ? 1 : 0)); } /* Set the pool of pages to the required number of pages. * Returns 0 for success, non-zero for failure. */ -int hap_set_allocation(struct domain *d, unsigned int pages, bool *preempted) +int hap_set_allocation(struct domain *d, unsigned long pages, bool *preempted) { struct page_info *pg; @@ -456,7 +456,6 @@ void hap_domain_init(struct domain *d) /* return 0 for success, -errno for failure */ int hap_enable(struct domain *d, u32 mode) { - unsigned int old_pages; unsigned int i; int rv = 0; @@ -469,8 +468,7 @@ int hap_enable(struct domain *d, u32 mode) domain_pause(d); - old_pages = d->arch.paging.total_pages; - if ( old_pages == 0 ) + if ( d->arch.paging.total_pages == 0UL ) { paging_lock(d); rv = hap_set_allocation(d, 256, NULL); @@ -623,14 +621,14 @@ void hap_teardown(struct domain *d, bool *preempted) paging_lock(d); /* Keep various asserts happy */ - if ( d->arch.paging.total_pages != 0 ) + if ( d->arch.paging.total_pages != 0UL ) { hap_set_allocation(d, 0, preempted); if ( preempted && *preempted ) goto out; - ASSERT(d->arch.paging.total_pages == 0); + ASSERT(d->arch.paging.total_pages == 0UL); } d->arch.paging.mode &= ~PG_log_dirty; @@ -651,7 +649,8 @@ int hap_domctl(struct domain *d, struct xen_domctl_shadow_op *sc, { case XEN_DOMCTL_SHADOW_OP_SET_ALLOCATION: paging_lock(d); - rc = hap_set_allocation(d, sc->mb << (20 - PAGE_SHIFT), &preempted); + rc = hap_set_allocation(d, (unsigned long)sc->mb << (20 - PAGE_SHIFT), + &preempted); paging_unlock(d); if ( preempted ) /* Not finished. Set up to re-run the call. */ diff --git a/xen/arch/x86/mm/paging.c b/xen/arch/x86/mm/paging.c index 2396f81ad54a..fa269b8cf39c 100644 --- a/xen/arch/x86/mm/paging.c +++ b/xen/arch/x86/mm/paging.c @@ -812,7 +812,7 @@ void paging_final_teardown(struct domain *d) { bool hap = hap_enabled(d); - PAGING_PRINTK("%pd start: total = %u, free = %u, p2m = %u\n", + PAGING_PRINTK("%pd start: total = %lu, free = %lu, p2m = %lu\n", d, d->arch.paging.total_pages, d->arch.paging.free_pages, d->arch.paging.p2m_pages); @@ -834,7 +834,7 @@ void paging_final_teardown(struct domain *d) /* It is now safe to pull down the p2m map. */ p2m_teardown(p2m_get_hostp2m(d), true, NULL); - PAGING_PRINTK("%pd done: total = %u, free = %u, p2m = %u\n", + PAGING_PRINTK("%pd done: total = %lu, free = %lu, p2m = %lu\n", d, d->arch.paging.total_pages, d->arch.paging.free_pages, d->arch.paging.p2m_pages); ASSERT(!d->arch.paging.p2m_pages); @@ -941,7 +941,7 @@ void paging_update_nestedmode(struct vcpu *v) hvm_asid_flush_vcpu(v); } -int __init paging_set_allocation(struct domain *d, unsigned int pages, +int __init paging_set_allocation(struct domain *d, unsigned long pages, bool *preempted) { int rc; @@ -983,8 +983,7 @@ int arch_set_paging_mempool_size(struct domain *d, uint64_t size) if ( is_pv_domain(d) ) /* TODO: Relax in due course */ return -EOPNOTSUPP; - if ( size & ~PAGE_MASK || /* Non page-sized request? */ - pages != (unsigned int)pages ) /* Overflow $X_set_allocation()? */ + if ( size & ~PAGE_MASK ) /* Non page-sized request? */ return -EINVAL; paging_lock(d); diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index e300898fe789..814907cec31e 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -302,7 +302,7 @@ sh_validate_guest_entry(struct vcpu *v, mfn_t gmfn, void *entry, u32 size) * allow for more than ninety allocated pages per vcpu. We round that * up to 128 pages, or half a megabyte per vcpu. */ -static unsigned int shadow_min_acceptable_pages(const struct domain *d) +static unsigned long shadow_min_acceptable_pages(const struct domain *d) { return d->max_vcpus * 128; } @@ -408,7 +408,7 @@ static bool __must_check _shadow_prealloc(struct domain *d, unsigned int pages) /* Nothing more we can do: all remaining shadows are of pages that * hold Xen mappings for some vcpu. This can never happen. */ printk(XENLOG_ERR "Can't pre-allocate %u shadow pages!\n" - " shadow pages total = %u, free = %u, p2m=%u\n", + " shadow pages total = %lu, free = %lu, p2m=%lu\n", pages, d->arch.paging.total_pages, d->arch.paging.free_pages, d->arch.paging.p2m_pages); @@ -709,7 +709,7 @@ shadow_alloc_p2m_page(struct domain *d) { d->arch.paging.p2m_alloc_failed = 1; dprintk(XENLOG_ERR, - "d%d failed to allocate from shadow pool (tot=%u p2m=%u min=%u)\n", + "d%d failed to allocate from shadow pool (tot=%lu p2m=%lu min=%lu)\n", d->domain_id, d->arch.paging.total_pages, d->arch.paging.p2m_pages, shadow_min_acceptable_pages(d)); @@ -760,22 +760,22 @@ shadow_free_p2m_page(struct domain *d, struct page_info *pg) paging_unlock(d); } -static unsigned int sh_min_allocation(const struct domain *d) +static unsigned long sh_min_allocation(const struct domain *d) { /* * Don't allocate less than the minimum acceptable, plus one page per * megabyte of RAM (for the p2m table, minimally enough for HVM's setting * up of slot zero and an LAPIC page), plus one for HVM's 1-to-1 pagetable. */ - unsigned int extra = max(domain_tot_pages(d) / 256, - is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0UL) + - is_hvm_domain(d); + unsigned long extra = max(domain_tot_pages(d) / 256, + is_hvm_domain(d) ? CONFIG_PAGING_LEVELS + 2 : 0UL) + + is_hvm_domain(d); return shadow_min_acceptable_pages(d) + max(extra, d->arch.paging.p2m_pages); } -int shadow_set_allocation(struct domain *d, unsigned int pages, bool *preempted) +int shadow_set_allocation(struct domain *d, unsigned long pages, bool *preempted) { struct page_info *sp; @@ -784,14 +784,14 @@ int shadow_set_allocation(struct domain *d, unsigned int pages, bool *preempted) if ( pages > 0 ) { /* Check for minimum value. */ - unsigned int lower_bound = sh_min_allocation(d); + unsigned long lower_bound = sh_min_allocation(d); if ( pages < lower_bound ) pages = lower_bound; pages -= d->arch.paging.p2m_pages; } - SHADOW_PRINTK("current %i target %i\n", + SHADOW_PRINTK("current %lu target %lu\n", d->arch.paging.total_pages, pages); for ( ; ; ) @@ -846,12 +846,12 @@ int shadow_set_allocation(struct domain *d, unsigned int pages, bool *preempted) } /* Return the size of the shadow pool, rounded up to the nearest MB */ -static unsigned int shadow_get_allocation(struct domain *d) +static unsigned long shadow_get_allocation(struct domain *d) { - unsigned int pg = d->arch.paging.total_pages + unsigned long pg = d->arch.paging.total_pages + d->arch.paging.p2m_pages; return ((pg >> (20 - PAGE_SHIFT)) - + ((pg & ((1 << (20 - PAGE_SHIFT)) - 1)) ? 1 : 0)); + + ((pg & ((1UL << (20 - PAGE_SHIFT)) - 1)) ? 1 : 0)); } /**************************************************************************/ @@ -2085,7 +2085,6 @@ int shadow_enable(struct domain *d, u32 mode) * disabled. * Returns 0 for success, -errno for failure. */ { - unsigned int old_pages; struct page_info *pg = NULL; uint32_t *e; int rv = 0; @@ -2103,8 +2102,7 @@ int shadow_enable(struct domain *d, u32 mode) } /* Init the shadow memory allocation if the user hasn't done so */ - old_pages = d->arch.paging.total_pages; - if ( old_pages < sh_min_allocation(d) ) + if ( d->arch.paging.total_pages < sh_min_allocation(d) ) { paging_lock(d); rv = shadow_set_allocation(d, 1024, NULL); /* Use at least 4MB */ @@ -2283,7 +2281,7 @@ void shadow_teardown(struct domain *d, bool *preempted) } #endif /* (SHADOW_OPTIMIZATIONS & (SHOPT_VIRTUAL_TLB|SHOPT_OUT_OF_SYNC)) */ - if ( d->arch.paging.total_pages != 0 ) + if ( d->arch.paging.total_pages != 0UL ) { /* Destroy all the shadows and release memory to domheap */ shadow_set_allocation(d, 0, preempted); @@ -2295,7 +2293,7 @@ void shadow_teardown(struct domain *d, bool *preempted) if (d->arch.paging.shadow.hash_table) shadow_hash_teardown(d); - ASSERT(d->arch.paging.total_pages == 0); + ASSERT(d->arch.paging.total_pages == 0UL); } /* Free the non-paged-vcpus pagetable; must happen after we've @@ -2410,7 +2408,7 @@ static int shadow_one_bit_disable(struct domain *d, u32 mode) { /* Get this domain off shadows */ SHADOW_PRINTK("un-shadowing of domain %u starts." - " Shadow pages total = %u, free = %u, p2m=%u\n", + " Shadow pages total = %lu, free = %lu, p2m=%lu\n", d->domain_id, d->arch.paging.total_pages, d->arch.paging.free_pages, d->arch.paging.p2m_pages); for_each_vcpu(d, v) @@ -2441,7 +2439,7 @@ static int shadow_one_bit_disable(struct domain *d, u32 mode) BUG(); /* In fact, we will have BUG()ed already */ shadow_hash_teardown(d); SHADOW_PRINTK("un-shadowing of domain %u done." - " Shadow pages total = %u, free = %u, p2m=%u\n", + " Shadow pages total = %lu, free = %lu, p2m=%lu\n", d->domain_id, d->arch.paging.total_pages, d->arch.paging.free_pages, d->arch.paging.p2m_pages); } @@ -2573,7 +2571,9 @@ int shadow_domctl(struct domain *d, paging_unlock(d); return -EINVAL; } - rc = shadow_set_allocation(d, sc->mb << (20 - PAGE_SHIFT), &preempted); + rc = shadow_set_allocation(d, + (unsigned long)sc->mb << (20 - PAGE_SHIFT), + &preempted); paging_unlock(d); if ( preempted ) /* Not finished. Set up to re-run the call. */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:47:08 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:47:08 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321969.1588383 (Exim 4.92) (envelope-from ) id 1wSwcG-00013m-7y; Fri, 29 May 2026 12:47:08 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321969.1588383; Fri, 29 May 2026 12:47:08 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwcG-00013f-4u; Fri, 29 May 2026 12:47:08 +0000 Received: by outflank-mailman (input) for mailman id 1321969; Fri, 29 May 2026 12:47:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwcF-00011q-M6 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:47:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwcF-005Vwa-2f for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:47:07 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198ac9-e002-0a2a0a5209dd-0a2a4506e4ba-2 for ; Fri, 29 May 2026 14:47:07 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198aca-7371-0a2a45060019-a06583099740-3 for ; Fri, 29 May 2026 14:47:06 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id CC6A28275E96; Fri, 29 May 2026 08:45:50 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH 3/7] xen/mm: Static memory: Widen assign_pages(nr) to unsigned long Date: Fri, 29 May 2026 13:43:57 +0100 Message-Id: <06bbdf043e4be80bfc4f13926e8e02b42358f3da.1780058608.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1780058827-8EF89D75-8373F2D6/0/0 X-purgate-type: clean X-purgate-size: 1734 Static memory assignment is currently limited UINT_MAX pages. To normalize on unsigned long, widen assign_pages() for unsigned long. Signed-off-by: Bernhard Kaindl --- xen/common/page_alloc.c | 8 ++++---- xen/include/xen/mm.h | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 3f8b300d8c29..8670233c550d 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -2851,12 +2851,12 @@ void init_domheap_pages(paddr_t ps, paddr_t pe) int assign_pages( struct page_info *pg, - unsigned int nr, + unsigned long nr, struct domain *d, unsigned int memflags) { int rc = 0; - unsigned int i; + unsigned long i; nrspin_lock(&d->page_alloc_lock); @@ -2870,7 +2870,7 @@ int assign_pages( #ifndef NDEBUG { - unsigned int extra_pages = 0; + unsigned long extra_pages = 0; for ( i = 0; i < nr; i++ ) { @@ -2947,7 +2947,7 @@ int assign_pages( int assign_page(struct page_info *pg, unsigned int order, struct domain *d, unsigned int memflags) { - return assign_pages(pg, 1U << order, d, memflags); + return assign_pages(pg, 1UL << order, d, memflags); } struct page_info *alloc_domheap_pages( diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b3a35c4bc8d6..b4330269418d 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -168,7 +168,7 @@ void heap_init_late(void); int assign_pages( struct page_info *pg, - unsigned int nr, + unsigned long nr, struct domain *d, unsigned int memflags); -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:47:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:47:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1321981.1588393 (Exim 4.92) (envelope-from ) id 1wSwcY-0001V6-F5; Fri, 29 May 2026 12:47:26 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1321981.1588393; Fri, 29 May 2026 12:47:26 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwcY-0001Uz-CJ; Fri, 29 May 2026 12:47:26 +0000 Received: by outflank-mailman (input) for mailman id 1321981; Fri, 29 May 2026 12:47:25 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwcX-0001Sx-9h for xen-devel@lists.xenproject.org; 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none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH 4/7] xen/mm: Static memory: Widen domstatic plumbing to unsigned long Date: Fri, 29 May 2026 13:43:58 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-720697/1780058844-81573161-D3AC4B9C/0/0 X-purgate-type: clean X-purgate-size: 3006 As assign_pages() accepts unsigned long nr, we can widen its domstatic users to pass unsigned long nr_mfns to it: - acquire_domstatic_pages(), assign_domstatic_pages(): Widen nr_mfns. - acquire_static_memory_bank() remove check for psize to fit in unsigned int Signed-off-by: Bernhard Kaindl --- xen/common/device-tree/static-memory.c | 7 ------- xen/common/page_alloc.c | 4 ++-- xen/include/xen/mm.h | 2 +- 3 files changed, 3 insertions(+), 10 deletions(-) diff --git a/xen/common/device-tree/static-memory.c b/xen/common/device-tree/static-memory.c index ffbc12aa24df..e04d6cc06505 100644 --- a/xen/common/device-tree/static-memory.c +++ b/xen/common/device-tree/static-memory.c @@ -46,13 +46,6 @@ static mfn_t __init acquire_static_memory_bank(struct domain *d, device_tree_get_reg(cell, addr_cells, size_cells, pbase, psize); ASSERT(IS_ALIGNED(*pbase, PAGE_SIZE) && IS_ALIGNED(*psize, PAGE_SIZE)); - if ( PFN_DOWN(*psize) > UINT_MAX ) - { - printk(XENLOG_ERR "%pd: static memory size too large: %#"PRIpaddr, - d, *psize); - return INVALID_MFN; - } - smfn = maddr_to_mfn(*pbase); res = acquire_domstatic_pages(d, smfn, PFN_DOWN(*psize), 0); if ( res ) diff --git a/xen/common/page_alloc.c b/xen/common/page_alloc.c index 8670233c550d..cb2618f6aee5 100644 --- a/xen/common/page_alloc.c +++ b/xen/common/page_alloc.c @@ -3368,7 +3368,7 @@ static struct page_info * __init acquire_staticmem_pages(mfn_t smfn, } static int assign_domstatic_pages(struct domain *d, struct page_info *pg, - unsigned int nr_mfns, unsigned int memflags) + unsigned long nr_mfns, unsigned int memflags) { if ( !d || (memflags & (MEMF_no_owner | MEMF_no_refcount)) ) { @@ -3391,7 +3391,7 @@ static int assign_domstatic_pages(struct domain *d, struct page_info *pg, * then assign them to one specific domain #d. */ int __init acquire_domstatic_pages(struct domain *d, mfn_t smfn, - unsigned int nr_mfns, unsigned int memflags) + unsigned long nr_mfns, unsigned int memflags) { struct page_info *pg; diff --git a/xen/include/xen/mm.h b/xen/include/xen/mm.h index b4330269418d..48feb664f057 100644 --- a/xen/include/xen/mm.h +++ b/xen/include/xen/mm.h @@ -107,7 +107,7 @@ bool scrub_free_pages(void); void unprepare_staticmem_pages(struct page_info *pg, unsigned long nr_mfns, bool need_scrub); void free_domstatic_page(struct page_info *page); -int acquire_domstatic_pages(struct domain *d, mfn_t smfn, unsigned int nr_mfns, +int acquire_domstatic_pages(struct domain *d, mfn_t smfn, unsigned long nr_mfns, unsigned int memflags); /* Map machine page range in Xen virtual address space. */ -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:47:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:47:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322000.1588401 (Exim 4.92) (envelope-from ) id 1wSwck-0001xR-OX; Fri, 29 May 2026 12:47:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322000.1588401; Fri, 29 May 2026 12:47:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwck-0001xK-M5; Fri, 29 May 2026 12:47:38 +0000 Received: by outflank-mailman (input) for mailman id 1322000; Fri, 29 May 2026 12:47:37 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwcj-0001wS-Sn for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:47:37 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwcj-005WAo-9T for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:47:37 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198ae5-bab6-0a2a0a5309dd-0a2a4505ac7e-30 for ; Fri, 29 May 2026 14:47:37 +0200 Received: from [160.101.131.8] (helo=na1pdmzitismtp01.tibco.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198ae8-aaa8-0a2a45050019-a0658308bf90-3 for ; Fri, 29 May 2026 14:47:37 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp01.tibco.com (Postfix) with ESMTP id C536C439EC36; Fri, 29 May 2026 08:46:31 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH 5/7] xen/mm: device-tree: Widen static page counts to unsigned long Date: Fri, 29 May 2026 13:43:59 +0100 Message-Id: <34af659daf1f1aaad7e4e355341875a7522d4594.1780058608.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-c201ff/1780058857-E2F94443-F34F4712/0/0 X-purgate-type: clean X-purgate-size: 4672 As the domstatic memory plumbing supports unsigned long nr_mfns, update the device tree handlers to no longer truncate to unsigned int: - xen/common/device-tree/static-memory.c: - append_static_memory_to_bank() Widen nr_pages to unsigned long - xen/common/device-tree/static-shmem.c: - process_shm(): Widen loop variable to unsigned long. - xen/common/device-tree/dom0less-build.c, static-shmem.c, - alloc_xenstore_page() and acquire_shared_memory_bank(): Update checks narrowing pages to UINT_MAX to ULONG_MAX. - xen/arch/arm/include/asm/p2m.h: guest_physmap_add_pages(): Accept and pass-through unsigned long nr_pages(used for static maps) Already correct: - struct paging_domain.p2m_total_pages is unsigned long. - p2m_set_allocation() takes unsigned long pages. - arch_get_paging_mempool_size() uses (uint64_t)... << PAGE_SHIFT. - p2m_insert_mapping(), map_regions_p2mt(), unmap_regions_p2mt(), map_mmio_regions() and unmap_mmio_regions() all already take unsigned long nr. Signed-off-by: Bernhard Kaindl --- xen/arch/arm/include/asm/p2m.h | 2 +- xen/common/device-tree/dom0less-build.c | 2 +- xen/common/device-tree/static-memory.c | 2 +- xen/common/device-tree/static-shmem.c | 9 ++++----- 4 files changed, 7 insertions(+), 8 deletions(-) diff --git a/xen/arch/arm/include/asm/p2m.h b/xen/arch/arm/include/asm/p2m.h index 4a4913716bdd..f719b8f1291f 100644 --- a/xen/arch/arm/include/asm/p2m.h +++ b/xen/arch/arm/include/asm/p2m.h @@ -348,7 +348,7 @@ guest_physmap_add_page(struct domain *d, gfn_t gfn, mfn_t mfn, static inline int guest_physmap_add_pages(struct domain *d, gfn_t gfn, mfn_t mfn, - unsigned int nr_pages) + unsigned long nr_pages) { return p2m_insert_mapping(d, gfn, nr_pages, mfn, p2m_ram_rw); } diff --git a/xen/common/device-tree/dom0less-build.c b/xen/common/device-tree/dom0less-build.c index eacfd93087ae..16c72682db54 100644 --- a/xen/common/device-tree/dom0less-build.c +++ b/xen/common/device-tree/dom0less-build.c @@ -592,7 +592,7 @@ static int __init alloc_xenstore_page(struct domain *d) gfn_t gfn; int rc; - if ( (UINT_MAX - d->max_pages) < 1 ) + if ( (ULONG_MAX - d->max_pages) < 1 ) { printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages by 1 page.\n", d); diff --git a/xen/common/device-tree/static-memory.c b/xen/common/device-tree/static-memory.c index e04d6cc06505..3abc62f080e5 100644 --- a/xen/common/device-tree/static-memory.c +++ b/xen/common/device-tree/static-memory.c @@ -11,7 +11,7 @@ static bool __init append_static_memory_to_bank(struct domain *d, paddr_t size) { int res; - unsigned int nr_pages = PFN_DOWN(size); + unsigned long nr_pages = PFN_DOWN(size); gfn_t sgfn; /* diff --git a/xen/common/device-tree/static-shmem.c b/xen/common/device-tree/static-shmem.c index 4c4cc1b123ac..64ed04e68487 100644 --- a/xen/common/device-tree/static-shmem.c +++ b/xen/common/device-tree/static-shmem.c @@ -96,7 +96,7 @@ static mfn_t __init acquire_shared_memory_bank(struct domain *d, * into domain_tot_pages(). */ nr_pfns = PFN_DOWN(psize); - if ( (UINT_MAX - d->max_pages) < nr_pfns ) + if ( (ULONG_MAX - d->max_pages) < nr_pfns ) { printk(XENLOG_ERR "%pd: Over-allocation for d->max_pages: %lu.\n", d, nr_pfns); @@ -313,7 +313,6 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, uint32_t addr_cells; paddr_t gbase, pbase, psize; int ret = 0; - unsigned int i; const char *role_str; const char *shm_id; @@ -362,11 +361,11 @@ int __init process_shm(struct domain *d, struct kernel_info *kinfo, return -EINVAL; } - for ( i = 0; i < PFN_DOWN(psize); i++ ) - if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), i)) ) + for ( unsigned long page = 0; page < PFN_DOWN(psize); page++ ) + if ( !mfn_valid(mfn_add(maddr_to_mfn(pbase), page)) ) { printk("%pd: invalid physical address 0x%"PRI_mfn"\n", - d, mfn_x(mfn_add(maddr_to_mfn(pbase), i))); + d, mfn_x(mfn_add(maddr_to_mfn(pbase), page))); return -EINVAL; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:48:21 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:48:21 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322061.1588410 (Exim 4.92) (envelope-from ) id 1wSwdR-0002nk-0t; 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Fri, 29 May 2026 14:48:19 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198b12-2497-0a2a45090019-a06583099392-3 for ; Fri, 29 May 2026 14:48:19 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 4EC4082767EE; Fri, 29 May 2026 08:47:03 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Jan Beulich , Andrew Cooper , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Teddy Astie Subject: [PATCH 6/7] xen/arch/x86/dom0_build.c: Extend the upper limit for Dom0's max_pages Date: Fri, 29 May 2026 13:44:00 +0100 Message-Id: X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1780058899-42573A53-14A57183/0/0 X-purgate-type: clean X-purgate-size: 806 dom0_compute_nr_pages(): Update the upper limit for Dom0's max_pages in dom0_compute_nr_pages() to limit from UINT_MAX to ULONG_MAX. Signed-off-by: Bernhard Kaindl ---- Creating a Dom0 of > 16TB isn't a useful thing, but could be for testing. --- xen/arch/x86/dom0_build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 80308ca9af46..2ebb8308fbaf 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -440,7 +440,7 @@ unsigned long __init dom0_compute_nr_pages( } } - d->max_pages = min_t(unsigned long, max_pages, UINT_MAX); + d->max_pages = min_t(unsigned long, max_pages, ULONG_MAX); return nr_pages; } -- 2.39.5 From xen-devel-bounces@lists.xenproject.org Fri May 29 12:48:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 12:48:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322074.1588419 (Exim 4.92) (envelope-from ) id 1wSwdh-0003BL-7a; Fri, 29 May 2026 12:48:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322074.1588419; Fri, 29 May 2026 12:48:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwdh-0003BE-4W; Fri, 29 May 2026 12:48:37 +0000 Received: by outflank-mailman (input) for mailman id 1322074; Fri, 29 May 2026 12:48:36 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSwdg-0003AO-0b for xen-devel@lists.xenproject.org; Fri, 29 May 2026 12:48:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSwdf-002VpK-De for xen-devel@lists.xenproject.org; Fri, 29 May 2026 14:48:35 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a198b0f-bab6-0a2a0a5309dd-0a2a4509d2b4-40 for ; Fri, 29 May 2026 14:48:35 +0200 Received: from [160.101.131.9] (helo=na1pdmzitismtp02.tibco.com) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a198b22-2497-0a2a45090019-a0658309bde0-3 for ; Fri, 29 May 2026 14:48:35 +0200 Received: from debian.eng.citrite.net (unknown [10.113.40.46]) by na1pdmzitismtp02.tibco.com (Postfix) with ESMTP id 873A082767E7; Fri, 29 May 2026 08:47:19 -0400 (EDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; none From: Bernhard Kaindl To: xen-devel@lists.xenproject.org Cc: Bernhard Kaindl , Anthony PERARD , Juergen Gross Subject: [PATCH 7/7] tools/libs/stat/xenstat.c: Extend the "no maximum" sentinel for max_pages Date: Fri, 29 May 2026 13:44:01 +0100 Message-Id: <3b0adba2cbdb73e16a1c29e081dda9167547ce57.1780058608.git.bernhard.kaindl@citrix.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-bad1c0/1780058915-4156BA53-B990E7C5/0/0 X-purgate-type: clean X-purgate-size: 908 In xenstat_get_node(), update the "no maximum" sentinel for max_pages from UINT_MAX to ULONG_MAX, which is converted to (unsigned long long)-1. Signed-off-by: Bernhard Kaindl --- tools/libs/stat/xenstat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tools/libs/stat/xenstat.c b/tools/libs/stat/xenstat.c index 8bab2e66a7fe..376136871487 100644 --- a/tools/libs/stat/xenstat.c +++ b/tools/libs/stat/xenstat.c @@ -221,7 +221,7 @@ xenstat_node *xenstat_get_node(xenstat_handle * handle, unsigned int flags) ((unsigned long long)domaininfo[i].tot_pages) * handle->page_size; domain->max_mem = - domaininfo[i].max_pages == UINT_MAX + domaininfo[i].max_pages == ULONG_MAX ? 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1780065904-8EB8BD75-CD0615AA/0/0 X-purgate-type: clean X-purgate-size: 869 Mark the TSC frequency as known when using ACRN's PV CPUID information. Per commit 81a71f51b89e ("x86/acrn: Set up timekeeping") and common sense, the TSC freq is explicitly provided by the hypervisor. Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/acrn.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index ad8f2da8003b..0303fe6a2efa 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -33,6 +33,8 @@ static void __init acrn_init_platform(void) { /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); + + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } static bool acrn_x2apic_available(void) -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322200.1588429 (Exim 4.92) (envelope-from ) id 1wSySH-0001vZ-42; Fri, 29 May 2026 14:44:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322200.1588429; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780065894-0AD77C48-7DE8818A/0/0 X-purgate-type: clean X-purgate-size: 969 Don't re-calibrate the TSC frequency if the TSC is known to run at a fixed frequency. In practice, this is likely one big nop, as re-calibration is used only for SMP=n kernels, and only for hardware that is 20+ years old, i.e. is extremely unlikely to collide with TSC_KNOWN_FREQ. Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index c5110eb554bc..08cf6625d484 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -946,7 +946,8 @@ void recalibrate_cpu_khz(void) return; cpu_khz = x86_platform.calibrate_cpu(); - tsc_khz = x86_platform.calibrate_tsc(); + if (!boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) + tsc_khz = x86_platform.calibrate_tsc(); if (tsc_khz == 0) tsc_khz = cpu_khz; else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz) -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322206.1588484 (Exim 4.92) (envelope-from ) id 1wSySM-0003F5-QO; Fri, 29 May 2026 14:45:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322206.1588484; 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AFNElJ+Q8HBk82vI3IDtHvN0MZwW5rAZPljFOds8nLBciZQdB+idFdvqIiNyDZi7j3gFReFRGUTeCBY6I4s=@lists.xenproject.org X-Gm-Message-State: AOJu0YybPzOifZDpAsF+UeiZCYfxvpe47XmcHgR23aH/9KAOLN/F95KF XCMMXLqbBk+emOn0FCTSwSVhmEGI5nwijqA4EMMsscAeky6yKoJAMKgt9wwfMHtKTiB4IzHn1DA CbjddsQ== X-Received: from plble15.prod.google.com ([2002:a17:902:fb0f:b0:2bf:aa7:47b9]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:c94c:b0:2b0:bebb:1081 with SMTP id d9443c01a7336-2bf368698abmr864185ad.28.1780065898563; Fri, 29 May 2026 07:44:58 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:53 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-7-seanjc@google.com> Subject: [PATCH v4 06/47] x86/sev: Shove SNP's secure/trusted TSC frequency directly into "calibration" From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1780065900-E2368CF5-14FADCA7/0/0 X-purgate-type: clean X-purgate-size: 5650 As a first step towards dropping .calibrate_{cpu,tsc}() and explicitly defining precedence/priority for "calibration" routines, pass the secure TSC frequency obtained from SNP firmware directly to determine_cpu_tsc_frequencies() instead of overriding the .calibrate_tsc() hook. Unlike the native calibration routines, all of the paravirtual overrides, including SNP and TDX, are constant in the sense that the frequency provided by the hypervisor or trusted firmware is fixed, known, and always available during early boot. More importantly, for CoCo (SNP and TDX) VMs, it's imperative that the kernel uses the frequency provided by the trusted firmware, not by the untrusted hypervisor. Enforcing the priority between sources by carefully ordering seemingly unrelated init calls, so that the trusted override "wins", is brittle and all but impossible to follow. While it's rather weird, deliberately prioritize tsc_early_khz over all else to maintain existing behavior. Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 14 ++++---------- arch/x86/include/asm/sev.h | 4 ++-- arch/x86/kernel/tsc.c | 19 ++++++++++++------- 3 files changed, 18 insertions(+), 19 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 403dcea86452..bc5ae9ef74da 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -99,7 +99,6 @@ static const char * const sev_status_feat_names[] = { */ static u64 snp_tsc_scale __ro_after_init; static u64 snp_tsc_offset __ro_after_init; -static unsigned long snp_tsc_freq_khz __ro_after_init; DEFINE_PER_CPU(struct sev_es_runtime_data*, runtime_data); DEFINE_PER_CPU(struct sev_es_save_area *, sev_vmsa); @@ -2014,15 +2013,10 @@ void __init snp_secure_tsc_prepare(void) pr_debug("SecureTSC enabled"); } -static unsigned long securetsc_get_tsc_khz(void) -{ - return snp_tsc_freq_khz; -} - -void __init snp_secure_tsc_init(void) +unsigned int __init snp_secure_tsc_init(void) { + unsigned long snp_tsc_freq_khz, tsc_freq_mhz; struct snp_secrets_page *secrets; - unsigned long tsc_freq_mhz; void *mem; mem = early_memremap_encrypted(sev_secrets_pa, PAGE_SIZE); @@ -2043,7 +2037,7 @@ void __init snp_secure_tsc_init(void) snp_tsc_freq_khz = SNP_SCALE_TSC_FREQ(tsc_freq_mhz * 1000, secrets->tsc_factor); - x86_platform.calibrate_tsc = securetsc_get_tsc_khz; - early_memunmap(mem, PAGE_SIZE); + + return snp_tsc_freq_khz; } diff --git a/arch/x86/include/asm/sev.h b/arch/x86/include/asm/sev.h index 594cfa19cbd4..05ebf0b73ef4 100644 --- a/arch/x86/include/asm/sev.h +++ b/arch/x86/include/asm/sev.h @@ -530,7 +530,7 @@ int snp_send_guest_request(struct snp_msg_desc *mdesc, struct snp_guest_req *req int snp_svsm_vtpm_send_command(u8 *buffer); void __init snp_secure_tsc_prepare(void); -void __init snp_secure_tsc_init(void); +unsigned int snp_secure_tsc_init(void); enum es_result savic_register_gpa(u64 gpa); enum es_result savic_unregister_gpa(u64 *gpa); u64 savic_ghcb_msr_read(u32 reg); @@ -637,7 +637,7 @@ static inline int snp_send_guest_request(struct snp_msg_desc *mdesc, struct snp_guest_req *req) { return -ENODEV; } static inline int snp_svsm_vtpm_send_command(u8 *buffer) { return -ENODEV; } static inline void __init snp_secure_tsc_prepare(void) { } -static inline void __init snp_secure_tsc_init(void) { } +static inline unsigned int __init snp_secure_tsc_init(void) { return 0; } static inline void sev_evict_cache(void *va, int npages) {} static inline enum es_result savic_register_gpa(u64 gpa) { return ES_UNSUPPORTED; } static inline enum es_result savic_unregister_gpa(u64 *gpa) { return ES_UNSUPPORTED; } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 833eed5c048a..2b8f94c3fcc7 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1474,15 +1474,16 @@ static int __init init_tsc_clocksource(void) */ device_initcall(init_tsc_clocksource); -static bool __init determine_cpu_tsc_frequencies(bool early) +static bool __init determine_cpu_tsc_frequencies(bool early, + unsigned int known_tsc_khz) { /* Make sure that cpu and tsc are not already calibrated */ WARN_ON(cpu_khz || tsc_khz); if (early) { cpu_khz = x86_platform.calibrate_cpu(); - if (tsc_early_khz) - tsc_khz = tsc_early_khz; + if (known_tsc_khz) + tsc_khz = known_tsc_khz; else tsc_khz = x86_platform.calibrate_tsc(); } else { @@ -1537,16 +1538,20 @@ static void __init tsc_enable_sched_clock(void) void __init tsc_early_init(void) { + unsigned int known_tsc_khz = 0; + if (!boot_cpu_has(X86_FEATURE_TSC)) return; /* Don't change UV TSC multi-chassis synchronization */ if (is_early_uv_system()) return; - if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) - snp_secure_tsc_init(); + if (tsc_early_khz) + known_tsc_khz = tsc_early_khz; + else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) + known_tsc_khz = snp_secure_tsc_init(); - if (!determine_cpu_tsc_frequencies(true)) + if (!determine_cpu_tsc_frequencies(true, known_tsc_khz)) return; tsc_enable_sched_clock(); } @@ -1567,7 +1572,7 @@ void __init tsc_init(void) if (!tsc_khz) { /* We failed to determine frequencies earlier, try again */ - if (!determine_cpu_tsc_frequencies(false)) { + if (!determine_cpu_tsc_frequencies(false, 0)) { mark_tsc_unstable("could not calculate TSC khz"); setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); return; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322205.1588474 (Exim 4.92) (envelope-from ) id 1wSySL-00030P-Ia; Fri, 29 May 2026 14:45:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322205.1588474; Fri, 29 May 2026 14:45:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySL-00030G-Ea; Fri, 29 May 2026 14:45:01 +0000 Received: by outflank-mailman (input) for mailman id 1322205; Fri, 29 May 2026 14:45:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3aaYZagYKCXQkWSfbUYggYdW.UgepWf-VWnWddaklk.pWfhjgbWUl.gjY@flex--seanjc.bounces.google.com>) id 1wSySK-0002lz-GV for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c1860d/1780065899-BF57FDB1-73B69ADE/0/0 X-purgate-type: clean X-purgate-size: 1583 Move the check on having a Secure TSC to the common tsc_early_init() so that it's obvious that having a Secure TSC is conditional, and to prepare for adding TDX to the mix (blindly initializing *both* SNP and TDX TSC logic looks especially weird). No functional change intended. Cc: Tom Lendacky Reviewed-by: Nikunj A Dadhania Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 3 --- arch/x86/kernel/tsc.c | 3 ++- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index 665de1aea0ee..403dcea86452 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2025,9 +2025,6 @@ void __init snp_secure_tsc_init(void) unsigned long tsc_freq_mhz; void *mem; - if (!cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) - return; - mem = early_memremap_encrypted(sev_secrets_pa, PAGE_SIZE); if (!mem) { pr_err("Unable to get TSC_FACTOR: failed to map the SNP secrets page.\n"); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index f7f561722efa..833eed5c048a 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1543,7 +1543,8 @@ void __init tsc_early_init(void) if (is_early_uv_system()) return; - snp_secure_tsc_init(); + if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) + snp_secure_tsc_init(); if (!determine_cpu_tsc_frequencies(true)) return; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322203.1588455 (Exim 4.92) (envelope-from ) id 1wSySI-0002Y7-Vq; Fri, 29 May 2026 14:44:58 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322203.1588455; Fri, 29 May 2026 14:44:58 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySI-0002Y0-TK; Fri, 29 May 2026 14:44:58 +0000 Received: by outflank-mailman (input) for mailman id 1322203; Fri, 29 May 2026 14:44:57 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3ZqYZagYKCXEhTPcYRVddVaT.RdbmTc-STkTaaXhih.mTcegdYTRi.dgV@flex--seanjc.bounces.google.com>) id 1wSySH-0001zV-IG for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d62444/1780065896-AE95FFF4-F63DC245/0/0 X-purgate-type: clean X-purgate-size: 1723 Move the code to mark the TSC as reliable from sme_early_init() to snp_secure_tsc_init(). The only reader of TSC_RELIABLE is the aptly named check_system_tsc_reliable(), which runs in tsc_init(), i.e. after snp_secure_tsc_init(). This will allow consolidating the handling of TSC_KNOWN_FREQ and TSC_RELIABLE when overriding the TSC calibration routine. Cc: Tom Lendacky Reviewed-by: Nikunj A Dadhania Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 2 ++ arch/x86/mm/mem_encrypt_amd.c | 3 --- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index ecd77d3217f3..ed0ac52a765e 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2037,6 +2037,8 @@ void __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); /* Extract the GUEST TSC MHZ from BIT[17:0], rest is reserved space */ diff --git a/arch/x86/mm/mem_encrypt_amd.c b/arch/x86/mm/mem_encrypt_amd.c index 2f8c32173972..6c3af974c7c2 100644 --- a/arch/x86/mm/mem_encrypt_amd.c +++ b/arch/x86/mm/mem_encrypt_amd.c @@ -535,9 +535,6 @@ void __init sme_early_init(void) */ x86_init.resources.dmi_setup = snp_dmi_setup; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780065898-19F6EF3B-D043C1B6/0/0 X-purgate-type: clean X-purgate-size: 1454 Don't override the kernel's CPU frequency calibration routine when registering SNP's Secure TSC calibration routine. SNP (the architecture) provides zero guarantees that the CPU runs at the same frequency as the TSC. The justification for clobbering the CPU routine was: Since the difference between CPU base and TSC frequency does not apply in this case, the same callback is being used. but that's simply not true. E.g. if APERF/MPERF is exposed to the VM, then the CPU frequency absolutely does matter. While relying on heuristics and/or the untrusted hypervisor to provide the CPU frequency isn't ideal, it's at least not outright wrong. Fixes: 73bbf3b0fbba ("x86/tsc: Init the TSC for Secure TSC guests") Cc: Nikunj A Dadhania Cc: Tom Lendacky Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index ed0ac52a765e..665de1aea0ee 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2046,7 +2046,6 @@ void __init snp_secure_tsc_init(void) snp_tsc_freq_khz = SNP_SCALE_TSC_FREQ(tsc_freq_mhz * 1000, secrets->tsc_factor); - x86_platform.calibrate_cpu = securetsc_get_tsc_khz; x86_platform.calibrate_tsc = securetsc_get_tsc_khz; early_memunmap(mem, PAGE_SIZE); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322207.1588492 (Exim 4.92) (envelope-from ) id 1wSySO-0003UN-2K; Fri, 29 May 2026 14:45:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322207.1588492; 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AFNElJ/zG1imAit+zxaJGSHe+pbe6C/l76hUpyNvHuqnaj4+TtSeAGPpIKfF6zs586QF4DAV0a19V5ch+GI=@lists.xenproject.org X-Gm-Message-State: AOJu0YwE5oYmrXgZswx5pUSQ6iFjHAHHJT4Ma+e8pU7fWdgu9x2Z187x ESbnPL7DDBEoj0PRPac/ESsIIRxo1zpyuzyOBMCQovKpGCGcVRc3m91X3LnztZNFARYXSmkU8gJ Hvmk7BQ== X-Received: from pjte5.prod.google.com ([2002:a17:90a:c205:b0:36b:7748:4e7a]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:3606:b0:36b:e109:1e63 with SMTP id 98e67ed59e1d1-36be10928f2mr708703a91.27.1780065899626; Fri, 29 May 2026 07:44:59 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:54 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-8-seanjc@google.com> Subject: [PATCH v4 07/47] x86/tdx: Force TSC frequency with CPUID-based info provided by the TDX-Module From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-33051d/1780065902-3B96D938-A1E6EBF3/0/0 X-purgate-type: clean X-purgate-size: 4302 When running as a TDX guest, explicitly set the TSC frequency to a known value, using CPUID-based information, instead of potentially relying on a hypervisor-controlled PV routine. For TDX guests, CPUID.0x15 is always emulated by the TDX-Module, i.e. the information from CPUID is more trustworthy than the information provided by the hypervisor. To maintain backwards compatibility with TDX guest kernels that use native calibration, and because it's the least awful option, retain native_calibrate_tsc()'s stuffing of the local APIC bus period using the core crystal frequency. While it's entirely possible for the hypervisor to emulate the APIC timer at a different frequency than the core crystal frequency, the commonly accepted interpretation of Intel's SDM is that APIC timer runs at the core crystal frequency when that latter is enumerated via CPUID: The APIC timer frequency will be the processor=E2=80=99s bus clock or cor= e crystal clock frequency (when TSC/core crystal clock ratio is enumerated in CPUID leaf 0x15). If the hypervisor is malicious and deliberately runs the APIC timer at the wrong frequency, nothing would stop the hypervisor from modifying the frequency at any time, i.e. attempting to manually calibrate the frequency out of paranoia would be futile. Deliberately leave CPU frequency calibration as is, since the TDX-Module doesn't provide any guarantees with respect to CPUID.0x16. Signed-off-by: Sean Christopherson --- arch/x86/coco/tdx/tdx.c | 20 +++++++++++++++++--- arch/x86/include/asm/tdx.h | 2 ++ arch/x86/kernel/tsc.c | 3 +++ 3 files changed, 22 insertions(+), 3 deletions(-) diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 29b6f1ed59ec..5d7976359220 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include #include @@ -1123,9 +1124,6 @@ void __init tdx_early_init(void) =20 setup_force_cpu_cap(X86_FEATURE_TDX_GUEST); =20 - /* TSC is the only reliable clock in TDX guest */ - setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - cc_vendor =3D CC_VENDOR_INTEL; =20 /* Configure the TD */ @@ -1195,3 +1193,19 @@ void __init tdx_early_init(void) =20 tdx_announce(); } + +unsigned int __init tdx_tsc_init(void) +{ + struct cpuid_tsc_info info; + + if (WARN_ON_ONCE(cpuid_get_tsc_freq(&info))) + return 0; + + lapic_timer_period =3D info.crystal_khz * 1000 / HZ; + + /* TSC is the only reliable clock in TDX guest */ + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + + return info.tsc_khz; +} diff --git a/arch/x86/include/asm/tdx.h b/arch/x86/include/asm/tdx.h index e5a9cf656c07..1d841d464aa4 100644 --- a/arch/x86/include/asm/tdx.h +++ b/arch/x86/include/asm/tdx.h @@ -67,6 +67,7 @@ struct ve_info { #ifdef CONFIG_INTEL_TDX_GUEST =20 void __init tdx_early_init(void); +unsigned int __init tdx_tsc_init(void); =20 void tdx_get_ve_info(struct ve_info *ve); =20 @@ -88,6 +89,7 @@ void __init tdx_dump_td_ctls(u64 td_ctls); #else =20 static inline void tdx_early_init(void) { }; +static inline unsigned int tdx_tsc_init(void) { return 0; } static inline void tdx_halt(void) { }; =20 static inline bool tdx_early_handle_ve(struct pt_regs *regs) { return fals= e; } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 2b8f94c3fcc7..2603f136e29b 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -34,6 +34,7 @@ #include #include #include +#include =20 unsigned int __read_mostly cpu_khz; /* TSC clocks / usec, not used here */ EXPORT_SYMBOL(cpu_khz); @@ -1550,6 +1551,8 @@ void __init tsc_early_init(void) known_tsc_khz =3D tsc_early_khz; else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) known_tsc_khz =3D snp_secure_tsc_init(); + else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) + known_tsc_khz =3D tdx_tsc_init(); =20 if (!determine_cpu_tsc_frequencies(true, known_tsc_khz)) return; --=20 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322201.1588433 (Exim 4.92) (envelope-from ) id 1wSySH-0001xd-As; Fri, 29 May 2026 14:44:57 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322201.1588433; Fri, 29 May 2026 14:44:57 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySH-0001wo-6m; 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Fri, 29 May 2026 07:44:50 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:47 -0700 Mime-Version: 1.0 X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-1-seanjc@google.com> Subject: [PATCH v4 00/47] x86: Try to wrangle PV clocks vs. TSC From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1780065893-87371D75-C9DB72F8/0/0 X-purgate-type: clean X-purgate-size: 9340 Well, the number of patches in the series is going in the wrong direction, but I'm much happier with this version, which eschews the x86_platform overrides entirely in favor of a fixed sequence for selecting the TSC/CPU frequency "routine". Given that previous versions had fatal NULL pointer deref bugs that affected VMware and Xen, this series needs testing and acks from those maintainers. The primary goal of this series to fix flaws with SNP and TDX guests where a PV clock provided by the untrusted hypervisor is used instead of the secure TSC that is controlled by trusted firmware. The secondary goal is modernize running under KVM. Currently, KVM guests will use TSC for clocksource, but not sched_clock. And Linux-as-a-KVM-guest doesn't support paravirt enumeration of the TSC/APIC frequencies, even though QEMU provides that information by default. The tertiary goal is to clean up the PV clock code to deduplicate logic across hypervisors, and to hopefully make it all easier to maintain going forward. v4 also adds a quaternary goal of cleaning up the TSC calibration code, which was made stupidly hard to follow by hypervisor code mixing in with the native calibration routines, instead of being implemented as a pure alternative. Lots more background on the SNP/TDX motiviation: https://lore.kernel.org/all/20250106124633.1418972-13-nikunj@amd.com As before, I deliberately omitted jailhouse-dev@googlegroups.com from the To/Cc, as those emails bounced on v1, AFAICT nothing has changed. Note, I deliberately didn't collect a few reviews as the patches changed quite a bit from what was reviewed in v3. v4: - Use x86_init_noop() to skip save/restore on VMware and Xen instead of nullifying x86_platform.{save,restore}_sched_clock_state. [Sashiko] - Use '0' to indicate "failure" when getting the CPU frequency from CPUID, to avoid using an out-param and thus make it all but impossible to unintentionally clobber the global cpu_khz (which v3 did). [Sashiko] - Rename cpuid_get_cpu_freq() => __cpu_khz_from_cpuid() to capture its relationship with cpu_khz_from_cpuid(). - Compute lapic_timer_period in units of ticks, not Khz. [Sashiko] - Kill off x86_platform_ops.calibrate_{cpu,tsc}(), and instead use dedicated hooks for hypervisor code, and direct calls for TDX and SNP. [David, loosely] - Drop SNP's secure TSC override of _CPU_ calibration, as there's zero evidence it's justified or a net positive. - Collect reviews/acks. [David, Wei] - Decouple getting TSC/APIC frequencies from KVM PV CPUID from kvmclock. [David] - Fix an amusing number of Opportunistically misspellings. [David] - Set kvm_sched_clock_offset _before_ registering kvmclock as sched_clock, and add a comment to guard against future goofs. [Sashiko] - Keep "setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE)" in Hyper-V's handling of HV_ACCESS_TSC_INVARIANT, as it's technically possible to have a VM with HV_ACCESS_TSC_INVARIANT but not HV_ACCESS_FREQUENCY_MSRS. Though as a _very_ nice side effect of using dedicated sequencing for selecting the TSC frequency source, this would have naturally happened anyways. [Sashiko] v3: - https://lore.kernel.org/all/20260515191942.1892718-1-seanjc@google.com - Collect reviews. [Michael, Thomas] - Use Hyper-V reference counter / refcounter instead of Hyper-V timer. [Michael] - Use the paravirt CPUID interface first proposed by VMware for KVM's "official" mechanism for communicating frequency to KVM-aware guests, instead of abusing Intel's CPUID leafs. [David] - Deal with paravirt code being moved into asm/timers.h and arch/x86/kernel/tsc.c. v2: - https://lore.kernel.org/all/Z8YWttWDtvkyCtdJ@google.com - Add struct to hold the TSC CPUID output. [Boris] - Don't pointlessly inline the TSC CPUID helpers. [Boris] - Fix a variable goof in a helper, hopefully for real this time. [Dan] - Collect reviews. [Nikunj] - Override the sched_clock save/restore hooks if and only if a PV clock is successfully registered. - During resome, restore clocksources before reading persistent time. - Clean up more warts created by kvmclock. - Fix more bugs in kvmclock's suspend/resume handling. - Try to harden kvmclock against future bugs. v1: https://lore.kernel.org/all/20250201021718.699411-1-seanjc@google.com David Woodhouse (3): KVM: x86: Officially define CPUID 0x40000010 as PV Timing Info (TSC and Bus) x86/kvm: Obtain TSC frequency from PV CPUID if present x86/xen: Obtain TSC frequency from CPUID if present Sean Christopherson (44): x86/tsc: Never re-calibrate TSC frequency if its exact timing is known x86/tsc: Add a standalone helpers for getting TSC info from CPUID.0x15 x86/sev: Mark TSC as reliable when configuring Secure TSC x86/sev: Don't override CPU frequency calibration for SNP's Secure TSC x86/sev: Move check for SNP Secure TSC support to tsc_early_init() x86/sev: Shove SNP's secure/trusted TSC frequency directly into "calibration" x86/tdx: Force TSC frequency with CPUID-based info provided by the TDX-Module x86/tsc: Add dedicated hypervisor hooks for getting known TSC/CPU frequencies x86/acrn: Mark TSC frequency as known when using ACRN for calibration x86/tsc: Consolidate forcing of X86_FEATURE_TSC_KNOWN_FREQ for PV code x86/tsc: Kill off x86_platform_ops.calibrate_{cpu,tsc}() hooks x86/tsc: Rename pit_hpet_ptimer_calibrate_cpu() => native_calibrate_cpu_late() x86/tsc: Fold native_calibrate_cpu() into recalibrate_cpu_khz() x86/kvmclock: Rename kvm_get_tsc_khz() to kvmclock_get_tsc_khz() x86/kvm: Mark TSC as reliable when it's constant and nonstop x86/kvm: Get local APIC bus frequency from PV CPUID Timing Info x86/tsc: Add standalone helper for getting CPU frequency from CPUID x86/kvm: Get CPU base frequency from CPUID when it's available clocksource: hyper-v: Register sched_clock save/restore iff it's necessary clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock x86/kvmclock: Setup kvmclock for secondary CPUs iff CONFIG_SMP=y x86/kvm: Don't disable kvmclock on BSP in syscore_suspend() x86/paravirt: Remove unnecessary PARAVIRT=n stub for paravirt_set_sched_clock() x86/paravirt: Move handling of unstable PV clocks into paravirt_set_sched_clock() x86/kvmclock: Move sched_clock save/restore helpers up in kvmclock.c x86/xen/time: NOP-ify x86_platform's sched_clock save/restore hooks x86/vmware: NOP-ify save/restore hooks when using VMware's sched_clock x86/tsc: WARN if TSC sched_clock save/restore used with PV sched_clock x86/paravirt: Pass sched_clock save/restore helpers during registration x86/kvmclock: Move kvm_sched_clock_init() down in kvmclock.c x86/xen/time: Mark xen_setup_vsyscall_time_info() as __init x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init x86/pvclock: WARN if pvclock's valid_flags are overwritten x86/kvmclock: Refactor handling of PVCLOCK_TSC_STABLE_BIT during kvmclock_init() timekeeping: Resume clocksources before reading persistent clock x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock x86/kvmclock: WARN if wall clock is read while kvmclock is suspended x86/paravirt: Mark __paravirt_set_sched_clock() as __init x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() x86/paravirt: Don't use a PV sched_clock in CoCo guests with trusted TSC x86/kvmclock: Use TSC for sched_clock if it's constant and non-stop x86/kvmclock: Plumb in AP-online and BSP-resume to kvmlock, for documentation x86/paravirt: Move using_native_sched_clock() stub into timer.h Documentation/virt/kvm/x86/cpuid.rst | 12 ++ arch/x86/coco/sev/core.c | 21 +-- arch/x86/coco/tdx/tdx.c | 19 ++- arch/x86/include/asm/acrn.h | 5 - arch/x86/include/asm/kvm_para.h | 12 +- arch/x86/include/asm/sev.h | 4 +- arch/x86/include/asm/tdx.h | 2 + arch/x86/include/asm/timer.h | 15 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(user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:5410:b0:36b:bbee:fb28 with SMTP id 98e67ed59e1d1-36bbcc14662mr3769042a91.2.1780065900790; Fri, 29 May 2026 07:45:00 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:55 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-9-seanjc@google.com> Subject: [PATCH v4 08/47] x86/tsc: Add dedicated hypervisor hooks for getting known TSC/CPU frequencies From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1780065903-705648B7-27505DA5/0/0 X-purgate-type: clean X-purgate-size: 10836 Add dedicated hypervisor hooks for getting known TSC/CPU frequencies instead of overriding seemingly generic platform hooks, and explicitly priotize hypervisor-provided frequencies over native methods, but do NOT clobber the frequency obtained from trusted firmware. While shuffling the hooks around is arguably "six of one, half dozen of the other", scoping them to x86_hyper_init makes their purpose more obvious, and allows for explicitly defining the priority of sources (as is done here). Cc: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/acrn.h | 5 ----- arch/x86/include/asm/x86_init.h | 4 ++++ arch/x86/kernel/cpu/acrn.c | 10 +++++++--- arch/x86/kernel/cpu/mshyperv.c | 6 +++--- arch/x86/kernel/cpu/vmware.c | 8 ++++---- arch/x86/kernel/jailhouse.c | 6 +++--- arch/x86/kernel/kvmclock.c | 6 +++--- arch/x86/kernel/tsc.c | 23 +++++++++++++++++++---- arch/x86/xen/time.c | 4 ++-- 9 files changed, 45 insertions(+), 27 deletions(-) diff --git a/arch/x86/include/asm/acrn.h b/arch/x86/include/asm/acrn.h index db42b477c41d..a892179c61c6 100644 --- a/arch/x86/include/asm/acrn.h +++ b/arch/x86/include/asm/acrn.h @@ -32,11 +32,6 @@ static inline u32 acrn_cpuid_base(void) return 0; } -static inline unsigned long acrn_get_tsc_khz(void) -{ - return cpuid_eax(ACRN_CPUID_TIMING_INFO); -} - /* * Hypercalls for ACRN * diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index 6c8a6ead84f6..a4f8a4aa601d 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -120,6 +120,8 @@ struct x86_init_pci { * @msi_ext_dest_id: MSI supports 15-bit APIC IDs * @init_mem_mapping: setup early mappings during init_mem_mapping() * @init_after_bootmem: guest init after boot allocator is finished + * @get_tsc_khz: get the TSC frequency (returns 0 if frequency is unknown) + * @get_cpu_khz: get the CPU frequency (returns 0 if frequency is unknown) */ struct x86_hyper_init { void (*init_platform)(void); @@ -128,6 +130,8 @@ struct x86_hyper_init { bool (*msi_ext_dest_id)(void); void (*init_mem_mapping)(void); void (*init_after_bootmem)(void); + unsigned int (*get_tsc_khz)(void); + unsigned int (*get_cpu_khz)(void); }; /** diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index dc119af83524..ad8f2da8003b 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -24,13 +24,15 @@ static u32 __init acrn_detect(void) return acrn_cpuid_base(); } +static unsigned int __init acrn_get_tsc_khz(void) +{ + return cpuid_eax(ACRN_CPUID_TIMING_INFO); +} + static void __init acrn_init_platform(void) { /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); - - x86_platform.calibrate_tsc = acrn_get_tsc_khz; - x86_platform.calibrate_cpu = acrn_get_tsc_khz; } static bool acrn_x2apic_available(void) @@ -78,4 +80,6 @@ const __initconst struct hypervisor_x86 x86_hyper_acrn = { .type = X86_HYPER_ACRN, .init.init_platform = acrn_init_platform, .init.x2apic_available = acrn_x2apic_available, + .init.get_tsc_khz = acrn_get_tsc_khz, + .init.get_cpu_khz = acrn_get_tsc_khz, }; diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 185d4f677ec0..733e12d5a7dd 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -395,7 +395,7 @@ static int hv_nmi_unknown(unsigned int val, struct pt_regs *regs) } #endif -static unsigned long hv_get_tsc_khz(void) +static unsigned int __init hv_get_tsc_khz(void) { unsigned long freq; @@ -573,8 +573,8 @@ static void __init ms_hyperv_init_platform(void) if (ms_hyperv.features & HV_ACCESS_FREQUENCY_MSRS && ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { - x86_platform.calibrate_tsc = hv_get_tsc_khz; - x86_platform.calibrate_cpu = hv_get_tsc_khz; + x86_init.hyper.get_tsc_khz = hv_get_tsc_khz; + x86_init.hyper.get_cpu_khz = hv_get_tsc_khz; setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 34b73573b108..7c8cf4885e82 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -64,7 +64,7 @@ struct vmware_steal_time { u64 reserved[7]; }; -static unsigned long vmware_tsc_khz __ro_after_init; +static unsigned long vmware_tsc_khz __initdata; static u8 vmware_hypercall_mode __ro_after_init; unsigned long vmware_hypercall_slow(unsigned long cmd, @@ -137,7 +137,7 @@ static inline int __vmware_platform(void) return eax != UINT_MAX && ebx == VMWARE_HYPERVISOR_MAGIC; } -static unsigned long vmware_get_tsc_khz(void) +static unsigned int __init vmware_get_tsc_khz(void) { return vmware_tsc_khz; } @@ -419,8 +419,8 @@ static void __init vmware_platform_setup(void) } vmware_tsc_khz = tsc_khz; - x86_platform.calibrate_tsc = vmware_get_tsc_khz; - x86_platform.calibrate_cpu = vmware_get_tsc_khz; + x86_init.hyper.get_tsc_khz = vmware_get_tsc_khz; + x86_init.hyper.get_cpu_khz = vmware_get_tsc_khz; #ifdef CONFIG_X86_LOCAL_APIC /* Skip lapic calibration since we know the bus frequency. */ diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index f58ce9220e0f..4034e08c5f11 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -68,7 +68,7 @@ static void __init jailhouse_timer_init(void) lapic_timer_period = setup_data.v1.apic_khz * (1000 / HZ); } -static unsigned long jailhouse_get_tsc(void) +static unsigned int __init jailhouse_get_tsc(void) { return precalibrated_tsc_khz; } @@ -210,8 +210,6 @@ static void __init jailhouse_init_platform(void) x86_init.mpparse.parse_smp_cfg = jailhouse_parse_smp_config; x86_init.pci.arch_init = jailhouse_pci_arch_init; - x86_platform.calibrate_cpu = jailhouse_get_tsc; - x86_platform.calibrate_tsc = jailhouse_get_tsc; x86_platform.get_wallclock = jailhouse_get_wallclock; x86_platform.legacy.rtc = 0; x86_platform.legacy.warm_reset = 0; @@ -293,5 +291,7 @@ const struct hypervisor_x86 x86_hyper_jailhouse __refconst = { .detect = jailhouse_detect, .init.init_platform = jailhouse_init_platform, .init.x2apic_available = jailhouse_x2apic_available, + .init.get_tsc_khz = jailhouse_get_tsc, + .init.get_cpu_khz = jailhouse_get_tsc, .ignore_nopv = true, }; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index b5991d53fc0e..ec888eef74aa 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -115,7 +115,7 @@ static inline void kvm_sched_clock_init(bool stable) * poll of guests can be running and trouble each other. So we preset * lpj here */ -static unsigned long kvm_get_tsc_khz(void) +static unsigned int __init kvm_get_tsc_khz(void) { setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(this_cpu_pvti()); @@ -321,8 +321,8 @@ void __init kvmclock_init(void) flags = pvclock_read_flags(&hv_clock_boot[0].pvti); kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); - x86_platform.calibrate_tsc = kvm_get_tsc_khz; - x86_platform.calibrate_cpu = kvm_get_tsc_khz; + x86_init.hyper.get_tsc_khz = kvm_get_tsc_khz; + x86_init.hyper.get_cpu_khz = kvm_get_tsc_khz; x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; #ifdef CONFIG_X86_LOCAL_APIC diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 2603f136e29b..362596612442 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1476,13 +1476,17 @@ static int __init init_tsc_clocksource(void) device_initcall(init_tsc_clocksource); static bool __init determine_cpu_tsc_frequencies(bool early, + unsigned int known_cpu_khz, unsigned int known_tsc_khz) { /* Make sure that cpu and tsc are not already calibrated */ WARN_ON(cpu_khz || tsc_khz); if (early) { - cpu_khz = x86_platform.calibrate_cpu(); + if (known_cpu_khz) + cpu_khz = known_cpu_khz; + else + cpu_khz = x86_platform.calibrate_cpu(); if (known_tsc_khz) tsc_khz = known_tsc_khz; else @@ -1539,7 +1543,7 @@ static void __init tsc_enable_sched_clock(void) void __init tsc_early_init(void) { - unsigned int known_tsc_khz = 0; + unsigned int known_cpu_khz = 0, known_tsc_khz = 0; if (!boot_cpu_has(X86_FEATURE_TSC)) return; @@ -1547,6 +1551,9 @@ void __init tsc_early_init(void) if (is_early_uv_system()) return; + if (x86_init.hyper.get_cpu_khz) + known_cpu_khz = x86_init.hyper.get_cpu_khz(); + if (tsc_early_khz) known_tsc_khz = tsc_early_khz; else if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC)) @@ -1554,7 +1561,15 @@ void __init tsc_early_init(void) else if (boot_cpu_has(X86_FEATURE_TDX_GUEST)) known_tsc_khz = tdx_tsc_init(); - if (!determine_cpu_tsc_frequencies(true, known_tsc_khz)) + /* + * If the TSC frequency is still unknown, i.e. not provided by the user + * or by trusted firmware, try to get it from the hypervisor (which is + * untrusted when running as a CoCo guest). + */ + if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) + known_tsc_khz = x86_init.hyper.get_tsc_khz(); + + if (!determine_cpu_tsc_frequencies(true, known_cpu_khz, known_tsc_khz)) return; tsc_enable_sched_clock(); } @@ -1575,7 +1590,7 @@ void __init tsc_init(void) if (!tsc_khz) { /* We failed to determine frequencies earlier, try again */ - if (!determine_cpu_tsc_frequencies(false, 0)) { + if (!determine_cpu_tsc_frequencies(false, 0, 0)) { mark_tsc_unstable("could not calculate TSC khz"); setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER); return; diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index d62c14334b35..1adb44fdddb2 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -38,7 +38,7 @@ static u64 xen_sched_clock_offset __read_mostly; /* Get the TSC speed from Xen */ -static unsigned long xen_tsc_khz(void) +static unsigned int __init xen_tsc_khz(void) { struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; @@ -569,7 +569,7 @@ static void __init xen_init_time_common(void) static_call_update(pv_steal_clock, xen_steal_clock); paravirt_set_sched_clock(xen_sched_clock); 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c1860d/1780065895-BDB6CDB1-C939987C/0/0 X-purgate-type: clean X-purgate-size: 5253 Extract retrieval of TSC frequency information from CPUID into standalone helpers so that TDX guest support can reuse the logic. Provide a version that includes the multiplier math as TDX does NOT want to use native_calibrate_tsc()'s fallback logic that derives the TSC frequency based on CPUID.0x16, when the core crystal frequency isn't known. Opportunistically drop native_calibrate_tsc()'s "== 0" and "!= 0" checks in favor of the kernel's preferred style. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 8 +++++ arch/x86/kernel/tsc.c | 67 +++++++++++++++++++++++++------------- 2 files changed, 52 insertions(+), 23 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 4f7f09f50552..6cf26e62e9a6 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -83,6 +83,14 @@ static inline cycles_t get_cycles(void) } #define get_cycles get_cycles +struct cpuid_tsc_info { + unsigned int denominator; + unsigned int numerator; + unsigned int crystal_khz; + unsigned int tsc_khz; +}; +extern int __init cpuid_get_tsc_freq(struct cpuid_tsc_info *info); + extern void tsc_early_init(void); extern void tsc_init(void); extern void mark_tsc_unstable(char *reason); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 08cf6625d484..f7f561722efa 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -658,46 +658,67 @@ static unsigned long quick_pit_calibrate(void) return delta; } +static int cpuid_get_tsc_info(struct cpuid_tsc_info *info) +{ + unsigned int ecx_hz, edx; + + memset(info, 0, sizeof(*info)); + + if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC) + return -ENOENT; + + /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ + cpuid(CPUID_LEAF_TSC, &info->denominator, &info->numerator, &ecx_hz, &edx); + + if (!info->denominator || !info->numerator) + return -ENOENT; + + /* + * Note, some CPUs provide the multiplier information, but not the core + * crystal frequency. The multiplier information is still useful for + * such CPUs, as the crystal frequency can be gleaned from CPUID.0x16. + */ + info->crystal_khz = ecx_hz / 1000; + return 0; +} + +int __init cpuid_get_tsc_freq(struct cpuid_tsc_info *info) +{ + if (cpuid_get_tsc_info(info) || !info->crystal_khz) + return -ENOENT; + + info->tsc_khz = info->crystal_khz * info->numerator / info->denominator; + return 0; +} + /** * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. */ unsigned long native_calibrate_tsc(void) { - unsigned int eax_denominator, ebx_numerator, ecx_hz, edx; - unsigned int crystal_khz; + struct cpuid_tsc_info info; if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return 0; - if (boot_cpu_data.cpuid_level < CPUID_LEAF_TSC) + if (cpuid_get_tsc_info(&info)) return 0; - eax_denominator = ebx_numerator = ecx_hz = edx = 0; - - /* CPUID 15H TSC/Crystal ratio, plus optionally Crystal Hz */ - cpuid(CPUID_LEAF_TSC, &eax_denominator, &ebx_numerator, &ecx_hz, &edx); - - if (ebx_numerator == 0 || eax_denominator == 0) - return 0; - - crystal_khz = ecx_hz / 1000; - /* * Denverton SoCs don't report crystal clock, and also don't support * CPUID_LEAF_FREQ for the calculation below, so hardcode the 25MHz * crystal clock. */ - if (crystal_khz == 0 && - boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D) - crystal_khz = 25000; + if (!info.crystal_khz && boot_cpu_data.x86_vfm == INTEL_ATOM_GOLDMONT_D) + info.crystal_khz = 25000; /* * TSC frequency reported directly by CPUID is a "hardware reported" * frequency and is the most accurate one so far we have. This * is considered a known frequency. */ - if (crystal_khz != 0) + if (info.crystal_khz) setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); /* @@ -705,15 +726,15 @@ unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (crystal_khz == 0 && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { + if (!info.crystal_khz && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { unsigned int eax_base_mhz, ebx, ecx, edx; cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); - crystal_khz = eax_base_mhz * 1000 * - eax_denominator / ebx_numerator; + info.crystal_khz = eax_base_mhz * 1000 * + info.denominator / info.numerator; } - if (crystal_khz == 0) + if (!info.crystal_khz) return 0; /* @@ -730,10 +751,10 @@ unsigned long native_calibrate_tsc(void) * lapic_timer_period here to avoid having to calibrate the APIC * timer later. */ - lapic_timer_period = crystal_khz * 1000 / HZ; + lapic_timer_period = info.crystal_khz * 1000 / HZ; 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bh=H0GwXhoguEvRGovrleKtlxRg6q5h/dMOER9+6opKAAY=; b=rmJQvJhFaZY/UCUMdSAzXHtHnoMuI5KEC7i1mogezrC+u8zrEKtICrXuLwHy+R/Lgg j+f5CVo4iqU6j6UT2d2Vp1EFydhcumam6PVYH6YijqaK9XA7D9LnAKaLrEDlnPVetIqg duP6NYXqlGTIQg8edKjElVIMjNlnbEUN03OAmApq2FvK3FgUnYZARMtzViqs2AMiVubU Ii8GJ907N3HjyXHGGzoh3q9FFJ0HC6+N8VUbemy4vdIm+dbqu+tokc56c8Mb0yiP6p/p rg6v62w0lyLTMTW98z2+oGSUDm4LFS/wVgOtSslc2U2AiR1boAjdd/0vZqlTiNBNy9A3 F5hw== X-Forwarded-Encrypted: i=1; AFNElJ8VfrlwJDiZUfNQ2CmV/n4BDue84jEh/7mLue29RW8b4RAW1mXVkKRNfk/dMx738UvlzXn7YpT+YMs=@lists.xenproject.org X-Gm-Message-State: AOJu0Yypwf7NW3/uSeW+yWAX8dS5pa7rw1p4Cld4WeVuCoCC7T1k+Lh/ RQX7haAW3XfXmcbjnHiocqh020mCft3TRaxYWE+TMYHzqErgM+UdY8fe+B8xJFuiS0UrGXf5OXB qYj/zSg== X-Received: from pgc24.prod.google.com ([2002:a05:6a02:2f98:b0:c80:192c:51ff]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:c94c:b0:2b2:be01:5532 with SMTP id d9443c01a7336-2bf3686d1dcmr856725ad.35.1780065903103; Fri, 29 May 2026 07:45:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:57 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-11-seanjc@google.com> Subject: [PATCH v4 10/47] x86/tsc: Consolidate forcing of X86_FEATURE_TSC_KNOWN_FREQ for PV code From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1780065905-D996DCF5-F5EF5524/0/0 X-purgate-type: clean X-purgate-size: 6001 Now that all paravirt code that explicitly specifies the TSC frequency also sets X86_FEATURE_TSC_KNOWN_FREQ, replace all of the one-off code and simply set X86_FEATURE_TSC_KNOWN_FREQ if the TSC frequency is known. Do NOT force set TSC_KNOWN_FREQ if the "known" TSC frequency was provided by the user. Per commit bd35c77e32e4 ("x86/tsc: Add tsc_early_khz command line parameter"), one of the goals of the param is to allow the refined calibration work "to do meaningful error checking". Note, preferring the user-provided TSC frequency over the frequency from the hypervisor or trusted firmware, while simultaneously not treating the user-provided frequency as gospel, is obviously incongruous. Sweep the problem under the rug for now to avoid opening a big can of worms that likely doesn't have a great answer. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/coco/sev/core.c | 1 - arch/x86/coco/tdx/tdx.c | 1 - arch/x86/kernel/cpu/acrn.c | 2 -- arch/x86/kernel/cpu/mshyperv.c | 1 - arch/x86/kernel/cpu/vmware.c | 2 -- arch/x86/kernel/jailhouse.c | 1 - arch/x86/kernel/kvmclock.c | 1 - arch/x86/kernel/tsc.c | 9 +++++++++ arch/x86/xen/time.c | 1 - 9 files changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c index bc5ae9ef74da..72313b36b6f5 100644 --- a/arch/x86/coco/sev/core.c +++ b/arch/x86/coco/sev/core.c @@ -2027,7 +2027,6 @@ unsigned int __init snp_secure_tsc_init(void) secrets = (__force struct snp_secrets_page *)mem; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); rdmsrq(MSR_AMD64_GUEST_TSC_FREQ, tsc_freq_mhz); diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c index 5d7976359220..ab463c2b2dab 100644 --- a/arch/x86/coco/tdx/tdx.c +++ b/arch/x86/coco/tdx/tdx.c @@ -1205,7 +1205,6 @@ unsigned int __init tdx_tsc_init(void) /* TSC is the only reliable clock in TDX guest */ setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return info.tsc_khz; } diff --git a/arch/x86/kernel/cpu/acrn.c b/arch/x86/kernel/cpu/acrn.c index 0303fe6a2efa..ad8f2da8003b 100644 --- a/arch/x86/kernel/cpu/acrn.c +++ b/arch/x86/kernel/cpu/acrn.c @@ -33,8 +33,6 @@ static void __init acrn_init_platform(void) { /* Install system interrupt handler for ACRN hypervisor callback */ sysvec_install(HYPERVISOR_CALLBACK_VECTOR, sysvec_acrn_hv_callback); - - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } static bool acrn_x2apic_available(void) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index 733e12d5a7dd..f8653fc05a40 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -575,7 +575,6 @@ static void __init ms_hyperv_init_platform(void) ms_hyperv.misc_features & HV_FEATURE_FREQUENCY_MSRS_AVAILABLE) { x86_init.hyper.get_tsc_khz = hv_get_tsc_khz; x86_init.hyper.get_cpu_khz = hv_get_tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); } if (ms_hyperv.priv_high & HV_ISOLATION) { diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 7c8cf4885e82..2d0624c66799 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -390,8 +390,6 @@ static void __init vmware_set_capabilities(void) { setup_force_cpu_cap(X86_FEATURE_CONSTANT_TSC); setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); - if (vmware_tsc_khz) - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMCALL) setup_force_cpu_cap(X86_FEATURE_VMCALL); else if (vmware_hypercall_mode == CPUID_VMWARE_FEATURES_ECX_VMMCALL) diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c index 4034e08c5f11..e4d7d9e2cd69 100644 --- a/arch/x86/kernel/jailhouse.c +++ b/arch/x86/kernel/jailhouse.c @@ -255,7 +255,6 @@ static void __init jailhouse_init_platform(void) pr_debug("Jailhouse: PM-Timer IO Port: %#x\n", pmtmr_ioport); precalibrated_tsc_khz = setup_data.v1.tsc_khz; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); pci_probe = 0; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index ec888eef74aa..69752b170e0a 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -117,7 +117,6 @@ static inline void kvm_sched_clock_init(bool stable) */ static unsigned int __init kvm_get_tsc_khz(void) { - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(this_cpu_pvti()); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 362596612442..8cef918486db 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -1569,6 +1569,15 @@ void __init tsc_early_init(void) if (!known_tsc_khz && x86_init.hyper.get_tsc_khz) known_tsc_khz = x86_init.hyper.get_tsc_khz(); + /* + * Mark the TSC frequency as known if it was obtained from a hypervisor + * or trusted firmware. Don't mark the frequency as known if the user + * specified the frequency, as the user-provided frequency is intended + * as a "starting point", not a known, guaranteed frequency. + */ + if (known_tsc_khz && !tsc_early_khz) + setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); + if (!determine_cpu_tsc_frequencies(true, known_cpu_khz, known_tsc_khz)) return; tsc_enable_sched_clock(); diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 1adb44fdddb2..487ad838c441 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -43,7 +43,6 @@ static unsigned int __init xen_tsc_khz(void) struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; - setup_force_cpu_cap(X86_FEATURE_TSC_KNOWN_FREQ); return pvclock_tsc_khz(info); } -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322214.1588524 (Exim 4.92) (envelope-from ) id 1wSyST-0004Uu-4p; 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AFNElJ/rzdsbXykhMNyVepYZRDaWVwNpC/uhtG3Xit/TBZfqbrKnszV2ZaWEVgpy2WBdLTGnhhMGXo1FzCw=@lists.xenproject.org X-Gm-Message-State: AOJu0YwCcqI1Axbu1zckquGlDi3bMLndZKi8eqzhWKILS0lYWtJqqjrd vcE8aSnJrg4UTS2dpRnbx6iLkn/dj99xjFv2el2mVh0xS2Nu0/Tt4pTY+zsD9awoKc79MU6Q3Kn xhdPsgQ== X-Received: from pjqx13.prod.google.com ([2002:a17:90a:b00d:b0:36b:a7c4:95be]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:2681:b0:368:6998:b4a9 with SMTP id 98e67ed59e1d1-36bbcc14546mr3878407a91.11.1780065904236; Fri, 29 May 2026 07:45:04 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:58 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-12-seanjc@google.com> Subject: [PATCH v4 11/47] x86/tsc: Kill off x86_platform_ops.calibrate_{cpu,tsc}() hooks From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1780065906-DA776CF5-CC218FFB/0/0 X-purgate-type: clean X-purgate-size: 5667 Now that getting the CPU and/or TSC frequencies from the hypervisor uses dedicated hooks, drop x86_platform_ops.calibrate_{cpu,tsc}() and instead directly invoke the correct helper at each phase of (re)calibration. In addition to eliminating unnecessary code, this makes it a bit more obvious when the "late" path invokes pit_hpet_ptimer_calibrate_cpu() instead of x86_platform_ops.calibrate_cpu(). No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 2 -- arch/x86/include/asm/x86_init.h | 4 ---- arch/x86/kernel/tsc.c | 28 ++++++++++++---------------- arch/x86/kernel/x86_init.c | 2 -- 4 files changed, 12 insertions(+), 24 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 6cf26e62e9a6..4a224f99c3b9 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -97,8 +97,6 @@ extern void mark_tsc_unstable(char *reason); extern int unsynchronized_tsc(void); extern int check_tsc_unstable(void); extern void mark_tsc_async_resets(char *reason); -extern unsigned long native_calibrate_cpu_early(void); -extern unsigned long native_calibrate_tsc(void); extern unsigned long long native_sched_clock_from_tsc(u64 tsc); extern int tsc_clocksource_reliable; diff --git a/arch/x86/include/asm/x86_init.h b/arch/x86/include/asm/x86_init.h index a4f8a4aa601d..ada17827ea51 100644 --- a/arch/x86/include/asm/x86_init.h +++ b/arch/x86/include/asm/x86_init.h @@ -292,8 +292,6 @@ struct x86_hyper_runtime { /** * struct x86_platform_ops - platform specific runtime functions - * @calibrate_cpu: calibrate CPU - * @calibrate_tsc: calibrate TSC, if different from CPU * @get_wallclock: get time from HW clock like RTC etc. * @set_wallclock: set time back to HW clock * @iommu_shutdown: set by an IOMMU driver for shutdown if necessary @@ -317,8 +315,6 @@ struct x86_hyper_runtime { * @guest: guest incarnations callbacks */ struct x86_platform_ops { - unsigned long (*calibrate_cpu)(void); - unsigned long (*calibrate_tsc)(void); void (*get_wallclock)(struct timespec64 *ts); int (*set_wallclock)(const struct timespec64 *ts); void (*iommu_shutdown)(void); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 8cef918486db..5b4b6e43c94c 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -696,7 +696,7 @@ int __init cpuid_get_tsc_freq(struct cpuid_tsc_info *info) * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. */ -unsigned long native_calibrate_tsc(void) +static unsigned long native_calibrate_tsc(void) { struct cpuid_tsc_info info; @@ -931,7 +931,7 @@ static unsigned long pit_hpet_ptimer_calibrate_cpu(void) /** * native_calibrate_cpu_early - can calibrate the cpu early in boot */ -unsigned long native_calibrate_cpu_early(void) +static unsigned long native_calibrate_cpu_early(void) { unsigned long flags, fast_calibrate = cpu_khz_from_cpuid(); @@ -945,7 +945,7 @@ unsigned long native_calibrate_cpu_early(void) return fast_calibrate; } - +#ifndef CONFIG_SMP /** * native_calibrate_cpu - calibrate the cpu */ @@ -958,6 +958,7 @@ static unsigned long native_calibrate_cpu(void) return tsc_freq; } +#endif void recalibrate_cpu_khz(void) { @@ -967,9 +968,9 @@ void recalibrate_cpu_khz(void) if (!boot_cpu_has(X86_FEATURE_TSC)) return; - cpu_khz = x86_platform.calibrate_cpu(); + cpu_khz = native_calibrate_cpu(); if (!boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) - tsc_khz = x86_platform.calibrate_tsc(); + tsc_khz = native_calibrate_tsc(); if (tsc_khz == 0) tsc_khz = cpu_khz; else if (abs(cpu_khz - tsc_khz) * 10 > tsc_khz) @@ -1483,17 +1484,19 @@ static bool __init determine_cpu_tsc_frequencies(bool early, WARN_ON(cpu_khz || tsc_khz); if (early) { + /* + * Early CPU calibration can only use methods that are available + * early in boot (obviously). + */ if (known_cpu_khz) cpu_khz = known_cpu_khz; else - cpu_khz = x86_platform.calibrate_cpu(); + cpu_khz = native_calibrate_cpu_early(); if (known_tsc_khz) tsc_khz = known_tsc_khz; else - tsc_khz = x86_platform.calibrate_tsc(); + tsc_khz = native_calibrate_tsc(); } else { - /* We should not be here with non-native cpu calibration */ - WARN_ON(x86_platform.calibrate_cpu != native_calibrate_cpu); cpu_khz = pit_hpet_ptimer_calibrate_cpu(); } @@ -1590,13 +1593,6 @@ void __init tsc_init(void) return; } - /* - * native_calibrate_cpu_early can only calibrate using methods that are - * available early in boot. - */ - if (x86_platform.calibrate_cpu == native_calibrate_cpu_early) - x86_platform.calibrate_cpu = native_calibrate_cpu; - if (!tsc_khz) { /* We failed to determine frequencies earlier, try again */ if (!determine_cpu_tsc_frequencies(false, 0, 0)) { diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c index ebefb77c37bb..c674cbbd466d 100644 --- a/arch/x86/kernel/x86_init.c +++ b/arch/x86/kernel/x86_init.c @@ -144,8 +144,6 @@ static void enc_kexec_finish_noop(void) {} static bool is_private_mmio_noop(u64 addr) {return false; } struct x86_platform_ops x86_platform __ro_after_init = { - .calibrate_cpu = native_calibrate_cpu_early, - .calibrate_tsc = native_calibrate_tsc, .get_wallclock = mach_get_cmos_time, .set_wallclock = mach_set_cmos_time, .iommu_shutdown = iommu_shutdown_noop, -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:10 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:10 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322215.1588536 (Exim 4.92) (envelope-from ) id 1wSySU-0004nz-JF; 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AFNElJ8ET14sDqZeBC/64Uu9su+7AK/Q0WNBGuzTZel5Jrv+afV9pQCNq+i7AeXvsJ3lWnFee5fTTIohY6A=@lists.xenproject.org X-Gm-Message-State: AOJu0YyIsmrscWifbNzUCTpood8IV+UrpI1F0WfLG8JO/iA5JkXXuwQy ryPnnzjBrivYIeP0mZc6Dy+axRFMXryqUrRPI8stZ03DxiKV09OkEHCrUf1w5Y7TNbBVtV0DR/d /LsQQuw== X-Received: from plbv2.prod.google.com ([2002:a17:903:44c2:b0:2bf:2808:7225]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:144b:b0:2bc:dca9:f0ed with SMTP id d9443c01a7336-2bf20dbeeb3mr34014545ad.15.1780065905419; Fri, 29 May 2026 07:45:05 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:43:59 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-13-seanjc@google.com> Subject: [PATCH v4 12/47] x86/tsc: Rename pit_hpet_ptimer_calibrate_cpu() => native_calibrate_cpu_late() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1780065907-86F73D75-E51F5F0C/0/0 X-purgate-type: clean X-purgate-size: 1430 Rename the late CPU calibration routine so that its relationship to the early routine is more obvious and intuitive. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 5b4b6e43c94c..534462c81c78 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -779,7 +779,7 @@ static unsigned long cpu_khz_from_cpuid(void) * calibrate cpu using pit, hpet, and ptimer methods. They are available * later in boot after acpi is initialized. */ -static unsigned long pit_hpet_ptimer_calibrate_cpu(void) +static unsigned long native_calibrate_cpu_late(void) { u64 tsc1, tsc2, delta, ref1, ref2; unsigned long tsc_pit_min = ULONG_MAX, tsc_ref_min = ULONG_MAX; @@ -954,7 +954,7 @@ static unsigned long native_calibrate_cpu(void) unsigned long tsc_freq = native_calibrate_cpu_early(); if (!tsc_freq) - tsc_freq = pit_hpet_ptimer_calibrate_cpu(); + tsc_freq = native_calibrate_cpu_late(); return tsc_freq; } @@ -1497,7 +1497,7 @@ static bool __init determine_cpu_tsc_frequencies(bool early, else tsc_khz = native_calibrate_tsc(); } else { - cpu_khz = pit_hpet_ptimer_calibrate_cpu(); + cpu_khz = native_calibrate_cpu_late(); } /* -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:12 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:12 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322218.1588544 (Exim 4.92) (envelope-from ) id 1wSySW-00056Y-01; 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AFNElJ9KgYUDOg4UrGybCO3zC/UWa8vcJPw98/+oyMwKl1ru1+vH5gUjLED0OyTCtU94exiOFPSmCAT+NAA=@lists.xenproject.org X-Gm-Message-State: AOJu0YxTofmJvfwFMo6L0iF/Ee01StL0v0KM3c78EXcAE/dSNNr5htj2 4T1j/DvbAXKvDLFTwoQUUUbcK6k+WkVZZYMUJ29kGCDQuEtQrDGPyYQN+s2mxmMve3d9Mih7h1H RyH/ebw== X-Received: from plblk13.prod.google.com ([2002:a17:903:8cd:b0:2bf:1cdf:9e4b]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:f785:b0:2bf:b17:ae3c with SMTP id d9443c01a7336-2bf3684e2c2mr1144355ad.25.1780065906739; Fri, 29 May 2026 07:45:06 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:00 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-14-seanjc@google.com> Subject: [PATCH v4 13/47] x86/tsc: Fold native_calibrate_cpu() into recalibrate_cpu_khz() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1780065909-39D7B938-E97B3FC3/0/0 X-purgate-type: clean X-purgate-size: 1495 Fold the guts of native_calibrate_cpu() into its sole remaining caller, recalibrate_cpu_khz() to eliminate the extra SMP=n #ifdef, and so that it's more obvious that directly invoking the early vs. late calibration routines in determine_cpu_tsc_frequencies() is intentional. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 534462c81c78..3e911f0f7364 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -945,21 +945,6 @@ static unsigned long native_calibrate_cpu_early(void) return fast_calibrate; } -#ifndef CONFIG_SMP -/** - * native_calibrate_cpu - calibrate the cpu - */ -static unsigned long native_calibrate_cpu(void) -{ - unsigned long tsc_freq = native_calibrate_cpu_early(); - - if (!tsc_freq) - tsc_freq = native_calibrate_cpu_late(); - - return tsc_freq; -} -#endif - void recalibrate_cpu_khz(void) { #ifndef CONFIG_SMP @@ -968,7 +953,10 @@ void recalibrate_cpu_khz(void) if (!boot_cpu_has(X86_FEATURE_TSC)) return; - cpu_khz = native_calibrate_cpu(); + cpu_khz = native_calibrate_cpu_early(); + if (!cpu_khz) + cpu_khz = native_calibrate_cpu_late(); + if (!boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) tsc_khz = native_calibrate_tsc(); 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780065912-DB563443-69BEFA17/0/0 X-purgate-type: clean X-purgate-size: 3798 From: David Woodhouse Formally define and document CPUID 0x40000010 as providing TSC and local APIC bus frequency information for KVM's PV CPUID range. Way back in 2008, VMware proposed (https://lkml.org/lkml/2008/10/1/246) carving out a range of CPUID leaves for use by hypervisors. While the broader proposal from VMware was mostly shot down in flames, use of CPUID 0x40000010 to provide TSC and local APIC bus frequency information survived and made it's way into multiple guest operating systems. XNU unconditionally assumes CPUID 0x40000010 contains the frequency information, if it's present on any hypervisor: https://github.com/apple/darwin-xnu/blob/main/osfmk/i386/cpuid.c As does FreeBSD: https://github.com/freebsd/freebsd-src/commit/4a432614f68 More importantly, QEMU (the de facto "reference" VMM for KVM) has conditionally provided timing information in CPUID 0x40000010 for almost 9 years, since commit 9954a1582e ("x86-KVM: Supply TSC and APIC clock rates to guest like VMWare"). So at this point it would be daft for KVM (or any hypervisor) to expose 0x40000010 for any *other* content. Officially carve out and define the CPUID leaf so that Linux-as-a-guest can follow suit and pull TSC and Local APIC Bus frequency information from CPUID. Defer providing userspace with the necessary information needed to precisely and accurately enumerate the _actual_ configured TSC frequency to the guest (that exact information, along with the scaled ratio, isn't exposed to userspace). As evidenced by QEMU, providing CPUID 0x40000010 without help from KVM is entirely possible, just not ideal. Link: https://lore.kernel.org/all/ea0d7f43d910cee9600b254e303f468722fa355b.camel@infradead.org Signed-off-by: David Woodhouse [sean: drop KVM filling of CPUID, add documentation, massage changelog] Signed-off-by: Sean Christopherson --- Documentation/virt/kvm/x86/cpuid.rst | 12 ++++++++++++ arch/x86/include/uapi/asm/kvm_para.h | 11 +++++++++++ 2 files changed, 23 insertions(+) diff --git a/Documentation/virt/kvm/x86/cpuid.rst b/Documentation/virt/kvm/x86/cpuid.rst index bda3e3e737d7..f02e395cfa9b 100644 --- a/Documentation/virt/kvm/x86/cpuid.rst +++ b/Documentation/virt/kvm/x86/cpuid.rst @@ -122,3 +122,15 @@ KVM_HINTS_REALTIME 0 guest checks this feature bit to preempted for an unlimited time allowing optimizations ================== ============ ================================= + +function: KVM_CPUID_TIMING_INFO (0x40000010) + +returns:: + + eax = (Virtual) TSC frequency in kHz + ebx = (Virtual) Bus (local APIC timer) frequency in kHz + ecx = 0 (Reserved) + edx = 0 (Reserved) + +Note, KVM only defines the semantics of KVM_CPUID_TIMING_INFO; KVM does NOT +advertise support via KVM_GET_SUPPORTED_CPUID. \ No newline at end of file diff --git a/arch/x86/include/uapi/asm/kvm_para.h b/arch/x86/include/uapi/asm/kvm_para.h index a1efa7907a0b..c3a384711f3a 100644 --- a/arch/x86/include/uapi/asm/kvm_para.h +++ b/arch/x86/include/uapi/asm/kvm_para.h @@ -44,6 +44,17 @@ */ #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24 +/* + * The timing information leaf provides TSC and local APIC timer frequency + * information to the guest. Note, userspace is responsible for filling the + * leaf with the correct information. + * + * # EAX: (Virtual) TSC frequency in kHz. + * # EBX: (Virtual) Bus (local APIC timer) frequency in kHz. + * # ECX, EDX: Reserved (must be zero). + */ +#define KVM_CPUID_TIMING_INFO 0x40000010 + #define MSR_KVM_WALL_CLOCK 0x11 #define MSR_KVM_SYSTEM_TIME 0x12 -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:15 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:15 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322223.1588560 (Exim 4.92) (envelope-from ) id 1wSySZ-0005eb-2b; Fri, 29 May 2026 14:45:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322223.1588560; Fri, 29 May 2026 14:45:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySY-0005dU-Nw; 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Fri, 29 May 2026 07:45:08 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:01 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-15-seanjc@google.com> Subject: [PATCH v4 14/47] x86/kvmclock: Rename kvm_get_tsc_khz() to kvmclock_get_tsc_khz() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1780065912-39171938-6E0A3D6E/0/0 X-purgate-type: clean X-purgate-size: 1630 Rename kvm_get_tsc_khz() to kvmclock_get_tsc_khz() in anticipation of adding support for getting TSC info from PV CPUID, i.e. in a KVM specific way, but without non-kvmclock. No functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 69752b170e0a..c4a782a0c903 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -115,7 +115,7 @@ static inline void kvm_sched_clock_init(bool stable) * poll of guests can be running and trouble each other. So we preset * lpj here */ -static unsigned int __init kvm_get_tsc_khz(void) +static unsigned int __init kvmclock_get_tsc_khz(void) { return pvclock_tsc_khz(this_cpu_pvti()); } @@ -125,7 +125,7 @@ static void __init kvm_get_preset_lpj(void) unsigned long khz; u64 lpj; - khz = kvm_get_tsc_khz(); + khz = kvmclock_get_tsc_khz(); lpj = ((u64)khz * 1000); do_div(lpj, HZ); @@ -320,8 +320,8 @@ void __init kvmclock_init(void) flags = pvclock_read_flags(&hv_clock_boot[0].pvti); kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); - x86_init.hyper.get_tsc_khz = kvm_get_tsc_khz; - x86_init.hyper.get_cpu_khz = kvm_get_tsc_khz; + x86_init.hyper.get_tsc_khz = kvmclock_get_tsc_khz; + x86_init.hyper.get_cpu_khz = kvmclock_get_tsc_khz; x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; #ifdef CONFIG_X86_LOCAL_APIC -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322224.1588569 (Exim 4.92) (envelope-from ) id 1wSySb-00066j-8R; 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AFNElJ/+J4jOKlEdqOxguT1vb8EwZR/w9vxEfVX7kkF1QfbQ4uzqk0fTJe7fZAYxFWX3JNPIEVC+OEydpiQ=@lists.xenproject.org X-Gm-Message-State: AOJu0YzJb/iITz30DDfTrD0+YUEpz87rVPNacfdX6EAD+xab46UhhT8H g6qjExmSe7le4GZkuS9OreowNKJLNaxOlK6UxNXK7kmZTG7CaG6PcOMmwwZPduoPiMNsbuacEbM M9h4DlQ== X-Received: from plbjh24.prod.google.com ([2002:a17:903:3298:b0:2bf:14c9:866d]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:d4c2:b0:2bf:2589:7bc2 with SMTP id d9443c01a7336-2bf367d3ab7mr1162735ad.15.1780065910985; Fri, 29 May 2026 07:45:10 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:03 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-17-seanjc@google.com> Subject: [PATCH v4 16/47] x86/kvm: Obtain TSC frequency from PV CPUID if present From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1780065913-E119B443-5351C6B5/0/0 X-purgate-type: clean X-purgate-size: 5045 From: David Woodhouse In https://lkml.org/lkml/2008/10/1/246 a proposal was made for generic CPUID conventions across hypervisors. It was mostly shot down in flames, but the leaf at 0x40000010 containing timing information didn't die. It's used by XNU and FreeBSD guests under all hypervisors=C2=B9=C2=B2 to de= termine the TSC frequency, and also exposed by the EC2 Nitro hypervisor (as well as, presumably, VMware). FreeBSD's Bhyve is probably just about to start exposing it too. Use it under KVM to obtain the TSC frequency more accurately, instead of reverse-calculating the frequency from the mul/shift values in the KVM clock. Use the information to get the CPU frequency as well (kvmclock feeds in kvm_get_tsc_khz() for both TSC and CPU calibration), as the info from CPUID is superior in every way; whether or not kvmclock should be overriding CPU calibration in the first place is an entirely different question. Use the info from CPUID even if the user explicitly disables kvmclock, or if it's unsupported. The PV CPUID leaf has no dependency on kvmclock, and is in fact more useful if kvmclock is disabled since the kernel won't be able to use kvmclock to derive a derive the TSC frequency. Before: [ 0.000020] tsc: Detected 2900.014 MHz processor After: [ 0.000020] tsc: Detected 2900.015 MHz processor $ cpuid -1 -l 0x40000010 CPU: hypervisor generic timing information (0x40000010): TSC frequency (Hz) =3D 2900015 bus frequency (Hz) =3D 1000000 Note! *Independently* query for non-null get_{cpu,tsc}_khz() overrides so that kvmclock doesn't clobber x86_init.hyper.get_cpu_khz() if/when KVM adds support for getting the CPU frequency separately from the TSC frequency. =C2=B9 https://github.com/apple/darwin-xnu/blob/main/osfmk/i386/cpuid.c =C2=B2 https://github.com/freebsd/freebsd-src/commit/4a432614f68 Signed-off-by: David Woodhouse Co-developed-by: Sean Christopherson Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvm.c | 33 +++++++++++++++++++++++++++++++++ arch/x86/kernel/kvmclock.c | 6 ++++-- 2 files changed, 37 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index dcef84da304b..909d3e5e5bcd 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -49,6 +49,8 @@ #include #include =20 +static unsigned int kvm_tsc_khz_cpuid __initdata; + DEFINE_STATIC_KEY_FALSE_RO(kvm_async_pf_enabled); =20 static int kvmapf =3D 1; @@ -911,6 +913,21 @@ bool kvm_para_available(void) } EXPORT_SYMBOL_GPL(kvm_para_available); =20 +static u32 __init kvm_cpuid_timing_info_leaf(void) +{ + u32 base =3D kvm_cpuid_base(); + + if (!base || cpuid_eax(base) < (base | KVM_CPUID_TIMING_INFO)) + return 0; + + return base | KVM_CPUID_TIMING_INFO; +} + +static unsigned int __init kvm_get_tsc_khz(void) +{ + return kvm_tsc_khz_cpuid; +} + unsigned int kvm_arch_para_features(void) { return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES); @@ -960,6 +977,7 @@ static void __init kvm_init_platform(void) .mask_lo =3D (u32)(~(SZ_4G - tolud - 1)) | MTRR_PHYSMASK_V, .mask_hi =3D (BIT_ULL(boot_cpu_data.x86_phys_bits) - 1) >> 32, }; + u32 timing_info_leaf; =20 if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) && kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL)) { @@ -1007,6 +1025,21 @@ static void __init kvm_init_platform(void) wrmsrq(MSR_KVM_MIGRATION_CONTROL, KVM_MIGRATION_READY); } + + /* + * If KVM advertises the frequency directly in CPUID, use that instead + * of reverse-calculating it from the KVM clock data, or worse, trying + * to calibratate the TSC using an emulated device. + */ + timing_info_leaf =3D kvm_cpuid_timing_info_leaf(); + if (timing_info_leaf) { + kvm_tsc_khz_cpuid =3D cpuid_eax(timing_info_leaf); + if (kvm_tsc_khz_cpuid) { + x86_init.hyper.get_tsc_khz =3D kvm_get_tsc_khz; + x86_init.hyper.get_cpu_khz =3D kvm_get_tsc_khz; + } + } + kvmclock_init(); x86_platform.apic_post_init =3D kvm_apic_init; =20 diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index c4a782a0c903..404f60741aa8 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -320,8 +320,10 @@ void __init kvmclock_init(void) flags =3D pvclock_read_flags(&hv_clock_boot[0].pvti); kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); =20 - x86_init.hyper.get_tsc_khz =3D kvmclock_get_tsc_khz; - x86_init.hyper.get_cpu_khz =3D kvmclock_get_tsc_khz; + if (!x86_init.hyper.get_tsc_khz) + x86_init.hyper.get_tsc_khz =3D kvmclock_get_tsc_khz; + if (!x86_init.hyper.get_cpu_khz) + x86_init.hyper.get_cpu_khz =3D kvmclock_get_tsc_khz; x86_platform.get_wallclock =3D kvm_get_wallclock; x86_platform.set_wallclock =3D kvm_set_wallclock; #ifdef CONFIG_X86_LOCAL_APIC --=20 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:18 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:18 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322226.1588576 (Exim 4.92) (envelope-from ) id 1wSySc-0006EA-CT; Fri, 29 May 2026 14:45:18 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322226.1588576; Fri, 29 May 2026 14:45:18 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySb-0006B1-Ec; Fri, 29 May 2026 14:45:17 +0000 Received: by outflank-mailman (input) for mailman id 1322226; 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Fri, 29 May 2026 07:45:12 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:04 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-18-seanjc@google.com> Subject: [PATCH v4 17/47] x86/kvm: Mark TSC as reliable when it's constant and nonstop From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780065914-13F7EF3B-2BDF8279/0/0 X-purgate-type: clean X-purgate-size: 4118 Mark the TSC as reliable if the hypervisor (KVM) has enumerated the TSC as constant and nonstop, and the admin hasn't explicitly marked the TSC as unstable. Like most (all?) virtualization setups, any secondary clocksource that's used as a watchdog is guaranteed to be less reliable than a constant, nonstop TSC, as all clocksources the kernel uses as a watchdog are all but guaranteed to be emulated when running as a KVM guest. I.e. any observed discrepancies between the TSC and watchdog will be due to jitter in the watchdog. This is especially true for KVM, as the watchdog clocksource is usually emulated in host userspace, i.e. reading the clock incurs a roundtrip cost of thousands of cycles. Marking the TSC reliable addresses a flaw where the TSC will occasionally be marked unstable if the host is under moderate/heavy load. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 2 +- arch/x86/kernel/kvm.c | 16 +++++++++++++++- arch/x86/kernel/kvmclock.c | 15 +++++---------- 3 files changed, 21 insertions(+), 12 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 4a47c16e2df8..4a49fc286b4c 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -118,7 +118,7 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, } #ifdef CONFIG_KVM_GUEST -void kvmclock_init(void); +void kvmclock_init(bool prefer_tsc); void kvmclock_disable(void); bool kvm_para_available(void); unsigned int kvm_arch_para_features(void); diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 909d3e5e5bcd..4fe9c69bf40b 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -978,6 +978,7 @@ static void __init kvm_init_platform(void) .mask_hi = (BIT_ULL(boot_cpu_data.x86_phys_bits) - 1) >> 32, }; u32 timing_info_leaf; + bool tsc_is_reliable; if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) && kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL)) { @@ -1040,7 +1041,20 @@ static void __init kvm_init_platform(void) } } - kvmclock_init(); + /* + * If the TSC counts at a constant frequency across P/T states, counts + * in deep C-states, and the TSC hasn't been marked unstable, treat the + * TSC reliable, as guaranteed by KVM. Note, the TSC unstable check + * exists purely to honor the TSC being marked unstable via command + * line, any runtime detection of an unstable will happen after this. + */ + tsc_is_reliable = boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && + boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && + !check_tsc_unstable(); + if (tsc_is_reliable) + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); + + kvmclock_init(tsc_is_reliable); x86_platform.apic_post_init = kvm_apic_init; /* diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 404f60741aa8..69a15fbfb779 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -285,7 +285,7 @@ static int kvmclock_setup_percpu(unsigned int cpu) return p ? 0 : -ENOMEM; } -void __init kvmclock_init(void) +void __init kvmclock_init(bool prefer_tsc) { u8 flags; @@ -334,16 +334,11 @@ void __init kvmclock_init(void) kvm_get_preset_lpj(); /* - * X86_FEATURE_NONSTOP_TSC is TSC runs at constant rate - * with P/T states and does not stop in deep C-states. - * - * Invariant TSC exposed by host means kvmclock is not necessary: - * can use TSC as clocksource. - * + * If TSC is preferred over kvmlock, drop kvmclock's rating so that TSC + * is chosen as the clocksource (but still register kvmclock in case + * the kernel doesn't want to use TSC for whatever reason). */ - if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && - boot_cpu_has(X86_FEATURE_NONSTOP_TSC) && - !check_tsc_unstable()) + if (prefer_tsc) kvm_clock.rating = 299; clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:20 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:20 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322229.1588580 (Exim 4.92) (envelope-from ) id 1wSySd-0006Mf-FI; Fri, 29 May 2026 14:45:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322229.1588580; Fri, 29 May 2026 14:45:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSySc-0006KH-Bz; Fri, 29 May 2026 14:45:18 +0000 Received: by outflank-mailman (input) for mailman id 1322229; Fri, 29 May 2026 14:45:16 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3eaYZagYKCYQ0mivrkowwotm.kwu5mv-lm3mttq010.5mvxzwrmk1.wzo@flex--seanjc.bounces.google.com>) id 1wSySa-0005w6-Cl for xen-devel@lists.xenproject.org; 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dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1780065914; x=1780670714; darn=lists.xenproject.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=Xkng2ObvqyeOAHFFD1k5jEREhKyPX3M1bjFdIhQCaZo=; b=qic0ds+ABjOhxQ8AmQ1a1xsAkCGXYWAJbRinH9cA1C3NYqSyPpm9bMctjoMYHYjvnr JTUHa+x5YybqlX4zfDYFOkyAr9pD90FJRhN6Sjx8x6Yvtye5b7mk1vAHHZ+Z2dm7TpRI FvM4qDyu6vR1kzvbWAdD7EMU5lrHW5adNpTbQj7oX51Ku3rS3W2UOpuvuQNuBqNQVb1Z +ENYIawDUNk9Ti4AsKVaMD/XyY6Tl9zqfNfKKco/1ZVYpeII4FigMwjgH1212K/W//IN CUUbzpYiiuWfqavVtfKE51/nJDfZdizgie3q6EAf+XSiIPqb+8ovMnFqcrmD7TcQW0a3 qmyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780065914; x=1780670714; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780065915-18F66F3B-F6E943BF/0/0 X-purgate-type: clean X-purgate-size: 1416 When running as a KVM guest with PV timing info provided by the host, stuff the APIC timer period/frequency with the local APIC bus frequency reported in CPUID.0x40000010.EBX instead of trying to calibrate/guess the frequency. Note, the unit of measurement for lapic_timer_period is "ticks per HZ", not Khz. See Documentation/virt/kvm/x86/cpuid.rst for details. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index 4fe9c69bf40b..c1139182121d 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -977,6 +977,7 @@ static void __init kvm_init_platform(void) .mask_lo = (u32)(~(SZ_4G - tolud - 1)) | MTRR_PHYSMASK_V, .mask_hi = (BIT_ULL(boot_cpu_data.x86_phys_bits) - 1) >> 32, }; + u32 apic_khz __maybe_unused; u32 timing_info_leaf; bool tsc_is_reliable; @@ -1039,6 +1040,13 @@ static void __init kvm_init_platform(void) x86_init.hyper.get_tsc_khz = kvm_get_tsc_khz; x86_init.hyper.get_cpu_khz = kvm_get_tsc_khz; } + +#ifdef CONFIG_X86_LOCAL_APIC + /* The leaf also includes the local APIC bus/timer frequency.*/ + apic_khz = cpuid_ebx(timing_info_leaf); + if (apic_khz) + lapic_timer_period = apic_khz * 1000 / HZ; +#endif } /* -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:45:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:45:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322231.1588589 (Exim 4.92) (envelope-from ) id 1wSySg-000729-LL; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780065916-0A16DC48-AF566691/0/0 X-purgate-type: clean X-purgate-size: 2830 Extract the guts of cpu_khz_from_cpuid() to a standalone helper that doesn't restrict the usage to Intel CPUs. This will allow sharing the core logic with KVM-as-a-guest, as KVM generally doesn't restrict CPUID based on vendor. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/tsc.h | 1 + arch/x86/kernel/tsc.c | 32 +++++++++++++++----------------- 2 files changed, 16 insertions(+), 17 deletions(-) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 4a224f99c3b9..7ff2bfdcdf38 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -90,6 +90,7 @@ struct cpuid_tsc_info { unsigned int tsc_khz; }; extern int __init cpuid_get_tsc_freq(struct cpuid_tsc_info *info); +extern unsigned int __cpu_khz_from_cpuid(void); extern void tsc_early_init(void); extern void tsc_init(void); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 3e911f0f7364..bdff8c988866 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -692,6 +692,18 @@ int __init cpuid_get_tsc_freq(struct cpuid_tsc_info *info) return 0; } +unsigned int __cpu_khz_from_cpuid(void) +{ + unsigned int eax_base_mhz, ebx, ecx, edx; + + if (boot_cpu_data.cpuid_level < CPUID_LEAF_FREQ) + return 0; + + cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); + + return eax_base_mhz * 1000; +} + /** * native_calibrate_tsc - determine TSC frequency * Determine TSC frequency via CPUID, else return 0. @@ -727,13 +739,8 @@ static unsigned long native_calibrate_tsc(void) * clock, but we can easily calculate it to a high degree of accuracy * by considering the crystal ratio and the CPU speed. */ - if (!info.crystal_khz && boot_cpu_data.cpuid_level >= CPUID_LEAF_FREQ) { - unsigned int eax_base_mhz, ebx, ecx, edx; - - cpuid(CPUID_LEAF_FREQ, &eax_base_mhz, &ebx, &ecx, &edx); - info.crystal_khz = eax_base_mhz * 1000 * - info.denominator / info.numerator; - } + if (!info.crystal_khz) + info.crystal_khz = __cpu_khz_from_cpuid() * info.denominator / info.numerator; if (!info.crystal_khz) return 0; @@ -760,19 +767,10 @@ static unsigned long native_calibrate_tsc(void) static unsigned long cpu_khz_from_cpuid(void) { - unsigned int eax_base_mhz, ebx_max_mhz, ecx_bus_mhz, edx; - if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) return 0; 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Fri, 29 May 2026 07:45:15 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:07 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-21-seanjc@google.com> Subject: [PATCH v4 20/47] x86/kvm: Get CPU base frequency from CPUID when it's available From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1780065918-7DF838B7-0B67A9FC/0/0 X-purgate-type: clean X-purgate-size: 1789 If CPUID.0x16 is present and valid, use the CPU frequency provided by CPUID instead of assuming that the virtual CPU runs at the same frequency as TSC and/or kvmclock. Back before constant TSCs were a thing, treating the TSC and CPU frequencies as one and the same was somewhat reasonable, but now it's nonsensical, especially if the hypervisor explicitly enumerates the CPU frequency. Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvm.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index c1139182121d..c81a24d0efdf 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -50,6 +50,7 @@ #include static unsigned int kvm_tsc_khz_cpuid __initdata; +static unsigned int kvm_cpu_khz_cpuid __initdata; DEFINE_STATIC_KEY_FALSE_RO(kvm_async_pf_enabled); @@ -928,6 +929,11 @@ static unsigned int __init kvm_get_tsc_khz(void) return kvm_tsc_khz_cpuid; } +static unsigned int __init kvm_get_cpu_khz(void) +{ + return kvm_cpu_khz_cpuid; +} + unsigned int kvm_arch_para_features(void) { return cpuid_eax(kvm_cpuid_base() | KVM_CPUID_FEATURES); @@ -1049,6 +1055,14 @@ static void __init kvm_init_platform(void) #endif } + /* + * Prefer CPUID.0x16 over KVM's PV CPUID when possible, as the base CPU + * frequency isn't necessarily the same as the TSC frequency. + */ + kvm_cpu_khz_cpuid = __cpu_khz_from_cpuid(); + if (kvm_cpu_khz_cpuid) + x86_init.hyper.get_cpu_khz = kvm_get_cpu_khz; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1780065919-83563161-8B56DD70/0/0 X-purgate-type: clean X-purgate-size: 1314 From: David Woodhouse The Xen CPUID leaf 3, sub-leaf 0, ECX provides the guest TSC frequency in kHz directly. Use it when available instead of reverse-calculating the frequency from the pvclock tsc_to_system_mul and tsc_shift values, which loses precision. This mirrors the equivalent change for KVM guests using the generic 0x40000010 timing leaf. Signed-off-by: David Woodhouse [sean: drop non-Xen changes] Signed-off-by: Sean Christopherson --- arch/x86/xen/time.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 487ad838c441..36d66abf5379 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -42,6 +42,17 @@ static unsigned int __init xen_tsc_khz(void) { struct pvclock_vcpu_time_info *info = &HYPERVISOR_shared_info->vcpu_info[0].time; + u32 base = xen_cpuid_base(); + u32 eax, ebx, ecx, edx; + + /* + * If Xen provides the guest TSC frequency directly in CPUID + * (leaf 3, sub-leaf 0, ECX), use that instead of reverse- + * calculating from the pvclock mul/shift. + */ + cpuid_count(base + 3, 0, &eax, &ebx, &ecx, &edx); + if (ecx) + return ecx; return pvclock_tsc_khz(info); } -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:47:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:47:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322343.1588627 (Exim 4.92) (envelope-from ) id 1wSyUe-0004Pi-7k; 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AFNElJ9BF5FZSVq2ij3YtTaDqMe/Po9qwI2YElsJuAY5gXV2rhjTwUEcgL7nIrBxbrG1gWCzkGVt62d8Xz0=@lists.xenproject.org X-Gm-Message-State: AOJu0YwIv/kOvl4eWZvhINSo3LG3Gm5luYAmxyUWakwMVKfB5h4E9C0G HmwWuXwNuNORwjYVOTrs2eNF326WDOGvsztYkhG1I4wjfA3Jg22X97+wcMK3umjkMAsG9dxw4JS WJDvt3g== X-Received: from pgc4.prod.google.com ([2002:a05:6a02:2f84:b0:c82:7761:9936]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a21:6b87:b0:3b3:d4a:793b with SMTP id adf61e73a8af0-3b411e5b284mr4253221637.43.1780065919253; Fri, 29 May 2026 07:45:19 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:10 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-24-seanjc@google.com> Subject: [PATCH v4 23/47] clocksource: hyper-v: Drop wrappers to sched_clock save/restore helpers From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780065921-DAB68443-EAD1C9F6/13/0 X-purgate-type: clean X-purgate-size: 3432 Now that all of the Hyper-V reference counter sched_clock code is located in a single file, drop the superfluous wrappers for the save/restore flows. No functional change intended. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Acked-by: Wei Liu Signed-off-by: Sean Christopherson --- drivers/clocksource/hyperv_timer.c | 34 +++++------------------------- include/clocksource/hyperv_timer.h | 2 -- 2 files changed, 5 insertions(+), 31 deletions(-) diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index 72b966340a46..69c1c7264e5d 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -472,17 +472,6 @@ static void resume_hv_clock_tsc(struct clocksource *arg) hv_set_msr(HV_MSR_REFERENCE_TSC, tsc_msr.as_uint64); } -/* - * Called during resume from hibernation, from overridden - * x86_platform.restore_sched_clock_state routine. This is to adjust offsets - * used to calculate time for hv tsc page based sched_clock, to account for - * time spent before hibernation. - */ -void hv_adj_sched_clock_offset(u64 offset) -{ - hv_sched_clock_offset -= offset; -} - #ifdef HAVE_VDSO_CLOCKMODE_HVCLOCK static int hv_cs_enable(struct clocksource *cs) { @@ -548,12 +537,14 @@ static void (*old_restore_sched_clock_state)(void); * based clocksource, proceeds from where it left off during suspend and * it shows correct time for the timestamps of kernel messages after resume. */ -static void save_hv_clock_tsc_state(void) +static void hv_save_sched_clock_state(void) { + old_save_sched_clock_state(); + hv_ref_counter_at_suspend = hv_read_reference_counter(); } -static void restore_hv_clock_tsc_state(void) +static void hv_restore_sched_clock_state(void) { /* * Adjust the offsets used by hv tsc clocksource to @@ -561,23 +552,8 @@ static void restore_hv_clock_tsc_state(void) * adjusted value = reference counter (time) at suspend * - reference counter (time) now. */ - hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); -} -/* - * Functions to override save_sched_clock_state and restore_sched_clock_state - * functions of x86_platform. The Hyper-V clock counter is reset during - * suspend-resume and the offset used to measure time needs to be - * corrected, post resume. - */ -static void hv_save_sched_clock_state(void) -{ - old_save_sched_clock_state(); - save_hv_clock_tsc_state(); -} + hv_sched_clock_offset -= (hv_ref_counter_at_suspend - hv_read_reference_counter()); -static void hv_restore_sched_clock_state(void) -{ - restore_hv_clock_tsc_state(); old_restore_sched_clock_state(); } diff --git a/include/clocksource/hyperv_timer.h b/include/clocksource/hyperv_timer.h index d48dd4176fd3..a4c81a60f53d 100644 --- a/include/clocksource/hyperv_timer.h +++ b/include/clocksource/hyperv_timer.h @@ -38,8 +38,6 @@ extern void hv_remap_tsc_clocksource(void); extern unsigned long hv_get_tsc_pfn(void); extern struct ms_hyperv_tsc_page *hv_get_tsc_page(void); -extern void hv_adj_sched_clock_offset(u64 offset); - static __always_inline bool hv_read_tsc_page_tsc(const struct ms_hyperv_tsc_page *tsc_pg, u64 *cur_tsc, u64 *time) -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:51:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:51:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322378.1588636 (Exim 4.92) (envelope-from ) id 1wSyYU-0007Xs-QL; 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AFNElJ/Vbw/mhoUsyoBKXHm4uBaOuuPOBipXuFE2EVcS7fMqBLigzEmSz1JgNdWHjeLr1Ej3WV6zFqwAzUw=@lists.xenproject.org X-Gm-Message-State: AOJu0Yx74TuzVCyM7u5qt25LlddS7bP9tYYEBE2Y+hhgKciOzQDTfnOw tUwwFb0uIOL4rskQ915n4HVPAT3+5sR6ZH3DZULp33Uwn+d3aN9UzokbrtLHWwILq57aK6vw6QQ rOjYEwQ== X-Received: from plgy12.prod.google.com ([2002:a17:903:22cc:b0:2bf:21c9:7d27]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:1c6:b0:2bf:3309:ecce with SMTP id d9443c01a7336-2bf3686593amr1360175ad.28.1780065918022; Fri, 29 May 2026 07:45:18 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:09 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-23-seanjc@google.com> Subject: [PATCH v4 22/47] clocksource: hyper-v: Register sched_clock save/restore iff it's necessary From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780065920-23F7EC48-B8A70931/0/0 X-purgate-type: clean X-purgate-size: 6603 Register the Hyper-V reference counter (refcounter) callbacks for saving and restoring its PV sched_clock, if and only if the refcounter is actually being used for sched_clock. Currently, Hyper-V overrides the save/restore hooks if the reference TSC available, whereas the Hyper-V refcounter code only overrides sched_clock if the reference TSC is available *and* it's not invariant. The flaw is effectively papered over by invoking the "old" save/restore callbacks as part of save/restore, but that's unnecessary and fragile. To avoid introducing more complexity, and to allow for additional cleanups of the PV sched_clock code, move the save/restore hooks and logic into hyperv_timer.c and simply wire up the hooks when overriding sched_clock itself. Note, while the Hyper-V refcounter code is intended to be architecture neutral, CONFIG_PARAVIRT is firmly x86-only, i.e. adding a small amount of x86 specific code (which will be reduced in future cleanups) doesn't meaningfully pollute generic code. Reviewed-by: Michael Kelley Tested-by: Michael Kelley Acked-by: Wei Liu Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/mshyperv.c | 58 ------------------------------ drivers/clocksource/hyperv_timer.c | 50 ++++++++++++++++++++++++++ 2 files changed, 50 insertions(+), 58 deletions(-) diff --git a/arch/x86/kernel/cpu/mshyperv.c b/arch/x86/kernel/cpu/mshyperv.c index f8653fc05a40..2403231fd4b0 100644 --- a/arch/x86/kernel/cpu/mshyperv.c +++ b/arch/x86/kernel/cpu/mshyperv.c @@ -275,63 +275,6 @@ static void hv_guest_crash_shutdown(struct pt_regs *regs) } #endif /* CONFIG_CRASH_DUMP */ -static u64 hv_ref_counter_at_suspend; -static void (*old_save_sched_clock_state)(void); -static void (*old_restore_sched_clock_state)(void); - -/* - * Hyper-V clock counter resets during hibernation. Save and restore clock - * offset during suspend/resume, while also considering the time passed - * before suspend. This is to make sure that sched_clock using hv tsc page - * based clocksource, proceeds from where it left off during suspend and - * it shows correct time for the timestamps of kernel messages after resume. - */ -static void save_hv_clock_tsc_state(void) -{ - hv_ref_counter_at_suspend = hv_read_reference_counter(); -} - -static void restore_hv_clock_tsc_state(void) -{ - /* - * Adjust the offsets used by hv tsc clocksource to - * account for the time spent before hibernation. - * adjusted value = reference counter (time) at suspend - * - reference counter (time) now. - */ - hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); -} - -/* - * Functions to override save_sched_clock_state and restore_sched_clock_state - * functions of x86_platform. The Hyper-V clock counter is reset during - * suspend-resume and the offset used to measure time needs to be - * corrected, post resume. - */ -static void hv_save_sched_clock_state(void) -{ - old_save_sched_clock_state(); - save_hv_clock_tsc_state(); -} - -static void hv_restore_sched_clock_state(void) -{ - restore_hv_clock_tsc_state(); - old_restore_sched_clock_state(); -} - -static void __init x86_setup_ops_for_tsc_pg_clock(void) -{ - if (!(ms_hyperv.features & HV_MSR_REFERENCE_TSC_AVAILABLE)) - return; - - old_save_sched_clock_state = x86_platform.save_sched_clock_state; - x86_platform.save_sched_clock_state = hv_save_sched_clock_state; - - old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; - x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; -} - #ifdef CONFIG_X86_64 DEFINE_STATIC_CALL(hv_hypercall, hv_std_hypercall); EXPORT_STATIC_CALL_TRAMP_GPL(hv_hypercall); @@ -739,7 +682,6 @@ static void __init ms_hyperv_init_platform(void) /* Register Hyper-V specific clocksource */ hv_init_clocksource(); - x86_setup_ops_for_tsc_pg_clock(); hv_vtl_init_platform(); #endif /* diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index e9f5034a1bc8..72b966340a46 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -537,10 +537,60 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) #elif defined CONFIG_PARAVIRT #include +static u64 hv_ref_counter_at_suspend; +static void (*old_save_sched_clock_state)(void); +static void (*old_restore_sched_clock_state)(void); + +/* + * Hyper-V clock counter resets during hibernation. Save and restore clock + * offset during suspend/resume, while also considering the time passed + * before suspend. This is to make sure that sched_clock using hv tsc page + * based clocksource, proceeds from where it left off during suspend and + * it shows correct time for the timestamps of kernel messages after resume. + */ +static void save_hv_clock_tsc_state(void) +{ + hv_ref_counter_at_suspend = hv_read_reference_counter(); +} + +static void restore_hv_clock_tsc_state(void) +{ + /* + * Adjust the offsets used by hv tsc clocksource to + * account for the time spent before hibernation. + * adjusted value = reference counter (time) at suspend + * - reference counter (time) now. + */ + hv_adj_sched_clock_offset(hv_ref_counter_at_suspend - hv_read_reference_counter()); +} +/* + * Functions to override save_sched_clock_state and restore_sched_clock_state + * functions of x86_platform. The Hyper-V clock counter is reset during + * suspend-resume and the offset used to measure time needs to be + * corrected, post resume. + */ +static void hv_save_sched_clock_state(void) +{ + old_save_sched_clock_state(); + save_hv_clock_tsc_state(); +} + +static void hv_restore_sched_clock_state(void) +{ + restore_hv_clock_tsc_state(); + old_restore_sched_clock_state(); +} + static __always_inline void hv_setup_sched_clock(void *sched_clock) { /* We're on x86/x64 *and* using PV ops */ paravirt_set_sched_clock(sched_clock); + + old_save_sched_clock_state = x86_platform.save_sched_clock_state; + x86_platform.save_sched_clock_state = hv_save_sched_clock_state; + + old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; + x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; } #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ static __always_inline void hv_setup_sched_clock(void *sched_clock) {} -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:51:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:51:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322379.1588645 (Exim 4.92) (envelope-from ) id 1wSyYY-0007lW-1F; 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AFNElJ/bAN5WvqlPz8Wk4i342cJj2nwZj+tmL0Arc/yPCL1GrTE4K6mw0BGolo9sU9wwq/Gm8lwPvMp7qsw=@lists.xenproject.org X-Gm-Message-State: AOJu0YwmusB3eFh+wS9lp3BoxF6OorXUMSbZ/PjwiIgrpf153wiDTxJM AmMzn+yT8Ugdj+z9+oSUPfSSRsroMe09wLIwLyNiGvBRoRhNB7LIviqXCHRCQKFtBUExvvDCcgX FLo7CbA== X-Received: from plblc15.prod.google.com ([2002:a17:902:fa8f:b0:2bf:238f:8196]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:2448:b0:2b2:4fc1:f653 with SMTP id d9443c01a7336-2bf20d4466cmr29629345ad.3.1780065920784; Fri, 29 May 2026 07:45:20 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:11 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-25-seanjc@google.com> Subject: [PATCH v4 24/47] clocksource: hyper-v: Don't save/restore TSC offset when using HV sched_clock From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780065923-08F66C48-1232BD87/0/0 X-purgate-type: clean X-purgate-size: 2763 Now that Hyper-V overrides the sched_clock save/restore hooks if and only sched_clock itself is set to the Hyper-V reference counter, drop the invocation of the "old" save/restore callbacks. When the registration of the PV sched_clock was done separately from overriding the save/restore hooks, it was possible for Hyper-V to clobber the TSC save/restore callbacks without actually switching to the Hyper-V refcounter. Enabling a PV sched_clock is a one-way street, i.e. the kernel will never revert to using TSC for sched_clock, and so there is no need to invoke the TSC save/restore hooks (and if there was, it belongs in common PV code). Reviewed-by: Michael Kelley Tested-by: Michael Kelley Reviewed-by: David Woodhouse Acked-by: Wei Liu Signed-off-by: Sean Christopherson --- drivers/clocksource/hyperv_timer.c | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index 69c1c7264e5d..ac1d9f9c381c 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -527,9 +527,6 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) #include static u64 hv_ref_counter_at_suspend; -static void (*old_save_sched_clock_state)(void); -static void (*old_restore_sched_clock_state)(void); - /* * Hyper-V clock counter resets during hibernation. Save and restore clock * offset during suspend/resume, while also considering the time passed @@ -539,8 +536,6 @@ static void (*old_restore_sched_clock_state)(void); */ static void hv_save_sched_clock_state(void) { - old_save_sched_clock_state(); - hv_ref_counter_at_suspend = hv_read_reference_counter(); } @@ -553,8 +548,6 @@ static void hv_restore_sched_clock_state(void) * - reference counter (time) now. */ hv_sched_clock_offset -= (hv_ref_counter_at_suspend - hv_read_reference_counter()); - - old_restore_sched_clock_state(); } static __always_inline void hv_setup_sched_clock(void *sched_clock) @@ -562,10 +555,7 @@ static __always_inline void hv_setup_sched_clock(void *sched_clock) /* We're on x86/x64 *and* using PV ops */ paravirt_set_sched_clock(sched_clock); - old_save_sched_clock_state = x86_platform.save_sched_clock_state; x86_platform.save_sched_clock_state = hv_save_sched_clock_state; - - old_restore_sched_clock_state = x86_platform.restore_sched_clock_state; x86_platform.restore_sched_clock_state = hv_restore_sched_clock_state; } #else /* !CONFIG_GENERIC_SCHED_CLOCK && !CONFIG_PARAVIRT */ -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:51:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:51:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322380.1588655 (Exim 4.92) (envelope-from ) id 1wSyYa-000809-8v; Fri, 29 May 2026 14:51:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322380.1588655; Fri, 29 May 2026 14:51:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyYa-0007zx-4b; Fri, 29 May 2026 14:51:28 +0000 Received: by outflank-mailman (input) for mailman id 1322380; Fri, 29 May 2026 14:51:26 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3gaYZagYKCYw8uq3zsw44w1u.s42Du3-tuBu11y898.Du3574zus9.47w@flex--seanjc.bounces.google.com>) id 1wSyYY-0007tP-Lm for xen-devel@lists.xenproject.org; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c1860d/1780065925-C5784DB1-194D7679/0/0 X-purgate-type: clean X-purgate-size: 1438 Gate kvmclock's secondary CPU code on CONFIG_SMP, not CONFIG_X86_LOCAL_APIC. Originally, kvmclock piggybacked PV APIC ops to setup secondary CPUs. When that wart was fixed by commit df156f90a0f9 ("x86: Introduce x86_cpuinit.early_percpu_clock_init hook"), the dependency on a local APIC got carried forward unnecessarily. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 69a15fbfb779..13c728444e12 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -186,7 +186,7 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } -#ifdef CONFIG_X86_LOCAL_APIC +#ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { kvm_register_clock("secondary cpu clock"); @@ -326,7 +326,7 @@ void __init kvmclock_init(bool prefer_tsc) x86_init.hyper.get_cpu_khz = kvmclock_get_tsc_khz; x86_platform.get_wallclock = kvm_get_wallclock; x86_platform.set_wallclock = kvm_set_wallclock; -#ifdef CONFIG_X86_LOCAL_APIC +#ifdef CONFIG_SMP x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; #endif x86_platform.save_sched_clock_state = kvm_save_sched_clock_state; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:51:28 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:51:28 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322381.1588657 (Exim 4.92) (envelope-from ) id 1wSyYa-00083T-HG; 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AFNElJ/2JpaZssvBRDIIrhzw2wyOpuwxtXRMUZXa1ndL2WjO/R/uhO3sfbq1X9UmJiazn5JRbPD+LVZ6YWw=@lists.xenproject.org X-Gm-Message-State: AOJu0Ywj0Xd6zIEzBIG9+D8KsN2kGtyc/mDr94jZ2XfXTmXk9/iLan+Q vwoHSb6XLjeWJE4auRGJ59xqNvqiauY3G1LA1P08qCetQrLvy/nJrvSHRjB9fhCQxViyxL2Zlq5 AUzqh3A== X-Received: from plbkv13.prod.google.com ([2002:a17:903:28cd:b0:2b7:d398:c384]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:ea0c:b0:2bd:6327:b4f5 with SMTP id d9443c01a7336-2bf368be464mr776115ad.40.1780065923557; Fri, 29 May 2026 07:45:23 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 07:44:13 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529144435.704127-27-seanjc@google.com> Subject: [PATCH v4 26/47] x86/kvm: Don't disable kvmclock on BSP in syscore_suspend() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780065925-0A36CC48-441B0394/0/0 X-purgate-type: clean X-purgate-size: 5413 Don't disable kvmclock on the BSP during syscore_suspend(), as the BSP's clock is NOT restored during syscore_resume(), but is instead restored earlier via the sched_clock restore callback. If suspend is aborted, e.g. due to a late wakeup, the BSP will run without its clock enabled, which "works" only because KVM-the-hypervisor is kind enough to not clobber the shared memory when the clock is disabled. But over time, the BSP's view of time will drift from APs. Plumb in an "action" to KVM-as-a-guest and kvmclock code in preparation for additional cleanups to kvmclock's suspend/resume logic. Fixes: c02027b5742b ("x86/kvm: Disable kvmclock on all CPUs on shutdown") Cc: stable@vger.kernel.org Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 8 +++++++- arch/x86/kernel/kvm.c | 15 ++++++++------- arch/x86/kernel/kvmclock.c | 31 +++++++++++++++++++++++++------ 3 files changed, 40 insertions(+), 14 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 4a49fc286b4c..08686ff19caa 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -118,8 +118,14 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, } #ifdef CONFIG_KVM_GUEST +enum kvm_guest_cpu_action { + KVM_GUEST_BSP_SUSPEND, + KVM_GUEST_AP_OFFLINE, + KVM_GUEST_SHUTDOWN, +}; + void kvmclock_init(bool prefer_tsc); -void kvmclock_disable(void); +void kvmclock_cpu_action(enum kvm_guest_cpu_action action); bool kvm_para_available(void); unsigned int kvm_arch_para_features(void); unsigned int kvm_arch_para_hints(void); diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index c81a24d0efdf..fd1c417b4f9b 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -460,7 +460,7 @@ static void __init sev_map_percpu_data(void) } } -static void kvm_guest_cpu_offline(bool shutdown) +static void kvm_guest_cpu_offline(enum kvm_guest_cpu_action action) { kvm_disable_steal_time(); if (kvm_para_has_feature(KVM_FEATURE_PV_EOI)) @@ -468,9 +468,10 @@ static void kvm_guest_cpu_offline(bool shutdown) if (kvm_para_has_feature(KVM_FEATURE_MIGRATION_CONTROL)) wrmsrq(MSR_KVM_MIGRATION_CONTROL, 0); kvm_pv_disable_apf(); - if (!shutdown) + if (action != KVM_GUEST_SHUTDOWN) apf_task_wake_all(); - kvmclock_disable(); + + kvmclock_cpu_action(action); } static int kvm_cpu_online(unsigned int cpu) @@ -726,7 +727,7 @@ static int kvm_cpu_down_prepare(unsigned int cpu) unsigned long flags; local_irq_save(flags); - kvm_guest_cpu_offline(false); + kvm_guest_cpu_offline(KVM_GUEST_AP_OFFLINE); local_irq_restore(flags); return 0; } @@ -737,7 +738,7 @@ static int kvm_suspend(void *data) { u64 val = 0; - kvm_guest_cpu_offline(false); + kvm_guest_cpu_offline(KVM_GUEST_BSP_SUSPEND); #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL)) @@ -768,7 +769,7 @@ static struct syscore kvm_syscore = { static void kvm_pv_guest_cpu_reboot(void *unused) { - kvm_guest_cpu_offline(true); + kvm_guest_cpu_offline(KVM_GUEST_SHUTDOWN); } static int kvm_pv_reboot_notify(struct notifier_block *nb, @@ -792,7 +793,7 @@ static struct notifier_block kvm_pv_reboot_nb = { #ifdef CONFIG_CRASH_DUMP static void kvm_crash_shutdown(struct pt_regs *regs) { - kvm_guest_cpu_offline(true); + kvm_guest_cpu_offline(KVM_GUEST_SHUTDOWN); native_machine_crash_shutdown(regs); } #endif diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 13c728444e12..13c4be3a7f0a 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -177,8 +177,22 @@ static void kvm_register_clock(char *txt) pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); } +static void kvmclock_disable(void) +{ + if (msr_kvm_system_time) + native_write_msr(msr_kvm_system_time, 0); +} + static void kvm_save_sched_clock_state(void) { + /* + * Stop host writes to kvmclock immediately prior to suspend/hibernate. + * If the system is hibernating, then kvmclock will likely reside at a + * different physical address when the system awakens, and host writes + * to the old address prior to reconfiguring kvmclock would clobber + * random memory. + */ + kvmclock_disable(); } static void kvm_restore_sched_clock_state(void) @@ -186,6 +200,17 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } +void kvmclock_cpu_action(enum kvm_guest_cpu_action action) +{ + /* + * Don't disable kvmclock on the BSP during suspend. If kvmclock is + * being used for sched_clock, then it needs to be kept alive until the + * last minute, and restored as quickly as possible after resume. + */ + if (action != KVM_GUEST_BSP_SUSPEND) + kvmclock_disable(); +} + #ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { @@ -193,12 +218,6 @@ static void kvm_setup_secondary_clock(void) } #endif -void kvmclock_disable(void) -{ - if (msr_kvm_system_time) - native_write_msr(msr_kvm_system_time, 0); -} - static void __init kvmclock_init_mem(void) { unsigned long ncpus; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 14:57:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 14:57:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322414.1588672 (Exim 4.92) (envelope-from ) id 1wSyeS-0001DR-7C; Fri, 29 May 2026 14:57:32 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322414.1588672; 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boundary="-=Part.17c0.4f7d27eb6f454136.19e743d74f9.2a7d77ea9eefc69a=-" X-Bm-Milter-Handled: 4ffbd6c1-ee69-4e1b-aabd-f977039bd3e2 X-Bm-Transport-Timestamp: 1780066645242 X-purgate-ID: tlsNG-bad1c0/1780066647-89174A53-67DC28CD/0/0 X-purgate-type: clean X-purgate-size: 761 ---=Part.17c0.4f7d27eb6f454136.19e743d74f9.2a7d77ea9eefc69a=- Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Wed, May 27, 2026 at 07:45:28PM +0200, Cody Zuschlag wrote: > Add documentation for the Assisted-by tag to clarify how > AI-assisted tooling may be disclosed in Xen patches=2E >=20 > The guidance follows the Linux kernel documentation=2E >=20 > Assisted-by: ChatGPT:gpt-5=2E5 > Signed-off-by: Cody Zuschlag Acked-by: Anthony PERARD Thanks, -- Anthony Perard | Vates XCP-ng Developer XCP-ng & Xen Orchestra - Vate= s solutions web: https://vates=2Etech ---=Part.17c0.4f7d27eb6f454136.19e743d74f9.2a7d77ea9eefc69a=--- From xen-devel-bounces@lists.xenproject.org Fri May 29 15:07:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:07:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322429.1588681 (Exim 4.92) (envelope-from ) id 1wSynh-0004ee-2o; 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AFNElJ/Z5kpQYr7AAn7mHsA+B6jb+eTgDQhzR4+5wM0F4LNKnCrDhfWh4579Mgv1DWc2ZtIrIV95A0B20FY=@lists.xenproject.org X-Gm-Message-State: AOJu0Yzq0jaLHWFBt0iydnLPNsISjPhEW9pDvX3tIUv2YSDYX70UFNcQ DCHUnRiO1+k54On43RIxg2t9yg9mmlil297b4ue1Xl9PTwA6hyvXe+h7l0kescwJyg61spGN5XG x/qD1hQ== X-Received: from pfkk14.prod.google.com ([2002:aa7:90ce:0:b0:82f:6245:a6ec]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:8088:b0:838:c01a:7a50 with SMTP id d2e1a72fcca58-84212ce8ccamr3369227b3a.30.1780067219938; Fri, 29 May 2026 08:06:59 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:06:31 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150631.713818-1-seanjc@google.com> Subject: [PATCH v4 27/47] x86/paravirt: Remove unnecessary PARAVIRT=n stub for paravirt_set_sched_clock() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780067222-D3D67443-91E7D5EE/0/0 X-purgate-type: clean X-purgate-size: 1570 Remove the unnecessary paravirt_set_sched_clock() stub for PARAVIRT=n, as all callers are gated by PARAVIRT=y. Eliminating the stub will avoid a pile of pointless churn as the "real" implementation evolves. No functional change intended. Fixes: 39965afb1151 ("x86/paravirt: Move paravirt_sched_clock() related code into tsc.c") Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 3 +++ arch/x86/kernel/tsc.c | 1 - 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index fda18bcb19b4..c71b466d6ace 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -12,7 +12,10 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; extern bool using_native_sched_clock(void); + +#ifdef CONFIG_PARAVIRT void paravirt_set_sched_clock(u64 (*func)(void)); +#endif /* * We use the full linear equation: f(x) = a + b*x, in order to allow diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index bdff8c988866..888bd1cbd9bc 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -288,7 +288,6 @@ void paravirt_set_sched_clock(u64 (*func)(void)) u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780067263-E119B443-1A031807/0/0 X-purgate-type: clean X-purgate-size: 4418 Move kvmclock's sched_clock save/restore helper "up" so that they can (eventually) be referenced by kvm_sched_clock_init(). No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 108 ++++++++++++++++++------------------- 1 file changed, 54 insertions(+), 54 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 4e50e75ff43d..0d4f2cf97246 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -71,6 +71,25 @@ static int kvm_set_wallclock(const struct timespec64 *now) return -ENODEV; } +static void kvm_register_clock(char *txt) +{ + struct pvclock_vsyscall_time_info *src = this_cpu_hvclock(); + u64 pa; + + if (!src) + return; + + pa = slow_virt_to_phys(&src->pvti) | 0x01ULL; + wrmsrq(msr_kvm_system_time, pa); + pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); +} + +static void kvmclock_disable(void) +{ + if (msr_kvm_system_time) + native_write_msr(msr_kvm_system_time, 0); +} + static u64 kvm_clock_read(void) { u64 ret; @@ -91,6 +110,30 @@ static noinstr u64 kvm_sched_clock_read(void) return pvclock_clocksource_read_nowd(this_cpu_pvti()) - kvm_sched_clock_offset; } +static void kvm_save_sched_clock_state(void) +{ + /* + * Stop host writes to kvmclock immediately prior to suspend/hibernate. + * If the system is hibernating, then kvmclock will likely reside at a + * different physical address when the system awakens, and host writes + * to the old address prior to reconfiguring kvmclock would clobber + * random memory. + */ + kvmclock_disable(); +} + +#ifdef CONFIG_SMP +static void kvm_setup_secondary_clock(void) +{ + kvm_register_clock("secondary cpu clock"); +} +#endif + +static void kvm_restore_sched_clock_state(void) +{ + kvm_register_clock("primary cpu clock, resume"); +} + static inline void kvm_sched_clock_init(bool stable) { kvm_sched_clock_offset = kvm_clock_read(); @@ -103,6 +146,17 @@ static inline void kvm_sched_clock_init(bool stable) sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); } +void kvmclock_cpu_action(enum kvm_guest_cpu_action action) +{ + /* + * Don't disable kvmclock on the BSP during suspend. If kvmclock is + * being used for sched_clock, then it needs to be kept alive until the + * last minute, and restored as quickly as possible after resume. + */ + if (action != KVM_GUEST_BSP_SUSPEND) + kvmclock_disable(); +} + /* * If we don't do that, there is the possibility that the guest * will calibrate under heavy load - thus, getting a lower lpj - @@ -161,60 +215,6 @@ static struct clocksource kvm_clock = { .enable = kvm_cs_enable, }; -static void kvm_register_clock(char *txt) -{ - struct pvclock_vsyscall_time_info *src = this_cpu_hvclock(); - u64 pa; - - if (!src) - return; - - pa = slow_virt_to_phys(&src->pvti) | 0x01ULL; - wrmsrq(msr_kvm_system_time, pa); - pr_debug("kvm-clock: cpu %d, msr %llx, %s", smp_processor_id(), pa, txt); -} - -static void kvmclock_disable(void) -{ - if (msr_kvm_system_time) - native_write_msr(msr_kvm_system_time, 0); -} - -static void kvm_save_sched_clock_state(void) -{ - /* - * Stop host writes to kvmclock immediately prior to suspend/hibernate. - * If the system is hibernating, then kvmclock will likely reside at a - * different physical address when the system awakens, and host writes - * to the old address prior to reconfiguring kvmclock would clobber - * random memory. - */ - kvmclock_disable(); -} - -static void kvm_restore_sched_clock_state(void) -{ - kvm_register_clock("primary cpu clock, resume"); -} - -void kvmclock_cpu_action(enum kvm_guest_cpu_action action) -{ - /* - * Don't disable kvmclock on the BSP during suspend. If kvmclock is - * being used for sched_clock, then it needs to be kept alive until the - * last minute, and restored as quickly as possible after resume. - */ - if (action != KVM_GUEST_BSP_SUSPEND) - kvmclock_disable(); -} - -#ifdef CONFIG_SMP -static void kvm_setup_secondary_clock(void) -{ - kvm_register_clock("secondary cpu clock"); -} -#endif - static void __init kvmclock_init_mem(void) { unsigned long ncpus; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:08:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:08:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322437.1588700 (Exim 4.92) (envelope-from ) id 1wSyoh-0005pj-J4; Fri, 29 May 2026 15:08:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322437.1588700; Fri, 29 May 2026 15:08:07 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyoh-0005pc-E8; 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Fri, 29 May 2026 08:08:03 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:00 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150800.714453-1-seanjc@google.com> Subject: [PATCH v4 34/47] x86/kvmclock: Move kvm_sched_clock_init() down in kvmclock.c From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1780067285-8556ED75-E02A47EC/0/0 X-purgate-type: clean X-purgate-size: 2297 Move kvm_sched_clock_init() "down" so that it can reference the global kvm_clock structure without needing a forward declaration. Opportunistically mark the helper as "__init" instead of "inline" to make its usage more obvious; modern compilers don't need a hint to inline a single-use function, and an extra CALL+RET pair during boot is a complete non-issue. And, if the compiler ignores the hint and does NOT inline the function, the resulting code may not get discarded after boot due lack of an __init annotation. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 05bca2be0df3..6372b4dc7b0c 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -134,20 +134,6 @@ static void kvm_restore_sched_clock_state(void) kvm_register_clock("primary cpu clock, resume"); } -static inline void kvm_sched_clock_init(bool stable) -{ - kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable, - kvm_save_sched_clock_state, - kvm_restore_sched_clock_state); - - pr_info("kvm-clock: using sched offset of %llu cycles", - kvm_sched_clock_offset); - - BUILD_BUG_ON(sizeof(kvm_sched_clock_offset) > - sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); -} - void kvmclock_cpu_action(enum kvm_guest_cpu_action action) { /* @@ -303,6 +289,20 @@ static int kvmclock_setup_percpu(unsigned int cpu) return p ? 0 : -ENOMEM; } +static __init void kvm_sched_clock_init(bool stable) +{ + kvm_sched_clock_offset = kvm_clock_read(); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state); + + pr_info("kvm-clock: using sched offset of %llu cycles", + kvm_sched_clock_offset); + + BUILD_BUG_ON(sizeof(kvm_sched_clock_offset) > + sizeof(((struct pvclock_vcpu_time_info *)NULL)->system_time)); +} + void __init kvmclock_init(bool prefer_tsc) { u8 flags; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:08:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:08:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322441.1588708 (Exim 4.92) (envelope-from ) id 1wSyon-0006Bz-SX; Fri, 29 May 2026 15:08:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322441.1588708; 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AFNElJ/I/Gi6yCHqkkJ3IWO0PqjzQhhnHaJQPSyYJMBZhMGn3MxfsN96PaSJB56Gt9XMEhFquGezSnIKblo=@lists.xenproject.org X-Gm-Message-State: AOJu0YwYmb9MemeKEafXKqqfb4Nh4NkIN94KlnwA3wKYRaBy8C/ZGhX4 j6UGZWUepncyWdbs0hJpWSE58OIsDZ05Hki8ovtnv1MEitGcle3m+xBoyOW6S7eKZwo8CLr9plt iyleOuA== X-Received: from pgfu20.prod.google.com ([2002:a65:6714:0:b0:c85:82f6:34d1]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:2452:b0:3b3:24d5:d656 with SMTP id adf61e73a8af0-3b411deb049mr3990553637.23.1780067290086; Fri, 29 May 2026 08:08:10 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:07 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150807.714538-1-seanjc@google.com> Subject: [PATCH v4 36/47] x86/pvclock: Mark setup helpers and related various as __init/__ro_after_init From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-bad1c0/1780067292-37979A53-5F630D5C/0/0 X-purgate-type: clean X-purgate-size: 1384 Now that Xen PV clock and kvmclock explicitly do setup only during init, tag the common PV clock flags/vsyscall variables and their mutators with __init. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/pvclock.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index b3f81379c2fc..a51adce67f92 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c @@ -16,10 +16,10 @@ #include #include -static u8 valid_flags __read_mostly = 0; -static struct pvclock_vsyscall_time_info *pvti_cpu0_va __read_mostly; +static u8 valid_flags __ro_after_init = 0; +static struct pvclock_vsyscall_time_info *pvti_cpu0_va __ro_after_init; -void pvclock_set_flags(u8 flags) +void __init pvclock_set_flags(u8 flags) { valid_flags = flags; } @@ -153,7 +153,7 @@ void pvclock_read_wallclock(struct pvclock_wall_clock *wall_clock, set_normalized_timespec64(ts, now.tv_sec, now.tv_nsec); } -void pvclock_set_pvti_cpu0_va(struct pvclock_vsyscall_time_info *pvti) +void __init pvclock_set_pvti_cpu0_va(struct pvclock_vsyscall_time_info *pvti) { WARN_ON(vclock_was_used(VDSO_CLOCKMODE_PVCLOCK)); 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1780067304-39B7C938-9D80C75C/0/0 X-purgate-type: clean X-purgate-size: 2065 WARN if kvmclock is still suspended when its wallclock is read, i.e. when the kernel reads its persistent clock. The wallclock subtly depends on the BSP's kvmclock being enabled, and returns garbage if kvmclock is disabled. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 5dfac79a5d30..73fabfac2bc9 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -53,6 +53,8 @@ static struct pvclock_vsyscall_time_info *hvclock_mem; DEFINE_PER_CPU(struct pvclock_vsyscall_time_info *, hv_clock_per_cpu); EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu); +static bool kvmclock_suspended; + /* * The wallclock is the time of day when we booted. Since then, some time may * have elapsed since the hypervisor wrote the data. So we try to account for @@ -60,6 +62,7 @@ EXPORT_PER_CPU_SYMBOL_GPL(hv_clock_per_cpu); */ static void kvm_get_wallclock(struct timespec64 *now) { + WARN_ON_ONCE(kvmclock_suspended); wrmsrq(msr_kvm_wall_clock, slow_virt_to_phys(&wall_clock)); preempt_disable(); pvclock_read_wallclock(&wall_clock, this_cpu_pvti(), now); @@ -119,6 +122,7 @@ static void kvm_save_sched_clock_state(void) * to the old address prior to reconfiguring kvmclock would clobber * random memory. */ + kvmclock_suspended = true; kvmclock_disable(); } @@ -131,16 +135,19 @@ static void kvm_setup_secondary_clock(void) static void kvm_restore_sched_clock_state(void) { + kvmclock_suspended = false; kvm_register_clock("primary cpu, sched_clock resume"); } static void kvmclock_suspend(struct clocksource *cs) { + kvmclock_suspended = true; kvmclock_disable(); } static void kvmclock_resume(struct clocksource *cs) { + kvmclock_suspended = false; kvm_register_clock("primary cpu, clocksource resume"); } -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:08:34 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:08:34 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322450.1588725 (Exim 4.92) (envelope-from ) id 1wSyp8-0007DJ-BN; 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AFNElJ8VrfNPgN7hJsojhiz0KFtH6tNpJkGkPhB29hYiLoUiD29E98dGdhHJ0XQKicZ7D0kTu3UAgPRUK2U=@lists.xenproject.org X-Gm-Message-State: AOJu0Ywg4cEie3rgjNLSfW2OGLXh/cqqdiqD3CwZuJ2+AA4Tj4pFDK88 0o0nYqpBO2kGsbMMRmpp8jxKnGqKCkPz38CaOR4Ir96g1Nt2W7JPCiclOzBFL18+9eUV1aZrFD0 y/7wGBw== X-Received: from plbjy6.prod.google.com ([2002:a17:903:42c6:b0:2bd:d2c2:2776]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:eccf:b0:2bf:3126:44b6 with SMTP id d9443c01a7336-2bf368bd5dfmr2325645ad.40.1780067309070; Fri, 29 May 2026 08:08:29 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:26 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150827.714968-1-seanjc@google.com> Subject: [PATCH v4 44/47] x86/paravirt: Don't use a PV sched_clock in CoCo guests with trusted TSC From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-16d1c6/1780067311-8EF89D75-DEE7E71A/0/0 X-purgate-type: clean X-purgate-size: 1335 Silently ignore attempts to switch to a paravirt sched_clock when running as a CoCo guest with trusted TSC. In hand-wavy theory, a misbehaving hypervisor could attack the guest by manipulating the PV clock to affect guest scheduling in some weird and/or predictable way. More importantly, reading TSC on such platforms is faster than any PV clock, and sched_clock is all about speed. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 7bcf757bf551..036916953f4a 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -283,6 +283,15 @@ bool using_native_sched_clock(void) int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, void (*save)(void), void (*restore)(void)) { + /* + * Don't replace TSC with a PV clock when running as a CoCo guest and + * the TSC is secure/trusted; PV clocks are emulated by the hypervisor, + * which isn't in the guest's TCB. + */ + if (cc_platform_has(CC_ATTR_GUEST_SNP_SECURE_TSC) || + boot_cpu_has(X86_FEATURE_TDX_GUEST)) + return -EPERM; + if (!stable) clear_sched_clock_stable(); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:08:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:08:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322454.1588735 (Exim 4.92) (envelope-from ) id 1wSypG-0007d9-Jl; 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AFNElJ/OrRQmDbVJ4+Mr8/EGyN3Y1W/Li2xspv2MJOH5B5dwJldn0z2SU+V9eVvH7VR+FZvcDF4ws/jSPDk=@lists.xenproject.org X-Gm-Message-State: AOJu0YxOS8T5dv64Uj6nOiBePOrH8s6CDiN5HEY26K1IwVd3Pb/YF+lI JyQrna9DlyuJa3SZwjL+aNk2dnlIlU3FVZsjOn9oKbjWOILJ24CeQQgezi9ks5geI4wY5aUnmuM M+3AEtg== X-Received: from pgh1.prod.google.com ([2002:a05:6a02:4e01:b0:c79:8102:80bb]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:184b:b0:366:479e:63a5 with SMTP id 98e67ed59e1d1-36bbcc160f0mr4139147a91.2.1780067317529; Fri, 29 May 2026 08:08:37 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:35 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150835.715093-1-seanjc@google.com> Subject: [PATCH v4 47/47] x86/paravirt: Move using_native_sched_clock() stub into timer.h From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-33051d/1780067319-41396938-FB303E5A/0/0 X-purgate-type: clean X-purgate-size: 1710 Now that timer.h ended up with CONFIG_PARAVIRT #ifdeffery anyways, move the PARAVIRT=n using_native_sched_clock() stub into timer.h as a "free" optimization. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 6 ++++-- arch/x86/kernel/tsc.c | 2 -- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index ca5c95d48c03..a52388af6055 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -11,9 +11,9 @@ extern void recalibrate_cpu_khz(void); extern int no_timer_check; -extern bool using_native_sched_clock(void); - #ifdef CONFIG_PARAVIRT +extern bool using_native_sched_clock(void); + int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, void (*save)(void), void (*restore)(void)); @@ -23,6 +23,8 @@ static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), { (void)__paravirt_set_sched_clock(func, true, save, restore); } +#else +static inline bool using_native_sched_clock(void) { return true; } #endif /* diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 036916953f4a..159d7d060204 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -302,8 +302,6 @@ int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); - -bool using_native_sched_clock(void) { return true; } #endif notrace u64 sched_clock(void) -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:09:26 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:09:26 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322475.1588744 (Exim 4.92) (envelope-from ) id 1wSypw-0000Gr-2I; Fri, 29 May 2026 15:09:24 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322475.1588744; Fri, 29 May 2026 15:09:24 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSypv-0000Gk-VU; Fri, 29 May 2026 15:09:23 +0000 Received: by outflank-mailman (input) for mailman id 1322475; Fri, 29 May 2026 15:09:23 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <346sZagYKCfgxjfsohlttlqj.htr2js-ij0jqqnxyx.2jsuwtojhy.twl@flex--seanjc.bounces.google.com>) id 1wSypv-0000Gb-B0 for xen-devel@lists.xenproject.org; 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bh=hiLxlYw3clwD2dLxI09vlAh7vN9DHw/HVEHbWWzJKBk=; b=gf4IgJeJJgzokkP/vvUZH9F0eC5H734UhyPpmteVD3qj8EOS26MK2xuh67L2yAHVRY r0c1SxkkLQXsYwRxXzDgraGImIP1GOjEOy9dyLIb3bFoT5bo7bPBMODL82QvadGfbxeX Q+2g4UDjnrwtgOBndIIeWDH6z+PEUsWd2R8aU+rpvNZg4aQj5SLep+cTF+XLRS+rEg5n qNI9BCxPyMkw9Rb289K4IXSlx4gFVwez1KQH1pxg5NIBLWD4nh3YBIoaxIoLR1Or6DYS 3ZBnPrWacuLwB0O9I+qxncddbF9Wzpd/p1l7OmvZOMxkXlPAp8wtRdOD9oN11Ev9fHLX 3uEw== X-Forwarded-Encrypted: i=1; AFNElJ+HrYfMRyq+HkPZgSFnSyM80uRsE5E+rMZByTNElceqE936L5R170zxCkrKBeGjA0jmyoh2slwuPH0=@lists.xenproject.org X-Gm-Message-State: AOJu0YxzuFHTiC7XDbGrm4jYeColdHLgIHOeSSSwZPIjh4ay9B0fKjAF o28tfave/m6R80RRfME+Uskugjw56hzJE0exTLqR5BFUVCNVoxSf8RJCyTNvayi2KdNb2EJSzPm mr0TMNA== X-Received: from pgx6.prod.google.com ([2002:a63:1746:0:b0:c79:81bb:79ef]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:9149:b0:3b2:a958:a725 with SMTP id adf61e73a8af0-3b411e478f7mr4139551637.41.1780067299927; Fri, 29 May 2026 08:08:19 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:18 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150818.714760-1-seanjc@google.com> Subject: [PATCH v4 40/47] x86/kvmclock: Hook clocksource.suspend/resume when kvmclock isn't sched_clock From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780067302-D8B78443-16F20FE7/13/0 X-purgate-type: clean X-purgate-size: 2030 Save/restore kvmclock across suspend/resume via clocksource hooks when kvmclock isn't being used for sched_clock. This will allow using kvmclock as a clocksource (or for wallclock!) without also using it for sched_clock. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 4e304f1c887d..5dfac79a5d30 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -131,7 +131,17 @@ static void kvm_setup_secondary_clock(void) static void kvm_restore_sched_clock_state(void) { - kvm_register_clock("primary cpu clock, resume"); + kvm_register_clock("primary cpu, sched_clock resume"); +} + +static void kvmclock_suspend(struct clocksource *cs) +{ + kvmclock_disable(); +} + +static void kvmclock_resume(struct clocksource *cs) +{ + kvm_register_clock("primary cpu, clocksource resume"); } void kvmclock_cpu_action(enum kvm_guest_cpu_action action) @@ -201,6 +211,8 @@ static struct clocksource kvm_clock = { .flags = CLOCK_SOURCE_IS_CONTINUOUS, .id = CSID_X86_KVM_CLK, .enable = kvm_cs_enable, + .suspend = kvmclock_suspend, + .resume = kvmclock_resume, }; static void __init kvmclock_init_mem(void) @@ -296,6 +308,15 @@ static __init void kvm_sched_clock_init(bool stable) kvm_save_sched_clock_state, kvm_restore_sched_clock_state); + /* + * The BSP's clock is managed via dedicated sched_clock save/restore + * hooks when kvmclock is used as sched_clock, as sched_clock needs to + * be kept alive until the very end of suspend entry, and restored as + * quickly as possible after resume. + */ + kvm_clock.suspend = NULL; + kvm_clock.resume = NULL; + pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:10:02 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:10:02 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322480.1588752 (Exim 4.92) (envelope-from ) id 1wSyqY-000193-9p; Fri, 29 May 2026 15:10:02 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322480.1588752; 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AFNElJ+1s6xcLZRHCeoAAmSeKL4oBRpuLZb5HNZiAYYyHhjttlsc1DyCKZfIikcTT9TZQb0P0v6pXdufVCk=@lists.xenproject.org X-Gm-Message-State: AOJu0YyS8lgsaJgKaPYC8VZgRa3i2L29RLRqhFM8ZC71bc7umFWaHpaW pGwcA1WMFOcH+QwjbK+gwbV3nJvq9prbWRRzC7LodPkSMr36kUw5iwKRmzsU4aag0os96v7qZyW 0U8XXIg== X-Received: from pgbda10.prod.google.com ([2002:a05:6a02:238a:b0:c80:2987:4220]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a20:9f88:b0:3b3:1951:489b with SMTP id adf61e73a8af0-3b411e714f7mr3887670637.45.1780067278068; Fri, 29 May 2026 08:07:58 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:07:55 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150755.714364-1-seanjc@google.com> Subject: [PATCH v4 32/47] x86/tsc: WARN if TSC sched_clock save/restore used with PV sched_clock From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780067280-1BD7FF3B-91926027/13/0 X-purgate-type: clean X-purgate-size: 1388 Now that all PV clocksources override the sched_clock save/restore hooks when overriding sched_clock, WARN if the "default" TSC hooks are invoked when using a PV sched_clock, e.g. to guard against regressions. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/tsc.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index a9b6d3399c23..19da1a3d2126 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -972,9 +972,17 @@ EXPORT_SYMBOL_GPL(recalibrate_cpu_khz); static unsigned long long cyc2ns_suspend; +static __always_inline bool tsc_is_save_restore_needed(void) +{ + if (WARN_ON_ONCE(!using_native_sched_clock())) + return false; + + return static_branch_likely(&__use_tsc) || sched_clock_stable(); +} + void tsc_save_sched_clock_state(void) { - if (!static_branch_likely(&__use_tsc) && !sched_clock_stable()) + if (!tsc_is_save_restore_needed()) return; cyc2ns_suspend = sched_clock(); @@ -994,7 +1002,7 @@ void tsc_restore_sched_clock_state(void) unsigned long flags; int cpu; - if (!static_branch_likely(&__use_tsc) && !sched_clock_stable()) + if (!tsc_is_save_restore_needed()) return; local_irq_save(flags); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:10:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:10:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322485.1588762 (Exim 4.92) (envelope-from ) id 1wSyqy-0002UC-HF; Fri, 29 May 2026 15:10:28 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322485.1588762; Fri, 29 May 2026 15:10:28 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyqy-0002U5-EL; Fri, 29 May 2026 15:10:28 +0000 Received: by outflank-mailman (input) for mailman id 1322485; Fri, 29 May 2026 15:10:27 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <356sZagYKCfwwierngksskpi.gsq1ir-hizippmwxw.1irtvsnigx.svk@flex--seanjc.bounces.google.com>) id 1wSyqx-0002Tp-0O for xen-devel@lists.xenproject.org; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ebf023/1780067306-285703FF-7801EABA/13/0 X-purgate-type: clean X-purgate-size: 2068 Annotate __paravirt_set_sched_clock() as __init, and make its wrapper __always_inline to ensure sanitizers don't result in a non-inline version hanging around. All callers run during __init, and changing sched_clock after boot would be all kinds of crazy. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 10 +++++----- arch/x86/kernel/tsc.c | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index e97cd1ae03d1..96ae7feac47c 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,12 +14,12 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)); +void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); -static inline void paravirt_set_sched_clock(u64 (*func)(void), - void (*save)(void), - void (*restore)(void)) +static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), + void (*save)(void), + void (*restore)(void)) { __paravirt_set_sched_clock(func, true, save, restore); } diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 7fbcfc2efd1d..6da0a3ac05c2 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,8 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)) +void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)) { if (!stable) clear_sched_clock_stable(); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:10:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:10:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322486.1588772 (Exim 4.92) (envelope-from ) id 1wSyr3-0002kY-Oh; Fri, 29 May 2026 15:10:33 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322486.1588772; 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz , "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="us-ascii" X-purgate-ID: tlsNG-720697/1780067431-AAB68161-2A0F58C4/0/0 X-purgate-type: clean X-purgate-size: 549 On Fri, May 29, 2026, Sean Christopherson wrote: > Well, the number of patches in the series is going in the wrong direction, > but I'm much happier with this version, which eschews the x86_platform > overrides entirely in favor of a fixed sequence for selecting the TSC/CPU > frequency "routine". FYI, our internal mail server flamed out after sending patch 26 in the initial go. I'm pretty sure I managed to get the rest sent without screwing up the threading. Holler if something is wonky and I'll RESEND the whole pile if necessary. From xen-devel-bounces@lists.xenproject.org Fri May 29 15:11:19 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:11:19 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322500.1588780 (Exim 4.92) (envelope-from ) id 1wSyrn-0003sT-4N; Fri, 29 May 2026 15:11:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322500.1588780; Fri, 29 May 2026 15:11:19 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyrn-0003sM-1C; Fri, 29 May 2026 15:11:19 +0000 Received: by outflank-mailman (input) for mailman id 1322500; Fri, 29 May 2026 15:11:17 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <33qsZagYKCfMnZVieXbjjbgZ.XjhsZi-YZqZggdnon.sZikmjeZXo.jmb@flex--seanjc.bounces.google.com>) id 1wSyrl-0003qr-J2 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:11:17 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSyrk-009Kty-W7 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:11:17 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from <33qsZagYKCfMnZVieXbjjbgZ.XjhsZi-YZqZggdnon.sZikmjeZXo.jmb@flex--seanjc.bounces.google.com>) id 6a19ac90-5cb7-0a2a0a5109dd-0a2a4507abd8-16 for ; Fri, 29 May 2026 17:11:16 +0200 Received: from [209.85.214.202] (helo=mail-pl1-f202.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from <33qsZagYKCfMnZVieXbjjbgZ.XjhsZi-YZqZggdnon.sZikmjeZXo.jmb@flex--seanjc.bounces.google.com>) id 6a19abde-229c-0a2a45070019-d155d6cad061-3 for ; Fri, 29 May 2026 17:08:16 +0200 Received: by mail-pl1-f202.google.com with SMTP id d9443c01a7336-2bd5b20aaa6so149415145ad.2 for ; Fri, 29 May 2026 08:08:15 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=google.com header.i="@google.com" header.h="Cc:To:From:Subject:Message-ID:References:Mime-Version:In-Reply-To:Date:Reply-To" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1780067294; x=1780672094; darn=lists.xenproject.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=IXSUk0zrc0SOIpzpc8N9Re3bKO3sQJVctQ52bfDdTtc=; b=XoEnfvuuezmXXm+Dh3N9C3lNQ/Ga6e/9phhrVBoYdvLMVHD5AKp4GiPzLXkAC867td cgUgTcZSUWfscls0uQ8txehA268EUiGxMR7DCmqiPgalDB/V18TvScdfKiUJIYQ62Tb1 CkGoF8alHZLBPhwtOiRQ1I23mN3guyQ/6i+4Yb/jzJm25h9RCTXFBB+eSq/QGYKfPIC1 PJIWCE2yiofOc/ZxobfglpOYGp/i0Q//qZlLCPzFK1+j2d64gGohS4Z3tk1+kK+lXph+ ni9RjRL9p6J7JIjGWrSpGCVHO20+k1/FqXU2VxKE9cALFc61sA36Ko4+SPNWKbJVqvSp VK5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780067294; x=1780672094; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=IXSUk0zrc0SOIpzpc8N9Re3bKO3sQJVctQ52bfDdTtc=; b=et7KNJ08dspUiuXsVHGkVFDY0sDdu98/bVo/AXcQ3OpF70/AlApbAW4hKWPkA/gMVP aWMn7tV7PXm9LKmVBpNdLO+j/++frx7Sw9R7teDguAg58p25kRy2SNzodPMvnxvy7Gb6 T0L/XZd3bBbXhNm4GjPLHSxmKGdVX5ZiOqUbOASBYufa4G3WLw3SVd92paUVXG77tCe4 V5QQPRC+6c0/WmG3PJ4sZnnn+vfYk7akWvNtwiitoULAcuhKMIHe3v6xdGkC7hIje4Am 0DV4Gv3vplHtkj6gWOXo57Mq14KiEp3PkAzu33k5Xyz55D+Q4sXhFAN4RRVzmVK0QnUw swxA== X-Forwarded-Encrypted: i=1; AFNElJ8Bi7tsPZvnRgPop7s3tF7KpZFiT+X+l7ztjtT8lM1G3lSVul/47ScF2ksiTtzAG3Vic+1j8VRXsLY=@lists.xenproject.org X-Gm-Message-State: AOJu0YzLQleTIbpCtmQ5Q/LlEGAyiTsrHS1dKo6EBbsz8MGfzXJCeaoP fREEBo986ienRHVnuktLVW3p4vSok6iktow6NEy1zBVzQR5T2IqAygcYdMQj28EzSKf6DyYRr76 LteW2ZA== X-Received: from plblh4.prod.google.com ([2002:a17:903:2904:b0:2ae:ceb3:f968]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:e842:b0:2ba:6ebe:4897 with SMTP id d9443c01a7336-2bf367b37demr2834085ad.3.1780067294027; Fri, 29 May 2026 08:08:14 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:12 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150812.714604-1-seanjc@google.com> Subject: [PATCH v4 38/47] x86/kvmclock: Refactor handling of PVCLOCK_TSC_STABLE_BIT during kvmclock_init() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780067296-21969C48-BE91FD98/0/0 X-purgate-type: clean X-purgate-size: 1894 Clean up the setting of PVCLOCK_TSC_STABLE_BIT during kvmclock init to make it somewhat obvious that pvclock_read_flags() must be called *after* pvclock_set_flags(). Note, in theory, a different PV clock could have set PVCLOCK_TSC_STABLE_BIT in the supported flags, i.e. reading flags only if KVM_FEATURE_CLOCKSOURCE_STABLE_BIT is set could very, very theoretically result in a change in behavior. In practice, the kernel only supports a single PV clock. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 15 +++++++++++---- 1 file changed, 11 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 6372b4dc7b0c..4e304f1c887d 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -305,7 +305,7 @@ static __init void kvm_sched_clock_init(bool stable) void __init kvmclock_init(bool prefer_tsc) { - u8 flags; + bool stable = false; if (!kvm_para_available() || !kvmclock) return; @@ -332,11 +332,18 @@ void __init kvmclock_init(bool prefer_tsc) kvm_register_clock("primary cpu clock"); pvclock_set_pvti_cpu0_va(hv_clock_boot); - if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) + if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) { pvclock_set_flags(PVCLOCK_TSC_STABLE_BIT); - flags = pvclock_read_flags(&hv_clock_boot[0].pvti); - kvm_sched_clock_init(flags & PVCLOCK_TSC_STABLE_BIT); + /* + * Check if the clock is stable *after* marking TSC_STABLE as a + * valid flag. + */ + stable = pvclock_read_flags(&hv_clock_boot[0].pvti) & + PVCLOCK_TSC_STABLE_BIT; + } + + kvm_sched_clock_init(stable); if (!x86_init.hyper.get_tsc_khz) x86_init.hyper.get_tsc_khz = kvmclock_get_tsc_khz; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:11:22 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:11:22 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322501.1588790 (Exim 4.92) (envelope-from ) id 1wSyrq-00048V-Bt; Fri, 29 May 2026 15:11:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322501.1588790; Fri, 29 May 2026 15:11:22 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyrq-00048O-7l; Fri, 29 May 2026 15:11:22 +0000 Received: by outflank-mailman (input) for mailman id 1322501; Fri, 29 May 2026 15:11:21 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <34asZagYKCfYqcYlhaemmejc.amkvcl-bctcjjgqrq.vclnpmhcar.mpe@flex--seanjc.bounces.google.com>) id 1wSyrp-00046L-70 for xen-devel@lists.xenproject.org; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-ef75cf/1780067300-22D77C48-A08B5CBF/0/0 X-purgate-type: clean X-purgate-size: 1667 When resuming timekeeping after suspend, restore clocksources prior to reading the persistent clock. Paravirt clocks, e.g. kvmclock, tie the validity of a PV persistent clock to a clocksource, i.e. reading the PV persistent clock will return garbage if the underlying PV clocksource hasn't been enabled. The flaw has gone unnoticed because kvmclock is a mess and uses its own suspend/resume hooks instead of the clocksource suspend/resume hooks, which happens to work by sheer dumb luck (the kvmclock resume hook runs before timekeeping_resume()). Note, there is no evidence that any clocksource supported by the kernel depends on a persistent clock. Reviewed-by: Thomas Gleixner Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- kernel/time/timekeeping.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c index c493a4010305..26f3291a814d 100644 --- a/kernel/time/timekeeping.c +++ b/kernel/time/timekeeping.c @@ -2098,11 +2098,16 @@ void timekeeping_resume(void) u64 cycle_now, nsec; unsigned long flags; - read_persistent_clock64(&ts_new); - clockevents_resume(); clocksource_resume(); + /* + * Read persistent time after clocksources have been resumed. Paravirt + * clocks have a nasty habit of piggybacking a persistent clock on a + * system clock, and may return garbage if the system clock is suspended. + */ + read_persistent_clock64(&ts_new); + raw_spin_lock_irqsave(&tk_core.lock, flags); /* -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322515.1588798 (Exim 4.92) (envelope-from ) id 1wSysx-00059p-Lo; Fri, 29 May 2026 15:12:31 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322515.1588798; Fri, 29 May 2026 15:12:31 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSysx-00059h-IQ; Fri, 29 May 2026 15:12:31 +0000 Received: by outflank-mailman (input) for mailman id 1322515; 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Fri, 29 May 2026 08:08:26 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:24 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150824.714934-1-seanjc@google.com> Subject: [PATCH v4 43/47] x86/paravirt: Plumb a return code into __paravirt_set_sched_clock() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780067309-22589F3B-2F21E06D/0/0 X-purgate-type: clean X-purgate-size: 3365 Add a return code to __paravirt_set_sched_clock() so that the kernel can reject attempts to use a PV sched_clock without breaking the caller. E.g. when running as a CoCo VM with a secure TSC, using a PV clock is generally undesirable. Note, kvmclock is the only PV clock that does anything "extra" beyond simply registering itself as sched_clock, i.e. is the only caller that needs to check the new return value. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 6 +++--- arch/x86/kernel/kvmclock.c | 9 ++++++--- arch/x86/kernel/tsc.c | 5 +++-- 3 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index 96ae7feac47c..ca5c95d48c03 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,14 +14,14 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)); +int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); static __always_inline void paravirt_set_sched_clock(u64 (*func)(void), void (*save)(void), void (*restore)(void)) { - __paravirt_set_sched_clock(func, true, save, restore); + (void)__paravirt_set_sched_clock(func, true, save, restore); } #endif diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 73fabfac2bc9..1336c24f59cf 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -310,10 +310,13 @@ static int kvmclock_setup_percpu(unsigned int cpu) static __init void kvm_sched_clock_init(bool stable) { + /* Ensure the offset is configured before making kvmclock visible! */ kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable, - kvm_save_sched_clock_state, - kvm_restore_sched_clock_state); + + if (__paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state)) + return; /* * The BSP's clock is managed via dedicated sched_clock save/restore diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 6da0a3ac05c2..7bcf757bf551 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,8 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, - void (*save)(void), void (*restore)(void)) +int __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)) { if (!stable) clear_sched_clock_stable(); @@ -289,6 +289,7 @@ void __init __paravirt_set_sched_clock(u64 (*func)(void), bool stable, static_call_update(pv_sched_clock, func); x86_platform.save_sched_clock_state = save; x86_platform.restore_sched_clock_state = restore; + return 0; } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322516.1588807 (Exim 4.92) (envelope-from ) id 1wSyt3-0005RD-TA; Fri, 29 May 2026 15:12:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322516.1588807; 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AFNElJ8WG+n2wwpTgCYgvKXCcjCH6IL8xd2Bkp556rMelvyLfxsmIK3cjp92vFmXndzbLR1VfgPs+A65Dvs=@lists.xenproject.org X-Gm-Message-State: AOJu0YwUI1uLq1hAEWyAHWxuml83E9Gbi7pqf7AIaG+uFsnt75xuJbmc qOcdowPA+QWgiQmlGTzLwr3byTfGTzu2iIWIXAdhWtgOL/STDRYe4Q51ui0ewuCPe22qe3lrvlZ 0odPExg== X-Received: from plpp10.prod.google.com ([2002:a17:902:c70a:b0:2bd:56ce:d8ea]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:902:fc85:b0:2bc:ac76:c1d0 with SMTP id d9443c01a7336-2bf20de3033mr36747075ad.17.1780067312791; Fri, 29 May 2026 08:08:32 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:30 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150830.715007-1-seanjc@google.com> Subject: [PATCH v4 45/47] x86/kvmclock: Use TSC for sched_clock if it's constant and non-stop From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1780067315-A937C161-BD326D31/13/0 X-purgate-type: clean X-purgate-size: 2230 Prefer the TSC over kvmclock for sched_clock if the TSC is constant, nonstop, and not marked unstable via command line. I.e. use the same criteria as tweaking the clocksource rating so that TSC is preferred over kvmclock. Per the below comment from native_sched_clock(), sched_clock is more tolerant of slop than clocksource; using TSC for clocksource but not sched_clock makes little to no sense, especially now that KVM CoCo guests with a trusted TSC use TSC, not kvmclock. /* * Fall back to jiffies if there's no TSC available: * ( But note that we still use it if the TSC is marked * unstable. We do this because unlike Time Of Day, * the scheduler clock tolerates small errors and it's * very important for it to be as fast as the platform * can achieve it. ) */ The only advantage of using kvmclock is that doing so allows for early and common detection of PVCLOCK_GUEST_STOPPED, but that code has been broken for over two years with nary a complaint, i.e. it can't be _that_ valuable. And as above, certain types of KVM guests are losing the functionality regardless, i.e. acknowledging PVCLOCK_GUEST_STOPPED needs to be decoupled from sched_clock() no matter what. Link: https://lore.kernel.org/all/Z4hDK27OV7wK572A@google.com Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/kvmclock.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 1336c24f59cf..cd65ad328637 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -374,7 +374,6 @@ void __init kvmclock_init(bool prefer_tsc) PVCLOCK_TSC_STABLE_BIT; } - kvm_sched_clock_init(stable); if (!x86_init.hyper.get_tsc_khz) x86_init.hyper.get_tsc_khz = kvmclock_get_tsc_khz; @@ -394,6 +393,8 @@ void __init kvmclock_init(bool prefer_tsc) */ if (prefer_tsc) kvm_clock.rating = 299; + else + kvm_sched_clock_init(stable); clocksource_register_hz(&kvm_clock, NSEC_PER_SEC); pv_info.name = "KVM"; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:40 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:40 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322517.1588817 (Exim 4.92) (envelope-from ) id 1wSyt6-0005gV-AT; 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AFNElJ/P1opLywO+yBjbcl7Kdkk5mmmwrZw7otc3sPnkAuZzwEk9rJm35ndUJt35dDkORPJ7iSiP90+44jM=@lists.xenproject.org X-Gm-Message-State: AOJu0Yz6tm2xnbzGNlH/6VQawJMoDRaOBvuk6vtakhiOanwf1xbhRsND RJmI4sWVb29DkizTN25GLC9on0aa6vrd8K03zrHU3kQ/g4klBgFzRlD+jrMRLT9vxcfQGVuTzti p8+XTCg== X-Received: from ploo20.prod.google.com ([2002:a17:902:e014:b0:2ba:41dd:4a8e]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:903:2bce:b0:2b4:5f96:184d with SMTP id d9443c01a7336-2bf3679ebb8mr2933525ad.5.1780067315192; Fri, 29 May 2026 08:08:35 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:33 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150833.715042-1-seanjc@google.com> Subject: [PATCH v4 46/47] x86/kvmclock: Plumb in AP-online and BSP-resume to kvmlock, for documentation From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1780067317-DAD73CF5-FEF6114E/13/0 X-purgate-type: clean X-purgate-size: 4539 Invoke kvmclock_cpu_action() with AP_ONLINE and BSP_RESUME, even though kvmclock doesn't need to do anything in either case, so that the asymmetry of kvmclock is a detail buried in kvmclock, and to explicitly document that doing nothing during those phases is intentional and correct. For all intents and purposes, no functional change intended. Signed-off-by: Sean Christopherson --- arch/x86/include/asm/kvm_para.h | 2 ++ arch/x86/kernel/kvm.c | 22 +++++++++++++------- arch/x86/kernel/kvmclock.c | 37 ++++++++++++++++++++++++++------- 3 files changed, 45 insertions(+), 16 deletions(-) diff --git a/arch/x86/include/asm/kvm_para.h b/arch/x86/include/asm/kvm_para.h index 08686ff19caa..763ed017738a 100644 --- a/arch/x86/include/asm/kvm_para.h +++ b/arch/x86/include/asm/kvm_para.h @@ -120,6 +120,8 @@ static inline long kvm_sev_hypercall3(unsigned int nr, unsigned long p1, #ifdef CONFIG_KVM_GUEST enum kvm_guest_cpu_action { KVM_GUEST_BSP_SUSPEND, + KVM_GUEST_BSP_RESUME, + KVM_GUEST_AP_ONLINE, KVM_GUEST_AP_OFFLINE, KVM_GUEST_SHUTDOWN, }; diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c index fd1c417b4f9b..2ed4bf13e3ed 100644 --- a/arch/x86/kernel/kvm.c +++ b/arch/x86/kernel/kvm.c @@ -474,18 +474,24 @@ static void kvm_guest_cpu_offline(enum kvm_guest_cpu_action action) kvmclock_cpu_action(action); } +static void __kvm_cpu_online(unsigned int cpu, enum kvm_guest_cpu_action action) +{ + unsigned long flags; + + local_irq_save(flags); + kvmclock_cpu_action(action); + kvm_guest_cpu_init(); + local_irq_restore(flags); +} + +#ifdef CONFIG_SMP + static int kvm_cpu_online(unsigned int cpu) { - unsigned long flags; - - local_irq_save(flags); - kvm_guest_cpu_init(); - local_irq_restore(flags); + __kvm_cpu_online(cpu, KVM_GUEST_AP_ONLINE); return 0; } -#ifdef CONFIG_SMP - static DEFINE_PER_CPU(cpumask_var_t, __pv_cpu_mask); static bool pv_tlb_flush_supported(void) @@ -750,7 +756,7 @@ static int kvm_suspend(void *data) static void kvm_resume(void *data) { - kvm_cpu_online(raw_smp_processor_id()); + __kvm_cpu_online(raw_smp_processor_id(), KVM_GUEST_BSP_RESUME); #ifdef CONFIG_ARCH_CPUIDLE_HALTPOLL if (kvm_para_has_feature(KVM_FEATURE_POLL_CONTROL) && has_guest_poll) diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index cd65ad328637..d122912b8856 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -129,7 +129,7 @@ static void kvm_save_sched_clock_state(void) #ifdef CONFIG_SMP static void kvm_setup_secondary_clock(void) { - kvm_register_clock("secondary cpu clock"); + kvm_register_clock("secondary cpu, startup"); } #endif @@ -153,13 +153,34 @@ static void kvmclock_resume(struct clocksource *cs) void kvmclock_cpu_action(enum kvm_guest_cpu_action action) { - /* - * Don't disable kvmclock on the BSP during suspend. If kvmclock is - * being used for sched_clock, then it needs to be kept alive until the - * last minute, and restored as quickly as possible after resume. - */ - if (action != KVM_GUEST_BSP_SUSPEND) + switch (action) { + /* + * The BSP's clock is managed via clocksource suspend/resume, + * to ensure it's enabled/disabled when timekeeping needs it + * to be, e.g. before reading wallclock (which uses kvmclock). + */ + case KVM_GUEST_BSP_SUSPEND: + case KVM_GUEST_BSP_RESUME: + break; + case KVM_GUEST_AP_ONLINE: + /* + * Secondary CPUs use a dedicated hook to enable kvmclock early + * during bringup, there's nothing to be done during CPU online + * (which runs at CPUHP_AP_ONLINE_DYN). When kvmclock is being + * used as sched_clock, kvmclock must be enabled *very* early, + * and even when kvmclock is "only" being used for the main + * clocksource, it still needs to be enabled long before the + * dynamic CPUHP calls are made. + */ + break; + case KVM_GUEST_AP_OFFLINE: + case KVM_GUEST_SHUTDOWN: kvmclock_disable(); + break; + default: + WARN_ON_ONCE(1); + break; + } } /* @@ -360,7 +381,7 @@ void __init kvmclock_init(bool prefer_tsc) msr_kvm_system_time, msr_kvm_wall_clock); this_cpu_write(hv_clock_per_cpu, &hv_clock_boot[0]); - kvm_register_clock("primary cpu clock"); + kvm_register_clock("primary cpu, online"); pvclock_set_pvti_cpu0_va(hv_clock_boot); if (kvm_para_has_feature(KVM_FEATURE_CLOCKSOURCE_STABLE_BIT)) { -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:44 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:44 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322520.1588825 (Exim 4.92) (envelope-from ) id 1wSytA-00061G-FW; Fri, 29 May 2026 15:12:44 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322520.1588825; Fri, 29 May 2026 15:12:44 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSytA-000617-Bo; Fri, 29 May 2026 15:12:44 +0000 Received: by outflank-mailman (input) for mailman id 1322520; Fri, 29 May 2026 15:12:43 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyt8-0005yR-N1 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:12:43 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSyt8-00EPc7-3p for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:12:42 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19acde-bab6-0a2a0a5309dd-0a2a4506c0aa-34 for ; Fri, 29 May 2026 17:12:42 +0200 Received: from [209.85.128.41] (helo=mail-wm1-f41.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19ace9-7371-0a2a45060019-d1558029d99b-3 for ; Fri, 29 May 2026 17:12:41 +0200 Received: by mail-wm1-f41.google.com with SMTP id 5b1f17b1804b1-4905e190c71so67848755e9.3 for ; Fri, 29 May 2026 08:12:41 -0700 (PDT) Received: from EPUAKYIW02F7.. ([45.12.25.69]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-490a25e4fe7sm7305335e9.0.2026.05.29.08.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 29 May 2026 08:12:40 -0700 (PDT) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20251104 header.d=gmail.com header.i="@gmail.com" header.h="Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:Cc:To:From" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1780067561; x=1780672361; darn=lists.xenproject.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=IFaohJmJppYna9HQaa7GLrFTgGHuc8+HRVmhBeC5YQs=; b=BahTU7DAfmdvRl1t27zOKRU9Og8EZvwcleWYOj0RXsI8dn9R4yX0f18apknfhz11mh HpBbRrBkpHMsIwsd7E94B5SoULWGsX8e6jOfuldS3yriGSn7NSz68xbAeQbQAjzfdKrM 6bysRf5ZNKLIeOzJJRf6qjJrzdDaT74b379nQjaOBjlNic5Akv6yndVEobZ8gJpV9gWw HVPGr074Ko2MZE9bhw+YQims3TTx9qNEjBHXMyD8NuVmfd5RG3L0wBWz3jJSHfVjccjA HFxB9AW/gaWdlDbJPwDPhZO/I2Z1cvaZDbyYbW9fIMutcVBcQ+xoVu5omXYt5P6zK7ua OWPA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1780067561; x=1780672361; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-gg:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=IFaohJmJppYna9HQaa7GLrFTgGHuc8+HRVmhBeC5YQs=; b=WnpRUfEkWrqJLfprZ9aVbdGnh2nvWSfn5MjjHYbhm7Pq3NVNcPgOZEKrPNYErOOdtJ mhalI6ZngFgMsiKuZ2AkxPYoCahq+KpH3vGNdkmWuLhlky4abDyVOSHf6GUft5s/Iecz FkHTfHXX9qe4Yu2pPgDcGwDHhFxji8He+JODbqoItgIMmLA078Hi+pE5Y7bSqj9sbay4 smsl66aa4opMaogqR/NbNevXAzMg6AtLBTepDXE+/DrIGfeD7W/SvW8kriLqlv1HYOGK N8NRFtm/yG14c7iA5lYlRfos134W0inUC3MnfItih0jOmN8wfnBNXgOsaFhtFYxa5NaQ B/oA== X-Gm-Message-State: AOJu0YzDU7INRW9aRPw/2sBzExYbBV1JlgNIgYbahcMDjvomv3u3TLiL z14RE5Si7XQ5FNxKSUv45Re3mcQqVNZN/ryPNRVAdcWjs+bo76RdvFcB+LyBow== X-Gm-Gg: Acq92OF3w1RBff7giIxpkXBXe8MeL6OK5/1uiayH3KOrxnnC0E23Wo4czxSDIulfnva BdyLTep+qs4soce05eRnC6i8XRaHcqR5elH9usaRvHkSds4ooa9tb6OS7gRvQ010xlkJgDlqW3p Nz2bqZcIz55Z931/557xcUzViBFPZ/R0nhKKae37P2iOggz9BaO8KSe5qYb6z4BBavpesHFV8Ct 7skgsnK4QdLaBusEVD9Dhhdnb9LcCRepaGo4eW0ZPEQQKSdk050ea1GdYEQ2PXfY89nLHpN7bWo 4hp3MrU/cCwB1snMw1gZcSFxSaQbAsenS3uA2QGGmNqukTVakrnpPhezF1VaOONDrUoUqc7FQ6Y iwqFvQ+xqMPa8KQS2TBa8BsCLVMLIqjvOQ8ai8u95chb35XSmR1e0heeJV4zGjjmdG/kElmqCzH EUIvMcK8yVXNgdUunZHGidomCB2j/URH0wMhax X-Received: by 2002:a05:600c:4e92:b0:490:8fd1:72a with SMTP id 5b1f17b1804b1-490a2900dacmr1227315e9.3.1780067560514; Fri, 29 May 2026 08:12:40 -0700 (PDT) From: Mykola Kvach To: xen-devel@lists.xenproject.org Cc: Mykola Kvach , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk , Andrew Cooper , Anthony PERARD , Jan Beulich , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= Subject: [PATCH for-4.22] device-tree: validate first hwdom bank for boot modules Date: Fri, 29 May 2026 18:10:33 +0300 Message-ID: <4f862bb2dc323914b8120b0f16af7516140cf42b.1780065103.git.mykola_kvach@epam.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1780067561-85160D75-28A439F6/0/0 X-purgate-type: clean X-purgate-size: 16430 From: Mykola Kvach With LLC coloring enabled, the hardware domain memory is allocated by allocate_hwdom_memory() rather than by using the fixed direct-map layout. Commit de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") made that allocator prefer lower host regions. The first-bank filter, however, still only checked the old 128MB heuristic. A low region can satisfy that heuristic but still be too small, or otherwise unsuitable, for the hardware-domain kernel and the DTB/initrd module area to fit in bank 0 according to the Arm placement rules. Keep the existing first-bank size policy and add an architecture-specific candidate check. On Arm, compute the kernel load address for the candidate bank using the same logic as kernel_zimage_place(), verify that the kernel range is covered by that bank, and then reuse the same module-placement helper as place_modules(). The FDT is generated later, so use the hardware-domain FDT allocation size as a conservative upper bound for the final DTB size. Check the candidate after capping the host region by the remaining unassigned hardware-domain memory, so the validation is performed against the size that would actually become bank 0. This keeps the DMA-oriented allocation policy from de99f3263555 while preventing a too-small bank 0 from reaching place_modules(). Fixes: de99f3263555 ("device-tree: Improve hwdom memory allocation for DMA") Signed-off-by: Mykola Kvach --- Changes since RFC: - Do not keep the RFC scalar minimum-size check. It can both reject valid layouts and accept layouts which still fail later. Instead, validate the candidate bank using the same kernel and module placement rules as the load path. Replace the scalar minimum-size check with arch_hwdom_first_bank_ok(). - Reuse the existing Arm kernel and DTB/initrd placement rules for the first-bank candidate check. - Treat the hardware-domain FDT allocation size as a conservative upper bound because the final FDT is generated later. Link to RFC: https://patchew.org/Xen/9ae4f7dd49f5b1f761193adae573c2675c92e883.1779051035.git.mykola._5Fkvach@epam.com/ Why the RFC scalar approach was not kept: A simple minimum-size check is not sufficient here because the validity of the first bank depends on the actual Arm placement rules, not only on the aggregate size of the kernel, DTB and initrd. The DTB/initrd area may fit before a 64-bit Image loaded with a text offset, while an AArch32 position-independent kernel may leave no valid module location even when the aggregate size appears to fit. Fixed-address kernels also need the candidate bank start to be considered. Link to synthetic tests output: https://gitlab.com/xen-project/people/mykola_kvach/xen/-/blob/fix/hwdom-first-bank-dom0-modules-v2-new/tools/tests/arm-boot-modules/test-arm-boot-modules.log?ref_type=heads --- xen/arch/arm/acpi/domain_build.c | 2 - xen/arch/arm/domain_build.c | 8 ++ xen/arch/arm/include/asm/domain_build.h | 4 + xen/arch/arm/include/asm/kernel.h | 9 ++ xen/arch/arm/kernel.c | 179 ++++++++++++++++++------ xen/common/device-tree/domain-build.c | 24 +++- xen/include/xen/fdt-kernel.h | 9 ++ 7 files changed, 182 insertions(+), 53 deletions(-) diff --git a/xen/arch/arm/acpi/domain_build.c b/xen/arch/arm/acpi/domain_build.c index 249d899c33..db16f7fa94 100644 --- a/xen/arch/arm/acpi/domain_build.c +++ b/xen/arch/arm/acpi/domain_build.c @@ -26,8 +26,6 @@ #undef virt_to_mfn #define virt_to_mfn(va) _mfn(__virt_to_mfn(va)) -#define ACPI_DOM0_FDT_MIN_SIZE 4096 - static int __init acpi_iomem_deny_access(struct domain *d) { acpi_status status; diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 1efddc60ef..550617f152 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -115,6 +115,14 @@ int __init parse_arch_dom0_param(const char *s, const char *e) (IS_ENABLED(CONFIG_STATIC_SHM) ? \ (NR_SHMEM_BANKS * (160 + 16)) : 0)) +paddr_t __init hwdom_get_fdt_alloc_size(void) +{ + if ( acpi_disabled ) + return fdt_totalsize(device_tree_flattened) + DOM0_FDT_EXTRA_SIZE; + + return ACPI_DOM0_FDT_MIN_SIZE; +} + unsigned int __init dom0_max_vcpus(void) { if ( opt_dom0_max_vcpus == 0 ) diff --git a/xen/arch/arm/include/asm/domain_build.h b/xen/arch/arm/include/asm/domain_build.h index df8b361b3d..85cf46a958 100644 --- a/xen/arch/arm/include/asm/domain_build.h +++ b/xen/arch/arm/include/asm/domain_build.h @@ -19,6 +19,10 @@ int prepare_acpi(struct domain *d, struct kernel_info *kinfo); int add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data); +#define ACPI_DOM0_FDT_MIN_SIZE 4096 + +paddr_t hwdom_get_fdt_alloc_size(void); + #if defined(CONFIG_MPU) && defined(CONFIG_ARM_64) /* Utility function to determine if an Armv8-R processor supports VMSA. */ bool has_v8r_vmsa_support(void); diff --git a/xen/arch/arm/include/asm/kernel.h b/xen/arch/arm/include/asm/kernel.h index 21f4273fa1..bf14fb208a 100644 --- a/xen/arch/arm/include/asm/kernel.h +++ b/xen/arch/arm/include/asm/kernel.h @@ -8,12 +8,21 @@ #include +#include + +struct kernel_info; + struct arch_kernel_info { /* Enable pl011 emulation */ bool vpl011; }; +#define arch_hwdom_first_bank_ok arch_hwdom_first_bank_ok +bool arch_hwdom_first_bank_ok(const struct kernel_info *info, + paddr_t bank_start, + paddr_t bank_size); + #endif /* #ifdef __ARCH_ARM_KERNEL_H__ */ /* diff --git a/xen/arch/arm/kernel.c b/xen/arch/arm/kernel.c index b72585b7fe..907239a246 100644 --- a/xen/arch/arm/kernel.c +++ b/xen/arch/arm/kernel.c @@ -40,27 +40,67 @@ struct minimal_dtb_header { /* There are other fields but we don't use them yet. */ }; -static void __init place_modules(struct kernel_info *info, - paddr_t kernbase, paddr_t kernend) +static paddr_t __init +kernel_zimage_place_in_bank(const struct kernel_info *info, + paddr_t bank_start, paddr_t bank_size) { - /* Align DTB and initrd size to 2Mb. Linux only requires 4 byte alignment */ - const struct boot_module *mod = info->bd.initrd; - const struct membanks *mem = kernel_info_get_mem(info); - const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); - const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), MB(2)); - const paddr_t modsize = initrd_len + dtb_len; + paddr_t load_addr; - /* Convenient */ - const paddr_t rambase = mem->bank[0].start; - const paddr_t ramsize = mem->bank[0].size; - const paddr_t ramend = rambase + ramsize; +#ifdef CONFIG_HAS_DOMAIN_TYPE + if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) + return bank_start + info->image.text_offset; +#endif + + /* + * If start is zero, the zImage is position independent, in this + * case Documentation/arm/Booting recommends loading below 128MiB + * and above 32MiB. Load it as high as possible within these + * constraints, while also avoiding the DTB. + */ + if ( info->image.start == 0 ) + { + paddr_t load_end; + paddr_t ram128mb; + + ram128mb = bank_start + MB(128); + load_end = bank_start + bank_size; + load_end = min(ram128mb, load_end); + + if ( load_end - bank_start < info->image.len ) + return INVALID_PADDR; + + load_addr = load_end - info->image.len; + /* Align to 2MB */ + load_addr &= ~(MB(2) - 1); + if ( load_addr < bank_start ) + return INVALID_PADDR; + } + else + load_addr = info->image.start; + + return load_addr; +} + +static bool __init +first_bank_has_enough_room(paddr_t ramsize, paddr_t kernbase, + paddr_t kernend, paddr_t modsize) +{ const paddr_t kernsize = ROUNDUP(kernend, MB(2)) - kernbase; - const paddr_t ram128mb = rambase + MB(128); - paddr_t modbase; + /* + * Check only the aggregate kernel/module footprint. The actual DTB/initrd + * location is selected by find_module_placement(). + */ + return modsize + kernsize <= ramsize; +} - if ( modsize + kernsize > ramsize ) - panic("Not enough memory in the first bank for the kernel+dtb+initrd\n"); +static bool __init +find_module_placement(paddr_t rambase, paddr_t ramsize, + paddr_t kernbase, paddr_t kernend, + paddr_t modsize, paddr_t *modbase) +{ + const paddr_t ramend = rambase + ramsize; + const paddr_t ram128mb = rambase + MB(128); /* * DTB must be loaded such that it does not conflict with the @@ -80,17 +120,49 @@ static void __init place_modules(struct kernel_info *info, * tools/libxc/xc_dom_arm.c:arch_setup_meminit as well. */ if ( ramend >= ram128mb + modsize && kernend < ram128mb ) - modbase = ram128mb; - else if ( ramend - modsize > ROUNDUP(kernend, MB(2)) ) - modbase = ramend - modsize; - else if ( kernbase - rambase > modsize ) - modbase = kernbase - modsize; - else { - panic("Unable to find suitable location for dtb+initrd\n"); - return; + *modbase = ram128mb; + return true; + } + + if ( ramend - modsize > ROUNDUP(kernend, MB(2)) ) + { + *modbase = ramend - modsize; + return true; + } + + if ( kernbase - rambase > modsize ) + { + *modbase = kernbase - modsize; + return true; } + return false; +} + +static void __init place_modules(struct kernel_info *info, + paddr_t kernbase, paddr_t kernend) +{ + /* Align DTB and initrd size to 2Mb. Linux only requires 4 byte alignment */ + const struct boot_module *mod = info->bd.initrd; + const struct membanks *mem = kernel_info_get_mem(info); + const paddr_t initrd_len = ROUNDUP(mod ? mod->size : 0, MB(2)); + const paddr_t dtb_len = ROUNDUP(fdt_totalsize(info->fdt), MB(2)); + const paddr_t modsize = initrd_len + dtb_len; + + /* Convenient */ + const paddr_t rambase = mem->bank[0].start; + const paddr_t ramsize = mem->bank[0].size; + + paddr_t modbase; + + if ( !first_bank_has_enough_room(ramsize, kernbase, kernend, modsize) ) + panic("Not enough memory in the first bank for the kernel+dtb+initrd\n"); + + if ( !find_module_placement(rambase, ramsize, kernbase, kernend, modsize, + &modbase) ) + panic("Unable to find suitable location for dtb+initrd\n"); + info->dtb_paddr = modbase; info->initrd_paddr = info->dtb_paddr + dtb_len; } @@ -100,32 +172,51 @@ static paddr_t __init kernel_zimage_place(struct kernel_info *info) const struct membanks *mem = kernel_info_get_mem(info); paddr_t load_addr; -#ifdef CONFIG_HAS_DOMAIN_TYPE - if ( (info->type == DOMAIN_64BIT) && (info->image.start == 0) ) - return mem->bank[0].start + info->image.text_offset; -#endif + load_addr = kernel_zimage_place_in_bank(info, mem->bank[0].start, + mem->bank[0].size); + if ( load_addr == INVALID_PADDR ) + panic("Unable to find suitable location for the kernel\n"); + return load_addr; +} + +bool __init arch_hwdom_first_bank_ok(const struct kernel_info *info, + paddr_t bank_start, + paddr_t bank_size) +{ + const struct boot_module *initrd = info->bd.initrd; /* - * If start is zero, the zImage is position independent, in this - * case Documentation/arm/Booting recommends loading below 128MiB - * and above 32MiB. Load it as high as possible within these - * constraints, while also avoiding the DTB. + * place_modules() rounds the DTB and initrd placement to 2MB boundaries; + * use the same granularity when checking whether the first bank can hold + * the boot modules. */ - if ( info->image.start == 0 ) - { - paddr_t load_end; + const paddr_t initrd_len = ROUNDUP(initrd ? initrd->size : 0, MB(2)); + /* + * The hardware domain FDT has not been generated yet. Use the allocation + * size as a conservative upper bound for the final DTB size. + */ + const paddr_t dtb_len = ROUNDUP(hwdom_get_fdt_alloc_size(), MB(2)); + const paddr_t rambase = bank_start; + const paddr_t ramsize = bank_size; + const paddr_t modsize = initrd_len + dtb_len; + const paddr_t ramend = rambase + ramsize; + paddr_t kernbase; + paddr_t kernend; + paddr_t modbase; - load_end = mem->bank[0].start + mem->bank[0].size; - load_end = MIN(mem->bank[0].start + MB(128), load_end); + kernbase = kernel_zimage_place_in_bank(info, bank_start, bank_size); + if ( kernbase == INVALID_PADDR || + info->image.len > INVALID_PADDR - kernbase ) + return false; - load_addr = load_end - info->image.len; - /* Align to 2MB */ - load_addr &= ~((2 << 20) - 1); - } - else - load_addr = info->image.start; + kernend = kernbase + info->image.len; - return load_addr; + if ( kernbase < rambase || kernend > ramend ) + return false; + + return first_bank_has_enough_room(ramsize, kernbase, kernend, modsize) && + find_module_placement(rambase, ramsize, kernbase, kernend, modsize, + &modbase); } static void __init kernel_zimage_load(struct kernel_info *info) diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 2a760b007b..25bc392fea 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -299,20 +299,30 @@ static bool __init allocate_hwdom_memory(struct kernel_info *kinfo) for ( i = 0; (kinfo->unassigned_mem > 0) && (i < nr_banks); i++ ) { - paddr_t bank_size; + const paddr_t bank_start = hwdom_free_mem->bank[i].start; + paddr_t bank_size = hwdom_free_mem->bank[i].size; + + /* + * Check the size that would actually be assigned, not just the size + * of the host region. + */ + bank_size = min(bank_size, kinfo->unassigned_mem); /* * The first bank must be large enough for place_modules() to * fit the kernel, DTB and initrd. Skip small regions to avoid * ending up with a tiny first bank. */ - if ( !mem->nr_banks && (hwdom_free_mem->bank[i].size < min_bank_size) ) - continue; + if ( !mem->nr_banks ) + { + if ( bank_size < min_bank_size ) + continue; + + if ( !arch_hwdom_first_bank_ok(kinfo, bank_start, bank_size) ) + continue; + } - bank_size = MIN(hwdom_free_mem->bank[i].size, kinfo->unassigned_mem); - if ( !allocate_bank_memory(kinfo, - gaddr_to_gfn(hwdom_free_mem->bank[i].start), - bank_size) ) + if ( !allocate_bank_memory(kinfo, gaddr_to_gfn(bank_start), bank_size) ) { xfree(hwdom_free_mem); return false; diff --git a/xen/include/xen/fdt-kernel.h b/xen/include/xen/fdt-kernel.h index 00c37be101..86f2a69ede 100644 --- a/xen/include/xen/fdt-kernel.h +++ b/xen/include/xen/fdt-kernel.h @@ -93,6 +93,15 @@ kernel_info_get_mem_const(const struct kernel_info *kinfo) return container_of(&kinfo->mem.common, const struct membanks, common); } +#ifndef arch_hwdom_first_bank_ok +static inline bool +arch_hwdom_first_bank_ok(const struct kernel_info *info, paddr_t bank_start, + paddr_t bank_size) +{ + return true; +} +#endif + #ifndef KERNEL_INFO_SHM_MEM_INIT #ifdef CONFIG_STATIC_SHM -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:57 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:57 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322531.1588833 (Exim 4.92) (envelope-from ) id 1wSytM-0006oc-Tm; Fri, 29 May 2026 15:12:56 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322531.1588833; Fri, 29 May 2026 15:12:56 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSytM-0006oU-PC; Fri, 29 May 2026 15:12:56 +0000 Received: by outflank-mailman (input) for mailman id 1322531; Fri, 29 May 2026 15:12:55 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from <3yKsZagYKCd0RD9MIBFNNFKD.BNLWDM-CDUDKKHRSR.WDMOQNIDBS.NQF@flex--seanjc.bounces.google.com>) id 1wSytL-0006hh-NO for xen-devel@lists.xenproject.org; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1780067274-A8979161-B7B4A640/13/0 X-purgate-type: clean X-purgate-size: 1103 NOP-ify the x86_platform sched_clock save/restore hooks when setting up Xen's PV clock to make it somewhat obvious the hooks aren't used when running as a Xen guest (Xen uses a paravirtualized suspend/resume flow). Signed-off-by: Sean Christopherson --- arch/x86/xen/time.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 36d66abf5379..640b71d22d97 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -578,6 +578,12 @@ static void __init xen_init_time_common(void) xen_sched_clock_offset = xen_clocksource_read(); static_call_update(pv_steal_clock, xen_steal_clock); paravirt_set_sched_clock(xen_sched_clock); + /* + * Xen has paravirtualized suspend/resume and so doesn't use the common + * x86 sched_clock save/restore hooks. + */ + x86_platform.save_sched_clock_state = x86_init_noop; + x86_platform.restore_sched_clock_state = x86_init_noop; x86_init.hyper.get_tsc_khz = xen_tsc_khz; x86_platform.get_wallclock = xen_get_wallclock; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:12:59 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:12:59 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322536.1588843 (Exim 4.92) (envelope-from ) id 1wSytP-00079M-4t; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-d25034/1780067277-F4C79CF5-66475477/13/0 X-purgate-type: clean X-purgate-size: 1213 NOP-ify the sched_clock save/restore hooks when using VMware's version of sched_clock. This will allow extending paravirt_set_sched_clock() to set the save/restore hooks, without having to simultaneously change the behavior of VMware guests. Note, it's not at all obvious that it's safe/correct for VMware guests to do nothing on suspend/resume, but that's a pre-existing problem. Leave it for a VMware expert to sort out. Signed-off-by: Sean Christopherson --- arch/x86/kernel/cpu/vmware.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 2d0624c66799..051ef89029a7 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -347,8 +347,11 @@ static void __init vmware_paravirt_ops_setup(void) vmware_cyc2ns_setup(); - if (vmw_sched_clock) + if (vmw_sched_clock) { paravirt_set_sched_clock(vmware_sched_clock); + x86_platform.save_sched_clock_state = x86_init_noop; + x86_platform.restore_sched_clock_state = x86_init_noop; + } if (vmware_is_stealclock_available()) { has_steal_clock = true; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:13:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:13:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322544.1588852 (Exim 4.92) (envelope-from ) id 1wSytV-0007hF-As; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-4011c0/1780067282-73F798B7-162069EE/13/0 X-purgate-type: clean X-purgate-size: 5715 Pass in a PV clock's save/restore helpers when configuring sched_clock instead of relying on each PV clock to manually set the save/restore hooks. In addition to bringing sanity to the code, this will allow gracefully "rejecting" a PV sched_clock, e.g. when running as a CoCo guest that has access to a "secure" TSC. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 9 ++++++--- arch/x86/kernel/cpu/vmware.c | 8 +++----- arch/x86/kernel/kvmclock.c | 6 +++--- arch/x86/kernel/tsc.c | 5 ++++- arch/x86/xen/time.c | 5 ++--- drivers/clocksource/hyperv_timer.c | 6 ++---- 6 files changed, 20 insertions(+), 19 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index fe41d40a9ae6..e97cd1ae03d1 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,11 +14,14 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable); +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)); -static inline void paravirt_set_sched_clock(u64 (*func)(void)) +static inline void paravirt_set_sched_clock(u64 (*func)(void), + void (*save)(void), + void (*restore)(void)) { - __paravirt_set_sched_clock(func, true); + __paravirt_set_sched_clock(func, true, save, restore); } #endif diff --git a/arch/x86/kernel/cpu/vmware.c b/arch/x86/kernel/cpu/vmware.c index 051ef89029a7..f3ffc05c7c53 100644 --- a/arch/x86/kernel/cpu/vmware.c +++ b/arch/x86/kernel/cpu/vmware.c @@ -347,11 +347,9 @@ static void __init vmware_paravirt_ops_setup(void) vmware_cyc2ns_setup(); - if (vmw_sched_clock) { - paravirt_set_sched_clock(vmware_sched_clock); - x86_platform.save_sched_clock_state = x86_init_noop; - x86_platform.restore_sched_clock_state = x86_init_noop; - } + if (vmw_sched_clock) + paravirt_set_sched_clock(vmware_sched_clock, + x86_init_noop, x86_init_noop); if (vmware_is_stealclock_available()) { has_steal_clock = true; diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 0d4f2cf97246..05bca2be0df3 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -137,7 +137,9 @@ static void kvm_restore_sched_clock_state(void) static inline void kvm_sched_clock_init(bool stable) { kvm_sched_clock_offset = kvm_clock_read(); - __paravirt_set_sched_clock(kvm_sched_clock_read, stable); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable, + kvm_save_sched_clock_state, + kvm_restore_sched_clock_state); pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); @@ -345,8 +347,6 @@ void __init kvmclock_init(bool prefer_tsc) #ifdef CONFIG_SMP x86_cpuinit.early_percpu_clock_init = kvm_setup_secondary_clock; #endif - x86_platform.save_sched_clock_state = kvm_save_sched_clock_state; - x86_platform.restore_sched_clock_state = kvm_restore_sched_clock_state; kvm_get_preset_lpj(); /* diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 19da1a3d2126..7fbcfc2efd1d 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,12 +280,15 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void __paravirt_set_sched_clock(u64 (*func)(void), bool stable) +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable, + void (*save)(void), void (*restore)(void)) { if (!stable) clear_sched_clock_stable(); static_call_update(pv_sched_clock, func); + x86_platform.save_sched_clock_state = save; + x86_platform.restore_sched_clock_state = restore; } #else u64 sched_clock_noinstr(void) __attribute__((alias("native_sched_clock"))); diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 640b71d22d97..91ef83b1e540 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -577,13 +577,12 @@ static void __init xen_init_time_common(void) { xen_sched_clock_offset = xen_clocksource_read(); static_call_update(pv_steal_clock, xen_steal_clock); - paravirt_set_sched_clock(xen_sched_clock); + /* * Xen has paravirtualized suspend/resume and so doesn't use the common * x86 sched_clock save/restore hooks. */ - x86_platform.save_sched_clock_state = x86_init_noop; - x86_platform.restore_sched_clock_state = x86_init_noop; + paravirt_set_sched_clock(xen_sched_clock, x86_init_noop, x86_init_noop); x86_init.hyper.get_tsc_khz = xen_tsc_khz; x86_platform.get_wallclock = xen_get_wallclock; diff --git a/drivers/clocksource/hyperv_timer.c b/drivers/clocksource/hyperv_timer.c index ac1d9f9c381c..dee59ce61c29 100644 --- a/drivers/clocksource/hyperv_timer.c +++ b/drivers/clocksource/hyperv_timer.c @@ -553,10 +553,8 @@ static void hv_restore_sched_clock_state(void) static __always_inline void hv_setup_sched_clock(void *sched_clock) { /* We're on x86/x64 *and* using PV ops */ - paravirt_set_sched_clock(sched_clock); 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Fri, 29 May 2026 08:08:06 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:08:03 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150803.714504-1-seanjc@google.com> Subject: [PATCH v4 35/47] x86/xen/time: Mark xen_setup_vsyscall_time_info() as __init From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-42698a/1780067289-12573F3B-A54021A6/13/0 X-purgate-type: clean X-purgate-size: 879 Annotate xen_setup_vsyscall_time_info() as being used only during kernel initialization; it's called only by xen_time_init(), which is already tagged __init. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/xen/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/xen/time.c b/arch/x86/xen/time.c index 91ef83b1e540..8f4511f91d16 100644 --- a/arch/x86/xen/time.c +++ b/arch/x86/xen/time.c @@ -454,7 +454,7 @@ void xen_restore_time_memory_area(void) xen_sched_clock_offset = xen_clocksource_read() - xen_clock_value_saved; } -static void xen_setup_vsyscall_time_info(void) +static void __init xen_setup_vsyscall_time_info(void) { struct vcpu_register_time_memory_area t; struct pvclock_vsyscall_time_info *ti; -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:13:17 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:13:17 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322555.1588870 (Exim 4.92) (envelope-from ) id 1wSyth-00008j-3h; Fri, 29 May 2026 15:13:17 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322555.1588870; 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Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-c201ff/1780067294-DBF66443-8BD9AEF0/13/0 X-purgate-type: clean X-purgate-size: 780 WARN if the common PV clock valid_flags are overwritten; all PV clocks expect that they are the one and only PV clock, i.e. don't guard against another PV clock having modified the flags. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/kernel/pvclock.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kernel/pvclock.c b/arch/x86/kernel/pvclock.c index a51adce67f92..8d098841a225 100644 --- a/arch/x86/kernel/pvclock.c +++ b/arch/x86/kernel/pvclock.c @@ -21,6 +21,7 @@ static struct pvclock_vsyscall_time_info *pvti_cpu0_va __ro_after_init; void __init pvclock_set_flags(u8 flags) { + WARN_ON(valid_flags); valid_flags = flags; } -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:13:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:13:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322561.1588879 (Exim 4.92) (envelope-from ) id 1wSytp-0000oG-Bc; Fri, 29 May 2026 15:13:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322561.1588879; Fri, 29 May 2026 15:13:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSytp-0000o6-88; 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Fri, 29 May 2026 08:07:20 -0700 (PDT) Reply-To: Sean Christopherson Date: Fri, 29 May 2026 08:07:00 -0700 In-Reply-To: <20260529144435.704127-1-seanjc@google.com> Mime-Version: 1.0 References: <20260529144435.704127-1-seanjc@google.com> X-Mailer: git-send-email 2.54.0.823.g6e5bcc1fc9-goog Message-ID: <20260529150700.713953-1-seanjc@google.com> Subject: [PATCH v4 28/47] x86/paravirt: Move handling of unstable PV clocks into paravirt_set_sched_clock() From: Sean Christopherson To: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , Sean Christopherson , "K . Y . Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz Cc: "H . Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-720697/1780067242-81971161-5FBEF42C/0/0 X-purgate-type: clean X-purgate-size: 2567 Move the handling of unstable PV clocks, of which kvmclock is the only example, into paravirt_set_sched_clock(). This will allow modifying paravirt_set_sched_clock() to keep using the TSC for sched_clock in certain scenarios without unintentionally marking the TSC-based clock as unstable. No functional change intended. Reviewed-by: David Woodhouse Signed-off-by: Sean Christopherson --- arch/x86/include/asm/timer.h | 7 ++++++- arch/x86/kernel/kvmclock.c | 5 +---- arch/x86/kernel/tsc.c | 5 ++++- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h index c71b466d6ace..fe41d40a9ae6 100644 --- a/arch/x86/include/asm/timer.h +++ b/arch/x86/include/asm/timer.h @@ -14,7 +14,12 @@ extern int no_timer_check; extern bool using_native_sched_clock(void); #ifdef CONFIG_PARAVIRT -void paravirt_set_sched_clock(u64 (*func)(void)); +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable); + +static inline void paravirt_set_sched_clock(u64 (*func)(void)) +{ + __paravirt_set_sched_clock(func, true); +} #endif /* diff --git a/arch/x86/kernel/kvmclock.c b/arch/x86/kernel/kvmclock.c index 13c4be3a7f0a..4e50e75ff43d 100644 --- a/arch/x86/kernel/kvmclock.c +++ b/arch/x86/kernel/kvmclock.c @@ -12,7 +12,6 @@ #include #include #include -#include #include #include #include @@ -94,10 +93,8 @@ static noinstr u64 kvm_sched_clock_read(void) static inline void kvm_sched_clock_init(bool stable) { - if (!stable) - clear_sched_clock_stable(); kvm_sched_clock_offset = kvm_clock_read(); - paravirt_set_sched_clock(kvm_sched_clock_read); + __paravirt_set_sched_clock(kvm_sched_clock_read, stable); pr_info("kvm-clock: using sched offset of %llu cycles", kvm_sched_clock_offset); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 888bd1cbd9bc..a9b6d3399c23 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -280,8 +280,11 @@ bool using_native_sched_clock(void) return static_call_query(pv_sched_clock) == native_sched_clock; } -void paravirt_set_sched_clock(u64 (*func)(void)) +void __paravirt_set_sched_clock(u64 (*func)(void), bool stable) { + if (!stable) + clear_sched_clock_stable(); + static_call_update(pv_sched_clock, func); } #else -- 2.54.0.823.g6e5bcc1fc9-goog From xen-devel-bounces@lists.xenproject.org Fri May 29 15:17:16 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:17:16 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322604.1588888 (Exim 4.92) (envelope-from ) id 1wSyxV-0002Pe-R4; Fri, 29 May 2026 15:17:13 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322604.1588888; Fri, 29 May 2026 15:17:13 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyxV-0002PX-OC; Fri, 29 May 2026 15:17:13 +0000 Received: by outflank-mailman (input) for mailman id 1322604; Fri, 29 May 2026 15:17:12 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSyxT-0002Nu-Rn for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:17:11 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSyxS-0013rR-U3 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:17:10 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19ade1-e002-0a2a0a5209dd-0a2a450588bc-26 for ; Fri, 29 May 2026 17:17:10 +0200 Received: from [209.85.208.51] (helo=mail-ed1-f51.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19adf6-aaa8-0a2a45050019-d155d033dc9e-3 for ; Fri, 29 May 2026 17:17:10 +0200 Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-67e9e343b22so19114113a12.0 for ; Fri, 29 May 2026 08:17:10 -0700 (PDT) Received: from ?IPV6:2a00:12d0:af5d:ad01:5d3f:14e6:9bcb:5112? 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Daniel Lezcano , John Stultz , "H. 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Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Daniel Lezcano , John Stultz , "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Message-ID: Subject: Re: [PATCH v4 00/47] x86: Try to wrangle PV clocks vs. TSC References: <20260529144435.704127-1-seanjc@google.com> In-Reply-To: --------------vmiXLelkdEtqIjil5foIfm8r Content-Type: multipart/mixed; boundary="------------puKE5E0qrmVaohkfi4bPDSIF" --------------puKE5E0qrmVaohkfi4bPDSIF Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: base64 T24gMjkuMDUuMjYgMTc6MTAsIFNlYW4gQ2hyaXN0b3BoZXJzb24gd3JvdGU6DQo+IE9uIEZy aSwgTWF5IDI5LCAyMDI2LCBTZWFuIENocmlzdG9waGVyc29uIHdyb3RlOg0KPj4gV2VsbCwg dGhlIG51bWJlciBvZiBwYXRjaGVzIGluIHRoZSBzZXJpZXMgaXMgZ29pbmcgaW4gdGhlIHdy b25nIGRpcmVjdGlvbiwNCj4+IGJ1dCBJJ20gbXVjaCBoYXBwaWVyIHdpdGggdGhpcyB2ZXJz aW9uLCB3aGljaCBlc2NoZXdzIHRoZSB4ODZfcGxhdGZvcm0NCj4+IG92ZXJyaWRlcyBlbnRp cmVseSBpbiBmYXZvciBvZiBhIGZpeGVkIHNlcXVlbmNlIGZvciBzZWxlY3RpbmcgdGhlIFRT Qy9DUFUNCj4+IGZyZXF1ZW5jeSAicm91dGluZSIuDQo+IA0KPiBGWUksIG91ciBpbnRlcm5h bCBtYWlsIHNlcnZlciBmbGFtZWQgb3V0IGFmdGVyIHNlbmRpbmcgcGF0Y2ggMjYgaW4gdGhl IGluaXRpYWwNCj4gZ28uICBJJ20gcHJldHR5IHN1cmUgSSBtYW5hZ2VkIHRvIGdldCB0aGUg cmVzdCBzZW50IHdpdGhvdXQgc2NyZXdpbmcgdXAgdGhlDQo+IHRocmVhZGluZy4gIEhvbGxl ciBpZiBzb21ldGhpbmcgaXMgd29ua3kgYW5kIEknbGwgUkVTRU5EIHRoZSB3aG9sZSBwaWxl IGlmIG5lY2Vzc2FyeS4NCg0KTG9va3MgZmluZSBvbiBteSBzaWRlLg0KDQoNCkp1ZXJnZW4N Cg== --------------puKE5E0qrmVaohkfi4bPDSIF Content-Type: application/pgp-keys; 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name="OpenPGP_signature.asc" Content-Description: OpenPGP digital signature Content-Disposition: attachment; filename="OpenPGP_signature.asc" -----BEGIN PGP SIGNATURE----- wsB5BAABCAAjFiEEhRJncuj2BJSl0Jf3sN6d1ii/Ey8FAmoZrfMFAwAAAAAACgkQsN6d1ii/Ey+/ /gf/cTMfwxMSsyaONXXUw4+xZ50QMaKOi/uNkdrkdNlCp3/GO7aLZEpnVr2wgZT6WT3a4x/5Z5iI /ynF2igzSaImMlKFvwrMxUFI8tZQXkwVTyO/Mmj3xe6hqMN5Zkq1OuRXyj5dgSTf5sqNXsAcGm5X NKSfWdmdXwKE+mDA+ysfH545ZOYfQuWGS7xipiPBbgaz7mQ0yItWc3pNo9dSdcygj1IjeqJiyOoa NkhA0l1otsL3pcqflLwkvKIjV/KEdZTM5BbCN2i/f2sP6S2HPhauZCuUmpKvFf7ymkdQ/8nGwjQt Fvcmxlp+M5qj0+qF8DOgNdmRfKkm3eFdbWBZkSESjw== =sM5P -----END PGP SIGNATURE----- --------------aYuk5CIBTXJNjobrT9M3zkNr-- From xen-devel-bounces@lists.xenproject.org Fri May 29 15:21:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:21:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322613.1588896 (Exim 4.92) (envelope-from ) id 1wSz1B-0005hg-Dv; Fri, 29 May 2026 15:21:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322613.1588896; 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keydata= xsFNBFLhNn8BEADVhE+Hb8i0GV6mihnnr/uiQQdPF8kUoFzCOPXkf7jQ5sLYeJa0cQi6Penp VtiFYznTairnVsN5J+ujSTIb+OlMSJUWV4opS7WVNnxHbFTPYZVQ3erv7NKc2iVizCRZ2Kxn srM1oPXWRic8BIAdYOKOloF2300SL/bIpeD+x7h3w9B/qez7nOin5NzkxgFoaUeIal12pXSR Q354FKFoy6Vh96gc4VRqte3jw8mPuJQpfws+Pb+swvSf/i1q1+1I4jsRQQh2m6OTADHIqg2E ofTYAEh7R5HfPx0EXoEDMdRjOeKn8+vvkAwhviWXTHlG3R1QkbE5M/oywnZ83udJmi+lxjJ5 YhQ5IzomvJ16H0Bq+TLyVLO/VRksp1VR9HxCzItLNCS8PdpYYz5TC204ViycobYU65WMpzWe LFAGn8jSS25XIpqv0Y9k87dLbctKKA14Ifw2kq5OIVu2FuX+3i446JOa2vpCI9GcjCzi3oHV e00bzYiHMIl0FICrNJU0Kjho8pdo0m2uxkn6SYEpogAy9pnatUlO+erL4LqFUO7GXSdBRbw5 gNt25XTLdSFuZtMxkY3tq8MFss5QnjhehCVPEpE6y9ZjI4XB8ad1G4oBHVGK5LMsvg22PfMJ ISWFSHoF/B5+lHkCKWkFxZ0gZn33ju5n6/FOdEx4B8cMJt+cWwARAQABzSlBbmRyZXcgQ29v cGVyIDxhbmRyZXcuY29vcGVyM0BjaXRyaXguY29tPsLBegQTAQgAJAIbAwULCQgHAwUVCgkI CwUWAgMBAAIeAQIXgAUCWKD95wIZAQAKCRBlw/kGpdefoHbdD/9AIoR3k6fKl+RFiFpyAhvO 59ttDFI7nIAnlYngev2XUR3acFElJATHSDO0ju+hqWqAb8kVijXLops0gOfqt3VPZq9cuHlh IMDquatGLzAadfFx2eQYIYT+FYuMoPZy/aTUazmJIDVxP7L383grjIkn+7tAv+qeDfE+txL4 SAm1UHNvmdfgL2/lcmL3xRh7sub3nJilM93RWX1Pe5LBSDXO45uzCGEdst6uSlzYR/MEr+5Z JQQ32JV64zwvf/aKaagSQSQMYNX9JFgfZ3TKWC1KJQbX5ssoX/5hNLqxMcZV3TN7kU8I3kjK mPec9+1nECOjjJSO/h4P0sBZyIUGfguwzhEeGf4sMCuSEM4xjCnwiBwftR17sr0spYcOpqET ZGcAmyYcNjy6CYadNCnfR40vhhWuCfNCBzWnUW0lFoo12wb0YnzoOLjvfD6OL3JjIUJNOmJy RCsJ5IA/Iz33RhSVRmROu+TztwuThClw63g7+hoyewv7BemKyuU6FTVhjjW+XUWmS/FzknSi dAG+insr0746cTPpSkGl3KAXeWDGJzve7/SBBfyznWCMGaf8E2P1oOdIZRxHgWj0zNr1+ooF /PzgLPiCI4OMUttTlEKChgbUTQ+5o0P080JojqfXwbPAyumbaYcQNiH1/xYbJdOFSiBv9rpt TQTBLzDKXok86M7BTQRS4TZ/ARAAkgqudHsp+hd82UVkvgnlqZjzz2vyrYfz7bkPtXaGb9H4 Rfo7mQsEQavEBdWWjbga6eMnDqtu+FC+qeTGYebToxEyp2lKDSoAsvt8w82tIlP/EbmRbDVn 7bhjBlfRcFjVYw8uVDPptT0TV47vpoCVkTwcyb6OltJrvg/QzV9f07DJswuda1JH3/qvYu0p vjPnYvCq4NsqY2XSdAJ02HrdYPFtNyPEntu1n1KK+gJrstjtw7KsZ4ygXYrsm/oCBiVW/OgU g/XIlGErkrxe4vQvJyVwg6YH653YTX5hLLUEL1NS4TCo47RP+wi6y+TnuAL36UtK/uFyEuPy wwrDVcC4cIFhYSfsO0BumEI65yu7a8aHbGfq2lW251UcoU48Z27ZUUZd2Dr6O/n8poQHbaTd 6bJJSjzGGHZVbRP9UQ3lkmkmc0+XCHmj5WhwNNYjgbbmML7y0fsJT5RgvefAIFfHBg7fTY/i kBEimoUsTEQz+N4hbKwo1hULfVxDJStE4sbPhjbsPCrlXf6W9CxSyQ0qmZ2bXsLQYRj2xqd1 bpA+1o1j2N4/au1R/uSiUFjewJdT/LX1EklKDcQwpk06Af/N7VZtSfEJeRV04unbsKVXWZAk uAJyDDKN99ziC0Wz5kcPyVD1HNf8bgaqGDzrv3TfYjwqayRFcMf7xJaL9xXedMcAEQEAAcLB XwQYAQgACQUCUuE2fwIbDAAKCRBlw/kGpdefoG4XEACD1Qf/er8EA7g23HMxYWd3FXHThrVQ HgiGdk5Yh632vjOm9L4sd/GCEACVQKjsu98e8o3ysitFlznEns5EAAXEbITrgKWXDDUWGYxd pnjj2u+GkVdsOAGk0kxczX6s+VRBhpbBI2PWnOsRJgU2n10PZ3mZD4Xu9kU2IXYmuW+e5KCA vTArRUdCrAtIa1k01sPipPPw6dfxx2e5asy21YOytzxuWFfJTGnVxZZSCyLUO83sh6OZhJkk b9rxL9wPmpN/t2IPaEKoAc0FTQZS36wAMOXkBh24PQ9gaLJvfPKpNzGD8XWR5HHF0NLIJhgg 4ZlEXQ2fVp3XrtocHqhu4UZR4koCijgB8sB7Tb0GCpwK+C4UePdFLfhKyRdSXuvY3AHJd4CP 4JzW0Bzq/WXY3XMOzUTYApGQpnUpdOmuQSfpV9MQO+/jo7r6yPbxT7CwRS5dcQPzUiuHLK9i nvjREdh84qycnx0/6dDroYhp0DFv4udxuAvt1h4wGwTPRQZerSm4xaYegEFusyhbZrI0U9tJ B8WrhBLXDiYlyJT6zOV2yZFuW47VrLsjYnHwn27hmxTC/7tvG3euCklmkn9Sl9IAKFu29RSo d5bD8kMSCYsTqtTfT6W4A3qHGvIDta3ptLYpIAOD2sY3GYq2nf3Bbzx81wZK14JdDDHUX2Rs 6+ahAA== In-Reply-To: Content-Type: text/plain; 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These will be used to remove the export jobs. >>>>> >>>>> Switch qemu-arm{32,64} jobs to use this container. >>>>> >>>>> No functional change. >>>>> >>>>> Signed-off-by: Andrew Cooper >>>>> --- >>>>> CC: Anthony PERARD >>>>> CC: Stefano Stabellini >>>>> CC: Michal Orzel >>>>> CC: Doug Goldstein >>>>> >>>>> We should probably wire up some build tests too, but it's too late on a Friday >>>>> for me to be thinking about that for this posting. >>>>> --- >>>>> automation/build/debian/13-arm64v8.dockerfile | 71 +++++++++++++++++++ >>>>> automation/gitlab-ci/test.yaml | 4 +- >>>>> automation/scripts/containerize | 1 + >>>>> 3 files changed, 74 insertions(+), 2 deletions(-) >>>>> create mode 100644 automation/build/debian/13-arm64v8.dockerfile >>>>> >>>>> diff --git a/automation/build/debian/13-arm64v8.dockerfile b/automation/build/debian/13-arm64v8.dockerfile >>>>> new file mode 100644 >>>>> index 000000000000..b9062ee8b443 >>>>> --- /dev/null >>>>> +++ b/automation/build/debian/13-arm64v8.dockerfile >>>>> @@ -0,0 +1,71 @@ >>>>> +# syntax=docker/dockerfile:1 >>>>> +FROM --platform=linux/arm64/v8 debian:trixie-slim >>>>> +LABEL maintainer.name="The Xen Project" >>>>> +LABEL maintainer.email="xen-devel@lists.xenproject.org" >>>>> + >>>>> +ENV DEBIAN_FRONTEND=noninteractive >>>>> + >>>>> +RUN <>>>> +#!/bin/bash >>>>> + set -eu >>>>> + >>>>> + useradd --create-home user >>>>> + >>>>> + apt-get update >>>>> + >>>>> + DEPS=( >>>>> + # Xen >>>>> + bison >>>>> + build-essential >>>>> + checkpolicy >>>>> + flex >>>>> + >>>>> + # Tools (general) >>>>> + ca-certificates >>>>> + cpio >>>>> + git-core >>>>> + pkg-config >>>>> + wget >>>>> + # libxenguest dombuilder >>>>> + libbz2-dev >>>>> + liblzma-dev >>>>> + liblzo2-dev >>>>> + libzstd-dev >>>>> + zlib1g-dev >>>>> + # libacpi >>>>> + acpica-tools >>>>> + # libxl >>>>> + libfdt-dev >>>>> + libjson-c-dev >>>>> + uuid-dev >>>>> + # xentop >>>>> + libncurses5-dev >>>>> + # Python bindings >>>>> + python3-dev >>>>> + python3-setuptools >>>>> + # Golang bindings >>>>> + golang-go >>>>> + # Ocaml bindings/oxenstored >>>>> + ocaml-nox >>>>> + ocaml-findlib >>>> Since this is a container used only for tests, why listing packages required for >>>> Xen and tools build? >>> I did leave a note about that. >>> >>>>> + >>>>> + # for test phase, qemu-* jobs >>>>> + busybox-static >>>>> + curl >>>>> + device-tree-compiler >>>>> + expect >>>>> + file >>>>> + ipxe-qemu >>>>> + ovmf >>>>> + qemu-system-aarch64 >>>>> + u-boot-qemu >>>>> + u-boot-tools >>>> So after this change, even though you replace debian-12 with debian-13 for all >>>> the tests, the debian-12 still contains the unneeded packages (i.e. for a test >>>> phase that it no longer runs). >>> Yes.  I can't do this series bisectably without it.  Also, in the past >> Ok, I understand the bisectibility problem. > On further thought, I can in principle fix bisectibility by introducing > Trixie first, but that loses the logical sequence of events somewhat. > >>> people have explicitly requested to be able to run the qemu smoke >>> testing from the build container, which is why it's like this and not split. >> Unless it's a rule that every container follows and is documented somewhere I >> don't like this argument. > It was explicitly requested by ARM, and accepted at a time. > > If you'd like to revisit this decision, that's also fine too, but I > don't want to be flip-flopping on it. > > I could: > 1) Make a 13-arm64v8-test.dockerfile containing only the test phase stuff > 2) Switch to this ahead of the 12 cleanup > 3) Do the 12 cleanup without the test phase stuff > > although this makes a new scheme that we haven't used before. > > The one thing to say.  It's almost always safe to add packages to an > existing container, but ... > >> My plan then is to do the clean up of Arm containers >> in the future to remove packages not used. > ... you can't remove packages from an existing container.  The > containers are shared by all stable branches, and you'll generally break > older branches by doing this. > > Where we have dropped dependences, e.g. ae26101f6bfc, I've commented the > dockerfile so it doesn't get copied forwards into a new container, and > can be dropped when the identified version falls out of stable support. > > a0e29b316 is an example where the containers did get rebuilt after the > version of Xen ceased being tested. > >> It creates more confusion for people >> willing to create their own dockerfiles for testing (or just to see what it >> takes to build e.g. Xen on Arm) than it gives benefits. > That's why the dependencies are grouped and labelled.  I do expect > people to be able to figure out the bits they don't need based on the > comments. > >>> Honestly, I was hoping to leave the Trixie update to the ARM >>> maintainers, but despite the Bookworm QEMU (7.2) being newer than the >>> 6.0 in the export jobs, it contains the SYSREG interception bugs which >>> prevents hiding ThumbEE from guests, and breaks all the arm32 testing >>> with a Linux dom0. >> Does it make sense to have both Debian 12 and Debian 13 build/test? Can't we >> have just the latest one? > Build, yes absolutely.  You want as wider range of compilers/toolchains > as possible. > > Test, we tend to only do one.  For x86 it's the alpine build; for ARM, > it's from the Debian build. > >> All of the remarks above are not something that should prevent this patch from >> going in, so: >> Reviewed-by: Michal Orzel > Thanks, but lets see about the latest proposal first. I'm folding in the following hunk: diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 128b5f45cbad..a1acf2e827df 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -424,6 +424,16 @@ debian-12-arm64-gcc-debug:    variables:      CONTAINER: debian:12-arm64v8   +debian-13-arm64-gcc: +  extends: .gcc-arm64-build +  variables: +    CONTAINER: debian:13-arm64v8 + +debian-13-arm64-gcc-debug: +  extends: .gcc-arm64-build-debug +  variables: +    CONTAINER: debian:13-arm64v8 +  alpine-3.18-gcc-arm64:    extends: .gcc-arm64-build    <<: *build-test which performs some build testing using this container too.  Full resulting pipeline: https://gitlab.com/xen-project/hardware/xen-staging/-/pipelines/2562180822 ~Andrew From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322625.1588914 (Exim 4.92) (envelope-from ) id 1wSzFh-00044p-Qu; Fri, 29 May 2026 15:36:01 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322625.1588914; Fri, 29 May 2026 15:36:01 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFh-00044i-O6; Fri, 29 May 2026 15:36:01 +0000 Received: by outflank-mailman (input) for mailman id 1322625; Fri, 29 May 2026 15:36:00 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFg-0003s3-Pb for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:00 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFg-005xlZ-6D for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:00 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b25d-e002-0a2a0a5209dd-0a2a450ceb80-10 for ; Fri, 29 May 2026 17:36:00 +0200 Received: from [209.85.128.51] (helo=mail-wm1-f51.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b260-62f1-0a2a450c0019-d1558033e08c-3 for ; Fri, 29 May 2026 17:36:00 +0200 Received: by mail-wm1-f51.google.com with SMTP id 5b1f17b1804b1-49050ff7cbdso66630565e9.2 for ; Fri, 29 May 2026 08:36:00 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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A compatible loader can then revoke vulnerable binaries by generation, using the binary's declared generation id(s) to determine if it is safe to load. More information about SBAT is available here: https://github.com/rhboot/shim/blob/main/SBAT.md Populate the SBAT section in the Xen binary by using the information in xen/arch/x86/sbat.csv. On XenServer, the version and release fields are populated by the spec file during the build process. Signed-off-by: Gerald Elder-Vass Signed-off-by: Frediano Ziglio --- xen/arch/x86/Makefile | 4 ++++ xen/arch/x86/xen.lds.S | 2 ++ xen/include/xen/xen.lds.h | 3 ++- 3 files changed, 8 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/Makefile b/xen/arch/x86/Makefile index 47dd6c50fe..a2bdcb6f44 100644 --- a/xen/arch/x86/Makefile +++ b/xen/arch/x86/Makefile @@ -71,6 +71,7 @@ obj-$(CONFIG_TBOOT) += tboot.o obj-y += hpet.o obj-$(CONFIG_VM_EVENT) += vm_event.o obj-y += xstate.o +obj-y += sbat_data.o ifneq ($(CONFIG_PV_SHIM_EXCLUSIVE),y) obj-y += domctl.o @@ -275,6 +276,9 @@ $(obj)/efi.lds: AFLAGS-y += -DEFI $(obj)/xen.lds $(obj)/efi.lds: $(src)/xen.lds.S FORCE $(call if_changed_dep,cpp_lds_S) +$(obj)/sbat_data.o: $(src)/sbat.csv + $(OBJCOPY) -I binary -O elf64-x86-64 --rename-section .data=.sbat,readonly,data,contents --add-section .note.GNU-stack=/dev/null $(srcdir)/sbat.csv $@ + clean-files := \ include/asm/asm-macros.* \ $(objtree)/.xen-syms.[0-9]* \ diff --git a/xen/arch/x86/sbat.csv b/xen/arch/x86/sbat.csv new file mode 100644 index 000000000000..1573604e2f10 --- /dev/null +++ b/xen/arch/x86/sbat.csv @@ -0,0 +1,1 @@ +sbat,1,SBAT Version,sbat,1,https://github.com/rhboot/shim/blob/main/SBAT.md diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index b9e888e596..c2b9b5a893 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -354,6 +354,8 @@ SECTIONS PROVIDE(ALT_START = 0); VIRT_START &= 0; ALT_START &= 0; + + .sbat (NOLOAD) : { *(.sbat) } #elif defined(XEN_BUILD_EFI) /* * Due to the way EFI support is currently implemented, these two symbols diff --git a/xen/include/xen/xen.lds.h b/xen/include/xen/xen.lds.h index ea11e3fb62..c9aa1b7fae 100644 --- a/xen/include/xen/xen.lds.h +++ b/xen/include/xen/xen.lds.h @@ -118,7 +118,8 @@ *(.comment.*) \ *(.note.*) #else -#define DISCARD_EFI_SECTIONS +#define DISCARD_EFI_SECTIONS \ + *(.sbat) #endif /* Sections to be discarded. */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:05 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:05 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322627.1588933 (Exim 4.92) (envelope-from ) id 1wSzFk-0004Vz-DC; Fri, 29 May 2026 15:36:04 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322627.1588933; Fri, 29 May 2026 15:36:04 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFk-0004Vs-A7; Fri, 29 May 2026 15:36:04 +0000 Received: by outflank-mailman (input) for mailman id 1322627; Fri, 29 May 2026 15:36:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFi-0004Cl-Hm for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFh-0016pT-TZ for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:01 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b253-5cb7-0a2a0a5109dd-0a2a4506e07c-28 for ; Fri, 29 May 2026 17:36:01 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b261-7371-0a2a45060019-d155dd2ddd00-3 for ; Fri, 29 May 2026 17:36:01 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-44a74032ff8so10542963f8f.1 for ; Fri, 29 May 2026 08:36:01 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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That removes some relocations that otherwise appear due to the usage of the start and __efi64_mb2_start symbols in the multiboot2 header. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/xen.lds.S | 3 +++ 1 file changed, 3 insertions(+) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 322c116a04..907f826ae0 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -57,6 +57,9 @@ SECTIONS __image_base__ = .; #else . = __image_base__; + /DISCARD/ : { + *(.text.header) + } #endif #if 0 -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322624.1588906 (Exim 4.92) (envelope-from ) id 1wSzFg-0003rx-Jg; Fri, 29 May 2026 15:36:00 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322624.1588906; Fri, 29 May 2026 15:36:00 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFg-0003rq-Gz; Fri, 29 May 2026 15:36:00 +0000 Received: by outflank-mailman (input) for mailman id 1322624; Fri, 29 May 2026 15:35:59 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFf-0003rk-UX for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:35:59 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFf-002zYi-7g for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:35:59 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b25d-2eae-0a2a0a5409dd-0a2a4507bef8-6 for ; Fri, 29 May 2026 17:35:59 +0200 Received: from [209.85.221.45] (helo=mail-wr1-f45.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b25f-229c-0a2a45070019-d155dd2da5fb-3 for ; Fri, 29 May 2026 17:35:59 +0200 Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-441209fb77eso8698619f8f.1 for ; Fri, 29 May 2026 08:35:59 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= Subject: [PATCH 0/6] Various patches to improve Secure Boot support Date: Fri, 29 May 2026 16:35:25 +0100 Message-ID: <20260529153531.1341542-1-frediano.ziglio@cloud.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-ef75cf/1780068959-08F66C48-68961E01/0/0 X-purgate-type: clean X-purgate-size: 983 These patches improve support for Secure boot. UEFI CA memory mitigation requires memory pages to be not executable and writable at the same time. So changing permissions and splitting some section is required. SBAT is the preferred way to revocate executables. Remove multiboot pieces from EFI executable. Frediano Ziglio (2): Align all sections to 4KB x86: Split .init section to satisfy UEFI CA memory mitigation Gerald Elder-Vass (1): Add SBAT section to the PE binary Roger Pau Monné (3): x86/efi: discard .text.header for PE binary x86/efi: discard multiboot related entry code for PE binary x86/efi: avoid a relocation in efi_arch_post_exit_boot() xen/arch/x86/Makefile | 4 ++++ xen/arch/x86/boot/head.S | 3 ++- xen/arch/x86/efi/efi-boot.h | 7 +++++-- xen/arch/x86/xen.lds.S | 25 +++++++++++++++---------- xen/include/xen/xen.lds.h | 3 ++- 5 files changed, 28 insertions(+), 14 deletions(-) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322626.1588923 (Exim 4.92) (envelope-from ) id 1wSzFj-0004IO-5j; Fri, 29 May 2026 15:36:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322626.1588923; Fri, 29 May 2026 15:36:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFj-0004IF-2G; Fri, 29 May 2026 15:36:03 +0000 Received: by outflank-mailman (input) for mailman id 1322626; Fri, 29 May 2026 15:36:01 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFh-00044h-TC for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:01 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFh-005xlZ-9l for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:01 +0200 Received: from [10.42.69.12] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b25d-e002-0a2a0a5209dd-0a2a450ceb80-14 for ; Fri, 29 May 2026 17:36:01 +0200 Received: from [209.85.221.53] (helo=mail-wr1-f53.google.com) by tlsNG-d25034.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b260-62f1-0a2a450c0019-d155dd35e4fe-3 for ; Fri, 29 May 2026 17:36:01 +0200 Received: by mail-wr1-f53.google.com with SMTP id ffacd0b85a97d-45ef372c58aso423330f8f.0 for ; Fri, 29 May 2026 08:36:01 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Frediano Ziglio --- xen/arch/x86/xen.lds.S | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index c2b9b5a893..322c116a04 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -162,8 +162,8 @@ SECTIONS __note_gnu_build_id_end = .; } PHDR(note) PHDR(text) #elif defined(BUILD_ID_EFI) - /* Workaround bug in binutils < 2.36 */ - . = ALIGN(32); + /* align to satisfy UEFI CA memory mitigation */ + . = ALIGN(PAGE_SIZE); DECL_SECTION(.buildid) { __note_gnu_build_id_start = .; *(.buildid) @@ -330,6 +330,7 @@ SECTIONS __2M_rwdata_end = ALIGN(SECTION_ALIGN); #ifdef EFI + . = ALIGN(PAGE_SIZE); .reloc ALIGN(4) : { __base_relocs_start = .; *(.reloc) @@ -355,6 +356,7 @@ SECTIONS VIRT_START &= 0; ALT_START &= 0; + . = ALIGN(PAGE_SIZE); .sbat (NOLOAD) : { *(.sbat) } #elif defined(XEN_BUILD_EFI) /* -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:06 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:06 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322628.1588943 (Exim 4.92) (envelope-from ) id 1wSzFm-0004nP-M4; Fri, 29 May 2026 15:36:06 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322628.1588943; Fri, 29 May 2026 15:36:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFm-0004nE-GH; Fri, 29 May 2026 15:36:06 +0000 Received: by outflank-mailman (input) for mailman id 1322628; Fri, 29 May 2026 15:36:04 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFk-0004a8-QC for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:04 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFk-0016uA-78 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:04 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b253-5cb7-0a2a0a5109dd-0a2a4506e07c-32 for ; Fri, 29 May 2026 17:36:04 +0200 Received: from [209.85.221.52] (helo=mail-wr1-f52.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b264-7371-0a2a45060019-d155dd34e8bf-3 for ; Fri, 29 May 2026 17:36:04 +0200 Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-45ef42dfb26so245206f8f.2 for ; Fri, 29 May 2026 08:36:04 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Smith" , =?UTF-8?q?Marek=20Marczykowski-G=C3=B3recki?= , Jan Beulich , Andrew Cooper , Teddy Astie Subject: [PATCH 5/6] x86/efi: avoid a relocation in efi_arch_post_exit_boot() Date: Fri, 29 May 2026 16:35:30 +0100 Message-ID: <20260529153531.1341542-6-frediano.ziglio@cloud.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260529153531.1341542-1-frediano.ziglio@cloud.com> References: <20260529153531.1341542-1-frediano.ziglio@cloud.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-16d1c6/1780068964-87170D75-8A821924/0/0 X-purgate-type: clean X-purgate-size: 1646 From: Roger Pau Monné Instead of using the absolute __start_xen address, calculate it as an offset from the current instruction pointer. The relocation would be problematic if the loader has acknowledged the Xen image section attributes, and mapped .init.text with just read and execute permissions. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/efi/efi-boot.h | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/efi/efi-boot.h b/xen/arch/x86/efi/efi-boot.h index d738b839ee..b983f054b5 100644 --- a/xen/arch/x86/efi/efi-boot.h +++ b/xen/arch/x86/efi/efi-boot.h @@ -270,7 +270,9 @@ static void __init noreturn efi_arch_post_exit_boot(void) /* Jump to higher mappings. */ "mov stack_start(%%rip), %%rsp\n\t" - "movabs $__start_xen, %[rip]\n\t" + "lea __start_xen(%%rip), %[rip]\n\t" + "add %[offset], %[rip]\n\t" + "push %[cs]\n\t" "push %[rip]\n\t" "lretq" @@ -278,7 +280,8 @@ static void __init noreturn efi_arch_post_exit_boot(void) [cr4] "+&r" (cr4) : [cr3] "r" (idle_pg_table), [cs] "i" (__HYPERVISOR_CS), - [ds] "r" (__HYPERVISOR_DS) + [ds] "r" (__HYPERVISOR_DS), + [offset] "r" (__XEN_VIRT_START - xen_phys_start) : "memory" ); unreachable(); } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:07 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:07 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322629.1588947 (Exim 4.92) (envelope-from ) id 1wSzFn-0004r6-1A; Fri, 29 May 2026 15:36:07 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322629.1588947; Fri, 29 May 2026 15:36:06 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFm-0004pj-PU; Fri, 29 May 2026 15:36:06 +0000 Received: by outflank-mailman (input) for mailman id 1322629; Fri, 29 May 2026 15:36:05 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFl-0004iq-Hv for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:05 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFk-0016uA-Uu for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:04 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b253-5cb7-0a2a0a5109dd-0a2a4506e07c-36 for ; Fri, 29 May 2026 17:36:04 +0200 Received: from [209.85.221.47] (helo=mail-wr1-f47.google.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b264-7371-0a2a45060019-d155dd2fbdc3-3 for ; Fri, 29 May 2026 17:36:04 +0200 Received: by mail-wr1-f47.google.com with SMTP id ffacd0b85a97d-45e6a4d0be0so6412131f8f.1 for ; Fri, 29 May 2026 08:36:04 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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Signed-off-by: Frediano Ziglio --- xen/arch/x86/xen.lds.S | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index a5a85e9b8a..7f892cb2fa 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -193,11 +193,7 @@ SECTIONS __2M_init_start = .; /* Start of 2M superpages, mapped RWX (boot only). */ . = ALIGN(PAGE_SIZE); /* Init code and data */ __init_begin = .; -#ifdef EFI /* EFI wants to merge all of .init.* ELF doesn't. */ - DECL_SECTION(.init) { -#else DECL_SECTION(.init.text) { -#endif _sinittext = .; *(.init.text) *(.text.startup) @@ -210,12 +206,12 @@ SECTIONS */ *(.altinstr_replacement) -#ifdef EFI /* EFI wants to merge all of .init.* ELF doesn't. */ - . = ALIGN(SMP_CACHE_BYTES); -#else } PHDR(text) - DECL_SECTION(.init.data) { +#ifdef EFI + /* align to satisfy UEFI CA memory mitigation */ + . = ALIGN(SECTION_ALIGN); #endif + DECL_SECTION(.init.data) { *(.init.bss.stack_aligned) *(.init.data.page_aligned) -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Fri May 29 15:36:09 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Fri, 29 May 2026 15:36:09 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322630.1588959 (Exim 4.92) (envelope-from ) id 1wSzFp-0005Ie-6K; Fri, 29 May 2026 15:36:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322630.1588959; Fri, 29 May 2026 15:36:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFp-0005IP-20; Fri, 29 May 2026 15:36:09 +0000 Received: by outflank-mailman (input) for mailman id 1322630; Fri, 29 May 2026 15:36:07 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wSzFn-000528-J1 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 15:36:07 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wSzFm-002zYi-W5 for xen-devel@lists.xenproject.org; Fri, 29 May 2026 17:36:07 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a19b25d-2eae-0a2a0a5409dd-0a2a4507bef8-18 for ; Fri, 29 May 2026 17:36:06 +0200 Received: from [209.85.221.49] (helo=mail-wr1-f49.google.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a19b262-229c-0a2a45070019-d155dd31ac4e-3 for ; Fri, 29 May 2026 17:36:03 +0200 Received: by mail-wr1-f49.google.com with SMTP id ffacd0b85a97d-45ef6565cfdso145168f8f.0 for ; Fri, 29 May 2026 08:36:03 -0700 (PDT) Received: from localhost.localdomain (5.116.208.46.dyn.plus.net. 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That removes some relocations that otherwise appear due to the entry point code in head.S not being position independent. No functional change intended. Signed-off-by: Roger Pau Monné --- xen/arch/x86/boot/head.S | 3 ++- xen/arch/x86/xen.lds.S | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/boot/head.S b/xen/arch/x86/boot/head.S index 77bb7a9e21..90faf411b9 100644 --- a/xen/arch/x86/boot/head.S +++ b/xen/arch/x86/boot/head.S @@ -152,7 +152,7 @@ vga_text_buffer: efi_platform: .byte 0 - .section .init.text, "ax", @progbits + .section .init.multiboot, "ax", @progbits early_error: /* Here to improve the disassembly. */ @@ -710,6 +710,7 @@ trampoline_setup: /* Jump into the relocated trampoline. */ lret + .section .init.text, "ax", @progbits ENTRY(trampoline_start) #include "trampoline.S" ENTRY(trampoline_end) diff --git a/xen/arch/x86/xen.lds.S b/xen/arch/x86/xen.lds.S index 907f826ae0..a5a85e9b8a 100644 --- a/xen/arch/x86/xen.lds.S +++ b/xen/arch/x86/xen.lds.S @@ -59,6 +59,7 @@ SECTIONS . = __image_base__; /DISCARD/ : { *(.text.header) + *(.init.multiboot) } #endif @@ -200,6 +201,7 @@ SECTIONS _sinittext = .; *(.init.text) *(.text.startup) + *(.init.multiboot) _einittext = .; /* * Here are the replacement instructions. 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pr=C From: Ayan Kumar Halder To: CC: Ayan Kumar Halder , Doug Goldstein , Stefano Stabellini , "Andrew Cooper" , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Bertrand Marquis , Volodymyr Babchuk Subject: [PATCH v2 for 4.23] Add GICv3 SGI boot/self tests in Xen Date: Fri, 29 May 2026 18:09:56 +0100 Message-ID: <20260529170956.49797-1-ayan.kumar.halder@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8bit X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397B1:EE_|LV3PR12MB9268:EE_ X-MS-Office365-Filtering-Correlation-Id: bfe8198b-1c9a-4872-36e5-08debda52375 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700016|376014|7416014|82310400026|1800799024|10063799003|13003099007|6133799003|11063799006|3023799007|5023799004|56012099006|18002099003; X-Microsoft-Antispam-Message-Info: 7TSC5HCb9dfrEeXR3K5WVyX0zNP134E4gu7ART0G3D0aB+GGSxCPNaDklG5HfPFJBV7ZDitMmCyeS9sSQ++BnGILOPlWsSkJNipybPij2RESt3nWqC86WDKE90OZghOj/RZqn7bY5g7cdXs4F1i1yCEptxG61ESObrCGrVlnNPuI4rg9xLYKMcD86TzN35lQ7ILSdy36fDeJex9J9YJKKeuNRKxP4XlBQH8SYrFvJvB5kEkp8lZ3OiKcVMBhVUXcYEdJnJ5FLF/pSVbMG0oasz2MGnKcp6ZekzX8o9/feeo70FdcQSZ7U7HvVROanQYl+L/8GKldyszvd76DN5znb2UKXvhgg1nWQM5+8s5cpUDqSBmkIP1GoV/0/ytctOMy6MO2SfVxs1ILQUjsQ7Ew9iDmHYsOHjqXevDxHPgI75mVyH60Mnbb1xIgwWavQmnuQ6IUhIhmDAoSKl3/FU3BvxPITODQDTmwVU91MrQ5HnaHL4+u6XncyszPecO/WBU34/lN42+5le1D7eXEXHetSzWcGRGu80EPkK1pMUIso2SwLIh2Py8mlmEt2vPt6hn6b3IxSdO8vsL4klWuUBMiBZLbuLTkczOi9QTLLu4T96KyRRtybBKdRjFH1nR2L8IvXxhSm+/Ja1c6K+9dPN9spT5w7ePzQWc2dyOX1LnKeO9CeYEYAZegkqf8SP5fTZVN X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:satlexmb07.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(36860700016)(376014)(7416014)(82310400026)(1800799024)(10063799003)(13003099007)(6133799003)(11063799006)(3023799007)(5023799004)(56012099006)(18002099003);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: JWZOuZUWBf+81NdwIkyAvYL1nUi+qfafruhyLIfp9VGv6vOQTe5xnUhnGhuUAMiqfyXR3EN0ioYaqCzYptmCmwSjZ5ST8hR/Jy4mWoDNA9qIHY3StswNogMeAkd0CT9v7k1UybDxr5qu0WaOSaAP2zmSRVX5bmtd7CGplOVAjPeltR6LEZZNPcGeQc1whFdaqr4lQNdeX1FUCGhDQq5pm01N1Ypbv60hnToccxU/fJhhkYuDUNchTzSedmONl5ZfJelJ2Sf1JZyhzRxi1eXocua+ny1lZYQts8ybqo6z6M4+rLFjGwL3U8qQ2ky2OFvVHa87WaheOxL6Ihbp0YHL6QJyDZ6NtuDjshAdW+ZU/cBGY+EriqyqMvgjFZGNHBtC2gJyWQ+dC9vIjti52dspYnTl17f/DJAbObFVe9Ee2Ev0ccWDyS0y3BSg6lRRyjp9 X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 May 2026 17:10:09.4626 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: bfe8198b-1c9a-4872-36e5-08debda52375 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397B1.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR12MB9268 X-purgate-ID: tlsNG-d25034/1780074621-E357FCF5-259B9DE3/0/0 X-purgate-type: clean X-purgate-size: 17331 Boot self-tests (also referred to as boot-time tests or power-on self-tests) are intended to validate internal features of Xen during bring-up. They are meant to be run in a debug / validation environment; Xen is not expected to remain functional for production use after the self-tests have executed. The purpose of these tests is to catch hardware configuration issues early and to confirm that the platform on which Xen has been brought up is sane. The expected flow is: build Xen with the self-tests enabled, boot it, inspect the results, and then reboot into the usual production configuration. Introduce the tests to confirm that: 1. A cpu can send SGI 0 to itself 2. A cpu can send SGI 0 to another specific CPU 3. A cpu can send SGI 0 to all the other CPUs 4. A cpu can send SGI 1 to another CPU These tests aim to test Xen has configured the GIC correctly to use SGIs. Thus, the tests invoke specific APIs of GIC driver. Also, introduce a config CONFIG_BOOT_SELFTEST which enables these tests. The option defaults to N; it should be disabled for production builds and is intended for the validation pipeline and coverage measurement. The tests run during Xen boot and validate internal interfaces such as Xen's interface with hardware, firmware and the bootloader. Also, introduce an integer command line parameter "gic-test". By default, it is set to 0 which means no tests are enabled. For running SGI tests, "gic-test" should be set to 1. In future if we add tests for distributer, ITS, LPI, etc, then we can use different numbers. Thus, each number denotes a functionality of GICv3 which can be tested independently and within a single boot of Xen. In this way, we ensure that the tests to validate SGIs do not impact any other tests. In order to keep all the boot-time self-tests together in the binary, we have introduced a separate section "initcallboottest". All the tests are registered using __initcallboottest. During the bootup of each core, Xen invokes do_init_boottests() to run the these tests. All these tests are invoked before Xen creates the domains (in case of primary core) or runs the idle loop (in case of secondary core). Note: it was suggested that, once the boot self-tests have run, Xen should call machine_halt() rather than continue booting (since this build is only intended for validation). This is not wired in here because the SGIs are sent from the primary and secondary CPUs and received asynchronously on the target CPUs. There is no definite point in the boot flow at which Xen can know that every send has been observed by its receiver, so "after the tests have completed" has no well-defined moment at which to insert machine_halt(). Signed-off-by: Ayan Kumar Halder Signed-off-by: Michal Orzel --- Link to v1 (RFC): https://lists.xenproject.org/archives/html/xen-devel/2025-09/msg00956.html Upstream CI run (xen-project/people/ayankuma/xen fork, one commit on top of xen-project/xen staging — all Linux builds + tests including qemu-smoke-boot-selftest-arm64-gcc-debug passed; only the macos jobs sit pending because the personal fork has no macos runner): https://gitlab.com/xen-project/people/ayankuma/xen/-/pipelines/2561806695 Changes in v2: - Renamed the patch from "xen/arm: Introduce GICV3 Self Tests" to "Add GICv3 SGI boot/self tests in Xen", and rewrote the commit message to explain the intent of boot self-tests (debug / validation builds only, Xen not expected to remain functional afterwards). - Moved the selftest code out of gic-v3.c into a dedicated file xen/arch/arm/gic-test.c, gated by CONFIG_BOOT_SELFTEST (Stefano, Grygorii). - Introduced a generic boot-self-test framework: new section "initcallboottest", registration macro __initcallboottest, and do_init_boottests() invoked once per CPU after local_irq_enable(), so the test runs on every CPU (boot + secondaries) and no longer collides with the IRQ-enable timing in gicv3_init() (Julien #1, Julien #3). - Added Kconfig option CONFIG_BOOT_SELFTEST in xen/arch/arm/Kconfig (arm-only for now; arch-specific because the only registered test is GICv3-specific). - Reserved a dedicated SGI value GIC_SGI_TEST in enum gic_sgi (xen/arch/arm/include/asm/gic.h), so the selftest never reuses a functional SGI (Grygorii #3). - Added a runtime integer command-line parameter "gic-test" so the selftest binary can be shipped but its execution selected at boot (gic-test=0 -> no-op; gic-test=1 -> SGI tests). Future GICv3 features (distributor, ITS, LPI, ...) can claim further values (Grygorii #2, partial). - Documented why machine_halt() is not invoked after the tests: SGI delivery is asynchronous, so there is no well-defined point after which every send has been observed by its receiver (Julien #2). - Wired the tests into upstream GitLab CI: new build job alpine-3.18-gcc-debug-arm64-boot-selftest, new test job qemu-smoke-boot-selftest-arm64-gcc-debug, and the runner script automation/scripts/qemu-boot-selftest-arm64.sh that dumps the QEMU virt DTB, injects "gic-test=1 console=dtuart sync_console" into /chosen/xen,xen-bootargs via fdtput, boots Xen, and checks for each "Sending GIC_SGI_TEST ..." followed by the matching "CPU%u: GIC_SGI_TEST received". automation/gitlab-ci/build.yaml | 8 ++ automation/gitlab-ci/test.yaml | 8 ++ .../scripts/qemu-boot-selftest-arm64.sh | 81 +++++++++++++++++++ xen/arch/arm/Kconfig | 15 ++++ xen/arch/arm/Makefile | 1 + xen/arch/arm/gic-test.c | 52 ++++++++++++ xen/arch/arm/gic.c | 5 ++ xen/arch/arm/include/asm/gic.h | 3 + xen/arch/arm/setup.c | 2 + xen/arch/arm/smpboot.c | 2 + xen/arch/arm/xen.lds.S | 4 + xen/common/kernel.c | 11 +++ xen/include/xen/init.h | 3 + 13 files changed, 195 insertions(+) create mode 100755 automation/scripts/qemu-boot-selftest-arm64.sh create mode 100644 xen/arch/arm/gic-test.c diff --git a/automation/gitlab-ci/build.yaml b/automation/gitlab-ci/build.yaml index 7f5b5938e8..8df45caa86 100644 --- a/automation/gitlab-ci/build.yaml +++ b/automation/gitlab-ci/build.yaml @@ -439,6 +439,14 @@ alpine-3.18-gcc-debug-arm64: CONFIG_UBSAN=y CONFIG_UBSAN_FATAL=y +alpine-3.18-gcc-debug-arm64-boot-selftest: + extends: .gcc-arm64-build-debug + <<: *build-test + variables: + CONTAINER: alpine:3.18-arm64v8 + EXTRA_XEN_CONFIG: | + CONFIG_BOOT_SELFTEST=y + alpine-3.18-gcc-arm64-randconfig: extends: .gcc-arm64-build variables: diff --git a/automation/gitlab-ci/test.yaml b/automation/gitlab-ci/test.yaml index 8770c523e2..2398c6299a 100644 --- a/automation/gitlab-ci/test.yaml +++ b/automation/gitlab-ci/test.yaml @@ -524,6 +524,14 @@ qemu-smoke-dom0less-arm64-gcc-debug-gicv3: - *arm64-test-needs - alpine-3.18-gcc-debug-arm64 +qemu-smoke-boot-selftest-arm64-gcc-debug: + extends: .qemu-arm64 + script: + - ./automation/scripts/qemu-boot-selftest-arm64.sh 2>&1 | tee ${LOGFILE} + needs: + - *arm64-test-needs + - alpine-3.18-gcc-debug-arm64-boot-selftest + qemu-smoke-dom0less-arm64-gcc-debug-staticmem: extends: .qemu-arm64 script: diff --git a/automation/scripts/qemu-boot-selftest-arm64.sh b/automation/scripts/qemu-boot-selftest-arm64.sh new file mode 100755 index 0000000000..a37dba3e07 --- /dev/null +++ b/automation/scripts/qemu-boot-selftest-arm64.sh @@ -0,0 +1,81 @@ +#!/bin/bash + +set -ex -o pipefail + +# Boot the prebuilt Xen binary under QEMU with CONFIG_BOOT_SELFTEST=y enabled +# and gic-test=1 in xen,xen-bootargs, then verify the four GICv3 SGI self-tests +# pass by inspecting the serial log. + +XEN=binaries/xen +QEMU=./binaries/qemu-system-aarch64 +DTB_RAW=binaries/virt.dtb +DTB=binaries/virt-bootselftest.dtb +LOG=smoke.serial + +test -x ${QEMU} +test -f ${XEN} + +# Dump the auto-generated DT from the QEMU virt machine, then inject +# /chosen/xen,xen-bootargs. The selftest infrastructure invokes +# do_init_boottests() during early boot; gic-test=1 selects the GICv3 SGI +# tests. +# -net none avoids QEMU's default virtio-net-pci, whose efi-virtio.rom +# is not shipped with the qemu-system-aarch64 artifact used in CI. +${QEMU} \ + -machine virt,virtualization=true,gic-version=3,dumpdtb=${DTB_RAW} \ + -cpu cortex-a57 -m 1024 -smp 2 -display none -net none + +cp ${DTB_RAW} ${DTB} +fdtput -t s ${DTB} /chosen xen,xen-bootargs \ + "gic-test=1 console=dtuart sync_console" + +rm -f ${LOG} +timeout 60 ${QEMU} \ + -machine virt,virtualization=true,gic-version=3 \ + -cpu cortex-a57 -m 1024 -smp 2 \ + -serial file:${LOG} \ + -monitor none -display none -no-reboot -net none \ + -dtb ${DTB} \ + -kernel ${XEN} || true + +# Each "Sending GIC_SGI_TEST ..." line must be followed by the matching +# "CPU%u: GIC_SGI_TEST received". +fail=0 +check_pair() { + local send_pat=$1 + local recv_pat=$2 + local send_line recv_line + + send_line=$(grep -n -- "${send_pat}" ${LOG} | head -n1 | cut -d: -f1) + if [ -z "${send_line}" ]; then + echo "MISSING: ${send_pat}" + fail=1 + return + fi + + recv_line=$(grep -n -- "${recv_pat}" ${LOG} \ + | awk -v bl="${send_line}" -F: '$1 > bl {print $1; exit}') + if [ -z "${recv_line}" ]; then + echo "MISSING (after line ${send_line}): ${recv_pat}" + fail=1 + return + fi + + echo "OK: '${send_pat}' -> '${recv_pat}' (lines ${send_line} -> ${recv_line})" +} + +# Boot CPU sends SGI to itself +check_pair "Sending GIC_SGI_TEST to self CPU0" "CPU0: GIC_SGI_TEST received" +# Secondary CPU sends SGI to itself +check_pair "Sending GIC_SGI_TEST to self CPU1" "CPU1: GIC_SGI_TEST received" +# Secondary CPU sends SGI to primary +check_pair "Sending GIC_SGI_TEST to CPU0 from CPU1" "CPU0: GIC_SGI_TEST received" +# Send to all-but-self +check_pair "Sending GIC_SGI_TEST to all except CPU1" "CPU0: GIC_SGI_TEST received" + +if [ ${fail} -ne 0 ]; then + echo "FAILED" + exit 1 +fi + +echo "PASSED" diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a1..0e23bbf20b 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -476,6 +476,21 @@ config ARM64_HARDEN_BRANCH_PREDICTOR config ARM32_HARDEN_BRANCH_PREDICTOR def_bool y if ARM_32 && HARDEN_BRANCH_PREDICTOR +config BOOT_SELFTEST + bool "Enable boot-time self-tests" + default n + help + This option enables boot-time self-tests that validate Xen's internal + interfaces with hardware, firmware and the bootloader. The tests are + registered with __initcallboottest and executed by do_init_boottests() + during early boot, before domains are created. + + These tests are intended for validation and coverage measurement, not + for production builds. With this option enabled, Xen may not be + functional after the tests have run. + + If unsure, say N. + source "arch/arm/platforms/Kconfig" source "common/Kconfig" diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile index 84c4062b30..0090761682 100644 --- a/xen/arch/arm/Makefile +++ b/xen/arch/arm/Makefile @@ -24,6 +24,7 @@ obj-y += domctl.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += efi/ obj-y += gic.o +obj-$(CONFIG_BOOT_SELFTEST) += gic-test.init.o obj-$(CONFIG_GICV2) += gic-v2.o obj-$(CONFIG_GICV3) += gic-v3.o obj-$(CONFIG_HAS_ITS) += gic-v3-its.o diff --git a/xen/arch/arm/gic-test.c b/xen/arch/arm/gic-test.c new file mode 100644 index 0000000000..ca922e5d2a --- /dev/null +++ b/xen/arch/arm/gic-test.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +/* + * gic_test: Specifies the gic test to be executed. + * 0 = no tests are executed + * 1 = SGI tests are executed + */ +static unsigned int __initdata gic_test = 0; +integer_param("gic-test", gic_test); + +/* + * CPU0: GIC_SGI_DUMP_STATE to self + * CPU{0-N}: GIC_SGI_TEST to self + * CPU{1-N}: GIC_SGI_TEST to CPU0 + * CPU{N}: GIC_SGI_TEST to all but self + */ +static int __init gic_self_sgi_test(void) +{ + if ( !gic_test ) + return 0; + + printk("Sending GIC_SGI_TEST to self CPU%u\n", smp_processor_id()); + send_SGI_self(GIC_SGI_TEST); + + if ( smp_processor_id() == 0 ) + { + printk("Sending GIC_SGI_DUMP_STATE to CPU0\n"); + smp_send_state_dump(0); + + return 0; + } + + printk("Sending GIC_SGI_TEST to CPU0 from CPU%u\n", smp_processor_id()); + send_SGI_one(0, GIC_SGI_TEST); + + /* Execute this test only from the last core */ + if ( smp_processor_id() == (smp_get_max_cpus() - 1) ) + { + printk("Sending GIC_SGI_TEST to all except CPU%u\n", smp_processor_id()); + send_SGI_allbutself(GIC_SGI_TEST); + } + + return 0; + +} +__initcallboottest(gic_self_sgi_test); diff --git a/xen/arch/arm/gic.c b/xen/arch/arm/gic.c index ee75258fc3..9736b0c7df 100644 --- a/xen/arch/arm/gic.c +++ b/xen/arch/arm/gic.c @@ -324,6 +324,11 @@ static void do_static_sgi(struct cpu_user_regs *regs, enum gic_sgi sgi) case GIC_SGI_CALL_FUNCTION: smp_call_function_interrupt(); break; +#ifdef CONFIG_BOOT_SELFTEST + case GIC_SGI_TEST: + printk("CPU%u: GIC_SGI_TEST received\n", smp_processor_id()); + break; +#endif default: panic("Unhandled SGI %d on CPU%d\n", sgi, smp_processor_id()); break; diff --git a/xen/arch/arm/include/asm/gic.h b/xen/arch/arm/include/asm/gic.h index ff22dea40d..74bdd4ff63 100644 --- a/xen/arch/arm/include/asm/gic.h +++ b/xen/arch/arm/include/asm/gic.h @@ -306,6 +306,9 @@ enum gic_sgi { GIC_SGI_EVENT_CHECK, GIC_SGI_DUMP_STATE, GIC_SGI_CALL_FUNCTION, +#ifdef CONFIG_BOOT_SELFTEST + GIC_SGI_TEST, +#endif GIC_SGI_STATIC_MAX, }; diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 6310a47d68..4e5db93027 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -470,6 +470,8 @@ void asmlinkage __init noreturn start_xen(unsigned long fdt_paddr) enable_errata_workarounds(); enable_cpu_features(); + do_init_boottests(); + /* Create initial domain 0. */ if ( !is_dom0less_mode() ) create_dom0(); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 7f3cfa812e..a016ff00f5 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -405,6 +405,8 @@ void asmlinkage noreturn start_secondary(void) printk(XENLOG_DEBUG "CPU %u booted.\n", smp_processor_id()); + do_init_boottests(); + startup_cpu_idle_loop(); } diff --git a/xen/arch/arm/xen.lds.S b/xen/arch/arm/xen.lds.S index 2d5f1c516d..14f64a856c 100644 --- a/xen/arch/arm/xen.lds.S +++ b/xen/arch/arm/xen.lds.S @@ -146,6 +146,10 @@ SECTIONS *(.initcall1.init) __initcall_end = .; + __initcall_boot_test_start = .; + *(.initcallboottest.init) + __initcall_boot_test_end = .; + . = ALIGN(4); __alt_instructions = .; *(.altinstructions) diff --git a/xen/common/kernel.c b/xen/common/kernel.c index fb45f81399..2047fe2a3f 100644 --- a/xen/common/kernel.c +++ b/xen/common/kernel.c @@ -412,6 +412,7 @@ void add_taint(unsigned int taint) extern const initcall_t __initcall_start[], __presmp_initcall_end[], __initcall_end[]; +extern const initcall_t __initcall_boot_test_start[], __initcall_boot_test_end[]; void __init do_presmp_initcalls(void) { @@ -427,6 +428,16 @@ void __init do_initcalls(void) (*call)(); } +void __init do_init_boottests(void) +{ +#ifdef CONFIG_BOOT_SELFTEST + const initcall_t *call; + for ( call = __initcall_boot_test_start; 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dkim=pass header.s=alien8 header.d=alien8.de header.i="@alien8.de" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" X-Virus-Scanned: Debian amavisd-new at mail.alien8.de Authentication-Results: mail.alien8.de (amavisd-new); dkim=pass (4096-bit key) header.d=alien8.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=alien8; t=1780110500; bh=xvvniitijThI5M/vzeUngJ2o5o2bAFGL6v1h1J/weaM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=RlZugvf28JewjKobWij+z7qIEzuJleC7UW1AkwP8rIPfgHvDVyKCrVyw/Qymrp83Z oMbgDR2FbH11di++QnPPImwLEX2QWfLIIXSP1ypHOZXuL8uzhRYviGTB6dzv+qnCeb Gpjy/sGySdR+2Du+p++dlzJkZH9f7yDl1Iu2Fre6FT/CcfHszYCqFtrvvnC9mv0qHc VeeoN4BaHXjs2/UWNE6zir9SYUOs75Xg4Of1T4uw5yhGpFM4a3E1cmNVNmJaKIUq6R yPy/Ir3fplxnFBnCyQR1Mih6ew0Q+bN5yquZw+MmRi4V8Lj+CiVHxa20Vu+5eKSmYk giEEXZB1RSLVAV6SsDTp793DrNhxj4wm0EvU2xn+GoJTqXtQ7jCQ/UV7q72yZwrhw6 Hr/fzxFzU2n0bEEtOtOgL6M+OPmeiiF9CNlohP/WUUTGr0G7qVWyY3IBL6L60qHrmi G28aB2e/4cv56a+4WyUu0hncXyyo8wJb54Pd1OOsv3eUOm/6ojaoKm4aTJ7E2o38BY +wUXFuMdzDYShBipYVX8+o8FNNEGBfWyPWxpIXqjj6tOadHwHan4leJuqlNl1iFQ/z P8Ic44MZ/AWAUKuhucIKSKuYuKaxZPvVv03zf0laMmYz+Zwgn1PGjB2t4S2+q2afEM hP4TtO4p/8Y97d14SV7L5qrs= Date: Fri, 29 May 2026 20:07:31 -0700 From: Borislav Petkov To: Sean Christopherson Cc: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz , "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Broadcom internal kernel review list , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner Subject: Re: [PATCH v4 01/47] x86/tsc: Never re-calibrate TSC frequency if its exact timing is known Message-ID: <20260530030731.GBahpUcwWXdKCf1lJO@fat_crate.local> References: <20260529144435.704127-1-seanjc@google.com> <20260529144435.704127-2-seanjc@google.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260529144435.704127-2-seanjc@google.com> X-purgate-ID: tlsNG-bad1c0/1780110512-89377A53-8E890EDD/0/0 X-purgate-type: clean X-purgate-size: 1168 On Fri, May 29, 2026 at 07:43:48AM -0700, Sean Christopherson wrote: > Don't re-calibrate the TSC frequency if the TSC is known to run at a fixed > frequency. In practice, this is likely one big nop, as re-calibration is > used only for SMP=n kernels, and only for hardware that is 20+ years old, > i.e. is extremely unlikely to collide with TSC_KNOWN_FREQ. Why do we care? So what if it recalibrates once on UP? Look where it is called - all old rust which no one uses anymore. > Signed-off-by: Sean Christopherson > --- > arch/x86/kernel/tsc.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c > index c5110eb554bc..08cf6625d484 100644 > --- a/arch/x86/kernel/tsc.c > +++ b/arch/x86/kernel/tsc.c > @@ -946,7 +946,8 @@ void recalibrate_cpu_khz(void) > return; > > cpu_khz = x86_platform.calibrate_cpu(); > - tsc_khz = x86_platform.calibrate_tsc(); > + if (!boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) cpu_feature_enabled() everywhere please. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette From xen-devel-bounces@lists.xenproject.org Sat May 30 06:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 06:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322867.1589036 (Exim 4.92) (envelope-from ) id 1wTDUc-0003Hn-Ds; Sat, 30 May 2026 06:48:22 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322867.1589036; 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AFNElJ8zUaL0sdz3/OTqEtOrCGFTqEtcD5SephcyjxkFG5WQlT3qG/dpy+BW4ZXvpUY5uqSsImYh7dph2ME=@lists.xenproject.org X-Gm-Message-State: AOJu0YxLMZaXxU8gDzde/hOUz5NM6EHUVrpltOJEDtXFy6OqhCUSeVhf TOGWlO1YQoPX0hGtvSlt7I8kwF5rnC5ahh/CSuylkiQ87Uyv4BoLxT4xEGuVSowwcZenIPS7aNZ sln3/f97CvwNdTBOmvSL+LXSknms/JHc= X-Gm-Gg: Acq92OGr7u42Ofa0WOUP/3WWdg+jx8LSEKMHsF6TFne67XhL8kRd12HiE/vSOn3KIBq l8W/QrZj/gvHRT9mHO0i3cv3b/jVFqp3NEsd5/JkZcQ0mOZyJEBmoHpiacbk2Ev2+zHUaYgpTPd bPfN8j4RInwpInQEcJrZtldfYkt4UVeEt+q5mIgpxXaMOcX0W3caDgvZKVhRSM/zfi/P57ZguCD gfnMchDQRgMgj73Gnpc/uUR9EAjMvs6scTC2canzYAgu5ja4XCbovHQNVwsdrasp9wPIm1F8fRP nVUZU3Jp4aRq0RH4 X-Received: by 2002:a05:6512:6181:b0:5aa:6395:f9c5 with SMTP id 2adb3069b0e04-5aa6395fa46mr293015e87.27.1780123698205; Fri, 29 May 2026 23:48:18 -0700 (PDT) MIME-Version: 1.0 References: In-Reply-To: From: Mykola Kvach Date: Sat, 30 May 2026 09:48:06 +0300 X-Gm-Features: AVHnY4IhgQGqiohAUgmpjIXAUoxyDlJ8u1dtdUvIBlQobA53X2UHp_a26ZU7xpQ Message-ID: Subject: Re: [PATCH v2] xen/domain: make shutdown state explicit To: Jan Beulich Cc: Mykola Kvach , Paul Durrant , Andrew Cooper , =?UTF-8?Q?Roger_Pau_Monn=C3=A9?= , Anthony PERARD , Michal Orzel , Julien Grall , Stefano Stabellini , Tim Deegan , Dario Faggioli , Juergen Gross , George Dunlap , xen-devel@lists.xenproject.org Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable X-purgate-ID: tlsNG-c201ff/1780123699-E318B443-69D5983C/0/0 X-purgate-type: clean X-purgate-size: 5995 Thanks, Jan. I agree with your comments and will rework this for v3. The main change will be that domain_shutting_down() preserves the old is_shutting_down semantics. It will be true once shutdown has started and remain true after shutdown completion until domain_resume() resets the state. On Wed, Apr 8, 2026 at 4:06=E2=80=AFPM Jan Beulich wrot= e: > > On 01.04.2026 08:41, Mykola Kvach wrote: > > From: Mykola Kvach > > > > The shutdown flow currently overloads is_shutting_down and > > is_shut_down to represent multiple phases of the shutdown lifecycle. > > Some users treat is_shutting_down narrowly as "shutdown still needs to > > be driven to completion", while others rely on it more broadly as > > "the domain is no longer in its normal running state". > > > > Make the lifecycle explicit by introducing enum > > domain_shutdown_state and helper predicates whose names match their > > semantics: domain_shutting_down() for the transient phase, > > domain_shutdown_completed() for the final state, and > > domain_in_shutdown_state() for checks that need the union of both. > > > > The conversion is intentionally not mechanical. The old flags were not > > mutually exclusive: once a domain became fully shut down, > > is_shutting_down remained set. As a result, sites that previously > > used the absence of is_shutting_down to exclude both the transient and > > completed states now use domain_in_shutdown_state(), sites that care > > specifically about the final state use domain_shutdown_completed(), > > and only paths that still have work to do before shutdown finalization > > use domain_shutting_down(). > > In how far is the distinction between domain_shutting_down() and > domain_in_shutdown_state() really necessary? Agreed. I will drop domain_in_shutdown_state() in v3. domain_shutting_down() will preserve the old is_shutting_down semantics, rather than mean only the transient state. That is, it will return true from the point where shutdown has started until domain_resume() resets the state, including after shutdown has completed. > still leaves me pretty clueless as to almost(?) all of the uses of the > latter (where I think the former could be used just as well). Many > paths simply can't be taken anymore for a fully shut down domain, so > the distinction between the two is moot there. > > I'm also concerned of the name domain_in_shutdown_state() itself. To Yes, that name is misleading. Since the helper is not needed anymore, I will remove it in v3. > me this is far closer to domain_shutdown_completed() than to the union > of both states. See how e.g. x86 CPUs can be "in shutdown state", i.e. > not responding to anything but a reset or init signal. > > IOW an entirely mechanical replacement might in fact be easier to look > at. And in the one rare case where the distinction might indeed be > relevant, "domain_shutting_down() || domain_shutdown_completed()" could > be used. Agreed. I will follow this approach in v3. The old is_shutting_down users will use domain_shutting_down(), with the same effective semantics as before. The only users converted to domain_shutdown_completed() will be the ones that previously checked is_shut_down. > > > @@ -1423,9 +1423,12 @@ int domain_shutdown(struct domain *d, u8 reason) > > return 0; > > } > > > > -void domain_resume(struct domain *d) > > +int domain_resume(struct domain *d) > > { > > struct vcpu *v; > > + enum domain_shutdown_state shutdown_state; > > + unsigned int shutdown_code; > > + int rc =3D 0; > > > > /* > > * Some code paths assume that shutdown status does not get reset = under > > @@ -1435,10 +1438,18 @@ void domain_resume(struct domain *d) > > > > spin_lock(&d->shutdown_lock); > > > > - d->is_shutting_down =3D d->is_shut_down =3D 0; > > + shutdown_state =3D d->shutdown_state; > > + shutdown_code =3D d->shutdown_code; > > + > > + if ( !domain_shutdown_completed(d) ) > > + { > > + rc =3D -EINVAL; > > + goto out_unlock; > > + } > > I can't help the impression that you're mixing two things here - adjustme= nt > to how shutdown state is tracked, and enforcement of completed shutdown > right here. This separate change likely would better be split out, and th= en > come with a description saying not only what is being changed, but also w= hy, > and why the change is correct for both call sites. Agreed. I will drop this part from v3. domain_resume() will remain void and the callers will be left unchanged. This patch should only make the existing shutdown state tracking explicit. If resume-state validation is needed, it can be done as a separate change with its own justification for the affected call sites. > > > @@ -1448,9 +1459,17 @@ void domain_resume(struct domain *d) > > v->paused_for_shutdown =3D 0; > > } > > > > + out_unlock: > > spin_unlock(&d->shutdown_lock); > > > > domain_unpause(d); > > + > > + if ( rc ) > > + dprintk(XENLOG_WARNING, > > + "%pd: Invalid domain state for resume: shutdown_state= =3D%u, shutdown_code=3D%u\n", > > + d, shutdown_state, shutdown_code); > > The shutdown code doesn't affect whether the function would fail. The ext= ra > variable just to log it anyway is therefore a little irritating. Is there > any reason to this that I'm overlooking? The reason was only to avoid printing while holding shutdown_lock. I wanted to sample the state under the lock and emit the diagnostic after dropping it. shutdown_code was included only as extra context for that warning, not because it affected the decision. That said, I agree this is not needed here. Since I will drop the resume-state validation from v3, the warning and the extra cached shutdown_code will go away as well. Best regards, Mykola From xen-devel-bounces@lists.xenproject.org Sat May 30 07:25:45 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 07:25:45 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1322875.1589045 (Exim 4.92) (envelope-from ) id 1wTE4g-0000dH-0U; Sat, 30 May 2026 07:25:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1322875.1589045; Sat, 30 May 2026 07:25:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTE4f-0000dA-TI; Sat, 30 May 2026 07:25:37 +0000 Received: by outflank-mailman (input) for mailman id 1322875; Sat, 30 May 2026 07:25:36 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTE4e-0000co-8m for xen-devel@lists.xenproject.org; Sat, 30 May 2026 07:25:36 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTE4d-00CtyZ-5L for xen-devel@lists.xenproject.org; Sat, 30 May 2026 09:25:35 +0200 Received: from [10.42.69.5] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1a90ac-2eae-0a2a0a5409dd-0a2a4505b7c4-26 for ; Sat, 30 May 2026 09:25:34 +0200 Received: from [209.85.208.45] (helo=mail-ed1-f45.google.com) by tlsNG-c201ff.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1a90ee-aaa8-0a2a45050019-d155d02da9a8-3 for ; Sat, 30 May 2026 09:25:34 +0200 Received: by mail-ed1-f45.google.com with SMTP id 4fb4d7f45d1cf-68c3421b009so1579271a12.1 for ; Sat, 30 May 2026 00:25:34 -0700 (PDT) Received: from EPUAKYIW02F7.. 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The two flags are not mutually exclusive: after shutdown completion is_shutting_down remains set until domain_resume() clears both flags. Replace the two booleans with an enum domain_shutdown_state. Keep domain_shutting_down() as the direct replacement for the old is_shutting_down flag: it is true once shutdown has been initiated and remains true after completion, until domain_resume(). Add domain_shutdown_completed() for users that need the final completed state. This makes the state transition explicit while avoiding a semantic split between "in progress" and "completed" at call sites where the old code only cared that shutdown had started and had not yet been reset by domain_resume(). Suggested-by: Jan Beulich Signed-off-by: Mykola Kvach --- Changes in v3: - Keep domain_shutting_down() as a direct replacement for is_shutting_down: true from shutdown start until domain_resume(), including after shutdown completion. - Drop domain_in_shutdown_state(). - Make old is_shutting_down conversions mechanical again; use domain_shutdown_completed() only for old is_shut_down users. - Keep domain_resume() returning void and leave callers unchanged. - Drop resume-state validation and the related invalid-resume diagnostic, including the cached shutdown_state/shutdown_code values. - Reword the commit message to avoid describing domain_shutting_down() as only the transient shutdown phase. Changes in v2: - Drop the shutdown reason restrictions from domain_resume(), so the validation remains compatible with the existing soft-reset flow. - Use clearer helper naming for the three shutdown-state predicates. - Document in the commit message how old is_shutting_down/is_shut_down users map to the new shutdown-state helpers. - Fix label indentation noted during review. Link to discussion: https://patchew.org/Xen/cover.1756392094.git.mykola._5Fkvach@epam.com/bb53d9911b00879c7b25f5258d0e3e48005671f9.1756392094.git.mykola._5Fkvach@epam.com/#a64cff9f-df5f-467b-a944-74e803c64ab9@suse.com --- xen/arch/x86/hvm/viridian/time.c | 2 +- xen/arch/x86/mm.c | 2 +- xen/arch/x86/mm/hap/hap.c | 2 +- xen/arch/x86/mm/shadow/common.c | 5 +++-- xen/arch/x86/mm/shadow/multi.c | 12 +++++++----- xen/common/domain.c | 20 ++++++++++---------- xen/common/domctl.c | 2 +- xen/common/sched/core.c | 2 +- xen/drivers/passthrough/iommu.c | 8 ++++---- xen/drivers/passthrough/pci.c | 2 +- xen/include/xen/sched.h | 23 +++++++++++++++++++---- 11 files changed, 49 insertions(+), 31 deletions(-) diff --git a/xen/arch/x86/hvm/viridian/time.c b/xen/arch/x86/hvm/viridian/time.c index 9311858d63..cf57af263a 100644 --- a/xen/arch/x86/hvm/viridian/time.c +++ b/xen/arch/x86/hvm/viridian/time.c @@ -102,7 +102,7 @@ static void time_ref_count_thaw(const struct domain *d) struct viridian_domain *vd = d->arch.hvm.viridian; struct viridian_time_ref_count *trc = &vd->time_ref_count; - if ( d->is_shutting_down || + if ( domain_shutting_down(d) || test_and_set_bit(_TRC_running, &trc->flags) ) return; diff --git a/xen/arch/x86/mm.c b/xen/arch/x86/mm.c index a158379e77..c8ce166d6e 100644 --- a/xen/arch/x86/mm.c +++ b/xen/arch/x86/mm.c @@ -1219,7 +1219,7 @@ void put_page_from_l1e(l1_pgentry_t l1e, struct domain *l1e_owner) */ #if _PAGE_GNTTAB if ( (l1e_get_flags(l1e) & _PAGE_GNTTAB) && - !l1e_owner->is_shutting_down && !l1e_owner->is_dying ) + !domain_shutting_down(l1e_owner) && !l1e_owner->is_dying ) { gprintk(XENLOG_WARNING, "Attempt to implicitly unmap %pd's grant PTE %" PRIpte "\n", diff --git a/xen/arch/x86/mm/hap/hap.c b/xen/arch/x86/mm/hap/hap.c index 5ccb80bda5..0ede4181a0 100644 --- a/xen/arch/x86/mm/hap/hap.c +++ b/xen/arch/x86/mm/hap/hap.c @@ -414,7 +414,7 @@ static mfn_t hap_make_monitor_table(struct vcpu *v) oom: if ( !d->is_dying && - (!d->is_shutting_down || d->shutdown_code != SHUTDOWN_crash) ) + (!domain_shutting_down(d) || d->shutdown_code != SHUTDOWN_crash) ) { printk(XENLOG_G_ERR "%pd: out of memory building monitor pagetable\n", d); diff --git a/xen/arch/x86/mm/shadow/common.c b/xen/arch/x86/mm/shadow/common.c index ed698fa90b..c956b4840b 100644 --- a/xen/arch/x86/mm/shadow/common.c +++ b/xen/arch/x86/mm/shadow/common.c @@ -164,7 +164,7 @@ void shadow_promote(struct domain *d, mfn_t gmfn, unsigned int type) /* We should never try to promote a gmfn that has writeable mappings */ ASSERT((page->u.inuse.type_info & PGT_type_mask) != PGT_writable_page || (page->u.inuse.type_info & PGT_count_mask) == 0 - || d->is_shutting_down); + || domain_shutting_down(d)); /* Is the page already shadowed? */ if ( !test_and_set_bit(_PGC_shadowed_pt, &page->count_info) ) @@ -442,7 +442,8 @@ bool shadow_prealloc(struct domain *d, unsigned int type, unsigned int count) count += paging_logdirty_levels(); ret = _shadow_prealloc(d, count); - if ( !ret && (!d->is_shutting_down || d->shutdown_code != SHUTDOWN_crash) ) + if ( !ret && (!domain_shutting_down(d) || + d->shutdown_code != SHUTDOWN_crash) ) /* * Failing to allocate memory required for shadow usage can only result in * a domain crash, do it here rather that relying on every caller to do it. diff --git a/xen/arch/x86/mm/shadow/multi.c b/xen/arch/x86/mm/shadow/multi.c index 2990cee869..632a83a78e 100644 --- a/xen/arch/x86/mm/shadow/multi.c +++ b/xen/arch/x86/mm/shadow/multi.c @@ -2370,7 +2370,8 @@ static int cf_check sh_page_fault( * already used for some special purpose (ioreq pages, or granted pages). * If that happens we'll have killed the guest already but it's still not * safe to propagate entries out of the guest PT so get out now. */ - if ( unlikely(d->is_shutting_down && d->shutdown_code == SHUTDOWN_crash) ) + if ( unlikely(domain_shutting_down(d) && + d->shutdown_code == SHUTDOWN_crash) ) { SHADOW_PRINTK("guest is shutting down\n"); goto propagate; @@ -2480,7 +2481,7 @@ static int cf_check sh_page_fault( #if GUEST_PAGING_LEVELS == 3 sh_update_cr3(v, false); #else - ASSERT(d->is_shutting_down); + ASSERT(domain_shutting_down(d)); sh_trace_va(TRC_SHADOW_DOMF_DYING, va); #endif paging_unlock(d); @@ -2494,7 +2495,8 @@ static int cf_check sh_page_fault( && ft == ft_demand_write ) sh_unsync(v, gmfn); - if ( unlikely(d->is_shutting_down && d->shutdown_code == SHUTDOWN_crash) ) + if ( unlikely(domain_shutting_down(d) && + d->shutdown_code == SHUTDOWN_crash) ) { /* We might end up with a crashed domain here if * sh_remove_shadows() in a previous sh_resync() call has @@ -3265,7 +3267,7 @@ static pagetable_t cf_check sh_update_cr3(struct vcpu *v, bool noflush) sh_make_shadow); if ( unlikely(pagetable_is_null(v->arch.paging.shadow.shadow_table[0])) ) { - ASSERT(d->is_dying || d->is_shutting_down); + ASSERT(d->is_dying || domain_shutting_down(d)); return old_entry; } if ( !paging_mode_external(d) && !is_pv_32bit_domain(d) ) @@ -3332,7 +3334,7 @@ static pagetable_t cf_check sh_update_cr3(struct vcpu *v, bool noflush) ASSERT(pagetable_is_null(old_entry)); if ( unlikely(pagetable_is_null(v->arch.paging.shadow.shadow_table[0])) ) { - ASSERT(d->is_dying || d->is_shutting_down); + ASSERT(d->is_dying || domain_shutting_down(d)); return old_entry; } #else diff --git a/xen/common/domain.c b/xen/common/domain.c index bb9e210c28..473b7f8e3f 100644 --- a/xen/common/domain.c +++ b/xen/common/domain.c @@ -191,7 +191,7 @@ static void set_domain_state_info(struct xen_domctl_get_domain_state *info, const struct domain *d) { info->state = XEN_DOMCTL_GETDOMSTATE_STATE_EXIST; - if ( d->is_shut_down ) + if ( domain_shutdown_completed(d) ) info->state |= XEN_DOMCTL_GETDOMSTATE_STATE_SHUTDOWN; if ( d->is_dying == DOMDYING_dying ) info->state |= XEN_DOMCTL_GETDOMSTATE_STATE_DYING; @@ -282,14 +282,14 @@ static void __domain_finalise_shutdown(struct domain *d) BUG_ON(!spin_is_locked(&d->shutdown_lock)); - if ( d->is_shut_down ) + if ( domain_shutdown_completed(d) ) return; for_each_vcpu ( d, v ) if ( !v->paused_for_shutdown ) return; - d->is_shut_down = 1; + d->shutdown_state = DOMSHUTDOWN_complete; domain_changed_state(d); if ( (d->shutdown_code == SHUTDOWN_suspend) && d->suspend_evtchn ) evtchn_send(d, d->suspend_evtchn); @@ -303,7 +303,7 @@ static void vcpu_check_shutdown(struct vcpu *v) spin_lock(&d->shutdown_lock); - if ( d->is_shutting_down ) + if ( domain_shutting_down(d) ) { if ( !v->paused_for_shutdown ) vcpu_pause_nosync(v); @@ -1356,7 +1356,7 @@ int domain_kill(struct domain *d) void __domain_crash(struct domain *d) { - if ( d->is_shutting_down ) + if ( domain_shutting_down(d) ) { /* Print nothing: the domain is already shutting down. */ } @@ -1394,13 +1394,13 @@ int domain_shutdown(struct domain *d, u8 reason) if ( is_hardware_domain(d) ) hwdom_shutdown(reason); - if ( d->is_shutting_down ) + if ( domain_shutting_down(d) ) { spin_unlock(&d->shutdown_lock); return 0; } - d->is_shutting_down = 1; + d->shutdown_state = DOMSHUTDOWN_in_progress; smp_mb(); /* set shutdown status /then/ check for per-cpu deferrals */ @@ -1435,7 +1435,7 @@ void domain_resume(struct domain *d) spin_lock(&d->shutdown_lock); - d->is_shutting_down = d->is_shut_down = 0; + d->shutdown_state = DOMSHUTDOWN_none; arch_domain_resume(d); @@ -1460,7 +1460,7 @@ int vcpu_start_shutdown_deferral(struct vcpu *v) v->defer_shutdown = 1; smp_mb(); /* set deferral status /then/ check for shutdown */ - if ( unlikely(v->domain->is_shutting_down) ) + if ( unlikely(domain_shutting_down(v->domain)) ) vcpu_check_shutdown(v); return v->defer_shutdown; @@ -1470,7 +1470,7 @@ void vcpu_end_shutdown_deferral(struct vcpu *v) { v->defer_shutdown = 0; smp_mb(); /* clear deferral status /then/ check for shutdown */ - if ( unlikely(v->domain->is_shutting_down) ) + if ( unlikely(domain_shutting_down(v->domain)) ) vcpu_check_shutdown(v); } diff --git a/xen/common/domctl.c b/xen/common/domctl.c index b969f5ada6..5594fc72d8 100644 --- a/xen/common/domctl.c +++ b/xen/common/domctl.c @@ -86,7 +86,7 @@ void getdomaininfo(struct domain *d, struct xen_domctl_getdomaininfo *info) info->flags = (info->nr_online_vcpus ? flags : 0) | ((d->is_dying == DOMDYING_dead) ? XEN_DOMINF_dying : 0) | - (d->is_shut_down ? XEN_DOMINF_shutdown : 0) | + (domain_shutdown_completed(d) ? XEN_DOMINF_shutdown : 0) | (d->controller_pause_count > 0 ? XEN_DOMINF_paused : 0) | (d->debugger_attached ? XEN_DOMINF_debugged : 0) | (is_xenstore_domain(d) ? XEN_DOMINF_xs_domain : 0) | diff --git a/xen/common/sched/core.c b/xen/common/sched/core.c index 8e2b75bc35..9ac00e4c0d 100644 --- a/xen/common/sched/core.c +++ b/xen/common/sched/core.c @@ -1539,7 +1539,7 @@ static void cf_check domain_watchdog_timeout(void *data) BUILD_BUG_ON(alignof(*d) < PAGE_SIZE); - if ( d->is_shutting_down || d->is_dying ) + if ( domain_shutting_down(d) || d->is_dying ) return; printk("Watchdog timer %u fired for %pd\n", id, d); diff --git a/xen/drivers/passthrough/iommu.c b/xen/drivers/passthrough/iommu.c index c9425d6971..4b22ecfe65 100644 --- a/xen/drivers/passthrough/iommu.c +++ b/xen/drivers/passthrough/iommu.c @@ -355,7 +355,7 @@ long iommu_map(struct domain *d, dfn_t dfn0, mfn_t mfn0, if ( likely(!rc) ) continue; - if ( !d->is_shutting_down && printk_ratelimit() ) + if ( !domain_shutting_down(d) && printk_ratelimit() ) printk(XENLOG_ERR "d%d: IOMMU mapping dfn %"PRI_dfn" to mfn %"PRI_mfn" failed: %d\n", d->domain_id, dfn_x(dfn), mfn_x(mfn), rc); @@ -427,7 +427,7 @@ long iommu_unmap(struct domain *d, dfn_t dfn0, unsigned long page_count, if ( likely(!err) ) continue; - if ( !d->is_shutting_down && printk_ratelimit() ) + if ( !domain_shutting_down(d) && printk_ratelimit() ) printk(XENLOG_ERR "d%d: IOMMU unmapping dfn %"PRI_dfn" failed: %d\n", d->domain_id, dfn_x(dfn), err); @@ -492,7 +492,7 @@ int iommu_iotlb_flush(struct domain *d, dfn_t dfn, unsigned long page_count, flush_flags); if ( unlikely(rc) ) { - if ( !d->is_shutting_down && printk_ratelimit() ) + if ( !domain_shutting_down(d) && printk_ratelimit() ) printk(XENLOG_ERR "d%d: IOMMU IOTLB flush failed: %d, dfn %"PRI_dfn", page count %lu flags %x\n", d->domain_id, rc, dfn_x(dfn), page_count, flush_flags); @@ -517,7 +517,7 @@ int iommu_iotlb_flush_all(struct domain *d, unsigned int flush_flags) flush_flags | IOMMU_FLUSHF_all); if ( unlikely(rc) ) { - if ( !d->is_shutting_down && printk_ratelimit() ) + if ( !domain_shutting_down(d) && printk_ratelimit() ) printk(XENLOG_ERR "d%d: IOMMU IOTLB flush all failed: %d\n", d->domain_id, rc); diff --git a/xen/drivers/passthrough/pci.c b/xen/drivers/passthrough/pci.c index 464bb0fee4..5dbee61900 100644 --- a/xen/drivers/passthrough/pci.c +++ b/xen/drivers/passthrough/pci.c @@ -1746,7 +1746,7 @@ void iommu_dev_iotlb_flush_timeout(struct domain *d, struct pci_dev *pdev) pdev->broken = true; - if ( !d->is_shutting_down && printk_ratelimit() ) + if ( !domain_shutting_down(d) && printk_ratelimit() ) printk(XENLOG_ERR "dom%d: ATS device %pp flush failed\n", d->domain_id, &pdev->sbdf); if ( !is_hardware_domain(d) ) diff --git a/xen/include/xen/sched.h b/xen/include/xen/sched.h index 00db1da12f..22a0deb31f 100644 --- a/xen/include/xen/sched.h +++ b/xen/include/xen/sched.h @@ -222,7 +222,7 @@ struct vcpu bool force_context_switch; /* Require shutdown to be deferred for some asynchronous operation? */ bool defer_shutdown; - /* VCPU is paused following shutdown request (d->is_shutting_down)? */ + /* VCPU is paused following a domain shutdown request? */ bool paused_for_shutdown; /* VCPU need affinity restored */ uint8_t affinity_broken; @@ -382,6 +382,12 @@ struct domain_console { char buf[256]; }; +enum domain_shutdown_state { + DOMSHUTDOWN_none, + DOMSHUTDOWN_in_progress, + DOMSHUTDOWN_complete, +}; + struct domain { domid_t domain_id; @@ -552,10 +558,9 @@ struct domain struct rangeset *iomem_caps; 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Sat, 30 May 2026 09:47:56 -0700 (PDT) MIME-Version: 1.0 Reply-To: ludloff@gmail.com From: Christian Ludloff Date: Sat, 30 May 2026 09:47:44 -0700 X-Gm-Features: AVHnY4LzRI4mtM2MVMA9vVPgTReaIAtSfV8wr74SnOQ4vnVCBcmxdNjiRFE8TOw Message-ID: Subject: Re: [PATCH v4 15/47] KVM: x86: Officially define CPUID 0x40000010 as PV Timing Info (TSC and Bus) To: Sean Christopherson Cc: Paolo Bonzini , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, Kiryl Shutsemau , "K. Y. Srinivasan" , Haiyang Zhang , Wei Liu , Dexuan Cui , Long Li , Ajay Kaher , Alexey Makhalov , Jan Kiszka , Andy Lutomirski , Peter Zijlstra , Juergen Gross , Daniel Lezcano , John Stultz , "H. Peter Anvin" , Rick Edgecombe , Vitaly Kuznetsov , Boris Ostrovsky , Stephen Boyd , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-coco@lists.linux.dev, linux-hyperv@vger.kernel.org, virtualization@lists.linux.dev, xen-devel@lists.xenproject.org, David Woodhouse , Tom Lendacky , Nikunj A Dadhania , David Woodhouse , Michael Kelley , Thomas Gleixner , bcm-kernel-feedback-list@broadcom.com Content-Type: text/plain; charset="UTF-8" X-purgate-ID: tlsNG-bad1c0/1780159676-8A38AA53-A06BA55E/0/0 X-purgate-type: clean X-purgate-size: 323 > + * # EAX: (Virtual) TSC frequency in kHz. > + * # EBX: (Virtual) Bus (local APIC timer) frequency in kHz. > + * # ECX, EDX: Reserved (must be zero). Can someone from Broadcom please speak up as to what a non-ECX value signifies for their HV? (Asking because I see a value of 2, not a must-be-zero.) -- C. From xen-devel-bounces@lists.xenproject.org Sat May 30 18:26:14 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 18:26:14 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323105.1589063 (Exim 4.92) (envelope-from ) id 1wTONt-0001o4-DQ; Sat, 30 May 2026 18:26:09 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323105.1589063; Sat, 30 May 2026 18:26:09 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTONt-0001nx-A5; Sat, 30 May 2026 18:26:09 +0000 Received: by outflank-mailman (input) for mailman id 1323105; Sat, 30 May 2026 18:26:08 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTONp-0001mm-ES for xen-devel@lists.xenproject.org; Sat, 30 May 2026 18:26:08 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTONo-00C4mB-CJ for xen-devel@lists.xenproject.org; Sat, 30 May 2026 20:26:04 +0200 Received: from [10.42.69.2] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b2b53-e002-0a2a0a5209dd-0a2a4502cabc-32 for ; Sat, 30 May 2026 20:26:04 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-720697.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b2bba-af86-0a2a45020019-d561b338baea-3 for ; Sat, 30 May 2026 20:26:03 +0200 Received: from maestria.local.igalia.com ([192.168.10.14] helo=mail.igalia.com) by fanzine2.igalia.com with esmtps (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wTONE-00ALEi-Em; Sat, 30 May 2026 20:25:28 +0200 Received: from webmail.service.igalia.com ([192.168.21.45]) by mail.igalia.com with esmtp (Exim) id 1wTONC-003hJ2-2f; Sat, 30 May 2026 20:25:28 +0200 Received: from localhost ([127.0.0.1] helo=webmail.igalia.com) by webmail.service.igalia.com with esmtp (Exim 4.98.2) (envelope-from ) id 1wTONB-00000005YVY-1bPX; Sat, 30 May 2026 20:25:25 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=+CEMRaJFugQuRP0/DJTzv+8chqmTJilMImwXMol396E=; b=BR3yV6wgeIxWYy5xNZ+xGvXXS7 02mPLhQgHJHn9BspRzTnC/IQvF+JGiFsFf2dUclCkPtWfbZ3dI1KvC4JytpgZzEHagH4Z/dAcGiBt rRNwIqjzQiHXUPQw5IGP4QQ+JobrnhM377GGSuAIw5crru1gwV6c5db0f0uM5jjf4yQgLzvY05b6W nGi7bTAwAgysJJDvp5XGHtmL56IA0Ob6gy5nxUwo3SM9Pkv59buwRJ8TFqXTOoT+WyMf/o4EJogcQ erTteuHigGB4uQkUubfJ0Ul6ITZ/pqB0G3lWZ6C71yx1edTTtdwZnNBtB5Tl1NVteGnR3BRDk3ZdU ybdqi6ZQ==; MIME-Version: 1.0 Date: Sat, 30 May 2026 15:25:25 -0300 From: Mauricio Faria de Oliveira To: Borislav Petkov Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) In-Reply-To: <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> Message-ID: <274609541a0c7c6b49b386001967dd2b@igalia.com> X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-2.2, Tests=ALL_TRUSTED=-3,BAYES_50=0.8 X-Spam-Score: -21 X-Spam-Bar: -- X-purgate-ID: tlsNG-720697/1780165564-8057B161-0EE46CF7/0/0 X-purgate-type: clean X-purgate-size: 1811 Thanks for having a look at this. On 2026-05-27 17:47, Borislav Petkov wrote: > On Tue, May 26, 2026 at 11:52:32AM -0300, Mauricio Faria de Oliveira wrote: >> The issue of unbootable VMs with CONFIG_PVH due to CONFIG_KASAN is back. > > ... and we care about that particular configuration because...? PVH and KASAN can be enabled independently for their own purposes (startup entry point and debugging), but when combined, KASAN might break booting via the PVH entry point. There are precedents for disabling KASAN instrumentation in specific code paths, including this one (see listed commits), so addressing this issue/regression seems reasonable. In this instance, the use case is to speed up the dev-test cycle when debugging on VMs: PVH allows booting directly from vmlinux, avoiding the need to build/compress and decompress bzImage, while KASAN helps detect issues early. > >> arch/x86/boot/string.c | 6 ++---- >> arch/x86/include/asm/cpuid/api.h | 2 +- >> arch/x86/include/asm/string.h | 21 +------------------- >> arch/x86/include/asm/string_inline.h | 37 ++++++++++++++++++++++++++++++++++++ >> arch/x86/platform/pvh/enlighten.c | 3 ++- >> 5 files changed, 43 insertions(+), 26 deletions(-) > > I fail to see justification for those gymnastics. Briefly, this is a side effect of reusing code from 'boot/string.c' through , which introduces additional complications; please see patch 1 for details. These complications could be avoided by not reusing that code and instead adding slightly duplicated code [1] directly to , if that is preferred. Please let me know your thoughts. Thanks, [1] https://lore.kernel.org/all/324ef97b16f52e0ccc72f6381d1b5dd2@igalia.com/ -- Mauricio From xen-devel-bounces@lists.xenproject.org Sat May 30 22:05:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 22:05:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323177.1589073 (Exim 4.92) (envelope-from ) id 1wTRoA-0005rK-1x; Sat, 30 May 2026 22:05:30 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323177.1589073; Sat, 30 May 2026 22:05:30 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTRo9-0005rD-UV; Sat, 30 May 2026 22:05:29 +0000 Received: by outflank-mailman (input) for mailman id 1323177; Sat, 30 May 2026 22:05:28 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTRo8-0005r7-5l for xen-devel@lists.xenproject.org; Sat, 30 May 2026 22:05:28 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTRo6-0044bt-VI for xen-devel@lists.xenproject.org; Sun, 31 May 2026 00:05:27 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b5f05-bab6-0a2a0a5309dd-0a2a4507dedc-38 for ; Sun, 31 May 2026 00:05:26 +0200 Received: from [65.109.113.108] (helo=mail.alien8.de) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b5f26-229c-0a2a45070019-416d716ca968-3 for ; Sun, 31 May 2026 00:05:26 +0200 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTP id BB8E340E01F9; Sat, 30 May 2026 22:05:25 +0000 (UTC) Received: from mail.alien8.de ([127.0.0.1]) by localhost (mail.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id Ysdnia3bs4JX; Sat, 30 May 2026 22:05:16 +0000 (UTC) Received: from stx.tnic (unknown [IPv6:2600:1700:38ca:c00:b8a3:f58e:8829:9ca6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-256) server-digest SHA256) (No client certificate requested) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id 4114E40E015A; Sat, 30 May 2026 22:05:02 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=alien8 header.d=alien8.de header.i="@alien8.de" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" X-Virus-Scanned: Debian amavisd-new at mail.alien8.de Authentication-Results: mail.alien8.de (amavisd-new); dkim=pass (4096-bit key) header.d=alien8.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=alien8; t=1780178715; bh=m3IFBRGWpYfiOxqY5DPx1pgyUXwj+C+/Nkh3HlDkLUU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=jHWh7E8k2saR9udKBxbRiKvsGUXX1PQE1YcCQLWcwas8+yFS+KqaQ0c53dN1G+8Pd ctJBdXvMPjZFQD7whTbgoQG4822uU9ozbbLxu0V85npj3LZB5WKn/n0TV4on98ddsY koQb4/o8bKN0zmKS3dXpxDl/hLFGq04VOFMvZLRsZHuiiQ2AXTwwrX3OHmkYv5Jh2t 5z/EhIozSEJPxxLtfTDWdjg2nPXv+3IiPXdh21jdYN0pwA/z6tbcBS1yvopcOipSVL 7Usj7PIuH6Ko+ybsxBcfBS9MjMWWr5S+KUozDqPKeeJDqIsumnQVOcQ7XkL5zLTAAY sYO+5ogu0meNaVc4g+zw7hTLOxvx8hDJAX7XbQvWk/Tu52ADIHI3EJejV1UjR1nrTo /A1YxXAI5KJrrzuEz3YZb60k13GkdvVL4K+vSOxWkcbqCm075GwPVUhcBPZaGJTyW3 kPf4SCuBlBRfI+H6E6nXkr0SSUnM3FYMfLTiZQo9tuOV1b9L9JRut7zTXVjhBV5c4J UMA+L6F1jV4/qVRuBLPOvL6vj72clniEAL/iAjfxtTIfvabLH4iB4NPYJpm64NIff9 HOWmKhXoAJc74C0N3Jhr5k/OVDFLhU8g+QVUIAD2bueE0X8/v9DAGmgYdMO5glEWsK 5G4UEe7v4JrWShGemSZQgkUE= Date: Sat, 30 May 2026 15:04:53 -0700 From: Borislav Petkov To: Mauricio Faria de Oliveira Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) Message-ID: <20260530220453.GAahtfBVv2hydidbnW@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> <274609541a0c7c6b49b386001967dd2b@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <274609541a0c7c6b49b386001967dd2b@igalia.com> X-purgate-ID: tlsNG-ef75cf/1780178726-0B175C48-2A0436CE/0/0 X-purgate-type: clean X-purgate-size: 876 On Sat, May 30, 2026 at 03:25:25PM -0300, Mauricio Faria de Oliveira wrote: > In this instance, the use case is to speed up the dev-test cycle when > debugging on VMs: PVH allows booting directly from vmlinux, avoiding the > need to build/compress and decompress bzImage, while KASAN helps detect > issues early. Makes sense in itself. And you can't do your use case with KVM? It has to be Xen? > Briefly, this is a side effect of reusing code from 'boot/string.c' > through , which introduces additional complications; > please see patch 1 for details. > > These complications could be avoided by not reusing that code and > instead adding slightly duplicated code [1] directly to , > if that is preferred. I'll take a look. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette From xen-devel-bounces@lists.xenproject.org Sat May 30 23:02:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 23:02:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323206.1589080 (Exim 4.92) (envelope-from ) id 1wTShA-0005NC-VD; Sat, 30 May 2026 23:02:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323206.1589080; Sat, 30 May 2026 23:02:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTShA-0005N4-S4; Sat, 30 May 2026 23:02:20 +0000 Received: by outflank-mailman (input) for mailman id 1323206; Sat, 30 May 2026 23:02:18 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTSh8-0005Mv-DQ for xen-devel@lists.xenproject.org; Sat, 30 May 2026 23:02:18 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTSh7-008Bxe-Qc for xen-devel@lists.xenproject.org; Sun, 31 May 2026 01:02:17 +0200 Received: from [10.42.69.8] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b6c64-bab6-0a2a0a5309dd-0a2a4508a8e4-22 for ; Sun, 31 May 2026 01:02:17 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-c1860d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b6c78-63b5-0a2a45080019-d561b338bfe2-3 for ; Sun, 31 May 2026 01:02:17 +0200 Received: from maestria.local.igalia.com ([192.168.10.14] helo=mail.igalia.com) by fanzine2.igalia.com with esmtps (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wTSgc-00AOsE-EC; Sun, 31 May 2026 01:01:46 +0200 Received: from webmail.service.igalia.com ([192.168.21.45]) by mail.igalia.com with esmtp (Exim) id 1wTSga-003sTq-Bu; Sun, 31 May 2026 01:01:46 +0200 Received: from localhost ([127.0.0.1] helo=webmail.igalia.com) by webmail.service.igalia.com with esmtp (Exim 4.98.2) (envelope-from ) id 1wTSgZ-00000005bzp-2pEg; Sun, 31 May 2026 01:01:44 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=vq4azo/c2He5mOtc4mZYmsILjl/XtYZgVfnCKXgdyY0=; b=LkWZnEv22LlTLcY6fmLKiROp56 OWvZ1LNFPJZ5PLPaVZr+ELjr+H/RPlglV0ipAwBNPcCX5K374jR3j5WZ8NZw2WcAvfyHHpZ2erGJi gaQ87bO7GKqJ8MMQ0jUWvlIu9vfxAs3upgeze4TvcMo8dXI01vzR7/uPZK0ZuQs7L6z5ztDs7SELn unogvVuaNurnticDWF2Fugy5lvZFpUaKVRkBYQa991rBD6hkZc8a6E/mWtlA5jTaCGw09k+lDx21/ EKDQ/eCN/0RvJ+AzjTg2pUshmAH8Ur4Hs2eRPIjUfd0HlJJxoozymXKKB11A6K4Vb4GYivbEhKDll Cd05Gn/g==; MIME-Version: 1.0 Date: Sat, 30 May 2026 20:01:44 -0300 From: Mauricio Faria de Oliveira To: Borislav Petkov Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) In-Reply-To: <20260530220453.GAahtfBVv2hydidbnW@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> <274609541a0c7c6b49b386001967dd2b@igalia.com> <20260530220453.GAahtfBVv2hydidbnW@fat_crate.local> Message-ID: <7f1af7169b4f8c90abae28cebd3e377f@igalia.com> X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-4.8, Tests=ALL_TRUSTED=-3,AWL=-2.550,BAYES_50=0.8 X-Spam-Score: -47 X-Spam-Bar: ---- X-purgate-ID: tlsNG-c1860d/1780182137-BEB74DB1-C41E2E8D/0/0 X-purgate-type: clean X-purgate-size: 1100 On 2026-05-30 19:04, Borislav Petkov wrote: > On Sat, May 30, 2026 at 03:25:25PM -0300, Mauricio Faria de Oliveira wrote: >> In this instance, the use case is to speed up the dev-test cycle when >> debugging on VMs: PVH allows booting directly from vmlinux, avoiding the >> need to build/compress and decompress bzImage, while KASAN helps detect >> issues early. > > Makes sense in itself. And you can't do your use case with KVM? It has to be > Xen? It uses KVM, actually. IIUIC, the PVH entry point was originally developed for Xen, but later QEMU support was added for KVM as well. (found this blog post [1] with a nice summary and links about it.) >> Briefly, this is a side effect of reusing code from 'boot/string.c' >> through , which introduces additional complications; >> please see patch 1 for details. >> >> These complications could be avoided by not reusing that code and >> instead adding slightly duplicated code [1] directly to , >> if that is preferred. > > I'll take a look. Ok, thanks! > > Thx. -- Mauricio From xen-devel-bounces@lists.xenproject.org Sat May 30 23:03:03 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 23:03:03 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323212.1589089 (Exim 4.92) (envelope-from ) id 1wTShr-0005oC-61; Sat, 30 May 2026 23:03:03 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323212.1589089; Sat, 30 May 2026 23:03:03 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTShr-0005o5-3K; Sat, 30 May 2026 23:03:03 +0000 Received: by outflank-mailman (input) for mailman id 1323212; Sat, 30 May 2026 23:03:02 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTShq-0005nx-0I for xen-devel@lists.xenproject.org; Sat, 30 May 2026 23:03:02 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTShp-0063jz-DX for xen-devel@lists.xenproject.org; Sun, 31 May 2026 01:03:01 +0200 Received: from [10.42.69.6] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b6c31-2eae-0a2a0a5409dd-0a2a450698cc-22 for ; Sun, 31 May 2026 01:03:01 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-16d1c6.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b6ca3-7371-0a2a45060019-d561b338c592-3 for ; Sun, 31 May 2026 01:03:00 +0200 Received: from maestria.local.igalia.com ([192.168.10.14] helo=mail.igalia.com) by fanzine2.igalia.com with esmtps (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wTShW-00AOt3-O5; Sun, 31 May 2026 01:02:42 +0200 Received: from webmail.service.igalia.com ([192.168.21.45]) by mail.igalia.com with esmtp (Exim) id 1wTShU-003sXQ-Bo; Sun, 31 May 2026 01:02:42 +0200 Received: from localhost ([127.0.0.1] helo=webmail.igalia.com) by webmail.service.igalia.com with esmtp (Exim 4.98.2) (envelope-from ) id 1wTShT-00000005c0H-2nsP; Sun, 31 May 2026 01:02:40 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=0e1j39Y2oFVYSscT1RqTvuMxpPQ15EgNX2akOpk7I+c=; b=ZyKbv4b/FhlYIu0FsLkaQYN3C4 Tw5ecV/XYK6/hYhF4M3Kvextrh9BUJy9/rtdAOrN8KfPjdC+kNVnsnDezMQHsaXi7HDEQxjHYp63m BpOAuo0CFI0370U/Os2bmDppfV56giWs12GXk4Z9aXIgyn9wjaD3qfA2ZUJ3KSp+tAmgooKb9O8vF S0A9msZfeiLGgpZi+V1gq8O0ahz0g4lIVjHCggRFs5U5MKR6l383pNSgqCGcR6fZUev+hFOVb67zN C45NXw4MULVFmyCZaaF9kNyFuzfIv50xxlAX7jFf6LNuhg5Ru00N+PVfKqYW0N7dNdzgEVKcaKaJD beuzu9NQ==; MIME-Version: 1.0 Date: Sat, 30 May 2026 20:02:40 -0300 From: Mauricio Faria de Oliveira To: Borislav Petkov Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 0/4] x86/pvh: fix unbootable VMs again (PVH + KASAN) In-Reply-To: <7f1af7169b4f8c90abae28cebd3e377f@igalia.com> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260527204736.GBahdYaKk6kAkIUYE3@fat_crate.local> <274609541a0c7c6b49b386001967dd2b@igalia.com> <20260530220453.GAahtfBVv2hydidbnW@fat_crate.local> <7f1af7169b4f8c90abae28cebd3e377f@igalia.com> Message-ID: <28155e57d75407a645d57e4a6f99859c@igalia.com> X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-4.7, Tests=ALL_TRUSTED=-3,AWL=-2.551,BAYES_50=0.8,URIBL_BLOCKED=0.001,URIBL_DBL_BLOCKED_OPENDNS=0.001,URIBL_ZEN_BLOCKED_OPENDNS=0.001 X-Spam-Score: -46 X-Spam-Bar: ---- X-purgate-ID: tlsNG-16d1c6/1780182181-8E58CD75-3A0F5103/0/0 X-purgate-type: clean X-purgate-size: 1280 On 2026-05-30 20:01, Mauricio Faria de Oliveira wrote: > On 2026-05-30 19:04, Borislav Petkov wrote: >> On Sat, May 30, 2026 at 03:25:25PM -0300, Mauricio Faria de Oliveira wrote: >>> In this instance, the use case is to speed up the dev-test cycle when >>> debugging on VMs: PVH allows booting directly from vmlinux, avoiding the >>> need to build/compress and decompress bzImage, while KASAN helps detect >>> issues early. >> >> Makes sense in itself. And you can't do your use case with KVM? It has to be >> Xen? > > It uses KVM, actually. > > IIUIC, the PVH entry point was originally developed for Xen, but later > QEMU support was added for KVM as well. > (found this blog post [1] with a nice summary and links about it.) [1] https://stefano-garzarella.github.io/posts/2019-08-23-qemu-linux-kernel-pvh/ >>> Briefly, this is a side effect of reusing code from 'boot/string.c' >>> through , which introduces additional complications; >>> please see patch 1 for details. >>> >>> These complications could be avoided by not reusing that code and >>> instead adding slightly duplicated code [1] directly to , >>> if that is preferred. >> >> I'll take a look. > > Ok, thanks! > >> >> Thx. -- Mauricio From xen-devel-bounces@lists.xenproject.org Sat May 30 23:49:29 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 23:49:29 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323235.1589098 (Exim 4.92) (envelope-from ) id 1wTTQZ-00035w-JV; Sat, 30 May 2026 23:49:15 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323235.1589098; Sat, 30 May 2026 23:49:15 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTTQZ-00035p-Gr; Sat, 30 May 2026 23:49:15 +0000 Received: by outflank-mailman (input) for mailman id 1323235; Sat, 30 May 2026 23:49:14 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTTQY-00035g-EO for xen-devel@lists.xenproject.org; Sat, 30 May 2026 23:49:14 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTTQX-008GUF-AL for xen-devel@lists.xenproject.org; Sun, 31 May 2026 01:49:13 +0200 Received: from [10.42.69.9] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b7777-5cb7-0a2a0a5109dd-0a2a4509b9ae-2 for ; Sun, 31 May 2026 01:49:13 +0200 Received: from [65.109.113.108] (helo=mail.alien8.de) by tlsNG-bad1c0.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b7778-2497-0a2a45090019-416d716cdb16-3 for ; Sun, 31 May 2026 01:49:13 +0200 Received: from localhost (localhost.localdomain [127.0.0.1]) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTP id 27FB440E015B; Sat, 30 May 2026 23:49:12 +0000 (UTC) Received: from mail.alien8.de ([127.0.0.1]) by localhost (mail.alien8.de [127.0.0.1]) (amavisd-new, port 10026) with ESMTP id CuojZA2qaerR; Sat, 30 May 2026 23:49:02 +0000 (UTC) Received: from stx.tnic (unknown [IPv6:2600:1700:38ca:c00:b8a3:f58e:8829:9ca6]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature ECDSA (P-256) server-digest SHA256) (No client certificate requested) by mail.alien8.de (SuperMail on ZX Spectrum 128k) with ESMTPSA id C124540E015A; Sat, 30 May 2026 23:48:47 +0000 (UTC) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=alien8 header.d=alien8.de header.i="@alien8.de" header.h="Date:From:To:Cc:Subject:References:In-Reply-To" X-Virus-Scanned: Debian amavisd-new at mail.alien8.de Authentication-Results: mail.alien8.de (amavisd-new); dkim=pass (4096-bit key) header.d=alien8.de DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alien8.de; s=alien8; t=1780184941; bh=4+MFkyNyrinsu/RKn0dXUHfFSV9ybIhTXQSILLvX/Ro=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=X4grmiUmhfVbDVTs4PNwjGXhCN//Yg3GEFQycYhBCoOsmx1C+fScaEheQUEcfvIxb 3/pp8kzTw1HkNsiuUwrhcsP5FItKOLbOJwp1ZKHpQ//NSuT9NPLfqyqcKh3qr+e6E3 c5FZ/Ye20oI512sH4PUiiRZ2xebt88ystYAk34ypohAv11qXX/13aBWDVncIMuq74r ybO93LfYtbG6cqjkIVCdsz3qXeWIrtA0YMEbjg0HxJ9yfu7QlX9yiLoJX6gLMR5juf kNnU3AkH2L87u+1VtnLTZgOIW6OZKIz55El+FCYoyDeX1kSXMbZc40cGBKIC9fTtUK oxOVf8H0t0LOnapyXLIeZkIMe21htuwRuXY3DcRi/2jVZvFDRYl01IcaBpRQncUnpn N+cvg6t5WzTTz3IivMDPU1KYY/ximCN+Ot1rsapCuTkwmmP4UC3FtUDiMGCRHxRFja dmw+LvnWI1cDfTTBHnhbbkfg2+t9t/GWOAeXeIUzta8Uhs9vPKfQbnCdmvgjingT7E PhuS37z5LngxTun2vBBAN8YgKIOIKDjS9oNLx5jpxXAP98mbN/1QqyB2CDOqLlrBhq 93ZaLDkOOQNaxQsqbPji8H4mTFTRwSp/CS+UA6ElKDwz6N5G5GTrxdjPcli6OFxuNp NXzBbTXN4TqlALMLWWegSzNg= Date: Sat, 30 May 2026 16:48:40 -0700 From: Borislav Petkov To: Mauricio Faria de Oliveira Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 1/4] x86/asm: move inline string functions to Message-ID: <20260530234840.GBaht3WL8L15zfNvBF@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260526-pvh-kasan-inline-v4-1-a310e6a25ecd@igalia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260526-pvh-kasan-inline-v4-1-a310e6a25ecd@igalia.com> X-purgate-ID: tlsNG-bad1c0/1780184953-8AB8EA53-283632F6/0/0 X-purgate-type: clean X-purgate-size: 3464 On Tue, May 26, 2026 at 11:52:33AM -0300, Mauricio Faria de Oliveira wrote: > In a future patch, 'boot/string.c' will include inline string functions. > > Using the header is problematic for a couple of reasons > (i.e., build errors), which can be addressed, but introduce unnecessary > complexity and regression risk (beyond these _found_ couple of reasons). > > Using a new header is simpler and transparent to > existing users of , with less changes to 'boot/string.c' > and its users (eg 'boot/compressed/string.c' and 'purgatory/purgatory.ro'), > which minimize regression risk. > > No functional change intended. > > Reported-by: kernel test robot > Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ > Signed-off-by: Mauricio Faria de Oliveira > Reviewed-by: Juergen Gross > > --- > (*) Reasons not to include in 'boot/string.c': > > 1) 'boot/string.c' is built for 16-bit/real mode thus some type and word > size errors happen when include, e.g., . > > This can be addressed with '#ifndef _SETUP' (defined by 'boot/Makefile'). > > 2) 'boot/string.c' is included by 'boot/compressed/string.c' which is > the source of 'purgatory/string.o', linked by 'purgatory/purgatory.ro' > (CONFIG_KEXEC_FILE). > > In 64BIT, includes , which references > __memset() and __memmove() with KCFI_REFERENCE(), ie, __ADDRESSABLE(); > however, 'purgatory/purgatory.ro' is not linked with implementations. > > So, CONFIG_KEXEC_FILE and CONFIG_CFI without CONFIG_KASAN hit errors: > > >> ld.lld: error: undefined symbol: __memset > >>> referenced by string.c > >>> arch/x86/purgatory/purgatory.ro:\ > (__UNIQUE_ID_addressable___memset_0) > -- > >> ld.lld: error: undefined symbol: __memmove > >>> referenced by string.c > >>> arch/x86/purgatory/purgatory.ro:\ > (__UNIQUE_ID_addressable___memmove_1) > > (Note: this is not hit with CONFIG_KASAN because 'boot/compressed/string.c' > adds aliases __memset()/__memmove() to memset()/memmove() in that case.) > > This can be addressed with 'CFLAGS_string.o := -D__DISABLE_EXPORTS' so to > disable KCFI_REFERENCE() in 'purgatory/Makefile' (it removes CC_FLAGS_CFI > anyway). > > ... > > However, since a change in this series would need more changes to address > errors it causes, it is reasonable to change the series not to cause them, > by using a separate header with _just_ inline string functions. This is very long-winded and it meanders across things. Write it more disciplined, please, and formulate it such that you're writing the commit message of a standalone patch. It should have merit on its own and not talk about future patches and so on. And yes, the intent to have a separate header which doesn't pull in nasty deps between decompressor and kernel proper, is ok. For that, we have arch/x86/include/asm/shared/ which contains functionality shared between the two objects so I think you should move it there. It'll also make it a "clean" header which contains solely this stuff and doesn't pull in any other shit. Thx. -- Regards/Gruss, Boris. https://people.kernel.org/tglx/notes-about-netiquette From xen-devel-bounces@lists.xenproject.org Sat May 30 23:57:55 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sat, 30 May 2026 23:57:55 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323243.1589107 (Exim 4.92) (envelope-from ) id 1wTTYs-0004nh-Ce; Sat, 30 May 2026 23:57:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323243.1589107; Sat, 30 May 2026 23:57:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTTYs-0004nZ-9U; Sat, 30 May 2026 23:57:50 +0000 Received: by outflank-mailman (input) for mailman id 1323243; Sat, 30 May 2026 23:57:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTTYq-0004nT-Fi for xen-devel@lists.xenproject.org; Sat, 30 May 2026 23:57:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTTYp-0096OQ-Oj for xen-devel@lists.xenproject.org; Sun, 31 May 2026 01:57:47 +0200 Received: from [10.42.69.7] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1b7951-2eae-0a2a0a5409dd-0a2a4507e2e8-12 for ; Sun, 31 May 2026 01:57:47 +0200 Received: from [213.97.179.56] (helo=fanzine2.igalia.com) by tlsNG-ef75cf.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1b7978-229c-0a2a45070019-d561b338bc78-3 for ; Sun, 31 May 2026 01:57:44 +0200 Received: from maestria.local.igalia.com ([192.168.10.14] helo=mail.igalia.com) by fanzine2.igalia.com with esmtps (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1wTTYO-00APX3-4O; Sun, 31 May 2026 01:57:20 +0200 Received: from webmail.service.igalia.com ([192.168.21.45]) by mail.igalia.com with esmtp (Exim) id 1wTTYL-003ubH-Lj; Sun, 31 May 2026 01:57:20 +0200 Received: from localhost ([127.0.0.1] helo=webmail.igalia.com) by webmail.service.igalia.com with esmtp (Exim 4.98.2) (envelope-from ) id 1wTTYK-00000005chD-46OS; Sun, 31 May 2026 01:57:17 +0200 X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" Authentication-Results: eu.smtp.expurgate.cloud; dkim=pass header.s=20170329 header.d=igalia.com header.i="@igalia.com" header.h="Content-Transfer-Encoding:Content-Type:Message-ID:References:In-Reply-To:Subject:Cc:To:From:Date:MIME-Version" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:Content-Type:Message-ID:References: In-Reply-To:Subject:Cc:To:From:Date:MIME-Version:Sender:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=Bg/X9f6yBi+M3ht1lgBwAQhSZSPfBcd2GOjHrohqvmU=; b=qnIO4wNx9IYcl3RIa2Apc4VNJ+ cjBxfwb8om/Gs7YOpR/rP93sZyQ7rXqz8c95t9ldYTf551SN4jkfsP1atTEHS3bLFVP73JwnC4qHk 1QB/gnv9V0vnBeuMN+afB0Liw/Zmje/GXWu6aRo5lajuPZBIRaf2oSKJjPNqafHBU8xPbkA/o5mVr IlJUzR5SE8hMhqt0J/X3YYxoVch3ElvNMyqYgfvkYadvmJpn2TJRoysvbYPS7I4sVCrhNDb4/utko khUBZ4QfMyP6X1RLInaopyYW2h2eViW2GmgQQepSJScYaF4HmfxKt1yeA5h6wPkvtHTFXog2Zwmoh ZsCSAXXw==; MIME-Version: 1.0 Date: Sat, 30 May 2026 20:57:17 -0300 From: Mauricio Faria de Oliveira To: Borislav Petkov Cc: Thomas Gleixner , Ingo Molnar , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Juergen Gross , Alexey Dobriyan , Boris Ostrovsky , kernel-dev@igalia.com, linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, kernel test robot Subject: Re: [PATCH v4 1/4] x86/asm: move inline string functions to In-Reply-To: <20260530234840.GBaht3WL8L15zfNvBF@fat_crate.local> References: <20260526-pvh-kasan-inline-v4-0-a310e6a25ecd@igalia.com> <20260526-pvh-kasan-inline-v4-1-a310e6a25ecd@igalia.com> <20260530234840.GBaht3WL8L15zfNvBF@fat_crate.local> Message-ID: <482d866c513a0ada46b221602a0824f8@igalia.com> X-Sender: mfo@igalia.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Spam-Report: NO, Score=-4.7, Tests=ALL_TRUSTED=-3,AWL=-2.550,BAYES_50=0.8,URIBL_BLOCKED=0.001,URIBL_DBL_BLOCKED_OPENDNS=0.001,URIBL_ZEN_BLOCKED_OPENDNS=0.001 X-Spam-Score: -46 X-Spam-Bar: ---- X-purgate-ID: tlsNG-ef75cf/1780185467-08B60C48-A9DF8917/0/0 X-purgate-type: clean X-purgate-size: 3590 On 2026-05-30 20:48, Borislav Petkov wrote: > On Tue, May 26, 2026 at 11:52:33AM -0300, Mauricio Faria de Oliveira wrote: >> In a future patch, 'boot/string.c' will include inline string functions. >> >> Using the header is problematic for a couple of reasons >> (i.e., build errors), which can be addressed, but introduce unnecessary >> complexity and regression risk (beyond these _found_ couple of reasons). >> >> Using a new header is simpler and transparent to >> existing users of , with less changes to 'boot/string.c' >> and its users (eg 'boot/compressed/string.c' and 'purgatory/purgatory.ro'), >> which minimize regression risk. >> >> No functional change intended. >> >> Reported-by: kernel test robot >> Closes: https://lore.kernel.org/oe-kbuild-all/202605140922.q7IlUv7o-lkp@intel.com/ >> Signed-off-by: Mauricio Faria de Oliveira >> Reviewed-by: Juergen Gross >> >> --- >> (*) Reasons not to include in 'boot/string.c': >> >> 1) 'boot/string.c' is built for 16-bit/real mode thus some type and word >> size errors happen when include, e.g., . >> >> This can be addressed with '#ifndef _SETUP' (defined by 'boot/Makefile'). >> >> 2) 'boot/string.c' is included by 'boot/compressed/string.c' which is >> the source of 'purgatory/string.o', linked by 'purgatory/purgatory.ro' >> (CONFIG_KEXEC_FILE). >> >> In 64BIT, includes , which references >> __memset() and __memmove() with KCFI_REFERENCE(), ie, __ADDRESSABLE(); >> however, 'purgatory/purgatory.ro' is not linked with implementations. >> >> So, CONFIG_KEXEC_FILE and CONFIG_CFI without CONFIG_KASAN hit errors: >> >> >> ld.lld: error: undefined symbol: __memset >> >>> referenced by string.c >> >>> arch/x86/purgatory/purgatory.ro:\ >> (__UNIQUE_ID_addressable___memset_0) >> -- >> >> ld.lld: error: undefined symbol: __memmove >> >>> referenced by string.c >> >>> arch/x86/purgatory/purgatory.ro:\ >> (__UNIQUE_ID_addressable___memmove_1) >> >> (Note: this is not hit with CONFIG_KASAN because 'boot/compressed/string.c' >> adds aliases __memset()/__memmove() to memset()/memmove() in that case.) >> >> This can be addressed with 'CFLAGS_string.o := -D__DISABLE_EXPORTS' so to >> disable KCFI_REFERENCE() in 'purgatory/Makefile' (it removes CC_FLAGS_CFI >> anyway). >> >> ... >> >> However, since a change in this series would need more changes to address >> errors it causes, it is reasonable to change the series not to cause them, >> by using a separate header with _just_ inline string functions. > > This is very long-winded and it meanders across things. Write it more > disciplined, please, and formulate it such that you're writing the commit > message of a standalone patch. It should have merit on its own and not talk > about future patches and so on. > > And yes, the intent to have a separate header which doesn't pull in > nasty deps between decompressor and kernel proper, is ok. > > For that, we have arch/x86/include/asm/shared/ which contains functionality > shared between the two objects so I think you should move it there. It'll also > make it a "clean" header which contains solely this stuff and doesn't pull in > any other shit. Ack; thanks for the feedback and pointers, I'll take a look. > > Thx. -- Mauricio From xen-devel-bounces@lists.xenproject.org Sun May 31 14:09:11 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 14:09:11 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323374.1589117 (Exim 4.92) (envelope-from ) id 1wTgqQ-00086F-68; Sun, 31 May 2026 14:08:50 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323374.1589117; Sun, 31 May 2026 14:08:50 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTgqQ-000867-1M; Sun, 31 May 2026 14:08:50 +0000 Received: by outflank-mailman (input) for mailman id 1323374; Sun, 31 May 2026 14:08:48 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTgqO-000861-Jq for xen-devel@lists.xenproject.org; Sun, 31 May 2026 14:08:48 +0000 Received: from mx.expurgate.net (helo=localhost) by mx.expurgate.net with esmtp id 1wTgqM-007ayU-Vn for xen-devel@lists.xenproject.org; Sun, 31 May 2026 16:08:46 +0200 Received: from [10.42.69.3] (helo=localhost) by localhost with ESMTP (eXpurgate MTA 0.9.1) (envelope-from ) id 6a1c40ee-5cb7-0a2a0a5109dd-0a2a4503ecc6-0 for ; Sun, 31 May 2026 16:08:46 +0200 Received: from [209.85.128.52] (helo=mail-wm1-f52.google.com) by tlsNG-33051d.mxtls.expurgate.net with ESMTPS (eXpurgate 4.56.1) (envelope-from ) id 6a1c40ee-672d-0a2a45030019-d1558034b4b0-3 for ; Sun, 31 May 2026 16:08:46 +0200 Received: by mail-wm1-f52.google.com with SMTP id 5b1f17b1804b1-4908b92904fso40519545e9.0 for ; Sun, 31 May 2026 07:08:46 -0700 (PDT) Received: from notebook.. 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Sun, 31 May 2026 07:08:46 -0700 (PDT) From: Furkan Caliskan To: xen-devel@lists.xenproject.org Cc: roger.pau@citrix.com, jgross@suse.com, dfaggioli@suse.com, gwd@xenproject.org, stewart.hildebrand@amd.com, jbeulich@suse.com, andrew.cooper3@citrix.com, Furkan Caliskan Subject: [PATCH] xen/sched: remove duplicate trace.h include Date: Sun, 31 May 2026 17:08:19 +0300 Message-Id: <20260531140819.73467-1-frn1furkan10@gmail.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-purgate-ID: tlsNG-33051d/1780236526-3B360938-D895267C/0/0 X-purgate-type: clean X-purgate-size: 476 Signed-off-by: Furkan Caliskan --- xen/common/sched/rt.c | 1 - 1 file changed, 1 deletion(-) diff --git a/xen/common/sched/rt.c b/xen/common/sched/rt.c index 4b637aa9db..b9a3e7720e 100644 --- a/xen/common/sched/rt.c +++ b/xen/common/sched/rt.c @@ -26,7 +26,6 @@ #include #include #include -#include #include #include -- 2.34.1 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323455.1589162 (Exim 4.92) (envelope-from ) id 1wTox5-0004jO-Lo; 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Selecting CONFIG_ARM_NUMA enables CONFIG_DEVICE_TREE_NUMA, which in turn automatically selects CONFIG_NUMA. While this option is currently restricted to the ARM architecture, it is designed to be selectable for RISC-V and PPC in the future. This patch also includes the necessary compilation fixes required when building with CONFIG_NUMA, and creates a single fake NUMA node to ensure Xen can boot successfully at this stage. --- xen/arch/arm/Kconfig | 8 ++++++++ xen/arch/arm/setup.c | 4 ++++ xen/arch/arm/smpboot.c | 2 ++ xen/common/Kconfig | 4 ++++ 4 files changed, 18 insertions(+) diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index 79622b46a1..e67219e949 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -99,6 +99,14 @@ config MPU systems supporting EL2. (UNSUPPORTED) endchoice +config ARM_NUMA + bool "Device tree based NUMA support (UNSUPPORTED)" if UNSUPPORTED + select DEVICE_TREE_NUMA + help + Device tree based NUMA support. The "numa-node-id" property in + the CPU and memory nodes of a Device Tree defines the NUMA node + to which they belong. + source "arch/Kconfig" config ACPI diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index 6310a47d68..c0202d9ff6 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -351,6 +351,10 @@ void asmlinkage __init noreturn start_xen(unsigned long fdt_paddr) /* Parse the ACPI tables for possible boot-time configuration */ acpi_boot_table_init(); +#ifdef CONFIG_NUMA + numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); +#endif /* CONFIG_NUMA */ + end_boot_allocator(); /* diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 7f3cfa812e..d1651fe7dd 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -47,8 +47,10 @@ integer_param("maxcpus", max_cpus); /* CPU logical map: map xen cpuid to an MPIDR */ register_t __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; +#ifndef CONFIG_NUMA /* Fake one node for now. See also xen/numa.h */ nodemask_t __read_mostly node_online_map = { { [0] = 1UL } }; +#endif /* CONFIG_NUMA */ /* Xen stack for bringing up the first CPU. */ static unsigned char __initdata cpu0_boot_stack[STACK_SIZE] diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 5ff71480ee..89fa7d10c7 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -188,6 +188,10 @@ config VM_EVENT config NEEDS_LIBELF bool +config DEVICE_TREE_NUMA + select NUMA + bool + config NUMA bool -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323454.1589152 (Exim 4.92) (envelope-from ) id 1wTox4-0004VL-D5; Sun, 31 May 2026 22:48:14 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323454.1589152; Sun, 31 May 2026 22:48:14 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTox4-0004VE-9w; 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The NUMA node ID for each memory bank is retrieved from the Device Tree. --- xen/arch/arm/include/asm/numa.h | 1 + xen/arch/arm/numa.c | 7 +++++++ xen/arch/arm/setup.c | 2 +- xen/common/device-tree/bootinfo-fdt.c | 8 ++++++++ xen/common/device-tree/numa.c | 29 +++++++++++++++++++++++++++ xen/include/xen/bootinfo.h | 23 +++++++++++++++++++++ xen/include/xen/dt-numa.h | 1 + 7 files changed, 70 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/include/asm/numa.h b/xen/arch/arm/include/asm/numa.h index a1fa54f2e7..6f1ccb4eb3 100644 --- a/xen/arch/arm/include/asm/numa.h +++ b/xen/arch/arm/include/asm/numa.h @@ -12,6 +12,7 @@ typedef u8 nodeid_t; extern bool numa_disabled(void); extern unsigned int numa_node_to_arch_nid(nodeid_t n); extern u8 __node_distance(nodeid_t a, nodeid_t b); +extern void numa_memory_affinity_init(void); #define arch_want_default_dmazone() (num_online_nodes() > 1) diff --git a/xen/arch/arm/numa.c b/xen/arch/arm/numa.c index 080d7892ae..15cad3d267 100644 --- a/xen/arch/arm/numa.c +++ b/xen/arch/arm/numa.c @@ -36,6 +36,13 @@ int __init arch_numa_setup(const char *opt) return 0; } +void __init numa_memory_affinity_init(void) +{ + dt_numa_memory_affinity_init(); + + numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); +} + int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) { return bootinfo_get_ram_range(idx, start, end); diff --git a/xen/arch/arm/setup.c b/xen/arch/arm/setup.c index c0202d9ff6..cdabf536b0 100644 --- a/xen/arch/arm/setup.c +++ b/xen/arch/arm/setup.c @@ -352,7 +352,7 @@ void asmlinkage __init noreturn start_xen(unsigned long fdt_paddr) acpi_boot_table_init(); #ifdef CONFIG_NUMA - numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); + numa_memory_affinity_init(); #endif /* CONFIG_NUMA */ end_boot_allocator(); diff --git a/xen/common/device-tree/bootinfo-fdt.c b/xen/common/device-tree/bootinfo-fdt.c index 272b5a6c0a..2d0e809231 100644 --- a/xen/common/device-tree/bootinfo-fdt.c +++ b/xen/common/device-tree/bootinfo-fdt.c @@ -121,6 +121,9 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, const __be32 *cell; u32 reg_cells = address_cells + size_cells; paddr_t start, size; +#ifdef CONFIG_DEVICE_TREE_NUMA + uint32_t nid; +#endif /* CONFIG_DEVICE_TREE_NUMA */ if ( !device_tree_node_is_available(fdt, node) ) return 0; @@ -136,6 +139,10 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, if ( !prop ) return -ENOENT; +#ifdef CONFIG_DEVICE_TREE_NUMA + nid = device_tree_get_u32(fdt, node, "numa-node-id", 0U); +#endif /* CONFIG_DEVICE_TREE_NUMA */ + cell = (const __be32 *)prop->data; banks = fdt32_to_cpu(prop->len) / (reg_cells * sizeof (u32)); @@ -158,6 +165,7 @@ static int __init device_tree_get_meminfo(const void *fdt, int node, mem->bank[mem->nr_banks].start = start; mem->bank[mem->nr_banks].size = size; mem->bank[mem->nr_banks].type = type; + set_numa_nodeid(&mem->bank[mem->nr_banks], nid); mem->nr_banks++; } diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c index 06f2c8b102..539ddfccc5 100644 --- a/xen/common/device-tree/numa.c +++ b/xen/common/device-tree/numa.c @@ -22,3 +22,32 @@ u8 dt_node_distance(u8 a, u8 b) return LOCAL_DISTANCE; } +/* + * Initialize memory affinity by registering bootinfo memory banks into Xen's + * NUMA subsystem. + */ +void __init dt_numa_memory_affinity_init(void) +{ + const struct membanks *mem = bootinfo_get_mem(); + unsigned int bank; + nodeid_t nid; + + numa_fw_nid_name = "DT"; + + for ( bank = 0 ; bank < mem->nr_banks; bank++ ) + { + nid = get_numa_nodeid(&mem->bank[bank]); + + if (numa_memblks_available()) + { + numa_update_node_memblks(nid, nid, mem->bank[bank].start, mem->bank[bank].size, false); + } + else + { + dprintk(XENLOG_WARNING, + "Too many numa entries, try bigger NR_NODE_MEMBLKS!\n"); + numa_fw_bad(); + break; + } + } +} diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index 7923be2b38..d01a28b359 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -7,6 +7,7 @@ #include #include #include +#include #define NR_MEM_BANKS 256 #define NR_SHMEM_BANKS 32 @@ -56,6 +57,9 @@ struct shmem_membank_extra { struct membank { paddr_t start; paddr_t size; +#ifdef CONFIG_DEVICE_TREE_NUMA + uint32_t numa_id; +#endif /* CONFIG_DEVICE_TREE_NUMA */ union { enum membank_type type; #ifdef CONFIG_STATIC_SHM @@ -228,4 +232,23 @@ static inline int bootinfo_get_ram_range(unsigned int idx, paddr_t *start, paddr return 0; } +#ifdef CONFIG_DEVICE_TREE_NUMA +static inline uint32_t get_numa_nodeid(const struct membank *bank) +{ + if ( numa_disabled() ) return 0U; + + return bank->numa_id; +} + +static inline void set_numa_nodeid(struct membank *bank, uint32_t nid) +{ + if ( numa_disabled() ) nid = 0U; + + bank->numa_id = nid; +} +#else /* CONFIG_DEVICE_TREE_NUMA */ +#define get_numa_nodeid(bank) (0) +#define set_numa_nodeid(bank, nid) {} +#endif /* CONFIG_DEVICE_TREE_NUMA */ + #endif /* XEN_BOOTINFO_H */ diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h index 721e8955fa..c6939d0928 100644 --- a/xen/include/xen/dt-numa.h +++ b/xen/include/xen/dt-numa.h @@ -14,6 +14,7 @@ static inline unsigned int numa_node_to_dt_nid(u32 n) #ifdef CONFIG_DEVICE_TREE_NUMA u8 dt_node_distance(u8 a, u8 b); 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This patch adds the required Device Tree-dependent helper functions needed for NUMA configuration. Note that some functions currently contain stub implementations. --- xen/common/device-tree/Makefile | 1 + xen/common/device-tree/numa.c | 24 ++++++++++++++++++++++++ xen/include/xen/bootinfo.h | 14 ++++++++++++++ xen/include/xen/dt-numa.h | 29 +++++++++++++++++++++++++++++ 4 files changed, 68 insertions(+) create mode 100644 xen/common/device-tree/numa.c create mode 100644 xen/include/xen/dt-numa.h diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile index 9036e455d6..658aa293c4 100644 --- a/xen/common/device-tree/Makefile +++ b/xen/common/device-tree/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_DOM0LESS_BOOT) += dom0less-bindings.init.o obj-$(CONFIG_OVERLAY_DTB) += dt-overlay.o obj-$(CONFIG_HAS_DEVICE_TREE_DISCOVERY) += intc.o obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += kernel.o +obj-$(CONFIG_DEVICE_TREE_NUMA) += numa.o obj-$(CONFIG_STATIC_EVTCHN) += static-evtchn.init.o obj-$(CONFIG_STATIC_MEMORY) += static-memory.init.o obj-$(CONFIG_STATIC_SHM) += static-shmem.init.o diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c new file mode 100644 index 0000000000..06f2c8b102 --- /dev/null +++ b/xen/common/device-tree/numa.c @@ -0,0 +1,24 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define LOCAL_DISTANCE 10 +#define REMOTE_DISTANCE 20 + +/* + * Get the distance between node 'a' and node 'b'. + */ +u8 dt_node_distance(u8 a, u8 b) +{ + if ( a != b ) + return REMOTE_DISTANCE; + return LOCAL_DISTANCE; +} + diff --git a/xen/include/xen/bootinfo.h b/xen/include/xen/bootinfo.h index dbf492c2e3..7923be2b38 100644 --- a/xen/include/xen/bootinfo.h +++ b/xen/include/xen/bootinfo.h @@ -6,6 +6,7 @@ #include #include #include +#include #define NR_MEM_BANKS 256 #define NR_SHMEM_BANKS 32 @@ -214,4 +215,17 @@ void fw_unreserved_regions(paddr_t s, paddr_t e, void (*cb)(paddr_t ps, paddr_t pe), unsigned int first); +static inline int bootinfo_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) +{ + struct membanks *mem = bootinfo_get_mem(); + + if ( idx >= mem->nr_banks) + return -ENOENT; + + *start = mem->bank[idx].start; + *end = *start + mem->bank[idx].size; + + return 0; +} + #endif /* XEN_BOOTINFO_H */ diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h new file mode 100644 index 0000000000..721e8955fa --- /dev/null +++ b/xen/include/xen/dt-numa.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_DT_NUMA_H +#define XEN_DT_NUMA_H + +#include +#include + +static inline unsigned int numa_node_to_dt_nid(u32 n) +{ + return n; +} + +#ifdef CONFIG_DEVICE_TREE_NUMA + +u8 dt_node_distance(u8 a, u8 b); + +#endif /* CONFIG_DEVICE_TREE_NUMA */ + +#endif /* XEN_DT_NUMA_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323458.1589189 (Exim 4.92) (envelope-from ) id 1wToxA-0005U2-M4; Sun, 31 May 2026 22:48:20 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323458.1589189; Sun, 31 May 2026 22:48:20 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxA-0005TX-HE; Sun, 31 May 2026 22:48:20 +0000 Received: by outflank-mailman (input) for mailman id 1323458; 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If the 'cpu-map' node is absent, fall back to generating the topology data from the NUMA information. This generation assumes exactly one socket per NUMA node and that SMT is unsupported. --- xen/arch/arm/Kconfig | 1 + xen/arch/arm/smpboot.c | 6 + xen/common/Kconfig | 3 + xen/common/device-tree/Makefile | 1 + xen/common/device-tree/cpu-topology.c | 306 ++++++++++++++++++++++++++ xen/include/xen/cpu-topology.h | 42 ++++ 6 files changed, 359 insertions(+) create mode 100644 xen/common/device-tree/cpu-topology.c create mode 100644 xen/include/xen/cpu-topology.h diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig index e67219e949..c673ca345f 100644 --- a/xen/arch/arm/Kconfig +++ b/xen/arch/arm/Kconfig @@ -102,6 +102,7 @@ endchoice config ARM_NUMA bool "Device tree based NUMA support (UNSUPPORTED)" if UNSUPPORTED select DEVICE_TREE_NUMA + select DT_CPU_TOPOLOGY help Device tree based NUMA support. The "numa-node-id" property in the CPU and memory nodes of a Device Tree defines the NUMA node diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index eafa195504..6bcf7e7f53 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -24,6 +24,7 @@ #include #include #include +#include #include #include #include @@ -248,6 +249,8 @@ static void __init dt_smp_init_cpus(void) else tmp_map[i] = hwid; + map_cpuid_to_node(i, cpu); /* pass the info to dt_init_cpu_topology() */ + #ifdef CONFIG_DEVICE_TREE_NUMA if ( tmp_map[i] != MPIDR_INVALID ) { @@ -294,7 +297,10 @@ void __init smp_init_cpus(void) } if ( acpi_disabled ) + { dt_smp_init_cpus(); + dt_init_cpu_topology(); + } else acpi_smp_init_cpus(); diff --git a/xen/common/Kconfig b/xen/common/Kconfig index 89fa7d10c7..a1db4fcf17 100644 --- a/xen/common/Kconfig +++ b/xen/common/Kconfig @@ -188,6 +188,9 @@ config VM_EVENT config NEEDS_LIBELF bool +config DT_CPU_TOPOLOGY + bool + config DEVICE_TREE_NUMA select NUMA bool diff --git a/xen/common/device-tree/Makefile b/xen/common/device-tree/Makefile index 658aa293c4..bbe60297aa 100644 --- a/xen/common/device-tree/Makefile +++ b/xen/common/device-tree/Makefile @@ -1,6 +1,7 @@ obj-y += bootfdt.init.o obj-$(CONFIG_HAS_DEVICE_TREE_DISCOVERY) += bootinfo-fdt.init.o obj-$(CONFIG_HAS_DEVICE_TREE_DISCOVERY) += bootinfo.init.o +obj-$(CONFIG_DT_CPU_TOPOLOGY) += cpu-topology.o obj-y += device-tree.o obj-$(CONFIG_DOMAIN_BUILD_HELPERS) += domain-build.init.o obj-$(filter $(CONFIG_DOM0LESS_BOOT),$(CONFIG_HAS_DEVICE_TREE_DISCOVERY)) += dom0less-build.init.o diff --git a/xen/common/device-tree/cpu-topology.c b/xen/common/device-tree/cpu-topology.c new file mode 100644 index 0000000000..82a366f3f6 --- /dev/null +++ b/xen/common/device-tree/cpu-topology.c @@ -0,0 +1,306 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Derived from Linux kernel 7.0's $drivers/base/arch_topology.c + * Parse cpu topology information. + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +static struct dt_device_node * __initdata dt_cpu_table[NR_CPUS]; + +struct cpu_topology __ro_after_init cpu_topology[NR_CPUS] = { + [0 ... NR_CPUS-1] = {-1, -1, -1, 0} +}; + +static void __init setup_siblings_masks(unsigned int cpuid) +{ + struct cpu_topology *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; + int cpu; + + /* update core and thread sibling masks */ + for_each_possible_cpu(cpu) { + cpu_topo = &cpu_topology[cpu]; + + if (cpuid_topo->package_id != cpu_topo->package_id) + continue; + + cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); + cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); + + if (cpuid_topo->cluster_id != cpu_topo->cluster_id) + continue; + + if (cpuid_topo->cluster_id >= 0) { + cpumask_set_cpu(cpu, &cpuid_topo->cluster_sibling); + cpumask_set_cpu(cpuid, &cpu_topo->cluster_sibling); + } + + if (cpuid_topo->core_id != cpu_topo->core_id) + continue; + + cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling); + cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); + } +} + +static struct dt_device_node * __init dt_find_child_node_by_name(struct dt_device_node *from, const char *name) +{ + struct dt_device_node *np; + struct dt_device_node *dt = from; + + dt_for_each_child_node(dt, np) + if ( np->name && (dt_node_cmp(np->name, name) == 0) ) + break; + + return np; +} + +void __init map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node) +{ + dt_cpu_table[cpuid] = cpu_node; +} + +static int __init cpu_node_to_id(struct dt_device_node *cpu_node) +{ + int cpu; + bool found = false; + + for_each_possible_cpu(cpu) { + found = (cpu_node == dt_cpu_table[cpu]); + if (found) + return cpu; + } + + return -ENODEV; +} + +/* + * This function returns the logic cpu number of the node. + */ +static int __init get_cpu_for_node(struct dt_device_node *node) +{ + struct dt_device_node *cpu_node = dt_parse_phandle(node, "cpu", 0); + + if (!cpu_node) + return -ENOENT; + + return cpu_node_to_id(cpu_node); +} + +static int __init parse_core(struct dt_device_node *core, int package_id, + int cluster_id, int core_id) +{ + char name[20]; + bool leaf = true; + int i = 0; + int cpu; + + do { + struct dt_device_node *t; + + snprintf(name, sizeof(name), "thread%d", i); + t = dt_find_child_node_by_name(core, name); + + if (!t) + break; + + leaf = false; + cpu = get_cpu_for_node(t); + if (cpu >= 0) { + cpu_topology[cpu].package_id = package_id; + cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].core_id = core_id; + cpu_topology[cpu].thread_id = i; + } else if (cpu != -ENODEV) { + printk(XENLOG_ERR "ERROR: %pOF: Can't get CPU for thread\n", t); + return -EINVAL; + } + i++; + } while (1); + + cpu = get_cpu_for_node(core); + if (cpu >= 0) { + if (!leaf) { + printk(XENLOG_ERR "ERROR: %pOF: Core has both threads and CPU\n", + core); + return -EINVAL; + } + + cpu_topology[cpu].package_id = package_id; + cpu_topology[cpu].cluster_id = cluster_id; + cpu_topology[cpu].core_id = core_id; + } else if (leaf && cpu != -ENODEV) { + printk(XENLOG_ERR "ERROR: %pOF: Can't get CPU for leaf core\n", core); + return -EINVAL; + } + + return 0; +} + +static int __init parse_cluster(struct dt_device_node *cluster, int package_id, + int cluster_id, int depth) +{ + char name[20]; + bool leaf = true; + bool has_cores = false; + int core_id = 0; + int i, ret; + + /* + * First check for child clusters; we currently ignore any + * information about the nesting of clusters and present the + * scheduler with a flat list of them. + */ + i = 0; + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "cluster%d", i); + c = dt_find_child_node_by_name(cluster, name); + + if (!c) + break; + + leaf = false; + ret = parse_cluster(c, package_id, i, depth + 1); + if (depth > 0) + printk(XENLOG_WARNING "WARNING: Topology for clusters of clusters not yet supported\n"); + if (ret != 0) + return ret; + i++; + } while (1); + + /* Now check for cores */ + i = 0; + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "core%d", i); + c = dt_find_child_node_by_name(cluster, name); + + if (!c) + break; + + has_cores = true; + + if (depth == 0) { + printk(XENLOG_ERR "ERROR: %pOF: cpu-map children should be clusters\n", c); + return -EINVAL; + } + + if (leaf) { + ret = parse_core(c, package_id, cluster_id, core_id++); + if (ret != 0) + return ret; + } else { + printk(XENLOG_ERR "ERROR: %pOF: Non-leaf cluster with core %s\n", + cluster, name); + return -EINVAL; + } + + i++; + } while (1); + + if (leaf && !has_cores) + printk(XENLOG_WARNING "WARNING: %pOF: empty cluster\n", cluster); + + return 0; +} + +static int __init parse_socket(struct dt_device_node *socket) +{ + char name[20]; + bool has_socket = false; + int package_id = 0, ret; + + do { + struct dt_device_node *c; + + snprintf(name, sizeof(name), "socket%d", package_id); + c = dt_find_child_node_by_name(socket, name); + + if (!c) + break; + + has_socket = true; + ret = parse_cluster(c, package_id, -1, 0); + if (ret != 0) + return ret; + + package_id++; + } while (1); + + if (!has_socket) + ret = parse_cluster(socket, 0, -1, 0); + + return ret; +} + +/* + * Generate cpu topology information when cpu-map node doesn't exist. + * It assumes that the cpu doesn't have SMT and all CPUs on a NUMA + * node belong to the same socket. + */ +static void __init fixup_topology(void) +{ + int cpu; + int clid = 0; + int pkgid = 0; + + for_each_possible_cpu(cpu) + { + struct cpu_topology *cpu_topo = &cpu_topology[cpu]; + + cpu_topo->package_id = cpu_to_node(cpu); + if (cpu_topo->package_id != pkgid) + { + pkgid = cpu_topo->package_id; + clid = 0; + } + cpu_topo->cluster_id = clid++; + cpu_topo->core_id = 0; + cpu_topo->thread_id = 0; + } +} + +int __init parse_dt_topology(void) +{ + struct dt_device_node *cpus; + struct dt_device_node *map; + + cpus = dt_find_node_by_path("/cpus"); + + if ( !cpus ) + { + printk(XENLOG_ERR "ERROR: No CPU information found in DT\n"); + return -EINVAL; + } + + map = dt_find_child_node_by_name(cpus, "cpu-map"); + if ( !map ) + return -ENOENT; + + return parse_socket(map); +} + +void __init dt_init_cpu_topology(void) +{ + int cpu; + + if (parse_dt_topology()) + fixup_topology(); + + for_each_possible_cpu(cpu) + setup_siblings_masks(cpu); +} diff --git a/xen/include/xen/cpu-topology.h b/xen/include/xen/cpu-topology.h new file mode 100644 index 0000000000..8445f5786d --- /dev/null +++ b/xen/include/xen/cpu-topology.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef XEN_CPU_TOPOLOGY_H +#define XEN_CPU_TOPOLOGY_H + +#include +#include + +struct cpu_topology { + int thread_id; + int core_id; + int cluster_id; + int package_id; + cpumask_t thread_sibling; + cpumask_t core_sibling; + cpumask_t cluster_sibling; +}; + + +#ifdef CONFIG_DT_CPU_TOPOLOGY +extern struct cpu_topology cpu_topology[NR_CPUS]; + +void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node); +void dt_init_cpu_topology(void); + +#elif CONFIG_DEVICE_TREE_PARSE + +static inline void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node) {} +static inline void dt_init_cpu_topology(void) {} + +#endif /* CONFIG_DEVICE_TREE_PARSE */ + +#endif /* XEN_CPU_TOPOLOGY_H */ + +/* + * Local variables: + * mode: C + * c-file-style: "BSD" + * c-basic-offset: 4 + * indent-tabs-mode: nil + * End: + */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323451.1589126 (Exim 4.92) (envelope-from ) id 1wTox0-0003sL-JU; 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Eventually, it would be great to have NUMA enabled by default, just like it is on x86. I also fixed a bug in the DomU memory layout creation where an x86 dependency was breaking memory allocation for vNUMA nodes. With this fix, it correctly references the domain's vNUMA node information and performs NUMA-aware memory allocation. For now, I've applied a simple fix using #ifdef, but I'm wondering if we should make this more generic. Additionally, some code borrowed from the Linux kernel doesn't strictly follow the Xen coding style. I've left it as-is for now because I want to avoid creating unnecessary diffs against the original Linux kernel code. Changes in v2: - Fix vNUMA memory allocation algorithm to support ARM - Allocate vNUMA memory from the associated pNUMA memory - Include the XSM Policy module size in the required memory calculation for Dom0 Bank 0. - Enforce a minimum chunk size of 4MB during Dom0 memory allocation. - Define the cpu_to_core() and cpu_to_socket() macros in cpu-topology.h instead of processor.h, as processor.h should strictly focus on processor hardware information. - Make cpu_nr_siblings() an architecture-specific function. - Refine the code to conform with the Xen coding style guidelines. Thanks, Hirokazu Takahashi Hirokazu Takahashi (24): xen/device-tree: Initial framework for Device Tree NUMA support xen/arm: NUMA helper functions via Device Tree helpers xen/arm: Introduce CONFIG_DEVICE_TREE_NUMA config option xen/arm: Configure NUMA affinity for populated memory banks xen/arm: Map populated CPUs to their respective NUMA nodes xen/device-tree: Read NUMA node distance from Device Tree 'distance-map' xen/device-tree: Parse 'cpu-map' node for CPU topology exploration xen/sched: Link CPU topology to scheduler and display via xl info xen/sched: Make cpu_nr_siblings() architecture-specific xen/common: Allow building ARM32 Xen with CONFIG_NUMA tools/libxl: Fix vNUMA memory allocation algorithm to support ARM tools/libs/guest: Allocate vNUMA memory from associated pNUMA nodes tools/libxl: Add 'numa-node-id' property to DomU memory nodes tools/libxl: Add 'numa-node-id' property to DomU CPU nodes tools/libxl: Create 'distance-map' node in DomU Device Tree xen/arm: Introduce dom0_nodes boot command option xen/arm: Set Domain-0 node affinity from dom0_nodes option xen/arm: Reflect physical NUMA node IDs in Dom0 memory DT nodes xen/arm: Balance Dom0 vCPU assignment across NUMA nodes xen/arm: Export Dom0 vCPU-to-NUMA node mapping to Device Tree xen/arm: Generate distance-map node for Dom0 Device Tree xen/arm: Balance Dom0 memory allocation across allowed NUMA nodes xen/arm: Use dedicated function for Static SHM Device Tree creation xen/arm: Support numa and dom0_nodes boot options docs/misc/xen-command-line.pandoc | 9 +- tools/libs/guest/xg_dom_arm.c | 62 +++- tools/libs/light/libxl_arm.c | 103 ++++++- tools/libs/light/libxl_vnuma.c | 13 +- xen/arch/arm/Kconfig | 9 + xen/arch/arm/Makefile | 1 + xen/arch/arm/domain_build.c | 428 +++++++++++++++++++------- xen/arch/arm/include/asm/numa.h | 19 ++ xen/arch/arm/include/asm/processor.h | 4 - xen/arch/arm/numa.c | 62 ++++ xen/arch/arm/setup.c | 4 + xen/arch/arm/smpboot.c | 35 ++- xen/arch/x86/include/asm/processor.h | 1 + xen/common/Kconfig | 7 + xen/common/device-tree/Makefile | 2 + xen/common/device-tree/bootinfo-fdt.c | 8 + xen/common/device-tree/cpu-topology.c | 360 ++++++++++++++++++++++ xen/common/device-tree/domain-build.c | 99 +++--- xen/common/device-tree/numa.c | 142 +++++++++ xen/common/numa.c | 2 +- xen/common/sched/credit2.c | 22 +- xen/common/sysctl.c | 1 + xen/include/xen/bootinfo.h | 37 +++ xen/include/xen/cpu-topology.h | 53 ++++ xen/include/xen/dt-numa.h | 31 ++ xen/include/xen/fdt-domain-build.h | 2 + 26 files changed, 1310 insertions(+), 206 deletions(-) create mode 100644 xen/arch/arm/include/asm/numa.h create mode 100644 xen/arch/arm/numa.c create mode 100644 xen/common/device-tree/cpu-topology.c create mode 100644 xen/common/device-tree/numa.c create mode 100644 xen/include/xen/cpu-topology.h create mode 100644 xen/include/xen/dt-numa.h -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323460.1589203 (Exim 4.92) (envelope-from ) id 1wToxD-0005pG-G8; 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This patch provides the implementation for x86 and a common version for Device Tree-based architectures. --- xen/arch/x86/include/asm/processor.h | 1 + xen/common/sched/credit2.c | 23 +++++------------------ 2 files changed, 6 insertions(+), 18 deletions(-) diff --git a/xen/arch/x86/include/asm/processor.h b/xen/arch/x86/include/asm/processor.h index c37bd7a176..3cd19e6d9c 100644 --- a/xen/arch/x86/include/asm/processor.h +++ b/xen/arch/x86/include/asm/processor.h @@ -106,6 +106,7 @@ extern void intel_init_arat(void); #define cpu_to_core(_cpu) (cpu_data[_cpu].cpu_core_id) #define cpu_to_socket(_cpu) (cpu_data[_cpu].phys_proc_id) +#define cpu_nr_siblings(_cpu) (cpu_data[_cpu].x86_num_siblings) unsigned int apicid_to_socket(unsigned int apicid); diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index dcce1e361f..2d93944824 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -29,22 +29,6 @@ /* #define d2printk printk */ #define d2printk(x...) -/* - * TODO: Abstract this properly, and figure out what Credit2 wants to do with - * the fact that x86_num_siblings doesn't even have the same meaning - * between x86 vendors. - */ -static unsigned int cpu_nr_siblings(unsigned int cpu) -{ -#ifdef CONFIG_X86 - return cpu_data[cpu].x86_num_siblings; -#elif CONFIG_DT_CPU_TOPOLOGY - return cpu_topology[cpu].num_siblings; -#else - return 1; -#endif -} - /* * Credit2 tracing events ("only" 512 available!). Check * include/public/trace.h for more details. @@ -884,8 +868,11 @@ cpu_runqueue_match(const struct csched2_runqueue_data *rqd, unsigned int cpu) * Additional checks, to avoid separating siblings in different runqueues. * This deals with both Intel's HTs and AMD's CUs. An arch that does not have * any similar concept will just have cpu_nr_siblings() always return 1, and - * setup the cpu_sibling_mask-s acordingly (as currently does ARM), and things - * will just work as well. + * setup the cpu_sibling_mask-s acordingly, and things will just work as well. + * + * TODO: Abstract cpu_nr_siblings properly, and figure out what Credit2 wants + * to do with the fact that x86_num_siblings doesn't even have the same + * meaning between x86 vendors. */ static bool cpu_runqueue_siblings_match(const struct csched2_runqueue_data *rqd, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323457.1589180 (Exim 4.92) (envelope-from ) id 1wTox9-0005E3-AS; Sun, 31 May 2026 22:48:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323457.1589180; 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numa_initmem_init(0x0UL, 0x1UL << (PADDR_BITS - 12)); + + dt_numa_distance_table_init(); } int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) diff --git a/xen/common/device-tree/numa.c b/xen/common/device-tree/numa.c index 539ddfccc5..6414806937 100644 --- a/xen/common/device-tree/numa.c +++ b/xen/common/device-tree/numa.c @@ -1,4 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Derived from Linux kernel 7.0's $drivers/of/of_numa.c + * Parse 'distance-map' + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ #include #include @@ -12,14 +19,96 @@ #define LOCAL_DISTANCE 10 #define REMOTE_DISTANCE 20 +static u8 __ro_after_init numa_distance[MAX_NUMNODES][MAX_NUMNODES] = { + [0 ... MAX_NUMNODES-1][0 ... MAX_NUMNODES-1] = NUMA_NO_DISTANCE +}; + /* * Get the distance between node 'a' and node 'b'. */ u8 dt_node_distance(u8 a, u8 b) { - if ( a != b ) + nodeid_t lastnode = last_node(node_online_map); + + if (a > lastnode || b > lastnode) return REMOTE_DISTANCE; - return LOCAL_DISTANCE; + + return numa_distance[a][b]; +} + +static void __init numa_set_distance(u8 from, u8 to, u8 distance) +{ + nodeid_t lastnode = last_node(node_online_map); + + if (from <= lastnode && to <= lastnode) + numa_distance[from][to] = distance; +} + +/* + * Parse the '/distance-map' node from the flattened device tree + * and extract the 3-tuple triplets . + */ +static void __init dt_numa_parse_distance_map(void) +{ + const void *fdt = device_tree_flattened; + const struct fdt_property *prop; + const __be32 *matrix; + int entry_count; + int node; + int len; + int i; + + node = fdt_path_offset(fdt, "/distance-map"); + if ( node < 0 ) + return; + + if (fdt_node_check_compatible(fdt, node, "numa-distance-map-v1")) + return; + + prop = fdt_get_property(fdt, node, "distance-matrix", &len); + if (!prop) + return; + + matrix = (const __be32*)prop->data; + entry_count = len / sizeof(__be32); + + if ( (entry_count <= 0) || (entry_count % 3) ) + return; + + for (i = 0; i + 2 < entry_count; i += 3) + { + u32 nodea, nodeb, distance; + nodea = dt_next_cell(1, &matrix); + nodeb = dt_next_cell(1, &matrix); + distance = dt_next_cell(1, &matrix); + + if ((nodea == nodeb && distance != LOCAL_DISTANCE) || + (nodea != nodeb && distance <= LOCAL_DISTANCE)) + { + printk(XENLOG_WARNING "Invalid distance[node%d -> node%d] = %d\n", + nodea, nodeb, distance); + continue; + } + + numa_set_distance(nodea, nodeb, distance); + + /* Set default distance of node B->A same as A->B */ + if (nodeb > nodea) + numa_set_distance(nodeb, nodea, distance); + } +} + +void __init dt_numa_distance_table_init(void) +{ + u32 lastnode = last_node(node_online_map); + u32 i, j; + + /* fill with the default distances */ + for (i = 0U; i <= lastnode; i++) + for (j = 0U; j <= lastnode; j++) + numa_distance[i][j] = i == j ? LOCAL_DISTANCE : REMOTE_DISTANCE; + + dt_numa_parse_distance_map(); } /* diff --git a/xen/include/xen/dt-numa.h b/xen/include/xen/dt-numa.h index c6939d0928..075d31cb89 100644 --- a/xen/include/xen/dt-numa.h +++ b/xen/include/xen/dt-numa.h @@ -15,6 +15,7 @@ static inline unsigned int numa_node_to_dt_nid(u32 n) u8 dt_node_distance(u8 a, u8 b); void dt_numa_memory_affinity_init(void); +void dt_numa_distance_table_init(void); #endif /* CONFIG_DEVICE_TREE_NUMA */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323459.1589197 (Exim 4.92) (envelope-from ) id 1wToxD-0005mc-1v; Sun, 31 May 2026 22:48:23 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323459.1589197; Sun, 31 May 2026 22:48:23 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxC-0005mP-Ua; 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Additionally, ensure that this topology information is displayed when executing the 'xl info -n' command. --- xen/arch/arm/include/asm/processor.h | 4 -- xen/arch/arm/smpboot.c | 10 +++-- xen/common/device-tree/cpu-topology.c | 54 +++++++++++++++++++++++++++ xen/common/sched/credit2.c | 3 ++ xen/common/sysctl.c | 1 + xen/include/xen/cpu-topology.h | 11 ++++++ 6 files changed, 76 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/include/asm/processor.h b/xen/arch/arm/include/asm/processor.h index 895d7cd502..b968a1605e 100644 --- a/xen/arch/arm/include/asm/processor.h +++ b/xen/arch/arm/include/asm/processor.h @@ -591,10 +591,6 @@ void show_stack(const struct cpu_user_regs *regs); #define cpu_relax() barrier() /* Could yield? */ -/* All a bit UP for the moment */ -#define cpu_to_core(_cpu) (0) -#define cpu_to_socket(_cpu) (0) - struct vcpu; void vcpu_regs_hyp_to_user(const struct vcpu *vcpu, struct vcpu_guest_core_regs *regs); diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index 6bcf7e7f53..a8e914523d 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -93,13 +93,17 @@ static int setup_cpu_sibling_map(int cpu) !zalloc_cpumask_var(&per_cpu(cpu_core_mask, cpu)) ) return -ENOMEM; +#ifdef CONFIG_DT_CPU_TOPOLOGY + cpumask_copy(per_cpu(cpu_sibling_mask, cpu), &cpu_topology[cpu].thread_sibling); + cpumask_copy(per_cpu(cpu_core_mask, cpu), &cpu_topology[cpu].core_sibling); +#else /* CONFIG_DT_CPU_TOPOLOGY */ /* - * Currently we assume there is no multithread and NUMA, so - * a CPU is a sibling with itself, and the all possible CPUs - * are supposed to belong to the same socket (NUMA node). + * If CONFIG_DT_CPU_TOPOLOGY is disabled, it is assumed that + * all CPUs reside in the same socket and that SMT is not used. */ cpumask_set_cpu(cpu, per_cpu(cpu_sibling_mask, cpu)); cpumask_copy(per_cpu(cpu_core_mask, cpu), &cpu_possible_map); +#endif /* CONFIG_DT_CPU_TOPOLOGY */ return 0; } diff --git a/xen/common/device-tree/cpu-topology.c b/xen/common/device-tree/cpu-topology.c index 82a366f3f6..8821ea94f1 100644 --- a/xen/common/device-tree/cpu-topology.c +++ b/xen/common/device-tree/cpu-topology.c @@ -294,6 +294,58 @@ int __init parse_dt_topology(void) return parse_socket(map); } +static void __init setup_topology_for_sched(void) +{ + int prev_socketid = 0; + int prev_clusterid = 0; + int prev_coreid = 0; + int prev_threadid = 0; + unsigned int coreid = 0U; + unsigned int socketid = 0U; + unsigned int clusterid = 0U; + unsigned int threadid = 0U; + int cpu; + + for_each_possible_cpu(cpu) + { + struct cpu_topology *cpu_topo = &cpu_topology[cpu]; + + if (cpu_topo->package_id != prev_socketid) + { + prev_socketid = cpu_topo->package_id; + prev_clusterid = cpu_topo->cluster_id; + prev_coreid = cpu_topo->core_id; + socketid++; + clusterid++; + coreid++; + threadid++; + } + else if (cpu_topo->cluster_id != prev_clusterid) + { + prev_clusterid = cpu_topo->cluster_id; + prev_coreid = cpu_topo->core_id; + clusterid++; + coreid++; + threadid++; + } + else if (cpu_topo->core_id != prev_coreid) + { + prev_coreid = cpu_topo->core_id; + coreid++; + threadid++; + } + else if (cpu_topo->thread_id != prev_threadid) + { + threadid++; + } + + cpu_topo->phys_socket_id = socketid; + cpu_topo->phys_core_id = coreid; + cpu_topo->num_siblings = cpumask_weight(&cpu_topo->thread_sibling); + } + +} + void __init dt_init_cpu_topology(void) { int cpu; @@ -303,4 +355,6 @@ void __init dt_init_cpu_topology(void) for_each_possible_cpu(cpu) setup_siblings_masks(cpu); + + setup_topology_for_sched(); } diff --git a/xen/common/sched/credit2.c b/xen/common/sched/credit2.c index 77475ee363..dcce1e361f 100644 --- a/xen/common/sched/credit2.c +++ b/xen/common/sched/credit2.c @@ -19,6 +19,7 @@ #include #include #include +#include #include @@ -37,6 +38,8 @@ static unsigned int cpu_nr_siblings(unsigned int cpu) { #ifdef CONFIG_X86 return cpu_data[cpu].x86_num_siblings; +#elif CONFIG_DT_CPU_TOPOLOGY + return cpu_topology[cpu].num_siblings; #else return 1; #endif diff --git a/xen/common/sysctl.c b/xen/common/sysctl.c index 5207664252..81a68fe24c 100644 --- a/xen/common/sysctl.c +++ b/xen/common/sysctl.c @@ -28,6 +28,7 @@ #include #include #include +#include long do_sysctl(XEN_GUEST_HANDLE_PARAM(xen_sysctl_t) u_sysctl) { diff --git a/xen/include/xen/cpu-topology.h b/xen/include/xen/cpu-topology.h index 8445f5786d..828c31f7ee 100644 --- a/xen/include/xen/cpu-topology.h +++ b/xen/include/xen/cpu-topology.h @@ -14,6 +14,9 @@ struct cpu_topology { cpumask_t thread_sibling; cpumask_t core_sibling; cpumask_t cluster_sibling; + unsigned int phys_core_id; + unsigned int phys_socket_id; + unsigned int num_siblings; }; @@ -23,11 +26,19 @@ extern struct cpu_topology cpu_topology[NR_CPUS]; void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node); void dt_init_cpu_topology(void); +#define cpu_to_core(_cpu) (cpu_topology[_cpu].phys_core_id) +#define cpu_to_socket(_cpu) (cpu_topology[_cpu].phys_socket_id) +#define cpu_nr_siblings(_cpu) (cpu_topology[_cpu].num_siblings) + #elif CONFIG_DEVICE_TREE_PARSE static inline void map_cpuid_to_node(u32 cpuid, struct dt_device_node *cpu_node) {} static inline void dt_init_cpu_topology(void) {} +#define cpu_to_core(_cpu) (0) +#define cpu_to_socket(_cpu) (0) +#define cpu_nr_siblings(_cpu) (1) + #endif /* CONFIG_DEVICE_TREE_PARSE */ #endif /* XEN_CPU_TOPOLOGY_H */ -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323456.1589170 (Exim 4.92) (envelope-from ) id 1wTox7-0004xf-1n; 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The NUMA node ID for each CPU is retrieved from the Device Tree. --- xen/arch/arm/smpboot.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c index d1651fe7dd..eafa195504 100644 --- a/xen/arch/arm/smpboot.c +++ b/xen/arch/arm/smpboot.c @@ -133,6 +133,9 @@ static void __init dt_smp_init_cpus(void) }; bool bootcpu_valid = false; int rc; +#ifdef CONFIG_DEVICE_TREE_NUMA + nodeid_t cpu_to_numa[NR_CPUS]; +#endif /* CONFIG_DEVICE_TREE_NUMA */ mpidr = system_cpuinfo.mpidr.bits & MPIDR_HWID_MASK; @@ -244,6 +247,16 @@ static void __init dt_smp_init_cpus(void) } else tmp_map[i] = hwid; + +#ifdef CONFIG_DEVICE_TREE_NUMA + if ( tmp_map[i] != MPIDR_INVALID ) + { + uint32_t nid; + if ( numa_disabled() || !dt_property_read_u32(cpu, "numa-node-id", &nid) ) + nid = 0U; /* default node */ + cpu_to_numa[i] = nid >= MAX_NUMNODES ? 0U : nid; + } +#endif /* CONFIG_DEVICE_TREE_NUMA */ } if ( !bootcpu_valid ) @@ -259,6 +272,10 @@ static void __init dt_smp_init_cpus(void) continue; cpumask_set_cpu(i, &cpu_possible_map); cpu_logical_map(i) = tmp_map[i]; +#ifdef CONFIG_DEVICE_TREE_NUMA + numa_set_node(i, cpu_to_numa[i]); + numa_add_cpu(i); +#endif /* CONFIG_DEVICE_TREE_NUMA */ } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:23 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:23 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323453.1589137 (Exim 4.92) (envelope-from ) id 1wTox1-0003yk-4D; Sun, 31 May 2026 22:48:11 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323453.1589137; Sun, 31 May 2026 22:48:11 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTox0-0003xL-Sr; Sun, 31 May 2026 22:48:10 +0000 Received: by outflank-mailman (input) for mailman id 1323453; Sun, 31 May 2026 22:48:09 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wTowz-0003s7-H5 for xen-devel@lists.xenproject.org; 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: Hirokazu Takahashi , Stefano Stabellini , Julien Grall , Bertrand Marquis , Michal Orzel , Volodymyr Babchuk Subject: [PATCH v2 02/24] xen/arm: NUMA helper functions via Device Tree helpers Date: Mon, 1 Jun 2026 07:47:32 +0900 Message-ID: <20260531224755.9481-3-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260531224755.9481-1-taka@valinux.co.jp> References: <20260531224755.9481-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TY4P301CA0059.JPNP301.PROD.OUTLOOK.COM (2603:1096:405:36a::12) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|TYWP286MB2972:EE_ X-MS-Office365-Filtering-Correlation-Id: 517cdb47-dfd0-4d8e-eddc-08debf66ac98 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|10070799003|1800799024|366016|376014|22082099003|18002099003|6133799003|56012099006; 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+ +#define ZONE_ALIGN (1UL << (MAX_ORDER+PAGE_SHIFT)) + +extern bool numa_disabled(void); +extern unsigned int numa_node_to_arch_nid(nodeid_t n); +extern u8 __node_distance(nodeid_t a, nodeid_t b); + +#define arch_want_default_dmazone() (num_online_nodes() > 1) + +#endif /* _ASM_ARM_NUMA_H */ diff --git a/xen/arch/arm/numa.c b/xen/arch/arm/numa.c new file mode 100644 index 0000000000..080d7892ae --- /dev/null +++ b/xen/arch/arm/numa.c @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Helper functions for ARM NUMA. + * + * Copyright (c) 2026 VA Linux Systems Japan K.K. + * Author: Hirokazu Takahashi + */ + +#include +#include +#include + +#if CONFIG_ACPI_NUMA +#error "ACPI NUMA isn't supported yet." +#endif /* CONFIG_ACPI_NUMA */ + + +bool arch_numa_disabled(void) +{ + return false; +} + +unsigned int numa_node_to_arch_nid(nodeid_t n) +{ + return numa_node_to_dt_nid(n); +} + +u8 __node_distance(nodeid_t a, nodeid_t b) +{ + return dt_node_distance(a, b); +} + +int __init arch_numa_setup(const char *opt) +{ + /* parse "numa=" option */ + return 0; +} + +int __init arch_get_ram_range(unsigned int idx, paddr_t *start, paddr_t *end) +{ + return bootinfo_get_ram_range(idx, start, end); +} + +bool __init arch_numa_unavailable(void) +{ + return false; +} + +void __init numa_fw_bad(void) +{ + printk(KERN_ERR "%s NUMA info is broken.\n", numa_fw_nid_name); +} + -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:25 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:25 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323461.1589216 (Exim 4.92) (envelope-from ) id 1wToxF-0006LX-MV; Sun, 31 May 2026 22:48:25 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323461.1589216; Sun, 31 May 2026 22:48:25 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxF-0006LK-GN; Sun, 31 May 2026 22:48:25 +0000 Received: by outflank-mailman (input) for mailman id 1323461; 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Retry with numa=off"); size <<= PAGE_SHIFT; - printk(KERN_DEBUG "NUMA: Allocated memnodemap from %lx - %lx\n", + printk(KERN_DEBUG "NUMA: Allocated memnodemap from %"PRIpaddr" - %"PRIpaddr"\n", mfn_to_maddr(mfn), mfn_to_maddr(mfn) + size); memnodemapsize = size / sizeof(*memnodemap); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:27 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:27 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323467.1589225 (Exim 4.92) (envelope-from ) id 1wToxH-0006d0-Eb; Sun, 31 May 2026 22:48:27 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323467.1589225; Sun, 31 May 2026 22:48:27 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxH-0006cV-1J; Sun, 31 May 2026 22:48:27 +0000 Received: by outflank-mailman (input) for mailman id 1323467; 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Fix this logic to make it usable on ARM as well. --- tools/libs/light/libxl_vnuma.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/tools/libs/light/libxl_vnuma.c b/tools/libs/light/libxl_vnuma.c index d181574782..70a92a7598 100644 --- a/tools/libs/light/libxl_vnuma.c +++ b/tools/libs/light/libxl_vnuma.c @@ -259,8 +259,12 @@ int libxl__vnuma_build_vmemrange_hvm(libxl__gc *gc, xen_vmemrange_t *vmemranges; int rc; - /* Derive vmemranges from vnode size and memory hole. - * + /* Derive vmemranges from vnode size and memory hole. */ +#if defined (__arm__) || defined(__aarch64__) + hole_start = GUEST_RAM0_BASE + GUEST_RAM0_SIZE; + hole_end = GUEST_RAM1_BASE; +#else + /* * Guest physical address space layout: * [0, hole_start) [hole_start, hole_end) [hole_end, highmem_end) */ @@ -268,10 +272,15 @@ int libxl__vnuma_build_vmemrange_hvm(libxl__gc *gc, dom->lowmem_end : dom->mmio_start; hole_end = (dom->mmio_start + dom->mmio_size) > (1ULL << 32) ? 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The NUMA node to which each memory node belongs is determined based on the virtual NUMA configuration specified in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 50 +++++++++++++++++++++++++++++------- 1 file changed, 41 insertions(+), 9 deletions(-) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 7e9f8a1bc3..6eae33cdd2 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -670,25 +670,53 @@ static int make_optee_node(libxl__gc *gc, void *fdt) } static int make_memory_nodes(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info, const struct xc_dom_image *dom) { int res, i; const char *name; const uint64_t bankbase[] = GUEST_RAM_BANK_BASES; - for (i = 0; i < GUEST_RAM_BANKS; i++) { - name = GCSPRINTF("memory@%"PRIx64, bankbase[i]); + if (dom->nr_vmemranges == 0 ) { + for (i = 0; i < GUEST_RAM_BANKS; i++) { + name = GCSPRINTF("memory@%"PRIx64, bankbase[i]); - LOG(DEBUG, "Creating placeholder node /%s", name); + LOG(DEBUG, "Creating placeholder node /%s", name); + res = fdt_begin_node(fdt, name); + if (res) return res; + + res = fdt_property_string(fdt, "device_type", "memory"); + if (res) return res; + + res = fdt_property_regs(gc, fdt, GUEST_ROOT_ADDRESS_CELLS, GUEST_ROOT_SIZE_CELLS, + 1, 0, 0); + if (res) return res; + + res = fdt_end_node(fdt); + if (res) return res; + } + + return 0; + } + + for (i = 0; i < dom->nr_vmemranges; i++) { + uint64_t start_addr = dom->vmemranges[i].start; + uint64_t size = dom->vmemranges[i].end - start_addr; + uint32_t nid = dom->vmemranges[i].nid; + uint64_t regs[2] = { cpu_to_fdt64(start_addr), cpu_to_fdt64(size) }; + + name = GCSPRINTF("memory@%"PRIx64, start_addr); res = fdt_begin_node(fdt, name); if (res) return res; res = fdt_property_string(fdt, "device_type", "memory"); if (res) return res; - res = fdt_property_regs(gc, fdt, GUEST_ROOT_ADDRESS_CELLS, GUEST_ROOT_SIZE_CELLS, - 1, 0, 0); + res = fdt_property(fdt, "reg", regs, sizeof(uint64_t) * 2); + if (res) return res; + + res = fdt_property_u32(fdt, "numa-node-id", nid); if (res) return res; res = fdt_end_node(fdt); @@ -1365,7 +1393,7 @@ next_resize: FDT( make_cpus_node(gc, fdt, info->max_vcpus, ainfo) ); FDT( make_psci_node(gc, fdt) ); - FDT( make_memory_nodes(gc, fdt, dom) ); + FDT( make_memory_nodes(gc, fdt, info, dom) ); switch (info->arch_arm.gic_version) { case LIBXL_GIC_VERSION_V2: @@ -1716,10 +1744,14 @@ int libxl__arch_domain_finalise_hw_description(libxl__gc *gc, if (res) return res; - for (i = 0; i < GUEST_RAM_BANKS; i++) { - const uint64_t size = (uint64_t)dom->rambank_size[i] << XC_PAGE_SHIFT; + if (d_config->b_info.num_vnuma_nodes == 0) { + for (i = 0; i < GUEST_RAM_BANKS; i++) { + const uint64_t size = (uint64_t)dom->rambank_size[i] << XC_PAGE_SHIFT; - finalise_one_node(gc, fdt, "/memory", bankbase[i], size); + finalise_one_node(gc, fdt, "/memory", bankbase[i], size); + } + } else { + LOG(DEBUG, "vNUMA enabled: skipping memory node finalisation as nodes are already populated"); } if (dom->acpi_modules[0].data) { -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:33 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:33 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323476.1589243 (Exim 4.92) (envelope-from ) id 1wToxN-0007cX-77; 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This information is retrieved from the virtual NUMA configuration in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 6eae33cdd2..4b0ed99229 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -571,7 +571,8 @@ static int make_chosen_node(libxl__gc *gc, void *fdt, bool ramdisk, return 0; } -static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, +static int make_cpus_node(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info, const struct arch_info *ainfo) { int res, i; @@ -586,7 +587,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, res = fdt_property_cell(fdt, "#size-cells", 0); if (res) return res; - for (i = 0; i < nr_cpus; i++) { + for (i = 0; i < b_info->max_vcpus; i++) { const char *name; mpidr_aff = libxl__compute_mpdir(i); @@ -607,6 +608,17 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int nr_cpus, res = fdt_property_regs(gc, fdt, 1, 0, 1, mpidr_aff); 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@@ -274,7 +274,7 @@ static int populate_one_size(struct xc_dom_image *dom, int pfn_shift, extents[i] = base_pfn + (i<xch, dom->guest_domid, count, - pfn_shift, 0, extents); + pfn_shift, memflags, extents); if ( nr <= 0 ) return nr; DOMPRINTF("%s: populated %#x/%#x entries with shift %d", __FUNCTION__, nr, count, pfn_shift); @@ -285,10 +285,12 @@ static int populate_one_size(struct xc_dom_image *dom, int pfn_shift, } static int populate_guest_memory(struct xc_dom_image *dom, - xen_pfn_t base_pfn, xen_pfn_t nr_pfns) + xen_pfn_t base_pfn, xen_pfn_t nr_pfns, + unsigned int nid) { int rc = 0; xen_pfn_t allocsz, pfn, *extents; + unsigned int memflags = 0U; extents = calloc(1024*1024,sizeof(xen_pfn_t)); if ( extents == NULL ) @@ -303,6 +305,16 @@ static int populate_guest_memory(struct xc_dom_image *dom, (uint64_t)(base_pfn + nr_pfns) << XC_PAGE_SHIFT, (uint64_t)nr_pfns >> (20-XC_PAGE_SHIFT)); + if ( dom->nr_vmemranges > 0 ) + { + memflags = XENMEMF_exact_node(dom->vnode_to_pnode[nid]); + + DOMPRINTF("%s: on pNODE%u for vNODE%u", + __FUNCTION__, + dom->vnode_to_pnode[nid], + nid); + } + for ( pfn = 0; pfn < nr_pfns; pfn += allocsz ) { allocsz = min_t(int, 1024*1024, nr_pfns - pfn); @@ -312,7 +324,7 @@ static int populate_guest_memory(struct xc_dom_image *dom, { allocsz = 1; rc = populate_one_size(dom, PFN_4K_SHIFT, - base_pfn + pfn, &allocsz, extents); + base_pfn + pfn, &allocsz, extents, memflags); if (rc < 0) break; if (rc > 0) continue; /* Failed to allocate a single page? */ @@ -321,22 +333,22 @@ static int populate_guest_memory(struct xc_dom_image *dom, #endif rc = populate_one_size(dom, PFN_512G_SHIFT, - base_pfn + pfn, &allocsz, extents); + base_pfn + pfn, &allocsz, extents, memflags); if ( rc < 0 ) break; if ( rc > 0 ) continue; rc = populate_one_size(dom, PFN_1G_SHIFT, - base_pfn + pfn, &allocsz, extents); + base_pfn + pfn, &allocsz, extents, memflags); if ( rc < 0 ) break; if ( rc > 0 ) continue; rc = populate_one_size(dom, PFN_2M_SHIFT, - base_pfn + pfn, &allocsz, extents); + base_pfn + pfn, &allocsz, extents, memflags); if ( rc < 0 ) break; if ( rc > 0 ) continue; rc = populate_one_size(dom, PFN_4K_SHIFT, - base_pfn + pfn, &allocsz, extents); + base_pfn + pfn, &allocsz, extents, memflags); if ( rc < 0 ) break; if ( rc == 0 ) { @@ -415,12 +427,36 @@ static int meminit(struct xc_dom_image *dom) assert(ramsize == 0); /* Too much RAM is rejected above */ /* setup initial p2m and allocate guest memory */ - for ( i = 0; i < GUEST_RAM_BANKS && dom->rambank_size[i]; i++ ) + if ( dom->nr_vmemranges > 0 ) { - if ((rc = populate_guest_memory(dom, - bankbase[i] >> XC_PAGE_SHIFT, - dom->rambank_size[i]))) - return rc; + ramsize = (uint64_t)dom->total_pages << XC_PAGE_SHIFT; + + for ( i = 0; i < dom->nr_vmemranges; i++ ) + { + ramsize -= dom->vmemranges[i].end - dom->vmemranges[i].start; + } + + assert(ramsize == 0); + + for ( i = 0; i < dom->nr_vmemranges; i++ ) + { + if ((rc = populate_guest_memory(dom, + dom->vmemranges[i].start >> XC_PAGE_SHIFT, + (dom->vmemranges[i].end - dom->vmemranges[i].start) >> XC_PAGE_SHIFT, + dom->vmemranges[i].nid))) + return rc; + } + } + else + { + for ( i = 0; i < GUEST_RAM_BANKS && dom->rambank_size[i]; i++ ) + { + if ((rc = populate_guest_memory(dom, + bankbase[i] >> XC_PAGE_SHIFT, + dom->rambank_size[i], + 0U))) + return rc; + } } /* -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:36 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:36 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323480.1589260 (Exim 4.92) (envelope-from ) id 1wToxQ-0008Ok-NR; Sun, 31 May 2026 22:48:36 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323480.1589260; Sun, 31 May 2026 22:48:36 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxQ-0008NE-8W; Sun, 31 May 2026 22:48:36 +0000 Received: by outflank-mailman (input) for mailman id 1323480; Sun, 31 May 2026 22:48:34 +0000 Received: from mx.expurgate.net ([195.190.135.10]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxN-0007hS-Nk for xen-devel@lists.xenproject.org; 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This information is retrieved from the virtual NUMA configuration in the xl domain configuration file. --- tools/libs/light/libxl_arm.c | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/tools/libs/light/libxl_arm.c b/tools/libs/light/libxl_arm.c index 4b0ed99229..466bee95ad 100644 --- a/tools/libs/light/libxl_arm.c +++ b/tools/libs/light/libxl_arm.c @@ -738,6 +738,39 @@ static int make_memory_nodes(libxl__gc *gc, void *fdt, return 0; } +static int make_numa_distance_map(libxl__gc *gc, void *fdt, + const libxl_domain_build_info *b_info) +{ + int i, j; + uint32_t *matrix; + int nr_nodes = b_info->num_vnuma_nodes; + int idx = 0; + int res; + + if (nr_nodes == 0) return 0; + + res = fdt_begin_node(fdt, "distance-map"); + if (res) return res; + + res = fdt_property_string(fdt, "compatible", "numa-distance-map-v1"); + if (res) return res; + + matrix = libxl__malloc(gc, sizeof(uint32_t) * nr_nodes * nr_nodes * 3); + + for (i = 0; i < nr_nodes; i++) { + for (j = 0; j < nr_nodes; j++) { + matrix[idx++] = cpu_to_fdt32(i); + matrix[idx++] = cpu_to_fdt32(j); + matrix[idx++] = cpu_to_fdt32(b_info->vnuma_nodes[i].distances[j]); + } + } + + res = fdt_property(fdt, "distance-matrix", matrix, sizeof(uint32_t) * idx); + if (res) return res; + + return fdt_end_node(fdt); +} + static int make_gicv2_node(libxl__gc *gc, void *fdt, uint64_t gicd_base, uint64_t gicd_size, uint64_t gicc_base, uint64_t gicc_size) @@ -1407,6 +1440,8 @@ next_resize: FDT( make_memory_nodes(gc, fdt, info, dom) ); + FDT( make_numa_distance_map(gc, fdt, info) ); + switch (info->arch_arm.gic_version) { case LIBXL_GIC_VERSION_V2: FDT( make_gicv2_node(gc, fdt, -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:37 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:37 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323484.1589265 (Exim 4.92) (envelope-from ) id 1wToxR-0008T9-8t; Sun, 31 May 2026 22:48:37 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323484.1589265; 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The syntax and format of the parameters are identical to the x86 implementation. The logic that actually functions based on this argument will be provided in a follow-up patch. --- xen/arch/arm/domain_build.c | 43 +++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 1efddc60ef..f4187512b0 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -37,6 +37,7 @@ #include #include #include +#include #include #include @@ -66,6 +67,48 @@ static int __init parse_dom0_mem(const char *s) } custom_param("dom0_mem", parse_dom0_mem); +static nodemask_t __initdata dom0_nodes; +bool __initdata dom0_affinity_relaxed; + +#ifdef CONFIG_NUMA + +static int __init cf_check parse_dom0_nodes(const char *s) +{ + const char *ss; + int rc = 0; + unsigned int nid; + + do { + ss = strchr(s, ','); + if ( !ss ) + ss = strchr(s, '\0'); + + if ( isdigit(*s) ) + { + const char *endp; + + if ( (nid = simple_strtoul(s, &endp, 0), endp != ss) ) + rc = -EINVAL; + else if ( nid >= MAX_NUMNODES ) + rc = -E2BIG; + else + node_set(nid, dom0_nodes); + } + else if ( !cmdline_strcmp(s, "relaxed") ) + dom0_affinity_relaxed = true; + else if ( !cmdline_strcmp(s, "strict") ) + dom0_affinity_relaxed = false; + else + rc = -EINVAL; + + s = ss + 1; + } while ( *ss ); + + return rc; +} +custom_param("dom0_nodes", parse_dom0_nodes); +#endif /* CONFIG_NUMA */ + int __init parse_arch_dom0_param(const char *s, const char *e) { long long val; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:38 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:38 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323491.1589271 (Exim 4.92) (envelope-from ) id 1wToxS-00009F-0l; Sun, 31 May 2026 22:48:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323491.1589271; Sun, 31 May 2026 22:48:37 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxR-00007H-8i; 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If the option is omitted, the node affinity is configured to use all available NUMA nodes managed by Xen. When Xen is built with CONFIG_NUMA disabled, the node affinity falls back to using only NUMA node 0. --- xen/arch/arm/domain_build.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index f4187512b0..2518909ed0 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -2027,6 +2027,13 @@ void __init create_dom0(void) if ( llc_coloring_enabled && (rc = dom0_set_llc_colors(dom0)) ) panic("Error initializing LLC coloring for %pd (rc = %d)\n", dom0, rc); + nodes_and(dom0_nodes, dom0_nodes, node_online_map); + if ( nodes_empty(dom0_nodes) ) + dom0_nodes = node_online_map; + + dom0->node_affinity = dom0_nodes; + dom0->auto_node_affinity = false; + if ( vcpu_create(dom0, 0) == NULL ) panic("Error creating %pdv0\n", dom0); -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:42 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:42 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323500.1589289 (Exim 4.92) (envelope-from ) id 1wToxV-0001RZ-RE; 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This implementation maps the physical NUMA node IDs directly as Dom0's virtual NUMA node IDs. --- xen/arch/arm/domain_build.c | 22 ++++++- xen/common/device-tree/domain-build.c | 88 +++++++++++++-------------- 2 files changed, 63 insertions(+), 47 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 2518909ed0..1deb4c1139 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -187,11 +187,26 @@ static bool __init insert_11_bank(struct domain *d, int res; mfn_t smfn; paddr_t start, size; + nodeid_t node = 0U; smfn = page_to_mfn(pg); start = mfn_to_maddr(smfn); size = pfn_to_paddr(1UL << order); + /* This code is temporal */ + { + struct membanks *mem = bootinfo_get_mem(); + for ( i = 0; i < mem->nr_banks; i++ ) + { + if ( start >= mem->bank[i].start && + start < (mem->bank[i].start + mem->bank[i].size) ) + { + node = get_numa_nodeid(&mem->bank[i]); + break; + } + } + } + D11PRINT("Allocated %#"PRIpaddr"-%#"PRIpaddr" (%ldMB/%ldMB, order %d)\n", start, start + size, 1UL << (order + PAGE_SHIFT - 20), @@ -217,6 +232,7 @@ static bool __init insert_11_bank(struct domain *d, { mem->bank[0].start = start; mem->bank[0].size = size; + set_numa_nodeid(&mem->bank[0], node); mem->nr_banks = 1; return true; } @@ -226,7 +242,7 @@ static bool __init insert_11_bank(struct domain *d, struct membank *bank = &mem->bank[i]; /* If possible merge new memory into the start of the bank */ - if ( bank->start == start+size ) + if ( bank->start == start+size && get_numa_nodeid(bank) == node ) { bank->start = start; bank->size += size; @@ -234,7 +250,7 @@ static bool __init insert_11_bank(struct domain *d, } /* If possible merge new memory onto the end of the bank */ - if ( start == bank->start + bank->size ) + if ( start == bank->start + bank->size && get_numa_nodeid(bank) == node ) { bank->size += size; return true; @@ -253,6 +269,7 @@ static bool __init insert_11_bank(struct domain *d, mem->nr_banks++; bank->start = start; bank->size = size; + set_numa_nodeid(bank, node); return true; } } @@ -263,6 +280,7 @@ static bool __init insert_11_bank(struct domain *d, bank->start = start; bank->size = size; + set_numa_nodeid(bank, node); mem->nr_banks++; return true; } diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 2a760b007b..61e2e50062 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -493,15 +493,50 @@ int __init make_chosen_node(const struct kernel_info *kinfo) return res; } +static int __init make_memory_sibling_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membank *bank) +{ + void *fdt = kinfo->fdt; + int res = 0; + u64 start = bank->start; + u64 size = bank->size; + __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE]; + __be32 *cells = ®[0]; + nodeid_t node = get_numa_nodeid(bank); + char name[32]; + + dt_dprintk(" Bank: %#"PRIx64"->%#"PRIx64" Node:%u\n", start, start + size, node); + + snprintf(name, sizeof(name), "memory@%"PRIx64, start); + res = fdt_begin_node(fdt, name); + if ( res ) + return res; + + dt_child_set_range(&cells, addrcells, sizecells, start, size); + res = fdt_property_string(fdt, "device_type", "memory"); + if ( res ) + return res; + + res = fdt_property(fdt, "reg", reg, (addrcells + sizecells) * sizeof(*reg)); + if ( res ) + return res; + +#ifdef CONFIG_NUMA + res = fdt_property_u32(fdt, "numa-node-id", node); + if ( res ) + return res; +#endif /* CONFIG_NUMA */ + + res = fdt_end_node(fdt); + + return res; +} + int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, int sizecells, const struct membanks *mem) { - void *fdt = kinfo->fdt; unsigned int i; - int res, reg_size = addrcells + sizecells; - int nr_cells = 0; - __be32 reg[DT_MEM_NODE_REG_RANGE_SIZE]; - __be32 *cells; + int res = 0; if ( mem->nr_banks == 0 ) return -ENOENT; @@ -516,54 +551,17 @@ int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, dt_dprintk("Create memory node\n"); - res = domain_fdt_begin_node(fdt, "memory", mem->bank[i].start); - if ( res ) - return res; - - res = fdt_property_string(fdt, "device_type", "memory"); - if ( res ) - return res; - - cells = ®[0]; for ( ; i < mem->nr_banks; i++ ) { - u64 start = mem->bank[i].start; - u64 size = mem->bank[i].size; - if ( (mem->bank[i].type == MEMBANK_STATIC_DOMAIN) || (mem->bank[i].type == MEMBANK_FDT_RESVMEM) ) continue; - nr_cells += reg_size; - BUG_ON(nr_cells > ARRAY_SIZE(reg)); - dt_child_set_range(&cells, addrcells, sizecells, start, size); - } - - /* - * static shared memory banks need to be listed as /memory node, so when - * this function is handling the normal memory, add the banks. - */ - if ( mem == kernel_info_get_mem_const(kinfo) ) - shm_mem_node_fill_reg_range(kinfo, reg, &nr_cells, addrcells, - sizecells); - - for ( cells = reg, i = 0; cells < reg + nr_cells; i++, cells += reg_size ) - { - uint64_t start = dt_read_number(cells, addrcells); - uint64_t size = dt_read_number(cells + addrcells, sizecells); - - dt_dprintk(" Bank %u: %#"PRIx64"->%#"PRIx64"\n", - i, start, start + size); + res = make_memory_sibling_node(kinfo, addrcells, sizecells, &mem->bank[i]); + if ( res ) + return res; } - dt_dprintk("(reg size %d, nr cells %d)\n", reg_size, nr_cells); - - res = fdt_property(fdt, "reg", reg, nr_cells * sizeof(*reg)); - if ( res ) - return res; - - res = fdt_end_node(fdt); - return res; } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:43 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:43 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323504.1589295 (Exim 4.92) (envelope-from ) id 1wToxX-0001lZ-4Q; Sun, 31 May 2026 22:48:43 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323504.1589295; Sun, 31 May 2026 22:48:43 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxW-0001kP-Te; Sun, 31 May 2026 22:48:42 +0000 Received: by outflank-mailman (input) for mailman id 1323504; Sun, 31 May 2026 22:48:40 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxU-00015x-Im for xen-devel@lists.xenproject.org; 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} +/* + * Map a Dom0 vCPU ID to a target NUMA node ID. + */ +static nodeid_t __init dom0_vcpu_to_node(const struct domain *d, unsigned int vcpu_id) +{ + nodeid_t nodes[MAX_NUMNODES]; + unsigned int nr_nodes = 0; + unsigned int vcpus_per_node; + unsigned int node_idx; + nodeid_t n; + + if ( nodes_empty(d->node_affinity) ) + return 0; + + for_each_node_mask(n, d->node_affinity) + nodes[nr_nodes++] = n; + + if ( nr_nodes == 0 ) + return 0; + + vcpus_per_node = (d->max_vcpus + nr_nodes - 1) / nr_nodes; + node_idx = vcpu_id / vcpus_per_node; + + ASSERT(node_idx < nr_nodes); + + return nodes[node_idx]; +} + int __init make_cpus_node(const struct domain *d, struct kernel_info *kinfo) { int res; @@ -1907,6 +1935,24 @@ int __init construct_domain(struct domain *d, struct kernel_info *kinfo) vcpu_switch_to_aarch64_mode(d->vcpu[i]); } + /* + * If Dom0 has specific NUMA node affinity configured, bind each vCPU + * to its designated physical node. + */ + for ( i = 0; i < d->max_vcpus; i++ ) + { + struct vcpu *v = d->vcpu[i]; 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} + if ( IS_ENABLED(CONFIG_NUMA) ) + { + nodeid_t target_node = dom0_vcpu_to_node(d, cpu); + res = fdt_property_u32(fdt, "numa-node-id", target_node); + if ( res ) + return res; + } + res = fdt_end_node(fdt); if ( res ) return res; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:47 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:47 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323513.1589315 (Exim 4.92) (envelope-from ) id 1wToxb-0002ik-Gc; Sun, 31 May 2026 22:48:47 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323513.1589315; Sun, 31 May 2026 22:48:47 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxb-0002i3-5o; Sun, 31 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1323513; Sun, 31 May 2026 22:48:45 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxY-0002Af-S9 for xen-devel@lists.xenproject.org; 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This ensures that distances are populated only for the specific NUMA nodes assigned to Domain-0. --- xen/arch/arm/domain_build.c | 50 +++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 750c3d53c2..e71d6cb254 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -718,6 +718,51 @@ static int __init fdt_property_interrupts(const struct kernel_info *kinfo, return res; } +#ifdef CONFIG_NUMA +static int __init make_distance_map_node(const struct domain *d, void *fdt) +{ + nodeid_t from, to; + unsigned int count = 0; + int res; + + static uint32_t __initdata matrix[MAX_NUMNODES * MAX_NUMNODES * 3]; + + if ( nodes_weight(d->node_affinity) <= 1 ) + return 0; + + for_each_node_mask(from, d->node_affinity) + { + for_each_node_mask(to, d->node_affinity) + { + matrix[count * 3 + 0] = cpu_to_fdt32(from); + matrix[count * 3 + 1] = cpu_to_fdt32(to); + matrix[count * 3 + 2] = cpu_to_fdt32(__node_distance(from, to)); + count++; + } + } + + res = fdt_begin_node(fdt, "distance-map"); + if ( res ) + return res; + + res = fdt_property_string(fdt, "compatible", "numa-distance-map-v1"); + if ( res ) + return res; + + res = fdt_property(fdt, "distance-matrix", matrix, count * 3 * sizeof(uint32_t)); + if ( res ) + return res; + + res = fdt_end_node(fdt); + if ( res ) + return res; + + return 0; +} +#else /* CONFIG_NUMA */ +#define make_distance_map_node(d, fdt) (0) +#endif /* CONFIG_NUMA */ + int __init add_ext_regions(unsigned long s_gfn, unsigned long e_gfn, void *data) { @@ -1568,6 +1613,7 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, DT_MATCH_TYPE("memory"), /* The memory mapped timer is not supported by Xen. */ DT_MATCH_COMPATIBLE("arm,armv7-timer-mem"), + DT_MATCH_COMPATIBLE("numa-distance-map-v1"), { /* sentinel */ }, }; static const struct dt_device_match timer_matches[] __initconst = @@ -1733,6 +1779,10 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, if ( res ) return res; + res = make_distance_map_node(d, kinfo->fdt); + if ( res ) + return res; + res = sci_dt_finalize(d, kinfo->fdt); if ( res ) return res; -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:48 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:48 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323516.1589321 (Exim 4.92) (envelope-from ) id 1wToxc-0002pQ-EP; Sun, 31 May 2026 22:48:48 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 1323516.1589321; Sun, 31 May 2026 22:48:48 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxb-0002mj-Pb; Sun, 31 May 2026 22:48:47 +0000 Received: by outflank-mailman (input) for mailman id 1323516; Sun, 31 May 2026 22:48:46 +0000 Received: from mx.expurgate.net ([194.145.224.20]) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1wToxZ-0002SZ-Sj for xen-devel@lists.xenproject.org; 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Smith" Subject: [PATCH v2 22/24] xen/arm: Balance Dom0 memory allocation across allowed NUMA nodes Date: Mon, 1 Jun 2026 07:47:52 +0900 Message-ID: <20260531224755.9481-23-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260531224755.9481-1-taka@valinux.co.jp> References: <20260531224755.9481-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TY4PR01CA0117.jpnprd01.prod.outlook.com (2603:1096:405:379::18) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|TY1P286MB3278:EE_ X-MS-Office365-Filtering-Correlation-Id: 065bc7e4-e427-468d-0464-08debf66c3a6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|10070799003|1800799024|366016|5023799004|3023799007|6133799003|56012099006|18002099003|22082099003; X-Microsoft-Antispam-Message-Info: Cumi8X9iRL6k+aqxPVveSwhKzV/SOUSVl1dOlvK4/TfNkZMYrQKKzK+A1LBNubjbiyX0p7GMUsnx9oGYHzHSqiZQP3GIxmp0z1gnE99BAb1kisAQ4lgi9S6Y2nsZtV+FSmdYmo554Tg9kLl0FtFsq6u+WoJOOZkuSwNfZn7nV1wH9Aqdbv5tESKSbsX88f4qmWLRa0JL3/a8YbTCnlAc7q2iBI5J8H37YMGRKFwk7kLuoqOrhyfCnyRzqlulLFVHjr1hMwbgcuSpDydSSnDdKuMidcEw32yyAL4fGca1xcDSjBlY27xxXJhAqbjEN+51zze5y99hi9a6tZ4oGU9Ij4c/F49m9SR8odFRJOFboktxPVnA5k3SX1Km1pAmB+qtonRyLFSrixy+ibdQkQ3N3Xi3jaHLdps7y4O+eAQsSQEHD94tujDBccEG3DNw7WASEZKJ225NF4a33QRa1hDzwn77Nij/TsDIExpEuJp0xhSCG++qEqNfgcYw8kTNnh1sYWHyeli0qfqHlRNWFf4QqBrvjngTS9dcWTAG22UNkQReTCsm18CEBc72bUwPhpmPIPI/cQzYz7YuDRpskneJbFbf9R+cM0w+lp5M9OElhL23h1s9AAo7hCYYBdMk1+fkOzyc8d0JUeq+NRWnouu4x2YCj10i1u+rHEVyVJs1Tx+Nwb8FRpXHUgBugWTHJcL2 X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM;PTR:;CAT:NONE;SFS:(13230040)(376014)(10070799003)(1800799024)(366016)(5023799004)(3023799007)(6133799003)(56012099006)(18002099003)(22082099003);DIR:OUT;SFP:1102; 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When multiple NUMA nodes are available, distribute the allocation in a balanced manner across each of these nodes. --- xen/arch/arm/domain_build.c | 276 ++++++++++++++++++++---------------- 1 file changed, 152 insertions(+), 124 deletions(-) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index e71d6cb254..29b09e3da6 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -180,33 +180,19 @@ unsigned int __init dom0_max_vcpus(void) static bool __init insert_11_bank(struct domain *d, struct kernel_info *kinfo, struct page_info *pg, - unsigned int order) + unsigned int order, + nodeid_t node) { struct membanks *mem = kernel_info_get_mem(kinfo); unsigned int i; int res; mfn_t smfn; paddr_t start, size; - nodeid_t node = 0U; smfn = page_to_mfn(pg); start = mfn_to_maddr(smfn); size = pfn_to_paddr(1UL << order); - /* This code is temporal */ - { - struct membanks *mem = bootinfo_get_mem(); - for ( i = 0; i < mem->nr_banks; i++ ) - { - if ( start >= mem->bank[i].start && - start < (mem->bank[i].start + mem->bank[i].size) ) - { - node = get_numa_nodeid(&mem->bank[i]); - break; - } - } - } - D11PRINT("Allocated %#"PRIpaddr"-%#"PRIpaddr" (%ldMB/%ldMB, order %d)\n", start, start + size, 1UL << (order + PAGE_SHIFT - 20), @@ -293,7 +279,13 @@ fail: } /* - * This is all pretty horrible. + * Allocate NUMA-aware memory for Dom0 with 1:1 mapping. + * + * This function distributes the requested Dom0 memory across the allowed + * physical NUMA nodes in a balanced manner. It implements a multi-pass + * scavenging loop to allow nodes to dynamically back up each other if a + * particular node runs out of memory, maintaining a balanced distribution + * while ensuring the maximum amount of requested memory is satisfied. * * Requirements: * @@ -308,155 +300,190 @@ fail: * below 4GB, so that it can be used by non-LPAE enabled kernels (32-bit). * 4. Some devices assigned to dom0 can only do 32-bit DMA access or * even be more restricted. We want to allocate as much of the RAM - * as we reasonably can that can be accessed from all the devices.. + * as we reasonably can that can be accessed from all the devices. * 5. For 32-bit dom0 the kernel must be located below 4GB. - * 6. We want to have a few largers banks rather than many smaller ones. + * 6. We want to have a few larger banks rather than many smaller ones. * * For the first two requirements we need to make sure that the lowest - * bank is sufficiently large. - * - * For convenience we also sort the banks by physical address. - * - * The memory allocator does not really give us the flexibility to - * meet these requirements directly. So instead of proceed as follows: - * - * We first allocate the largest allocation we can as low as we - * can. This then becomes the first bank. This bank must be at least - * 128MB (or memory size requested for domain if that is smaller). + * bank (Bank 0) is sufficiently large to hold all boot modules. * - * Then we start allocating more memory, trying to allocate the - * largest possible size and trying smaller sizes until we - * successfully allocate something. + * The memory allocator does not really give us the flexibility to meet + * these requirements directly under NUMA topologies. So instead we proceed + * as follows: * - * We then try and insert this memory in to the list of banks. If it - * can be merged into an existing bank then this is trivial. + * We first calculate the total size required for the kernel, ramdisk, and + * DTB to establish a safe minimum size constraint for the first bank (Bank 0). * - * If the new memory is before the first bank (and cannot be merged into it) - * and is at least 128M then we allow it, otherwise we give up. Since the - * allocator prefers to allocate high addresses first and the first bank has - * already been allocated to be as low as possible this likely means we - * wouldn't have been able to allocate much more memory anyway. + * We then enter a multi-pass outer loop that runs until the full memory + * request is met. In each pass, we dynamically calculate the target allocation + * amount for each remaining active node to ensure a balanced distribution. * - * Otherwise we insert a new bank. If we've reached MAX_NR_BANKS then - * we give up. - * - * For 32-bit domain we require that the initial allocation for the - * first bank is part of the low mem. For 64-bit, the first bank is preferred - * to be allocated in the low mem. Then for subsequent allocation, we - * initially allocate memory only from low mem. Once that runs out out - * (as described above) we allow higher allocations and continue until - * that runs out (or we have allocated sufficient dom0 memory). + * For the initial chunk (Bank 0), we try to allocate the largest possible size + * as low as possible, honoring the 32-bit lowmem/DMA constraints. If it fails + * to find lowmem space and the domain is 64-bit, it falls back to highmem + * without violating the minimum size needed for the boot modules. */ static void __init allocate_memory_11(struct domain *d, struct kernel_info *kinfo) { - const unsigned int min_low_order = - get_order_from_bytes(min_t(paddr_t, kinfo->unassigned_mem, MB(128))); + paddr_t todo = kinfo->unassigned_mem; + nodeid_t node; + + const unsigned int max_chunk_order = get_order_from_bytes(MB(128)); const unsigned int min_order = get_order_from_bytes(MB(4)); + const unsigned int lowmem_bitsize = arch_get_dma_bitsize(); + unsigned int min_bank0_order; + bool is_bank0 = true; + + const struct boot_module *kernel_mod = boot_module_find_by_kind(BOOTMOD_KERNEL); + const struct boot_module *ramdisk_mod = boot_module_find_by_kind(BOOTMOD_RAMDISK); + const struct boot_module *dtb_mod = boot_module_find_by_kind(BOOTMOD_FDT); + const struct boot_module *xsm_policy_mod = boot_module_find_by_kind(BOOTMOD_XSM_POLICY); + paddr_t required_size = 0; + + nodemask_t exhausted_nodes; + nodemask_t valid_nodes; + struct membanks *mem = kernel_info_get_mem(kinfo); - struct page_info *pg; - unsigned int order = get_allocation_size(kinfo->unassigned_mem); unsigned int i; - bool lowmem = true; - unsigned int lowmem_bitsize = min(32U, arch_get_dma_bitsize()); - unsigned int bits; - /* * TODO: Implement memory bank allocation when DOM0 is not direct * mapped */ BUG_ON(!is_domain_direct_mapped(d)); - printk("Allocating 1:1 mappings totalling %ldMB for %pd:\n", + printk("Allocating 1:1 mappings totalling %ldMB for dom0:\n", /* Don't want format this as PRIpaddr (16 digit hex) */ - (unsigned long)(kinfo->unassigned_mem >> 20), d); + (unsigned long)(kinfo->unassigned_mem >> 20)); mem->nr_banks = 0; /* - * First try and allocate the largest thing we can as low as - * possible to be bank 0. + * Calculate the absolute minimum size required to fit the kernel, + * initrd, and DTB inside Bank 0 */ - while ( order >= min_low_order ) - { - for ( bits = order ; bits <= lowmem_bitsize; bits++ ) - { - pg = alloc_domheap_pages(d, order, MEMF_bits(bits)); - if ( pg != NULL ) - { - if ( !insert_11_bank(d, kinfo, pg, order) ) - BUG(); /* Cannot fail for first bank */ + if ( kernel_mod ) + required_size += kernel_mod->size; + if ( ramdisk_mod ) + required_size += ramdisk_mod->size; + if ( dtb_mod ) + required_size += dtb_mod->size; + if ( xsm_policy_mod ) + required_size += xsm_policy_mod->size; - goto got_bank0; - } - } - order--; - } - - /* Failed to allocate bank0 in the lowmem region. */ - if ( is_32bit_domain(d) ) - panic("Unable to allocate first memory bank\n"); + min_bank0_order = get_order_from_bytes(required_size); - /* Try to allocate memory from above the lowmem region */ - printk(XENLOG_INFO "No bank has been allocated below %u-bit.\n", - lowmem_bitsize); - lowmem = false; + nodes_clear(exhausted_nodes); + nodes_and(valid_nodes, d->node_affinity, node_online_map); - got_bank0: + BUG_ON(nodes_empty(valid_nodes)); - /* - * If we failed to allocate bank0 in the lowmem region, - * continue allocating from above the lowmem and fill in banks. - */ - order = get_allocation_size(kinfo->unassigned_mem); - while ( kinfo->unassigned_mem && mem->nr_banks < mem->max_banks ) + while ( todo > 0 ) { - pg = alloc_domheap_pages(d, order, - lowmem ? MEMF_bits(lowmem_bitsize) : 0); - if ( !pg ) - { - order --; + paddr_t last_todo = todo; + nodemask_t active_nodes; + unsigned int active_nodes_count; + unsigned int nodes_left; - if ( lowmem && order < min_low_order) - { - D11PRINT("Failed at min_low_order, allow high allocations\n"); - order = get_allocation_size(kinfo->unassigned_mem); - lowmem = false; - continue; - } - if ( order >= min_order ) - continue; + /* Filter out exhausted nodes to find active candidates */ + nodes_andnot(active_nodes, valid_nodes, exhausted_nodes); + active_nodes_count = nodes_weight(active_nodes); - /* No more we can do */ + if ( active_nodes_count == 0 ) + { + printk(XENLOG_WARNING "Dom0 NUMA: All specified nodes are completely exhausted.\n"); break; } - if ( !insert_11_bank(d, kinfo, pg, order) ) + nodes_left = active_nodes_count; + + for_each_node_mask(node, active_nodes) { - if ( mem->nr_banks == mem->max_banks ) - /* Nothing more we can do. */ - break; + paddr_t target_per_node; + paddr_t node_todo; - if ( lowmem ) - { - D11PRINT("Allocation below bank 0, allow high allocations\n"); - order = get_allocation_size(kinfo->unassigned_mem); - lowmem = false; - continue; - } - else + /* Target chunk size per node */ + target_per_node = DIV_ROUND_UP(todo, nodes_left); + target_per_node = DIV_ROUND_UP(target_per_node, MB(128)) * MB(128); + + node_todo = min(todo, target_per_node); + + while ( node_todo > 0 ) { - D11PRINT("Allocation below bank 0\n"); - break; + struct page_info *pg = NULL; + unsigned int max_order = get_allocation_size(node_todo); + unsigned int order; + paddr_t bank_size; + + /* + * Enforce a maximum chunk cap of 128MB for all allocations + * except Bank 0 + */ + if ( !is_bank0 && max_order > max_chunk_order ) + max_order = max_chunk_order; + + for ( order = max_order; order >= min_order; order-- ) + { + unsigned int memflags = MEMF_node(node); + if ( !dom0_affinity_relaxed ) + memflags |= MEMF_exact_node; + + if ( is_bank0 ) + { + unsigned int bits; + for ( bits = order; bits <= lowmem_bitsize; bits++ ) + { + pg = alloc_domheap_pages(d, order, memflags | MEMF_bits(bits)); + if ( pg != NULL ) + break; + } + + if ( !pg && order <= min_bank0_order ) + { + if ( is_32bit_domain(d) ) + panic("Unable to allocate first memory bank below %u-bit\n", lowmem_bitsize); + + pg = alloc_domheap_pages(d, order, memflags); + } + } + else + { + pg = alloc_domheap_pages(d, order, memflags); + } + + if ( pg ) + break; + } + + if ( !pg ) + { + node_set(node, exhausted_nodes); + break; + } + + is_bank0 = false; + + if ( !insert_11_bank(d, kinfo, pg, order, node) ) + break; + + bank_size = 1ULL << (PAGE_SHIFT + order); + node_todo -= bank_size; + todo -= bank_size; + + if ( todo == 0 ) break; } + + nodes_left--; + if ( todo == 0 ) break; } /* - * Success, next time around try again to get the largest order - * allocation possible. + * Prevent infinite loop if a full pass across all active nodes + * yields zero progress */ - order = get_allocation_size(kinfo->unassigned_mem); + if ( todo == last_todo ) + break; } if ( kinfo->unassigned_mem ) @@ -464,14 +491,15 @@ static void __init allocate_memory_11(struct domain *d, panic("Failed to allocate requested dom0 memory. %ldMB unallocated\n", (unsigned long)kinfo->unassigned_mem >> 20); - for( i = 0; i < mem->nr_banks; i++ ) + for ( i = 0; i < mem->nr_banks; i++ ) { - printk("BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB)\n", + printk("BANK[%d] %#"PRIpaddr"-%#"PRIpaddr" (%ldMB) NODE:%u\n", i, mem->bank[i].start, mem->bank[i].start + mem->bank[i].size, /* Don't want format this as PRIpaddr (16 digit hex) */ - (unsigned long)(mem->bank[i].size >> 20)); + (unsigned long)(mem->bank[i].size >> 20), + get_numa_nodeid(&mem->bank[i])); } } -- 2.43.0 From xen-devel-bounces@lists.xenproject.org Sun May 31 22:48:49 2026 Return-path: Envelope-to: archives@lists.xen.org Delivery-date: Sun, 31 May 2026 22:48:49 +0000 Received: from list by lists.xenproject.org with outflank-mailman.1323517.1589325 (Exim 4.92) (envelope-from ) id 1wToxd-0002wE-24; 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Since the memory banks managing Static SHM repurpose the 'type' field for a different purpose via a union, separating this creation logic keeps the implementation clean and significantly improves maintainability. --- xen/arch/arm/domain_build.c | 6 ++++++ xen/common/device-tree/domain-build.c | 21 +++++++++++++++++++++ xen/include/xen/fdt-domain-build.h | 2 ++ 3 files changed, 29 insertions(+) diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c index 29b09e3da6..497789ee1c 100644 --- a/xen/arch/arm/domain_build.c +++ b/xen/arch/arm/domain_build.c @@ -1807,6 +1807,12 @@ static int __init handle_node(struct domain *d, struct kernel_info *kinfo, if ( res ) return res; +#ifdef CONFIG_STATIC_SHM + res = make_raw_memory_node(kinfo, addrcells, sizecells, kernel_info_get_shm_mem_const(kinfo)); + if ( res ) + return res; +#endif /* CONFIG_STATIC_SHM */ + res = make_distance_map_node(d, kinfo->fdt); if ( res ) return res; diff --git a/xen/common/device-tree/domain-build.c b/xen/common/device-tree/domain-build.c index 61e2e50062..f846ca0471 100644 --- a/xen/common/device-tree/domain-build.c +++ b/xen/common/device-tree/domain-build.c @@ -565,6 +565,27 @@ int __init make_memory_node(const struct kernel_info *kinfo, int addrcells, return res; } +int __init make_raw_memory_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membanks *mem) +{ + unsigned int i; + int res = 0; + + if ( mem->nr_banks == 0 ) + return 0; + + dt_dprintk("Create raw memory nodes\n"); + + for ( i = 0 ; i < mem->nr_banks; i++ ) + { + res = make_memory_sibling_node(kinfo, addrcells, sizecells, &mem->bank[i]); + if ( res ) + return res; + } + + return res; +} + /* * Local variables: * mode: C diff --git a/xen/include/xen/fdt-domain-build.h b/xen/include/xen/fdt-domain-build.h index 671486c1c8..6a809f3f86 100644 --- a/xen/include/xen/fdt-domain-build.h +++ b/xen/include/xen/fdt-domain-build.h @@ -31,6 +31,8 @@ int make_hypervisor_node(struct domain *d, const struct kernel_info *kinfo, int addrcells, int sizecells); int make_memory_node(const struct kernel_info *kinfo, int addrcells, int sizecells, const struct membanks *mem); +int make_raw_memory_node(const struct kernel_info *kinfo, int addrcells, + int sizecells, const struct membanks *mem); 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From: Hirokazu Takahashi To: xen-devel@lists.xenproject.org Cc: Hirokazu Takahashi , Andrew Cooper , Anthony PERARD , Michal Orzel , Jan Beulich , Julien Grall , =?UTF-8?q?Roger=20Pau=20Monn=C3=A9?= , Stefano Stabellini Subject: [PATCH v2 24/24] xen/arm: Support numa and dom0_nodes boot options Date: Mon, 1 Jun 2026 07:47:54 +0900 Message-ID: <20260531224755.9481-25-taka@valinux.co.jp> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260531224755.9481-1-taka@valinux.co.jp> References: <20260531224755.9481-1-taka@valinux.co.jp> Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: TY4PR01CA0115.jpnprd01.prod.outlook.com (2603:1096:405:379::17) To OS9P286MB7222.JPNP286.PROD.OUTLOOK.COM (2603:1096:604:458::18) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: OS9P286MB7222:EE_|TY1P286MB3278:EE_ X-MS-Office365-Filtering-Correlation-Id: 3eb66169-8a08-4f4c-cc24-08debf66c60c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|10070799003|1800799024|366016|3023799007|56012099006|18002099003|22082099003; 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Its usage is almost identical to x86 Xen. The key difference is that while x86 uses ACPI PXM values to specify nodes, ARM uses the values defined in the device tree (numa-node-id). --- docs/misc/xen-command-line.pandoc | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/docs/misc/xen-command-line.pandoc b/docs/misc/xen-command-line.pandoc index 8c89b7852c..909d5889e5 100644 --- a/docs/misc/xen-command-line.pandoc +++ b/docs/misc/xen-command-line.pandoc @@ -1050,7 +1050,7 @@ Practices](https://wiki.xen.org/wiki/Xen_Best_Practices#Xen_dom0_dedicated_memor This option doesn't have effect if pv-shim mode is enabled. -### dom0_nodes (x86) +### dom0_nodes (x86, arm) > `= List of [ | relaxed | strict ]` @@ -1059,8 +1059,9 @@ This option doesn't have effect if pv-shim mode is enabled. Specify the NUMA nodes to place Dom0 on. Defaults for vCPU-s created and memory assigned to Dom0 will be adjusted to match the node restrictions set up here. Note that the values to be specified here are -ACPI PXM ones, not Xen internal node numbers. `relaxed` sets up vCPU -affinities to prefer but be not limited to the specified node(s). +ACPI PXM ones, not Xen internal node numbers, or node IDs in the device +tree. `relaxed` sets up vCPU affinities to prefer but be not limited to +the specified node(s). ### dom0_vcpus_pin > `= ` @@ -2017,7 +2018,7 @@ This option is ignored in **pv-shim** mode. ### nr_irqs (x86) > `= ` -### numa (x86) +### numa (x86, arm) > `= on | off | fake= | noacpi` > Default: `on` -- 2.43.0